LLVM  8.0.0svn
PPCSubtarget.cpp
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1 //===-- PowerPCSubtarget.cpp - PPC Subtarget Information ------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the PPC specific subclass of TargetSubtargetInfo.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "PPCSubtarget.h"
15 #include "PPC.h"
16 #include "PPCRegisterInfo.h"
17 #include "PPCTargetMachine.h"
20 #include "llvm/IR/Attributes.h"
21 #include "llvm/IR/Function.h"
22 #include "llvm/IR/GlobalValue.h"
26 #include <cstdlib>
27 
28 using namespace llvm;
29 
30 #define DEBUG_TYPE "ppc-subtarget"
31 
32 #define GET_SUBTARGETINFO_TARGET_DESC
33 #define GET_SUBTARGETINFO_CTOR
34 #include "PPCGenSubtargetInfo.inc"
35 
36 static cl::opt<bool> UseSubRegLiveness("ppc-track-subreg-liveness",
37 cl::desc("Enable subregister liveness tracking for PPC"), cl::Hidden);
38 
39 static cl::opt<bool> QPXStackUnaligned("qpx-stack-unaligned",
40  cl::desc("Even when QPX is enabled the stack is not 32-byte aligned"),
41  cl::Hidden);
42 
44  StringRef FS) {
45  initializeEnvironment();
46  initSubtargetFeatures(CPU, FS);
47  return *this;
48 }
49 
50 PPCSubtarget::PPCSubtarget(const Triple &TT, const std::string &CPU,
51  const std::string &FS, const PPCTargetMachine &TM)
52  : PPCGenSubtargetInfo(TT, CPU, FS), TargetTriple(TT),
53  IsPPC64(TargetTriple.getArch() == Triple::ppc64 ||
54  TargetTriple.getArch() == Triple::ppc64le),
56  InstrInfo(*this), TLInfo(TM, *this) {}
57 
58 void PPCSubtarget::initializeEnvironment() {
59  StackAlignment = 16;
61  HasMFOCRF = false;
62  Has64BitSupport = false;
63  Use64BitRegs = false;
64  UseCRBits = false;
65  HasHardFloat = false;
66  HasAltivec = false;
67  HasSPE = false;
68  HasFPU = false;
69  HasQPX = false;
70  HasVSX = false;
71  HasP8Vector = false;
72  HasP8Altivec = false;
73  HasP8Crypto = false;
74  HasP9Vector = false;
75  HasP9Altivec = false;
76  HasFCPSGN = false;
77  HasFSQRT = false;
78  HasFRE = false;
79  HasFRES = false;
80  HasFRSQRTE = false;
81  HasFRSQRTES = false;
82  HasRecipPrec = false;
83  HasSTFIWX = false;
84  HasLFIWAX = false;
85  HasFPRND = false;
86  HasFPCVT = false;
87  HasISEL = false;
88  HasBPERMD = false;
89  HasExtDiv = false;
90  HasCMPB = false;
91  HasLDBRX = false;
92  IsBookE = false;
93  HasOnlyMSYNC = false;
94  IsPPC4xx = false;
95  IsPPC6xx = false;
96  IsE500 = false;
97  FeatureMFTB = false;
98  DeprecatedDST = false;
99  HasLazyResolverStubs = false;
100  HasICBT = false;
102  HasPartwordAtomics = false;
103  HasDirectMove = false;
104  IsQPXStackUnaligned = false;
105  HasHTM = false;
106  HasFusion = false;
107  HasFloat128 = false;
108  IsISA3_0 = false;
109  UseLongCalls = false;
110  SecurePlt = false;
111 
113 }
114 
115 void PPCSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
116  // Determine default and user specified characteristics
117  std::string CPUName = CPU;
118  if (CPUName.empty() || CPU == "generic") {
119  // If cross-compiling with -march=ppc64le without -mcpu
121  CPUName = "ppc64le";
122  else
123  CPUName = "generic";
124  }
125 
126  // Initialize scheduling itinerary for the specified CPU.
127  InstrItins = getInstrItineraryForCPU(CPUName);
128 
129  // Parse features string.
130  ParseSubtargetFeatures(CPUName, FS);
131 
132  // If the user requested use of 64-bit regs, but the cpu selected doesn't
133  // support it, ignore.
134  if (IsPPC64 && has64BitSupport())
135  Use64BitRegs = true;
136 
137  // Set up darwin-specific properties.
138  if (isDarwin())
139  HasLazyResolverStubs = true;
140 
141  if (HasSPE && IsPPC64)
142  report_fatal_error( "SPE is only supported for 32-bit targets.\n", false);
143  if (HasSPE && (HasAltivec || HasQPX || HasVSX || HasFPU))
145  "SPE and traditional floating point cannot both be enabled.\n", false);
146 
147  // If not SPE, set standard FPU
148  if (!HasSPE)
149  HasFPU = true;
150 
151  // QPX requires a 32-byte aligned stack. Note that we need to do this if
152  // we're compiling for a BG/Q system regardless of whether or not QPX
153  // is enabled because external functions will assume this alignment.
156 
157  // Determine endianness.
158  // FIXME: Part of the TargetMachine.
160 }
161 
162 /// Return true if accesses to the specified global have to go through a dyld
163 /// lazy resolution stub. This means that an extra load is required to get the
164 /// address of the global.
167  return false;
168  if (!TM.shouldAssumeDSOLocal(*GV->getParent(), GV))
169  return true;
170  // 32 bit macho has no relocation for a-b if a is undefined, even if b is in
171  // the section that is being relocated. This means we have to use o load even
172  // for GVs that are known to be local to the dso.
173  if (GV->isDeclarationForLinker() || GV->hasCommonLinkage())
174  return true;
175  return false;
176 }
177 
179  return true;
180 }
181 
182 // This overrides the PostRAScheduler bit in the SchedModel for each CPU.
183 bool PPCSubtarget::enablePostRAScheduler() const { return true; }
184 
185 PPCGenSubtargetInfo::AntiDepBreakMode PPCSubtarget::getAntiDepBreakMode() const {
186  return TargetSubtargetInfo::ANTIDEP_ALL;
187 }
188 
189 void PPCSubtarget::getCriticalPathRCs(RegClassVector &CriticalPathRCs) const {
190  CriticalPathRCs.clear();
191  CriticalPathRCs.push_back(isPPC64() ?
192  &PPC::G8RCRegClass : &PPC::GPRCRegClass);
193 }
194 
196  unsigned NumRegionInstrs) const {
197  // The GenericScheduler that we use defaults to scheduling bottom up only.
198  // We want to schedule from both the top and the bottom and so we set
199  // OnlyBottomUp to false.
200  // We want to do bi-directional scheduling since it provides a more balanced
201  // schedule leading to better performance.
202  Policy.OnlyBottomUp = false;
203  // Spilling is generally expensive on all PPC cores, so always enable
204  // register-pressure tracking.
205  Policy.ShouldTrackPressure = true;
206 }
207 
208 bool PPCSubtarget::useAA() const {
209  return true;
210 }
211 
213  return UseSubRegLiveness;
214 }
215 
216 unsigned char
218  // Note that currently we don't generate non-pic references.
219  // If a caller wants that, this will have to be updated.
220 
221  // Large code model always uses the TOC even for local symbols.
224 
225  if (TM.shouldAssumeDSOLocal(*GV->getParent(), GV))
226  return PPCII::MO_PIC_FLAG;
228 }
229 
230 bool PPCSubtarget::isELFv2ABI() const { return TM.isELFv2ABI(); }
231 bool PPCSubtarget::isPPC64() const { return TM.isPPC64(); }
bool isDeclarationForLinker() const
Definition: GlobalValue.h:524
void overrideSchedPolicy(MachineSchedPolicy &Policy, unsigned NumRegionInstrs) const override
PPCSubtarget(const Triple &TT, const std::string &CPU, const std::string &FS, const PPCTargetMachine &TM)
This constructor initializes the data members to match that of the specified triple.
LLVM_ATTRIBUTE_NORETURN void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
Definition: Error.cpp:139
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
bool isPPC64() const
isPPC64 - Return true if we are generating code for 64-bit pointer mode.
unsigned char classifyGlobalReference(const GlobalValue *GV) const
classifyGlobalReference - Classify a global variable reference for the current subtarget accourding t...
bool IsQPXStackUnaligned
When targeting QPX running a stock PPC64 Linux kernel where the stack alignment has not been changed...
Definition: PPCSubtarget.h:145
bool useAA() const override
unsigned StackAlignment
stackAlignment - The minimum alignment known to hold of the stack frame on entry to the function and ...
Definition: PPCSubtarget.h:82
unsigned getPlatformStackAlignment() const
Definition: PPCSubtarget.h:274
POPCNTDKind HasPOPCNTD
Definition: PPCSubtarget.h:140
This file contains the simple types necessary to represent the attributes associated with functions a...
unsigned DarwinDirective
Which cpu directive was used.
Definition: PPCSubtarget.h:88
bool hasCommonLinkage() const
Definition: GlobalValue.h:440
ArchType getArch() const
getArch - Get the parsed architecture type of this triple.
Definition: Triple.h:289
bool isELFv2ABI() const
bool has64BitSupport() const
has64BitSupport - Return true if the selected CPU supports 64-bit instructions, regardless of whether...
Definition: PPCSubtarget.h:209
InstrItineraryData InstrItins
Selected instruction itineraries (one entry per itinerary class.)
Definition: PPCSubtarget.h:85
bool shouldAssumeDSOLocal(const Module &M, const GlobalValue *GV) const
bool enableSubRegLiveness() const override
AntiDepBreakMode getAntiDepBreakMode() const override
PPCSubtarget & initializeSubtargetDependencies(StringRef CPU, StringRef FS)
initializeSubtargetDependencies - Initializes using a CPU and feature string so that we can use initi...
MO_NLP_FLAG - If this bit is set, the symbol reference is actually to the non_lazy_ptr for the global...
Definition: PPC.h:87
bool HasInvariantFunctionDescriptors
Definition: PPCSubtarget.h:130
PPCFrameLowering FrameLowering
Definition: PPCSubtarget.h:148
static cl::opt< bool > QPXStackUnaligned("qpx-stack-unaligned", cl::desc("Even when QPX is enabled the stack is not 32-byte aligned"), cl::Hidden)
PPCInstrInfo InstrInfo
Definition: PPCSubtarget.h:149
Common code between 32-bit and 64-bit PowerPC targets.
const PPCTargetMachine & TM
Definition: PPCSubtarget.h:147
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
void getCriticalPathRCs(RegClassVector &CriticalPathRCs) const override
void ParseSubtargetFeatures(StringRef CPU, StringRef FS)
ParseSubtargetFeatures - Parses features string setting specified subtarget options.
CodeModel::Model getCodeModel() const
Returns the code model.
Triple TargetTriple
TargetTriple - What processor and OS we&#39;re targeting.
Definition: PPCSubtarget.h:78
bool enableMachineScheduler() const override
Define a generic scheduling policy for targets that don&#39;t provide their own MachineSchedStrategy.
static cl::opt< bool > UseSubRegLiveness("ppc-track-subreg-liveness", cl::desc("Enable subregister liveness tracking for PPC"), cl::Hidden)
bool hasLazyResolverStub(const GlobalValue *GV) const
hasLazyResolverStub - Return true if accesses to the specified global have to go through a dyld lazy ...
PPCTargetLowering TLInfo
Definition: PPCSubtarget.h:150
bool isDarwin() const
isDarwin - True if this is any darwin platform.
Definition: PPCSubtarget.h:301
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:566
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:49
bool HasMFOCRF
Used by the ISel to turn in optimizations for POWER4-derived architectures.
Definition: PPCSubtarget.h:91
MO_PIC_FLAG - If this bit is set, the symbol reference is relative to the function&#39;s picbase...
Definition: PPC.h:83
bool enablePostRAScheduler() const override