LLVM  9.0.0svn
PPCSubtarget.cpp
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1 //===-- PowerPCSubtarget.cpp - PPC Subtarget Information ------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the PPC specific subclass of TargetSubtargetInfo.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "PPCSubtarget.h"
14 #include "PPC.h"
15 #include "PPCRegisterInfo.h"
16 #include "PPCTargetMachine.h"
19 #include "llvm/IR/Attributes.h"
20 #include "llvm/IR/Function.h"
21 #include "llvm/IR/GlobalValue.h"
25 #include <cstdlib>
26 
27 using namespace llvm;
28 
29 #define DEBUG_TYPE "ppc-subtarget"
30 
31 #define GET_SUBTARGETINFO_TARGET_DESC
32 #define GET_SUBTARGETINFO_CTOR
33 #include "PPCGenSubtargetInfo.inc"
34 
35 static cl::opt<bool> UseSubRegLiveness("ppc-track-subreg-liveness",
36 cl::desc("Enable subregister liveness tracking for PPC"), cl::Hidden);
37 
38 static cl::opt<bool> QPXStackUnaligned("qpx-stack-unaligned",
39  cl::desc("Even when QPX is enabled the stack is not 32-byte aligned"),
40  cl::Hidden);
41 
43  StringRef FS) {
44  initializeEnvironment();
45  initSubtargetFeatures(CPU, FS);
46  return *this;
47 }
48 
49 PPCSubtarget::PPCSubtarget(const Triple &TT, const std::string &CPU,
50  const std::string &FS, const PPCTargetMachine &TM)
51  : PPCGenSubtargetInfo(TT, CPU, FS), TargetTriple(TT),
52  IsPPC64(TargetTriple.getArch() == Triple::ppc64 ||
53  TargetTriple.getArch() == Triple::ppc64le),
55  InstrInfo(*this), TLInfo(TM, *this) {}
56 
57 void PPCSubtarget::initializeEnvironment() {
58  StackAlignment = 16;
60  HasMFOCRF = false;
61  Has64BitSupport = false;
62  Use64BitRegs = false;
63  UseCRBits = false;
64  HasHardFloat = false;
65  HasAltivec = false;
66  HasSPE = false;
67  HasFPU = false;
68  HasQPX = false;
69  HasVSX = false;
70  HasP8Vector = false;
71  HasP8Altivec = false;
72  HasP8Crypto = false;
73  HasP9Vector = false;
74  HasP9Altivec = false;
75  HasFCPSGN = false;
76  HasFSQRT = false;
77  HasFRE = false;
78  HasFRES = false;
79  HasFRSQRTE = false;
80  HasFRSQRTES = false;
81  HasRecipPrec = false;
82  HasSTFIWX = false;
83  HasLFIWAX = false;
84  HasFPRND = false;
85  HasFPCVT = false;
86  HasISEL = false;
87  HasBPERMD = false;
88  HasExtDiv = false;
89  HasCMPB = false;
90  HasLDBRX = false;
91  IsBookE = false;
92  HasOnlyMSYNC = false;
93  IsPPC4xx = false;
94  IsPPC6xx = false;
95  IsE500 = false;
96  FeatureMFTB = false;
97  DeprecatedDST = false;
98  HasLazyResolverStubs = false;
99  HasICBT = false;
101  HasPartwordAtomics = false;
102  HasDirectMove = false;
103  IsQPXStackUnaligned = false;
104  HasHTM = false;
105  HasFusion = false;
106  HasFloat128 = false;
107  IsISA3_0 = false;
108  UseLongCalls = false;
109  SecurePlt = false;
110  VectorsUseTwoUnits = false;
111  UsePPCPreRASchedStrategy = false;
113 
115 }
116 
117 void PPCSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
118  // Determine default and user specified characteristics
119  std::string CPUName = CPU;
120  if (CPUName.empty() || CPU == "generic") {
121  // If cross-compiling with -march=ppc64le without -mcpu
123  CPUName = "ppc64le";
124  else
125  CPUName = "generic";
126  }
127 
128  // Initialize scheduling itinerary for the specified CPU.
129  InstrItins = getInstrItineraryForCPU(CPUName);
130 
131  // Parse features string.
132  ParseSubtargetFeatures(CPUName, FS);
133 
134  // If the user requested use of 64-bit regs, but the cpu selected doesn't
135  // support it, ignore.
136  if (IsPPC64 && has64BitSupport())
137  Use64BitRegs = true;
138 
139  // Set up darwin-specific properties.
140  if (isDarwin())
141  HasLazyResolverStubs = true;
142 
144  SecurePlt = true;
145 
146  if (HasSPE && IsPPC64)
147  report_fatal_error( "SPE is only supported for 32-bit targets.\n", false);
148  if (HasSPE && (HasAltivec || HasQPX || HasVSX || HasFPU))
150  "SPE and traditional floating point cannot both be enabled.\n", false);
151 
152  // If not SPE, set standard FPU
153  if (!HasSPE)
154  HasFPU = true;
155 
156  // QPX requires a 32-byte aligned stack. Note that we need to do this if
157  // we're compiling for a BG/Q system regardless of whether or not QPX
158  // is enabled because external functions will assume this alignment.
161 
162  // Determine endianness.
163  // FIXME: Part of the TargetMachine.
165 }
166 
167 /// Return true if accesses to the specified global have to go through a dyld
168 /// lazy resolution stub. This means that an extra load is required to get the
169 /// address of the global.
172  return false;
173  if (!TM.shouldAssumeDSOLocal(*GV->getParent(), GV))
174  return true;
175  // 32 bit macho has no relocation for a-b if a is undefined, even if b is in
176  // the section that is being relocated. This means we have to use o load even
177  // for GVs that are known to be local to the dso.
178  if (GV->isDeclarationForLinker() || GV->hasCommonLinkage())
179  return true;
180  return false;
181 }
182 
184  return true;
185 }
186 
187 // This overrides the PostRAScheduler bit in the SchedModel for each CPU.
188 bool PPCSubtarget::enablePostRAScheduler() const { return true; }
189 
190 PPCGenSubtargetInfo::AntiDepBreakMode PPCSubtarget::getAntiDepBreakMode() const {
191  return TargetSubtargetInfo::ANTIDEP_ALL;
192 }
193 
194 void PPCSubtarget::getCriticalPathRCs(RegClassVector &CriticalPathRCs) const {
195  CriticalPathRCs.clear();
196  CriticalPathRCs.push_back(isPPC64() ?
197  &PPC::G8RCRegClass : &PPC::GPRCRegClass);
198 }
199 
201  unsigned NumRegionInstrs) const {
202  // The GenericScheduler that we use defaults to scheduling bottom up only.
203  // We want to schedule from both the top and the bottom and so we set
204  // OnlyBottomUp to false.
205  // We want to do bi-directional scheduling since it provides a more balanced
206  // schedule leading to better performance.
207  Policy.OnlyBottomUp = false;
208  // Spilling is generally expensive on all PPC cores, so always enable
209  // register-pressure tracking.
210  Policy.ShouldTrackPressure = true;
211 }
212 
213 bool PPCSubtarget::useAA() const {
214  return true;
215 }
216 
218  return UseSubRegLiveness;
219 }
220 
221 unsigned char
223  // Note that currently we don't generate non-pic references.
224  // If a caller wants that, this will have to be updated.
225 
226  // Large code model always uses the TOC even for local symbols.
229 
230  if (TM.shouldAssumeDSOLocal(*GV->getParent(), GV))
231  return PPCII::MO_PIC_FLAG;
233 }
234 
235 bool PPCSubtarget::isELFv2ABI() const { return TM.isELFv2ABI(); }
236 bool PPCSubtarget::isPPC64() const { return TM.isPPC64(); }
bool isDeclarationForLinker() const
Definition: GlobalValue.h:523
void overrideSchedPolicy(MachineSchedPolicy &Policy, unsigned NumRegionInstrs) const override
PPCSubtarget(const Triple &TT, const std::string &CPU, const std::string &FS, const PPCTargetMachine &TM)
This constructor initializes the data members to match that of the specified triple.
LLVM_ATTRIBUTE_NORETURN void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
Definition: Error.cpp:139
This class represents lattice values for constants.
Definition: AllocatorList.h:23
bool isPPC64() const
isPPC64 - Return true if we are generating code for 64-bit pointer mode.
unsigned char classifyGlobalReference(const GlobalValue *GV) const
classifyGlobalReference - Classify a global variable reference for the current subtarget accourding t...
bool IsQPXStackUnaligned
When targeting QPX running a stock PPC64 Linux kernel where the stack alignment has not been changed...
Definition: PPCSubtarget.h:147
bool useAA() const override
unsigned StackAlignment
stackAlignment - The minimum alignment known to hold of the stack frame on entry to the function and ...
Definition: PPCSubtarget.h:81
unsigned getPlatformStackAlignment() const
Definition: PPCSubtarget.h:279
POPCNTDKind HasPOPCNTD
Definition: PPCSubtarget.h:142
This file contains the simple types necessary to represent the attributes associated with functions a...
unsigned DarwinDirective
Which cpu directive was used.
Definition: PPCSubtarget.h:87
bool hasCommonLinkage() const
Definition: GlobalValue.h:439
ArchType getArch() const
getArch - Get the parsed architecture type of this triple.
Definition: Triple.h:291
bool isELFv2ABI() const
bool has64BitSupport() const
has64BitSupport - Return true if the selected CPU supports 64-bit instructions, regardless of whether...
Definition: PPCSubtarget.h:211
bool isOSNetBSD() const
Definition: Triple.h:484
InstrItineraryData InstrItins
Selected instruction itineraries (one entry per itinerary class.)
Definition: PPCSubtarget.h:84
bool shouldAssumeDSOLocal(const Module &M, const GlobalValue *GV) const
bool enableSubRegLiveness() const override
bool isOSOpenBSD() const
Definition: Triple.h:488
AntiDepBreakMode getAntiDepBreakMode() const override
PPCSubtarget & initializeSubtargetDependencies(StringRef CPU, StringRef FS)
initializeSubtargetDependencies - Initializes using a CPU and feature string so that we can use initi...
MO_NLP_FLAG - If this bit is set, the symbol reference is actually to the non_lazy_ptr for the global...
Definition: PPC.h:100
bool HasInvariantFunctionDescriptors
Definition: PPCSubtarget.h:129
PPCFrameLowering FrameLowering
Definition: PPCSubtarget.h:150
static cl::opt< bool > QPXStackUnaligned("qpx-stack-unaligned", cl::desc("Even when QPX is enabled the stack is not 32-byte aligned"), cl::Hidden)
PPCInstrInfo InstrInfo
Definition: PPCSubtarget.h:151
Common code between 32-bit and 64-bit PowerPC targets.
const PPCTargetMachine & TM
Definition: PPCSubtarget.h:149
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:43
void getCriticalPathRCs(RegClassVector &CriticalPathRCs) const override
void ParseSubtargetFeatures(StringRef CPU, StringRef FS)
ParseSubtargetFeatures - Parses features string setting specified subtarget options.
bool UsePPCPostRASchedStrategy
Definition: PPCSubtarget.h:140
CodeModel::Model getCodeModel() const
Returns the code model.
Triple TargetTriple
TargetTriple - What processor and OS we&#39;re targeting.
Definition: PPCSubtarget.h:77
bool enableMachineScheduler() const override
Define a generic scheduling policy for targets that don&#39;t provide their own MachineSchedStrategy.
static cl::opt< bool > UseSubRegLiveness("ppc-track-subreg-liveness", cl::desc("Enable subregister liveness tracking for PPC"), cl::Hidden)
bool hasLazyResolverStub(const GlobalValue *GV) const
hasLazyResolverStub - Return true if accesses to the specified global have to go through a dyld lazy ...
PPCTargetLowering TLInfo
Definition: PPCSubtarget.h:152
bool isDarwin() const
isDarwin - True if this is any darwin platform.
Definition: PPCSubtarget.h:306
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:565
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:48
bool HasMFOCRF
Used by the ISel to turn in optimizations for POWER4-derived architectures.
Definition: PPCSubtarget.h:90
MO_PIC_FLAG - If this bit is set, the symbol reference is relative to the function&#39;s picbase...
Definition: PPC.h:96
bool enablePostRAScheduler() const override