LLVM  6.0.0svn
R600RegisterInfo.h
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1 //===-- R600RegisterInfo.h - R600 Register Info Interface ------*- C++ -*--===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 /// \file
11 /// \brief Interface definition for R600RegisterInfo
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #ifndef LLVM_LIB_TARGET_AMDGPU_R600REGISTERINFO_H
16 #define LLVM_LIB_TARGET_AMDGPU_R600REGISTERINFO_H
17 
18 #include "AMDGPURegisterInfo.h"
19 
20 namespace llvm {
21 
22 class AMDGPUSubtarget;
23 
24 struct R600RegisterInfo final : public AMDGPURegisterInfo {
26 
28 
29  BitVector getReservedRegs(const MachineFunction &MF) const override;
30  const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
31  unsigned getFrameRegister(const MachineFunction &MF) const override;
32 
33  /// \brief get the HW encoding for a register's channel.
34  unsigned getHWRegChan(unsigned reg) const;
35 
36  unsigned getHWRegIndex(unsigned Reg) const;
37 
38  /// \brief get the register class of the specified type to use in the
39  /// CFGStructurizer
41 
42  const RegClassWeight &
43  getRegClassWeight(const TargetRegisterClass *RC) const override;
44 
45  // \returns true if \p Reg can be defined in one ALU clause and used in
46  // another.
47  bool isPhysRegLiveAcrossClauses(unsigned Reg) const;
48 
50  unsigned FIOperandNum,
51  RegScavenger *RS = nullptr) const override;
52 };
53 
54 } // End namespace llvm
55 
56 #endif
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
void eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override
Each TargetRegisterClass has a per register weight, and weight limit which must be less than the limi...
const TargetRegisterClass * getCFGStructurizerRegClass(MVT VT) const
get the register class of the specified type to use in the CFGStructurizer
Reg
All possible values of the reg field in the ModR/M byte.
TargetRegisterInfo interface that is implemented by all hw codegen targets.
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
unsigned getHWRegIndex(unsigned Reg) const
Machine Value Type.
const MCPhysReg * getCalleeSavedRegs(const MachineFunction *MF) const override
unsigned getFrameRegister(const MachineFunction &MF) const override
bool isPhysRegLiveAcrossClauses(unsigned Reg) const
unsigned getHWRegChan(unsigned reg) const
get the HW encoding for a register's channel.
const RegClassWeight & getRegClassWeight(const TargetRegisterClass *RC) const override
BitVector getReservedRegs(const MachineFunction &MF) const override
IRTranslator LLVM IR MI