LLVM  8.0.0svn
RISCVInstPrinter.cpp
Go to the documentation of this file.
1 //===-- RISCVInstPrinter.cpp - Convert RISCV MCInst to asm syntax ---------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This class prints an RISCV MCInst to a .s file.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "RISCVInstPrinter.h"
16 #include "Utils/RISCVBaseInfo.h"
17 #include "llvm/MC/MCAsmInfo.h"
18 #include "llvm/MC/MCExpr.h"
19 #include "llvm/MC/MCInst.h"
20 #include "llvm/MC/MCRegisterInfo.h"
22 #include "llvm/MC/MCSymbol.h"
26 using namespace llvm;
27 
28 #define DEBUG_TYPE "asm-printer"
29 
30 // Include the auto-generated portion of the assembly writer.
31 #define PRINT_ALIAS_INSTR
32 #include "RISCVGenAsmWriter.inc"
33 
34 // Include the auto-generated portion of the compress emitter.
35 #define GEN_UNCOMPRESS_INSTR
36 #include "RISCVGenCompressInstEmitter.inc"
37 
38 static cl::opt<bool>
39  NoAliases("riscv-no-aliases",
40  cl::desc("Disable the emission of assembler pseudo instructions"),
41  cl::init(false), cl::Hidden);
42 
44  StringRef Annot, const MCSubtargetInfo &STI) {
45  bool Res = false;
46  const MCInst *NewMI = MI;
47  MCInst UncompressedMI;
48  if (!NoAliases)
49  Res = uncompressInst(UncompressedMI, *MI, MRI, STI);
50  if (Res)
51  NewMI = const_cast<MCInst *>(&UncompressedMI);
52  if (NoAliases || !printAliasInstr(NewMI, STI, O))
53  printInstruction(NewMI, STI, O);
54  printAnnotation(O, Annot);
55 }
56 
57 void RISCVInstPrinter::printRegName(raw_ostream &O, unsigned RegNo) const {
58  O << getRegisterName(RegNo);
59 }
60 
61 void RISCVInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
62  const MCSubtargetInfo &STI, raw_ostream &O,
63  const char *Modifier) {
64  assert((Modifier == 0 || Modifier[0] == 0) && "No modifiers supported");
65  const MCOperand &MO = MI->getOperand(OpNo);
66 
67  if (MO.isReg()) {
68  printRegName(O, MO.getReg());
69  return;
70  }
71 
72  if (MO.isImm()) {
73  O << MO.getImm();
74  return;
75  }
76 
77  assert(MO.isExpr() && "Unknown operand kind in printOperand");
78  MO.getExpr()->print(O, &MAI);
79 }
80 
82  const MCSubtargetInfo &STI,
83  raw_ostream &O) {
84  unsigned Imm = MI->getOperand(OpNo).getImm();
85  auto SysReg = RISCVSysReg::lookupSysRegByEncoding(Imm);
86  if (SysReg && SysReg->haveRequiredFeatures(STI.getFeatureBits()))
87  O << SysReg->Name;
88  else
89  O << Imm;
90 }
91 
92 void RISCVInstPrinter::printFenceArg(const MCInst *MI, unsigned OpNo,
93  const MCSubtargetInfo &STI,
94  raw_ostream &O) {
95  unsigned FenceArg = MI->getOperand(OpNo).getImm();
96  assert (((FenceArg >> 4) == 0) && "Invalid immediate in printFenceArg");
97 
98  if ((FenceArg & RISCVFenceField::I) != 0)
99  O << 'i';
100  if ((FenceArg & RISCVFenceField::O) != 0)
101  O << 'o';
102  if ((FenceArg & RISCVFenceField::R) != 0)
103  O << 'r';
104  if ((FenceArg & RISCVFenceField::W) != 0)
105  O << 'w';
106  if (FenceArg == 0)
107  O << "unknown";
108 }
109 
110 void RISCVInstPrinter::printFRMArg(const MCInst *MI, unsigned OpNo,
111  const MCSubtargetInfo &STI, raw_ostream &O) {
112  auto FRMArg =
113  static_cast<RISCVFPRndMode::RoundingMode>(MI->getOperand(OpNo).getImm());
115 }
bool isImm() const
Definition: MCInst.h:59
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
bool isReg() const
Definition: MCInst.h:58
const FeatureBitset & getFeatureBits() const
void printCSRSystemRegister(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O)
unsigned getReg() const
Returns the register number.
Definition: MCInst.h:65
const MCExpr * getExpr() const
Definition: MCInst.h:96
void printFRMArg(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O)
void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot, const MCSubtargetInfo &STI) override
Print the specified MCInst to the specified raw_ostream.
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:161
int64_t getImm() const
Definition: MCInst.h:76
initializer< Ty > init(const Ty &Val)
Definition: CommandLine.h:410
void print(raw_ostream &OS, const MCAsmInfo *MAI, bool InParens=false) const
Definition: MCExpr.cpp:42
bool isExpr() const
Definition: MCInst.h:61
static const char * getRegisterName(unsigned RegNo, unsigned AltIdx=RISCV::ABIRegAltName)
void printFenceArg(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O)
const MCOperand & getOperand(unsigned i) const
Definition: MCInst.h:182
static cl::opt< bool > NoAliases("riscv-no-aliases", cl::desc("Disable the emission of assembler pseudo instructions"), cl::init(false), cl::Hidden)
bool printAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI, raw_ostream &O)
void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O, const char *Modifier=nullptr)
const MCAsmInfo & MAI
Definition: MCInstPrinter.h:46
void printInstruction(const MCInst *MI, const MCSubtargetInfo &STI, raw_ostream &O)
Generic base class for all target subtargets.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
static StringRef roundingModeToString(RoundingMode RndMode)
Definition: RISCVBaseInfo.h:79
void printAnnotation(raw_ostream &OS, StringRef Annot)
Utility function for printing annotations.
const SysReg * lookupSysRegByEncoding(uint16_t)
This class implements an extremely fast bulk output stream that can only output to a stream...
Definition: raw_ostream.h:46
IRTranslator LLVM IR MI
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:49
void printRegName(raw_ostream &O, unsigned RegNo) const override
Print the assembler register name.
Instances of this class represent operands of the MCInst class.
Definition: MCInst.h:35
const MCRegisterInfo & MRI
Definition: MCInstPrinter.h:48