LLVM  9.0.0svn
RegAllocBase.h
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1 //===- RegAllocBase.h - basic regalloc interface and driver -----*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file defines the RegAllocBase class, which is the skeleton of a basic
10 // register allocation algorithm and interface for extending it. It provides the
11 // building blocks on which to construct other experimental allocators and test
12 // the validity of two principles:
13 //
14 // - If virtual and physical register liveness is modeled using intervals, then
15 // on-the-fly interference checking is cheap. Furthermore, interferences can be
16 // lazily cached and reused.
17 //
18 // - Register allocation complexity, and generated code performance is
19 // determined by the effectiveness of live range splitting rather than optimal
20 // coloring.
21 //
22 // Following the first principle, interfering checking revolves around the
23 // LiveIntervalUnion data structure.
24 //
25 // To fulfill the second principle, the basic allocator provides a driver for
26 // incremental splitting. It essentially punts on the problem of register
27 // coloring, instead driving the assignment of virtual to physical registers by
28 // the cost of splitting. The basic allocator allows for heuristic reassignment
29 // of registers, if a more sophisticated allocator chooses to do that.
30 //
31 // This framework provides a way to engineer the compile time vs. code
32 // quality trade-off without relying on a particular theoretical solver.
33 //
34 //===----------------------------------------------------------------------===//
35 
36 #ifndef LLVM_LIB_CODEGEN_REGALLOCBASE_H
37 #define LLVM_LIB_CODEGEN_REGALLOCBASE_H
38 
39 #include "llvm/ADT/SmallPtrSet.h"
41 
42 namespace llvm {
43 
44 class LiveInterval;
45 class LiveIntervals;
46 class LiveRegMatrix;
47 class MachineInstr;
48 class MachineRegisterInfo;
49 template<typename T> class SmallVectorImpl;
50 class Spiller;
51 class TargetRegisterInfo;
52 class VirtRegMap;
53 
54 /// RegAllocBase provides the register allocation driver and interface that can
55 /// be extended to add interesting heuristics.
56 ///
57 /// Register allocators must override the selectOrSplit() method to implement
58 /// live range splitting. They must also override enqueue/dequeue to provide an
59 /// assignment order.
60 class RegAllocBase {
61  virtual void anchor();
62 
63 protected:
64  const TargetRegisterInfo *TRI = nullptr;
66  VirtRegMap *VRM = nullptr;
67  LiveIntervals *LIS = nullptr;
68  LiveRegMatrix *Matrix = nullptr;
70 
71  /// Inst which is a def of an original reg and whose defs are already all
72  /// dead after remat is saved in DeadRemats. The deletion of such inst is
73  /// postponed till all the allocations are done, so its remat expr is
74  /// always available for the remat of all the siblings of the original reg.
76 
77  RegAllocBase() = default;
78  virtual ~RegAllocBase() = default;
79 
80  // A RegAlloc pass should call this before allocatePhysRegs.
81  void init(VirtRegMap &vrm, LiveIntervals &lis, LiveRegMatrix &mat);
82 
83  // The top-level driver. The output is a VirtRegMap that us updated with
84  // physical register assignments.
85  void allocatePhysRegs();
86 
87  // Include spiller post optimization and removing dead defs left because of
88  // rematerialization.
89  virtual void postOptimization();
90 
91  // Get a temporary reference to a Spiller instance.
92  virtual Spiller &spiller() = 0;
93 
94  /// enqueue - Add VirtReg to the priority queue of unassigned registers.
95  virtual void enqueue(LiveInterval *LI) = 0;
96 
97  /// dequeue - Return the next unassigned register, or NULL.
98  virtual LiveInterval *dequeue() = 0;
99 
100  // A RegAlloc pass should override this to provide the allocation heuristics.
101  // Each call must guarantee forward progess by returning an available PhysReg
102  // or new set of split live virtual registers. It is up to the splitter to
103  // converge quickly toward fully spilled live ranges.
104  virtual unsigned selectOrSplit(LiveInterval &VirtReg,
105  SmallVectorImpl<unsigned> &splitLVRs) = 0;
106 
107  // Use this group name for NamedRegionTimer.
108  static const char TimerGroupName[];
109  static const char TimerGroupDescription[];
110 
111  /// Method called when the allocator is about to remove a LiveInterval.
112  virtual void aboutToRemoveInterval(LiveInterval &LI) {}
113 
114 public:
115  /// VerifyEnabled - True when -verify-regalloc is given.
116  static bool VerifyEnabled;
117 
118 private:
119  void seedLiveRegs();
120 };
121 
122 } // end namespace llvm
123 
124 #endif // LLVM_LIB_CODEGEN_REGALLOCBASE_H
static const char TimerGroupDescription[]
Definition: RegAllocBase.h:109
This class represents lattice values for constants.
Definition: AllocatorList.h:23
LiveInterval - This class represents the liveness of a register, or stack slot.
Definition: LiveInterval.h:637
LiveRegMatrix * Matrix
Definition: RegAllocBase.h:68
virtual unsigned selectOrSplit(LiveInterval &VirtReg, SmallVectorImpl< unsigned > &splitLVRs)=0
RegAllocBase()=default
Spiller interface.
Definition: Spiller.h:23
SmallPtrSet< MachineInstr *, 32 > DeadRemats
Inst which is a def of an original reg and whose defs are already all dead after remat is saved in De...
Definition: RegAllocBase.h:75
RegAllocBase provides the register allocation driver and interface that can be extended to add intere...
Definition: RegAllocBase.h:60
VirtRegMap * VRM
Definition: RegAllocBase.h:66
virtual ~RegAllocBase()=default
void init(VirtRegMap &vrm, LiveIntervals &lis, LiveRegMatrix &mat)
static const char TimerGroupName[]
Definition: RegAllocBase.h:108
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
LiveIntervals * LIS
Definition: RegAllocBase.h:67
virtual void enqueue(LiveInterval *LI)=0
enqueue - Add VirtReg to the priority queue of unassigned registers.
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements...
Definition: SmallPtrSet.h:417
virtual void aboutToRemoveInterval(LiveInterval &LI)
Method called when the allocator is about to remove a LiveInterval.
Definition: RegAllocBase.h:112
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
static bool VerifyEnabled
VerifyEnabled - True when -verify-regalloc is given.
Definition: RegAllocBase.h:116
const TargetRegisterInfo * TRI
Definition: RegAllocBase.h:64
virtual void postOptimization()
RegisterClassInfo RegClassInfo
Definition: RegAllocBase.h:69
MachineRegisterInfo * MRI
Definition: RegAllocBase.h:65
virtual Spiller & spiller()=0
virtual LiveInterval * dequeue()=0
dequeue - Return the next unassigned register, or NULL.