LLVM 19.0.0git
RegisterBank.h
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1//==-- llvm/CodeGen/RegisterBank.h - Register Bank ---------------*- C++ -*-==//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9/// \file This file declares the API of register banks.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_CODEGEN_REGISTERBANK_H
14#define LLVM_CODEGEN_REGISTERBANK_H
15
16#include <cstdint>
17
18namespace llvm {
19// Forward declarations.
20class RegisterBankInfo;
21class raw_ostream;
22class TargetRegisterClass;
23class TargetRegisterInfo;
24
25/// This class implements the register bank concept.
26/// Two instances of RegisterBank must have different ID.
27/// This property is enforced by the RegisterBankInfo class.
29private:
30 unsigned ID;
31 unsigned NumRegClasses;
32 const char *Name;
33 const uint32_t *CoveredClasses;
34
35 /// Only the RegisterBankInfo can initialize RegisterBank properly.
36 friend RegisterBankInfo;
37
38public:
39 constexpr RegisterBank(unsigned ID, const char *Name,
40 const uint32_t *CoveredClasses, unsigned NumRegClasses)
41 : ID(ID), NumRegClasses(NumRegClasses), Name(Name),
42 CoveredClasses(CoveredClasses) {}
43
44 /// Get the identifier of this register bank.
45 unsigned getID() const { return ID; }
46
47 /// Get a user friendly name of this register bank.
48 /// Should be used only for debugging purposes.
49 const char *getName() const { return Name; }
50
51 /// Check if this register bank is valid. In other words,
52 /// if it has been properly constructed.
53 ///
54 /// \note This method does not check anything when assertions are disabled.
55 ///
56 /// \return True is the check was successful.
57 bool verify(const RegisterBankInfo &RBI, const TargetRegisterInfo &TRI) const;
58
59 /// Check whether this register bank covers \p RC.
60 /// In other words, check if this register bank fully covers
61 /// the registers that \p RC contains.
62 bool covers(const TargetRegisterClass &RC) const;
63
64 /// Check whether \p OtherRB is the same as this.
65 bool operator==(const RegisterBank &OtherRB) const;
66 bool operator!=(const RegisterBank &OtherRB) const {
67 return !this->operator==(OtherRB);
68 }
69
70 /// Dump the register mask on dbgs() stream.
71 /// The dump is verbose.
72 void dump(const TargetRegisterInfo *TRI = nullptr) const;
73
74 /// Print the register mask on OS.
75 /// If IsForDebug is false, then only the name of the register bank
76 /// is printed. Otherwise, all the fields are printing.
77 /// TRI is then used to print the name of the register classes that
78 /// this register bank covers.
79 void print(raw_ostream &OS, bool IsForDebug = false,
80 const TargetRegisterInfo *TRI = nullptr) const;
81};
82
84 RegBank.print(OS);
85 return OS;
86}
87} // End namespace llvm.
88
89#endif
unsigned const TargetRegisterInfo * TRI
ppc ctr loops verify
raw_pwrite_stream & OS
Holds all the information related to register banks.
This class implements the register bank concept.
Definition: RegisterBank.h:28
constexpr RegisterBank(unsigned ID, const char *Name, const uint32_t *CoveredClasses, unsigned NumRegClasses)
Definition: RegisterBank.h:39
void print(raw_ostream &OS, bool IsForDebug=false, const TargetRegisterInfo *TRI=nullptr) const
Print the register mask on OS.
void dump(const TargetRegisterInfo *TRI=nullptr) const
Dump the register mask on dbgs() stream.
bool covers(const TargetRegisterClass &RC) const
Check whether this register bank covers RC.
const char * getName() const
Get a user friendly name of this register bank.
Definition: RegisterBank.h:49
unsigned getID() const
Get the identifier of this register bank.
Definition: RegisterBank.h:45
bool operator!=(const RegisterBank &OtherRB) const
Definition: RegisterBank.h:66
bool operator==(const RegisterBank &OtherRB) const
Check whether OtherRB is the same as this.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:52
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
raw_ostream & operator<<(raw_ostream &OS, const APFixedPoint &FX)
Definition: APFixedPoint.h:293