LLVM 19.0.0git
Macros | Variables
RegisterClassInfo.cpp File Reference
#include "llvm/CodeGen/RegisterClassInfo.h"
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/CodeGen/TargetSubtargetInfo.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
#include <algorithm>
#include <cassert>
#include <cstdint>

Go to the source code of this file.

Macros

#define DEBUG_TYPE   "regalloc"
 

Variables

static cl::opt< unsignedStressRA ("stress-regalloc", cl::Hidden, cl::init(0), cl::value_desc("N"), cl::desc("Limit all regclasses to N registers"))
 

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE   "regalloc"

Definition at line 34 of file RegisterClassInfo.cpp.

Variable Documentation

◆ StressRA

cl::opt< unsigned > StressRA("stress-regalloc", cl::Hidden, cl::init(0), cl::value_desc("N"), cl::desc("Limit all regclasses to N registers")) ( "stress-regalloc"  ,
cl::Hidden  ,
cl::init(0)  ,
cl::value_desc("N")  ,
cl::desc("Limit all regclasses to N registers")   
)
static