LLVM  6.0.0svn
RegisterUsageInfo.cpp
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1 //===- RegisterUsageInfo.cpp - Register Usage Information Storage ---------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 ///
10 /// This pass is required to take advantage of the interprocedural register
11 /// allocation infrastructure.
12 ///
13 //===----------------------------------------------------------------------===//
14 
16 #include "llvm/ADT/SmallVector.h"
20 #include "llvm/IR/Function.h"
21 #include "llvm/IR/Module.h"
22 #include "llvm/Pass.h"
26 #include <algorithm>
27 #include <cassert>
28 #include <cstdint>
29 #include <utility>
30 #include <vector>
31 
32 using namespace llvm;
33 
34 #define DEBUG_TYPE "ip-regalloc"
35 
37  "print-regusage", cl::init(false), cl::Hidden,
38  cl::desc("print register usage details collected for analysis."));
39 
41  "Register Usage Information Storage", false, true)
42 
44 
45 void PhysicalRegisterUsageInfo::anchor() {}
46 
48  RegMasks.grow(M.size());
49  return false;
50 }
51 
53  if (DumpRegUsage)
54  print(errs());
55 
56  RegMasks.shrink_and_clear();
57  return false;
58 }
59 
61  const Function *FP, std::vector<uint32_t> RegMask) {
62  assert(FP != nullptr && "Function * can't be nullptr.");
63  RegMasks[FP] = std::move(RegMask);
64 }
65 
66 const std::vector<uint32_t> *
68  auto It = RegMasks.find(FP);
69  if (It != RegMasks.end())
70  return &(It->second);
71  return nullptr;
72 }
73 
75  const TargetRegisterInfo *TRI;
76 
77  using FuncPtrRegMaskPair = std::pair<const Function *, std::vector<uint32_t>>;
78 
80 
81  // Create a vector of pointer to RegMasks entries
82  for (const auto &RegMask : RegMasks)
83  FPRMPairVector.push_back(&RegMask);
84 
85  // sort the vector to print analysis in alphabatic order of function name.
86  std::sort(
87  FPRMPairVector.begin(), FPRMPairVector.end(),
88  [](const FuncPtrRegMaskPair *A, const FuncPtrRegMaskPair *B) -> bool {
89  return A->first->getName() < B->first->getName();
90  });
91 
92  for (const FuncPtrRegMaskPair *FPRMPair : FPRMPairVector) {
93  OS << FPRMPair->first->getName() << " "
94  << "Clobbered Registers: ";
95  TRI = TM->getSubtarget<TargetSubtargetInfo>(*(FPRMPair->first))
96  .getRegisterInfo();
97 
98  for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) {
99  if (MachineOperand::clobbersPhysReg(&(FPRMPair->second[0]), PReg))
100  OS << TRI->getName(PReg) << " ";
101  }
102  OS << "\n";
103  }
104 }
raw_ostream & errs()
This returns a reference to a raw_ostream for standard error.
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
A Module instance is used to store all the information related to an LLVM module. ...
Definition: Module.h:63
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
void storeUpdateRegUsageInfo(const Function *FP, std::vector< uint32_t > RegMask)
To store RegMask for given Function *.
void print(raw_ostream &OS, const Module *M=nullptr) const override
print - Print out the internal state of the pass.
bool doInitialization(Module &M) override
doInitialization - Virtual method overridden by subclasses to do any necessary initialization before ...
bool doFinalization(Module &M) override
doFinalization - Virtual method overriden by subclasses to do any necessary clean up after all passes...
static cl::opt< bool > DumpRegUsage("print-regusage", cl::init(false), cl::Hidden, cl::desc("print register usage details collected for analysis."))
const char * getName(unsigned RegNo) const
Return the human-readable symbolic target-specific name for the specified physical register...
unsigned getNumRegs() const
Return the number of registers this target has (useful for sizing arrays holding per register informa...
initializer< Ty > init(const Ty &Val)
Definition: CommandLine.h:406
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
LLVM_ATTRIBUTE_ALWAYS_INLINE iterator begin()
Definition: SmallVector.h:116
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
Definition: PassSupport.h:34
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:864
Module.h This file contains the declarations for the Module class.
static bool clobbersPhysReg(const uint32_t *RegMask, unsigned PhysReg)
clobbersPhysReg - Returns true if this RegMask clobbers PhysReg.
TargetSubtargetInfo - Generic base class for all target subtargets.
LLVM_ATTRIBUTE_ALWAYS_INLINE iterator end()
Definition: SmallVector.h:120
size_t size() const
Definition: Module.h:580
const std::vector< uint32_t > * getRegUsageInfo(const Function *FP)
To query stored RegMask for given Function *, it will return nullptr if function is not known...
This pass is required to take advantage of the interprocedural register allocation infrastructure...
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This class implements an extremely fast bulk output stream that can only output to a stream...
Definition: raw_ostream.h:44
void sort(Policy policy, RandomAccessIterator Start, RandomAccessIterator End, const Comparator &Comp=Comparator())
Definition: Parallel.h:199
const STC & getSubtarget(const Function &F) const
This method returns a pointer to the specified type of TargetSubtargetInfo.