LLVM  6.0.0svn
Macros | Functions
SIMachineScheduler.cpp File Reference

SI Machine Scheduler interface. More...

#include "SIMachineScheduler.h"
#include "AMDGPU.h"
#include "SIInstrInfo.h"
#include "SIRegisterInfo.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/LiveInterval.h"
#include "llvm/CodeGen/LiveIntervalAnalysis.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/MachineScheduler.h"
#include "llvm/CodeGen/RegisterPressure.h"
#include "llvm/CodeGen/SlotIndexes.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include <algorithm>
#include <cassert>
#include <map>
#include <set>
#include <utility>
#include <vector>
Include dependency graph for SIMachineScheduler.cpp:

Go to the source code of this file.

Macros

#define DEBUG_TYPE   "machine-scheduler"
 

Functions

static const chargetReasonStr (SIScheduleCandReason Reason)
 
static bool tryLess (int TryVal, int CandVal, SISchedulerCandidate &TryCand, SISchedulerCandidate &Cand, SIScheduleCandReason Reason)
 
static bool tryGreater (int TryVal, int CandVal, SISchedulerCandidate &TryCand, SISchedulerCandidate &Cand, SIScheduleCandReason Reason)
 
static bool isDefBetween (unsigned Reg, SlotIndex First, SlotIndex Last, const MachineRegisterInfo *MRI, const LiveIntervals *LIS)
 
static bool hasDataDependencyPred (const SUnit &SU, const SUnit &FromSU)
 
static MachineBasicBlock::iterator nextIfDebug (MachineBasicBlock::iterator I, MachineBasicBlock::const_iterator End)
 Non-const version. More...
 

Detailed Description

SI Machine Scheduler interface.

Definition in file SIMachineScheduler.cpp.

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE   "machine-scheduler"

Definition at line 41 of file SIMachineScheduler.cpp.

Function Documentation

◆ getReasonStr()

static const char* getReasonStr ( SIScheduleCandReason  Reason)
static

◆ hasDataDependencyPred()

static bool hasDataDependencyPred ( const SUnit SU,
const SUnit FromSU 
)
static

◆ isDefBetween()

static bool isDefBetween ( unsigned  Reg,
SlotIndex  First,
SlotIndex  Last,
const MachineRegisterInfo MRI,
const LiveIntervals LIS 
)
static

◆ nextIfDebug()

◆ tryGreater()

static bool tryGreater ( int  TryVal,
int  CandVal,
SISchedulerCandidate TryCand,
SISchedulerCandidate Cand,
SIScheduleCandReason  Reason 
)
static

◆ tryLess()

static bool tryLess ( int  TryVal,
int  CandVal,
SISchedulerCandidate TryCand,
SISchedulerCandidate Cand,
SIScheduleCandReason  Reason 
)
static