LLVM  6.0.0svn
SelectionDAGDumper.cpp
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1 //===- SelectionDAGDumper.cpp - Implement SelectionDAG::dump() ------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This implements the SelectionDAG::dump method and friends.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "llvm/ADT/APFloat.h"
15 #include "llvm/ADT/APInt.h"
16 #include "llvm/ADT/None.h"
17 #include "llvm/ADT/SmallPtrSet.h"
18 #include "llvm/ADT/StringExtras.h"
31 #include "llvm/IR/BasicBlock.h"
32 #include "llvm/IR/Constants.h"
34 #include "llvm/IR/DebugLoc.h"
35 #include "llvm/IR/Function.h"
36 #include "llvm/IR/Intrinsics.h"
37 #include "llvm/IR/Value.h"
38 #include "llvm/Support/Casting.h"
40 #include "llvm/Support/Compiler.h"
41 #include "llvm/Support/Debug.h"
43 #include "llvm/Support/Printable.h"
47 #include <cstdint>
48 #include <iterator>
49 
50 using namespace llvm;
51 
52 static cl::opt<bool>
53 VerboseDAGDumping("dag-dump-verbose", cl::Hidden,
54  cl::desc("Display more information when dumping selection "
55  "DAG nodes."));
56 
57 std::string SDNode::getOperationName(const SelectionDAG *G) const {
58  switch (getOpcode()) {
59  default:
61  return "<<Unknown DAG Node>>";
62  if (isMachineOpcode()) {
63  if (G)
64  if (const TargetInstrInfo *TII = G->getSubtarget().getInstrInfo())
65  if (getMachineOpcode() < TII->getNumOpcodes())
66  return TII->getName(getMachineOpcode());
67  return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
68  }
69  if (G) {
70  const TargetLowering &TLI = G->getTargetLoweringInfo();
71  const char *Name = TLI.getTargetNodeName(getOpcode());
72  if (Name) return Name;
73  return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
74  }
75  return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
76 
77 #ifndef NDEBUG
78  case ISD::DELETED_NODE: return "<<Deleted Node!>>";
79 #endif
80  case ISD::PREFETCH: return "Prefetch";
81  case ISD::ATOMIC_FENCE: return "AtomicFence";
82  case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
83  case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS: return "AtomicCmpSwapWithSuccess";
84  case ISD::ATOMIC_SWAP: return "AtomicSwap";
85  case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
86  case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
87  case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
88  case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
89  case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
90  case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
91  case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
92  case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
93  case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
94  case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
95  case ISD::ATOMIC_LOAD: return "AtomicLoad";
96  case ISD::ATOMIC_STORE: return "AtomicStore";
97  case ISD::PCMARKER: return "PCMarker";
98  case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
99  case ISD::SRCVALUE: return "SrcValue";
100  case ISD::MDNODE_SDNODE: return "MDNode";
101  case ISD::EntryToken: return "EntryToken";
102  case ISD::TokenFactor: return "TokenFactor";
103  case ISD::AssertSext: return "AssertSext";
104  case ISD::AssertZext: return "AssertZext";
105 
106  case ISD::BasicBlock: return "BasicBlock";
107  case ISD::VALUETYPE: return "ValueType";
108  case ISD::Register: return "Register";
109  case ISD::RegisterMask: return "RegisterMask";
110  case ISD::Constant:
111  if (cast<ConstantSDNode>(this)->isOpaque())
112  return "OpaqueConstant";
113  return "Constant";
114  case ISD::ConstantFP: return "ConstantFP";
115  case ISD::GlobalAddress: return "GlobalAddress";
116  case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
117  case ISD::FrameIndex: return "FrameIndex";
118  case ISD::JumpTable: return "JumpTable";
119  case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
120  case ISD::RETURNADDR: return "RETURNADDR";
121  case ISD::ADDROFRETURNADDR: return "ADDROFRETURNADDR";
122  case ISD::FRAMEADDR: return "FRAMEADDR";
123  case ISD::LOCAL_RECOVER: return "LOCAL_RECOVER";
124  case ISD::READ_REGISTER: return "READ_REGISTER";
125  case ISD::WRITE_REGISTER: return "WRITE_REGISTER";
126  case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
127  case ISD::EH_DWARF_CFA: return "EH_DWARF_CFA";
128  case ISD::EH_RETURN: return "EH_RETURN";
129  case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP";
130  case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP";
131  case ISD::EH_SJLJ_SETUP_DISPATCH: return "EH_SJLJ_SETUP_DISPATCH";
132  case ISD::ConstantPool: return "ConstantPool";
133  case ISD::TargetIndex: return "TargetIndex";
134  case ISD::ExternalSymbol: return "ExternalSymbol";
135  case ISD::BlockAddress: return "BlockAddress";
137  case ISD::INTRINSIC_VOID:
138  case ISD::INTRINSIC_W_CHAIN: {
139  unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
140  unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue();
141  if (IID < Intrinsic::num_intrinsics)
142  return Intrinsic::getName((Intrinsic::ID)IID, None);
143  else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo())
144  return TII->getName(IID);
145  llvm_unreachable("Invalid intrinsic ID");
146  }
147 
148  case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
149  case ISD::TargetConstant:
150  if (cast<ConstantSDNode>(this)->isOpaque())
151  return "OpaqueTargetConstant";
152  return "TargetConstant";
153  case ISD::TargetConstantFP: return "TargetConstantFP";
154  case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
155  case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
156  case ISD::TargetFrameIndex: return "TargetFrameIndex";
157  case ISD::TargetJumpTable: return "TargetJumpTable";
158  case ISD::TargetConstantPool: return "TargetConstantPool";
159  case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
160  case ISD::MCSymbol: return "MCSymbol";
161  case ISD::TargetBlockAddress: return "TargetBlockAddress";
162 
163  case ISD::CopyToReg: return "CopyToReg";
164  case ISD::CopyFromReg: return "CopyFromReg";
165  case ISD::UNDEF: return "undef";
166  case ISD::MERGE_VALUES: return "merge_values";
167  case ISD::INLINEASM: return "inlineasm";
168  case ISD::EH_LABEL: return "eh_label";
169  case ISD::HANDLENODE: return "handlenode";
170 
171  // Unary operators
172  case ISD::FABS: return "fabs";
173  case ISD::FMINNUM: return "fminnum";
174  case ISD::FMAXNUM: return "fmaxnum";
175  case ISD::FMINNAN: return "fminnan";
176  case ISD::FMAXNAN: return "fmaxnan";
177  case ISD::FNEG: return "fneg";
178  case ISD::FSQRT: return "fsqrt";
179  case ISD::FSIN: return "fsin";
180  case ISD::FCOS: return "fcos";
181  case ISD::FSINCOS: return "fsincos";
182  case ISD::FTRUNC: return "ftrunc";
183  case ISD::FFLOOR: return "ffloor";
184  case ISD::FCEIL: return "fceil";
185  case ISD::FRINT: return "frint";
186  case ISD::FNEARBYINT: return "fnearbyint";
187  case ISD::FROUND: return "fround";
188  case ISD::FEXP: return "fexp";
189  case ISD::FEXP2: return "fexp2";
190  case ISD::FLOG: return "flog";
191  case ISD::FLOG2: return "flog2";
192  case ISD::FLOG10: return "flog10";
193 
194  // Binary operators
195  case ISD::ADD: return "add";
196  case ISD::SUB: return "sub";
197  case ISD::MUL: return "mul";
198  case ISD::MULHU: return "mulhu";
199  case ISD::MULHS: return "mulhs";
200  case ISD::SDIV: return "sdiv";
201  case ISD::UDIV: return "udiv";
202  case ISD::SREM: return "srem";
203  case ISD::UREM: return "urem";
204  case ISD::SMUL_LOHI: return "smul_lohi";
205  case ISD::UMUL_LOHI: return "umul_lohi";
206  case ISD::SDIVREM: return "sdivrem";
207  case ISD::UDIVREM: return "udivrem";
208  case ISD::AND: return "and";
209  case ISD::OR: return "or";
210  case ISD::XOR: return "xor";
211  case ISD::SHL: return "shl";
212  case ISD::SRA: return "sra";
213  case ISD::SRL: return "srl";
214  case ISD::ROTL: return "rotl";
215  case ISD::ROTR: return "rotr";
216  case ISD::FADD: return "fadd";
217  case ISD::FSUB: return "fsub";
218  case ISD::FMUL: return "fmul";
219  case ISD::FDIV: return "fdiv";
220  case ISD::FMA: return "fma";
221  case ISD::FMAD: return "fmad";
222  case ISD::FREM: return "frem";
223  case ISD::FCOPYSIGN: return "fcopysign";
224  case ISD::FGETSIGN: return "fgetsign";
225  case ISD::FCANONICALIZE: return "fcanonicalize";
226  case ISD::FPOW: return "fpow";
227  case ISD::SMIN: return "smin";
228  case ISD::SMAX: return "smax";
229  case ISD::UMIN: return "umin";
230  case ISD::UMAX: return "umax";
231 
232  case ISD::FPOWI: return "fpowi";
233  case ISD::SETCC: return "setcc";
234  case ISD::SETCCE: return "setcce";
235  case ISD::SETCCCARRY: return "setcccarry";
236  case ISD::SELECT: return "select";
237  case ISD::VSELECT: return "vselect";
238  case ISD::SELECT_CC: return "select_cc";
239  case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
240  case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
241  case ISD::CONCAT_VECTORS: return "concat_vectors";
242  case ISD::INSERT_SUBVECTOR: return "insert_subvector";
243  case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
244  case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
245  case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
246  case ISD::CARRY_FALSE: return "carry_false";
247  case ISD::ADDC: return "addc";
248  case ISD::ADDE: return "adde";
249  case ISD::ADDCARRY: return "addcarry";
250  case ISD::SADDO: return "saddo";
251  case ISD::UADDO: return "uaddo";
252  case ISD::SSUBO: return "ssubo";
253  case ISD::USUBO: return "usubo";
254  case ISD::SMULO: return "smulo";
255  case ISD::UMULO: return "umulo";
256  case ISD::SUBC: return "subc";
257  case ISD::SUBE: return "sube";
258  case ISD::SUBCARRY: return "subcarry";
259  case ISD::SHL_PARTS: return "shl_parts";
260  case ISD::SRA_PARTS: return "sra_parts";
261  case ISD::SRL_PARTS: return "srl_parts";
262 
263  // Conversion operators.
264  case ISD::SIGN_EXTEND: return "sign_extend";
265  case ISD::ZERO_EXTEND: return "zero_extend";
266  case ISD::ANY_EXTEND: return "any_extend";
267  case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
268  case ISD::ANY_EXTEND_VECTOR_INREG: return "any_extend_vector_inreg";
269  case ISD::SIGN_EXTEND_VECTOR_INREG: return "sign_extend_vector_inreg";
270  case ISD::ZERO_EXTEND_VECTOR_INREG: return "zero_extend_vector_inreg";
271  case ISD::TRUNCATE: return "truncate";
272  case ISD::FP_ROUND: return "fp_round";
273  case ISD::FLT_ROUNDS_: return "flt_rounds";
274  case ISD::FP_ROUND_INREG: return "fp_round_inreg";
275  case ISD::FP_EXTEND: return "fp_extend";
276 
277  case ISD::SINT_TO_FP: return "sint_to_fp";
278  case ISD::UINT_TO_FP: return "uint_to_fp";
279  case ISD::FP_TO_SINT: return "fp_to_sint";
280  case ISD::FP_TO_UINT: return "fp_to_uint";
281  case ISD::BITCAST: return "bitcast";
282  case ISD::ADDRSPACECAST: return "addrspacecast";
283  case ISD::FP16_TO_FP: return "fp16_to_fp";
284  case ISD::FP_TO_FP16: return "fp_to_fp16";
285 
286  // Control flow instructions
287  case ISD::BR: return "br";
288  case ISD::BRIND: return "brind";
289  case ISD::BR_JT: return "br_jt";
290  case ISD::BRCOND: return "brcond";
291  case ISD::BR_CC: return "br_cc";
292  case ISD::CALLSEQ_START: return "callseq_start";
293  case ISD::CALLSEQ_END: return "callseq_end";
294 
295  // EH instructions
296  case ISD::CATCHRET: return "catchret";
297  case ISD::CLEANUPRET: return "cleanupret";
298 
299  // Other operators
300  case ISD::LOAD: return "load";
301  case ISD::STORE: return "store";
302  case ISD::MLOAD: return "masked_load";
303  case ISD::MSTORE: return "masked_store";
304  case ISD::MGATHER: return "masked_gather";
305  case ISD::MSCATTER: return "masked_scatter";
306  case ISD::VAARG: return "vaarg";
307  case ISD::VACOPY: return "vacopy";
308  case ISD::VAEND: return "vaend";
309  case ISD::VASTART: return "vastart";
310  case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
311  case ISD::EXTRACT_ELEMENT: return "extract_element";
312  case ISD::BUILD_PAIR: return "build_pair";
313  case ISD::STACKSAVE: return "stacksave";
314  case ISD::STACKRESTORE: return "stackrestore";
315  case ISD::TRAP: return "trap";
316  case ISD::DEBUGTRAP: return "debugtrap";
317  case ISD::LIFETIME_START: return "lifetime.start";
318  case ISD::LIFETIME_END: return "lifetime.end";
319  case ISD::GC_TRANSITION_START: return "gc_transition.start";
320  case ISD::GC_TRANSITION_END: return "gc_transition.end";
321  case ISD::GET_DYNAMIC_AREA_OFFSET: return "get.dynamic.area.offset";
322 
323  // Bit manipulation
324  case ISD::ABS: return "abs";
325  case ISD::BITREVERSE: return "bitreverse";
326  case ISD::BSWAP: return "bswap";
327  case ISD::CTPOP: return "ctpop";
328  case ISD::CTTZ: return "cttz";
329  case ISD::CTTZ_ZERO_UNDEF: return "cttz_zero_undef";
330  case ISD::CTLZ: return "ctlz";
331  case ISD::CTLZ_ZERO_UNDEF: return "ctlz_zero_undef";
332 
333  // Trampolines
334  case ISD::INIT_TRAMPOLINE: return "init_trampoline";
335  case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline";
336 
337  case ISD::CONDCODE:
338  switch (cast<CondCodeSDNode>(this)->get()) {
339  default: llvm_unreachable("Unknown setcc condition!");
340  case ISD::SETOEQ: return "setoeq";
341  case ISD::SETOGT: return "setogt";
342  case ISD::SETOGE: return "setoge";
343  case ISD::SETOLT: return "setolt";
344  case ISD::SETOLE: return "setole";
345  case ISD::SETONE: return "setone";
346 
347  case ISD::SETO: return "seto";
348  case ISD::SETUO: return "setuo";
349  case ISD::SETUEQ: return "setueq";
350  case ISD::SETUGT: return "setugt";
351  case ISD::SETUGE: return "setuge";
352  case ISD::SETULT: return "setult";
353  case ISD::SETULE: return "setule";
354  case ISD::SETUNE: return "setune";
355 
356  case ISD::SETEQ: return "seteq";
357  case ISD::SETGT: return "setgt";
358  case ISD::SETGE: return "setge";
359  case ISD::SETLT: return "setlt";
360  case ISD::SETLE: return "setle";
361  case ISD::SETNE: return "setne";
362 
363  case ISD::SETTRUE: return "settrue";
364  case ISD::SETTRUE2: return "settrue2";
365  case ISD::SETFALSE: return "setfalse";
366  case ISD::SETFALSE2: return "setfalse2";
367  }
368  case ISD::VECREDUCE_FADD: return "vecreduce_fadd";
369  case ISD::VECREDUCE_FMUL: return "vecreduce_fmul";
370  case ISD::VECREDUCE_ADD: return "vecreduce_add";
371  case ISD::VECREDUCE_MUL: return "vecreduce_mul";
372  case ISD::VECREDUCE_AND: return "vecreduce_and";
373  case ISD::VECREDUCE_OR: return "vecreduce_or";
374  case ISD::VECREDUCE_XOR: return "vecreduce_xor";
375  case ISD::VECREDUCE_SMAX: return "vecreduce_smax";
376  case ISD::VECREDUCE_SMIN: return "vecreduce_smin";
377  case ISD::VECREDUCE_UMAX: return "vecreduce_umax";
378  case ISD::VECREDUCE_UMIN: return "vecreduce_umin";
379  case ISD::VECREDUCE_FMAX: return "vecreduce_fmax";
380  case ISD::VECREDUCE_FMIN: return "vecreduce_fmin";
381  }
382 }
383 
385  switch (AM) {
386  default: return "";
387  case ISD::PRE_INC: return "<pre-inc>";
388  case ISD::PRE_DEC: return "<pre-dec>";
389  case ISD::POST_INC: return "<post-inc>";
390  case ISD::POST_DEC: return "<post-dec>";
391  }
392 }
393 
395  return Printable([&Node](raw_ostream &OS) {
396 #ifndef NDEBUG
397  OS << 't' << Node.PersistentId;
398 #else
399  OS << (const void*)&Node;
400 #endif
401  });
402 }
403 
404 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
405 LLVM_DUMP_METHOD void SDNode::dump() const { dump(nullptr); }
406 
408  print(dbgs(), G);
409  dbgs() << '\n';
410 }
411 #endif
412 
414  for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
415  if (i) OS << ",";
416  if (getValueType(i) == MVT::Other)
417  OS << "ch";
418  else
419  OS << getValueType(i).getEVTString();
420  }
421 }
422 
424  if (getFlags().hasNoUnsignedWrap())
425  OS << " nuw";
426 
427  if (getFlags().hasNoSignedWrap())
428  OS << " nsw";
429 
430  if (getFlags().hasExact())
431  OS << " exact";
432 
433  if (getFlags().hasUnsafeAlgebra())
434  OS << " unsafe";
435 
436  if (getFlags().hasNoNaNs())
437  OS << " nnan";
438 
439  if (getFlags().hasNoInfs())
440  OS << " ninf";
441 
442  if (getFlags().hasNoSignedZeros())
443  OS << " nsz";
444 
445  if (getFlags().hasAllowReciprocal())
446  OS << " arcp";
447 
448  if (getFlags().hasAllowContract())
449  OS << " contract";
450 
451  if (getFlags().hasVectorReduction())
452  OS << " vector-reduction";
453 
454  if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
455  if (!MN->memoperands_empty()) {
456  OS << "<";
457  OS << "Mem:";
458  for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
459  e = MN->memoperands_end(); i != e; ++i) {
460  OS << **i;
461  if (std::next(i) != e)
462  OS << " ";
463  }
464  OS << ">";
465  }
466  } else if (const ShuffleVectorSDNode *SVN =
467  dyn_cast<ShuffleVectorSDNode>(this)) {
468  OS << "<";
469  for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
470  int Idx = SVN->getMaskElt(i);
471  if (i) OS << ",";
472  if (Idx < 0)
473  OS << "u";
474  else
475  OS << Idx;
476  }
477  OS << ">";
478  } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
479  OS << '<' << CSDN->getAPIntValue() << '>';
480  } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
481  if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEsingle())
482  OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
483  else if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEdouble())
484  OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
485  else {
486  OS << "<APFloat(";
487  CSDN->getValueAPF().bitcastToAPInt().print(OS, false);
488  OS << ")>";
489  }
490  } else if (const GlobalAddressSDNode *GADN =
491  dyn_cast<GlobalAddressSDNode>(this)) {
492  int64_t offset = GADN->getOffset();
493  OS << '<';
494  GADN->getGlobal()->printAsOperand(OS);
495  OS << '>';
496  if (offset > 0)
497  OS << " + " << offset;
498  else
499  OS << " " << offset;
500  if (unsigned int TF = GADN->getTargetFlags())
501  OS << " [TF=" << TF << ']';
502  } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
503  OS << "<" << FIDN->getIndex() << ">";
504  } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
505  OS << "<" << JTDN->getIndex() << ">";
506  if (unsigned int TF = JTDN->getTargetFlags())
507  OS << " [TF=" << TF << ']';
508  } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
509  int offset = CP->getOffset();
510  if (CP->isMachineConstantPoolEntry())
511  OS << "<" << *CP->getMachineCPVal() << ">";
512  else
513  OS << "<" << *CP->getConstVal() << ">";
514  if (offset > 0)
515  OS << " + " << offset;
516  else
517  OS << " " << offset;
518  if (unsigned int TF = CP->getTargetFlags())
519  OS << " [TF=" << TF << ']';
520  } else if (const TargetIndexSDNode *TI = dyn_cast<TargetIndexSDNode>(this)) {
521  OS << "<" << TI->getIndex() << '+' << TI->getOffset() << ">";
522  if (unsigned TF = TI->getTargetFlags())
523  OS << " [TF=" << TF << ']';
524  } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
525  OS << "<";
526  const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
527  if (LBB)
528  OS << LBB->getName() << " ";
529  OS << (const void*)BBDN->getBasicBlock() << ">";
530  } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
531  OS << ' ' << PrintReg(R->getReg(),
532  G ? G->getSubtarget().getRegisterInfo() : nullptr);
533  } else if (const ExternalSymbolSDNode *ES =
534  dyn_cast<ExternalSymbolSDNode>(this)) {
535  OS << "'" << ES->getSymbol() << "'";
536  if (unsigned int TF = ES->getTargetFlags())
537  OS << " [TF=" << TF << ']';
538  } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
539  if (M->getValue())
540  OS << "<" << M->getValue() << ">";
541  else
542  OS << "<null>";
543  } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) {
544  if (MD->getMD())
545  OS << "<" << MD->getMD() << ">";
546  else
547  OS << "<null>";
548  } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
549  OS << ":" << N->getVT().getEVTString();
550  }
551  else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
552  OS << "<" << *LD->getMemOperand();
553 
554  bool doExt = true;
555  switch (LD->getExtensionType()) {
556  default: doExt = false; break;
557  case ISD::EXTLOAD: OS << ", anyext"; break;
558  case ISD::SEXTLOAD: OS << ", sext"; break;
559  case ISD::ZEXTLOAD: OS << ", zext"; break;
560  }
561  if (doExt)
562  OS << " from " << LD->getMemoryVT().getEVTString();
563 
564  const char *AM = getIndexedModeName(LD->getAddressingMode());
565  if (*AM)
566  OS << ", " << AM;
567 
568  OS << ">";
569  } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
570  OS << "<" << *ST->getMemOperand();
571 
572  if (ST->isTruncatingStore())
573  OS << ", trunc to " << ST->getMemoryVT().getEVTString();
574 
575  const char *AM = getIndexedModeName(ST->getAddressingMode());
576  if (*AM)
577  OS << ", " << AM;
578 
579  OS << ">";
580  } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) {
581  OS << "<" << *M->getMemOperand() << ">";
582  } else if (const BlockAddressSDNode *BA =
583  dyn_cast<BlockAddressSDNode>(this)) {
584  int64_t offset = BA->getOffset();
585  OS << "<";
586  BA->getBlockAddress()->getFunction()->printAsOperand(OS, false);
587  OS << ", ";
588  BA->getBlockAddress()->getBasicBlock()->printAsOperand(OS, false);
589  OS << ">";
590  if (offset > 0)
591  OS << " + " << offset;
592  else
593  OS << " " << offset;
594  if (unsigned int TF = BA->getTargetFlags())
595  OS << " [TF=" << TF << ']';
596  } else if (const AddrSpaceCastSDNode *ASC =
597  dyn_cast<AddrSpaceCastSDNode>(this)) {
598  OS << '['
599  << ASC->getSrcAddressSpace()
600  << " -> "
601  << ASC->getDestAddressSpace()
602  << ']';
603  }
604 
605  if (VerboseDAGDumping) {
606  if (unsigned Order = getIROrder())
607  OS << " [ORD=" << Order << ']';
608 
609  if (getNodeId() != -1)
610  OS << " [ID=" << getNodeId() << ']';
611 
612  if (!G)
613  return;
614 
615  DILocation *L = getDebugLoc();
616  if (!L)
617  return;
618 
619  if (auto *Scope = L->getScope())
620  OS << Scope->getFilename();
621  else
622  OS << "<unknown>";
623  OS << ':' << L->getLine();
624  if (unsigned C = L->getColumn())
625  OS << ':' << C;
626  }
627 }
628 
629 /// Return true if this node is so simple that we should just print it inline
630 /// if it appears as an operand.
631 static bool shouldPrintInline(const SDNode &Node) {
632  if (Node.getOpcode() == ISD::EntryToken)
633  return false;
634  return Node.getNumOperands() == 0;
635 }
636 
637 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
638 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
639  for (const SDValue &Op : N->op_values()) {
640  if (shouldPrintInline(*Op.getNode()))
641  continue;
642  if (Op.getNode()->hasOneUse())
643  DumpNodes(Op.getNode(), indent+2, G);
644  }
645 
646  dbgs().indent(indent);
647  N->dump(G);
648 }
649 
650 LLVM_DUMP_METHOD void SelectionDAG::dump() const {
651  dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:\n";
652 
653  for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
654  I != E; ++I) {
655  const SDNode *N = &*I;
656  if (!N->hasOneUse() && N != getRoot().getNode() &&
657  (!shouldPrintInline(*N) || N->use_empty()))
658  DumpNodes(N, 2, this);
659  }
660 
661  if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
662  dbgs() << "\n\n";
663 }
664 #endif
665 
666 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
667  OS << PrintNodeId(*this) << ": ";
668  print_types(OS, G);
669  OS << " = " << getOperationName(G);
670  print_details(OS, G);
671 }
672 
673 static bool printOperand(raw_ostream &OS, const SelectionDAG *G,
674  const SDValue Value) {
675  if (!Value.getNode()) {
676  OS << "<null>";
677  return false;
678  } else if (shouldPrintInline(*Value.getNode())) {
679  OS << Value->getOperationName(G) << ':';
680  Value->print_types(OS, G);
681  Value->print_details(OS, G);
682  return true;
683  } else {
684  OS << PrintNodeId(*Value.getNode());
685  if (unsigned RN = Value.getResNo())
686  OS << ':' << RN;
687  return false;
688  }
689 }
690 
691 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
692 using VisitedSDNodeSet = SmallPtrSet<const SDNode *, 32>;
693 
694 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
695  const SelectionDAG *G, VisitedSDNodeSet &once) {
696  if (!once.insert(N).second) // If we've been here before, return now.
697  return;
698 
699  // Dump the current SDNode, but don't end the line yet.
700  OS.indent(indent);
701  N->printr(OS, G);
702 
703  // Having printed this SDNode, walk the children:
704  for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
705  if (i) OS << ",";
706  OS << " ";
707 
708  const SDValue Op = N->getOperand(i);
709  bool printedInline = printOperand(OS, G, Op);
710  if (printedInline)
711  once.insert(Op.getNode());
712  }
713 
714  OS << "\n";
715 
716  // Dump children that have grandchildren on their own line(s).
717  for (const SDValue &Op : N->op_values())
718  DumpNodesr(OS, Op.getNode(), indent+2, G, once);
719 }
720 
722  VisitedSDNodeSet once;
723  DumpNodesr(dbgs(), this, 0, nullptr, once);
724 }
725 
727  VisitedSDNodeSet once;
728  DumpNodesr(dbgs(), this, 0, G, once);
729 }
730 #endif
731 
732 static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
733  const SelectionDAG *G, unsigned depth,
734  unsigned indent) {
735  if (depth == 0)
736  return;
737 
738  OS.indent(indent);
739 
740  N->print(OS, G);
741 
742  if (depth < 1)
743  return;
744 
745  for (const SDValue &Op : N->op_values()) {
746  // Don't follow chain operands.
747  if (Op.getValueType() == MVT::Other)
748  continue;
749  OS << '\n';
750  printrWithDepthHelper(OS, Op.getNode(), G, depth-1, indent+2);
751  }
752 }
753 
755  unsigned depth) const {
756  printrWithDepthHelper(OS, this, G, depth, 0);
757 }
758 
759 void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
760  // Don't print impossibly deep things.
761  printrWithDepth(OS, G, 10);
762 }
763 
764 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
766 void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
767  printrWithDepth(dbgs(), G, depth);
768 }
769 
771  // Don't print impossibly deep things.
772  dumprWithDepth(G, 10);
773 }
774 #endif
775 
776 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
777  printr(OS, G);
778  for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
779  if (i) OS << ", "; else OS << " ";
780  printOperand(OS, G, getOperand(i));
781  }
782 }
ADJUST_TRAMPOLINE - This corresponds to the adjust_trampoline intrinsic.
Definition: ISDOpcodes.h:731
BITCAST - This operator converts between integer, vector and FP values, as if the value was stored to...
Definition: ISDOpcodes.h:545
X = FP_ROUND(Y, TRUNC) - Rounding &#39;Y&#39; from a larger floating point type down to the precision of the ...
Definition: ISDOpcodes.h:512
BUILTIN_OP_END - This must be the last enum value in this list.
Definition: ISDOpcodes.h:834
FMINNUM/FMAXNUM - Perform floating-point minimum or maximum on two values.
Definition: ISDOpcodes.h:569
std::string getOperationName(const SelectionDAG *G=nullptr) const
Return the opcode of this operation for printing.
EXTRACT_ELEMENT - This is used to get the lower or upper (determined by a Constant, which is required to be operand #1) half of the integer or float value specified as operand #0.
Definition: ISDOpcodes.h:184
unsigned getOpcode() const
Return the SelectionDAG opcode value for this node.
DELETED_NODE - This is an illegal value that is used to catch errors.
Definition: ISDOpcodes.h:42
MDNODE_SDNODE - This is a node that holdes an MDNode*, which is used to reference metadata in the IR...
Definition: ISDOpcodes.h:703
EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR (an vector value) starting with the ...
Definition: ISDOpcodes.h:333
BR_CC - Conditional branch.
Definition: ISDOpcodes.h:617
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
void dumprWithDepth(const SelectionDAG *G=nullptr, unsigned depth=100) const
printrWithDepth to dbgs().
#define LLVM_DUMP_METHOD
Mark debug helper function definitions like dump() that should not be stripped from debug builds...
Definition: Compiler.h:449
Various leaf nodes.
Definition: ISDOpcodes.h:60
VECTOR_SHUFFLE(VEC1, VEC2) - Returns a vector, of the same type as VEC1/VEC2.
Definition: ISDOpcodes.h:342
ZERO_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register zero-extension of the low ...
Definition: ISDOpcodes.h:494
Carry-setting nodes for multiple precision addition and subtraction.
Definition: ISDOpcodes.h:222
EVT getValueType(unsigned ResNo) const
Return the type of a specified result.
STACKRESTORE has two operands, an input chain and a pointer to restore to it returns an output chain...
Definition: ISDOpcodes.h:666
void print_details(raw_ostream &OS, const SelectionDAG *G) const
raw_ostream & indent(unsigned NumSpaces)
indent - Insert &#39;NumSpaces&#39; spaces.
RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition.
Definition: ISDOpcodes.h:250
TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or anything else with this node...
Definition: ISDOpcodes.h:131
Val, Success, OUTCHAIN = ATOMIC_CMP_SWAP_WITH_SUCCESS(INCHAIN, ptr, cmp, swap) N.b.
Definition: ISDOpcodes.h:769
virtual const char * getTargetNodeName(unsigned Opcode) const
This method returns the name of a target specific DAG node.
SIGN_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register sign-extension of the low ...
Definition: ISDOpcodes.h:485
[US]{MIN/MAX} - Binary minimum or maximum or signed or unsigned integers.
Definition: ISDOpcodes.h:359
const SDNodeFlags getFlags() const
SDNode * getNode() const
get the SDNode which holds the desired result
Same for subtraction.
Definition: ISDOpcodes.h:253
INSERT_SUBVECTOR(VECTOR1, VECTOR2, IDX) - Returns a vector with VECTOR2 inserted into VECTOR1 at the ...
Definition: ISDOpcodes.h:328
uint16_t PersistentId
Unique and persistent id per SDNode in the DAG.
The address of the GOT.
Definition: ISDOpcodes.h:66
EntryToken - This is the marker used to indicate the start of a region.
Definition: ISDOpcodes.h:45
OUTCHAIN = ATOMIC_FENCE(INCHAIN, ordering, scope) This corresponds to the fence instruction.
Definition: ISDOpcodes.h:748
Select with condition operator - This selects between a true value and a false value (ops #2 and #3) ...
Definition: ISDOpcodes.h:404
INT = FGETSIGN(FP) - Return the sign bit of the specified floating point value as an integer 0/1 valu...
Definition: ISDOpcodes.h:291
This SDNode is used to implement the code generator support for the llvm IR shufflevector instruction...
void printrWithDepth(raw_ostream &O, const SelectionDAG *G=nullptr, unsigned depth=100) const
Print a SelectionDAG node and children up to depth "depth." The given SelectionDAG allows target-spec...
RESULT,OUTCHAIN = INTRINSIC_W_CHAIN(INCHAIN, INTRINSICID, arg1, ...) This node represents a target in...
Definition: ISDOpcodes.h:159
OUTCHAIN = EH_SJLJ_LONGJMP(INCHAIN, buffer) This corresponds to the eh.sjlj.longjmp intrinsic...
Definition: ISDOpcodes.h:114
SDIVREM/UDIVREM - Divide two integers and produce both a quotient and remainder result.
Definition: ISDOpcodes.h:209
SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded integer shift operations...
Definition: ISDOpcodes.h:433
CLEANUPRET - Represents a return from a cleanup block funclet.
Definition: ISDOpcodes.h:657
static Printable PrintNodeId(const SDNode &Node)
A description of a memory reference used in the backend.
PCMARKER - This corresponds to the pcmarker intrinsic.
Definition: ISDOpcodes.h:706
StringRef getName(ID id)
Return the LLVM name for an intrinsic, such as "llvm.ppc.altivec.lvx".
Definition: Function.cpp:591
This file declares the MachineConstantPool class which is an abstract constant pool to keep track of ...
const HexagonInstrInfo * TII
Shift and rotation operations.
Definition: ISDOpcodes.h:379
ABS - Determine the unsigned absolute value of a signed integer value of the same bitwidth...
Definition: ISDOpcodes.h:368
BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways.
Definition: ISDOpcodes.h:190
CopyToReg - This node has three operands: a chain, a register number to set to this value...
Definition: ISDOpcodes.h:170
FLT_ROUNDS_ - Returns current rounding mode: -1 Undefined 0 Round to 0 1 Round to nearest 2 Round to ...
Definition: ISDOpcodes.h:520
CALLSEQ_START/CALLSEQ_END - These operators mark the beginning and end of a call sequence, and carry arbitrary information that target might want to know.
Definition: ISDOpcodes.h:680
EH_DWARF_CFA - This node represents the pointer to the DWARF Canonical Frame Address (CFA)...
Definition: ISDOpcodes.h:96
Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amt) For double-word atomic operations: ValLo, ValHi, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amtLo, amtHi) ValLo, ValHi, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amtLo, amtHi) These correspond to the atomicrmw instruction.
Definition: ISDOpcodes.h:777
FRAMEADDR, RETURNADDR - These nodes represent llvm.frameaddress and llvm.returnaddress on the DAG...
Definition: ISDOpcodes.h:73
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
This file implements a class to represent arbitrary precision integral constant values and operations...
static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, const SelectionDAG *G, unsigned depth, unsigned indent)
INLINEASM - Represents an inline asm block.
Definition: ISDOpcodes.h:634
STACKSAVE - STACKSAVE has one operand, an input chain.
Definition: ISDOpcodes.h:662
FRAME_TO_ARGS_OFFSET - This node represents offset from frame pointer to first (possible) on-stack ar...
Definition: ISDOpcodes.h:91
void dumprFull(const SelectionDAG *G=nullptr) const
printrFull to dbgs().
[SU]INT_TO_FP - These operators convert integers (whose interpreted sign depends on the first letter)...
Definition: ISDOpcodes.h:455
OUTCHAIN = EH_SJLJ_SETUP_DISPATCH(INCHAIN) The target initializes the dispatch table here...
Definition: ISDOpcodes.h:118
const TargetMachine & getTarget() const
Definition: SelectionDAG.h:389
Select with a vector condition (op #0) and two vector operands (ops #1 and #2), returning a vector re...
Definition: ISDOpcodes.h:398
Simple integer binary arithmetic operators.
Definition: ISDOpcodes.h:200
static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, const SelectionDAG *G, VisitedSDNodeSet &once)
virtual const TargetInstrInfo * getInstrInfo() const
static const fltSemantics & IEEEdouble() LLVM_READNONE
Definition: APFloat.cpp:122
TargetConstant* - Like Constant*, but the DAG does not do any folding, simplification, or lowering of the constant.
Definition: ISDOpcodes.h:125
static const char * getIndexedModeName(ISD::MemIndexedMode AM)
READCYCLECOUNTER - This corresponds to the readcyclecounter intrinsic.
Definition: ISDOpcodes.h:714
ANY_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register any-extension of the low la...
Definition: ISDOpcodes.h:472
RESULT = INTRINSIC_WO_CHAIN(INTRINSICID, arg1, arg2, ...) This node represents a target intrinsic fun...
Definition: ISDOpcodes.h:151
void printrFull(raw_ostream &O, const SelectionDAG *G=nullptr) const
Print a SelectionDAG node and all children down to the leaves.
UNDEF - An undefined node.
Definition: ISDOpcodes.h:178
FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.
Definition: ISDOpcodes.h:498
BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a vector with the specified, possibly variable...
Definition: ISDOpcodes.h:302
TargetInstrInfo - Interface to description of machine instruction set.
This corresponds to the llvm.lifetime.
Definition: ISDOpcodes.h:801
unsigned getNumValues() const
Return the number of values defined/returned by this operator.
OUTCHAIN = INTRINSIC_VOID(INCHAIN, INTRINSICID, arg1, arg2, ...) This node represents a target intrin...
Definition: ISDOpcodes.h:166
These reductions are non-strict, and have a single vector operand.
Definition: ISDOpcodes.h:825
Control flow instructions. These all have token chains.
Definition: ISDOpcodes.h:596
READ_REGISTER, WRITE_REGISTER - This node represents llvm.register on the DAG, which implements the n...
Definition: ISDOpcodes.h:85
GC_TRANSITION_START/GC_TRANSITION_END - These operators mark the beginning and end of GC transition s...
Definition: ISDOpcodes.h:809
LOCAL_RECOVER - Represents the llvm.localrecover intrinsic.
Definition: ISDOpcodes.h:81
static cl::opt< bool > VerboseDAGDumping("dag-dump-verbose", cl::Hidden, cl::desc("Display more information when dumping selection " "DAG nodes."))
Simple binary floating point operators.
Definition: ISDOpcodes.h:259
VAEND, VASTART - VAEND and VASTART have three operands: an input chain, pointer, and a SRCVALUE...
Definition: ISDOpcodes.h:695
iterator_range< value_op_iterator > op_values() const
const SDValue & getOperand(unsigned Num) const
INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element at IDX replaced with VAL...
Definition: ISDOpcodes.h:307
This file contains the declarations for the subclasses of Constant, which represent the different fla...
Carry-using nodes for multiple precision addition and subtraction.
Definition: ISDOpcodes.h:231
void printr(raw_ostream &OS, const SelectionDAG *G=nullptr) const
static sys::TimePoint< std::chrono::seconds > now(bool Deterministic)
This file declares a class to represent arbitrary precision floating point values and provide a varie...
INIT_TRAMPOLINE - This corresponds to the init_trampoline intrinsic.
Definition: ISDOpcodes.h:725
TRAP - Trapping instruction.
Definition: ISDOpcodes.h:734
TargetIndex - Like a constant pool entry, but with completely target-dependent semantics.
Definition: ISDOpcodes.h:144
std::string getEVTString() const
This function returns value type as a string, e.g. "i32".
Definition: ValueTypes.cpp:120
AssertSext, AssertZext - These nodes record if a register contains a value that has already been zero...
Definition: ISDOpcodes.h:57
DEBUGTRAP - Trap intended to get the attention of a debugger.
Definition: ISDOpcodes.h:737
VAARG - VAARG has four operands: an input chain, a pointer, a SRCVALUE, and the alignment.
Definition: ISDOpcodes.h:686
Bit counting operators with an undefined result for zero inputs.
Definition: ISDOpcodes.h:385
Val, OUTCHAIN = ATOMIC_CMP_SWAP(INCHAIN, ptr, cmp, swap) For double-word atomic operations: ValLo...
Definition: ISDOpcodes.h:763
X = FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
Definition: ISDOpcodes.h:530
bool isMachineOpcode() const
Test if this node has a post-isel opcode, directly corresponding to a MachineInstr opcode...
unsigned getNumOperands() const
Return the number of values used by this operation.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
HANDLENODE node - Used as a handle for various purposes.
Definition: ISDOpcodes.h:717
EH_LABEL - Represents a label in mid basic block used to track locations needed for debug and excepti...
Definition: ISDOpcodes.h:639
TargetIntrinsicInfo - Interface to description of machine instruction set.
TokenFactor - This node takes multiple tokens as input and produces a single token result...
Definition: ISDOpcodes.h:50
void dump() const
Dump this node, for debugging.
static const fltSemantics & IEEEsingle() LLVM_READNONE
Definition: APFloat.cpp:119
const TargetLowering & getTargetLoweringInfo() const
Definition: SelectionDAG.h:391
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements...
Definition: SmallPtrSet.h:418
Returns platform specific canonical encoding of a floating point number.
Definition: ISDOpcodes.h:294
EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR identified by the (potentially...
Definition: ISDOpcodes.h:314
Like SetCC, ops #0 and #1 are the LHS and RHS operands to compare, but op #2 is a boolean indicating ...
Definition: ISDOpcodes.h:428
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
Definition: SelectionDAG.h:209
X = FP_ROUND_INREG(Y, VT) - This operator takes an FP register, and rounds it to a floating point val...
Definition: ISDOpcodes.h:527
ADDRSPACECAST - This operator converts between pointers of different address spaces.
Definition: ISDOpcodes.h:549
BRCOND - Conditional branch.
Definition: ISDOpcodes.h:611
const DataFlowGraph & G
Definition: RDFGraph.cpp:211
An SDNode that represents everything that will be needed to construct a MachineInstr.
Byte Swap and Counting operators.
Definition: ISDOpcodes.h:382
FP16_TO_FP, FP_TO_FP16 - These operators are used to perform promotions and truncation for half-preci...
Definition: ISDOpcodes.h:555
Represents one node in the SelectionDAG.
std::string utostr(uint64_t X, bool isNeg=false)
Definition: StringExtras.h:174
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:132
Select(COND, TRUEVAL, FALSEVAL).
Definition: ISDOpcodes.h:389
ZERO_EXTEND - Used for integer types, zeroing the new bits.
Definition: ISDOpcodes.h:445
ANY_EXTEND - Used for integer types. The high bits are undefined.
Definition: ISDOpcodes.h:448
FCOPYSIGN(X, Y) - Return the value of X with the sign of Y.
Definition: ISDOpcodes.h:287
FMINNAN/FMAXNAN - Behave identically to FMINNUM/FMAXNUM, except that when a single input is NaN...
Definition: ISDOpcodes.h:572
CATCHRET - Represents a return from a catch block funclet.
Definition: ISDOpcodes.h:653
GET_DYNAMIC_AREA_OFFSET - get offset from native SP to the address of the most recent dynamic alloca...
Definition: ISDOpcodes.h:816
BR_JT - Jumptable branch.
Definition: ISDOpcodes.h:605
VACOPY - VACOPY has 5 operands: an input chain, a destination pointer, a source pointer, a SRCVALUE for the destination, and a SRCVALUE for the source.
Definition: ISDOpcodes.h:691
static bool printOperand(raw_ostream &OS, const SelectionDAG *G, const SDValue Value)
Bitwise operators - logical and, logical or, logical xor.
Definition: ISDOpcodes.h:362
SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing a signed/unsigned value of type i[2...
Definition: ISDOpcodes.h:205
SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to sign extend a small value in ...
Definition: ISDOpcodes.h:463
LOAD and STORE have token chains as their first operand, then the same operands as an LLVM load/store...
Definition: ISDOpcodes.h:581
virtual const TargetIntrinsicInfo * getIntrinsicInfo() const
If intrinsic information is available, return it. If not, return null.
#define N
const TargetSubtargetInfo & getSubtarget() const
Definition: SelectionDAG.h:390
Same for multiplication.
Definition: ISDOpcodes.h:256
FSINCOS - Compute both fsin and fcos as a single operation.
Definition: ISDOpcodes.h:575
void print_types(raw_ostream &OS, const SelectionDAG *G) const
RESULT, OUTCHAIN = EH_SJLJ_SETJMP(INCHAIN, buffer) This corresponds to the eh.sjlj.setjmp intrinsic.
Definition: ISDOpcodes.h:108
CopyFromReg - This node indicates that the input value is a virtual or physical register that is defi...
Definition: ISDOpcodes.h:175
OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents &#39;eh_return&#39; gcc dwarf builtin...
Definition: ISDOpcodes.h:102
Like SetCC, ops #0 and #1 are the LHS and RHS operands to compare, and op #2 is a carry value...
Definition: ISDOpcodes.h:421
CONCAT_VECTORS(VECTOR0, VECTOR1, ...) - Given a number of values of vector type with the same length ...
Definition: ISDOpcodes.h:320
void dumpr() const
Dump (recursively) this node and its use-def subgraph.
void print(raw_ostream &OS, const SelectionDAG *G=nullptr) const
FMA - Perform a * b + c with no intermediate rounding step.
Definition: ISDOpcodes.h:277
FMIN/FMAX nodes can have flags, for NaN/NoNaN variants.
Definition: ISDOpcodes.h:830
unsigned getMachineOpcode() const
This may only be called if isMachineOpcode returns true.
PREFETCH - This corresponds to a prefetch intrinsic.
Definition: ISDOpcodes.h:743
This class implements an extremely fast bulk output stream that can only output to a stream...
Definition: raw_ostream.h:44
FMAD - Perform a * b + c, while getting the same result as the separately rounded operations...
Definition: ISDOpcodes.h:281
SetCC operator - This evaluates to a true value iff the condition is true.
Definition: ISDOpcodes.h:412
MERGE_VALUES - This node takes multiple discrete operands and returns them all as its individual resu...
Definition: ISDOpcodes.h:197
Conversion operators.
Definition: ISDOpcodes.h:442
Simple wrapper around std::function<void(raw_ostream&)>.
Definition: Printable.h:38
OUTCHAIN = ATOMIC_STORE(INCHAIN, ptr, val) This corresponds to "store atomic" instruction.
Definition: ISDOpcodes.h:756
TRUNCATE - Completely drop the high bits.
Definition: ISDOpcodes.h:451
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation...
FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW, FLOG, FLOG2, FLOG10, FEXP, FEXP2, FCEIL, FTRUNC, FRINT, FNEARBYINT, FROUND, FFLOOR - Perform various unary floating point operations.
Definition: ISDOpcodes.h:561
Val, OUTCHAIN = ATOMIC_LOAD(INCHAIN, ptr) This corresponds to "load atomic" instruction.
Definition: ISDOpcodes.h:752
SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a scalar value into element 0 of the...
Definition: ISDOpcodes.h:350
Carry-using nodes for multiple precision addition and subtraction.
Definition: ISDOpcodes.h:241
CARRY_FALSE - This node is used when folding other nodes, like ADDC/SUBC, which indicate the carry re...
Definition: ISDOpcodes.h:213
This file describes how to lower LLVM code to machine code.
MemIndexedMode
MemIndexedMode enum - This enum defines the load / store indexed addressing modes.
Definition: ISDOpcodes.h:871
BRIND - Indirect branch.
Definition: ISDOpcodes.h:601
MULHU/MULHS - Multiply high - Multiply two integers of type iN, producing an unsigned/signed value of...
Definition: ISDOpcodes.h:355
SRCVALUE - This is a node type that holds a Value* that is used to make reference to a value in the L...
Definition: ISDOpcodes.h:699
DYNAMIC_STACKALLOC - Allocate some number of bytes on the stack aligned to a specified boundary...
Definition: ISDOpcodes.h:590