LLVM  8.0.0svn
SelectionDAGDumper.cpp
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1 //===- SelectionDAGDumper.cpp - Implement SelectionDAG::dump() ------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This implements the SelectionDAG::dump method and friends.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "llvm/ADT/APFloat.h"
15 #include "llvm/ADT/APInt.h"
16 #include "llvm/ADT/None.h"
17 #include "llvm/ADT/SmallPtrSet.h"
18 #include "llvm/ADT/StringExtras.h"
30 #include "llvm/Config/llvm-config.h"
31 #include "llvm/IR/BasicBlock.h"
32 #include "llvm/IR/Constants.h"
34 #include "llvm/IR/DebugLoc.h"
35 #include "llvm/IR/Function.h"
36 #include "llvm/IR/Intrinsics.h"
38 #include "llvm/IR/Value.h"
39 #include "llvm/Support/Casting.h"
41 #include "llvm/Support/Compiler.h"
42 #include "llvm/Support/Debug.h"
45 #include "llvm/Support/Printable.h"
49 #include "SDNodeDbgValue.h"
50 #include <cstdint>
51 #include <iterator>
52 
53 using namespace llvm;
54 
55 static cl::opt<bool>
56 VerboseDAGDumping("dag-dump-verbose", cl::Hidden,
57  cl::desc("Display more information when dumping selection "
58  "DAG nodes."));
59 
60 std::string SDNode::getOperationName(const SelectionDAG *G) const {
61  switch (getOpcode()) {
62  default:
64  return "<<Unknown DAG Node>>";
65  if (isMachineOpcode()) {
66  if (G)
67  if (const TargetInstrInfo *TII = G->getSubtarget().getInstrInfo())
68  if (getMachineOpcode() < TII->getNumOpcodes())
69  return TII->getName(getMachineOpcode());
70  return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
71  }
72  if (G) {
73  const TargetLowering &TLI = G->getTargetLoweringInfo();
74  const char *Name = TLI.getTargetNodeName(getOpcode());
75  if (Name) return Name;
76  return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
77  }
78  return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
79 
80 #ifndef NDEBUG
81  case ISD::DELETED_NODE: return "<<Deleted Node!>>";
82 #endif
83  case ISD::PREFETCH: return "Prefetch";
84  case ISD::ATOMIC_FENCE: return "AtomicFence";
85  case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
86  case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS: return "AtomicCmpSwapWithSuccess";
87  case ISD::ATOMIC_SWAP: return "AtomicSwap";
88  case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
89  case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
90  case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
91  case ISD::ATOMIC_LOAD_CLR: return "AtomicLoadClr";
92  case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
93  case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
94  case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
95  case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
96  case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
97  case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
98  case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
99  case ISD::ATOMIC_LOAD: return "AtomicLoad";
100  case ISD::ATOMIC_STORE: return "AtomicStore";
101  case ISD::PCMARKER: return "PCMarker";
102  case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
103  case ISD::SRCVALUE: return "SrcValue";
104  case ISD::MDNODE_SDNODE: return "MDNode";
105  case ISD::EntryToken: return "EntryToken";
106  case ISD::TokenFactor: return "TokenFactor";
107  case ISD::AssertSext: return "AssertSext";
108  case ISD::AssertZext: return "AssertZext";
109 
110  case ISD::BasicBlock: return "BasicBlock";
111  case ISD::VALUETYPE: return "ValueType";
112  case ISD::Register: return "Register";
113  case ISD::RegisterMask: return "RegisterMask";
114  case ISD::Constant:
115  if (cast<ConstantSDNode>(this)->isOpaque())
116  return "OpaqueConstant";
117  return "Constant";
118  case ISD::ConstantFP: return "ConstantFP";
119  case ISD::GlobalAddress: return "GlobalAddress";
120  case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
121  case ISD::FrameIndex: return "FrameIndex";
122  case ISD::JumpTable: return "JumpTable";
123  case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
124  case ISD::RETURNADDR: return "RETURNADDR";
125  case ISD::ADDROFRETURNADDR: return "ADDROFRETURNADDR";
126  case ISD::FRAMEADDR: return "FRAMEADDR";
127  case ISD::LOCAL_RECOVER: return "LOCAL_RECOVER";
128  case ISD::READ_REGISTER: return "READ_REGISTER";
129  case ISD::WRITE_REGISTER: return "WRITE_REGISTER";
130  case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
131  case ISD::EH_DWARF_CFA: return "EH_DWARF_CFA";
132  case ISD::EH_RETURN: return "EH_RETURN";
133  case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP";
134  case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP";
135  case ISD::EH_SJLJ_SETUP_DISPATCH: return "EH_SJLJ_SETUP_DISPATCH";
136  case ISD::ConstantPool: return "ConstantPool";
137  case ISD::TargetIndex: return "TargetIndex";
138  case ISD::ExternalSymbol: return "ExternalSymbol";
139  case ISD::BlockAddress: return "BlockAddress";
141  case ISD::INTRINSIC_VOID:
142  case ISD::INTRINSIC_W_CHAIN: {
143  unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
144  unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue();
145  if (IID < Intrinsic::num_intrinsics)
146  return Intrinsic::getName((Intrinsic::ID)IID, None);
147  else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo())
148  return TII->getName(IID);
149  llvm_unreachable("Invalid intrinsic ID");
150  }
151 
152  case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
153  case ISD::TargetConstant:
154  if (cast<ConstantSDNode>(this)->isOpaque())
155  return "OpaqueTargetConstant";
156  return "TargetConstant";
157  case ISD::TargetConstantFP: return "TargetConstantFP";
158  case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
159  case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
160  case ISD::TargetFrameIndex: return "TargetFrameIndex";
161  case ISD::TargetJumpTable: return "TargetJumpTable";
162  case ISD::TargetConstantPool: return "TargetConstantPool";
163  case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
164  case ISD::MCSymbol: return "MCSymbol";
165  case ISD::TargetBlockAddress: return "TargetBlockAddress";
166 
167  case ISD::CopyToReg: return "CopyToReg";
168  case ISD::CopyFromReg: return "CopyFromReg";
169  case ISD::UNDEF: return "undef";
170  case ISD::MERGE_VALUES: return "merge_values";
171  case ISD::INLINEASM: return "inlineasm";
172  case ISD::EH_LABEL: return "eh_label";
173  case ISD::HANDLENODE: return "handlenode";
174 
175  // Unary operators
176  case ISD::FABS: return "fabs";
177  case ISD::FMINNUM: return "fminnum";
178  case ISD::FMAXNUM: return "fmaxnum";
179  case ISD::FMINNAN: return "fminnan";
180  case ISD::FMAXNAN: return "fmaxnan";
181  case ISD::FNEG: return "fneg";
182  case ISD::FSQRT: return "fsqrt";
183  case ISD::STRICT_FSQRT: return "strict_fsqrt";
184  case ISD::FCBRT: return "fcbrt";
185  case ISD::FSIN: return "fsin";
186  case ISD::STRICT_FSIN: return "strict_fsin";
187  case ISD::FCOS: return "fcos";
188  case ISD::STRICT_FCOS: return "strict_fcos";
189  case ISD::FSINCOS: return "fsincos";
190  case ISD::FTRUNC: return "ftrunc";
191  case ISD::FFLOOR: return "ffloor";
192  case ISD::FCEIL: return "fceil";
193  case ISD::FRINT: return "frint";
194  case ISD::STRICT_FRINT: return "strict_frint";
195  case ISD::FNEARBYINT: return "fnearbyint";
196  case ISD::STRICT_FNEARBYINT: return "strict_fnearbyint";
197  case ISD::FROUND: return "fround";
198  case ISD::FEXP: return "fexp";
199  case ISD::STRICT_FEXP: return "strict_fexp";
200  case ISD::FEXP2: return "fexp2";
201  case ISD::STRICT_FEXP2: return "strict_fexp2";
202  case ISD::FLOG: return "flog";
203  case ISD::STRICT_FLOG: return "strict_flog";
204  case ISD::FLOG2: return "flog2";
205  case ISD::STRICT_FLOG2: return "strict_flog2";
206  case ISD::FLOG10: return "flog10";
207  case ISD::STRICT_FLOG10: return "strict_flog10";
208 
209  // Binary operators
210  case ISD::ADD: return "add";
211  case ISD::SUB: return "sub";
212  case ISD::MUL: return "mul";
213  case ISD::MULHU: return "mulhu";
214  case ISD::MULHS: return "mulhs";
215  case ISD::SDIV: return "sdiv";
216  case ISD::UDIV: return "udiv";
217  case ISD::SREM: return "srem";
218  case ISD::UREM: return "urem";
219  case ISD::SMUL_LOHI: return "smul_lohi";
220  case ISD::UMUL_LOHI: return "umul_lohi";
221  case ISD::SDIVREM: return "sdivrem";
222  case ISD::UDIVREM: return "udivrem";
223  case ISD::AND: return "and";
224  case ISD::OR: return "or";
225  case ISD::XOR: return "xor";
226  case ISD::SHL: return "shl";
227  case ISD::SRA: return "sra";
228  case ISD::SRL: return "srl";
229  case ISD::ROTL: return "rotl";
230  case ISD::ROTR: return "rotr";
231  case ISD::FADD: return "fadd";
232  case ISD::STRICT_FADD: return "strict_fadd";
233  case ISD::FSUB: return "fsub";
234  case ISD::STRICT_FSUB: return "strict_fsub";
235  case ISD::FMUL: return "fmul";
236  case ISD::STRICT_FMUL: return "strict_fmul";
237  case ISD::FDIV: return "fdiv";
238  case ISD::STRICT_FDIV: return "strict_fdiv";
239  case ISD::FMA: return "fma";
240  case ISD::STRICT_FMA: return "strict_fma";
241  case ISD::FMAD: return "fmad";
242  case ISD::FREM: return "frem";
243  case ISD::STRICT_FREM: return "strict_frem";
244  case ISD::FCOPYSIGN: return "fcopysign";
245  case ISD::FGETSIGN: return "fgetsign";
246  case ISD::FCANONICALIZE: return "fcanonicalize";
247  case ISD::FPOW: return "fpow";
248  case ISD::STRICT_FPOW: return "strict_fpow";
249  case ISD::SMIN: return "smin";
250  case ISD::SMAX: return "smax";
251  case ISD::UMIN: return "umin";
252  case ISD::UMAX: return "umax";
253 
254  case ISD::FPOWI: return "fpowi";
255  case ISD::STRICT_FPOWI: return "strict_fpowi";
256  case ISD::SETCC: return "setcc";
257  case ISD::SETCCCARRY: return "setcccarry";
258  case ISD::SELECT: return "select";
259  case ISD::VSELECT: return "vselect";
260  case ISD::SELECT_CC: return "select_cc";
261  case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
262  case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
263  case ISD::CONCAT_VECTORS: return "concat_vectors";
264  case ISD::INSERT_SUBVECTOR: return "insert_subvector";
265  case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
266  case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
267  case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
268  case ISD::CARRY_FALSE: return "carry_false";
269  case ISD::ADDC: return "addc";
270  case ISD::ADDE: return "adde";
271  case ISD::ADDCARRY: return "addcarry";
272  case ISD::SADDO: return "saddo";
273  case ISD::UADDO: return "uaddo";
274  case ISD::SSUBO: return "ssubo";
275  case ISD::USUBO: return "usubo";
276  case ISD::SMULO: return "smulo";
277  case ISD::UMULO: return "umulo";
278  case ISD::SUBC: return "subc";
279  case ISD::SUBE: return "sube";
280  case ISD::SUBCARRY: return "subcarry";
281  case ISD::SHL_PARTS: return "shl_parts";
282  case ISD::SRA_PARTS: return "sra_parts";
283  case ISD::SRL_PARTS: return "srl_parts";
284 
285  // Conversion operators.
286  case ISD::SIGN_EXTEND: return "sign_extend";
287  case ISD::ZERO_EXTEND: return "zero_extend";
288  case ISD::ANY_EXTEND: return "any_extend";
289  case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
290  case ISD::ANY_EXTEND_VECTOR_INREG: return "any_extend_vector_inreg";
291  case ISD::SIGN_EXTEND_VECTOR_INREG: return "sign_extend_vector_inreg";
292  case ISD::ZERO_EXTEND_VECTOR_INREG: return "zero_extend_vector_inreg";
293  case ISD::TRUNCATE: return "truncate";
294  case ISD::FP_ROUND: return "fp_round";
295  case ISD::FLT_ROUNDS_: return "flt_rounds";
296  case ISD::FP_ROUND_INREG: return "fp_round_inreg";
297  case ISD::FP_EXTEND: return "fp_extend";
298 
299  case ISD::SINT_TO_FP: return "sint_to_fp";
300  case ISD::UINT_TO_FP: return "uint_to_fp";
301  case ISD::FP_TO_SINT: return "fp_to_sint";
302  case ISD::FP_TO_UINT: return "fp_to_uint";
303  case ISD::BITCAST: return "bitcast";
304  case ISD::ADDRSPACECAST: return "addrspacecast";
305  case ISD::FP16_TO_FP: return "fp16_to_fp";
306  case ISD::FP_TO_FP16: return "fp_to_fp16";
307 
308  // Control flow instructions
309  case ISD::BR: return "br";
310  case ISD::BRIND: return "brind";
311  case ISD::BR_JT: return "br_jt";
312  case ISD::BRCOND: return "brcond";
313  case ISD::BR_CC: return "br_cc";
314  case ISD::CALLSEQ_START: return "callseq_start";
315  case ISD::CALLSEQ_END: return "callseq_end";
316 
317  // EH instructions
318  case ISD::CATCHRET: return "catchret";
319  case ISD::CLEANUPRET: return "cleanupret";
320 
321  // Other operators
322  case ISD::LOAD: return "load";
323  case ISD::STORE: return "store";
324  case ISD::MLOAD: return "masked_load";
325  case ISD::MSTORE: return "masked_store";
326  case ISD::MGATHER: return "masked_gather";
327  case ISD::MSCATTER: return "masked_scatter";
328  case ISD::VAARG: return "vaarg";
329  case ISD::VACOPY: return "vacopy";
330  case ISD::VAEND: return "vaend";
331  case ISD::VASTART: return "vastart";
332  case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
333  case ISD::EXTRACT_ELEMENT: return "extract_element";
334  case ISD::BUILD_PAIR: return "build_pair";
335  case ISD::STACKSAVE: return "stacksave";
336  case ISD::STACKRESTORE: return "stackrestore";
337  case ISD::TRAP: return "trap";
338  case ISD::DEBUGTRAP: return "debugtrap";
339  case ISD::LIFETIME_START: return "lifetime.start";
340  case ISD::LIFETIME_END: return "lifetime.end";
341  case ISD::GC_TRANSITION_START: return "gc_transition.start";
342  case ISD::GC_TRANSITION_END: return "gc_transition.end";
343  case ISD::GET_DYNAMIC_AREA_OFFSET: return "get.dynamic.area.offset";
344 
345  // Bit manipulation
346  case ISD::ABS: return "abs";
347  case ISD::BITREVERSE: return "bitreverse";
348  case ISD::BSWAP: return "bswap";
349  case ISD::CTPOP: return "ctpop";
350  case ISD::CTTZ: return "cttz";
351  case ISD::CTTZ_ZERO_UNDEF: return "cttz_zero_undef";
352  case ISD::CTLZ: return "ctlz";
353  case ISD::CTLZ_ZERO_UNDEF: return "ctlz_zero_undef";
354 
355  // Trampolines
356  case ISD::INIT_TRAMPOLINE: return "init_trampoline";
357  case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline";
358 
359  case ISD::CONDCODE:
360  switch (cast<CondCodeSDNode>(this)->get()) {
361  default: llvm_unreachable("Unknown setcc condition!");
362  case ISD::SETOEQ: return "setoeq";
363  case ISD::SETOGT: return "setogt";
364  case ISD::SETOGE: return "setoge";
365  case ISD::SETOLT: return "setolt";
366  case ISD::SETOLE: return "setole";
367  case ISD::SETONE: return "setone";
368 
369  case ISD::SETO: return "seto";
370  case ISD::SETUO: return "setuo";
371  case ISD::SETUEQ: return "setueq";
372  case ISD::SETUGT: return "setugt";
373  case ISD::SETUGE: return "setuge";
374  case ISD::SETULT: return "setult";
375  case ISD::SETULE: return "setule";
376  case ISD::SETUNE: return "setune";
377 
378  case ISD::SETEQ: return "seteq";
379  case ISD::SETGT: return "setgt";
380  case ISD::SETGE: return "setge";
381  case ISD::SETLT: return "setlt";
382  case ISD::SETLE: return "setle";
383  case ISD::SETNE: return "setne";
384 
385  case ISD::SETTRUE: return "settrue";
386  case ISD::SETTRUE2: return "settrue2";
387  case ISD::SETFALSE: return "setfalse";
388  case ISD::SETFALSE2: return "setfalse2";
389  }
390  case ISD::VECREDUCE_FADD: return "vecreduce_fadd";
391  case ISD::VECREDUCE_STRICT_FADD: return "vecreduce_strict_fadd";
392  case ISD::VECREDUCE_FMUL: return "vecreduce_fmul";
393  case ISD::VECREDUCE_STRICT_FMUL: return "vecreduce_strict_fmul";
394  case ISD::VECREDUCE_ADD: return "vecreduce_add";
395  case ISD::VECREDUCE_MUL: return "vecreduce_mul";
396  case ISD::VECREDUCE_AND: return "vecreduce_and";
397  case ISD::VECREDUCE_OR: return "vecreduce_or";
398  case ISD::VECREDUCE_XOR: return "vecreduce_xor";
399  case ISD::VECREDUCE_SMAX: return "vecreduce_smax";
400  case ISD::VECREDUCE_SMIN: return "vecreduce_smin";
401  case ISD::VECREDUCE_UMAX: return "vecreduce_umax";
402  case ISD::VECREDUCE_UMIN: return "vecreduce_umin";
403  case ISD::VECREDUCE_FMAX: return "vecreduce_fmax";
404  case ISD::VECREDUCE_FMIN: return "vecreduce_fmin";
405  }
406 }
407 
409  switch (AM) {
410  default: return "";
411  case ISD::PRE_INC: return "<pre-inc>";
412  case ISD::PRE_DEC: return "<pre-dec>";
413  case ISD::POST_INC: return "<post-inc>";
414  case ISD::POST_DEC: return "<post-dec>";
415  }
416 }
417 
419  return Printable([&Node](raw_ostream &OS) {
420 #ifndef NDEBUG
421  OS << 't' << Node.PersistentId;
422 #else
423  OS << (const void*)&Node;
424 #endif
425  });
426 }
427 
428 // Print the MMO with more information from the SelectionDAG.
429 static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO,
430  const MachineFunction *MF, const Module *M,
431  const MachineFrameInfo *MFI,
432  const TargetInstrInfo *TII, LLVMContext &Ctx) {
433  ModuleSlotTracker MST(M);
434  if (MF)
435  MST.incorporateFunction(MF->getFunction());
437  MMO.print(OS, MST, SSNs, Ctx, MFI, TII);
438 }
439 
440 static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO,
441  const SelectionDAG *G) {
442  if (G) {
443  const MachineFunction *MF = &G->getMachineFunction();
444  return printMemOperand(OS, MMO, MF, MF->getFunction().getParent(),
445  &MF->getFrameInfo(), G->getSubtarget().getInstrInfo(),
446  *G->getContext());
447  } else {
448  LLVMContext Ctx;
449  return printMemOperand(OS, MMO, /*MF=*/nullptr, /*M=*/nullptr,
450  /*MFI=*/nullptr, /*TII=*/nullptr, Ctx);
451  }
452 }
453 
454 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
455 LLVM_DUMP_METHOD void SDNode::dump() const { dump(nullptr); }
456 
458  print(dbgs(), G);
459  dbgs() << '\n';
460 }
461 #endif
462 
464  for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
465  if (i) OS << ",";
466  if (getValueType(i) == MVT::Other)
467  OS << "ch";
468  else
469  OS << getValueType(i).getEVTString();
470  }
471 }
472 
474  if (getFlags().hasNoUnsignedWrap())
475  OS << " nuw";
476 
477  if (getFlags().hasNoSignedWrap())
478  OS << " nsw";
479 
480  if (getFlags().hasExact())
481  OS << " exact";
482 
483  if (getFlags().hasNoNaNs())
484  OS << " nnan";
485 
486  if (getFlags().hasNoInfs())
487  OS << " ninf";
488 
489  if (getFlags().hasNoSignedZeros())
490  OS << " nsz";
491 
492  if (getFlags().hasAllowReciprocal())
493  OS << " arcp";
494 
495  if (getFlags().hasAllowContract())
496  OS << " contract";
497 
498  if (getFlags().hasApproximateFuncs())
499  OS << " afn";
500 
501  if (getFlags().hasAllowReassociation())
502  OS << " reassoc";
503 
504  if (getFlags().hasVectorReduction())
505  OS << " vector-reduction";
506 
507  if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
508  if (!MN->memoperands_empty()) {
509  OS << "<";
510  OS << "Mem:";
511  for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
512  e = MN->memoperands_end(); i != e; ++i) {
513  printMemOperand(OS, **i, G);
514  if (std::next(i) != e)
515  OS << " ";
516  }
517  OS << ">";
518  }
519  } else if (const ShuffleVectorSDNode *SVN =
520  dyn_cast<ShuffleVectorSDNode>(this)) {
521  OS << "<";
522  for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
523  int Idx = SVN->getMaskElt(i);
524  if (i) OS << ",";
525  if (Idx < 0)
526  OS << "u";
527  else
528  OS << Idx;
529  }
530  OS << ">";
531  } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
532  OS << '<' << CSDN->getAPIntValue() << '>';
533  } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
534  if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEsingle())
535  OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
536  else if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEdouble())
537  OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
538  else {
539  OS << "<APFloat(";
540  CSDN->getValueAPF().bitcastToAPInt().print(OS, false);
541  OS << ")>";
542  }
543  } else if (const GlobalAddressSDNode *GADN =
544  dyn_cast<GlobalAddressSDNode>(this)) {
545  int64_t offset = GADN->getOffset();
546  OS << '<';
547  GADN->getGlobal()->printAsOperand(OS);
548  OS << '>';
549  if (offset > 0)
550  OS << " + " << offset;
551  else
552  OS << " " << offset;
553  if (unsigned int TF = GADN->getTargetFlags())
554  OS << " [TF=" << TF << ']';
555  } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
556  OS << "<" << FIDN->getIndex() << ">";
557  } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
558  OS << "<" << JTDN->getIndex() << ">";
559  if (unsigned int TF = JTDN->getTargetFlags())
560  OS << " [TF=" << TF << ']';
561  } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
562  int offset = CP->getOffset();
563  if (CP->isMachineConstantPoolEntry())
564  OS << "<" << *CP->getMachineCPVal() << ">";
565  else
566  OS << "<" << *CP->getConstVal() << ">";
567  if (offset > 0)
568  OS << " + " << offset;
569  else
570  OS << " " << offset;
571  if (unsigned int TF = CP->getTargetFlags())
572  OS << " [TF=" << TF << ']';
573  } else if (const TargetIndexSDNode *TI = dyn_cast<TargetIndexSDNode>(this)) {
574  OS << "<" << TI->getIndex() << '+' << TI->getOffset() << ">";
575  if (unsigned TF = TI->getTargetFlags())
576  OS << " [TF=" << TF << ']';
577  } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
578  OS << "<";
579  const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
580  if (LBB)
581  OS << LBB->getName() << " ";
582  OS << (const void*)BBDN->getBasicBlock() << ">";
583  } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
584  OS << ' ' << printReg(R->getReg(),
585  G ? G->getSubtarget().getRegisterInfo() : nullptr);
586  } else if (const ExternalSymbolSDNode *ES =
587  dyn_cast<ExternalSymbolSDNode>(this)) {
588  OS << "'" << ES->getSymbol() << "'";
589  if (unsigned int TF = ES->getTargetFlags())
590  OS << " [TF=" << TF << ']';
591  } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
592  if (M->getValue())
593  OS << "<" << M->getValue() << ">";
594  else
595  OS << "<null>";
596  } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) {
597  if (MD->getMD())
598  OS << "<" << MD->getMD() << ">";
599  else
600  OS << "<null>";
601  } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
602  OS << ":" << N->getVT().getEVTString();
603  }
604  else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
605  OS << "<";
606 
607  printMemOperand(OS, *LD->getMemOperand(), G);
608 
609  bool doExt = true;
610  switch (LD->getExtensionType()) {
611  default: doExt = false; break;
612  case ISD::EXTLOAD: OS << ", anyext"; break;
613  case ISD::SEXTLOAD: OS << ", sext"; break;
614  case ISD::ZEXTLOAD: OS << ", zext"; break;
615  }
616  if (doExt)
617  OS << " from " << LD->getMemoryVT().getEVTString();
618 
619  const char *AM = getIndexedModeName(LD->getAddressingMode());
620  if (*AM)
621  OS << ", " << AM;
622 
623  OS << ">";
624  } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
625  OS << "<";
626  printMemOperand(OS, *ST->getMemOperand(), G);
627 
628  if (ST->isTruncatingStore())
629  OS << ", trunc to " << ST->getMemoryVT().getEVTString();
630 
631  const char *AM = getIndexedModeName(ST->getAddressingMode());
632  if (*AM)
633  OS << ", " << AM;
634 
635  OS << ">";
636  } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) {
637  OS << "<";
638  printMemOperand(OS, *M->getMemOperand(), G);
639  OS << ">";
640  } else if (const BlockAddressSDNode *BA =
641  dyn_cast<BlockAddressSDNode>(this)) {
642  int64_t offset = BA->getOffset();
643  OS << "<";
644  BA->getBlockAddress()->getFunction()->printAsOperand(OS, false);
645  OS << ", ";
646  BA->getBlockAddress()->getBasicBlock()->printAsOperand(OS, false);
647  OS << ">";
648  if (offset > 0)
649  OS << " + " << offset;
650  else
651  OS << " " << offset;
652  if (unsigned int TF = BA->getTargetFlags())
653  OS << " [TF=" << TF << ']';
654  } else if (const AddrSpaceCastSDNode *ASC =
655  dyn_cast<AddrSpaceCastSDNode>(this)) {
656  OS << '['
657  << ASC->getSrcAddressSpace()
658  << " -> "
659  << ASC->getDestAddressSpace()
660  << ']';
661  }
662 
663  if (VerboseDAGDumping) {
664  if (unsigned Order = getIROrder())
665  OS << " [ORD=" << Order << ']';
666 
667  if (getNodeId() != -1)
668  OS << " [ID=" << getNodeId() << ']';
669  if (!(isa<ConstantSDNode>(this) || (isa<ConstantFPSDNode>(this))))
670  OS << "# D:" << isDivergent();
671 
672  if (!G)
673  return;
674 
675  DILocation *L = getDebugLoc();
676  if (!L)
677  return;
678 
679  if (auto *Scope = L->getScope())
680  OS << Scope->getFilename();
681  else
682  OS << "<unknown>";
683  OS << ':' << L->getLine();
684  if (unsigned C = L->getColumn())
685  OS << ':' << C;
686 
687  for (SDDbgValue *Dbg : G->GetDbgValues(this)) {
688  if (Dbg->getKind() != SDDbgValue::SDNODE || Dbg->isInvalidated())
689  continue;
690  Dbg->dump(OS);
691  }
692  }
693 }
694 
695 LLVM_DUMP_METHOD void SDDbgValue::dump(raw_ostream &OS) const {
696  OS << " DbgVal";
697  if (kind==SDNODE)
698  OS << '(' << u.s.ResNo << ')';
699  OS << ":\"" << Var->getName() << '"';
700 #ifndef NDEBUG
701  if (Expr->getNumElements())
702  Expr->dump();
703 #endif
704 }
705 
706 /// Return true if this node is so simple that we should just print it inline
707 /// if it appears as an operand.
708 static bool shouldPrintInline(const SDNode &Node) {
709  if (Node.getOpcode() == ISD::EntryToken)
710  return false;
711  return Node.getNumOperands() == 0;
712 }
713 
714 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
715 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
716  for (const SDValue &Op : N->op_values()) {
717  if (shouldPrintInline(*Op.getNode()))
718  continue;
719  if (Op.getNode()->hasOneUse())
720  DumpNodes(Op.getNode(), indent+2, G);
721  }
722 
723  dbgs().indent(indent);
724  N->dump(G);
725 }
726 
727 LLVM_DUMP_METHOD void SelectionDAG::dump() const {
728  dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:\n";
729 
730  for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end();
731  I != E; ++I) {
732  const SDNode *N = &*I;
733  if (!N->hasOneUse() && N != getRoot().getNode() &&
734  (!shouldPrintInline(*N) || N->use_empty()))
735  DumpNodes(N, 2, this);
736  }
737 
738  if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
739  dbgs() << "\n\n";
740 }
741 #endif
742 
743 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
744  OS << PrintNodeId(*this) << ": ";
745  print_types(OS, G);
746  OS << " = " << getOperationName(G);
747  print_details(OS, G);
748 }
749 
750 static bool printOperand(raw_ostream &OS, const SelectionDAG *G,
751  const SDValue Value) {
752  if (!Value.getNode()) {
753  OS << "<null>";
754  return false;
755  } else if (shouldPrintInline(*Value.getNode())) {
756  OS << Value->getOperationName(G) << ':';
757  Value->print_types(OS, G);
758  Value->print_details(OS, G);
759  return true;
760  } else {
761  OS << PrintNodeId(*Value.getNode());
762  if (unsigned RN = Value.getResNo())
763  OS << ':' << RN;
764  return false;
765  }
766 }
767 
768 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
769 using VisitedSDNodeSet = SmallPtrSet<const SDNode *, 32>;
770 
771 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
772  const SelectionDAG *G, VisitedSDNodeSet &once) {
773  if (!once.insert(N).second) // If we've been here before, return now.
774  return;
775 
776  // Dump the current SDNode, but don't end the line yet.
777  OS.indent(indent);
778  N->printr(OS, G);
779 
780  // Having printed this SDNode, walk the children:
781  for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
782  if (i) OS << ",";
783  OS << " ";
784 
785  const SDValue Op = N->getOperand(i);
786  bool printedInline = printOperand(OS, G, Op);
787  if (printedInline)
788  once.insert(Op.getNode());
789  }
790 
791  OS << "\n";
792 
793  // Dump children that have grandchildren on their own line(s).
794  for (const SDValue &Op : N->op_values())
795  DumpNodesr(OS, Op.getNode(), indent+2, G, once);
796 }
797 
798 LLVM_DUMP_METHOD void SDNode::dumpr() const {
799  VisitedSDNodeSet once;
800  DumpNodesr(dbgs(), this, 0, nullptr, once);
801 }
802 
803 LLVM_DUMP_METHOD void SDNode::dumpr(const SelectionDAG *G) const {
804  VisitedSDNodeSet once;
805  DumpNodesr(dbgs(), this, 0, G, once);
806 }
807 #endif
808 
809 static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
810  const SelectionDAG *G, unsigned depth,
811  unsigned indent) {
812  if (depth == 0)
813  return;
814 
815  OS.indent(indent);
816 
817  N->print(OS, G);
818 
819  if (depth < 1)
820  return;
821 
822  for (const SDValue &Op : N->op_values()) {
823  // Don't follow chain operands.
824  if (Op.getValueType() == MVT::Other)
825  continue;
826  OS << '\n';
827  printrWithDepthHelper(OS, Op.getNode(), G, depth-1, indent+2);
828  }
829 }
830 
831 void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G,
832  unsigned depth) const {
833  printrWithDepthHelper(OS, this, G, depth, 0);
834 }
835 
836 void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
837  // Don't print impossibly deep things.
838  printrWithDepth(OS, G, 10);
839 }
840 
841 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
842 LLVM_DUMP_METHOD
843 void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
844  printrWithDepth(dbgs(), G, depth);
845 }
846 
847 LLVM_DUMP_METHOD void SDNode::dumprFull(const SelectionDAG *G) const {
848  // Don't print impossibly deep things.
849  dumprWithDepth(G, 10);
850 }
851 #endif
852 
853 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
854  printr(OS, G);
855  for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
856  if (i) OS << ", "; else OS << " ";
857  printOperand(OS, G, getOperand(i));
858  }
859  if (DebugLoc DL = getDebugLoc()) {
860  OS << ", ";
861  DL.print(OS);
862  }
863 }
ADJUST_TRAMPOLINE - This corresponds to the adjust_trampoline intrinsic.
Definition: ISDOpcodes.h:724
BITCAST - This operator converts between integer, vector and FP values, as if the value was stored to...
Definition: ISDOpcodes.h:541
X = FP_ROUND(Y, TRUNC) - Rounding &#39;Y&#39; from a larger floating point type down to the precision of the ...
Definition: ISDOpcodes.h:508
BUILTIN_OP_END - This must be the last enum value in this list.
Definition: ISDOpcodes.h:837
FMINNUM/FMAXNUM - Perform floating-point minimum or maximum on two values.
Definition: ISDOpcodes.h:562
Constrained versions of libm-equivalent floating point intrinsics.
Definition: ISDOpcodes.h:273
std::string getOperationName(const SelectionDAG *G=nullptr) const
Return the opcode of this operation for printing.
EXTRACT_ELEMENT - This is used to get the lower or upper (determined by a Constant, which is required to be operand #1) half of the integer or float value specified as operand #0.
Definition: ISDOpcodes.h:184
unsigned getOpcode() const
Return the SelectionDAG opcode value for this node.
DELETED_NODE - This is an illegal value that is used to catch errors.
Definition: ISDOpcodes.h:42
MDNODE_SDNODE - This is a node that holdes an MDNode*, which is used to reference metadata in the IR...
Definition: ISDOpcodes.h:696
EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR (an vector value) starting with the ...
Definition: ISDOpcodes.h:334
BR_CC - Conditional branch.
Definition: ISDOpcodes.h:610
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
Various leaf nodes.
Definition: ISDOpcodes.h:60
VECTOR_SHUFFLE(VEC1, VEC2) - Returns a vector, of the same type as VEC1/VEC2.
Definition: ISDOpcodes.h:343
A Module instance is used to store all the information related to an LLVM module. ...
Definition: Module.h:64
ZERO_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register zero-extension of the low ...
Definition: ISDOpcodes.h:489
Carry-setting nodes for multiple precision addition and subtraction.
Definition: ISDOpcodes.h:223
EVT getValueType(unsigned ResNo) const
Return the type of a specified result.
STACKRESTORE has two operands, an input chain and a pointer to restore to it returns an output chain...
Definition: ISDOpcodes.h:659
void print_details(raw_ostream &OS, const SelectionDAG *G) const
RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition.
Definition: ISDOpcodes.h:251
TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or anything else with this node...
Definition: ISDOpcodes.h:131
Val, Success, OUTCHAIN = ATOMIC_CMP_SWAP_WITH_SUCCESS(INCHAIN, ptr, cmp, swap) N.b.
Definition: ISDOpcodes.h:762
virtual const char * getTargetNodeName(unsigned Opcode) const
This method returns the name of a target specific DAG node.
Constrained versions of the binary floating point operators.
Definition: ISDOpcodes.h:266
SIGN_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register sign-extension of the low ...
Definition: ISDOpcodes.h:480
Manage lifetime of a slot tracker for printing IR.
[US]{MIN/MAX} - Binary minimum or maximum or signed or unsigned integers.
Definition: ISDOpcodes.h:360
const SDNodeFlags getFlags() const
Same for subtraction.
Definition: ISDOpcodes.h:254
void print(raw_ostream &OS) const
Support for operator<<.
INSERT_SUBVECTOR(VECTOR1, VECTOR2, IDX) - Returns a vector with VECTOR2 inserted into VECTOR1 at the ...
Definition: ISDOpcodes.h:329
uint16_t PersistentId
Unique and persistent id per SDNode in the DAG.
The address of the GOT.
Definition: ISDOpcodes.h:66
EntryToken - This is the marker used to indicate the start of a region.
Definition: ISDOpcodes.h:45
OUTCHAIN = ATOMIC_FENCE(INCHAIN, ordering, scope) This corresponds to the fence instruction.
Definition: ISDOpcodes.h:741
Select with condition operator - This selects between a true value and a false value (ops #2 and #3) ...
Definition: ISDOpcodes.h:407
INT = FGETSIGN(FP) - Return the sign bit of the specified floating point value as an integer 0/1 valu...
Definition: ISDOpcodes.h:292
This SDNode is used to implement the code generator support for the llvm IR shufflevector instruction...
RESULT,OUTCHAIN = INTRINSIC_W_CHAIN(INCHAIN, INTRINSICID, arg1, ...) This node represents a target in...
Definition: ISDOpcodes.h:159
OUTCHAIN = EH_SJLJ_LONGJMP(INCHAIN, buffer) This corresponds to the eh.sjlj.longjmp intrinsic...
Definition: ISDOpcodes.h:114
SDIVREM/UDIVREM - Divide two integers and produce both a quotient and remainder result.
Definition: ISDOpcodes.h:210
SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded integer shift operations...
Definition: ISDOpcodes.h:428
CLEANUPRET - Represents a return from a cleanup block funclet.
Definition: ISDOpcodes.h:650
static Printable PrintNodeId(const SDNode &Node)
A description of a memory reference used in the backend.
PCMARKER - This corresponds to the pcmarker intrinsic.
Definition: ISDOpcodes.h:699
StringRef getName(ID id)
Return the LLVM name for an intrinsic, such as "llvm.ppc.altivec.lvx".
Definition: Function.cpp:627
This file declares the MachineConstantPool class which is an abstract constant pool to keep track of ...
const HexagonInstrInfo * TII
Shift and rotation operations.
Definition: ISDOpcodes.h:382
ABS - Determine the unsigned absolute value of a signed integer value of the same bitwidth...
Definition: ISDOpcodes.h:369
BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways.
Definition: ISDOpcodes.h:191
CopyToReg - This node has three operands: a chain, a register number to set to this value...
Definition: ISDOpcodes.h:170
FLT_ROUNDS_ - Returns current rounding mode: -1 Undefined 0 Round to 0 1 Round to nearest 2 Round to ...
Definition: ISDOpcodes.h:516
CALLSEQ_START/CALLSEQ_END - These operators mark the beginning and end of a call sequence, and carry arbitrary information that target might want to know.
Definition: ISDOpcodes.h:673
EH_DWARF_CFA - This node represents the pointer to the DWARF Canonical Frame Address (CFA)...
Definition: ISDOpcodes.h:96
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted...
Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amt) For double-word atomic operations: ValLo, ValHi, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amtLo, amtHi) ValLo, ValHi, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amtLo, amtHi) These correspond to the atomicrmw instruction.
Definition: ISDOpcodes.h:770
#define LLVM_DUMP_METHOD
Definition: Compiler.h:74
FRAMEADDR, RETURNADDR - These nodes represent llvm.frameaddress and llvm.returnaddress on the DAG...
Definition: ISDOpcodes.h:73
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
This file implements a class to represent arbitrary precision integral constant values and operations...
INLINEASM - Represents an inline asm block.
Definition: ISDOpcodes.h:627
STACKSAVE - STACKSAVE has one operand, an input chain.
Definition: ISDOpcodes.h:655
FRAME_TO_ARGS_OFFSET - This node represents offset from frame pointer to first (possible) on-stack ar...
Definition: ISDOpcodes.h:91
MachineFunction & getMachineFunction() const
Definition: SelectionDAG.h:395
[SU]INT_TO_FP - These operators convert integers (whose interpreted sign depends on the first letter)...
Definition: ISDOpcodes.h:450
OUTCHAIN = EH_SJLJ_SETUP_DISPATCH(INCHAIN) The target initializes the dispatch table here...
Definition: ISDOpcodes.h:118
const TargetMachine & getTarget() const
Definition: SelectionDAG.h:399
Select with a vector condition (op #0) and two vector operands (ops #1 and #2), returning a vector re...
Definition: ISDOpcodes.h:401
Simple integer binary arithmetic operators.
Definition: ISDOpcodes.h:201
virtual const TargetInstrInfo * getInstrInfo() const
static const fltSemantics & IEEEdouble() LLVM_READNONE
Definition: APFloat.cpp:123
TargetConstant* - Like Constant*, but the DAG does not do any folding, simplification, or lowering of the constant.
Definition: ISDOpcodes.h:125
static const char * getIndexedModeName(ISD::MemIndexedMode AM)
READCYCLECOUNTER - This corresponds to the readcyclecounter intrinsic.
Definition: ISDOpcodes.h:707
ANY_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register any-extension of the low la...
Definition: ISDOpcodes.h:467
Generic reduction nodes.
Definition: ISDOpcodes.h:826
RESULT = INTRINSIC_WO_CHAIN(INTRINSICID, arg1, arg2, ...) This node represents a target intrinsic fun...
Definition: ISDOpcodes.h:151
UNDEF - An undefined node.
Definition: ISDOpcodes.h:178
FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.
Definition: ISDOpcodes.h:494
BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a vector with the specified, possibly variable...
Definition: ISDOpcodes.h:303
TargetInstrInfo - Interface to description of machine instruction set.
This corresponds to the llvm.lifetime.
Definition: ISDOpcodes.h:804
unsigned getNumValues() const
Return the number of values defined/returned by this operator.
OUTCHAIN = INTRINSIC_VOID(INCHAIN, INTRINSICID, arg1, arg2, ...) This node represents a target intrin...
Definition: ISDOpcodes.h:166
These reductions are non-strict, and have a single vector operand.
Definition: ISDOpcodes.h:828
Control flow instructions. These all have token chains.
Definition: ISDOpcodes.h:589
READ_REGISTER, WRITE_REGISTER - This node represents llvm.register on the DAG, which implements the n...
Definition: ISDOpcodes.h:85
GC_TRANSITION_START/GC_TRANSITION_END - These operators mark the beginning and end of GC transition s...
Definition: ISDOpcodes.h:812
LOCAL_RECOVER - Represents the llvm.localrecover intrinsic.
Definition: ISDOpcodes.h:81
static cl::opt< bool > VerboseDAGDumping("dag-dump-verbose", cl::Hidden, cl::desc("Display more information when dumping selection " "DAG nodes."))
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:69
Simple binary floating point operators.
Definition: ISDOpcodes.h:260
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
VAEND, VASTART - VAEND and VASTART have three operands: an input chain, pointer, and a SRCVALUE...
Definition: ISDOpcodes.h:688
const SDValue & getOperand(unsigned Num) const
INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element at IDX replaced with VAL...
Definition: ISDOpcodes.h:308
This file contains the declarations for the subclasses of Constant, which represent the different fla...
Carry-using nodes for multiple precision addition and subtraction.
Definition: ISDOpcodes.h:232
This file declares a class to represent arbitrary precision floating point values and provide a varie...
INIT_TRAMPOLINE - This corresponds to the init_trampoline intrinsic.
Definition: ISDOpcodes.h:718
TRAP - Trapping instruction.
Definition: ISDOpcodes.h:727
TargetIndex - Like a constant pool entry, but with completely target-dependent semantics.
Definition: ISDOpcodes.h:144
std::string getEVTString() const
This function returns value type as a string, e.g. "i32".
Definition: ValueTypes.cpp:115
AssertSext, AssertZext - These nodes record if a register contains a value that has already been zero...
Definition: ISDOpcodes.h:57
DEBUGTRAP - Trap intended to get the attention of a debugger.
Definition: ISDOpcodes.h:730
VAARG - VAARG has four operands: an input chain, a pointer, a SRCVALUE, and the alignment.
Definition: ISDOpcodes.h:679
Bit counting operators with an undefined result for zero inputs.
Definition: ISDOpcodes.h:388
Val, OUTCHAIN = ATOMIC_CMP_SWAP(INCHAIN, ptr, cmp, swap) For double-word atomic operations: ValLo...
Definition: ISDOpcodes.h:756
X = FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
Definition: ISDOpcodes.h:526
void incorporateFunction(const Function &F)
Incorporate the given function.
Definition: AsmWriter.cpp:836
bool isMachineOpcode() const
Test if this node has a post-isel opcode, directly corresponding to a MachineInstr opcode...
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
HANDLENODE node - Used as a handle for various purposes.
Definition: ISDOpcodes.h:710
EH_LABEL - Represents a label in mid basic block used to track locations needed for debug and excepti...
Definition: ISDOpcodes.h:632
TargetIntrinsicInfo - Interface to description of machine instruction set.
TokenFactor - This node takes multiple tokens as input and produces a single token result...
Definition: ISDOpcodes.h:50
void dump() const
Dump this node, for debugging.
static const fltSemantics & IEEEsingle() LLVM_READNONE
Definition: APFloat.cpp:120
static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO, const MachineFunction *MF, const Module *M, const MachineFrameInfo *MFI, const TargetInstrInfo *TII, LLVMContext &Ctx)
const TargetLowering & getTargetLoweringInfo() const
Definition: SelectionDAG.h:401
Returns platform specific canonical encoding of a floating point number.
Definition: ISDOpcodes.h:295
EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR identified by the (potentially...
Definition: ISDOpcodes.h:315
Like SetCC, ops #0 and #1 are the LHS and RHS operands to compare, but op #2 is a boolean indicating ...
Definition: ISDOpcodes.h:423
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
Definition: SelectionDAG.h:222
X = FP_ROUND_INREG(Y, VT) - This operator takes an FP register, and rounds it to a floating point val...
Definition: ISDOpcodes.h:523
ADDRSPACECAST - This operator converts between pointers of different address spaces.
Definition: ISDOpcodes.h:545
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:847
BRCOND - Conditional branch.
Definition: ISDOpcodes.h:604
const DataFlowGraph & G
Definition: RDFGraph.cpp:211
An SDNode that represents everything that will be needed to construct a MachineInstr.
Byte Swap and Counting operators.
Definition: ISDOpcodes.h:385
FP16_TO_FP, FP_TO_FP16 - These operators are used to perform promotions and truncation for half-preci...
Definition: ISDOpcodes.h:551
Represents one node in the SelectionDAG.
std::string utostr(uint64_t X, bool isNeg=false)
Definition: StringExtras.h:224
const Function & getFunction() const
Return the LLVM function that this machine code represents.
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:133
Select(COND, TRUEVAL, FALSEVAL).
Definition: ISDOpcodes.h:392
ZERO_EXTEND - Used for integer types, zeroing the new bits.
Definition: ISDOpcodes.h:440
ANY_EXTEND - Used for integer types. The high bits are undefined.
Definition: ISDOpcodes.h:443
FCOPYSIGN(X, Y) - Return the value of X with the sign of Y.
Definition: ISDOpcodes.h:288
FMINNAN/FMAXNAN - Behave identically to FMINNUM/FMAXNUM, except that when a single input is NaN...
Definition: ISDOpcodes.h:565
CATCHRET - Represents a return from a catch block funclet.
Definition: ISDOpcodes.h:646
GET_DYNAMIC_AREA_OFFSET - get offset from native SP to the address of the most recent dynamic alloca...
Definition: ISDOpcodes.h:819
BR_JT - Jumptable branch.
Definition: ISDOpcodes.h:598
VACOPY - VACOPY has 5 operands: an input chain, a destination pointer, a source pointer, a SRCVALUE for the destination, and a SRCVALUE for the source.
Definition: ISDOpcodes.h:684
Bitwise operators - logical and, logical or, logical xor.
Definition: ISDOpcodes.h:363
iterator_range< typename GraphTraits< GraphType >::nodes_iterator > nodes(const GraphType &G)
Definition: GraphTraits.h:109
SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing a signed/unsigned value of type i[2...
Definition: ISDOpcodes.h:206
SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to sign extend a small value in ...
Definition: ISDOpcodes.h:458
LOAD and STORE have token chains as their first operand, then the same operands as an LLVM load/store...
Definition: ISDOpcodes.h:574
virtual const TargetIntrinsicInfo * getIntrinsicInfo() const
If intrinsic information is available, return it. If not, return null.
const TargetSubtargetInfo & getSubtarget() const
Definition: SelectionDAG.h:400
Same for multiplication.
Definition: ISDOpcodes.h:257
FSINCOS - Compute both fsin and fcos as a single operation.
Definition: ISDOpcodes.h:568
void print_types(raw_ostream &OS, const SelectionDAG *G) const
RESULT, OUTCHAIN = EH_SJLJ_SETJMP(INCHAIN, buffer) This corresponds to the eh.sjlj.setjmp intrinsic.
Definition: ISDOpcodes.h:108
CopyFromReg - This node indicates that the input value is a virtual or physical register that is defi...
Definition: ISDOpcodes.h:175
OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents &#39;eh_return&#39; gcc dwarf builtin...
Definition: ISDOpcodes.h:102
CONCAT_VECTORS(VECTOR0, VECTOR1, ...) - Given a number of values of vector type with the same length ...
Definition: ISDOpcodes.h:321
void print(raw_ostream &OS, const SelectionDAG *G=nullptr) const
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:566
FMA - Perform a * b + c with no intermediate rounding step.
Definition: ISDOpcodes.h:278
FMIN/FMAX nodes can have flags, for NaN/NoNaN variants.
Definition: ISDOpcodes.h:833
unsigned getMachineOpcode() const
This may only be called if isMachineOpcode returns true.
PREFETCH - This corresponds to a prefetch intrinsic.
Definition: ISDOpcodes.h:736
This class implements an extremely fast bulk output stream that can only output to a stream...
Definition: raw_ostream.h:46
FMAD - Perform a * b + c, while getting the same result as the separately rounded operations...
Definition: ISDOpcodes.h:282
SetCC operator - This evaluates to a true value iff the condition is true.
Definition: ISDOpcodes.h:415
MERGE_VALUES - This node takes multiple discrete operands and returns them all as its individual resu...
Definition: ISDOpcodes.h:198
Conversion operators.
Definition: ISDOpcodes.h:437
Simple wrapper around std::function<void(raw_ostream&)>.
Definition: Printable.h:38
OUTCHAIN = ATOMIC_STORE(INCHAIN, ptr, val) This corresponds to "store atomic" instruction.
Definition: ISDOpcodes.h:749
TRUNCATE - Completely drop the high bits.
Definition: ISDOpcodes.h:446
Perform various unary floating-point operations inspired by libm.
Definition: ISDOpcodes.h:554
Val, OUTCHAIN = ATOMIC_LOAD(INCHAIN, ptr) This corresponds to "load atomic" instruction.
Definition: ISDOpcodes.h:745
LLVMContext * getContext() const
Definition: SelectionDAG.h:404
SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a scalar value into element 0 of the...
Definition: ISDOpcodes.h:351
Carry-using nodes for multiple precision addition and subtraction.
Definition: ISDOpcodes.h:242
CARRY_FALSE - This node is used when folding other nodes, like ADDC/SUBC, which indicate the carry re...
Definition: ISDOpcodes.h:214
This file describes how to lower LLVM code to machine code.
MemIndexedMode
MemIndexedMode enum - This enum defines the load / store indexed addressing modes.
Definition: ISDOpcodes.h:874
BRIND - Indirect branch.
Definition: ISDOpcodes.h:594
MULHU/MULHS - Multiply high - Multiply two integers of type iN, producing an unsigned/signed value of...
Definition: ISDOpcodes.h:356
SRCVALUE - This is a node type that holds a Value* that is used to make reference to a value in the L...
Definition: ISDOpcodes.h:692
DYNAMIC_STACKALLOC - Allocate some number of bytes on the stack aligned to a specified boundary...
Definition: ISDOpcodes.h:583