LLVM  9.0.0svn
TargetCallingConv.h
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1 //===-- llvm/CodeGen/TargetCallingConv.h - Calling Convention ---*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file defines types for working with calling-convention information.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_CODEGEN_TARGETCALLINGCONV_H
14 #define LLVM_CODEGEN_TARGETCALLINGCONV_H
15 
19 #include <cassert>
20 #include <climits>
21 #include <cstdint>
22 
23 namespace llvm {
24 namespace ISD {
25 
26  struct ArgFlagsTy {
27  private:
28  unsigned IsZExt : 1; ///< Zero extended
29  unsigned IsSExt : 1; ///< Sign extended
30  unsigned IsInReg : 1; ///< Passed in register
31  unsigned IsSRet : 1; ///< Hidden struct-ret ptr
32  unsigned IsByVal : 1; ///< Struct passed by value
33  unsigned IsNest : 1; ///< Nested fn static chain
34  unsigned IsReturned : 1; ///< Always returned
35  unsigned IsSplit : 1;
36  unsigned IsInAlloca : 1; ///< Passed with inalloca
37  unsigned IsSplitEnd : 1; ///< Last part of a split
38  unsigned IsSwiftSelf : 1; ///< Swift self parameter
39  unsigned IsSwiftError : 1; ///< Swift error parameter
40  unsigned IsHva : 1; ///< HVA field for
41  unsigned IsHvaStart : 1; ///< HVA structure start
42  unsigned IsSecArgPass : 1; ///< Second argument
43  unsigned ByValAlign : 4; ///< Log 2 of byval alignment
44  unsigned OrigAlign : 5; ///< Log 2 of original alignment
45  unsigned IsInConsecutiveRegsLast : 1;
46  unsigned IsInConsecutiveRegs : 1;
47  unsigned IsCopyElisionCandidate : 1; ///< Argument copy elision candidate
48 
49  unsigned ByValSize; ///< Byval struct size
50 
51  public:
53  : IsZExt(0), IsSExt(0), IsInReg(0), IsSRet(0), IsByVal(0), IsNest(0),
54  IsReturned(0), IsSplit(0), IsInAlloca(0), IsSplitEnd(0),
55  IsSwiftSelf(0), IsSwiftError(0), IsHva(0), IsHvaStart(0),
56  IsSecArgPass(0), ByValAlign(0), OrigAlign(0),
57  IsInConsecutiveRegsLast(0), IsInConsecutiveRegs(0),
58  IsCopyElisionCandidate(0), ByValSize(0) {
59  static_assert(sizeof(*this) == 2 * sizeof(unsigned), "flags are too big");
60  }
61 
62  bool isZExt() const { return IsZExt; }
63  void setZExt() { IsZExt = 1; }
64 
65  bool isSExt() const { return IsSExt; }
66  void setSExt() { IsSExt = 1; }
67 
68  bool isInReg() const { return IsInReg; }
69  void setInReg() { IsInReg = 1; }
70 
71  bool isSRet() const { return IsSRet; }
72  void setSRet() { IsSRet = 1; }
73 
74  bool isByVal() const { return IsByVal; }
75  void setByVal() { IsByVal = 1; }
76 
77  bool isInAlloca() const { return IsInAlloca; }
78  void setInAlloca() { IsInAlloca = 1; }
79 
80  bool isSwiftSelf() const { return IsSwiftSelf; }
81  void setSwiftSelf() { IsSwiftSelf = 1; }
82 
83  bool isSwiftError() const { return IsSwiftError; }
84  void setSwiftError() { IsSwiftError = 1; }
85 
86  bool isHva() const { return IsHva; }
87  void setHva() { IsHva = 1; }
88 
89  bool isHvaStart() const { return IsHvaStart; }
90  void setHvaStart() { IsHvaStart = 1; }
91 
92  bool isSecArgPass() const { return IsSecArgPass; }
93  void setSecArgPass() { IsSecArgPass = 1; }
94 
95  bool isNest() const { return IsNest; }
96  void setNest() { IsNest = 1; }
97 
98  bool isReturned() const { return IsReturned; }
99  void setReturned() { IsReturned = 1; }
100 
101  bool isInConsecutiveRegs() const { return IsInConsecutiveRegs; }
102  void setInConsecutiveRegs() { IsInConsecutiveRegs = 1; }
103 
104  bool isInConsecutiveRegsLast() const { return IsInConsecutiveRegsLast; }
105  void setInConsecutiveRegsLast() { IsInConsecutiveRegsLast = 1; }
106 
107  bool isSplit() const { return IsSplit; }
108  void setSplit() { IsSplit = 1; }
109 
110  bool isSplitEnd() const { return IsSplitEnd; }
111  void setSplitEnd() { IsSplitEnd = 1; }
112 
113  bool isCopyElisionCandidate() const { return IsCopyElisionCandidate; }
114  void setCopyElisionCandidate() { IsCopyElisionCandidate = 1; }
115 
116  unsigned getByValAlign() const { return (1U << ByValAlign) / 2; }
117  void setByValAlign(unsigned A) {
118  ByValAlign = Log2_32(A) + 1;
119  assert(getByValAlign() == A && "bitfield overflow");
120  }
121 
122  unsigned getOrigAlign() const { return (1U << OrigAlign) / 2; }
123  void setOrigAlign(unsigned A) {
124  OrigAlign = Log2_32(A) + 1;
125  assert(getOrigAlign() == A && "bitfield overflow");
126  }
127 
128  unsigned getByValSize() const { return ByValSize; }
129  void setByValSize(unsigned S) { ByValSize = S; }
130  };
131 
132  /// InputArg - This struct carries flags and type information about a
133  /// single incoming (formal) argument or incoming (from the perspective
134  /// of the caller) return value virtual register.
135  ///
136  struct InputArg {
140  bool Used = false;
141 
142  /// Index original Function's argument.
143  unsigned OrigArgIndex;
144  /// Sentinel value for implicit machine-level input arguments.
145  static const unsigned NoArgIndex = UINT_MAX;
146 
147  /// Offset in bytes of current input value relative to the beginning of
148  /// original argument. E.g. if argument was splitted into four 32 bit
149  /// registers, we got 4 InputArgs with PartOffsets 0, 4, 8 and 12.
150  unsigned PartOffset;
151 
152  InputArg() = default;
153  InputArg(ArgFlagsTy flags, EVT vt, EVT argvt, bool used,
154  unsigned origIdx, unsigned partOffs)
155  : Flags(flags), Used(used), OrigArgIndex(origIdx), PartOffset(partOffs) {
156  VT = vt.getSimpleVT();
157  ArgVT = argvt;
158  }
159 
160  bool isOrigArg() const {
161  return OrigArgIndex != NoArgIndex;
162  }
163 
164  unsigned getOrigArgIndex() const {
165  assert(OrigArgIndex != NoArgIndex && "Implicit machine-level argument");
166  return OrigArgIndex;
167  }
168  };
169 
170  /// OutputArg - This struct carries flags and a value for a
171  /// single outgoing (actual) argument or outgoing (from the perspective
172  /// of the caller) return value virtual register.
173  ///
174  struct OutputArg {
178 
179  /// IsFixed - Is this a "fixed" value, ie not passed through a vararg "...".
180  bool IsFixed = false;
181 
182  /// Index original Function's argument.
183  unsigned OrigArgIndex;
184 
185  /// Offset in bytes of current output value relative to the beginning of
186  /// original argument. E.g. if argument was splitted into four 32 bit
187  /// registers, we got 4 OutputArgs with PartOffsets 0, 4, 8 and 12.
188  unsigned PartOffset;
189 
190  OutputArg() = default;
191  OutputArg(ArgFlagsTy flags, EVT vt, EVT argvt, bool isfixed,
192  unsigned origIdx, unsigned partOffs)
193  : Flags(flags), IsFixed(isfixed), OrigArgIndex(origIdx),
194  PartOffset(partOffs) {
195  VT = vt.getSimpleVT();
196  ArgVT = argvt;
197  }
198  };
199 
200 } // end namespace ISD
201 } // end namespace llvm
202 
203 #endif // LLVM_CODEGEN_TARGETCALLINGCONV_H
void setByValAlign(unsigned A)
This class represents lattice values for constants.
Definition: AllocatorList.h:23
InputArg - This struct carries flags and type information about a single incoming (formal) argument o...
MVT getSimpleVT() const
Return the SimpleValueType held in the specified simple EVT.
Definition: ValueTypes.h:252
bool isInConsecutiveRegs() const
void setByValSize(unsigned S)
OutputArg - This struct carries flags and a value for a single outgoing (actual) argument or outgoing...
void setOrigAlign(unsigned A)
unsigned getByValSize() const
Machine Value Type.
unsigned getOrigAlign() const
OutputArg(ArgFlagsTy flags, EVT vt, EVT argvt, bool isfixed, unsigned origIdx, unsigned partOffs)
unsigned PartOffset
Offset in bytes of current input value relative to the beginning of original argument.
Extended Value Type.
Definition: ValueTypes.h:33
bool isCopyElisionCandidate() const
unsigned Log2_32(uint32_t Value)
Return the floor log base 2 of the specified value, -1 if the value is zero.
Definition: MathExtras.h:538
unsigned OrigArgIndex
Index original Function&#39;s argument.
unsigned getByValAlign() const
unsigned getOrigArgIndex() const
unsigned PartOffset
Offset in bytes of current output value relative to the beginning of original argument.
bool isInConsecutiveRegsLast() const
InputArg(ArgFlagsTy flags, EVT vt, EVT argvt, bool used, unsigned origIdx, unsigned partOffs)
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
unsigned OrigArgIndex
Index original Function&#39;s argument.