LLVM  7.0.0svn
TargetMachine.h
Go to the documentation of this file.
1 //===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file defines the TargetMachine and LLVMTargetMachine classes.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_TARGET_TARGETMACHINE_H
15 #define LLVM_TARGET_TARGETMACHINE_H
16 
17 #include "llvm/ADT/StringRef.h"
18 #include "llvm/ADT/Triple.h"
19 #include "llvm/IR/DataLayout.h"
20 #include "llvm/Pass.h"
21 #include "llvm/Support/CodeGen.h"
23 #include <string>
24 
25 namespace llvm {
26 
27 class Function;
28 class GlobalValue;
29 class MachineModuleInfo;
30 class Mangler;
31 class MCAsmInfo;
32 class MCContext;
33 class MCInstrInfo;
34 class MCRegisterInfo;
35 class MCSubtargetInfo;
36 class MCSymbol;
37 class raw_pwrite_stream;
38 class PassManagerBuilder;
39 class Target;
40 class TargetIntrinsicInfo;
41 class TargetIRAnalysis;
42 class TargetTransformInfo;
43 class TargetLoweringObjectFile;
44 class TargetPassConfig;
45 class TargetSubtargetInfo;
46 
47 // The old pass manager infrastructure is hidden in a legacy namespace now.
48 namespace legacy {
49 class PassManagerBase;
50 }
51 using legacy::PassManagerBase;
52 
53 //===----------------------------------------------------------------------===//
54 ///
55 /// Primary interface to the complete machine description for the target
56 /// machine. All target-specific information should be accessible through this
57 /// interface.
58 ///
60 protected: // Can only create subclasses.
61  TargetMachine(const Target &T, StringRef DataLayoutString,
62  const Triple &TargetTriple, StringRef CPU, StringRef FS,
63  const TargetOptions &Options);
64 
65  /// The Target that this machine was created for.
66  const Target &TheTarget;
67 
68  /// DataLayout for the target: keep ABI type size and alignment.
69  ///
70  /// The DataLayout is created based on the string representation provided
71  /// during construction. It is kept here only to avoid reparsing the string
72  /// but should not really be used during compilation, because it has an
73  /// internal cache that is context specific.
74  const DataLayout DL;
75 
76  /// Triple string, CPU name, and target feature strings the TargetMachine
77  /// instance is created with.
79  std::string TargetCPU;
80  std::string TargetFS;
81 
85 
86  /// Contains target specific asm information.
88 
90  const MCInstrInfo *MII;
92 
93  unsigned RequireStructuredCFG : 1;
94  unsigned O0WantsFastISel : 1;
95 
96 public:
99 
100  TargetMachine(const TargetMachine &) = delete;
101  void operator=(const TargetMachine &) = delete;
102  virtual ~TargetMachine();
103 
104  const Target &getTarget() const { return TheTarget; }
105 
106  const Triple &getTargetTriple() const { return TargetTriple; }
107  StringRef getTargetCPU() const { return TargetCPU; }
108  StringRef getTargetFeatureString() const { return TargetFS; }
109 
110  /// Virtual method implemented by subclasses that returns a reference to that
111  /// target's TargetSubtargetInfo-derived member variable.
112  virtual const TargetSubtargetInfo *getSubtargetImpl(const Function &) const {
113  return nullptr;
114  }
116  return nullptr;
117  }
118 
119  /// This method returns a pointer to the specified type of
120  /// TargetSubtargetInfo. In debug builds, it verifies that the object being
121  /// returned is of the correct type.
122  template <typename STC> const STC &getSubtarget(const Function &F) const {
123  return *static_cast<const STC*>(getSubtargetImpl(F));
124  }
125 
126  /// Create a DataLayout.
127  const DataLayout createDataLayout() const { return DL; }
128 
129  /// Test if a DataLayout if compatible with the CodeGen for this target.
130  ///
131  /// The LLVM Module owns a DataLayout that is used for the target independent
132  /// optimizations and code generation. This hook provides a target specific
133  /// check on the validity of this DataLayout.
134  bool isCompatibleDataLayout(const DataLayout &Candidate) const {
135  return DL == Candidate;
136  }
137 
138  /// Get the pointer size for this target.
139  ///
140  /// This is the only time the DataLayout in the TargetMachine is used.
141  unsigned getPointerSize(unsigned AS) const {
142  return DL.getPointerSize(AS);
143  }
144 
145  unsigned getPointerSizeInBits(unsigned AS) const {
146  return DL.getPointerSizeInBits(AS);
147  }
148 
149  unsigned getProgramPointerSize() const {
150  return DL.getPointerSize(DL.getProgramAddressSpace());
151  }
152 
153  unsigned getAllocaPointerSize() const {
154  return DL.getPointerSize(DL.getAllocaAddrSpace());
155  }
156 
157  /// Reset the target options based on the function's attributes.
158  // FIXME: Remove TargetOptions that affect per-function code generation
159  // from TargetMachine.
160  void resetTargetOptions(const Function &F) const;
161 
162  /// Return target specific asm information.
163  const MCAsmInfo *getMCAsmInfo() const { return AsmInfo; }
164 
165  const MCRegisterInfo *getMCRegisterInfo() const { return MRI; }
166  const MCInstrInfo *getMCInstrInfo() const { return MII; }
167  const MCSubtargetInfo *getMCSubtargetInfo() const { return STI; }
168 
169  /// If intrinsic information is available, return it. If not, return null.
170  virtual const TargetIntrinsicInfo *getIntrinsicInfo() const {
171  return nullptr;
172  }
173 
174  bool requiresStructuredCFG() const { return RequireStructuredCFG; }
175  void setRequiresStructuredCFG(bool Value) { RequireStructuredCFG = Value; }
176 
177  /// Returns the code generation relocation model. The choices are static, PIC,
178  /// and dynamic-no-pic, and target default.
179  Reloc::Model getRelocationModel() const;
180 
181  /// Returns the code model. The choices are small, kernel, medium, large, and
182  /// target default.
183  CodeModel::Model getCodeModel() const;
184 
185  bool isPositionIndependent() const;
186 
187  bool shouldAssumeDSOLocal(const Module &M, const GlobalValue *GV) const;
188 
189  /// Returns true if this target uses emulated TLS.
190  bool useEmulatedTLS() const;
191 
192  /// Returns the TLS model which should be used for the given global variable.
193  TLSModel::Model getTLSModel(const GlobalValue *GV) const;
194 
195  /// Returns the optimization level: None, Less, Default, or Aggressive.
196  CodeGenOpt::Level getOptLevel() const;
197 
198  /// Overrides the optimization level.
199  void setOptLevel(CodeGenOpt::Level Level);
200 
201  void setFastISel(bool Enable) { Options.EnableFastISel = Enable; }
202  bool getO0WantsFastISel() { return O0WantsFastISel; }
203  void setO0WantsFastISel(bool Enable) { O0WantsFastISel = Enable; }
204  void setGlobalISel(bool Enable) { Options.EnableGlobalISel = Enable; }
205 
206  bool shouldPrintMachineCode() const { return Options.PrintMachineCode; }
207 
208  bool getUniqueSectionNames() const { return Options.UniqueSectionNames; }
209 
210  /// Return true if data objects should be emitted into their own section,
211  /// corresponds to -fdata-sections.
212  bool getDataSections() const {
213  return Options.DataSections;
214  }
215 
216  /// Return true if functions should be emitted into their own section,
217  /// corresponding to -ffunction-sections.
218  bool getFunctionSections() const {
219  return Options.FunctionSections;
220  }
221 
222  /// Get a \c TargetIRAnalysis appropriate for the target.
223  ///
224  /// This is used to construct the new pass manager's target IR analysis pass,
225  /// set up appropriately for this target machine. Even the old pass manager
226  /// uses this to answer queries about the IR.
227  TargetIRAnalysis getTargetIRAnalysis();
228 
229  /// Return a TargetTransformInfo for a given function.
230  ///
231  /// The returned TargetTransformInfo is specialized to the subtarget
232  /// corresponding to \p F.
233  virtual TargetTransformInfo getTargetTransformInfo(const Function &F);
234 
235  /// Allow the target to modify the pass manager, e.g. by calling
236  /// PassManagerBuilder::addExtension.
238 
239  /// These enums are meant to be passed into addPassesToEmitFile to indicate
240  /// what type of file to emit, and returned by it to indicate what type of
241  /// file could actually be made.
245  CGFT_Null // Do not emit any output.
246  };
247 
248  /// Add passes to the specified pass manager to get the specified file
249  /// emitted. Typically this will involve several steps of code generation.
250  /// This method should return true if emission of this file type is not
251  /// supported, or false on success.
252  /// \p MMI is an optional parameter that, if set to non-nullptr,
253  /// will be used to set the MachineModuloInfo for this PM.
256  bool /*DisableVerify*/ = true,
257  MachineModuleInfo *MMI = nullptr) {
258  return true;
259  }
260 
261  /// Add passes to the specified pass manager to get machine code emitted with
262  /// the MCJIT. This method returns true if machine code is not supported. It
263  /// fills the MCContext Ctx pointer which can be used to build custom
264  /// MCStreamer.
265  ///
268  bool /*DisableVerify*/ = true) {
269  return true;
270  }
271 
272  /// True if subtarget inserts the final scheduling pass on its own.
273  ///
274  /// Branch relaxation, which must happen after block placement, can
275  /// on some targets (e.g. SystemZ) expose additional post-RA
276  /// scheduling opportunities.
277  virtual bool targetSchedulesPostRAScheduling() const { return false; };
278 
279  void getNameWithPrefix(SmallVectorImpl<char> &Name, const GlobalValue *GV,
280  Mangler &Mang, bool MayAlwaysUsePrivate = false) const;
281  MCSymbol *getSymbol(const GlobalValue *GV) const;
282 
283  /// True if the target uses physical regs at Prolog/Epilog insertion
284  /// time. If true (most machines), all vregs must be allocated before
285  /// PEI. If false (virtual-register machines), then callee-save register
286  /// spilling and scavenging are not needed or used.
287  virtual bool usesPhysRegsForPEI() const { return true; }
288 
289  /// True if the target wants to use interprocedural register allocation by
290  /// default. The -enable-ipra flag can be used to override this.
291  virtual bool useIPRA() const {
292  return false;
293  }
294 };
295 
296 /// This class describes a target machine that is implemented with the LLVM
297 /// target-independent code generator.
298 ///
300 protected: // Can only create subclasses.
301  LLVMTargetMachine(const Target &T, StringRef DataLayoutString,
302  const Triple &TargetTriple, StringRef CPU, StringRef FS,
303  const TargetOptions &Options, Reloc::Model RM,
305 
306  void initAsmInfo();
307 
308 public:
309  /// Get a TargetTransformInfo implementation for the target.
310  ///
311  /// The TTI returned uses the common code generator to answer queries about
312  /// the IR.
313  TargetTransformInfo getTargetTransformInfo(const Function &F) override;
314 
315  /// Create a pass configuration object to be used by addPassToEmitX methods
316  /// for generating a pipeline of CodeGen passes.
317  virtual TargetPassConfig *createPassConfig(PassManagerBase &PM);
318 
319  /// Add passes to the specified pass manager to get the specified file
320  /// emitted. Typically this will involve several steps of code generation.
321  /// \p MMI is an optional parameter that, if set to non-nullptr,
322  /// will be used to set the MachineModuloInfofor this PM.
323  bool addPassesToEmitFile(PassManagerBase &PM, raw_pwrite_stream &Out,
324  raw_pwrite_stream *DwoOut, CodeGenFileType FileType,
325  bool DisableVerify = true,
326  MachineModuleInfo *MMI = nullptr) override;
327 
328  /// Add passes to the specified pass manager to get machine code emitted with
329  /// the MCJIT. This method returns true if machine code is not supported. It
330  /// fills the MCContext Ctx pointer which can be used to build custom
331  /// MCStreamer.
332  bool addPassesToEmitMC(PassManagerBase &PM, MCContext *&Ctx,
333  raw_pwrite_stream &OS,
334  bool DisableVerify = true) override;
335 
336  /// Returns true if the target is expected to pass all machine verifier
337  /// checks. This is a stopgap measure to fix targets one by one. We will
338  /// remove this at some point and always enable the verifier when
339  /// EXPENSIVE_CHECKS is enabled.
340  virtual bool isMachineVerifierClean() const { return true; }
341 
342  /// Adds an AsmPrinter pass to the pipeline that prints assembly or
343  /// machine code from the MI representation.
344  bool addAsmPrinter(PassManagerBase &PM, raw_pwrite_stream &Out,
345  raw_pwrite_stream *DwoOut, CodeGenFileType FileTYpe,
346  MCContext &Context);
347 };
348 
349 } // end namespace llvm
350 
351 #endif // LLVM_TARGET_TARGETMACHINE_H
const MCRegisterInfo * getMCRegisterInfo() const
A parsed version of the target data layout string in and methods for querying it. ...
Definition: DataLayout.h:111
StringRef getTargetFeatureString() const
unsigned PrintMachineCode
PrintMachineCode - This flag is enabled when the -print-machineinstrs option is specified on the comm...
LLVMContext & Context
PassManagerBuilder - This class is used to set up a standard optimization sequence for languages like...
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
virtual bool addPassesToEmitMC(PassManagerBase &, MCContext *&, raw_pwrite_stream &, bool=true)
Add passes to the specified pass manager to get machine code emitted with the MCJIT.
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:42
unsigned EnableFastISel
EnableFastISel - This flag enables fast-path instruction selection which trades away generated code q...
A Module instance is used to store all the information related to an LLVM module. ...
Definition: Module.h:63
Triple TargetTriple
Triple string, CPU name, and target feature strings the TargetMachine instance is created with...
Definition: TargetMachine.h:78
unsigned DataSections
Emit data into separate sections.
bool requiresStructuredCFG() const
void setO0WantsFastISel(bool Enable)
Analysis pass providing the TargetTransformInfo.
unsigned getPointerSizeInBits(unsigned AS=0) const
Layout pointer size, in bits FIXME: The defaults need to be removed once all of the backends/clients ...
Definition: DataLayout.h:360
unsigned getProgramPointerSize() const
F(f)
const DataLayout createDataLayout() const
Create a DataLayout.
virtual bool addPassesToEmitFile(PassManagerBase &, raw_pwrite_stream &, raw_pwrite_stream *, CodeGenFileType, bool=true, MachineModuleInfo *MMI=nullptr)
Add passes to the specified pass manager to get the specified file emitted.
unsigned getAllocaAddrSpace() const
Definition: DataLayout.h:258
bool isCompatibleDataLayout(const DataLayout &Candidate) const
Test if a DataLayout if compatible with the CodeGen for this target.
Target-Independent Code Generator Pass Configuration Options.
const MCAsmInfo * AsmInfo
Contains target specific asm information.
Definition: TargetMachine.h:87
virtual bool isMachineVerifierClean() const
Returns true if the target is expected to pass all machine verifier checks.
Context object for machine code objects.
Definition: MCContext.h:63
const MCSubtargetInfo * STI
Definition: TargetMachine.h:91
unsigned FunctionSections
Emit functions into separate sections.
unsigned getPointerSizeInBits(unsigned AS) const
StringRef getTargetCPU() const
unsigned UniqueSectionNames
Expected< const typename ELFT::Sym * > getSymbol(typename ELFT::SymRange Symbols, uint32_t Index)
Definition: ELF.h:320
bool getDataSections() const
Return true if data objects should be emitted into their own section, corresponds to -fdata-sections...
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
unsigned getAllocaPointerSize() const
unsigned EnableGlobalISel
EnableGlobalISel - This flag enables global instruction selection.
This class is intended to be used as a base class for asm properties and features specific to the tar...
Definition: MCAsmInfo.h:56
bool getFunctionSections() const
Return true if functions should be emitted into their own section, corresponding to -ffunction-sectio...
unsigned const MachineRegisterInfo * MRI
virtual bool useIPRA() const
True if the target wants to use interprocedural register allocation by default.
unsigned getPointerSize(unsigned AS=0) const
Layout pointer size FIXME: The defaults need to be removed once all of the backends/clients are updat...
Definition: DataLayout.cpp:629
const MCAsmInfo * getMCAsmInfo() const
Return target specific asm information.
Interface to description of machine instruction set.
Definition: MCInstrInfo.h:24
This class describes a target machine that is implemented with the LLVM target-independent code gener...
const Triple & getTargetTriple() const
const Target & TheTarget
The Target that this machine was created for.
Definition: TargetMachine.h:66
const Target & getTarget() const
const AMDGPUAS & AS
const MCInstrInfo * MII
Definition: TargetMachine.h:90
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
unsigned getPointerSize(unsigned AS) const
Get the pointer size for this target.
TargetIntrinsicInfo - Interface to description of machine instruction set.
const TargetOptions DefaultOptions
Definition: TargetMachine.h:97
virtual void adjustPassManager(PassManagerBuilder &)
Allow the target to modify the pass manager, e.g.
virtual TargetLoweringObjectFile * getObjFileLowering() const
This pass provides access to the codegen interfaces that are needed for IR-level transformations.
PassManagerBase - An abstract interface to allow code to add passes to a pass manager without having ...
void setRequiresStructuredCFG(bool Value)
void setFastISel(bool Enable)
const MCSubtargetInfo * getMCSubtargetInfo() const
virtual bool targetSchedulesPostRAScheduling() const
True if subtarget inserts the final scheduling pass on its own.
unsigned getProgramAddressSpace() const
Definition: DataLayout.h:260
virtual const TargetSubtargetInfo * getSubtargetImpl(const Function &) const
Virtual method implemented by subclasses that returns a reference to that target&#39;s TargetSubtargetInf...
Target - Wrapper for Target specific information.
std::string TargetCPU
Definition: TargetMachine.h:79
unsigned RequireStructuredCFG
Definition: TargetMachine.h:93
const MCRegisterInfo * MRI
Definition: TargetMachine.h:89
TargetSubtargetInfo - Generic base class for all target subtargets.
bool getUniqueSectionNames() const
unsigned O0WantsFastISel
Definition: TargetMachine.h:94
virtual const TargetIntrinsicInfo * getIntrinsicInfo() const
If intrinsic information is available, return it. If not, return null.
TargetOptions Options
Definition: TargetMachine.h:98
void setGlobalISel(bool Enable)
Generic base class for all target subtargets.
std::string TargetFS
Definition: TargetMachine.h:80
bool shouldPrintMachineCode() const
An abstract base class for streams implementations that also support a pwrite operation.
Definition: raw_ostream.h:341
const DataLayout DL
DataLayout for the target: keep ABI type size and alignment.
Definition: TargetMachine.h:74
const MCInstrInfo * getMCInstrInfo() const
LLVM Value Representation.
Definition: Value.h:73
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:59
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:49
CodeGenFileType
These enums are meant to be passed into addPassesToEmitFile to indicate what type of file to emit...
const STC & getSubtarget(const Function &F) const
This method returns a pointer to the specified type of TargetSubtargetInfo.
virtual bool usesPhysRegsForPEI() const
True if the target uses physical regs at Prolog/Epilog insertion time.
This class contains meta information specific to a module.