LLVM  12.0.0git
WebAssemblyISelLowering.h
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1 //- WebAssemblyISelLowering.h - WebAssembly DAG Lowering Interface -*- C++ -*-//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 ///
9 /// \file
10 /// This file defines the interfaces that WebAssembly uses to lower LLVM
11 /// code into a selection DAG.
12 ///
13 //===----------------------------------------------------------------------===//
14 
15 #ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYISELLOWERING_H
16 #define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYISELLOWERING_H
17 
19 
20 namespace llvm {
21 
22 namespace WebAssemblyISD {
23 
24 enum NodeType : unsigned {
26 #define HANDLE_NODETYPE(NODE) NODE,
27 #define HANDLE_MEM_NODETYPE(NODE)
28 #include "WebAssemblyISD.def"
30 #undef HANDLE_NODETYPE
31 #undef HANDLE_MEM_NODETYPE
32 #define HANDLE_NODETYPE(NODE)
33 #define HANDLE_MEM_NODETYPE(NODE) NODE,
34 #include "WebAssemblyISD.def"
35 #undef HANDLE_NODETYPE
36 #undef HANDLE_MEM_NODETYPE
37 };
38 
39 } // end namespace WebAssemblyISD
40 
42 
44 public:
46  const WebAssemblySubtarget &STI);
47 
48 private:
49  /// Keep a pointer to the WebAssemblySubtarget around so that we can make the
50  /// right decision when generating code for different targets.
51  const WebAssemblySubtarget *Subtarget;
52 
53  AtomicExpansionKind shouldExpandAtomicRMWInIR(AtomicRMWInst *) const override;
55  const TargetLibraryInfo *LibInfo) const override;
56  MVT getScalarShiftAmountTy(const DataLayout &DL, EVT) const override;
58  EmitInstrWithCustomInserter(MachineInstr &MI,
59  MachineBasicBlock *MBB) const override;
60  const char *getTargetNodeName(unsigned Opcode) const override;
61  std::pair<unsigned, const TargetRegisterClass *>
62  getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
63  StringRef Constraint, MVT VT) const override;
64  bool isCheapToSpeculateCttz() const override;
65  bool isCheapToSpeculateCtlz() const override;
66  bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
67  unsigned AS,
68  Instruction *I = nullptr) const override;
69  bool allowsMisalignedMemoryAccesses(EVT, unsigned AddrSpace, unsigned Align,
71  bool *Fast) const override;
72  bool isIntDivCheap(EVT VT, AttributeList Attr) const override;
73  bool isVectorLoadExtDesirable(SDValue ExtVal) const override;
74  EVT getSetCCResultType(const DataLayout &DL, LLVMContext &Context,
75  EVT VT) const override;
76  bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I,
77  MachineFunction &MF,
78  unsigned Intrinsic) const override;
79 
80  SDValue LowerCall(CallLoweringInfo &CLI,
81  SmallVectorImpl<SDValue> &InVals) const override;
82  bool CanLowerReturn(CallingConv::ID CallConv, MachineFunction &MF,
83  bool isVarArg,
84  const SmallVectorImpl<ISD::OutputArg> &Outs,
85  LLVMContext &Context) const override;
86  SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg,
87  const SmallVectorImpl<ISD::OutputArg> &Outs,
88  const SmallVectorImpl<SDValue> &OutVals, const SDLoc &dl,
89  SelectionDAG &DAG) const override;
90  SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,
91  bool IsVarArg,
92  const SmallVectorImpl<ISD::InputArg> &Ins,
93  const SDLoc &DL, SelectionDAG &DAG,
94  SmallVectorImpl<SDValue> &InVals) const override;
95 
96  void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue> &Results,
97  SelectionDAG &DAG) const override;
98 
99  const char *getClearCacheBuiltinName() const override {
100  report_fatal_error("llvm.clear_cache is not supported on wasm");
101  }
102 
103  // Custom lowering hooks.
104  SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
105  SDValue LowerFrameIndex(SDValue Op, SelectionDAG &DAG) const;
106  SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const;
107  SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const;
108  SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
109  SDValue LowerExternalSymbol(SDValue Op, SelectionDAG &DAG) const;
110  SDValue LowerBR_JT(SDValue Op, SelectionDAG &DAG) const;
111  SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const;
112  SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG) const;
113  SDValue LowerCopyToReg(SDValue Op, SelectionDAG &DAG) const;
114  SDValue LowerIntrinsic(SDValue Op, SelectionDAG &DAG) const;
115  SDValue LowerSIGN_EXTEND_INREG(SDValue Op, SelectionDAG &DAG) const;
116  SDValue LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const;
117  SDValue LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const;
118  SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG) const;
119  SDValue LowerAccessVectorElement(SDValue Op, SelectionDAG &DAG) const;
120  SDValue LowerShift(SDValue Op, SelectionDAG &DAG) const;
121 
122  // Custom DAG combine hooks
123  SDValue
124  PerformDAGCombine(SDNode *N,
125  TargetLowering::DAGCombinerInfo &DCI) const override;
126 };
127 
128 namespace WebAssembly {
129 FastISel *createFastISel(FunctionLoweringInfo &funcInfo,
130  const TargetLibraryInfo *libInfo);
131 } // end namespace WebAssembly
132 
133 } // end namespace llvm
134 
135 #endif
BUILTIN_OP_END - This must be the last enum value in this list.
Definition: ISDOpcodes.h:1111
A parsed version of the target data layout string in and methods for querying it. ...
Definition: DataLayout.h:111
This represents an addressing mode of: BaseGV + BaseOffs + BaseReg + Scale*ScaleReg If BaseGV is null...
LLVMContext & Context
LLVM_ATTRIBUTE_NORETURN void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
Definition: Error.cpp:140
This class represents lattice values for constants.
Definition: AllocatorList.h:23
Function Alias Analysis Results
unsigned const TargetRegisterInfo * TRI
an instruction that atomically reads a memory location, combines it with another value, and then stores the result back.
Definition: Instructions.h:701
AtomicExpansionKind
Enum that specifies what an atomic load/AtomicRMWInst is expanded to, if at all.
MachineBasicBlock & MBB
FastISel * createFastISel(FunctionLoweringInfo &funcInfo, const TargetLibraryInfo *libInfo)
static SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG, const SparcTargetLowering &TLI, const SparcSubtarget *Subtarget)
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
This is a fast-path instruction selection class that generates poor code and doesn&#39;t support illegal ...
Definition: FastISel.h:65
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
Analysis containing CSE Info
Definition: CSEInfo.cpp:25
static SDValue LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG, const ARMSubtarget *ST)
Machine Value Type.
static SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG)
The instances of the Type class are immutable: once they are created, they are never changed...
Definition: Type.h:46
static SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG, const SparcSubtarget *Subtarget)
Extended Value Type.
Definition: ValueTypes.h:35
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:39
static SDValue LowerShift(SDNode *N, SelectionDAG &DAG, const ARMSubtarget *ST)
Provides information about what library functions are available for the current target.
static const int FIRST_TARGET_MEMORY_OPCODE
FIRST_TARGET_MEMORY_OPCODE - Target-specific pre-isel operations which do not reference a specific me...
Definition: ISDOpcodes.h:1123
Flags
Flags values. These may be or&#39;d together.
Representation of each machine instruction.
Definition: MachineInstr.h:62
#define I(x, y, z)
Definition: MD5.cpp:59
#define N
FunctionLoweringInfo - This contains information that is global to a function that is used when lower...
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:65
IRTranslator LLVM IR MI
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:57
Fast - This calling convention attempts to make calls as fast as possible (e.g.
Definition: CallingConv.h:42
This file describes how to lower LLVM code to machine code.
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL