LLVM  6.0.0svn
WebAssemblyMachineFunctionInfo.cpp
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1 //=- WebAssemblyMachineFunctionInfo.cpp - WebAssembly Machine Function Info -=//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 ///
10 /// \file
11 /// \brief This file implements WebAssembly-specific per-machine-function
12 /// information.
13 ///
14 //===----------------------------------------------------------------------===//
15 
18 #include "WebAssemblySubtarget.h"
19 #include "llvm/CodeGen/Analysis.h"
20 using namespace llvm;
21 
23 
25  assert(WARegs.empty());
26  unsigned Reg = UnusedReg;
27  WARegs.resize(MF.getRegInfo().getNumVirtRegs(), Reg);
28 }
29 
31  Type *Ty, SmallVectorImpl<MVT> &ValueVTs) {
32  const DataLayout &DL(F.getParent()->getDataLayout());
33  const WebAssemblyTargetLowering &TLI =
34  *TM.getSubtarget<WebAssemblySubtarget>(F).getTargetLowering();
36  ComputeValueVTs(TLI, DL, Ty, VTs);
37 
38  for (EVT VT : VTs) {
39  unsigned NumRegs = TLI.getNumRegisters(F.getContext(), VT);
40  MVT RegisterVT = TLI.getRegisterType(F.getContext(), VT);
41  for (unsigned i = 0; i != NumRegs; ++i)
42  ValueVTs.push_back(RegisterVT);
43  }
44 }
45 
47  SmallVectorImpl<MVT> &Params,
48  SmallVectorImpl<MVT> &Results) {
49  ComputeLegalValueVTs(F, TM, F.getReturnType(), Results);
50 
51  if (Results.size() > 1) {
52  // WebAssembly currently can't lower returns of multiple values without
53  // demoting to sret (see WebAssemblyTargetLowering::CanLowerReturn). So
54  // replace multiple return values with a pointer parameter.
55  Results.clear();
56  Params.push_back(
58  }
59 
60  for (auto &Arg : F.args())
61  ComputeLegalValueVTs(F, TM, Arg.getType(), Params);
62 }
static MVT getIntegerVT(unsigned BitWidth)
This file defines the interfaces that WebAssembly uses to lower LLVM code into a selection DAG...
A parsed version of the target data layout string in and methods for querying it. ...
Definition: DataLayout.h:109
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
LLVM_ATTRIBUTE_ALWAYS_INLINE size_type size() const
Definition: SmallVector.h:136
unsigned getPointerSizeInBits(unsigned AS=0) const
Layout pointer size, in bits FIXME: The defaults need to be removed once all of the backends/clients ...
Definition: DataLayout.h:344
F(f)
const DataLayout createDataLayout() const
Create a DataLayout.
const DataLayout & getDataLayout() const
Get the data layout for the module&#39;s target platform.
Definition: Module.cpp:361
void ComputeLegalValueVTs(const Function &F, const TargetMachine &TM, Type *Ty, SmallVectorImpl< MVT > &ValueVTs)
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:42
Reg
All possible values of the reg field in the ModR/M byte.
Type * getType() const
All values are typed, get the type of this value.
Definition: Value.h:245
void ComputeValueVTs(const TargetLowering &TLI, const DataLayout &DL, Type *Ty, SmallVectorImpl< EVT > &ValueVTs, SmallVectorImpl< uint64_t > *Offsets=nullptr, uint64_t StartingOffset=0)
ComputeValueVTs - Given an LLVM IR type, compute a sequence of EVTs that represent all the individual...
Definition: Analysis.cpp:85
Type * getReturnType() const
Returns the type of the ret val.
Definition: Function.h:150
Machine Value Type.
The instances of the Type class are immutable: once they are created, they are never changed...
Definition: Type.h:46
void ComputeSignatureVTs(const Function &F, const TargetMachine &TM, SmallVectorImpl< MVT > &Params, SmallVectorImpl< MVT > &Results)
unsigned getNumVirtRegs() const
getNumVirtRegs - Return the number of virtual registers created.
LLVMContext & getContext() const
getContext - Return a reference to the LLVMContext associated with this function. ...
Definition: Function.cpp:194
Extended Value Type.
Definition: ValueTypes.h:34
This file declares the WebAssembly-specific subclass of TargetSubtarget.
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:864
amdgpu Simplify well known AMD library false Value Value * Arg
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
This file declares WebAssembly-specific per-machine-function information.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:556
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:57
const STC & getSubtarget(const Function &F) const
This method returns a pointer to the specified type of TargetSubtargetInfo.
iterator_range< arg_iterator > args()
Definition: Function.h:621