LLVM  9.0.0svn
WebAssemblyMachineFunctionInfo.h
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1 // WebAssemblyMachineFunctionInfo.h-WebAssembly machine function info-*- C++ -*-
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 ///
9 /// \file
10 /// This file declares WebAssembly-specific per-machine-function
11 /// information.
12 ///
13 //===----------------------------------------------------------------------===//
14 
15 #ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYMACHINEFUNCTIONINFO_H
16 #define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYMACHINEFUNCTIONINFO_H
17 
19 #include "llvm/BinaryFormat/Wasm.h"
21 #include "llvm/MC/MCSymbolWasm.h"
22 
23 namespace llvm {
24 
25 /// This class is derived from MachineFunctionInfo and contains private
26 /// WebAssembly-specific information for each MachineFunction.
28  MachineFunction &MF;
29 
30  std::vector<MVT> Params;
31  std::vector<MVT> Results;
32  std::vector<MVT> Locals;
33 
34  /// A mapping from CodeGen vreg index to WebAssembly register number.
35  std::vector<unsigned> WARegs;
36 
37  /// A mapping from CodeGen vreg index to a boolean value indicating whether
38  /// the given register is considered to be "stackified", meaning it has been
39  /// determined or made to meet the stack requirements:
40  /// - single use (per path)
41  /// - single def (per path)
42  /// - defined and used in LIFO order with other stack registers
43  BitVector VRegStackified;
44 
45  // A virtual register holding the pointer to the vararg buffer for vararg
46  // functions. It is created and set in TLI::LowerFormalArguments and read by
47  // TLI::LowerVASTART
48  unsigned VarargVreg = -1U;
49 
50  // A virtual register holding the base pointer for functions that have
51  // overaligned values on the user stack.
52  unsigned BasePtrVreg = -1U;
53 
54 public:
55  explicit WebAssemblyFunctionInfo(MachineFunction &MF) : MF(MF) {}
56  ~WebAssemblyFunctionInfo() override;
57 
58  void addParam(MVT VT) { Params.push_back(VT); }
59  const std::vector<MVT> &getParams() const { return Params; }
60 
61  void addResult(MVT VT) { Results.push_back(VT); }
62  const std::vector<MVT> &getResults() const { return Results; }
63 
65  Params.clear();
66  Results.clear();
67  }
68 
69  void setNumLocals(size_t NumLocals) { Locals.resize(NumLocals, MVT::i32); }
70  void setLocal(size_t i, MVT VT) { Locals[i] = VT; }
71  void addLocal(MVT VT) { Locals.push_back(VT); }
72  const std::vector<MVT> &getLocals() const { return Locals; }
73 
74  unsigned getVarargBufferVreg() const {
75  assert(VarargVreg != -1U && "Vararg vreg hasn't been set");
76  return VarargVreg;
77  }
78  void setVarargBufferVreg(unsigned Reg) { VarargVreg = Reg; }
79 
80  unsigned getBasePointerVreg() const {
81  assert(BasePtrVreg != -1U && "Base ptr vreg hasn't been set");
82  return BasePtrVreg;
83  }
84  void setBasePointerVreg(unsigned Reg) { BasePtrVreg = Reg; }
85 
86  static const unsigned UnusedReg = -1u;
87 
88  void stackifyVReg(unsigned VReg) {
89  assert(MF.getRegInfo().getUniqueVRegDef(VReg));
91  if (I >= VRegStackified.size())
92  VRegStackified.resize(I + 1);
93  VRegStackified.set(I);
94  }
95  bool isVRegStackified(unsigned VReg) const {
97  if (I >= VRegStackified.size())
98  return false;
99  return VRegStackified.test(I);
100  }
101 
102  void initWARegs();
103  void setWAReg(unsigned VReg, unsigned WAReg) {
104  assert(WAReg != UnusedReg);
106  assert(I < WARegs.size());
107  WARegs[I] = WAReg;
108  }
109  unsigned getWAReg(unsigned VReg) const {
111  assert(I < WARegs.size());
112  return WARegs[I];
113  }
114 
115  // For a given stackified WAReg, return the id number to print with push/pop.
116  static unsigned getWARegStackId(unsigned Reg) {
117  assert(Reg & INT32_MIN);
118  return Reg & INT32_MAX;
119  }
120 };
121 
122 void computeLegalValueVTs(const Function &F, const TargetMachine &TM, Type *Ty,
123  SmallVectorImpl<MVT> &ValueVTs);
124 
125 // Compute the signature for a given FunctionType (Ty). Note that it's not the
126 // signature for F (F is just used to get varous context)
127 void computeSignatureVTs(const FunctionType *Ty, const Function &F,
128  const TargetMachine &TM, SmallVectorImpl<MVT> &Params,
129  SmallVectorImpl<MVT> &Results);
130 
131 void valTypesFromMVTs(const ArrayRef<MVT> &In,
133 
134 std::unique_ptr<wasm::WasmSignature>
136  const SmallVectorImpl<MVT> &Params);
137 
138 } // end namespace llvm
139 
140 #endif
void resize(unsigned N, bool t=false)
resize - Grow or shrink the bitvector.
Definition: BitVector.h:371
BitVector & set()
Definition: BitVector.h:397
static unsigned virtReg2Index(unsigned Reg)
Convert a virtual register number to a 0-based index.
This class represents lattice values for constants.
Definition: AllocatorList.h:23
const std::vector< MVT > & getLocals() const
unsigned Reg
bool test(unsigned Idx) const
Definition: BitVector.h:501
void setWAReg(unsigned VReg, unsigned WAReg)
F(f)
void computeSignatureVTs(const FunctionType *Ty, const Function &F, const TargetMachine &TM, SmallVectorImpl< MVT > &Params, SmallVectorImpl< MVT > &Results)
MachineFunctionInfo - This class can be derived from and used by targets to hold private target-speci...
std::unique_ptr< wasm::WasmSignature > signatureFromMVTs(const SmallVectorImpl< MVT > &Results, const SmallVectorImpl< MVT > &Params)
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:41
Class to represent function types.
Definition: DerivedTypes.h:102
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory)...
Definition: APInt.h:32
Machine Value Type.
The instances of the Type class are immutable: once they are created, they are never changed...
Definition: Type.h:45
This file provides WebAssembly-specific target descriptions.
This class is derived from MachineFunctionInfo and contains private WebAssembly-specific information ...
#define I(x, y, z)
Definition: MD5.cpp:58
size_type size() const
size - Returns the number of bits in this bitvector.
Definition: BitVector.h:169
const std::vector< MVT > & getResults() const
unsigned getWAReg(unsigned VReg) const
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
void valTypesFromMVTs(const ArrayRef< MVT > &In, SmallVectorImpl< wasm::ValType > &Out)
void computeLegalValueVTs(const Function &F, const TargetMachine &TM, Type *Ty, SmallVectorImpl< MVT > &ValueVTs)
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:58
const std::vector< MVT > & getParams() const
static unsigned getWARegStackId(unsigned Reg)