LLVM 19.0.0git
WebAssemblyReplacePhysRegs.cpp
Go to the documentation of this file.
1//===-- WebAssemblyReplacePhysRegs.cpp - Replace phys regs with virt regs -===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8///
9/// \file
10/// This file implements a pass that replaces physical registers with
11/// virtual registers.
12///
13/// LLVM expects certain physical registers, such as a stack pointer. However,
14/// WebAssembly doesn't actually have such physical registers. This pass is run
15/// once LLVM no longer needs these registers, and replaces them with virtual
16/// registers, so they can participate in register stackifying and coloring in
17/// the normal way.
18///
19//===----------------------------------------------------------------------===//
20
22#include "WebAssembly.h"
27#include "llvm/CodeGen/Passes.h"
28#include "llvm/Support/Debug.h"
30using namespace llvm;
31
32#define DEBUG_TYPE "wasm-replace-phys-regs"
33
34namespace {
35class WebAssemblyReplacePhysRegs final : public MachineFunctionPass {
36public:
37 static char ID; // Pass identification, replacement for typeid
38 WebAssemblyReplacePhysRegs() : MachineFunctionPass(ID) {}
39
40private:
41 StringRef getPassName() const override {
42 return "WebAssembly Replace Physical Registers";
43 }
44
45 void getAnalysisUsage(AnalysisUsage &AU) const override {
46 AU.setPreservesCFG();
48 }
49
50 bool runOnMachineFunction(MachineFunction &MF) override;
51};
52} // end anonymous namespace
53
54char WebAssemblyReplacePhysRegs::ID = 0;
55INITIALIZE_PASS(WebAssemblyReplacePhysRegs, DEBUG_TYPE,
56 "Replace physical registers with virtual registers", false,
57 false)
58
60 return new WebAssemblyReplacePhysRegs();
61}
62
63bool WebAssemblyReplacePhysRegs::runOnMachineFunction(MachineFunction &MF) {
65 dbgs() << "********** Replace Physical Registers **********\n"
66 << "********** Function: " << MF.getName() << '\n';
67 });
68
70 auto &TRI = *MF.getSubtarget<WebAssemblySubtarget>().getRegisterInfo();
71 bool Changed = false;
72
73 assert(!mustPreserveAnalysisID(LiveIntervalsID) &&
74 "LiveIntervals shouldn't be active yet!");
75
76 for (unsigned PReg = WebAssembly::NoRegister + 1;
77 PReg < WebAssembly::NUM_TARGET_REGS; ++PReg) {
78 // Skip fake registers that are never used explicitly.
79 if (PReg == WebAssembly::VALUE_STACK || PReg == WebAssembly::ARGUMENTS)
80 continue;
81
82 // Replace explicit uses of the physical register with a virtual register.
83 const TargetRegisterClass *RC = TRI.getMinimalPhysRegClass(PReg);
84 unsigned VReg = WebAssembly::NoRegister;
85 for (MachineOperand &MO :
86 llvm::make_early_inc_range(MRI.reg_operands(PReg))) {
87 if (!MO.isImplicit()) {
88 if (VReg == WebAssembly::NoRegister) {
89 VReg = MRI.createVirtualRegister(RC);
90 if (PReg == TRI.getFrameRegister(MF)) {
91 auto FI = MF.getInfo<WebAssemblyFunctionInfo>();
92 assert(!FI->isFrameBaseVirtual());
93 FI->setFrameBaseVreg(VReg);
95 dbgs() << "replacing preg " << PReg << " with " << VReg << " ("
96 << Register::virtReg2Index(VReg) << ")\n";
97 });
98 }
99 }
100 MO.setReg(VReg);
101 Changed = true;
102 }
103 }
104 }
105
106 return Changed;
107}
unsigned const MachineRegisterInfo * MRI
#define LLVM_DEBUG(X)
Definition: Debug.h:101
unsigned const TargetRegisterInfo * TRI
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
Definition: PassSupport.h:38
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This file provides WebAssembly-specific target descriptions.
This file declares WebAssembly-specific per-machine-function information.
#define DEBUG_TYPE
This file declares the WebAssembly-specific subclass of TargetSubtarget.
This file contains the entry points for global functions defined in the LLVM WebAssembly back-end.
Represent the analysis usage information of a pass.
void setPreservesCFG()
This function should be called by the pass, iff they do not:
Definition: Pass.cpp:269
FunctionPass class - This class is used to implement most global optimizations.
Definition: Pass.h:311
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
virtual bool runOnMachineFunction(MachineFunction &MF)=0
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
MachineOperand class - Representation of each machine instruction operand.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
virtual StringRef getPassName() const
getPassName - Return a nice clean name for a pass.
Definition: Pass.cpp:81
static unsigned virtReg2Index(Register Reg)
Convert a virtual register number to a 0-based index.
Definition: Register.h:77
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
This class is derived from MachineFunctionInfo and contains private WebAssembly-specific information ...
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
iterator_range< early_inc_iterator_impl< detail::IterOfRange< RangeT > > > make_early_inc_range(RangeT &&Range)
Make a range that does early increment to allow mutation of the underlying range without disrupting i...
Definition: STLExtras.h:656
FunctionPass * createWebAssemblyReplacePhysRegs()
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:163
char & LiveIntervalsID
LiveIntervals - This analysis keeps track of the live ranges of virtual and physical registers.