LLVM  9.0.0svn
WebAssemblyTargetMachine.cpp
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1 //===- WebAssemblyTargetMachine.cpp - Define TargetMachine for WebAssembly -==//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 ///
9 /// \file
10 /// This file defines the WebAssembly-specific subclass of TargetMachine.
11 ///
12 //===----------------------------------------------------------------------===//
13 
16 #include "WebAssembly.h"
20 #include "llvm/CodeGen/Passes.h"
23 #include "llvm/IR/Function.h"
26 #include "llvm/Transforms/Scalar.h"
27 #include "llvm/Transforms/Utils.h"
28 using namespace llvm;
29 
30 #define DEBUG_TYPE "wasm"
31 
32 // Emscripten's asm.js-style exception handling
34  "enable-emscripten-cxx-exceptions",
35  cl::desc("WebAssembly Emscripten-style exception handling"),
36  cl::init(false));
37 
38 // Emscripten's asm.js-style setjmp/longjmp handling
40  "enable-emscripten-sjlj",
41  cl::desc("WebAssembly Emscripten-style setjmp/longjmp handling"),
42  cl::init(false));
43 
45  // Register the target.
50 
51  // Register backend passes
52  auto &PR = *PassRegistry::getPassRegistry();
76 }
77 
78 //===----------------------------------------------------------------------===//
79 // WebAssembly Lowering public interface.
80 //===----------------------------------------------------------------------===//
81 
83  if (!RM.hasValue()) {
84  // Default to static relocation model. This should always be more optimial
85  // than PIC since the static linker can determine all global addresses and
86  // assume direct function calls.
87  return Reloc::Static;
88  }
89  return *RM;
90 }
91 
92 /// Create an WebAssembly architecture model.
93 ///
95  const Target &T, const Triple &TT, StringRef CPU, StringRef FS,
96  const TargetOptions &Options, Optional<Reloc::Model> RM,
99  TT.isArch64Bit() ? "e-m:e-p:64:64-i64:64-n32:64-S128"
100  : "e-m:e-p:32:32-i64:64-n32:64-S128",
101  TT, CPU, FS, Options, getEffectiveRelocModel(RM),
102  getEffectiveCodeModel(CM, CodeModel::Large), OL),
103  TLOF(new WebAssemblyTargetObjectFile()) {
104  // WebAssembly type-checks instructions, but a noreturn function with a return
105  // type that doesn't match the context will cause a check failure. So we lower
106  // LLVM 'unreachable' to ISD::TRAP and then lower that to WebAssembly's
107  // 'unreachable' instructions which is meant for that case.
108  this->Options.TrapUnreachable = true;
109 
110  // WebAssembly treats each function as an independent unit. Force
111  // -ffunction-sections, effectively, so that we can emit them independently.
112  this->Options.FunctionSections = true;
113  this->Options.DataSections = true;
114  this->Options.UniqueSectionNames = true;
115 
116  initAsmInfo();
117 
118  // Note that we don't use setRequiresStructuredCFG(true). It disables
119  // optimizations than we're ok with, and want, such as critical edge
120  // splitting and tail merging.
121 }
122 
124 
125 const WebAssemblySubtarget *
127  Attribute CPUAttr = F.getFnAttribute("target-cpu");
128  Attribute FSAttr = F.getFnAttribute("target-features");
129 
130  std::string CPU = !CPUAttr.hasAttribute(Attribute::None)
131  ? CPUAttr.getValueAsString().str()
132  : TargetCPU;
133  std::string FS = !FSAttr.hasAttribute(Attribute::None)
134  ? FSAttr.getValueAsString().str()
135  : TargetFS;
136 
137  auto &I = SubtargetMap[CPU + FS];
138  if (!I) {
139  // This needs to be done before we create a new subtarget since any
140  // creation will depend on the TM and the code generation flags on the
141  // function that reside in TargetOptions.
143  I = llvm::make_unique<WebAssemblySubtarget>(TargetTriple, CPU, FS, *this);
144  }
145  return I.get();
146 }
147 
148 namespace {
149 class StripThreadLocal final : public ModulePass {
150  // The default thread model for wasm is single, where thread-local variables
151  // are identical to regular globals and should be treated the same. So this
152  // pass just converts all GlobalVariables to NotThreadLocal
153  static char ID;
154 
155 public:
156  StripThreadLocal() : ModulePass(ID) {}
157  bool runOnModule(Module &M) override {
158  for (auto &GV : M.globals())
159  GV.setThreadLocalMode(GlobalValue::ThreadLocalMode::NotThreadLocal);
160  return true;
161  }
162 };
163 char StripThreadLocal::ID = 0;
164 
165 /// WebAssembly Code Generator Pass Configuration Options.
166 class WebAssemblyPassConfig final : public TargetPassConfig {
167 public:
168  WebAssemblyPassConfig(WebAssemblyTargetMachine &TM, PassManagerBase &PM)
169  : TargetPassConfig(TM, PM) {}
170 
171  WebAssemblyTargetMachine &getWebAssemblyTargetMachine() const {
172  return getTM<WebAssemblyTargetMachine>();
173  }
174 
175  FunctionPass *createTargetRegisterAllocator(bool) override;
176 
177  void addIRPasses() override;
178  bool addInstSelector() override;
179  void addPostRegAlloc() override;
180  bool addGCPasses() override { return false; }
181  void addPreEmitPass() override;
182 };
183 } // end anonymous namespace
184 
187  return TargetTransformInfo(WebAssemblyTTIImpl(this, F));
188 }
189 
192  return new WebAssemblyPassConfig(*this, PM);
193 }
194 
195 FunctionPass *WebAssemblyPassConfig::createTargetRegisterAllocator(bool) {
196  return nullptr; // No reg alloc
197 }
198 
199 //===----------------------------------------------------------------------===//
200 // The following functions are called from lib/CodeGen/Passes.cpp to modify
201 // the CodeGen pass sequence.
202 //===----------------------------------------------------------------------===//
203 
204 void WebAssemblyPassConfig::addIRPasses() {
205  if (TM->Options.ThreadModel == ThreadModel::Single) {
206  // In "single" mode, atomics get lowered to non-atomics.
207  addPass(createLowerAtomicPass());
208  addPass(new StripThreadLocal());
209  } else {
210  // Expand some atomic operations. WebAssemblyTargetLowering has hooks which
211  // control specifically what gets lowered.
212  addPass(createAtomicExpandPass());
213  }
214 
215  // Add signatures to prototype-less function declarations
217 
218  // Lower .llvm.global_dtors into .llvm_global_ctors with __cxa_atexit calls.
220 
221  // Fix function bitcasts, as WebAssembly requires caller and callee signatures
222  // to match.
224 
225  // Optimize "returned" function attributes.
226  if (getOptLevel() != CodeGenOpt::None)
228 
229  // If exception handling is not enabled and setjmp/longjmp handling is
230  // enabled, we lower invokes into calls and delete unreachable landingpad
231  // blocks. Lowering invokes when there is no EH support is done in
232  // TargetPassConfig::addPassesToHandleExceptions, but this runs after this
233  // function and SjLj handling expects all invokes to be lowered before.
234  if (!EnableEmException &&
235  TM->Options.ExceptionModel == ExceptionHandling::None) {
236  addPass(createLowerInvokePass());
237  // The lower invoke pass may create unreachable code. Remove it in order not
238  // to process dead blocks in setjmp/longjmp handling.
240  }
241 
242  // Handle exceptions and setjmp/longjmp if enabled.
245  EnableEmSjLj));
246 
248 }
249 
250 bool WebAssemblyPassConfig::addInstSelector() {
252  addPass(
253  createWebAssemblyISelDag(getWebAssemblyTargetMachine(), getOptLevel()));
254  // Run the argument-move pass immediately after the ScheduleDAG scheduler
255  // so that we can fix up the ARGUMENT instructions before anything else
256  // sees them in the wrong place.
258  // Set the p2align operands. This information is present during ISel, however
259  // it's inconvenient to collect. Collect it now, and update the immediate
260  // operands.
262  return false;
263 }
264 
265 void WebAssemblyPassConfig::addPostRegAlloc() {
266  // TODO: The following CodeGen passes don't currently support code containing
267  // virtual registers. Consider removing their restrictions and re-enabling
268  // them.
269 
270  // These functions all require the NoVRegs property.
271  disablePass(&MachineCopyPropagationID);
272  disablePass(&PostRAMachineSinkingID);
273  disablePass(&PostRASchedulerID);
274  disablePass(&FuncletLayoutID);
275  disablePass(&StackMapLivenessID);
276  disablePass(&LiveDebugValuesID);
277  disablePass(&PatchableFunctionID);
278  disablePass(&ShrinkWrapID);
279 
281 }
282 
283 void WebAssemblyPassConfig::addPreEmitPass() {
285 
286  // Rewrite pseudo call_indirect instructions as real instructions.
287  // This needs to run before register stackification, because we change the
288  // order of the arguments.
290 
291  // Eliminate multiple-entry loops.
293 
294  // Do various transformations for exception handling.
295  // Every CFG-changing optimizations should come before this.
297 
298  // Now that we have a prologue and epilogue and all frame indices are
299  // rewritten, eliminate SP and FP. This allows them to be stackified,
300  // colored, and numbered with the rest of the registers.
302 
303  // Preparations and optimizations related to register stackification.
304  if (getOptLevel() != CodeGenOpt::None) {
305  // LiveIntervals isn't commonly run this late. Re-establish preconditions.
307 
308  // Depend on LiveIntervals and perform some optimizations on it.
310 
311  // Prepare memory intrinsic calls for register stackifying.
313 
314  // Mark registers as representing wasm's value stack. This is a key
315  // code-compression technique in WebAssembly. We run this pass (and
316  // MemIntrinsicResults above) very late, so that it sees as much code as
317  // possible, including code emitted by PEI and expanded by late tail
318  // duplication.
319  addPass(createWebAssemblyRegStackify());
320 
321  // Run the register coloring pass to reduce the total number of registers.
322  // This runs after stackification so that it doesn't consider registers
323  // that become stackified.
324  addPass(createWebAssemblyRegColoring());
325  }
326 
327  // Insert explicit local.get and local.set operators.
329 
330  // Sort the blocks of the CFG into topological order, a prerequisite for
331  // BLOCK and LOOP markers.
332  addPass(createWebAssemblyCFGSort());
333 
334  // Insert BLOCK and LOOP markers.
335  addPass(createWebAssemblyCFGStackify());
336 
337  // Lower br_unless into br_if.
339 
340  // Perform the very last peephole optimizations on the code.
341  if (getOptLevel() != CodeGenOpt::None)
342  addPass(createWebAssemblyPeephole());
343 
344  // Create a mapping from LLVM CodeGen virtual registers to wasm registers.
346 }
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang", "erlang-compatible garbage collector")
FunctionPass * createWebAssemblyLowerBrUnless()
CodeModel::Model getEffectiveCodeModel(Optional< CodeModel::Model > CM, CodeModel::Model Default)
Helper method for getting the code model, returning Default if CM does not have a value...
ModulePass * createWebAssemblyLowerEmscriptenEHSjLj(bool DoEH, bool DoSjLj)
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
LLVM_NODISCARD std::string str() const
str - Get the contents as an std::string.
Definition: StringRef.h:218
static cl::opt< bool > EnableEmSjLj("enable-emscripten-sjlj", cl::desc("WebAssembly Emscripten-style setjmp/longjmp handling"), cl::init(false))
This class represents lattice values for constants.
Definition: AllocatorList.h:23
FunctionPass * createWebAssemblyCFGSort()
void initializeWebAssemblyOptimizeLiveIntervalsPass(PassRegistry &)
virtual void addIRPasses()
Add common target configurable passes that perform LLVM IR to IR transforms following machine indepen...
FunctionPass * createWebAssemblyArgumentMove()
A Module instance is used to store all the information related to an LLVM module. ...
Definition: Module.h:64
Triple TargetTriple
Triple string, CPU name, and target feature strings the TargetMachine instance is created with...
Definition: TargetMachine.h:77
This file a TargetTransformInfo::Concept conforming object specific to the WebAssembly target machine...
unsigned DataSections
Emit data into separate sections.
void initializeWebAssemblyMemIntrinsicResultsPass(PassRegistry &)
char & FuncletLayoutID
This pass lays out funclets contiguously.
FunctionPass * createWebAssemblyPeephole()
void initializeWebAssemblyRegStackifyPass(PassRegistry &)
void initializeWebAssemblyArgumentMovePass(PassRegistry &)
F(f)
void initializeWebAssemblyFixIrreducibleControlFlowPass(PassRegistry &)
This file contains the entry points for global functions defined in the LLVM WebAssembly back-end...
virtual void addPreEmitPass()
This pass may be implemented by targets that want to run passes immediately before machine code is em...
static GCMetadataPrinterRegistry::Add< OcamlGCMetadataPrinter > Y("ocaml", "ocaml 3.10-compatible collector")
FunctionPass * createWebAssemblyRegStackify()
FunctionPass * createWebAssemblyOptimizeReturned()
This file declares the WebAssembly-specific subclass of TargetLoweringObjectFile. ...
void resetTargetOptions(const Function &F) const
Reset the target options based on the function&#39;s attributes.
FunctionPass * createWebAssemblyRegNumbering()
FunctionPass * createLowerInvokePass()
Definition: LowerInvoke.cpp:86
void initializeWebAssemblyRegNumberingPass(PassRegistry &)
No attributes have been set.
Definition: Attributes.h:71
void initializeWebAssemblyExceptionInfoPass(PassRegistry &)
void initializeOptimizeReturnedPass(PassRegistry &)
FunctionPass * createWebAssemblyRegColoring()
Target-Independent Code Generator Pass Configuration Options.
This file declares the WebAssembly-specific subclass of TargetMachine.
RegisterTargetMachine - Helper template for registering a target machine implementation, for use in the target machine initialization function.
unsigned FunctionSections
Emit functions into separate sections.
FunctionPass * createUnreachableBlockEliminationPass()
createUnreachableBlockEliminationPass - The LLVM code generator does not work well with unreachable b...
unsigned UniqueSectionNames
ModulePass * createWebAssemblyAddMissingPrototypes()
void initializeWebAssemblyExplicitLocalsPass(PassRegistry &)
initializer< Ty > init(const Ty &Val)
Definition: CommandLine.h:422
bool hasAttribute(AttrKind Val) const
Return true if the attribute is present.
Definition: Attributes.cpp:201
CodeGenOpt::Level getOptLevel() const
Returns the optimization level: None, Less, Default, or Aggressive.
void initializeWebAssemblyPeepholePass(PassRegistry &)
FunctionPass * createWebAssemblyISelDag(WebAssemblyTargetMachine &TM, CodeGenOpt::Level OptLevel)
This pass converts a legalized DAG into a WebAssembly-specific DAG, ready for instruction scheduling...
static Reloc::Model getEffectiveRelocModel(Optional< Reloc::Model > RM)
FunctionPass * createWebAssemblyCallIndirectFixup()
ModulePass * createWebAssemblyLowerGlobalDtors()
char & PostRAMachineSinkingID
This pass perform post-ra machine sink for COPY instructions.
This file provides WebAssembly-specific target descriptions.
void initializeWebAssemblyCallIndirectFixupPass(PassRegistry &)
virtual bool addInstSelector()
addInstSelector - This method should install an instruction selector pass, which converts from LLVM c...
char & LiveDebugValuesID
LiveDebugValues pass.
This class describes a target machine that is implemented with the LLVM target-independent code gener...
void initializeWebAssemblyReplacePhysRegsPass(PassRegistry &)
FunctionPass class - This class is used to implement most global optimizations.
Definition: Pass.h:284
FunctionPass * createWebAssemblySetP2AlignOperands()
void initializeWebAssemblyLowerEmscriptenEHSjLjPass(PassRegistry &)
char & MachineCopyPropagationID
MachineCopyPropagation - This pass performs copy propagation on machine instructions.
static cl::opt< bool > EnableEmException("enable-emscripten-cxx-exceptions", cl::desc("WebAssembly Emscripten-style exception handling"), cl::init(false))
void initializeWebAssemblyLateEHPreparePass(PassRegistry &)
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:43
char & PostRASchedulerID
createPostRAScheduler - This pass performs post register allocation scheduling.
ModulePass * createWebAssemblyFixFunctionBitcasts()
This pass provides access to the codegen interfaces that are needed for IR-level transformations.
PassManagerBase - An abstract interface to allow code to add passes to a pass manager without having ...
char & StackMapLivenessID
StackMapLiveness - This pass analyses the register live-out set of stackmap/patchpoint intrinsics and...
TargetPassConfig * createPassConfig(PassManagerBase &PM) override
Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of ...
Pass * createLowerAtomicPass()
void initializeWebAssemblyLowerBrUnlessPass(PassRegistry &)
FunctionPass * createWebAssemblyMemIntrinsicResults()
FunctionPass * createWebAssemblyFixIrreducibleControlFlow()
Target - Wrapper for Target specific information.
virtual void addPostRegAlloc()
This method may be implemented by targets that want to run passes after register allocation pass pipe...
void initializeWebAssemblyCFGStackifyPass(PassRegistry &)
std::string TargetCPU
Definition: TargetMachine.h:78
char & PatchableFunctionID
This pass implements the "patchable-function" attribute.
bool hasValue() const
Definition: Optional.h:259
StringRef getValueAsString() const
Return the attribute&#39;s value as a string.
Definition: Attributes.cpp:194
FunctionPass * createWebAssemblyLateEHPrepare()
TargetTransformInfo getTargetTransformInfo(const Function &F) override
Get a TargetTransformInfo implementation for the target.
#define I(x, y, z)
Definition: MD5.cpp:58
ModulePass class - This class is used to implement unstructured interprocedural optimizations and ana...
Definition: Pass.h:224
WebAssemblyTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional< Reloc::Model > RM, Optional< CodeModel::Model > CM, CodeGenOpt::Level OL, bool JIT)
Create an WebAssembly architecture model.
void LLVMInitializeWebAssemblyTarget()
void initializeWebAssemblyAddMissingPrototypesPass(PassRegistry &)
void initializeFixFunctionBitcastsPass(PassRegistry &)
std::string TargetFS
Definition: TargetMachine.h:79
FunctionPass * createWebAssemblyOptimizeLiveIntervals()
FunctionPass * createWebAssemblyCFGStackify()
void initializeWebAssemblyPrepareForLiveIntervalsPass(PassRegistry &)
void initializeWebAssemblySetP2AlignOperandsPass(PassRegistry &)
void initializeLowerGlobalDtorsPass(PassRegistry &)
FunctionPass * createWebAssemblyPrepareForLiveIntervals()
Attribute getFnAttribute(Attribute::AttrKind Kind) const
Return the attribute for the given attribute kind.
Definition: Function.h:330
iterator_range< global_iterator > globals()
Definition: Module.h:586
char & ShrinkWrapID
ShrinkWrap pass. Look for the best place to insert save and restore.
Definition: ShrinkWrap.cpp:249
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:48
unsigned TrapUnreachable
Emit target-specific trap instruction for &#39;unreachable&#39; IR instructions.
Target & getTheWebAssemblyTarget32()
const WebAssemblySubtarget * getSubtargetImpl(const Function &F) const override
Virtual method implemented by subclasses that returns a reference to that target&#39;s TargetSubtargetInf...
FunctionPass * createWebAssemblyReplacePhysRegs()
void initializeWebAssemblyCFGSortPass(PassRegistry &)
FunctionPass * createAtomicExpandPass()
Target & getTheWebAssemblyTarget64()
FunctionPass * createWebAssemblyExplicitLocals()
void initializeWebAssemblyRegColoringPass(PassRegistry &)