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X86DisassemblerDecoder.h
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1 //===-- X86DisassemblerDecoderInternal.h - Disassembler decoder -*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file is part of the X86 Disassembler.
10 // It contains the public interface of the instruction decoder.
11 // Documentation for the disassembler can be found in X86Disassembler.h.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #ifndef LLVM_LIB_TARGET_X86_DISASSEMBLER_X86DISASSEMBLERDECODER_H
16 #define LLVM_LIB_TARGET_X86_DISASSEMBLER_X86DISASSEMBLERDECODER_H
17 
18 #include "llvm/ADT/ArrayRef.h"
20 
21 namespace llvm {
22 namespace X86Disassembler {
23 
24 // Accessor functions for various fields of an Intel instruction
25 #define modFromModRM(modRM) (((modRM) & 0xc0) >> 6)
26 #define regFromModRM(modRM) (((modRM) & 0x38) >> 3)
27 #define rmFromModRM(modRM) ((modRM) & 0x7)
28 #define scaleFromSIB(sib) (((sib) & 0xc0) >> 6)
29 #define indexFromSIB(sib) (((sib) & 0x38) >> 3)
30 #define baseFromSIB(sib) ((sib) & 0x7)
31 #define wFromREX(rex) (((rex) & 0x8) >> 3)
32 #define rFromREX(rex) (((rex) & 0x4) >> 2)
33 #define xFromREX(rex) (((rex) & 0x2) >> 1)
34 #define bFromREX(rex) ((rex) & 0x1)
35 
36 #define rFromEVEX2of4(evex) (((~(evex)) & 0x80) >> 7)
37 #define xFromEVEX2of4(evex) (((~(evex)) & 0x40) >> 6)
38 #define bFromEVEX2of4(evex) (((~(evex)) & 0x20) >> 5)
39 #define r2FromEVEX2of4(evex) (((~(evex)) & 0x10) >> 4)
40 #define mmFromEVEX2of4(evex) ((evex) & 0x3)
41 #define wFromEVEX3of4(evex) (((evex) & 0x80) >> 7)
42 #define vvvvFromEVEX3of4(evex) (((~(evex)) & 0x78) >> 3)
43 #define ppFromEVEX3of4(evex) ((evex) & 0x3)
44 #define zFromEVEX4of4(evex) (((evex) & 0x80) >> 7)
45 #define l2FromEVEX4of4(evex) (((evex) & 0x40) >> 6)
46 #define lFromEVEX4of4(evex) (((evex) & 0x20) >> 5)
47 #define bFromEVEX4of4(evex) (((evex) & 0x10) >> 4)
48 #define v2FromEVEX4of4(evex) (((~evex) & 0x8) >> 3)
49 #define aaaFromEVEX4of4(evex) ((evex) & 0x7)
50 
51 #define rFromVEX2of3(vex) (((~(vex)) & 0x80) >> 7)
52 #define xFromVEX2of3(vex) (((~(vex)) & 0x40) >> 6)
53 #define bFromVEX2of3(vex) (((~(vex)) & 0x20) >> 5)
54 #define mmmmmFromVEX2of3(vex) ((vex) & 0x1f)
55 #define wFromVEX3of3(vex) (((vex) & 0x80) >> 7)
56 #define vvvvFromVEX3of3(vex) (((~(vex)) & 0x78) >> 3)
57 #define lFromVEX3of3(vex) (((vex) & 0x4) >> 2)
58 #define ppFromVEX3of3(vex) ((vex) & 0x3)
59 
60 #define rFromVEX2of2(vex) (((~(vex)) & 0x80) >> 7)
61 #define vvvvFromVEX2of2(vex) (((~(vex)) & 0x78) >> 3)
62 #define lFromVEX2of2(vex) (((vex) & 0x4) >> 2)
63 #define ppFromVEX2of2(vex) ((vex) & 0x3)
64 
65 #define rFromXOP2of3(xop) (((~(xop)) & 0x80) >> 7)
66 #define xFromXOP2of3(xop) (((~(xop)) & 0x40) >> 6)
67 #define bFromXOP2of3(xop) (((~(xop)) & 0x20) >> 5)
68 #define mmmmmFromXOP2of3(xop) ((xop) & 0x1f)
69 #define wFromXOP3of3(xop) (((xop) & 0x80) >> 7)
70 #define vvvvFromXOP3of3(vex) (((~(vex)) & 0x78) >> 3)
71 #define lFromXOP3of3(xop) (((xop) & 0x4) >> 2)
72 #define ppFromXOP3of3(xop) ((xop) & 0x3)
73 
74 // These enums represent Intel registers for use by the decoder.
75 #define REGS_8BIT \
76  ENTRY(AL) \
77  ENTRY(CL) \
78  ENTRY(DL) \
79  ENTRY(BL) \
80  ENTRY(AH) \
81  ENTRY(CH) \
82  ENTRY(DH) \
83  ENTRY(BH) \
84  ENTRY(R8B) \
85  ENTRY(R9B) \
86  ENTRY(R10B) \
87  ENTRY(R11B) \
88  ENTRY(R12B) \
89  ENTRY(R13B) \
90  ENTRY(R14B) \
91  ENTRY(R15B) \
92  ENTRY(SPL) \
93  ENTRY(BPL) \
94  ENTRY(SIL) \
95  ENTRY(DIL)
96 
97 #define EA_BASES_16BIT \
98  ENTRY(BX_SI) \
99  ENTRY(BX_DI) \
100  ENTRY(BP_SI) \
101  ENTRY(BP_DI) \
102  ENTRY(SI) \
103  ENTRY(DI) \
104  ENTRY(BP) \
105  ENTRY(BX) \
106  ENTRY(R8W) \
107  ENTRY(R9W) \
108  ENTRY(R10W) \
109  ENTRY(R11W) \
110  ENTRY(R12W) \
111  ENTRY(R13W) \
112  ENTRY(R14W) \
113  ENTRY(R15W)
114 
115 #define REGS_16BIT \
116  ENTRY(AX) \
117  ENTRY(CX) \
118  ENTRY(DX) \
119  ENTRY(BX) \
120  ENTRY(SP) \
121  ENTRY(BP) \
122  ENTRY(SI) \
123  ENTRY(DI) \
124  ENTRY(R8W) \
125  ENTRY(R9W) \
126  ENTRY(R10W) \
127  ENTRY(R11W) \
128  ENTRY(R12W) \
129  ENTRY(R13W) \
130  ENTRY(R14W) \
131  ENTRY(R15W)
132 
133 #define EA_BASES_32BIT \
134  ENTRY(EAX) \
135  ENTRY(ECX) \
136  ENTRY(EDX) \
137  ENTRY(EBX) \
138  ENTRY(sib) \
139  ENTRY(EBP) \
140  ENTRY(ESI) \
141  ENTRY(EDI) \
142  ENTRY(R8D) \
143  ENTRY(R9D) \
144  ENTRY(R10D) \
145  ENTRY(R11D) \
146  ENTRY(R12D) \
147  ENTRY(R13D) \
148  ENTRY(R14D) \
149  ENTRY(R15D)
150 
151 #define REGS_32BIT \
152  ENTRY(EAX) \
153  ENTRY(ECX) \
154  ENTRY(EDX) \
155  ENTRY(EBX) \
156  ENTRY(ESP) \
157  ENTRY(EBP) \
158  ENTRY(ESI) \
159  ENTRY(EDI) \
160  ENTRY(R8D) \
161  ENTRY(R9D) \
162  ENTRY(R10D) \
163  ENTRY(R11D) \
164  ENTRY(R12D) \
165  ENTRY(R13D) \
166  ENTRY(R14D) \
167  ENTRY(R15D)
168 
169 #define EA_BASES_64BIT \
170  ENTRY(RAX) \
171  ENTRY(RCX) \
172  ENTRY(RDX) \
173  ENTRY(RBX) \
174  ENTRY(sib64) \
175  ENTRY(RBP) \
176  ENTRY(RSI) \
177  ENTRY(RDI) \
178  ENTRY(R8) \
179  ENTRY(R9) \
180  ENTRY(R10) \
181  ENTRY(R11) \
182  ENTRY(R12) \
183  ENTRY(R13) \
184  ENTRY(R14) \
185  ENTRY(R15)
186 
187 #define REGS_64BIT \
188  ENTRY(RAX) \
189  ENTRY(RCX) \
190  ENTRY(RDX) \
191  ENTRY(RBX) \
192  ENTRY(RSP) \
193  ENTRY(RBP) \
194  ENTRY(RSI) \
195  ENTRY(RDI) \
196  ENTRY(R8) \
197  ENTRY(R9) \
198  ENTRY(R10) \
199  ENTRY(R11) \
200  ENTRY(R12) \
201  ENTRY(R13) \
202  ENTRY(R14) \
203  ENTRY(R15)
204 
205 #define REGS_MMX \
206  ENTRY(MM0) \
207  ENTRY(MM1) \
208  ENTRY(MM2) \
209  ENTRY(MM3) \
210  ENTRY(MM4) \
211  ENTRY(MM5) \
212  ENTRY(MM6) \
213  ENTRY(MM7)
214 
215 #define REGS_XMM \
216  ENTRY(XMM0) \
217  ENTRY(XMM1) \
218  ENTRY(XMM2) \
219  ENTRY(XMM3) \
220  ENTRY(XMM4) \
221  ENTRY(XMM5) \
222  ENTRY(XMM6) \
223  ENTRY(XMM7) \
224  ENTRY(XMM8) \
225  ENTRY(XMM9) \
226  ENTRY(XMM10) \
227  ENTRY(XMM11) \
228  ENTRY(XMM12) \
229  ENTRY(XMM13) \
230  ENTRY(XMM14) \
231  ENTRY(XMM15) \
232  ENTRY(XMM16) \
233  ENTRY(XMM17) \
234  ENTRY(XMM18) \
235  ENTRY(XMM19) \
236  ENTRY(XMM20) \
237  ENTRY(XMM21) \
238  ENTRY(XMM22) \
239  ENTRY(XMM23) \
240  ENTRY(XMM24) \
241  ENTRY(XMM25) \
242  ENTRY(XMM26) \
243  ENTRY(XMM27) \
244  ENTRY(XMM28) \
245  ENTRY(XMM29) \
246  ENTRY(XMM30) \
247  ENTRY(XMM31)
248 
249 #define REGS_YMM \
250  ENTRY(YMM0) \
251  ENTRY(YMM1) \
252  ENTRY(YMM2) \
253  ENTRY(YMM3) \
254  ENTRY(YMM4) \
255  ENTRY(YMM5) \
256  ENTRY(YMM6) \
257  ENTRY(YMM7) \
258  ENTRY(YMM8) \
259  ENTRY(YMM9) \
260  ENTRY(YMM10) \
261  ENTRY(YMM11) \
262  ENTRY(YMM12) \
263  ENTRY(YMM13) \
264  ENTRY(YMM14) \
265  ENTRY(YMM15) \
266  ENTRY(YMM16) \
267  ENTRY(YMM17) \
268  ENTRY(YMM18) \
269  ENTRY(YMM19) \
270  ENTRY(YMM20) \
271  ENTRY(YMM21) \
272  ENTRY(YMM22) \
273  ENTRY(YMM23) \
274  ENTRY(YMM24) \
275  ENTRY(YMM25) \
276  ENTRY(YMM26) \
277  ENTRY(YMM27) \
278  ENTRY(YMM28) \
279  ENTRY(YMM29) \
280  ENTRY(YMM30) \
281  ENTRY(YMM31)
282 
283 #define REGS_ZMM \
284  ENTRY(ZMM0) \
285  ENTRY(ZMM1) \
286  ENTRY(ZMM2) \
287  ENTRY(ZMM3) \
288  ENTRY(ZMM4) \
289  ENTRY(ZMM5) \
290  ENTRY(ZMM6) \
291  ENTRY(ZMM7) \
292  ENTRY(ZMM8) \
293  ENTRY(ZMM9) \
294  ENTRY(ZMM10) \
295  ENTRY(ZMM11) \
296  ENTRY(ZMM12) \
297  ENTRY(ZMM13) \
298  ENTRY(ZMM14) \
299  ENTRY(ZMM15) \
300  ENTRY(ZMM16) \
301  ENTRY(ZMM17) \
302  ENTRY(ZMM18) \
303  ENTRY(ZMM19) \
304  ENTRY(ZMM20) \
305  ENTRY(ZMM21) \
306  ENTRY(ZMM22) \
307  ENTRY(ZMM23) \
308  ENTRY(ZMM24) \
309  ENTRY(ZMM25) \
310  ENTRY(ZMM26) \
311  ENTRY(ZMM27) \
312  ENTRY(ZMM28) \
313  ENTRY(ZMM29) \
314  ENTRY(ZMM30) \
315  ENTRY(ZMM31)
316 
317 #define REGS_MASKS \
318  ENTRY(K0) \
319  ENTRY(K1) \
320  ENTRY(K2) \
321  ENTRY(K3) \
322  ENTRY(K4) \
323  ENTRY(K5) \
324  ENTRY(K6) \
325  ENTRY(K7)
326 
327 #define REGS_SEGMENT \
328  ENTRY(ES) \
329  ENTRY(CS) \
330  ENTRY(SS) \
331  ENTRY(DS) \
332  ENTRY(FS) \
333  ENTRY(GS)
334 
335 #define REGS_DEBUG \
336  ENTRY(DR0) \
337  ENTRY(DR1) \
338  ENTRY(DR2) \
339  ENTRY(DR3) \
340  ENTRY(DR4) \
341  ENTRY(DR5) \
342  ENTRY(DR6) \
343  ENTRY(DR7) \
344  ENTRY(DR8) \
345  ENTRY(DR9) \
346  ENTRY(DR10) \
347  ENTRY(DR11) \
348  ENTRY(DR12) \
349  ENTRY(DR13) \
350  ENTRY(DR14) \
351  ENTRY(DR15)
352 
353 #define REGS_CONTROL \
354  ENTRY(CR0) \
355  ENTRY(CR1) \
356  ENTRY(CR2) \
357  ENTRY(CR3) \
358  ENTRY(CR4) \
359  ENTRY(CR5) \
360  ENTRY(CR6) \
361  ENTRY(CR7) \
362  ENTRY(CR8) \
363  ENTRY(CR9) \
364  ENTRY(CR10) \
365  ENTRY(CR11) \
366  ENTRY(CR12) \
367  ENTRY(CR13) \
368  ENTRY(CR14) \
369  ENTRY(CR15)
370 
371 #define REGS_BOUND \
372  ENTRY(BND0) \
373  ENTRY(BND1) \
374  ENTRY(BND2) \
375  ENTRY(BND3)
376 
377 #define ALL_EA_BASES \
378  EA_BASES_16BIT \
379  EA_BASES_32BIT \
380  EA_BASES_64BIT
381 
382 #define ALL_SIB_BASES \
383  REGS_32BIT \
384  REGS_64BIT
385 
386 #define ALL_REGS \
387  REGS_8BIT \
388  REGS_16BIT \
389  REGS_32BIT \
390  REGS_64BIT \
391  REGS_MMX \
392  REGS_XMM \
393  REGS_YMM \
394  REGS_ZMM \
395  REGS_MASKS \
396  REGS_SEGMENT \
397  REGS_DEBUG \
398  REGS_CONTROL \
399  REGS_BOUND \
400  ENTRY(RIP)
401 
402 /// All possible values of the base field for effective-address
403 /// computations, a.k.a. the Mod and R/M fields of the ModR/M byte.
404 /// We distinguish between bases (EA_BASE_*) and registers that just happen
405 /// to be referred to when Mod == 0b11 (EA_REG_*).
406 enum EABase {
408 #define ENTRY(x) EA_BASE_##x,
410 #undef ENTRY
411 #define ENTRY(x) EA_REG_##x,
412  ALL_REGS
413 #undef ENTRY
415 };
416 
417 /// All possible values of the SIB index field.
418 /// borrows entries from ALL_EA_BASES with the special case that
419 /// sib is synonymous with NONE.
420 /// Vector SIB: index can be XMM or YMM.
421 enum SIBIndex {
423 #define ENTRY(x) SIB_INDEX_##x,
425  REGS_XMM
426  REGS_YMM
427  REGS_ZMM
428 #undef ENTRY
430 };
431 
432 /// All possible values of the SIB base field.
433 enum SIBBase {
435 #define ENTRY(x) SIB_BASE_##x,
437 #undef ENTRY
439 };
440 
441 /// Possible displacement types for effective-address computations.
442 typedef enum {
448 
449 /// All possible values of the reg field in the ModR/M byte.
450 enum Reg {
451 #define ENTRY(x) MODRM_REG_##x,
452  ALL_REGS
453 #undef ENTRY
455 };
456 
457 /// All possible segment overrides.
467 };
468 
469 /// Possible values for the VEX.m-mmmm field
471  VEX_LOB_0F = 0x1,
474 };
475 
480 };
481 
482 /// Possible values for the VEX.pp/EVEX.pp field
488 };
489 
492  TYPE_VEX_2B = 0x1,
493  TYPE_VEX_3B = 0x2,
494  TYPE_EVEX = 0x3,
495  TYPE_XOP = 0x4
496 };
497 
498 /// Type for the byte reader that the consumer must provide to
499 /// the decoder. Reads a single byte from the instruction's address space.
500 /// \param arg A baton that the consumer can associate with any internal
501 /// state that it needs.
502 /// \param byte A pointer to a single byte in memory that should be set to
503 /// contain the value at address.
504 /// \param address The address in the instruction's address space that should
505 /// be read from.
506 /// \return -1 if the byte cannot be read for any reason; 0 otherwise.
507 typedef int (*byteReader_t)(const void *arg, uint8_t *byte, uint64_t address);
508 
509 /// Type for the logging function that the consumer can provide to
510 /// get debugging output from the decoder.
511 /// \param arg A baton that the consumer can associate with any internal
512 /// state that it needs.
513 /// \param log A string that contains the message. Will be reused after
514 /// the logger returns.
515 typedef void (*dlog_t)(void *arg, const char *log);
516 
517 /// The specification for how to extract and interpret a full instruction and
518 /// its operands.
520  uint16_t operands;
521 };
522 
523 /// The x86 internal instruction, which is produced by the decoder.
525  // Reader interface (C)
527  // Opaque value passed to the reader
528  const void* readerArg;
529  // The address of the next byte to read via the reader
530  uint64_t readerCursor;
531 
532  // Logger interface (C)
534  // Opaque value passed to the logger
535  void* dlogArg;
536 
537  // General instruction information
538 
539  // The mode to disassemble for (64-bit, protected, real)
541  // The start of the instruction, usable with the reader
542  uint64_t startLocation;
543  // The length of the instruction, in bytes
544  size_t length;
545 
546  // Prefix state
547 
548  // The possible mandatory prefix
550  // The value of the vector extension prefix(EVEX/VEX/XOP), if present
551  uint8_t vectorExtensionPrefix[4];
552  // The type of the vector extension prefix
554  // The value of the REX prefix, if present
555  uint8_t rexPrefix;
556  // The segment override type
558  // 1 if the prefix byte, 0xf2 or 0xf3 is xacquire or xrelease
560 
561  // Address-size override
562  bool hasAdSize;
563  // Operand-size override
564  bool hasOpSize;
565  // Lock prefix
567  // The repeat prefix if any
568  uint8_t repeatPrefix;
569 
570  // Sizes of various critical pieces of data, in bytes
571  uint8_t registerSize;
572  uint8_t addressSize;
574  uint8_t immediateSize;
575 
576  // Offsets from the start of the instruction to the pieces of data, which is
577  // needed to find relocation entries for adding symbolic operands.
580 
581  // opcode state
582 
583  // The last byte of the opcode, not counting any ModR/M extension
584  uint8_t opcode;
585 
586  // decode state
587 
588  // The type of opcode, used for indexing into the array of decode tables
590  // The instruction ID, extracted from the decode table
591  uint16_t instructionID;
592  // The specifier for the instruction, from the instruction info table
594 
595  // state for additional bytes, consumed during operand decode. Pattern:
596  // consumed___ indicates that the byte was already consumed and does not
597  // need to be consumed again.
598 
599  // The VEX.vvvv field, which contains a third register operand for some AVX
600  // instructions.
602 
603  // The writemask for AVX-512 instructions which is contained in EVEX.aaa
605 
606  // The ModR/M byte, which contains most register operands and some portion of
607  // all memory operands.
609  uint8_t modRM;
610 
611  // The SIB byte, used for more complex 32- or 64-bit memory operands
613  uint8_t sib;
614 
615  // The displacement, used for memory operands
617  int32_t displacement;
618 
619  // Immediates. There can be two in some cases
622  uint64_t immediates[2];
623 
624  // A register or immediate operand encoded into the opcode
626 
627  // Portions of the ModR/M byte
628 
629  // These fields determine the allowable values for the ModR/M fields, which
630  // depend on operand and address widths.
633 
634  // The Mod and R/M fields can encode a base for an effective address, or a
635  // register. These are separated into two fields here.
637  EADisplacement eaDisplacement;
638  // The reg field always encodes a register
640 
641  // SIB state
644  uint8_t sibScale;
646 
647  // Embedded rounding control.
648  uint8_t RC;
649 
651 };
652 
653 /// Decode one instruction and store the decoding results in
654 /// a buffer provided by the consumer.
655 /// \param insn The buffer to store the instruction in. Allocated by the
656 /// consumer.
657 /// \param reader The byteReader_t for the bytes to be read.
658 /// \param readerArg An argument to pass to the reader for storing context
659 /// specific to the consumer. May be NULL.
660 /// \param logger The dlog_t to be used in printing status messages from the
661 /// disassembler. May be NULL.
662 /// \param loggerArg An argument to pass to the logger for storing context
663 /// specific to the logger. May be NULL.
664 /// \param startLoc The address (in the reader's address space) of the first
665 /// byte in the instruction.
666 /// \param mode The mode (16-bit, 32-bit, 64-bit) to decode in.
667 /// \return Nonzero if there was an error during decode, 0 otherwise.
669  byteReader_t reader,
670  const void *readerArg,
671  dlog_t logger,
672  void *loggerArg,
673  const void *miiArg,
674  uint64_t startLoc,
676 
677 /// Print a message to debugs()
678 /// \param file The name of the file printing the debug message.
679 /// \param line The line number that printed the debug message.
680 /// \param s The message to print.
681 void Debug(const char *file, unsigned line, const char *s);
682 
683 StringRef GetInstrName(unsigned Opcode, const void *mii);
684 
685 } // namespace X86Disassembler
686 } // namespace llvm
687 
688 #endif
*ViewGraph Emit a dot run run gv on the postscript file
Definition: GraphWriter.h:362
void(* dlog_t)(void *arg, const char *log)
Type for the logging function that the consumer can provide to get debugging output from the decoder...
This class represents lattice values for constants.
Definition: AllocatorList.h:23
The specification for how to extract and interpret a full instruction and its operands.
int(* byteReader_t)(const void *arg, uint8_t *byte, uint64_t address)
Type for the byte reader that the consumer must provide to the decoder.
#define ALL_REGS
EADisplacement
Possible displacement types for effective-address computations.
amode Optimize addressing mode
SIBIndex
All possible values of the SIB index field.
Reg
All possible values of the reg field in the ModR/M byte.
#define ALL_EA_BASES
VEXLeadingOpcodeByte
Possible values for the VEX.m-mmmm field.
int decodeInstruction(InternalInstruction *insn, byteReader_t reader, const void *readerArg, dlog_t logger, void *loggerArg, const void *miiArg, uint64_t startLoc, DisassemblerMode mode)
Decode one instruction and store the decoding results in a buffer provided by the consumer...
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory)...
Definition: APInt.h:32
EABase
All possible values of the base field for effective-address computations, a.k.a.
#define ALL_SIB_BASES
void Debug(const char *file, unsigned line, const char *s)
Print a message to debugs()
The x86 internal instruction, which is produced by the decoder.
VEXPrefixCode
Possible values for the VEX.pp/EVEX.pp field.
StringRef GetInstrName(unsigned Opcode, const void *mii)
SegmentOverride
All possible segment overrides.
#define REGS_ZMM
SIBBase
All possible values of the SIB base field.
#define REGS_XMM
static void logger(void *arg, const char *log)
logger - a callback function that wraps the operator<< method from raw_ostream.
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:48
#define REGS_YMM
DisassemblerMode
Decoding mode for the Intel disassembler.