LLVM  9.0.0svn
X86MCTargetDesc.h
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1 //===-- X86MCTargetDesc.h - X86 Target Descriptions -------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file provides X86 specific target descriptions.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_LIB_TARGET_X86_MCTARGETDESC_X86MCTARGETDESC_H
14 #define LLVM_LIB_TARGET_X86_MCTARGETDESC_X86MCTARGETDESC_H
15 
16 #include "llvm/MC/MCStreamer.h"
17 #include "llvm/Support/DataTypes.h"
18 #include <string>
19 
20 namespace llvm {
21 class MCAsmBackend;
22 class MCCodeEmitter;
23 class MCContext;
24 class MCInstrInfo;
25 class MCObjectTargetWriter;
26 class MCObjectWriter;
27 class MCRegisterInfo;
28 class MCSubtargetInfo;
29 class MCRelocationInfo;
30 class MCTargetOptions;
31 class Target;
32 class Triple;
33 class StringRef;
34 class raw_ostream;
35 class raw_pwrite_stream;
36 
37 Target &getTheX86_32Target();
38 Target &getTheX86_64Target();
39 
40 /// Flavour of dwarf regnumbers
41 ///
42 namespace DWARFFlavour {
43  enum {
45  };
46 }
47 
48 /// Native X86 register numbers
49 ///
50 namespace N86 {
51  enum {
52  EAX = 0, ECX = 1, EDX = 2, EBX = 3, ESP = 4, EBP = 5, ESI = 6, EDI = 7
53  };
54 }
55 
56 namespace X86_MC {
57 std::string ParseX86Triple(const Triple &TT);
58 
59 unsigned getDwarfRegFlavour(const Triple &TT, bool isEH);
60 
62 
63 /// Create a X86 MCSubtargetInfo instance. This is exposed so Asm parser, etc.
64 /// do not need to go through TargetRegistry.
66  StringRef FS);
67 }
68 
70  const MCRegisterInfo &MRI,
71  MCContext &Ctx);
72 
74  const MCSubtargetInfo &STI,
75  const MCRegisterInfo &MRI,
76  const MCTargetOptions &Options);
78  const MCSubtargetInfo &STI,
79  const MCRegisterInfo &MRI,
80  const MCTargetOptions &Options);
81 
82 /// Implements X86-only directives for assembly emission.
85  MCInstPrinter *InstPrint,
86  bool isVerboseAsm);
87 
88 /// Implements X86-only directives for object files.
90  const MCSubtargetInfo &STI);
91 
92 /// Construct an X86 Windows COFF machine code streamer which will generate
93 /// PE/COFF format object files.
94 ///
95 /// Takes ownership of \p AB and \p CE.
97  std::unique_ptr<MCAsmBackend> &&AB,
98  std::unique_ptr<MCObjectWriter> &&OW,
99  std::unique_ptr<MCCodeEmitter> &&CE,
100  bool RelaxAll,
101  bool IncrementalLinkerCompatible);
102 
103 /// Construct an X86 Mach-O object writer.
104 std::unique_ptr<MCObjectTargetWriter>
105 createX86MachObjectWriter(bool Is64Bit, uint32_t CPUType, uint32_t CPUSubtype);
106 
107 /// Construct an X86 ELF object writer.
108 std::unique_ptr<MCObjectTargetWriter>
109 createX86ELFObjectWriter(bool IsELF64, uint8_t OSABI, uint16_t EMachine);
110 /// Construct an X86 Win COFF object writer.
111 std::unique_ptr<MCObjectTargetWriter>
112 createX86WinCOFFObjectWriter(bool Is64Bit);
113 
114 /// Returns the sub or super register of a specific X86 register.
115 /// e.g. getX86SubSuperRegister(X86::EAX, 16) returns X86::AX.
116 /// Aborts on error.
117 unsigned getX86SubSuperRegister(unsigned, unsigned, bool High=false);
118 
119 /// Returns the sub or super register of a specific X86 register.
120 /// Like getX86SubSuperRegister() but returns 0 on error.
121 unsigned getX86SubSuperRegisterOrZero(unsigned, unsigned,
122  bool High = false);
123 
124 } // End llvm namespace
125 
126 
127 // Defines symbolic names for X86 registers. This defines a mapping from
128 // register name to register number.
129 //
130 #define GET_REGINFO_ENUM
131 #include "X86GenRegisterInfo.inc"
132 
133 // Defines symbolic names for the X86 instructions.
134 //
135 #define GET_INSTRINFO_ENUM
136 #define GET_INSTRINFO_MC_HELPER_DECLS
137 #include "X86GenInstrInfo.inc"
138 
139 #define GET_SUBTARGETINFO_ENUM
140 #include "X86GenSubtargetInfo.inc"
141 
142 #endif
uint64_t CallInst * C
This class represents lattice values for constants.
Definition: AllocatorList.h:23
formatted_raw_ostream - A raw_ostream that wraps another one and keeps track of line and column posit...
MCTargetStreamer * createX86ObjectTargetStreamer(MCStreamer &OS, const MCSubtargetInfo &STI)
Implements X86-only directives for object files.
Target specific streamer interface.
Definition: MCStreamer.h:83
std::unique_ptr< MCObjectTargetWriter > createX86MachObjectWriter(bool Is64Bit, uint32_t CPUType, uint32_t CPUSubtype)
Construct an X86 Mach-O object writer.
unsigned getDwarfRegFlavour(const Triple &TT, bool isEH)
uint64_t High
std::string ParseX86Triple(const Triple &TT)
MCAsmBackend * createX86_32AsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)
MCCodeEmitter * createX86MCCodeEmitter(const MCInstrInfo &MCII, const MCRegisterInfo &MRI, MCContext &Ctx)
MCAsmBackend * createX86_64AsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)
Context object for machine code objects.
Definition: MCContext.h:62
std::unique_ptr< MCObjectTargetWriter > createX86ELFObjectWriter(bool IsELF64, uint8_t OSABI, uint16_t EMachine)
Construct an X86 ELF object writer.
std::unique_ptr< MCObjectTargetWriter > createX86WinCOFFObjectWriter(bool Is64Bit)
Construct an X86 Win COFF object writer.
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
Streaming machine code generation interface.
Definition: MCStreamer.h:188
unsigned const MachineRegisterInfo * MRI
MCCodeEmitter - Generic instruction encoding interface.
Definition: MCCodeEmitter.h:21
Interface to description of machine instruction set.
Definition: MCInstrInfo.h:23
MCStreamer * createX86WinCOFFStreamer(MCContext &C, std::unique_ptr< MCAsmBackend > &&AB, std::unique_ptr< MCObjectWriter > &&OW, std::unique_ptr< MCCodeEmitter > &&CE, bool RelaxAll, bool IncrementalLinkerCompatible)
Construct an X86 Windows COFF machine code streamer which will generate PE/COFF format object files...
MCTargetStreamer * createX86AsmTargetStreamer(MCStreamer &S, formatted_raw_ostream &OS, MCInstPrinter *InstPrint, bool isVerboseAsm)
Implements X86-only directives for assembly emission.
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:43
MCSubtargetInfo * createX86MCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS)
Create a X86 MCSubtargetInfo instance.
unsigned getX86SubSuperRegisterOrZero(unsigned, unsigned, bool High=false)
Returns the sub or super register of a specific X86 register.
void initLLVMToSEHAndCVRegMapping(MCRegisterInfo *MRI)
unsigned getX86SubSuperRegister(unsigned, unsigned, bool High=false)
Returns the sub or super register of a specific X86 register.
Target - Wrapper for Target specific information.
This is an instance of a target assembly language printer that converts an MCInst to valid target ass...
Definition: MCInstPrinter.h:39
Generic base class for all target subtargets.
Target & getTheX86_32Target()
Generic interface to target specific assembler backends.
Definition: MCAsmBackend.h:41
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:48
Target & getTheX86_64Target()