LLVM  6.0.0svn
X86MCTargetDesc.h
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1 //===-- X86MCTargetDesc.h - X86 Target Descriptions -------------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file provides X86 specific target descriptions.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_X86_MCTARGETDESC_X86MCTARGETDESC_H
15 #define LLVM_LIB_TARGET_X86_MCTARGETDESC_X86MCTARGETDESC_H
16 
17 #include "llvm/MC/MCStreamer.h"
18 #include "llvm/Support/DataTypes.h"
19 #include <string>
20 
21 namespace llvm {
22 class MCAsmBackend;
23 class MCCodeEmitter;
24 class MCContext;
25 class MCInstrInfo;
26 class MCObjectWriter;
27 class MCRegisterInfo;
28 class MCSubtargetInfo;
29 class MCRelocationInfo;
30 class MCTargetOptions;
31 class Target;
32 class Triple;
33 class StringRef;
34 class raw_ostream;
35 class raw_pwrite_stream;
36 
37 Target &getTheX86_32Target();
38 Target &getTheX86_64Target();
39 
40 /// Flavour of dwarf regnumbers
41 ///
42 namespace DWARFFlavour {
43  enum {
45  };
46 }
47 
48 /// Native X86 register numbers
49 ///
50 namespace N86 {
51  enum {
52  EAX = 0, ECX = 1, EDX = 2, EBX = 3, ESP = 4, EBP = 5, ESI = 6, EDI = 7
53  };
54 }
55 
56 namespace X86_MC {
57 std::string ParseX86Triple(const Triple &TT);
58 
59 unsigned getDwarfRegFlavour(const Triple &TT, bool isEH);
60 
62 
63 /// Create a X86 MCSubtargetInfo instance. This is exposed so Asm parser, etc.
64 /// do not need to go through TargetRegistry.
66  StringRef FS);
67 }
68 
70  const MCRegisterInfo &MRI,
71  MCContext &Ctx);
72 
74  const Triple &TT, StringRef CPU,
75  const MCTargetOptions &Options);
77  const Triple &TT, StringRef CPU,
78  const MCTargetOptions &Options);
79 
80 /// Implements X86-only directives for assembly emission.
83  MCInstPrinter *InstPrint,
84  bool isVerboseAsm);
85 
86 /// Implements X86-only directives for object files.
88  const MCSubtargetInfo &STI);
89 
90 /// Construct an X86 Windows COFF machine code streamer which will generate
91 /// PE/COFF format object files.
92 ///
93 /// Takes ownership of \p AB and \p CE.
95  std::unique_ptr<MCAsmBackend> &&AB,
97  std::unique_ptr<MCCodeEmitter> &&CE,
98  bool RelaxAll,
100 
101 /// Construct an X86 Mach-O object writer.
102 std::unique_ptr<MCObjectWriter> createX86MachObjectWriter(raw_pwrite_stream &OS,
103  bool Is64Bit,
105  uint32_t CPUSubtype);
106 
107 /// Construct an X86 ELF object writer.
108 std::unique_ptr<MCObjectWriter> createX86ELFObjectWriter(raw_pwrite_stream &OS,
109  bool IsELF64,
110  uint8_t OSABI,
111  uint16_t EMachine);
112 /// Construct an X86 Win COFF object writer.
113 std::unique_ptr<MCObjectWriter>
115 
116 /// Returns the sub or super register of a specific X86 register.
117 /// e.g. getX86SubSuperRegister(X86::EAX, 16) returns X86::AX.
118 /// Aborts on error.
119 unsigned getX86SubSuperRegister(unsigned, unsigned, bool High=false);
120 
121 /// Returns the sub or super register of a specific X86 register.
122 /// Like getX86SubSuperRegister() but returns 0 on error.
123 unsigned getX86SubSuperRegisterOrZero(unsigned, unsigned,
124  bool High = false);
125 
126 } // End llvm namespace
127 
128 
129 // Defines symbolic names for X86 registers. This defines a mapping from
130 // register name to register number.
131 //
132 #define GET_REGINFO_ENUM
133 #include "X86GenRegisterInfo.inc"
134 
135 // Defines symbolic names for the X86 instructions.
136 //
137 #define GET_INSTRINFO_ENUM
138 #include "X86GenInstrInfo.inc"
139 
140 #define GET_SUBTARGETINFO_ENUM
141 #include "X86GenSubtargetInfo.inc"
142 
143 #endif
uint64_t CallInst * C
std::unique_ptr< MCObjectWriter > createX86MachObjectWriter(raw_pwrite_stream &OS, bool Is64Bit, uint32_t CPUType, uint32_t CPUSubtype)
Construct an X86 Mach-O object writer.
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
formatted_raw_ostream - A raw_ostream that wraps another one and keeps track of line and column posit...
MCTargetStreamer * createX86ObjectTargetStreamer(MCStreamer &OS, const MCSubtargetInfo &STI)
Implements X86-only directives for object files.
Target specific streamer interface.
Definition: MCStreamer.h:80
unsigned getDwarfRegFlavour(const Triple &TT, bool isEH)
uint64_t High
std::string ParseX86Triple(const Triple &TT)
MCCodeEmitter * createX86MCCodeEmitter(const MCInstrInfo &MCII, const MCRegisterInfo &MRI, MCContext &Ctx)
MCStreamer * createX86WinCOFFStreamer(MCContext &C, std::unique_ptr< MCAsmBackend > &&AB, raw_pwrite_stream &OS, std::unique_ptr< MCCodeEmitter > &&CE, bool RelaxAll, bool IncrementalLinkerCompatible)
Construct an X86 Windows COFF machine code streamer which will generate PE/COFF format object files...
Context object for machine code objects.
Definition: MCContext.h:59
std::unique_ptr< MCObjectWriter > createX86ELFObjectWriter(raw_pwrite_stream &OS, bool IsELF64, uint8_t OSABI, uint16_t EMachine)
Construct an X86 ELF object writer.
cl::opt< bool > RelaxAll("mc-relax-all", cl::desc("When used with filetype=obj, " "relax all fixups in the emitted object file"))
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
Streaming machine code generation interface.
Definition: MCStreamer.h:169
unsigned const MachineRegisterInfo * MRI
cl::opt< bool > IncrementalLinkerCompatible("incremental-linker-compatible", cl::desc("When used with filetype=obj, " "emit an object file which can be used with an incremental linker"))
MCCodeEmitter - Generic instruction encoding interface.
Definition: MCCodeEmitter.h:22
Interface to description of machine instruction set.
Definition: MCInstrInfo.h:24
MCTargetStreamer * createX86AsmTargetStreamer(MCStreamer &S, formatted_raw_ostream &OS, MCInstPrinter *InstPrint, bool isVerboseAsm)
Implements X86-only directives for assembly emission.
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
MCSubtargetInfo * createX86MCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS)
Create a X86 MCSubtargetInfo instance.
unsigned getX86SubSuperRegisterOrZero(unsigned, unsigned, bool High=false)
Returns the sub or super register of a specific X86 register.
MCAsmBackend * createX86_64AsmBackend(const Target &T, const MCRegisterInfo &MRI, const Triple &TT, StringRef CPU, const MCTargetOptions &Options)
void initLLVMToSEHAndCVRegMapping(MCRegisterInfo *MRI)
unsigned getX86SubSuperRegister(unsigned, unsigned, bool High=false)
Returns the sub or super register of a specific X86 register.
Target - Wrapper for Target specific information.
This is an instance of a target assembly language printer that converts an MCInst to valid target ass...
Definition: MCInstPrinter.h:41
MCSubtargetInfo - Generic base class for all target subtargets.
Target & getTheX86_32Target()
MCAsmBackend * createX86_32AsmBackend(const Target &T, const MCRegisterInfo &MRI, const Triple &TT, StringRef CPU, const MCTargetOptions &Options)
An abstract base class for streams implementations that also support a pwrite operation.
Definition: raw_ostream.h:337
Generic interface to target specific assembler backends.
Definition: MCAsmBackend.h:40
std::unique_ptr< MCObjectWriter > createX86WinCOFFObjectWriter(raw_pwrite_stream &OS, bool Is64Bit)
Construct an X86 Win COFF object writer.
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:49
Target & getTheX86_64Target()