LLVM  7.0.0svn
X86PadShortFunction.cpp
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1 //===-------- X86PadShortFunction.cpp - pad short functions -----------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file defines the pass which will pad short functions to prevent
11 // a stall if a function returns before the return address is ready. This
12 // is needed for some Intel Atom processors.
13 //
14 //===----------------------------------------------------------------------===//
15 
16 
17 #include "X86.h"
18 #include "X86InstrInfo.h"
19 #include "X86Subtarget.h"
20 #include "llvm/ADT/Statistic.h"
23 #include "llvm/CodeGen/Passes.h"
25 #include "llvm/IR/Function.h"
26 #include "llvm/Support/Debug.h"
28 
29 using namespace llvm;
30 
31 #define DEBUG_TYPE "x86-pad-short-functions"
32 
33 STATISTIC(NumBBsPadded, "Number of basic blocks padded");
34 
35 namespace {
36  struct VisitedBBInfo {
37  // HasReturn - Whether the BB contains a return instruction
38  bool HasReturn;
39 
40  // Cycles - Number of cycles until return if HasReturn is true, otherwise
41  // number of cycles until end of the BB
42  unsigned int Cycles;
43 
44  VisitedBBInfo() : HasReturn(false), Cycles(0) {}
45  VisitedBBInfo(bool HasReturn, unsigned int Cycles)
46  : HasReturn(HasReturn), Cycles(Cycles) {}
47  };
48 
49  struct PadShortFunc : public MachineFunctionPass {
50  static char ID;
51  PadShortFunc() : MachineFunctionPass(ID)
52  , Threshold(4) {}
53 
54  bool runOnMachineFunction(MachineFunction &MF) override;
55 
56  MachineFunctionProperties getRequiredProperties() const override {
59  }
60 
61  StringRef getPassName() const override {
62  return "X86 Atom pad short functions";
63  }
64 
65  private:
66  void findReturns(MachineBasicBlock *MBB,
67  unsigned int Cycles = 0);
68 
69  bool cyclesUntilReturn(MachineBasicBlock *MBB,
70  unsigned int &Cycles);
71 
72  void addPadding(MachineBasicBlock *MBB,
74  unsigned int NOOPsToAdd);
75 
76  const unsigned int Threshold;
77 
78  // ReturnBBs - Maps basic blocks that return to the minimum number of
79  // cycles until the return, starting from the entry block.
81 
82  // VisitedBBs - Cache of previously visited BBs.
84 
85  TargetSchedModel TSM;
86  };
87 
88  char PadShortFunc::ID = 0;
89 }
90 
92  return new PadShortFunc();
93 }
94 
95 /// runOnMachineFunction - Loop over all of the basic blocks, inserting
96 /// NOOP instructions before early exits.
97 bool PadShortFunc::runOnMachineFunction(MachineFunction &MF) {
98  if (skipFunction(MF.getFunction()))
99  return false;
100 
101  if (MF.getFunction().optForSize())
102  return false;
103 
105  return false;
106 
107  TSM.init(&MF.getSubtarget());
108 
109  // Search through basic blocks and mark the ones that have early returns
110  ReturnBBs.clear();
111  VisitedBBs.clear();
112  findReturns(&MF.front());
113 
114  bool MadeChange = false;
115 
116  MachineBasicBlock *MBB;
117  unsigned int Cycles = 0;
118 
119  // Pad the identified basic blocks with NOOPs
121  I != ReturnBBs.end(); ++I) {
122  MBB = I->first;
123  Cycles = I->second;
124 
125  if (Cycles < Threshold) {
126  // BB ends in a return. Skip over any DBG_VALUE instructions
127  // trailing the terminator.
128  assert(MBB->size() > 0 &&
129  "Basic block should contain at least a RET but is empty");
130  MachineBasicBlock::iterator ReturnLoc = --MBB->end();
131 
132  while (ReturnLoc->isDebugInstr())
133  --ReturnLoc;
134  assert(ReturnLoc->isReturn() && !ReturnLoc->isCall() &&
135  "Basic block does not end with RET");
136 
137  addPadding(MBB, ReturnLoc, Threshold - Cycles);
138  NumBBsPadded++;
139  MadeChange = true;
140  }
141  }
142 
143  return MadeChange;
144 }
145 
146 /// findReturn - Starting at MBB, follow control flow and add all
147 /// basic blocks that contain a return to ReturnBBs.
148 void PadShortFunc::findReturns(MachineBasicBlock *MBB, unsigned int Cycles) {
149  // If this BB has a return, note how many cycles it takes to get there.
150  bool hasReturn = cyclesUntilReturn(MBB, Cycles);
151  if (Cycles >= Threshold)
152  return;
153 
154  if (hasReturn) {
155  ReturnBBs[MBB] = std::max(ReturnBBs[MBB], Cycles);
156  return;
157  }
158 
159  // Follow branches in BB and look for returns
161  I != MBB->succ_end(); ++I) {
162  if (*I == MBB)
163  continue;
164  findReturns(*I, Cycles);
165  }
166 }
167 
168 /// cyclesUntilReturn - return true if the MBB has a return instruction,
169 /// and return false otherwise.
170 /// Cycles will be incremented by the number of cycles taken to reach the
171 /// return or the end of the BB, whichever occurs first.
172 bool PadShortFunc::cyclesUntilReturn(MachineBasicBlock *MBB,
173  unsigned int &Cycles) {
174  // Return cached result if BB was previously visited
176  = VisitedBBs.find(MBB);
177  if (it != VisitedBBs.end()) {
178  VisitedBBInfo BBInfo = it->second;
179  Cycles += BBInfo.Cycles;
180  return BBInfo.HasReturn;
181  }
182 
183  unsigned int CyclesToEnd = 0;
184 
185  for (MachineInstr &MI : *MBB) {
186  // Mark basic blocks with a return instruction. Calls to other
187  // functions do not count because the called function will be padded,
188  // if necessary.
189  if (MI.isReturn() && !MI.isCall()) {
190  VisitedBBs[MBB] = VisitedBBInfo(true, CyclesToEnd);
191  Cycles += CyclesToEnd;
192  return true;
193  }
194 
195  CyclesToEnd += TSM.computeInstrLatency(&MI);
196  }
197 
198  VisitedBBs[MBB] = VisitedBBInfo(false, CyclesToEnd);
199  Cycles += CyclesToEnd;
200  return false;
201 }
202 
203 /// addPadding - Add the given number of NOOP instructions to the function
204 /// just prior to the return at MBBI
207  unsigned int NOOPsToAdd) {
208  DebugLoc DL = MBBI->getDebugLoc();
209  unsigned IssueWidth = TSM.getIssueWidth();
210 
211  for (unsigned i = 0, e = IssueWidth * NOOPsToAdd; i != e; ++i)
212  BuildMI(*MBB, MBBI, DL, TSM.getInstrInfo()->get(X86::NOOP));
213 }
GCNRegPressure max(const GCNRegPressure &P1, const GCNRegPressure &P2)
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
STATISTIC(NumFunctions, "Total number of functions")
A debug info location.
Definition: DebugLoc.h:34
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
Provide an instruction scheduling machine model to CodeGen passes.
bool padShortFunctions() const
Definition: X86Subtarget.h:626
FunctionPass * createX86PadShortFunctions()
Return a pass that pads short functions with NOOPs.
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
static MDTuple * get(LLVMContext &Context, ArrayRef< Metadata *> MDs)
Definition: Metadata.h:1164
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
bool optForSize() const
Optimize this function for size (-Os) or minimum size (-Oz).
Definition: Function.h:584
FunctionPass class - This class is used to implement most global optimizations.
Definition: Pass.h:285
const MachineBasicBlock & front() const
static bool hasReturn(const MachineBasicBlock &MBB)
Returns true if MBB contains an instruction that returns.
static void addPadding(BinaryStreamWriter &Writer)
const Function & getFunction() const
Return the LLVM function that this machine code represents.
MachineFunctionProperties & set(Property P)
Representation of each machine instruction.
Definition: MachineInstr.h:60
#define I(x, y, z)
Definition: MD5.cpp:58
static int const Threshold
TODO: Write a new FunctionPass AliasAnalysis so that it can keep a cache.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
IRTranslator LLVM IR MI
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:49
std::vector< MachineBasicBlock * >::iterator succ_iterator
Properties which a MachineFunction may have at a given point in time.