LLVM  10.0.0svn
X86RegisterBankInfo.h
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1 //===- X86RegisterBankInfo ---------------------------------------*- C++ -*-==//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 /// \file
9 /// This file declares the targeting of the RegisterBankInfo class for X86.
10 /// \todo This should be generated by TableGen.
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_LIB_TARGET_X86_X86REGISTERBANKINFO_H
14 #define LLVM_LIB_TARGET_X86_X86REGISTERBANKINFO_H
15 
17 
18 #define GET_REGBANK_DECLARATIONS
19 #include "X86GenRegisterBank.inc"
20 
21 namespace llvm {
22 
23 class LLT;
24 
26 protected:
27 #define GET_TARGET_REGBANK_CLASS
28 #include "X86GenRegisterBank.inc"
29 #define GET_TARGET_REGBANK_INFO_CLASS
30 #include "X86GenRegisterBankInfo.def"
31 
34 
35  static PartialMappingIdx getPartialMappingIdx(const LLT &Ty, bool isFP);
37  getValueMapping(PartialMappingIdx Idx, unsigned NumOperands);
38 };
39 
41 
42 /// This class provides the information for the target register banks.
44 private:
45  /// Get an instruction mapping.
46  /// \return An InstructionMappings with a statically allocated
47  /// OperandsMapping.
48  const InstructionMapping &getSameOperandsMapping(const MachineInstr &MI,
49  bool isFP) const;
50 
51  /// Track the bank of each instruction operand(register)
52  static void
53  getInstrPartialMappingIdxs(const MachineInstr &MI,
54  const MachineRegisterInfo &MRI, const bool isFP,
56 
57  /// Construct the instruction ValueMapping from PartialMappingIdxs
58  /// \return true if mapping succeeded.
59  static bool
60  getInstrValueMapping(const MachineInstr &MI,
61  const SmallVectorImpl<PartialMappingIdx> &OpRegBankIdx,
63 
64 public:
66 
67  const RegisterBank &
68  getRegBankFromRegClass(const TargetRegisterClass &RC) const override;
69 
71  getInstrAlternativeMappings(const MachineInstr &MI) const override;
72 
73  /// See RegisterBankInfo::applyMapping.
74  void applyMappingImpl(const OperandsMapper &OpdMapper) const override;
75 
77  getInstrMapping(const MachineInstr &MI) const override;
78 };
79 
80 } // namespace llvm
81 #endif
static RegisterBankInfo::ValueMapping ValMappings[]
This class represents lattice values for constants.
Definition: AllocatorList.h:23
Helper class that represents how the value of an instruction may be mapped and what is the related co...
Helper class used to get/create the virtual registers that will be used to replace the MachineOperand...
unsigned const TargetRegisterInfo * TRI
Holds all the information related to register banks.
This class provides the information for the target register banks.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:41
static PartialMappingIdx getPartialMappingIdx(const LLT &Ty, bool isFP)
static const RegisterBankInfo::ValueMapping * getValueMapping(PartialMappingIdx Idx, unsigned NumOperands)
unsigned const MachineRegisterInfo * MRI
virtual const InstructionMapping & getInstrMapping(const MachineInstr &MI) const
Get the mapping of the different operands of MI on the register bank.
Helper struct that represents how a value is partially mapped into a register.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:837
static RegisterBankInfo::PartialMapping PartMappings[]
This class implements the register bank concept.
Definition: RegisterBank.h:28
Helper struct that represents how a value is mapped through different register banks.
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
Representation of each machine instruction.
Definition: MachineInstr.h:64
virtual void applyMappingImpl(const OperandsMapper &OpdMapper) const
See applyMapping.
virtual InstructionMappings getInstrAlternativeMappings(const MachineInstr &MI) const
Get the alternative mappings for MI.
IRTranslator LLVM IR MI
virtual const RegisterBank & getRegBankFromRegClass(const TargetRegisterClass &RC) const
Get a register bank that covers RC.