LLVM  6.0.0svn
llvm::AArch64Subtarget Member List

This is the complete list of members for llvm::AArch64Subtarget, including all inherited members.

AArch64Subtarget(const Triple &TT, const std::string &CPU, const std::string &FS, const TargetMachine &TM, bool LittleEndian)llvm::AArch64Subtarget
ARMProcFamilyllvm::AArch64Subtargetprotected
ARMProcFamilyEnum enum namellvm::AArch64Subtarget
BalanceFPOpsllvm::AArch64Subtargetprotected
balanceFPOps() constllvm::AArch64Subtargetinline
CacheLineSizellvm::AArch64Subtargetprotected
CallLoweringInfollvm::AArch64Subtargetprotected
classifyGlobalFunctionReference(const GlobalValue *GV, const TargetMachine &TM) constllvm::AArch64Subtarget
ClassifyGlobalReference(const GlobalValue *GV, const TargetMachine &TM) constllvm::AArch64Subtarget
CortexA35 enum valuellvm::AArch64Subtarget
CortexA53 enum valuellvm::AArch64Subtarget
CortexA55 enum valuellvm::AArch64Subtarget
CortexA57 enum valuellvm::AArch64Subtarget
CortexA72 enum valuellvm::AArch64Subtarget
CortexA73 enum valuellvm::AArch64Subtarget
CortexA75 enum valuellvm::AArch64Subtarget
CustomAsCheapAsMovellvm::AArch64Subtargetprotected
Cyclone enum valuellvm::AArch64Subtarget
DisableLatencySchedHeuristicllvm::AArch64Subtargetprotected
enableEarlyIfConversion() const overridellvm::AArch64Subtarget
enableMachineScheduler() const overridellvm::AArch64Subtargetinline
enablePostRAScheduler() const overridellvm::AArch64Subtargetinline
ExynosM1 enum valuellvm::AArch64Subtarget
Falkor enum valuellvm::AArch64Subtarget
FrameLoweringllvm::AArch64Subtargetprotected
getBZeroEntry() constllvm::AArch64Subtarget
getCacheLineSize() constllvm::AArch64Subtargetinline
getCallLowering() const overridellvm::AArch64Subtarget
getCustomPBQPConstraints() const overridellvm::AArch64Subtarget
getFrameLowering() const overridellvm::AArch64Subtargetinline
getInstrInfo() const overridellvm::AArch64Subtargetinline
getInstructionSelector() const overridellvm::AArch64Subtarget
getLegalizerInfo() const overridellvm::AArch64Subtarget
getMaximumJumpTableSize() constllvm::AArch64Subtargetinline
getMaxInterleaveFactor() constllvm::AArch64Subtargetinline
getMaxPrefetchIterationsAhead() constllvm::AArch64Subtargetinline
getMinPrefetchStride() constllvm::AArch64Subtargetinline
getMinVectorRegisterBitWidth() constllvm::AArch64Subtargetinline
getPrefetchDistance() constllvm::AArch64Subtargetinline
getPrefFunctionAlignment() constllvm::AArch64Subtargetinline
getPrefLoopAlignment() constllvm::AArch64Subtargetinline
getProcFamily() constllvm::AArch64Subtargetinline
getRegBankInfo() const overridellvm::AArch64Subtarget
getRegisterInfo() const overridellvm::AArch64Subtargetinline
getSelectionDAGInfo() const overridellvm::AArch64Subtargetinline
getTargetLowering() const overridellvm::AArch64Subtargetinline
getTargetTriple() constllvm::AArch64Subtargetinline
getVectorInsertExtractBaseCost() constllvm::AArch64Subtargetinline
getWideningBaseCost() constllvm::AArch64Subtargetinline
HasArithmeticBccFusionllvm::AArch64Subtargetprotected
hasArithmeticBccFusion() constllvm::AArch64Subtargetinline
HasArithmeticCbzFusionllvm::AArch64Subtargetprotected
hasArithmeticCbzFusion() constllvm::AArch64Subtargetinline
HasCRCllvm::AArch64Subtargetprotected
hasCRC() constllvm::AArch64Subtargetinline
HasCryptollvm::AArch64Subtargetprotected
hasCrypto() constllvm::AArch64Subtargetinline
hasCustomCheapAsMoveHandling() constllvm::AArch64Subtargetinline
HasDotProdllvm::AArch64Subtargetprotected
hasDotProd() constllvm::AArch64Subtargetinline
HasFPARMv8llvm::AArch64Subtargetprotected
hasFPARMv8() constllvm::AArch64Subtargetinline
hasFullFP16() constllvm::AArch64Subtargetinline
HasFullFP16llvm::AArch64Subtargetprotected
HasFuseAESllvm::AArch64Subtargetprotected
hasFuseAES() constllvm::AArch64Subtargetinline
HasFuseLiteralsllvm::AArch64Subtargetprotected
hasFuseLiterals() constllvm::AArch64Subtargetinline
hasFusion() constllvm::AArch64Subtargetinline
HasLSEllvm::AArch64Subtargetprotected
hasLSE() constllvm::AArch64Subtargetinline
hasLSLFast() constllvm::AArch64Subtargetinline
HasLSLFastllvm::AArch64Subtargetprotected
hasNEON() constllvm::AArch64Subtargetinline
HasNEONllvm::AArch64Subtargetprotected
hasPerfMon() constllvm::AArch64Subtargetinline
HasPerfMonllvm::AArch64Subtargetprotected
HasRASllvm::AArch64Subtargetprotected
hasRAS() constllvm::AArch64Subtargetinline
hasRCPC() constllvm::AArch64Subtargetinline
HasRCPCllvm::AArch64Subtargetprotected
hasRDM() constllvm::AArch64Subtargetinline
HasRDMllvm::AArch64Subtargetprotected
HasSPEllvm::AArch64Subtargetprotected
hasSPE() constllvm::AArch64Subtargetinline
HasSVEllvm::AArch64Subtargetprotected
hasSVE() constllvm::AArch64Subtargetinline
hasV8_1aOps() constllvm::AArch64Subtargetinline
HasV8_1aOpsllvm::AArch64Subtargetprotected
HasV8_2aOpsllvm::AArch64Subtargetprotected
hasV8_2aOps() constllvm::AArch64Subtargetinline
HasV8_3aOpsllvm::AArch64Subtargetprotected
hasV8_3aOps() constllvm::AArch64Subtargetinline
HasZeroCycleRegMovellvm::AArch64Subtargetprotected
hasZeroCycleRegMove() constllvm::AArch64Subtargetinline
HasZeroCycleZeroingllvm::AArch64Subtargetprotected
hasZeroCycleZeroing() constllvm::AArch64Subtargetinline
InstrInfollvm::AArch64Subtargetprotected
InstSelectorllvm::AArch64Subtargetprotected
isCallingConvWin64(CallingConv::ID CC) constllvm::AArch64Subtargetinline
IsLittlellvm::AArch64Subtargetprotected
isLittleEndian() constllvm::AArch64Subtargetinline
isMisaligned128StoreSlow() constllvm::AArch64Subtargetinline
isPaired128Slow() constllvm::AArch64Subtargetinline
isSTRQroSlow() constllvm::AArch64Subtargetinline
isTargetAndroid() constllvm::AArch64Subtargetinline
isTargetCOFF() constllvm::AArch64Subtargetinline
isTargetDarwin() constllvm::AArch64Subtargetinline
isTargetELF() constllvm::AArch64Subtargetinline
isTargetFuchsia() constllvm::AArch64Subtargetinline
isTargetIOS() constllvm::AArch64Subtargetinline
isTargetLinux() constllvm::AArch64Subtargetinline
isTargetMachO() constllvm::AArch64Subtargetinline
isTargetWindows() constllvm::AArch64Subtargetinline
isX18Reserved() constllvm::AArch64Subtargetinline
isXRaySupported() const overridellvm::AArch64Subtargetinline
Kryo enum valuellvm::AArch64Subtarget
Legalizerllvm::AArch64Subtargetprotected
MaxInterleaveFactorllvm::AArch64Subtargetprotected
MaxJumpTableSizellvm::AArch64Subtargetprotected
MaxPrefetchIterationsAheadllvm::AArch64Subtargetprotected
MinPrefetchStridellvm::AArch64Subtargetprotected
MinVectorRegisterBitWidthllvm::AArch64Subtargetprotected
Misaligned128StoreIsSlowllvm::AArch64Subtargetprotected
NegativeImmediatesllvm::AArch64Subtargetprotected
Others enum valuellvm::AArch64Subtarget
overrideSchedPolicy(MachineSchedPolicy &Policy, unsigned NumRegionInstrs) const overridellvm::AArch64Subtarget
Paired128IsSlowllvm::AArch64Subtargetprotected
ParseSubtargetFeatures(StringRef CPU, StringRef FS)llvm::AArch64Subtarget
predictableSelectIsExpensive() constllvm::AArch64Subtargetinline
PredictableSelectIsExpensivellvm::AArch64Subtargetprotected
PrefetchDistancellvm::AArch64Subtargetprotected
PrefFunctionAlignmentllvm::AArch64Subtargetprotected
PrefLoopAlignmentllvm::AArch64Subtargetprotected
RegBankInfollvm::AArch64Subtargetprotected
requiresStrictAlign() constllvm::AArch64Subtargetinline
ReserveX18llvm::AArch64Subtargetprotected
Saphira enum valuellvm::AArch64Subtarget
StrictAlignllvm::AArch64Subtargetprotected
STRQroIsSlowllvm::AArch64Subtargetprotected
supportsAddressTopByteIgnored() constllvm::AArch64Subtarget
TargetTriplellvm::AArch64Subtargetprotected
ThunderX enum valuellvm::AArch64Subtarget
ThunderX2T99 enum valuellvm::AArch64Subtarget
ThunderXT81 enum valuellvm::AArch64Subtarget
ThunderXT83 enum valuellvm::AArch64Subtarget
ThunderXT88 enum valuellvm::AArch64Subtarget
TLInfollvm::AArch64Subtargetprotected
TSInfollvm::AArch64Subtargetprotected
UseAAllvm::AArch64Subtargetprotected
useAA() const overridellvm::AArch64Subtargetinline
UseAlternateSExtLoadCVTF32Patternllvm::AArch64Subtargetprotected
useAlternateSExtLoadCVTF32Pattern() constllvm::AArch64Subtargetinline
UsePostRASchedulerllvm::AArch64Subtargetprotected
UseRSqrtllvm::AArch64Subtargetprotected
useRSqrt() constllvm::AArch64Subtargetinline
useSmallAddressing() constllvm::AArch64Subtargetinline
VectorInsertExtractBaseCostllvm::AArch64Subtargetprotected
WideningBaseCostllvm::AArch64Subtargetprotected