LLVM  8.0.0svn
Public Types | Public Member Functions | Protected Attributes | List of all members
llvm::AArch64Subtarget Class Referencefinal

#include "Target/AArch64/AArch64Subtarget.h"

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Public Types

enum  ARMProcFamilyEnum : uint8_t {
  Others, CortexA35, CortexA53, CortexA55,
  CortexA57, CortexA72, CortexA73, CortexA75,
  Cyclone, ExynosM1, ExynosM3, Falkor,
  Kryo, Saphira, ThunderX2T99, ThunderX,
  ThunderXT81, ThunderXT83, ThunderXT88
}
 

Public Member Functions

 AArch64Subtarget (const Triple &TT, const std::string &CPU, const std::string &FS, const TargetMachine &TM, bool LittleEndian)
 This constructor initializes the data members to match that of the specified triple. More...
 
const AArch64SelectionDAGInfogetSelectionDAGInfo () const override
 
const AArch64FrameLoweringgetFrameLowering () const override
 
const AArch64TargetLoweringgetTargetLowering () const override
 
const AArch64InstrInfogetInstrInfo () const override
 
const AArch64RegisterInfogetRegisterInfo () const override
 
const CallLoweringgetCallLowering () const override
 
const InstructionSelectorgetInstructionSelector () const override
 
const LegalizerInfogetLegalizerInfo () const override
 
const RegisterBankInfogetRegBankInfo () const override
 
const TriplegetTargetTriple () const
 
bool enableMachineScheduler () const override
 
bool enablePostRAScheduler () const override
 
ARMProcFamilyEnum getProcFamily () const
 Returns ARM processor family. More...
 
bool hasV8_1aOps () const
 
bool hasV8_2aOps () const
 
bool hasV8_3aOps () const
 
bool hasV8_4aOps () const
 
bool hasZeroCycleRegMove () const
 
bool hasZeroCycleZeroing () const
 
bool hasZeroCycleZeroingFPWorkaround () const
 
bool requiresStrictAlign () const
 
bool isXRaySupported () const override
 
unsigned getMinVectorRegisterBitWidth () const
 
bool isXRegisterReserved (size_t i) const
 
unsigned getNumXRegisterReserved () const
 
bool hasFPARMv8 () const
 
bool hasNEON () const
 
bool hasCrypto () const
 
bool hasDotProd () const
 
bool hasCRC () const
 
bool hasLSE () const
 
bool hasRAS () const
 
bool hasRDM () const
 
bool hasSM4 () const
 
bool hasSHA3 () const
 
bool hasSHA2 () const
 
bool hasAES () const
 
bool balanceFPOps () const
 
bool predictableSelectIsExpensive () const
 
bool hasCustomCheapAsMoveHandling () const
 
bool hasExynosCheapAsMoveHandling () const
 
bool isMisaligned128StoreSlow () const
 
bool isPaired128Slow () const
 
bool isSTRQroSlow () const
 
bool useAlternateSExtLoadCVTF32Pattern () const
 
bool hasArithmeticBccFusion () const
 
bool hasArithmeticCbzFusion () const
 
bool hasFuseAddress () const
 
bool hasFuseAES () const
 
bool hasFuseCCSelect () const
 
bool hasFuseLiterals () const
 
bool hasFusion () const
 Return true if the CPU supports any kind of instruction fusion. More...
 
bool useRSqrt () const
 
unsigned getMaxInterleaveFactor () const
 
unsigned getVectorInsertExtractBaseCost () const
 
unsigned getCacheLineSize () const
 
unsigned getPrefetchDistance () const
 
unsigned getMinPrefetchStride () const
 
unsigned getMaxPrefetchIterationsAhead () const
 
unsigned getPrefFunctionAlignment () const
 
unsigned getPrefLoopAlignment () const
 
unsigned getMaximumJumpTableSize () const
 
unsigned getWideningBaseCost () const
 
bool supportsAddressTopByteIgnored () const
 CPU has TBI (top byte of addresses is ignored during HW address translation) and OS enables it. More...
 
bool hasPerfMon () const
 
bool hasFullFP16 () const
 
bool hasFP16FML () const
 
bool hasSPE () const
 
bool hasLSLFast () const
 
bool hasSVE () const
 
bool hasRCPC () const
 
bool hasAggressiveFMA () const
 
bool isLittleEndian () const
 
bool isTargetDarwin () const
 
bool isTargetIOS () const
 
bool isTargetLinux () const
 
bool isTargetWindows () const
 
bool isTargetAndroid () const
 
bool isTargetFuchsia () const
 
bool isTargetCOFF () const
 
bool isTargetELF () const
 
bool isTargetMachO () const
 
bool useAA () const override
 
bool useSmallAddressing () const
 
void ParseSubtargetFeatures (StringRef CPU, StringRef FS)
 ParseSubtargetFeatures - Parses features string setting specified subtarget options. More...
 
unsigned char ClassifyGlobalReference (const GlobalValue *GV, const TargetMachine &TM) const
 ClassifyGlobalReference - Find the target operand flags that describe how a global value should be referenced for the current subtarget. More...
 
unsigned char classifyGlobalFunctionReference (const GlobalValue *GV, const TargetMachine &TM) const
 
void overrideSchedPolicy (MachineSchedPolicy &Policy, unsigned NumRegionInstrs) const override
 
bool enableEarlyIfConversion () const override
 
std::unique_ptr< PBQPRAConstraintgetCustomPBQPConstraints () const override
 
bool isCallingConvWin64 (CallingConv::ID CC) const
 
void mirFileLoaded (MachineFunction &MF) const override
 

Protected Attributes

ARMProcFamilyEnum ARMProcFamily = Others
 ARMProcFamily - ARM processor family: Cortex-A53, Cortex-A57, and others. More...
 
bool HasV8_1aOps = false
 
bool HasV8_2aOps = false
 
bool HasV8_3aOps = false
 
bool HasV8_4aOps = false
 
bool HasFPARMv8 = false
 
bool HasNEON = false
 
bool HasCrypto = false
 
bool HasDotProd = false
 
bool HasCRC = false
 
bool HasLSE = false
 
bool HasRAS = false
 
bool HasRDM = false
 
bool HasPerfMon = false
 
bool HasFullFP16 = false
 
bool HasFP16FML = false
 
bool HasSPE = false
 
bool HasSM4 = true
 
bool HasSHA3 = true
 
bool HasSHA2 = true
 
bool HasAES = true
 
bool HasLSLFast = false
 
bool HasSVE = false
 
bool HasRCPC = false
 
bool HasAggressiveFMA = false
 
bool HasZeroCycleRegMove = false
 
bool HasZeroCycleZeroing = false
 
bool HasZeroCycleZeroingFPWorkaround = false
 
bool StrictAlign = false
 
bool NegativeImmediates = true
 
unsigned MinVectorRegisterBitWidth = 64
 
bool UseAA = false
 
bool PredictableSelectIsExpensive = false
 
bool BalanceFPOps = false
 
bool CustomAsCheapAsMove = false
 
bool ExynosAsCheapAsMove = false
 
bool UsePostRAScheduler = false
 
bool Misaligned128StoreIsSlow = false
 
bool Paired128IsSlow = false
 
bool STRQroIsSlow = false
 
bool UseAlternateSExtLoadCVTF32Pattern = false
 
bool HasArithmeticBccFusion = false
 
bool HasArithmeticCbzFusion = false
 
bool HasFuseAddress = false
 
bool HasFuseAES = false
 
bool HasFuseCCSelect = false
 
bool HasFuseLiterals = false
 
bool DisableLatencySchedHeuristic = false
 
bool UseRSqrt = false
 
uint8_t MaxInterleaveFactor = 2
 
uint8_t VectorInsertExtractBaseCost = 3
 
uint16_t CacheLineSize = 0
 
uint16_t PrefetchDistance = 0
 
uint16_t MinPrefetchStride = 1
 
unsigned MaxPrefetchIterationsAhead = UINT_MAX
 
unsigned PrefFunctionAlignment = 0
 
unsigned PrefLoopAlignment = 0
 
unsigned MaxJumpTableSize = 0
 
unsigned WideningBaseCost = 0
 
BitVector ReserveXRegister
 
bool IsLittle
 
Triple TargetTriple
 TargetTriple - What processor and OS we're targeting. More...
 
AArch64FrameLowering FrameLowering
 
AArch64InstrInfo InstrInfo
 
AArch64SelectionDAGInfo TSInfo
 
AArch64TargetLowering TLInfo
 
std::unique_ptr< CallLoweringCallLoweringInfo
 GlobalISel related APIs. More...
 
std::unique_ptr< InstructionSelectorInstSelector
 
std::unique_ptr< LegalizerInfoLegalizer
 
std::unique_ptr< RegisterBankInfoRegBankInfo
 

Detailed Description

Definition at line 38 of file AArch64Subtarget.h.

Member Enumeration Documentation

◆ ARMProcFamilyEnum

Enumerator
Others 
CortexA35 
CortexA53 
CortexA55 
CortexA57 
CortexA72 
CortexA73 
CortexA75 
Cyclone 
ExynosM1 
ExynosM3 
Falkor 
Kryo 
Saphira 
ThunderX2T99 
ThunderX 
ThunderXT81 
ThunderXT83 
ThunderXT88 

Definition at line 40 of file AArch64Subtarget.h.

Constructor & Destructor Documentation

◆ AArch64Subtarget()

AArch64Subtarget::AArch64Subtarget ( const Triple TT,
const std::string &  CPU,
const std::string &  FS,
const TargetMachine TM,
bool  LittleEndian 
)

This constructor initializes the data members to match that of the specified triple.

Definition at line 151 of file AArch64Subtarget.cpp.

References CallLoweringInfo, llvm::createAArch64InstructionSelector(), getRegisterInfo(), getTargetLowering(), InstSelector, llvm::AArch64::isX18ReservedByDefault(), RegBankInfo, ReserveXRegister, and llvm::BitVector::set().

Member Function Documentation

◆ balanceFPOps()

bool llvm::AArch64Subtarget::balanceFPOps ( ) const
inline

Definition at line 243 of file AArch64Subtarget.h.

References BalanceFPOps.

Referenced by getCustomPBQPConstraints(), and false::Chain::str().

◆ classifyGlobalFunctionReference()

unsigned char AArch64Subtarget::classifyGlobalFunctionReference ( const GlobalValue GV,
const TargetMachine TM 
) const

◆ ClassifyGlobalReference()

unsigned char AArch64Subtarget::ClassifyGlobalReference ( const GlobalValue GV,
const TargetMachine TM 
) const

◆ enableEarlyIfConversion()

bool AArch64Subtarget::enableEarlyIfConversion ( ) const
override

Definition at line 250 of file AArch64Subtarget.cpp.

References EnableEarlyIfConvert.

Referenced by useSmallAddressing().

◆ enableMachineScheduler()

bool llvm::AArch64Subtarget::enableMachineScheduler ( ) const
inlineoverride

Definition at line 195 of file AArch64Subtarget.h.

◆ enablePostRAScheduler()

bool llvm::AArch64Subtarget::enablePostRAScheduler ( ) const
inlineoverride

Definition at line 196 of file AArch64Subtarget.h.

References UsePostRAScheduler.

◆ getCacheLineSize()

unsigned llvm::AArch64Subtarget::getCacheLineSize ( ) const
inline

Definition at line 273 of file AArch64Subtarget.h.

References CacheLineSize.

Referenced by llvm::AArch64TTIImpl::getCacheLineSize().

◆ getCallLowering()

const CallLowering * AArch64Subtarget::getCallLowering ( ) const
override

Definition at line 177 of file AArch64Subtarget.cpp.

References CallLoweringInfo.

Referenced by getRegisterInfo().

◆ getCustomPBQPConstraints()

std::unique_ptr< PBQPRAConstraint > AArch64Subtarget::getCustomPBQPConstraints ( ) const
override

Definition at line 268 of file AArch64Subtarget.cpp.

References balanceFPOps().

Referenced by useSmallAddressing().

◆ getFrameLowering()

const AArch64FrameLowering* llvm::AArch64Subtarget::getFrameLowering ( ) const
inlineoverride

Definition at line 180 of file AArch64Subtarget.h.

References FrameLowering.

◆ getInstrInfo()

const AArch64InstrInfo* llvm::AArch64Subtarget::getInstrInfo ( ) const
inlineoverride

◆ getInstructionSelector()

const InstructionSelector * AArch64Subtarget::getInstructionSelector ( ) const
override

Definition at line 181 of file AArch64Subtarget.cpp.

References InstSelector.

Referenced by getRegisterInfo().

◆ getLegalizerInfo()

const LegalizerInfo * AArch64Subtarget::getLegalizerInfo ( ) const
override

Definition at line 185 of file AArch64Subtarget.cpp.

Referenced by getRegisterInfo().

◆ getMaximumJumpTableSize()

unsigned llvm::AArch64Subtarget::getMaximumJumpTableSize ( ) const
inline

Definition at line 282 of file AArch64Subtarget.h.

References MaxJumpTableSize.

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering().

◆ getMaxInterleaveFactor()

unsigned llvm::AArch64Subtarget::getMaxInterleaveFactor ( ) const
inline

Definition at line 269 of file AArch64Subtarget.h.

References MaxInterleaveFactor.

Referenced by llvm::AArch64TTIImpl::getMaxInterleaveFactor().

◆ getMaxPrefetchIterationsAhead()

unsigned llvm::AArch64Subtarget::getMaxPrefetchIterationsAhead ( ) const
inline

◆ getMinPrefetchStride()

unsigned llvm::AArch64Subtarget::getMinPrefetchStride ( ) const
inline

Definition at line 275 of file AArch64Subtarget.h.

References MinPrefetchStride.

Referenced by llvm::AArch64TTIImpl::getMinPrefetchStride().

◆ getMinVectorRegisterBitWidth()

unsigned llvm::AArch64Subtarget::getMinVectorRegisterBitWidth ( ) const
inline

◆ getNumXRegisterReserved()

unsigned llvm::AArch64Subtarget::getNumXRegisterReserved ( ) const
inline

◆ getPrefetchDistance()

unsigned llvm::AArch64Subtarget::getPrefetchDistance ( ) const
inline

Definition at line 274 of file AArch64Subtarget.h.

References PrefetchDistance.

Referenced by llvm::AArch64TTIImpl::getPrefetchDistance().

◆ getPrefFunctionAlignment()

unsigned llvm::AArch64Subtarget::getPrefFunctionAlignment ( ) const
inline

◆ getPrefLoopAlignment()

unsigned llvm::AArch64Subtarget::getPrefLoopAlignment ( ) const
inline

Definition at line 280 of file AArch64Subtarget.h.

References PrefLoopAlignment.

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering().

◆ getProcFamily()

ARMProcFamilyEnum llvm::AArch64Subtarget::getProcFamily ( ) const
inline

Returns ARM processor family.

Avoid this function! CPU specifics should be kept local to this class and preferably modeled with SubtargetFeatures or properties in initializeProperties().

Definition at line 204 of file AArch64Subtarget.h.

References ARMProcFamily.

Referenced by llvm::AArch64TTIImpl::getUnrollingPreferences().

◆ getRegBankInfo()

const RegisterBankInfo * AArch64Subtarget::getRegBankInfo ( ) const
override

Definition at line 189 of file AArch64Subtarget.cpp.

References RegBankInfo.

Referenced by getRegisterInfo().

◆ getRegisterInfo()

const AArch64RegisterInfo* llvm::AArch64Subtarget::getRegisterInfo ( ) const
inlineoverride

◆ getSelectionDAGInfo()

const AArch64SelectionDAGInfo* llvm::AArch64Subtarget::getSelectionDAGInfo ( ) const
inlineoverride

Definition at line 177 of file AArch64Subtarget.h.

References TSInfo.

◆ getTargetLowering()

const AArch64TargetLowering* llvm::AArch64Subtarget::getTargetLowering ( ) const
inlineoverride

◆ getTargetTriple()

const Triple& llvm::AArch64Subtarget::getTargetTriple ( ) const
inline

Definition at line 194 of file AArch64Subtarget.h.

References TargetTriple.

Referenced by ClassifyGlobalReference().

◆ getVectorInsertExtractBaseCost()

unsigned llvm::AArch64Subtarget::getVectorInsertExtractBaseCost ( ) const
inline

Definition at line 270 of file AArch64Subtarget.h.

References VectorInsertExtractBaseCost.

Referenced by llvm::AArch64TTIImpl::getVectorInstrCost().

◆ getWideningBaseCost()

unsigned llvm::AArch64Subtarget::getWideningBaseCost ( ) const
inline

◆ hasAES()

bool llvm::AArch64Subtarget::hasAES ( ) const
inline

Definition at line 242 of file AArch64Subtarget.h.

References HasAES.

◆ hasAggressiveFMA()

bool llvm::AArch64Subtarget::hasAggressiveFMA ( ) const
inline

Definition at line 297 of file AArch64Subtarget.h.

References HasAggressiveFMA.

◆ hasArithmeticBccFusion()

bool llvm::AArch64Subtarget::hasArithmeticBccFusion ( ) const
inline

Definition at line 255 of file AArch64Subtarget.h.

References HasArithmeticBccFusion.

Referenced by hasFusion().

◆ hasArithmeticCbzFusion()

bool llvm::AArch64Subtarget::hasArithmeticCbzFusion ( ) const
inline

Definition at line 256 of file AArch64Subtarget.h.

References HasArithmeticCbzFusion.

Referenced by hasFusion().

◆ hasCRC()

bool llvm::AArch64Subtarget::hasCRC ( ) const
inline

Definition at line 235 of file AArch64Subtarget.h.

References HasCRC.

◆ hasCrypto()

bool llvm::AArch64Subtarget::hasCrypto ( ) const
inline

Definition at line 233 of file AArch64Subtarget.h.

References HasCrypto.

◆ hasCustomCheapAsMoveHandling()

bool llvm::AArch64Subtarget::hasCustomCheapAsMoveHandling ( ) const
inline

Definition at line 247 of file AArch64Subtarget.h.

References CustomAsCheapAsMove.

Referenced by llvm::AArch64InstrInfo::isAsCheapAsAMove().

◆ hasDotProd()

bool llvm::AArch64Subtarget::hasDotProd ( ) const
inline

Definition at line 234 of file AArch64Subtarget.h.

References HasDotProd.

◆ hasExynosCheapAsMoveHandling()

bool llvm::AArch64Subtarget::hasExynosCheapAsMoveHandling ( ) const
inline

Definition at line 248 of file AArch64Subtarget.h.

References ExynosAsCheapAsMove.

Referenced by llvm::AArch64InstrInfo::isAsCheapAsAMove().

◆ hasFP16FML()

bool llvm::AArch64Subtarget::hasFP16FML ( ) const
inline

Definition at line 292 of file AArch64Subtarget.h.

References HasFP16FML.

◆ hasFPARMv8()

bool llvm::AArch64Subtarget::hasFPARMv8 ( ) const
inline

◆ hasFullFP16()

bool llvm::AArch64Subtarget::hasFullFP16 ( ) const
inline

◆ hasFuseAddress()

bool llvm::AArch64Subtarget::hasFuseAddress ( ) const
inline

Definition at line 257 of file AArch64Subtarget.h.

References HasFuseAddress.

◆ hasFuseAES()

bool llvm::AArch64Subtarget::hasFuseAES ( ) const
inline

Definition at line 258 of file AArch64Subtarget.h.

References HasFuseAES.

Referenced by hasFusion().

◆ hasFuseCCSelect()

bool llvm::AArch64Subtarget::hasFuseCCSelect ( ) const
inline

Definition at line 259 of file AArch64Subtarget.h.

References HasFuseCCSelect.

Referenced by hasFusion().

◆ hasFuseLiterals()

bool llvm::AArch64Subtarget::hasFuseLiterals ( ) const
inline

Definition at line 260 of file AArch64Subtarget.h.

References HasFuseLiterals.

Referenced by hasFusion().

◆ hasFusion()

bool llvm::AArch64Subtarget::hasFusion ( ) const
inline

Return true if the CPU supports any kind of instruction fusion.

Definition at line 263 of file AArch64Subtarget.h.

References hasArithmeticBccFusion(), hasArithmeticCbzFusion(), hasFuseAES(), hasFuseCCSelect(), and hasFuseLiterals().

Referenced by llvm::AArch64beTargetMachine::AArch64beTargetMachine().

◆ hasLSE()

bool llvm::AArch64Subtarget::hasLSE ( ) const
inline

◆ hasLSLFast()

bool llvm::AArch64Subtarget::hasLSLFast ( ) const
inline

Definition at line 294 of file AArch64Subtarget.h.

References HasLSLFast.

◆ hasNEON()

bool llvm::AArch64Subtarget::hasNEON ( ) const
inline

◆ hasPerfMon()

bool llvm::AArch64Subtarget::hasPerfMon ( ) const
inline

Definition at line 290 of file AArch64Subtarget.h.

References HasPerfMon.

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering().

◆ hasRAS()

bool llvm::AArch64Subtarget::hasRAS ( ) const
inline

Definition at line 237 of file AArch64Subtarget.h.

References HasRAS.

◆ hasRCPC()

bool llvm::AArch64Subtarget::hasRCPC ( ) const
inline

Definition at line 296 of file AArch64Subtarget.h.

References HasRCPC.

◆ hasRDM()

bool llvm::AArch64Subtarget::hasRDM ( ) const
inline

Definition at line 238 of file AArch64Subtarget.h.

References HasRDM.

◆ hasSHA2()

bool llvm::AArch64Subtarget::hasSHA2 ( ) const
inline

Definition at line 241 of file AArch64Subtarget.h.

References HasSHA2.

◆ hasSHA3()

bool llvm::AArch64Subtarget::hasSHA3 ( ) const
inline

Definition at line 240 of file AArch64Subtarget.h.

References HasSHA3.

◆ hasSM4()

bool llvm::AArch64Subtarget::hasSM4 ( ) const
inline

Definition at line 239 of file AArch64Subtarget.h.

References HasSM4.

◆ hasSPE()

bool llvm::AArch64Subtarget::hasSPE ( ) const
inline

Definition at line 293 of file AArch64Subtarget.h.

References HasSPE.

◆ hasSVE()

bool llvm::AArch64Subtarget::hasSVE ( ) const
inline

Definition at line 295 of file AArch64Subtarget.h.

References HasSVE.

◆ hasV8_1aOps()

bool llvm::AArch64Subtarget::hasV8_1aOps ( ) const
inline

Definition at line 208 of file AArch64Subtarget.h.

References HasV8_1aOps.

◆ hasV8_2aOps()

bool llvm::AArch64Subtarget::hasV8_2aOps ( ) const
inline

Definition at line 209 of file AArch64Subtarget.h.

References HasV8_2aOps.

◆ hasV8_3aOps()

bool llvm::AArch64Subtarget::hasV8_3aOps ( ) const
inline

Definition at line 210 of file AArch64Subtarget.h.

References HasV8_3aOps.

Referenced by InsertReturnAddressAuth().

◆ hasV8_4aOps()

bool llvm::AArch64Subtarget::hasV8_4aOps ( ) const
inline

Definition at line 211 of file AArch64Subtarget.h.

References HasV8_4aOps.

◆ hasZeroCycleRegMove()

bool llvm::AArch64Subtarget::hasZeroCycleRegMove ( ) const
inline

Definition at line 213 of file AArch64Subtarget.h.

References HasZeroCycleRegMove.

◆ hasZeroCycleZeroing()

bool llvm::AArch64Subtarget::hasZeroCycleZeroing ( ) const
inline

Definition at line 215 of file AArch64Subtarget.h.

References HasZeroCycleZeroing.

Referenced by llvm::AArch64InstrInfo::isAsCheapAsAMove().

◆ hasZeroCycleZeroingFPWorkaround()

bool llvm::AArch64Subtarget::hasZeroCycleZeroingFPWorkaround ( ) const
inline

Definition at line 217 of file AArch64Subtarget.h.

References HasZeroCycleZeroingFPWorkaround.

◆ isCallingConvWin64()

bool llvm::AArch64Subtarget::isCallingConvWin64 ( CallingConv::ID  CC) const
inline

◆ isLittleEndian()

bool llvm::AArch64Subtarget::isLittleEndian ( ) const
inline

◆ isMisaligned128StoreSlow()

bool llvm::AArch64Subtarget::isMisaligned128StoreSlow ( ) const
inline

◆ isPaired128Slow()

bool llvm::AArch64Subtarget::isPaired128Slow ( ) const
inline

Definition at line 250 of file AArch64Subtarget.h.

References Paired128IsSlow.

◆ isSTRQroSlow()

bool llvm::AArch64Subtarget::isSTRQroSlow ( ) const
inline

Definition at line 251 of file AArch64Subtarget.h.

References STRQroIsSlow.

◆ isTargetAndroid()

bool llvm::AArch64Subtarget::isTargetAndroid ( ) const
inline

Definition at line 305 of file AArch64Subtarget.h.

References llvm::Triple::isAndroid().

◆ isTargetCOFF()

bool llvm::AArch64Subtarget::isTargetCOFF ( ) const
inline

Definition at line 308 of file AArch64Subtarget.h.

References llvm::Triple::isOSBinFormatCOFF().

Referenced by mayTailCallThisCC().

◆ isTargetDarwin()

bool llvm::AArch64Subtarget::isTargetDarwin ( ) const
inline

◆ isTargetELF()

bool llvm::AArch64Subtarget::isTargetELF ( ) const
inline

Definition at line 309 of file AArch64Subtarget.h.

References llvm::Triple::isOSBinFormatELF().

Referenced by mayTailCallThisCC().

◆ isTargetFuchsia()

bool llvm::AArch64Subtarget::isTargetFuchsia ( ) const
inline

Definition at line 306 of file AArch64Subtarget.h.

References llvm::Triple::isOSFuchsia().

◆ isTargetIOS()

bool llvm::AArch64Subtarget::isTargetIOS ( ) const
inline

Definition at line 302 of file AArch64Subtarget.h.

References llvm::Triple::isiOS().

◆ isTargetLinux()

bool llvm::AArch64Subtarget::isTargetLinux ( ) const
inline

Definition at line 303 of file AArch64Subtarget.h.

References llvm::Triple::isOSLinux().

◆ isTargetMachO()

bool llvm::AArch64Subtarget::isTargetMachO ( ) const
inline

◆ isTargetWindows()

bool llvm::AArch64Subtarget::isTargetWindows ( ) const
inline

◆ isXRaySupported()

bool llvm::AArch64Subtarget::isXRaySupported ( ) const
inlineoverride

Definition at line 223 of file AArch64Subtarget.h.

◆ isXRegisterReserved()

bool llvm::AArch64Subtarget::isXRegisterReserved ( size_t  i) const
inline

◆ mirFileLoaded()

void AArch64Subtarget::mirFileLoaded ( MachineFunction MF) const
override

◆ overrideSchedPolicy()

void AArch64Subtarget::overrideSchedPolicy ( MachineSchedPolicy Policy,
unsigned  NumRegionInstrs 
) const
override

◆ ParseSubtargetFeatures()

void llvm::AArch64Subtarget::ParseSubtargetFeatures ( StringRef  CPU,
StringRef  FS 
)

ParseSubtargetFeatures - Parses features string setting specified subtarget options.

Definition of function is auto generated by tblgen.

Referenced by useSmallAddressing().

◆ predictableSelectIsExpensive()

bool llvm::AArch64Subtarget::predictableSelectIsExpensive ( ) const
inline

◆ requiresStrictAlign()

bool llvm::AArch64Subtarget::requiresStrictAlign ( ) const
inline

◆ supportsAddressTopByteIgnored()

bool AArch64Subtarget::supportsAddressTopByteIgnored ( ) const

CPU has TBI (top byte of addresses is ignored during HW address translation) and OS enables it.

Definition at line 254 of file AArch64Subtarget.cpp.

References llvm::Triple::getiOSVersion(), llvm::Triple::isiOS(), TargetTriple, and UseAddressTopByteIgnored.

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering(), getWideningBaseCost(), and performSTORECombine().

◆ useAA()

bool llvm::AArch64Subtarget::useAA ( ) const
inlineoverride

Definition at line 312 of file AArch64Subtarget.h.

References UseAA.

◆ useAlternateSExtLoadCVTF32Pattern()

bool llvm::AArch64Subtarget::useAlternateSExtLoadCVTF32Pattern ( ) const
inline

Definition at line 252 of file AArch64Subtarget.h.

References UseAlternateSExtLoadCVTF32Pattern.

◆ useRSqrt()

bool llvm::AArch64Subtarget::useRSqrt ( ) const
inline

Definition at line 268 of file AArch64Subtarget.h.

References UseRSqrt.

Referenced by getEstimate().

◆ useSmallAddressing()

bool llvm::AArch64Subtarget::useSmallAddressing ( ) const
inline

Member Data Documentation

◆ ARMProcFamily

ARMProcFamilyEnum llvm::AArch64Subtarget::ARMProcFamily = Others
protected

ARMProcFamily - ARM processor family: Cortex-A53, Cortex-A57, and others.

Definition at line 64 of file AArch64Subtarget.h.

Referenced by getProcFamily().

◆ BalanceFPOps

bool llvm::AArch64Subtarget::BalanceFPOps = false
protected

Definition at line 114 of file AArch64Subtarget.h.

Referenced by balanceFPOps().

◆ CacheLineSize

uint16_t llvm::AArch64Subtarget::CacheLineSize = 0
protected

Definition at line 132 of file AArch64Subtarget.h.

Referenced by getCacheLineSize().

◆ CallLoweringInfo

std::unique_ptr<CallLowering> llvm::AArch64Subtarget::CallLoweringInfo
protected

GlobalISel related APIs.

Definition at line 155 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget(), and getCallLowering().

◆ CustomAsCheapAsMove

bool llvm::AArch64Subtarget::CustomAsCheapAsMove = false
protected

Definition at line 115 of file AArch64Subtarget.h.

Referenced by hasCustomCheapAsMoveHandling().

◆ DisableLatencySchedHeuristic

bool llvm::AArch64Subtarget::DisableLatencySchedHeuristic = false
protected

Definition at line 128 of file AArch64Subtarget.h.

Referenced by overrideSchedPolicy().

◆ ExynosAsCheapAsMove

bool llvm::AArch64Subtarget::ExynosAsCheapAsMove = false
protected

Definition at line 116 of file AArch64Subtarget.h.

Referenced by hasExynosCheapAsMoveHandling().

◆ FrameLowering

AArch64FrameLowering llvm::AArch64Subtarget::FrameLowering
protected

Definition at line 149 of file AArch64Subtarget.h.

Referenced by getFrameLowering().

◆ HasAES

bool llvm::AArch64Subtarget::HasAES = true
protected

Definition at line 89 of file AArch64Subtarget.h.

Referenced by hasAES().

◆ HasAggressiveFMA

bool llvm::AArch64Subtarget::HasAggressiveFMA = false
protected

Definition at line 94 of file AArch64Subtarget.h.

Referenced by hasAggressiveFMA().

◆ HasArithmeticBccFusion

bool llvm::AArch64Subtarget::HasArithmeticBccFusion = false
protected

Definition at line 122 of file AArch64Subtarget.h.

Referenced by hasArithmeticBccFusion().

◆ HasArithmeticCbzFusion

bool llvm::AArch64Subtarget::HasArithmeticCbzFusion = false
protected

Definition at line 123 of file AArch64Subtarget.h.

Referenced by hasArithmeticCbzFusion().

◆ HasCRC

bool llvm::AArch64Subtarget::HasCRC = false
protected

Definition at line 75 of file AArch64Subtarget.h.

Referenced by hasCRC().

◆ HasCrypto

bool llvm::AArch64Subtarget::HasCrypto = false
protected

Definition at line 73 of file AArch64Subtarget.h.

Referenced by hasCrypto().

◆ HasDotProd

bool llvm::AArch64Subtarget::HasDotProd = false
protected

Definition at line 74 of file AArch64Subtarget.h.

Referenced by hasDotProd().

◆ HasFP16FML

bool llvm::AArch64Subtarget::HasFP16FML = false
protected

Definition at line 81 of file AArch64Subtarget.h.

Referenced by hasFP16FML().

◆ HasFPARMv8

bool llvm::AArch64Subtarget::HasFPARMv8 = false
protected

Definition at line 71 of file AArch64Subtarget.h.

Referenced by hasFPARMv8().

◆ HasFullFP16

bool llvm::AArch64Subtarget::HasFullFP16 = false
protected

Definition at line 80 of file AArch64Subtarget.h.

Referenced by hasFullFP16().

◆ HasFuseAddress

bool llvm::AArch64Subtarget::HasFuseAddress = false
protected

Definition at line 124 of file AArch64Subtarget.h.

Referenced by hasFuseAddress().

◆ HasFuseAES

bool llvm::AArch64Subtarget::HasFuseAES = false
protected

Definition at line 125 of file AArch64Subtarget.h.

Referenced by hasFuseAES().

◆ HasFuseCCSelect

bool llvm::AArch64Subtarget::HasFuseCCSelect = false
protected

Definition at line 126 of file AArch64Subtarget.h.

Referenced by hasFuseCCSelect().

◆ HasFuseLiterals

bool llvm::AArch64Subtarget::HasFuseLiterals = false
protected

Definition at line 127 of file AArch64Subtarget.h.

Referenced by hasFuseLiterals().

◆ HasLSE

bool llvm::AArch64Subtarget::HasLSE = false
protected

Definition at line 76 of file AArch64Subtarget.h.

Referenced by hasLSE().

◆ HasLSLFast

bool llvm::AArch64Subtarget::HasLSLFast = false
protected

Definition at line 91 of file AArch64Subtarget.h.

Referenced by hasLSLFast().

◆ HasNEON

bool llvm::AArch64Subtarget::HasNEON = false
protected

Definition at line 72 of file AArch64Subtarget.h.

Referenced by hasNEON().

◆ HasPerfMon

bool llvm::AArch64Subtarget::HasPerfMon = false
protected

Definition at line 79 of file AArch64Subtarget.h.

Referenced by hasPerfMon().

◆ HasRAS

bool llvm::AArch64Subtarget::HasRAS = false
protected

Definition at line 77 of file AArch64Subtarget.h.

Referenced by hasRAS().

◆ HasRCPC

bool llvm::AArch64Subtarget::HasRCPC = false
protected

Definition at line 93 of file AArch64Subtarget.h.

Referenced by hasRCPC().

◆ HasRDM

bool llvm::AArch64Subtarget::HasRDM = false
protected

Definition at line 78 of file AArch64Subtarget.h.

Referenced by hasRDM().

◆ HasSHA2

bool llvm::AArch64Subtarget::HasSHA2 = true
protected

Definition at line 88 of file AArch64Subtarget.h.

Referenced by hasSHA2().

◆ HasSHA3

bool llvm::AArch64Subtarget::HasSHA3 = true
protected

Definition at line 86 of file AArch64Subtarget.h.

Referenced by hasSHA3().

◆ HasSM4

bool llvm::AArch64Subtarget::HasSM4 = true
protected

Definition at line 85 of file AArch64Subtarget.h.

Referenced by hasSM4().

◆ HasSPE

bool llvm::AArch64Subtarget::HasSPE = false
protected

Definition at line 82 of file AArch64Subtarget.h.

Referenced by hasSPE().

◆ HasSVE

bool llvm::AArch64Subtarget::HasSVE = false
protected

Definition at line 92 of file AArch64Subtarget.h.

Referenced by hasSVE().

◆ HasV8_1aOps

bool llvm::AArch64Subtarget::HasV8_1aOps = false
protected

Definition at line 66 of file AArch64Subtarget.h.

Referenced by hasV8_1aOps().

◆ HasV8_2aOps

bool llvm::AArch64Subtarget::HasV8_2aOps = false
protected

Definition at line 67 of file AArch64Subtarget.h.

Referenced by hasV8_2aOps().

◆ HasV8_3aOps

bool llvm::AArch64Subtarget::HasV8_3aOps = false
protected

Definition at line 68 of file AArch64Subtarget.h.

Referenced by hasV8_3aOps().

◆ HasV8_4aOps

bool llvm::AArch64Subtarget::HasV8_4aOps = false
protected

Definition at line 69 of file AArch64Subtarget.h.

Referenced by hasV8_4aOps().

◆ HasZeroCycleRegMove

bool llvm::AArch64Subtarget::HasZeroCycleRegMove = false
protected

Definition at line 97 of file AArch64Subtarget.h.

Referenced by hasZeroCycleRegMove().

◆ HasZeroCycleZeroing

bool llvm::AArch64Subtarget::HasZeroCycleZeroing = false
protected

Definition at line 100 of file AArch64Subtarget.h.

Referenced by hasZeroCycleZeroing().

◆ HasZeroCycleZeroingFPWorkaround

bool llvm::AArch64Subtarget::HasZeroCycleZeroingFPWorkaround = false
protected

Definition at line 101 of file AArch64Subtarget.h.

Referenced by hasZeroCycleZeroingFPWorkaround().

◆ InstrInfo

AArch64InstrInfo llvm::AArch64Subtarget::InstrInfo
protected

Definition at line 150 of file AArch64Subtarget.h.

Referenced by getInstrInfo().

◆ InstSelector

std::unique_ptr<InstructionSelector> llvm::AArch64Subtarget::InstSelector
protected

Definition at line 156 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget(), and getInstructionSelector().

◆ IsLittle

bool llvm::AArch64Subtarget::IsLittle
protected

Definition at line 144 of file AArch64Subtarget.h.

Referenced by isLittleEndian().

◆ Legalizer

std::unique_ptr<LegalizerInfo> llvm::AArch64Subtarget::Legalizer
protected

Definition at line 157 of file AArch64Subtarget.h.

◆ MaxInterleaveFactor

uint8_t llvm::AArch64Subtarget::MaxInterleaveFactor = 2
protected

Definition at line 130 of file AArch64Subtarget.h.

Referenced by getMaxInterleaveFactor().

◆ MaxJumpTableSize

unsigned llvm::AArch64Subtarget::MaxJumpTableSize = 0
protected

Definition at line 138 of file AArch64Subtarget.h.

Referenced by getMaximumJumpTableSize().

◆ MaxPrefetchIterationsAhead

unsigned llvm::AArch64Subtarget::MaxPrefetchIterationsAhead = UINT_MAX
protected

Definition at line 135 of file AArch64Subtarget.h.

Referenced by getMaxPrefetchIterationsAhead().

◆ MinPrefetchStride

uint16_t llvm::AArch64Subtarget::MinPrefetchStride = 1
protected

Definition at line 134 of file AArch64Subtarget.h.

Referenced by getMinPrefetchStride().

◆ MinVectorRegisterBitWidth

unsigned llvm::AArch64Subtarget::MinVectorRegisterBitWidth = 64
protected

Definition at line 110 of file AArch64Subtarget.h.

Referenced by getMinVectorRegisterBitWidth().

◆ Misaligned128StoreIsSlow

bool llvm::AArch64Subtarget::Misaligned128StoreIsSlow = false
protected

Definition at line 118 of file AArch64Subtarget.h.

Referenced by isMisaligned128StoreSlow().

◆ NegativeImmediates

bool llvm::AArch64Subtarget::NegativeImmediates = true
protected

Definition at line 107 of file AArch64Subtarget.h.

◆ Paired128IsSlow

bool llvm::AArch64Subtarget::Paired128IsSlow = false
protected

Definition at line 119 of file AArch64Subtarget.h.

Referenced by isPaired128Slow().

◆ PredictableSelectIsExpensive

bool llvm::AArch64Subtarget::PredictableSelectIsExpensive = false
protected

Definition at line 113 of file AArch64Subtarget.h.

Referenced by predictableSelectIsExpensive().

◆ PrefetchDistance

uint16_t llvm::AArch64Subtarget::PrefetchDistance = 0
protected

Definition at line 133 of file AArch64Subtarget.h.

Referenced by getPrefetchDistance().

◆ PrefFunctionAlignment

unsigned llvm::AArch64Subtarget::PrefFunctionAlignment = 0
protected

Definition at line 136 of file AArch64Subtarget.h.

Referenced by getPrefFunctionAlignment().

◆ PrefLoopAlignment

unsigned llvm::AArch64Subtarget::PrefLoopAlignment = 0
protected

Definition at line 137 of file AArch64Subtarget.h.

Referenced by getPrefLoopAlignment().

◆ RegBankInfo

std::unique_ptr<RegisterBankInfo> llvm::AArch64Subtarget::RegBankInfo
protected

Definition at line 158 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget(), and getRegBankInfo().

◆ ReserveXRegister

BitVector llvm::AArch64Subtarget::ReserveXRegister
protected

Definition at line 142 of file AArch64Subtarget.h.

Referenced by AArch64Subtarget().

◆ StrictAlign

bool llvm::AArch64Subtarget::StrictAlign = false
protected

Definition at line 104 of file AArch64Subtarget.h.

Referenced by requiresStrictAlign().

◆ STRQroIsSlow

bool llvm::AArch64Subtarget::STRQroIsSlow = false
protected

Definition at line 120 of file AArch64Subtarget.h.

Referenced by isSTRQroSlow().

◆ TargetTriple

Triple llvm::AArch64Subtarget::TargetTriple
protected

TargetTriple - What processor and OS we're targeting.

Definition at line 147 of file AArch64Subtarget.h.

Referenced by getTargetTriple(), and supportsAddressTopByteIgnored().

◆ TLInfo

AArch64TargetLowering llvm::AArch64Subtarget::TLInfo
protected

Definition at line 152 of file AArch64Subtarget.h.

Referenced by getTargetLowering().

◆ TSInfo

AArch64SelectionDAGInfo llvm::AArch64Subtarget::TSInfo
protected

Definition at line 151 of file AArch64Subtarget.h.

Referenced by getSelectionDAGInfo().

◆ UseAA

bool llvm::AArch64Subtarget::UseAA = false
protected

Definition at line 112 of file AArch64Subtarget.h.

Referenced by useAA().

◆ UseAlternateSExtLoadCVTF32Pattern

bool llvm::AArch64Subtarget::UseAlternateSExtLoadCVTF32Pattern = false
protected

Definition at line 121 of file AArch64Subtarget.h.

Referenced by useAlternateSExtLoadCVTF32Pattern().

◆ UsePostRAScheduler

bool llvm::AArch64Subtarget::UsePostRAScheduler = false
protected

Definition at line 117 of file AArch64Subtarget.h.

Referenced by enablePostRAScheduler().

◆ UseRSqrt

bool llvm::AArch64Subtarget::UseRSqrt = false
protected

Definition at line 129 of file AArch64Subtarget.h.

Referenced by useRSqrt().

◆ VectorInsertExtractBaseCost

uint8_t llvm::AArch64Subtarget::VectorInsertExtractBaseCost = 3
protected

Definition at line 131 of file AArch64Subtarget.h.

Referenced by getVectorInsertExtractBaseCost().

◆ WideningBaseCost

unsigned llvm::AArch64Subtarget::WideningBaseCost = 0
protected

Definition at line 139 of file AArch64Subtarget.h.

Referenced by getWideningBaseCost().


The documentation for this class was generated from the following files: