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llvm::ConvergingVLIWScheduler Class Reference

ConvergingVLIWScheduler shrinks the unscheduled zone using heuristics to balance the schedule. More...

#include "Target/Hexagon/HexagonMachineScheduler.h"

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Public Types

enum  { TopQID = 1, BotQID = 2, LogMaxQID = 2 }
 SUnit::NodeQueueId: 0 (none), 1 (top), 2 (bot), 3 (both) More...
 

Public Member Functions

 ConvergingVLIWScheduler ()
 
void initialize (ScheduleDAGMI *dag) override
 Initialize the strategy after building the DAG for a new region. More...
 
SUnitpickNode (bool &IsTopNode) override
 Pick the best node to balance the schedule. Implements MachineSchedStrategy. More...
 
void schedNode (SUnit *SU, bool IsTopNode) override
 Update the scheduler's state after scheduling a node. More...
 
void releaseTopNode (SUnit *SU) override
 When all predecessor dependencies have been resolved, free this node for top-down scheduling. More...
 
void releaseBottomNode (SUnit *SU) override
 When all successor dependencies have been resolved, free this node for bottom-up scheduling. More...
 
unsigned ReportPackets ()
 
- Public Member Functions inherited from llvm::MachineSchedStrategy
virtual ~MachineSchedStrategy ()=default
 
virtual void initPolicy (MachineBasicBlock::iterator Begin, MachineBasicBlock::iterator End, unsigned NumRegionInstrs)
 Optionally override the per-region scheduling policy. More...
 
virtual void dumpPolicy () const
 
virtual bool shouldTrackPressure () const
 Check if pressure tracking is needed before building the DAG and initializing this strategy. More...
 
virtual bool shouldTrackLaneMasks () const
 Returns true if lanemasks should be tracked. More...
 
virtual bool doMBBSchedRegionsTopDown () const
 
virtual void enterMBB (MachineBasicBlock *MBB)
 Tell the strategy that MBB is about to be processed. More...
 
virtual void leaveMBB ()
 Tell the strategy that current MBB is done. More...
 
virtual void registerRoots ()
 Notify this strategy that all roots have been released (including those that depend on EntrySU or ExitSU). More...
 
virtual void scheduleTree (unsigned SubtreeID)
 Scheduler callback to notify that a new subtree is scheduled. More...
 

Protected Member Functions

SUnitpickNodeBidrectional (bool &IsTopNode)
 Pick the best candidate node from either the top or bottom queue. More...
 
int SchedulingCost (ReadyQueue &Q, SUnit *SU, SchedCandidate &Candidate, RegPressureDelta &Delta, bool verbose)
 Single point to compute overall scheduling cost. More...
 
CandResult pickNodeFromQueue (ReadyQueue &Q, const RegPressureTracker &RPTracker, SchedCandidate &Candidate)
 Pick the best candidate from the top queue. More...
 
void traceCandidate (const char *Label, const ReadyQueue &Q, SUnit *SU, int Cost, PressureChange P=PressureChange())
 
void readyQueueVerboseDump (const RegPressureTracker &RPTracker, SchedCandidate &Candidate, ReadyQueue &Q)
 

Detailed Description

ConvergingVLIWScheduler shrinks the unscheduled zone using heuristics to balance the schedule.

Definition at line 114 of file HexagonMachineScheduler.h.

Member Enumeration Documentation

◆ anonymous enum

anonymous enum

SUnit::NodeQueueId: 0 (none), 1 (top), 2 (bot), 3 (both)

Enumerator
TopQID 
BotQID 
LogMaxQID 

Definition at line 202 of file HexagonMachineScheduler.h.

Constructor & Destructor Documentation

◆ ConvergingVLIWScheduler()

llvm::ConvergingVLIWScheduler::ConvergingVLIWScheduler ( )
inline

Definition at line 208 of file HexagonMachineScheduler.h.

References initialize().

Member Function Documentation

◆ initialize()

void ConvergingVLIWScheduler::initialize ( ScheduleDAGMI DAG)
overridevirtual

◆ pickNode()

SUnit * ConvergingVLIWScheduler::pickNode ( bool IsTopNode)
overridevirtual

◆ pickNodeBidrectional()

SUnit * ConvergingVLIWScheduler::pickNodeBidrectional ( bool IsTopNode)
protected

Pick the best candidate node from either the top or bottom queue.

Definition at line 834 of file HexagonMachineScheduler.cpp.

References assert(), llvm::dbgs(), DEBUG, and llvm::NoCand.

◆ pickNodeFromQueue()

ConvergingVLIWScheduler::CandResult ConvergingVLIWScheduler::pickNodeFromQueue ( ReadyQueue Q,
const RegPressureTracker RPTracker,
SchedCandidate &  Candidate 
)
protected

Pick the best candidate from the top queue.

TODO: getMaxPressureDelta results can be mostly cached for each SUnit during DAG building. To adjust for the current scheduling location we need to maintain the number of vreg uses remaining to be top-scheduled.

Definition at line 723 of file HexagonMachineScheduler.cpp.

References llvm::ReadyQueue::begin(), BotUseShorterTie, llvm::dbgs(), DEBUG, DisableTCTie, llvm::ReadyQueue::dump(), E, llvm::ReadyQueue::end(), llvm::ReadyQueue::getID(), llvm::HexagonSubtarget::getInstrInfo(), I, MI, llvm::NoCand, llvm::NodeOrder, SchedDebugVerboseLevel, and TopUseShorterTie.

Referenced by SchedulingCost().

◆ readyQueueVerboseDump()

void ConvergingVLIWScheduler::readyQueueVerboseDump ( const RegPressureTracker RPTracker,
SchedCandidate &  Candidate,
ReadyQueue Q 
)
protected

◆ releaseBottomNode()

void ConvergingVLIWScheduler::releaseBottomNode ( SUnit SU)
overridevirtual

◆ releaseTopNode()

void ConvergingVLIWScheduler::releaseTopNode ( SUnit SU)
overridevirtual

When all predecessor dependencies have been resolved, free this node for top-down scheduling.

Implements llvm::MachineSchedStrategy.

Definition at line 273 of file HexagonMachineScheduler.cpp.

References llvm::SDep::getLatency(), llvm::SDep::getSUnit(), llvm::SUnit::isScheduled, llvm::max(), llvm::SUnit::Preds, and llvm::SUnit::TopReadyCycle.

◆ ReportPackets()

unsigned llvm::ConvergingVLIWScheduler::ReportPackets ( )
inline

Definition at line 220 of file HexagonMachineScheduler.h.

References P.

◆ schedNode()

void ConvergingVLIWScheduler::schedNode ( SUnit SU,
bool  IsTopNode 
)
overridevirtual

Update the scheduler's state after scheduling a node.

This is the same node that was just returned by pickNode(). However, VLIWMachineScheduler needs to update it's state based on the current cycle before MachineSchedStrategy does.

Implements llvm::MachineSchedStrategy.

Definition at line 948 of file HexagonMachineScheduler.cpp.

References llvm::SUnit::BotReadyCycle, and llvm::SUnit::TopReadyCycle.

◆ SchedulingCost()

int ConvergingVLIWScheduler::SchedulingCost ( ReadyQueue Q,
SUnit SU,
SchedCandidate &  Candidate,
RegPressureDelta Delta,
bool  verbose 
)
protected

◆ traceCandidate()

void ConvergingVLIWScheduler::traceCandidate ( const char Label,
const ReadyQueue Q,
SUnit SU,
int  Cost,
PressureChange  P = PressureChange() 
)
protected

The documentation for this class was generated from the following files: