llvm::HexagonSubtarget Class Reference

#include "Target/Hexagon/HexagonSubtarget.h"

Inheritance diagram for llvm::HexagonSubtarget:

Collaboration diagram for llvm::HexagonSubtarget:

Classes
struct	BankConflictMutation
struct	CallMutation
struct	HVXMemLatencyMutation
struct	UsrOverflowMutation

Public Member Functions
	HexagonSubtarget (const Triple &TT, StringRef CPU, StringRef FS, const TargetMachine &TM)
const InstrItineraryData *	getInstrItineraryData () const override
	getInstrItins - Return the instruction itineraries based on subtarget selection. More...
const HexagonInstrInfo *	getInstrInfo () const override
const HexagonRegisterInfo *	getRegisterInfo () const override
const HexagonTargetLowering *	getTargetLowering () const override
const HexagonFrameLowering *	getFrameLowering () const override
const HexagonSelectionDAGInfo *	getSelectionDAGInfo () const override
HexagonSubtarget &	initializeSubtargetDependencies (StringRef CPU, StringRef FS)
void	ParseSubtargetFeatures (StringRef CPU, StringRef FS)
	ParseSubtargetFeatures - Parses features string setting specified subtarget options. More...
bool	hasV5Ops () const
bool	hasV5OpsOnly () const
bool	hasV55Ops () const
bool	hasV55OpsOnly () const
bool	hasV60Ops () const
bool	hasV60OpsOnly () const
bool	hasV62Ops () const
bool	hasV62OpsOnly () const
bool	hasV65Ops () const
bool	hasV65OpsOnly () const
bool	hasV66Ops () const
bool	hasV66OpsOnly () const
bool	useLongCalls () const
bool	useMemops () const
bool	usePackets () const
bool	useNewValueJumps () const
bool	useNewValueStores () const
bool	useSmallData () const
bool	useZRegOps () const
bool	useHVXOps () const
bool	useHVX128BOps () const
bool	useHVX64BOps () const
bool	hasMemNoShuf () const
bool	hasReservedR19 () const
bool	usePredicatedCalls () const
bool	noreturnStackElim () const
bool	useBSBScheduling () const
bool	enableMachineScheduler () const override
bool	enableMachineSchedDefaultSched () const override
AntiDepBreakMode	getAntiDepBreakMode () const override
bool	enablePostRAScheduler () const override
bool	enableSubRegLiveness () const override
const std::string &	getCPUString () const
const Hexagon::ArchEnum &	getHexagonArchVersion () const
void	getPostRAMutations (std::vector< std::unique_ptr< ScheduleDAGMutation >> &Mutations) const override
void	getSMSMutations (std::vector< std::unique_ptr< ScheduleDAGMutation >> &Mutations) const override
bool	useAA () const override
	Enable use of alias analysis during code generation (during MI scheduling, DAGCombine, etc.). More...
void	adjustSchedDependency (SUnit *def, SUnit *use, SDep &dep) const override
	Perform target specific adjustments to the latency of a schedule dependency. More...
unsigned	getVectorLength () const
ArrayRef< MVT >	getHVXElementTypes () const
bool	isHVXVectorType (MVT VecTy, bool IncludeBool=false) const
unsigned	getTypeAlignment (MVT Ty) const
unsigned	getL1CacheLineSize () const
unsigned	getL1PrefetchDistance () const

Public Attributes
Hexagon::ArchEnum	HexagonArchVersion
Hexagon::ArchEnum	HexagonHVXVersion = Hexagon::ArchEnum::NoArch
CodeGenOpt::Level	OptLevel
bool	UseBSBScheduling
	True if the target should use Back-Skip-Back scheduling. More...

Detailed Description

Definition at line 42 of file HexagonSubtarget.h.

Constructor & Destructor Documentation

HexagonSubtarget()

HexagonSubtarget::HexagonSubtarget	(	const Triple &	TT,
		StringRef	CPU,
		StringRef	FS,
		const TargetMachine &	TM
	)

Definition at line 79 of file HexagonSubtarget.cpp.

References assert(), and llvm::InstrItineraryData::Itineraries.

Member Function Documentation

adjustSchedDependency()

void HexagonSubtarget::adjustSchedDependency ( SUnit *  Src, SUnit *  Dst, SDep &  Dep  ) const

override

Perform target specific adjustments to the latency of a schedule dependency.

Definition at line 320 of file HexagonSubtarget.cpp.

References llvm::HexagonInstrInfo::canExecuteInBundle(), llvm::SmallSet< T, N, C >::clear(), EnableDotCurSched, llvm::SUnit::getInstr(), getInstrInfo(), llvm::MachineInstr::getNumOperands(), llvm::MachineInstr::getOperand(), llvm::HexagonInstrInfo::getOperandLatency(), llvm::MachineOperand::getReg(), hasV60Ops(), llvm::MachineInstr::isCopy(), llvm::SUnit::isInstr(), llvm::MachineOperand::isReg(), llvm::MachineInstr::isRegSequence(), llvm::HexagonInstrInfo::isToBeScheduledASAP(), llvm::MachineOperand::isUse(), llvm::max(), llvm::SUnit::NumSuccs, llvm::SDep::setLatency(), and llvm::SUnit::Succs.

Referenced by getHexagonArchVersion().

enableMachineSchedDefaultSched()

bool llvm::HexagonSubtarget::enableMachineSchedDefaultSched ( ) const

inlineoverride

Definition at line 187 of file HexagonSubtarget.h.

enableMachineScheduler()

bool HexagonSubtarget::enableMachineScheduler ( ) const

override

Definition at line 392 of file HexagonSubtarget.cpp.

References DisableHexagonMISched.

Referenced by useBSBScheduling().

enablePostRAScheduler()

bool llvm::HexagonSubtarget::enablePostRAScheduler ( ) const

inlineoverride

Definition at line 190 of file HexagonSubtarget.h.

References enableSubRegLiveness().

enableSubRegLiveness()

bool HexagonSubtarget::enableSubRegLiveness ( ) const

override

Definition at line 580 of file HexagonSubtarget.cpp.

References EnableSubregLiveness.

Referenced by enablePostRAScheduler().

getAntiDepBreakMode()

AntiDepBreakMode llvm::HexagonSubtarget::getAntiDepBreakMode ( ) const

inlineoverride

Definition at line 189 of file HexagonSubtarget.h.

getCPUString()

const std::string& llvm::HexagonSubtarget::getCPUString ( ) const

inline

Definition at line 194 of file HexagonSubtarget.h.

getFrameLowering()

const HexagonFrameLowering* llvm::HexagonSubtarget::getFrameLowering ( ) const

inlineoverride

Definition at line 110 of file HexagonSubtarget.h.

Referenced by llvm::HexagonDAGToDAGISel::EmitFunctionEntryCode(), llvm::HexagonInstrInfo::loadRegFromStackSlot(), llvm::HexagonDAGToDAGISel::SelectAddrFI(), llvm::HexagonDAGToDAGISel::SelectFrameIndex(), and llvm::HexagonInstrInfo::storeRegToStackSlot().

getHexagonArchVersion()

const Hexagon::ArchEnum& llvm::HexagonSubtarget::getHexagonArchVersion ( ) const

inline

Definition at line 196 of file HexagonSubtarget.h.

References adjustSchedDependency(), getPostRAMutations(), getSMSMutations(), HexagonArchVersion, use, and useAA().

Referenced by hasV55Ops(), hasV55OpsOnly(), hasV5Ops(), hasV5OpsOnly(), hasV60Ops(), hasV60OpsOnly(), hasV62Ops(), hasV62OpsOnly(), hasV65Ops(), hasV65OpsOnly(), hasV66Ops(), and hasV66OpsOnly().

getHVXElementTypes()

ArrayRef<MVT> llvm::HexagonSubtarget::getHVXElementTypes ( ) const

inline

Definition at line 225 of file HexagonSubtarget.h.

References llvm::MVT::i16, llvm::MVT::i32, llvm::MVT::i8, and llvm::makeArrayRef().

Referenced by llvm::HexagonTargetLowering::getPreferredVectorAction(), and isHVXVectorType().

getInstrInfo()

const HexagonInstrInfo* llvm::HexagonSubtarget::getInstrInfo ( ) const

inlineoverride

Definition at line 103 of file HexagonSubtarget.h.

Referenced by adjustSchedDependency(), llvm::HexagonSubtarget::CallMutation::apply(), llvm::HexagonRegisterInfo::eliminateFrameIndex(), llvm::HexagonAsmPrinter::EmitInstruction(), enableAllocFrameElim(), llvm::HexagonFrameLowering::getFrameIndexReference(), INITIALIZE_PASS(), llvm::HexagonFrameLowering::insertCFIInstructions(), llvm::VLIWResourceModel::isResourceAvailable(), moveInstrOut(), llvm::HexagonDAGToDAGISel::runOnMachineFunction(), llvm::ConvergingVLIWScheduler::SchedulingCost(), and usePredicatedCalls().

getInstrItineraryData()

const InstrItineraryData* llvm::HexagonSubtarget::getInstrItineraryData ( ) const

inlineoverride

getInstrItins - Return the instruction itineraries based on subtarget selection.

Definition at line 100 of file HexagonSubtarget.h.

getL1CacheLineSize()

unsigned HexagonSubtarget::getL1CacheLineSize

(

)

const

Definition at line 572 of file HexagonSubtarget.cpp.

Referenced by llvm::HexagonTTIImpl::getCacheLineSize(), and getTypeAlignment().

getL1PrefetchDistance()

unsigned HexagonSubtarget::getL1PrefetchDistance

(

)

const

Definition at line 576 of file HexagonSubtarget.cpp.

Referenced by llvm::HexagonTTIImpl::getPrefetchDistance(), and getTypeAlignment().

getPostRAMutations()

void HexagonSubtarget::getPostRAMutations ( std::vector< std::unique_ptr< ScheduleDAGMutation >> &  Mutations ) const

override

Definition at line 376 of file HexagonSubtarget.cpp.

Referenced by getHexagonArchVersion().

getRegisterInfo()

const HexagonRegisterInfo* llvm::HexagonSubtarget::getRegisterInfo ( ) const

inlineoverride

Definition at line 104 of file HexagonSubtarget.h.

Referenced by llvm::HexagonInstrInfo::copyPhysReg(), llvm::HexagonInstrInfo::expandPostRAPseudo(), getInstrVecReg(), llvm::HexagonTargetLowering::HexagonTargetLowering(), llvm::HexagonInstrInfo::reduceLoopCount(), and llvm::HexagonDAGToDAGISel::runOnMachineFunction().

getSelectionDAGInfo()

const HexagonSelectionDAGInfo* llvm::HexagonSubtarget::getSelectionDAGInfo ( ) const

inlineoverride

Definition at line 113 of file HexagonSubtarget.h.

References initializeSubtargetDependencies(), and ParseSubtargetFeatures().

getSMSMutations()

void HexagonSubtarget::getSMSMutations ( std::vector< std::unique_ptr< ScheduleDAGMutation >> &  Mutations ) const

override

Definition at line 383 of file HexagonSubtarget.cpp.

Referenced by getHexagonArchVersion().

getTargetLowering()

const HexagonTargetLowering* llvm::HexagonSubtarget::getTargetLowering ( ) const

inlineoverride

Definition at line 107 of file HexagonSubtarget.h.

getTypeAlignment()

unsigned llvm::HexagonSubtarget::getTypeAlignment ( MVT  Ty ) const

inline

Definition at line 259 of file HexagonSubtarget.h.

References getL1CacheLineSize(), getL1PrefetchDistance(), llvm::MVT::getSizeInBits(), getVectorLength(), isHVXVectorType(), and TII.

Referenced by llvm::HexagonTargetLowering::LowerStore(), and llvm::HexagonTargetLowering::LowerUnalignedLoad().

getVectorLength()

unsigned llvm::HexagonSubtarget::getVectorLength ( ) const

inline

Definition at line 216 of file HexagonSubtarget.h.

References assert(), llvm_unreachable, useHVX128BOps(), useHVX64BOps(), and useHVXOps().

Referenced by llvm::HexagonTargetLowering::allowsMisalignedMemoryAccesses(), llvm::HexagonTTIImpl::getMinimumVF(), llvm::HexagonTTIImpl::getMinVectorRegisterBitWidth(), llvm::HexagonTargetLowering::getPreferredVectorAction(), getTypeAlignment(), isHVXVectorType(), llvm::HexagonDAGToDAGISel::SelectQ2V(), llvm::HvxSelector::selectRor(), and llvm::HexagonDAGToDAGISel::SelectV2Q().

hasMemNoShuf()

bool llvm::HexagonSubtarget::hasMemNoShuf ( ) const

inline

Definition at line 175 of file HexagonSubtarget.h.

hasReservedR19()

bool llvm::HexagonSubtarget::hasReservedR19 ( ) const

inline

Definition at line 176 of file HexagonSubtarget.h.

References usePredicatedCalls().

Referenced by llvm::HexagonRegisterInfo::getReservedRegs().

hasV55Ops()

bool llvm::HexagonSubtarget::hasV55Ops ( ) const

inline

Definition at line 130 of file HexagonSubtarget.h.

References getHexagonArchVersion(), and llvm::Hexagon::V55.

hasV55OpsOnly()

bool llvm::HexagonSubtarget::hasV55OpsOnly ( ) const

inline

Definition at line 133 of file HexagonSubtarget.h.

References getHexagonArchVersion(), and llvm::Hexagon::V55.

hasV5Ops()

bool llvm::HexagonSubtarget::hasV5Ops ( ) const

inline

Definition at line 124 of file HexagonSubtarget.h.

References getHexagonArchVersion(), and llvm::Hexagon::V5.

hasV5OpsOnly()

bool llvm::HexagonSubtarget::hasV5OpsOnly ( ) const

inline

Definition at line 127 of file HexagonSubtarget.h.

References getHexagonArchVersion(), and llvm::Hexagon::V5.

hasV60Ops()

bool llvm::HexagonSubtarget::hasV60Ops ( ) const

inline

Definition at line 136 of file HexagonSubtarget.h.

References getHexagonArchVersion(), and llvm::Hexagon::V60.

Referenced by adjustSchedDependency(), llvm::HexagonTargetLowering::getRegForInlineAsmConstraint(), getZeroLatency(), llvm::HexagonTargetLowering::HexagonTargetLowering(), initializeSubtargetDependencies(), and usePredicatedCalls().

hasV60OpsOnly()

bool llvm::HexagonSubtarget::hasV60OpsOnly ( ) const

inline

Definition at line 139 of file HexagonSubtarget.h.

References getHexagonArchVersion(), and llvm::Hexagon::V60.

Referenced by cannotCoexistAsymm().

hasV62Ops()

bool llvm::HexagonSubtarget::hasV62Ops ( ) const

inline

Definition at line 142 of file HexagonSubtarget.h.

References getHexagonArchVersion(), and llvm::Hexagon::V62.

hasV62OpsOnly()

bool llvm::HexagonSubtarget::hasV62OpsOnly ( ) const

inline

Definition at line 145 of file HexagonSubtarget.h.

References getHexagonArchVersion(), and llvm::Hexagon::V62.

hasV65Ops()

bool llvm::HexagonSubtarget::hasV65Ops ( ) const

inline

Definition at line 148 of file HexagonSubtarget.h.

References getHexagonArchVersion(), and llvm::Hexagon::V65.

Referenced by llvm::HexagonPacketizerList::isLegalToPacketizeTogether().

hasV65OpsOnly()

bool llvm::HexagonSubtarget::hasV65OpsOnly ( ) const

inline

Definition at line 151 of file HexagonSubtarget.h.

References getHexagonArchVersion(), and llvm::Hexagon::V65.

hasV66Ops()

bool llvm::HexagonSubtarget::hasV66Ops ( ) const

inline

Definition at line 154 of file HexagonSubtarget.h.

References getHexagonArchVersion(), and llvm::Hexagon::V66.

Referenced by llvm::HexagonTargetLowering::HexagonTargetLowering().

hasV66OpsOnly()

bool llvm::HexagonSubtarget::hasV66OpsOnly ( ) const

inline

Definition at line 157 of file HexagonSubtarget.h.

References getHexagonArchVersion(), and llvm::Hexagon::V66.

initializeSubtargetDependencies()

HexagonSubtarget & HexagonSubtarget::initializeSubtargetDependencies	(	StringRef	CPU,
		StringRef	FS
	)

Definition at line 92 of file HexagonSubtarget.cpp.

References llvm::Hexagon_MC::completeHVXFeatures(), EnableBSBSched, hasV60Ops(), HexagonArchVersion, llvm::HexagonDisableDuplex, llvm_unreachable, OverrideLongCalls, ParseSubtargetFeatures(), UseBSBScheduling, llvm::Hexagon::V5, llvm::Hexagon::V55, llvm::Hexagon::V60, llvm::Hexagon::V62, llvm::Hexagon::V65, and llvm::Hexagon::V66.

Referenced by getSelectionDAGInfo().

isHVXVectorType()

bool llvm::HexagonSubtarget::isHVXVectorType ( MVT  VecTy, bool  IncludeBool = false  ) const

inline

Definition at line 230 of file HexagonSubtarget.h.

References llvm::any_of(), getHVXElementTypes(), llvm::MVT::getSizeInBits(), llvm::MVT::getVectorElementType(), getVectorLength(), llvm::MVT::getVectorNumElements(), llvm::MVT::i1, llvm::MVT::isVector(), T, and useHVXOps().

Referenced by llvm::HexagonTargetLowering::allowsMisalignedMemoryAccesses(), getTypeAlignment(), llvm::HexagonTargetLowering::LowerVECTOR_SHUFFLE(), and llvm::HexagonDAGToDAGISel::SelectVAlign().

noreturnStackElim()

bool llvm::HexagonSubtarget::noreturnStackElim ( ) const

inline

Definition at line 179 of file HexagonSubtarget.h.

ParseSubtargetFeatures()

void llvm::HexagonSubtarget::ParseSubtargetFeatures	(	StringRef	CPU,
		StringRef	FS
	)

ParseSubtargetFeatures - Parses features string setting specified subtarget options.

Definition of function is auto generated by tblgen.

Referenced by getSelectionDAGInfo(), and initializeSubtargetDependencies().

useAA()

bool HexagonSubtarget::useAA ( ) const

override

Enable use of alias analysis during code generation (during MI scheduling, DAGCombine, etc.).

Definition at line 312 of file HexagonSubtarget.cpp.

References llvm::CodeGenOpt::None, and OptLevel.

Referenced by getHexagonArchVersion().

useBSBScheduling()

bool llvm::HexagonSubtarget::useBSBScheduling ( ) const

inline

Definition at line 181 of file HexagonSubtarget.h.

References enableMachineScheduler(), and UseBSBScheduling.

Referenced by usePredicatedCalls().

useHVX128BOps()

bool llvm::HexagonSubtarget::useHVX128BOps ( ) const

inline

Definition at line 172 of file HexagonSubtarget.h.

References useHVXOps().

Referenced by llvm::HexagonTargetLowering::getRegForInlineAsmConstraint(), and getVectorLength().

useHVX64BOps()

bool llvm::HexagonSubtarget::useHVX64BOps ( ) const

inline

Definition at line 173 of file HexagonSubtarget.h.

References useHVXOps().

Referenced by getVectorLength().

useHVXOps()

bool llvm::HexagonSubtarget::useHVXOps ( ) const

inline

Definition at line 169 of file HexagonSubtarget.h.

References llvm::Hexagon::NoArch.

Referenced by llvm::HexagonTargetLowering::CanLowerReturn(), llvm::HexagonTargetLowering::getConstraintType(), llvm::HexagonTargetLowering::getPreferredVectorAction(), getVectorLength(), llvm::HexagonTargetLowering::HexagonTargetLowering(), isHVXVectorType(), llvm::HexagonDAGToDAGISel::Select(), llvm::HexagonRegisterInfo::shouldCoalesce(), useHVX128BOps(), and useHVX64BOps().

useLongCalls()

bool llvm::HexagonSubtarget::useLongCalls ( ) const

inline

Definition at line 161 of file HexagonSubtarget.h.

useMemops()

bool llvm::HexagonSubtarget::useMemops ( ) const

inline

Definition at line 162 of file HexagonSubtarget.h.

useNewValueJumps()

bool llvm::HexagonSubtarget::useNewValueJumps ( ) const

inline

Definition at line 164 of file HexagonSubtarget.h.

Referenced by getNewValueJumpOpcode().

useNewValueStores()

bool llvm::HexagonSubtarget::useNewValueStores ( ) const

inline

Definition at line 165 of file HexagonSubtarget.h.

usePackets()

bool llvm::HexagonSubtarget::usePackets ( ) const

inline

Definition at line 163 of file HexagonSubtarget.h.

usePredicatedCalls()

bool HexagonSubtarget::usePredicatedCalls

(

)

const

Definition at line 398 of file HexagonSubtarget.cpp.

References assert(), EnablePredicatedCalls, F(), llvm::find(), llvm::SUnit::getInstr(), getInstrInfo(), llvm::SDep::getLatency(), llvm::MachineInstr::getNumOperands(), llvm::MachineInstr::getOperand(), llvm::HexagonInstrInfo::getOperandLatency(), llvm::MachineOperand::getReg(), hasV60Ops(), I, llvm::SDep::isArtificial(), llvm::MachineOperand::isDef(), llvm::MachineOperand::isReg(), llvm::MachineOperand::isUse(), llvm::Latency, llvm::max(), llvm::SUnit::Preds, llvm::SDep::setLatency(), llvm::SDep::setSUnit(), llvm::SUnit::Succs, T, and useBSBScheduling().

Referenced by hasReservedR19().

useSmallData()

bool llvm::HexagonSubtarget::useSmallData ( ) const

inline

Definition at line 166 of file HexagonSubtarget.h.

useZRegOps()

bool llvm::HexagonSubtarget::useZRegOps ( ) const

inline

Definition at line 167 of file HexagonSubtarget.h.

Member Data Documentation

HexagonArchVersion

Hexagon::ArchEnum llvm::HexagonSubtarget::HexagonArchVersion

Definition at line 62 of file HexagonSubtarget.h.

Referenced by getHexagonArchVersion(), and initializeSubtargetDependencies().

HexagonHVXVersion

Hexagon::ArchEnum llvm::HexagonSubtarget::HexagonHVXVersion = Hexagon::ArchEnum::NoArch

Definition at line 63 of file HexagonSubtarget.h.

OptLevel

CodeGenOpt::Level llvm::HexagonSubtarget::OptLevel

Definition at line 64 of file HexagonSubtarget.h.

Referenced by useAA().

UseBSBScheduling

bool llvm::HexagonSubtarget::UseBSBScheduling

True if the target should use Back-Skip-Back scheduling.

This is the default for V60.

Definition at line 67 of file HexagonSubtarget.h.

Referenced by initializeSubtargetDependencies(), and useBSBScheduling().

---

The documentation for this class was generated from the following files:

• lib/Target/Hexagon/HexagonSubtarget.h
• lib/Target/Hexagon/HexagonSubtarget.cpp