LLVM
9.0.0svn
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#include "Target/Hexagon/HexagonSubtarget.h"
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struct | BankConflictMutation |
struct | CallMutation |
struct | HVXMemLatencyMutation |
struct | UsrOverflowMutation |
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Hexagon::ArchEnum | HexagonArchVersion |
Hexagon::ArchEnum | HexagonHVXVersion = Hexagon::ArchEnum::NoArch |
CodeGenOpt::Level | OptLevel |
bool | UseBSBScheduling |
True if the target should use Back-Skip-Back scheduling. More... | |
Definition at line 42 of file HexagonSubtarget.h.
HexagonSubtarget::HexagonSubtarget | ( | const Triple & | TT, |
StringRef | CPU, | ||
StringRef | FS, | ||
const TargetMachine & | TM | ||
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Definition at line 79 of file HexagonSubtarget.cpp.
References assert(), and llvm::InstrItineraryData::Itineraries.
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Perform target specific adjustments to the latency of a schedule dependency.
Definition at line 320 of file HexagonSubtarget.cpp.
References llvm::HexagonInstrInfo::canExecuteInBundle(), llvm::SmallSet< T, N, C >::clear(), EnableDotCurSched, llvm::SUnit::getInstr(), getInstrInfo(), llvm::MachineInstr::getNumOperands(), llvm::MachineInstr::getOperand(), llvm::HexagonInstrInfo::getOperandLatency(), llvm::MachineOperand::getReg(), hasV60Ops(), llvm::MachineInstr::isCopy(), llvm::SUnit::isInstr(), llvm::MachineOperand::isReg(), llvm::MachineInstr::isRegSequence(), llvm::HexagonInstrInfo::isToBeScheduledASAP(), llvm::MachineOperand::isUse(), llvm::max(), llvm::SUnit::NumSuccs, llvm::SDep::setLatency(), and llvm::SUnit::Succs.
Referenced by getHexagonArchVersion().
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Definition at line 187 of file HexagonSubtarget.h.
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Definition at line 392 of file HexagonSubtarget.cpp.
References DisableHexagonMISched.
Referenced by useBSBScheduling().
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Definition at line 190 of file HexagonSubtarget.h.
References enableSubRegLiveness().
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Definition at line 580 of file HexagonSubtarget.cpp.
References EnableSubregLiveness.
Referenced by enablePostRAScheduler().
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Definition at line 189 of file HexagonSubtarget.h.
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Definition at line 194 of file HexagonSubtarget.h.
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Definition at line 110 of file HexagonSubtarget.h.
Referenced by llvm::HexagonDAGToDAGISel::EmitFunctionEntryCode(), llvm::HexagonInstrInfo::loadRegFromStackSlot(), llvm::HexagonDAGToDAGISel::SelectAddrFI(), llvm::HexagonDAGToDAGISel::SelectFrameIndex(), and llvm::HexagonInstrInfo::storeRegToStackSlot().
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Definition at line 196 of file HexagonSubtarget.h.
References adjustSchedDependency(), getPostRAMutations(), getSMSMutations(), HexagonArchVersion, use, and useAA().
Referenced by hasV55Ops(), hasV55OpsOnly(), hasV5Ops(), hasV5OpsOnly(), hasV60Ops(), hasV60OpsOnly(), hasV62Ops(), hasV62OpsOnly(), hasV65Ops(), hasV65OpsOnly(), hasV66Ops(), and hasV66OpsOnly().
Definition at line 225 of file HexagonSubtarget.h.
References llvm::MVT::i16, llvm::MVT::i32, llvm::MVT::i8, and llvm::makeArrayRef().
Referenced by llvm::HexagonTargetLowering::getPreferredVectorAction(), and isHVXVectorType().
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Definition at line 103 of file HexagonSubtarget.h.
Referenced by adjustSchedDependency(), llvm::HexagonSubtarget::CallMutation::apply(), llvm::HexagonRegisterInfo::eliminateFrameIndex(), llvm::HexagonAsmPrinter::EmitInstruction(), enableAllocFrameElim(), llvm::HexagonFrameLowering::getFrameIndexReference(), INITIALIZE_PASS(), llvm::HexagonFrameLowering::insertCFIInstructions(), llvm::VLIWResourceModel::isResourceAvailable(), moveInstrOut(), llvm::HexagonDAGToDAGISel::runOnMachineFunction(), llvm::ConvergingVLIWScheduler::SchedulingCost(), and usePredicatedCalls().
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getInstrItins - Return the instruction itineraries based on subtarget selection.
Definition at line 100 of file HexagonSubtarget.h.
unsigned HexagonSubtarget::getL1CacheLineSize | ( | ) | const |
Definition at line 572 of file HexagonSubtarget.cpp.
Referenced by llvm::HexagonTTIImpl::getCacheLineSize(), and getTypeAlignment().
unsigned HexagonSubtarget::getL1PrefetchDistance | ( | ) | const |
Definition at line 576 of file HexagonSubtarget.cpp.
Referenced by llvm::HexagonTTIImpl::getPrefetchDistance(), and getTypeAlignment().
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Definition at line 376 of file HexagonSubtarget.cpp.
Referenced by getHexagonArchVersion().
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Definition at line 104 of file HexagonSubtarget.h.
Referenced by llvm::HexagonInstrInfo::copyPhysReg(), llvm::HexagonInstrInfo::DefinesPredicate(), llvm::HexagonInstrInfo::expandPostRAPseudo(), getInstrVecReg(), llvm::HexagonTargetLowering::HexagonTargetLowering(), llvm::HexagonInstrInfo::reduceLoopCount(), and llvm::HexagonDAGToDAGISel::runOnMachineFunction().
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Definition at line 113 of file HexagonSubtarget.h.
References initializeSubtargetDependencies(), and ParseSubtargetFeatures().
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Definition at line 383 of file HexagonSubtarget.cpp.
Referenced by getHexagonArchVersion().
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Definition at line 107 of file HexagonSubtarget.h.
Definition at line 259 of file HexagonSubtarget.h.
References getL1CacheLineSize(), getL1PrefetchDistance(), llvm::MVT::getSizeInBits(), getVectorLength(), isHVXVectorType(), and TII.
Referenced by llvm::HexagonTargetLowering::LowerStore(), and llvm::HexagonTargetLowering::LowerUnalignedLoad().
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Definition at line 216 of file HexagonSubtarget.h.
References assert(), llvm_unreachable, useHVX128BOps(), useHVX64BOps(), and useHVXOps().
Referenced by llvm::HexagonTargetLowering::allowsMisalignedMemoryAccesses(), llvm::HexagonTTIImpl::getMinimumVF(), llvm::HexagonTTIImpl::getMinVectorRegisterBitWidth(), llvm::HexagonTargetLowering::getPreferredVectorAction(), getTypeAlignment(), isHVXVectorType(), and llvm::HvxSelector::selectRor().
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Definition at line 175 of file HexagonSubtarget.h.
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Definition at line 176 of file HexagonSubtarget.h.
References usePredicatedCalls().
Referenced by llvm::HexagonRegisterInfo::getReservedRegs().
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Definition at line 130 of file HexagonSubtarget.h.
References getHexagonArchVersion(), and llvm::Hexagon::V55.
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Definition at line 133 of file HexagonSubtarget.h.
References getHexagonArchVersion(), and llvm::Hexagon::V55.
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Definition at line 124 of file HexagonSubtarget.h.
References getHexagonArchVersion(), and llvm::Hexagon::V5.
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Definition at line 127 of file HexagonSubtarget.h.
References getHexagonArchVersion(), and llvm::Hexagon::V5.
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Definition at line 136 of file HexagonSubtarget.h.
References getHexagonArchVersion(), and llvm::Hexagon::V60.
Referenced by adjustSchedDependency(), llvm::HexagonTargetLowering::getRegForInlineAsmConstraint(), getZeroLatency(), llvm::HexagonTargetLowering::HexagonTargetLowering(), initializeSubtargetDependencies(), and usePredicatedCalls().
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Definition at line 139 of file HexagonSubtarget.h.
References getHexagonArchVersion(), and llvm::Hexagon::V60.
Referenced by cannotCoexistAsymm().
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Definition at line 142 of file HexagonSubtarget.h.
References getHexagonArchVersion(), and llvm::Hexagon::V62.
Referenced by llvm::HexagonInstrInfo::isPredicable().
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Definition at line 145 of file HexagonSubtarget.h.
References getHexagonArchVersion(), and llvm::Hexagon::V62.
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Definition at line 148 of file HexagonSubtarget.h.
References getHexagonArchVersion(), and llvm::Hexagon::V65.
Referenced by llvm::HexagonPacketizerList::isLegalToPacketizeTogether().
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Definition at line 151 of file HexagonSubtarget.h.
References getHexagonArchVersion(), and llvm::Hexagon::V65.
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Definition at line 154 of file HexagonSubtarget.h.
References getHexagonArchVersion(), and llvm::Hexagon::V66.
Referenced by llvm::HexagonTargetLowering::HexagonTargetLowering().
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Definition at line 157 of file HexagonSubtarget.h.
References getHexagonArchVersion(), and llvm::Hexagon::V66.
HexagonSubtarget & HexagonSubtarget::initializeSubtargetDependencies | ( | StringRef | CPU, |
StringRef | FS | ||
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Definition at line 92 of file HexagonSubtarget.cpp.
References llvm::Hexagon_MC::completeHVXFeatures(), EnableBSBSched, Features, hasV60Ops(), HexagonArchVersion, llvm::HexagonDisableDuplex, llvm_unreachable, OverrideLongCalls, ParseSubtargetFeatures(), UseBSBScheduling, llvm::Hexagon::V5, llvm::Hexagon::V55, llvm::Hexagon::V60, llvm::Hexagon::V62, llvm::Hexagon::V65, and llvm::Hexagon::V66.
Referenced by getSelectionDAGInfo().
Definition at line 230 of file HexagonSubtarget.h.
References llvm::any_of(), getHVXElementTypes(), llvm::MVT::getSizeInBits(), llvm::MVT::getVectorElementType(), getVectorLength(), llvm::MVT::getVectorNumElements(), llvm::MVT::i1, llvm::MVT::isVector(), T, and useHVXOps().
Referenced by llvm::HexagonTargetLowering::allowsMisalignedMemoryAccesses(), getTypeAlignment(), llvm::HexagonTargetLowering::LowerVECTOR_SHUFFLE(), and llvm::HexagonDAGToDAGISel::SelectVAlign().
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Definition at line 179 of file HexagonSubtarget.h.
ParseSubtargetFeatures - Parses features string setting specified subtarget options.
Definition of function is auto generated by tblgen.
Referenced by getSelectionDAGInfo(), and initializeSubtargetDependencies().
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Enable use of alias analysis during code generation (during MI scheduling, DAGCombine, etc.).
Definition at line 312 of file HexagonSubtarget.cpp.
References llvm::CodeGenOpt::None, and OptLevel.
Referenced by getHexagonArchVersion().
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Definition at line 181 of file HexagonSubtarget.h.
References enableMachineScheduler(), and UseBSBScheduling.
Referenced by usePredicatedCalls().
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Definition at line 172 of file HexagonSubtarget.h.
References useHVXOps().
Referenced by llvm::HexagonTargetLowering::getRegForInlineAsmConstraint(), and getVectorLength().
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Definition at line 173 of file HexagonSubtarget.h.
References useHVXOps().
Referenced by getVectorLength().
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Definition at line 169 of file HexagonSubtarget.h.
References llvm::Hexagon::NoArch.
Referenced by llvm::HexagonTargetLowering::CanLowerReturn(), llvm::HexagonTargetLowering::getConstraintType(), llvm::HexagonTargetLowering::getPreferredVectorAction(), getVectorLength(), llvm::HexagonTargetLowering::HexagonTargetLowering(), isHVXVectorType(), llvm::HexagonDAGToDAGISel::Select(), llvm::HexagonRegisterInfo::shouldCoalesce(), useHVX128BOps(), and useHVX64BOps().
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Definition at line 161 of file HexagonSubtarget.h.
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Definition at line 162 of file HexagonSubtarget.h.
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Definition at line 164 of file HexagonSubtarget.h.
Referenced by getNewValueJumpOpcode().
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Definition at line 165 of file HexagonSubtarget.h.
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Definition at line 163 of file HexagonSubtarget.h.
bool HexagonSubtarget::usePredicatedCalls | ( | ) | const |
Definition at line 398 of file HexagonSubtarget.cpp.
References assert(), EnablePredicatedCalls, F(), llvm::find(), llvm::SUnit::getInstr(), getInstrInfo(), llvm::SDep::getLatency(), llvm::MachineInstr::getNumOperands(), llvm::MachineInstr::getOperand(), llvm::HexagonInstrInfo::getOperandLatency(), llvm::MachineOperand::getReg(), hasV60Ops(), I, llvm::SDep::isArtificial(), llvm::MachineOperand::isDef(), llvm::MachineOperand::isReg(), llvm::MachineOperand::isUse(), llvm::Latency, llvm::max(), llvm::SUnit::Preds, llvm::SDep::setLatency(), llvm::SDep::setSUnit(), llvm::SUnit::Succs, T, and useBSBScheduling().
Referenced by hasReservedR19(), and llvm::HexagonInstrInfo::isPredicable().
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Definition at line 166 of file HexagonSubtarget.h.
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Definition at line 167 of file HexagonSubtarget.h.
Hexagon::ArchEnum llvm::HexagonSubtarget::HexagonArchVersion |
Definition at line 62 of file HexagonSubtarget.h.
Referenced by getHexagonArchVersion(), and initializeSubtargetDependencies().
Hexagon::ArchEnum llvm::HexagonSubtarget::HexagonHVXVersion = Hexagon::ArchEnum::NoArch |
Definition at line 63 of file HexagonSubtarget.h.
CodeGenOpt::Level llvm::HexagonSubtarget::OptLevel |
Definition at line 64 of file HexagonSubtarget.h.
Referenced by useAA().
bool llvm::HexagonSubtarget::UseBSBScheduling |
True if the target should use Back-Skip-Back scheduling.
This is the default for V60.
Definition at line 67 of file HexagonSubtarget.h.
Referenced by initializeSubtargetDependencies(), and useBSBScheduling().