LLVM  9.0.0svn
llvm::MCInstrDesc Member List

This is the complete list of members for llvm::MCInstrDesc, including all inherited members.

canFoldAsLoad() constllvm::MCInstrDescinline
ComplexDeprecationInfollvm::MCInstrDesc
const_opInfo_iterator typedefllvm::MCInstrDesc
DeprecatedFeaturellvm::MCInstrDesc
findFirstPredOperandIdx() constllvm::MCInstrDescinline
Flagsllvm::MCInstrDesc
getDeprecatedInfo(MCInst &MI, const MCSubtargetInfo &STI, std::string &Info) constllvm::MCInstrDesc
getFlags() constllvm::MCInstrDescinline
getImplicitDefs() constllvm::MCInstrDescinline
getImplicitUses() constllvm::MCInstrDescinline
getNumDefs() constllvm::MCInstrDescinline
getNumImplicitDefs() constllvm::MCInstrDescinline
getNumImplicitUses() constllvm::MCInstrDescinline
getNumOperands() constllvm::MCInstrDescinline
getOpcode() constllvm::MCInstrDescinline
getOperandConstraint(unsigned OpNum, MCOI::OperandConstraint Constraint) constllvm::MCInstrDescinline
getSchedClass() constllvm::MCInstrDescinline
getSize() constllvm::MCInstrDescinline
hasDefOfPhysReg(const MCInst &MI, unsigned Reg, const MCRegisterInfo &RI) constllvm::MCInstrDesc
hasDelaySlot() constllvm::MCInstrDescinline
hasExtraDefRegAllocReq() constllvm::MCInstrDescinline
hasExtraSrcRegAllocReq() constllvm::MCInstrDescinline
hasImplicitDefOfPhysReg(unsigned Reg, const MCRegisterInfo *MRI=nullptr) constllvm::MCInstrDesc
hasImplicitUseOfPhysReg(unsigned Reg) constllvm::MCInstrDescinline
hasOptionalDef() constllvm::MCInstrDescinline
hasPostISelHook() constllvm::MCInstrDescinline
hasUnmodeledSideEffects() constllvm::MCInstrDescinline
ImplicitDefsllvm::MCInstrDesc
ImplicitUsesllvm::MCInstrDesc
isAdd() constllvm::MCInstrDescinline
isAsCheapAsAMove() constllvm::MCInstrDescinline
isBarrier() constllvm::MCInstrDescinline
isBitcast() constllvm::MCInstrDescinline
isBranch() constllvm::MCInstrDescinline
isCall() constllvm::MCInstrDescinline
isCommutable() constllvm::MCInstrDescinline
isCompare() constllvm::MCInstrDescinline
isConditionalBranch() constllvm::MCInstrDescinline
isConvergent() constllvm::MCInstrDescinline
isConvertibleTo3Addr() constllvm::MCInstrDescinline
isExtractSubregLike() constllvm::MCInstrDescinline
isIndirectBranch() constllvm::MCInstrDescinline
isInsertSubregLike() constllvm::MCInstrDescinline
isMoveImmediate() constllvm::MCInstrDescinline
isMoveReg() constllvm::MCInstrDescinline
isNotDuplicable() constllvm::MCInstrDescinline
isPredicable() constllvm::MCInstrDescinline
isPseudo() constllvm::MCInstrDescinline
isRegSequenceLike() constllvm::MCInstrDescinline
isRematerializable() constllvm::MCInstrDescinline
isReturn() constllvm::MCInstrDescinline
isSelect() constllvm::MCInstrDescinline
isTerminator() constllvm::MCInstrDescinline
isTrap() constllvm::MCInstrDescinline
isUnconditionalBranch() constllvm::MCInstrDescinline
isVariadic() constllvm::MCInstrDescinline
mayAffectControlFlow(const MCInst &MI, const MCRegisterInfo &RI) constllvm::MCInstrDesc
mayLoad() constllvm::MCInstrDescinline
mayRaiseFPException() constllvm::MCInstrDescinline
mayStore() constllvm::MCInstrDescinline
NumDefsllvm::MCInstrDesc
NumOperandsllvm::MCInstrDesc
Opcodellvm::MCInstrDesc
operands() constllvm::MCInstrDescinline
OpInfollvm::MCInstrDesc
opInfo_begin() constllvm::MCInstrDescinline
opInfo_end() constllvm::MCInstrDescinline
SchedClassllvm::MCInstrDesc
Sizellvm::MCInstrDesc
TSFlagsllvm::MCInstrDesc
usesCustomInsertionHook() constllvm::MCInstrDescinline
variadicOpsAreDefs() constllvm::MCInstrDescinline