LLVM  6.0.0svn
llvm::SIRegisterInfo Member List

This is the complete list of members for llvm::SIRegisterInfo, including all inherited members.

AMDGPURegisterInfo()llvm::AMDGPURegisterInfo
eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj, unsigned FIOperandNum, RegScavenger *RS) const overridellvm::SIRegisterInfo
eliminateSGPRToVGPRSpillFrameIndex(MachineBasicBlock::iterator MI, int FI, RegScavenger *RS) constllvm::SIRegisterInfo
findUnusedRegister(const MachineRegisterInfo &MRI, const TargetRegisterClass *RC, const MachineFunction &MF) constllvm::SIRegisterInfo
getCalleeSavedRegs(const MachineFunction *MF) const overridellvm::SIRegisterInfo
getCalleeSavedRegsViaCopy(const MachineFunction *MF) constllvm::SIRegisterInfo
getCallPreservedMask(const MachineFunction &MF, CallingConv::ID) const overridellvm::SIRegisterInfo
getCSRFirstUseCost() const overridellvm::SIRegisterInfoinline
getEquivalentSGPRClass(const TargetRegisterClass *VRC) constllvm::SIRegisterInfo
getEquivalentVGPRClass(const TargetRegisterClass *SRC) constllvm::SIRegisterInfo
getFrameIndexInstrOffset(const MachineInstr *MI, int Idx) const overridellvm::SIRegisterInfo
getFrameRegister(const MachineFunction &MF) const overridellvm::SIRegisterInfo
getHWRegIndex(unsigned Reg) constllvm::SIRegisterInfoinline
getMUBUFInstrOffset(const MachineInstr *MI) constllvm::SIRegisterInfo
getPhysRegClass(unsigned Reg) constllvm::SIRegisterInfo
getPointerRegClass(const MachineFunction &MF, unsigned Kind=0) const overridellvm::SIRegisterInfo
getRegAsmName(unsigned Reg) const overridellvm::SIRegisterInfo
getRegClassForReg(const MachineRegisterInfo &MRI, unsigned Reg) constllvm::SIRegisterInfo
getRegPressureLimit(const TargetRegisterClass *RC, MachineFunction &MF) const overridellvm::SIRegisterInfo
getRegPressureSetLimit(const MachineFunction &MF, unsigned Idx) const overridellvm::SIRegisterInfo
getRegSplitParts(const TargetRegisterClass *RC, unsigned EltSize) constllvm::SIRegisterInfo
getRegUnitPressureSets(unsigned RegUnit) const overridellvm::SIRegisterInfo
getReservedRegs(const MachineFunction &MF) const overridellvm::SIRegisterInfo
getReturnAddressReg(const MachineFunction &MF) constllvm::SIRegisterInfoinline
getSGPRPressureSet() constllvm::SIRegisterInfoinline
getSubRegClass(const TargetRegisterClass *RC, unsigned SubIdx) constllvm::SIRegisterInfo
getSubRegFromChannel(unsigned Channel) constllvm::AMDGPURegisterInfo
getVGPRPressureSet() constllvm::SIRegisterInfoinline
hasVGPRs(const TargetRegisterClass *RC) constllvm::SIRegisterInfo
isFrameOffsetLegal(const MachineInstr *MI, unsigned BaseReg, int64_t Offset) const overridellvm::SIRegisterInfo
isSGPRClass(const TargetRegisterClass *RC) constllvm::SIRegisterInfoinline
isSGPRClassID(unsigned RCID) constllvm::SIRegisterInfoinline
isSGPRPressureSet(unsigned SetID) constllvm::SIRegisterInfoinline
isSGPRReg(const MachineRegisterInfo &MRI, unsigned Reg) constllvm::SIRegisterInfoinline
isVGPR(const MachineRegisterInfo &MRI, unsigned Reg) constllvm::SIRegisterInfo
isVGPRPressureSet(unsigned SetID) constllvm::SIRegisterInfoinline
materializeFrameBaseRegister(MachineBasicBlock *MBB, unsigned BaseReg, int FrameIdx, int64_t Offset) const overridellvm::SIRegisterInfo
needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const overridellvm::SIRegisterInfo
opCanUseInlineConstant(unsigned OpType) constllvm::SIRegisterInfoinline
opCanUseLiteralConstant(unsigned OpType) constllvm::SIRegisterInfoinline
requiresFrameIndexReplacementScavenging(const MachineFunction &MF) const overridellvm::SIRegisterInfo
requiresFrameIndexScavenging(const MachineFunction &MF) const overridellvm::SIRegisterInfo
requiresRegisterScavenging(const MachineFunction &Fn) const overridellvm::SIRegisterInfo
requiresVirtualBaseRegisters(const MachineFunction &Fn) const overridellvm::SIRegisterInfo
reservedPrivateSegmentBufferReg(const MachineFunction &MF) constllvm::SIRegisterInfo
reservedPrivateSegmentWaveByteOffsetReg(const MachineFunction &MF) constllvm::SIRegisterInfo
reservedStackPtrOffsetReg(const MachineFunction &MF) constllvm::SIRegisterInfo
resolveFrameIndex(MachineInstr &MI, unsigned BaseReg, int64_t Offset) const overridellvm::SIRegisterInfo
restoreSGPR(MachineBasicBlock::iterator MI, int FI, RegScavenger *RS, bool OnlyToVGPR=false) constllvm::SIRegisterInfo
shouldCoalesce(MachineInstr *MI, const TargetRegisterClass *SrcRC, unsigned SubReg, const TargetRegisterClass *DstRC, unsigned DstSubReg, const TargetRegisterClass *NewRC, LiveIntervals &LIS) const overridellvm::SIRegisterInfo
shouldRewriteCopySrc(const TargetRegisterClass *DefRC, unsigned DefSubReg, const TargetRegisterClass *SrcRC, unsigned SrcSubReg) const overridellvm::SIRegisterInfo
SIRegisterInfo(const SISubtarget &ST)llvm::SIRegisterInfo
spillSGPR(MachineBasicBlock::iterator MI, int FI, RegScavenger *RS, bool OnlyToVGPR=false) constllvm::SIRegisterInfo
spillSGPRToSMEM() constllvm::SIRegisterInfoinline
spillSGPRToVGPR() constllvm::SIRegisterInfoinline
trackLivenessAfterRegAlloc(const MachineFunction &MF) const overridellvm::SIRegisterInfo