LLVM  6.0.0svn
llvm::SISubtarget Member List

This is the complete list of members for llvm::SISubtarget, including all inherited members.

AddNoCarryInstsllvm::AMDGPUSubtargetprotected
AMDGPUSubtarget(const Triple &TT, StringRef GPU, StringRef FS, const TargetMachine &TM)llvm::AMDGPUSubtarget
ASllvm::AMDGPUSubtargetprotected
AutoWaitcntBeforeBarrierllvm::AMDGPUSubtargetprotected
CaymanISAllvm::AMDGPUSubtargetprotected
CFALUBugllvm::AMDGPUSubtargetprotected
CIInstsllvm::AMDGPUSubtargetprotected
CodeObjectV3llvm::AMDGPUSubtargetprotected
debuggerEmitPrologue() constllvm::SISubtargetinline
DebuggerEmitProloguellvm::AMDGPUSubtargetprotected
DebuggerInsertNopsllvm::AMDGPUSubtargetprotected
debuggerInsertNops() constllvm::SISubtargetinline
debuggerReserveRegs() constllvm::SISubtargetinline
DebuggerReserveRegsllvm::AMDGPUSubtargetprotected
debuggerSupported() constllvm::SISubtargetinline
DumpCodellvm::AMDGPUSubtargetprotected
dumpCode() constllvm::AMDGPUSubtargetinline
DX10Clampllvm::AMDGPUSubtargetprotected
enableDX10Clamp() constllvm::AMDGPUSubtargetinline
enableEarlyIfConversion() const overridellvm::SISubtargetinline
EnableHugePrivateBufferllvm::AMDGPUSubtargetprotected
enableHugePrivateBuffer() constllvm::AMDGPUSubtargetinline
enableIEEEBit(const MachineFunction &MF) constllvm::AMDGPUSubtargetinline
EnableLoadStoreOptllvm::AMDGPUSubtargetprotected
enableMachineScheduler() const overridellvm::AMDGPUSubtargetinline
EnablePromoteAllocallvm::AMDGPUSubtargetprotected
EnableSISchedulerllvm::AMDGPUSubtargetprotected
enableSIScheduler() constllvm::SISubtargetinline
enableSubRegLiveness() const overridellvm::AMDGPUSubtargetinline
EnableUnsafeDSOffsetFoldingllvm::AMDGPUSubtargetprotected
EnableVGPRSpillingllvm::AMDGPUSubtargetprotected
EnableXNACKllvm::AMDGPUSubtargetprotected
EVERGREEN enum valuellvm::AMDGPUSubtarget
FastFMAF32llvm::AMDGPUSubtargetprotected
FeatureDisablellvm::AMDGPUSubtargetprotected
FlatAddressSpacellvm::AMDGPUSubtargetprotected
FlatForGloballlvm::AMDGPUSubtargetprotected
FlatGlobalInstsllvm::AMDGPUSubtargetprotected
FlatInstOffsetsllvm::AMDGPUSubtargetprotected
FlatScratchInstsllvm::AMDGPUSubtargetprotected
flatScratchIsPointer() constllvm::SISubtargetinline
FP32Denormalsllvm::AMDGPUSubtargetprotected
FP64llvm::AMDGPUSubtargetprotected
FP64FP16Denormalsllvm::AMDGPUSubtargetprotected
FPExceptionsllvm::AMDGPUSubtargetprotected
GCN3Encodingllvm::AMDGPUSubtargetprotected
Genllvm::AMDGPUSubtargetprotected
Generation enum namellvm::AMDGPUSubtarget
getAddressableNumSGPRs() constllvm::SISubtargetinline
getAddressableNumVGPRs() constllvm::SISubtargetinline
getAlignmentForImplicitArgPtr() constllvm::AMDGPUSubtargetinline
getAMDGPUAS() constllvm::AMDGPUSubtargetinline
getCallLowering() const overridellvm::SISubtargetinline
getDefaultFlatWorkGroupSize(CallingConv::ID CC) constllvm::AMDGPUSubtarget
getEUsPerCU() constllvm::AMDGPUSubtargetinline
getExplicitKernelArgOffset(const MachineFunction &MF) constllvm::AMDGPUSubtargetinline
getFlatWorkGroupSizes(const Function &F) constllvm::AMDGPUSubtarget
getFrameLowering() const overridellvm::SISubtargetinlinevirtual
getGeneration() constllvm::AMDGPUSubtargetinline
getImplicitArgNumBytes(const MachineFunction &MF) constllvm::AMDGPUSubtargetinline
getInstrInfo() const overridellvm::SISubtargetinlinevirtual
getInstrItineraryData() const overridellvm::AMDGPUSubtargetinline
getInstructionSelector() const overridellvm::SISubtargetinline
getKernArgSegmentSize(const MachineFunction &MF, unsigned ExplictArgBytes) constllvm::SISubtarget
getLDSBankCount() constllvm::AMDGPUSubtargetinline
getLegalizerInfo() const overridellvm::SISubtargetinline
getLocalMemorySize() constllvm::AMDGPUSubtargetinline
getMaxFlatWorkGroupSize() constllvm::AMDGPUSubtargetinline
getMaxLocalMemSizeWithWaveCount(unsigned WaveCount, const Function &) constllvm::AMDGPUSubtarget
getMaxNumSGPRs(unsigned WavesPerEU, bool Addressable) constllvm::SISubtargetinline
getMaxNumSGPRs(const MachineFunction &MF) constllvm::SISubtarget
getMaxNumUserSGPRs() constllvm::SISubtargetinline
getMaxNumVGPRs(unsigned WavesPerEU) constllvm::SISubtargetinline
getMaxNumVGPRs(const MachineFunction &MF) constllvm::SISubtarget
getMaxPrivateElementSize() constllvm::AMDGPUSubtargetinline
getMaxWavesPerCU() constllvm::AMDGPUSubtargetinline
getMaxWavesPerCU(unsigned FlatWorkGroupSize) constllvm::AMDGPUSubtargetinline
getMaxWavesPerEU() constllvm::AMDGPUSubtargetinline
getMaxWavesPerEU(unsigned FlatWorkGroupSize) constllvm::AMDGPUSubtargetinline
getMaxWorkGroupsPerCU(unsigned FlatWorkGroupSize) constllvm::AMDGPUSubtargetinline
getMinFlatWorkGroupSize() constllvm::AMDGPUSubtargetinline
getMinNumSGPRs(unsigned WavesPerEU) constllvm::SISubtargetinline
getMinNumVGPRs(unsigned WavesPerEU) constllvm::SISubtargetinline
getMinWavesPerEU() constllvm::AMDGPUSubtargetinline
getOccupancyWithLocalMemSize(uint32_t Bytes, const Function &) constllvm::AMDGPUSubtarget
getOccupancyWithLocalMemSize(const MachineFunction &MF) constllvm::AMDGPUSubtargetinline
getOccupancyWithNumSGPRs(unsigned SGPRs) constllvm::SISubtarget
getOccupancyWithNumVGPRs(unsigned VGPRs) constllvm::SISubtarget
getPostRAMutations(std::vector< std::unique_ptr< ScheduleDAGMutation >> &Mutations) const overridellvm::SISubtarget
getRegBankInfo() const overridellvm::SISubtargetinline
getRegisterInfo() const overridellvm::SISubtargetinlinevirtual
getReservedNumSGPRs(const MachineFunction &MF) constllvm::SISubtarget
getReservedNumVGPRs(const MachineFunction &MF) constllvm::SISubtargetinline
getScalarizeGlobalBehavior() constllvm::AMDGPUSubtargetinline
getSelectionDAGInfo() const overridellvm::AMDGPUSubtargetinline
getSGPRAllocGranule() constllvm::SISubtargetinline
getSGPREncodingGranule() constllvm::SISubtargetinline
getStackAlignment() constllvm::AMDGPUSubtargetinline
getTargetLowering() const overridellvm::SISubtargetinlinevirtual
getTotalNumSGPRs() constllvm::SISubtargetinline
getTotalNumVGPRs() constllvm::SISubtargetinline
getTrapHandlerAbi() constllvm::AMDGPUSubtargetinline
getVGPRAllocGranule() constllvm::SISubtargetinline
getVGPREncodingGranule() constllvm::SISubtargetinline
getWavefrontSize() constllvm::AMDGPUSubtargetinline
getWavefrontSizeLog2() constllvm::AMDGPUSubtargetinline
getWavesPerEU(const Function &F) constllvm::AMDGPUSubtarget
getWavesPerWorkGroup(unsigned FlatWorkGroupSize) constllvm::AMDGPUSubtargetinline
GFX9 enum valuellvm::AMDGPUSubtarget
GFX9Instsllvm::AMDGPUSubtargetprotected
HalfRate64Opsllvm::AMDGPUSubtargetprotected
has12DWordStoreHazard() constllvm::SISubtargetinline
has16BitInsts() constllvm::AMDGPUSubtargetinline
Has16BitInstsllvm::AMDGPUSubtargetprotected
hasAddNoCarry() constllvm::AMDGPUSubtargetinline
hasAddr64() constllvm::AMDGPUSubtargetinline
HasApertureRegsllvm::AMDGPUSubtargetprotected
hasApertureRegs() constllvm::AMDGPUSubtargetinline
hasAutoWaitcntBeforeBarrier() constllvm::AMDGPUSubtargetinline
hasBCNT(unsigned Size) constllvm::AMDGPUSubtargetinline
hasBFE() constllvm::AMDGPUSubtargetinline
hasBFI() constllvm::AMDGPUSubtargetinline
hasBFM() constllvm::AMDGPUSubtargetinline
hasBORROW() constllvm::AMDGPUSubtargetinline
hasCARRY() constllvm::AMDGPUSubtargetinline
hasCaymanISA() constllvm::AMDGPUSubtargetinline
hasCodeObjectV3() constllvm::AMDGPUSubtargetinline
hasD16LoadStore() constllvm::AMDGPUSubtargetinline
HasDPPllvm::AMDGPUSubtargetprotected
hasDPP() constllvm::SISubtargetinline
hasFastFMAF32() constllvm::AMDGPUSubtargetinline
hasFFBH() constllvm::AMDGPUSubtargetinline
hasFFBL() constllvm::AMDGPUSubtargetinline
hasFlatAddressSpace() constllvm::AMDGPUSubtargetinline
hasFlatGlobalInsts() constllvm::AMDGPUSubtargetinline
hasFlatInstOffsets() constllvm::AMDGPUSubtargetinline
hasFlatScratchInsts() constllvm::AMDGPUSubtargetinline
hasFminFmaxLegacy() constllvm::AMDGPUSubtargetinline
hasFP16Denormals() constllvm::AMDGPUSubtargetinline
hasFP32Denormals() constllvm::AMDGPUSubtargetinline
hasFP64Denormals() constllvm::AMDGPUSubtargetinline
hasFPExceptions() constllvm::AMDGPUSubtargetinline
hasHalfRate64Ops() constllvm::AMDGPUSubtargetinline
hasHWFP64() constllvm::AMDGPUSubtargetinline
HasIntClampllvm::AMDGPUSubtargetprotected
hasIntClamp() constllvm::AMDGPUSubtargetinline
hasInv2PiInlineImm() constllvm::SISubtargetinline
HasInv2PiInlineImmllvm::AMDGPUSubtargetprotected
hasMad64_32() constllvm::AMDGPUSubtargetinline
hasMadMixInsts() constllvm::AMDGPUSubtargetinline
HasMadMixInstsllvm::AMDGPUSubtargetprotected
hasMed3_16() constllvm::AMDGPUSubtargetinline
hasMin3Max3_16() constllvm::AMDGPUSubtargetinline
HasMovrelllvm::AMDGPUSubtargetprotected
hasMovrel() constllvm::SISubtargetinline
hasMulI24() constllvm::AMDGPUSubtargetinline
hasMulU24() constllvm::AMDGPUSubtargetinline
hasReadM0MovRelInterpHazard() constllvm::SISubtargetinline
hasReadM0SendMsgHazard() constllvm::SISubtargetinline
hasSBufferLoadStoreAtomicDwordxN() constllvm::AMDGPUSubtargetinline
hasScalarCompareEq64() constllvm::SISubtargetinline
HasScalarStoresllvm::AMDGPUSubtargetprotected
hasScalarStores() constllvm::SISubtargetinline
HasSDWAllvm::AMDGPUSubtargetprotected
hasSDWA() constllvm::AMDGPUSubtargetinline
HasSDWAMacllvm::AMDGPUSubtargetprotected
hasSDWAMac() constllvm::AMDGPUSubtargetinline
hasSDWAOmod() constllvm::AMDGPUSubtargetinline
HasSDWAOmodllvm::AMDGPUSubtargetprotected
HasSDWAOutModsVOPCllvm::AMDGPUSubtargetprotected
hasSDWAOutModsVOPC() constllvm::AMDGPUSubtargetinline
HasSDWAScalarllvm::AMDGPUSubtargetprotected
hasSDWAScalar() constllvm::AMDGPUSubtargetinline
hasSDWASdst() constllvm::AMDGPUSubtargetinline
HasSDWASdstllvm::AMDGPUSubtargetprotected
hasSGPRInitBug() constllvm::SISubtargetinline
hasSMemRealTime() constllvm::SISubtargetinline
HasSMemRealTimellvm::AMDGPUSubtargetprotected
hasSMovFedHazard() constllvm::SISubtargetinline
hasUnalignedBufferAccess() constllvm::AMDGPUSubtargetinline
hasUnalignedScratchAccess() constllvm::AMDGPUSubtargetinline
HasVertexCachellvm::AMDGPUSubtargetprotected
hasVGPRIndexMode() constllvm::SISubtargetinline
HasVGPRIndexModellvm::AMDGPUSubtargetprotected
hasVOP3PInsts() constllvm::AMDGPUSubtargetinline
HasVOP3PInstsllvm::AMDGPUSubtargetprotected
initializeSubtargetDependencies(const Triple &TT, StringRef GPU, StringRef FS)llvm::AMDGPUSubtarget
InstrItinsllvm::AMDGPUSubtargetprotected
isAmdCodeObjectV2(const MachineFunction &MF) constllvm::AMDGPUSubtargetinline
isAmdHsaOS() constllvm::AMDGPUSubtargetinline
isAmdPalOS() constllvm::AMDGPUSubtargetinline
IsaVersionllvm::AMDGPUSubtargetprotected
ISAVersion0_0_0 enum valuellvm::AMDGPUSubtarget
ISAVersion6_0_0 enum valuellvm::AMDGPUSubtarget
ISAVersion6_0_1 enum valuellvm::AMDGPUSubtarget
ISAVersion7_0_0 enum valuellvm::AMDGPUSubtarget
ISAVersion7_0_1 enum valuellvm::AMDGPUSubtarget
ISAVersion7_0_2 enum valuellvm::AMDGPUSubtarget
ISAVersion7_0_3 enum valuellvm::AMDGPUSubtarget
ISAVersion8_0_0 enum valuellvm::AMDGPUSubtarget
ISAVersion8_0_1 enum valuellvm::AMDGPUSubtarget
ISAVersion8_0_2 enum valuellvm::AMDGPUSubtarget
ISAVersion8_0_3 enum valuellvm::AMDGPUSubtarget
ISAVersion8_0_4 enum valuellvm::AMDGPUSubtarget
ISAVersion8_1_0 enum valuellvm::AMDGPUSubtarget
ISAVersion9_0_0 enum valuellvm::AMDGPUSubtarget
ISAVersion9_0_1 enum valuellvm::AMDGPUSubtarget
ISAVersion9_0_2 enum valuellvm::AMDGPUSubtarget
ISAVersion9_0_3 enum valuellvm::AMDGPUSubtarget
IsGCNllvm::AMDGPUSubtargetprotected
isMesa3DOS() constllvm::AMDGPUSubtargetinline
isMesaGfxShader(const MachineFunction &MF) constllvm::AMDGPUSubtargetinline
isMesaKernel(const MachineFunction &MF) constllvm::AMDGPUSubtargetinline
isOpenCLEnv() constllvm::AMDGPUSubtargetinline
isPromoteAllocaEnabled() constllvm::AMDGPUSubtargetinline
isTrapHandlerEnabled() constllvm::AMDGPUSubtargetinline
isVGPRSpillingEnabled(const Function &F) constllvm::SISubtarget
isXNACKEnabled() constllvm::AMDGPUSubtargetinline
LDSBankCountllvm::AMDGPUSubtargetprotected
LLVMTrapHandlerRegValue enum valuellvm::AMDGPUSubtarget
loadStoreOptEnabled() constllvm::SISubtargetinline
LocalMemorySizellvm::AMDGPUSubtargetprotected
makeLIDRangeMetadata(Instruction *I) constllvm::AMDGPUSubtarget
MaxPrivateElementSizellvm::AMDGPUSubtargetprotected
NORTHERN_ISLANDS enum valuellvm::AMDGPUSubtarget
overrideSchedPolicy(MachineSchedPolicy &Policy, unsigned NumRegionInstrs) const overridellvm::SISubtarget
ParseSubtargetFeatures(StringRef CPU, StringRef FS)llvm::AMDGPUSubtarget
R600 enum valuellvm::AMDGPUSubtarget
R600ALUInstllvm::AMDGPUSubtargetprotected
R700 enum valuellvm::AMDGPUSubtarget
ScalarizeGloballlvm::AMDGPUSubtargetprotected
SEA_ISLANDS enum valuellvm::AMDGPUSubtarget
setScalarizeGlobalBehavior(bool b)llvm::AMDGPUSubtargetinline
SGPRInitBugllvm::AMDGPUSubtargetprotected
SISubtarget(const Triple &TT, StringRef CPU, StringRef FS, const TargetMachine &TM)llvm::SISubtarget
SOUTHERN_ISLANDS enum valuellvm::AMDGPUSubtarget
supportsMinMaxDenormModes() constllvm::AMDGPUSubtargetinline
TargetTriplellvm::AMDGPUSubtargetprotected
TexVTXClauseSizellvm::AMDGPUSubtargetprotected
TrapHandlerllvm::AMDGPUSubtargetprotected
TrapHandlerAbi enum namellvm::AMDGPUSubtarget
TrapHandlerAbiHsa enum valuellvm::AMDGPUSubtarget
TrapHandlerAbiNone enum valuellvm::AMDGPUSubtarget
TrapID enum namellvm::AMDGPUSubtarget
TrapIDDebugBreakpoint enum valuellvm::AMDGPUSubtarget
TrapIDDebugReserved8 enum valuellvm::AMDGPUSubtarget
TrapIDDebugReservedFE enum valuellvm::AMDGPUSubtarget
TrapIDDebugReservedFF enum valuellvm::AMDGPUSubtarget
TrapIDHardwareReserved enum valuellvm::AMDGPUSubtarget
TrapIDHSADebugTrap enum valuellvm::AMDGPUSubtarget
TrapIDLLVMDebugTrap enum valuellvm::AMDGPUSubtarget
TrapIDLLVMTrap enum valuellvm::AMDGPUSubtarget
TrapRegValues enum namellvm::AMDGPUSubtarget
TSInfollvm::AMDGPUSubtargetprotected
UnalignedBufferAccessllvm::AMDGPUSubtargetprotected
UnalignedScratchAccessllvm::AMDGPUSubtargetprotected
unsafeDSOffsetFoldingEnabled() constllvm::AMDGPUSubtargetinline
useFlatForGlobal() constllvm::AMDGPUSubtargetinline
useVGPRIndexMode(bool UserEnable) constllvm::SISubtargetinline
VOLCANIC_ISLANDS enum valuellvm::AMDGPUSubtarget
WavefrontSizellvm::AMDGPUSubtargetprotected
~AMDGPUSubtarget() overridellvm::AMDGPUSubtarget