LLVM  6.0.0svn
Public Member Functions | List of all members
llvm::SISubtarget Class Referencefinal

#include "Target/AMDGPU/AMDGPUSubtarget.h"

Inheritance diagram for llvm::SISubtarget:
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Collaboration diagram for llvm::SISubtarget:
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Public Member Functions

 SISubtarget (const Triple &TT, StringRef CPU, StringRef FS, const TargetMachine &TM)
 
const SIInstrInfogetInstrInfo () const override
 
const SIFrameLoweringgetFrameLowering () const override
 
const SITargetLoweringgetTargetLowering () const override
 
const CallLoweringgetCallLowering () const override
 
const InstructionSelectorgetInstructionSelector () const override
 
const LegalizerInfogetLegalizerInfo () const override
 
const RegisterBankInfogetRegBankInfo () const override
 
const SIRegisterInfogetRegisterInfo () const override
 
bool enableEarlyIfConversion () const override
 
void overrideSchedPolicy (MachineSchedPolicy &Policy, unsigned NumRegionInstrs) const override
 
bool isVGPRSpillingEnabled (const Function &F) const
 
unsigned getMaxNumUserSGPRs () const
 
bool hasSMemRealTime () const
 
bool hasMovrel () const
 
bool hasVGPRIndexMode () const
 
bool useVGPRIndexMode (bool UserEnable) const
 
bool hasScalarCompareEq64 () const
 
bool hasScalarStores () const
 
bool hasInv2PiInlineImm () const
 
bool hasDPP () const
 
bool enableSIScheduler () const
 
bool debuggerSupported () const
 
bool debuggerInsertNops () const
 
bool debuggerReserveRegs () const
 
bool debuggerEmitPrologue () const
 
bool loadStoreOptEnabled () const
 
bool hasSGPRInitBug () const
 
bool has12DWordStoreHazard () const
 
bool hasSMovFedHazard () const
 
bool hasReadM0Hazard () const
 
unsigned getKernArgSegmentSize (const MachineFunction &MF, unsigned ExplictArgBytes) const
 
unsigned getOccupancyWithNumSGPRs (unsigned SGPRs) const
 Return the maximum number of waves per SIMD for kernels using SGPRs SGPRs. More...
 
unsigned getOccupancyWithNumVGPRs (unsigned VGPRs) const
 Return the maximum number of waves per SIMD for kernels using VGPRs VGPRs. More...
 
bool flatScratchIsPointer () const
 
unsigned getSGPRAllocGranule () const
 
unsigned getSGPREncodingGranule () const
 
unsigned getTotalNumSGPRs () const
 
unsigned getAddressableNumSGPRs () const
 
unsigned getMinNumSGPRs (unsigned WavesPerEU) const
 
unsigned getMaxNumSGPRs (unsigned WavesPerEU, bool Addressable) const
 
unsigned getReservedNumSGPRs (const MachineFunction &MF) const
 
unsigned getMaxNumSGPRs (const MachineFunction &MF) const
 
unsigned getVGPRAllocGranule () const
 
unsigned getVGPREncodingGranule () const
 
unsigned getTotalNumVGPRs () const
 
unsigned getAddressableNumVGPRs () const
 
unsigned getMinNumVGPRs (unsigned WavesPerEU) const
 
unsigned getMaxNumVGPRs (unsigned WavesPerEU) const
 
unsigned getReservedNumVGPRs (const MachineFunction &MF) const
 
unsigned getMaxNumVGPRs (const MachineFunction &MF) const
 
void getPostRAMutations (std::vector< std::unique_ptr< ScheduleDAGMutation >> &Mutations) const override
 
- Public Member Functions inherited from llvm::AMDGPUSubtarget
 AMDGPUSubtarget (const Triple &TT, StringRef GPU, StringRef FS, const TargetMachine &TM)
 
 ~AMDGPUSubtarget () override
 
AMDGPUSubtargetinitializeSubtargetDependencies (const Triple &TT, StringRef GPU, StringRef FS)
 
const InstrItineraryDatagetInstrItineraryData () const override
 
const SelectionDAGTargetInfogetSelectionDAGInfo () const override
 
void ParseSubtargetFeatures (StringRef CPU, StringRef FS)
 
bool isAmdHsaOS () const
 
bool isMesa3DOS () const
 
bool isOpenCLEnv () const
 
bool isAmdPalOS () const
 
Generation getGeneration () const
 
unsigned getWavefrontSize () const
 
int getLocalMemorySize () const
 
int getLDSBankCount () const
 
unsigned getMaxPrivateElementSize () const
 
AMDGPUAS getAMDGPUAS () const
 
bool has16BitInsts () const
 
bool hasIntClamp () const
 
bool hasVOP3PInsts () const
 
bool hasHWFP64 () const
 
bool hasFastFMAF32 () const
 
bool hasHalfRate64Ops () const
 
bool hasAddr64 () const
 
bool hasBFE () const
 
bool hasBFI () const
 
bool hasBFM () const
 
bool hasBCNT (unsigned Size) const
 
bool hasMulU24 () const
 
bool hasMulI24 () const
 
bool hasFFBL () const
 
bool hasFFBH () const
 
bool hasMed3_16 () const
 
bool hasMin3Max3_16 () const
 
bool hasMadMixInsts () const
 
bool hasCARRY () const
 
bool hasBORROW () const
 
bool hasCaymanISA () const
 
TrapHandlerAbi getTrapHandlerAbi () const
 
bool isPromoteAllocaEnabled () const
 
bool unsafeDSOffsetFoldingEnabled () const
 
bool dumpCode () const
 
unsigned getMaxLocalMemSizeWithWaveCount (unsigned WaveCount, const Function &) const
 Return the amount of LDS that can be used that will not restrict the occupancy lower than WaveCount. More...
 
unsigned getOccupancyWithLocalMemSize (uint32_t Bytes, const Function &) const
 Inverse of getMaxLocalMemWithWaveCount. More...
 
unsigned getOccupancyWithLocalMemSize (const MachineFunction &MF) const
 
bool hasFP16Denormals () const
 
bool hasFP32Denormals () const
 
bool hasFP64Denormals () const
 
bool supportsMinMaxDenormModes () const
 
bool hasFPExceptions () const
 
bool enableDX10Clamp () const
 
bool enableIEEEBit (const MachineFunction &MF) const
 
bool useFlatForGlobal () const
 
bool hasAutoWaitcntBeforeBarrier () const
 
bool hasCodeObjectV3 () const
 
bool hasUnalignedBufferAccess () const
 
bool hasUnalignedScratchAccess () const
 
bool hasApertureRegs () const
 
bool isTrapHandlerEnabled () const
 
bool isXNACKEnabled () const
 
bool hasFlatAddressSpace () const
 
bool hasFlatInstOffsets () const
 
bool hasFlatGlobalInsts () const
 
bool hasFlatScratchInsts () const
 
bool hasD16LoadStore () const
 
bool hasAddNoCarry () const
 
bool isMesaKernel (const MachineFunction &MF) const
 
bool isMesaGfxShader (const MachineFunction &MF) const
 
bool isAmdCodeObjectV2 (const MachineFunction &MF) const
 
bool hasFminFmaxLegacy () const
 
bool hasSDWA () const
 
bool hasSDWAOmod () const
 
bool hasSDWAScalar () const
 
bool hasSDWASdst () const
 
bool hasSDWAMac () const
 
bool hasSDWAOutModsVOPC () const
 
unsigned getExplicitKernelArgOffset (const MachineFunction &MF) const
 Returns the offset in bytes from the start of the input buffer of the first explicit kernel argument. More...
 
unsigned getAlignmentForImplicitArgPtr () const
 
unsigned getImplicitArgNumBytes (const MachineFunction &MF) const
 
unsigned getStackAlignment () const
 
bool enableMachineScheduler () const override
 
bool enableSubRegLiveness () const override
 
void setScalarizeGlobalBehavior (bool b)
 
bool getScalarizeGlobalBehavior () const
 
unsigned getEUsPerCU () const
 
unsigned getMaxWorkGroupsPerCU (unsigned FlatWorkGroupSize) const
 
unsigned getMaxWavesPerCU () const
 
unsigned getMaxWavesPerCU (unsigned FlatWorkGroupSize) const
 
unsigned getMinWavesPerEU () const
 
unsigned getMaxWavesPerEU () const
 
unsigned getMaxWavesPerEU (unsigned FlatWorkGroupSize) const
 
unsigned getMinFlatWorkGroupSize () const
 
unsigned getMaxFlatWorkGroupSize () const
 
unsigned getWavesPerWorkGroup (unsigned FlatWorkGroupSize) const
 
std::pair< unsigned, unsignedgetFlatWorkGroupSizes (const Function &F) const
 
std::pair< unsigned, unsignedgetWavesPerEU (const Function &F) const
 
bool makeLIDRangeMetadata (Instruction *I) const
 Creates value range metadata on an workitemid.* inrinsic call or load. More...
 

Additional Inherited Members

- Public Types inherited from llvm::AMDGPUSubtarget
enum  Generation {
  R600 = 0, R700, EVERGREEN, NORTHERN_ISLANDS,
  SOUTHERN_ISLANDS, SEA_ISLANDS, VOLCANIC_ISLANDS, GFX9
}
 
enum  {
  ISAVersion0_0_0, ISAVersion6_0_0, ISAVersion6_0_1, ISAVersion7_0_0,
  ISAVersion7_0_1, ISAVersion7_0_2, ISAVersion7_0_3, ISAVersion8_0_0,
  ISAVersion8_0_1, ISAVersion8_0_2, ISAVersion8_0_3, ISAVersion8_0_4,
  ISAVersion8_1_0, ISAVersion9_0_0, ISAVersion9_0_1, ISAVersion9_0_2,
  ISAVersion9_0_3
}
 
enum  TrapHandlerAbi { TrapHandlerAbiNone = 0, TrapHandlerAbiHsa = 1 }
 
enum  TrapID {
  TrapIDHardwareReserved = 0, TrapIDHSADebugTrap = 1, TrapIDLLVMTrap = 2, TrapIDLLVMDebugTrap = 3,
  TrapIDDebugBreakpoint = 7, TrapIDDebugReserved8 = 8, TrapIDDebugReservedFE = 0xfe, TrapIDDebugReservedFF = 0xff
}
 
enum  TrapRegValues { LLVMTrapHandlerRegValue = 1 }
 
- Protected Attributes inherited from llvm::AMDGPUSubtarget
Triple TargetTriple
 
Generation Gen
 
unsigned IsaVersion
 
unsigned WavefrontSize
 
int LocalMemorySize
 
int LDSBankCount
 
unsigned MaxPrivateElementSize
 
bool FastFMAF32
 
bool HalfRate64Ops
 
bool FP32Denormals
 
bool FP64FP16Denormals
 
bool FPExceptions
 
bool DX10Clamp
 
bool FlatForGlobal
 
bool AutoWaitcntBeforeBarrier
 
bool CodeObjectV3
 
bool UnalignedScratchAccess
 
bool UnalignedBufferAccess
 
bool HasApertureRegs
 
bool EnableXNACK
 
bool TrapHandler
 
bool DebuggerInsertNops
 
bool DebuggerReserveRegs
 
bool DebuggerEmitPrologue
 
bool EnableVGPRSpilling
 
bool EnablePromoteAlloca
 
bool EnableLoadStoreOpt
 
bool EnableUnsafeDSOffsetFolding
 
bool EnableSIScheduler
 
bool DumpCode
 
bool FP64
 
bool IsGCN
 
bool GCN3Encoding
 
bool CIInsts
 
bool GFX9Insts
 
bool SGPRInitBug
 
bool HasSMemRealTime
 
bool Has16BitInsts
 
bool HasIntClamp
 
bool HasVOP3PInsts
 
bool HasMovrel
 
bool HasVGPRIndexMode
 
bool HasScalarStores
 
bool HasInv2PiInlineImm
 
bool HasSDWA
 
bool HasSDWAOmod
 
bool HasSDWAScalar
 
bool HasSDWASdst
 
bool HasSDWAMac
 
bool HasSDWAOutModsVOPC
 
bool HasDPP
 
bool FlatAddressSpace
 
bool FlatInstOffsets
 
bool FlatGlobalInsts
 
bool FlatScratchInsts
 
bool AddNoCarryInsts
 
bool R600ALUInst
 
bool CaymanISA
 
bool CFALUBug
 
bool HasVertexCache
 
short TexVTXClauseSize
 
bool ScalarizeGlobal
 
bool FeatureDisable
 
InstrItineraryData InstrItins
 
SelectionDAGTargetInfo TSInfo
 
AMDGPUAS AS
 

Detailed Description

Definition at line 653 of file AMDGPUSubtarget.h.

Constructor & Destructor Documentation

◆ SISubtarget()

SISubtarget::SISubtarget ( const Triple TT,
StringRef  CPU,
StringRef  FS,
const TargetMachine TM 
)

Definition at line 342 of file AMDGPUSubtarget.cpp.

References getRegisterInfo(), and getTargetLowering().

Member Function Documentation

◆ debuggerEmitPrologue()

bool llvm::SISubtarget::debuggerEmitPrologue ( ) const
inline

◆ debuggerInsertNops()

bool llvm::SISubtarget::debuggerInsertNops ( ) const
inline

◆ debuggerReserveRegs()

bool llvm::SISubtarget::debuggerReserveRegs ( ) const
inline

Definition at line 760 of file AMDGPUSubtarget.h.

References llvm::AMDGPUSubtarget::DebuggerReserveRegs.

Referenced by getNumExtraSGPRs().

◆ debuggerSupported()

bool llvm::SISubtarget::debuggerSupported ( ) const
inline

Definition at line 751 of file AMDGPUSubtarget.h.

Referenced by getElementByteSizeValue().

◆ enableEarlyIfConversion()

bool llvm::SISubtarget::enableEarlyIfConversion ( ) const
inlineoverride

Definition at line 702 of file AMDGPUSubtarget.h.

References F().

◆ enableSIScheduler()

bool llvm::SISubtarget::enableSIScheduler ( ) const
inline

◆ flatScratchIsPointer()

bool llvm::SISubtarget::flatScratchIsPointer ( ) const
inline
Returns
true if the flat_scratch register should be initialized with the pointer to the wave's scratch memory rather than a size and offset.

Definition at line 799 of file AMDGPUSubtarget.h.

References llvm::AMDGPUSubtarget::getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

Referenced by getAllSGPRs().

◆ getAddressableNumSGPRs()

unsigned llvm::SISubtarget::getAddressableNumSGPRs ( ) const
inline
Returns
Addressable number of SGPRs supported by the subtarget.

Definition at line 819 of file AMDGPUSubtarget.h.

References llvm::AMDGPU::IsaInfo::getAddressableNumSGPRs().

Referenced by getNumExtraSGPRs().

◆ getAddressableNumVGPRs()

unsigned llvm::SISubtarget::getAddressableNumVGPRs ( ) const
inline
Returns
Addressable number of VGPRs supported by the subtarget.

Definition at line 865 of file AMDGPUSubtarget.h.

References llvm::AMDGPU::IsaInfo::getAddressableNumVGPRs().

◆ getCallLowering()

const CallLowering* llvm::SISubtarget::getCallLowering ( ) const
inlineoverride

Definition at line 681 of file AMDGPUSubtarget.h.

◆ getFrameLowering()

const SIFrameLowering* llvm::SISubtarget::getFrameLowering ( ) const
inlineoverridevirtual

Implements llvm::AMDGPUSubtarget.

Definition at line 673 of file AMDGPUSubtarget.h.

◆ getInstrInfo()

const SIInstrInfo* llvm::SISubtarget::getInstrInfo ( ) const
inlineoverridevirtual

◆ getInstructionSelector()

const InstructionSelector* llvm::SISubtarget::getInstructionSelector ( ) const
inlineoverride

Definition at line 685 of file AMDGPUSubtarget.h.

◆ getKernArgSegmentSize()

unsigned SISubtarget::getKernArgSegmentSize ( const MachineFunction MF,
unsigned  ExplictArgBytes 
) const

◆ getLegalizerInfo()

const LegalizerInfo* llvm::SISubtarget::getLegalizerInfo ( ) const
inlineoverride

Definition at line 689 of file AMDGPUSubtarget.h.

◆ getMaxNumSGPRs() [1/2]

unsigned llvm::SISubtarget::getMaxNumSGPRs ( unsigned  WavesPerEU,
bool  Addressable 
) const
inline

◆ getMaxNumSGPRs() [2/2]

unsigned SISubtarget::getMaxNumSGPRs ( const MachineFunction MF) const
Returns
Maximum number of SGPRs that meets number of waves per execution unit requirement for function MF, or number of SGPRs explicitly requested using "amdgpu-num-sgpr" attribute attached to function MF.
Value that meets number of waves per execution unit requirement if explicitly requested value cannot be converted to integer, violates subtarget's specifications, or does not meet number of waves per execution unit requirement.

Definition at line 445 of file AMDGPUSubtarget.cpp.

References F(), llvm::AMDGPU::IsaInfo::FIXED_NUM_SGPRS_FOR_INIT_BUG, llvm::MachineFunction::getFunction(), llvm::MachineFunction::getInfo(), llvm::AMDGPU::getIntegerAttribute(), getMaxNumSGPRs(), getMinNumSGPRs(), llvm::SIMachineFunctionInfo::getNumPreloadedSGPRs(), getReservedNumSGPRs(), llvm::SIMachineFunctionInfo::getWavesPerEU(), llvm::Function::hasFnAttribute(), and hasSGPRInitBug().

◆ getMaxNumUserSGPRs()

unsigned llvm::SISubtarget::getMaxNumUserSGPRs ( ) const
inline

Definition at line 711 of file AMDGPUSubtarget.h.

Referenced by getNumExtraSGPRs().

◆ getMaxNumVGPRs() [1/2]

unsigned llvm::SISubtarget::getMaxNumVGPRs ( unsigned  WavesPerEU) const
inline
Returns
Maximum number of VGPRs that meets given number of waves per execution unit requirement supported by the subtarget.

Definition at line 877 of file AMDGPUSubtarget.h.

References llvm::AMDGPU::IsaInfo::getMaxNumVGPRs().

Referenced by getMaxNumVGPRs(), llvm::SIRegisterInfo::getRegPressureLimit(), llvm::SIRegisterInfo::getReservedRegs(), and llvm::GCNMaxOccupancySchedStrategy::initialize().

◆ getMaxNumVGPRs() [2/2]

unsigned SISubtarget::getMaxNumVGPRs ( const MachineFunction MF) const
Returns
Maximum number of VGPRs that meets number of waves per execution unit requirement for function MF, or number of VGPRs explicitly requested using "amdgpu-num-vgpr" attribute attached to function MF.
Value that meets number of waves per execution unit requirement if explicitly requested value cannot be converted to integer, violates subtarget's specifications, or does not meet number of waves per execution unit requirement.

Definition at line 495 of file AMDGPUSubtarget.cpp.

References F(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getInfo(), llvm::AMDGPU::getIntegerAttribute(), getMaxNumVGPRs(), getMinNumVGPRs(), getReservedNumVGPRs(), llvm::SIMachineFunctionInfo::getWavesPerEU(), and llvm::Function::hasFnAttribute().

◆ getMinNumSGPRs()

unsigned llvm::SISubtarget::getMinNumSGPRs ( unsigned  WavesPerEU) const
inline
Returns
Minimum number of SGPRs that meets the given number of waves per execution unit requirement supported by the subtarget.

Definition at line 825 of file AMDGPUSubtarget.h.

References llvm::AMDGPU::IsaInfo::getMinNumSGPRs().

Referenced by getMaxNumSGPRs(), and getNumExtraSGPRs().

◆ getMinNumVGPRs()

unsigned llvm::SISubtarget::getMinNumVGPRs ( unsigned  WavesPerEU) const
inline
Returns
Minimum number of VGPRs that meets given number of waves per execution unit requirement supported by the subtarget.

Definition at line 871 of file AMDGPUSubtarget.h.

References llvm::AMDGPU::IsaInfo::getMinNumVGPRs().

Referenced by getMaxNumVGPRs(), and getNumExtraSGPRs().

◆ getOccupancyWithNumSGPRs()

unsigned SISubtarget::getOccupancyWithNumSGPRs ( unsigned  SGPRs) const

Return the maximum number of waves per SIMD for kernels using SGPRs SGPRs.

Definition at line 386 of file AMDGPUSubtarget.cpp.

References llvm::AMDGPUSubtarget::getGeneration(), and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.

Referenced by getMaxWaves(), llvm::GCNRegPressure::getOccupancy(), llvm::GCNRegPressure::less(), and llvm::GCNRegPressure::print().

◆ getOccupancyWithNumVGPRs()

unsigned SISubtarget::getOccupancyWithNumVGPRs ( unsigned  VGPRs) const

Return the maximum number of waves per SIMD for kernels using VGPRs VGPRs.

Definition at line 409 of file AMDGPUSubtarget.cpp.

Referenced by getMaxWaves(), llvm::GCNRegPressure::getOccupancy(), llvm::GCNRegPressure::less(), and llvm::GCNRegPressure::print().

◆ getPostRAMutations()

void SISubtarget::getPostRAMutations ( std::vector< std::unique_ptr< ScheduleDAGMutation >> &  Mutations) const
override

Definition at line 578 of file AMDGPUSubtarget.cpp.

◆ getRegBankInfo()

const RegisterBankInfo* llvm::SISubtarget::getRegBankInfo ( ) const
inlineoverride

Definition at line 693 of file AMDGPUSubtarget.h.

◆ getRegisterInfo()

const SIRegisterInfo* llvm::SISubtarget::getRegisterInfo ( ) const
inlineoverridevirtual

◆ getReservedNumSGPRs()

unsigned SISubtarget::getReservedNumSGPRs ( const MachineFunction MF) const

◆ getReservedNumVGPRs()

unsigned llvm::SISubtarget::getReservedNumVGPRs ( const MachineFunction MF) const
inline
Returns
Reserved number of VGPRs for given function MF.

Definition at line 882 of file AMDGPUSubtarget.h.

References llvm::AMDGPU::IsaInfo::getMaxNumVGPRs().

Referenced by getMaxNumVGPRs(), and getNumExtraSGPRs().

◆ getSGPRAllocGranule()

unsigned llvm::SISubtarget::getSGPRAllocGranule ( ) const
inline
Returns
SGPR allocation granularity supported by the subtarget.

Definition at line 804 of file AMDGPUSubtarget.h.

References llvm::AMDGPU::IsaInfo::getSGPRAllocGranule().

◆ getSGPREncodingGranule()

unsigned llvm::SISubtarget::getSGPREncodingGranule ( ) const
inline
Returns
SGPR encoding granularity supported by the subtarget.

Definition at line 809 of file AMDGPUSubtarget.h.

References llvm::AMDGPU::IsaInfo::getSGPREncodingGranule().

Referenced by getNumExtraSGPRs().

◆ getTargetLowering()

const SITargetLowering* llvm::SISubtarget::getTargetLowering ( ) const
inlineoverridevirtual

Implements llvm::AMDGPUSubtarget.

Definition at line 677 of file AMDGPUSubtarget.h.

Referenced by SISubtarget().

◆ getTotalNumSGPRs()

unsigned llvm::SISubtarget::getTotalNumSGPRs ( ) const
inline
Returns
Total number of SGPRs supported by the subtarget.

Definition at line 814 of file AMDGPUSubtarget.h.

References llvm::AMDGPU::IsaInfo::getTotalNumSGPRs().

◆ getTotalNumVGPRs()

unsigned llvm::SISubtarget::getTotalNumVGPRs ( ) const
inline
Returns
Total number of VGPRs supported by the subtarget.

Definition at line 860 of file AMDGPUSubtarget.h.

References llvm::AMDGPU::IsaInfo::getTotalNumVGPRs().

◆ getVGPRAllocGranule()

unsigned llvm::SISubtarget::getVGPRAllocGranule ( ) const
inline
Returns
VGPR allocation granularity supported by the subtarget.

Definition at line 850 of file AMDGPUSubtarget.h.

References llvm::AMDGPU::IsaInfo::getVGPRAllocGranule().

◆ getVGPREncodingGranule()

unsigned llvm::SISubtarget::getVGPREncodingGranule ( ) const
inline
Returns
VGPR encoding granularity supported by the subtarget.

Definition at line 855 of file AMDGPUSubtarget.h.

References llvm::AMDGPU::IsaInfo::getVGPREncodingGranule().

Referenced by getNumExtraSGPRs().

◆ has12DWordStoreHazard()

bool llvm::SISubtarget::has12DWordStoreHazard ( ) const
inline

◆ hasDPP()

bool llvm::SISubtarget::hasDPP ( ) const
inline

Definition at line 743 of file AMDGPUSubtarget.h.

References llvm::AMDGPUSubtarget::HasDPP.

◆ hasInv2PiInlineImm()

bool llvm::SISubtarget::hasInv2PiInlineImm ( ) const
inline

◆ hasMovrel()

bool llvm::SISubtarget::hasMovrel ( ) const
inline

Definition at line 719 of file AMDGPUSubtarget.h.

References llvm::AMDGPUSubtarget::HasMovrel.

◆ hasReadM0Hazard()

bool llvm::SISubtarget::hasReadM0Hazard ( ) const
inline

Definition at line 784 of file AMDGPUSubtarget.h.

References llvm::AMDGPUSubtarget::getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

Referenced by addRegsToSet().

◆ hasScalarCompareEq64()

bool llvm::SISubtarget::hasScalarCompareEq64 ( ) const
inline

◆ hasScalarStores()

bool llvm::SISubtarget::hasScalarStores ( ) const
inline

◆ hasSGPRInitBug()

bool llvm::SISubtarget::hasSGPRInitBug ( ) const
inline

Definition at line 772 of file AMDGPUSubtarget.h.

References llvm::AMDGPUSubtarget::SGPRInitBug.

Referenced by getAllSGPRs(), getMaxNumSGPRs(), and getNumExtraSGPRs().

◆ hasSMemRealTime()

bool llvm::SISubtarget::hasSMemRealTime ( ) const
inline

Definition at line 715 of file AMDGPUSubtarget.h.

References llvm::AMDGPUSubtarget::HasSMemRealTime.

◆ hasSMovFedHazard()

bool llvm::SISubtarget::hasSMovFedHazard ( ) const
inline

Definition at line 780 of file AMDGPUSubtarget.h.

References llvm::AMDGPUSubtarget::getGeneration(), and llvm::AMDGPUSubtarget::GFX9.

Referenced by addRegsToSet().

◆ hasVGPRIndexMode()

bool llvm::SISubtarget::hasVGPRIndexMode ( ) const
inline

Definition at line 723 of file AMDGPUSubtarget.h.

References llvm::AMDGPUSubtarget::HasVGPRIndexMode.

◆ isVGPRSpillingEnabled()

bool SISubtarget::isVGPRSpillingEnabled ( const Function F) const

◆ loadStoreOptEnabled()

bool llvm::SISubtarget::loadStoreOptEnabled ( ) const
inline

Definition at line 768 of file AMDGPUSubtarget.h.

References llvm::AMDGPUSubtarget::EnableLoadStoreOpt.

Referenced by canMoveInstsAcrossMemOp().

◆ overrideSchedPolicy()

void SISubtarget::overrideSchedPolicy ( MachineSchedPolicy Policy,
unsigned  NumRegionInstrs 
) const
override

◆ useVGPRIndexMode()

bool llvm::SISubtarget::useVGPRIndexMode ( bool  UserEnable) const
inline

Definition at line 727 of file AMDGPUSubtarget.h.

Referenced by emitIndirectDst(), and emitIndirectSrc().


The documentation for this class was generated from the following files: