LLVM  7.0.0svn
Enumerations | Functions
llvm::ARM_AM Namespace Reference

ARM_AM - ARM Addressing Mode Stuff. More...

Enumerations

enum  ShiftOpc {
  no_shift = 0, asr, lsl, lsr,
  ror, rrx
}
 
enum  AddrOpc { sub = 0, add }
 
enum  AMSubMode {
  bad_am_submode = 0, ia, ib, da,
  db
}
 

Functions

static ShiftOpc getShiftOpcForNode (unsigned Opcode)
 
const chargetAddrOpcStr (AddrOpc Op)
 
const chargetShiftOpcStr (ShiftOpc Op)
 
unsigned getShiftOpcEncoding (ShiftOpc Op)
 
const chargetAMSubModeStr (AMSubMode Mode)
 
unsigned rotr32 (unsigned Val, unsigned Amt)
 rotr32 - Rotate a 32-bit unsigned value right by a specified # bits. More...
 
unsigned rotl32 (unsigned Val, unsigned Amt)
 rotl32 - Rotate a 32-bit unsigned value left by a specified # bits. More...
 
unsigned getSORegOpc (ShiftOpc ShOp, unsigned Imm)
 
unsigned getSORegOffset (unsigned Op)
 
ShiftOpc getSORegShOp (unsigned Op)
 
unsigned getSOImmValImm (unsigned Imm)
 getSOImmValImm - Given an encoded imm field for the reg/imm form, return the 8-bit imm value. More...
 
unsigned getSOImmValRot (unsigned Imm)
 getSOImmValRot - Given an encoded imm field for the reg/imm form, return the rotate amount. More...
 
unsigned getSOImmValRotate (unsigned Imm)
 getSOImmValRotate - Try to handle Imm with an immediate shifter operand, computing the rotate amount to use. More...
 
int getSOImmVal (unsigned Arg)
 getSOImmVal - Given a 32-bit immediate, if it is something that can fit into an shifter_operand immediate operand, return the 12-bit encoding for it. More...
 
bool isSOImmTwoPartVal (unsigned V)
 isSOImmTwoPartVal - Return true if the specified value can be obtained by or'ing together two SOImmVal's. More...
 
unsigned getSOImmTwoPartFirst (unsigned V)
 getSOImmTwoPartFirst - If V is a value that satisfies isSOImmTwoPartVal, return the first chunk of it. More...
 
unsigned getSOImmTwoPartSecond (unsigned V)
 getSOImmTwoPartSecond - If V is a value that satisfies isSOImmTwoPartVal, return the second chunk of it. More...
 
unsigned getThumbImmValShift (unsigned Imm)
 getThumbImmValShift - Try to handle Imm with a 8-bit immediate followed by a left shift. More...
 
bool isThumbImmShiftedVal (unsigned V)
 isThumbImmShiftedVal - Return true if the specified value can be obtained by left shifting a 8-bit immediate. More...
 
unsigned getThumbImm16ValShift (unsigned Imm)
 getThumbImm16ValShift - Try to handle Imm with a 16-bit immediate followed by a left shift. More...
 
bool isThumbImm16ShiftedVal (unsigned V)
 isThumbImm16ShiftedVal - Return true if the specified value can be obtained by left shifting a 16-bit immediate. More...
 
unsigned getThumbImmNonShiftedVal (unsigned V)
 getThumbImmNonShiftedVal - If V is a value that satisfies isThumbImmShiftedVal, return the non-shiftd value. More...
 
int getT2SOImmValSplatVal (unsigned V)
 getT2SOImmValSplat - Return the 12-bit encoded representation if the specified value can be obtained by splatting the low 8 bits into every other byte or every byte of a 32-bit value. More...
 
int getT2SOImmValRotateVal (unsigned V)
 getT2SOImmValRotateVal - Return the 12-bit encoded representation if the specified value is a rotated 8-bit value. More...
 
int getT2SOImmVal (unsigned Arg)
 getT2SOImmVal - Given a 32-bit immediate, if it is something that can fit into a Thumb-2 shifter_operand immediate operand, return the 12-bit encoding for it. More...
 
unsigned getT2SOImmValRotate (unsigned V)
 
bool isT2SOImmTwoPartVal (unsigned Imm)
 
unsigned getT2SOImmTwoPartFirst (unsigned Imm)
 
unsigned getT2SOImmTwoPartSecond (unsigned Imm)
 
unsigned getAM2Opc (AddrOpc Opc, unsigned Imm12, ShiftOpc SO, unsigned IdxMode=0)
 
unsigned getAM2Offset (unsigned AM2Opc)
 
AddrOpc getAM2Op (unsigned AM2Opc)
 
ShiftOpc getAM2ShiftOpc (unsigned AM2Opc)
 
unsigned getAM2IdxMode (unsigned AM2Opc)
 
unsigned getAM3Opc (AddrOpc Opc, unsigned char Offset, unsigned IdxMode=0)
 getAM3Opc - This function encodes the addrmode3 opc field. More...
 
unsigned char getAM3Offset (unsigned AM3Opc)
 
AddrOpc getAM3Op (unsigned AM3Opc)
 
unsigned getAM3IdxMode (unsigned AM3Opc)
 
AMSubMode getAM4SubMode (unsigned Mode)
 
unsigned getAM4ModeImm (AMSubMode SubMode)
 
unsigned getAM5Opc (AddrOpc Opc, unsigned char Offset)
 getAM5Opc - This function encodes the addrmode5 opc field. More...
 
unsigned char getAM5Offset (unsigned AM5Opc)
 
AddrOpc getAM5Op (unsigned AM5Opc)
 
unsigned getAM5FP16Opc (AddrOpc Opc, unsigned char Offset)
 getAM5FP16Opc - This function encodes the addrmode5fp16 opc field. More...
 
unsigned char getAM5FP16Offset (unsigned AM5Opc)
 
AddrOpc getAM5FP16Op (unsigned AM5Opc)
 
unsigned createNEONModImm (unsigned OpCmode, unsigned Val)
 
unsigned getNEONModImmOpCmode (unsigned ModImm)
 
unsigned getNEONModImmVal (unsigned ModImm)
 
uint64_t decodeNEONModImm (unsigned ModImm, unsigned &EltBits)
 decodeNEONModImm - Decode a NEON modified immediate value into the element value and the element size in bits. More...
 
bool isNEONBytesplat (unsigned Value, unsigned Size)
 
bool isNEONi16splat (unsigned Value)
 Checks if Value is a correct immediate for instructions like VBIC/VORR. More...
 
unsigned encodeNEONi16splat (unsigned Value)
 
bool isNEONi32splat (unsigned Value)
 Checks if Value is a correct immediate for instructions like VBIC/VORR. More...
 
unsigned encodeNEONi32splat (unsigned Value)
 Encode NEON 32 bits Splat immediate for instructions like VBIC/VORR. More...
 
float getFPImmFloat (unsigned Imm)
 
int getFP16Imm (const APInt &Imm)
 getFP16Imm - Return an 8-bit floating-point version of the 16-bit floating-point value. More...
 
int getFP16Imm (const APFloat &FPImm)
 
int getFP32Imm (const APInt &Imm)
 getFP32Imm - Return an 8-bit floating-point version of the 32-bit floating-point value. More...
 
int getFP32Imm (const APFloat &FPImm)
 
int getFP64Imm (const APInt &Imm)
 getFP64Imm - Return an 8-bit floating-point version of the 64-bit floating-point value. More...
 
int getFP64Imm (const APFloat &FPImm)
 

Detailed Description

ARM_AM - ARM Addressing Mode Stuff.

Enumeration Type Documentation

◆ AddrOpc

Enumerator
sub 
add 

Definition at line 36 of file ARMAddressingModes.h.

◆ AMSubMode

Enumerator
bad_am_submode 
ia 
ib 
da 
db 

Definition at line 64 of file ARMAddressingModes.h.

◆ ShiftOpc

Enumerator
no_shift 
asr 
lsl 
lsr 
ror 
rrx 

Definition at line 27 of file ARMAddressingModes.h.

Function Documentation

◆ createNEONModImm()

unsigned llvm::ARM_AM::createNEONModImm ( unsigned  OpCmode,
unsigned  Val 
)
inline

Definition at line 530 of file ARMAddressingModes.h.

Referenced by isNEONModifiedImm(), and LowerVectorINT_TO_FP().

◆ decodeNEONModImm()

uint64_t llvm::ARM_AM::decodeNEONModImm ( unsigned  ModImm,
unsigned EltBits 
)
inline

decodeNEONModImm - Decode a NEON modified immediate value into the element value and the element size in bits.

(If the element size is smaller than the vector, it is splatted into all the elements.)

Definition at line 541 of file ARMAddressingModes.h.

References getNEONModImmOpCmode(), getNEONModImmVal(), llvm::X86II::Imm8, and llvm_unreachable.

Referenced by PerformVDUPLANECombine(), and llvm::ARMInstPrinter::printNEONModImmOperand().

◆ encodeNEONi16splat()

unsigned llvm::ARM_AM::encodeNEONi16splat ( unsigned  Value)
inline

Definition at line 598 of file ARMAddressingModes.h.

References assert(), and isNEONi16splat().

◆ encodeNEONi32splat()

unsigned llvm::ARM_AM::encodeNEONi32splat ( unsigned  Value)
inline

Encode NEON 32 bits Splat immediate for instructions like VBIC/VORR.

Definition at line 614 of file ARMAddressingModes.h.

References assert(), and isNEONi32splat().

◆ getAddrOpcStr()

const char* llvm::ARM_AM::getAddrOpcStr ( AddrOpc  Op)
inline

◆ getAM2IdxMode()

unsigned llvm::ARM_AM::getAM2IdxMode ( unsigned  AM2Opc)
inline

Definition at line 412 of file ARMAddressingModes.h.

Referenced by llvm::ARMInstPrinter::printAddrMode2Operand().

◆ getAM2Offset()

unsigned llvm::ARM_AM::getAM2Offset ( unsigned  AM2Opc)
inline

◆ getAM2Op()

AddrOpc llvm::ARM_AM::getAM2Op ( unsigned  AM2Opc)
inline

◆ getAM2Opc()

unsigned llvm::ARM_AM::getAM2Opc ( AddrOpc  Opc,
unsigned  Imm12,
ShiftOpc  SO,
unsigned  IdxMode = 0 
)
inline

◆ getAM2ShiftOpc()

ShiftOpc llvm::ARM_AM::getAM2ShiftOpc ( unsigned  AM2Opc)
inline

◆ getAM3IdxMode()

unsigned llvm::ARM_AM::getAM3IdxMode ( unsigned  AM3Opc)
inline

Definition at line 438 of file ARMAddressingModes.h.

Referenced by llvm::ARMInstPrinter::printAddrMode3Operand().

◆ getAM3Offset()

unsigned char llvm::ARM_AM::getAM3Offset ( unsigned  AM3Opc)
inline

◆ getAM3Op()

AddrOpc llvm::ARM_AM::getAM3Op ( unsigned  AM3Opc)
inline

◆ getAM3Opc()

unsigned llvm::ARM_AM::getAM3Opc ( AddrOpc  Opc,
unsigned char  Offset,
unsigned  IdxMode = 0 
)
inline

getAM3Opc - This function encodes the addrmode3 opc field.

Definition at line 429 of file ARMAddressingModes.h.

References sub.

Referenced by IsSafeAndProfitableToMove(), and isScaledConstantInRange().

◆ getAM4ModeImm()

unsigned llvm::ARM_AM::getAM4ModeImm ( AMSubMode  SubMode)
inline

Definition at line 459 of file ARMAddressingModes.h.

◆ getAM4SubMode()

AMSubMode llvm::ARM_AM::getAM4SubMode ( unsigned  Mode)
inline

Definition at line 455 of file ARMAddressingModes.h.

Referenced by llvm::ARMInstPrinter::printLdStmModeOperand().

◆ getAM5FP16Offset()

unsigned char llvm::ARM_AM::getAM5FP16Offset ( unsigned  AM5Opc)
inline

◆ getAM5FP16Op()

AddrOpc llvm::ARM_AM::getAM5FP16Op ( unsigned  AM5Opc)
inline

Definition at line 501 of file ARMAddressingModes.h.

References add, and sub.

Referenced by llvm::ARMInstPrinter::printAddrMode5FP16Operand(), and llvm::rewriteT2FrameIndex().

◆ getAM5FP16Opc()

unsigned llvm::ARM_AM::getAM5FP16Opc ( AddrOpc  Opc,
unsigned char  Offset 
)
inline

getAM5FP16Opc - This function encodes the addrmode5fp16 opc field.

Definition at line 494 of file ARMAddressingModes.h.

References sub.

Referenced by DecodeAddrMode5FP16Operand(), and isScaledConstantInRange().

◆ getAM5Offset()

unsigned char llvm::ARM_AM::getAM5Offset ( unsigned  AM5Opc)
inline

◆ getAM5Op()

AddrOpc llvm::ARM_AM::getAM5Op ( unsigned  AM5Opc)
inline

◆ getAM5Opc()

unsigned llvm::ARM_AM::getAM5Opc ( AddrOpc  Opc,
unsigned char  Offset 
)
inline

getAM5Opc - This function encodes the addrmode5 opc field.

Definition at line 473 of file ARMAddressingModes.h.

References sub.

Referenced by DecodeAddrMode5Operand(), DecodeCopMemInstruction(), and isScaledConstantInRange().

◆ getAMSubModeStr()

const char* llvm::ARM_AM::getAMSubModeStr ( AMSubMode  Mode)
inline

Definition at line 72 of file ARMAddressingModes.h.

References da, db, ia, ib, and llvm_unreachable.

Referenced by llvm::ARMInstPrinter::printLdStmModeOperand().

◆ getFP16Imm() [1/2]

int llvm::ARM_AM::getFP16Imm ( const APInt Imm)
inline

getFP16Imm - Return an 8-bit floating-point version of the 16-bit floating-point value.

If the value cannot be represented as an 8-bit floating-point value, then return -1.

Definition at line 656 of file ARMAddressingModes.h.

References llvm::APInt::getSExtValue(), llvm::APInt::getZExtValue(), and llvm::APInt::lshr().

Referenced by getFP16Imm(), and llvm::ARMTargetLowering::isFPImmLegal().

◆ getFP16Imm() [2/2]

int llvm::ARM_AM::getFP16Imm ( const APFloat FPImm)
inline

Definition at line 675 of file ARMAddressingModes.h.

References llvm::APFloat::bitcastToAPInt(), and getFP16Imm().

◆ getFP32Imm() [1/2]

int llvm::ARM_AM::getFP32Imm ( const APInt Imm)
inline

getFP32Imm - Return an 8-bit floating-point version of the 32-bit floating-point value.

If the value cannot be represented as an 8-bit floating-point value, then return -1.

Definition at line 682 of file ARMAddressingModes.h.

References llvm::APInt::getSExtValue(), llvm::APInt::getZExtValue(), and llvm::APInt::lshr().

Referenced by getFP32Imm(), llvm::ARMTargetLowering::isFPImmLegal(), isNEONModifiedImm(), and IsSingleInstrConstant().

◆ getFP32Imm() [2/2]

int llvm::ARM_AM::getFP32Imm ( const APFloat FPImm)
inline

Definition at line 703 of file ARMAddressingModes.h.

References llvm::APFloat::bitcastToAPInt(), and getFP32Imm().

◆ getFP64Imm() [1/2]

int llvm::ARM_AM::getFP64Imm ( const APInt Imm)
inline

getFP64Imm - Return an 8-bit floating-point version of the 64-bit floating-point value.

If the value cannot be represented as an 8-bit floating-point value, then return -1.

Definition at line 710 of file ARMAddressingModes.h.

References llvm::APInt::getSExtValue(), llvm::APInt::getZExtValue(), and llvm::APInt::lshr().

Referenced by getFP64Imm(), llvm::ARMTargetLowering::isFPImmLegal(), and isNEONModifiedImm().

◆ getFP64Imm() [2/2]

int llvm::ARM_AM::getFP64Imm ( const APFloat FPImm)
inline

Definition at line 731 of file ARMAddressingModes.h.

References llvm::APFloat::bitcastToAPInt(), and getFP64Imm().

◆ getFPImmFloat()

float llvm::ARM_AM::getFPImmFloat ( unsigned  Imm)
inline

Definition at line 628 of file ARMAddressingModes.h.

References F(), and I.

Referenced by llvm::ARMInstPrinter::printFPImmOperand().

◆ getNEONModImmOpCmode()

unsigned llvm::ARM_AM::getNEONModImmOpCmode ( unsigned  ModImm)
inline

Definition at line 533 of file ARMAddressingModes.h.

Referenced by decodeNEONModImm().

◆ getNEONModImmVal()

unsigned llvm::ARM_AM::getNEONModImmVal ( unsigned  ModImm)
inline

Definition at line 536 of file ARMAddressingModes.h.

Referenced by decodeNEONModImm().

◆ getShiftOpcEncoding()

unsigned llvm::ARM_AM::getShiftOpcEncoding ( ShiftOpc  Op)
inline

Definition at line 54 of file ARMAddressingModes.h.

References asr, llvm_unreachable, lsl, lsr, and ror.

◆ getShiftOpcForNode()

static ShiftOpc llvm::ARM_AM::getShiftOpcForNode ( unsigned  Opcode)
inlinestatic

◆ getShiftOpcStr()

const char* llvm::ARM_AM::getShiftOpcStr ( ShiftOpc  Op)
inline

◆ getSOImmTwoPartFirst()

unsigned llvm::ARM_AM::getSOImmTwoPartFirst ( unsigned  V)
inline

getSOImmTwoPartFirst - If V is a value that satisfies isSOImmTwoPartVal, return the first chunk of it.

Definition at line 191 of file ARMAddressingModes.h.

References getSOImmValRotate(), and rotr32().

Referenced by llvm::ARMBaseInstrInfo::FoldImmediate(), and makeImplicit().

◆ getSOImmTwoPartSecond()

unsigned llvm::ARM_AM::getSOImmTwoPartSecond ( unsigned  V)
inline

getSOImmTwoPartSecond - If V is a value that satisfies isSOImmTwoPartVal, return the second chunk of it.

Definition at line 197 of file ARMAddressingModes.h.

References assert(), getSOImmValRotate(), and rotr32().

Referenced by llvm::ARMBaseInstrInfo::FoldImmediate(), and makeImplicit().

◆ getSOImmVal()

int llvm::ARM_AM::getSOImmVal ( unsigned  Arg)
inline

◆ getSOImmValImm()

unsigned llvm::ARM_AM::getSOImmValImm ( unsigned  Imm)
inline

getSOImmValImm - Given an encoded imm field for the reg/imm form, return the 8-bit imm value.

Definition at line 118 of file ARMAddressingModes.h.

◆ getSOImmValRot()

unsigned llvm::ARM_AM::getSOImmValRot ( unsigned  Imm)
inline

getSOImmValRot - Given an encoded imm field for the reg/imm form, return the rotate amount.

Definition at line 121 of file ARMAddressingModes.h.

◆ getSOImmValRotate()

unsigned llvm::ARM_AM::getSOImmValRotate ( unsigned  Imm)
inline

getSOImmValRotate - Try to handle Imm with an immediate shifter operand, computing the rotate amount to use.

If this immediate value cannot be handled with a single shifter-op, determine a good rotate amount that will take a maximal chunk of bits out of the immediate.

Definition at line 127 of file ARMAddressingModes.h.

References llvm::countTrailingZeros(), and rotr32().

Referenced by llvm::emitARMRegPlusImmediate(), getSOImmTwoPartFirst(), getSOImmTwoPartSecond(), getSOImmVal(), isSOImmTwoPartVal(), and llvm::rewriteARMFrameIndex().

◆ getSORegOffset()

unsigned llvm::ARM_AM::getSORegOffset ( unsigned  Op)
inline

◆ getSORegOpc()

unsigned llvm::ARM_AM::getSORegOpc ( ShiftOpc  ShOp,
unsigned  Imm 
)
inline

◆ getSORegShOp()

ShiftOpc llvm::ARM_AM::getSORegShOp ( unsigned  Op)
inline

◆ getT2SOImmTwoPartFirst()

unsigned llvm::ARM_AM::getT2SOImmTwoPartFirst ( unsigned  Imm)
inline

◆ getT2SOImmTwoPartSecond()

unsigned llvm::ARM_AM::getT2SOImmTwoPartSecond ( unsigned  Imm)
inline

◆ getT2SOImmVal()

int llvm::ARM_AM::getT2SOImmVal ( unsigned  Arg)
inline

◆ getT2SOImmValRotate()

unsigned llvm::ARM_AM::getT2SOImmValRotate ( unsigned  V)
inline

Definition at line 318 of file ARMAddressingModes.h.

References llvm::countTrailingZeros().

Referenced by getT2SOImmTwoPartFirst(), and isT2SOImmTwoPartVal().

◆ getT2SOImmValRotateVal()

int llvm::ARM_AM::getT2SOImmValRotateVal ( unsigned  V)
inline

getT2SOImmValRotateVal - Return the 12-bit encoded representation if the specified value is a rotated 8-bit value.

Return -1 if no rotation encoding is possible. See ARM Reference Manual A6.3.2.

Definition at line 288 of file ARMAddressingModes.h.

References llvm::countLeadingZeros(), and rotr32().

Referenced by getT2SOImmVal().

◆ getT2SOImmValSplatVal()

int llvm::ARM_AM::getT2SOImmValSplatVal ( unsigned  V)
inline

getT2SOImmValSplat - Return the 12-bit encoded representation if the specified value can be obtained by splatting the low 8 bits into every other byte or every byte of a 32-bit value.

i.e., 00000000 00000000 00000000 abcdefgh control = 0 00000000 abcdefgh 00000000 abcdefgh control = 1 abcdefgh 00000000 abcdefgh 00000000 control = 2 abcdefgh abcdefgh abcdefgh abcdefgh control = 3 Return -1 if none of the above apply. See ARM Reference Manual A6.3.2.

Definition at line 260 of file ARMAddressingModes.h.

Referenced by getT2SOImmTwoPartFirst(), getT2SOImmVal(), isScaledConstantInRange(), and isT2SOImmTwoPartVal().

◆ getThumbImm16ValShift()

unsigned llvm::ARM_AM::getThumbImm16ValShift ( unsigned  Imm)
inline

getThumbImm16ValShift - Try to handle Imm with a 16-bit immediate followed by a left shift.

Returns the shift amount to use.

Definition at line 227 of file ARMAddressingModes.h.

References llvm::countTrailingZeros().

Referenced by isThumbImm16ShiftedVal().

◆ getThumbImmNonShiftedVal()

unsigned llvm::ARM_AM::getThumbImmNonShiftedVal ( unsigned  V)
inline

getThumbImmNonShiftedVal - If V is a value that satisfies isThumbImmShiftedVal, return the non-shiftd value.

Definition at line 246 of file ARMAddressingModes.h.

References getThumbImmValShift().

◆ getThumbImmValShift()

unsigned llvm::ARM_AM::getThumbImmValShift ( unsigned  Imm)
inline

getThumbImmValShift - Try to handle Imm with a 8-bit immediate followed by a left shift.

Returns the shift amount to use.

Definition at line 208 of file ARMAddressingModes.h.

References llvm::countTrailingZeros().

Referenced by getThumbImmNonShiftedVal(), and isThumbImmShiftedVal().

◆ isNEONBytesplat()

bool llvm::ARM_AM::isNEONBytesplat ( unsigned  Value,
unsigned  Size 
)
inline

◆ isNEONi16splat()

bool llvm::ARM_AM::isNEONi16splat ( unsigned  Value)
inline

Checks if Value is a correct immediate for instructions like VBIC/VORR.

Definition at line 590 of file ARMAddressingModes.h.

References isNEONBytesplat().

Referenced by encodeNEONi16splat().

◆ isNEONi32splat()

bool llvm::ARM_AM::isNEONi32splat ( unsigned  Value)
inline

Checks if Value is a correct immediate for instructions like VBIC/VORR.

Definition at line 608 of file ARMAddressingModes.h.

References isNEONBytesplat().

Referenced by encodeNEONi32splat().

◆ isSOImmTwoPartVal()

bool llvm::ARM_AM::isSOImmTwoPartVal ( unsigned  V)
inline

isSOImmTwoPartVal - Return true if the specified value can be obtained by or'ing together two SOImmVal's.

Definition at line 178 of file ARMAddressingModes.h.

References getSOImmValRotate(), and rotr32().

Referenced by llvm::ARMBaseInstrInfo::FoldImmediate(), and isScaledConstantInRange().

◆ isT2SOImmTwoPartVal()

bool llvm::ARM_AM::isT2SOImmTwoPartVal ( unsigned  Imm)
inline

◆ isThumbImm16ShiftedVal()

bool llvm::ARM_AM::isThumbImm16ShiftedVal ( unsigned  V)
inline

isThumbImm16ShiftedVal - Return true if the specified value can be obtained by left shifting a 16-bit immediate.

Definition at line 238 of file ARMAddressingModes.h.

References getThumbImm16ValShift().

◆ isThumbImmShiftedVal()

bool llvm::ARM_AM::isThumbImmShiftedVal ( unsigned  V)
inline

isThumbImmShiftedVal - Return true if the specified value can be obtained by left shifting a 8-bit immediate.

Definition at line 219 of file ARMAddressingModes.h.

References getThumbImmValShift().

Referenced by llvm::ARMTTIImpl::getIntImmCost(), isScaledConstantInRange(), and llvm::ARMTargetLowering::LowerAsmOperandForConstraint().

◆ rotl32()

unsigned llvm::ARM_AM::rotl32 ( unsigned  Val,
unsigned  Amt 
)
inline

rotl32 - Rotate a 32-bit unsigned value left by a specified # bits.

Definition at line 91 of file ARMAddressingModes.h.

References assert().

Referenced by getSOImmVal().

◆ rotr32()

unsigned llvm::ARM_AM::rotr32 ( unsigned  Val,
unsigned  Amt 
)
inline