LLVM 19.0.0git
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Enumerations | |
enum | VLMUL : uint8_t { LMUL_1 = 0 , LMUL_2 , LMUL_4 , LMUL_8 , LMUL_RESERVED , LMUL_F8 , LMUL_F4 , LMUL_F2 } |
enum | { TAIL_UNDISTURBED_MASK_UNDISTURBED = 0 , TAIL_AGNOSTIC = 1 , MASK_AGNOSTIC = 2 } |
enum | { InstFormatPseudo = 0 , InstFormatR = 1 , InstFormatR4 = 2 , InstFormatI = 3 , InstFormatS = 4 , InstFormatB = 5 , InstFormatU = 6 , InstFormatJ = 7 , InstFormatCR = 8 , InstFormatCI = 9 , InstFormatCSS = 10 , InstFormatCIW = 11 , InstFormatCL = 12 , InstFormatCS = 13 , InstFormatCA = 14 , InstFormatCB = 15 , InstFormatCJ = 16 , InstFormatCU = 17 , InstFormatCLB = 18 , InstFormatCLH = 19 , InstFormatCSB = 20 , InstFormatCSH = 21 , InstFormatOther = 22 , InstFormatMask = 31 , InstFormatShift = 0 , ConstraintShift = InstFormatShift + 5 , VS2Constraint = 0b001 << ConstraintShift , VS1Constraint = 0b010 << ConstraintShift , VMConstraint = 0b100 << ConstraintShift , ConstraintMask = 0b111 << ConstraintShift , VLMulShift = ConstraintShift + 3 , VLMulMask = 0b111 << VLMulShift , ForceTailAgnosticShift = VLMulShift + 3 , ForceTailAgnosticMask = 1 << ForceTailAgnosticShift , IsTiedPseudoShift = ForceTailAgnosticShift + 1 , IsTiedPseudoMask = 1 << IsTiedPseudoShift , HasSEWOpShift = IsTiedPseudoShift + 1 , HasSEWOpMask = 1 << HasSEWOpShift , HasVLOpShift = HasSEWOpShift + 1 , HasVLOpMask = 1 << HasVLOpShift , HasVecPolicyOpShift = HasVLOpShift + 1 , HasVecPolicyOpMask = 1 << HasVecPolicyOpShift , IsRVVWideningReductionShift = HasVecPolicyOpShift + 1 , IsRVVWideningReductionMask = 1 << IsRVVWideningReductionShift , UsesMaskPolicyShift = IsRVVWideningReductionShift + 1 , UsesMaskPolicyMask = 1 << UsesMaskPolicyShift , IsSignExtendingOpWShift = UsesMaskPolicyShift + 1 , IsSignExtendingOpWMask = 1ULL << IsSignExtendingOpWShift , HasRoundModeOpShift = IsSignExtendingOpWShift + 1 , HasRoundModeOpMask = 1 << HasRoundModeOpShift , UsesVXRMShift = HasRoundModeOpShift + 1 , UsesVXRMMask = 1 << UsesVXRMShift , TargetOverlapConstraintTypeShift = UsesVXRMShift + 1 , TargetOverlapConstraintTypeMask = 3ULL << TargetOverlapConstraintTypeShift } |
enum | { MO_None = 0 , MO_CALL = 1 , MO_LO = 3 , MO_HI = 4 , MO_PCREL_LO = 5 , MO_PCREL_HI = 6 , MO_GOT_HI = 7 , MO_TPREL_LO = 8 , MO_TPREL_HI = 9 , MO_TPREL_ADD = 10 , MO_TLS_GOT_HI = 11 , MO_TLS_GD_HI = 12 , MO_TLSDESC_HI = 13 , MO_TLSDESC_LOAD_LO = 14 , MO_TLSDESC_ADD_LO = 15 , MO_TLSDESC_CALL = 16 , MO_DIRECT_FLAG_MASK = 31 } |
Functions | |
static unsigned | getFormat (uint64_t TSFlags) |
static VLMUL | getLMul (uint64_t TSFlags) |
static bool | doesForceTailAgnostic (uint64_t TSFlags) |
static bool | isTiedPseudo (uint64_t TSFlags) |
static bool | hasSEWOp (uint64_t TSFlags) |
static bool | hasVLOp (uint64_t TSFlags) |
static bool | hasVecPolicyOp (uint64_t TSFlags) |
static bool | isRVVWideningReduction (uint64_t TSFlags) |
static bool | usesMaskPolicy (uint64_t TSFlags) |
static bool | hasRoundModeOp (uint64_t TSFlags) |
static bool | usesVXRM (uint64_t TSFlags) |
static unsigned | getVLOpNum (const MCInstrDesc &Desc) |
static unsigned | getSEWOpNum (const MCInstrDesc &Desc) |
static unsigned | getVecPolicyOpNum (const MCInstrDesc &Desc) |
static int | getFRMOpNum (const MCInstrDesc &Desc) |
static int | getVXRMOpNum (const MCInstrDesc &Desc) |
static bool | isFirstDefTiedToFirstUse (const MCInstrDesc &Desc) |
anonymous enum |
Enumerator | |
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TAIL_UNDISTURBED_MASK_UNDISTURBED | |
TAIL_AGNOSTIC | |
MASK_AGNOSTIC |
Definition at line 54 of file RISCVTargetParser.h.
anonymous enum |
Definition at line 31 of file RISCVBaseInfo.h.
anonymous enum |
Definition at line 238 of file RISCVBaseInfo.h.
enum llvm::RISCVII::VLMUL : uint8_t |
Enumerator | |
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LMUL_1 | |
LMUL_2 | |
LMUL_4 | |
LMUL_8 | |
LMUL_RESERVED | |
LMUL_F8 | |
LMUL_F4 | |
LMUL_F2 |
Definition at line 43 of file RISCVTargetParser.h.
Definition at line 138 of file RISCVBaseInfo.h.
References ForceTailAgnosticMask.
Referenced by computeInfoForInstr().
Definition at line 130 of file RISCVBaseInfo.h.
References InstFormatMask, and InstFormatShift.
Referenced by llvm::RISCVRegisterInfo::getFrameIndexInstrOffset(), and llvm::RISCVRegisterInfo::needsFrameBaseReg().
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inlinestatic |
Definition at line 201 of file RISCVBaseInfo.h.
References getVLOpNum(), hasRoundModeOp(), and usesVXRM().
Referenced by llvm::RISCVTargetLowering::AdjustInstrPostInstrSelection(), and INITIALIZE_PASS().
Definition at line 134 of file RISCVBaseInfo.h.
References VLMulMask, and VLMulShift.
Referenced by computeInfoForInstr(), and emitVFROUND_NOEXCEPT_MASK().
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inlinestatic |
Definition at line 185 of file RISCVBaseInfo.h.
References assert(), hasSEWOp(), hasVecPolicyOp(), and llvm::Offset.
Referenced by llvm::RISCVInstrInfo::copyPhysRegVector(), llvm::RISCVInstrInfo::createMIROperandComment(), emitVFROUND_NOEXCEPT_MASK(), vectorPseudoHasAllNBitUsers(), and llvm::RISCVInstrInfo::verifyInstruction().
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inlinestatic |
Definition at line 194 of file RISCVBaseInfo.h.
References assert(), and hasVecPolicyOp().
Referenced by llvm::RISCVInstrInfo::convertToThreeAddress(), llvm::RISCVInstrInfo::createMIROperandComment(), and llvm::RISCVInstrInfo::verifyInstruction().
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inlinestatic |
Definition at line 174 of file RISCVBaseInfo.h.
References assert(), hasSEWOp(), hasVecPolicyOp(), hasVLOp(), and llvm::Offset.
Referenced by llvm::RISCVInstrInfo::copyPhysRegVector(), getFRMOpNum(), getVXRMOpNum(), vectorPseudoHasAllNBitUsers(), and llvm::RISCVInstrInfo::verifyInstruction().
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inlinestatic |
Definition at line 216 of file RISCVBaseInfo.h.
References getVLOpNum(), hasRoundModeOp(), and usesVXRM().
Definition at line 167 of file RISCVBaseInfo.h.
References HasRoundModeOpMask.
Referenced by getFRMOpNum(), getVXRMOpNum(), and lowerRISCVVMachineInstrToMCInst().
Definition at line 146 of file RISCVBaseInfo.h.
References HasSEWOpMask.
Referenced by llvm::RISCVInstrInfo::createMIROperandComment(), getSEWOpNum(), getVLOpNum(), isConvertibleToVMV_V_V(), lowerRISCVVMachineInstrToMCInst(), vectorPseudoHasAllNBitUsers(), and llvm::RISCVInstrInfo::verifyInstruction().
Definition at line 154 of file RISCVBaseInfo.h.
References HasVecPolicyOpMask.
Referenced by computeInfoForInstr(), llvm::RISCVInstrInfo::convertToThreeAddress(), llvm::RISCVInstrInfo::createMIROperandComment(), llvm::RISCVInstrInfo::findCommutedOpIndices(), getSEWOpNum(), getVecPolicyOpNum(), getVLOpNum(), lowerRISCVVMachineInstrToMCInst(), vectorPseudoHasAllNBitUsers(), and llvm::RISCVInstrInfo::verifyInstruction().
Definition at line 150 of file RISCVBaseInfo.h.
References HasVLOpMask.
Referenced by computeInfoForInstr(), getVLOpNum(), isConvertibleToVMV_V_V(), lowerRISCVVMachineInstrToMCInst(), vectorPseudoHasAllNBitUsers(), and llvm::RISCVInstrInfo::verifyInstruction().
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inlinestatic |
Definition at line 232 of file RISCVBaseInfo.h.
References llvm::MCOI::TIED_TO.
Definition at line 158 of file RISCVBaseInfo.h.
References IsRVVWideningReductionMask.
Referenced by isConvertibleToVMV_V_V().
Definition at line 142 of file RISCVBaseInfo.h.
References IsTiedPseudoMask.
Referenced by lowerRISCVVMachineInstrToMCInst().
Definition at line 162 of file RISCVBaseInfo.h.
References UsesMaskPolicyMask.
Referenced by computeInfoForInstr().
Definition at line 172 of file RISCVBaseInfo.h.
References UsesVXRMMask.
Referenced by getFRMOpNum(), and getVXRMOpNum().