LLVM  6.0.0svn
llvm::ARMRegisterInfo Member List

This is the complete list of members for llvm::ARMRegisterInfo, including all inherited members.

anchor()llvm::ARMRegisterInfovirtual
ARMBaseRegisterInfo()llvm::ARMBaseRegisterInfoexplicitprotected
ARMRegisterInfo()llvm::ARMRegisterInfo
BasePtrllvm::ARMBaseRegisterInfoprotected
cannotEliminateFrame(const MachineFunction &MF) constllvm::ARMBaseRegisterInfo
canRealignStack(const MachineFunction &MF) const overridellvm::ARMBaseRegisterInfo
eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const overridellvm::ARMBaseRegisterInfo
emitLoadConstPool(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, const DebugLoc &dl, unsigned DestReg, unsigned SubIdx, int Val, ARMCC::CondCodes Pred=ARMCC::AL, unsigned PredReg=0, unsigned MIFlags=MachineInstr::NoFlags) constllvm::ARMBaseRegisterInfovirtual
getBaseRegister() constllvm::ARMBaseRegisterInfoinline
getCalleeSavedRegs(const MachineFunction *MF) const overridellvm::ARMBaseRegisterInfo
getCalleeSavedRegsViaCopy(const MachineFunction *MF) constllvm::ARMBaseRegisterInfo
getCallPreservedMask(const MachineFunction &MF, CallingConv::ID) const overridellvm::ARMBaseRegisterInfo
getCrossCopyRegClass(const TargetRegisterClass *RC) const overridellvm::ARMBaseRegisterInfo
getFrameIndexInstrOffset(const MachineInstr *MI, int Idx) const overridellvm::ARMBaseRegisterInfo
getFrameRegister(const MachineFunction &MF) const overridellvm::ARMBaseRegisterInfo
getLargestLegalSuperClass(const TargetRegisterClass *RC, const MachineFunction &MF) const overridellvm::ARMBaseRegisterInfo
getNoPreservedMask() const overridellvm::ARMBaseRegisterInfo
getOpcode(int Op) constllvm::ARMBaseRegisterInfoprotected
getPointerRegClass(const MachineFunction &MF, unsigned Kind=0) const overridellvm::ARMBaseRegisterInfo
getRegAllocationHints(unsigned VirtReg, ArrayRef< MCPhysReg > Order, SmallVectorImpl< MCPhysReg > &Hints, const MachineFunction &MF, const VirtRegMap *VRM, const LiveRegMatrix *Matrix) const overridellvm::ARMBaseRegisterInfo
getRegPressureLimit(const TargetRegisterClass *RC, MachineFunction &MF) const overridellvm::ARMBaseRegisterInfo
getReservedRegs(const MachineFunction &MF) const overridellvm::ARMBaseRegisterInfo
getSjLjDispatchPreservedMask(const MachineFunction &MF) constllvm::ARMBaseRegisterInfo
getThisReturnPreservedMask(const MachineFunction &MF, CallingConv::ID) constllvm::ARMBaseRegisterInfo
getTLSCallPreservedMask(const MachineFunction &MF) constllvm::ARMBaseRegisterInfo
hasBasePointer(const MachineFunction &MF) constllvm::ARMBaseRegisterInfo
isFrameOffsetLegal(const MachineInstr *MI, unsigned BaseReg, int64_t Offset) const overridellvm::ARMBaseRegisterInfo
isLowRegister(unsigned Reg) constllvm::ARMBaseRegisterInfo
materializeFrameBaseRegister(MachineBasicBlock *MBB, unsigned BaseReg, int FrameIdx, int64_t Offset) const overridellvm::ARMBaseRegisterInfo
needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const overridellvm::ARMBaseRegisterInfo
requiresFrameIndexScavenging(const MachineFunction &MF) const overridellvm::ARMBaseRegisterInfo
requiresRegisterScavenging(const MachineFunction &MF) const overridellvm::ARMBaseRegisterInfo
requiresVirtualBaseRegisters(const MachineFunction &MF) const overridellvm::ARMBaseRegisterInfo
resolveFrameIndex(MachineInstr &MI, unsigned BaseReg, int64_t Offset) const overridellvm::ARMBaseRegisterInfo
shouldCoalesce(MachineInstr *MI, const TargetRegisterClass *SrcRC, unsigned SubReg, const TargetRegisterClass *DstRC, unsigned DstSubReg, const TargetRegisterClass *NewRC, LiveIntervals &LIS) const overridellvm::ARMBaseRegisterInfo
trackLivenessAfterRegAlloc(const MachineFunction &MF) const overridellvm::ARMBaseRegisterInfo
updateRegAllocHint(unsigned Reg, unsigned NewReg, MachineFunction &MF) const overridellvm::ARMBaseRegisterInfo