LLVM  6.0.0svn
Public Member Functions | List of all members
llvm::ThumbRegisterInfo Struct Reference

#include "Target/ARM/ThumbRegisterInfo.h"

Inheritance diagram for llvm::ThumbRegisterInfo:
Inheritance graph
Collaboration diagram for llvm::ThumbRegisterInfo:
Collaboration graph

Public Member Functions

 ThumbRegisterInfo ()
const TargetRegisterClassgetLargestLegalSuperClass (const TargetRegisterClass *RC, const MachineFunction &MF) const override
const TargetRegisterClassgetPointerRegClass (const MachineFunction &MF, unsigned Kind=0) const override
void emitLoadConstPool (MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, const DebugLoc &dl, unsigned DestReg, unsigned SubIdx, int Val, ARMCC::CondCodes Pred=ARMCC::AL, unsigned PredReg=0, unsigned MIFlags=MachineInstr::NoFlags) const override
 emitLoadConstPool - Emits a load from constpool to materialize the specified immediate. More...
bool rewriteFrameIndex (MachineBasicBlock::iterator II, unsigned FrameRegIdx, unsigned FrameReg, int &Offset, const ARMBaseInstrInfo &TII) const
void resolveFrameIndex (MachineInstr &MI, unsigned BaseReg, int64_t Offset) const override
bool saveScavengerRegister (MachineBasicBlock &MBB, MachineBasicBlock::iterator I, MachineBasicBlock::iterator &UseMI, const TargetRegisterClass *RC, unsigned Reg) const override
 saveScavengerRegister - Spill the register so it can be used by the register scavenger. More...
void eliminateFrameIndex (MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override
- Public Member Functions inherited from llvm::ARMBaseRegisterInfo
const MCPhysReggetCalleeSavedRegs (const MachineFunction *MF) const override
 Code Generation virtual methods... More...
const MCPhysReggetCalleeSavedRegsViaCopy (const MachineFunction *MF) const
const uint32_tgetCallPreservedMask (const MachineFunction &MF, CallingConv::ID) const override
const uint32_tgetNoPreservedMask () const override
const uint32_tgetTLSCallPreservedMask (const MachineFunction &MF) const
const uint32_tgetSjLjDispatchPreservedMask (const MachineFunction &MF) const
const uint32_tgetThisReturnPreservedMask (const MachineFunction &MF, CallingConv::ID) const
 getThisReturnPreservedMask - Returns a call preserved mask specific to the case that 'returned' is on an i32 first argument if the calling convention is one that can (partially) model this attribute with a preserved mask (i.e. More...
BitVector getReservedRegs (const MachineFunction &MF) const override
const TargetRegisterClassgetPointerRegClass (const MachineFunction &MF, unsigned Kind=0) const override
const TargetRegisterClassgetCrossCopyRegClass (const TargetRegisterClass *RC) const override
const TargetRegisterClassgetLargestLegalSuperClass (const TargetRegisterClass *RC, const MachineFunction &MF) const override
unsigned getRegPressureLimit (const TargetRegisterClass *RC, MachineFunction &MF) const override
void getRegAllocationHints (unsigned VirtReg, ArrayRef< MCPhysReg > Order, SmallVectorImpl< MCPhysReg > &Hints, const MachineFunction &MF, const VirtRegMap *VRM, const LiveRegMatrix *Matrix) const override
void updateRegAllocHint (unsigned Reg, unsigned NewReg, MachineFunction &MF) const override
bool hasBasePointer (const MachineFunction &MF) const
bool canRealignStack (const MachineFunction &MF) const override
int64_t getFrameIndexInstrOffset (const MachineInstr *MI, int Idx) const override
bool needsFrameBaseReg (MachineInstr *MI, int64_t Offset) const override
 needsFrameBaseReg - Returns true if the instruction's frame index reference would be better served by a base register other than FP or SP. More...
void materializeFrameBaseRegister (MachineBasicBlock *MBB, unsigned BaseReg, int FrameIdx, int64_t Offset) const override
 materializeFrameBaseRegister - Insert defining instruction(s) for BaseReg to be a pointer to FrameIdx at the beginning of the basic block. More...
void resolveFrameIndex (MachineInstr &MI, unsigned BaseReg, int64_t Offset) const override
bool isFrameOffsetLegal (const MachineInstr *MI, unsigned BaseReg, int64_t Offset) const override
bool cannotEliminateFrame (const MachineFunction &MF) const
unsigned getFrameRegister (const MachineFunction &MF) const override
unsigned getBaseRegister () const
bool isLowRegister (unsigned Reg) const
bool requiresRegisterScavenging (const MachineFunction &MF) const override
 Code Generation virtual methods... More...
bool trackLivenessAfterRegAlloc (const MachineFunction &MF) const override
bool requiresFrameIndexScavenging (const MachineFunction &MF) const override
bool requiresVirtualBaseRegisters (const MachineFunction &MF) const override
void eliminateFrameIndex (MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override
bool shouldCoalesce (MachineInstr *MI, const TargetRegisterClass *SrcRC, unsigned SubReg, const TargetRegisterClass *DstRC, unsigned DstSubReg, const TargetRegisterClass *NewRC, LiveIntervals &LIS) const override
 SrcRC and DstRC will be morphed into NewRC if this returns true. More...

Additional Inherited Members

- Protected Member Functions inherited from llvm::ARMBaseRegisterInfo
 ARMBaseRegisterInfo ()
unsigned getOpcode (int Op) const
- Protected Attributes inherited from llvm::ARMBaseRegisterInfo
unsigned BasePtr = ARM::R6
 BasePtr - ARM physical register used as a base ptr in complex stack frames. More...

Detailed Description

Definition at line 26 of file ThumbRegisterInfo.h.

Constructor & Destructor Documentation

◆ ThumbRegisterInfo()

ThumbRegisterInfo::ThumbRegisterInfo ( )

Definition at line 41 of file ThumbRegisterInfo.cpp.

Member Function Documentation

◆ eliminateFrameIndex()

void ThumbRegisterInfo::eliminateFrameIndex ( MachineBasicBlock::iterator  II,
int  SPAdj,
unsigned  FIOperandNum,
RegScavenger RS = nullptr 
) const

Definition at line 507 of file ThumbRegisterInfo.cpp.

References llvm::ARMCC::AL, assert(), llvm::ARMBaseRegisterInfo::BasePtr, llvm::MachineOperand::ChangeToImmediate(), llvm::MachineOperand::ChangeToRegister(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::ARMBaseRegisterInfo::eliminateFrameIndex(), emitLoadConstPool(), llvm::emitThumbRegPlusImmediate(), emitThumbRegPlusImmInReg(), llvm::MachineInstr::findFirstPredOperandIdx(), llvm::ISD::FrameIndex, llvm::ARMSubtarget::genExecuteOnly(), llvm::MachineInstr::getDebugLoc(), llvm::MachineFunction::getFrameInfo(), llvm::ARMSubtarget::getFrameLowering(), llvm::ARMFunctionInfo::getFramePtrSpillOffset(), llvm::ARMBaseRegisterInfo::getFrameRegister(), llvm::MachineOperand::getIndex(), llvm::MachineFunction::getInfo(), llvm::ARMSubtarget::getInstrInfo(), llvm::MachineFrameInfo::getObjectOffset(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getRegInfo(), llvm::MachineFrameInfo::getStackSize(), llvm::MachineFunction::getSubtarget(), llvm::ARMBaseRegisterInfo::hasBasePointer(), llvm::ARMFrameLowering::hasFP(), llvm::ARMFrameLowering::hasReservedCallFrame(), llvm::MachineFrameInfo::hasVarSizedObjects(), llvm::MachineInstr::isDebugValue(), llvm::MachineInstr::isPredicable(), llvm::RegScavenger::isScavengingFrameIndex(), llvm::ARMSubtarget::isThumb1Only(), llvm::ARMFunctionInfo::isThumbFunction(), llvm_unreachable, llvm::MachineInstr::mayLoad(), llvm::MachineInstr::mayStore(), MI, llvm::predOps(), removeOperands(), rewriteFrameIndex(), llvm::MachineInstr::setDesc(), and TII.

◆ emitLoadConstPool()

void ThumbRegisterInfo::emitLoadConstPool ( MachineBasicBlock MBB,
MachineBasicBlock::iterator MBBI,
const DebugLoc dl,
unsigned  DestReg,
unsigned  SubIdx,
int  Val,
ARMCC::CondCodes  Pred = ARMCC::AL,
unsigned  PredReg = 0,
unsigned  MIFlags = MachineInstr::NoFlags 
) const

emitLoadConstPool - Emits a load from constpool to materialize the specified immediate.

Reimplemented from llvm::ARMBaseRegisterInfo.

Definition at line 104 of file ThumbRegisterInfo.cpp.

References assert(), emitThumb1LoadConstPool(), emitThumb2LoadConstPool(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getSubtarget(), llvm::isARMLowRegister(), and llvm::ARMSubtarget::isThumb1Only().

Referenced by eliminateFrameIndex().

◆ getLargestLegalSuperClass()

const TargetRegisterClass * ThumbRegisterInfo::getLargestLegalSuperClass ( const TargetRegisterClass RC,
const MachineFunction MF 
) const

◆ getPointerRegClass()

const TargetRegisterClass * ThumbRegisterInfo::getPointerRegClass ( const MachineFunction MF,
unsigned  Kind = 0 
) const

◆ resolveFrameIndex()

void ThumbRegisterInfo::resolveFrameIndex ( MachineInstr MI,
unsigned  BaseReg,
int64_t  Offset 
) const

◆ rewriteFrameIndex()

bool ThumbRegisterInfo::rewriteFrameIndex ( MachineBasicBlock::iterator  II,
unsigned  FrameRegIdx,
unsigned  FrameReg,
int &  Offset,
const ARMBaseInstrInfo TII 
) const

◆ saveScavengerRegister()

bool ThumbRegisterInfo::saveScavengerRegister ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  I,
MachineBasicBlock::iterator UseMI,
const TargetRegisterClass RC,
unsigned  Reg 
) const

The documentation for this struct was generated from the following files: