38 cl::desc(
"Disable tail duplication"));
40 cl::desc(
"Disable pre-register allocation tail duplication"));
46 cl::desc(
"Disable Stack Slot Coloring"));
48 cl::desc(
"Disable Machine Dead Code Elimination"));
50 cl::desc(
"Disable Early If-conversion"));
54 cl::desc(
"Disable Machine Common Subexpression Elimination"));
57 cl::desc(
"enable the shrink-wrapping pass"));
60 cl::desc(
"Enable optimized register allocation compilation path."));
65 cl::desc(
"Disable Machine Sinking"));
67 cl::desc(
"Disable Loop Strength Reduction Pass"));
71 cl::desc(
"Disable Codegen Prepare"));
73 cl::desc(
"Disable Copy Propagation pass"));
77 "enable-implicit-null-checks",
78 cl::desc(
"Fold null checks into faulting memory operations"),
81 cl::desc(
"Print LLVM IR produced by the loop-reduce pass"));
83 cl::desc(
"Print LLVM IR input to isel pass"));
85 cl::desc(
"Dump garbage collector data"));
87 cl::desc(
"Verify generated machine code"),
102 cl::desc(
"Run MachineScheduler post regalloc (independent of preRA sched)"));
106 cl::desc(
"Run live interval analysis earlier in the pipeline"));
110 cl::desc(
"Enable the new, experimental CFL alias analysis in CodeGen"));
184 "Target Pass Configuration",
false,
false)
219 AddingMachinePasses(
false),
TM(tm), Impl(nullptr), Initialized(
false),
220 DisableVerify(
false), EnableTailMerge(
true), EnableShrinkWrap(
false) {
237 TargetPassID != InsertedPassID.
getID()) ||
240 "Insert a pass after itself!");
241 std::pair<AnalysisID, IdentifyingPassPtr>
P(TargetPassID, InsertedPassID);
291 if (StartBefore == PassID)
293 if (Started && !Stopped) {
296 if (AddingMachinePasses && (printAfter || verifyAfter))
297 Banner = std::string(
"After ") + std::string(P->
getPassName());
299 if (AddingMachinePasses) {
307 for (
SmallVectorImpl<std::pair<AnalysisID, IdentifyingPassPtr> >::iterator
311 if ((*I).first == PassID) {
312 assert((*I).second.isValid() &&
"Illegal Pass ID!");
314 if ((*I).second.isInstance())
315 NP = (*I).second.getInstance();
318 assert(NP &&
"Pass ID not registered");
326 if (StopAfter == PassID)
328 if (StartAfter == PassID)
330 if (Stopped && !Started)
355 addPass(P, verifyAfter, printAfter);
469 dbgs(),
"\n\n*** Final LLVM Code input to ISel ***\n"));
496 AddingMachinePasses =
true;
503 .equals(
"option-unspecified")) {
507 assert (TPI && IPI &&
"Pass ID not registered!");
508 const char *TID = (
const char *)(TPI->
getTypeInfo());
509 const char *IID = (
const char *)(IPI->
getTypeInfo());
581 AddingMachinePasses =
false;
658 "pick register allocator based on -O option",
666 cl::desc(
"Register allocator to use"));
711 return RegAlloc.getNumOccurrences() == 0;
Pass interface - Implemented by all 'passes'.
static cl::opt< cl::boolOrDefault > OptimizeRegAlloc("optimize-regalloc", cl::Hidden, cl::desc("Enable optimized register allocation compilation path."))
unsigned PrintMachineCode
PrintMachineCode - This flag is enabled when the -print-machineinstrs option is specified on the comm...
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
Pass * createLoopStrengthReducePass()
virtual void addIRPasses()
Add common target configurable passes that perform LLVM IR to IR transforms following machine indepen...
AnalysisID getPassID() const
getPassID - Return the PassID number that corresponds to this pass.
FunctionPass * createSafeStackPass()
This pass splits the stack into a safe stack and an unsafe stack to protect against stack-based overf...
static cl::opt< bool > DisablePartialLibcallInlining("disable-partial-libcall-inlining", cl::Hidden, cl::desc("Disable Partial Libcall Inlining"))
char & MachineLICMID
MachineLICM - This pass performs LICM on machine instructions.
DWARF-like instruction based exceptions.
virtual bool addPreRewrite()
addPreRewrite - Add passes to the optimized register allocation pipeline after register allocation is...
FunctionPass * createPrintFunctionPass(raw_ostream &OS, const std::string &Banner="")
Create and return a pass that prints functions to the specified raw_ostream as they are processed...
FunctionPass * createVerifierPass(bool FatalErrors=true)
Create a verifier pass.
char & RegisterCoalescerID
RegisterCoalescer - This pass merges live ranges to eliminate copies.
char & EarlyIfConverterID
EarlyIfConverter - This pass performs if-conversion on SSA form by inserting cmov instructions...
FunctionPass *(* FunctionPassCtor)()
virtual const char * getPassName() const
getPassName - Return a nice clean name for a pass.
static void setDefault(FunctionPassCtor C)
FunctionPass * createWinEHPass(const TargetMachine *TM)
createWinEHPass - Prepares personality functions used by MSVC on Windows, in addition to the Itanium ...
const void * getTypeInfo() const
getTypeInfo - Return the id object for the pass...
char & MachineSchedulerID
MachineScheduler - This pass schedules machine instructions.
setjmp/longjmp based exceptions
RegisterPassParser class - Handle the addition of new machine passes.
static MachinePassRegistry Registry
RegisterRegAlloc's global Registry tracks allocator registration.
char & ProcessImplicitDefsID
ProcessImpicitDefs pass - This pass removes IMPLICIT_DEFs.
virtual void addMachineSSAOptimization()
addMachineSSAOptimization - Add standard passes that optimize machine instructions in SSA form...
char & MachineBlockPlacementStatsID
MachineBlockPlacementStats - This pass collects statistics about the basic block placement using bran...
bool getEnableShrinkWrap() const
Return true if shrink wrapping is enabled.
LLVM_ATTRIBUTE_NORETURN void report_fatal_error(const char *reason, bool gen_crash_diag=true)
Reports a serious error, calling any installed error handler.
FunctionPass * createShadowStackGCLoweringPass()
ShadowStackGCLowering - Implements the custom lowering mechanism used by the shadow stack GC...
virtual TargetPassConfig * createPassConfig(PassManagerBase &PM)
Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of ...
static cl::opt< bool > DisableLSR("disable-lsr", cl::Hidden, cl::desc("Disable Loop Strength Reduction Pass"))
static cl::opt< bool > DisableEarlyTailDup("disable-early-taildup", cl::Hidden, cl::desc("Disable pre-register allocation tail duplication"))
virtual void addPreEmitPass()
This pass may be implemented by targets that want to run passes immediately before machine code is em...
Pass * getInstance() const
FunctionPass * createMachineVerifierPass(const std::string &Banner)
createMachineVerifierPass - This pass verifies cenerated machine code instructions for correctness...
void insertPass(AnalysisID TargetPassID, IdentifyingPassPtr InsertedPassID)
Insert InsertedPassID pass after TargetPassID pass.
static cl::opt< bool > VerifyMachineCode("verify-machineinstrs", cl::Hidden, cl::desc("Verify generated machine code"), cl::init(false), cl::ZeroOrMore)
char & MachineLoopInfoID
MachineLoopInfo - This pass is a loop analysis pass.
const MCAsmInfo * getMCAsmInfo() const
Return target specific asm information.
FunctionPass * createGCLoweringPass()
GCLowering Pass - Used by gc.root to perform its default lowering operations.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
bool getOptimizeRegAlloc() const
Return true if the optimized regalloc pipeline is enabled.
char & StackColoringID
StackSlotColoring - This pass performs stack coloring and merging.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
static cl::opt< bool > DisableBlockPlacement("disable-block-placement", cl::Hidden, cl::desc("Disable probability-driven block placement"))
virtual void addPreSched2()
This method may be implemented by targets that want to run passes after prolog-epilog insertion and b...
static RegisterRegAlloc defaultRegAlloc("default","pick register allocator based on -O option", useDefaultRegisterAllocator)
FunctionPass * createRegAllocPass(bool Optimized)
addMachinePasses helper to create the target-selected or overriden regalloc pass. ...
static IdentifyingPassPtr overridePass(AnalysisID StandardID, IdentifyingPassPtr TargetID)
Allow standard passes to be disabled by the command line, regardless of who is adding the pass...
Target-Independent Code Generator Pass Configuration Options.
CodeGenOpt::Level getOptLevel() const
virtual void addMachinePasses()
Add the complete, standard set of LLVM CodeGen passes.
IdentifyingPassPtr getPassSubstitution(AnalysisID StandardID) const
Return the pass substituted for StandardID by the target.
char & MachineCSEID
MachineCSE - This pass performs global CSE on machine instructions.
static cl::opt< bool > EnableBlockPlacementStats("enable-block-placement-stats", cl::Hidden, cl::desc("Collect probability-driven block placement stats"))
char & StackSlotColoringID
StackSlotColoring - This pass performs stack slot coloring.
virtual void addPreRegAlloc()
This method may be implemented by targets that want to run passes immediately before register allocat...
char & ExpandPostRAPseudosID
ExpandPostRAPseudos - This pass expands pseudo instructions after register allocation.
ImmutablePass * createBasicAliasAnalysisPass()
char & ExpandISelPseudosID
ExpandISelPseudos - This pass expands pseudo-instructions.
char & DeadMachineInstructionElimID
DeadMachineInstructionElim - This pass removes dead machine instructions.
ImmutablePass * createScopedNoAliasAAPass()
static cl::opt< cl::boolOrDefault > EnableShrinkWrapOpt("enable-shrink-wrap", cl::Hidden, cl::desc("enable the shrink-wrapping pass"))
void substitutePass(AnalysisID StandardID, IdentifyingPassPtr TargetID)
Allow the target to override a specific pass without overriding the pass pipeline.
FunctionPass * createUnreachableBlockEliminationPass()
createUnreachableBlockEliminationPass - The LLVM code generator does not work well with unreachable b...
RegisterRegAlloc class - Track the registration of register allocators.
MachinePassRegistry - Track the registration of machine passes.
char & LiveIntervalsID
LiveIntervals - This analysis keeps track of the live ranges of virtual and physical registers...
virtual bool addILPOpts()
Add passes that optimize instruction level parallelism for out-of-order targets.
ImmutablePass * createCFLAliasAnalysisPass()
static cl::opt< bool > MISchedPostRA("misched-postra", cl::Hidden, cl::desc("Run MachineScheduler post regalloc (independent of preRA sched)"))
FunctionPass * createGCInfoPrinter(raw_ostream &OS)
Creates a pass to print GC metadata.
static cl::opt< bool > DisablePostRA("disable-post-ra", cl::Hidden, cl::desc("Disable Post Regalloc"))
FunctionPass * createCodeGenPreparePass(const TargetMachine *TM=nullptr)
createCodeGenPreparePass - Transform the code to expose more pattern matching during instruction sele...
DenseMap< AnalysisID, IdentifyingPassPtr > TargetPasses
char & PHIEliminationID
PHIElimination - This pass eliminates machine instruction PHI nodes by inserting copy instructions...
char & LiveVariablesID
LiveVariables pass - This pass computes the set of blocks in which each variable is life and sets mac...
virtual FunctionPass * createTargetRegisterAllocator(bool Optimized)
createTargetRegisterAllocator - Create the register allocator pass for this target at the current opt...
virtual bool addGCPasses()
addGCPasses - Add late codegen passes that analyze code for garbage collection.
initializer< Ty > init(const Ty &Val)
ImmutablePass * createTypeBasedAliasAnalysisPass()
* if(!EatIfPresent(lltok::kw_thread_local)) return false
ParseOptionalThreadLocal := /*empty.
static char PostRAMachineLICMID
PostRAMachineLICM - A clone of the LICM pass that runs during late machine optimization after regallo...
void printAndVerify(const std::string &Banner)
printAndVerify - Add a pass to dump then verify the machine function, if those steps are enabled...
virtual void addOptimizedRegAlloc(FunctionPass *RegAllocPass)
addOptimizedRegAlloc - Add passes related to register allocation.
virtual void addMachineLateOptimization()
Add passes that optimize machine instructions after register allocation.
virtual bool addPreISel()
Methods with trivial inline returns are convenient points in the common codegen pass pipeline where t...
FunctionPass class - This class is used to implement most global optimizations.
ExceptionHandling getExceptionHandlingType() const
virtual void addISelPrepare()
Add common passes that perform LLVM IR to IR transforms in preparation for instruction selection...
virtual void addCodeGenPrepare()
Add pass to prepare the LLVM IR for code generation.
static FunctionPass * useDefaultRegisterAllocator()
A dummy default pass factory indicates whether the register allocator is overridden on the command li...
static cl::opt< RegisterRegAlloc::FunctionPassCtor, false, RegisterPassParser< RegisterRegAlloc > > RegAlloc("regalloc", cl::init(&useDefaultRegisterAllocator), cl::desc("Register allocator to use"))
-regalloc=... command line option.
static cl::opt< bool > DisableEarlyIfConversion("disable-early-ifcvt", cl::Hidden, cl::desc("Disable Early If-conversion"))
PassInfo class - An instance of this class exists for every pass known by the system, and can be obtained from a live Pass by calling its getPassInfo() method.
char & MachineCopyPropagationID
MachineCopyPropagation - This pass performs copy propagation on machine instructions.
void addPrintPass(const std::string &Banner)
Add a pass to print the machine function if printing is enabled.
static cl::opt< bool > DisablePostRAMachineLICM("disable-postra-machine-licm", cl::Hidden, cl::desc("Disable Machine LICM"))
char & ImplicitNullChecksID
ImplicitNullChecks - This pass folds null pointer checks into nearby memory operations.
void addPassesToHandleExceptions()
Add passes to lower exception handling for the code generator.
static cl::opt< bool > PrintLSR("print-lsr-output", cl::Hidden, cl::desc("Print LLVM IR produced by the loop-reduce pass"))
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
char & PostRASchedulerID
createPostRAScheduler - This pass performs post register allocation scheduling.
static FunctionPassCtor getDefault()
FunctionPass * createStackProtectorPass(const TargetMachine *TM)
createStackProtectorPass - This pass adds stack protectors to functions.
ImmutablePass class - This class is used to provide information that does not need to be run...
static cl::opt< bool > EnableImplicitNullChecks("enable-implicit-null-checks", cl::desc("Fold null checks into faulting memory operations"), cl::init(false))
char & StackMapLivenessID
StackMapLiveness - This pass analyses the register live-out set of stackmap/patchpoint intrinsics and...
static cl::opt< bool > DisableBranchFold("disable-branch-fold", cl::Hidden, cl::desc("Disable branch folding"))
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small...
char & TailDuplicateID
TailDuplicate - Duplicate blocks with unconditional branches into tails of their predecessors.
char & MachineSinkingID
MachineSinking - This pass performs sinking on machine instructions.
static cl::opt< bool > DisableSSC("disable-ssc", cl::Hidden, cl::desc("Disable Stack Slot Coloring"))
~TargetPassConfig() override
MachineFunctionPass * createMachineFunctionPrinterPass(raw_ostream &OS, const std::string &Banner="")
MachineFunctionPrinter pass - This pass prints out the machine function to the given stream as a debu...
ModulePass * createRewriteSymbolsPass()
char & OptimizePHIsID
OptimizePHIs - This pass optimizes machine instruction PHIs to take advantage of opportunities create...
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
virtual void addPostRegAlloc()
This method may be implemented by targets that want to run passes after register allocation pass pipe...
char & PeepholeOptimizerID
PeepholeOptimizer - This pass performs peephole optimizations - like extension and comparison elimina...
Discriminated union of Pass ID types.
bool EnableShrinkWrap
Default setting for -enable-shrink-wrap on this target.
virtual void addFastRegAlloc(FunctionPass *RegAllocPass)
addFastRegAlloc - Add the minimum set of target-independent passes that are required for fast registe...
char & PrologEpilogCodeInserterID
PrologEpilogCodeInserter - This pass inserts prolog and epilog code, and eliminates abstract frame re...
FunctionPass * createPartiallyInlineLibCallsPass()
char & GCMachineCodeAnalysisID
GCMachineCodeAnalysis - Target-independent pass to mark safe points in machine code.
char & PostMachineSchedulerID
PostMachineScheduler - This pass schedules machine instructions postRA.
AnalysisID addPass(AnalysisID PassID, bool verifyAfter=true, bool printAfter=true)
Utilities for targets to add passes to the pass manager.
FunctionPass * createDwarfEHPass(const TargetMachine *TM)
createDwarfEHPass - This pass mulches exception handling code into a form adapted to code generation...
static IdentifyingPassPtr applyDisable(IdentifyingPassPtr PassID, bool Override)
Allow standard passes to be disabled by command line options.
static cl::opt< bool > EarlyLiveIntervals("early-live-intervals", cl::Hidden, cl::desc("Run live interval analysis earlier in the pipeline"))
virtual void addBlockPlacement()
Add standard basic block placement passes.
static cl::opt< bool > DisableCopyProp("disable-copyprop", cl::Hidden, cl::desc("Disable Copy Propagation pass"))
FunctionPass * createGreedyRegisterAllocator()
Greedy register allocation pass - This pass implements a global register allocator for optimized buil...
FunctionPass * createLowerInvokePass()
char & MachineBlockPlacementID
MachineBlockPlacement - This pass places basic blocks based on branch probabilities.
static cl::opt< bool > DisableMachineSink("disable-machine-sink", cl::Hidden, cl::desc("Disable Machine Sinking"))
static cl::opt< bool > PrintISelInput("print-isel-input", cl::Hidden, cl::desc("Print LLVM IR input to isel pass"))
cl::opt< std::string > StopAfter("stop-after", cl::desc("Stop compilation after a specific pass"), cl::value_desc("pass-name"), cl::init(""))
cl::opt< std::string > StartAfter("start-after", cl::desc("Resume compilation after a specific pass"), cl::value_desc("pass-name"), cl::init(""))
void setOpt(bool &Opt, bool Val)
static cl::opt< std::string > PrintMachineInstrs("print-machineinstrs", cl::ValueOptional, cl::desc("Print machine instrs"), cl::value_desc("pass-name"), cl::init("option-unspecified"))
static cl::opt< bool > PrintGCInfo("print-gc", cl::Hidden, cl::desc("Dump garbage collector data"))
bool shouldPrintMachineCode() const
static cl::opt< bool > DisableMachineCSE("disable-machine-cse", cl::Hidden, cl::desc("Disable Machine Common Subexpression Elimination"))
const PassInfo * getPassInfo(const void *TI) const
getPassInfo - Look up a pass' corresponding PassInfo, indexed by the pass' type identifier (&MyPass::...
This file defines passes to print out IR in various granularities.
char & TwoAddressInstructionPassID
TwoAddressInstruction - This pass reduces two-address instructions to use two operands.
void addVerifyPass(const std::string &Banner)
Add a pass to perform basic verification of the machine function if verification is enabled...
FunctionPass * createSjLjEHPreparePass()
createSjLjEHPreparePass - This pass adapts exception handling code to use the GCC-style builtin setjm...
static cl::opt< bool > DisableMachineDCE("disable-machine-dce", cl::Hidden, cl::desc("Disable Machine Dead Code Elimination"))
static cl::opt< bool > DisableConstantHoisting("disable-constant-hoisting", cl::Hidden, cl::desc("Disable ConstantHoisting"))
SmallVector< std::pair< AnalysisID, IdentifyingPassPtr >, 4 > InsertedPasses
Store the pairs of <AnalysisID, AnalysisID> of which the second pass is inserted after each instance ...
static char EarlyTailDuplicateID
Pseudo Pass IDs.
static Pass * createPass(AnalysisID ID)
void initializeCodeGen(PassRegistry &)
initializeCodeGen - Initialize all passes linked into the CodeGen library.
FunctionPass * createFastRegisterAllocator()
FastRegisterAllocation Pass - This pass register allocates as fast as possible.
char & VirtRegRewriterID
VirtRegRewriter pass.
static cl::opt< bool > UseCFLAA("use-cfl-aa-in-codegen", cl::init(false), cl::Hidden, cl::desc("Enable the new, experimental CFL alias analysis in CodeGen"))
char & BranchFolderPassID
BranchFolding - This pass performs machine code CFG based optimizations to delete branches to branche...
Primary interface to the complete machine description for the target machine.
char & ShrinkWrapID
ShrinkWrap pass. Look for the best place to insert save and restore.
StringRef - Represent a constant reference to a string, i.e.
PassRegistry - This class manages the registration and intitialization of the pass subsystem as appli...
static cl::opt< bool > DisableMachineLICM("disable-machine-licm", cl::Hidden, cl::desc("Disable Machine LICM"))
static cl::opt< bool > DisableTailDuplicate("disable-tail-duplicate", cl::Hidden, cl::desc("Disable tail duplication"))
bool usingDefaultRegAlloc() const
Return true if the default global register allocator is in use and has not be overriden on the comman...
static cl::opt< bool > DisableCGP("disable-cgp", cl::Hidden, cl::desc("Disable Codegen Prepare"))
char & LocalStackSlotAllocationID
LocalStackSlotAllocation - This pass assigns local frame indices to stack slots relative to one anoth...
bool requiresStructuredCFG() const
FunctionPass * createConstantHoistingPass()