32 #define DEBUG_TYPE "machine-ssaupdater"
41 : AV(nullptr), InsertedPHIs(NewPHI) {
77 return GetValueAtEndOfBlockInternal(BB);
82 SmallVectorImpl<std::pair<MachineBasicBlock*, unsigned> > &PredValues) {
91 for (
unsigned i = 0, e = PredValues.size(); i != e; ++i)
92 AVals[PredValues[i].first] = PredValues[i].second;
93 while (I != BB->
end() && I->isPHI()) {
95 for (
unsigned i = 1, e = I->getNumOperands(); i != e; i += 2) {
96 unsigned SrcReg = I->getOperand(i).getReg();
98 if (AVals[SrcBB] != SrcReg) {
104 return I->getOperand(0).getReg();
146 return GetValueAtEndOfBlockInternal(BB);
160 unsigned SingularValue = 0;
162 bool isFirstPred =
true;
164 E = BB->
pred_end(); PI != E; ++PI) {
166 unsigned PredVal = GetValueAtEndOfBlockInternal(PredBB);
167 PredValues.
push_back(std::make_pair(PredBB, PredVal));
171 SingularValue = PredVal;
173 }
else if (PredVal != SingularValue)
178 if (SingularValue != 0)
179 return SingularValue;
192 for (
unsigned i = 0, e = PredValues.
size(); i != e; ++i)
193 InsertedPHI.
addReg(PredValues[i].second).
addMBB(PredValues[i].first);
203 if (InsertedPHIs) InsertedPHIs->push_back(InsertedPHI);
205 DEBUG(
dbgs() <<
" Inserted PHI: " << *InsertedPHI <<
"\n");
225 if (UseMI->
isPHI()) {
227 NewVR = GetValueAtEndOfBlockInternal(SourceBB);
259 :
PHI(P), idx(
PHI->getNumOperands()) {}
262 bool operator==(
const PHI_iterator& x)
const {
return idx == x.idx; }
266 return PHI->getOperand(idx+1).getMBB();
271 return PHI_iterator(PHI,
true);
290 Updater->VRC, Updater->MRI,
301 Updater->VRC, Updater->MRI,
324 return InstrIsPHI(Updater->MRI->
getVRegDef(Val));
351 if (
unsigned V = AvailableVals[BB])
355 return Impl.GetValue(BB);
void push_back(const T &Elt)
const MachineFunction * getParent() const
getParent - Return the MachineFunction containing this basic block.
MachineInstr * getParent()
getParent - Return the instruction that this operand belongs to.
bool operator==(const PHI_iterator &x) const
MachineBasicBlock * getMBB() const
PHI_iterator & operator++()
unsigned createVirtualRegister(const TargetRegisterClass *RegClass)
createVirtualRegister - Create and return a new virtual register in the function with the specified r...
static MachineInstrBuilder InsertNewDef(unsigned Opcode, MachineBasicBlock *BB, MachineBasicBlock::iterator I, const TargetRegisterClass *RC, MachineRegisterInfo *MRI, const TargetInstrInfo *TII)
InsertNewDef - Insert an empty PHI or IMPLICIT_DEF instruction which define a value of the given regi...
iterator getFirstTerminator()
getFirstTerminator - returns an iterator to the first terminator instruction of this basic block...
static PHI_iterator PHI_begin(PhiT *PHI)
void RewriteUse(MachineOperand &U)
RewriteUse - Rewrite a use of the symbolic value.
static void FindPredecessorBlocks(MachineBasicBlock *BB, SmallVectorImpl< MachineBasicBlock * > *Preds)
FindPredecessorBlocks - Put the predecessors of BB into the Preds vector.
MachineSSAUpdater - This class updates SSA form for a set of virtual registers defined in multiple bl...
This file defines the MallocAllocator and BumpPtrAllocator interfaces.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
unsigned GetValueAtEndOfBlock(MachineBasicBlock *BB)
GetValueAtEndOfBlock - Construct SSA form, materializing a value that is live at the end of the speci...
const HexagonInstrInfo * TII
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
bool HasValueForBlock(MachineBasicBlock *BB) const
HasValueForBlock - Return true if the MachineSSAUpdater already has a value for the specified block...
void eraseFromParent()
Unlink 'this' from the containing basic block and delete it.
const TargetRegisterClass * getRegClass(unsigned Reg) const
getRegClass - Return the register class of the specified virtual register.
std::vector< MachineBasicBlock * >::iterator succ_iterator
PHI_iterator(MachineInstr *P, bool)
unsigned getNumOperands() const
Access to explicit operands of the instruction.
bool operator!=(const PHI_iterator &x) const
static MachineInstr * ValueIsNewPHI(unsigned Val, MachineSSAUpdater *Updater)
ValueIsNewPHI - Like ValueIsPHI but also check if the PHI has no source operands, i...
std::vector< MachineBasicBlock * >::iterator pred_iterator
void Initialize(unsigned V)
Initialize - Reset this object to get ready for a new set of SSA updates.
const MachineBasicBlock * getParent() const
TargetInstrInfo - Interface to description of machine instruction set.
IMPLICIT_DEF - This is the MachineInstr-level equivalent of undef.
bundle_iterator< MachineInstr, instr_iterator > iterator
const MachineOperand & getOperand(unsigned i) const
MachineInstrBuilder BuildMI(MachineFunction &MF, DebugLoc DL, const MCInstrDesc &MCID)
BuildMI - Builder interface.
succ_iterator succ_begin()
static BlkSucc_iterator BlkSucc_end(BlkT *BB)
pred_iterator pred_begin()
static void AddPHIOperand(MachineInstr *PHI, unsigned Val, MachineBasicBlock *Pred)
AddPHIOperand - Add the specified value as an operand of the PHI for the specified predecessor block...
const MCInstrDesc & get(unsigned Opcode) const
Return the machine instruction descriptor that corresponds to the specified instruction opcode...
static MachineBasicBlock * findCorrespondingPred(const MachineInstr *MI, MachineOperand *U)
static unsigned CreateEmptyPHI(MachineBasicBlock *BB, unsigned NumPreds, MachineSSAUpdater *Updater)
CreateEmptyPHI - Create a PHI instruction that defines a new register.
MachineOperand class - Representation of each machine instruction operand.
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small...
static MachineInstr * ValueIsPHI(unsigned Val, MachineSSAUpdater *Updater)
ValueIsPHI - Check if the instruction that defines the specified register is a PHI instruction...
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
size_type count(const KeyT &Val) const
Return 1 if the specified key is in the map, 0 otherwise.
MachineBasicBlock::succ_iterator BlkSucc_iterator
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
static PHI_iterator PHI_end(PhiT *PHI)
static unsigned LookForIdenticalPHI(MachineBasicBlock *BB, SmallVectorImpl< std::pair< MachineBasicBlock *, unsigned > > &PredValues)
Representation of each machine instruction.
static unsigned GetUndefVal(MachineBasicBlock *BB, MachineSSAUpdater *Updater)
GetUndefVal - Create an IMPLICIT_DEF instruction with a new register.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
void setReg(unsigned Reg)
Change the register this operand corresponds to.
unsigned GetValueInMiddleOfBlock(MachineBasicBlock *BB)
GetValueInMiddleOfBlock - Construct SSA form, materializing a value that is live in the middle of the...
void AddAvailableValue(MachineBasicBlock *BB, unsigned V)
AddAvailableValue - Indicate that a rewritten value is available at the end of the specified block wi...
MachineInstr * getVRegDef(unsigned Reg) const
getVRegDef - Return the machine instr that defines the specified virtual register or null if none is ...
DenseMap< MachineBasicBlock *, unsigned > AvailableValsTy
unsigned getReg() const
getReg - Returns the register number.
unsigned getIncomingValue()
unsigned isConstantValuePHI() const
If the specified instruction is a PHI that always merges together the same virtual register...
virtual const TargetInstrInfo * getInstrInfo() const
const MachineInstrBuilder & addMBB(MachineBasicBlock *MBB, unsigned char TargetFlags=0) const
static MachineInstr * InstrIsPHI(MachineInstr *I)
InstrIsPHI - Check if an instruction is a PHI.
MachineBasicBlock * getIncomingBlock()
static unsigned GetPHIValue(MachineInstr *PHI)
GetPHIValue - For the specified PHI instruction, return the register that it defines.
bool operator==(uint64_t V1, const APInt &V2)
static AvailableValsTy & getAvailableVals(void *AV)
static BlkSucc_iterator BlkSucc_begin(BlkT *BB)
const MachineInstrBuilder & addReg(unsigned RegNo, unsigned flags=0, unsigned SubReg=0) const
addReg - Add a new virtual register operand...
PHI_iterator(MachineInstr *P)
MachineSSAUpdater(MachineFunction &MF, SmallVectorImpl< MachineInstr * > *InsertedPHIs=nullptr)
MachineSSAUpdater constructor.