25 void MachineRegisterInfo::Delegate::anchor() {}
28 : MF(MF), TheDelegate(nullptr), IsSSA(
true), TracksLiveness(
true),
29 TracksSubRegLiveness(
false) {
30 VRegInfo.reserve(256);
31 RegAllocHints.reserve(256);
43 assert(RC && RC->
isAllocatable() &&
"Invalid RC for virtual register");
44 VRegInfo[
Reg].first = RC;
50 unsigned MinNumRegs) {
56 if (!NewRC || NewRC == OldRC)
82 if (!NewRC || NewRC == OldRC)
94 assert(RegClass &&
"Cannot create register without RegClass!");
96 "Virtual register RegClass must be allocatable.");
101 VRegInfo[
Reg].first = RegClass;
102 RegAllocHints.grow(Reg);
113 if (!VRegInfo[Reg].second)
130 <<
" use list MachineOperand " << MO
131 <<
" has no parent instruction.\n";
137 if (!(MO >= MO0 && MO < MO0+NumOps)) {
139 <<
" use list MachineOperand " << MO
140 <<
" doesn't belong to parent MI: " << *
MI;
145 <<
" MachineOperand " << MO <<
": " << *MO
146 <<
" is not a register\n";
151 <<
" use-list MachineOperand " << MO <<
": "
152 << *MO <<
" is the wrong register\n";
156 assert(Valid &&
"Invalid use list");
171 assert(!MO->isOnRegUseList() &&
"Already on list");
181 MO->Contents.
Reg.Prev = MO;
182 MO->Contents.
Reg.Next =
nullptr;
186 assert(MO->
getReg() == Head->getReg() &&
"Different regs on the same list!");
190 assert(Last &&
"Inconsistent use list");
191 assert(MO->
getReg() == Last->getReg() &&
"Different regs on the same list!");
192 Head->Contents.Reg.Prev = MO;
193 MO->Contents.
Reg.Prev = Last;
199 MO->Contents.
Reg.Next = Head;
203 MO->Contents.
Reg.Next =
nullptr;
204 Last->Contents.Reg.Next = MO;
210 assert(MO->isOnRegUseList() &&
"Operand not on use list");
213 assert(Head &&
"List already empty");
223 Prev->Contents.
Reg.Next = Next;
225 (Next ? Next : Head)->Contents.
Reg.Prev = Prev;
227 MO->Contents.
Reg.Prev =
nullptr;
228 MO->Contents.
Reg.Next =
nullptr;
241 assert(Src != Dst && NumOps &&
"Noop moveOperands");
245 if (Dst >= Src && Dst < Src + NumOps) {
260 assert(Head &&
"List empty, but operand is chained");
261 assert(Prev &&
"Operand was not on use-def list");
268 Prev->Contents.
Reg.Next = Dst;
272 (Next ? Next : Head)->Contents.
Reg.Prev = Dst;
286 assert(FromReg != ToReg &&
"Cannot replace a reg with itself");
309 "getVRegDef assumes a single definition or no definition");
310 return !I.
atEnd() ? &*I :
nullptr;
342 if (
I->first == Reg ||
I->second == Reg)
351 if (
I->second == VReg)
360 if (
I->first == PReg)
372 for (
unsigned i = 0, e = LiveIns.size(); i != e; ++i)
373 if (LiveIns[i].second) {
380 LiveIns.erase(LiveIns.begin() + i);
386 .addReg(LiveIns[i].first);
415 "Invalid ReservedRegs vector from target");
439 nextI = std::next(
I);
479 if (UsedPhysRegMask.
test(PhysReg))
bool isConstantPhysReg(unsigned PhysReg, const MachineFunction &MF) const
isConstantPhysReg - Returns true if PhysReg is unallocatable and constant throughout the function...
void resize(unsigned N, bool t=false)
resize - Grow or shrink the bitvector.
const MachineFunction * getParent() const
getParent - Return the MachineFunction containing this basic block.
void EmitLiveInCopies(MachineBasicBlock *EntryMBB, const TargetRegisterInfo &TRI, const TargetInstrInfo &TII)
EmitLiveInCopies - Emit copies to initialize livein virtual registers into the given entry block...
size_type size() const
size - Returns the number of bits in this bitvector.
raw_ostream & errs()
This returns a reference to a raw_ostream for standard error.
MachineInstr * getParent()
getParent - Return the instruction that this operand belongs to.
void removeRegOperandFromUseList(MachineOperand *MO)
Remove MO from its use-def list.
livein_iterator livein_end() const
static unsigned index2VirtReg(unsigned Index)
index2VirtReg - Convert a 0-based index to a virtual register number.
bool isPhysRegModified(unsigned PhysReg) const
Return true if the specified register is modified in this function.
unsigned createVirtualRegister(const TargetRegisterClass *RegClass)
createVirtualRegister - Create and return a new virtual register in the function with the specified r...
iterator_range< use_iterator > use_operands(unsigned Reg) const
static bool isVirtualRegister(unsigned Reg)
isVirtualRegister - Return true if the specified register number is in the virtual register namespace...
iterator_range< reg_iterator > reg_operands(unsigned Reg) const
void addLiveIn(unsigned Reg)
Adds the specified register as a live in.
const TargetRegisterClass * getCommonSubClass(const TargetRegisterClass *A, const TargetRegisterClass *B) const
getCommonSubClass - find the largest common subclass of A and B.
const Function * getFunction() const
getFunction - Return the LLVM function that this machine code represents
iterator_range< mop_iterator > operands()
void markUsesInDebugValueAsUndef(unsigned Reg) const
markUsesInDebugValueAsUndef - Mark every DBG_VALUE referencing the specified register as undefined wh...
static use_nodbg_iterator use_nodbg_end()
void clearVirtRegs()
clearVirtRegs - Remove all virtual registers (after physreg assignment).
const TargetRegisterClass * getRegClassConstraintEffect(unsigned OpIdx, const TargetRegisterClass *CurRC, const TargetInstrInfo *TII, const TargetRegisterInfo *TRI) const
Applies the constraints (def/use) implied by the OpIdx operand to the given CurRC.
unsigned getMaxLaneMaskForVReg(unsigned Reg) const
Returns a mask covering all bits that can appear in lane masks of subregisters of the virtual registe...
COPY - Target-independent register copy.
unsigned getNumVirtRegs() const
getNumVirtRegs - Return the number of virtual registers created.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
const HexagonInstrInfo * TII
const TargetRegisterInfo * getTargetRegisterInfo() const
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
use_instr_iterator use_instr_begin(unsigned RegNo) const
bool isReg() const
isReg - Tests if this is a MO_Register operand.
const TargetRegisterClass * getRegClass(unsigned Reg) const
getRegClass - Return the register class of the specified virtual register.
void freezeReservedRegs(const MachineFunction &)
freezeReservedRegs - Called by the register allocator to freeze the set of reserved registers before ...
Reg
All possible values of the reg field in the ModR/M byte.
Function must be in a unwind table.
unsigned getNumOperands() const
Access to explicit operands of the instruction.
defusechain_iterator - This class provides iterator support for machine operands in the function that...
PrintReg - Helper class for printing registers on a raw_ostream.
unsigned getNumRegs() const
Return the number of registers this target has (useful for sizing arrays holding per register informa...
bool isLiveIn(unsigned Reg) const
static def_instr_iterator def_instr_end()
bool atEnd() const
atEnd - return true if this iterator is equal to reg_end() on the value.
const TargetRegisterClass * constrainRegClass(unsigned Reg, const TargetRegisterClass *RC, unsigned MinNumRegs=0)
constrainRegClass - Constrain the register class of the specified virtual register to be a common sub...
const MachineBasicBlock * getParent() const
TargetInstrInfo - Interface to description of machine instruction set.
bool isDebugValue() const
const MachineOperand & getOperand(unsigned i) const
unsigned getLiveInVirtReg(unsigned PReg) const
getLiveInVirtReg - If PReg is a live-in physical register, return the corresponding live-in physical ...
MCRegAliasIterator enumerates all registers aliasing Reg.
void substPhysReg(unsigned Reg, const TargetRegisterInfo &)
substPhysReg - Substitute the current register with the physical register Reg, taking any existing Su...
Function doesn't unwind stack.
MachineInstrBuilder BuildMI(MachineFunction &MF, DebugLoc DL, const MCInstrDesc &MCID)
BuildMI - Builder interface.
Mark the function as not returning.
iterator_range< use_instr_iterator > use_instructions(unsigned Reg) const
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
struct llvm::MachineOperand::@33::@34 Reg
static const Function * getCalledFunction(const MachineInstr &MI)
const MCInstrDesc & get(unsigned Opcode) const
Return the machine instruction descriptor that corresponds to the specified instruction opcode...
iterator_range< T > make_range(T x, T y)
Convenience function for iterating over sub-ranges.
unsigned getLaneMask() const
Returns the combination of all lane masks of register in this class.
MachineOperand class - Representation of each machine instruction operand.
bool test(unsigned Idx) const
bool isAllocatable(unsigned PhysReg) const
isAllocatable - Returns true when PhysReg belongs to an allocatable register class and it hasn't been...
livein_iterator livein_begin() const
bool recomputeRegClass(unsigned Reg)
recomputeRegClass - Try to find a legal super-class of Reg's register class that still satisfies the ...
virtual BitVector getReservedRegs(const MachineFunction &MF) const =0
getReservedRegs - Returns a bitset indexed by physical register number indicating if a register is a ...
unsigned getNumRegs() const
getNumRegs - Return the number of registers in this class.
LLVM_ATTRIBUTE_UNUSED_RESULT std::enable_if< !is_simple_type< Y >::value, typename cast_retty< X, const Y >::ret_type >::type dyn_cast(const Y &Val)
MachineInstr * getUniqueVRegDef(unsigned Reg) const
getUniqueVRegDef - Return the unique machine instr that defines the specified virtual register or nul...
void replaceRegWith(unsigned FromReg, unsigned ToReg)
replaceRegWith - Replace all instances of FromReg with ToReg in the machine function.
def_iterator def_begin(unsigned RegNo) const
void verifyUseList(unsigned Reg) const
Verify the sanity of the use list for Reg.
Representation of each machine instruction.
static bool isPhysicalRegister(unsigned Reg)
isPhysicalRegister - Return true if the specified register number is in the physical register namespa...
bool hasFnAttribute(Attribute::AttrKind Kind) const
Return true if the function has the attribute.
def_instr_iterator def_instr_begin(unsigned RegNo) const
bool hasOneNonDBGUse(unsigned RegNo) const
hasOneNonDBGUse - Return true if there is exactly one non-Debug instruction using the specified regis...
void setReg(unsigned Reg)
Change the register this operand corresponds to.
bool isCall(QueryType Type=AnyInBundle) const
bool isAllocatable() const
isAllocatable - Return true if this register class may be used to create virtual registers.
void clearKillFlags(unsigned Reg) const
clearKillFlags - Iterate over all the uses of the given register and clear the kill flag from the Mac...
MachineInstr * getVRegDef(unsigned Reg) const
getVRegDef - Return the machine instr that defines the specified virtual register or null if none is ...
std::vector< std::pair< unsigned, unsigned > >::const_iterator livein_iterator
unsigned getReg() const
getReg - Returns the register number.
iterator_range< reg_nodbg_iterator > reg_nodbg_operands(unsigned Reg) const
void dumpUses(unsigned RegNo) const
static def_iterator def_end()
virtual const TargetInstrInfo * getInstrInfo() const
static bool isNoReturnDef(const MachineOperand &MO)
void moveOperands(MachineOperand *Dst, MachineOperand *Src, unsigned NumOps)
Move NumOps operands from Src to Dst, updating use-def lists as needed.
static use_instr_iterator use_instr_end()
bool def_empty(unsigned RegNo) const
def_empty - Return true if there are no instructions defining the specified register (it may be live-...
void setRegClass(unsigned Reg, const TargetRegisterClass *RC)
setRegClass - Set the register class of the specified virtual register.
reg_iterator reg_begin(unsigned RegNo) const
virtual void MRI_NoteNewVirtualRegister(unsigned Reg)=0
void verifyUseLists() const
Verify the use list of all registers.
static reg_iterator reg_end()
reg_begin/reg_end - Provide iteration support to walk over all definitions and uses of a register wit...
use_nodbg_iterator use_nodbg_begin(unsigned RegNo) const
virtual const TargetRegisterClass * getLargestLegalSuperClass(const TargetRegisterClass *RC, const MachineFunction &) const
getLargestLegalSuperClass - Returns the largest super class of RC that is legal to use in the current...
unsigned getLiveInPhysReg(unsigned VReg) const
getLiveInPhysReg - If VReg is a live-in virtual register, return the corresponding live-in physical r...
bool use_empty(unsigned RegNo) const
use_empty - Return true if there are no instructions using the specified register.
void addRegOperandToUseList(MachineOperand *MO)
Add MO to the linked list of operands for its register.