LLVM  3.7.0
HexagonRegisterInfo.h
Go to the documentation of this file.
1 //==- HexagonRegisterInfo.h - Hexagon Register Information Impl --*- C++ -*-==//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains the Hexagon implementation of the TargetRegisterInfo
11 // class.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONREGISTERINFO_H
16 #define LLVM_LIB_TARGET_HEXAGON_HEXAGONREGISTERINFO_H
17 
20 
21 #define GET_REGINFO_HEADER
22 #include "HexagonGenRegisterInfo.inc"
23 
24 //
25 // We try not to hard code the reserved registers in our code,
26 // so the following two macros were defined. However, there
27 // are still a few places that R11 and R10 are hard wired.
28 // See below. If, in the future, we decided to change the reserved
29 // register. Don't forget changing the following places.
30 //
31 // 1. the "Defs" set of STriw_pred in HexagonInstrInfo.td
32 // 2. the "Defs" set of LDri_pred in HexagonInstrInfo.td
33 // 3. the definition of "IntRegs" in HexagonRegisterInfo.td
34 // 4. the definition of "DoubleRegs" in HexagonRegisterInfo.td
35 //
36 #define HEXAGON_RESERVED_REG_1 Hexagon::R10
37 #define HEXAGON_RESERVED_REG_2 Hexagon::R11
38 
39 namespace llvm {
41 public:
43 
44  /// Code Generation virtual methods...
46  const override;
47 
48 
49  BitVector getReservedRegs(const MachineFunction &MF) const override;
50 
52  unsigned FIOperandNum, RegScavenger *RS = nullptr) const override;
53 
54  /// Returns true since we may need scavenging for a temporary register
55  /// when generating hardware loop instructions.
56  bool requiresRegisterScavenging(const MachineFunction &MF) const override {
57  return true;
58  }
59 
60  /// Returns true. Spill code for predicate registers might need an extra
61  /// register.
62  bool requiresFrameIndexScavenging(const MachineFunction &MF) const override {
63  return true;
64  }
65 
66  bool needsStackRealignment(const MachineFunction &MF) const override;
67 
68  /// Returns true if the frame pointer is valid.
69  bool useFPForScavengingIndex(const MachineFunction &MF) const override;
70 
71  bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override {
72  return true;
73  }
74 
75  // Debug information queries.
76  unsigned getRARegister() const;
77  unsigned getFrameRegister(const MachineFunction &MF) const override;
78  unsigned getFrameRegister() const;
79  unsigned getStackRegister() const;
80 
81  const MCPhysReg *getCallerSavedRegs(const MachineFunction *MF) const;
82 
83  unsigned getFirstCallerSavedNonParamReg() const;
84 
85  bool isEHReturnCalleeSaveReg(unsigned Reg) const;
86  bool isCalleeSaveReg(unsigned Reg) const;
87 };
88 
89 } // end namespace llvm
90 
91 #endif
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
Reg
All possible values of the reg field in the ModR/M byte.
void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override
const MCPhysReg * getCallerSavedRegs(const MachineFunction *MF) const
unsigned getFirstCallerSavedNonParamReg() const
bundle_iterator< MachineInstr, instr_iterator > iterator
bool isEHReturnCalleeSaveReg(unsigned Reg) const
bool requiresRegisterScavenging(const MachineFunction &MF) const override
Returns true since we may need scavenging for a temporary register when generating hardware loop inst...
bool useFPForScavengingIndex(const MachineFunction &MF) const override
Returns true if the frame pointer is valid.
bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override
bool needsStackRealignment(const MachineFunction &MF) const override
BitVector getReservedRegs(const MachineFunction &MF) const override
bool requiresFrameIndexScavenging(const MachineFunction &MF) const override
Returns true.
bool isCalleeSaveReg(unsigned Reg) const
const MCPhysReg * getCalleeSavedRegs(const MachineFunction *MF) const override
Code Generation virtual methods...