27 #define GET_INSTRINFO_CTOR_DTOR
28 #include "MSP430GenInstrInfo.inc"
31 void MSP430InstrInfo::anchor() {}
39 unsigned SrcReg,
bool isKill,
int FrameIdx,
43 if (MI != MBB.
end()) DL = MI->getDebugLoc();
53 if (RC == &MSP430::GR16RegClass)
54 BuildMI(MBB, MI, DL,
get(MSP430::MOV16mr))
57 else if (RC == &MSP430::GR8RegClass)
58 BuildMI(MBB, MI, DL,
get(MSP430::MOV8mr))
67 unsigned DestReg,
int FrameIdx,
71 if (MI != MBB.
end()) DL = MI->getDebugLoc();
81 if (RC == &MSP430::GR16RegClass)
82 BuildMI(MBB, MI, DL,
get(MSP430::MOV16rm))
84 else if (RC == &MSP430::GR8RegClass)
85 BuildMI(MBB, MI, DL,
get(MSP430::MOV8rm))
93 unsigned DestReg,
unsigned SrcReg,
96 if (MSP430::GR16RegClass.
contains(DestReg, SrcReg))
97 Opc = MSP430::MOV16rr;
98 else if (MSP430::GR8RegClass.
contains(DestReg, SrcReg))
103 BuildMI(MBB, I, DL,
get(Opc), DestReg)
111 while (I != MBB.
begin()) {
113 if (I->isDebugValue())
115 if (I->getOpcode() != MSP430::JMP &&
116 I->getOpcode() != MSP430::JCC &&
117 I->getOpcode() != MSP430::Br &&
118 I->getOpcode() != MSP430::Bm)
121 I->eraseFromParent();
131 assert(Cond.
size() == 1 &&
"Invalid Xbranch condition!");
176 bool AllowModify)
const {
180 while (I != MBB.
begin()) {
182 if (I->isDebugValue())
196 if (I->getOpcode() == MSP430::Br ||
197 I->getOpcode() == MSP430::Bm)
201 if (I->getOpcode() == MSP430::JMP) {
203 TBB = I->getOperand(0).getMBB();
208 while (std::next(I) != MBB.
end())
222 TBB = I->getOperand(0).getMBB();
227 assert(I->getOpcode() == MSP430::JCC &&
"Invalid conditional branch");
236 TBB = I->getOperand(0).getMBB();
243 assert(Cond.
size() == 1);
248 if (TBB != I->getOperand(0).getMBB())
253 if (OldBranchCode == BranchCode)
268 assert(TBB &&
"InsertBranch must not be told to insert a fallthrough");
269 assert((Cond.
size() == 1 || Cond.
size() == 0) &&
270 "MSP430 branch conditions have one component!");
274 assert(!FBB &&
"Unconditional branch with multiple successors!");
318 case MSP430::SAR8r1c:
319 case MSP430::SAR16r1c:
void push_back(const T &Elt)
The memory access reads data.
const MachineFunction * getParent() const
getParent - Return the MachineFunction containing this basic block.
The memory access writes data.
bool ReverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const override
bool isBranch(QueryType Type=AnyInBundle) const
Returns true if this is a conditional, unconditional, or indirect branch.
Describe properties that are true of each instruction in the target description file.
bool isPredicable(QueryType Type=AllInBundle) const
Return true if this instruction has a predicate operand that controls execution.
bool isUnpredicatedTerminator(const MachineInstr *MI) const override
const MCInstrDesc & getDesc() const
Returns the target instruction descriptor of this MachineInstr.
const char * getSymbolName() const
MachineMemOperand * getMachineMemOperand(MachinePointerInfo PtrInfo, unsigned f, uint64_t s, unsigned base_alignment, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr)
getMachineMemOperand - Allocate a new MachineMemOperand.
bool isTerminator(QueryType Type=AnyInBundle) const
Returns true if this instruction part of the terminator for a basic block.
void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, int FrameIdx, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override
static MachinePointerInfo getFixedStack(int FI, int64_t offset=0)
getFixedStack - Return a MachinePointerInfo record that refers to the the specified FrameIndex...
void eraseFromParent()
eraseFromParent - This method unlinks 'this' from the containing function and deletes it...
MachineMemOperand - A description of a memory reference used in the backend.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
const HexagonInstrInfo * TII
bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const override
const MCAsmInfo * getMCAsmInfo() const
Return target specific asm information.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted...
static bool contains(SmallPtrSetImpl< ConstantExpr * > &Cache, ConstantExpr *Expr, Constant *C)
const MachineInstrBuilder & addImm(int64_t Val) const
addImm - Add a new immediate operand.
bool LLVM_ATTRIBUTE_UNUSED_RESULT empty() const
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory)...
size_t size() const
size - Get the array size.
unsigned getKillRegState(bool B)
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
const MachineBasicBlock * getParent() const
TargetInstrInfo - Interface to description of machine instruction set.
DBG_VALUE - a mapping of the llvm.dbg.value intrinsic.
IMPLICIT_DEF - This is the MachineInstr-level equivalent of undef.
bundle_iterator< MachineInstr, instr_iterator > iterator
unsigned GetInstSizeInBytes(const MachineInstr *MI) const
GetInstSize - Return the number of bytes of code the specified instruction may be.
const MachineOperand & getOperand(unsigned i) const
void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override
bool empty() const
empty - Check if the array is empty.
MachineInstrBuilder BuildMI(MachineFunction &MF, DebugLoc DL, const MCInstrDesc &MCID)
BuildMI - Builder interface.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
unsigned getOpcode() const
Return the opcode number for this descriptor.
unsigned getObjectAlignment(int ObjectIdx) const
Return the alignment of the specified stack object.
MachineFrameInfo * getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
const MachineInstrBuilder & addFrameIndex(int Idx) const
MSP430InstrInfo(MSP430Subtarget &STI)
bool isPredicated(MCInstrInfo const &MCII, MCInst const &MCI)
KILL - This instruction is a noop that is used only to adjust the liveness of registers.
Representation of each machine instruction.
virtual unsigned getInlineAsmLength(const char *Str, const MCAsmInfo &MAI) const
Measure the specified inline asm to determine an approximation of its length.
unsigned RemoveBranch(MachineBasicBlock &MBB) const override
const MachineInstrBuilder & addMemOperand(MachineMemOperand *MMO) const
static MachineOperand CreateImm(int64_t Val)
const TargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, DebugLoc DL) const override
virtual const TargetInstrInfo * getInstrInfo() const
const MachineInstrBuilder & addMBB(MachineBasicBlock *MBB, unsigned char TargetFlags=0) const
bool isLayoutSuccessor(const MachineBasicBlock *MBB) const
isLayoutSuccessor - Return true if the specified MBB will be emitted immediately after this block...
const MachineInstrBuilder & addReg(unsigned RegNo, unsigned flags=0, unsigned SubReg=0) const
addReg - Add a new virtual register operand...
int64_t getObjectSize(int ObjectIdx) const
Return the size of the specified object.
void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const override
bool isBarrier(QueryType Type=AnyInBundle) const
Returns true if the specified instruction stops control flow from executing the instruction immediate...