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LLVM
3.7.0
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ScheduleDAGMILive is an implementation of ScheduleDAGInstrs that schedules machine instructions while updating LiveIntervals and tracking regpressure. More...
#include <MachineScheduler.h>
Public Member Functions | |
| ScheduleDAGMILive (MachineSchedContext *C, std::unique_ptr< MachineSchedStrategy > S) | |
| ~ScheduleDAGMILive () override | |
| bool | hasVRegLiveness () const override |
| Return true if this DAG supports VReg liveness and RegPressure. More... | |
| bool | isTrackingPressure () const |
| Return true if register pressure tracking is enabled. More... | |
| const IntervalPressure & | getTopPressure () const |
| Get current register pressure for the top scheduled instructions. More... | |
| const RegPressureTracker & | getTopRPTracker () const |
| const IntervalPressure & | getBotPressure () const |
| Get current register pressure for the bottom scheduled instructions. More... | |
| const RegPressureTracker & | getBotRPTracker () const |
| const IntervalPressure & | getRegPressure () const |
| Get register pressure for the entire scheduling region before scheduling. More... | |
| const std::vector < PressureChange > & | getRegionCriticalPSets () const |
| PressureDiff & | getPressureDiff (const SUnit *SU) |
| void | computeDFSResult () |
| Compute a DFSResult after DAG building is complete, and before any queue comparisons. More... | |
| const SchedDFSResult * | getDFSResult () const |
| Return a non-null DFS result if the scheduling strategy initialized it. More... | |
| BitVector & | getScheduledTrees () |
| void | enterRegion (MachineBasicBlock *bb, MachineBasicBlock::iterator begin, MachineBasicBlock::iterator end, unsigned regioninstrs) override |
| Implement the ScheduleDAGInstrs interface for handling the next scheduling region. More... | |
| void | schedule () override |
| Implement ScheduleDAGInstrs interface for scheduling a sequence of reorderable instructions. More... | |
| unsigned | computeCyclicCriticalPath () |
| Compute the cyclic critical path through the DAG. More... | |
Public Member Functions inherited from llvm::ScheduleDAGMI | |
| ScheduleDAGMI (MachineSchedContext *C, std::unique_ptr< MachineSchedStrategy > S, bool IsPostRA) | |
| ~ScheduleDAGMI () override | |
| void | addMutation (std::unique_ptr< ScheduleDAGMutation > Mutation) |
| Add a postprocessing step to the DAG builder. More... | |
| bool | canAddEdge (SUnit *SuccSU, SUnit *PredSU) |
| True if an edge can be added from PredSU to SuccSU without creating a cycle. More... | |
| bool | addEdge (SUnit *SuccSU, const SDep &PredDep) |
| Add a DAG edge to the given SU with the given predecessor dependence data. More... | |
| MachineBasicBlock::iterator | top () const |
| MachineBasicBlock::iterator | bottom () const |
| void | moveInstruction (MachineInstr *MI, MachineBasicBlock::iterator InsertPos) |
| Change the position of an instruction within the basic block and update live ranges and region boundary iterators. More... | |
| const SUnit * | getNextClusterPred () const |
| const SUnit * | getNextClusterSucc () const |
| void | viewGraph (const Twine &Name, const Twine &Title) override |
| viewGraph - Pop up a ghostview window with the reachable parts of the DAG rendered using 'dot'. More... | |
| void | viewGraph () override |
| Out-of-line implementation with no arguments is handy for gdb. More... | |
Public Member Functions inherited from llvm::ScheduleDAGInstrs | |
| ScheduleDAGInstrs (MachineFunction &mf, const MachineLoopInfo *mli, bool IsPostRAFlag, bool RemoveKillFlags=false, LiveIntervals *LIS=nullptr) | |
| ~ScheduleDAGInstrs () override | |
| bool | isPostRA () const |
| LiveIntervals * | getLIS () const |
| Expose LiveIntervals for use in DAG mutators and such. More... | |
| const TargetSchedModel * | getSchedModel () const |
| Get the machine model for instruction scheduling. More... | |
| const MCSchedClassDesc * | getSchedClass (SUnit *SU) const |
| Resolve and cache a resolved scheduling class for an SUnit. More... | |
| MachineBasicBlock::iterator | begin () const |
| begin - Return an iterator to the top of the current scheduling region. More... | |
| MachineBasicBlock::iterator | end () const |
| end - Return an iterator to the bottom of the current scheduling region. More... | |
| SUnit * | newSUnit (MachineInstr *MI) |
| newSUnit - Creates a new SUnit and return a ptr to it. More... | |
| SUnit * | getSUnit (MachineInstr *MI) const |
| getSUnit - Return an existing SUnit for this MI, or NULL. More... | |
| virtual void | startBlock (MachineBasicBlock *BB) |
| startBlock - Prepare to perform scheduling in the given block. More... | |
| virtual void | finishBlock () |
| finishBlock - Clean up after scheduling in the given block. More... | |
| virtual void | exitRegion () |
| Notify that the scheduler has finished scheduling the current region. More... | |
| void | buildSchedGraph (AliasAnalysis *AA, RegPressureTracker *RPTracker=nullptr, PressureDiffs *PDiffs=nullptr) |
| buildSchedGraph - Build SUnits from the MachineBasicBlock that we are input. More... | |
| void | addSchedBarrierDeps () |
| addSchedBarrierDeps - Add dependencies from instructions in the current list of instructions being scheduled to scheduling barrier. More... | |
| virtual void | finalizeSchedule () |
| finalizeSchedule - Allow targets to perform final scheduling actions at the level of the whole MachineFunction. More... | |
| void | dumpNode (const SUnit *SU) const override |
| std::string | getGraphNodeLabel (const SUnit *SU) const override |
| Return a label for a DAG node that points to an instruction. More... | |
| std::string | getDAGName () const override |
| Return a label for the region of code covered by the DAG. More... | |
| void | fixupKills (MachineBasicBlock *MBB) |
| Fix register kill flags that scheduling has made invalid. More... | |
Public Member Functions inherited from llvm::ScheduleDAG | |
| ScheduleDAG (MachineFunction &mf) | |
| virtual | ~ScheduleDAG () |
| void | clearDAG () |
| clearDAG - clear the DAG state (between regions). More... | |
| const MCInstrDesc * | getInstrDesc (const SUnit *SU) const |
| getInstrDesc - Return the MCInstrDesc of this SUnit. More... | |
| virtual void | addCustomGraphFeatures (GraphWriter< ScheduleDAG * > &) const |
| addCustomGraphFeatures - Add custom features for a visualization of the ScheduleDAG. More... | |
| unsigned | VerifyScheduledDAG (bool isBottomUp) |
| VerifyScheduledDAG - Verify that all SUnits were scheduled and that their state is consistent. More... | |
Protected Member Functions | |
| void | buildDAGWithRegPressure () |
| Call ScheduleDAGInstrs::buildSchedGraph with register pressure tracking enabled. More... | |
| void | scheduleMI (SUnit *SU, bool IsTopNode) |
| Move an instruction and update register pressure. More... | |
| void | initRegPressure () |
| void | updatePressureDiffs (ArrayRef< unsigned > LiveUses) |
| Update the PressureDiff array for liveness after scheduling this instruction. More... | |
| void | updateScheduledPressure (const SUnit *SU, const std::vector< unsigned > &NewMaxPressure) |
Protected Member Functions inherited from llvm::ScheduleDAGMI | |
| void | postprocessDAG () |
| Apply each ScheduleDAGMutation step in order. More... | |
| void | initQueues (ArrayRef< SUnit * > TopRoots, ArrayRef< SUnit * > BotRoots) |
| Release ExitSU predecessors and setup scheduler queues. More... | |
| void | updateQueues (SUnit *SU, bool IsTopNode) |
| Update scheduler DAG and queues after scheduling an instruction. More... | |
| void | placeDebugValues () |
| Reinsert debug_values recorded in ScheduleDAGInstrs::DbgValues. More... | |
| void | dumpSchedule () const |
| dump the scheduled Sequence. More... | |
| bool | checkSchedLimit () |
| void | findRootsAndBiasEdges (SmallVectorImpl< SUnit * > &TopRoots, SmallVectorImpl< SUnit * > &BotRoots) |
| void | releaseSucc (SUnit *SU, SDep *SuccEdge) |
| ReleaseSucc - Decrement the NumPredsLeft count of a successor. More... | |
| void | releaseSuccessors (SUnit *SU) |
| releaseSuccessors - Call releaseSucc on each of SU's successors. More... | |
| void | releasePred (SUnit *SU, SDep *PredEdge) |
| ReleasePred - Decrement the NumSuccsLeft count of a predecessor. More... | |
| void | releasePredecessors (SUnit *SU) |
| releasePredecessors - Call releasePred on each of SU's predecessors. More... | |
Protected Member Functions inherited from llvm::ScheduleDAGInstrs | |
| void | initSUnits () |
| Create an SUnit for each real instruction, numbered in top-down toplological order. More... | |
| void | addPhysRegDataDeps (SUnit *SU, unsigned OperIdx) |
| MO is an operand of SU's instruction that defines a physical register. More... | |
| void | addPhysRegDeps (SUnit *SU, unsigned OperIdx) |
| addPhysRegDeps - Add register dependencies (data, anti, and output) from this SUnit to following instructions in the same scheduling region that depend the physical register referenced at OperIdx. More... | |
| void | addVRegDefDeps (SUnit *SU, unsigned OperIdx) |
| addVRegDefDeps - Add register output and data dependencies from this SUnit to instructions that occur later in the same scheduling region if they read from or write to the virtual register defined at OperIdx. More... | |
| void | addVRegUseDeps (SUnit *SU, unsigned OperIdx) |
| addVRegUseDeps - Add a register data dependency if the instruction that defines the virtual register used at OperIdx is mapped to an SUnit. More... | |
| void | startBlockForKills (MachineBasicBlock *BB) |
| PostRA helper for rewriting kill flags. More... | |
| bool | toggleKillFlag (MachineInstr *MI, MachineOperand &MO) |
| Toggle a register operand kill flag. More... | |
Protected Attributes | |
| RegisterClassInfo * | RegClassInfo |
| SchedDFSResult * | DFSResult |
| Information about DAG subtrees. More... | |
| BitVector | ScheduledTrees |
| MachineBasicBlock::iterator | LiveRegionEnd |
| PressureDiffs | SUPressureDiffs |
| bool | ShouldTrackPressure |
| Register pressure in this region computed by initRegPressure. More... | |
| IntervalPressure | RegPressure |
| RegPressureTracker | RPTracker |
| std::vector< PressureChange > | RegionCriticalPSets |
| List of pressure sets that exceed the target's pressure limit before scheduling, listed in increasing set ID order. More... | |
| IntervalPressure | TopPressure |
| The top of the unscheduled zone. More... | |
| RegPressureTracker | TopRPTracker |
| IntervalPressure | BotPressure |
| The bottom of the unscheduled zone. More... | |
| RegPressureTracker | BotRPTracker |
Protected Attributes inherited from llvm::ScheduleDAGMI | |
| AliasAnalysis * | AA |
| std::unique_ptr < MachineSchedStrategy > | SchedImpl |
| ScheduleDAGTopologicalSort | Topo |
| Topo - A topological ordering for SUnits which permits fast IsReachable and similar queries. More... | |
| std::vector< std::unique_ptr < ScheduleDAGMutation > > | Mutations |
| Ordered list of DAG postprocessing steps. More... | |
| MachineBasicBlock::iterator | CurrentTop |
| The top of the unscheduled zone. More... | |
| MachineBasicBlock::iterator | CurrentBottom |
| The bottom of the unscheduled zone. More... | |
| const SUnit * | NextClusterPred |
| Record the next node in a scheduled cluster. More... | |
| const SUnit * | NextClusterSucc |
| unsigned | NumInstrsScheduled |
| The number of instructions scheduled so far. More... | |
Protected Attributes inherited from llvm::ScheduleDAGInstrs | |
| const MachineLoopInfo * | MLI |
| const MachineFrameInfo * | MFI |
| LiveIntervals * | LIS |
| Live Intervals provides reaching defs in preRA scheduling. More... | |
| TargetSchedModel | SchedModel |
| TargetSchedModel provides an interface to the machine model. More... | |
| bool | IsPostRA |
| isPostRA flag indicates vregs cannot be present. More... | |
| bool | RemoveKillFlags |
| True if the DAG builder should remove kill flags (in preparation for rescheduling). More... | |
| bool | CanHandleTerminators |
| The standard DAG builder does not normally include terminators as DAG nodes because it does not create the necessary dependencies to prevent reordering. More... | |
| MachineBasicBlock * | BB |
| State specific to the current scheduling region. More... | |
| MachineBasicBlock::iterator | RegionBegin |
| The beginning of the range to be scheduled. More... | |
| MachineBasicBlock::iterator | RegionEnd |
| The end of the range to be scheduled. More... | |
| unsigned | NumRegionInstrs |
| Instructions in this region (distance(RegionBegin, RegionEnd)). More... | |
| DenseMap< MachineInstr *, SUnit * > | MISUnitMap |
| After calling BuildSchedGraph, each machine instruction in the current scheduling region is mapped to an SUnit. More... | |
| VReg2UseMap | VRegUses |
| After calling BuildSchedGraph, each vreg used in the scheduling region is mapped to a set of SUnits. More... | |
| Reg2SUnitsMap | Defs |
| State internal to DAG building. More... | |
| Reg2SUnitsMap | Uses |
| VReg2SUnitMap | VRegDefs |
| Track the last instruction in this region defining each virtual register. More... | |
| std::vector< SUnit * > | PendingLoads |
| PendingLoads - Remember where unknown loads are after the most recent unknown store, as we iterate. More... | |
| DbgValueVector | DbgValues |
| MachineInstr * | FirstDbgValue |
| BitVector | LiveRegs |
| Set of live physical registers for updating kill flags. More... | |
Additional Inherited Members | |
Public Attributes inherited from llvm::ScheduleDAG | |
| const TargetMachine & | TM |
| const TargetInstrInfo * | TII |
| const TargetRegisterInfo * | TRI |
| MachineFunction & | MF |
| MachineRegisterInfo & | MRI |
| std::vector< SUnit > | SUnits |
| SUnit | EntrySU |
| SUnit | ExitSU |
| bool | StressSched |
Protected Types inherited from llvm::ScheduleDAGInstrs | |
| typedef std::vector< std::pair < MachineInstr *, MachineInstr * > > | DbgValueVector |
| DbgValues - Remember instruction that precedes DBG_VALUE. More... | |
ScheduleDAGMILive is an implementation of ScheduleDAGInstrs that schedules machine instructions while updating LiveIntervals and tracking regpressure.
Definition at line 346 of file MachineScheduler.h.
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Definition at line 381 of file MachineScheduler.h.
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Definition at line 840 of file MachineScheduler.cpp.
References DFSResult.
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Call ScheduleDAGInstrs::buildSchedGraph with register pressure tracking enabled.
Build the DAG and setup three register pressure trackers.
This sets up three trackers. RPTracker will cover the entire DAG region, TopTracker and BottomTracker will be initialized to the top and bottom of the DAG region without covereing any unscheduled instruction.
Definition at line 1067 of file MachineScheduler.cpp.
References llvm::ScheduleDAGInstrs::BB, llvm::ScheduleDAGInstrs::buildSchedGraph(), llvm::RegPressureTracker::init(), initRegPressure(), LiveRegionEnd, llvm::RegPressureTracker::recede(), RegClassInfo, RegionCriticalPSets, llvm::ScheduleDAGInstrs::RegionEnd, llvm::RegPressureTracker::reset(), RPTracker, ShouldTrackPressure, and SUPressureDiffs.
Referenced by llvm::VLIWMachineScheduler::schedule(), and schedule().
| unsigned ScheduleDAGMILive::computeCyclicCriticalPath | ( | ) |
Compute the cyclic critical path through the DAG.
Compute the max cyclic critical path through the DAG.
The scheduling DAG only provides the critical path for single block loops. To handle loops that span blocks, we could use the vreg path latencies provided by MachineTraceMetrics instead. However, MachineTraceMetrics is not currently available for use in the scheduler.
The cyclic path estimation identifies a def-use pair that crosses the back edge and considers the depth and height of the nodes. For example, consider the following instruction sequence where each instruction has unit latency and defines an epomymous virtual register:
a->b(a,c)->c(b)->d(c)->exit
The cyclic critical path is a two cycles: b->c->b The acyclic critical path is four cycles: a->b->c->d->exit LiveOutHeight = height(c) = len(c->d->exit) = 2 LiveOutDepth = depth(c) + 1 = len(a->b->c) + 1 = 3 LiveInHeight = height(b) + 1 = len(b->c->d->exit) + 1 = 4 LiveInDepth = depth(b) = len(a->b) = 1
LiveOutDepth - LiveInDepth = 3 - 1 = 2 LiveInHeight - LiveOutHeight = 4 - 2 = 2 CyclicCriticalPath = min(2, 2) = 2
This could be relevant to PostRA scheduling, but is currently implemented assuming LiveIntervals.
Definition at line 1126 of file MachineScheduler.cpp.
References llvm::ScheduleDAGInstrs::BB, llvm::ArrayRef< T >::begin(), llvm::dbgs(), DEBUG, llvm::VNInfo::def, llvm::ArrayRef< T >::end(), llvm::SparseMultiSet< ValueT, KeyFunctorT, SparseT >::end(), llvm::ScheduleDAG::ExitSU, llvm::SparseMultiSet< ValueT, KeyFunctorT, SparseT >::find(), llvm::SUnit::getDepth(), llvm::SUnit::getHeight(), llvm::RegPressureTracker::getPressure(), llvm::ScheduleDAGInstrs::getSUnit(), llvm::LiveRange::getVNInfoBefore(), llvm::VNInfo::isPHIDef(), llvm::MachineBasicBlock::isSuccessor(), llvm::TargetRegisterInfo::isVirtualRegister(), llvm::SUnit::Latency, llvm::RegisterPressure::LiveOutRegs, llvm::SUnit::NodeNum, llvm::LiveRange::Query(), RPTracker, llvm::ScheduleDAG::TRI, llvm::LiveQueryResult::valueIn(), and llvm::ScheduleDAGInstrs::VRegUses.
| void ScheduleDAGMILive::computeDFSResult | ( | ) |
Compute a DFSResult after DAG building is complete, and before any queue comparisons.
Definition at line 1090 of file MachineScheduler.cpp.
References llvm::SchedDFSResult::clear(), llvm::BitVector::clear(), llvm::SchedDFSResult::compute(), DFSResult, llvm::SchedDFSResult::getNumSubtrees(), MinSubtreeSize, llvm::SchedDFSResult::resize(), llvm::BitVector::resize(), ScheduledTrees, and llvm::ScheduleDAG::SUnits.
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Implement the ScheduleDAGInstrs interface for handling the next scheduling region.
enterRegion - Called back from MachineScheduler::runOnMachineFunction after crossing a scheduling boundary.
This covers all instructions in a block, while schedule() may only cover a subset.
[begin, end) includes all instructions in the region, including the boundary itself and single-instruction regions that don't get scheduled.
Reimplemented from llvm::ScheduleDAGMI.
Definition at line 848 of file MachineScheduler.cpp.
References llvm::PressureDiffs::clear(), llvm::MachineBasicBlock::end(), llvm::ScheduleDAGMI::enterRegion(), LiveRegionEnd, llvm::ScheduleDAGInstrs::RegionEnd, llvm::ScheduleDAGMI::SchedImpl, ShouldTrackPressure, and SUPressureDiffs.
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Get current register pressure for the bottom scheduled instructions.
Definition at line 401 of file MachineScheduler.h.
References BotPressure.
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Definition at line 402 of file MachineScheduler.h.
References BotRPTracker.
Referenced by llvm::ConvergingVLIWScheduler::pickNode(), and llvm::ConvergingVLIWScheduler::pickNodeBidrectional().
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Return a non-null DFS result if the scheduling strategy initialized it.
Definition at line 420 of file MachineScheduler.h.
References DFSResult.
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Definition at line 411 of file MachineScheduler.h.
References llvm::SUnit::NodeNum, and SUPressureDiffs.
Referenced by updatePressureDiffs(), and updateScheduledPressure().
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Definition at line 407 of file MachineScheduler.h.
References RegionCriticalPSets.
Referenced by llvm::ConvergingVLIWScheduler::pickNodeFromQueue().
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Get register pressure for the entire scheduling region before scheduling.
Definition at line 405 of file MachineScheduler.h.
References RegPressure.
Referenced by llvm::ConvergingVLIWScheduler::pickNodeFromQueue().
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Definition at line 422 of file MachineScheduler.h.
References ScheduledTrees.
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Get current register pressure for the top scheduled instructions.
Definition at line 397 of file MachineScheduler.h.
References TopPressure.
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Definition at line 398 of file MachineScheduler.h.
References TopRPTracker.
Referenced by llvm::ConvergingVLIWScheduler::pickNode(), and llvm::ConvergingVLIWScheduler::pickNodeBidrectional().
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Return true if this DAG supports VReg liveness and RegPressure.
Reimplemented from llvm::ScheduleDAGMI.
Definition at line 391 of file MachineScheduler.h.
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Definition at line 866 of file MachineScheduler.cpp.
References llvm::RegPressureTracker::addLiveRegs(), llvm::ScheduleDAGInstrs::BB, BotRPTracker, llvm::RegPressureTracker::closeBottom(), llvm::RegPressureTracker::closeRegion(), llvm::RegPressureTracker::closeTop(), llvm::dbgs(), DEBUG, llvm::RegPressureTracker::dump(), llvm::dumpRegSetPressure(), llvm::ArrayRef< T >::empty(), llvm::RegPressureTracker::getLiveThru(), llvm::RegPressureTracker::getPos(), llvm::RegPressureTracker::getPressure(), llvm::RegisterClassInfo::getRegPressureSetLimit(), llvm::TargetRegisterInfo::getRegPressureSetName(), llvm::RegPressureTracker::init(), llvm::RegPressureTracker::initLiveThru(), llvm::RegisterPressure::LiveInRegs, llvm::RegisterPressure::LiveOutRegs, LiveRegionEnd, llvm::RegisterPressure::MaxSetPressure, llvm::RegPressureTracker::recede(), RegClassInfo, llvm::ScheduleDAGInstrs::RegionBegin, RegionCriticalPSets, llvm::ScheduleDAGInstrs::RegionEnd, RPTracker, TopRPTracker, llvm::ScheduleDAG::TRI, and updatePressureDiffs().
Referenced by buildDAGWithRegPressure().
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Return true if register pressure tracking is enabled.
Definition at line 394 of file MachineScheduler.h.
References ShouldTrackPressure.
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Implement ScheduleDAGInstrs interface for scheduling a sequence of reorderable instructions.
schedule - Called back from MachineScheduler::runOnMachineFunction after setting up the current scheduling region.
[RegionBegin, RegionEnd) only includes instructions that have DAG nodes, not scheduling boundaries.
This is a skeletal driver, with all the functionality pushed into helpers, so that it can be easilly extended by experimental schedulers. Generally, implementing MachineSchedStrategy should be sufficient to implement a new scheduling algorithm. However, if a scheduler further subclasses ScheduleDAGMILive then it will want to override this virtual method in order to update any specialized state.
Reimplemented from llvm::ScheduleDAGMI.
Reimplemented in llvm::VLIWMachineScheduler.
Definition at line 1006 of file MachineScheduler.cpp.
References llvm::ScheduleDAGInstrs::begin(), buildDAGWithRegPressure(), llvm::ScheduleDAGMI::checkSchedLimit(), llvm::ScheduleDAGMI::CurrentBottom, llvm::ScheduleDAGMI::CurrentTop, llvm::dbgs(), DEBUG, DFSResult, llvm::ScheduleDAGMI::dumpSchedule(), llvm::ScheduleDAGMI::findRootsAndBiasEdges(), llvm::RegPressureTracker::getPos(), llvm::SchedDFSResult::getSubtreeID(), llvm::ScheduleDAGTopologicalSort::InitDAGTopologicalSorting(), llvm::ScheduleDAGMI::initQueues(), llvm::ScheduleDAGMI::placeDebugValues(), llvm::ScheduleDAGMI::postprocessDAG(), llvm::ScheduleDAGInstrs::RegionBegin, llvm::ScheduleDAGMI::SchedImpl, ScheduledTrees, scheduleMI(), llvm::SchedDFSResult::scheduleTree(), llvm::BitVector::set(), llvm::RegPressureTracker::setPos(), ShouldTrackPressure, llvm::ScheduleDAG::SUnits, llvm::BitVector::test(), llvm::ScheduleDAGMI::Topo, TopRPTracker, llvm::ScheduleDAGMI::updateQueues(), llvm::ScheduleDAGMI::viewGraph(), and ViewMISchedDAGs.
Move an instruction and update register pressure.
Definition at line 1189 of file MachineScheduler.cpp.
References llvm::RegPressureTracker::advance(), BotRPTracker, llvm::ScheduleDAGMI::CurrentBottom, llvm::ScheduleDAGMI::CurrentTop, llvm::SUnit::getInstr(), llvm::RegPressureTracker::getPos(), llvm::RegPressureTracker::getPressure(), llvm::SUnit::isBottomReady(), llvm::SUnit::isTopReady(), llvm::RegisterPressure::MaxSetPressure, llvm::AArch64CC::MI, llvm::ScheduleDAGMI::moveInstruction(), nextIfDebug(), priorNonDebug(), llvm::RegPressureTracker::recede(), llvm::RegPressureTracker::setPos(), ShouldTrackPressure, TopRPTracker, updatePressureDiffs(), and updateScheduledPressure().
Referenced by llvm::VLIWMachineScheduler::schedule(), and schedule().
Update the PressureDiff array for liveness after scheduling this instruction.
FIXME: Currently assuming single-use physregs.
Definition at line 955 of file MachineScheduler.cpp.
References llvm::PressureDiff::addPressureChange(), llvm::ScheduleDAGInstrs::BB, BotRPTracker, llvm::dbgs(), DEBUG, llvm::MachineBasicBlock::end(), llvm::SparseMultiSet< ValueT, KeyFunctorT, SparseT >::end(), llvm::ScheduleDAG::ExitSU, llvm::SparseMultiSet< ValueT, KeyFunctorT, SparseT >::find(), llvm::SUnit::getInstr(), llvm::RegPressureTracker::getPos(), getPressureDiff(), llvm::LiveRange::getVNInfoBefore(), llvm::SUnit::isScheduled, llvm::TargetRegisterInfo::isVirtualRegister(), llvm::ScheduleDAG::MRI, nextIfDebug(), llvm::SUnit::NodeNum, llvm::LiveRange::Query(), llvm::ArrayRef< T >::size(), llvm::ScheduleDAG::TRI, llvm::LiveQueryResult::valueIn(), and llvm::ScheduleDAGInstrs::VRegUses.
Referenced by initRegPressure(), and scheduleMI().
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Definition at line 927 of file MachineScheduler.cpp.
References llvm::PressureDiff::begin(), BotRPTracker, llvm::dbgs(), DEBUG, llvm::PressureDiff::end(), llvm::RegPressureTracker::getLiveThru(), getPressureDiff(), llvm::RegisterClassInfo::getRegPressureSetLimit(), llvm::TargetRegisterInfo::getRegPressureSetName(), I, RegClassInfo, RegionCriticalPSets, and llvm::ScheduleDAG::TRI.
Referenced by scheduleMI().
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The bottom of the unscheduled zone.
Definition at line 377 of file MachineScheduler.h.
Referenced by getBotPressure().
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Definition at line 378 of file MachineScheduler.h.
Referenced by getBotRPTracker(), initRegPressure(), scheduleMI(), updatePressureDiffs(), and updateScheduledPressure().
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Information about DAG subtrees.
If DFSResult is NULL, then SchedulerTrees will be empty.
Definition at line 352 of file MachineScheduler.h.
Referenced by computeDFSResult(), getDFSResult(), schedule(), and ~ScheduleDAGMILive().
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Definition at line 355 of file MachineScheduler.h.
Referenced by buildDAGWithRegPressure(), enterRegion(), and initRegPressure().
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Definition at line 348 of file MachineScheduler.h.
Referenced by buildDAGWithRegPressure(), initRegPressure(), and updateScheduledPressure().
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List of pressure sets that exceed the target's pressure limit before scheduling, listed in increasing set ID order.
Each pressure set is paired with its max pressure in the currently scheduled regions.
Definition at line 370 of file MachineScheduler.h.
Referenced by buildDAGWithRegPressure(), getRegionCriticalPSets(), initRegPressure(), and updateScheduledPressure().
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Definition at line 364 of file MachineScheduler.h.
Referenced by getRegPressure().
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Definition at line 365 of file MachineScheduler.h.
Referenced by buildDAGWithRegPressure(), computeCyclicCriticalPath(), and initRegPressure().
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Definition at line 353 of file MachineScheduler.h.
Referenced by computeDFSResult(), getScheduledTrees(), and schedule().
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Register pressure in this region computed by initRegPressure.
Definition at line 363 of file MachineScheduler.h.
Referenced by buildDAGWithRegPressure(), enterRegion(), isTrackingPressure(), schedule(), and scheduleMI().
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Definition at line 360 of file MachineScheduler.h.
Referenced by buildDAGWithRegPressure(), enterRegion(), and getPressureDiff().
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The top of the unscheduled zone.
Definition at line 373 of file MachineScheduler.h.
Referenced by getTopPressure().
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Definition at line 374 of file MachineScheduler.h.
Referenced by getTopRPTracker(), initRegPressure(), schedule(), and scheduleMI().
1.8.6