73 #define DEBUG_TYPE "isel"
75 STATISTIC(NumFastIselSuccessIndependent,
"Number of insts selected by "
76 "target-independent selector");
77 STATISTIC(NumFastIselSuccessTarget,
"Number of insts selected by "
78 "target-specific selector");
79 STATISTIC(NumFastIselDead,
"Number of dead insts removed on failure");
128 void FastISel::flushLocalValueMap() {
142 if (
const auto *Cast = dyn_cast<CastInst>(I))
155 if (
const auto *
GEP = dyn_cast<GetElementPtrInst>(I))
162 !(I->
getOpcode() == Instruction::BitCast ||
163 I->
getOpcode() == Instruction::PtrToInt ||
164 I->
getOpcode() == Instruction::IntToPtr) &&
193 if (isa<Instruction>(V) &&
194 (!isa<AllocaInst>(V) ||
202 Reg = materializeRegForValue(V, VT);
209 unsigned FastISel::materializeConstant(
const Value *V,
MVT VT) {
211 if (
const auto *CI = dyn_cast<ConstantInt>(V)) {
212 if (CI->getValue().getActiveBits() <= 64)
214 }
else if (isa<AllocaInst>(V))
216 else if (isa<ConstantPointerNull>(V))
221 else if (
const auto *CF = dyn_cast<ConstantFP>(V)) {
222 if (CF->isNullValue())
230 const APFloat &Flt = CF->getValueAPF();
241 unsigned IntegerReg =
248 }
else if (
const auto *Op = dyn_cast<Operator>(V)) {
250 if (!isa<Instruction>(Op) ||
254 }
else if (isa<UndefValue>(V)) {
265 unsigned FastISel::materializeRegForValue(
const Value *V,
MVT VT) {
268 if (isa<Constant>(V))
274 Reg = materializeConstant(V, VT);
297 if (!isa<Instruction>(I)) {
303 if (AssignedReg == 0)
306 else if (Reg != AssignedReg) {
308 for (
unsigned i = 0; i < NumRegs; i++)
319 return std::pair<unsigned, bool>(0,
false);
326 if (IdxVT.
bitsLT(PtrVT)) {
330 }
else if (IdxVT.
bitsGT(PtrVT)) {
335 return std::pair<unsigned, bool>(IdxN, IdxNIsKill);
354 assert(I && E && std::distance(I, E) > 0 &&
"Invalid iterator!");
404 if (
const auto *CI = dyn_cast<ConstantInt>(I->
getOperand(0)))
405 if (isa<Instruction>(I) && cast<Instruction>(
I)->isCommutative()) {
428 if (
const auto *CI = dyn_cast<ConstantInt>(I->
getOperand(1))) {
429 uint64_t Imm = CI->getSExtValue();
432 if (ISDOpcode ==
ISD::SDIV && isa<BinaryOperator>(I) &&
439 if (ISDOpcode ==
ISD::UREM && isa<BinaryOperator>(I) &&
456 if (
const auto *CF = dyn_cast<ConstantFP>(I->
getOperand(1))) {
458 ISDOpcode, Op0, Op0IsKill, CF);
473 ISDOpcode, Op0, Op0IsKill, Op1, Op1IsKill);
492 uint64_t TotalOffs = 0;
494 uint64_t MaxOffs = 2048;
500 const Value *Idx = *OI;
501 if (
auto *StTy = dyn_cast<StructType>(Ty)) {
502 uint64_t
Field = cast<ConstantInt>(Idx)->getZExtValue();
506 if (TotalOffs >= MaxOffs) {
514 Ty = StTy->getElementType(Field);
516 Ty = cast<SequentialType>(Ty)->getElementType();
519 if (
const auto *CI = dyn_cast<ConstantInt>(Idx)) {
523 uint64_t IdxN = CI->getValue().sextOrTrunc(64).getSExtValue();
525 if (TotalOffs >= MaxOffs) {
545 unsigned IdxN = Pair.first;
546 bool IdxNIsKill = Pair.second;
550 if (ElementSize != 1) {
573 const CallInst *CI,
unsigned StartIdx) {
577 if (
const auto *
C = dyn_cast<ConstantInt>(Val)) {
580 }
else if (isa<ConstantPointerNull>(Val)) {
583 }
else if (
auto *AI = dyn_cast<AllocaInst>(Val)) {
606 "Stackmap cannot return a value.");
622 "Expected a constant integer.");
627 "Expected a constant integer.");
628 const auto *NumBytes =
634 if (!addStackMapLiveVars(Ops, I, 2))
643 for (
unsigned i = 0; ScratchRegs[i]; ++i)
645 ScratchRegs[i],
true,
true,
false,
646 false,
false,
true));
656 for (
auto const &MO : Ops)
676 bool FastISel::lowerCallOperands(
const CallInst *CI,
unsigned ArgIdx,
677 unsigned NumArgs,
const Value *Callee,
678 bool ForceRetVoidTy, CallLoweringInfo &CLI) {
680 Args.reserve(NumArgs);
685 for (
unsigned ArgI = ArgIdx, ArgE = ArgIdx + NumArgs, AttrI = ArgIdx + 1;
686 ArgI != ArgE; ++ArgI) {
694 Entry.setAttributes(&
CS, AttrI);
695 Args.push_back(Entry);
700 CLI.setCallee(CI->
getCallingConv(), RetTy, Callee, std::move(Args), NumArgs);
711 return setCallee(CC, ResultTy, Sym, std::move(ArgsList), FixedArgs);
728 "Expected a constant integer.");
729 const auto *NumArgsVal =
731 unsigned NumArgs = NumArgsVal->getZExtValue();
737 "Not enough arguments provided to the patchpoint intrinsic");
740 unsigned NumCallArgs = IsAnyRegCC ? 0 : NumArgs;
743 if (!lowerCallOperands(I, NumMetaOpers, NumCallArgs, Callee, IsAnyRegCC, CLI))
746 assert(CLI.
Call &&
"No call instruction specified.");
751 if (IsAnyRegCC && HasDef) {
752 assert(CLI.
NumResultRegs == 0 &&
"Unexpected result register.");
760 "Expected a constant integer.");
765 "Expected a constant integer.");
766 const auto *NumBytes =
771 if (
const auto *
C = dyn_cast<IntToPtrInst>(Callee)) {
772 uint64_t CalleeConstAddr =
773 cast<ConstantInt>(
C->getOperand(0))->getZExtValue();
775 }
else if (
const auto *
C = dyn_cast<ConstantExpr>(Callee)) {
776 if (
C->getOpcode() == Instruction::IntToPtr) {
777 uint64_t CalleeConstAddr =
778 cast<ConstantInt>(
C->getOperand(0))->getZExtValue();
782 }
else if (
const auto *GV = dyn_cast<GlobalValue>(Callee)) {
784 }
else if (isa<ConstantPointerNull>(Callee))
791 unsigned NumCallRegArgs = IsAnyRegCC ? NumArgs : CLI.
OutRegs.
size();
800 for (
unsigned i = NumMetaOpers, e = NumMetaOpers + NumArgs; i != e; ++i) {
813 if (!addStackMapLiveVars(Ops, I, NumMetaOpers + NumArgs))
822 for (
unsigned i = 0; ScratchRegs[i]; ++i)
824 ScratchRegs[i],
true,
true,
false,
825 false,
false,
true));
828 for (
auto Reg : CLI.
InRegs)
882 Type *RetTy = FTy->getReturnType();
885 Args.reserve(NumArgs);
889 for (
unsigned ArgI = 0; ArgI != NumArgs; ++ArgI) {
897 Entry.setAttributes(&CS, ArgI + 1);
898 Args.push_back(Entry);
902 CLI.
setCallee(RetTy, FTy, Symbol, std::move(Args), CS, NumArgs);
923 for (
unsigned I = 0, E = RetTys.
size();
I != E; ++
I) {
927 for (
unsigned i = 0; i != NumRegs; ++i) {
929 MyFlags.
VT = RegisterVT;
944 for (
auto &Arg : CLI.
getArgs()) {
945 Type *FinalType = Arg.Ty;
947 FinalType = cast<PointerType>(Arg.Ty)->getElementType();
962 if (Arg.IsInAlloca) {
971 if (Arg.IsByVal || Arg.IsInAlloca) {
977 unsigned FrameAlign = Arg.Alignment;
990 CLI.
OutVals.push_back(Arg.Val);
998 assert(CLI.
Call &&
"No call instruction specified.");
1012 Type *RetTy = FuncTy->getReturnType();
1031 Args.push_back(Entry);
1042 .setTailCall(IsTailCall);
1054 if (IA->hasSideEffects())
1055 flushLocalValueMap();
1058 if (!IA->getConstraintString().empty())
1061 unsigned ExtraInfo = 0;
1062 if (IA->hasSideEffects())
1064 if (IA->isAlignStack())
1069 .addExternalSymbol(IA->getAsmString().c_str())
1078 if (
const auto *II = dyn_cast<IntrinsicInst>(Call))
1088 flushLocalValueMap();
1098 case Intrinsic::lifetime_start:
1099 case Intrinsic::lifetime_end:
1101 case Intrinsic::donothing:
1103 case Intrinsic::eh_actions: {
1110 case Intrinsic::dbg_declare: {
1114 DEBUG(
dbgs() <<
"Dropping debug info for " << *DI <<
"\n");
1119 if (!Address || isa<UndefValue>(Address)) {
1120 DEBUG(
dbgs() <<
"Dropping debug info for " << *DI <<
"\n");
1124 unsigned Offset = 0;
1126 if (
const auto *Arg = dyn_cast<Argument>(Address))
1147 (!isa<AllocaInst>(Address) ||
1154 "Expected inlined-at fields to agree");
1170 DEBUG(
dbgs() <<
"Dropping debug info for " << *DI <<
"\n");
1174 case Intrinsic::dbg_value: {
1180 "Expected inlined-at fields to agree");
1189 }
else if (
const auto *CI = dyn_cast<ConstantInt>(V)) {
1190 if (CI->getBitWidth() > 64)
1198 .
addImm(CI->getZExtValue())
1202 }
else if (
const auto *CF = dyn_cast<ConstantFP>(V)) {
1216 DEBUG(
dbgs() <<
"Dropping debug info for " << *DI <<
"\n");
1220 case Intrinsic::objectsize: {
1222 unsigned long long Res = CI->
isZero() ? -1ULL : 0;
1230 case Intrinsic::expect: {
1237 case Intrinsic::experimental_stackmap:
1239 case Intrinsic::experimental_patchpoint_void:
1240 case Intrinsic::experimental_patchpoint_i64:
1272 Opcode, InputReg, InputRegIsKill);
1306 unsigned ResultReg = 0;
1307 if (SrcVT == DstVT) {
1311 if (SrcClass == DstClass) {
1332 if (isa<TerminatorInst>(I))
1333 if (!handlePHINodesInSuccessorBlocks(I->
getParent()))
1340 if (
const auto *
Call = dyn_cast<CallInst>(I)) {
1353 Call->hasFnAttr(
"trap-func-name"))
1360 ++NumFastIselSuccessIndependent;
1372 ++NumFastIselSuccessTarget;
1383 if (isa<TerminatorInst>(I))
1401 uint32_t BranchWeight = 0;
1418 OpReg, OpRegIsKill);
1444 IntResultReg,
true);
1473 ResultReg = I->second;
1474 else if (isa<Instruction>(Op0))
1485 for (
unsigned i = 0; i < VTIndex; i++)
1494 case Instruction::Add:
1496 case Instruction::FAdd:
1498 case Instruction::Sub:
1500 case Instruction::FSub:
1505 case Instruction::Mul:
1507 case Instruction::FMul:
1509 case Instruction::SDiv:
1511 case Instruction::UDiv:
1513 case Instruction::FDiv:
1515 case Instruction::SRem:
1517 case Instruction::URem:
1519 case Instruction::FRem:
1521 case Instruction::Shl:
1523 case Instruction::LShr:
1525 case Instruction::AShr:
1534 case Instruction::GetElementPtr:
1537 case Instruction::Br: {
1552 case Instruction::Unreachable:
1558 case Instruction::Alloca:
1569 case Instruction::BitCast:
1572 case Instruction::FPToSI:
1574 case Instruction::ZExt:
1576 case Instruction::SExt:
1578 case Instruction::Trunc:
1580 case Instruction::SIToFP:
1583 case Instruction::IntToPtr:
1584 case Instruction::PtrToInt: {
1598 case Instruction::ExtractValue:
1613 : FuncInfo(FuncInfo),
MF(FuncInfo.
MF),
MRI(FuncInfo.
MF->getRegInfo()),
1614 MFI(*FuncInfo.
MF->getFrameInfo()),
MCP(*FuncInfo.
MF->getConstantPool()),
1615 TM(FuncInfo.
MF->getTarget()),
DL(
MF->getDataLayout()),
1616 TII(*
MF->getSubtarget().getInstrInfo()),
1617 TLI(*
MF->getSubtarget().getTargetLowering()),
1618 TRI(*
MF->getSubtarget().getRegisterInfo()), LibInfo(LibInfo),
1619 SkipTargetIndependentISel(SkipTargetIndependentISel) {}
1675 bool Op0IsKill, uint64_t Imm,
MVT ImmType) {
1693 unsigned ResultReg =
fastEmit_ri(VT, VT, Opcode, Op0, Op0IsKill, Imm);
1697 bool IsImmKill =
true;
1714 return fastEmit_rr(VT, VT, Opcode, Op0, Op0IsKill, MaterialReg, IsImmKill);
1770 bool Op0IsKill,
unsigned Op1,
1794 bool Op0IsKill,
unsigned Op1,
1795 bool Op1IsKill,
unsigned Op2,
1822 bool Op0IsKill, uint64_t Imm) {
1844 bool Op0IsKill, uint64_t Imm1,
1891 bool Op0IsKill,
unsigned Op1,
1892 bool Op1IsKill, uint64_t Imm) {
1917 unsigned Op0,
bool Op0IsKill,
unsigned Op1,
1918 bool Op1IsKill, uint64_t Imm1,
1980 bool Op0IsKill, uint32_t Idx) {
1983 "Cannot yet extract from physregs");
2003 bool FastISel::handlePHINodesInSuccessorBlocks(
const BasicBlock *LLVMBB) {
2013 if (!isa<PHINode>(SuccBB->
begin()))
2019 if (!SuccsHandled.
insert(SuccMBB).second)
2031 if (PN->use_empty())
2049 const Value *PHIOp = PN->getIncomingValueForBlock(LLVMBB);
2053 DbgLoc = PN->getDebugLoc();
2054 if (
const auto *Inst = dyn_cast<Instruction>(PHIOp))
2055 DbgLoc = Inst->getDebugLoc();
2072 "tryToFoldLoad expected a LoadInst with a single use");
2076 unsigned MaxUsers = 6;
2079 while (TheUser != FoldInst &&
2092 if (TheUser != FoldInst)
2128 if (!isa<AddOperator>(Add))
2135 if (isa<Instruction>(Add) &&
2139 return isa<ConstantInt>(cast<AddOperator>(Add)->getOperand(1));
2150 if (
const auto *LI = dyn_cast<LoadInst>(I)) {
2151 Alignment = LI->getAlignment();
2152 IsVolatile = LI->isVolatile();
2154 Ptr = LI->getPointerOperand();
2155 ValTy = LI->getType();
2156 }
else if (
const auto *
SI = dyn_cast<StoreInst>(I)) {
2157 Alignment =
SI->getAlignment();
2158 IsVolatile =
SI->isVolatile();
2160 Ptr =
SI->getPointerOperand();
2161 ValTy =
SI->getValueOperand()->getType();
2185 Alignment, AAInfo, Ranges);
2194 switch (Predicate) {
void setHasStackMap(bool s=true)
BITCAST - This operator converts between integer, vector and FP values, as if the value was stored to...
unsigned fastEmitInst_rrr(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, unsigned Op2, bool Op2IsKill)
Emit a MachineInstr with three register operands and a result register in the given register class...
const Value * getCalledValue() const
getCalledValue - Get a pointer to the function that is invoked by this instruction.
const MachineInstrBuilder & addMetadata(const MDNode *MD) const
void setByValAlign(unsigned A)
void push_back(const T &Elt)
The memory access reads data.
A parsed version of the target data layout string in and methods for querying it. ...
This class is the base class for the comparison instructions.
unsigned fastEmitInst_rrii(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, uint64_t Imm1, uint64_t Imm2)
Emit a MachineInstr with two register operands, two immediates operands, and a result register in the...
The memory access writes data.
std::vector< ArgListEntry > ArgListTy
unsigned fastEmitZExtFromI1(MVT VT, unsigned Op0, bool Op0IsKill)
Emit MachineInstrs to compute the value of Op with all but the least significant bit set to zero...
MachineInstr * getParent()
getParent - Return the instruction that this operand belongs to.
LLVMContext & getContext() const
getContext - Return a reference to the LLVMContext associated with this function. ...
MachineConstantPool & MCP
bool lowerCall(const CallInst *I)
static const Value * getFNegArgument(const Value *BinOp)
STATISTIC(NumFunctions,"Total number of functions")
unsigned OrigNumPHINodesToUpdate
virtual unsigned fastMaterializeConstant(const Constant *C)
Emit a constant in a register using target-specific logic, such as constant pool loads.
Sign extended before/after call.
unsigned getNumRegisters(LLVMContext &Context, EVT VT) const
Return the number of registers that this ValueType will eventually require.
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Force argument to be passed in register.
InstrTy * getInstruction() const
Intrinsic::ID getIntrinsicID() const
getIntrinsicID - Return the intrinsic ID of this intrinsic.
CmpInst::Predicate optimizeCmpPredicate(const CmpInst *CI) const
unsigned getNumDefs() const
Return the number of MachineOperands that are register definitions.
unsigned createVirtualRegister(const TargetRegisterClass *RegClass)
createVirtualRegister - Create and return a new virtual register in the function with the specified r...
void fastEmitBranch(MachineBasicBlock *MBB, DebugLoc DL)
Emit an unconditional branch to the given block, unless it is the immediate (fall-through) successor...
bool selectGetElementPtr(const User *I)
Nested function static chain.
void leaveLocalValueArea(SavePoint Old)
Reset InsertPt to the given old insert position.
Describe properties that are true of each instruction in the target description file.
virtual unsigned fastEmit_rf(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, bool Op0IsKill, const ConstantFP *FPImm)
This method is called by target-independent code to request that an instruction with the given type...
static bool isVirtualRegister(unsigned Reg)
isVirtualRegister - Return true if the specified register number is in the virtual register namespace...
A Stackmap instruction captures the location of live variables at its position in the instruction str...
bool selectStackmap(const CallInst *I)
CallInst - This class represents a function call, abstracting a target machine's calling convention...
virtual bool tryToFoldLoadIntoMI(MachineInstr *, unsigned, const LoadInst *)
The specified machine instr operand is a vreg, and that vreg is being provided by the specified load ...
void setAttributes(ImmutableCallSite *CS, unsigned AttrIdx)
Set CallLoweringInfo attribute flags based on a call instruction and called function attributes...
0 1 0 0 True if ordered and less than
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
MachineMemOperand * createMachineMemOperandFor(const Instruction *I) const
Create a machine mem operand from the given instruction.
unsigned getSizeInBits() const
virtual bool functionArgumentNeedsConsecutiveRegisters(Type *Ty, CallingConv::ID CallConv, bool isVarArg) const
For some targets, an LLVM struct type must be broken down into multiple simple types, but the calling convention specifies that the entire struct must be passed in a block of consecutive registers.
1 1 1 0 True if unordered or not equal
virtual unsigned fastEmit_(MVT VT, MVT RetVT, unsigned Opcode)
This method is called by target-independent code to request that an instruction with the given type a...
Type * getReturnType() const
void setInConsecutiveRegs()
SmallVector< unsigned, 4 > InRegs
LoadInst - an instruction for reading from memory.
bool CanLowerReturn
CanLowerReturn - true iff the function's return value can be lowered to registers.
virtual unsigned fastEmit_i(MVT VT, MVT RetVT, unsigned Opcode, uint64_t Imm)
This method is called by target-independent code to request that an instruction with the given type...
virtual unsigned fastMaterializeFloatZero(const ConstantFP *CF)
Emit the floating-point constant +0.0 in a register using target- specific logic. ...
MachineMemOperand * getMachineMemOperand(MachinePointerInfo PtrInfo, unsigned f, uint64_t s, unsigned base_alignment, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr)
getMachineMemOperand - Allocate a new MachineMemOperand.
void setPhysRegsDeadExcept(ArrayRef< unsigned > UsedRegs, const TargetRegisterInfo &TRI)
Mark every physreg used by this instruction as dead except those in the UsedRegs list.
uint64_t getOffset() const
bool bitsLT(EVT VT) const
bitsLT - Return true if this has less bits than VT.
virtual bool fastLowerCall(CallLoweringInfo &CLI)
This method is called by target-independent code to do target- specific call lowering.
static Constant * getNullValue(Type *Ty)
StringRef getName() const
Return a constant reference to the value's name.
iterator begin()
Instruction iterator methods.
bool selectInstruction(const Instruction *I)
Do "fast" instruction selection for the given LLVM IR instruction and append the generated machine in...
unsigned fastEmitInst_rii(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, uint64_t Imm1, uint64_t Imm2)
Emit a MachineInstr with one register operand and two immediate operands.
virtual unsigned fastEmit_rri(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, uint64_t Imm)
This method is called by target-independent code to request that an instruction with the given type...
COPY - Target-independent register copy.
1 0 0 1 True if unordered or equal
DenseMap< const Value *, unsigned > LocalValueMap
unsigned fastEmitInst_ri(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, uint64_t Imm)
Emit a MachineInstr with a register operand, an immediate, and a result register in the given registe...
1 0 0 0 True if unordered: isnan(X) | isnan(Y)
unsigned fastEmitInst_rri(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, uint64_t Imm)
Emit a MachineInstr with two register operands, an immediate, and a result register in the given regi...
bool isUnconditional() const
MachineMemOperand - A description of a memory reference used in the backend.
unsigned getCallFrameDestroyOpcode() const
void setHasPatchPoint(bool s=true)
const StructLayout * getStructLayout(StructType *Ty) const
Returns a StructLayout object, indicating the alignment of the struct, its size, and the offsets of i...
static MachineOperand CreateReg(unsigned Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false)
Shift and rotation operations.
opStatus convertToInteger(integerPart *, unsigned int, bool, roundingMode, bool *) const
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
A Use represents the edge between a Value definition and its users.
bool hasOptimizedCodeGen(LibFunc::Func F) const
Tests if the function is both available and a candidate for optimized code generation.
unsigned fastEmitInst_i(unsigned MachineInstrOpcode, const TargetRegisterClass *RC, uint64_t Imm)
Emit a MachineInstr with a single immediate operand, and a result register in the given register clas...
bool canFoldAddIntoGEP(const User *GEP, const Value *Add)
Check if Add is an add that can be safely folded into GEP.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
bool isReg() const
isReg - Tests if this is a MO_Register operand.
unsigned getNumArgOperands() const
getNumArgOperands - Return the number of call arguments.
void eraseFromParent()
Unlink 'this' from the containing basic block and delete it.
unsigned fastEmitInst_r(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill)
Emit a MachineInstr with one register operand and a result register in the given register class...
MachineInstr * EmitStartPt
The top most instruction in the current block that is allowed for emitting local variables.
const TargetRegisterClass * getRegClass(unsigned Reg) const
getRegClass - Return the register class of the specified virtual register.
Reg
All possible values of the reg field in the ModR/M byte.
0 1 0 1 True if ordered and less than or equal
static MachineOperand CreateRegMask(const uint32_t *Mask)
CreateRegMask - Creates a register mask operand referencing Mask.
bool hasDebugInfo() const
hasDebugInfo - Returns true if valid debug info is present.
void setByValSize(unsigned S)
The memory access is volatile.
uint16_t getParamAlignment(uint16_t i) const
Extract the alignment for a call or parameter (0=unknown).
const MachineInstrBuilder & addImm(int64_t Val) const
addImm - Add a new immediate operand.
Hidden pointer to structure to return.
bool selectIntrinsicCall(const IntrinsicInst *II)
bool selectCast(const User *I, unsigned Opcode)
Context object for machine code objects.
int getArgumentFrameIndex(const Argument *A)
getArgumentFrameIndex - Get frame index for the byval argument.
FunctionType - Class to represent function types.
SmallVector< ISD::InputArg, 4 > Ins
unsigned constrainOperandRegClass(const MCInstrDesc &II, unsigned Op, unsigned OpNum)
Try to constrain Op so that it is usable by argument OpNum of the provided MCInstrDesc.
[SU]INT_TO_FP - These operators convert integers (whose interpreted sign depends on the first letter)...
bool selectOperator(const User *I, unsigned Opcode)
Do "fast" instruction selection for the given LLVM IR operator (Instruction or ConstantExpr), and append generated machine instructions to the current block.
LLVMContext & getContext() const
getContext - Return the LLVMContext in which this type was uniqued.
ValTy * getCalledValue() const
getCalledValue - Return the pointer to function that is being called.
void GetReturnInfo(Type *ReturnType, AttributeSet attr, SmallVectorImpl< ISD::OutputArg > &Outs, const TargetLowering &TLI, const DataLayout &DL)
Given an LLVM IR type and return type attributes, compute the return value EVTs and flags...
unsigned getCallFrameSetupOpcode() const
These methods return the opcode of the frame setup/destroy instructions if they exist (-1 otherwise)...
unsigned getRegForValue(const Value *V)
Create a virtual register and arrange for it to be assigned the value for the given LLVM value...
Simple integer binary arithmetic operators.
BasicBlock * getSuccessor(unsigned i) const
unsigned fastEmitInst_(unsigned MachineInstOpcode, const TargetRegisterClass *RC)
Emit a MachineInstr with no operands and a result register in the given register class.
SmallString - A SmallString is just a SmallVector with methods and accessors that make it work better...
EVT getValueType(const DataLayout &DL, Type *Ty, bool AllowUnknown=false) const
Return the EVT corresponding to this LLVM type.
bool hasTrivialKill(const Value *V)
Test whether the given value has exactly one use.
MCContext & getContext() const
void setOrigAlign(unsigned A)
Type * getElementType() const
virtual const MCPhysReg * getScratchRegisters(CallingConv::ID CC) const
Returns a 0 terminated array of registers that can be safely used as scratch registers.
MachineInstr * getLastLocalValue()
Return the position of the last instruction emitted for materializing constants for use in the curren...
void ComputeValueVTs(const TargetLowering &TLI, const DataLayout &DL, Type *Ty, SmallVectorImpl< EVT > &ValueVTs, SmallVectorImpl< uint64_t > *Offsets=nullptr, uint64_t StartingOffset=0)
ComputeValueVTs - Given an LLVM IR type, compute a sequence of EVTs that represent all the individual...
const TargetRegisterClass * constrainRegClass(unsigned Reg, const TargetRegisterClass *RC, unsigned MinNumRegs=0)
constrainRegClass - Constrain the register class of the specified virtual register to be a common sub...
PointerType - Class to represent pointers.
unsigned getKillRegState(bool B)
const BasicBlock * getBasicBlock() const
getBasicBlock - Return the LLVM basic block that this instance corresponded to originally.
FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.
unsigned lookUpRegForValue(const Value *V)
Look up the value to see if its value is already cached in a register.
const MachineBasicBlock * getParent() const
uint64_t getElementOffset(unsigned Idx) const
The memory access is non-temporal.
DBG_VALUE - a mapping of the llvm.dbg.value intrinsic.
unsigned getNumSuccessors() const
Return the number of successors that this terminator has.
IMPLICIT_DEF - This is the MachineInstr-level equivalent of undef.
bundle_iterator< MachineInstr, instr_iterator > iterator
A self-contained host- and target-independent arbitrary-precision floating-point software implementat...
bool getLibFunc(StringRef funcName, LibFunc::Func &F) const
Searches for a particular function name.
bool isTypeLegal(EVT VT) const
Return true if the target has native support for the specified value type.
Patchable call instruction - this instruction represents a call to a constant address, followed by a series of NOPs.
Subclasses of this class are all able to terminate a basic block.
* if(!EatIfPresent(lltok::kw_thread_local)) return false
ParseOptionalThreadLocal := /*empty.
std::vector< std::pair< MachineInstr *, unsigned > > PHINodesToUpdate
PHINodesToUpdate - A list of phi instructions whose operand list will be updated after processing the...
CallLoweringInfo & setCallee(Type *ResultTy, FunctionType *FuncTy, const Value *Target, ArgListTy &&ArgsList, ImmutableCallSite &Call)
MVT - Machine Value Type.
LLVM Basic Block Representation.
The instances of the Type class are immutable: once they are created, they are never changed...
BasicBlock * getSuccessor(unsigned idx) const
Return the specified successor.
DIExpression * getExpression() const
Simple binary floating point operators.
BranchInst - Conditional or Unconditional Branch instruction.
This is an important base class in LLVM.
void removeDeadCode(MachineBasicBlock::iterator I, MachineBasicBlock::iterator E)
Remove all dead instructions between the I and E.
SmallVector< ISD::ArgFlagsTy, 16 > OutFlags
APInt Or(const APInt &LHS, const APInt &RHS)
Bitwise OR function for APInt.
ConstantFP - Floating Point Values [float, double].
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
APInt Xor(const APInt &LHS, const APInt &RHS)
Bitwise XOR function for APInt.
unsigned getOperandNo() const
getOperandNo - Return the operand # of this MachineOperand in its MachineInstr.
Return value is always equal to this argument.
virtual unsigned fastEmit_r(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, bool Op0IsKill)
This method is called by target-independent code to request that an instruction with the given type...
const DebugLoc & getDebugLoc() const
getDebugLoc - Return the debug location for this node as a DebugLoc.
bool SkipTargetIndependentISel
Pass structure in an alloca.
static Type * getVoidTy(LLVMContext &C)
bool tryToFoldLoad(const LoadInst *LI, const Instruction *FoldInst)
We're checking to see if we can fold LI into FoldInst.
bool lowerArguments()
Do "fast" instruction selection for function arguments and append the machine instructions to the cur...
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset, unsigned char TargetFlags=0)
TRAP - Trapping instruction.
Value * getOperand(unsigned i) const
MVT getRegisterType(MVT VT) const
Return the type of registers that this ValueType will eventually require.
Zero extended before/after call.
0 1 1 1 True if ordered (no nans)
Class to represent integer types.
Predicate getPredicate() const
Return the predicate for this instruction.
const TargetRegisterInfo & TRI
MachineInstrBuilder BuildMI(MachineFunction &MF, DebugLoc DL, const MCInstrDesc &MCID)
BuildMI - Builder interface.
1 1 1 1 Always true (always folded)
static AttributeSet getReturnAttrs(FastISel::CallLoweringInfo &CLI)
Returns an AttributeSet representing the attributes applied to the return value of the given call...
EVT - Extended Value Type.
static UndefValue * get(Type *T)
get() - Static factory methods - Return an 'undef' object of the specified type.
virtual unsigned getByValTypeAlignment(Type *Ty, const DataLayout &DL) const
Return the desired alignment for ByVal or InAlloca aggregate function arguments in the caller paramet...
LLVMContext & getContext() const
All values hold a context through their type.
bool selectFNeg(const User *I)
Emit an FNeg operation.
MachinePointerInfo - This class contains a discriminated union of information about pointers in memor...
1 1 0 1 True if unordered, less than, or equal
SmallVector< Value *, 16 > OutVals
const MCInstrDesc & get(unsigned Opcode) const
Return the machine instruction descriptor that corresponds to the specified instruction opcode...
const TargetInstrInfo & TII
MachineBasicBlock * MBB
MBB - The current block.
bool isInTailCallPosition(ImmutableCallSite CS, const TargetMachine &TM)
Test if the given instruction is in a position to be optimized with a tail-call.
MachineInstr * LastLocalValue
The position of the last instruction for materializing constants for use in the current block...
The memory access is invariant.
void recomputeInsertPt()
Reset InsertPt to prepare for inserting instructions into the current block.
bool bitsGT(EVT VT) const
bitsGT - Return true if this has more bits than VT.
IntegerType * getIntPtrType(LLVMContext &C, unsigned AddressSpace=0) const
Returns an integer type with size at least as big as that of a pointer in the given address space...
0 0 1 0 True if ordered and greater than
unsigned getABITypeAlignment(Type *Ty) const
Returns the minimum ABI-required alignment for the specified type.
static IntegerType * get(LLVMContext &C, unsigned NumBits)
This static method is the primary way of constructing an IntegerType.
DIExpression * getExpression() const
virtual unsigned fastEmit_rr(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill)
This method is called by target-independent code to request that an instruction with the given type...
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements...
This is the shared class of boolean and integer constants.
uint64_t getTypeAllocSize(Type *Ty) const
Returns the offset in bytes between successive objects of the specified type, including alignment pad...
bool paramHasAttr(unsigned i, Attribute::AttrKind A) const
Return true if the call or the callee has the given attribute.
virtual unsigned fastEmit_ri(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, bool Op0IsKill, uint64_t Imm)
This method is called by target-independent code to request that an instruction with the given type...
DenseMap< unsigned, unsigned > RegFixups
RegFixups - Registers which need to be replaced after isel is done.
1 1 0 0 True if unordered or less than
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small...
Type * getType() const
All values are typed, get the type of this value.
Instruction * user_back()
user_back - Specialize the methods defined in Value, as we know that an instruction can only be used ...
Provides information about what library functions are available for the current target.
MDNode * getMetadata(unsigned KindID) const
getMetadata - Get the metadata of given kind attached to this Instruction.
const MachineInstrBuilder & addCImm(const ConstantInt *Val) const
bool isVolatile() const
isVolatile - Return true if this is a load from a volatile memory location.
const TargetLibraryInfo * LibInfo
A collection of metadata nodes that might be associated with a memory access used by the alias-analys...
bool hasOneUse(unsigned RegNo) const
hasOneUse - Return true if there is exactly one instruction using the specified register.
unsigned arg_size() const
Value * stripPointerCasts()
Strip off pointer casts, all-zero GEPs, and aliases.
unsigned fastEmitInst_rr(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill)
Emit a MachineInstr with two register operands and a result register in the given register class...
static Constant * get(Type *Ty, uint64_t V, bool isSigned=false)
If Ty is a vector type, return a Constant with a splat of the given value.
Function * getCalledFunction() const
getCalledFunction - Return the function called, or null if this is an indirect function invocation...
MachineFrameInfo * getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
void updateValueMap(const Value *I, unsigned Reg, unsigned NumRegs=1)
Update the value map to include the new mapping for this instruction, or insert an extra copy to get ...
bool isZero() const
This is just a convenience method to make client code smaller for a common code.
Intrinsic::ID getIntrinsicID() const LLVM_READONLY
getIntrinsicID - This method returns the ID number of the specified function, or Intrinsic::not_intri...
void startNewBlock()
Set the current block to which generated machine instructions will be appended, and clear the local C...
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Value * getArgOperand(unsigned i) const
getArgOperand/setArgOperand - Return/set the i-th call argument.
bool selectBitCast(const User *I)
Target - Wrapper for Target specific information.
Class for arbitrary precision integers.
virtual unsigned fastEmit_f(MVT VT, MVT RetVT, unsigned Opcode, const ConstantFP *FPImm)
This method is called by target-independent code to request that an instruction with the given type...
SmallVector< unsigned, 16 > OutRegs
bool selectBinaryOp(const User *I, unsigned ISDOpcode)
Select and emit code for a binary operator instruction, which has an opcode which directly correspond...
virtual const uint32_t * getCallPreservedMask(const MachineFunction &MF, CallingConv::ID) const
getCallPreservedMask - Return a mask of call-preserved registers for the given calling convention on ...
BranchProbabilityInfo * BPI
This file defines the FastISel class.
virtual const TargetRegisterClass * getRegClassFor(MVT VT) const
Return the register class that should be used for the specified value type.
ZERO_EXTEND - Used for integer types, zeroing the new bits.
bool isPowerOf2_64(uint64_t Value)
isPowerOf2_64 - This function returns true if the argument is a power of two 0 (64 bit edition...
LLVM_ATTRIBUTE_UNUSED_RESULT std::enable_if< !is_simple_type< Y >::value, typename cast_retty< X, const Y >::ret_type >::type dyn_cast(const Y &Val)
virtual bool CanLowerReturn(CallingConv::ID, MachineFunction &, bool, const SmallVectorImpl< ISD::OutputArg > &, LLVMContext &) const
This hook should be implemented to check whether the return values described by the Outs array can fi...
bool selectCall(const User *Call)
APInt And(const APInt &LHS, const APInt &RHS)
Bitwise AND function for APInt.
SavePoint enterLocalValueArea()
Prepare InsertPt to begin inserting instructions into the local value area and return the old insert ...
Representation of each machine instruction.
virtual bool fastLowerIntrinsicCall(const IntrinsicInst *II)
This method is called by target-independent code to do target- specific intrinsic lowering...
bool selectPatchpoint(const CallInst *I)
bool selectExtractValue(const User *I)
Bitwise operators - logical and, logical or, logical xor.
MachineRegisterInfo & MRI
MCSymbol * getOrCreateSymbol(const Twine &Name)
Lookup the symbol inside with the specified Name.
void getNameWithPrefix(raw_ostream &OS, const GlobalValue *GV, bool CannotUsePrivateLabel) const
Print the appropriate prefix and the specified global variable's name.
unsigned greater or equal
DbgValueInst - This represents the llvm.dbg.value instruction.
bool lowerCallTo(const CallInst *CI, MCSymbol *Symbol, unsigned NumArgs)
static bool isFNeg(const Value *V, bool IgnoreZeroSign=false)
void getAAMetadata(AAMDNodes &N, bool Merge=false) const
getAAMetadata - Fills the AAMDNodes structure with AA metadata from this instruction.
ImmutableCallSite - establish a view to a call site for examination.
unsigned getSizeInBits() const
getSizeInBits - Return the size of the specified value type in bits.
static MachineOperand CreateImm(int64_t Val)
TerminatorInst * getTerminator()
Returns the terminator instruction if the block is well formed or null if the block is not well forme...
unsigned fastEmitInst_rf(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, const ConstantFP *FPImm)
Emit a MachineInstr with two register operands and a result register in the given register class...
bool hasOneUse() const
Return true if there is exactly one user of this value.
FunctionLoweringInfo - This contains information that is global to a function that is used when lower...
virtual unsigned fastMaterializeAlloca(const AllocaInst *C)
Emit an alloca address in a register using target-specific logic.
0 1 1 0 True if ordered and operands are unequal
iterator find(const KeyT &Val)
MachineBasicBlock::iterator InsertPt
MBB - The current insert position inside the current block.
virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, DebugLoc DL) const
Insert branch code into the end of the specified MachineBasicBlock.
iterator getFirstNonPHI()
Returns a pointer to the first instruction in this block that is not a PHINode instruction.
uint64_t getTypeStoreSize(Type *Ty) const
Returns the maximum number of bytes that may be overwritten by storing the specified type...
DenseMap< const AllocaInst *, int > StaticAllocaMap
StaticAllocaMap - Keep track of frame indices for fixed sized allocas in the entry block...
1 0 1 0 True if unordered or greater than
static EVT getEVT(Type *Ty, bool HandleUnknown=false)
getEVT - Return the value type corresponding to the specified type.
const TargetLowering & TLI
unsigned createResultReg(const TargetRegisterClass *RC)
MachineInstr * getVRegDef(unsigned Reg) const
getVRegDef - Return the machine instr that defines the specified virtual register or null if none is ...
bool hasLocalLinkage() const
CallLoweringInfo & setIsPatchPoint(bool Value=true)
unsigned fastEmit_ri_(MVT VT, unsigned Opcode, unsigned Op0, bool Op0IsKill, uint64_t Imm, MVT ImmType)
This method is a wrapper of fastEmit_ri.
unsigned fastEmitInst_ii(unsigned MachineInstrOpcode, const TargetRegisterClass *RC, uint64_t Imm1, uint64_t Imm2)
Emit a MachineInstr with a two immediate operands.
unsigned getReg() const
getReg - Returns the register number.
const MachineInstrBuilder & addFPImm(const ConstantFP *Val) const
unsigned fastEmitInst_extractsubreg(MVT RetVT, unsigned Op0, bool Op0IsKill, uint32_t Idx)
Emit a MachineInstr for an extract_subreg from a specified index of a superregister to a specified ty...
MachineBasicBlock::iterator InsertPt
DILocalVariable * getVariable() const
const uint16_t * ImplicitDefs
user_iterator user_begin()
FastISel(FunctionLoweringInfo &FuncInfo, const TargetLibraryInfo *LibInfo, bool SkipTargetIndependentISel=false)
bool isSimple() const
isSimple - Test if the given EVT is simple (as opposed to being extended).
bool isEmptyTy() const
isEmptyTy - Return true if this type is empty, that is, it has no elements or all its elements are em...
virtual bool fastLowerArguments()
This method is called by target-independent code to do target- specific argument lowering.
MVT getPointerTy(const DataLayout &DL, uint32_t AS=0) const
Return the pointer type for the given address space, defaults to the pointer type from the data layou...
virtual const TargetRegisterClass * getSubClassWithSubReg(const TargetRegisterClass *RC, unsigned Idx) const
getSubClassWithSubReg - Returns the largest legal sub-class of RC that supports the sub-register inde...
0 0 0 1 True if ordered and equal
EVT getTypeToTransformTo(LLVMContext &Context, EVT VT) const
For types supported by the target, this is an identity function.
LLVM Value Representation.
1 0 1 1 True if unordered, greater than, or equal
unsigned getOpcode() const
getOpcode() returns a member of one of the enums like Instruction::Add.
Value * getAddress() const
DbgDeclareInst - This represents the llvm.dbg.declare instruction.
DILocalVariable * getVariable() const
static const Function * getParent(const Value *V)
const MachineInstrBuilder & addOperand(const MachineOperand &MO) const
uint64_t getTypeSizeInBits(Type *Ty) const
Size examples:
const Value * getValue() const
DbgValueInst - This represents the llvm.dbg.value instruction.
uint32_t getEdgeWeight(const BasicBlock *Src, unsigned IndexInSuccessors) const
Get the raw edge weight calculated for the edge.
IterTy arg_begin() const
arg_begin/arg_end - Return iterators corresponding to the actual argument list for a call site...
bool isValidLocationForIntrinsic(const DILocation *DL) const
Check that a location is valid for this variable.
DenseMap< const BasicBlock *, MachineBasicBlock * > MBBMap
MBBMap - A mapping from LLVM basic blocks to their machine code entry.
MachineModuleInfo & getMMI() const
const TargetRegisterClass * getRegClass(const MCInstrDesc &TID, unsigned OpNum, const TargetRegisterInfo *TRI, const MachineFunction &MF) const
Given a machine instruction descriptor, returns the register class constraint for OpNum...
reg_iterator reg_begin(unsigned RegNo) const
unsigned TrapUnreachable
Emit target-specific trap instruction for 'unreachable' IR instructions.
virtual bool fastSelectInstruction(const Instruction *I)=0
This method is called by target-independent code when the normal FastISel process fails to select an ...
CallingConv::ID getCallingConv() const
getCallingConv/setCallingConv - Get or set the calling convention of this function call...
FunctionLoweringInfo & FuncInfo
void setIsDebug(bool Val=true)
TRUNCATE - Completely drop the high bits.
bool isLayoutSuccessor(const MachineBasicBlock *MBB) const
isLayoutSuccessor - Return true if the specified MBB will be emitted immediately after this block...
void ComputeUsesVAFloatArgument(const CallInst &I, MachineModuleInfo *MMI)
ComputeUsesVAFloatArgument - Determine if any floating-point values are being passed to this variadic...
0 0 1 1 True if ordered and greater than or equal
unsigned ComputeLinearIndex(Type *Ty, const unsigned *Indices, const unsigned *IndicesEnd, unsigned CurIndex=0)
Compute the linearized index of a member in a nested aggregate/struct/array.
const MachineInstrBuilder & addReg(unsigned RegNo, unsigned flags=0, unsigned SubReg=0) const
addReg - Add a new virtual register operand...
reg_begin/reg_end - Provide iteration support to walk over all definitions and uses of a register wit...
DbgDeclareInst - This represents the llvm.dbg.declare instruction.
FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW, FLOG, FLOG2, FLOG10, FEXP, FEXP2, FCEIL, FTRUNC, FRINT, FNEARBYINT, FROUND, FFLOOR - Perform various unary floating point operations.
DenseMap< const Value *, unsigned > ValueMap
ValueMap - Since we emit code for the function a basic block at a time, we must remember which virtua...
static EVT getIntegerVT(LLVMContext &Context, unsigned BitWidth)
getIntegerVT - Returns the EVT that represents an integer with the given number of bits...
void addSuccessor(MachineBasicBlock *succ, uint32_t weight=0)
addSuccessor - Add succ as a successor of this MachineBasicBlock.
static MachineOperand CreateFI(int Idx)
unsigned Log2_64(uint64_t Value)
Log2_64 - This function returns the floor log base 2 of the specified value, -1 if the value is zero...
const BasicBlock * getParent() const
MVT getSimpleVT() const
getSimpleVT - Return the SimpleValueType held in the specified simple EVT.
0 0 0 0 Always false (always folded)
IntrinsicInst - A useful wrapper class for inspecting calls to intrinsic functions.
MachineModuleInfo - This class contains meta information specific to a module.
This file describes how to lower LLVM code to machine code.
bool isVoidTy() const
isVoidTy - Return true if this is 'void'.
bool use_empty(unsigned RegNo) const
use_empty - Return true if there are no instructions using the specified register.
unsigned InitializeRegForValue(const Value *V)
std::pair< unsigned, bool > getRegForGEPIndex(const Value *V)
This is a wrapper around getRegForValue that also takes care of truncating or sign-extending the give...