14 #ifndef LLVM_LIB_TARGET_MIPS_MIPSSUBTARGET_H
15 #define LLVM_LIB_TARGET_MIPS_MIPSSUBTARGET_H
28 #define GET_SUBTARGETINFO_HEADER
29 #include "MipsGenSubtargetInfo.inc"
34 class MipsTargetMachine;
37 virtual void anchor();
41 Mips1, Mips2, Mips32, Mips32r2, Mips32r3, Mips32r5, Mips32r6, Mips32Max,
42 Mips3, Mips4, Mips5, Mips64, Mips64r2, Mips64r3, Mips64r5, Mips64r6
46 MipsArchEnum MipsArchVersion;
111 bool InMips16HardFloat;
114 bool PreviousInMips16Mode;
117 bool InMicroMipsMode;
120 bool HasDSP, HasDSPR2;
123 bool AllowMixed16_32;
137 enum {NoOverride, Mips16Override, NoMips16Override} OverrideMode;
144 std::unique_ptr<const MipsInstrInfo> InstrInfo;
145 std::unique_ptr<const MipsFrameLowering> FrameLowering;
146 std::unique_ptr<const MipsTargetLowering> TLInfo;
171 bool hasMips1()
const {
return MipsArchVersion >= Mips1; }
172 bool hasMips2()
const {
return MipsArchVersion >= Mips2; }
173 bool hasMips3()
const {
return MipsArchVersion >= Mips3; }
174 bool hasMips4()
const {
return MipsArchVersion >= Mips4; }
175 bool hasMips5()
const {
return MipsArchVersion >= Mips5; }
179 return (MipsArchVersion >= Mips32 && MipsArchVersion < Mips32Max) ||
183 return (MipsArchVersion >= Mips32r2 && MipsArchVersion < Mips32Max) ||
187 return (MipsArchVersion >= Mips32r3 && MipsArchVersion < Mips32Max) ||
191 return (MipsArchVersion >= Mips32r5 && MipsArchVersion < Mips32Max) ||
195 return (MipsArchVersion >= Mips32r6 && MipsArchVersion < Mips32Max) ||
198 bool hasMips64()
const {
return MipsArchVersion >= Mips64; }
251 bool os16()
const {
return Os16; }
283 return FrameLowering.get();
286 return &InstrInfo->getRegisterInfo();
const MipsABIInfo & getABI() const
bool isABI_EABI() const
Only O32 and EABI supported right now.
void setHelperClassesMips16()
const TargetSelectionDAGInfo * getSelectionDAGInfo() const override
void getCriticalPathRCs(RegClassVector &CriticalPathRCs) const override
const MipsInstrInfo * getInstrInfo() const override
const InstrItineraryData * getInstrItineraryData() const override
unsigned getGPRSizeInBytes() const
bool systemSupportsUnalignedAccess() const
Does the system support unaligned memory access.
bool hasExtractInsert() const
Features related to the presence of specific instructions.
bool inMips16HardFloat() const
unsigned stackAlignment() const
bool isOSNaCl() const
Tests whether the OS is NaCl (Native Client)
Itinerary data supplied by a subtarget to be used by a target.
const TargetFrameLowering * getFrameLowering() const override
TargetSelectionDAGInfo - Targets can subclass this to parameterize the SelectionDAG lowering and inst...
bool inMicroMips32r6Mode() const
bool inMips16ModeDefault() const
bool useSoftFloat() const
bool inMicroMipsMode() const
bool inMips16Mode() const
Triple - Helper class for working with autoconf configuration names.
static bool useConstantIslands()
bool isTargetNaCl() const
const MipsRegisterInfo * getRegisterInfo() const override
bool enablePostRAScheduler() const override
This overrides the PostRAScheduler bit in the SchedModel for each CPU.
void setHelperClassesMipsSE()
Information about stack frame layout on the target.
bool hasStandardEncoding() const
bool hasMips4_32r2() const
const MipsTargetLowering * getTargetLowering() const override
MipsSubtarget(const Triple &TT, const std::string &CPU, const std::string &FS, bool little, const MipsTargetMachine &TM)
This constructor initializes the data members to match that of the specified triple.
Reloc::Model getRelocationModel() const
bool isSingleFloat() const
bool allowMixed16_32() const
bool enableLongBranchPass() const
CodeGenOpt::Level getOptLevelToEnablePostRAScheduler() const override
void ParseSubtargetFeatures(StringRef CPU, StringRef FS)
ParseSubtargetFeatures - Parses features string setting specified subtarget options.
bool useSmallSection() const
MipsSubtarget & initializeSubtargetDependencies(StringRef CPU, StringRef FS, const TargetMachine &TM)
Primary interface to the complete machine description for the target machine.
StringRef - Represent a constant reference to a string, i.e.