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LLVM
3.7.0
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#include <HexagonInstrInfo.h>
Public Types | |
| typedef unsigned | Opcode_t |
Definition at line 31 of file HexagonInstrInfo.h.
Definition at line 37 of file HexagonInstrInfo.h.
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Definition at line 64 of file HexagonInstrInfo.cpp.
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Definition at line 276 of file HexagonInstrInfo.cpp.
References llvm::SmallVectorImpl< T >::clear(), llvm::MachineOperand::CreateImm(), llvm::dbgs(), DEBUG, llvm::MachineInstr::eraseFromParent(), llvm::MachineOperand::getMBB(), llvm::MachineBasicBlock::getNumber(), llvm::MachineInstr::getNumExplicitOperands(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), I, llvm::MachineBasicBlock::instr_begin(), llvm::MachineBasicBlock::instr_end(), llvm::MachineInstr::isBundle(), isEndLoopN(), llvm::MachineBasicBlock::isLayoutSuccessor(), llvm::MachineOperand::isMBB(), isNewValueJump(), PredOpcodeHasJMP_c(), and llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back().
Referenced by InsertBranch().
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For a comparison instruction, return the source registers in SrcReg and SrcReg2 if having two register operands, and the value it compares against in CmpValue.
Return true if the comparison instruction can be analyzed.
Definition at line 465 of file HexagonInstrInfo.cpp.
References llvm::MachineOperand::getImm(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), and llvm::MachineOperand::getReg().
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Definition at line 551 of file HexagonInstrInfo.cpp.
References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), contains(), llvm::getKillRegState(), and llvm_unreachable.
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Definition at line 1758 of file HexagonInstrInfo.cpp.
References llvm::TargetSubtargetInfo::getInstrItineraryData().
| unsigned HexagonInstrInfo::createVR | ( | MachineFunction * | MF, |
| MVT | VT | ||
| ) | const |
Definition at line 789 of file HexagonInstrInfo.cpp.
References llvm::MachineRegisterInfo::createVirtualRegister(), llvm::MVT::f32, llvm::MVT::f64, llvm::MachineFunction::getRegInfo(), llvm::MVT::i1, llvm::MVT::i32, llvm::MVT::i64, and llvm_unreachable.
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Definition at line 1147 of file HexagonInstrInfo.cpp.
References llvm::MachineInstr::getNumOperands(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isDef(), and llvm::MachineOperand::isReg().
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expandPostRAPseudo - This function is called for all pseudo instructions that remain after register allocation.
Many pseudo instructions are created to help register allocation. This is the place to convert them into real instructions. The target can edit MI in place, or it can insert new instructions and erase MI. The function should return true if anything was changed.
Definition at line 692 of file HexagonInstrInfo.cpp.
References llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::MachineRegisterInfo::clearKillFlags(), llvm::DL, llvm::MachineBasicBlock::erase(), llvm::HexagonRegisterInfo::getFrameRegister(), llvm::MDNode::getOperand(), llvm::MachineBasicBlock::getParent(), getRegisterInfo(), and llvm::RegState::Undef.
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Definition at line 782 of file HexagonInstrInfo.cpp.
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Definition at line 119 of file HexagonInstrInfo.h.
| unsigned HexagonInstrInfo::getAddrMode | ( | const MachineInstr * | MI | ) | const |
Definition at line 1737 of file HexagonInstrInfo.cpp.
References llvm::HexagonII::AddrModeMask, llvm::HexagonII::AddrModePos, F(), llvm::MachineInstr::getDesc(), and llvm::MCInstrDesc::TSFlags.
Referenced by getNonExtOpcode(), isPostIncrement(), and NonExtEquivalentExists().
| unsigned short HexagonInstrInfo::getCExtOpNum | ( | const MachineInstr * | MI | ) | const |
Definition at line 1885 of file HexagonInstrInfo.cpp.
References llvm::HexagonII::ExtendableOpMask, llvm::HexagonII::ExtendableOpPos, F(), llvm::MachineInstr::getDesc(), and llvm::MCInstrDesc::TSFlags.
Referenced by immediateExtend(), and isConstExtended().
Definition at line 987 of file HexagonInstrInfo.cpp.
References llvm_unreachable.
Referenced by PredicateInstruction().
| int HexagonInstrInfo::GetDotNewOp | ( | const MachineInstr * | MI | ) | const |
Definition at line 1665 of file HexagonInstrInfo.cpp.
References llvm::MachineInstr::getOpcode(), and llvm_unreachable.
| int HexagonInstrInfo::getDotNewPredJumpOp | ( | MachineInstr * | MI, |
| const MachineBranchProbabilityInfo * | MBPI | ||
| ) | const |
Definition at line 1851 of file HexagonInstrInfo.cpp.
References llvm::MachineBranchProbabilityInfo::getEdgeProbability(), llvm::MachineOperand::getMBB(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), and llvm_unreachable.
Referenced by GetDotNewPredOp().
| int HexagonInstrInfo::GetDotNewPredOp | ( | MachineInstr * | MI, |
| const MachineBranchProbabilityInfo * | MBPI | ||
| ) | const |
Definition at line 1700 of file HexagonInstrInfo.cpp.
References getDotNewPredJumpOp(), llvm::MachineInstr::getOpcode(), and llvm_unreachable.
Definition at line 1649 of file HexagonInstrInfo.cpp.
References isNewValueStore(), isPredicated(), and isPredicatedNew().
Definition at line 952 of file HexagonInstrInfo.cpp.
References isPredicatedTrue(), and llvm_unreachable.
Referenced by ReverseBranchCondition().
| int HexagonInstrInfo::getMaxValue | ( | const MachineInstr * | MI | ) | const |
Definition at line 1905 of file HexagonInstrInfo.cpp.
References llvm::HexagonII::ExtentBitsMask, llvm::HexagonII::ExtentBitsPos, llvm::HexagonII::ExtentSignedMask, llvm::HexagonII::ExtentSignedPos, F(), llvm::MachineInstr::getDesc(), and llvm::MCInstrDesc::TSFlags.
Referenced by isConstExtended().
| int HexagonInstrInfo::getMinValue | ( | const MachineInstr * | MI | ) | const |
Definition at line 1891 of file HexagonInstrInfo.cpp.
References llvm::HexagonII::ExtentBitsMask, llvm::HexagonII::ExtentBitsPos, llvm::HexagonII::ExtentSignedMask, llvm::HexagonII::ExtentSignedPos, F(), llvm::MachineInstr::getDesc(), and llvm::MCInstrDesc::TSFlags.
Referenced by isConstExtended().
| short HexagonInstrInfo::getNonExtOpcode | ( | const MachineInstr * | MI | ) | const |
Definition at line 1954 of file HexagonInstrInfo.cpp.
References llvm::HexagonII::Absolute, llvm::HexagonII::BaseImmOffset, getAddrMode(), llvm::MachineInstr::getDesc(), llvm::MachineInstr::getOpcode(), llvm::MCInstrDesc::mayLoad(), and llvm::MCInstrDesc::mayStore().
| bool HexagonInstrInfo::getPredReg | ( | ArrayRef< MachineOperand > | Cond, |
| unsigned & | PredReg, | ||
| unsigned & | PredRegPos, | ||
| unsigned & | PredRegFlags | ||
| ) | const |
Definition at line 1996 of file HexagonInstrInfo.cpp.
References llvm::dbgs(), DEBUG, llvm::ArrayRef< T >::empty(), llvm::RegState::Implicit, isNewValueJump(), llvm::ArrayRef< T >::size(), and llvm::RegState::Undef.
Referenced by PredicateInstruction().
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getRegisterInfo - TargetInstrInfo is a superset of MRegister info.
As such, whenever a client has an instance of instruction info, it should always be able to get register info as well (through this method).
Definition at line 45 of file HexagonInstrInfo.h.
Referenced by expandPostRAPseudo(), llvm::HexagonSubtarget::getRegisterInfo(), INITIALIZE_PASS(), and llvm::VirtRegMap::runOnMachineFunction().
| unsigned HexagonInstrInfo::getSize | ( | const MachineInstr * | MI | ) | const |
Definition at line 1830 of file HexagonInstrInfo.cpp.
References llvm::MachineInstr::getDesc(), llvm::MCInstrDesc::getSize(), HEXAGON_INSTR_SIZE, isConstExtended(), llvm::MachineInstr::isDebugValue(), isExtended(), and llvm::MachineInstr::isPosition().
| void HexagonInstrInfo::immediateExtend | ( | MachineInstr * | MI | ) | const |
immediateExtend - Changes the instruction in place to one using an immediate extender.
Definition at line 1745 of file HexagonInstrInfo.cpp.
References llvm::MachineOperand::addTargetFlag(), getCExtOpNum(), llvm::MachineInstr::getOperand(), llvm::HexagonII::HMOTF_ConstExtended, isConstExtended(), isExtendable(), llvm::MachineOperand::isImm(), and llvm::MachineOperand::isMBB().
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Definition at line 160 of file HexagonInstrInfo.cpp.
References llvm::MachineInstrBuilder::addMBB(), llvm::MachineInstrBuilder::addReg(), AnalyzeBranch(), llvm::BuildMI(), llvm::dbgs(), DEBUG, llvm::ArrayRef< T >::empty(), llvm::MachineBasicBlock::end(), findLoopInstr(), llvm::MachineBasicBlock::getFirstTerminator(), llvm::MachineBasicBlock::getNumber(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), getReg(), llvm::getUndefRegState(), isEndLoopN(), isNewValueJump(), isPredicated(), isReg(), llvm::MachineOperand::isUndef(), llvm_unreachable, RemoveBranch(), ReverseBranchCondition(), llvm::MachineOperand::setMBB(), and llvm::ArrayRef< T >::size().
| bool HexagonInstrInfo::isBranch | ( | const MachineInstr * | MI | ) | const |
Definition at line 843 of file HexagonInstrInfo.cpp.
References llvm::MachineInstr::getDesc(), and llvm::MCInstrDesc::isBranch().
Referenced by isNewValueJump(), and ReverseBranchCondition().
| bool HexagonInstrInfo::isConditionalALU32 | ( | const MachineInstr * | MI | ) | const |
Definition at line 1406 of file HexagonInstrInfo.cpp.
References llvm::MachineInstr::getOpcode().
| bool HexagonInstrInfo::isConditionalLoad | ( | const MachineInstr * | MI | ) | const |
Definition at line 1463 of file HexagonInstrInfo.cpp.
References llvm::MachineInstr::getOpcode().
| bool HexagonInstrInfo::isConditionalStore | ( | const MachineInstr * | MI | ) | const |
Definition at line 1542 of file HexagonInstrInfo.cpp.
References llvm::MachineInstr::getOpcode().
| bool HexagonInstrInfo::isConditionalTransfer | ( | const MachineInstr * | MI | ) | const |
Definition at line 1391 of file HexagonInstrInfo.cpp.
References llvm::MachineInstr::getOpcode().
| bool HexagonInstrInfo::isConstExtended | ( | const MachineInstr * | MI | ) | const |
Definition at line 1783 of file HexagonInstrInfo.cpp.
References llvm::HexagonII::ExtendableMask, llvm::HexagonII::ExtendablePos, llvm::HexagonII::ExtendedMask, llvm::HexagonII::ExtendedPos, F(), getCExtOpNum(), llvm::MachineInstr::getDesc(), llvm::MachineOperand::getImm(), getMaxValue(), getMinValue(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getTargetFlags(), llvm::HexagonII::HMOTF_ConstExtended, llvm::MachineOperand::isBlockAddress(), llvm::MachineOperand::isCPI(), isExtendable(), isExtended(), llvm::MachineOperand::isGlobal(), llvm::MachineOperand::isImm(), llvm::MachineOperand::isJTI(), llvm::MachineOperand::isMBB(), llvm::MachineOperand::isSymbol(), and llvm::MCInstrDesc::TSFlags.
Referenced by getSize(), immediateExtend(), and isPredicable().
| bool HexagonInstrInfo::isDeallocRet | ( | const MachineInstr * | MI | ) | const |
Definition at line 1198 of file HexagonInstrInfo.cpp.
References llvm::MachineInstr::getOpcode().
| bool HexagonInstrInfo::isDotNewInst | ( | const MachineInstr * | MI | ) | const |
Definition at line 1635 of file HexagonInstrInfo.cpp.
References isNewValueInst(), isPredicated(), and isPredicatedNew().
Definition at line 1991 of file HexagonInstrInfo.cpp.
Referenced by AnalyzeBranch(), InsertBranch(), PredicateInstruction(), and ReverseBranchCondition().
| bool HexagonInstrInfo::isExtendable | ( | const MachineInstr * | MI | ) | const |
Definition at line 807 of file HexagonInstrInfo.cpp.
References llvm::HexagonII::ExtendableMask, llvm::HexagonII::ExtendablePos, F(), llvm::MachineInstr::getDesc(), llvm::MachineInstr::getOpcode(), and llvm::MCInstrDesc::TSFlags.
Referenced by immediateExtend(), and isConstExtended().
| bool HexagonInstrInfo::isExtended | ( | const MachineInstr * | MI | ) | const |
Definition at line 828 of file HexagonInstrInfo.cpp.
References llvm::HexagonII::ExtendedMask, llvm::HexagonII::ExtendedPos, F(), llvm::MachineInstr::getDesc(), llvm::HexagonII::HMOTF_ConstExtended, I, llvm::MachineInstr::operands_begin(), llvm::MachineInstr::operands_end(), and llvm::MCInstrDesc::TSFlags.
Referenced by getSize(), and isConstExtended().
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isLoadFromStackSlot - If the specified machine instruction is a direct load from a stack slot, return the virtual or physical register number of the destination along with the FrameIndex of the loaded stack slot.
If not, return 0. This predicate must return 0 if the instruction has any side effects other than loading from the stack slot.
Definition at line 73 of file HexagonInstrInfo.cpp.
References llvm::MachineOperand::getImm(), llvm::MachineOperand::getIndex(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isFI(), and llvm::MachineOperand::isImm().
| bool HexagonInstrInfo::isMemOp | ( | const MachineInstr * | MI | ) | const |
Definition at line 1331 of file HexagonInstrInfo.cpp.
References llvm::MachineInstr::getOpcode().
| bool HexagonInstrInfo::isNewValue | ( | const MachineInstr * | MI | ) | const |
Definition at line 857 of file HexagonInstrInfo.cpp.
References F(), llvm::MachineInstr::getDesc(), llvm::HexagonII::NewValueMask, llvm::HexagonII::NewValuePos, and llvm::MCInstrDesc::TSFlags.
Referenced by isNewValueJump().
Definition at line 862 of file HexagonInstrInfo.cpp.
References F(), llvm::HexagonII::NewValueMask, and llvm::HexagonII::NewValuePos.
| bool HexagonInstrInfo::isNewValueInst | ( | const MachineInstr * | MI | ) | const |
Definition at line 847 of file HexagonInstrInfo.cpp.
References isNewValueJump(), and isNewValueStore().
Referenced by isDotNewInst().
| bool HexagonInstrInfo::isNewValueJump | ( | const MachineInstr * | MI | ) | const |
Definition at line 1619 of file HexagonInstrInfo.cpp.
References isBranch(), and isNewValue().
Referenced by AnalyzeBranch(), getPredReg(), InsertBranch(), and isNewValueInst().
Definition at line 1625 of file HexagonInstrInfo.cpp.
References isBranch(), isNewValue(), and isPredicated().
| bool HexagonInstrInfo::isNewValueJumpCandidate | ( | const MachineInstr * | MI | ) | const |
Definition at line 1377 of file HexagonInstrInfo.cpp.
References llvm::MachineInstr::getOpcode().
| bool HexagonInstrInfo::isNewValueStore | ( | const MachineInstr * | MI | ) | const |
Definition at line 975 of file HexagonInstrInfo.cpp.
References F(), llvm::MachineInstr::getDesc(), llvm::HexagonII::NVStoreMask, llvm::HexagonII::NVStorePos, and llvm::MCInstrDesc::TSFlags.
Referenced by GetDotOldOp(), and isNewValueInst().
Definition at line 981 of file HexagonInstrInfo.cpp.
References F(), llvm::HexagonII::NVStoreMask, and llvm::HexagonII::NVStorePos.
| bool HexagonInstrInfo::isOperandExtended | ( | const MachineInstr * | MI, |
| unsigned short | OperandNum | ||
| ) | const |
Definition at line 1876 of file HexagonInstrInfo.cpp.
References llvm::HexagonII::ExtendableOpMask, llvm::HexagonII::ExtendableOpPos, F(), llvm::MachineInstr::getDesc(), and llvm::MCInstrDesc::TSFlags.
Referenced by isPredicable().
| bool HexagonInstrInfo::isPostIncrement | ( | const MachineInstr * | MI | ) | const |
Definition at line 1629 of file HexagonInstrInfo.cpp.
References getAddrMode(), and llvm::HexagonII::PostInc.
Referenced by GetPostIncrementOperand().
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Definition at line 871 of file HexagonInstrInfo.cpp.
References llvm::MachineInstr::getDesc(), llvm::MachineOperand::getImm(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), isConstExtended(), llvm::isInt< 8 >(), isOperandExtended(), and llvm::MCInstrDesc::isPredicable().
Referenced by PredicateInstruction().
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Definition at line 1095 of file HexagonInstrInfo.cpp.
References F(), llvm::MachineInstr::getDesc(), llvm::HexagonII::PredicatedMask, llvm::HexagonII::PredicatedPos, and llvm::MCInstrDesc::TSFlags.
Referenced by GetDotOldOp(), getPredicatedRegister(), getPredicateSense(), InsertBranch(), isDotNewInst(), isNewValueJump(), isPredicatedNew(), isPredicatedTrue(), and predOpcodeHasNot().
Definition at line 1101 of file HexagonInstrInfo.cpp.
References F(), llvm::HexagonII::PredicatedMask, and llvm::HexagonII::PredicatedPos.
| bool HexagonInstrInfo::isPredicatedNew | ( | const MachineInstr * | MI | ) | const |
Definition at line 1124 of file HexagonInstrInfo.cpp.
References F(), llvm::MachineInstr::getDesc(), isPredicated(), llvm::HexagonII::PredicatedNewMask, llvm::HexagonII::PredicatedNewPos, and llvm::MCInstrDesc::TSFlags.
Referenced by GetDotOldOp(), and isDotNewInst().
Definition at line 1131 of file HexagonInstrInfo.cpp.
References F(), isPredicated(), llvm::HexagonII::PredicatedNewMask, and llvm::HexagonII::PredicatedNewPos.
| bool HexagonInstrInfo::isPredicatedTrue | ( | const MachineInstr * | MI | ) | const |
Definition at line 1107 of file HexagonInstrInfo.cpp.
References F(), llvm::MachineInstr::getDesc(), isPredicated(), llvm::HexagonII::PredicatedFalseMask, llvm::HexagonII::PredicatedFalsePos, and llvm::MCInstrDesc::TSFlags.
Referenced by getInvertedPredicatedOpcode(), getPredicateSense(), and predOpcodeHasNot().
Definition at line 1115 of file HexagonInstrInfo.cpp.
References F(), llvm::HexagonII::PredicatedFalseMask, llvm::HexagonII::PredicatedFalsePos, llvm::HexagonII::PredicatedMask, and llvm::HexagonII::PredicatedPos.
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Definition at line 1193 of file HexagonInstrInfo.cpp.
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Definition at line 1069 of file HexagonInstrInfo.cpp.
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Definition at line 1079 of file HexagonInstrInfo.cpp.
| bool HexagonInstrInfo::isSaveCalleeSavedRegsCall | ( | const MachineInstr * | MI | ) | const |
Definition at line 867 of file HexagonInstrInfo.cpp.
References llvm::MachineInstr::getOpcode().
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Definition at line 1764 of file HexagonInstrInfo.cpp.
References llvm::MachineInstr::getDesc(), llvm::MachineInstr::isDebugValue(), llvm::MachineInstr::isInlineAsm(), llvm::MachineInstr::isPosition(), and llvm::MCInstrDesc::isTerminator().
| bool HexagonInstrInfo::isSpillPredRegOp | ( | const MachineInstr * | MI | ) | const |
Definition at line 1368 of file HexagonInstrInfo.cpp.
References llvm::MachineInstr::getOpcode().
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isStoreToStackSlot - If the specified machine instruction is a direct store to a stack slot, return the virtual or physical register number of the source reg along with the FrameIndex of the loaded stack slot.
If not, return 0. This predicate must return 0 if the instruction has any side effects other than storing to the stack slot.
Definition at line 100 of file HexagonInstrInfo.cpp.
References llvm::MachineOperand::getImm(), llvm::MachineOperand::getIndex(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isFI(), and llvm::MachineOperand::isImm().
Definition at line 1305 of file HexagonInstrInfo.cpp.
References Hexagon_MEMB_AUTOINC_MAX, Hexagon_MEMB_AUTOINC_MIN, Hexagon_MEMD_AUTOINC_MAX, Hexagon_MEMD_AUTOINC_MIN, Hexagon_MEMH_AUTOINC_MAX, Hexagon_MEMH_AUTOINC_MIN, Hexagon_MEMW_AUTOINC_MAX, Hexagon_MEMW_AUTOINC_MIN, llvm::MVT::i16, llvm::MVT::i32, llvm::MVT::i64, llvm::MVT::i8, and llvm_unreachable.
Definition at line 1213 of file HexagonInstrInfo.cpp.
References Hexagon_ADDI_OFFSET_MAX, Hexagon_ADDI_OFFSET_MIN, Hexagon_MEMB_OFFSET_MAX, Hexagon_MEMB_OFFSET_MIN, Hexagon_MEMD_OFFSET_MAX, Hexagon_MEMD_OFFSET_MIN, Hexagon_MEMH_OFFSET_MAX, Hexagon_MEMH_OFFSET_MIN, Hexagon_MEMW_OFFSET_MAX, Hexagon_MEMW_OFFSET_MIN, llvm::ISD::INLINEASM, and llvm_unreachable.
| void HexagonInstrInfo::loadRegFromAddr | ( | MachineFunction & | MF, |
| unsigned | DestReg, | ||
| SmallVectorImpl< MachineOperand > & | Addr, | ||
| const TargetRegisterClass * | RC, | ||
| SmallVectorImpl< MachineInstr * > & | NewMIs | ||
| ) | const |
Definition at line 685 of file HexagonInstrInfo.cpp.
References llvm_unreachable.
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Definition at line 655 of file HexagonInstrInfo.cpp.
References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMemOperand(), Align(), llvm::BuildMI(), llvm::DL, llvm::MachineBasicBlock::findDebugLoc(), llvm::PseudoSourceValue::getFixedStack(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getMachineMemOperand(), llvm::MachineFrameInfo::getObjectAlignment(), llvm::MachineFrameInfo::getObjectSize(), llvm::MachineBasicBlock::getParent(), llvm_unreachable, and llvm::MachineMemOperand::MOLoad.
| bool HexagonInstrInfo::mayBeNewStore | ( | const MachineInstr * | MI | ) | const |
Definition at line 1139 of file HexagonInstrInfo.cpp.
References F(), llvm::MachineInstr::getDesc(), llvm::HexagonII::mayNVStoreMask, llvm::HexagonII::mayNVStorePos, and llvm::MCInstrDesc::TSFlags.
| bool HexagonInstrInfo::NonExtEquivalentExists | ( | const MachineInstr * | MI | ) | const |
Definition at line 1920 of file HexagonInstrInfo.cpp.
References llvm::HexagonII::Absolute, llvm::HexagonII::BaseImmOffset, getAddrMode(), llvm::MachineInstr::getDesc(), llvm::MachineInstr::getOpcode(), llvm::MCInstrDesc::mayLoad(), and llvm::MCInstrDesc::mayStore().
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Definition at line 1015 of file HexagonInstrInfo.cpp.
References llvm::MachineInstrBuilder::addOperand(), llvm::MachineInstr::addOperand(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::MachineRegisterInfo::clearKillFlags(), llvm::dbgs(), DEBUG, llvm::DL, llvm::MachineInstr::dump(), llvm::ArrayRef< T >::empty(), llvm::MachineBasicBlock::erase(), getCondOpcode(), llvm::MachineInstr::getDebugLoc(), llvm::MachineInstr::getNumOperands(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), getPredReg(), llvm::MachineFunction::getRegInfo(), llvm::MachineOperand::isDef(), isEndLoopN(), llvm::MachineOperand::isImplicit(), isPredicable(), llvm::MachineOperand::isReg(), predOpcodeHasNot(), llvm::MachineInstr::RemoveOperand(), llvm::MachineInstr::setDesc(), and T.
Definition at line 1976 of file HexagonInstrInfo.cpp.
Referenced by AnalyzeBranch().
| bool HexagonInstrInfo::predOpcodeHasNot | ( | ArrayRef< MachineOperand > | Cond | ) | const |
Definition at line 1985 of file HexagonInstrInfo.cpp.
References llvm::ArrayRef< T >::empty(), isPredicated(), and isPredicatedTrue().
Referenced by PredicateInstruction().
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Definition at line 441 of file HexagonInstrInfo.cpp.
References llvm::MachineBasicBlock::back(), llvm::MachineBasicBlock::begin(), llvm::dbgs(), DEBUG, llvm::MachineBasicBlock::end(), llvm::MachineBasicBlock::erase(), llvm::MachineBasicBlock::getNumber(), I, and llvm_unreachable.
Referenced by InsertBranch().
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Definition at line 1176 of file HexagonInstrInfo.cpp.
References llvm::SmallVectorBase::empty(), getInvertedPredicatedOpcode(), isBranch(), and isEndLoopN().
Referenced by InsertBranch().
| void HexagonInstrInfo::storeRegToAddr | ( | MachineFunction & | MF, |
| unsigned | SrcReg, | ||
| bool | isKill, | ||
| SmallVectorImpl< MachineOperand > & | Addr, | ||
| const TargetRegisterClass * | RC, | ||
| SmallVectorImpl< MachineInstr * > & | NewMIs | ||
| ) | const |
Definition at line 643 of file HexagonInstrInfo.cpp.
References llvm_unreachable.
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Definition at line 608 of file HexagonInstrInfo.cpp.
References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMemOperand(), llvm::MachineInstrBuilder::addReg(), Align(), llvm::BuildMI(), llvm::DL, llvm::MachineBasicBlock::findDebugLoc(), llvm::PseudoSourceValue::getFixedStack(), llvm::MachineFunction::getFrameInfo(), llvm::getKillRegState(), llvm::MachineFunction::getMachineMemOperand(), llvm::MachineFrameInfo::getObjectAlignment(), llvm::MachineFrameInfo::getObjectSize(), llvm::MachineBasicBlock::getParent(), llvm_unreachable, and llvm::MachineMemOperand::MOStore.
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Definition at line 1165 of file HexagonInstrInfo.cpp.
1.8.6