LLVM  3.7.0
Public Member Functions | Protected Types | Protected Attributes | List of all members
llvm::ARMSubtarget Class Reference

#include <ARMSubtarget.h>

Inheritance diagram for llvm::ARMSubtarget:
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Collaboration diagram for llvm::ARMSubtarget:
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Public Member Functions

 ARMSubtarget (const Triple &TT, const std::string &CPU, const std::string &FS, const ARMBaseTargetMachine &TM, bool IsLittle)
 This constructor initializes the data members to match that of the specified triple. More...
 
unsigned getMaxInlineSizeThreshold () const
 getMaxInlineSizeThreshold - Returns the maximum memset / memcpy size that still makes it profitable to inline the call. More...
 
void ParseSubtargetFeatures (StringRef CPU, StringRef FS)
 ParseSubtargetFeatures - Parses features string setting specified subtarget options. More...
 
ARMSubtargetinitializeSubtargetDependencies (StringRef CPU, StringRef FS)
 initializeSubtargetDependencies - Initializes using a CPU and feature string so that we can use initializer lists for subtarget initialization. More...
 
const ARMSelectionDAGInfogetSelectionDAGInfo () const override
 
const ARMBaseInstrInfogetInstrInfo () const override
 
const ARMTargetLoweringgetTargetLowering () const override
 
const ARMFrameLoweringgetFrameLowering () const override
 
const ARMBaseRegisterInfogetRegisterInfo () const override
 
void computeIssueWidth ()
 
bool hasV4TOps () const
 
bool hasV5TOps () const
 
bool hasV5TEOps () const
 
bool hasV6Ops () const
 
bool hasV6MOps () const
 
bool hasV6KOps () const
 
bool hasV6T2Ops () const
 
bool hasV7Ops () const
 
bool hasV8Ops () const
 
bool hasV8_1aOps () const
 
bool isCortexA5 () const
 
bool isCortexA7 () const
 
bool isCortexA8 () const
 
bool isCortexA9 () const
 
bool isCortexA15 () const
 
bool isSwift () const
 
bool isCortexM3 () const
 
bool isLikeA9 () const
 
bool isCortexR5 () const
 
bool isKrait () const
 
bool hasARMOps () const
 
bool hasVFP2 () const
 
bool hasVFP3 () const
 
bool hasVFP4 () const
 
bool hasFPARMv8 () const
 
bool hasNEON () const
 
bool hasCrypto () const
 
bool hasCRC () const
 
bool hasVirtualization () const
 
bool useNEONForSinglePrecisionFP () const
 
bool hasDivide () const
 
bool hasDivideInARMMode () const
 
bool hasT2ExtractPack () const
 
bool hasDataBarrier () const
 
bool hasAnyDataBarrier () const
 
bool useMulOps () const
 
bool useFPVMLx () const
 
bool hasVMLxForwarding () const
 
bool isFPBrccSlow () const
 
bool isFPOnlySP () const
 
bool hasPerfMon () const
 
bool hasTrustZone () const
 
bool hasZeroCycleZeroing () const
 
bool prefers32BitThumb () const
 
bool avoidCPSRPartialUpdate () const
 
bool avoidMOVsShifterOperand () const
 
bool hasRAS () const
 
bool hasMPExtension () const
 
bool hasThumb2DSP () const
 
bool useNaClTrap () const
 
bool genLongCalls () const
 
bool hasFP16 () const
 
bool hasD16 () const
 
const TriplegetTargetTriple () const
 
bool isTargetDarwin () const
 
bool isTargetIOS () const
 
bool isTargetLinux () const
 
bool isTargetNaCl () const
 
bool isTargetNetBSD () const
 
bool isTargetWindows () const
 
bool isTargetCOFF () const
 
bool isTargetELF () const
 
bool isTargetMachO () const
 
bool isTargetAEABI () const
 
bool isTargetEHABICompatible () const
 
bool isTargetHardFloat () const
 
bool isTargetAndroid () const
 
bool isAPCS_ABI () const
 
bool isAAPCS_ABI () const
 
bool useSoftFloat () const
 
bool isThumb () const
 
bool isThumb1Only () const
 
bool isThumb2 () const
 
bool hasThumb2 () const
 
bool isMClass () const
 
bool isRClass () const
 
bool isAClass () const
 
bool isV6M () const
 
bool isR9Reserved () const
 
bool useMovt (const MachineFunction &MF) const
 
bool supportsTailCall () const
 
bool allowsUnalignedMem () const
 
bool restrictIT () const
 
const std::string & getCPUString () const
 
bool isLittle () const
 
unsigned getMispredictionPenalty () const
 
bool hasSinCos () const
 This function returns true if the target has sincos() routine in its compiler runtime or math libraries. More...
 
bool enablePostRAScheduler () const override
 True for some subtargets at > -O0. More...
 
bool enableAtomicExpand () const override
 
const InstrItineraryDatagetInstrItineraryData () const override
 getInstrItins - Return the instruction itineraries based on subtarget selection. More...
 
unsigned getStackAlignment () const
 getStackAlignment - Returns the minimum alignment known to hold of the stack frame on entry to the function and which must be maintained by every function for this subtarget. More...
 
bool GVIsIndirectSymbol (const GlobalValue *GV, Reloc::Model RelocM) const
 GVIsIndirectSymbol - true if the GV will be accessed via an indirect symbol. More...
 
bool useFastISel () const
 True if fast-isel is used. More...
 

Protected Types

enum  ARMProcFamilyEnum {
  Others, CortexA5, CortexA7, CortexA8,
  CortexA9, CortexA12, CortexA15, CortexA17,
  CortexR4, CortexR4F, CortexR5, Swift,
  CortexA53, CortexA57, Krait
}
 
enum  ARMProcClassEnum { None, AClass, RClass, MClass }
 

Protected Attributes

ARMProcFamilyEnum ARMProcFamily
 ARMProcFamily - ARM processor family: Cortex-A8, Cortex-A9, and others. More...
 
ARMProcClassEnum ARMProcClass
 ARMProcClass - ARM processor class: None, AClass, RClass or MClass. More...
 
bool HasV4TOps
 HasV4TOps, HasV5TOps, HasV5TEOps, HasV6Ops, HasV6MOps, HasV6KOps, HasV6T2Ops, HasV7Ops, HasV8Ops - Specify whether target support specific ARM ISA variants. More...
 
bool HasV5TOps
 
bool HasV5TEOps
 
bool HasV6Ops
 
bool HasV6MOps
 
bool HasV6KOps
 
bool HasV6T2Ops
 
bool HasV7Ops
 
bool HasV8Ops
 
bool HasV8_1aOps
 
bool HasVFPv2
 HasVFPv2, HasVFPv3, HasVFPv4, HasFPARMv8, HasNEON - Specify what floating point ISAs are supported. More...
 
bool HasVFPv3
 
bool HasVFPv4
 
bool HasFPARMv8
 
bool HasNEON
 
bool UseNEONForSinglePrecisionFP
 UseNEONForSinglePrecisionFP - if the NEONFP attribute has been specified. More...
 
bool UseMulOps
 UseMulOps - True if non-microcoded fused integer multiply-add and multiply-subtract instructions should be used. More...
 
bool SlowFPVMLx
 SlowFPVMLx - If the VFP2 / NEON instructions are available, indicates whether the FP VML[AS] instructions are slow (if so, don't use them). More...
 
bool HasVMLxForwarding
 HasVMLxForwarding - If true, NEON has special multiplier accumulator forwarding to allow mul + mla being issued back to back. More...
 
bool SlowFPBrcc
 SlowFPBrcc - True if floating point compare + branch is slow. More...
 
bool InThumbMode
 InThumbMode - True if compiling for Thumb, false for ARM. More...
 
bool UseSoftFloat
 UseSoftFloat - True if we're using software floating point features. More...
 
bool HasThumb2
 HasThumb2 - True if Thumb2 instructions are supported. More...
 
bool NoARM
 NoARM - True if subtarget does not support ARM mode execution. More...
 
bool IsR9Reserved
 IsR9Reserved - True if R9 is a not available as general purpose register. More...
 
bool UseMovt
 UseMovt - True if MOVT / MOVW pairs are used for materialization of 32-bit imms (including global addresses). More...
 
bool SupportsTailCall
 SupportsTailCall - True if the OS supports tail call. More...
 
bool HasFP16
 HasFP16 - True if subtarget supports half-precision FP (We support VFP+HF only so far) More...
 
bool HasD16
 HasD16 - True if subtarget is limited to 16 double precision FP registers for VFPv3. More...
 
bool HasHardwareDivide
 HasHardwareDivide - True if subtarget supports [su]div. More...
 
bool HasHardwareDivideInARM
 HasHardwareDivideInARM - True if subtarget supports [su]div in ARM mode. More...
 
bool HasT2ExtractPack
 HasT2ExtractPack - True if subtarget supports thumb2 extract/pack instructions. More...
 
bool HasDataBarrier
 HasDataBarrier - True if the subtarget supports DMB / DSB data barrier instructions. More...
 
bool Pref32BitThumb
 Pref32BitThumb - If true, codegen would prefer 32-bit Thumb instructions over 16-bit ones. More...
 
bool AvoidCPSRPartialUpdate
 AvoidCPSRPartialUpdate - If true, codegen would avoid using instructions that partially update CPSR and add false dependency on the previous CPSR setting instruction. More...
 
bool AvoidMOVsShifterOperand
 AvoidMOVsShifterOperand - If true, codegen should avoid using flag setting movs with shifter operand (i.e. More...
 
bool HasRAS
 HasRAS - Some processors perform return stack prediction. More...
 
bool HasMPExtension
 HasMPExtension - True if the subtarget supports Multiprocessing extension (ARMv7 only). More...
 
bool HasVirtualization
 HasVirtualization - True if the subtarget supports the Virtualization extension. More...
 
bool FPOnlySP
 FPOnlySP - If true, the floating point unit only supports single precision. More...
 
bool HasPerfMon
 If true, the processor supports the Performance Monitor Extensions. More...
 
bool HasTrustZone
 HasTrustZone - if true, processor supports TrustZone security extensions. More...
 
bool HasCrypto
 HasCrypto - if true, processor supports Cryptography extensions. More...
 
bool HasCRC
 HasCRC - if true, processor supports CRC instructions. More...
 
bool HasZeroCycleZeroing
 If true, the instructions "vmov.i32 d0, #0" and "vmov.i32 q0, #0" are particularly effective at zeroing a VFP register. More...
 
bool AllowsUnalignedMem
 AllowsUnalignedMem - If true, the subtarget allows unaligned memory accesses for some types. More...
 
bool RestrictIT
 RestrictIT - If true, the subtarget disallows generation of deprecated IT blocks to conform to ARMv8 rule. More...
 
bool Thumb2DSP
 Thumb2DSP - If true, the subtarget supports the v7 DSP (saturating arith and such) instructions in Thumb2 code. More...
 
bool UseNaClTrap
 NaCl TRAP instruction is generated instead of the regular TRAP. More...
 
bool GenLongCalls
 Generate calls via indirect call instructions. More...
 
bool UnsafeFPMath
 Target machine allowed unsafe FP math (such as use of NEON fp) More...
 
unsigned stackAlignment
 stackAlignment - The minimum alignment known to hold of the stack frame on entry to the function and which must be maintained by every function. More...
 
std::string CPUString
 CPUString - String name of used CPU. More...
 
bool IsLittle
 IsLittle - The target is Little Endian. More...
 
Triple TargetTriple
 TargetTriple - What processor and OS we're targeting. More...
 
MCSchedModel SchedModel
 SchedModel - Processor specific instruction costs. More...
 
InstrItineraryData InstrItins
 Selected instruction itineraries (one entry per itinerary class.) More...
 
const TargetOptionsOptions
 Options passed via command line that could influence the target. More...
 
const ARMBaseTargetMachineTM
 

Detailed Description

Definition at line 42 of file ARMSubtarget.h.

Member Enumeration Documentation

Enumerator
None 
AClass 
RClass 
MClass 

Definition at line 48 of file ARMSubtarget.h.

Enumerator
Others 
CortexA5 
CortexA7 
CortexA8 
CortexA9 
CortexA12 
CortexA15 
CortexA17 
CortexR4 
CortexR4F 
CortexR5 
Swift 
CortexA53 
CortexA57 
Krait 

Definition at line 44 of file ARMSubtarget.h.

Constructor & Destructor Documentation

ARMSubtarget::ARMSubtarget ( const Triple TT,
const std::string &  CPU,
const std::string &  FS,
const ARMBaseTargetMachine TM,
bool  IsLittle 
)

This constructor initializes the data members to match that of the specified triple.

Definition at line 109 of file ARMSubtarget.cpp.

Member Function Documentation

bool llvm::ARMSubtarget::allowsUnalignedMem ( ) const
inline
bool llvm::ARMSubtarget::avoidCPSRPartialUpdate ( ) const
inline

Definition at line 342 of file ARMSubtarget.h.

References AvoidCPSRPartialUpdate.

bool llvm::ARMSubtarget::avoidMOVsShifterOperand ( ) const
inline

Definition at line 343 of file ARMSubtarget.h.

References AvoidMOVsShifterOperand.

void llvm::ARMSubtarget::computeIssueWidth ( )
bool ARMSubtarget::enableAtomicExpand ( ) const
override

Definition at line 332 of file ARMSubtarget.cpp.

References hasAnyDataBarrier(), and isThumb1Only().

bool ARMSubtarget::enablePostRAScheduler ( ) const
override

True for some subtargets at > -O0.

Definition at line 328 of file ARMSubtarget.cpp.

References hasThumb2(), and isThumb().

bool llvm::ARMSubtarget::genLongCalls ( ) const
inline

Definition at line 348 of file ARMSubtarget.h.

References GenLongCalls.

const std::string& llvm::ARMSubtarget::getCPUString ( ) const
inline

Definition at line 426 of file ARMSubtarget.h.

References CPUString.

Referenced by llvm::ARMTargetMachine::ARMTargetMachine().

const ARMFrameLowering* llvm::ARMSubtarget::getFrameLowering ( ) const
inlineoverride
const ARMBaseInstrInfo* llvm::ARMSubtarget::getInstrInfo ( ) const
inlineoverride
const InstrItineraryData* llvm::ARMSubtarget::getInstrItineraryData ( ) const
inlineoverride

getInstrItins - Return the instruction itineraries based on subtarget selection.

Definition at line 444 of file ARMSubtarget.h.

References InstrItins.

Referenced by llvm::ARMTargetLowering::ARMTargetLowering().

unsigned llvm::ARMSubtarget::getMaxInlineSizeThreshold ( ) const
inline

getMaxInlineSizeThreshold - Returns the maximum memset / memcpy size that still makes it profitable to inline the call.

Definition at line 248 of file ARMSubtarget.h.

Referenced by llvm::ARMSelectionDAGInfo::EmitTargetCodeForMemcpy().

unsigned ARMSubtarget::getMispredictionPenalty ( ) const
const ARMBaseRegisterInfo* llvm::ARMSubtarget::getRegisterInfo ( ) const
inlineoverride
const ARMSelectionDAGInfo* llvm::ARMSubtarget::getSelectionDAGInfo ( ) const
inlineoverride

Definition at line 259 of file ARMSubtarget.h.

unsigned llvm::ARMSubtarget::getStackAlignment ( ) const
inline

getStackAlignment - Returns the minimum alignment known to hold of the stack frame on entry to the function and which must be maintained by every function for this subtarget.

Definition at line 451 of file ARMSubtarget.h.

References stackAlignment.

const ARMTargetLowering* llvm::ARMSubtarget::getTargetLowering ( ) const
inlineoverride

Definition at line 265 of file ARMSubtarget.h.

Referenced by llvm::ARMSelectionDAGInfo::EmitSpecializedLibcall().

const Triple& llvm::ARMSubtarget::getTargetTriple ( ) const
inline
bool ARMSubtarget::GVIsIndirectSymbol ( const GlobalValue GV,
Reloc::Model  RelocM 
) const
bool llvm::ARMSubtarget::hasAnyDataBarrier ( ) const
inline
bool llvm::ARMSubtarget::hasARMOps ( ) const
inline
bool llvm::ARMSubtarget::hasCRC ( ) const
inline

Definition at line 320 of file ARMSubtarget.h.

References HasCRC.

bool llvm::ARMSubtarget::hasCrypto ( ) const
inline

Definition at line 319 of file ARMSubtarget.h.

References HasCrypto.

bool llvm::ARMSubtarget::hasD16 ( ) const
inline

Definition at line 351 of file ARMSubtarget.h.

References HasD16.

Referenced by llvm::ARMBaseRegisterInfo::getReservedRegs().

bool llvm::ARMSubtarget::hasDataBarrier ( ) const
inline

Definition at line 329 of file ARMSubtarget.h.

References HasDataBarrier.

Referenced by LowerATOMIC_FENCE(), and llvm::ARMTargetLowering::makeDMB().

bool llvm::ARMSubtarget::hasDivide ( ) const
inline

Definition at line 326 of file ARMSubtarget.h.

References HasHardwareDivide.

Referenced by llvm::ARMTargetLowering::ARMTargetLowering().

bool llvm::ARMSubtarget::hasDivideInARMMode ( ) const
inline

Definition at line 327 of file ARMSubtarget.h.

References HasHardwareDivideInARM.

Referenced by llvm::ARMTargetLowering::ARMTargetLowering().

bool llvm::ARMSubtarget::hasFP16 ( ) const
inline

Definition at line 350 of file ARMSubtarget.h.

References HasFP16.

Referenced by llvm::ARMTargetLowering::ARMTargetLowering().

bool llvm::ARMSubtarget::hasFPARMv8 ( ) const
inline

Definition at line 317 of file ARMSubtarget.h.

References HasFPARMv8.

Referenced by llvm::ARMTargetLowering::ARMTargetLowering().

bool llvm::ARMSubtarget::hasMPExtension ( ) const
inline

Definition at line 345 of file ARMSubtarget.h.

References HasMPExtension.

Referenced by LowerPREFETCH().

bool llvm::ARMSubtarget::hasNEON ( ) const
inline
bool llvm::ARMSubtarget::hasPerfMon ( ) const
inline

Definition at line 338 of file ARMSubtarget.h.

References HasPerfMon.

Referenced by ReplaceREADCYCLECOUNTER().

bool llvm::ARMSubtarget::hasRAS ( ) const
inline

Definition at line 344 of file ARMSubtarget.h.

References HasRAS.

bool ARMSubtarget::hasSinCos ( ) const

This function returns true if the target has sincos() routine in its compiler runtime or math libraries.

Definition at line 323 of file ARMSubtarget.cpp.

References getTargetTriple(), llvm::Triple::isiOS(), and llvm::Triple::isOSVersionLT().

Referenced by llvm::ARMTargetLowering::ARMTargetLowering().

bool llvm::ARMSubtarget::hasT2ExtractPack ( ) const
inline

Definition at line 328 of file ARMSubtarget.h.

References HasT2ExtractPack.

Referenced by PerformORCombine().

bool llvm::ARMSubtarget::hasThumb2 ( ) const
inline

Definition at line 407 of file ARMSubtarget.h.

References HasThumb2.

Referenced by enablePostRAScheduler().

bool llvm::ARMSubtarget::hasThumb2DSP ( ) const
inline
bool llvm::ARMSubtarget::hasTrustZone ( ) const
inline

Definition at line 339 of file ARMSubtarget.h.

References HasTrustZone.

bool llvm::ARMSubtarget::hasV4TOps ( ) const
inline
bool llvm::ARMSubtarget::hasV5TEOps ( ) const
inline
bool llvm::ARMSubtarget::hasV5TOps ( ) const
inline
bool llvm::ARMSubtarget::hasV6KOps ( ) const
inline

Definition at line 295 of file ARMSubtarget.h.

References HasV6KOps.

bool llvm::ARMSubtarget::hasV6MOps ( ) const
inline

Definition at line 294 of file ARMSubtarget.h.

References HasV6MOps.

Referenced by getArchForCPU().

bool llvm::ARMSubtarget::hasV6Ops ( ) const
inline
bool llvm::ARMSubtarget::hasV6T2Ops ( ) const
inline
bool llvm::ARMSubtarget::hasV7Ops ( ) const
inline
bool llvm::ARMSubtarget::hasV8_1aOps ( ) const
inline

Definition at line 299 of file ARMSubtarget.h.

References HasV8_1aOps.

bool llvm::ARMSubtarget::hasV8Ops ( ) const
inline

Definition at line 298 of file ARMSubtarget.h.

References HasV8Ops.

Referenced by llvm::ARMTargetLowering::ARMTargetLowering(), and getArchForCPU().

bool llvm::ARMSubtarget::hasVFP2 ( ) const
inline
bool llvm::ARMSubtarget::hasVFP3 ( ) const
inline
bool llvm::ARMSubtarget::hasVFP4 ( ) const
inline

Definition at line 316 of file ARMSubtarget.h.

References HasVFPv4.

Referenced by llvm::ARMTargetLowering::ARMTargetLowering().

bool llvm::ARMSubtarget::hasVirtualization ( ) const
inline

Definition at line 321 of file ARMSubtarget.h.

References HasVirtualization.

bool llvm::ARMSubtarget::hasVMLxForwarding ( ) const
inline

Definition at line 335 of file ARMSubtarget.h.

References HasVMLxForwarding.

Referenced by PerformVMULCombine().

bool llvm::ARMSubtarget::hasZeroCycleZeroing ( ) const
inline

Definition at line 340 of file ARMSubtarget.h.

References HasZeroCycleZeroing.

ARMSubtarget & ARMSubtarget::initializeSubtargetDependencies ( StringRef  CPU,
StringRef  FS 
)

initializeSubtargetDependencies - Initializes using a CPU and feature string so that we can use initializer lists for subtarget initialization.

Definition at line 93 of file ARMSubtarget.cpp.

bool ARMSubtarget::isAAPCS_ABI ( ) const
bool llvm::ARMSubtarget::isAClass ( ) const
inline

Definition at line 410 of file ARMSubtarget.h.

References AClass, and ARMProcClass.

bool ARMSubtarget::isAPCS_ABI ( ) const
bool llvm::ARMSubtarget::isCortexA15 ( ) const
inline
bool llvm::ARMSubtarget::isCortexA5 ( ) const
inline

Definition at line 301 of file ARMSubtarget.h.

References ARMProcFamily, and CortexA5.

bool llvm::ARMSubtarget::isCortexA7 ( ) const
inline
bool llvm::ARMSubtarget::isCortexA8 ( ) const
inline
bool llvm::ARMSubtarget::isCortexA9 ( ) const
inline

Definition at line 304 of file ARMSubtarget.h.

References ARMProcFamily, and CortexA9.

Referenced by llvm::ARMBaseInstrInfo::getExecutionDomain(), and isLikeA9().

bool llvm::ARMSubtarget::isCortexM3 ( ) const
inline

Definition at line 307 of file ARMSubtarget.h.

References CPUString.

bool llvm::ARMSubtarget::isCortexR5 ( ) const
inline

Definition at line 309 of file ARMSubtarget.h.

References ARMProcFamily, and CortexR5.

bool llvm::ARMSubtarget::isFPBrccSlow ( ) const
inline

Definition at line 336 of file ARMSubtarget.h.

References SlowFPBrcc.

Referenced by canChangeToInt().

bool llvm::ARMSubtarget::isFPOnlySP ( ) const
inline
bool llvm::ARMSubtarget::isKrait ( ) const
inline

Definition at line 310 of file ARMSubtarget.h.

References ARMProcFamily, and Krait.

Referenced by isLikeA9().

bool llvm::ARMSubtarget::isLikeA9 ( ) const
inline
bool llvm::ARMSubtarget::isLittle ( ) const
inline
bool llvm::ARMSubtarget::isMClass ( ) const
inline
bool llvm::ARMSubtarget::isR9Reserved ( ) const
inline
bool llvm::ARMSubtarget::isRClass ( ) const
inline

Definition at line 409 of file ARMSubtarget.h.

References ARMProcClass, and RClass.

bool llvm::ARMSubtarget::isSwift ( ) const
inline
bool llvm::ARMSubtarget::isTargetAEABI ( ) const
inline
bool llvm::ARMSubtarget::isTargetAndroid ( ) const
inline
bool llvm::ARMSubtarget::isTargetCOFF ( ) const
inline
bool llvm::ARMSubtarget::isTargetDarwin ( ) const
inline
bool llvm::ARMSubtarget::isTargetEHABICompatible ( ) const
inline
bool llvm::ARMSubtarget::isTargetELF ( ) const
inline
bool llvm::ARMSubtarget::isTargetHardFloat ( ) const
inline
bool llvm::ARMSubtarget::isTargetIOS ( ) const
inline

Definition at line 356 of file ARMSubtarget.h.

References llvm::Triple::isiOS(), and TargetTriple.

Referenced by llvm::ARMFrameLowering::hasFP().

bool llvm::ARMSubtarget::isTargetLinux ( ) const
inline
bool llvm::ARMSubtarget::isTargetMachO ( ) const
inline
bool llvm::ARMSubtarget::isTargetNaCl ( ) const
inline

Definition at line 358 of file ARMSubtarget.h.

References llvm::Triple::isOSNaCl(), and TargetTriple.

Referenced by useFastISel().

bool llvm::ARMSubtarget::isTargetNetBSD ( ) const
inline

Definition at line 359 of file ARMSubtarget.h.

References llvm::Triple::isOSNetBSD(), and TargetTriple.

bool llvm::ARMSubtarget::isTargetWindows ( ) const
inline
bool llvm::ARMSubtarget::isThumb ( ) const
inline
bool llvm::ARMSubtarget::isThumb1Only ( ) const
inline
bool llvm::ARMSubtarget::isThumb2 ( ) const
inline
bool llvm::ARMSubtarget::isV6M ( ) const
inline

Definition at line 412 of file ARMSubtarget.h.

References isMClass(), and isThumb1Only().

void llvm::ARMSubtarget::ParseSubtargetFeatures ( StringRef  CPU,
StringRef  FS 
)

ParseSubtargetFeatures - Parses features string setting specified subtarget options.

Definition of function is auto generated by tblgen.

bool llvm::ARMSubtarget::prefers32BitThumb ( ) const
inline

Definition at line 341 of file ARMSubtarget.h.

References Pref32BitThumb.

bool llvm::ARMSubtarget::restrictIT ( ) const
inline

Definition at line 424 of file ARMSubtarget.h.

References RestrictIT.

Referenced by llvm::ARMBaseInstrInfo::isPredicable().

bool llvm::ARMSubtarget::supportsTailCall ( ) const
inline

Definition at line 420 of file ARMSubtarget.h.

References SupportsTailCall.

bool ARMSubtarget::useFastISel ( ) const
bool llvm::ARMSubtarget::useFPVMLx ( ) const
inline

Definition at line 334 of file ARMSubtarget.h.

References SlowFPVMLx.

bool ARMSubtarget::useMovt ( const MachineFunction MF) const
bool llvm::ARMSubtarget::useMulOps ( ) const
inline

Definition at line 333 of file ARMSubtarget.h.

References UseMulOps.

bool llvm::ARMSubtarget::useNaClTrap ( ) const
inline

Definition at line 347 of file ARMSubtarget.h.

References UseNaClTrap.

bool llvm::ARMSubtarget::useNEONForSinglePrecisionFP ( ) const
inline
bool llvm::ARMSubtarget::useSoftFloat ( ) const
inline

Member Data Documentation

bool llvm::ARMSubtarget::AllowsUnalignedMem
protected

AllowsUnalignedMem - If true, the subtarget allows unaligned memory accesses for some types.

For details, see ARMTargetLowering::allowsMisalignedMemoryAccesses().

Definition at line 196 of file ARMSubtarget.h.

Referenced by allowsUnalignedMem().

ARMProcClassEnum llvm::ARMSubtarget::ARMProcClass
protected

ARMProcClass - ARM processor class: None, AClass, RClass or MClass.

Definition at line 56 of file ARMSubtarget.h.

Referenced by isAClass(), isMClass(), and isRClass().

ARMProcFamilyEnum llvm::ARMSubtarget::ARMProcFamily
protected

ARMProcFamily - ARM processor family: Cortex-A8, Cortex-A9, and others.

Definition at line 53 of file ARMSubtarget.h.

Referenced by isCortexA15(), isCortexA5(), isCortexA7(), isCortexA8(), isCortexA9(), isCortexR5(), isKrait(), and isSwift().

bool llvm::ARMSubtarget::AvoidCPSRPartialUpdate
protected

AvoidCPSRPartialUpdate - If true, codegen would avoid using instructions that partially update CPSR and add false dependency on the previous CPSR setting instruction.

Definition at line 153 of file ARMSubtarget.h.

Referenced by avoidCPSRPartialUpdate().

bool llvm::ARMSubtarget::AvoidMOVsShifterOperand
protected

AvoidMOVsShifterOperand - If true, codegen should avoid using flag setting movs with shifter operand (i.e.

asr, lsl, lsr).

Definition at line 157 of file ARMSubtarget.h.

Referenced by avoidMOVsShifterOperand().

std::string llvm::ARMSubtarget::CPUString
protected

CPUString - String name of used CPU.

Definition at line 220 of file ARMSubtarget.h.

Referenced by getCPUString(), and isCortexM3().

bool llvm::ARMSubtarget::FPOnlySP
protected

FPOnlySP - If true, the floating point unit only supports single precision.

Definition at line 173 of file ARMSubtarget.h.

Referenced by isFPOnlySP().

bool llvm::ARMSubtarget::GenLongCalls
protected

Generate calls via indirect call instructions.

Definition at line 210 of file ARMSubtarget.h.

Referenced by genLongCalls().

bool llvm::ARMSubtarget::HasCRC
protected

HasCRC - if true, processor supports CRC instructions.

Definition at line 187 of file ARMSubtarget.h.

Referenced by hasCRC().

bool llvm::ARMSubtarget::HasCrypto
protected

HasCrypto - if true, processor supports Cryptography extensions.

Definition at line 184 of file ARMSubtarget.h.

Referenced by hasCrypto().

bool llvm::ARMSubtarget::HasD16
protected

HasD16 - True if subtarget is limited to 16 double precision FP registers for VFPv3.

Definition at line 130 of file ARMSubtarget.h.

Referenced by hasD16().

bool llvm::ARMSubtarget::HasDataBarrier
protected

HasDataBarrier - True if the subtarget supports DMB / DSB data barrier instructions.

Definition at line 144 of file ARMSubtarget.h.

Referenced by hasAnyDataBarrier(), and hasDataBarrier().

bool llvm::ARMSubtarget::HasFP16
protected

HasFP16 - True if subtarget supports half-precision FP (We support VFP+HF only so far)

Definition at line 126 of file ARMSubtarget.h.

Referenced by hasFP16().

bool llvm::ARMSubtarget::HasFPARMv8
protected

Definition at line 77 of file ARMSubtarget.h.

Referenced by hasFPARMv8().

bool llvm::ARMSubtarget::HasHardwareDivide
protected

HasHardwareDivide - True if subtarget supports [su]div.

Definition at line 133 of file ARMSubtarget.h.

Referenced by hasDivide().

bool llvm::ARMSubtarget::HasHardwareDivideInARM
protected

HasHardwareDivideInARM - True if subtarget supports [su]div in ARM mode.

Definition at line 136 of file ARMSubtarget.h.

Referenced by hasDivideInARMMode().

bool llvm::ARMSubtarget::HasMPExtension
protected

HasMPExtension - True if the subtarget supports Multiprocessing extension (ARMv7 only).

Definition at line 165 of file ARMSubtarget.h.

Referenced by hasMPExtension().

bool llvm::ARMSubtarget::HasNEON
protected

Definition at line 78 of file ARMSubtarget.h.

Referenced by hasNEON().

bool llvm::ARMSubtarget::HasPerfMon
protected

If true, the processor supports the Performance Monitor Extensions.

These include a generic cycle-counter as well as more fine-grained (often implementation-specific) events.

Definition at line 178 of file ARMSubtarget.h.

Referenced by hasPerfMon().

bool llvm::ARMSubtarget::HasRAS
protected

HasRAS - Some processors perform return stack prediction.

CodeGen should avoid issue "normal" call instructions to callees which do not return.

Definition at line 161 of file ARMSubtarget.h.

Referenced by hasRAS().

bool llvm::ARMSubtarget::HasT2ExtractPack
protected

HasT2ExtractPack - True if subtarget supports thumb2 extract/pack instructions.

Definition at line 140 of file ARMSubtarget.h.

Referenced by hasT2ExtractPack().

bool llvm::ARMSubtarget::HasThumb2
protected

HasThumb2 - True if Thumb2 instructions are supported.

Definition at line 107 of file ARMSubtarget.h.

Referenced by hasThumb2(), isThumb1Only(), and isThumb2().

bool llvm::ARMSubtarget::HasTrustZone
protected

HasTrustZone - if true, processor supports TrustZone security extensions.

Definition at line 181 of file ARMSubtarget.h.

Referenced by hasTrustZone().

bool llvm::ARMSubtarget::HasV4TOps
protected

HasV4TOps, HasV5TOps, HasV5TEOps, HasV6Ops, HasV6MOps, HasV6KOps, HasV6T2Ops, HasV7Ops, HasV8Ops - Specify whether target support specific ARM ISA variants.

Definition at line 61 of file ARMSubtarget.h.

Referenced by hasV4TOps().

bool llvm::ARMSubtarget::HasV5TEOps
protected

Definition at line 63 of file ARMSubtarget.h.

Referenced by hasV5TEOps().

bool llvm::ARMSubtarget::HasV5TOps
protected

Definition at line 62 of file ARMSubtarget.h.

Referenced by hasV5TOps().

bool llvm::ARMSubtarget::HasV6KOps
protected

Definition at line 66 of file ARMSubtarget.h.

Referenced by hasV6KOps().

bool llvm::ARMSubtarget::HasV6MOps
protected

Definition at line 65 of file ARMSubtarget.h.

Referenced by hasV6MOps().

bool llvm::ARMSubtarget::HasV6Ops
protected

Definition at line 64 of file ARMSubtarget.h.

Referenced by hasV6Ops().

bool llvm::ARMSubtarget::HasV6T2Ops
protected

Definition at line 67 of file ARMSubtarget.h.

Referenced by hasV6T2Ops().

bool llvm::ARMSubtarget::HasV7Ops
protected

Definition at line 68 of file ARMSubtarget.h.

Referenced by hasV7Ops().

bool llvm::ARMSubtarget::HasV8_1aOps
protected

Definition at line 70 of file ARMSubtarget.h.

Referenced by hasV8_1aOps().

bool llvm::ARMSubtarget::HasV8Ops
protected

Definition at line 69 of file ARMSubtarget.h.

Referenced by hasV8Ops().

bool llvm::ARMSubtarget::HasVFPv2
protected

HasVFPv2, HasVFPv3, HasVFPv4, HasFPARMv8, HasNEON - Specify what floating point ISAs are supported.

Definition at line 74 of file ARMSubtarget.h.

Referenced by hasVFP2().

bool llvm::ARMSubtarget::HasVFPv3
protected

Definition at line 75 of file ARMSubtarget.h.

Referenced by hasVFP3().

bool llvm::ARMSubtarget::HasVFPv4
protected

Definition at line 76 of file ARMSubtarget.h.

Referenced by hasVFP4().

bool llvm::ARMSubtarget::HasVirtualization
protected

HasVirtualization - True if the subtarget supports the Virtualization extension.

Definition at line 169 of file ARMSubtarget.h.

Referenced by hasVirtualization().

bool llvm::ARMSubtarget::HasVMLxForwarding
protected

HasVMLxForwarding - If true, NEON has special multiplier accumulator forwarding to allow mul + mla being issued back to back.

Definition at line 95 of file ARMSubtarget.h.

Referenced by hasVMLxForwarding().

bool llvm::ARMSubtarget::HasZeroCycleZeroing
protected

If true, the instructions "vmov.i32 d0, #0" and "vmov.i32 q0, #0" are particularly effective at zeroing a VFP register.

Definition at line 191 of file ARMSubtarget.h.

Referenced by hasZeroCycleZeroing().

InstrItineraryData llvm::ARMSubtarget::InstrItins
protected

Selected instruction itineraries (one entry per itinerary class.)

Definition at line 232 of file ARMSubtarget.h.

Referenced by getInstrItineraryData().

bool llvm::ARMSubtarget::InThumbMode
protected

InThumbMode - True if compiling for Thumb, false for ARM.

Definition at line 101 of file ARMSubtarget.h.

Referenced by isThumb(), isThumb1Only(), and isThumb2().

bool llvm::ARMSubtarget::IsLittle
protected

IsLittle - The target is Little Endian.

Definition at line 223 of file ARMSubtarget.h.

Referenced by isLittle().

bool llvm::ARMSubtarget::IsR9Reserved
protected

IsR9Reserved - True if R9 is a not available as general purpose register.

Definition at line 113 of file ARMSubtarget.h.

Referenced by isR9Reserved().

bool llvm::ARMSubtarget::NoARM
protected

NoARM - True if subtarget does not support ARM mode execution.

Definition at line 110 of file ARMSubtarget.h.

Referenced by hasARMOps().

const TargetOptions& llvm::ARMSubtarget::Options
protected

Options passed via command line that could influence the target.

Definition at line 235 of file ARMSubtarget.h.

bool llvm::ARMSubtarget::Pref32BitThumb
protected

Pref32BitThumb - If true, codegen would prefer 32-bit Thumb instructions over 16-bit ones.

Definition at line 148 of file ARMSubtarget.h.

Referenced by prefers32BitThumb().

bool llvm::ARMSubtarget::RestrictIT
protected

RestrictIT - If true, the subtarget disallows generation of deprecated IT blocks to conform to ARMv8 rule.

Definition at line 200 of file ARMSubtarget.h.

Referenced by restrictIT().

MCSchedModel llvm::ARMSubtarget::SchedModel
protected

SchedModel - Processor specific instruction costs.

Definition at line 229 of file ARMSubtarget.h.

Referenced by getMispredictionPenalty().

bool llvm::ARMSubtarget::SlowFPBrcc
protected

SlowFPBrcc - True if floating point compare + branch is slow.

Definition at line 98 of file ARMSubtarget.h.

Referenced by isFPBrccSlow().

bool llvm::ARMSubtarget::SlowFPVMLx
protected

SlowFPVMLx - If the VFP2 / NEON instructions are available, indicates whether the FP VML[AS] instructions are slow (if so, don't use them).

Definition at line 91 of file ARMSubtarget.h.

Referenced by useFPVMLx().

unsigned llvm::ARMSubtarget::stackAlignment
protected

stackAlignment - The minimum alignment known to hold of the stack frame on entry to the function and which must be maintained by every function.

Definition at line 217 of file ARMSubtarget.h.

Referenced by getStackAlignment().

bool llvm::ARMSubtarget::SupportsTailCall
protected

SupportsTailCall - True if the OS supports tail call.

The dynamic linker must be able to synthesize call stubs for interworking between ARM and Thumb.

Definition at line 122 of file ARMSubtarget.h.

Referenced by supportsTailCall().

Triple llvm::ARMSubtarget::TargetTriple
protected
bool llvm::ARMSubtarget::Thumb2DSP
protected

Thumb2DSP - If true, the subtarget supports the v7 DSP (saturating arith and such) instructions in Thumb2 code.

Definition at line 204 of file ARMSubtarget.h.

Referenced by hasThumb2DSP().

const ARMBaseTargetMachine& llvm::ARMSubtarget::TM
protected

Definition at line 237 of file ARMSubtarget.h.

Referenced by isAAPCS_ABI(), isAPCS_ABI(), and useFastISel().

bool llvm::ARMSubtarget::UnsafeFPMath
protected

Target machine allowed unsafe FP math (such as use of NEON fp)

Definition at line 213 of file ARMSubtarget.h.

bool llvm::ARMSubtarget::UseMovt
protected

UseMovt - True if MOVT / MOVW pairs are used for materialization of 32-bit imms (including global addresses).

Definition at line 117 of file ARMSubtarget.h.

Referenced by useMovt().

bool llvm::ARMSubtarget::UseMulOps
protected

UseMulOps - True if non-microcoded fused integer multiply-add and multiply-subtract instructions should be used.

Definition at line 87 of file ARMSubtarget.h.

Referenced by useMulOps().

bool llvm::ARMSubtarget::UseNaClTrap
protected

NaCl TRAP instruction is generated instead of the regular TRAP.

Definition at line 207 of file ARMSubtarget.h.

Referenced by useNaClTrap().

bool llvm::ARMSubtarget::UseNEONForSinglePrecisionFP
protected

UseNEONForSinglePrecisionFP - if the NEONFP attribute has been specified.

Use the method useNEONForSinglePrecisionFP() to determine if NEON should actually be used.

Definition at line 83 of file ARMSubtarget.h.

Referenced by useNEONForSinglePrecisionFP().

bool llvm::ARMSubtarget::UseSoftFloat
protected

UseSoftFloat - True if we're using software floating point features.

Definition at line 104 of file ARMSubtarget.h.

Referenced by useSoftFloat().


The documentation for this class was generated from the following files: