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LLVM
3.7.0
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This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representation suitable for instruction selection. More...
#include <SelectionDAG.h>
Classes | |
| struct | DAGUpdateListener |
| Clients of various APIs that cause global effects on the DAG can optionally implement this interface. More... | |
Public Types | |
| typedef ilist< SDNode > ::const_iterator | allnodes_const_iterator |
| typedef ilist< SDNode >::iterator | allnodes_iterator |
Public Member Functions | |
| SelectionDAG (const TargetMachine &TM, llvm::CodeGenOpt::Level) | |
| ~SelectionDAG () | |
| void | init (MachineFunction &mf) |
| Prepare this SelectionDAG to process code in the given MachineFunction. More... | |
| void | clear () |
| Clear state and free memory necessary to make this SelectionDAG ready to process a new block. More... | |
| MachineFunction & | getMachineFunction () const |
| const DataLayout & | getDataLayout () const |
| const TargetMachine & | getTarget () const |
| const TargetSubtargetInfo & | getSubtarget () const |
| const TargetLowering & | getTargetLoweringInfo () const |
| const TargetSelectionDAGInfo & | getSelectionDAGInfo () const |
| LLVMContext * | getContext () const |
| void | viewGraph (const std::string &Title) |
| Pop up a GraphViz/gv window with the DAG rendered using 'dot'. More... | |
| void | viewGraph () |
| void | clearGraphAttrs () |
| Clear all previously defined node graph attributes. More... | |
| void | setGraphAttrs (const SDNode *N, const char *Attrs) |
| Set graph attributes for a node. (eg. "color=red".) More... | |
| const std::string | getGraphAttrs (const SDNode *N) const |
| Get graph attributes for a node. More... | |
| void | setGraphColor (const SDNode *N, const char *Color) |
| Convenience for setting node color attribute. More... | |
| void | setSubgraphColor (SDNode *N, const char *Color) |
| Convenience for setting subgraph color attribute. More... | |
| allnodes_const_iterator | allnodes_begin () const |
| allnodes_const_iterator | allnodes_end () const |
| allnodes_iterator | allnodes_begin () |
| allnodes_iterator | allnodes_end () |
| ilist< SDNode >::size_type | allnodes_size () const |
| iterator_range< allnodes_iterator > | allnodes () |
| iterator_range < allnodes_const_iterator > | allnodes () const |
| const SDValue & | getRoot () const |
| Return the root tag of the SelectionDAG. More... | |
| SDValue | getEntryNode () const |
| Return the token chain corresponding to the entry of the function. More... | |
| const SDValue & | setRoot (SDValue N) |
| Set the current root tag of the SelectionDAG. More... | |
| void | Combine (CombineLevel Level, AliasAnalysis &AA, CodeGenOpt::Level OptLevel) |
| This iterates over the nodes in the SelectionDAG, folding certain types of nodes together, or eliminating superfluous nodes. More... | |
| bool | LegalizeTypes () |
| This transforms the SelectionDAG into a SelectionDAG that only uses types natively supported by the target. More... | |
| void | Legalize () |
| This transforms the SelectionDAG into a SelectionDAG that is compatible with the target instruction selector, as indicated by the TargetLowering object. More... | |
| bool | LegalizeOp (SDNode *N, SmallSetVector< SDNode *, 16 > &UpdatedNodes) |
| Transforms a SelectionDAG node and any operands to it into a node that is compatible with the target instruction selector, as indicated by the TargetLowering object. More... | |
| bool | LegalizeVectors () |
| This transforms the SelectionDAG into a SelectionDAG that only uses vector math operations supported by the target. More... | |
| void | RemoveDeadNodes () |
| This method deletes all unreachable nodes in the SelectionDAG. More... | |
| void | DeleteNode (SDNode *N) |
| Remove the specified node from the system. More... | |
| SDVTList | getVTList (EVT VT) |
| Return an SDVTList that represents the list of values specified. More... | |
| SDVTList | getVTList (EVT VT1, EVT VT2) |
| SDVTList | getVTList (EVT VT1, EVT VT2, EVT VT3) |
| SDVTList | getVTList (EVT VT1, EVT VT2, EVT VT3, EVT VT4) |
| SDVTList | getVTList (ArrayRef< EVT > VTs) |
| SDValue | getConstant (uint64_t Val, SDLoc DL, EVT VT, bool isTarget=false, bool isOpaque=false) |
| SDValue | getConstant (const APInt &Val, SDLoc DL, EVT VT, bool isTarget=false, bool isOpaque=false) |
| SDValue | getConstant (const ConstantInt &Val, SDLoc DL, EVT VT, bool isTarget=false, bool isOpaque=false) |
| SDValue | getIntPtrConstant (uint64_t Val, SDLoc DL, bool isTarget=false) |
| SDValue | getTargetConstant (uint64_t Val, SDLoc DL, EVT VT, bool isOpaque=false) |
| SDValue | getTargetConstant (const APInt &Val, SDLoc DL, EVT VT, bool isOpaque=false) |
| SDValue | getTargetConstant (const ConstantInt &Val, SDLoc DL, EVT VT, bool isOpaque=false) |
| SDValue | getConstantFP (double Val, SDLoc DL, EVT VT, bool isTarget=false) |
| SDValue | getConstantFP (const APFloat &Val, SDLoc DL, EVT VT, bool isTarget=false) |
| SDValue | getConstantFP (const ConstantFP &CF, SDLoc DL, EVT VT, bool isTarget=false) |
| SDValue | getTargetConstantFP (double Val, SDLoc DL, EVT VT) |
| SDValue | getTargetConstantFP (const APFloat &Val, SDLoc DL, EVT VT) |
| SDValue | getTargetConstantFP (const ConstantFP &Val, SDLoc DL, EVT VT) |
| SDValue | getGlobalAddress (const GlobalValue *GV, SDLoc DL, EVT VT, int64_t offset=0, bool isTargetGA=false, unsigned char TargetFlags=0) |
| SDValue | getTargetGlobalAddress (const GlobalValue *GV, SDLoc DL, EVT VT, int64_t offset=0, unsigned char TargetFlags=0) |
| SDValue | getFrameIndex (int FI, EVT VT, bool isTarget=false) |
| SDValue | getTargetFrameIndex (int FI, EVT VT) |
| SDValue | getJumpTable (int JTI, EVT VT, bool isTarget=false, unsigned char TargetFlags=0) |
| SDValue | getTargetJumpTable (int JTI, EVT VT, unsigned char TargetFlags=0) |
| SDValue | getConstantPool (const Constant *C, EVT VT, unsigned Align=0, int Offs=0, bool isT=false, unsigned char TargetFlags=0) |
| SDValue | getTargetConstantPool (const Constant *C, EVT VT, unsigned Align=0, int Offset=0, unsigned char TargetFlags=0) |
| SDValue | getConstantPool (MachineConstantPoolValue *C, EVT VT, unsigned Align=0, int Offs=0, bool isT=false, unsigned char TargetFlags=0) |
| SDValue | getTargetConstantPool (MachineConstantPoolValue *C, EVT VT, unsigned Align=0, int Offset=0, unsigned char TargetFlags=0) |
| SDValue | getTargetIndex (int Index, EVT VT, int64_t Offset=0, unsigned char TargetFlags=0) |
| SDValue | getBasicBlock (MachineBasicBlock *MBB) |
| SDValue | getBasicBlock (MachineBasicBlock *MBB, SDLoc dl) |
| SDValue | getExternalSymbol (const char *Sym, EVT VT) |
| SDValue | getExternalSymbol (const char *Sym, SDLoc dl, EVT VT) |
| SDValue | getTargetExternalSymbol (const char *Sym, EVT VT, unsigned char TargetFlags=0) |
| SDValue | getMCSymbol (MCSymbol *Sym, EVT VT) |
| SDValue | getValueType (EVT) |
| SDValue | getRegister (unsigned Reg, EVT VT) |
| SDValue | getRegisterMask (const uint32_t *RegMask) |
| SDValue | getEHLabel (SDLoc dl, SDValue Root, MCSymbol *Label) |
| SDValue | getBlockAddress (const BlockAddress *BA, EVT VT, int64_t Offset=0, bool isTarget=false, unsigned char TargetFlags=0) |
| SDValue | getTargetBlockAddress (const BlockAddress *BA, EVT VT, int64_t Offset=0, unsigned char TargetFlags=0) |
| SDValue | getCopyToReg (SDValue Chain, SDLoc dl, unsigned Reg, SDValue N) |
| SDValue | getCopyToReg (SDValue Chain, SDLoc dl, unsigned Reg, SDValue N, SDValue Glue) |
| SDValue | getCopyToReg (SDValue Chain, SDLoc dl, SDValue Reg, SDValue N, SDValue Glue) |
| SDValue | getCopyFromReg (SDValue Chain, SDLoc dl, unsigned Reg, EVT VT) |
| SDValue | getCopyFromReg (SDValue Chain, SDLoc dl, unsigned Reg, EVT VT, SDValue Glue) |
| SDValue | getCondCode (ISD::CondCode Cond) |
| SDValue | getConvertRndSat (EVT VT, SDLoc dl, SDValue Val, SDValue DTy, SDValue STy, SDValue Rnd, SDValue Sat, ISD::CvtCode Code) |
| Returns the ConvertRndSat Note: Avoid using this node because it may disappear in the future and most targets don't support it. More... | |
| SDValue | getVectorShuffle (EVT VT, SDLoc dl, SDValue N1, SDValue N2, const int *MaskElts) |
| Return an ISD::VECTOR_SHUFFLE node. More... | |
| SDValue | getVectorShuffle (EVT VT, SDLoc dl, SDValue N1, SDValue N2, ArrayRef< int > MaskElts) |
| SDValue | getCommutedVectorShuffle (const ShuffleVectorSDNode &SV) |
| Returns an ISD::VECTOR_SHUFFLE node semantically equivalent to the shuffle node in input but with swapped operands. More... | |
| SDValue | getAnyExtOrTrunc (SDValue Op, SDLoc DL, EVT VT) |
| Convert Op, which must be of integer type, to the integer type VT, by either any-extending or truncating it. More... | |
| SDValue | getSExtOrTrunc (SDValue Op, SDLoc DL, EVT VT) |
| Convert Op, which must be of integer type, to the integer type VT, by either sign-extending or truncating it. More... | |
| SDValue | getZExtOrTrunc (SDValue Op, SDLoc DL, EVT VT) |
| Convert Op, which must be of integer type, to the integer type VT, by either zero-extending or truncating it. More... | |
| SDValue | getZeroExtendInReg (SDValue Op, SDLoc DL, EVT SrcTy) |
| Return the expression required to zero extend the Op value assuming it was the smaller SrcTy value. More... | |
| SDValue | getAnyExtendVectorInReg (SDValue Op, SDLoc DL, EVT VT) |
| Return an operation which will any-extend the low lanes of the operand into the specified vector type. More... | |
| SDValue | getSignExtendVectorInReg (SDValue Op, SDLoc DL, EVT VT) |
| Return an operation which will sign extend the low lanes of the operand into the specified vector type. More... | |
| SDValue | getZeroExtendVectorInReg (SDValue Op, SDLoc DL, EVT VT) |
| Return an operation which will zero extend the low lanes of the operand into the specified vector type. More... | |
| SDValue | getBoolExtOrTrunc (SDValue Op, SDLoc SL, EVT VT, EVT OpVT) |
| Convert Op, which must be of integer type, to the integer type VT, by using an extension appropriate for the target's BooleanContent for type OpVT or truncating it. More... | |
| SDValue | getNOT (SDLoc DL, SDValue Val, EVT VT) |
| Create a bitwise NOT operation as (XOR Val, -1). More... | |
| SDValue | getLogicalNOT (SDLoc DL, SDValue Val, EVT VT) |
| Create a logical NOT operation as (XOR Val, BooleanOne). More... | |
| SDValue | getCALLSEQ_START (SDValue Chain, SDValue Op, SDLoc DL) |
| Return a new CALLSEQ_START node, which always must have a glue result (to ensure it's not CSE'd). More... | |
| SDValue | getCALLSEQ_END (SDValue Chain, SDValue Op1, SDValue Op2, SDValue InGlue, SDLoc DL) |
| Return a new CALLSEQ_END node, which always must have a glue result (to ensure it's not CSE'd). More... | |
| SDValue | getUNDEF (EVT VT) |
| Return an UNDEF node. UNDEF does not have a useful SDLoc. More... | |
| SDValue | getGLOBAL_OFFSET_TABLE (EVT VT) |
| Return a GLOBAL_OFFSET_TABLE node. This does not have a useful SDLoc. More... | |
| SDValue | getNode (unsigned Opcode, SDLoc DL, EVT VT, ArrayRef< SDUse > Ops) |
| Gets or creates the specified node. More... | |
| SDValue | getNode (unsigned Opcode, SDLoc DL, EVT VT, ArrayRef< SDValue > Ops) |
| SDValue | getNode (unsigned Opcode, SDLoc DL, ArrayRef< EVT > ResultTys, ArrayRef< SDValue > Ops) |
| SDValue | getNode (unsigned Opcode, SDLoc DL, SDVTList VTs, ArrayRef< SDValue > Ops) |
| SDValue | getNode (unsigned Opcode, SDLoc DL, EVT VT) |
| getNode - Gets or creates the specified node. More... | |
| SDValue | getNode (unsigned Opcode, SDLoc DL, EVT VT, SDValue N) |
| SDValue | getNode (unsigned Opcode, SDLoc DL, EVT VT, SDValue N1, SDValue N2, const SDNodeFlags *Flags=nullptr) |
| SDValue | getNode (unsigned Opcode, SDLoc DL, EVT VT, SDValue N1, SDValue N2, SDValue N3) |
| SDValue | getNode (unsigned Opcode, SDLoc DL, EVT VT, SDValue N1, SDValue N2, SDValue N3, SDValue N4) |
| SDValue | getNode (unsigned Opcode, SDLoc DL, EVT VT, SDValue N1, SDValue N2, SDValue N3, SDValue N4, SDValue N5) |
| SDValue | getNode (unsigned Opcode, SDLoc DL, SDVTList VTs) |
| SDValue | getNode (unsigned Opcode, SDLoc DL, SDVTList VTs, SDValue N) |
| SDValue | getNode (unsigned Opcode, SDLoc DL, SDVTList VTs, SDValue N1, SDValue N2) |
| SDValue | getNode (unsigned Opcode, SDLoc DL, SDVTList VTs, SDValue N1, SDValue N2, SDValue N3) |
| SDValue | getNode (unsigned Opcode, SDLoc DL, SDVTList VTs, SDValue N1, SDValue N2, SDValue N3, SDValue N4) |
| SDValue | getNode (unsigned Opcode, SDLoc DL, SDVTList VTs, SDValue N1, SDValue N2, SDValue N3, SDValue N4, SDValue N5) |
| SDValue | getStackArgumentTokenFactor (SDValue Chain) |
| Compute a TokenFactor to force all the incoming stack arguments to be loaded from the stack. More... | |
| SDValue | getMemcpy (SDValue Chain, SDLoc dl, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, bool isVol, bool AlwaysInline, bool isTailCall, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) |
| SDValue | getMemmove (SDValue Chain, SDLoc dl, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, bool isVol, bool isTailCall, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) |
| SDValue | getMemset (SDValue Chain, SDLoc dl, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, bool isVol, bool isTailCall, MachinePointerInfo DstPtrInfo) |
| SDValue | getSetCC (SDLoc DL, EVT VT, SDValue LHS, SDValue RHS, ISD::CondCode Cond) |
| Helper function to make it easier to build SetCC's if you just have an ISD::CondCode instead of an SDValue. More... | |
| SDValue | getSelect (SDLoc DL, EVT VT, SDValue Cond, SDValue LHS, SDValue RHS) |
| Helper function to make it easier to build Select's if you just have operands and don't want to check for vector. More... | |
| SDValue | getSelectCC (SDLoc DL, SDValue LHS, SDValue RHS, SDValue True, SDValue False, ISD::CondCode Cond) |
| Helper function to make it easier to build SelectCC's if you just have an ISD::CondCode instead of an SDValue. More... | |
| SDValue | getVAArg (EVT VT, SDLoc dl, SDValue Chain, SDValue Ptr, SDValue SV, unsigned Align) |
| VAArg produces a result and token chain, and takes a pointer and a source value as input. More... | |
| SDValue | getAtomicCmpSwap (unsigned Opcode, SDLoc dl, EVT MemVT, SDVTList VTs, SDValue Chain, SDValue Ptr, SDValue Cmp, SDValue Swp, MachinePointerInfo PtrInfo, unsigned Alignment, AtomicOrdering SuccessOrdering, AtomicOrdering FailureOrdering, SynchronizationScope SynchScope) |
| Gets a node for an atomic cmpxchg op. More... | |
| SDValue | getAtomicCmpSwap (unsigned Opcode, SDLoc dl, EVT MemVT, SDVTList VTs, SDValue Chain, SDValue Ptr, SDValue Cmp, SDValue Swp, MachineMemOperand *MMO, AtomicOrdering SuccessOrdering, AtomicOrdering FailureOrdering, SynchronizationScope SynchScope) |
| SDValue | getAtomic (unsigned Opcode, SDLoc dl, EVT MemVT, SDValue Chain, SDValue Ptr, SDValue Val, const Value *PtrVal, unsigned Alignment, AtomicOrdering Ordering, SynchronizationScope SynchScope) |
| Gets a node for an atomic op, produces result (if relevant) and chain and takes 2 operands. More... | |
| SDValue | getAtomic (unsigned Opcode, SDLoc dl, EVT MemVT, SDValue Chain, SDValue Ptr, SDValue Val, MachineMemOperand *MMO, AtomicOrdering Ordering, SynchronizationScope SynchScope) |
| SDValue | getAtomic (unsigned Opcode, SDLoc dl, EVT MemVT, EVT VT, SDValue Chain, SDValue Ptr, MachineMemOperand *MMO, AtomicOrdering Ordering, SynchronizationScope SynchScope) |
| Gets a node for an atomic op, produces result and chain and takes 1 operand. More... | |
| SDValue | getAtomic (unsigned Opcode, SDLoc dl, EVT MemVT, SDVTList VTList, ArrayRef< SDValue > Ops, MachineMemOperand *MMO, AtomicOrdering SuccessOrdering, AtomicOrdering FailureOrdering, SynchronizationScope SynchScope) |
| Gets a node for an atomic op, produces result and chain and takes N operands. More... | |
| SDValue | getAtomic (unsigned Opcode, SDLoc dl, EVT MemVT, SDVTList VTList, ArrayRef< SDValue > Ops, MachineMemOperand *MMO, AtomicOrdering Ordering, SynchronizationScope SynchScope) |
| SDValue | getMemIntrinsicNode (unsigned Opcode, SDLoc dl, SDVTList VTList, ArrayRef< SDValue > Ops, EVT MemVT, MachinePointerInfo PtrInfo, unsigned Align=0, bool Vol=false, bool ReadMem=true, bool WriteMem=true, unsigned Size=0) |
| Creates a MemIntrinsicNode that may produce a result and takes a list of operands. More... | |
| SDValue | getMemIntrinsicNode (unsigned Opcode, SDLoc dl, SDVTList VTList, ArrayRef< SDValue > Ops, EVT MemVT, MachineMemOperand *MMO) |
| SDValue | getMergeValues (ArrayRef< SDValue > Ops, SDLoc dl) |
| Create a MERGE_VALUES node from the given operands. More... | |
| SDValue | getLoad (EVT VT, SDLoc dl, SDValue Chain, SDValue Ptr, MachinePointerInfo PtrInfo, bool isVolatile, bool isNonTemporal, bool isInvariant, unsigned Alignment, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr) |
| Loads are not normal binary operators: their result type is not determined by their operands, and they produce a value AND a token chain. More... | |
| SDValue | getLoad (EVT VT, SDLoc dl, SDValue Chain, SDValue Ptr, MachineMemOperand *MMO) |
| SDValue | getExtLoad (ISD::LoadExtType ExtType, SDLoc dl, EVT VT, SDValue Chain, SDValue Ptr, MachinePointerInfo PtrInfo, EVT MemVT, bool isVolatile, bool isNonTemporal, bool isInvariant, unsigned Alignment, const AAMDNodes &AAInfo=AAMDNodes()) |
| SDValue | getExtLoad (ISD::LoadExtType ExtType, SDLoc dl, EVT VT, SDValue Chain, SDValue Ptr, EVT MemVT, MachineMemOperand *MMO) |
| SDValue | getIndexedLoad (SDValue OrigLoad, SDLoc dl, SDValue Base, SDValue Offset, ISD::MemIndexedMode AM) |
| SDValue | getLoad (ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT, SDLoc dl, SDValue Chain, SDValue Ptr, SDValue Offset, MachinePointerInfo PtrInfo, EVT MemVT, bool isVolatile, bool isNonTemporal, bool isInvariant, unsigned Alignment, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr) |
| SDValue | getLoad (ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT, SDLoc dl, SDValue Chain, SDValue Ptr, SDValue Offset, EVT MemVT, MachineMemOperand *MMO) |
| SDValue | getStore (SDValue Chain, SDLoc dl, SDValue Val, SDValue Ptr, MachinePointerInfo PtrInfo, bool isVolatile, bool isNonTemporal, unsigned Alignment, const AAMDNodes &AAInfo=AAMDNodes()) |
| Helper function to build ISD::STORE nodes. More... | |
| SDValue | getStore (SDValue Chain, SDLoc dl, SDValue Val, SDValue Ptr, MachineMemOperand *MMO) |
| SDValue | getTruncStore (SDValue Chain, SDLoc dl, SDValue Val, SDValue Ptr, MachinePointerInfo PtrInfo, EVT TVT, bool isNonTemporal, bool isVolatile, unsigned Alignment, const AAMDNodes &AAInfo=AAMDNodes()) |
| SDValue | getTruncStore (SDValue Chain, SDLoc dl, SDValue Val, SDValue Ptr, EVT TVT, MachineMemOperand *MMO) |
| SDValue | getIndexedStore (SDValue OrigStoe, SDLoc dl, SDValue Base, SDValue Offset, ISD::MemIndexedMode AM) |
| SDValue | getMaskedLoad (EVT VT, SDLoc dl, SDValue Chain, SDValue Ptr, SDValue Mask, SDValue Src0, EVT MemVT, MachineMemOperand *MMO, ISD::LoadExtType) |
| SDValue | getMaskedStore (SDValue Chain, SDLoc dl, SDValue Val, SDValue Ptr, SDValue Mask, EVT MemVT, MachineMemOperand *MMO, bool IsTrunc) |
| SDValue | getMaskedGather (SDVTList VTs, EVT VT, SDLoc dl, ArrayRef< SDValue > Ops, MachineMemOperand *MMO) |
| SDValue | getMaskedScatter (SDVTList VTs, EVT VT, SDLoc dl, ArrayRef< SDValue > Ops, MachineMemOperand *MMO) |
| SDValue | getSrcValue (const Value *v) |
| Construct a node to track a Value* through the backend. More... | |
| SDValue | getMDNode (const MDNode *MD) |
| Return an MDNodeSDNode which holds an MDNode. More... | |
| SDValue | getBitcast (EVT VT, SDValue V) |
| Return a bitcast using the SDLoc of the value operand, and casting to the provided type. More... | |
| SDValue | getAddrSpaceCast (SDLoc dl, EVT VT, SDValue Ptr, unsigned SrcAS, unsigned DestAS) |
| Return an AddrSpaceCastSDNode. More... | |
| SDValue | getShiftAmountOperand (EVT LHSTy, SDValue Op) |
| Return the specified value casted to the target's desired shift amount type. More... | |
| SDNode * | UpdateNodeOperands (SDNode *N, SDValue Op) |
| Mutate the specified node in-place to have the specified operands. More... | |
| SDNode * | UpdateNodeOperands (SDNode *N, SDValue Op1, SDValue Op2) |
| SDNode * | UpdateNodeOperands (SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) |
| SDNode * | UpdateNodeOperands (SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3, SDValue Op4) |
| SDNode * | UpdateNodeOperands (SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3, SDValue Op4, SDValue Op5) |
| SDNode * | UpdateNodeOperands (SDNode *N, ArrayRef< SDValue > Ops) |
| SDNode * | SelectNodeTo (SDNode *N, unsigned TargetOpc, EVT VT) |
| These are used for target selectors to mutate the specified node to have the specified return type, Target opcode, and operands. More... | |
| SDNode * | SelectNodeTo (SDNode *N, unsigned TargetOpc, EVT VT, SDValue Op1) |
| SDNode * | SelectNodeTo (SDNode *N, unsigned TargetOpc, EVT VT, SDValue Op1, SDValue Op2) |
| SDNode * | SelectNodeTo (SDNode *N, unsigned TargetOpc, EVT VT, SDValue Op1, SDValue Op2, SDValue Op3) |
| SDNode * | SelectNodeTo (SDNode *N, unsigned TargetOpc, EVT VT, ArrayRef< SDValue > Ops) |
| SDNode * | SelectNodeTo (SDNode *N, unsigned TargetOpc, EVT VT1, EVT VT2) |
| SDNode * | SelectNodeTo (SDNode *N, unsigned TargetOpc, EVT VT1, EVT VT2, ArrayRef< SDValue > Ops) |
| SDNode * | SelectNodeTo (SDNode *N, unsigned TargetOpc, EVT VT1, EVT VT2, EVT VT3, ArrayRef< SDValue > Ops) |
| SDNode * | SelectNodeTo (SDNode *N, unsigned MachineOpc, EVT VT1, EVT VT2, EVT VT3, EVT VT4, ArrayRef< SDValue > Ops) |
| SDNode * | SelectNodeTo (SDNode *N, unsigned TargetOpc, EVT VT1, EVT VT2, SDValue Op1) |
| SDNode * | SelectNodeTo (SDNode *N, unsigned TargetOpc, EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) |
| SDNode * | SelectNodeTo (SDNode *N, unsigned TargetOpc, EVT VT1, EVT VT2, SDValue Op1, SDValue Op2, SDValue Op3) |
| SDNode * | SelectNodeTo (SDNode *N, unsigned TargetOpc, EVT VT1, EVT VT2, EVT VT3, SDValue Op1, SDValue Op2, SDValue Op3) |
| SDNode * | SelectNodeTo (SDNode *N, unsigned TargetOpc, SDVTList VTs, ArrayRef< SDValue > Ops) |
| SDNode * | MorphNodeTo (SDNode *N, unsigned Opc, SDVTList VTs, ArrayRef< SDValue > Ops) |
| This mutates the specified node to have the specified return type, opcode, and operands. More... | |
| MachineSDNode * | getMachineNode (unsigned Opcode, SDLoc dl, EVT VT) |
| These are used for target selectors to create a new node with specified return type(s), MachineInstr opcode, and operands. More... | |
| MachineSDNode * | getMachineNode (unsigned Opcode, SDLoc dl, EVT VT, SDValue Op1) |
| MachineSDNode * | getMachineNode (unsigned Opcode, SDLoc dl, EVT VT, SDValue Op1, SDValue Op2) |
| MachineSDNode * | getMachineNode (unsigned Opcode, SDLoc dl, EVT VT, SDValue Op1, SDValue Op2, SDValue Op3) |
| MachineSDNode * | getMachineNode (unsigned Opcode, SDLoc dl, EVT VT, ArrayRef< SDValue > Ops) |
| MachineSDNode * | getMachineNode (unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2) |
| MachineSDNode * | getMachineNode (unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2, SDValue Op1) |
| MachineSDNode * | getMachineNode (unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) |
| MachineSDNode * | getMachineNode (unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2, SDValue Op1, SDValue Op2, SDValue Op3) |
| MachineSDNode * | getMachineNode (unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2, ArrayRef< SDValue > Ops) |
| MachineSDNode * | getMachineNode (unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2, EVT VT3, SDValue Op1, SDValue Op2) |
| MachineSDNode * | getMachineNode (unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2, EVT VT3, SDValue Op1, SDValue Op2, SDValue Op3) |
| MachineSDNode * | getMachineNode (unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2, EVT VT3, ArrayRef< SDValue > Ops) |
| MachineSDNode * | getMachineNode (unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2, EVT VT3, EVT VT4, ArrayRef< SDValue > Ops) |
| MachineSDNode * | getMachineNode (unsigned Opcode, SDLoc dl, ArrayRef< EVT > ResultTys, ArrayRef< SDValue > Ops) |
| MachineSDNode * | getMachineNode (unsigned Opcode, SDLoc dl, SDVTList VTs, ArrayRef< SDValue > Ops) |
| SDValue | getTargetExtractSubreg (int SRIdx, SDLoc DL, EVT VT, SDValue Operand) |
| A convenience function for creating TargetInstrInfo::EXTRACT_SUBREG nodes. More... | |
| SDValue | getTargetInsertSubreg (int SRIdx, SDLoc DL, EVT VT, SDValue Operand, SDValue Subreg) |
| A convenience function for creating TargetInstrInfo::INSERT_SUBREG nodes. More... | |
| SDNode * | getNodeIfExists (unsigned Opcode, SDVTList VTs, ArrayRef< SDValue > Ops, const SDNodeFlags *Flags=nullptr) |
| Get the specified node if it's already available, or else return NULL. More... | |
| SDDbgValue * | getDbgValue (MDNode *Var, MDNode *Expr, SDNode *N, unsigned R, bool IsIndirect, uint64_t Off, DebugLoc DL, unsigned O) |
| Creates a SDDbgValue node. More... | |
| SDDbgValue * | getConstantDbgValue (MDNode *Var, MDNode *Expr, const Value *C, uint64_t Off, DebugLoc DL, unsigned O) |
| Constant. More... | |
| SDDbgValue * | getFrameIndexDbgValue (MDNode *Var, MDNode *Expr, unsigned FI, uint64_t Off, DebugLoc DL, unsigned O) |
| FrameIndex. More... | |
| void | RemoveDeadNode (SDNode *N) |
| Remove the specified node from the system. More... | |
| void | RemoveDeadNodes (SmallVectorImpl< SDNode * > &DeadNodes) |
| This method deletes the unreachable nodes in the given list, and any nodes that become unreachable as a result. More... | |
| void | ReplaceAllUsesWith (SDValue From, SDValue Op) |
| Modify anything using 'From' to use 'To' instead. More... | |
| void | ReplaceAllUsesWith (SDNode *From, SDNode *To) |
| ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. More... | |
| void | ReplaceAllUsesWith (SDNode *From, const SDValue *To) |
| ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. More... | |
| void | ReplaceAllUsesOfValueWith (SDValue From, SDValue To) |
| Replace any uses of From with To, leaving uses of other values produced by From.Val alone. More... | |
| void | ReplaceAllUsesOfValuesWith (const SDValue *From, const SDValue *To, unsigned Num) |
| Like ReplaceAllUsesOfValueWith, but for multiple values at once. More... | |
| unsigned | AssignTopologicalOrder () |
| Topological-sort the AllNodes list and a assign a unique node id for each node in the DAG based on their topological order. More... | |
| void | RepositionNode (allnodes_iterator Position, SDNode *N) |
| Move node N in the AllNodes list to be immediately before the given iterator Position. More... | |
| void | AddDbgValue (SDDbgValue *DB, SDNode *SD, bool isParameter) |
| Add a dbg_value SDNode. More... | |
| ArrayRef< SDDbgValue * > | GetDbgValues (const SDNode *SD) |
| Get the debug values which reference the given SDNode. More... | |
| void | TransferDbgValues (SDValue From, SDValue To) |
| Transfer SDDbgValues. More... | |
| bool | hasDebugValues () const |
| Return true if there are any SDDbgValue nodes associated with this SelectionDAG. More... | |
| SDDbgInfo::DbgIterator | DbgBegin () |
| SDDbgInfo::DbgIterator | DbgEnd () |
| SDDbgInfo::DbgIterator | ByvalParmDbgBegin () |
| SDDbgInfo::DbgIterator | ByvalParmDbgEnd () |
| void | dump () const |
| SDValue | CreateStackTemporary (EVT VT, unsigned minAlign=1) |
| Create a stack temporary, suitable for holding the specified value type. More... | |
| SDValue | CreateStackTemporary (EVT VT1, EVT VT2) |
| Create a stack temporary suitable for holding either of the specified value types. More... | |
| SDValue | FoldConstantArithmetic (unsigned Opcode, SDLoc DL, EVT VT, SDNode *Cst1, SDNode *Cst2) |
| SDValue | FoldConstantArithmetic (unsigned Opcode, SDLoc DL, EVT VT, const ConstantSDNode *Cst1, const ConstantSDNode *Cst2) |
| SDValue | FoldSetCC (EVT VT, SDValue N1, SDValue N2, ISD::CondCode Cond, SDLoc dl) |
| Constant fold a setcc to true or false. More... | |
| bool | SignBitIsZero (SDValue Op, unsigned Depth=0) const |
| Return true if the sign bit of Op is known to be zero. More... | |
| bool | MaskedValueIsZero (SDValue Op, const APInt &Mask, unsigned Depth=0) const |
| Return true if 'Op & Mask' is known to be zero. More... | |
| void | computeKnownBits (SDValue Op, APInt &KnownZero, APInt &KnownOne, unsigned Depth=0) const |
| Determine which bits of Op are known to be either zero or one and return them in the KnownZero/KnownOne bitsets. More... | |
| unsigned | ComputeNumSignBits (SDValue Op, unsigned Depth=0) const |
| Return the number of times the sign bit of the register is replicated into the other bits. More... | |
| bool | isBaseWithConstantOffset (SDValue Op) const |
| Return true if the specified operand is an ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an ISD::OR with a ConstantSDNode that is guaranteed to have the same semantics as an ADD. More... | |
| bool | isKnownNeverNaN (SDValue Op) const |
| Test whether the given SDValue is known to never be NaN. More... | |
| bool | isKnownNeverZero (SDValue Op) const |
| Test whether the given SDValue is known to never be positive or negative Zero. More... | |
| bool | isEqualTo (SDValue A, SDValue B) const |
| Test whether two SDValues are known to compare equal. More... | |
| SDValue | UnrollVectorOp (SDNode *N, unsigned ResNE=0) |
| Utility function used by legalize and lowering to "unroll" a vector operation by splitting out the scalars and operating on each element individually. More... | |
| bool | isConsecutiveLoad (LoadSDNode *LD, LoadSDNode *Base, unsigned Bytes, int Dist) const |
| Return true if LD is loading 'Bytes' bytes from a location that is 'Dist' units away from the location that the 'Base' load is loading from. More... | |
| unsigned | InferPtrAlignment (SDValue Ptr) const |
| Infer alignment of a load / store address. More... | |
| std::pair< EVT, EVT > | GetSplitDestVTs (const EVT &VT) const |
| Compute the VTs needed for the low/hi parts of a type which is split (or expanded) into two not necessarily identical pieces. More... | |
| std::pair< SDValue, SDValue > | SplitVector (const SDValue &N, const SDLoc &DL, const EVT &LoVT, const EVT &HiVT) |
| Split the vector with EXTRACT_SUBVECTOR using the provides VTs and return the low/high part. More... | |
| std::pair< SDValue, SDValue > | SplitVector (const SDValue &N, const SDLoc &DL) |
| Split the vector with EXTRACT_SUBVECTOR and return the low/high part. More... | |
| std::pair< SDValue, SDValue > | SplitVectorOperand (const SDNode *N, unsigned OpNo) |
| Split the node's operand with EXTRACT_SUBVECTOR and return the low/high part. More... | |
| void | ExtractVectorElements (SDValue Op, SmallVectorImpl< SDValue > &Args, unsigned Start=0, unsigned Count=0) |
| Append the extracted elements from Start to Count out of the vector Op in Args. More... | |
| unsigned | getEVTAlignment (EVT MemoryVT) const |
| getEVTAlignment - Compute the default alignment value for the given type. More... | |
Static Public Member Functions | |
| static bool | isCommutativeBinOp (unsigned Opcode) |
| Returns true if the opcode is a commutative binary operation. More... | |
| static const fltSemantics & | EVTToAPFloatSemantics (EVT VT) |
| Returns an APFloat semantics tag appropriate for the given type. More... | |
Public Attributes | |
| bool | NewNodesMustHaveLegalTypes |
| When true, additional steps are taken to ensure that getConstant() and similar functions return DAG nodes that have legal types. More... | |
| std::map< const SDNode *, std::string > | NodeGraphAttrs |
Friends | |
| struct | DAGUpdateListener |
| DAGUpdateListener is a friend so it can manipulate the listener stack. More... | |
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representation suitable for instruction selection.
This DAG is constructed as the first step of instruction selection in order to allow implementation of machine specific optimizations and code simplifications.
The representation used by the SelectionDAG is a target-independent representation, which has some similarities to the GCC RTL representation, but is significantly more simple, powerful, and is a graph form instead of a linear form.
Definition at line 179 of file SelectionDAG.h.
| typedef ilist<SDNode>::const_iterator llvm::SelectionDAG::allnodes_const_iterator |
Definition at line 316 of file SelectionDAG.h.
| typedef ilist<SDNode>::iterator llvm::SelectionDAG::allnodes_iterator |
Definition at line 319 of file SelectionDAG.h.
|
explicit |
Definition at line 927 of file SelectionDAG.cpp.
| SelectionDAG::~SelectionDAG | ( | ) |
Definition at line 943 of file SelectionDAG.cpp.
| void SelectionDAG::AddDbgValue | ( | SDDbgValue * | DB, |
| SDNode * | SD, | ||
| bool | isParameter | ||
| ) |
Add a dbg_value SDNode.
AddDbgValue - Add a dbg_value SDNode.
If SD is non-null that means the value is produced by SD.
Definition at line 6526 of file SelectionDAG.cpp.
References llvm::SDDbgInfo::add(), llvm::SDNode::getHasDebugValue(), llvm::SDDbgInfo::getSDDbgValues(), and llvm::SDNode::setHasDebugValue().
Referenced by llvm::SelectionDAGBuilder::resolveDanglingDebugInfo(), and TransferDbgValues().
|
inline |
Definition at line 326 of file SelectionDAG.h.
References allnodes_begin(), and allnodes_end().
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inline |
Definition at line 329 of file SelectionDAG.h.
References allnodes_begin(), and allnodes_end().
|
inline |
Definition at line 317 of file SelectionDAG.h.
Referenced by allnodes(), AssignTopologicalOrder(), Legalize(), llvm::GraphTraits< SelectionDAG * >::nodes_begin(), RemoveDeadNodes(), and llvm::DAGTypeLegalizer::run().
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Definition at line 320 of file SelectionDAG.h.
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inline |
Definition at line 318 of file SelectionDAG.h.
Referenced by allnodes(), AssignTopologicalOrder(), Legalize(), llvm::GraphTraits< SelectionDAG * >::nodes_end(), RemoveDeadNodes(), and llvm::DAGTypeLegalizer::run().
|
inline |
Definition at line 321 of file SelectionDAG.h.
Definition at line 322 of file SelectionDAG.h.
Referenced by AssignTopologicalOrder().
| unsigned SelectionDAG::AssignTopologicalOrder | ( | ) |
Topological-sort the AllNodes list and a assign a unique node id for each node in the DAG based on their topological order.
AssignTopologicalOrder - Assign a unique node id for each node in the DAG based on their topological order.
Returns the number of nodes.
It returns the maximum id and a vector of the SDNodes* in assigned order by reference.
Definition at line 6437 of file SelectionDAG.cpp.
References allnodes_begin(), allnodes_end(), allnodes_size(), llvm::checkForCycles(), llvm::dbgs(), llvm::SDNode::dumprFull(), llvm::ISD::EntryToken, llvm::SDNode::getNodeId(), llvm::SDNode::getNumOperands(), I, llvm_unreachable, N, P, llvm::SDNode::setNodeId(), llvm::SDNode::use_begin(), and llvm::SDNode::use_end().
Referenced by Legalize().
|
inline |
Definition at line 1128 of file SelectionDAG.h.
References llvm::SDDbgInfo::ByvalParmDbgBegin().
Referenced by llvm::ScheduleDAGSDNodes::EmitSchedule().
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inline |
Definition at line 1131 of file SelectionDAG.h.
References llvm::SDDbgInfo::ByvalParmDbgEnd().
Referenced by llvm::ScheduleDAGSDNodes::EmitSchedule().
| void SelectionDAG::clear | ( | ) |
Clear state and free memory necessary to make this SelectionDAG ready to process a new block.
Definition at line 1011 of file SelectionDAG.cpp.
References llvm::SDDbgInfo::clear(), getEntryNode(), and llvm::BumpPtrAllocatorImpl< AllocatorT, SlabSize, SizeThreshold >::Reset().
| void SelectionDAG::clearGraphAttrs | ( | ) |
Clear all previously defined node graph attributes.
clearGraphAttrs - Clear all previously defined node graph attributes.
Intended to be used from a debugging tool (eg. gdb).
Definition at line 165 of file SelectionDAGPrinter.cpp.
References llvm::errs(), and NodeGraphAttrs.
| void SelectionDAG::Combine | ( | CombineLevel | Level, |
| AliasAnalysis & | AA, | ||
| CodeGenOpt::Level | OptLevel | ||
| ) |
This iterates over the nodes in the SelectionDAG, folding certain types of nodes together, or eliminating superfluous nodes.
This is the entry point for the file.
The Level argument controls whether Combine is allowed to produce nodes and types that are illegal on the target.
This is the main entry point to this class.
Definition at line 14098 of file DAGCombiner.cpp.
| void SelectionDAG::computeKnownBits | ( | SDValue | Op, |
| APInt & | KnownZero, | ||
| APInt & | KnownOne, | ||
| unsigned | Depth = 0 |
||
| ) | const |
Determine which bits of Op are known to be either zero or one and return them in the KnownZero/KnownOne bitsets.
Targets can implement the computeKnownBitsForTargetNode method in the TargetLowering class to allow target nodes to be understood.
Definition at line 2020 of file SelectionDAG.cpp.
References llvm::APInt::abs(), llvm::ISD::ADD, llvm::ISD::ADDE, Align(), llvm::ISD::AND, llvm::ISD::ANY_EXTEND, llvm::ISD::AssertZext, llvm::ISD::BUILTIN_OP_END, llvm::APInt::clearAllBits(), llvm::TargetLowering::computeKnownBitsForTargetNode(), llvm::computeKnownBitsFromRangeMetadata(), llvm::ISD::Constant, llvm::APInt::countLeadingOnes(), llvm::countLeadingZeros(), llvm::APInt::countTrailingOnes(), llvm::ISD::CTLZ, llvm::ISD::CTLZ_ZERO_UNDEF, llvm::ISD::CTPOP, llvm::ISD::CTTZ, llvm::ISD::CTTZ_ZERO_UNDEF, llvm::ISD::EXTRACT_ELEMENT, llvm::ISD::FGETSIGN, llvm::ISD::FrameIndex, llvm::APInt::getBitsSet(), llvm::TargetLoweringBase::getBooleanContents(), llvm::APInt::getBoolValue(), llvm::APInt::getHighBitsSet(), llvm::APInt::getLowBitsSet(), llvm::MemSDNode::getMemoryVT(), llvm::SDValue::getNode(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::MemSDNode::getRanges(), llvm::SDValue::getResNo(), llvm::EVT::getScalarType(), llvm::APInt::getSignBit(), llvm::EVT::getSizeInBits(), llvm::SDValue::getValueType(), InferPtrAlignment(), llvm::ISD::INTRINSIC_VOID, llvm::ISD::INTRINSIC_W_CHAIN, llvm::ISD::INTRINSIC_WO_CHAIN, llvm::APInt::isPowerOf2(), llvm::EVT::isVector(), llvm::ISD::isZEXTLoad(), llvm::AArch64DB::LD, llvm::ISD::LOAD, llvm::Log2_32(), llvm::APInt::lshr(), fuzzer::min(), llvm::ISD::MUL, llvm::ISD::OR, Ranges, llvm::ISD::SADDO, llvm::ISD::SELECT, llvm::ISD::SELECT_CC, llvm::ISD::SETCC, llvm::ISD::SHL, llvm::ISD::SIGN_EXTEND, llvm::ISD::SIGN_EXTEND_INREG, llvm::ISD::SMAX, llvm::ISD::SMIN, llvm::ISD::SMULO, llvm::ISD::SRA, llvm::ISD::SREM, llvm::ISD::SRL, llvm::ISD::SSUBO, llvm::ISD::SUB, llvm::ISD::TargetFrameIndex, llvm::ISD::TRUNCATE, llvm::ISD::UADDO, llvm::ISD::UDIV, llvm::ISD::UMAX, llvm::ISD::UMIN, llvm::ISD::UMULO, llvm::ISD::UREM, llvm::ISD::USUBO, llvm::ISD::XOR, llvm::ISD::ZERO_EXTEND, llvm::TargetLoweringBase::ZeroOrOneBooleanContent, and llvm::APInt::zext().
Referenced by llvm::SelectionDAGISel::CheckOrMask(), computeKnownBitsForMinMax(), llvm::SparcTargetLowering::computeKnownBitsForTargetNode(), llvm::AArch64TargetLowering::computeKnownBitsForTargetNode(), llvm::ARMTargetLowering::computeKnownBitsForTargetNode(), ComputeNumSignBits(), FoldMaskAndShiftToScale(), isBitfieldInsertOpFromOr(), isBitfieldPositioningOp(), isTruncateOf(), isU24(), isWordAligned(), MaskedValueIsZero(), llvm::ARMTargetLowering::PerformCMOVCombine(), llvm::PPCTargetLowering::SelectAddressRegImm(), llvm::PPCTargetLowering::SelectAddressRegReg(), llvm::TargetLowering::SimplifyDemandedBits(), and ValueHasExactlyOneBitSet().
Return the number of times the sign bit of the register is replicated into the other bits.
ComputeNumSignBits - Return the number of times the sign bit of the register is replicated into the other bits.
We know that at least 1 bit is always equal to the sign bit (itself), but other cases can give us information. For example, immediately after an "SRA X, 2", we know that the top 3 bits are all equal to each other, so we return 3. Targets can implement the ComputeNumSignBitsForTarget method in the TargetLowering class to allow target nodes to be understood.
We know that at least 1 bit is always equal to the sign bit (itself), but other cases can give us information. For example, immediately after an "SRA X, 2", we know that the top 3 bits are all equal to each other, so we return 3.
Definition at line 2493 of file SelectionDAG.cpp.
References llvm::ISD::ADD, llvm::ISD::AND, llvm::ISD::AssertSext, llvm::ISD::AssertZext, llvm::ISD::BUILTIN_OP_END, llvm::C, computeKnownBits(), llvm::TargetLowering::ComputeNumSignBitsForTargetNode(), llvm::ISD::Constant, llvm::APInt::countLeadingZeros(), llvm::ISD::EXTRACT_ELEMENT, llvm::APInt::getBitWidth(), llvm::TargetLoweringBase::getBooleanContents(), llvm::APInt::getNumSignBits(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::SDValue::getResNo(), llvm::EVT::getScalarType(), llvm::EVT::getSizeInBits(), llvm::SDValue::getValueType(), llvm::ISD::INTRINSIC_VOID, llvm::ISD::INTRINSIC_W_CHAIN, llvm::ISD::INTRINSIC_WO_CHAIN, llvm::EVT::isInteger(), llvm::APInt::isNegative(), llvm::EVT::isVector(), llvm::AArch64DB::LD, fuzzer::min(), llvm::ISD::OR, llvm::ISD::ROTL, llvm::ISD::ROTR, llvm::ISD::SADDO, llvm::ISD::SELECT, llvm::ISD::SETCC, llvm::ISD::SEXTLOAD, llvm::ISD::SHL, llvm::ISD::SIGN_EXTEND, llvm::ISD::SIGN_EXTEND_INREG, llvm::ISD::SMAX, llvm::ISD::SMIN, llvm::ISD::SMULO, llvm::ISD::SRA, llvm::ISD::SSUBO, llvm::ISD::SUB, llvm::ISD::TRUNCATE, llvm::ISD::UADDO, llvm::ISD::UMAX, llvm::ISD::UMIN, llvm::ISD::UMULO, llvm::ISD::USUBO, llvm::ISD::XOR, llvm::TargetLoweringBase::ZeroOrNegativeOneBooleanContent, and llvm::ISD::ZEXTLOAD.
Referenced by llvm::AMDGPUTargetLowering::ComputeNumSignBitsForTargetNode(), llvm::TargetLowering::expandMUL(), isI24(), llvm::AMDGPUTargetLowering::LowerSDIVREM(), and llvm::AMDGPUTargetLowering::PerformDAGCombine().
Create a stack temporary, suitable for holding the specified value type.
CreateStackTemporary - Create a stack temporary, suitable for holding the specified value type.
If minAlign is specified, the slot size will have at least that alignment.
Definition at line 1861 of file SelectionDAG.cpp.
References llvm::MachineFrameInfo::CreateStackObject(), getContext(), getDataLayout(), getFrameIndex(), llvm::MachineFunction::getFrameInfo(), getMachineFunction(), llvm::TargetLoweringBase::getPointerTy(), llvm::EVT::getStoreSize(), and llvm::EVT::getTypeForEVT().
Referenced by llvm::StatepointLoweringState::allocateStackSlot(), ExpandUnalignedLoad(), ExpandUnalignedStore(), llvm::SystemZTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), and PerformEXTRACT_VECTOR_ELTCombine().
Create a stack temporary suitable for holding either of the specified value types.
CreateStackTemporary - Create a stack temporary suitable for holding either of the specified value types.
Definition at line 1874 of file SelectionDAG.cpp.
References Align(), llvm::MachineFrameInfo::CreateStackObject(), getContext(), getDataLayout(), getFrameIndex(), llvm::MachineFunction::getFrameInfo(), getMachineFunction(), llvm::TargetLoweringBase::getPointerTy(), llvm::DataLayout::getPrefTypeAlignment(), llvm::EVT::getStoreSizeInBits(), and llvm::EVT::getTypeForEVT().
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inline |
Definition at line 1126 of file SelectionDAG.h.
References llvm::SDDbgInfo::DbgBegin().
Referenced by llvm::ScheduleDAGSDNodes::EmitSchedule().
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inline |
Definition at line 1127 of file SelectionDAG.h.
References llvm::SDDbgInfo::DbgEnd().
Referenced by llvm::ScheduleDAGSDNodes::EmitSchedule().
| void SelectionDAG::DeleteNode | ( | SDNode * | N | ) |
Remove the specified node from the system.
This node must have no referrers.
Definition at line 679 of file SelectionDAG.cpp.
Referenced by Legalize(), and llvm::SelectionDAGBuilder::LowerStatepoint().
| void SelectionDAG::dump | ( | ) | const |
Definition at line 561 of file SelectionDAGDumper.cpp.
|
inlinestatic |
Returns an APFloat semantics tag appropriate for the given type.
If VT is a vector type, the element semantics are returned.
Definition at line 1098 of file SelectionDAG.h.
References llvm::MVT::f128, llvm::MVT::f16, llvm::MVT::f32, llvm::MVT::f64, llvm::MVT::f80, llvm::EVT::getScalarType(), llvm::EVT::getSimpleVT(), llvm::APFloat::IEEEdouble, llvm::APFloat::IEEEhalf, llvm::APFloat::IEEEquad, llvm::APFloat::IEEEsingle, llvm_unreachable, llvm::APFloat::PPCDoubleDouble, llvm::MVT::ppcf128, llvm::MVT::SimpleTy, and llvm::APFloat::x87DoubleExtended.
Referenced by FoldIntToFPToInt(), getConstantFP(), getMemsetValue(), getNode(), and llvm::ConstantFPSDNode::isValueValidForType().
| void SelectionDAG::ExtractVectorElements | ( | SDValue | Op, |
| SmallVectorImpl< SDValue > & | Args, | ||
| unsigned | Start = 0, |
||
| unsigned | Count = 0 |
||
| ) |
Append the extracted elements from Start to Count out of the vector Op in Args.
If Count is 0, all of the elements will be extracted.
Definition at line 6973 of file SelectionDAG.cpp.
References llvm::ISD::EXTRACT_VECTOR_ELT, getConstant(), getDataLayout(), getNode(), llvm::SDValue::getValueType(), llvm::EVT::getVectorElementType(), llvm::TargetLoweringBase::getVectorIdxTy(), llvm::EVT::getVectorNumElements(), and llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back().
| SDValue SelectionDAG::FoldConstantArithmetic | ( | unsigned | Opcode, |
| SDLoc | DL, | ||
| EVT | VT, | ||
| SDNode * | Cst1, | ||
| SDNode * | Cst2 | ||
| ) |
Definition at line 3218 of file SelectionDAG.cpp.
References llvm::SmallVectorTemplateCommon< T >::back(), llvm::ISD::BUILD_VECTOR, llvm::ISD::BUILTIN_OP_END, llvm::dyn_cast(), FoldValue(), llvm::ConstantSDNode::getAPIntValue(), getConstant(), getNode(), llvm::SDNode::getNumOperands(), llvm::SDNode::getOperand(), llvm::EVT::getScalarType(), llvm::SDNode::getValueType(), llvm::EVT::getVectorNumElements(), I, llvm::ConstantSDNode::isOpaque(), llvm::EVT::isVector(), llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back(), llvm::SmallVectorImpl< T >::resize(), llvm::SmallVectorTemplateCommon< T >::size(), and llvm::NVPTX::PTXLdStInstCode::V2.
Referenced by getNode().
| SDValue SelectionDAG::FoldConstantArithmetic | ( | unsigned | Opcode, |
| SDLoc | DL, | ||
| EVT | VT, | ||
| const ConstantSDNode * | Cst1, | ||
| const ConstantSDNode * | Cst2 | ||
| ) |
Definition at line 3205 of file SelectionDAG.cpp.
References FoldValue(), llvm::ConstantSDNode::getAPIntValue(), getConstant(), and llvm::ConstantSDNode::isOpaque().
Constant fold a setcc to true or false.
Definition at line 1888 of file SelectionDAG.cpp.
References llvm::APFloat::cmpEqual, llvm::APFloat::cmpGreaterThan, llvm::APFloat::cmpLessThan, llvm::APFloat::cmpUnordered, llvm::TargetLoweringBase::getBooleanContents(), getConstant(), getSetCC(), llvm::ISD::getSetCCSwappedOperands(), llvm::EVT::getSimpleVT(), getUNDEF(), llvm::SDValue::getValueType(), llvm::SDNode::getValueType(), llvm::TargetLoweringBase::isCondCodeLegal(), llvm::EVT::isInteger(), llvm_unreachable, llvm::ISD::SETEQ, llvm::ISD::SETFALSE, llvm::ISD::SETFALSE2, llvm::ISD::SETGE, llvm::ISD::SETGT, llvm::ISD::SETLE, llvm::ISD::SETLT, llvm::ISD::SETNE, llvm::ISD::SETO, llvm::ISD::SETOEQ, llvm::ISD::SETOGE, llvm::ISD::SETOGT, llvm::ISD::SETOLE, llvm::ISD::SETOLT, llvm::ISD::SETONE, llvm::ISD::SETTRUE, llvm::ISD::SETTRUE2, llvm::ISD::SETUEQ, llvm::ISD::SETUGE, llvm::ISD::SETUGT, llvm::ISD::SETULE, llvm::ISD::SETULT, llvm::ISD::SETUNE, llvm::ISD::SETUO, llvm::APInt::sge(), llvm::APInt::sgt(), llvm::APInt::sle(), llvm::APInt::slt(), llvm::APInt::uge(), llvm::APInt::ugt(), llvm::APInt::ule(), llvm::APInt::ult(), and llvm::TargetLoweringBase::ZeroOrNegativeOneBooleanContent.
Referenced by getNode(), and llvm::TargetLowering::SimplifySetCC().
| SDValue SelectionDAG::getAddrSpaceCast | ( | SDLoc | dl, |
| EVT | VT, | ||
| SDValue | Ptr, | ||
| unsigned | SrcAS, | ||
| unsigned | DestAS | ||
| ) |
Return an AddrSpaceCastSDNode.
getAddrSpaceCast - Return an AddrSpaceCastSDNode.
Definition at line 1828 of file SelectionDAG.cpp.
References llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), llvm::ISD::ADDRSPACECAST, llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), getVTList(), and llvm::IP.
Return an operation which will any-extend the low lanes of the operand into the specified vector type.
For example, this can convert a v16i8 into a v4i32 by any-extending the low four lanes of the operand from i8 to i32.
Definition at line 1070 of file SelectionDAG.cpp.
References llvm::ISD::ANY_EXTEND_VECTOR_INREG, getNode(), llvm::EVT::getSizeInBits(), llvm::SDValue::getValueType(), llvm::EVT::getVectorNumElements(), and llvm::EVT::isVector().
Convert Op, which must be of integer type, to the integer type VT, by either any-extending or truncating it.
Definition at line 1031 of file SelectionDAG.cpp.
References llvm::ISD::ANY_EXTEND, llvm::EVT::bitsGT(), getNode(), llvm::SDValue::getValueType(), and llvm::ISD::TRUNCATE.
Referenced by getNode().
| SDValue SelectionDAG::getAtomic | ( | unsigned | Opcode, |
| SDLoc | dl, | ||
| EVT | MemVT, | ||
| SDValue | Chain, | ||
| SDValue | Ptr, | ||
| SDValue | Val, | ||
| const Value * | PtrVal, | ||
| unsigned | Alignment, | ||
| AtomicOrdering | Ordering, | ||
| SynchronizationScope | SynchScope | ||
| ) |
Gets a node for an atomic op, produces result (if relevant) and chain and takes 2 operands.
Definition at line 4724 of file SelectionDAG.cpp.
References llvm::ISD::ATOMIC_LOAD, llvm::ISD::ATOMIC_STORE, getEVTAlignment(), getMachineFunction(), llvm::MachineFunction::getMachineMemOperand(), llvm::EVT::getStoreSize(), llvm::MachineMemOperand::MOLoad, llvm::MachineMemOperand::MOStore, and llvm::MachineMemOperand::MOVolatile.
Referenced by getAtomic(), getAtomicCmpSwap(), LowerATOMIC_STORE(), and LowerLOAD_SUB().
| SDValue SelectionDAG::getAtomic | ( | unsigned | Opcode, |
| SDLoc | dl, | ||
| EVT | MemVT, | ||
| SDValue | Chain, | ||
| SDValue | Ptr, | ||
| SDValue | Val, | ||
| MachineMemOperand * | MMO, | ||
| AtomicOrdering | Ordering, | ||
| SynchronizationScope | SynchScope | ||
| ) |
Definition at line 4755 of file SelectionDAG.cpp.
References llvm::ISD::ATOMIC_LOAD_ADD, llvm::ISD::ATOMIC_LOAD_AND, llvm::ISD::ATOMIC_LOAD_MAX, llvm::ISD::ATOMIC_LOAD_MIN, llvm::ISD::ATOMIC_LOAD_NAND, llvm::ISD::ATOMIC_LOAD_OR, llvm::ISD::ATOMIC_LOAD_SUB, llvm::ISD::ATOMIC_LOAD_UMAX, llvm::ISD::ATOMIC_LOAD_UMIN, llvm::ISD::ATOMIC_LOAD_XOR, llvm::ISD::ATOMIC_STORE, llvm::ISD::ATOMIC_SWAP, getAtomic(), llvm::SDValue::getValueType(), getVTList(), and llvm::MVT::Other.
| SDValue SelectionDAG::getAtomic | ( | unsigned | Opcode, |
| SDLoc | dl, | ||
| EVT | MemVT, | ||
| EVT | VT, | ||
| SDValue | Chain, | ||
| SDValue | Ptr, | ||
| MachineMemOperand * | MMO, | ||
| AtomicOrdering | Ordering, | ||
| SynchronizationScope | SynchScope | ||
| ) |
Gets a node for an atomic op, produces result and chain and takes 1 operand.
Definition at line 4783 of file SelectionDAG.cpp.
References llvm::ISD::ATOMIC_LOAD, getAtomic(), getVTList(), and llvm::MVT::Other.
| SDValue SelectionDAG::getAtomic | ( | unsigned | Opcode, |
| SDLoc | dl, | ||
| EVT | MemVT, | ||
| SDVTList | VTList, | ||
| ArrayRef< SDValue > | Ops, | ||
| MachineMemOperand * | MMO, | ||
| AtomicOrdering | SuccessOrdering, | ||
| AtomicOrdering | FailureOrdering, | ||
| SynchronizationScope | SynchScope | ||
| ) |
Gets a node for an atomic op, produces result and chain and takes N operands.
Definition at line 4637 of file SelectionDAG.cpp.
References llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), llvm::BumpPtrAllocatorImpl< AllocatorT, SlabSize, SizeThreshold >::Allocate(), llvm::ArrayRef< T >::data(), llvm::MachinePointerInfo::getAddrSpace(), llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), llvm::MachineMemOperand::getPointerInfo(), llvm::EVT::getRawBits(), llvm::IP, and llvm::ArrayRef< T >::size().
| SDValue SelectionDAG::getAtomic | ( | unsigned | Opcode, |
| SDLoc | dl, | ||
| EVT | MemVT, | ||
| SDVTList | VTList, | ||
| ArrayRef< SDValue > | Ops, | ||
| MachineMemOperand * | MMO, | ||
| AtomicOrdering | Ordering, | ||
| SynchronizationScope | SynchScope | ||
| ) |
Definition at line 4672 of file SelectionDAG.cpp.
References getAtomic().
| SDValue SelectionDAG::getAtomicCmpSwap | ( | unsigned | Opcode, |
| SDLoc | dl, | ||
| EVT | MemVT, | ||
| SDVTList | VTs, | ||
| SDValue | Chain, | ||
| SDValue | Ptr, | ||
| SDValue | Cmp, | ||
| SDValue | Swp, | ||
| MachinePointerInfo | PtrInfo, | ||
| unsigned | Alignment, | ||
| AtomicOrdering | SuccessOrdering, | ||
| AtomicOrdering | FailureOrdering, | ||
| SynchronizationScope | SynchScope | ||
| ) |
Gets a node for an atomic cmpxchg op.
There are two valid Opcodes. ISD::ATOMIC_CMO_SWAP produces the value loaded and a chain result. ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS produces the value loaded, a success flag (initially i1), and a chain.
Definition at line 4681 of file SelectionDAG.cpp.
References llvm::ISD::ATOMIC_CMP_SWAP, llvm::ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS, getEVTAlignment(), getMachineFunction(), llvm::MachineFunction::getMachineMemOperand(), llvm::EVT::getStoreSize(), llvm::SDValue::getValueType(), llvm::MachineMemOperand::MOLoad, llvm::MachineMemOperand::MOStore, and llvm::MachineMemOperand::MOVolatile.
| SDValue SelectionDAG::getAtomicCmpSwap | ( | unsigned | Opcode, |
| SDLoc | dl, | ||
| EVT | MemVT, | ||
| SDVTList | VTs, | ||
| SDValue | Chain, | ||
| SDValue | Ptr, | ||
| SDValue | Cmp, | ||
| SDValue | Swp, | ||
| MachineMemOperand * | MMO, | ||
| AtomicOrdering | SuccessOrdering, | ||
| AtomicOrdering | FailureOrdering, | ||
| SynchronizationScope | SynchScope | ||
| ) |
Definition at line 4708 of file SelectionDAG.cpp.
References llvm::ISD::ATOMIC_CMP_SWAP, llvm::ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS, getAtomic(), and llvm::SDValue::getValueType().
| SDValue SelectionDAG::getBasicBlock | ( | MachineBasicBlock * | MBB | ) |
Definition at line 1439 of file SelectionDAG.cpp.
References AddNodeIDNode(), llvm::FoldingSetNodeID::AddPointer(), llvm::ISD::BasicBlock, getVTList(), llvm::IP, llvm::None, and llvm::MVT::Other.
Referenced by AddNodeIDCustom(), llvm::SelectionDAGBuilder::visitBitTestCase(), llvm::SelectionDAGBuilder::visitBitTestHeader(), llvm::SelectionDAGBuilder::visitJumpTableHeader(), llvm::SelectionDAGBuilder::visitSPDescriptorParent(), and llvm::SelectionDAGBuilder::visitSwitchCase().
| SDValue llvm::SelectionDAG::getBasicBlock | ( | MachineBasicBlock * | MBB, |
| SDLoc | dl | ||
| ) |
Return a bitcast using the SDLoc of the value operand, and casting to the provided type.
Use getNode to set a custom SDLoc.
Definition at line 1820 of file SelectionDAG.cpp.
References llvm::ISD::BITCAST, getNode(), and llvm::SDValue::getValueType().
Referenced by llvm::X86TargetLowering::BuildFILD(), CMPEQCombine(), combineRedundantDWordShuffle(), combineX86ShuffleChain(), EltsFromConsecutiveLoads(), getGatherNode(), getOnesVector(), getPrefetchNode(), getScatterNode(), getTargetVShiftNode(), getVectorMaskingNode(), getVShift(), getZeroVector(), Insert128BitVector(), lower256BitVectorShuffle(), LowerAVXExtend(), LowerBITCAST(), LowerBuildVectorv16i8(), LowerBuildVectorv4x32(), LowerExtendedLoad(), LowerEXTRACT_VECTOR_ELT_SSE4(), LowerHorizontalByteSum(), LowerINTRINSIC_WO_CHAIN(), LowerMUL(), LowerMUL_LOHI(), LowerSCALAR_TO_VECTOR(), LowerScalarImmediateShift(), LowerShift(), LowerSIGN_EXTEND_VECTOR_INREG(), lowerUINT_TO_FP_vXi32(), lowerV16I16VectorShuffle(), lowerV16I8VectorShuffle(), lowerV2I64VectorShuffle(), lowerV4I32VectorShuffle(), lowerV4I64VectorShuffle(), lowerV8F32VectorShuffle(), lowerV8I16GeneralSingleInputVectorShuffle(), LowerVectorAllZeroTest(), LowerVectorCTPOPBitmath(), LowerVectorCTPOPInRegLUT(), lowerVectorShuffle(), lowerVectorShuffleAsBitBlend(), lowerVectorShuffleAsBitMask(), lowerVectorShuffleAsBlend(), lowerVectorShuffleAsByteRotate(), lowerVectorShuffleAsElementInsertion(), lowerVectorShuffleAsPSHUFB(), lowerVectorShuffleAsShift(), lowerVectorShuffleAsSpecificZeroOrAnyExtend(), lowerVectorShuffleAsUnpack(), lowerVectorShuffleAsZeroOrAnyExtend(), lowerVectorShuffleByMerging128BitLanes(), LowerVSETCC(), PerformEXTRACT_VECTOR_ELTCombine(), PerformMLOADCombine(), PerformMSTORECombine(), PerformOrCombine(), PerformSELECTCombine(), PerformShuffleCombine(), PerformShuffleCombine256(), PerformSTORECombine(), PerformTargetShuffleCombine(), performVectorCompareAndMaskUnaryOpCombine(), performVZEXTCombine(), llvm::X86TargetLowering::ReplaceNodeResults(), splitAndLowerVectorShuffle(), VectorZextCombine(), and XFormVExtractWithShuffleIntoLoad().
| SDValue SelectionDAG::getBlockAddress | ( | const BlockAddress * | BA, |
| EVT | VT, | ||
| int64_t | Offset = 0, |
||
| bool | isTarget = false, |
||
| unsigned char | TargetFlags = 0 |
||
| ) |
Definition at line 1764 of file SelectionDAG.cpp.
References llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), llvm::FoldingSetNodeID::AddPointer(), llvm::ISD::BlockAddress, getVTList(), llvm::IP, llvm::None, and llvm::ISD::TargetBlockAddress.
Referenced by getTargetBlockAddress(), and llvm::SelectionDAGBuilder::getValueImpl().
Convert Op, which must be of integer type, to the integer type VT, by using an extension appropriate for the target's BooleanContent for type OpVT or truncating it.
Definition at line 1049 of file SelectionDAG.cpp.
References llvm::EVT::bitsLE(), llvm::TargetLoweringBase::getBooleanContents(), llvm::TargetLoweringBase::getExtendForContent(), getNode(), llvm::SDValue::getValueType(), and llvm::ISD::TRUNCATE.
Referenced by llvm::TargetLowering::SimplifySetCC().
|
inline |
Return a new CALLSEQ_END node, which always must have a glue result (to ensure it's not CSE'd).
CALLSEQ_END does not have a useful SDLoc.
Definition at line 646 of file SelectionDAG.h.
References llvm::ISD::CALLSEQ_END, llvm::SDValue::getNode(), getNode(), getVTList(), llvm::MVT::Glue, llvm::MVT::Other, and llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back().
Referenced by llvm::HexagonTargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::NVPTXTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), llvm::SparcTargetLowering::LowerGlobalTLSAddress(), and PrepareTailCall().
Return a new CALLSEQ_START node, which always must have a glue result (to ensure it's not CSE'd).
CALLSEQ_START does not have a useful SDLoc.
Definition at line 637 of file SelectionDAG.h.
References llvm::ISD::CALLSEQ_START, getNode(), getVTList(), llvm::MVT::Glue, and llvm::MVT::Other.
Referenced by llvm::HexagonTargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::NVPTXTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), and llvm::SparcTargetLowering::LowerGlobalTLSAddress().
| SDValue SelectionDAG::getCommutedVectorShuffle | ( | const ShuffleVectorSDNode & | SV | ) |
Returns an ISD::VECTOR_SHUFFLE node semantically equivalent to the shuffle node in input but with swapped operands.
Example: shuffle A, B, <0,5,2,7> -> shuffle B, A, <4,1,6,3>
Definition at line 1684 of file SelectionDAG.cpp.
References llvm::ShuffleVectorSDNode::commuteMask(), llvm::ShuffleVectorSDNode::getMask(), llvm::SDNode::getOperand(), llvm::SDNode::getSimpleValueType(), and getVectorShuffle().
Referenced by lowerVectorShuffle().
| SDValue SelectionDAG::getCondCode | ( | ISD::CondCode | Cond | ) |
Definition at line 1495 of file SelectionDAG.cpp.
References N.
Referenced by getSelectCC(), getSetCC(), and llvm::TargetLowering::softenSetCCOperands().
| SDValue SelectionDAG::getConstant | ( | uint64_t | Val, |
| SDLoc | DL, | ||
| EVT | VT, | ||
| bool | isTarget = false, |
||
| bool | isOpaque = false |
||
| ) |
Definition at line 1125 of file SelectionDAG.cpp.
References llvm::EVT::getScalarType(), and llvm::EVT::getSizeInBits().
Referenced by AddCombineToVPADDL(), addIPMSequence(), adjustForSubtraction(), adjustForTestUnderMask(), adjustICmpTruncate(), adjustSubwordCmp(), adjustZeroCmp(), bitcastf32Toi32(), BuildExactSDIV(), BuildIntrinsicOp(), llvm::SITargetLowering::buildRSRC(), llvm::PPCTargetLowering::BuildSDIVPow2(), BuildSplatI(), llvm::TargetLowering::BuildUDIV(), buildVector(), BuildVectorFromScalar(), ChangeVSETULTtoVSETULE(), CMPEQCombine(), combineAcrossLanesIntrinsic(), CombineBaseUpdate(), constantFoldBFE(), ConvertI1VectorToInterger(), convertValVTToLocVT(), CreateCopyOfByValArgument(), createFPCmp(), createLoadLR(), createStoreLR(), emitCLC(), EmitCMP(), emitCmp(), emitMemMem(), emitSETCC(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForMemchr(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::ARMSelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemset(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForMemset(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrcmp(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrcpy(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrlen(), Expand64BitShift(), ExpandBITCAST(), expandf64Toi32(), llvm::TargetLowering::expandFP_TO_SINT(), llvm::TargetLowering::expandMUL(), ExpandUnalignedLoad(), ExpandUnalignedStore(), extractF64Exponent(), ExtractVectorElements(), FoldConstantArithmetic(), FoldMaskAndShiftToExtract(), FoldMaskAndShiftToScale(), FoldMaskedShiftToScaledMask(), FoldSetCC(), genConstMult(), GeneratePerfectShuffle(), GenerateTBL(), getAArch64Cmp(), getAArch64XALUOOp(), getAbsolute(), getARMIndexedAddressParts(), getBoundedStrlen(), getBuildVectorSplat(), getCCResult(), getConstant(), getCopyFromParts(), getCopyFromPartsVector(), llvm::RegsForValue::getCopyFromRegs(), getCopyToPartsVector(), GetExponent(), getGeneralPermuteNode(), getIntPtrConstant(), getLimitedPrecisionExp2(), getLogicalNOT(), getMemBasePlusOffset(), getMemsetStringVal(), getMemsetValue(), getNode(), getNOT(), getOnesVector(), getPermuteNode(), getReadPerformanceCounter(), getReadTimeStampCounter(), GetSignificand(), getT2IndexedAddressParts(), getTargetConstant(), getTargetShuffleNode(), getTargetVShiftByConstNode(), getTargetVShiftNode(), getUniformBase(), getV4X86ShuffleImm8ForMask(), llvm::SelectionDAGBuilder::getValueImpl(), getVShift(), getZeroExtendInReg(), getZeroVector(), initAccumulator(), Insert128BitVector(), isBLACompatibleAddress(), isConditionalZeroOrAllOnes(), IsSingleInstrConstant(), LowerADDC_ADDE_SUBC_SUBE(), LowerAsSplatVectorLoad(), LowerATOMIC_FENCE(), LowerBoolVSETCC_AVX512(), LowerBR_CC(), llvm::HexagonTargetLowering::LowerBR_JT(), llvm::HexagonTargetLowering::LowerBUILD_VECTOR(), LowerBuildVectorv16i8(), llvm::HexagonTargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::NVPTXTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), LowerCallResult(), llvm::TargetLowering::LowerCallTo(), LowerCMP_SWAP(), llvm::HexagonTargetLowering::LowerCONCAT_VECTORS(), LowerCONCAT_VECTORSvXi1(), LowerCTLZ(), LowerCTLZ_ZERO_UNDEF(), LowerCTTZ(), llvm::AMDGPUTargetLowering::LowerDIVREM24(), llvm::HexagonTargetLowering::LowerDYNAMIC_STACKALLOC(), LowerDYNAMIC_STACKALLOC(), LowerExtendedLoad(), llvm::HexagonTargetLowering::LowerEXTRACT_VECTOR(), LowerF128Load(), LowerF128Store(), lowerFCOPYSIGN32(), lowerFCOPYSIGN64(), LowerFGETSIGN(), llvm::R600TargetLowering::LowerFormalArguments(), llvm::NVPTXTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::SparcTargetLowering::LowerFormalArguments_64(), llvm::AMDGPUTargetLowering::LowerGlobalAddress(), LowerHorizontalByteSum(), LowerINSERT_SUBVECTOR(), llvm::HexagonTargetLowering::LowerINSERT_VECTOR(), LowerInterruptReturn(), LowerINTRINSIC_W_CHAIN(), LowerINTRINSIC_WO_CHAIN(), llvm::AMDGPUTargetLowering::LowerIntrinsicIABS(), LowerIntVSETCC_AVX512(), LowerLabelRef(), llvm::AMDGPUTargetLowering::LowerLOAD(), llvm::HexagonTargetLowering::LowerLOAD(), llvm::MipsTargetLowering::lowerLOAD(), LowerLOAD_SUB(), LowerMemOpCallTo(), lowerMSABinaryBitImmIntr(), lowerMSABitClear(), lowerMSABitClearImm(), lowerMSASplatImm(), lowerMSASplatZExt(), LowerMUL(), LowerMUL_LOHI(), lowerMUL_LOHI32(), llvm::R600TargetLowering::LowerOperation(), LowerPREFETCH(), llvm::NVPTXTargetLowering::LowerReturn(), llvm::SparcTargetLowering::LowerReturn_32(), llvm::SparcTargetLowering::LowerReturn_64(), llvm::MSP430TargetLowering::LowerRETURNADDR(), llvm::HexagonTargetLowering::LowerRETURNADDR(), LowerReverse_VECTOR_SHUFFLEv16i8_v8i16(), LowerScalarImmediateShift(), LowerSDIV_v4i16(), LowerSDIV_v4i8(), llvm::AMDGPUTargetLowering::LowerSDIVREM(), LowerSEHRESTOREFRAME(), LowerSELECT_CC(), llvm::MSP430TargetLowering::LowerSETCC(), LowerShift(), LowerShiftParts(), LowerSIGN_EXTEND_AVX512(), LowerSIGN_EXTEND_VECTOR_INREG(), llvm::AMDGPUTargetLowering::LowerSTORE(), LowerUDIV(), llvm::AMDGPUTargetLowering::LowerUDIVREM(), llvm::AMDGPUTargetLowering::LowerUDIVREM64(), lowerUINT_TO_FP_vXi32(), LowerUMULO_SMULO(), lowerV16I16VectorShuffle(), lowerV16I8VectorShuffle(), lowerV2F64VectorShuffle(), lowerV2X128VectorShuffle(), lowerV32I8VectorShuffle(), lowerV4F64VectorShuffle(), lowerV8F32VectorShuffle(), lowerV8I32VectorShuffle(), LowerVECTOR_SHUFFLE(), lowerVECTOR_SHUFFLE_SHF(), LowerVECTOR_SHUFFLEv8i8(), LowerVectorCTPOPBitmath(), LowerVectorCTPOPInRegLUT(), lowerVectorSETCC(), lowerVectorShuffleAsBitBlend(), lowerVectorShuffleAsBitMask(), lowerVectorShuffleAsBlend(), lowerVectorShuffleAsByteRotate(), lowerVectorShuffleAsElementInsertion(), lowerVectorShuffleAsInsertPS(), lowerVectorShuffleAsLanePermuteAndBlend(), lowerVectorShuffleAsPSHUFB(), lowerVectorShuffleAsShift(), lowerVectorShuffleAsSpecificZeroOrAnyExtend(), lowerVectorShuffleWithSHUFPD(), lowerVectorShuffleWithSSE4A(), LowerVSETCC(), LowerWRITE_REGISTER(), LowerXALUO(), LowerXOR(), LowerZERO_EXTEND_AVX512(), llvm::SparcTargetLowering::makeAddress(), MaterializeSETB(), memsetStore(), NarrowVectorLoadToElement(), NormalizeBuildVector(), OptimizeConditionalInDecrement(), PerformADCCombine(), performANDCombine(), PerformAndCombine(), PerformARMBUILD_VECTORCombine(), performBitcastCombine(), PerformBLENDICombine(), PerformBrCondCombine(), PerformCMOVCombine(), performConcatVectorsCombine(), llvm::R600TargetLowering::PerformDAGCombine(), llvm::AMDGPUTargetLowering::PerformDAGCombine(), llvm::SystemZTargetLowering::PerformDAGCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), performDSPShiftCombine(), performExtendCombine(), PerformEXTRACT_VECTOR_ELTCombine(), performIntegerAbsCombine(), PerformINTRINSIC_WO_CHAINCombine(), PerformIntrinsicCombine(), PerformISDSETCCCombine(), PerformLOADCombine(), PerformMLOADCombine(), PerformMSTORECombine(), performMulCombine(), PerformMULCombine(), PerformMulCombine(), performORCombine(), PerformORCombine(), PerformSELECTCombine(), performSetccAddFolding(), PerformSETCCCombine(), PerformSExtCombine(), PerformShiftCombine(), PerformSHLCombine(), performSTORECombine(), PerformSTORECombine(), PerformSubCombine(), PerformVCVTCombine(), PerformVDIVCombine(), PerformZExtCombine(), PrepareCall(), llvm::AArch64TargetLowering::ReconstructShuffle(), recoverFramePointer(), llvm::X86TargetLowering::ReplaceNodeResults(), ReplaceREADCYCLECOUNTER(), replaceSplatVectorStore(), llvm::AMDGPUTargetLowering::ScalarizeVectorLoad(), llvm::AMDGPUTargetLowering::ScalarizeVectorStore(), llvm::SelectionDAGISel::SelectCodeCommon(), ShrinkLoadReplaceStoreWithStore(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifySetCC(), skipExtensionForVectorMULL(), SkipExtensionForVMULL(), llvm::TargetLowering::softenSetCCOperands(), SplitVector(), llvm::AMDGPUTargetLowering::SplitVectorLoad(), llvm::AMDGPUTargetLowering::SplitVectorStore(), TranslateX86CC(), tryBuildVectorReplicate(), tryCombineShiftImm(), tryCombineToEXTR(), tryExtendDUPToExtractHigh(), tryFoldToZero(), tryFormConcatFromShuffle(), tryLowerToSLI(), TryMULWIDECombine(), tryToFoldExtendOfConstant(), UnpackFromArgumentSlot(), UnrollVectorOp(), VectorZextCombine(), llvm::SelectionDAGBuilder::visitBitTestCase(), llvm::SelectionDAGBuilder::visitBitTestHeader(), llvm::SelectionDAGBuilder::visitJumpTableHeader(), llvm::SelectionDAGBuilder::visitSPDescriptorParent(), llvm::SelectionDAGBuilder::visitSwitchCase(), WidenMaskArithmetic(), and WidenVector().
| SDValue SelectionDAG::getConstant | ( | const APInt & | Val, |
| SDLoc | DL, | ||
| EVT | VT, | ||
| bool | isTarget = false, |
||
| bool | isOpaque = false |
||
| ) |
Definition at line 1134 of file SelectionDAG.cpp.
References llvm::ConstantInt::get(), and getConstant().
| SDValue SelectionDAG::getConstant | ( | const ConstantInt & | Val, |
| SDLoc | DL, | ||
| EVT | VT, | ||
| bool | isTarget = false, |
||
| bool | isOpaque = false |
||
| ) |
Definition at line 1140 of file SelectionDAG.cpp.
References llvm::FoldingSetNodeID::AddBoolean(), AddNodeIDNode(), llvm::FoldingSetNodeID::AddPointer(), llvm::SmallVectorImpl< T >::assign(), llvm::ISD::BITCAST, llvm::ISD::BUILD_VECTOR, llvm::ISD::Constant, llvm::DL, llvm::SmallVectorTemplateCommon< T >::end(), llvm::ConstantInt::get(), llvm::ConstantInt::getBitWidth(), getConstant(), getContext(), getDataLayout(), llvm::SDLoc::getDebugLoc(), getNode(), llvm::EVT::getScalarType(), llvm::EVT::getSizeInBits(), llvm::TargetLoweringBase::getTypeAction(), llvm::TargetLoweringBase::getTypeToTransformTo(), llvm::ConstantInt::getValue(), llvm::EVT::getVectorNumElements(), llvm::EVT::getVectorVT(), getVTList(), llvm::SmallVectorImpl< T >::insert(), llvm::IP, llvm::DataLayout::isBigEndian(), llvm::EVT::isInteger(), llvm::EVT::isVector(), llvm::APInt::lshr(), NewNodesMustHaveLegalTypes, llvm::None, llvm::SmallVectorTemplateBase< T, isPodLike >::push_back(), llvm::ISD::TargetConstant, llvm::APInt::trunc(), llvm::TargetLoweringBase::TypeExpandInteger, llvm::TargetLoweringBase::TypePromoteInteger, and llvm::APInt::zext().
Definition at line 1279 of file SelectionDAG.cpp.
References llvm::lltok::APFloat, llvm::APFloat::convert(), EVTToAPFloatSemantics(), llvm::MVT::f128, llvm::MVT::f16, llvm::MVT::f32, llvm::MVT::f64, llvm::MVT::f80, llvm::EVT::getScalarType(), llvm_unreachable, llvm::MVT::ppcf128, and llvm::APFloat::rmNearestTiesToEven.
Referenced by llvm::X86TargetLowering::BuildFILD(), ExpandPowI(), getConstantFP(), getF32Constant(), getMemsetStringVal(), getMemsetValue(), GetNegatedExpression(), getNode(), getTargetConstantFP(), llvm::SelectionDAGBuilder::getValueImpl(), getZeroVector(), llvm::AMDGPUTargetLowering::LowerIntrinsicLRP(), llvm::AMDGPUTargetLowering::LowerSDIVREM(), lowerUINT_TO_FP_vXi32(), llvm::SITargetLowering::PerformDAGCombine(), llvm::X86TargetLowering::ReplaceNodeResults(), and llvm::SelectionDAGISel::SelectCodeCommon().
| SDValue SelectionDAG::getConstantFP | ( | const APFloat & | Val, |
| SDLoc | DL, | ||
| EVT | VT, | ||
| bool | isTarget = false |
||
| ) |
Definition at line 1239 of file SelectionDAG.cpp.
References llvm::ConstantFP::get(), getConstantFP(), and getContext().
| SDValue SelectionDAG::getConstantFP | ( | const ConstantFP & | CF, |
| SDLoc | DL, | ||
| EVT | VT, | ||
| bool | isTarget = false |
||
| ) |
Definition at line 1244 of file SelectionDAG.cpp.
References AddNodeIDNode(), llvm::FoldingSetNodeID::AddPointer(), llvm::SmallVectorImpl< T >::assign(), llvm::ISD::BUILD_VECTOR, llvm::ISD::ConstantFP, llvm::SDLoc::getDebugLoc(), getNode(), llvm::EVT::getScalarType(), llvm::EVT::getVectorNumElements(), getVTList(), llvm::IP, llvm::EVT::isFloatingPoint(), llvm::EVT::isVector(), llvm::None, and llvm::ISD::TargetConstantFP.
| SDValue SelectionDAG::getConstantPool | ( | const Constant * | C, |
| EVT | VT, | ||
| unsigned | Align = 0, |
||
| int | Offs = 0, |
||
| bool | isT = false, |
||
| unsigned char | TargetFlags = 0 |
||
| ) |
Definition at line 1368 of file SelectionDAG.cpp.
References llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), llvm::FoldingSetNodeID::AddPointer(), llvm::ISD::ConstantPool, getDataLayout(), llvm::DataLayout::getPrefTypeAlignment(), llvm::Value::getType(), getVTList(), llvm::IP, llvm::None, and llvm::ISD::TargetConstantPool.
Referenced by llvm::X86TargetLowering::BuildFILD(), getTargetConstantPool(), LowerFABSorFNEG(), LowerFCOPYSIGN(), and LowerVectorBroadcast().
| SDValue SelectionDAG::getConstantPool | ( | MachineConstantPoolValue * | C, |
| EVT | VT, | ||
| unsigned | Align = 0, |
||
| int | Offs = 0, |
||
| bool | isT = false, |
||
| unsigned char | TargetFlags = 0 |
||
| ) |
Definition at line 1395 of file SelectionDAG.cpp.
References llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), llvm::MachineConstantPoolValue::addSelectionDAGCSEId(), llvm::ISD::ConstantPool, getDataLayout(), llvm::DataLayout::getPrefTypeAlignment(), llvm::MachineConstantPoolValue::getType(), getVTList(), llvm::IP, llvm::None, and llvm::ISD::TargetConstantPool.
|
inline |
Definition at line 289 of file SelectionDAG.h.
Referenced by llvm::RegsForValue::AddInlineAsmOperands(), allowableAlignment(), llvm::X86TargetLowering::BuildFILD(), BuildVectorFromScalar(), canFoldInAddressingMode(), combineConcatVectorOfScalars(), CreateStackTemporary(), llvm::SelectionDAGBuilder::EmitBranchForMergedCondition(), llvm::ARMSelectionDAGInfo::EmitSpecializedLibcall(), llvm::XCoreSelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::AArch64SelectionDAGInfo::EmitTargetCodeForMemset(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemset(), llvm::TargetLowering::expandFP_TO_SINT(), ExpandUnalignedLoad(), ExpandUnalignedStore(), ExtractSubVector(), FindMemType(), getConstant(), getConstantFP(), getCopyFromParts(), getCopyFromPartsVector(), llvm::SelectionDAGBuilder::getCopyFromRegs(), llvm::RegsForValue::getCopyFromRegs(), getCopyToParts(), getCopyToPartsVector(), llvm::RegsForValue::getCopyToRegs(), getEVTAlignment(), getGatherNode(), getMemcpy(), getMemcpyLoadsAndStores(), getMemmove(), getMemmoveLoadsAndStores(), getMemset(), getMemsetStores(), getMemsetStringVal(), getMemsetValue(), getNode(), GetRegistersForValue(), getScatterNode(), GetSplitDestVTs(), llvm::SelectionDAGBuilder::getValueImpl(), getVectorMaskingNode(), llvm::SelectionDAGBuilder::init(), llvm::X86TargetLowering::LowerAsmOperandForConstraint(), LowerAsSplatVectorLoad(), LowerBITCAST(), llvm::HexagonTargetLowering::LowerCall(), llvm::AMDGPUTargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), lowerCallFromStatepoint(), llvm::HexagonTargetLowering::LowerCallResult(), llvm::AMDGPUTargetLowering::LowerDIVREM24(), LowerExtendedLoad(), llvm::SparcTargetLowering::LowerF128_LibCallArg(), llvm::SparcTargetLowering::LowerF128Compare(), llvm::SparcTargetLowering::LowerF128Op(), LowerFABSorFNEG(), LowerFCOPYSIGN(), llvm::R600TargetLowering::LowerFormalArguments(), llvm::SITargetLowering::LowerFormalArguments(), llvm::HexagonTargetLowering::LowerFormalArguments(), llvm::SystemZTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::SparcTargetLowering::LowerFormalArguments_64(), LowerFSINCOS(), llvm::AMDGPUTargetLowering::LowerGlobalAddress(), LowerINTRINSIC_WO_CHAIN(), llvm::HexagonTargetLowering::LowerReturn(), llvm::SystemZTargetLowering::LowerReturn(), llvm::SparcTargetLowering::LowerReturn_32(), llvm::SparcTargetLowering::LowerReturn_64(), llvm::AMDGPUTargetLowering::LowerSDIVREM(), LowerToTLSExecModel(), llvm::AMDGPUTargetLowering::LowerUDIVREM64(), LowerVECTOR_SHUFFLE(), llvm::TargetLowering::makeLibCall(), PerformARMBUILD_VECTORCombine(), PerformBUILD_VECTORCombine(), llvm::AMDGPUTargetLowering::PerformDAGCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), performExtendCombine(), PerformInsertEltCombine(), PerformLOADCombine(), PerformMLOADCombine(), PerformMSTORECombine(), performSelectCombine(), PerformSELECTCombine(), PerformSExtCombine(), PerformSINT_TO_FPCombine(), performSTORECombine(), PerformSTORECombine(), PerformUINT_TO_FPCombine(), llvm::AArch64TargetLowering::ReconstructShuffle(), ReplaceLoadVector(), llvm::PPCTargetLowering::ReplaceNodeResults(), llvm::X86TargetLowering::ReplaceNodeResults(), llvm::TargetLowering::SimplifySetCC(), llvm::TargetLowering::softenSetCCOperands(), llvm::AMDGPUTargetLowering::SplitVectorLoad(), tryFormConcatFromShuffle(), UnrollVectorOp(), llvm::TargetLowering::verifyReturnAddressArgumentIsConstant(), llvm::SelectionDAGBuilder::visitBitTestCase(), llvm::SelectionDAGBuilder::visitBitTestHeader(), llvm::SelectionDAGBuilder::visitJumpTableHeader(), llvm::SelectionDAGBuilder::visitSPDescriptorParent(), llvm::SelectionDAGBuilder::visitSwitchCase(), and XFormVExtractWithShuffleIntoLoad().
| SDValue SelectionDAG::getConvertRndSat | ( | EVT | VT, |
| SDLoc | dl, | ||
| SDValue | Val, | ||
| SDValue | DTy, | ||
| SDValue | STy, | ||
| SDValue | Rnd, | ||
| SDValue | Sat, | ||
| ISD::CvtCode | Code | ||
| ) |
Returns the ConvertRndSat Note: Avoid using this node because it may disappear in the future and most targets don't support it.
Definition at line 1694 of file SelectionDAG.cpp.
References AddNodeIDNode(), llvm::Code, llvm::ISD::CONVERT_RNDSAT, llvm::ISD::CVT_FF, llvm::ISD::CVT_SS, llvm::ISD::CVT_UU, llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), getVTList(), and llvm::IP.
Definition at line 547 of file SelectionDAG.h.
References llvm::ISD::CopyFromReg, getNode(), getRegister(), getVTList(), and llvm::MVT::Other.
Referenced by llvm::SITargetLowering::CreateLiveInRegister(), llvm::RegsForValue::getCopyFromRegs(), getFRAMEADDR(), getReadPerformanceCounter(), getReadTimeStampCounter(), GetTLSADDR(), llvm::HexagonTargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), llvm::HexagonTargetLowering::LowerCallResult(), LowerCallResult(), LowerCMP_SWAP(), LowerDYNAMIC_STACKALLOC(), llvm::R600TargetLowering::LowerFormalArguments(), llvm::SITargetLowering::LowerFormalArguments(), llvm::HexagonTargetLowering::LowerFormalArguments(), llvm::SystemZTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::SparcTargetLowering::LowerFormalArguments_64(), llvm::MSP430TargetLowering::LowerFRAMEADDR(), llvm::HexagonTargetLowering::LowerFRAMEADDR(), llvm::SparcTargetLowering::LowerGlobalTLSAddress(), LowerINTRINSIC_W_CHAIN(), LowerINTRINSIC_WO_CHAIN(), llvm::R600TargetLowering::LowerOperation(), llvm::SparcTargetLowering::LowerReturn_32(), llvm::HexagonTargetLowering::LowerRETURNADDR(), LowerRETURNADDR(), LowerSEHRESTOREFRAME(), llvm::MSP430TargetLowering::LowerSETCC(), performDivRemCombine(), llvm::X86TargetLowering::ReplaceNodeResults(), llvm::SelectionDAGBuilder::visitBitTestCase(), llvm::SelectionDAGBuilder::visitJumpTable(), and llvm::SelectionDAGBuilder::visitSPDescriptorParent().
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Definition at line 556 of file SelectionDAG.h.
References llvm::ISD::CopyFromReg, llvm::SDValue::getNode(), getNode(), getRegister(), getVTList(), llvm::MVT::Glue, and llvm::MVT::Other.
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Definition at line 522 of file SelectionDAG.h.
References llvm::ISD::CopyToReg, getNode(), getRegister(), llvm::SDValue::getValueType(), and llvm::MVT::Other.
Referenced by llvm::SITargetLowering::copyToM0(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemset(), llvm::RegsForValue::getCopyToRegs(), llvm::MipsTargetLowering::getOpndList(), getReadPerformanceCounter(), llvm::HexagonTargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), LowerCMP_SWAP(), LowerDYNAMIC_STACKALLOC(), llvm::HexagonTargetLowering::LowerEH_RETURN(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::SparcTargetLowering::LowerGlobalTLSAddress(), llvm::R600TargetLowering::LowerOperation(), llvm::HexagonTargetLowering::LowerReturn(), llvm::SystemZTargetLowering::LowerReturn(), llvm::SparcTargetLowering::LowerReturn_32(), llvm::SparcTargetLowering::LowerReturn_64(), LowerSEHRESTOREFRAME(), LowerToTLSGeneralDynamicModel32(), LowerToTLSLocalDynamicModel(), PrepareCall(), llvm::X86TargetLowering::ReplaceNodeResults(), llvm::SelectionDAGISel::SelectCodeCommon(), llvm::SelectionDAGBuilder::visitBitTestHeader(), and llvm::SelectionDAGBuilder::visitJumpTableHeader().
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Definition at line 530 of file SelectionDAG.h.
References llvm::ISD::CopyToReg, llvm::SDValue::getNode(), getNode(), getRegister(), llvm::SDValue::getValueType(), getVTList(), llvm::MVT::Glue, and llvm::MVT::Other.
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Definition at line 539 of file SelectionDAG.h.
References llvm::ISD::CopyToReg, llvm::SDValue::getNode(), getNode(), getVTList(), llvm::MVT::Glue, N, and llvm::MVT::Other.
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Definition at line 284 of file SelectionDAG.h.
References llvm::MachineFunction::getDataLayout().
Referenced by AddCombineToVPADDL(), addStackMapLiveVars(), allowableAlignment(), BuildExactSDIV(), llvm::X86TargetLowering::BuildFILD(), llvm::TargetLowering::BuildUDIV(), BuildVectorFromScalar(), canFoldInAddressingMode(), llvm::SelectionDAGBuilder::CopyValueToVirtualRegister(), CreateStackTemporary(), llvm::ARMSelectionDAGInfo::EmitSpecializedLibcall(), llvm::XCoreSelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::AArch64SelectionDAGInfo::EmitTargetCodeForMemset(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemset(), ExpandBITCAST(), llvm::TargetLowering::expandFP_TO_SINT(), llvm::TargetLowering::expandMUL(), ExpandUnalignedLoad(), ExpandUnalignedStore(), ExtractVectorElements(), FindOptimalMemOpLowering(), getConstant(), getConstantPool(), getCopyFromParts(), getCopyFromPartsVector(), llvm::SelectionDAGBuilder::getCopyFromRegs(), getCopyToParts(), getCopyToPartsVector(), getEVTAlignment(), GetExponent(), getGlobalAddress(), llvm::MipsDAGToDAGISel::getGlobalBaseReg(), getIntPtrConstant(), getLimitedPrecisionExp2(), getMemcpy(), getMemcpyLoadsAndStores(), getMemmove(), getMemmoveLoadsAndStores(), getMemset(), getMemsetStores(), getMemsetStringVal(), llvm::X86TargetLowering::getPICJumpTableRelocBase(), llvm::TargetLowering::getPICJumpTableRelocBase(), llvm::X86TargetLowering::getReturnAddressFrameIndex(), getShiftAmountOperand(), llvm::SparcTargetLowering::getSRetArgSize(), getUniformBase(), llvm::SelectionDAGBuilder::getValueImpl(), getVShift(), llvm::PPC::getVSPLTImmediate(), InferPtrAlignment(), llvm::SelectionDAGBuilder::init(), isBLACompatibleAddress(), isExtendedBUILD_VECTOR(), isNEONModifiedImm(), IsPredicateKnownToFail(), llvm::PPC::isVMRGEOShuffleMask(), llvm::PPC::isVMRGHShuffleMask(), llvm::PPC::isVMRGLShuffleMask(), llvm::PPC::isVPKUDUMShuffleMask(), llvm::PPC::isVPKUHUMShuffleMask(), llvm::PPC::isVPKUWUMShuffleMask(), llvm::PPC::isVSLDOIShuffleMask(), llvm::MSP430TargetLowering::LowerBlockAddress(), llvm::HexagonTargetLowering::LowerBlockAddress(), llvm::HexagonTargetLowering::LowerBR_JT(), llvm::NVPTXTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), lowerCallFromStatepoint(), llvm::TargetLowering::LowerCallTo(), llvm::AMDGPUTargetLowering::LowerDIVREM24(), llvm::HexagonTargetLowering::LowerEH_RETURN(), LowerExtendedLoad(), llvm::MSP430TargetLowering::LowerExternalSymbol(), llvm::SparcTargetLowering::LowerF128_LibCallArg(), llvm::SparcTargetLowering::LowerF128Compare(), llvm::SparcTargetLowering::LowerF128Op(), LowerFABSorFNEG(), LowerFCOPYSIGN(), llvm::SystemZTargetLowering::LowerFormalArguments(), llvm::NVPTXTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), LowerFSINCOS(), llvm::AMDGPUTargetLowering::LowerGlobalAddress(), llvm::MSP430TargetLowering::LowerGlobalAddress(), llvm::HexagonTargetLowering::LowerGLOBALADDRESS(), llvm::NVPTXTargetLowering::LowerGlobalAddress(), llvm::SparcTargetLowering::LowerGlobalTLSAddress(), LowerINTRINSIC_W_CHAIN(), llvm::MSP430TargetLowering::LowerJumpTable(), LowerMemOpCallTo(), LowerMUL_LOHI(), llvm::NVPTXTargetLowering::LowerReturn(), llvm::SparcTargetLowering::LowerReturn_32(), llvm::MSP430TargetLowering::LowerRETURNADDR(), LowerRETURNADDR(), llvm::AMDGPUTargetLowering::LowerSDIVREM(), LowerSEHRESTOREFRAME(), llvm::MSP430TargetLowering::LowerVASTART(), LowerVASTART(), LowerVectorBroadcast(), lowerVectorShuffleAsElementInsertion(), llvm::SparcTargetLowering::makeAddress(), llvm::TargetLowering::makeLibCall(), llvm::PPCTargetLowering::PerformDAGCombine(), PerformEXTRACT_VECTOR_ELTCombine(), PerformLOADCombine(), performMULCombine(), PerformSELECTCombine(), PerformSTORECombine(), PerformVMOVRRDCombine(), PrepareCall(), recoverFramePointer(), ReplaceLoadVector(), llvm::PPCTargetLowering::ReplaceNodeResults(), llvm::PPCTargetLowering::SelectAddressRegImm(), llvm::SelectionDAGISel::SelectCodeCommon(), ShrinkLoadReplaceStoreWithStore(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifySetCC(), SkipExtensionForVMULL(), llvm::TargetLowering::softenSetCCOperands(), SplitVector(), UnrollVectorOp(), llvm::SelectionDAGBuilder::visitBitTestCase(), llvm::SelectionDAGBuilder::visitBitTestHeader(), llvm::SelectionDAGBuilder::visitJumpTable(), llvm::SelectionDAGBuilder::visitJumpTableHeader(), llvm::SelectionDAGBuilder::visitSPDescriptorParent(), and XFormVExtractWithShuffleIntoLoad().
| SDDbgValue * SelectionDAG::getDbgValue | ( | MDNode * | Var, |
| MDNode * | Expr, | ||
| SDNode * | N, | ||
| unsigned | R, | ||
| bool | IsIndirect, | ||
| uint64_t | Off, | ||
| DebugLoc | DL, | ||
| unsigned | O | ||
| ) |
Creates a SDDbgValue node.
getDbgValue - Creates a SDDbgValue node.
Definition at line 6114 of file SelectionDAG.cpp.
References llvm::SDDbgInfo::getAlloc().
Referenced by llvm::SelectionDAGBuilder::resolveDanglingDebugInfo(), and TransferDbgValues().
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Get the debug values which reference the given SDNode.
Definition at line 1115 of file SelectionDAG.h.
References llvm::SDDbgInfo::getSDDbgValues().
Referenced by ProcessSDDbgValues(), and TransferDbgValues().
Definition at line 1747 of file SelectionDAG.cpp.
References AddNodeIDNode(), llvm::FoldingSetNodeID::AddPointer(), llvm::ISD::EH_LABEL, llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), getVTList(), llvm::IP, llvm::Label, and llvm::MVT::Other.
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Return the token chain corresponding to the entry of the function.
Definition at line 338 of file SelectionDAG.h.
Referenced by llvm::X86TargetLowering::BuildFILD(), clear(), llvm::SelectionDAGBuilder::CopyValueToVirtualRegister(), llvm::SITargetLowering::CreateLiveInRegister(), llvm::MipsTargetLowering::getAddrLocal(), llvm::SelectionDAGBuilder::getCopyFromRegs(), getFLUSHW(), getFRAMEADDR(), getMemCmpLoad(), getStackArgumentTokenFactor(), llvm::SelectionDAGBuilder::getValueImpl(), llvm::SparcTargetLowering::LowerCall_32(), lowerCallFromStatepoint(), llvm::SparcTargetLowering::LowerF128Compare(), llvm::SparcTargetLowering::LowerF128Op(), LowerFABSorFNEG(), LowerFCOPYSIGN(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::MSP430TargetLowering::LowerFRAMEADDR(), llvm::HexagonTargetLowering::LowerFRAMEADDR(), LowerFSINCOS(), llvm::AMDGPUTargetLowering::LowerGlobalAddress(), llvm::SparcTargetLowering::LowerGlobalTLSAddress(), LowerINTRINSIC_W_CHAIN(), LowerINTRINSIC_WO_CHAIN(), llvm::R600TargetLowering::LowerOperation(), llvm::MSP430TargetLowering::LowerRETURNADDR(), llvm::HexagonTargetLowering::LowerRETURNADDR(), LowerRETURNADDR(), llvm::MSP430TargetLowering::LowerSETCC(), LowerToTLSExecModel(), LowerToTLSGeneralDynamicModel32(), LowerToTLSGeneralDynamicModel64(), LowerToTLSLocalDynamicModel(), LowerVectorBroadcast(), llvm::SparcTargetLowering::makeAddress(), llvm::TargetLowering::makeLibCall(), performDivRemCombine(), PerformEXTRACT_VECTOR_ELTCombine(), ReplaceREADCYCLECOUNTER(), llvm::SelectionDAGISel::SelectCodeCommon(), and llvm::SelectionDAGBuilder::visitSPDescriptorParent().
getEVTAlignment - Compute the default alignment value for the given type.
Definition at line 918 of file SelectionDAG.cpp.
References llvm::PointerType::get(), llvm::DataLayout::getABITypeAlignment(), getContext(), getDataLayout(), llvm::Type::getInt8Ty(), llvm::EVT::getTypeForEVT(), and llvm::MVT::iPTR.
Referenced by getAtomic(), getAtomicCmpSwap(), getLoad(), getMemIntrinsicNode(), getStore(), and getTruncStore().
Definition at line 1467 of file SelectionDAG.cpp.
Referenced by llvm::ARMSelectionDAGInfo::EmitSpecializedLibcall(), llvm::XCoreSelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::AArch64SelectionDAGInfo::EmitTargetCodeForMemset(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemset(), getMemcpy(), getMemmove(), getMemset(), llvm::SparcTargetLowering::LowerF128Compare(), llvm::SparcTargetLowering::LowerF128Op(), LowerFSINCOS(), and llvm::TargetLowering::makeLibCall().
| SDValue SelectionDAG::getExtLoad | ( | ISD::LoadExtType | ExtType, |
| SDLoc | dl, | ||
| EVT | VT, | ||
| SDValue | Chain, | ||
| SDValue | Ptr, | ||
| MachinePointerInfo | PtrInfo, | ||
| EVT | MemVT, | ||
| bool | isVolatile, | ||
| bool | isNonTemporal, | ||
| bool | isInvariant, | ||
| unsigned | Alignment, | ||
| const AAMDNodes & | AAInfo = AAMDNodes() |
||
| ) |
Definition at line 5008 of file SelectionDAG.cpp.
References getLoad(), getUNDEF(), llvm::SDValue::getValueType(), llvm::RegState::Undef, and llvm::ISD::UNINDEXED.
Referenced by adjustSubwordCmp(), ExpandUnalignedLoad(), ExpandUnalignedStore(), getMemcpyLoadsAndStores(), LowerExtendedLoad(), llvm::NVPTXTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::AMDGPUTargetLowering::LowerLOAD(), llvm::HexagonTargetLowering::LowerLOAD(), llvm::AMDGPUTargetLowering::ScalarizeVectorLoad(), SkipLoadExtensionForVMULL(), and llvm::AMDGPUTargetLowering::SplitVectorLoad().
| SDValue SelectionDAG::getExtLoad | ( | ISD::LoadExtType | ExtType, |
| SDLoc | dl, | ||
| EVT | VT, | ||
| SDValue | Chain, | ||
| SDValue | Ptr, | ||
| EVT | MemVT, | ||
| MachineMemOperand * | MMO | ||
| ) |
Definition at line 5021 of file SelectionDAG.cpp.
References getLoad(), getUNDEF(), llvm::SDValue::getValueType(), llvm::RegState::Undef, and llvm::ISD::UNINDEXED.
Definition at line 1333 of file SelectionDAG.cpp.
References llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), llvm::ISD::FrameIndex, getVTList(), llvm::IP, llvm::None, and llvm::ISD::TargetFrameIndex.
Referenced by llvm::StatepointLoweringState::allocateStackSlot(), llvm::X86TargetLowering::BuildFILD(), CalculateTailCallArgDest(), CreateStackTemporary(), EmitTailCallStoreFPAndRetAddr(), EmitTailCallStoreRetAddr(), llvm::MSP430TargetLowering::getReturnAddressFrameIndex(), llvm::X86TargetLowering::getReturnAddressFrameIndex(), getTargetFrameIndex(), llvm::SelectionDAGBuilder::getValueImpl(), llvm::SparcTargetLowering::LowerCall_32(), llvm::TargetLowering::LowerCallTo(), llvm::SparcTargetLowering::LowerF128_LibCallArg(), llvm::SparcTargetLowering::LowerF128Op(), llvm::HexagonTargetLowering::LowerFormalArguments(), llvm::SystemZTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::SparcTargetLowering::LowerFormalArguments_64(), llvm::AMDGPUTargetLowering::LowerGlobalAddress(), LowerINTRINSIC_W_CHAIN(), LowerSEHRESTOREFRAME(), llvm::MSP430TargetLowering::LowerVASTART(), llvm::HexagonTargetLowering::LowerVASTART(), LowerVASTART(), and llvm::SelectionDAGBuilder::visitSPDescriptorParent().
| SDDbgValue * SelectionDAG::getFrameIndexDbgValue | ( | MDNode * | Var, |
| MDNode * | Expr, | ||
| unsigned | FI, | ||
| uint64_t | Off, | ||
| DebugLoc | DL, | ||
| unsigned | O | ||
| ) |
FrameIndex.
Definition at line 6133 of file SelectionDAG.cpp.
References llvm::SDDbgInfo::getAlloc().
Return a GLOBAL_OFFSET_TABLE node. This does not have a useful SDLoc.
Definition at line 664 of file SelectionDAG.h.
References getNode(), and llvm::ISD::GLOBAL_OFFSET_TABLE.
Referenced by llvm::TargetLowering::getPICJumpTableRelocBase().
| SDValue SelectionDAG::getGlobalAddress | ( | const GlobalValue * | GV, |
| SDLoc | DL, | ||
| EVT | VT, | ||
| int64_t | offset = 0, |
||
| bool | isTargetGA = false, |
||
| unsigned char | TargetFlags = 0 |
||
| ) |
Definition at line 1297 of file SelectionDAG.cpp.
References llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), llvm::FoldingSetNodeID::AddPointer(), llvm::PointerType::getAddressSpace(), getDataLayout(), llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), llvm::DataLayout::getPointerTypeSizeInBits(), llvm::GlobalValue::getType(), getVTList(), llvm::ISD::GlobalAddress, llvm::ISD::GlobalTLSAddress, llvm::IP, llvm::GlobalValue::isThreadLocal(), llvm::None, llvm::SignExtend64(), llvm::ISD::TargetGlobalAddress, and llvm::ISD::TargetGlobalTLSAddress.
Referenced by getTargetGlobalAddress(), and llvm::SelectionDAGBuilder::getValueImpl().
Get graph attributes for a node.
getGraphAttrs - Get graph attributes for a node.
(eg. "color=red".) Used from getNodeAttributes.
Definition at line 189 of file SelectionDAGPrinter.cpp.
References llvm::errs(), I, and NodeGraphAttrs.
Referenced by llvm::DOTGraphTraits< SelectionDAG * >::getNodeAttributes().
| SDValue SelectionDAG::getIndexedLoad | ( | SDValue | OrigLoad, |
| SDLoc | dl, | ||
| SDValue | Base, | ||
| SDValue | Offset, | ||
| ISD::MemIndexedMode | AM | ||
| ) |
Definition at line 5030 of file SelectionDAG.cpp.
References llvm::MemSDNode::getAlignment(), llvm::MemSDNode::getChain(), llvm::LoadSDNode::getExtensionType(), getLoad(), llvm::MemSDNode::getMemoryVT(), llvm::LoadSDNode::getOffset(), llvm::SDValue::getOpcode(), llvm::MemSDNode::getPointerInfo(), llvm::SDValue::getValueType(), llvm::MemSDNode::isNonTemporal(), llvm::MemSDNode::isVolatile(), llvm::AArch64DB::LD, and llvm::ISD::UNDEF.
| SDValue SelectionDAG::getIndexedStore | ( | SDValue | OrigStoe, |
| SDLoc | dl, | ||
| SDValue | Base, | ||
| SDValue | Offset, | ||
| ISD::MemIndexedMode | AM | ||
| ) |
Definition at line 5165 of file SelectionDAG.cpp.
References llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), llvm::MachinePointerInfo::getAddrSpace(), llvm::MemSDNode::getChain(), llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), llvm::MemSDNode::getMemOperand(), llvm::MemSDNode::getMemoryVT(), llvm::StoreSDNode::getOffset(), llvm::SDValue::getOpcode(), llvm::MemSDNode::getPointerInfo(), llvm::EVT::getRawBits(), llvm::MemSDNode::getRawSubclassData(), llvm::StoreSDNode::getValue(), llvm::SDValue::getValueType(), getVTList(), llvm::IP, llvm::StoreSDNode::isTruncatingStore(), llvm::MVT::Other, llvm::AArch64DB::ST, llvm::ISD::STORE, and llvm::ISD::UNDEF.
Definition at line 1235 of file SelectionDAG.cpp.
References getConstant(), getDataLayout(), and llvm::TargetLoweringBase::getPointerTy().
Referenced by llvm::X86TargetLowering::BuildFILD(), buildFromShuffleMostly(), CMPEQCombine(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemset(), ExtractSubVector(), getCopyToParts(), getFRAMEADDR(), getGatherNode(), getScatterNode(), getVectorMaskingNode(), Insert128BitVector(), InsertSubVector(), LowerBITCAST(), LowerBuildVectorv16i8(), LowerBuildVectorv4x32(), LowerBuildVectorv8i16(), llvm::HexagonTargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::NVPTXTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), lowerCallFromStatepoint(), LowerCONCAT_VECTORS(), LowerCONCAT_VECTORSvXi1(), lowerCTPOP16BitElements(), lowerCTPOP32BitElements(), llvm::HexagonTargetLowering::LowerEH_RETURN(), LowerExtendedLoad(), LowerFABSorFNEG(), LowerFCOPYSIGN(), llvm::SystemZTargetLowering::LowerFormalArguments(), llvm::NVPTXTargetLowering::LowerFormalArguments(), LowerFSINCOS(), llvm::SparcTargetLowering::LowerGlobalTLSAddress(), LowerINSERT_SUBVECTOR(), LowerINTRINSIC_WO_CHAIN(), LowerMUL(), llvm::NVPTXTargetLowering::LowerReturn(), LowerRETURNADDR(), LowerScalarVariableShift(), LowerSDIV(), LowerToTLSExecModel(), LowerUDIV(), LowerUMULO_SMULO(), lowerV2X128VectorShuffle(), LowerVAARG(), LowerVACOPY(), LowerVASTART(), LowerVectorINT_TO_FP(), PerformSExtCombine(), PerformSTORECombine(), performVZEXTCombine(), PrepareCall(), PrepareTailCall(), ReplaceLoadVector(), llvm::PPCTargetLowering::ReplaceNodeResults(), llvm::X86TargetLowering::ReplaceNodeResults(), and splitAndLowerVectorShuffle().
| SDValue SelectionDAG::getJumpTable | ( | int | JTI, |
| EVT | VT, | ||
| bool | isTarget = false, |
||
| unsigned char | TargetFlags = 0 |
||
| ) |
Definition at line 1348 of file SelectionDAG.cpp.
References llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), getVTList(), llvm::IP, llvm::ISD::JumpTable, llvm::None, and llvm::ISD::TargetJumpTable.
Referenced by getTargetJumpTable(), and llvm::SelectionDAGBuilder::visitJumpTable().
| SDValue SelectionDAG::getLoad | ( | EVT | VT, |
| SDLoc | dl, | ||
| SDValue | Chain, | ||
| SDValue | Ptr, | ||
| MachinePointerInfo | PtrInfo, | ||
| bool | isVolatile, | ||
| bool | isNonTemporal, | ||
| bool | isInvariant, | ||
| unsigned | Alignment, | ||
| const AAMDNodes & | AAInfo = AAMDNodes(), |
||
| const MDNode * | Ranges = nullptr |
||
| ) |
Loads are not normal binary operators: their result type is not determined by their operands, and they produce a value AND a token chain.
Definition at line 4987 of file SelectionDAG.cpp.
References getUNDEF(), llvm::SDValue::getValueType(), llvm::ISD::NON_EXTLOAD, llvm::RegState::Undef, and llvm::ISD::UNINDEXED.
Referenced by bitcastf32Toi32(), llvm::X86TargetLowering::BuildFILD(), convertLocVTToValVT(), EltsFromConsecutiveLoads(), llvm::ARMSelectionDAGInfo::EmitTargetCodeForMemcpy(), expandf64Toi32(), ExpandUnalignedLoad(), ExpandUnalignedStore(), llvm::MipsTargetLowering::getAddrGlobal(), llvm::MipsTargetLowering::getAddrGlobalLargeGOT(), llvm::MipsTargetLowering::getAddrLocal(), getExtLoad(), getFRAMEADDR(), getIndexedLoad(), getLoad(), getMemCmpLoad(), getMemmoveLoadsAndStores(), LowerAsSplatVectorLoad(), llvm::HexagonTargetLowering::LowerBR_JT(), llvm::NVPTXTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), llvm::TargetLowering::LowerCallTo(), LowerExtendedLoad(), LowerF128Load(), llvm::SparcTargetLowering::LowerF128Op(), LowerFABSorFNEG(), LowerFCOPYSIGN(), llvm::R600TargetLowering::LowerFormalArguments(), llvm::HexagonTargetLowering::LowerFormalArguments(), llvm::SystemZTargetLowering::LowerFormalArguments(), llvm::NVPTXTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::SparcTargetLowering::LowerFormalArguments_64(), llvm::MSP430TargetLowering::LowerFRAMEADDR(), llvm::HexagonTargetLowering::LowerFRAMEADDR(), LowerINTRINSIC_W_CHAIN(), llvm::HexagonTargetLowering::LowerLOAD(), lowerMSALoadIntr(), llvm::MSP430TargetLowering::LowerRETURNADDR(), llvm::HexagonTargetLowering::LowerRETURNADDR(), LowerRETURNADDR(), LowerSEHRESTOREFRAME(), LowerToTLSExecModel(), LowerVAARG(), LowerVectorBroadcast(), llvm::SparcTargetLowering::makeAddress(), NarrowVectorLoadToElement(), PerformEXTRACT_VECTOR_ELTCombine(), performIntToFpCombine(), PerformLOADCombine(), PerformSTORECombine(), PrepareCall(), llvm::X86TargetLowering::ReplaceNodeResults(), llvm::TargetLowering::SimplifySetCC(), SkipLoadExtensionForVMULL(), and llvm::SelectionDAGBuilder::visitSPDescriptorParent().
| SDValue SelectionDAG::getLoad | ( | EVT | VT, |
| SDLoc | dl, | ||
| SDValue | Chain, | ||
| SDValue | Ptr, | ||
| MachineMemOperand * | MMO | ||
| ) |
Definition at line 5000 of file SelectionDAG.cpp.
References getLoad(), getUNDEF(), llvm::SDValue::getValueType(), llvm::ISD::NON_EXTLOAD, llvm::RegState::Undef, and llvm::ISD::UNINDEXED.
| SDValue SelectionDAG::getLoad | ( | ISD::MemIndexedMode | AM, |
| ISD::LoadExtType | ExtType, | ||
| EVT | VT, | ||
| SDLoc | dl, | ||
| SDValue | Chain, | ||
| SDValue | Ptr, | ||
| SDValue | Offset, | ||
| MachinePointerInfo | PtrInfo, | ||
| EVT | MemVT, | ||
| bool | isVolatile, | ||
| bool | isNonTemporal, | ||
| bool | isInvariant, | ||
| unsigned | Alignment, | ||
| const AAMDNodes & | AAInfo = AAMDNodes(), |
||
| const MDNode * | Ranges = nullptr |
||
| ) |
Definition at line 4906 of file SelectionDAG.cpp.
References getEVTAlignment(), getLoad(), getMachineFunction(), llvm::MachineFunction::getMachineMemOperand(), llvm::EVT::getStoreSize(), llvm::SDValue::getValueType(), InferPointerInfo(), llvm::PointerUnion< PT1, PT2 >::isNull(), llvm::MachineMemOperand::MOInvariant, llvm::MachineMemOperand::MOLoad, llvm::MachineMemOperand::MONonTemporal, llvm::MachineMemOperand::MOVolatile, llvm::MVT::Other, Ranges, and llvm::MachinePointerInfo::V.
| SDValue SelectionDAG::getLoad | ( | ISD::MemIndexedMode | AM, |
| ISD::LoadExtType | ExtType, | ||
| EVT | VT, | ||
| SDLoc | dl, | ||
| SDValue | Chain, | ||
| SDValue | Ptr, | ||
| SDValue | Offset, | ||
| EVT | MemVT, | ||
| MachineMemOperand * | MMO | ||
| ) |
Definition at line 4939 of file SelectionDAG.cpp.
References llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), llvm::EVT::bitsLT(), encodeMemSDNodeFlags(), llvm::MachinePointerInfo::getAddrSpace(), llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), llvm::SDValue::getOpcode(), llvm::MachineMemOperand::getPointerInfo(), llvm::EVT::getRawBits(), llvm::EVT::getScalarType(), llvm::SDValue::getValueType(), llvm::EVT::getVectorNumElements(), getVTList(), llvm::IP, llvm::EVT::isInteger(), llvm::MachineMemOperand::isInvariant(), llvm::MachineMemOperand::isNonTemporal(), llvm::EVT::isVector(), llvm::MachineMemOperand::isVolatile(), llvm::ISD::LOAD, llvm::ISD::NON_EXTLOAD, llvm::MVT::Other, llvm::ISD::UNDEF, and llvm::ISD::UNINDEXED.
Create a logical NOT operation as (XOR Val, BooleanOne).
Definition at line 1109 of file SelectionDAG.cpp.
References llvm::APInt::getAllOnesValue(), llvm::TargetLoweringBase::getBooleanContents(), getConstant(), getNode(), llvm::EVT::getScalarType(), llvm::EVT::getSizeInBits(), llvm::TargetLoweringBase::UndefinedBooleanContent, llvm::ISD::XOR, llvm::TargetLoweringBase::ZeroOrNegativeOneBooleanContent, and llvm::TargetLoweringBase::ZeroOrOneBooleanContent.
|
inline |
Definition at line 283 of file SelectionDAG.h.
Referenced by llvm::RegsForValue::AddInlineAsmOperands(), llvm::X86TargetLowering::BuildFILD(), CalculateTailCallSPDiff(), llvm::AMDGPUTargetLowering::CreateLiveInRegister(), CreateStackTemporary(), llvm::ARMSelectionDAGInfo::EmitSpecializedLibcall(), llvm::ARMSelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::AArch64SelectionDAGInfo::EmitTargetCodeForMemset(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemset(), ExpandPowI(), llvm::SelectionDAGBuilder::FindMergedConditions(), FindOptimalMemOpLowering(), fixupFuncForFI(), getAtomic(), getAtomicCmpSwap(), getFRAMEADDR(), llvm::MipsTargetLowering::getGlobalReg(), llvm::DOTGraphTraits< SelectionDAG * >::getGraphName(), getLoad(), getMemcpyLoadsAndStores(), getMemIntrinsicNode(), getMemmoveLoadsAndStores(), getMemsetStores(), llvm::MipsTargetLowering::getOpndList(), llvm::X86TargetLowering::getRegisterByName(), GetRegistersForValue(), llvm::MSP430TargetLowering::getReturnAddressFrameIndex(), llvm::X86TargetLowering::getReturnAddressFrameIndex(), llvm::SparcTargetLowering::getSRetArgSize(), getStore(), GetTLSADDR(), getTruncStore(), hasReturnsTwiceAttr(), InferPtrAlignment(), isConsecutiveLoad(), isConsecutiveLSLoc(), llvm::HexagonTargetLowering::IsEligibleForTailCallOptimization(), llvm::TargetLowering::isInTailCallPosition(), LowerAsSplatVectorLoad(), llvm::HexagonTargetLowering::LowerBR_JT(), llvm::HexagonTargetLowering::LowerCall(), llvm::AMDGPUTargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::NVPTXTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), llvm::HexagonTargetLowering::LowerCallResult(), llvm::TargetLowering::LowerCallTo(), llvm::HexagonTargetLowering::LowerEH_RETURN(), llvm::SparcTargetLowering::LowerF128_LibCallArg(), llvm::SparcTargetLowering::LowerF128Op(), llvm::R600TargetLowering::LowerFormalArguments(), llvm::SITargetLowering::LowerFormalArguments(), llvm::HexagonTargetLowering::LowerFormalArguments(), llvm::SystemZTargetLowering::LowerFormalArguments(), llvm::NVPTXTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::SparcTargetLowering::LowerFormalArguments_64(), llvm::MSP430TargetLowering::LowerFRAMEADDR(), llvm::HexagonTargetLowering::LowerFRAMEADDR(), llvm::AMDGPUTargetLowering::LowerGlobalAddress(), llvm::SparcTargetLowering::LowerGlobalTLSAddress(), llvm::HexagonTargetLowering::LowerINLINEASM(), LowerInterruptReturn(), LowerINTRINSIC_W_CHAIN(), LowerINTRINSIC_WO_CHAIN(), llvm::R600TargetLowering::LowerOperation(), llvm::SITargetLowering::LowerOperation(), llvm::HexagonTargetLowering::LowerReturn(), llvm::SystemZTargetLowering::LowerReturn(), llvm::NVPTXTargetLowering::LowerReturn(), llvm::SparcTargetLowering::LowerReturn_32(), llvm::SparcTargetLowering::LowerReturn_64(), llvm::MSP430TargetLowering::LowerRETURNADDR(), llvm::HexagonTargetLowering::LowerRETURNADDR(), LowerRETURNADDR(), LowerSEHRESTOREFRAME(), LowerToTLSLocalDynamicModel(), llvm::MSP430TargetLowering::LowerVASTART(), llvm::HexagonTargetLowering::LowerVASTART(), LowerVASTART(), LowerVectorBroadcast(), llvm::SparcTargetLowering::makeAddress(), NarrowVectorLoadToElement(), PerformADDCombineWithOperands(), llvm::PPCTargetLowering::PerformDAGCombine(), PerformOrCombine(), performSTORECombine(), PerformSTORECombine(), PrepareTailCall(), recoverFramePointer(), setUsesTOCBasePtr(), llvm::X86InstrInfo::unfoldMemoryOperand(), and viewGraph().
| MachineSDNode * SelectionDAG::getMachineNode | ( | unsigned | Opcode, |
| SDLoc | dl, | ||
| EVT | VT | ||
| ) |
These are used for target selectors to create a new node with specified return type(s), MachineInstr opcode, and operands.
getMachineNode - These are used for target selectors to create a new node with specified return type(s), MachineInstr opcode, and operands.
Note that getMachineNode returns the resultant node. If there is already a node of the specified opcode and operands, it returns that node instead of the current one.
Definition at line 5917 of file SelectionDAG.cpp.
References getVTList(), and llvm::None.
Referenced by llvm::SITargetLowering::buildRSRC(), buildSMovImm32(), llvm::SITargetLowering::copyToM0(), getLeftShift(), getMachineNode(), getPrefetchNode(), getScatterNode(), getTargetExtractSubreg(), getTargetInsertSubreg(), llvm::SITargetLowering::legalizeTargetIndependentNode(), LowerATOMIC_FENCE(), LowerBITCAST(), LowerF128Load(), LowerF128Store(), LowerF64Op(), LowerFNEGorFABS(), lowerGR128Binary(), llvm::R600TargetLowering::LowerOperation(), llvm::SelectionDAGBuilder::LowerStatepoint(), narrowIfNeeded(), performBitcastCombine(), ReplaceBITCASTResults(), llvm::PPCTargetLowering::SelectAddressRegImm(), llvm::SelectionDAGISel::SelectCodeCommon(), SelectInt64(), SelectInt64Direct(), llvm::X86InstrInfo::unfoldMemoryOperand(), Widen(), and llvm::SITargetLowering::wrapAddr64Rsrc().
| MachineSDNode * SelectionDAG::getMachineNode | ( | unsigned | Opcode, |
| SDLoc | dl, | ||
| EVT | VT, | ||
| SDValue | Op1 | ||
| ) |
Definition at line 5923 of file SelectionDAG.cpp.
References getMachineNode(), and getVTList().
| MachineSDNode * SelectionDAG::getMachineNode | ( | unsigned | Opcode, |
| SDLoc | dl, | ||
| EVT | VT, | ||
| SDValue | Op1, | ||
| SDValue | Op2 | ||
| ) |
Definition at line 5930 of file SelectionDAG.cpp.
References getMachineNode(), and getVTList().
| MachineSDNode * SelectionDAG::getMachineNode | ( | unsigned | Opcode, |
| SDLoc | dl, | ||
| EVT | VT, | ||
| SDValue | Op1, | ||
| SDValue | Op2, | ||
| SDValue | Op3 | ||
| ) |
Definition at line 5938 of file SelectionDAG.cpp.
References getMachineNode(), and getVTList().
| MachineSDNode * SelectionDAG::getMachineNode | ( | unsigned | Opcode, |
| SDLoc | dl, | ||
| EVT | VT, | ||
| ArrayRef< SDValue > | Ops | ||
| ) |
Definition at line 5946 of file SelectionDAG.cpp.
References getMachineNode(), and getVTList().
| MachineSDNode * SelectionDAG::getMachineNode | ( | unsigned | Opcode, |
| SDLoc | dl, | ||
| EVT | VT1, | ||
| EVT | VT2 | ||
| ) |
Definition at line 5953 of file SelectionDAG.cpp.
References getMachineNode(), getVTList(), and llvm::None.
| MachineSDNode * SelectionDAG::getMachineNode | ( | unsigned | Opcode, |
| SDLoc | dl, | ||
| EVT | VT1, | ||
| EVT | VT2, | ||
| SDValue | Op1 | ||
| ) |
Definition at line 5959 of file SelectionDAG.cpp.
References getMachineNode(), and getVTList().
| MachineSDNode * SelectionDAG::getMachineNode | ( | unsigned | Opcode, |
| SDLoc | dl, | ||
| EVT | VT1, | ||
| EVT | VT2, | ||
| SDValue | Op1, | ||
| SDValue | Op2 | ||
| ) |
Definition at line 5967 of file SelectionDAG.cpp.
References getMachineNode(), and getVTList().
| MachineSDNode * SelectionDAG::getMachineNode | ( | unsigned | Opcode, |
| SDLoc | dl, | ||
| EVT | VT1, | ||
| EVT | VT2, | ||
| SDValue | Op1, | ||
| SDValue | Op2, | ||
| SDValue | Op3 | ||
| ) |
Definition at line 5975 of file SelectionDAG.cpp.
References getMachineNode(), and getVTList().
| MachineSDNode * SelectionDAG::getMachineNode | ( | unsigned | Opcode, |
| SDLoc | dl, | ||
| EVT | VT1, | ||
| EVT | VT2, | ||
| ArrayRef< SDValue > | Ops | ||
| ) |
Definition at line 5984 of file SelectionDAG.cpp.
References getMachineNode(), and getVTList().
| MachineSDNode * SelectionDAG::getMachineNode | ( | unsigned | Opcode, |
| SDLoc | dl, | ||
| EVT | VT1, | ||
| EVT | VT2, | ||
| EVT | VT3, | ||
| SDValue | Op1, | ||
| SDValue | Op2 | ||
| ) |
Definition at line 5992 of file SelectionDAG.cpp.
References getMachineNode(), and getVTList().
| MachineSDNode * SelectionDAG::getMachineNode | ( | unsigned | Opcode, |
| SDLoc | dl, | ||
| EVT | VT1, | ||
| EVT | VT2, | ||
| EVT | VT3, | ||
| SDValue | Op1, | ||
| SDValue | Op2, | ||
| SDValue | Op3 | ||
| ) |
Definition at line 6001 of file SelectionDAG.cpp.
References getMachineNode(), and getVTList().
| MachineSDNode * SelectionDAG::getMachineNode | ( | unsigned | Opcode, |
| SDLoc | dl, | ||
| EVT | VT1, | ||
| EVT | VT2, | ||
| EVT | VT3, | ||
| ArrayRef< SDValue > | Ops | ||
| ) |
Definition at line 6010 of file SelectionDAG.cpp.
References getMachineNode(), and getVTList().
| MachineSDNode * SelectionDAG::getMachineNode | ( | unsigned | Opcode, |
| SDLoc | dl, | ||
| EVT | VT1, | ||
| EVT | VT2, | ||
| EVT | VT3, | ||
| EVT | VT4, | ||
| ArrayRef< SDValue > | Ops | ||
| ) |
Definition at line 6018 of file SelectionDAG.cpp.
References getMachineNode(), and getVTList().
| MachineSDNode * SelectionDAG::getMachineNode | ( | unsigned | Opcode, |
| SDLoc | dl, | ||
| ArrayRef< EVT > | ResultTys, | ||
| ArrayRef< SDValue > | Ops | ||
| ) |
Definition at line 6026 of file SelectionDAG.cpp.
References getMachineNode(), and getVTList().
| MachineSDNode * SelectionDAG::getMachineNode | ( | unsigned | Opcode, |
| SDLoc | dl, | ||
| SDVTList | VTs, | ||
| ArrayRef< SDValue > | Ops | ||
| ) |
Definition at line 6034 of file SelectionDAG.cpp.
References AddNodeIDNode(), llvm::BumpPtrAllocatorImpl< AllocatorT, SlabSize, SizeThreshold >::Allocate(), llvm::array_lengthof(), llvm::ArrayRef< T >::data(), llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), llvm::MVT::Glue, llvm::SDNode::InitOperands(), llvm::IP, N, llvm::SDVTList::NumVTs, llvm::ArrayRef< T >::size(), and llvm::SDVTList::VTs.
| SDValue SelectionDAG::getMaskedGather | ( | SDVTList | VTs, |
| EVT | VT, | ||
| SDLoc | dl, | ||
| ArrayRef< SDValue > | Ops, | ||
| MachineMemOperand * | MMO | ||
| ) |
Definition at line 5247 of file SelectionDAG.cpp.
References llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), encodeMemSDNodeFlags(), llvm::MachinePointerInfo::getAddrSpace(), llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), llvm::MachineMemOperand::getPointerInfo(), llvm::EVT::getRawBits(), llvm::IP, llvm::MachineMemOperand::isInvariant(), llvm::MachineMemOperand::isNonTemporal(), llvm::MachineMemOperand::isVolatile(), llvm::ISD::MGATHER, llvm::ISD::NON_EXTLOAD, and llvm::ISD::UNINDEXED.
| SDValue SelectionDAG::getMaskedLoad | ( | EVT | VT, |
| SDLoc | dl, | ||
| SDValue | Chain, | ||
| SDValue | Ptr, | ||
| SDValue | Mask, | ||
| SDValue | Src0, | ||
| EVT | MemVT, | ||
| MachineMemOperand * | MMO, | ||
| ISD::LoadExtType | ExtTy | ||
| ) |
Definition at line 5192 of file SelectionDAG.cpp.
References llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), encodeMemSDNodeFlags(), llvm::MachinePointerInfo::getAddrSpace(), llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), llvm::MachineMemOperand::getPointerInfo(), llvm::EVT::getRawBits(), getVTList(), llvm::IP, llvm::MachineMemOperand::isInvariant(), llvm::MachineMemOperand::isNonTemporal(), llvm::MachineMemOperand::isVolatile(), llvm::ISD::MLOAD, llvm::MVT::Other, and llvm::ISD::UNINDEXED.
Referenced by PerformMLOADCombine().
| SDValue SelectionDAG::getMaskedScatter | ( | SDVTList | VTs, |
| EVT | VT, | ||
| SDLoc | dl, | ||
| ArrayRef< SDValue > | Ops, | ||
| MachineMemOperand * | MMO | ||
| ) |
Definition at line 5272 of file SelectionDAG.cpp.
References llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), encodeMemSDNodeFlags(), llvm::MachinePointerInfo::getAddrSpace(), llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), llvm::MachineMemOperand::getPointerInfo(), llvm::EVT::getRawBits(), llvm::IP, llvm::MachineMemOperand::isInvariant(), llvm::MachineMemOperand::isNonTemporal(), llvm::MachineMemOperand::isVolatile(), llvm::ISD::MSCATTER, and llvm::ISD::UNINDEXED.
Referenced by LowerMSCATTER().
| SDValue SelectionDAG::getMaskedStore | ( | SDValue | Chain, |
| SDLoc | dl, | ||
| SDValue | Val, | ||
| SDValue | Ptr, | ||
| SDValue | Mask, | ||
| EVT | MemVT, | ||
| MachineMemOperand * | MMO, | ||
| bool | IsTrunc | ||
| ) |
Definition at line 5219 of file SelectionDAG.cpp.
References llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), encodeMemSDNodeFlags(), llvm::MachinePointerInfo::getAddrSpace(), llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), llvm::MachineMemOperand::getPointerInfo(), llvm::SDValue::getValueType(), getVTList(), llvm::IP, llvm::MachineMemOperand::isInvariant(), llvm::MachineMemOperand::isNonTemporal(), llvm::MachineMemOperand::isVolatile(), llvm::ISD::MSTORE, llvm::MVT::Other, and llvm::ISD::UNINDEXED.
Referenced by PerformMSTORECombine().
Definition at line 1475 of file SelectionDAG.cpp.
Referenced by LowerINTRINSIC_WO_CHAIN(), and recoverFramePointer().
Return an MDNodeSDNode which holds an MDNode.
getMDNode - Return an MDNodeSDNode which holds an MDNode.
Definition at line 1805 of file SelectionDAG.cpp.
References AddNodeIDNode(), llvm::FoldingSetNodeID::AddPointer(), getVTList(), llvm::IP, llvm::ISD::MDNODE_SDNODE, llvm::None, and llvm::MVT::Other.
| SDValue SelectionDAG::getMemcpy | ( | SDValue | Chain, |
| SDLoc | dl, | ||
| SDValue | Dst, | ||
| SDValue | Src, | ||
| SDValue | Size, | ||
| unsigned | Align, | ||
| bool | isVol, | ||
| bool | AlwaysInline, | ||
| bool | isTailCall, | ||
| MachinePointerInfo | DstPtrInfo, | ||
| MachinePointerInfo | SrcPtrInfo | ||
| ) |
Definition at line 4449 of file SelectionDAG.cpp.
References Align(), llvm::dyn_cast(), llvm::TargetSelectionDAGInfo::EmitTargetCodeForMemcpy(), getContext(), getDataLayout(), getExternalSymbol(), llvm::DataLayout::getIntPtrType(), llvm::TargetLoweringBase::getLibcallCallingConv(), llvm::TargetLoweringBase::getLibcallName(), getMemcpyLoadsAndStores(), llvm::SDValue::getNode(), llvm::TargetLoweringBase::getPointerTy(), llvm::Type::getVoidTy(), llvm::ConstantSDNode::getZExtValue(), llvm::ConstantSDNode::isNullValue(), llvm::TargetLowering::LowerCallTo(), llvm::RTLIB::MEMCPY, llvm::TargetLowering::ArgListEntry::Node, llvm::TargetLowering::CallLoweringInfo::setCallee(), llvm::TargetLowering::CallLoweringInfo::setChain(), llvm::TargetLowering::CallLoweringInfo::setDebugLoc(), llvm::TargetLowering::CallLoweringInfo::setTailCall(), and llvm::TargetLowering::ArgListEntry::Ty.
Referenced by CreateCopyOfByValArgument(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::SparcTargetLowering::LowerCall_32(), and LowerVACOPY().
| SDValue SelectionDAG::getMemIntrinsicNode | ( | unsigned | Opcode, |
| SDLoc | dl, | ||
| SDVTList | VTList, | ||
| ArrayRef< SDValue > | Ops, | ||
| EVT | MemVT, | ||
| MachinePointerInfo | PtrInfo, | ||
| unsigned | Align = 0, |
||
| bool | Vol = false, |
||
| bool | ReadMem = true, |
||
| bool | WriteMem = true, |
||
| unsigned | Size = 0 |
||
| ) |
Creates a MemIntrinsicNode that may produce a result and takes a list of operands.
Opcode may be INTRINSIC_VOID, INTRINSIC_W_CHAIN, or a target-specific opcode with a value not less than FIRST_TARGET_MEMORY_OPCODE.
Definition at line 4809 of file SelectionDAG.cpp.
References getEVTAlignment(), getMachineFunction(), llvm::MachineFunction::getMachineMemOperand(), llvm::EVT::getStoreSize(), llvm::MachineMemOperand::MOLoad, llvm::MachineMemOperand::MOStore, and llvm::MachineMemOperand::MOVolatile.
Referenced by llvm::X86TargetLowering::BuildFILD(), CombineBaseUpdate(), CombineVLDDUP(), createLoadLR(), createStoreLR(), EltsFromConsecutiveLoads(), llvm::PPCTargetLowering::expandVSXLoadForLE(), llvm::PPCTargetLowering::expandVSXStoreForLE(), getTOCEntry(), llvm::NVPTXTargetLowering::LowerCall(), LowerCMP_SWAP(), llvm::NVPTXTargetLowering::LowerReturn(), llvm::PPCTargetLowering::PerformDAGCombine(), performNEONPostLDSTCombine(), performPostLD1Combine(), PerformShuffleCombine256(), ReplaceINTRINSIC_W_CHAIN(), ReplaceLoadVector(), and llvm::X86TargetLowering::ReplaceNodeResults().
| SDValue SelectionDAG::getMemIntrinsicNode | ( | unsigned | Opcode, |
| SDLoc | dl, | ||
| SDVTList | VTList, | ||
| ArrayRef< SDValue > | Ops, | ||
| EVT | MemVT, | ||
| MachineMemOperand * | MMO | ||
| ) |
Definition at line 4834 of file SelectionDAG.cpp.
References llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), llvm::ISD::FIRST_TARGET_MEMORY_OPCODE, llvm::MachinePointerInfo::getAddrSpace(), llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), llvm::MachineMemOperand::getPointerInfo(), llvm::MVT::Glue, llvm::ISD::INTRINSIC_VOID, llvm::ISD::INTRINSIC_W_CHAIN, llvm::IP, llvm::ISD::LIFETIME_END, llvm::ISD::LIFETIME_START, N, llvm::SDVTList::NumVTs, llvm::ISD::PREFETCH, and llvm::SDVTList::VTs.
| SDValue SelectionDAG::getMemmove | ( | SDValue | Chain, |
| SDLoc | dl, | ||
| SDValue | Dst, | ||
| SDValue | Src, | ||
| SDValue | Size, | ||
| unsigned | Align, | ||
| bool | isVol, | ||
| bool | isTailCall, | ||
| MachinePointerInfo | DstPtrInfo, | ||
| MachinePointerInfo | SrcPtrInfo | ||
| ) |
Definition at line 4519 of file SelectionDAG.cpp.
References Align(), llvm::dyn_cast(), llvm::TargetSelectionDAGInfo::EmitTargetCodeForMemmove(), getContext(), getDataLayout(), getExternalSymbol(), llvm::DataLayout::getIntPtrType(), llvm::TargetLoweringBase::getLibcallCallingConv(), llvm::TargetLoweringBase::getLibcallName(), getMemmoveLoadsAndStores(), llvm::SDValue::getNode(), llvm::TargetLoweringBase::getPointerTy(), llvm::Type::getVoidTy(), llvm::ConstantSDNode::getZExtValue(), llvm::ConstantSDNode::isNullValue(), llvm::TargetLowering::LowerCallTo(), llvm::RTLIB::MEMMOVE, llvm::TargetLowering::ArgListEntry::Node, llvm::TargetLowering::CallLoweringInfo::setCallee(), llvm::TargetLowering::CallLoweringInfo::setChain(), llvm::TargetLowering::CallLoweringInfo::setDebugLoc(), llvm::TargetLowering::CallLoweringInfo::setTailCall(), and llvm::TargetLowering::ArgListEntry::Ty.
| SDValue SelectionDAG::getMemset | ( | SDValue | Chain, |
| SDLoc | dl, | ||
| SDValue | Dst, | ||
| SDValue | Src, | ||
| SDValue | Size, | ||
| unsigned | Align, | ||
| bool | isVol, | ||
| bool | isTailCall, | ||
| MachinePointerInfo | DstPtrInfo | ||
| ) |
Definition at line 4577 of file SelectionDAG.cpp.
References Align(), llvm::dyn_cast(), llvm::TargetSelectionDAGInfo::EmitTargetCodeForMemset(), getContext(), getDataLayout(), getExternalSymbol(), llvm::DataLayout::getIntPtrType(), llvm::TargetLoweringBase::getLibcallCallingConv(), llvm::TargetLoweringBase::getLibcallName(), getMemsetStores(), llvm::SDValue::getNode(), llvm::TargetLoweringBase::getPointerTy(), llvm::EVT::getTypeForEVT(), llvm::SDValue::getValueType(), llvm::Type::getVoidTy(), llvm::ConstantSDNode::getZExtValue(), llvm::ConstantSDNode::isNullValue(), llvm::TargetLowering::LowerCallTo(), llvm::RTLIB::MEMSET, llvm::TargetLowering::ArgListEntry::Node, llvm::TargetLowering::CallLoweringInfo::setCallee(), llvm::TargetLowering::CallLoweringInfo::setChain(), llvm::TargetLowering::CallLoweringInfo::setDebugLoc(), llvm::TargetLowering::CallLoweringInfo::setTailCall(), and llvm::TargetLowering::ArgListEntry::Ty.
Referenced by llvm::X86SelectionDAGInfo::EmitTargetCodeForMemset().
Create a MERGE_VALUES node from the given operands.
getMergeValues - Create a MERGE_VALUES node from the given operands.
Definition at line 4797 of file SelectionDAG.cpp.
References getNode(), getVTList(), llvm::ISD::MERGE_VALUES, llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back(), llvm::SmallVectorImpl< T >::reserve(), and llvm::ArrayRef< T >::size().
Referenced by llvm::SelectionDAGBuilder::getValueImpl(), LowerADDC_ADDE_SUBC_SUBE(), llvm::AMDGPUTargetLowering::LowerDIVREM24(), lowerDSPIntr(), LowerDYNAMIC_STACKALLOC(), LowerF128Load(), LowerINTRINSIC_W_CHAIN(), llvm::AMDGPUTargetLowering::LowerLOAD(), llvm::HexagonTargetLowering::LowerLOAD(), llvm::MipsTargetLowering::lowerLOAD(), LowerMUL_LOHI(), llvm::AMDGPUTargetLowering::LowerSDIVREM(), LowerShiftParts(), llvm::AMDGPUTargetLowering::LowerUDIVREM(), LowerUMULO_SMULO(), llvm::AMDGPUTargetLowering::ScalarizeVectorLoad(), and llvm::AMDGPUTargetLowering::SplitVectorLoad().
Gets or creates the specified node.
Definition at line 5303 of file SelectionDAG.cpp.
References llvm::ArrayRef< T >::begin(), llvm::ArrayRef< T >::end(), and llvm::ArrayRef< T >::size().
Referenced by AddCombineTo64bitMLAL(), AddCombineToVPADDL(), addIPMSequence(), addRequiredExtensionForVectorMULL(), AddRequiredExtensionForVMULL(), BuildExactSDIV(), llvm::X86TargetLowering::BuildFILD(), buildFromShuffleMostly(), BuildIntrinsicOp(), buildMergeScalars(), buildScalarToVector(), llvm::PPCTargetLowering::BuildSDIVPow2(), BuildSplatI(), llvm::TargetLowering::BuildUDIV(), buildVector(), BuildVectorFromScalar(), BuildVSLDOI(), ChangeVSETULTtoVSETULE(), CMPEQCombine(), combineAcrossLanesIntrinsic(), CombineBaseUpdate(), combineConcatVectorOfScalars(), llvm::AMDGPUTargetLowering::CombineFMinMaxLegacy(), llvm::AMDGPUTargetLowering::CombineIMinMax(), combineMinNumMaxNum(), combineRedundantDWordShuffle(), combineRedundantHalfShuffle(), combineSelectAndUse(), combineShuffleToAddSub(), CompactSwizzlableVector(), convertLocVTToValVT(), ConvertSelectToConcatVector(), convertValVTToLocVT(), createCMovFP(), createFPCmp(), createLoadLR(), createSplat(), createStoreLR(), EltsFromConsecutiveLoads(), emitCLC(), EmitCMP(), emitCmp(), emitComparison(), emitIntrinsicWithChainAndGlue(), emitIntrinsicWithGlue(), emitMemMem(), emitSETCC(), llvm::ARMSelectionDAGInfo::EmitSpecializedLibcall(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForMemchr(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::ARMSelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemset(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForMemset(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrcmp(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrcpy(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrnlen(), EmitVectorComparison(), Expand64BitShift(), ExpandBITCAST(), ExpandBVWithShuffles(), expandExp(), expandExp2(), expandf64Toi32(), llvm::TargetLowering::expandFP_TO_SINT(), ExpandHorizontalBinOp(), expandLog(), expandLog10(), expandLog2(), llvm::TargetLowering::expandMUL(), expandPow(), ExpandPowI(), ExpandREAD_REGISTER(), ExpandUnalignedLoad(), ExpandUnalignedStore(), expandV4F32ToV2F64(), llvm::PPCTargetLowering::expandVSXLoadForLE(), llvm::PPCTargetLowering::expandVSXStoreForLE(), extractF64Exponent(), extractLOHI(), ExtractSubVector(), ExtractVectorElements(), FoldConstantArithmetic(), FoldIntToFPToInt(), FoldMaskAndShiftToExtract(), FoldMaskAndShiftToScale(), FoldMaskedShiftToScaledMask(), genConstMult(), GeneratePerfectShuffle(), GenerateTBL(), getAArch64Cmp(), getAArch64XALUOOp(), getAbsolute(), llvm::MipsTargetLowering::getAddrGlobal(), llvm::MipsTargetLowering::getAddrGlobalLargeGOT(), llvm::MipsTargetLowering::getAddrGPRel(), llvm::MipsTargetLowering::getAddrLocal(), llvm::MipsTargetLowering::getAddrNonPIC(), getAnyExtendVectorInReg(), getAnyExtOrTrunc(), getBitcast(), getBoolExtOrTrunc(), getBoundedStrlen(), getBuildVectorSplat(), getCALLSEQ_END(), getCALLSEQ_START(), getCCResult(), getConstant(), getConstantFP(), llvm::SelectionDAGBuilder::getControlRoot(), getCopyFromParts(), getCopyFromPartsVector(), getCopyFromReg(), llvm::RegsForValue::getCopyFromRegs(), getCopyToParts(), getCopyToPartsVector(), getCopyToReg(), llvm::RegsForValue::getCopyToRegs(), getCTPOP16BitCounts(), GetExponent(), getFLUSHW(), getFRAMEADDR(), getGatherNode(), getGeneralPermuteNode(), getGLOBAL_OFFSET_TABLE(), getLimitedPrecisionExp2(), getLogicalNOT(), getMemBasePlusOffset(), getMemcpyLoadsAndStores(), getMemmoveLoadsAndStores(), getMemsetStores(), getMemsetStringVal(), getMemsetValue(), getMergeValues(), GetNegatedExpression(), getNode(), getNOT(), getOnesVector(), getPermuteNode(), llvm::X86TargetLowering::getPICJumpTableRelocBase(), getReadPerformanceCounter(), getReadTimeStampCounter(), llvm::AMDGPUTargetLowering::getRecipEstimate(), GetRegistersForValue(), llvm::SelectionDAGBuilder::getRoot(), llvm::AMDGPUTargetLowering::getRsqrtEstimate(), getScalarMaskingNode(), getScalarValueForVectorElement(), getScatterNode(), getSelect(), getSelectCC(), getSetCC(), getSExtOrTrunc(), getShiftAmountOperand(), getSignExtendVectorInReg(), GetSignificand(), getStackArgumentTokenFactor(), getTargetShuffleNode(), getTargetVShiftByConstNode(), getTargetVShiftNode(), GetTLSADDR(), getTOCEntry(), getUNDEF(), getUniformBase(), getVAArg(), llvm::SelectionDAGBuilder::getValueImpl(), getVectorCmp(), getVectorMaskingNode(), getVectorShuffle(), getVShift(), getZeroExtendInReg(), getZeroExtendVectorInReg(), getZeroVector(), getZExtOrTrunc(), HandleMergeInputChains(), initAccumulator(), Insert128BitVector(), InsertSubVector(), isLoadIncOrDecStore(), joinDwords(), Lower256IntArith(), Lower256IntVSETCC(), LowerADD(), LowerADDC_ADDE_SUBC_SUBE(), LowerAsSplatVectorLoad(), llvm::HexagonTargetLowering::LowerATOMIC_FENCE(), LowerATOMIC_FENCE(), LowerAVXExtend(), LowerBITCAST(), llvm::MSP430TargetLowering::LowerBlockAddress(), llvm::HexagonTargetLowering::LowerBlockAddress(), LowerBoolVSETCC_AVX512(), llvm::MSP430TargetLowering::LowerBR_CC(), LowerBR_CC(), llvm::HexagonTargetLowering::LowerBR_JT(), llvm::HexagonTargetLowering::LowerBUILD_VECTOR(), LowerBuildVectorv16i8(), LowerBuildVectorv4x32(), LowerBuildVectorv8i16(), llvm::HexagonTargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::NVPTXTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), LowerCallResult(), llvm::TargetLowering::LowerCallTo(), LowerCMP_SWAP(), llvm::HexagonTargetLowering::LowerCONCAT_VECTORS(), LowerCONCAT_VECTORS(), LowerCONCAT_VECTORSvXi1(), llvm::HexagonTargetLowering::LowerConstantPool(), LowerConstantPool(), LowerCTLZ(), LowerCTLZ_ZERO_UNDEF(), llvm::HexagonTargetLowering::LowerCTPOP(), lowerCTPOP16BitElements(), lowerCTPOP32BitElements(), LowerCTTZ(), llvm::AMDGPUTargetLowering::LowerDIVREM24(), lowerDSPIntr(), llvm::HexagonTargetLowering::LowerDYNAMIC_STACKALLOC(), LowerDYNAMIC_STACKALLOC(), llvm::HexagonTargetLowering::LowerEH_RETURN(), LowerExtendedLoad(), llvm::MSP430TargetLowering::LowerExternalSymbol(), llvm::HexagonTargetLowering::LowerEXTRACT_VECTOR(), LowerEXTRACT_VECTOR_ELT(), LowerEXTRACT_VECTOR_ELT_SSE4(), llvm::SparcTargetLowering::LowerF128Compare(), LowerF128Load(), LowerF128Store(), LowerF64Op(), LowerFABSorFNEG(), LowerFCOPYSIGN(), lowerFCOPYSIGN32(), lowerFCOPYSIGN64(), LowerFGETSIGN(), LowerFNEGorFABS(), llvm::SITargetLowering::LowerFormalArguments(), llvm::HexagonTargetLowering::LowerFormalArguments(), llvm::SystemZTargetLowering::LowerFormalArguments(), llvm::NVPTXTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::SparcTargetLowering::LowerFormalArguments_64(), LowerFP_EXTEND(), LowerFP_TO_SINT(), lowerFP_TO_SINT_STORE(), LowerFSINCOS(), llvm::MSP430TargetLowering::LowerGlobalAddress(), llvm::HexagonTargetLowering::LowerGLOBALADDRESS(), llvm::NVPTXTargetLowering::LowerGlobalAddress(), llvm::SparcTargetLowering::LowerGlobalTLSAddress(), lowerGR128Binary(), LowerHorizontalByteSum(), LowerINSERT_SUBVECTOR(), llvm::HexagonTargetLowering::LowerINSERT_VECTOR(), LowerInterruptReturn(), LowerINTRINSIC_W_CHAIN(), LowerINTRINSIC_WO_CHAIN(), llvm::AMDGPUTargetLowering::LowerIntrinsicIABS(), llvm::AMDGPUTargetLowering::LowerIntrinsicLRP(), LowerIntVSETCC_AVX512(), llvm::MSP430TargetLowering::LowerJumpTable(), LowerLabelRef(), llvm::AMDGPUTargetLowering::LowerLOAD(), llvm::HexagonTargetLowering::LowerLOAD(), llvm::MipsTargetLowering::lowerLOAD(), LowerLOAD_SUB(), LowerMemOpCallTo(), LowerMGATHER(), lowerMSABinaryBitImmIntr(), lowerMSABitClear(), lowerMSABitClearImm(), lowerMSACopyIntr(), lowerMSALoadIntr(), lowerMSASplatZExt(), lowerMSAStoreIntr(), LowerMSCATTER(), LowerMUL(), LowerMUL_LOHI(), lowerMUL_LOHI32(), llvm::R600TargetLowering::LowerOperation(), llvm::SystemZTargetLowering::LowerOperation(), LowerPREFETCH(), llvm::AMDGPUTargetLowering::LowerReturn(), llvm::HexagonTargetLowering::LowerReturn(), llvm::SystemZTargetLowering::LowerReturn(), llvm::NVPTXTargetLowering::LowerReturn(), llvm::SparcTargetLowering::LowerReturn_32(), llvm::SparcTargetLowering::LowerReturn_64(), llvm::MSP430TargetLowering::LowerRETURNADDR(), llvm::HexagonTargetLowering::LowerRETURNADDR(), LowerRETURNADDR(), LowerReverse_VECTOR_SHUFFLEv16i8_v8i16(), LowerSCALAR_TO_VECTOR(), LowerScalarImmediateShift(), LowerScalarVariableShift(), LowerSDIV(), LowerSDIV_v4i16(), LowerSDIV_v4i8(), llvm::AMDGPUTargetLowering::LowerSDIVREM(), LowerSEHRESTOREFRAME(), llvm::MSP430TargetLowering::LowerSELECT_CC(), LowerSELECT_CC(), llvm::MSP430TargetLowering::LowerSETCC(), llvm::HexagonTargetLowering::LowerSETCC(), LowerShift(), LowerShiftParts(), llvm::MSP430TargetLowering::LowerShifts(), llvm::MSP430TargetLowering::LowerSIGN_EXTEND(), LowerSIGN_EXTEND(), LowerSIGN_EXTEND_AVX512(), LowerSIGN_EXTEND_VECTOR_INREG(), LowerSINT_TO_FP(), llvm::SelectionDAGBuilder::LowerStatepoint(), llvm::AMDGPUTargetLowering::LowerSTORE(), LowerSUB(), LowerToAddSub(), LowerToHorizontalOp(), LowerToTLSExecModel(), LowerToTLSGeneralDynamicModel32(), LowerToTLSLocalDynamicModel(), LowerUDIV(), llvm::AMDGPUTargetLowering::LowerUDIVREM(), llvm::AMDGPUTargetLowering::LowerUDIVREM64(), lowerUINT_TO_FP_vXi32(), LowerUMULO_SMULO(), lowerV16F32VectorShuffle(), lowerV16I16VectorShuffle(), lowerV16I32VectorShuffle(), lowerV16I8VectorShuffle(), lowerV2F64VectorShuffle(), lowerV2I64VectorShuffle(), lowerV2X128VectorShuffle(), lowerV32I8VectorShuffle(), lowerV4F32VectorShuffle(), lowerV4F64VectorShuffle(), lowerV4I32VectorShuffle(), lowerV4I64VectorShuffle(), lowerV8F32VectorShuffle(), lowerV8F64VectorShuffle(), lowerV8I16GeneralSingleInputVectorShuffle(), lowerV8I16VectorShuffle(), lowerV8I32VectorShuffle(), lowerV8I64VectorShuffle(), LowerVAARG(), LowerVASTART(), LowerVECTOR_SHIFT(), LowerVECTOR_SHUFFLE(), lowerVECTOR_SHUFFLE_ILVEV(), lowerVECTOR_SHUFFLE_ILVL(), lowerVECTOR_SHUFFLE_ILVOD(), lowerVECTOR_SHUFFLE_ILVR(), lowerVECTOR_SHUFFLE_PCKEV(), lowerVECTOR_SHUFFLE_PCKOD(), lowerVECTOR_SHUFFLE_SHF(), lowerVECTOR_SHUFFLE_VSHF(), LowerVECTOR_SHUFFLEv8i8(), LowerVectorAllZeroTest(), LowerVectorBroadcast(), LowerVectorCTPOP(), LowerVectorCTPOPBitmath(), LowerVectorCTPOPInRegLUT(), LowerVectorFP_TO_INT(), LowerVectorINT_TO_FP(), lowerVectorSETCC(), lowerVectorShuffleAsBitBlend(), lowerVectorShuffleAsBitMask(), lowerVectorShuffleAsBlend(), lowerVectorShuffleAsBroadcast(), lowerVectorShuffleAsByteRotate(), lowerVectorShuffleAsElementInsertion(), lowerVectorShuffleAsInsertPS(), lowerVectorShuffleAsLanePermuteAndBlend(), lowerVectorShuffleAsPSHUFB(), lowerVectorShuffleAsShift(), lowerVectorShuffleAsSpecificZeroOrAnyExtend(), lowerVectorShuffleAsUnpack(), lowerVectorShuffleAsZeroOrAnyExtend(), lowerVectorShuffleWithSHUFPD(), lowerVectorShuffleWithSHUFPS(), lowerVectorShuffleWithSSE4A(), llvm::HexagonTargetLowering::LowerVSELECT(), LowerVSETCC(), LowerWRITE_REGISTER(), LowerXALUO(), LowerXOR(), LowerZERO_EXTEND_AVX512(), llvm::SparcTargetLowering::makeAddress(), llvm::SparcTargetLowering::makeHiLoPair(), MaterializeSETB(), MoveBelowOrigChain(), NarrowVectorLoadToElement(), NormalizeBuildVector(), OptimizeConditionalInDecrement(), partitionShuffleOfConcats(), PerformADCCombine(), performADDCombine(), PerformAddCombine(), PerformADDCombineWithOperands(), performAddSubLongCombine(), performANDCombine(), PerformANDCombine(), PerformAndCombine(), PerformARMBUILD_VECTORCombine(), PerformBFICombine(), performBitcastCombine(), PerformBITCASTCombine(), PerformBLENDICombine(), performBRCONDCombine(), PerformBrCondCombine(), PerformBUILD_VECTORCombine(), llvm::ARMTargetLowering::PerformCMOVCombine(), PerformCMOVCombine(), performCMovFPCombine(), performConcatVectorsCombine(), performCONDCombine(), llvm::R600TargetLowering::PerformDAGCombine(), llvm::SITargetLowering::PerformDAGCombine(), llvm::AMDGPUTargetLowering::PerformDAGCombine(), llvm::SystemZTargetLowering::PerformDAGCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), performDivRemCombine(), performDSPShiftCombine(), performExtendCombine(), PerformExtendCombine(), PerformEXTRACT_VECTOR_ELTCombine(), PerformFADDCombine(), PerformFMACombine(), PerformFMinFMaxCombine(), PerformFSUBCombine(), PerformInsertEltCombine(), PerformINSERTPSCombine(), performIntegerAbsCombine(), PerformINTRINSIC_WO_CHAINCombine(), performIntrinsicCombine(), PerformIntrinsicCombine(), performIntToFpCombine(), PerformISDSETCCCombine(), PerformLOADCombine(), PerformMLOADCombine(), PerformMSTORECombine(), performMulCombine(), PerformMULCombine(), PerformMulCombine(), performORCombine(), PerformORCombine(), PerformOrCombine(), PerformSELECT_CCCombine(), performSelectCCCombine(), performSELECTCombine(), performSelectCombine(), PerformSELECTCombine(), performSetccAddFolding(), performSETCCCombine(), PerformSETCCCombine(), PerformSExtCombine(), PerformShiftCombine(), PerformSHLCombine(), PerformShuffleCombine(), PerformShuffleCombine256(), PerformSIGN_EXTEND_INREGCombine(), PerformSINT_TO_FPCombine(), performSRACombine(), performSTORECombine(), PerformSTORECombine(), PerformSubCombine(), PerformTargetShuffleCombine(), PerformUINT_TO_FPCombine(), PerformVCVTCombine(), PerformVDIVCombine(), PerformVDUPLANECombine(), PerformVECTOR_SHUFFLECombine(), performVectorCompareAndMaskUnaryOpCombine(), PerformVMOVDRRCombine(), PerformVMULCombine(), performVSELECTCombine(), performVSelectCombine(), PerformVZEXT_MOVLCombine(), performVZEXTCombine(), performXORCombine(), PerformZExtCombine(), PrepareCall(), PrepareTailCall(), llvm::SystemZTargetLowering::prepareVolatileOrAtomicLoad(), llvm::AArch64TargetLowering::ReconstructShuffle(), recoverFramePointer(), ReorganizeVector(), ReplaceAllUsesWith(), ReplaceBITCASTResults(), replaceInChain(), ReplaceINTRINSIC_W_CHAIN(), ReplaceLoadVector(), llvm::PPCTargetLowering::ReplaceNodeResults(), llvm::X86TargetLowering::ReplaceNodeResults(), ReplaceREADCYCLECOUNTER(), replaceSplatVectorStore(), llvm::AMDGPUTargetLowering::ScalarizeVectorLoad(), llvm::AMDGPUTargetLowering::ScalarizeVectorStore(), selectMADD(), selectMSUB(), ShrinkLoadReplaceStoreWithStore(), llvm::TargetLowering::SimplifySetCC(), simplifyShuffleOperandRecursively(), skipExtensionForVectorMULL(), SkipExtensionForVMULL(), llvm::TargetLowering::softenSetCCOperands(), splitAndLowerVectorShuffle(), SplitVector(), llvm::AMDGPUTargetLowering::SplitVectorLoad(), llvm::AMDGPUTargetLowering::SplitVectorStore(), SplitVSETCC(), tryBuildVectorReplicate(), tryBuildVectorShuffle(), tryCombineCRC32(), tryCombineFixedPointConvert(), tryCombineLongOpWithDup(), tryCombineShiftImm(), tryCombineToBSL(), tryCombineToEXTR(), tryExtendDUPToExtractHigh(), tryFormConcatFromShuffle(), tryLowerToSLI(), TryMULWIDECombine(), tryToFoldExtendOfConstant(), UnpackFromArgumentSlot(), UnrollVectorOp(), llvm::SelectionDAGBuilder::visitBitTestCase(), llvm::SelectionDAGBuilder::visitBitTestHeader(), llvm::SelectionDAGBuilder::visitJumpTable(), llvm::SelectionDAGBuilder::visitJumpTableHeader(), llvm::SelectionDAGBuilder::visitSPDescriptorParent(), llvm::SelectionDAGBuilder::visitSwitchCase(), WidenMaskArithmetic(), WidenVector(), and XFormVExtractWithShuffleIntoLoad().
Definition at line 5319 of file SelectionDAG.cpp.
References AddNodeIDNode(), llvm::ISD::BR_CC, llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), getNode(), getValueType(), getVTList(), llvm::MVT::Glue, llvm::IP, N, llvm::ISD::SELECT_CC, and llvm::ArrayRef< T >::size().
| SDValue SelectionDAG::getNode | ( | unsigned | Opcode, |
| SDLoc | DL, | ||
| ArrayRef< EVT > | ResultTys, | ||
| ArrayRef< SDValue > | Ops | ||
| ) |
Definition at line 5374 of file SelectionDAG.cpp.
References getNode(), and getVTList().
Definition at line 5379 of file SelectionDAG.cpp.
References AddNodeIDNode(), llvm::ISD::AND, llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), getNode(), llvm::SDValue::getOperand(), llvm::EVT::getScalarType(), llvm::EVT::getSizeInBits(), llvm::MVT::Glue, llvm::MVT::i1, llvm::IP, N, llvm::SDVTList::NumVTs, llvm::ISD::SHL_PARTS, llvm::ISD::SIGN_EXTEND_INREG, llvm::ArrayRef< T >::size(), llvm::ISD::SRA_PARTS, llvm::ISD::SRL_PARTS, and llvm::SDVTList::VTs.
getNode - Gets or creates the specified node.
Definition at line 2803 of file SelectionDAG.cpp.
References AddNodeIDNode(), llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), getVTList(), llvm::IP, and llvm::None.
Definition at line 2818 of file SelectionDAG.cpp.
References AddNodeIDNode(), llvm::ISD::ANY_EXTEND, llvm::lltok::APFloat, llvm::ISD::BITCAST, llvm::APFloat::bitcastToAPInt(), llvm::EVT::bitsGT(), llvm::EVT::bitsLE(), llvm::EVT::bitsLT(), llvm::ISD::BSWAP, llvm::ISD::BUILD_VECTOR, llvm::APInt::byteSwap(), llvm::C, llvm::APFloat::changeSign(), llvm::APFloat::clearSign(), llvm::ISD::CONCAT_VECTORS, llvm::ISD::Constant, llvm::ISD::ConstantFP, llvm::APFloat::convert(), llvm::APFloat::convertFromAPInt(), llvm::APFloat::convertToInteger(), llvm::APInt::countLeadingZeros(), llvm::APInt::countPopulation(), llvm::APInt::countTrailingZeros(), llvm::ISD::CTLZ, llvm::ISD::CTLZ_ZERO_UNDEF, llvm::ISD::CTPOP, llvm::ISD::CTTZ, llvm::ISD::CTTZ_ZERO_UNDEF, llvm::DL, EVTToAPFloatSemantics(), llvm::ISD::EXTRACT_VECTOR_ELT, llvm::MVT::f16, llvm::MVT::f32, llvm::MVT::f64, llvm::ISD::FABS, llvm::ISD::FCEIL, llvm::ISD::FFLOOR, llvm::ISD::FNEG, llvm::ISD::FP_EXTEND, llvm::ISD::FP_ROUND, llvm::ISD::FP_TO_SINT, llvm::ISD::FP_TO_UINT, llvm::ISD::FSUB, llvm::ISD::FTRUNC, getConstant(), getConstantFP(), llvm::SDValue::getConstantOperandVal(), getContext(), llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), llvm::SDValue::getNode(), getNode(), llvm::APInt::getNullValue(), llvm::SDValue::getOpcode(), llvm::SDNode::getOpcode(), llvm::SDValue::getOperand(), llvm::SDNode::getOperand(), llvm::EVT::getScalarSizeInBits(), llvm::EVT::getScalarType(), llvm::EVT::getSizeInBits(), getTarget(), llvm::TargetLoweringBase::getTypeToTransformTo(), getUNDEF(), llvm::SDValue::getValueType(), llvm::EVT::getVectorElementType(), llvm::EVT::getVectorNumElements(), getVTList(), llvm::APInt::getZExtValue(), llvm::MVT::Glue, llvm::MVT::i16, llvm::MVT::i32, llvm::MVT::i64, llvm::APFloat::IEEEdouble, llvm::APFloat::IEEEhalf, llvm::APFloat::IEEEsingle, llvm::integerPartWidth, llvm::IP, llvm::EVT::isFloatingPoint(), llvm::EVT::isInteger(), llvm::EVT::isVector(), llvm_unreachable, llvm::ISD::MERGE_VALUES, N, llvm::APFloat::opInexact, llvm::APFloat::opInvalidOp, llvm::APFloat::opOK, llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back(), llvm::APFloat::rmNearestTiesToEven, llvm::APFloat::rmTowardNegative, llvm::APFloat::rmTowardPositive, llvm::APFloat::rmTowardZero, llvm::APFloat::roundToIntegral(), llvm::ISD::SCALAR_TO_VECTOR, llvm::APInt::sextOrTrunc(), llvm::ISD::SIGN_EXTEND, llvm::ISD::SINT_TO_FP, llvm::SmallVectorTemplateCommon< T >::size(), llvm::ISD::TokenFactor, llvm::ISD::TRUNCATE, llvm::ISD::UINT_TO_FP, llvm::ISD::UNDEF, llvm::ISD::ZERO_EXTEND, and llvm::APInt::zextOrTrunc().
| SDValue SelectionDAG::getNode | ( | unsigned | Opcode, |
| SDLoc | DL, | ||
| EVT | VT, | ||
| SDValue | N1, | ||
| SDValue | N2, | ||
| const SDNodeFlags * | Flags = nullptr |
||
| ) |
Definition at line 3287 of file SelectionDAG.cpp.
References llvm::ISD::ADD, llvm::APFloat::add(), llvm::ISD::ADDC, llvm::ISD::ADDE, AddNodeIDFlags(), AddNodeIDNode(), llvm::ISD::AND, llvm::SmallVectorImpl< T >::append(), llvm::ISD::AssertSext, llvm::ISD::AssertZext, llvm::EVT::bitsGT(), llvm::EVT::bitsLE(), llvm::EVT::bitsLT(), llvm::ISD::BUILD_PAIR, llvm::ISD::BUILD_VECTOR, llvm::C, llvm::ISD::CONCAT_VECTORS, llvm::APFloat::convert(), llvm::APFloat::copySign(), llvm::APFloat::divide(), llvm::DL, llvm::dyn_cast(), llvm::ISD::EntryToken, EVTToAPFloatSemantics(), llvm::ISD::EXTRACT_ELEMENT, llvm::ISD::EXTRACT_SUBVECTOR, llvm::ISD::EXTRACT_VECTOR_ELT, llvm::ISD::FADD, llvm::ISD::FCOPYSIGN, llvm::ISD::FDIV, llvm::ISD::FMUL, FoldConstantArithmetic(), llvm::ISD::FP_ROUND, llvm::ISD::FP_ROUND_INREG, llvm::ISD::FREM, llvm::ISD::FSUB, llvm::APInt::getAllOnesValue(), getAnyExtOrTrunc(), llvm::ConstantSDNode::getAPIntValue(), getConstant(), getConstantFP(), llvm::SDLoc::getDebugLoc(), llvm::SDValue::getNode(), getNode(), llvm::SDValue::getNumOperands(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::EVT::getScalarType(), getSExtOrTrunc(), llvm::SDValue::getSimpleValueType(), llvm::EVT::getSimpleVT(), llvm::EVT::getSizeInBits(), getTarget(), getUNDEF(), llvm::ConstantFPSDNode::getValueAPF(), llvm::SDValue::getValueType(), llvm::EVT::getVectorElementType(), llvm::EVT::getVectorNumElements(), getVTList(), getZExtOrTrunc(), llvm::ConstantSDNode::getZExtValue(), llvm::MVT::Glue, llvm::TargetLoweringBase::hasFloatingPointExceptions(), llvm::MVT::i1, llvm::ISD::INSERT_VECTOR_ELT, llvm::IP, llvm::ISD::isBuildVectorOfConstantSDNodes(), isCommutativeBinOp(), llvm::ConstantFPSDNode::isExactlyValue(), llvm::EVT::isFloatingPoint(), llvm::EVT::isInteger(), llvm::EVT::isSimple(), llvm::EVT::isVector(), llvm::ConstantFPSDNode::isZero(), llvm::TargetLoweringBase::isZExtFree(), llvm::Log2_32_Ceil(), llvm::APFloat::mod(), llvm::ISD::MUL, llvm::ISD::MULHS, llvm::ISD::MULHU, llvm::APFloat::multiply(), N, llvm::SDNode::op_begin(), llvm::SDNode::op_end(), llvm::APFloat::opDivByZero, llvm::APFloat::opInvalidOp, llvm::TargetMachine::Options, llvm::ISD::OR, llvm::MVT::Other, llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back(), llvm::APFloat::rmNearestTiesToEven, llvm::ISD::ROTL, llvm::ISD::ROTR, llvm::ISD::SDIV, llvm::ISD::SHL, llvm::ISD::SIGN_EXTEND_INREG, llvm::SmallVectorTemplateCommon< T >::size(), llvm::ISD::SRA, llvm::ISD::SREM, llvm::ISD::SRL, llvm::ISD::SUB, llvm::APFloat::subtract(), std::swap(), llvm::ISD::TokenFactor, llvm::APInt::trunc(), llvm::ISD::UDIV, llvm::ISD::UNDEF, llvm::TargetOptions::UnsafeFPMath, llvm::ISD::UREM, llvm::NVPTX::PTXLdStInstCode::V2, and llvm::ISD::XOR.
| SDValue SelectionDAG::getNode | ( | unsigned | Opcode, |
| SDLoc | DL, | ||
| EVT | VT, | ||
| SDValue | N1, | ||
| SDValue | N2, | ||
| SDValue | N3 | ||
| ) |
Definition at line 3795 of file SelectionDAG.cpp.
References AddNodeIDNode(), llvm::SmallVectorImpl< T >::append(), llvm::ISD::BITCAST, llvm::ISD::BUILD_VECTOR, llvm::ISD::CONCAT_VECTORS, llvm::dyn_cast(), llvm::ISD::FMA, FoldSetCC(), llvm::APFloat::fusedMultiplyAdd(), getConstantFP(), llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), llvm::SDValue::getNode(), getNode(), llvm::SDValue::getOpcode(), llvm::SDValue::getSimpleValueType(), llvm::EVT::getSimpleVT(), llvm::ConstantFPSDNode::getValueAPF(), llvm::SDValue::getValueType(), llvm::EVT::getVectorNumElements(), getVTList(), llvm::ConstantSDNode::getZExtValue(), llvm::MVT::Glue, llvm::TargetLoweringBase::hasFloatingPointExceptions(), llvm::ISD::INSERT_SUBVECTOR, llvm::IP, llvm::EVT::isSimple(), llvm::EVT::isVector(), llvm_unreachable, N, llvm::SDNode::op_begin(), llvm::SDNode::op_end(), llvm::APFloat::opInvalidOp, llvm::APFloat::rmNearestTiesToEven, llvm::ISD::SELECT, llvm::ISD::SETCC, llvm::NVPTX::PTXLdStInstCode::V2, and llvm::ISD::VECTOR_SHUFFLE.
| SDValue SelectionDAG::getNode | ( | unsigned | Opcode, |
| SDLoc | DL, | ||
| EVT | VT, | ||
| SDValue | N1, | ||
| SDValue | N2, | ||
| SDValue | N3, | ||
| SDValue | N4 | ||
| ) |
Definition at line 3899 of file SelectionDAG.cpp.
References getNode().
| SDValue SelectionDAG::getNode | ( | unsigned | Opcode, |
| SDLoc | DL, | ||
| EVT | VT, | ||
| SDValue | N1, | ||
| SDValue | N2, | ||
| SDValue | N3, | ||
| SDValue | N4, | ||
| SDValue | N5 | ||
| ) |
Definition at line 3906 of file SelectionDAG.cpp.
References getNode().
Definition at line 5454 of file SelectionDAG.cpp.
References getNode(), and llvm::None.
Definition at line 5458 of file SelectionDAG.cpp.
References getNode().
Definition at line 5464 of file SelectionDAG.cpp.
References getNode().
| SDValue SelectionDAG::getNode | ( | unsigned | Opcode, |
| SDLoc | DL, | ||
| SDVTList | VTs, | ||
| SDValue | N1, | ||
| SDValue | N2, | ||
| SDValue | N3 | ||
| ) |
Definition at line 5470 of file SelectionDAG.cpp.
References getNode().
| SDValue SelectionDAG::getNode | ( | unsigned | Opcode, |
| SDLoc | DL, | ||
| SDVTList | VTs, | ||
| SDValue | N1, | ||
| SDValue | N2, | ||
| SDValue | N3, | ||
| SDValue | N4 | ||
| ) |
Definition at line 5476 of file SelectionDAG.cpp.
References getNode().
| SDValue SelectionDAG::getNode | ( | unsigned | Opcode, |
| SDLoc | DL, | ||
| SDVTList | VTs, | ||
| SDValue | N1, | ||
| SDValue | N2, | ||
| SDValue | N3, | ||
| SDValue | N4, | ||
| SDValue | N5 | ||
| ) |
Definition at line 5483 of file SelectionDAG.cpp.
References getNode().
| SDNode * SelectionDAG::getNodeIfExists | ( | unsigned | Opcode, |
| SDVTList | VTList, | ||
| ArrayRef< SDValue > | Ops, | ||
| const SDNodeFlags * | Flags = nullptr |
||
| ) |
Get the specified node if it's already available, or else return NULL.
getNodeIfExists - Get the specified node if it's already available, or else return NULL.
Definition at line 6097 of file SelectionDAG.cpp.
References AddNodeIDFlags(), AddNodeIDNode(), llvm::MVT::Glue, llvm::IP, llvm::SDVTList::NumVTs, and llvm::SDVTList::VTs.
Create a bitwise NOT operation as (XOR Val, -1).
getNOT - Create a bitwise NOT operation as (XOR Val, -1).
Definition at line 1102 of file SelectionDAG.cpp.
References llvm::APInt::getAllOnesValue(), getConstant(), getNode(), llvm::EVT::getScalarType(), llvm::EVT::getSizeInBits(), and llvm::ISD::XOR.
Referenced by lowerMSABitClear(), LowerVSETCC(), PerformISDSETCCCombine(), and llvm::TargetLowering::SimplifySetCC().
Definition at line 1719 of file SelectionDAG.cpp.
References llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), getVTList(), llvm::IP, llvm::None, and llvm::ISD::Register.
Referenced by llvm::RegsForValue::AddInlineAsmOperands(), llvm::SITargetLowering::copyToM0(), createCMovFP(), llvm::AMDGPUTargetLowering::CreateLiveInRegister(), FoldOperand(), llvm::MipsTargetLowering::getAddrGPRel(), getCopyFromReg(), getCopyToReg(), getGatherNode(), llvm::MipsDAGToDAGISel::getGlobalBaseReg(), llvm::MipsTargetLowering::getGlobalReg(), llvm::MipsTargetLowering::getOpndList(), getPrefetchNode(), getScatterNode(), getTOCEntry(), LowerATOMIC_FENCE(), llvm::HexagonTargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), llvm::HexagonTargetLowering::LowerEH_RETURN(), llvm::SparcTargetLowering::LowerGlobalTLSAddress(), LowerMemOpCallTo(), llvm::HexagonTargetLowering::LowerReturn(), llvm::SystemZTargetLowering::LowerReturn(), llvm::SparcTargetLowering::LowerReturn_32(), llvm::SparcTargetLowering::LowerReturn_64(), LowerVASTART(), llvm::PPCTargetLowering::PerformDAGCombine(), performNEONPostLDSTCombine(), performPostLD1Combine(), PrepareCall(), llvm::PPCTargetLowering::SelectAddressRegImm(), llvm::PPCTargetLowering::SelectAddressRegRegOnly(), and llvm::SelectionDAGISel::SelectCodeCommon().
Definition at line 1733 of file SelectionDAG.cpp.
References AddNodeIDNode(), llvm::FoldingSetNodeID::AddPointer(), getVTList(), llvm::IP, llvm::None, llvm::ISD::RegisterMask, and llvm::MVT::Untyped.
Referenced by llvm::MipsTargetLowering::getOpndList(), llvm::SystemZTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), and llvm::SparcTargetLowering::LowerGlobalTLSAddress().
Return the root tag of the SelectionDAG.
Definition at line 335 of file SelectionDAG.h.
Referenced by llvm::DOTGraphTraits< SelectionDAG * >::addCustomGraphFeatures(), llvm::checkForCycles(), llvm::SelectionDAGBuilder::getControlRoot(), llvm::ScheduleDAGSDNodes::getCustomGraphFeatures(), getMemCmpLoad(), llvm::SelectionDAGBuilder::getRoot(), Legalize(), llvm::NVPTXTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), RemoveDeadNode(), RemoveDeadNodes(), ReplaceAllUsesOfValueWith(), ReplaceAllUsesWith(), and llvm::DAGTypeLegalizer::run().
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Helper function to make it easier to build Select's if you just have operands and don't want to check for vector.
Definition at line 739 of file SelectionDAG.h.
References llvm::DL, getNode(), llvm::SDValue::getValueType(), llvm::EVT::isVector(), llvm::ISD::SELECT, and llvm::ISD::VSELECT.
Referenced by performSelectCombine().
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Helper function to make it easier to build SelectCC's if you just have an ISD::CondCode instead of an SDValue.
Definition at line 752 of file SelectionDAG.h.
References getCondCode(), getNode(), llvm::SDValue::getValueType(), and llvm::ISD::SELECT_CC.
Referenced by llvm::TargetLowering::expandFP_TO_SINT(), llvm::AMDGPUTargetLowering::LowerSDIVREM(), llvm::AMDGPUTargetLowering::LowerUDIVREM(), llvm::AMDGPUTargetLowering::LowerUDIVREM64(), and llvm::R600TargetLowering::PerformDAGCombine().
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Definition at line 288 of file SelectionDAG.h.
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Helper function to make it easier to build SetCC's if you just have an ISD::CondCode instead of an SDValue.
Definition at line 726 of file SelectionDAG.h.
References getCondCode(), getNode(), llvm::SDValue::getValueType(), llvm::EVT::isVector(), llvm::ISD::SETCC, and llvm::ISD::SETCC_INVALID.
Referenced by FoldSetCC(), llvm::AMDGPUTargetLowering::LowerDIVREM24(), llvm::AMDGPUTargetLowering::LowerSDIVREM(), LowerUMULO_SMULO(), PerformISDSETCCCombine(), performSELECTCombine(), PerformSELECTCombine(), performVSelectCombine(), llvm::TargetLowering::SimplifySetCC(), llvm::SelectionDAGBuilder::visitBitTestCase(), llvm::SelectionDAGBuilder::visitBitTestHeader(), llvm::SelectionDAGBuilder::visitJumpTableHeader(), llvm::SelectionDAGBuilder::visitSPDescriptorParent(), and llvm::SelectionDAGBuilder::visitSwitchCase().
Convert Op, which must be of integer type, to the integer type VT, by either sign-extending or truncating it.
Definition at line 1037 of file SelectionDAG.cpp.
References llvm::EVT::bitsGT(), getNode(), llvm::SDValue::getValueType(), llvm::ISD::SIGN_EXTEND, and llvm::ISD::TRUNCATE.
Referenced by llvm::TargetLowering::expandFP_TO_SINT(), getNode(), llvm::AMDGPUTargetLowering::LowerDIVREM24(), LowerExtendedLoad(), and LowerVSETCC().
Return the specified value casted to the target's desired shift amount type.
getShiftAmountOperand - Return the specified value casted to the target's desired shift amount type.
Definition at line 1850 of file SelectionDAG.cpp.
References llvm::EVT::bitsGT(), getDataLayout(), getNode(), llvm::TargetLoweringBase::getShiftAmountTy(), llvm::SDValue::getValueType(), llvm::EVT::isVector(), llvm::ISD::TRUNCATE, and llvm::ISD::ZERO_EXTEND.
Referenced by UnrollVectorOp().
Return an operation which will sign extend the low lanes of the operand into the specified vector type.
For example, this can convert a v16i8 into a v4i32 by sign extending the low four lanes of the operand from i8 to i32.
Definition at line 1080 of file SelectionDAG.cpp.
References getNode(), llvm::EVT::getSizeInBits(), llvm::SDValue::getValueType(), llvm::EVT::getVectorNumElements(), llvm::EVT::isVector(), and llvm::ISD::SIGN_EXTEND_VECTOR_INREG.
Referenced by PerformSExtCombine().
Compute the VTs needed for the low/hi parts of a type which is split (or expanded) into two not necessarily identical pieces.
GetSplitDestVTs - Compute the VTs needed for the low/hi parts of a type which is split (or expanded) into two not necessarily identical pieces.
Definition at line 6942 of file SelectionDAG.cpp.
References getContext(), llvm::TargetLoweringBase::getTypeToTransformTo(), llvm::EVT::getVectorElementType(), llvm::EVT::getVectorNumElements(), llvm::EVT::getVectorVT(), and llvm::EVT::isVector().
Referenced by SplitVector(), llvm::AMDGPUTargetLowering::SplitVectorLoad(), llvm::AMDGPUTargetLowering::SplitVectorStore(), and SplitVSETCC().
Construct a node to track a Value* through the backend.
Definition at line 1786 of file SelectionDAG.cpp.
References AddNodeIDNode(), llvm::FoldingSetNodeID::AddPointer(), llvm::Value::getType(), getVTList(), llvm::IP, llvm::Type::isPointerTy(), llvm::None, llvm::MVT::Other, and llvm::ISD::SRCVALUE.
Referenced by llvm::SelectionDAGBuilder::LowerStatepoint().
Compute a TokenFactor to force all the incoming stack arguments to be loaded from the stack.
getStackArgumentTokenFactor - Compute a TokenFactor to force all the incoming stack arguments to be loaded from the stack.
This is used in tail call lowering to protect stack arguments from being clobbered.
Definition at line 3915 of file SelectionDAG.cpp.
References getEntryNode(), getNode(), llvm::MVT::Other, llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back(), and llvm::ISD::TokenFactor.
| SDValue SelectionDAG::getStore | ( | SDValue | Chain, |
| SDLoc | dl, | ||
| SDValue | Val, | ||
| SDValue | Ptr, | ||
| MachinePointerInfo | PtrInfo, | ||
| bool | isVolatile, | ||
| bool | isNonTemporal, | ||
| unsigned | Alignment, | ||
| const AAMDNodes & | AAInfo = AAMDNodes() |
||
| ) |
Helper function to build ISD::STORE nodes.
Definition at line 5041 of file SelectionDAG.cpp.
References getEVTAlignment(), getMachineFunction(), llvm::MachineFunction::getMachineMemOperand(), llvm::EVT::getStoreSize(), llvm::SDValue::getValueType(), InferPointerInfo(), llvm::PointerUnion< PT1, PT2 >::isNull(), llvm::MachineMemOperand::MONonTemporal, llvm::MachineMemOperand::MOStore, llvm::MachineMemOperand::MOVolatile, llvm::MVT::Other, and llvm::MachinePointerInfo::V.
Referenced by EmitTailCallStoreFPAndRetAddr(), EmitTailCallStoreRetAddr(), llvm::ARMSelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForMemset(), ExpandUnalignedLoad(), ExpandUnalignedStore(), getMemcpyLoadsAndStores(), getMemmoveLoadsAndStores(), getMemsetStores(), getReadTimeStampCounter(), getTruncStore(), llvm::HexagonTargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), llvm::HexagonTargetLowering::LowerEH_RETURN(), llvm::SparcTargetLowering::LowerF128_LibCallArg(), LowerF128Store(), llvm::SystemZTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::SparcTargetLowering::LowerFormalArguments_64(), lowerFP_TO_SINT_STORE(), LowerINTRINSIC_W_CHAIN(), LowerMemOpCallTo(), lowerMSAStoreIntr(), LowerVAARG(), llvm::MSP430TargetLowering::LowerVASTART(), llvm::HexagonTargetLowering::LowerVASTART(), LowerVASTART(), memsetStore(), PerformEXTRACT_VECTOR_ELTCombine(), performSTORECombine(), PerformSTORECombine(), replaceSplatVectorStore(), ShrinkLoadReplaceStoreWithStore(), spillIncomingStatepointValue(), llvm::AMDGPUTargetLowering::SplitVectorLoad(), and StoreTailCallArgumentsToStackSlot().
| SDValue SelectionDAG::getStore | ( | SDValue | Chain, |
| SDLoc | dl, | ||
| SDValue | Val, | ||
| SDValue | Ptr, | ||
| MachineMemOperand * | MMO | ||
| ) |
Definition at line 5068 of file SelectionDAG.cpp.
References llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), encodeMemSDNodeFlags(), llvm::MachinePointerInfo::getAddrSpace(), llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), llvm::MachineMemOperand::getPointerInfo(), getUNDEF(), llvm::SDValue::getValueType(), getVTList(), llvm::IP, llvm::MachineMemOperand::isInvariant(), llvm::MachineMemOperand::isNonTemporal(), llvm::MachineMemOperand::isVolatile(), llvm::MVT::Other, llvm::ISD::STORE, llvm::RegState::Undef, and llvm::ISD::UNINDEXED.
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Definition at line 286 of file SelectionDAG.h.
References llvm::MachineFunction::getSubtarget().
Referenced by llvm::XCoreSelectionDAGInfo::EmitTargetCodeForMemcpy(), FoldOperand(), llvm::SDNode::getOperationName(), getTargetVShiftNode(), init(), Insert128BitVector(), and llvm::PPC::isVPKUDUMShuffleMask().
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Definition at line 285 of file SelectionDAG.h.
References llvm::SystemZISD::TM.
Referenced by GetNegatedExpression(), getNode(), llvm::SDNode::getOperationName(), isKnownNeverNaN(), llvm::X86TargetLowering::LowerAsmOperandForConstraint(), llvm::SelectionDAGBuilder::LowerCallTo(), PerformFMinFMaxCombine(), PerformSELECT_CCCombine(), performSelectCCCombine(), PerformSELECTCombine(), and PrepareCall().
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Definition at line 516 of file SelectionDAG.h.
References getBlockAddress().
Referenced by llvm::MSP430TargetLowering::LowerBlockAddress(), llvm::HexagonTargetLowering::LowerBlockAddress(), and llvm::SparcTargetLowering::withTargetFlags().
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Definition at line 436 of file SelectionDAG.h.
References getConstant().
Referenced by llvm::RegsForValue::AddInlineAsmOperands(), addStackMapLiveVars(), llvm::SITargetLowering::buildRSRC(), buildSMovImm32(), FoldOperand(), llvm::PPC::get_VSPLTI_elt(), getAL(), getAtomicLoadArithTargetConstant(), getCopyFromParts(), getGatherNode(), getIntOperandsFromRegisterString(), getLeftShift(), getPrefetchNode(), getScatterNode(), getTargetExtractSubreg(), getTargetInsertSubreg(), getVAArg(), getZeroVector(), isNEONModifiedImm(), llvm::SparcTargetLowering::LowerAsmOperandForConstraint(), llvm::ARMTargetLowering::LowerAsmOperandForConstraint(), llvm::SystemZTargetLowering::LowerAsmOperandForConstraint(), llvm::PPCTargetLowering::LowerAsmOperandForConstraint(), llvm::X86TargetLowering::LowerAsmOperandForConstraint(), llvm::TargetLowering::LowerAsmOperandForConstraint(), LowerATOMIC_FENCE(), LowerBITCAST(), llvm::SparcTargetLowering::LowerCall_32(), LowerCMP_SWAP(), llvm::HexagonTargetLowering::LowerCTPOP(), LowerCTTZ(), llvm::SparcTargetLowering::LowerF128Compare(), LowerF128Load(), LowerF128Store(), LowerINTRINSIC_WO_CHAIN(), llvm::AMDGPUTargetLowering::LowerLOAD(), llvm::R600TargetLowering::LowerOperation(), llvm::SelectionDAGBuilder::LowerStatepoint(), llvm::AMDGPUTargetLowering::LowerSTORE(), lowerVECTOR_SHUFFLE_VSHF(), narrowIfNeeded(), performBitcastCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), pushStackMapConstant(), ReplaceBITCASTResults(), llvm::PPCTargetLowering::SelectAddressRegImm(), llvm::SelectionDAGISel::SelectCodeCommon(), llvm::SelectionDAGISel::SelectInlineAsmMemoryOperands(), SelectInt64(), SelectInt64Direct(), Widen(), and llvm::SITargetLowering::wrapAddr64Rsrc().
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Definition at line 440 of file SelectionDAG.h.
References getConstant().
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Definition at line 444 of file SelectionDAG.h.
References getConstant().
Definition at line 455 of file SelectionDAG.h.
References getConstantFP().
Definition at line 458 of file SelectionDAG.h.
References getConstantFP().
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Definition at line 461 of file SelectionDAG.h.
References getConstantFP().
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Definition at line 484 of file SelectionDAG.h.
References Align(), and getConstantPool().
Referenced by llvm::HexagonTargetLowering::LowerConstantPool(), LowerConstantPool(), and llvm::SparcTargetLowering::withTargetFlags().
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Definition at line 492 of file SelectionDAG.h.
References Align(), and getConstantPool().
| SDValue SelectionDAG::getTargetExternalSymbol | ( | const char * | Sym, |
| EVT | VT, | ||
| unsigned char | TargetFlags = 0 |
||
| ) |
Definition at line 1484 of file SelectionDAG.cpp.
Referenced by llvm::HexagonTargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::NVPTXTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), llvm::MSP430TargetLowering::LowerExternalSymbol(), llvm::SparcTargetLowering::LowerGlobalTLSAddress(), PrepareCall(), and llvm::SparcTargetLowering::withTargetFlags().
A convenience function for creating TargetInstrInfo::EXTRACT_SUBREG nodes.
getTargetExtractSubreg - A convenience function for creating TargetOpcode::EXTRACT_SUBREG nodes.
Definition at line 6076 of file SelectionDAG.cpp.
References llvm::TargetOpcode::EXTRACT_SUBREG, getMachineNode(), getTargetConstant(), and llvm::MVT::i32.
Referenced by llvm::SITargetLowering::buildRSRC(), getAtomicLoadArithTargetConstant(), llvm::HexagonTargetLowering::LowerBUILD_VECTOR(), llvm::HexagonTargetLowering::LowerEXTRACT_VECTOR(), LowerF64Op(), LowerFNEGorFABS(), lowerGR128Binary(), llvm::R600TargetLowering::LowerOperation(), and NarrowVector().
Definition at line 473 of file SelectionDAG.h.
References getFrameIndex().
Referenced by addStackMapLiveVars(), lowerIncomingStatepointValue(), lowerStatepointMetaArgs(), reservePreviousStackSlotForValue(), llvm::PPCTargetLowering::SelectAddressRegImm(), and spillIncomingStatepointValue().
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Definition at line 467 of file SelectionDAG.h.
References getGlobalAddress().
Referenced by GetTLSADDR(), llvm::X86TargetLowering::LowerAsmOperandForConstraint(), llvm::TargetLowering::LowerAsmOperandForConstraint(), llvm::HexagonTargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), llvm::MSP430TargetLowering::LowerGlobalAddress(), llvm::HexagonTargetLowering::LowerGLOBALADDRESS(), llvm::NVPTXTargetLowering::LowerGlobalAddress(), LowerToTLSExecModel(), LowerToTLSLocalDynamicModel(), PrepareCall(), and llvm::SparcTargetLowering::withTargetFlags().
| SDValue SelectionDAG::getTargetIndex | ( | int | Index, |
| EVT | VT, | ||
| int64_t | Offset = 0, |
||
| unsigned char | TargetFlags = 0 |
||
| ) |
Definition at line 1421 of file SelectionDAG.cpp.
References llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), getVTList(), llvm::IP, llvm::None, and llvm::ISD::TargetIndex.
| SDValue SelectionDAG::getTargetInsertSubreg | ( | int | SRIdx, |
| SDLoc | DL, | ||
| EVT | VT, | ||
| SDValue | Operand, | ||
| SDValue | Subreg | ||
| ) |
A convenience function for creating TargetInstrInfo::INSERT_SUBREG nodes.
getTargetInsertSubreg - A convenience function for creating TargetOpcode::INSERT_SUBREG nodes.
Definition at line 6087 of file SelectionDAG.cpp.
References getMachineNode(), getTargetConstant(), llvm::MVT::i32, and llvm::TargetOpcode::INSERT_SUBREG.
Referenced by LowerF64Op(), and LowerFNEGorFABS().
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Definition at line 478 of file SelectionDAG.h.
References getJumpTable().
Referenced by llvm::HexagonTargetLowering::LowerBR_JT(), and llvm::MSP430TargetLowering::LowerJumpTable().
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Definition at line 287 of file SelectionDAG.h.
Referenced by AddCombineToVPADDL(), llvm::RegsForValue::AddInlineAsmOperands(), addStackMapLiveVars(), buildFromShuffleMostly(), BuildVectorFromScalar(), combineConcatVectorOfScalars(), llvm::SelectionDAGBuilder::CopyValueToVirtualRegister(), EltsFromConsecutiveLoads(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemset(), ExpandBITCAST(), getCopyFromParts(), getCopyFromPartsVector(), llvm::SelectionDAGBuilder::getCopyFromRegs(), llvm::RegsForValue::getCopyFromRegs(), getCopyToParts(), getCopyToPartsVector(), llvm::RegsForValue::getCopyToRegs(), getLimitedPrecisionExp2(), getMemcpyLoadsAndStores(), getMemmoveLoadsAndStores(), getMemsetStores(), GetNegatedExpression(), llvm::SDNode::getOperationName(), getUniformBase(), llvm::SelectionDAGBuilder::getValueImpl(), isBLACompatibleAddress(), isConsecutiveLSLoc(), LowerADDC_ADDE_SUBC_SUBE(), LowerATOMIC_STORE(), lowerCallFromStatepoint(), LowerExtendedLoad(), LowerFABSorFNEG(), LowerFCOPYSIGN(), LowerFSINCOS(), LowerMemOpCallTo(), LowerMUL_LOHI(), LowerSEHRESTOREFRAME(), LowerVASTART(), LowerVectorBroadcast(), lowerVectorShuffle(), lowerVectorShuffleAsElementInsertion(), lowerVectorShuffleAsShift(), LowerXALUO(), llvm::ScheduleDAGSDNodes::newSUnit(), PerformADDCombineWithOperands(), PerformANDCombine(), PerformARMBUILD_VECTORCombine(), PerformBTCombine(), llvm::SITargetLowering::PerformDAGCombine(), llvm::AMDGPUTargetLowering::PerformDAGCombine(), performExtendCombine(), PerformExtendCombine(), PerformEXTRACT_VECTOR_ELTCombine(), PerformFMACombine(), PerformLOADCombine(), PerformMLOADCombine(), PerformMSTORECombine(), performORCombine(), PerformORCombine(), performSelectCombine(), PerformSELECTCombine(), PerformShiftCombine(), PerformShuffleCombine(), PerformSTORECombine(), PerformUINT_TO_FPCombine(), PerformVECTOR_SHUFFLECombine(), PerformXORCombine(), PrepareCall(), recoverFramePointer(), llvm::X86TargetLowering::ReplaceNodeResults(), simplifyI24(), transformVSELECTtoBlendVECTOR_SHUFFLE(), llvm::SelectionDAGBuilder::visitBitTestCase(), llvm::SelectionDAGBuilder::visitBitTestHeader(), llvm::SelectionDAGBuilder::visitJumpTable(), llvm::SelectionDAGBuilder::visitJumpTableHeader(), llvm::SelectionDAGBuilder::visitSPDescriptorFailure(), llvm::SelectionDAGBuilder::visitSPDescriptorParent(), WidenMaskArithmetic(), and XFormVExtractWithShuffleIntoLoad().
| SDValue SelectionDAG::getTruncStore | ( | SDValue | Chain, |
| SDLoc | dl, | ||
| SDValue | Val, | ||
| SDValue | Ptr, | ||
| MachinePointerInfo | PtrInfo, | ||
| EVT | TVT, | ||
| bool | isNonTemporal, | ||
| bool | isVolatile, | ||
| unsigned | Alignment, | ||
| const AAMDNodes & | AAInfo = AAMDNodes() |
||
| ) |
Definition at line 5095 of file SelectionDAG.cpp.
References getEVTAlignment(), getMachineFunction(), llvm::MachineFunction::getMachineMemOperand(), llvm::EVT::getStoreSize(), llvm::SDValue::getValueType(), InferPointerInfo(), llvm::PointerUnion< PT1, PT2 >::isNull(), llvm::MachineMemOperand::MONonTemporal, llvm::MachineMemOperand::MOStore, llvm::MachineMemOperand::MOVolatile, llvm::MVT::Other, and llvm::MachinePointerInfo::V.
Referenced by ExpandUnalignedLoad(), ExpandUnalignedStore(), getMemcpyLoadsAndStores(), llvm::SystemZTargetLowering::PerformDAGCombine(), llvm::AMDGPUTargetLowering::ScalarizeVectorStore(), llvm::AMDGPUTargetLowering::SplitVectorLoad(), and llvm::AMDGPUTargetLowering::SplitVectorStore().
| SDValue SelectionDAG::getTruncStore | ( | SDValue | Chain, |
| SDLoc | dl, | ||
| SDValue | Val, | ||
| SDValue | Ptr, | ||
| EVT | TVT, | ||
| MachineMemOperand * | MMO | ||
| ) |
Definition at line 5122 of file SelectionDAG.cpp.
References llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), llvm::EVT::bitsLT(), encodeMemSDNodeFlags(), llvm::MachinePointerInfo::getAddrSpace(), llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), llvm::MachineMemOperand::getPointerInfo(), llvm::EVT::getRawBits(), llvm::EVT::getScalarType(), getStore(), getUNDEF(), llvm::SDValue::getValueType(), llvm::EVT::getVectorNumElements(), getVTList(), llvm::IP, llvm::EVT::isInteger(), llvm::MachineMemOperand::isInvariant(), llvm::MachineMemOperand::isNonTemporal(), llvm::EVT::isVector(), llvm::MachineMemOperand::isVolatile(), llvm::MVT::Other, llvm::ISD::STORE, llvm::RegState::Undef, and llvm::ISD::UNINDEXED.
Return an UNDEF node. UNDEF does not have a useful SDLoc.
Definition at line 659 of file SelectionDAG.h.
References getNode(), and llvm::ISD::UNDEF.
Referenced by buildFromShuffleMostly(), buildMergeScalars(), buildScalarToVector(), buildVector(), CompactSwizzlableVector(), Concat128BitVectors(), Concat256BitVectors(), convertLocVTToValVT(), ExpandBVWithShuffles(), ExpandHorizontalBinOp(), expandV4F32ToV2F64(), ExtractSubVector(), FoldSetCC(), getCopyFromPartsVector(), getCopyToPartsVector(), getExtLoad(), getGeneralPermuteNode(), getLoad(), getNode(), getShuffleScalarElt(), getShuffleVectorZeroOrUndef(), getStore(), getTargetVShiftNode(), getTruncStore(), llvm::SelectionDAGBuilder::getValueImpl(), getVectorShuffle(), Insert128BitVector(), isHorizontalBinOp(), joinDwords(), LowerAsSplatVectorLoad(), LowerAVXExtend(), LowerBITCAST(), LowerBuildVectorv16i8(), LowerBuildVectorv8i16(), llvm::NVPTXTargetLowering::LowerCall(), LowerCONCAT_VECTORS(), LowerCONCAT_VECTORSvXi1(), LowerExtendedLoad(), llvm::R600TargetLowering::LowerFormalArguments(), llvm::SITargetLowering::LowerFormalArguments(), LowerFP_EXTEND(), LowerINSERT_SUBVECTOR(), LowerINTRINSIC_W_CHAIN(), LowerINTRINSIC_WO_CHAIN(), llvm::MipsTargetLowering::lowerLOAD(), llvm::NVPTXTargetLowering::LowerReturn(), LowerSCALAR_TO_VECTOR(), LowerShift(), LowerSIGN_EXTEND(), LowerSIGN_EXTEND_VECTOR_INREG(), LowerToAddSub(), lowerV16I16VectorShuffle(), lowerV16I8VectorShuffle(), lowerV2X128VectorShuffle(), lowerV32I8VectorShuffle(), lowerV8F32VectorShuffle(), lowerV8I32VectorShuffle(), LowerVECTOR_SHUFFLE(), lowerVectorShuffle(), lowerVectorShuffleAsBlend(), lowerVectorShuffleAsBlendAndPermute(), lowerVectorShuffleAsDecomposedShuffleBlend(), lowerVectorShuffleAsElementInsertion(), lowerVectorShuffleAsInsertPS(), lowerVectorShuffleAsLanePermuteAndBlend(), lowerVectorShuffleAsPSHUFB(), lowerVectorShuffleAsSpecificZeroOrAnyExtend(), lowerVectorShuffleAsUnpack(), lowerVectorShuffleByMerging128BitLanes(), lowerVectorShuffleWithSSE4A(), partitionShuffleOfConcats(), PerformARMBUILD_VECTORCombine(), llvm::R600TargetLowering::PerformDAGCombine(), PerformLOADCombine(), PerformMLOADCombine(), PerformMSTORECombine(), PerformSExtCombine(), PerformShuffleCombine256(), PerformSTORECombine(), PerformVECTOR_SHUFFLECombine(), llvm::AArch64TargetLowering::ReconstructShuffle(), ReplaceBITCASTResults(), llvm::X86TargetLowering::ReplaceNodeResults(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifySetCC(), simplifyShuffleOperandRecursively(), splitAndLowerVectorShuffle(), tryBuildVectorShuffle(), tryToFoldExtendOfConstant(), UnrollVectorOp(), WidenVector(), and XFormVExtractWithShuffleIntoLoad().
| SDValue SelectionDAG::getVAArg | ( | EVT | VT, |
| SDLoc | dl, | ||
| SDValue | Chain, | ||
| SDValue | Ptr, | ||
| SDValue | SV, | ||
| unsigned | Align | ||
| ) |
VAArg produces a result and token chain, and takes a pointer and a source value as input.
Definition at line 5295 of file SelectionDAG.cpp.
References getNode(), getTargetConstant(), getVTList(), llvm::MVT::i32, llvm::MVT::Other, and llvm::ISD::VAARG.
Definition at line 1453 of file SelectionDAG.cpp.
References llvm::EVT::getSimpleVT(), llvm::EVT::isExtended(), llvm::EVT::isSimple(), and llvm::MVT::SimpleTy.
Referenced by llvm::X86TargetLowering::BuildFILD(), convertLocVTToValVT(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemset(), getAArch64Cmp(), getCopyFromParts(), llvm::RegsForValue::getCopyFromRegs(), getNode(), llvm::SparcTargetLowering::LowerCall_64(), LowerEXTRACT_VECTOR_ELT_SSE4(), llvm::SITargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::SparcTargetLowering::LowerFormalArguments_64(), llvm::AMDGPUTargetLowering::LowerLOAD(), lowerMSACopyIntr(), llvm::MSP430TargetLowering::LowerSIGN_EXTEND(), llvm::ARMTargetLowering::PerformCMOVCombine(), llvm::AMDGPUTargetLowering::PerformDAGCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), UnpackFromArgumentSlot(), UnrollVectorOp(), and WidenMaskArithmetic().
| SDValue SelectionDAG::getVectorShuffle | ( | EVT | VT, |
| SDLoc | dl, | ||
| SDValue | N1, | ||
| SDValue | N2, | ||
| const int * | MaskElts | ||
| ) |
Return an ISD::VECTOR_SHUFFLE node.
The number of elements in VT, which must be a vector type, must match the number of mask elements NumElts. An integer mask element equal to -1 is treated as undefined.
Definition at line 1516 of file SelectionDAG.cpp.
References llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), llvm::BumpPtrAllocatorImpl< AllocatorT, SlabSize, SizeThreshold >::Allocate(), llvm::ISD::BITCAST, llvm::ISD::BUILD_VECTOR, llvm::C, commuteShuffle(), llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), getNode(), llvm::SDValue::getOpcode(), llvm::SDNode::getOperand(), llvm::BuildVectorSDNode::getSplatValue(), getUNDEF(), llvm::SDValue::getValueType(), llvm::SDNode::getValueType(), llvm::EVT::getVectorNumElements(), getVTList(), llvm::IP, llvm::BitVector::none(), llvm::SmallVectorTemplateBase< T, isPodLike >::push_back(), llvm::ISD::UNDEF, and llvm::ISD::VECTOR_SHUFFLE.
Referenced by buildFromShuffleMostly(), BuildVSLDOI(), ExpandBVWithShuffles(), expandV4F32ToV2F64(), GeneratePerfectShuffle(), getCommutedVectorShuffle(), getMOVL(), getShuffleVectorZeroOrUndef(), getUnpackh(), getUnpackl(), getVectorShuffle(), lower256BitVectorShuffle(), LowerAsSplatVectorLoad(), LowerBuildVectorv4x32(), LowerExtendedLoad(), LowerMUL(), LowerMUL_LOHI(), LowerScalarImmediateShift(), LowerShift(), LowerSIGN_EXTEND(), LowerSIGN_EXTEND_VECTOR_INREG(), lowerV16I8VectorShuffle(), lowerV2I64VectorShuffle(), lowerV4I32VectorShuffle(), lowerVectorShuffle(), lowerVectorShuffleAsBlendAndPermute(), lowerVectorShuffleAsDecomposedShuffleBlend(), lowerVectorShuffleAsElementInsertion(), lowerVectorShuffleAsLanePermuteAndBlend(), lowerVectorShuffleAsUnpack(), lowerVectorShuffleByMerging128BitLanes(), lowerVSELECTtoVectorShuffle(), LowerVSETCC(), partitionShuffleOfConcats(), performConcatVectorsCombine(), PerformMLOADCombine(), PerformMSTORECombine(), performSelectCombine(), PerformShuffleCombine(), PerformSTORECombine(), PerformVECTOR_SHUFFLECombine(), llvm::AArch64TargetLowering::ReconstructShuffle(), simplifyShuffleOperands(), splitAndLowerVectorShuffle(), transformVSELECTtoBlendVECTOR_SHUFFLE(), VectorZextCombine(), and XFormVExtractWithShuffleIntoLoad().
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inline |
Definition at line 577 of file SelectionDAG.h.
References llvm::ArrayRef< T >::data(), llvm::EVT::getVectorNumElements(), getVectorShuffle(), and llvm::ArrayRef< T >::size().
Return an SDVTList that represents the list of values specified.
Definition at line 5490 of file SelectionDAG.cpp.
References makeVTList().
Referenced by AddCombineTo64bitMLAL(), llvm::X86TargetLowering::BuildFILD(), llvm::TargetLowering::BuildUDIV(), CloneNodeWithValues(), CombineBaseUpdate(), CombineVLDDUP(), createLoadLR(), createStoreLR(), EltsFromConsecutiveLoads(), emitCLC(), emitComparison(), emitIntrinsicWithChainAndGlue(), emitIntrinsicWithGlue(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForMemchr(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemset(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrcmp(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrcpy(), Expand64BitShift(), ExpandBITCAST(), llvm::TargetLowering::expandMUL(), ExpandREAD_REGISTER(), llvm::PPCTargetLowering::expandVSXLoadForLE(), llvm::PPCTargetLowering::expandVSXStoreForLE(), GeneratePerfectShuffle(), getAArch64XALUOOp(), llvm::MipsTargetLowering::getAddrGPRel(), getAddrSpaceCast(), getAtomic(), getBasicBlock(), getBlockAddress(), getBoundedStrlen(), getCALLSEQ_END(), getCALLSEQ_START(), getConstant(), getConstantFP(), getConstantPool(), getConvertRndSat(), getCopyFromReg(), llvm::RegsForValue::getCopyFromRegs(), getCopyToReg(), getEHLabel(), getFrameIndex(), getGatherNode(), getGlobalAddress(), getIndexedStore(), getJumpTable(), getLoad(), getMachineNode(), getMaskedLoad(), getMaskedStore(), getMDNode(), getMergeValues(), getNode(), getReadPerformanceCounter(), getReadTimeStampCounter(), getRegister(), getRegisterMask(), getScatterNode(), getSrcValue(), getStore(), getTargetIndex(), GetTLSADDR(), getTOCEntry(), getTruncStore(), getVAArg(), getVectorShuffle(), LowerADDC_ADDE_SUBC_SUBE(), llvm::HexagonTargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::NVPTXTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), LowerCallResult(), llvm::TargetLowering::LowerCallTo(), LowerCMP_SWAP(), LowerCTLZ(), LowerCTLZ_ZERO_UNDEF(), LowerCTTZ(), llvm::HexagonTargetLowering::LowerDYNAMIC_STACKALLOC(), LowerFSINCOS(), llvm::SparcTargetLowering::LowerGlobalTLSAddress(), LowerINTRINSIC_W_CHAIN(), LowerINTRINSIC_WO_CHAIN(), LowerMSCATTER(), llvm::NVPTXTargetLowering::LowerReturn(), llvm::AMDGPUTargetLowering::LowerSDIVREM(), llvm::MSP430TargetLowering::LowerSELECT_CC(), llvm::MSP430TargetLowering::LowerSETCC(), llvm::SelectionDAGBuilder::LowerStatepoint(), llvm::AMDGPUTargetLowering::LowerUDIVREM64(), LowerVECTOR_SHUFFLE(), LowerXALUO(), performCONDCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), performIntegerAbsCombine(), performNEONPostLDSTCombine(), performPostLD1Combine(), PerformSExtCombine(), PerformShuffleCombine256(), PerformZExtCombine(), ReplaceINTRINSIC_W_CHAIN(), ReplaceLoadVector(), llvm::PPCTargetLowering::ReplaceNodeResults(), llvm::X86TargetLowering::ReplaceNodeResults(), ReplaceREADCYCLECOUNTER(), llvm::SelectionDAGISel::SelectCodeCommon(), and SelectNodeTo().
Definition at line 5554 of file SelectionDAG.cpp.
References llvm::FoldingSetNodeID::AddInteger(), llvm::BumpPtrAllocatorImpl< AllocatorT, SlabSize, SizeThreshold >::Allocate(), llvm::ArrayRef< T >::begin(), llvm::ArrayRef< T >::end(), llvm::SDVTListNode::getSDVTList(), llvm::FoldingSetNodeID::Intern(), llvm::IP, and llvm::ArrayRef< T >::size().
Return the expression required to zero extend the Op value assuming it was the smaller SrcTy value.
Definition at line 1058 of file SelectionDAG.cpp.
References llvm::ISD::AND, getConstant(), llvm::APInt::getLowBitsSet(), getNode(), llvm::EVT::getScalarType(), llvm::EVT::getSizeInBits(), llvm::SDValue::getValueType(), and llvm::EVT::isVector().
Referenced by llvm::AMDGPUTargetLowering::LowerLOAD(), llvm::AMDGPUTargetLowering::LowerSTORE(), and llvm::AMDGPUTargetLowering::PerformDAGCombine().
Return an operation which will zero extend the low lanes of the operand into the specified vector type.
For example, this can convert a v16i8 into a v4i32 by zero extending the low four lanes of the operand from i8 to i32.
Definition at line 1090 of file SelectionDAG.cpp.
References getNode(), llvm::EVT::getSizeInBits(), llvm::SDValue::getValueType(), llvm::EVT::getVectorNumElements(), llvm::EVT::isVector(), and llvm::ISD::ZERO_EXTEND_VECTOR_INREG.
Convert Op, which must be of integer type, to the integer type VT, by either zero-extending or truncating it.
Definition at line 1043 of file SelectionDAG.cpp.
References llvm::EVT::bitsGT(), getNode(), llvm::SDValue::getValueType(), llvm::ISD::TRUNCATE, and llvm::ISD::ZERO_EXTEND.
Referenced by llvm::SystemZSelectionDAGInfo::EmitTargetCodeForMemchr(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrnlen(), llvm::TargetLowering::expandFP_TO_SINT(), getNode(), llvm::AMDGPUTargetLowering::LowerDIVREM24(), llvm::AMDGPUTargetLowering::LowerGlobalAddress(), LowerINTRINSIC_W_CHAIN(), llvm::X86TargetLowering::ReplaceNodeResults(), llvm::AMDGPUTargetLowering::SplitVectorLoad(), llvm::SelectionDAGBuilder::visitBitTestHeader(), and llvm::SelectionDAGBuilder::visitJumpTableHeader().
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inline |
Return true if there are any SDDbgValue nodes associated with this SelectionDAG.
Definition at line 1124 of file SelectionDAG.h.
References llvm::SDDbgInfo::empty().
Referenced by llvm::ScheduleDAGSDNodes::EmitSchedule().
Infer alignment of a load / store address.
InferPtrAlignment - Infer alignment of a load / store address.
Return 0 if it cannot be inferred.
Definition at line 6902 of file SelectionDAG.cpp.
References Align(), llvm::computeKnownBits(), llvm::SDValue::getConstantOperandVal(), getDataLayout(), llvm::MachineFunction::getFrameInfo(), getMachineFunction(), llvm::SDValue::getNode(), llvm::MachineFrameInfo::getObjectAlignment(), llvm::SDValue::getOperand(), llvm::DataLayout::getPointerTypeSizeInBits(), llvm::GlobalValue::getType(), isBaseWithConstantOffset(), llvm::TargetLowering::isGAPlusOffset(), fuzzer::min(), and llvm::MinAlign().
Referenced by computeKnownBits(), getMemcpyLoadsAndStores(), getMemmoveLoadsAndStores(), and LowerAsSplatVectorLoad().
| void SelectionDAG::init | ( | MachineFunction & | mf | ) |
Prepare this SelectionDAG to process code in the given MachineFunction.
Definition at line 936 of file SelectionDAG.cpp.
References llvm::Function::getContext(), llvm::MachineFunction::getFunction(), llvm::TargetSubtargetInfo::getSelectionDAGInfo(), getSubtarget(), and llvm::TargetSubtargetInfo::getTargetLowering().
Referenced by llvm::SelectionDAGISel::runOnMachineFunction().
Return true if the specified operand is an ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an ISD::OR with a ConstantSDNode that is guaranteed to have the same semantics as an ADD.
isBaseWithConstantOffset - Return true if the specified operand is an ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an ISD::OR with a ConstantSDNode that is guaranteed to have the same semantics as an ADD.
This handles the equivalence: X|Cst == X+Cst iff X&Cst = 0.
Definition at line 2743 of file SelectionDAG.cpp.
References llvm::ISD::ADD, llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), MaskedValueIsZero(), and llvm::ISD::OR.
Referenced by InferPtrAlignment(), isConsecutiveLoad(), isConsecutiveLSLoc(), and LowerAsSplatVectorLoad().
Returns true if the opcode is a commutative binary operation.
Definition at line 1070 of file SelectionDAG.h.
References llvm::ISD::ADD, llvm::ISD::ADDC, llvm::ISD::ADDE, llvm::ISD::AND, llvm::ISD::FADD, llvm::ISD::FMAXNUM, llvm::ISD::FMINNUM, llvm::ISD::FMUL, llvm::ISD::MUL, llvm::ISD::MULHS, llvm::ISD::MULHU, llvm::ISD::OR, llvm::ISD::SADDO, llvm::ISD::SMUL_LOHI, llvm::ISD::UADDO, llvm::ISD::UMUL_LOHI, and llvm::ISD::XOR.
Referenced by getNode(), and llvm::TargetLowering::SimplifySetCC().
| bool SelectionDAG::isConsecutiveLoad | ( | LoadSDNode * | LD, |
| LoadSDNode * | Base, | ||
| unsigned | Bytes, | ||
| int | Dist | ||
| ) | const |
Return true if LD is loading 'Bytes' bytes from a location that is 'Dist' units away from the location that the 'Base' load is loading from.
isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a location that is 'Dist' units away from the location that the 'Base' load is loading from.
Definition at line 6847 of file SelectionDAG.cpp.
References llvm::AMDGPUISD::BFI, llvm::ISD::FrameIndex, llvm::FS, llvm::MemSDNode::getChain(), llvm::MachineFunction::getFrameInfo(), getMachineFunction(), llvm::SDValue::getNode(), llvm::MachineFrameInfo::getObjectOffset(), llvm::MachineFrameInfo::getObjectSize(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::SDNode::getOperand(), llvm::EVT::getSizeInBits(), llvm::SDNode::getValueType(), isBaseWithConstantOffset(), and llvm::TargetLowering::isGAPlusOffset().
Referenced by EltsFromConsecutiveLoads().
Test whether two SDValues are known to compare equal.
This is true if they are the same value, or if one is negative zero and the other positive zero.
Definition at line 2788 of file SelectionDAG.cpp.
Referenced by matchIntegerMINMAX(), PerformSELECT_CCCombine(), and PerformSELECTCombine().
Test whether the given SDValue is known to never be NaN.
Definition at line 2757 of file SelectionDAG.cpp.
References llvm::C, and getTarget().
Referenced by PerformSELECT_CCCombine(), performSelectCCCombine(), and PerformSELECTCombine().
Test whether the given SDValue is known to never be positive or negative Zero.
Definition at line 2771 of file SelectionDAG.cpp.
References llvm::C, llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), and llvm::ISD::OR.
Referenced by PerformCMOVCombine(), PerformSELECT_CCCombine(), performSelectCCCombine(), and PerformSELECTCombine().
| void SelectionDAG::Legalize | ( | ) |
This transforms the SelectionDAG into a SelectionDAG that is compatible with the target instruction selector, as indicated by the TargetLowering object.
This is the entry point for the file.
Note that this is an involved process that may invalidate pointers into the graph.
Definition at line 4344 of file LegalizeDAG.cpp.
References allnodes_begin(), allnodes_end(), AssignTopologicalOrder(), DeleteNode(), llvm::SDValue::getNode(), getRoot(), llvm::SmallPtrSetImpl< PtrType >::insert(), N, RemoveDeadNodes(), and llvm::SDNode::use_empty().
| bool SelectionDAG::LegalizeOp | ( | SDNode * | N, |
| SmallSetVector< SDNode *, 16 > & | UpdatedNodes | ||
| ) |
Transforms a SelectionDAG node and any operands to it into a node that is compatible with the target instruction selector, as indicated by the TargetLowering object.
N is a valid, legal node after calling this.This essentially runs a single recursive walk of the Legalize process over the given node (and its operands). This can be used to incrementally legalize the DAG. All of the nodes which are directly replaced, potentially including N, are added to the output parameter UpdatedNodes so that the delta to the DAG can be understood by the caller.
When this returns false, N has been legalized in a way that make the pointer passed in no longer valid. It may have even been deleted from the DAG, and so it shouldn't be used further. When this returns true, the N passed in is a legal node, and can be immediately processed as such. This may still have done some work on the DAG, and will still populate UpdatedNodes with any new nodes replacing those originally in the DAG.
Definition at line 4385 of file LegalizeDAG.cpp.
References llvm::SmallPtrSetImpl< PtrType >::count(), and llvm::SmallPtrSetImpl< PtrType >::insert().
| bool SelectionDAG::LegalizeTypes | ( | ) |
This transforms the SelectionDAG into a SelectionDAG that only uses types natively supported by the target.
LegalizeTypes - This transforms the SelectionDAG into a SelectionDAG that only uses types natively supported by the target.
Returns "true" if it made any changes.
Note that this is an involved process that may invalidate pointers into the graph.
Definition at line 1144 of file LegalizeTypes.cpp.
References llvm::DAGTypeLegalizer::run().
| bool SelectionDAG::LegalizeVectors | ( | ) |
This transforms the SelectionDAG into a SelectionDAG that only uses vector math operations supported by the target.
This is necessary as a separate step from Legalize because unrolling a vector operation can introduce illegal types, which requires running LegalizeTypes again.
This returns true if it made any changes; in that case, LegalizeTypes is called again before Legalize.
Note that this is an involved process that may invalidate pointers into the graph.
Definition at line 1022 of file LegalizeVectorOps.cpp.
Return true if 'Op & Mask' is known to be zero.
MaskedValueIsZero - Return true if 'V & Mask' is known to be zero.
We use this predicate to simplify operations downstream. Op and Mask are known to be the same type.
We use this predicate to simplify operations downstream. Mask is known to be zero for bits that V cannot have.
Definition at line 2011 of file SelectionDAG.cpp.
References computeKnownBits().
Referenced by llvm::SelectionDAGISel::CheckAndMask(), llvm::XCoreSelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::TargetLowering::expandMUL(), isBaseWithConstantOffset(), isTruncWithZeroHighBitsInput(), llvm::AMDGPUTargetLowering::LowerUDIVREM(), llvm::AMDGPUTargetLowering::LowerUDIVREM64(), llvm::PPCTargetLowering::PerformDAGCombine(), PerformORCombine(), PerformShiftCombine(), ShrinkLoadReplaceStoreWithStore(), SignBitIsZero(), and llvm::TargetLowering::SimplifySetCC().
| SDNode * SelectionDAG::MorphNodeTo | ( | SDNode * | N, |
| unsigned | Opc, | ||
| SDVTList | VTs, | ||
| ArrayRef< SDValue > | Ops | ||
| ) |
This mutates the specified node to have the specified return type, opcode, and operands.
MorphNodeTo - This mutates the specified node to have the specified return type, opcode, and operands.
Note that MorphNodeTo returns the resultant node. If there is already a node of the specified opcode and operands, it returns that node instead of the current one. Note that the SDLoc need not be the same.
Using MorphNodeTo is faster than creating a new node and swapping it in with ReplaceAllUsesWith both because it often avoids allocating a new node, and because it doesn't require CSE recalculation for any of the node's users.
However, note that MorphNodeTo recursively deletes dead nodes from the DAG. As a consequence it isn't appropriate to use from within the DAG combiner or the legalizer which maintain worklists that would need to be updated when deleting things.
Definition at line 5832 of file SelectionDAG.cpp.
References AddNodeIDNode(), llvm::BumpPtrAllocatorImpl< AllocatorT, SlabSize, SizeThreshold >::Allocate(), llvm::array_lengthof(), llvm::ArrayRef< T >::data(), llvm::SmallPtrSetImplBase::empty(), llvm::SDNode::getDebugLoc(), llvm::SDUse::getNode(), llvm::MVT::Glue, I, llvm::SDNode::InitOperands(), llvm::SmallPtrSetImpl< PtrType >::insert(), llvm::IP, N, llvm::SDVTList::NumVTs, llvm::SDNode::op_begin(), llvm::SDNode::op_end(), llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back(), RemoveDeadNodes(), llvm::ArrayRef< T >::size(), llvm::SDNode::use_empty(), and llvm::SDVTList::VTs.
Referenced by CloneNodeWithValues(), and SelectNodeTo().
| void SelectionDAG::RemoveDeadNode | ( | SDNode * | N | ) |
Remove the specified node from the system.
If any of its operands then becomes dead, remove them as well. Inform UpdateListener for each node deleted.
Definition at line 668 of file SelectionDAG.cpp.
References llvm::NVPTXISD::Dummy, getRoot(), and RemoveDeadNodes().
| void SelectionDAG::RemoveDeadNodes | ( | ) |
This method deletes all unreachable nodes in the SelectionDAG.
RemoveDeadNodes - This method deletes all unreachable nodes in the SelectionDAG.
Definition at line 619 of file SelectionDAG.cpp.
References allnodes_begin(), allnodes_end(), llvm::NVPTXISD::Dummy, getRoot(), llvm::HandleSDNode::getValue(), I, llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back(), and setRoot().
Referenced by Legalize(), MorphNodeTo(), RemoveDeadNode(), and llvm::DAGTypeLegalizer::run().
| void SelectionDAG::RemoveDeadNodes | ( | SmallVectorImpl< SDNode * > & | DeadNodes | ) |
This method deletes the unreachable nodes in the given list, and any nodes that become unreachable as a result.
RemoveDeadNodes - This method deletes the unreachable nodes in the given list, and any nodes that become unreachable as a result.
Definition at line 639 of file SelectionDAG.cpp.
References llvm::SmallVectorBase::empty(), llvm::SDUse::getNode(), I, N, llvm::SelectionDAG::DAGUpdateListener::Next, llvm::SDNode::op_begin(), llvm::SDNode::op_end(), llvm::SmallVectorImpl< T >::pop_back_val(), llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back(), and llvm::SDNode::use_empty().
| void SelectionDAG::ReplaceAllUsesOfValuesWith | ( | const SDValue * | From, |
| const SDValue * | To, | ||
| unsigned | Num | ||
| ) |
Like ReplaceAllUsesOfValueWith, but for multiple values at once.
ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving uses of other values produced by From.getNode() alone.
This correctly handles the case where there is an overlap between the From values and the To values.
The same value may appear in both the From and To list. The Deleted vector is handled the same way as for ReplaceAllUsesWith.
Definition at line 6380 of file SelectionDAG.cpp.
References llvm::SmallVectorTemplateCommon< T >::begin(), llvm::SmallVectorTemplateCommon< T >::end(), llvm::SDValue::getNode(), llvm::SDValue::getResNo(), llvm::SDUse::getResNo(), llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back(), ReplaceAllUsesOfValueWith(), llvm::SmallVectorTemplateCommon< T >::size(), llvm::SDNode::use_begin(), and llvm::SDNode::use_end().
Referenced by llvm::SelectionDAGISel::ReplaceUses().
Replace any uses of From with To, leaving uses of other values produced by From.Val alone.
ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving uses of other values produced by From.getNode() alone.
The Deleted vector is handled the same way as for ReplaceAllUsesWith.
Definition at line 6303 of file SelectionDAG.cpp.
References llvm::SDValue::getNode(), llvm::SDNode::getNumValues(), llvm::SDValue::getResNo(), llvm::SDUse::getResNo(), getRoot(), llvm::SDNode::use_iterator::getUse(), ReplaceAllUsesWith(), setRoot(), llvm::SDNode::use_begin(), and llvm::SDNode::use_end().
Referenced by AddCombineTo64bitMLAL(), EltsFromConsecutiveLoads(), emitIntrinsicWithChainAndGlue(), LowerCMP_SWAP(), LowerExtendedLoad(), PerformCMOVCombine(), llvm::SystemZTargetLowering::PerformDAGCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), performDivRemCombine(), PerformEXTRACT_VECTOR_ELTCombine(), performIntToFpCombine(), PerformSELECTCombine(), PerformSExtCombine(), PerformShuffleCombine256(), PerformSINT_TO_FPCombine(), PerformZExtCombine(), ReplaceAllUsesOfValuesWith(), llvm::AMDGPUTargetLowering::ReplaceNodeResults(), llvm::SelectionDAGISel::ReplaceUses(), llvm::SelectionDAGISel::SelectCodeCommon(), selectMADD(), and selectMSUB().
Modify anything using 'From' to use 'To' instead.
ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
This can cause recursive merging of nodes in the DAG. Use the first version if 'From' is known to have a single result, use the second if you have two nodes with identical results (or if 'To' has a superset of the results of 'From'), use the third otherwise.
These methods all take an optional UpdateListener, which (if not null) is informed about nodes that are deleted and modified due to recursive changes in the dag.
These functions only replace all existing uses. It's possible that as these replacements are being performed, CSE may cause the From node to be given new uses. These new uses of From are left in place, and not automatically transferred to To.
This can cause recursive merging of nodes in the DAG.
This version assumes From has a single result value.
Definition at line 6171 of file SelectionDAG.cpp.
References llvm::SDValue::getNode(), llvm::SDNode::getNumValues(), llvm::SDValue::getResNo(), getRoot(), setRoot(), llvm::SDNode::use_begin(), and llvm::SDNode::use_end().
Referenced by FoldMaskAndShiftToExtract(), FoldMaskAndShiftToScale(), FoldMaskedShiftToScaledMask(), LowerMSCATTER(), llvm::SelectionDAGBuilder::LowerStatepoint(), performCONDCombine(), ReplaceAllUsesOfValueWith(), ReplaceAllUsesWith(), and llvm::SelectionDAGISel::ReplaceUses().
ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
This can cause recursive merging of nodes in the DAG.
This version assumes that for each value of From, there is a corresponding value in To in the same position with the same type.
Definition at line 6218 of file SelectionDAG.cpp.
References getNode(), llvm::SDNode::getNumValues(), getRoot(), llvm::SDNode::use_iterator::getUse(), llvm::SDNode::getValueType(), llvm::SDNode::hasAnyUseOfValue(), setRoot(), llvm::SDNode::use_begin(), and llvm::SDNode::use_end().
ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
This can cause recursive merging of nodes in the DAG.
This version can replace From with any result values. To must match the number and types of values returned by From.
Definition at line 6265 of file SelectionDAG.cpp.
References getNode(), llvm::SDNode::getNumValues(), llvm::SDUse::getResNo(), getRoot(), llvm::SDNode::use_iterator::getUse(), ReplaceAllUsesWith(), setRoot(), llvm::SDNode::use_begin(), and llvm::SDNode::use_end().
|
inline |
Move node N in the AllNodes list to be immediately before the given iterator Position.
This may be used to update the topological ordering when the list of nodes is modified.
Definition at line 1065 of file SelectionDAG.h.
Referenced by insertDAGNode(), and InsertDAGNode().
These are used for target selectors to mutate the specified node to have the specified return type, Target opcode, and operands.
SelectNodeTo - These are wrappers around MorphNodeTo that accept a machine opcode.
Note that target opcodes are stored as ~TargetOpcode in the node opcode field. The resultant node is returned.
Definition at line 5696 of file SelectionDAG.cpp.
References getVTList(), and llvm::None.
Referenced by SelectNodeTo().
Definition at line 5702 of file SelectionDAG.cpp.
References getVTList(), and SelectNodeTo().
| SDNode * SelectionDAG::SelectNodeTo | ( | SDNode * | N, |
| unsigned | TargetOpc, | ||
| EVT | VT, | ||
| SDValue | Op1, | ||
| SDValue | Op2 | ||
| ) |
Definition at line 5709 of file SelectionDAG.cpp.
References getVTList(), and SelectNodeTo().
| SDNode * SelectionDAG::SelectNodeTo | ( | SDNode * | N, |
| unsigned | TargetOpc, | ||
| EVT | VT, | ||
| SDValue | Op1, | ||
| SDValue | Op2, | ||
| SDValue | Op3 | ||
| ) |
Definition at line 5717 of file SelectionDAG.cpp.
References getVTList(), and SelectNodeTo().
| SDNode * SelectionDAG::SelectNodeTo | ( | SDNode * | N, |
| unsigned | TargetOpc, | ||
| EVT | VT, | ||
| ArrayRef< SDValue > | Ops | ||
| ) |
Definition at line 5725 of file SelectionDAG.cpp.
References getVTList(), and SelectNodeTo().
Definition at line 5737 of file SelectionDAG.cpp.
References getVTList(), llvm::None, and SelectNodeTo().
| SDNode * SelectionDAG::SelectNodeTo | ( | SDNode * | N, |
| unsigned | TargetOpc, | ||
| EVT | VT1, | ||
| EVT | VT2, | ||
| ArrayRef< SDValue > | Ops | ||
| ) |
Definition at line 5731 of file SelectionDAG.cpp.
References getVTList(), and SelectNodeTo().
| SDNode * SelectionDAG::SelectNodeTo | ( | SDNode * | N, |
| unsigned | TargetOpc, | ||
| EVT | VT1, | ||
| EVT | VT2, | ||
| EVT | VT3, | ||
| ArrayRef< SDValue > | Ops | ||
| ) |
Definition at line 5743 of file SelectionDAG.cpp.
References getVTList(), and SelectNodeTo().
| SDNode * SelectionDAG::SelectNodeTo | ( | SDNode * | N, |
| unsigned | MachineOpc, | ||
| EVT | VT1, | ||
| EVT | VT2, | ||
| EVT | VT3, | ||
| EVT | VT4, | ||
| ArrayRef< SDValue > | Ops | ||
| ) |
Definition at line 5750 of file SelectionDAG.cpp.
References getVTList(), and SelectNodeTo().
| SDNode * SelectionDAG::SelectNodeTo | ( | SDNode * | N, |
| unsigned | TargetOpc, | ||
| EVT | VT1, | ||
| EVT | VT2, | ||
| SDValue | Op1 | ||
| ) |
Definition at line 5757 of file SelectionDAG.cpp.
References getVTList(), and SelectNodeTo().
| SDNode * SelectionDAG::SelectNodeTo | ( | SDNode * | N, |
| unsigned | TargetOpc, | ||
| EVT | VT1, | ||
| EVT | VT2, | ||
| SDValue | Op1, | ||
| SDValue | Op2 | ||
| ) |
Definition at line 5765 of file SelectionDAG.cpp.
References getVTList(), and SelectNodeTo().
| SDNode * SelectionDAG::SelectNodeTo | ( | SDNode * | N, |
| unsigned | TargetOpc, | ||
| EVT | VT1, | ||
| EVT | VT2, | ||
| SDValue | Op1, | ||
| SDValue | Op2, | ||
| SDValue | Op3 | ||
| ) |
Definition at line 5773 of file SelectionDAG.cpp.
References getVTList(), and SelectNodeTo().
| SDNode * SelectionDAG::SelectNodeTo | ( | SDNode * | N, |
| unsigned | TargetOpc, | ||
| EVT | VT1, | ||
| EVT | VT2, | ||
| EVT | VT3, | ||
| SDValue | Op1, | ||
| SDValue | Op2, | ||
| SDValue | Op3 | ||
| ) |
Definition at line 5782 of file SelectionDAG.cpp.
References getVTList(), and SelectNodeTo().
| SDNode * SelectionDAG::SelectNodeTo | ( | SDNode * | N, |
| unsigned | TargetOpc, | ||
| SDVTList | VTs, | ||
| ArrayRef< SDValue > | Ops | ||
| ) |
Definition at line 5791 of file SelectionDAG.cpp.
References MorphNodeTo(), N, and llvm::SDNode::setNodeId().
Set graph attributes for a node. (eg. "color=red".)
setGraphAttrs - Set graph attributes for a node.
(eg. "color=red".)
Definition at line 177 of file SelectionDAGPrinter.cpp.
References llvm::errs(), N, and NodeGraphAttrs.
Convenience for setting node color attribute.
setGraphColor - Convenience for setting node color attribute.
Definition at line 207 of file SelectionDAGPrinter.cpp.
References llvm::errs(), N, and NodeGraphAttrs.
Set the current root tag of the SelectionDAG.
Definition at line 344 of file SelectionDAG.h.
References llvm::checkForCycles(), llvm::SDValue::getNode(), llvm::SDValue::getValueType(), N, and llvm::MVT::Other.
Referenced by llvm::SelectionDAGBuilder::getControlRoot(), llvm::SelectionDAGBuilder::getRoot(), llvm::TargetLowering::LowerCallTo(), llvm::NVPTXTargetLowering::LowerFormalArguments(), lowerIncomingStatepointValue(), RemoveDeadNodes(), ReplaceAllUsesOfValueWith(), ReplaceAllUsesWith(), llvm::DAGTypeLegalizer::run(), llvm::SelectionDAGBuilder::visitBitTestCase(), llvm::SelectionDAGBuilder::visitBitTestHeader(), llvm::SelectionDAGBuilder::visitJumpTable(), llvm::SelectionDAGBuilder::visitJumpTableHeader(), llvm::SelectionDAGBuilder::visitSPDescriptorFailure(), llvm::SelectionDAGBuilder::visitSPDescriptorParent(), and llvm::SelectionDAGBuilder::visitSwitchCase().
Convenience for setting subgraph color attribute.
setSubgraphColor - Convenience for setting subgraph color attribute.
Definition at line 251 of file SelectionDAGPrinter.cpp.
References llvm::errs().
Return true if the sign bit of Op is known to be zero.
SignBitIsZero - Return true if the sign bit of Op is known to be zero.
We use this predicate to simplify operations downstream.
Definition at line 1999 of file SelectionDAG.cpp.
References llvm::EVT::getScalarType(), llvm::APInt::getSignBit(), llvm::EVT::getSizeInBits(), llvm::SDValue::getValueType(), llvm::EVT::isVector(), and MaskedValueIsZero().
Referenced by getCmp().
| std::pair< SDValue, SDValue > SelectionDAG::SplitVector | ( | const SDValue & | N, |
| const SDLoc & | DL, | ||
| const EVT & | LoVT, | ||
| const EVT & | HiVT | ||
| ) |
Split the vector with EXTRACT_SUBVECTOR using the provides VTs and return the low/high part.
SplitVector - Split the vector with EXTRACT_SUBVECTOR and return the low/high part.
Definition at line 6959 of file SelectionDAG.cpp.
References llvm::DL, llvm::ISD::EXTRACT_SUBVECTOR, getConstant(), getDataLayout(), getNode(), llvm::SDValue::getValueType(), llvm::TargetLoweringBase::getVectorIdxTy(), llvm::EVT::getVectorNumElements(), llvm::MipsISD::Hi, and llvm::MipsISD::Lo.
Referenced by SplitVector(), llvm::AMDGPUTargetLowering::SplitVectorLoad(), SplitVectorOperand(), and llvm::AMDGPUTargetLowering::SplitVectorStore().
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inline |
Split the vector with EXTRACT_SUBVECTOR and return the low/high part.
Definition at line 1229 of file SelectionDAG.h.
References GetSplitDestVTs(), llvm::SDValue::getValueType(), and SplitVector().
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inline |
Split the node's operand with EXTRACT_SUBVECTOR and return the low/high part.
Definition at line 1237 of file SelectionDAG.h.
References llvm::SDNode::getOperand(), and SplitVector().
Referenced by SplitVSETCC().
Transfer SDDbgValues.
TransferDbgValues - Transfer SDDbgValues.
Definition at line 6535 of file SelectionDAG.cpp.
References AddDbgValue(), llvm::SmallVectorTemplateCommon< T >::begin(), llvm::ArrayRef< T >::begin(), llvm::SmallVectorTemplateCommon< T >::end(), llvm::ArrayRef< T >::end(), getDbgValue(), GetDbgValues(), llvm::SDDbgValue::getDebugLoc(), llvm::SDDbgValue::getExpression(), llvm::SDNode::getHasDebugValue(), llvm::SDDbgValue::getKind(), llvm::SDValue::getNode(), llvm::SDDbgValue::getOffset(), llvm::SDDbgValue::getOrder(), llvm::SDValue::getResNo(), llvm::SDDbgValue::getVariable(), I, llvm::SDDbgValue::isIndirect(), llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back(), and llvm::SDDbgValue::SDNODE.
Utility function used by legalize and lowering to "unroll" a vector operation by splitting out the scalars and operating on each element individually.
If the ResNE is 0, fully unroll the vector op. If ResNE is less than the width of the vector op, unroll up to ResNE. If the ResNE is greater than the width of the vector op, unroll the vector op and fill the end of the resulting vector with UNDEFS.
Definition at line 6775 of file SelectionDAG.cpp.
References llvm::ISD::BUILD_VECTOR, llvm::ISD::EXTRACT_VECTOR_ELT, llvm::ISD::FP_ROUND_INREG, getConstant(), getContext(), getDataLayout(), getNode(), llvm::SDNode::getNumOperands(), llvm::SDNode::getNumValues(), llvm::SDNode::getOpcode(), llvm::SDNode::getOperand(), getShiftAmountOperand(), getUNDEF(), llvm::SDValue::getValueType(), getValueType(), llvm::SDNode::getValueType(), llvm::EVT::getVectorElementType(), llvm::TargetLoweringBase::getVectorIdxTy(), llvm::EVT::getVectorVT(), llvm::EVT::isVector(), llvm::AArch64CC::NE, Operands, llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back(), llvm::ISD::ROTL, llvm::ISD::ROTR, llvm::ISD::SELECT, llvm::ISD::SHL, llvm::ISD::SIGN_EXTEND_INREG, llvm::ISD::SRA, llvm::ISD::SRL, and llvm::ISD::VSELECT.
Referenced by LowerVectorFP_TO_INT(), and LowerVectorINT_TO_FP().
Mutate the specified node in-place to have the specified operands.
UpdateNodeOperands - Mutate the specified node in-place to have the specified operands.
If the resultant node already exists in the DAG, this does not modify the specified node, instead it returns the node that already exists. If the resultant node does not exist in the DAG, the input node is returned. As a degenerate case, if you specify the same input operands as the node already has, the input node is returned.
Definition at line 5580 of file SelectionDAG.cpp.
References llvm::SDNode::getNumOperands(), llvm::SDNode::getOperand(), and N.
Referenced by EltsFromConsecutiveLoads(), llvm::SITargetLowering::legalizeTargetIndependentNode(), llvm::AMDGPUTargetLowering::LowerGlobalAddress(), LowerMGATHER(), MoveBelowOrigChain(), llvm::SITargetLowering::PerformDAGCombine(), PerformShuffleCombine256(), and UpdateNodeOperands().
Definition at line 5604 of file SelectionDAG.cpp.
References llvm::SDNode::getNumOperands(), llvm::SDNode::getOperand(), and N.
Definition at line 5633 of file SelectionDAG.cpp.
References UpdateNodeOperands().
| SDNode * SelectionDAG::UpdateNodeOperands | ( | SDNode * | N, |
| SDValue | Op1, | ||
| SDValue | Op2, | ||
| SDValue | Op3, | ||
| SDValue | Op4 | ||
| ) |
Definition at line 5639 of file SelectionDAG.cpp.
References UpdateNodeOperands().
| SDNode * SelectionDAG::UpdateNodeOperands | ( | SDNode * | N, |
| SDValue | Op1, | ||
| SDValue | Op2, | ||
| SDValue | Op3, | ||
| SDValue | Op4, | ||
| SDValue | Op5 | ||
| ) |
Definition at line 5646 of file SelectionDAG.cpp.
References UpdateNodeOperands().
Definition at line 5653 of file SelectionDAG.cpp.
References llvm::ArrayRef< T >::begin(), llvm::ArrayRef< T >::empty(), llvm::ArrayRef< T >::end(), llvm::lltok::equal, llvm::SDNode::getNumOperands(), N, llvm::SDNode::op_begin(), and llvm::ArrayRef< T >::size().
| void SelectionDAG::viewGraph | ( | const std::string & | Title | ) |
Pop up a GraphViz/gv window with the DAG rendered using 'dot'.
viewGraph - Pop up a ghostview window with the reachable parts of the DAG rendered using 'dot'.
Definition at line 146 of file SelectionDAGPrinter.cpp.
References llvm::errs(), getMachineFunction(), getName(), and llvm::ViewGraph().
| void SelectionDAG::viewGraph | ( | ) |
Definition at line 159 of file SelectionDAGPrinter.cpp.
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friend |
DAGUpdateListener is a friend so it can manipulate the listener stack.
Definition at line 257 of file SelectionDAG.h.
| bool llvm::SelectionDAG::NewNodesMustHaveLegalTypes |
When true, additional steps are taken to ensure that getConstant() and similar functions return DAG nodes that have legal types.
This is important after type legalization since any illegally typed nodes generated after this point will not experience type legalization.
Definition at line 253 of file SelectionDAG.h.
Referenced by getConstant().
Definition at line 296 of file SelectionDAG.h.
Referenced by clearGraphAttrs(), getGraphAttrs(), setGraphAttrs(), and setGraphColor().
1.8.6