26 #define DEBUG_TYPE "regalloc"
28 STATISTIC(NumDCEDeleted,
"Number of instructions deleted by DCE");
29 STATISTIC(NumDCEFoldedLoads,
"Number of single use loads folded after DCE");
30 STATISTIC(NumFracRanges,
"Number of live ranges fractured by DCE");
32 void LiveRangeEdit::Delegate::anchor() { }
54 assert(DefMI &&
"Missing instruction");
55 ScannedRemattable =
true;
58 Remattable.insert(VNI);
71 ScannedRemattable =
true;
75 if (!ScannedRemattable)
77 return !Remattable.empty();
82 bool LiveRangeEdit::allUsesAvailableAt(
const MachineInstr *OrigMI,
119 assert(ScannedRemattable &&
"Call anyRematerializable first");
132 assert(RM.
OrigMI &&
"No defining instruction for remattable value");
140 if (!allUsesAvailableAt(RM.
OrigMI, DefIdx, UseIdx))
152 assert(RM.
OrigMI &&
"Invalid remat");
172 if (DefMI && DefMI != MI)
178 if (UseMI && UseMI != MI)
186 if (!DefMI || !UseMI)
191 if (!allUsesAvailableAt(DefMI,
202 DEBUG(
dbgs() <<
"Try to fold single def: " << *DefMI
203 <<
" into single use: " << *UseMI);
206 if (UseMI->readsWritesVirtualRegister(LI->
reg, &Ops).second)
214 UseMI->eraseFromParent();
231 if ((S.LaneMask & LaneMask) != 0 && S.Query(Idx).isKill())
238 void LiveRangeEdit::eliminateDeadDef(
MachineInstr *MI, ToShrinkSet &ToShrink) {
248 DEBUG(
dbgs() <<
"Won't delete: " << Idx <<
'\t' << *MI);
253 bool SawStore =
false;
255 DEBUG(
dbgs() <<
"Can't delete: " << Idx <<
'\t' << *MI);
259 DEBUG(
dbgs() <<
"Deleting dead def " << Idx <<
'\t' << *MI);
263 bool ReadsPhysRegs =
false;
270 unsigned Reg = MOI->getReg();
273 if (Reg && MOI->readsReg() && !MRI.
isReserved(Reg))
274 ReadsPhysRegs =
true;
275 else if (MOI->isDef())
286 (MOI->readsReg() && (MRI.
hasOneNonDBGUse(Reg) || useIsKill(LI, *MOI))))
287 ToShrink.insert(&LI);
315 DEBUG(
dbgs() <<
"Converted physregs to:\t" << *MI);
326 for (
unsigned i = 0, e = RegsToErase.
size(); i != e; ++i) {
327 unsigned Reg = RegsToErase[i];
341 while (!Dead.
empty())
344 if (ToShrink.
empty())
350 if (foldAsLoad(LI, Dead))
361 bool BeingSpilled =
false;
362 for (
unsigned i = 0, e = RegsBeingSpilled.
size(); i != e; ++i) {
363 if (LI->
reg == RegsBeingSpilled[i]) {
369 if (BeingSpilled)
continue;
374 unsigned NumComp = ConEQ.
Classify(LI);
379 DEBUG(
dbgs() << NumComp <<
" components: " << *LI <<
'\n');
381 for (
unsigned i = 1; i != NumComp; ++i) {
393 for (
unsigned i = 0; i != NumComp; ++i)
394 dbgs() <<
'\t' << *Dups[i] <<
'\n';
402 LiveRangeEdit::MRI_NoteNewVirtualRegister(
unsigned VReg)
415 for (
unsigned I = 0, Size =
size();
I < Size; ++
I) {
bool isConstantPhysReg(unsigned PhysReg, const MachineFunction &MF) const
isConstantPhysReg - Returns true if PhysReg is unallocatable and constant throughout the function...
void RenumberValues()
RenumberValues - Renumber all values in order of appearance and remove unused values.
void push_back(const T &Elt)
const MachineFunction * getParent() const
getParent - Return the MachineFunction containing this basic block.
mop_iterator operands_end()
Calculate auxiliary information for a virtual register such as its spill weight and allocation hint...
MachineInstr * getParent()
getParent - Return the instruction that this operand belongs to.
SlotIndex def
The index of the defining instruction.
STATISTIC(NumFunctions,"Total number of functions")
bool anyRematerializable(AliasAnalysis *)
anyRematerializable - Return true if any parent values may be rematerializable.
void removePhysRegDefAt(unsigned Reg, SlotIndex Pos)
Remove value numbers and related live segments starting at position Pos that are part of any liverang...
bool addRegisterDead(unsigned Reg, const TargetRegisterInfo *RegInfo, bool AddIfNotFound=false)
We have determined MI defined a register without a use.
unsigned createVirtualRegister(const TargetRegisterClass *RegClass)
createVirtualRegister - Create and return a new virtual register in the function with the specified r...
LiveInterval - This class represents the liveness of a register, or stack slot.
SlotIndex getInstructionIndex(const MachineInstr *instr) const
Returns the base index of the given instruction.
static bool isVirtualRegister(unsigned Reg)
isVirtualRegister - Return true if the specified register number is in the virtual register namespace...
bool readsVirtualRegister(unsigned Reg) const
Return true if the MachineInstr reads the specified virtual register.
MachineBlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate machine basic b...
bool isKill() const
Return true if the live-in value is killed by this instruction.
A live range for subregisters.
virtual void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, unsigned SubIdx, const MachineInstr *Orig, const TargetRegisterInfo &TRI) const
Re-issue the specified 'original' instruction at the specific location targeting a new destination re...
bool canFoldAsLoad(QueryType Type=IgnoreBundle) const
Return true for instructions that can be folded as memory operands in other instructions.
VNInfo - Value Number Information.
VNInfo * getVNInfoAt(SlotIndex Idx) const
getVNInfoAt - Return the VNInfo that is live at Idx, or NULL.
bool allDefsAreDead() const
Return true if all the defs of this instruction are dead.
bool checkRematerializable(VNInfo *VNI, const MachineInstr *DefMI, AliasAnalysis *)
checkRematerializable - Manually add VNI to the list of rematerializable values if DefMI may be remat...
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
const TargetRegisterInfo * getTargetRegisterInfo() const
T LLVM_ATTRIBUTE_UNUSED_RESULT pop_back_val()
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
bool isReg() const
isReg - Tests if this is a MO_Register operand.
iterator_range< subrange_iterator > subranges()
void eraseFromParent()
Unlink 'this' from the containing basic block and delete it.
const TargetRegisterClass * getRegClass(unsigned Reg) const
getRegClass - Return the register class of the specified virtual register.
Reg
All possible values of the reg field in the ModR/M byte.
unsigned Classify(const LiveInterval *LI)
Classify - Classify the values in LI into connected components.
void pop_back()
Remove the last element of the SetVector.
unsigned getNumOperands() const
Access to explicit operands of the instruction.
void Distribute(LiveInterval *LIV[], MachineRegisterInfo &MRI)
Distribute - Distribute values in LIV[0] into a separate LiveInterval for each connected component...
PrintReg - Helper class for printing registers on a raw_ostream.
void RemoveOperand(unsigned i)
Erase an operand from an instruction, leaving it with one fewer operand than it started with...
bool LLVM_ATTRIBUTE_UNUSED_RESULT empty() const
void setIsSplitFromReg(unsigned virtReg, unsigned SReg)
records virtReg is a split live interval from SReg.
bool isBundled() const
Return true if this instruction part of a bundle.
bool shrinkToUses(LiveInterval *li, SmallVectorImpl< MachineInstr * > *dead=nullptr)
shrinkToUses - After removing some uses of a register, shrink its live range to just the remaining us...
bool empty() const
Determine if the SetVector is empty or not.
const char * getRegClassName(const TargetRegisterClass *Class) const
getRegClassName - Returns the name of the register class.
size_t size() const
size - Get the array size.
const MachineBasicBlock * getParent() const
bundle_iterator< MachineInstr, instr_iterator > iterator
void RemoveMachineInstrFromMaps(MachineInstr *MI)
unsigned createFrom(unsigned OldReg)
createFrom - Create a new virtual register based on OldReg.
SlotIndexes * getSlotIndexes() const
LiveQueryResult Query(SlotIndex Idx) const
Query Liveness at Idx.
void removeInterval(unsigned Reg)
virtual bool isAsCheapAsAMove(const MachineInstr *MI) const
Return true if the instruction is as cheap as a move instruction.
unsigned getSubRegIndexLaneMask(unsigned SubIdx) const
getSubRegIndexLaneMask - Return a bitmask representing the parts of a register that are covered by Su...
unsigned getOriginal(unsigned VirtReg) const
getOriginal - Return the original virtual register that VirtReg descends from through splitting...
bool isReserved(unsigned PhysReg) const
isReserved - Returns true when PhysReg is a reserved register.
const MachineOperand & getOperand(unsigned i) const
virtual bool LRE_CanEraseVirtReg(unsigned)
Called when a virtual register is no longer used.
bool canRematerializeAt(Remat &RM, SlotIndex UseIdx, bool cheapAsAMove)
canRematerializeAt - Determine if ParentVNI can be rematerialized at UseIdx.
LiveInterval & getParent() const
virtual void LRE_WillEraseInstruction(MachineInstr *MI)
Called immediately before erasing a dead machine instruction.
unsigned getSubReg() const
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
const MCInstrDesc & get(unsigned Opcode) const
Return the machine instruction descriptor that corresponds to the specified instruction opcode...
bool isSafeToMove(AliasAnalysis *AA, bool &SawStore) const
Return true if it is safe to move this instruction.
void setDesc(const MCInstrDesc &tid)
Replace the instruction descriptor (thus opcode) of the current instruction with a new one...
static bool isSameInstr(SlotIndex A, SlotIndex B)
isSameInstr - Return true if A and B refer to the same instruction.
ConnectedVNInfoEqClasses - Helper class that can divide VNInfos in a LiveInterval into equivalence cl...
MachineOperand class - Representation of each machine instruction operand.
void calculateSpillWeightAndHint(LiveInterval &li)
(re)compute li's spill weight and allocation hint.
bool isTriviallyReMaterializable(const MachineInstr *MI, AliasAnalysis *AA=nullptr) const
Return true if the instruction is trivially rematerializable, meaning it has no side effects and requ...
LiveInterval & getInterval(unsigned Reg)
bool recomputeRegClass(unsigned Reg)
recomputeRegClass - Try to find a legal super-class of Reg's register class that still satisfies the ...
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
MachineInstr * foldMemoryOperand(MachineBasicBlock::iterator MI, ArrayRef< unsigned > Ops, int FrameIndex) const
Attempt to fold a load or store of the specified stack slot into the specified machine instruction fo...
LiveInterval & createEmptyInterval(unsigned Reg)
virtual void LRE_WillShrinkVirtReg(unsigned)
Called before shrinking the live range of a virtual register.
KILL - This instruction is a noop that is used only to adjust the liveness of registers.
void ReplaceMachineInstrInMaps(MachineInstr *MI, MachineInstr *NewMI)
Representation of each machine instruction.
static bool isPhysicalRegister(unsigned Reg)
isPhysicalRegister - Return true if the specified register number is in the physical register namespa...
SlotIndex rematerializeAt(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, const Remat &RM, const TargetRegisterInfo &, bool Late=false)
rematerializeAt - Rematerialize RM.ParentVNI into DestReg by inserting an instruction into MBB before...
bool hasOneNonDBGUse(unsigned RegNo) const
hasOneNonDBGUse - Return true if there is exactly one non-Debug instruction using the specified regis...
virtual void LRE_DidCloneVirtReg(unsigned New, unsigned Old)
Called after cloning a virtual register.
const T & back() const
Return the last element of the SetVector.
bool hasInterval(unsigned Reg) const
Remat - Information needed to rematerialize at a specific location.
SlotIndex getRegSlot(bool EC=false) const
Returns the register use/def slot in the current instruction for a normal or early-clobber def...
unsigned getReg() const
getReg - Returns the register number.
iterator_range< reg_nodbg_iterator > reg_nodbg_operands(unsigned Reg) const
void eliminateDeadDefs(SmallVectorImpl< MachineInstr * > &Dead, ArrayRef< unsigned > RegsBeingSpilled=None)
eliminateDeadDefs - Try to delete machine instructions that are now dead (allDefsAreDead returns true...
mop_iterator operands_begin()
LiveInterval & createEmptyIntervalFrom(unsigned OldReg)
createEmptyIntervalFrom - Create a new empty interval based on OldReg.
A vector that has set insertion semantics.
MachineInstr * getInstructionFromIndex(SlotIndex index) const
Returns the instruction associated with the given index.
void calculateRegClassAndHint(MachineFunction &, const MachineLoopInfo &, const MachineBlockFrequencyInfo &)
calculateRegClassAndHint - Recompute register class and hint for each new register.
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
void eraseVirtReg(unsigned Reg)
eraseVirtReg - Notify the delegate that Reg is no longer in use, and try to erase it from LIS...
bool readsReg() const
readsReg - Returns true if this operand reads the previous value of its register. ...
SlotIndex - An opaque wrapper around machine indexes.
SlotIndex insertMachineInstrInMaps(MachineInstr *mi, bool Late=false)
Insert the given machine instruction into the mapping.
bool reg_nodbg_empty(unsigned RegNo) const
reg_nodbg_empty - Return true if the only instructions using or defining Reg are Debug instructions...
void removeVRegDefAt(LiveInterval &LI, SlotIndex Pos)
Remove value number and related live segments of LI and its subranges that start at position Pos...