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LLVM
3.7.0
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This is the complete list of members for llvm::X86InstrInfo, including all inherited members.
| AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const override | llvm::X86InstrInfo | |
| AnalyzeBranchPredicate(MachineBasicBlock &MBB, TargetInstrInfo::MachineBranchPredicate &MBP, bool AllowModify=false) const override | llvm::X86InstrInfo | |
| analyzeCompare(const MachineInstr *MI, unsigned &SrcReg, unsigned &SrcReg2, int &CmpMask, int &CmpValue) const override | llvm::X86InstrInfo | |
| areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1, int64_t &Offset2) const override | llvm::X86InstrInfo | |
| breakPartialRegDependency(MachineBasicBlock::iterator MI, unsigned OpNum, const TargetRegisterInfo *TRI) const override | llvm::X86InstrInfo | |
| canFoldMemoryOperand(const MachineInstr *, ArrayRef< unsigned >) const override | llvm::X86InstrInfo | |
| canInsertSelect(const MachineBasicBlock &, ArrayRef< MachineOperand > Cond, unsigned, unsigned, int &, int &, int &) const override | llvm::X86InstrInfo | |
| classifyLEAReg(MachineInstr *MI, const MachineOperand &Src, unsigned LEAOpcode, bool AllowSP, unsigned &NewSrc, bool &isKill, bool &isUndef, MachineOperand &ImplicitOp) const | llvm::X86InstrInfo | |
| commuteInstruction(MachineInstr *MI, bool NewMI) const override | llvm::X86InstrInfo | |
| convertToThreeAddress(MachineFunction::iterator &MFI, MachineBasicBlock::iterator &MBBI, LiveVariables *LV) const override | llvm::X86InstrInfo | |
| copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const override | llvm::X86InstrInfo | |
| expandPostRAPseudo(MachineBasicBlock::iterator MI) const override | llvm::X86InstrInfo | |
| findCommutedOpIndices(MachineInstr *MI, unsigned &SrcOpIdx1, unsigned &SrcOpIdx2) const override | llvm::X86InstrInfo | |
| foldMemoryOperandImpl(MachineFunction &MF, MachineInstr *MI, ArrayRef< unsigned > Ops, MachineBasicBlock::iterator InsertPt, int FrameIndex) const override | llvm::X86InstrInfo | |
| foldMemoryOperandImpl(MachineFunction &MF, MachineInstr *MI, ArrayRef< unsigned > Ops, MachineBasicBlock::iterator InsertPt, MachineInstr *LoadMI) const override | llvm::X86InstrInfo | |
| foldMemoryOperandImpl(MachineFunction &MF, MachineInstr *MI, unsigned OpNum, ArrayRef< MachineOperand > MOs, MachineBasicBlock::iterator InsertPt, unsigned Size, unsigned Alignment, bool AllowCommute) const | llvm::X86InstrInfo | |
| genAlternativeCodeSequence(MachineInstr &Root, MachineCombinerPattern::MC_PATTERN P, SmallVectorImpl< MachineInstr * > &InsInstrs, SmallVectorImpl< MachineInstr * > &DelInstrs, DenseMap< unsigned, unsigned > &InstrIdxForVirtReg) const override | llvm::X86InstrInfo | |
| getExecutionDomain(const MachineInstr *MI) const override | llvm::X86InstrInfo | |
| getGlobalBaseReg(MachineFunction *MF) const | llvm::X86InstrInfo | |
| getJumpInstrTableEntryBound() const override | llvm::X86InstrInfo | |
| getMachineCombinerPatterns(MachineInstr &Root, SmallVectorImpl< MachineCombinerPattern::MC_PATTERN > &P) const override | llvm::X86InstrInfo | |
| getMemOpBaseRegImmOfs(MachineInstr *LdSt, unsigned &BaseReg, unsigned &Offset, const TargetRegisterInfo *TRI) const override | llvm::X86InstrInfo | |
| getNoopForMachoTarget(MCInst &NopInst) const override | llvm::X86InstrInfo | |
| getOpcodeAfterMemoryUnfold(unsigned Opc, bool UnfoldLoad, bool UnfoldStore, unsigned *LoadRegIndex=nullptr) const override | llvm::X86InstrInfo | |
| getPartialRegUpdateClearance(const MachineInstr *MI, unsigned OpNum, const TargetRegisterInfo *TRI) const override | llvm::X86InstrInfo | |
| getRegisterInfo() const | llvm::X86InstrInfo | inline |
| getSPAdjust(const MachineInstr *MI) const override | llvm::X86InstrInfo | |
| getTrap(MCInst &MI) const override | llvm::X86InstrInfo | |
| getUnconditionalBranch(MCInst &Branch, const MCSymbolRefExpr *BranchTarget) const override | llvm::X86InstrInfo | |
| getUndefRegClearance(const MachineInstr *MI, unsigned &OpNum, const TargetRegisterInfo *TRI) const override | llvm::X86InstrInfo | |
| hasHighOperandLatency(const TargetSchedModel &SchedModel, const MachineRegisterInfo *MRI, const MachineInstr *DefMI, unsigned DefIdx, const MachineInstr *UseMI, unsigned UseIdx) const override | llvm::X86InstrInfo | |
| InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, DebugLoc DL) const override | llvm::X86InstrInfo | |
| insertSelect(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, DebugLoc DL, unsigned DstReg, ArrayRef< MachineOperand > Cond, unsigned TrueReg, unsigned FalseReg) const override | llvm::X86InstrInfo | |
| isCoalescableExtInstr(const MachineInstr &MI, unsigned &SrcReg, unsigned &DstReg, unsigned &SubIdx) const override | llvm::X86InstrInfo | |
| isHighLatencyDef(int opc) const override | llvm::X86InstrInfo | |
| isLoadFromStackSlot(const MachineInstr *MI, int &FrameIndex) const override | llvm::X86InstrInfo | |
| isLoadFromStackSlotPostFE(const MachineInstr *MI, int &FrameIndex) const override | llvm::X86InstrInfo | |
| isReallyTriviallyReMaterializable(const MachineInstr *MI, AliasAnalysis *AA) const override | llvm::X86InstrInfo | |
| isSafeToClobberEFLAGS(MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const | llvm::X86InstrInfo | |
| isSafeToMoveRegClassDefs(const TargetRegisterClass *RC) const override | llvm::X86InstrInfo | |
| isStoreToStackSlot(const MachineInstr *MI, int &FrameIndex) const override | llvm::X86InstrInfo | |
| isStoreToStackSlotPostFE(const MachineInstr *MI, int &FrameIndex) const override | llvm::X86InstrInfo | |
| isUnpredicatedTerminator(const MachineInstr *MI) const override | llvm::X86InstrInfo | |
| isX86_64ExtendedReg(const MachineOperand &MO) | llvm::X86InstrInfo | inlinestatic |
| loadRegFromAddr(MachineFunction &MF, unsigned DestReg, SmallVectorImpl< MachineOperand > &Addr, const TargetRegisterClass *RC, MachineInstr::mmo_iterator MMOBegin, MachineInstr::mmo_iterator MMOEnd, SmallVectorImpl< MachineInstr * > &NewMIs) const | llvm::X86InstrInfo | |
| loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override | llvm::X86InstrInfo | |
| optimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg, unsigned SrcReg2, int CmpMask, int CmpValue, const MachineRegisterInfo *MRI) const override | llvm::X86InstrInfo | |
| optimizeLoadInstr(MachineInstr *MI, const MachineRegisterInfo *MRI, unsigned &FoldAsLoadDefReg, MachineInstr *&DefMI) const override | llvm::X86InstrInfo | |
| reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, unsigned SubIdx, const MachineInstr *Orig, const TargetRegisterInfo &TRI) const override | llvm::X86InstrInfo | |
| RemoveBranch(MachineBasicBlock &MBB) const override | llvm::X86InstrInfo | |
| ReverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const override | llvm::X86InstrInfo | |
| setExecutionDomain(MachineInstr *MI, unsigned Domain) const override | llvm::X86InstrInfo | |
| shouldScheduleAdjacent(MachineInstr *First, MachineInstr *Second) const override | llvm::X86InstrInfo | |
| shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, int64_t Offset1, int64_t Offset2, unsigned NumLoads) const override | llvm::X86InstrInfo | |
| storeRegToAddr(MachineFunction &MF, unsigned SrcReg, bool isKill, SmallVectorImpl< MachineOperand > &Addr, const TargetRegisterClass *RC, MachineInstr::mmo_iterator MMOBegin, MachineInstr::mmo_iterator MMOEnd, SmallVectorImpl< MachineInstr * > &NewMIs) const | llvm::X86InstrInfo | |
| storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override | llvm::X86InstrInfo | |
| unfoldMemoryOperand(MachineFunction &MF, MachineInstr *MI, unsigned Reg, bool UnfoldLoad, bool UnfoldStore, SmallVectorImpl< MachineInstr * > &NewMIs) const override | llvm::X86InstrInfo | |
| unfoldMemoryOperand(SelectionDAG &DAG, SDNode *N, SmallVectorImpl< SDNode * > &NewNodes) const override | llvm::X86InstrInfo | |
| useMachineCombiner() const override | llvm::X86InstrInfo | inline |
| X86InstrInfo(X86Subtarget &STI) | llvm::X86InstrInfo | explicit |
1.8.6