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LLVM
3.7.0
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ARM_AM - ARM Addressing Mode Stuff. More...
Enumerations | |
| enum | ShiftOpc { no_shift = 0, asr, lsl, lsr, ror, rrx } |
| enum | AddrOpc { sub = 0, add } |
| enum | AMSubMode { bad_am_submode = 0, ia, ib, da, db } |
Functions | |
| static ShiftOpc | getShiftOpcForNode (unsigned Opcode) |
| static const char * | getAddrOpcStr (AddrOpc Op) |
| static const char * | getShiftOpcStr (ShiftOpc Op) |
| static unsigned | getShiftOpcEncoding (ShiftOpc Op) |
| static const char * | getAMSubModeStr (AMSubMode Mode) |
| static unsigned | rotr32 (unsigned Val, unsigned Amt) |
| rotr32 - Rotate a 32-bit unsigned value right by a specified # bits. More... | |
| static unsigned | rotl32 (unsigned Val, unsigned Amt) |
| rotl32 - Rotate a 32-bit unsigned value left by a specified # bits. More... | |
| static unsigned | getSORegOpc (ShiftOpc ShOp, unsigned Imm) |
| static unsigned | getSORegOffset (unsigned Op) |
| static ShiftOpc | getSORegShOp (unsigned Op) |
| static unsigned | getSOImmValImm (unsigned Imm) |
| getSOImmValImm - Given an encoded imm field for the reg/imm form, return the 8-bit imm value. More... | |
| static unsigned | getSOImmValRot (unsigned Imm) |
| getSOImmValRot - Given an encoded imm field for the reg/imm form, return the rotate amount. More... | |
| static unsigned | getSOImmValRotate (unsigned Imm) |
| getSOImmValRotate - Try to handle Imm with an immediate shifter operand, computing the rotate amount to use. More... | |
| static int | getSOImmVal (unsigned Arg) |
| getSOImmVal - Given a 32-bit immediate, if it is something that can fit into an shifter_operand immediate operand, return the 12-bit encoding for it. More... | |
| static bool | isSOImmTwoPartVal (unsigned V) |
| isSOImmTwoPartVal - Return true if the specified value can be obtained by or'ing together two SOImmVal's. More... | |
| static unsigned | getSOImmTwoPartFirst (unsigned V) |
| getSOImmTwoPartFirst - If V is a value that satisfies isSOImmTwoPartVal, return the first chunk of it. More... | |
| static unsigned | getSOImmTwoPartSecond (unsigned V) |
| getSOImmTwoPartSecond - If V is a value that satisfies isSOImmTwoPartVal, return the second chunk of it. More... | |
| static unsigned | getThumbImmValShift (unsigned Imm) |
| getThumbImmValShift - Try to handle Imm with a 8-bit immediate followed by a left shift. More... | |
| static bool | isThumbImmShiftedVal (unsigned V) |
| isThumbImmShiftedVal - Return true if the specified value can be obtained by left shifting a 8-bit immediate. More... | |
| static unsigned | getThumbImm16ValShift (unsigned Imm) |
| getThumbImm16ValShift - Try to handle Imm with a 16-bit immediate followed by a left shift. More... | |
| static bool | isThumbImm16ShiftedVal (unsigned V) |
| isThumbImm16ShiftedVal - Return true if the specified value can be obtained by left shifting a 16-bit immediate. More... | |
| static unsigned | getThumbImmNonShiftedVal (unsigned V) |
| getThumbImmNonShiftedVal - If V is a value that satisfies isThumbImmShiftedVal, return the non-shiftd value. More... | |
| static int | getT2SOImmValSplatVal (unsigned V) |
| getT2SOImmValSplat - Return the 12-bit encoded representation if the specified value can be obtained by splatting the low 8 bits into every other byte or every byte of a 32-bit value. More... | |
| static int | getT2SOImmValRotateVal (unsigned V) |
| getT2SOImmValRotateVal - Return the 12-bit encoded representation if the specified value is a rotated 8-bit value. More... | |
| static int | getT2SOImmVal (unsigned Arg) |
| getT2SOImmVal - Given a 32-bit immediate, if it is something that can fit into a Thumb-2 shifter_operand immediate operand, return the 12-bit encoding for it. More... | |
| static unsigned | getT2SOImmValRotate (unsigned V) |
| static bool | isT2SOImmTwoPartVal (unsigned Imm) |
| static unsigned | getT2SOImmTwoPartFirst (unsigned Imm) |
| static unsigned | getT2SOImmTwoPartSecond (unsigned Imm) |
| static unsigned | getAM2Opc (AddrOpc Opc, unsigned Imm12, ShiftOpc SO, unsigned IdxMode=0) |
| static unsigned | getAM2Offset (unsigned AM2Opc) |
| static AddrOpc | getAM2Op (unsigned AM2Opc) |
| static ShiftOpc | getAM2ShiftOpc (unsigned AM2Opc) |
| static unsigned | getAM2IdxMode (unsigned AM2Opc) |
| static unsigned | getAM3Opc (AddrOpc Opc, unsigned char Offset, unsigned IdxMode=0) |
| getAM3Opc - This function encodes the addrmode3 opc field. More... | |
| static unsigned char | getAM3Offset (unsigned AM3Opc) |
| static AddrOpc | getAM3Op (unsigned AM3Opc) |
| static unsigned | getAM3IdxMode (unsigned AM3Opc) |
| static AMSubMode | getAM4SubMode (unsigned Mode) |
| static unsigned | getAM4ModeImm (AMSubMode SubMode) |
| static unsigned | getAM5Opc (AddrOpc Opc, unsigned char Offset) |
| getAM5Opc - This function encodes the addrmode5 opc field. More... | |
| static unsigned char | getAM5Offset (unsigned AM5Opc) |
| static AddrOpc | getAM5Op (unsigned AM5Opc) |
| static unsigned | createNEONModImm (unsigned OpCmode, unsigned Val) |
| static unsigned | getNEONModImmOpCmode (unsigned ModImm) |
| static unsigned | getNEONModImmVal (unsigned ModImm) |
| static uint64_t | decodeNEONModImm (unsigned ModImm, unsigned &EltBits) |
| decodeNEONModImm - Decode a NEON modified immediate value into the element value and the element size in bits. More... | |
| static bool | isNEONBytesplat (unsigned Value, unsigned Size) |
| static bool | isNEONi16splat (unsigned Value) |
| Checks if Value is a correct immediate for instructions like VBIC/VORR. More... | |
| static unsigned | encodeNEONi16splat (unsigned Value) |
| static bool | isNEONi32splat (unsigned Value) |
| Checks if Value is a correct immediate for instructions like VBIC/VORR. More... | |
| static unsigned | encodeNEONi32splat (unsigned Value) |
| Encode NEON 32 bits Splat immediate for instructions like VBIC/VORR. More... | |
| static float | getFPImmFloat (unsigned Imm) |
| static int | getFP32Imm (const APInt &Imm) |
| getFP32Imm - Return an 8-bit floating-point version of the 32-bit floating-point value. More... | |
| static int | getFP32Imm (const APFloat &FPImm) |
| static int | getFP64Imm (const APInt &Imm) |
| getFP64Imm - Return an 8-bit floating-point version of the 64-bit floating-point value. More... | |
| static int | getFP64Imm (const APFloat &FPImm) |
| Enumerator | |
|---|---|
| sub | |
| add | |
Definition at line 36 of file ARMAddressingModes.h.
| Enumerator | |
|---|---|
| bad_am_submode | |
| ia | |
| ib | |
| da | |
| db | |
Definition at line 66 of file ARMAddressingModes.h.
| Enumerator | |
|---|---|
| no_shift | |
| asr | |
| lsl | |
| lsr | |
| ror | |
| rrx | |
Definition at line 27 of file ARMAddressingModes.h.
Definition at line 528 of file ARMAddressingModes.h.
Referenced by isNEONModifiedImm().
decodeNEONModImm - Decode a NEON modified immediate value into the element value and the element size in bits.
(If the element size is smaller than the vector, it is splatted into all the elements.)
Definition at line 541 of file ARMAddressingModes.h.
References getNEONModImmOpCmode(), getNEONModImmVal(), llvm::X86II::Imm8, and llvm_unreachable.
Referenced by PerformVDUPLANECombine(), and llvm::ARMInstPrinter::printNEONModImmOperand().
Definition at line 598 of file ARMAddressingModes.h.
References isNEONi16splat().
Encode NEON 32 bits Splat immediate for instructions like VBIC/VORR.
Definition at line 614 of file ARMAddressingModes.h.
References isNEONi32splat().
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inlinestatic |
Definition at line 41 of file ARMAddressingModes.h.
References sub.
Referenced by llvm::ARMInstPrinter::printAddrMode2OffsetOperand(), llvm::ARMInstPrinter::printAddrMode3OffsetOperand(), llvm::ARMInstPrinter::printAddrMode5Operand(), llvm::ARMInstPrinter::printAM2PreOrOffsetIndexOp(), and llvm::ARMInstPrinter::printAM3PreOrOffsetIndexOp().
Definition at line 422 of file ARMAddressingModes.h.
Referenced by llvm::ARMInstPrinter::printAddrMode2Operand().
Definition at line 413 of file ARMAddressingModes.h.
Referenced by adjustDefLatency(), llvm::ARMBaseInstrInfo::convertToThreeAddress(), llvm::ARMTargetLowering::EmitInstrWithCustomInserter(), llvm::ARMBaseRegisterInfo::getFrameIndexInstrOffset(), getNumMicroOpsSwiftLdSt(), llvm::ARMBaseInstrInfo::getOperandLatency(), llvm::ARMInstPrinter::printAddrMode2OffsetOperand(), llvm::ARMInstPrinter::printAM2PreOrOffsetIndexOp(), and llvm::rewriteARMFrameIndex().
Definition at line 416 of file ARMAddressingModes.h.
Referenced by adjustDefLatency(), llvm::ARMBaseInstrInfo::convertToThreeAddress(), llvm::ARMTargetLowering::EmitInstrWithCustomInserter(), llvm::ARMBaseRegisterInfo::getFrameIndexInstrOffset(), getNumMicroOpsSwiftLdSt(), llvm::ARMInstPrinter::printAddrMode2OffsetOperand(), llvm::ARMInstPrinter::printAM2PreOrOffsetIndexOp(), and llvm::rewriteARMFrameIndex().
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inlinestatic |
Definition at line 407 of file ARMAddressingModes.h.
References sub.
Referenced by DecodeAddrMode2IdxInstruction(), and DecodeSORegMemOperand().
Definition at line 419 of file ARMAddressingModes.h.
Referenced by adjustDefLatency(), llvm::ARMBaseInstrInfo::convertToThreeAddress(), getNumMicroOpsSwiftLdSt(), llvm::ARMBaseInstrInfo::getOperandLatency(), llvm::ARMInstPrinter::printAddrMode2OffsetOperand(), and llvm::ARMInstPrinter::printAM2PreOrOffsetIndexOp().
Definition at line 453 of file ARMAddressingModes.h.
Referenced by llvm::ARMInstPrinter::printAddrMode3Operand().
Definition at line 447 of file ARMAddressingModes.h.
Referenced by llvm::ARMBaseInstrInfo::convertToThreeAddress(), llvm::ARMBaseRegisterInfo::getFrameIndexInstrOffset(), getMemoryOpOffset(), llvm::ARMInstPrinter::printAddrMode3OffsetOperand(), llvm::ARMInstPrinter::printAM3PreOrOffsetIndexOp(), and llvm::rewriteARMFrameIndex().
Definition at line 450 of file ARMAddressingModes.h.
Referenced by llvm::ARMBaseInstrInfo::convertToThreeAddress(), llvm::ARMBaseRegisterInfo::getFrameIndexInstrOffset(), getMemoryOpOffset(), getNumMicroOpsSwiftLdSt(), llvm::ARMInstPrinter::printAddrMode3OffsetOperand(), llvm::ARMInstPrinter::printAM3PreOrOffsetIndexOp(), and llvm::rewriteARMFrameIndex().
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inlinestatic |
getAM3Opc - This function encodes the addrmode3 opc field.
Definition at line 442 of file ARMAddressingModes.h.
References sub.
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inlinestatic |
Definition at line 476 of file ARMAddressingModes.h.
Definition at line 472 of file ARMAddressingModes.h.
Referenced by llvm::ARMInstPrinter::printLdStmModeOperand().
Definition at line 496 of file ARMAddressingModes.h.
Referenced by llvm::ARMBaseRegisterInfo::getFrameIndexInstrOffset(), getMemoryOpOffset(), llvm::ARMInstPrinter::printAddrMode5Operand(), llvm::rewriteARMFrameIndex(), and llvm::rewriteT2FrameIndex().
Definition at line 499 of file ARMAddressingModes.h.
Referenced by llvm::ARMBaseRegisterInfo::getFrameIndexInstrOffset(), getMemoryOpOffset(), llvm::ARMInstPrinter::printAddrMode5Operand(), llvm::rewriteARMFrameIndex(), and llvm::rewriteT2FrameIndex().
getAM5Opc - This function encodes the addrmode5 opc field.
Definition at line 492 of file ARMAddressingModes.h.
References sub.
Referenced by DecodeAddrMode5Operand(), and DecodeCopMemInstruction().
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inlinestatic |
Definition at line 74 of file ARMAddressingModes.h.
References da, db, ia, ib, and llvm_unreachable.
Referenced by llvm::ARMInstPrinter::printLdStmModeOperand().
getFP32Imm - Return an 8-bit floating-point version of the 32-bit floating-point value.
If the value cannot be represented as an 8-bit floating-point value, then return -1.
Definition at line 656 of file ARMAddressingModes.h.
References llvm::APInt::getSExtValue(), llvm::APInt::getZExtValue(), and llvm::APInt::lshr().
Referenced by getFP32Imm(), and llvm::ARMTargetLowering::isFPImmLegal().
Definition at line 677 of file ARMAddressingModes.h.
References llvm::APFloat::bitcastToAPInt(), and getFP32Imm().
getFP64Imm - Return an 8-bit floating-point version of the 64-bit floating-point value.
If the value cannot be represented as an 8-bit floating-point value, then return -1.
Definition at line 684 of file ARMAddressingModes.h.
References llvm::APInt::getSExtValue(), llvm::APInt::getZExtValue(), and llvm::APInt::lshr().
Referenced by getFP64Imm().
Definition at line 705 of file ARMAddressingModes.h.
References llvm::APFloat::bitcastToAPInt(), and getFP64Imm().
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inlinestatic |
Definition at line 628 of file ARMAddressingModes.h.
Referenced by llvm::ARMInstPrinter::printFPImmOperand().
Definition at line 531 of file ARMAddressingModes.h.
Referenced by decodeNEONModImm().
Definition at line 534 of file ARMAddressingModes.h.
Referenced by decodeNEONModImm().
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inlinestatic |
Definition at line 56 of file ARMAddressingModes.h.
References asr, llvm_unreachable, lsl, lsr, and ror.
Definition at line 23 of file ARMSelectionDAGInfo.h.
References asr, lsl, lsr, no_shift, ror, llvm::ISD::ROTR, llvm::ISD::SHL, llvm::ISD::SRA, and llvm::ISD::SRL.
Referenced by getARMIndexedAddressParts().
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inlinestatic |
Definition at line 45 of file ARMAddressingModes.h.
References asr, llvm_unreachable, lsl, lsr, ror, and rrx.
Referenced by llvm::ARMInstPrinter::printInst(), printRegImmShift(), and llvm::ARMInstPrinter::printSORegRegOperand().
getSOImmTwoPartFirst - If V is a value that satisfies isSOImmTwoPartVal, return the first chunk of it.
Definition at line 201 of file ARMAddressingModes.h.
References getSOImmValRotate(), and rotr32().
Referenced by llvm::ARMBaseInstrInfo::FoldImmediate().
getSOImmTwoPartSecond - If V is a value that satisfies isSOImmTwoPartVal, return the second chunk of it.
Definition at line 207 of file ARMAddressingModes.h.
References getSOImmValRotate(), and rotr32().
Referenced by llvm::ARMBaseInstrInfo::FoldImmediate().
getSOImmVal - Given a 32-bit immediate, if it is something that can fit into an shifter_operand immediate operand, return the 12-bit encoding for it.
If not, return -1.
Definition at line 171 of file ARMAddressingModes.h.
References getSOImmValRotate(), rotl32(), and rotr32().
Referenced by adjustFixupValue(), llvm::ARMBaseInstrInfo::convertToThreeAddress(), llvm::ARMTTIImpl::getIntImmCost(), llvm::ARMTargetLowering::isLegalAddImmediate(), llvm::ARMTargetLowering::isLegalICmpImmediate(), IsSingleInstrConstant(), llvm::LowerARMMachineInstrToMCInst(), llvm::ARMTargetLowering::LowerAsmOperandForConstraint(), llvm::ARMInstPrinter::printModImmOperand(), and llvm::rewriteARMFrameIndex().
getSOImmValImm - Given an encoded imm field for the reg/imm form, return the 8-bit imm value.
Definition at line 124 of file ARMAddressingModes.h.
getSOImmValRot - Given an encoded imm field for the reg/imm form, return the rotate amount.
Definition at line 129 of file ARMAddressingModes.h.
getSOImmValRotate - Try to handle Imm with an immediate shifter operand, computing the rotate amount to use.
If this immediate value cannot be handled with a single shifter-op, determine a good rotate amount that will take a maximal chunk of bits out of the immediate.
Definition at line 137 of file ARMAddressingModes.h.
References llvm::countTrailingZeros(), and rotr32().
Referenced by getSOImmTwoPartFirst(), getSOImmTwoPartSecond(), getSOImmVal(), isSOImmTwoPartVal(), and llvm::rewriteARMFrameIndex().
Definition at line 112 of file ARMAddressingModes.h.
Referenced by llvm::ARMBaseInstrInfo::convertToThreeAddress(), and emitAligningInstructions().
Definition at line 362 of file ARMAddressingModes.h.
References getT2SOImmVal(), getT2SOImmValRotate(), getT2SOImmValSplatVal(), isT2SOImmTwoPartVal(), and rotr32().
Referenced by llvm::ARMBaseInstrInfo::FoldImmediate(), and getT2SOImmTwoPartSecond().
Definition at line 379 of file ARMAddressingModes.h.
References getT2SOImmTwoPartFirst(), and getT2SOImmVal().
Referenced by llvm::ARMBaseInstrInfo::FoldImmediate().
getT2SOImmVal - Given a 32-bit immediate, if it is something that can fit into a Thumb-2 shifter_operand immediate operand, return the 12-bit encoding for it.
If not, return -1. See ARM Reference Manual A6.3.2.
Definition at line 314 of file ARMAddressingModes.h.
References getT2SOImmValRotateVal(), and getT2SOImmValSplatVal().
Referenced by llvm::ARMTTIImpl::getIntImmCost(), getT2SOImmTwoPartFirst(), getT2SOImmTwoPartSecond(), llvm::ARMTargetLowering::isLegalAddImmediate(), llvm::ARMTargetLowering::isLegalICmpImmediate(), isT2SOImmTwoPartVal(), llvm::ARMTargetLowering::LowerAsmOperandForConstraint(), and llvm::rewriteT2FrameIndex().
Definition at line 328 of file ARMAddressingModes.h.
References llvm::countTrailingZeros().
Referenced by getT2SOImmTwoPartFirst(), and isT2SOImmTwoPartVal().
getT2SOImmValRotateVal - Return the 12-bit encoded representation if the specified value is a rotated 8-bit value.
Return -1 if no rotation encoding is possible. See ARM Reference Manual A6.3.2.
Definition at line 298 of file ARMAddressingModes.h.
References llvm::countLeadingZeros(), and rotr32().
Referenced by getT2SOImmVal().
getT2SOImmValSplat - Return the 12-bit encoded representation if the specified value can be obtained by splatting the low 8 bits into every other byte or every byte of a 32-bit value.
i.e., 00000000 00000000 00000000 abcdefgh control = 0 00000000 abcdefgh 00000000 abcdefgh control = 1 abcdefgh 00000000 abcdefgh 00000000 control = 2 abcdefgh abcdefgh abcdefgh abcdefgh control = 3 Return -1 if none of the above apply. See ARM Reference Manual A6.3.2.
Definition at line 270 of file ARMAddressingModes.h.
Referenced by getT2SOImmTwoPartFirst(), getT2SOImmVal(), and isT2SOImmTwoPartVal().
getThumbImm16ValShift - Try to handle Imm with a 16-bit immediate followed by a left shift.
Returns the shift amount to use.
Definition at line 237 of file ARMAddressingModes.h.
References llvm::countTrailingZeros().
Referenced by isThumbImm16ShiftedVal().
getThumbImmNonShiftedVal - If V is a value that satisfies isThumbImmShiftedVal, return the non-shiftd value.
Definition at line 256 of file ARMAddressingModes.h.
References getThumbImmValShift().
getThumbImmValShift - Try to handle Imm with a 8-bit immediate followed by a left shift.
Returns the shift amount to use.
Definition at line 218 of file ARMAddressingModes.h.
References llvm::countTrailingZeros().
Referenced by getThumbImmNonShiftedVal(), and isThumbImmShiftedVal().
Definition at line 579 of file ARMAddressingModes.h.
Referenced by isNEONi16splat(), and isNEONi32splat().
Checks if Value is a correct immediate for instructions like VBIC/VORR.
Definition at line 590 of file ARMAddressingModes.h.
References isNEONBytesplat().
Referenced by encodeNEONi16splat().
Checks if Value is a correct immediate for instructions like VBIC/VORR.
Definition at line 608 of file ARMAddressingModes.h.
References isNEONBytesplat().
Referenced by encodeNEONi32splat().
isSOImmTwoPartVal - Return true if the specified value can be obtained by or'ing together two SOImmVal's.
Definition at line 188 of file ARMAddressingModes.h.
References getSOImmValRotate(), and rotr32().
Referenced by llvm::ARMBaseInstrInfo::FoldImmediate().
Definition at line 335 of file ARMAddressingModes.h.
References getT2SOImmVal(), getT2SOImmValRotate(), getT2SOImmValSplatVal(), and rotr32().
Referenced by llvm::ARMBaseInstrInfo::FoldImmediate(), and getT2SOImmTwoPartFirst().
isThumbImm16ShiftedVal - Return true if the specified value can be obtained by left shifting a 16-bit immediate.
Definition at line 248 of file ARMAddressingModes.h.
References getThumbImm16ValShift().
isThumbImmShiftedVal - Return true if the specified value can be obtained by left shifting a 8-bit immediate.
Definition at line 229 of file ARMAddressingModes.h.
References getThumbImmValShift().
Referenced by llvm::ARMTTIImpl::getIntImmCost(), and llvm::ARMTargetLowering::LowerAsmOperandForConstraint().
rotl32 - Rotate a 32-bit unsigned value left by a specified # bits.
Definition at line 93 of file ARMAddressingModes.h.
Referenced by getSOImmVal().
rotr32 - Rotate a 32-bit unsigned value right by a specified # bits.
Definition at line 86 of file ARMAddressingModes.h.
Referenced by getSOImmTwoPartFirst(), getSOImmTwoPartSecond(), getSOImmVal(), getSOImmValRotate(), getT2SOImmTwoPartFirst(), getT2SOImmValRotateVal(), isSOImmTwoPartVal(), isT2SOImmTwoPartVal(), llvm::ARMInstPrinter::printModImmOperand(), llvm::rewriteARMFrameIndex(), and llvm::rewriteT2FrameIndex().
1.8.6