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LLVM
3.7.0
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#include "Mips.h"#include "MipsRegisterInfo.h"#include "MipsSubtarget.h"#include "llvm/MC/MCContext.h"#include "llvm/MC/MCDisassembler.h"#include "llvm/MC/MCFixedLenDisassembler.h"#include "llvm/MC/MCInst.h"#include "llvm/MC/MCSubtargetInfo.h"#include "llvm/Support/MathExtras.h"#include "llvm/Support/TargetRegistry.h"#include "MipsGenDisassemblerTables.inc"Go to the source code of this file.
Namespaces | |
| llvm | |
| Compute iterated dominance frontiers using a linear time algorithm. | |
Macros | |
| #define | DEBUG_TYPE "mips-disassembler" |
Typedefs | |
| typedef MCDisassembler::DecodeStatus | DecodeStatus |
Functions | |
| static DecodeStatus | DecodeGPR64RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeCPU16RegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeGPRMM16RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeGPRMM16ZeroRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeGPRMM16MovePRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeGPR32RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodePtrRegisterClass (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeDSPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeFGR64RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeFGR32RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeCCRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeFCCRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeFGRCCRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeHWRegsRegisterClass (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeAFGR64RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeACC64DSPRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeHI32DSPRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeLO32DSPRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMSA128BRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMSA128HRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMSA128WRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMSA128DRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMSACtrlRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeCOP0RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeCOP2RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeBranchTarget (MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeJumpTarget (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeBranchTarget21 (MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeBranchTarget26 (MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeBranchTarget7MM (MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeBranchTarget10MM (MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeBranchTargetMM (MCInst &Inst, unsigned Offset, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeJumpTargetMM (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMem (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeCacheOp (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeCacheOpR6 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeCacheOpMM (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeSyncI (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMSA128Mem (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMemMMImm4 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMemMMSPImm5Lsl2 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMemMMGPImm7Lsl2 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMemMMReglistImm4Lsl2 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMemMMImm12 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMemMMImm16 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeFMem (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeFMem2 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeFMem3 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeFMemCop2R6 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeSpecial3LlSc (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeAddiur2Simm7 (MCInst &Inst, unsigned Value, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeUImm6Lsl2 (MCInst &Inst, unsigned Value, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeLiSimm7 (MCInst &Inst, unsigned Value, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeSimm4 (MCInst &Inst, unsigned Value, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeSimm16 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeLSAImm (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeInsSize (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeExtSize (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeSimm19Lsl2 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeSimm18Lsl3 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeSimm9SP (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeANDI16Imm (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeUImm5lsl2 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeSimm23Lsl2 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodeINSVE_DF (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| INSVE_[BHWD] have an implicit operand that the generated decoder doesn't handle. More... | |
| template<typename InsnType > | |
| static DecodeStatus | DecodeAddiGroupBranch (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodeDaddiGroupBranch (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodeBlezlGroupBranch (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodeBgtzlGroupBranch (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodeBgtzGroupBranch (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| template<typename InsnType > | |
| static DecodeStatus | DecodeBlezGroupBranch (MCInst &MI, InsnType insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeRegListOperand (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeRegListOperand16 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMovePRegPair (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static MCDisassembler * | createMipsDisassembler (const Target &T, const MCSubtargetInfo &STI, MCContext &Ctx) |
| static MCDisassembler * | createMipselDisassembler (const Target &T, const MCSubtargetInfo &STI, MCContext &Ctx) |
| void | LLVMInitializeMipsDisassembler () |
| static unsigned | getReg (const void *D, unsigned RC, unsigned RegNo) |
| static DecodeStatus | readInstruction16 (ArrayRef< uint8_t > Bytes, uint64_t Address, uint64_t &Size, uint32_t &Insn, bool IsBigEndian) |
| Read two bytes from the ArrayRef and return 16 bit halfword sorted according to the given endianess. More... | |
| static DecodeStatus | readInstruction32 (ArrayRef< uint8_t > Bytes, uint64_t Address, uint64_t &Size, uint32_t &Insn, bool IsBigEndian, bool IsMicroMips) |
| Read four bytes from the ArrayRef and return 32 bit word sorted according to the given endianess. More... | |
Variables | |
| Target | llvm::TheMipselTarget |
| Target | llvm::TheMipsTarget |
| Target | llvm::TheMips64Target |
| Target | llvm::TheMips64elTarget |
| #define DEBUG_TYPE "mips-disassembler" |
Definition at line 27 of file MipsDisassembler.cpp.
Definition at line 29 of file MipsDisassembler.cpp.
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Definition at line 431 of file MipsDisassembler.cpp.
Referenced by LLVMInitializeMipsDisassembler().
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Definition at line 438 of file MipsDisassembler.cpp.
Referenced by LLVMInitializeMipsDisassembler().
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Definition at line 1476 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), and llvm::MCDisassembler::Success.
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Definition at line 512 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), llvm::MCInst::setOpcode(), llvm::SignExtend64(), and llvm::MCDisassembler::Success.
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Definition at line 1671 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
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Definition at line 1463 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), and llvm::MCDisassembler::Success.
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Definition at line 1774 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
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Definition at line 677 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), llvm::MCInst::setOpcode(), llvm::SignExtend64(), and llvm::MCDisassembler::Success.
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Definition at line 633 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), llvm::MCInst::setOpcode(), llvm::SignExtend64(), and llvm::MCDisassembler::Success.
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Definition at line 726 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), llvm::MCInst::setOpcode(), llvm::SignExtend64(), and llvm::MCDisassembler::Success.
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Definition at line 590 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), llvm::MCInst::setOpcode(), llvm::SignExtend64(), and llvm::MCDisassembler::Success.
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Definition at line 1596 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
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Definition at line 1644 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
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Definition at line 1615 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
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Definition at line 1625 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
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Definition at line 1635 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
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Definition at line 1653 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
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Definition at line 1094 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), Hint(), and llvm::MCDisassembler::Success.
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Definition at line 1111 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), Hint(), and llvm::MCDisassembler::Success.
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Definition at line 1128 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), Hint(), and llvm::MCDisassembler::Success.
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Definition at line 1038 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), and llvm::MCDisassembler::Success.
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Definition at line 1572 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), and llvm::MCDisassembler::Success.
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Definition at line 1584 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), and llvm::MCDisassembler::Success.
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Definition at line 931 of file MipsDisassembler.cpp.
References llvm::MCDisassembler::Fail.
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Definition at line 551 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), llvm::MCInst::setOpcode(), llvm::SignExtend64(), and llvm::MCDisassembler::Success.
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Definition at line 1007 of file MipsDisassembler.cpp.
References DecodeGPR32RegisterClass().
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Definition at line 1739 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
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Definition at line 1049 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), and llvm::MCDisassembler::Success.
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Definition at line 1026 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), and llvm::MCDisassembler::Success.
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Definition at line 1014 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), and llvm::MCDisassembler::Success.
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Definition at line 1060 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), and llvm::MCDisassembler::Success.
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Definition at line 1359 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), and llvm::MCDisassembler::Success.
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Definition at line 1377 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), and llvm::MCDisassembler::Success.
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Definition at line 1395 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), and llvm::MCDisassembler::Success.
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Definition at line 1413 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), and llvm::MCDisassembler::Success.
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Definition at line 986 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), and llvm::MCDisassembler::Success.
Referenced by DecodeDSPRRegisterClass(), and DecodePtrRegisterClass().
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Definition at line 940 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), and llvm::MCDisassembler::Success.
Referenced by DecodePtrRegisterClass().
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Definition at line 975 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), and llvm::MCDisassembler::Success.
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Definition at line 953 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), and llvm::MCDisassembler::Success.
Referenced by DecodeMemMMImm4().
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Definition at line 964 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), and llvm::MCDisassembler::Success.
Referenced by DecodeMemMMImm4().
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Definition at line 1488 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), and llvm::MCDisassembler::Success.
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Definition at line 1452 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 1728 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::getImm(), llvm::MCInst::getOperand(), and llvm::MCDisassembler::Success.
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INSVE_[BHWD] have an implicit operand that the generated decoder doesn't handle.
Definition at line 466 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeMSA128BRegisterClass(), DecodeMSA128DRegisterClass(), DecodeMSA128HRegisterClass(), DecodeMSA128WRegisterClass(), llvm::MCDisassembler::Fail, llvm_unreachable, and llvm::MCDisassembler::Success.
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Definition at line 1605 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
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Definition at line 1662 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
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Definition at line 1692 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
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Definition at line 1500 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), and llvm::MCDisassembler::Success.
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Definition at line 1719 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
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Definition at line 1071 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::MCInst::getOpcode(), getReg(), llvm::PPCISD::SC, and llvm::MCDisassembler::Success.
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Definition at line 1274 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), and llvm::MCDisassembler::Success.
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Definition at line 1306 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeRegListOperand(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), getReg(), and llvm::MCDisassembler::Success.
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Definition at line 1341 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), and llvm::MCDisassembler::Success.
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Definition at line 1206 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeGPRMM16RegisterClass(), DecodeGPRMM16ZeroRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 1290 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeRegListOperand16(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 1258 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), and llvm::MCDisassembler::Success.
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Definition at line 1828 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 1512 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), and llvm::MCDisassembler::Success.
Referenced by DecodeINSVE_DF().
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Definition at line 1548 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), and llvm::MCDisassembler::Success.
Referenced by DecodeINSVE_DF().
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Definition at line 1524 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), and llvm::MCDisassembler::Success.
Referenced by DecodeINSVE_DF().
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Definition at line 1160 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), getReg(), and llvm::MCDisassembler::Success.
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Definition at line 1536 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), and llvm::MCDisassembler::Success.
Referenced by DecodeINSVE_DF().
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Definition at line 1560 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, getReg(), and llvm::MCDisassembler::Success.
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Definition at line 997 of file MipsDisassembler.cpp.
References DecodeGPR32RegisterClass(), and DecodeGPR64RegisterClass().
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Definition at line 1790 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
Referenced by DecodeMemMMImm12().
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Definition at line 1813 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), and llvm::MCDisassembler::Success.
Referenced by DecodeMemMMReglistImm4Lsl2().
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Definition at line 1711 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
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Definition at line 1754 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
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Definition at line 1748 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
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Definition at line 1873 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
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Definition at line 1703 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
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Definition at line 1760 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
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Definition at line 1430 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::MCInst::getOpcode(), getReg(), and llvm::MCDisassembler::Success.
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Definition at line 1145 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), getReg(), and llvm::MCDisassembler::Success.
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Definition at line 1784 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
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Definition at line 1684 of file MipsDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
Definition at line 459 of file MipsDisassembler.cpp.
References llvm::MCRegisterClass::begin(), and llvm::MCRegisterInfo::getRegClass().
Referenced by AddNodeIDCustom(), llvm::HexagonFrameLowering::assignCalleeSavedSpillSlots(), llvm::PPCInstrInfo::canInsertSelect(), CheckForPhysRegDependency(), llvm::ScheduleDAGSDNodes::computeOperandLatency(), llvm::SelectionDAGBuilder::CopyValueToVirtualRegister(), DecodeACC64DSPRegisterClass(), DecodeAddiGroupBranch(), DecodeAFGR64RegisterClass(), DecodeBgtzGroupBranch(), DecodeBgtzlGroupBranch(), DecodeBlezGroupBranch(), DecodeBlezlGroupBranch(), DecodeCacheOp(), DecodeCacheOpMM(), DecodeCacheOpR6(), DecodeCCRRegisterClass(), DecodeCOP0RegisterClass(), DecodeCOP2RegisterClass(), DecodeDaddiGroupBranch(), DecodeFCCRegisterClass(), DecodeFGR32RegisterClass(), DecodeFGR64RegisterClass(), DecodeFGRCCRegisterClass(), DecodeFMem(), DecodeFMem2(), DecodeFMem3(), DecodeFMemCop2R6(), DecodeGPR32RegisterClass(), DecodeGPR64RegisterClass(), DecodeGPRMM16MovePRegisterClass(), DecodeGPRMM16RegisterClass(), DecodeGPRMM16ZeroRegisterClass(), DecodeHI32DSPRegisterClass(), DecodeLO32DSPRegisterClass(), DecodeMem(), DecodeMemMMGPImm7Lsl2(), DecodeMemMMImm12(), DecodeMemMMImm16(), DecodeMemMMSPImm5Lsl2(), DecodeMSA128BRegisterClass(), DecodeMSA128DRegisterClass(), DecodeMSA128HRegisterClass(), DecodeMSA128Mem(), DecodeMSA128WRegisterClass(), DecodeMSACtrlRegisterClass(), DecodeSpecial3LlSc(), DecodeSyncI(), emitAlignedDPRCS2Restores(), GetCostForDef(), getTruncatedArgReg(), HasNoSignedComparisonUses(), hasOnlyLiveInOpers(), hasOnlyLiveOutUses(), llvm::XCoreInstrInfo::InsertBranch(), llvm::NVPTXInstrInfo::InsertBranch(), llvm::HexagonInstrInfo::InsertBranch(), llvm::PPCInstrInfo::InsertBranch(), llvm::AArch64InstrInfo::insertSelect(), llvm::PPCInstrInfo::insertSelect(), llvm::HexagonTargetLowering::LowerINLINEASM(), MatchingStackOffset(), llvm::ARMBaseInstrInfo::PredicateInstruction(), llvm::R600InstrInfo::PredicateInstruction(), llvm::PPCInstrInfo::PredicateInstruction(), llvm::TargetInstrInfo::PredicateInstruction(), reachedUsesToDefs(), llvm::PPCInstrInfo::ReverseBranchCondition(), llvm::rewriteT2FrameIndex(), llvm::PPCInstrInfo::SubsumesPredicate(), and updateLiveness().
| void LLVMInitializeMipsDisassembler | ( | ) |
Definition at line 445 of file MipsDisassembler.cpp.
References createMipsDisassembler(), createMipselDisassembler(), llvm::TargetRegistry::RegisterMCDisassembler(), llvm::TheMips64elTarget, llvm::TheMips64Target, llvm::TheMipselTarget, and llvm::TheMipsTarget.
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Read two bytes from the ArrayRef and return 16 bit halfword sorted according to the given endianess.
Definition at line 769 of file MipsDisassembler.cpp.
References llvm::MCDisassembler::Fail, llvm::ArrayRef< T >::size(), and llvm::MCDisassembler::Success.
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Read four bytes from the ArrayRef and return 32 bit word sorted according to the given endianess.
Definition at line 789 of file MipsDisassembler.cpp.
References llvm::MCDisassembler::Fail, llvm::ArrayRef< T >::size(), and llvm::MCDisassembler::Success.
1.8.6