15 #ifndef LLVM_CODEGEN_PASSES_H
16 #define LLVM_CODEGEN_PASSES_H
25 class MachineFunctionPass;
28 class ScheduleDAGInstrs;
30 class TargetLoweringBase;
31 class TargetRegisterClass;
33 struct MachineSchedContext;
70 assert(!IsInstance &&
"Not a Pass ID");
74 assert(IsInstance &&
"Not a Pass Instance");
108 bool AddingMachinePasses;
136 template<
typename TMC> TMC &
getTM()
const {
137 return *
static_cast<TMC*
>(
TM);
158 assert(!StartBefore &&
"Start after and start before passes are given");
159 this->StartBefore = StartBefore;
160 this->StartAfter = StartAfter;
161 this->StopAfter = StopAfter;
162 Started = (StartAfter ==
nullptr) && (StartBefore ==
nullptr);
248 void setOpt(
bool &Opt,
bool Val);
338 bool printAfter =
true);
347 void addPass(
Pass *
P,
bool verifyAfter =
true,
bool printAfter =
true);
381 MachineFunctionPass *
383 const std::string &Banner =
"");
657 #define INITIALIZE_TM_PASS_BEGIN INITIALIZE_PASS_BEGIN
661 #define INITIALIZE_TM_PASS_END(passName, arg, name, cfg, analysis) \
662 PassInfo *PI = new PassInfo(name, arg, & passName ::ID, \
663 PassInfo::NormalCtor_t(callDefaultCtor< passName >), cfg, analysis, \
664 PassInfo::TargetMachineCtor_t(callTargetMachineCtor< passName >)); \
665 Registry.registerPass(*PI, true); \
668 void llvm::initialize##passName##Pass(PassRegistry &Registry) { \
669 CALL_ONCE_INITIALIZATION(initialize##passName##PassOnce) \
677 #define INITIALIZE_TM_PASS(passName, arg, name, cfg, analysis) \
678 INITIALIZE_TM_PASS_BEGIN(passName, arg, name, cfg, analysis) \
679 INITIALIZE_TM_PASS_END(passName, arg, name, cfg, analysis)
Pass interface - Implemented by all 'passes'.
char & MachineCombinerID
This pass performs instruction combining using trace metrics to estimate critical-path and resource d...
void enablePass(AnalysisID PassID)
Allow the target to enable a specific standard pass by default.
void setStartStopPasses(AnalysisID StartBefore, AnalysisID StartAfter, AnalysisID StopAfter)
Set the StartAfter, StartBefore and StopAfter passes to allow running only a portion of the normal co...
virtual void addIRPasses()
Add common target configurable passes that perform LLVM IR to IR transforms following machine indepen...
void setDisableVerify(bool Disable)
char & MachineLICMID
MachineLICM - This pass performs LICM on machine instructions.
char & MachineDominatorsID
MachineDominators - This pass is a machine dominators analysis pass.
virtual bool addPreRewrite()
addPreRewrite - Add passes to the optimized register allocation pipeline after register allocation is...
char & RegisterCoalescerID
RegisterCoalescer - This pass merges live ranges to eliminate copies.
char & EarlyIfConverterID
EarlyIfConverter - This pass performs if-conversion on SSA form by inserting cmov instructions...
FunctionPass * createInterleavedAccessPass(const TargetMachine *TM)
InterleavedAccess Pass - This pass identifies and matches interleaved memory accesses to target speci...
FunctionPass * createWinEHPass(const TargetMachine *TM)
createWinEHPass - Prepares personality functions used by MSVC on Windows, in addition to the Itanium ...
char & MachineSchedulerID
MachineScheduler - This pass schedules machine instructions.
char & AtomicExpandID
AtomicExpandID – Lowers atomic operations in terms of either cmpxchg load-linked/store-conditional lo...
char & ProcessImplicitDefsID
ProcessImpicitDefs pass - This pass removes IMPLICIT_DEFs.
virtual void addMachineSSAOptimization()
addMachineSSAOptimization - Add standard passes that optimize machine instructions in SSA form...
char & MachineBlockPlacementStatsID
MachineBlockPlacementStats - This pass collects statistics about the basic block placement using bran...
bool getEnableShrinkWrap() const
Return true if shrink wrapping is enabled.
FunctionPass * createShadowStackGCLoweringPass()
ShadowStackGCLowering - Implements the custom lowering mechanism used by the shadow stack GC...
char & MachineFunctionPrinterPassID
MachineFunctionPrinterPass - This pass prints out MachineInstr's.
virtual void addPreEmitPass()
This pass may be implemented by targets that want to run passes immediately before machine code is em...
Pass * getInstance() const
FunctionPass * createMachineVerifierPass(const std::string &Banner)
createMachineVerifierPass - This pass verifies cenerated machine code instructions for correctness...
void insertPass(AnalysisID TargetPassID, IdentifyingPassPtr InsertedPassID)
Insert InsertedPassID pass after TargetPassID pass.
char & MachineLoopInfoID
MachineLoopInfo - This pass is a loop analysis pass.
TMC & getTM() const
Get the right type of TargetMachine for this target.
FunctionPass * createGCLoweringPass()
GCLowering Pass - Used by gc.root to perform its default lowering operations.
bool getOptimizeRegAlloc() const
Return true if the optimized regalloc pipeline is enabled.
char & StackColoringID
StackSlotColoring - This pass performs stack coloring and merging.
IdentifyingPassPtr(Pass *InstancePtr)
FunctionPass * createAtomicExpandPass(const TargetMachine *TM)
virtual void addPreSched2()
This method may be implemented by targets that want to run passes after prolog-epilog insertion and b...
FunctionPass * createRegAllocPass(bool Optimized)
addMachinePasses helper to create the target-selected or overriden regalloc pass. ...
char & FinalizeMachineBundlesID
FinalizeMachineBundles - This pass finalize machine instruction bundles (created earlier, e.g.
Target-Independent Code Generator Pass Configuration Options.
CodeGenOpt::Level getOptLevel() const
char & UnreachableMachineBlockElimID
UnreachableMachineBlockElimination - This pass removes unreachable machine basic blocks.
virtual void addMachinePasses()
Add the complete, standard set of LLVM CodeGen passes.
IdentifyingPassPtr getPassSubstitution(AnalysisID StandardID) const
Return the pass substituted for StandardID by the target.
char & MachineCSEID
MachineCSE - This pass performs global CSE on machine instructions.
char & StackSlotColoringID
StackSlotColoring - This pass performs stack slot coloring.
virtual void addPreRegAlloc()
This method may be implemented by targets that want to run passes immediately before register allocat...
FunctionPass * createIfConverter(std::function< bool(const Function &)> Ftor)
char & ExpandPostRAPseudosID
ExpandPostRAPseudos - This pass expands pseudo instructions after register allocation.
char & ExpandISelPseudosID
ExpandISelPseudos - This pass expands pseudo-instructions.
char & DeadMachineInstructionElimID
DeadMachineInstructionElim - This pass removes dead machine instructions.
void substitutePass(AnalysisID StandardID, IdentifyingPassPtr TargetID)
Allow the target to override a specific pass without overriding the pass pipeline.
FunctionPass * createUnreachableBlockEliminationPass()
createUnreachableBlockEliminationPass - The LLVM code generator does not work well with unreachable b...
char & LiveIntervalsID
LiveIntervals - This analysis keeps track of the live ranges of virtual and physical registers...
CodeGenOpt::Level getOptLevel() const
Returns the optimization level: None, Less, Default, or Aggressive.
virtual bool addILPOpts()
Add passes that optimize instruction level parallelism for out-of-order targets.
FunctionPass * createGCInfoPrinter(raw_ostream &OS)
Creates a pass to print GC metadata.
FunctionPass * createCodeGenPreparePass(const TargetMachine *TM=nullptr)
createCodeGenPreparePass - Transform the code to expose more pattern matching during instruction sele...
char & PHIEliminationID
PHIElimination - This pass eliminates machine instruction PHI nodes by inserting copy instructions...
char & LiveVariablesID
LiveVariables pass - This pass computes the set of blocks in which each variable is life and sets mac...
virtual FunctionPass * createTargetRegisterAllocator(bool Optimized)
createTargetRegisterAllocator - Create the register allocator pass for this target at the current opt...
virtual bool addGCPasses()
addGCPasses - Add late codegen passes that analyze code for garbage collection.
ModulePass * createForwardControlFlowIntegrityPass()
createForwardControlFlowIntegrityPass - This pass adds control-flow integrity.
static char PostRAMachineLICMID
PostRAMachineLICM - A clone of the LICM pass that runs during late machine optimization after regallo...
void printAndVerify(const std::string &Banner)
printAndVerify - Add a pass to dump then verify the machine function, if those steps are enabled...
void disablePass(AnalysisID PassID)
Allow the target to disable a specific standard pass by default.
char & LiveStacksID
LiveStacks pass. An analysis keeping track of the liveness of stack slots.
virtual void addOptimizedRegAlloc(FunctionPass *RegAllocPass)
addOptimizedRegAlloc - Add passes related to register allocation.
void setEnableTailMerge(bool Enable)
virtual void addMachineLateOptimization()
Add passes that optimize machine instructions after register allocation.
FunctionPass * createUnpackMachineBundles(std::function< bool(const Function &)> Ftor)
virtual bool addInstSelector()
addInstSelector - This method should install an instruction selector pass, which converts from LLVM c...
FunctionPass * createDefaultPBQPRegisterAllocator()
PBQPRegisterAllocation Pass - This pass implements the Partitioned Boolean Quadratic Prograaming (PBQ...
virtual bool addPreISel()
Methods with trivial inline returns are convenient points in the common codegen pass pipeline where t...
bool getEnableTailMerge() const
FunctionPass class - This class is used to implement most global optimizations.
virtual void addISelPrepare()
Add common passes that perform LLVM IR to IR transforms in preparation for instruction selection...
virtual void addCodeGenPrepare()
Add pass to prepare the LLVM IR for code generation.
char & MIRPrintingPassID
MIRPrintingPass - this pass prints out the LLVM IR using the MIR serialization format.
char & UnpackMachineBundlesID
UnpackMachineBundles - This pass unpack machine instruction bundles.
char & MachineCopyPropagationID
MachineCopyPropagation - This pass performs copy propagation on machine instructions.
void addPrintPass(const std::string &Banner)
Add a pass to print the machine function if printing is enabled.
char & ImplicitNullChecksID
ImplicitNullChecks - This pass folds null pointer checks into nearby memory operations.
void addPassesToHandleExceptions()
Add passes to lower exception handling for the code generator.
char & PostRASchedulerID
createPostRAScheduler - This pass performs post register allocation scheduling.
isPodLike - This is a type trait that is used to determine whether a given type can be copied around ...
FunctionPass * createStackProtectorPass(const TargetMachine *TM)
createStackProtectorPass - This pass adds stack protectors to functions.
ImmutablePass class - This class is used to provide information that does not need to be run...
PassManagerBase - An abstract interface to allow code to add passes to a pass manager without having ...
char & StackMapLivenessID
StackMapLiveness - This pass analyses the register live-out set of stackmap/patchpoint intrinsics and...
FunctionPass * createExecutionDependencyFixPass(const TargetRegisterClass *RC)
createExecutionDependencyFixPass - This pass fixes execution time problems with dependent instruction...
char & TailDuplicateID
TailDuplicate - Duplicate blocks with unconditional branches into tails of their predecessors.
char & MachineSinkingID
MachineSinking - This pass performs sinking on machine instructions.
FunctionPass * createBasicRegisterAllocator()
BasicRegisterAllocation Pass - This pass implements a degenerate global register allocator using the ...
~TargetPassConfig() override
MachineFunctionPass * createMachineFunctionPrinterPass(raw_ostream &OS, const std::string &Banner="")
MachineFunctionPrinter pass - This pass prints out the machine function to the given stream as a debu...
char & MachineTraceMetricsID
MachineTraceMetrics - This pass computes critical path and CPU resource usage in an ensemble of trace...
char & OptimizePHIsID
OptimizePHIs - This pass optimizes machine instruction PHIs to take advantage of opportunities create...
char & MachineDominanceFrontierID
MachineDominanaceFrontier - This pass is a machine dominators analysis pass.
virtual void addPostRegAlloc()
This method may be implemented by targets that want to run passes after register allocation pass pipe...
char & PeepholeOptimizerID
PeepholeOptimizer - This pass performs peephole optimizations - like extension and comparison elimina...
Discriminated union of Pass ID types.
bool EnableShrinkWrap
Default setting for -enable-shrink-wrap on this target.
virtual void addFastRegAlloc(FunctionPass *RegAllocPass)
addFastRegAlloc - Add the minimum set of target-independent passes that are required for fast registe...
char & PrologEpilogCodeInserterID
PrologEpilogCodeInserter - This pass inserts prolog and epilog code, and eliminates abstract frame re...
virtual ScheduleDAGInstrs * createPostMachineScheduler(MachineSchedContext *C) const
Similar to createMachineScheduler but used when postRA machine scheduling is enabled.
ScheduleDAGInstrs - A ScheduleDAG subclass for scheduling lists of MachineInstrs. ...
char & GCMachineCodeAnalysisID
GCMachineCodeAnalysis - Target-independent pass to mark safe points in machine code.
char & PostMachineSchedulerID
PostMachineScheduler - This pass schedules machine instructions postRA.
AnalysisID addPass(AnalysisID PassID, bool verifyAfter=true, bool printAfter=true)
Utilities for targets to add passes to the pass manager.
FunctionPass * createDwarfEHPass(const TargetMachine *TM)
createDwarfEHPass - This pass mulches exception handling code into a form adapted to code generation...
char & IfConverterID
IfConverter - This pass performs machine code if conversion.
virtual void addBlockPlacement()
Add standard basic block placement passes.
FunctionPass * createGreedyRegisterAllocator()
Greedy register allocation pass - This pass implements a global register allocator for optimized buil...
MachineSchedContext provides enough context from the MachineScheduler pass for the target to instanti...
char & MachineBlockPlacementID
MachineBlockPlacement - This pass places basic blocks based on branch probabilities.
char & SpillPlacementID
SpillPlacement analysis.
void setOpt(bool &Opt, bool Val)
char & EdgeBundlesID
EdgeBundles analysis - Bundle machine CFG edges.
char & TwoAddressInstructionPassID
TwoAddressInstruction - This pass reduces two-address instructions to use two operands.
void addVerifyPass(const std::string &Banner)
Add a pass to perform basic verification of the machine function if verification is enabled...
FunctionPass * createSjLjEHPreparePass()
createSjLjEHPreparePass - This pass adapts exception handling code to use the GCC-style builtin setjm...
static char EarlyTailDuplicateID
Pseudo Pass IDs.
FunctionPass * createFastRegisterAllocator()
FastRegisterAllocation Pass - This pass register allocates as fast as possible.
IdentifyingPassPtr(AnalysisID IDPtr)
char & VirtRegRewriterID
VirtRegRewriter pass.
char & BranchFolderPassID
BranchFolding - This pass performs machine code CFG based optimizations to delete branches to branche...
Primary interface to the complete machine description for the target machine.
print Print MemDeps of function
char & ShrinkWrapID
ShrinkWrap pass. Look for the best place to insert save and restore.
bool usingDefaultRegAlloc() const
Return true if the default global register allocator is in use and has not be overriden on the comman...
char & LocalStackSlotAllocationID
LocalStackSlotAllocation - This pass assigns local frame indices to stack slots relative to one anoth...
MachineFunctionPass * createPrintMIRPass(raw_ostream &OS)
MIRPrinting pass - this pass prints out the LLVM IR into the given stream using the MIR serialization...
bool EnableTailMerge
Default setting for -enable-tail-merge on this target.
ModulePass * createJumpInstrTablesPass()
createJumpInstrTables - This pass creates jump-instruction tables.