LLVM  3.7.0
R600ISelLowering.h
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1 //===-- R600ISelLowering.h - R600 DAG Lowering Interface -*- C++ -*--------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 /// \file
11 /// \brief R600 DAG Lowering interface definition
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #ifndef LLVM_LIB_TARGET_R600_R600ISELLOWERING_H
16 #define LLVM_LIB_TARGET_R600_R600ISELLOWERING_H
17 
18 #include "AMDGPUISelLowering.h"
19 
20 namespace llvm {
21 
22 class R600InstrInfo;
23 
25 public:
28  MachineBasicBlock * BB) const override;
29  SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
30  SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
31  void ReplaceNodeResults(SDNode * N,
32  SmallVectorImpl<SDValue> &Results,
33  SelectionDAG &DAG) const override;
35  SDValue Chain,
36  CallingConv::ID CallConv,
37  bool isVarArg,
39  SDLoc DL, SelectionDAG &DAG,
40  SmallVectorImpl<SDValue> &InVals) const override;
42  EVT VT) const override;
43 
44 private:
45  unsigned Gen;
46  /// Each OpenCL kernel has nine implicit parameters that are stored in the
47  /// first nine dwords of a Vertex Buffer. These implicit parameters are
48  /// lowered to load instructions which retrieve the values from the Vertex
49  /// Buffer.
50  SDValue LowerImplicitParameter(SelectionDAG &DAG, EVT VT,
51  SDLoc DL, unsigned DwordOffset) const;
52 
53  void lowerImplicitParameter(MachineInstr *MI, MachineBasicBlock &BB,
54  MachineRegisterInfo & MRI, unsigned dword_offset) const;
55  SDValue OptimizeSwizzle(SDValue BuildVector, SDValue Swz[], SelectionDAG &DAG,
56  SDLoc DL) const;
57  SDValue vectorToVerticalVector(SelectionDAG &DAG, SDValue Vector) const;
58 
59  SDValue LowerEXTRACT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const;
60  SDValue LowerINSERT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const;
61  SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
62  SDValue LowerSTORE(SDValue Op, SelectionDAG &DAG) const;
63  SDValue LowerFPTOUINT(SDValue Op, SelectionDAG &DAG) const;
64  SDValue LowerLOAD(SDValue Op, SelectionDAG &DAG) const;
65  SDValue LowerBRCOND(SDValue Op, SelectionDAG &DAG) const;
66  SDValue LowerTrig(SDValue Op, SelectionDAG &DAG) const;
67  SDValue LowerSHLParts(SDValue Op, SelectionDAG &DAG) const;
68  SDValue LowerSRXParts(SDValue Op, SelectionDAG &DAG) const;
69  SDValue LowerUADDSUBO(SDValue Op, SelectionDAG &DAG,
70  unsigned mainop, unsigned ovf) const;
71 
72  SDValue stackPtrToRegIndex(SDValue Ptr, unsigned StackWidth,
73  SelectionDAG &DAG) const;
74  void getStackAddress(unsigned StackWidth, unsigned ElemIdx,
75  unsigned &Channel, unsigned &PtrIncr) const;
76  bool isZero(SDValue Op) const;
77  SDNode *PostISelFolding(MachineSDNode *N, SelectionDAG &DAG) const override;
78 };
79 
80 } // End namespace llvm;
81 
82 #endif
A parsed version of the target data layout string in and methods for querying it. ...
Definition: DataLayout.h:104
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APInt.h:33
R600TargetLowering(TargetMachine &TM, const AMDGPUSubtarget &STI)
SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override
This callback is invoked for operations that are unsupported by the target, which are registered to u...
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:41
EVT - Extended Value Type.
Definition: ValueTypes.h:31
MachineBasicBlock * EmitInstrWithCustomInserter(MachineInstr *MI, MachineBasicBlock *BB) const override
This method should be implemented by targets that mark instructions with the 'usesCustomInserter' fla...
void ReplaceNodeResults(SDNode *N, SmallVectorImpl< SDValue > &Results, SelectionDAG &DAG) const override
This callback is invoked when a node result type is illegal for the target, and the operation was reg...
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
Definition: SelectionDAG.h:179
Interface definition of the TargetLowering class that is common to all AMD GPUs.
SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override
This method will be invoked for all target nodes and for any target-independent nodes that the target...
An SDNode that represents everything that will be needed to construct a MachineInstr.
Wrapper class for IR location info (IR ordering and DebugLoc) to be passed into SDNode creation funct...
Represents one node in the SelectionDAG.
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
Representation of each machine instruction.
Definition: MachineInstr.h:51
#define N
Primary interface to the complete machine description for the target machine.
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation...
EVT getSetCCResultType(const DataLayout &DL, LLVMContext &, EVT VT) const override
Return the ValueType of the result of SETCC operations.
SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl< ISD::InputArg > &Ins, SDLoc DL, SelectionDAG &DAG, SmallVectorImpl< SDValue > &InVals) const override
XXX Only kernel functions are supported, so we can assume for now that every function is a kernel fun...