LLVM  3.7.0
FastISel.h
Go to the documentation of this file.
1 //===-- FastISel.h - Definition of the FastISel class ---*- C++ -*---------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 ///
10 /// \file
11 /// This file defines the FastISel class.
12 ///
13 //===----------------------------------------------------------------------===//
14 
15 #ifndef LLVM_CODEGEN_FASTISEL_H
16 #define LLVM_CODEGEN_FASTISEL_H
17 
18 #include "llvm/ADT/DenseMap.h"
21 #include "llvm/IR/CallingConv.h"
22 #include "llvm/IR/IntrinsicInst.h"
24 
25 namespace llvm {
26 
27 /// \brief This is a fast-path instruction selection class that generates poor
28 /// code and doesn't support illegal types or non-trivial lowering, but runs
29 /// quickly.
30 class FastISel {
31 public:
32  struct ArgListEntry {
34  Type *Ty;
35  bool IsSExt : 1;
36  bool IsZExt : 1;
37  bool IsInReg : 1;
38  bool IsSRet : 1;
39  bool IsNest : 1;
40  bool IsByVal : 1;
41  bool IsInAlloca : 1;
42  bool IsReturned : 1;
43  uint16_t Alignment;
44 
46  : Val(nullptr), Ty(nullptr), IsSExt(false), IsZExt(false),
49 
50  /// \brief Set CallLoweringInfo attribute flags based on a call instruction
51  /// and called function attributes.
52  void setAttributes(ImmutableCallSite *CS, unsigned AttrIdx);
53  };
54  typedef std::vector<ArgListEntry> ArgListTy;
55 
58  bool RetSExt : 1;
59  bool RetZExt : 1;
60  bool IsVarArg : 1;
61  bool IsInReg : 1;
62  bool DoesNotReturn : 1;
64 
65  // \brief IsTailCall Should be modified by implementations of FastLowerCall
66  // that perform tail call conversions.
67  bool IsTailCall;
68 
69  unsigned NumFixedArgs;
71  const Value *Callee;
76  unsigned ResultReg;
77  unsigned NumResultRegs;
78 
80 
86 
88  : RetTy(nullptr), RetSExt(false), RetZExt(false), IsVarArg(false),
90  IsTailCall(false), NumFixedArgs(-1), CallConv(CallingConv::C),
91  Callee(nullptr), Symbol(nullptr), CS(nullptr), Call(nullptr),
93 
95  const Value *Target, ArgListTy &&ArgsList,
97  RetTy = ResultTy;
98  Callee = Target;
99 
101  DoesNotReturn = Call.doesNotReturn();
102  IsVarArg = FuncTy->isVarArg();
106 
107  CallConv = Call.getCallingConv();
108  Args = std::move(ArgsList);
109  NumFixedArgs = FuncTy->getNumParams();
110 
111  CS = &Call;
112 
113  return *this;
114  }
115 
117  MCSymbol *Target, ArgListTy &&ArgsList,
119  unsigned FixedArgs = ~0U) {
120  RetTy = ResultTy;
121  Callee = Call.getCalledValue();
122  Symbol = Target;
123 
125  DoesNotReturn = Call.doesNotReturn();
126  IsVarArg = FuncTy->isVarArg();
130 
131  CallConv = Call.getCallingConv();
132  Args = std::move(ArgsList);
133  NumFixedArgs = (FixedArgs == ~0U) ? FuncTy->getNumParams() : FixedArgs;
134 
135  CS = &Call;
136 
137  return *this;
138  }
139 
141  const Value *Target, ArgListTy &&ArgsList,
142  unsigned FixedArgs = ~0U) {
143  RetTy = ResultTy;
144  Callee = Target;
145  CallConv = CC;
146  Args = std::move(ArgsList);
147  NumFixedArgs = (FixedArgs == ~0U) ? Args.size() : FixedArgs;
148  return *this;
149  }
150 
152  CallingConv::ID CC, Type *ResultTy,
153  const char *Target, ArgListTy &&ArgsList,
154  unsigned FixedArgs = ~0U);
155 
157  MCSymbol *Target, ArgListTy &&ArgsList,
158  unsigned FixedArgs = ~0U) {
159  RetTy = ResultTy;
160  Symbol = Target;
161  CallConv = CC;
162  Args = std::move(ArgsList);
163  NumFixedArgs = (FixedArgs == ~0U) ? Args.size() : FixedArgs;
164  return *this;
165  }
166 
168  IsTailCall = Value;
169  return *this;
170  }
171 
174  return *this;
175  }
176 
177  ArgListTy &getArgs() { return Args; }
178 
179  void clearOuts() {
180  OutVals.clear();
181  OutFlags.clear();
182  OutRegs.clear();
183  }
184 
185  void clearIns() {
186  Ins.clear();
187  InRegs.clear();
188  }
189  };
190 
191 protected:
200  const DataLayout &DL;
206 
207  /// \brief The position of the last instruction for materializing constants
208  /// for use in the current block. It resets to EmitStartPt when it makes sense
209  /// (for example, it's usually profitable to avoid function calls between the
210  /// definition and the use)
212 
213  /// \brief The top most instruction in the current block that is allowed for
214  /// emitting local variables. LastLocalValue resets to EmitStartPt when it
215  /// makes sense (for example, on function calls)
217 
218 public:
219  /// \brief Return the position of the last instruction emitted for
220  /// materializing constants for use in the current block.
222 
223  /// \brief Update the position of the last instruction emitted for
224  /// materializing constants for use in the current block.
226  EmitStartPt = I;
227  LastLocalValue = I;
228  }
229 
230  /// \brief Set the current block to which generated machine instructions will
231  /// be appended, and clear the local CSE map.
232  void startNewBlock();
233 
234  /// \brief Return current debug location information.
235  DebugLoc getCurDebugLoc() const { return DbgLoc; }
236 
237  /// \brief Do "fast" instruction selection for function arguments and append
238  /// the machine instructions to the current block. Returns true when
239  /// successful.
240  bool lowerArguments();
241 
242  /// \brief Do "fast" instruction selection for the given LLVM IR instruction
243  /// and append the generated machine instructions to the current block.
244  /// Returns true if selection was successful.
245  bool selectInstruction(const Instruction *I);
246 
247  /// \brief Do "fast" instruction selection for the given LLVM IR operator
248  /// (Instruction or ConstantExpr), and append generated machine instructions
249  /// to the current block. Return true if selection was successful.
250  bool selectOperator(const User *I, unsigned Opcode);
251 
252  /// \brief Create a virtual register and arrange for it to be assigned the
253  /// value for the given LLVM value.
254  unsigned getRegForValue(const Value *V);
255 
256  /// \brief Look up the value to see if its value is already cached in a
257  /// register. It may be defined by instructions across blocks or defined
258  /// locally.
259  unsigned lookUpRegForValue(const Value *V);
260 
261  /// \brief This is a wrapper around getRegForValue that also takes care of
262  /// truncating or sign-extending the given getelementptr index value.
263  std::pair<unsigned, bool> getRegForGEPIndex(const Value *V);
264 
265  /// \brief We're checking to see if we can fold \p LI into \p FoldInst. Note
266  /// that we could have a sequence where multiple LLVM IR instructions are
267  /// folded into the same machineinstr. For example we could have:
268  ///
269  /// A: x = load i32 *P
270  /// B: y = icmp A, 42
271  /// C: br y, ...
272  ///
273  /// In this scenario, \p LI is "A", and \p FoldInst is "C". We know about "B"
274  /// (and any other folded instructions) because it is between A and C.
275  ///
276  /// If we succeed folding, return true.
277  bool tryToFoldLoad(const LoadInst *LI, const Instruction *FoldInst);
278 
279  /// \brief The specified machine instr operand is a vreg, and that vreg is
280  /// being provided by the specified load instruction. If possible, try to
281  /// fold the load as an operand to the instruction, returning true if
282  /// possible.
283  ///
284  /// This method should be implemented by targets.
285  virtual bool tryToFoldLoadIntoMI(MachineInstr * /*MI*/, unsigned /*OpNo*/,
286  const LoadInst * /*LI*/) {
287  return false;
288  }
289 
290  /// \brief Reset InsertPt to prepare for inserting instructions into the
291  /// current block.
292  void recomputeInsertPt();
293 
294  /// \brief Remove all dead instructions between the I and E.
297 
298  struct SavePoint {
301  };
302 
303  /// \brief Prepare InsertPt to begin inserting instructions into the local
304  /// value area and return the old insert position.
306 
307  /// \brief Reset InsertPt to the given old insert position.
308  void leaveLocalValueArea(SavePoint Old);
309 
310  virtual ~FastISel();
311 
312 protected:
314  const TargetLibraryInfo *LibInfo,
315  bool SkipTargetIndependentISel = false);
316 
317  /// \brief This method is called by target-independent code when the normal
318  /// FastISel process fails to select an instruction. This gives targets a
319  /// chance to emit code for anything that doesn't fit into FastISel's
320  /// framework. It returns true if it was successful.
321  virtual bool fastSelectInstruction(const Instruction *I) = 0;
322 
323  /// \brief This method is called by target-independent code to do target-
324  /// specific argument lowering. It returns true if it was successful.
325  virtual bool fastLowerArguments();
326 
327  /// \brief This method is called by target-independent code to do target-
328  /// specific call lowering. It returns true if it was successful.
329  virtual bool fastLowerCall(CallLoweringInfo &CLI);
330 
331  /// \brief This method is called by target-independent code to do target-
332  /// specific intrinsic lowering. It returns true if it was successful.
333  virtual bool fastLowerIntrinsicCall(const IntrinsicInst *II);
334 
335  /// \brief This method is called by target-independent code to request that an
336  /// instruction with the given type and opcode be emitted.
337  virtual unsigned fastEmit_(MVT VT, MVT RetVT, unsigned Opcode);
338 
339  /// \brief This method is called by target-independent code to request that an
340  /// instruction with the given type, opcode, and register operand be emitted.
341  virtual unsigned fastEmit_r(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0,
342  bool Op0IsKill);
343 
344  /// \brief This method is called by target-independent code to request that an
345  /// instruction with the given type, opcode, and register operands be emitted.
346  virtual unsigned fastEmit_rr(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0,
347  bool Op0IsKill, unsigned Op1, bool Op1IsKill);
348 
349  /// \brief This method is called by target-independent code to request that an
350  /// instruction with the given type, opcode, and register and immediate
351  // operands be emitted.
352  virtual unsigned fastEmit_ri(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0,
353  bool Op0IsKill, uint64_t Imm);
354 
355  /// \brief This method is called by target-independent code to request that an
356  /// instruction with the given type, opcode, and register and floating-point
357  /// immediate operands be emitted.
358  virtual unsigned fastEmit_rf(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0,
359  bool Op0IsKill, const ConstantFP *FPImm);
360 
361  /// \brief This method is called by target-independent code to request that an
362  /// instruction with the given type, opcode, and register and immediate
363  /// operands be emitted.
364  virtual unsigned fastEmit_rri(MVT VT, MVT RetVT, unsigned Opcode,
365  unsigned Op0, bool Op0IsKill, unsigned Op1,
366  bool Op1IsKill, uint64_t Imm);
367 
368  /// \brief This method is a wrapper of fastEmit_ri.
369  ///
370  /// It first tries to emit an instruction with an immediate operand using
371  /// fastEmit_ri. If that fails, it materializes the immediate into a register
372  /// and try fastEmit_rr instead.
373  unsigned fastEmit_ri_(MVT VT, unsigned Opcode, unsigned Op0, bool Op0IsKill,
374  uint64_t Imm, MVT ImmType);
375 
376  /// \brief This method is called by target-independent code to request that an
377  /// instruction with the given type, opcode, and immediate operand be emitted.
378  virtual unsigned fastEmit_i(MVT VT, MVT RetVT, unsigned Opcode, uint64_t Imm);
379 
380  /// \brief This method is called by target-independent code to request that an
381  /// instruction with the given type, opcode, and floating-point immediate
382  /// operand be emitted.
383  virtual unsigned fastEmit_f(MVT VT, MVT RetVT, unsigned Opcode,
384  const ConstantFP *FPImm);
385 
386  /// \brief Emit a MachineInstr with no operands and a result register in the
387  /// given register class.
388  unsigned fastEmitInst_(unsigned MachineInstOpcode,
389  const TargetRegisterClass *RC);
390 
391  /// \brief Emit a MachineInstr with one register operand and a result register
392  /// in the given register class.
393  unsigned fastEmitInst_r(unsigned MachineInstOpcode,
394  const TargetRegisterClass *RC, unsigned Op0,
395  bool Op0IsKill);
396 
397  /// \brief Emit a MachineInstr with two register operands and a result
398  /// register in the given register class.
399  unsigned fastEmitInst_rr(unsigned MachineInstOpcode,
400  const TargetRegisterClass *RC, unsigned Op0,
401  bool Op0IsKill, unsigned Op1, bool Op1IsKill);
402 
403  /// \brief Emit a MachineInstr with three register operands and a result
404  /// register in the given register class.
405  unsigned fastEmitInst_rrr(unsigned MachineInstOpcode,
406  const TargetRegisterClass *RC, unsigned Op0,
407  bool Op0IsKill, unsigned Op1, bool Op1IsKill,
408  unsigned Op2, bool Op2IsKill);
409 
410  /// \brief Emit a MachineInstr with a register operand, an immediate, and a
411  /// result register in the given register class.
412  unsigned fastEmitInst_ri(unsigned MachineInstOpcode,
413  const TargetRegisterClass *RC, unsigned Op0,
414  bool Op0IsKill, uint64_t Imm);
415 
416  /// \brief Emit a MachineInstr with one register operand and two immediate
417  /// operands.
418  unsigned fastEmitInst_rii(unsigned MachineInstOpcode,
419  const TargetRegisterClass *RC, unsigned Op0,
420  bool Op0IsKill, uint64_t Imm1, uint64_t Imm2);
421 
422  /// \brief Emit a MachineInstr with two register operands and a result
423  /// register in the given register class.
424  unsigned fastEmitInst_rf(unsigned MachineInstOpcode,
425  const TargetRegisterClass *RC, unsigned Op0,
426  bool Op0IsKill, const ConstantFP *FPImm);
427 
428  /// \brief Emit a MachineInstr with two register operands, an immediate, and a
429  /// result register in the given register class.
430  unsigned fastEmitInst_rri(unsigned MachineInstOpcode,
431  const TargetRegisterClass *RC, unsigned Op0,
432  bool Op0IsKill, unsigned Op1, bool Op1IsKill,
433  uint64_t Imm);
434 
435  /// \brief Emit a MachineInstr with two register operands, two immediates
436  /// operands, and a result register in the given register class.
437  unsigned fastEmitInst_rrii(unsigned MachineInstOpcode,
438  const TargetRegisterClass *RC, unsigned Op0,
439  bool Op0IsKill, unsigned Op1, bool Op1IsKill,
440  uint64_t Imm1, uint64_t Imm2);
441 
442  /// \brief Emit a MachineInstr with a single immediate operand, and a result
443  /// register in the given register class.
444  unsigned fastEmitInst_i(unsigned MachineInstrOpcode,
445  const TargetRegisterClass *RC, uint64_t Imm);
446 
447  /// \brief Emit a MachineInstr with a two immediate operands.
448  unsigned fastEmitInst_ii(unsigned MachineInstrOpcode,
449  const TargetRegisterClass *RC, uint64_t Imm1,
450  uint64_t Imm2);
451 
452  /// \brief Emit a MachineInstr for an extract_subreg from a specified index of
453  /// a superregister to a specified type.
454  unsigned fastEmitInst_extractsubreg(MVT RetVT, unsigned Op0, bool Op0IsKill,
455  uint32_t Idx);
456 
457  /// \brief Emit MachineInstrs to compute the value of Op with all but the
458  /// least significant bit set to zero.
459  unsigned fastEmitZExtFromI1(MVT VT, unsigned Op0, bool Op0IsKill);
460 
461  /// \brief Emit an unconditional branch to the given block, unless it is the
462  /// immediate (fall-through) successor, and update the CFG.
464 
465  /// \brief Update the value map to include the new mapping for this
466  /// instruction, or insert an extra copy to get the result in a previous
467  /// determined register.
468  ///
469  /// NOTE: This is only necessary because we might select a block that uses a
470  /// value before we select the block that defines the value. It might be
471  /// possible to fix this by selecting blocks in reverse postorder.
472  void updateValueMap(const Value *I, unsigned Reg, unsigned NumRegs = 1);
473 
474  unsigned createResultReg(const TargetRegisterClass *RC);
475 
476  /// \brief Try to constrain Op so that it is usable by argument OpNum of the
477  /// provided MCInstrDesc. If this fails, create a new virtual register in the
478  /// correct class and COPY the value there.
479  unsigned constrainOperandRegClass(const MCInstrDesc &II, unsigned Op,
480  unsigned OpNum);
481 
482  /// \brief Emit a constant in a register using target-specific logic, such as
483  /// constant pool loads.
484  virtual unsigned fastMaterializeConstant(const Constant *C) { return 0; }
485 
486  /// \brief Emit an alloca address in a register using target-specific logic.
487  virtual unsigned fastMaterializeAlloca(const AllocaInst *C) { return 0; }
488 
489  /// \brief Emit the floating-point constant +0.0 in a register using target-
490  /// specific logic.
491  virtual unsigned fastMaterializeFloatZero(const ConstantFP *CF) {
492  return 0;
493  }
494 
495  /// \brief Check if \c Add is an add that can be safely folded into \c GEP.
496  ///
497  /// \c Add can be folded into \c GEP if:
498  /// - \c Add is an add,
499  /// - \c Add's size matches \c GEP's,
500  /// - \c Add is in the same basic block as \c GEP, and
501  /// - \c Add has a constant operand.
502  bool canFoldAddIntoGEP(const User *GEP, const Value *Add);
503 
504  /// \brief Test whether the given value has exactly one use.
505  bool hasTrivialKill(const Value *V);
506 
507  /// \brief Create a machine mem operand from the given instruction.
509 
511 
512  bool lowerCallTo(const CallInst *CI, MCSymbol *Symbol, unsigned NumArgs);
513  bool lowerCallTo(const CallInst *CI, const char *SymbolName,
514  unsigned NumArgs);
515  bool lowerCallTo(CallLoweringInfo &CLI);
516 
518  switch (II->getIntrinsicID()) {
519  case Intrinsic::sadd_with_overflow:
520  case Intrinsic::uadd_with_overflow:
521  case Intrinsic::smul_with_overflow:
522  case Intrinsic::umul_with_overflow:
523  return true;
524  default:
525  return false;
526  }
527  }
528 
529 
530  bool lowerCall(const CallInst *I);
531  /// \brief Select and emit code for a binary operator instruction, which has
532  /// an opcode which directly corresponds to the given ISD opcode.
533  bool selectBinaryOp(const User *I, unsigned ISDOpcode);
534  bool selectFNeg(const User *I);
535  bool selectGetElementPtr(const User *I);
536  bool selectStackmap(const CallInst *I);
537  bool selectPatchpoint(const CallInst *I);
538  bool selectCall(const User *Call);
539  bool selectIntrinsicCall(const IntrinsicInst *II);
540  bool selectBitCast(const User *I);
541  bool selectCast(const User *I, unsigned Opcode);
542  bool selectExtractValue(const User *I);
543  bool selectInsertValue(const User *I);
544 
545 private:
546  /// \brief Handle PHI nodes in successor blocks.
547  ///
548  /// Emit code to ensure constants are copied into registers when needed.
549  /// Remember the virtual registers that need to be added to the Machine PHI
550  /// nodes as input. We cannot just directly add them, because expansion might
551  /// result in multiple MBB's for one BB. As such, the start of the BB might
552  /// correspond to a different MBB than the end.
553  bool handlePHINodesInSuccessorBlocks(const BasicBlock *LLVMBB);
554 
555  /// \brief Helper for materializeRegForValue to materialize a constant in a
556  /// target-independent way.
557  unsigned materializeConstant(const Value *V, MVT VT);
558 
559  /// \brief Helper for getRegForVale. This function is called when the value
560  /// isn't already available in a register and must be materialized with new
561  /// instructions.
562  unsigned materializeRegForValue(const Value *V, MVT VT);
563 
564  /// \brief Clears LocalValueMap and moves the area for the new local variables
565  /// to the beginning of the block. It helps to avoid spilling cached variables
566  /// across heavy instructions like calls.
567  void flushLocalValueMap();
568 
569  /// \brief Insertion point before trying to select the current instruction.
570  MachineBasicBlock::iterator SavedInsertPt;
571 
572  /// \brief Add a stackmap or patchpoint intrinsic call's live variable
573  /// operands to a stackmap or patchpoint machine instruction.
574  bool addStackMapLiveVars(SmallVectorImpl<MachineOperand> &Ops,
575  const CallInst *CI, unsigned StartIdx);
576  bool lowerCallOperands(const CallInst *CI, unsigned ArgIdx, unsigned NumArgs,
577  const Value *Callee, bool ForceRetVoidTy,
578  CallLoweringInfo &CLI);
579 };
580 
581 } // end namespace llvm
582 
583 #endif
unsigned fastEmitInst_rrr(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, unsigned Op2, bool Op2IsKill)
Emit a MachineInstr with three register operands and a result register in the given register class...
Definition: FastISel.cpp:1792
A parsed version of the target data layout string in and methods for querying it. ...
Definition: DataLayout.h:104
The MachineConstantPool class keeps track of constants referenced by a function which must be spilled...
This class is the base class for the comparison instructions.
Definition: InstrTypes.h:679
unsigned fastEmitInst_rrii(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, uint64_t Imm1, uint64_t Imm2)
Emit a MachineInstr with two register operands, two immediates operands, and a result register in the...
Definition: FastISel.cpp:1915
std::vector< ArgListEntry > ArgListTy
Definition: FastISel.h:54
unsigned fastEmitZExtFromI1(MVT VT, unsigned Op0, bool Op0IsKill)
Emit MachineInstrs to compute the value of Op with all but the least significant bit set to zero...
Definition: FastISel.cpp:1993
MachineConstantPool & MCP
Definition: FastISel.h:197
bool lowerCall(const CallInst *I)
Definition: FastISel.cpp:1007
virtual unsigned fastMaterializeConstant(const Constant *C)
Emit a constant in a register using target-specific logic, such as constant pool loads.
Definition: FastISel.h:484
Sign extended before/after call.
Definition: Attributes.h:105
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:39
Force argument to be passed in register.
Definition: Attributes.h:78
unsigned getNumParams() const
getNumParams - Return the number of fixed parameters this function type requires. ...
Definition: DerivedTypes.h:136
InstrTy * getInstruction() const
Definition: CallSite.h:82
Intrinsic::ID getIntrinsicID() const
getIntrinsicID - Return the intrinsic ID of this intrinsic.
Definition: IntrinsicInst.h:44
CmpInst::Predicate optimizeCmpPredicate(const CmpInst *CI) const
Definition: FastISel.cpp:2188
void fastEmitBranch(MachineBasicBlock *MBB, DebugLoc DL)
Emit an unconditional branch to the given block, unless it is the immediate (fall-through) successor...
Definition: FastISel.cpp:1390
ImmutableCallSite * CS
Definition: FastISel.h:74
bool selectGetElementPtr(const User *I)
Definition: FastISel.cpp:484
void leaveLocalValueArea(SavePoint Old)
Reset InsertPt to the given old insert position.
Definition: FastISel.cpp:373
Describe properties that are true of each instruction in the target description file.
Definition: MCInstrDesc.h:138
virtual unsigned fastEmit_rf(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, bool Op0IsKill, const ConstantFP *FPImm)
This method is called by target-independent code to request that an instruction with the given type...
Definition: FastISel.cpp:1658
bool selectStackmap(const CallInst *I)
Definition: FastISel.cpp:602
CallInst - This class represents a function call, abstracting a target machine's calling convention...
virtual bool tryToFoldLoadIntoMI(MachineInstr *, unsigned, const LoadInst *)
The specified machine instr operand is a vreg, and that vreg is being provided by the specified load ...
Definition: FastISel.h:285
void setAttributes(ImmutableCallSite *CS, unsigned AttrIdx)
Set CallLoweringInfo attribute flags based on a call instruction and called function attributes...
Definition: FastISel.cpp:81
MachineMemOperand * createMachineMemOperandFor(const Instruction *I) const
Create a machine mem operand from the given instruction.
Definition: FastISel.cpp:2143
virtual unsigned fastEmit_(MVT VT, MVT RetVT, unsigned Opcode)
This method is called by target-independent code to request that an instruction with the given type a...
Definition: FastISel.cpp:1631
A debug info location.
Definition: DebugLoc.h:34
SmallVector< unsigned, 4 > InRegs
Definition: FastISel.h:85
LoadInst - an instruction for reading from memory.
Definition: Instructions.h:177
DebugLoc getCurDebugLoc() const
Return current debug location information.
Definition: FastISel.h:235
Hexagon Common GEP
virtual unsigned fastEmit_i(MVT VT, MVT RetVT, unsigned Opcode, uint64_t Imm)
This method is called by target-independent code to request that an instruction with the given type...
Definition: FastISel.cpp:1644
virtual unsigned fastMaterializeFloatZero(const ConstantFP *CF)
Emit the floating-point constant +0.0 in a register using target- specific logic. ...
Definition: FastISel.h:491
virtual bool fastLowerCall(CallLoweringInfo &CLI)
This method is called by target-independent code to do target- specific call lowering.
Definition: FastISel.cpp:1625
bool selectInstruction(const Instruction *I)
Do "fast" instruction selection for the given LLVM IR instruction and append the generated machine in...
Definition: FastISel.cpp:1329
unsigned fastEmitInst_rii(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, uint64_t Imm1, uint64_t Imm2)
Emit a MachineInstr with one register operand and two immediate operands.
Definition: FastISel.cpp:1842
virtual unsigned fastEmit_rri(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, uint64_t Imm)
This method is called by target-independent code to request that an instruction with the given type...
Definition: FastISel.cpp:1664
MachineFunction * MF
Definition: FastISel.h:194
DenseMap< const Value *, unsigned > LocalValueMap
Definition: FastISel.h:192
unsigned fastEmitInst_ri(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, uint64_t Imm)
Emit a MachineInstr with a register operand, an immediate, and a result register in the given registe...
Definition: FastISel.cpp:1820
void setLastLocalValue(MachineInstr *I)
Update the position of the last instruction emitted for materializing constants for use in the curren...
Definition: FastISel.h:225
unsigned fastEmitInst_rri(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, uint64_t Imm)
Emit a MachineInstr with two register operands, an immediate, and a result register in the given regi...
Definition: FastISel.cpp:1889
MachineMemOperand - A description of a memory reference used in the backend.
CallLoweringInfo & setCallee(CallingConv::ID CC, Type *ResultTy, const Value *Target, ArgListTy &&ArgsList, unsigned FixedArgs=~0U)
Definition: FastISel.h:140
unsigned fastEmitInst_i(unsigned MachineInstrOpcode, const TargetRegisterClass *RC, uint64_t Imm)
Emit a MachineInstr with a single immediate operand, and a result register in the given register clas...
Definition: FastISel.cpp:1944
bool canFoldAddIntoGEP(const User *GEP, const Value *Add)
Check if Add is an add that can be safely folded into GEP.
Definition: FastISel.cpp:2126
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APInt.h:33
unsigned fastEmitInst_r(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill)
Emit a MachineInstr with one register operand and a result register in the given register class...
Definition: FastISel.cpp:1747
MachineInstr * EmitStartPt
The top most instruction in the current block that is allowed for emitting local variables.
Definition: FastISel.h:216
Reg
All possible values of the reg field in the ModR/M byte.
bool doesNotReturn() const
Determine if the call cannot return.
Definition: CallSite.h:303
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted...
#define false
Definition: ConvertUTF.c:65
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
const TargetMachine & TM
Definition: FastISel.h:199
bool selectIntrinsicCall(const IntrinsicInst *II)
Definition: FastISel.cpp:1093
bool selectCast(const User *I, unsigned Opcode)
Definition: FastISel.cpp:1247
Context object for machine code objects.
Definition: MCContext.h:48
This is a fast-path instruction selection class that generates poor code and doesn't support illegal ...
Definition: FastISel.h:30
FunctionType - Class to represent function types.
Definition: DerivedTypes.h:96
SmallVector< ISD::InputArg, 4 > Ins
Definition: FastISel.h:84
unsigned constrainOperandRegClass(const MCInstrDesc &II, unsigned Op, unsigned OpNum)
Try to constrain Op so that it is usable by argument OpNum of the provided MCInstrDesc.
Definition: FastISel.cpp:1721
bool selectOperator(const User *I, unsigned Opcode)
Do "fast" instruction selection for the given LLVM IR operator (Instruction or ConstantExpr), and append generated machine instructions to the current block.
Definition: FastISel.cpp:1492
ValTy * getCalledValue() const
getCalledValue - Return the pointer to function that is being called.
Definition: CallSite.h:91
unsigned getRegForValue(const Value *V)
Create a virtual register and arrange for it to be assigned the value for the given LLVM value...
Definition: FastISel.cpp:168
unsigned fastEmitInst_(unsigned MachineInstOpcode, const TargetRegisterClass *RC)
Emit a MachineInstr with no operands and a result register in the given register class.
Definition: FastISel.cpp:1738
bool hasTrivialKill(const Value *V)
Test whether the given value has exactly one use.
Definition: FastISel.cpp:135
MachineInstr * getLastLocalValue()
Return the position of the last instruction emitted for materializing constants for use in the curren...
Definition: FastISel.h:221
unsigned lookUpRegForValue(const Value *V)
Look up the value to see if its value is already cached in a register.
Definition: FastISel.cpp:285
TargetInstrInfo - Interface to description of machine instruction set.
bundle_iterator< MachineInstr, instr_iterator > iterator
#define true
Definition: ConvertUTF.c:66
bool selectInsertValue(const User *I)
virtual ~FastISel()
Definition: FastISel.cpp:1621
CallLoweringInfo & setCallee(Type *ResultTy, FunctionType *FuncTy, const Value *Target, ArgListTy &&ArgsList, ImmutableCallSite &Call)
Definition: FastISel.h:94
MVT - Machine Value Type.
LLVM Basic Block Representation.
Definition: BasicBlock.h:65
CallLoweringInfo & setCallee(CallingConv::ID CC, Type *ResultTy, MCSymbol *Target, ArgListTy &&ArgsList, unsigned FixedArgs=~0U)
Definition: FastISel.h:156
The instances of the Type class are immutable: once they are created, they are never changed...
Definition: Type.h:45
This is an important base class in LLVM.
Definition: Constant.h:41
void removeDeadCode(MachineBasicBlock::iterator I, MachineBasicBlock::iterator E)
Remove all dead instructions between the I and E.
Definition: FastISel.cpp:352
SmallVector< ISD::ArgFlagsTy, 16 > OutFlags
Definition: FastISel.h:82
bundle_iterator - MachineBasicBlock iterator that automatically skips over MIs that are inside bundle...
ConstantFP - Floating Point Values [float, double].
Definition: Constants.h:233
MachineFrameInfo & MFI
Definition: FastISel.h:196
virtual unsigned fastEmit_r(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, bool Op0IsKill)
This method is called by target-independent code to request that an instruction with the given type...
Definition: FastISel.cpp:1633
bool SkipTargetIndependentISel
Definition: FastISel.h:205
bool tryToFoldLoad(const LoadInst *LI, const Instruction *FoldInst)
We're checking to see if we can fold LI into FoldInst.
Definition: FastISel.cpp:2070
bool lowerArguments()
Do "fast" instruction selection for function arguments and append the machine instructions to the cur...
Definition: FastISel.cpp:108
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Definition: InstrTypes.h:697
Zero extended before/after call.
Definition: Attributes.h:119
const TargetRegisterInfo & TRI
Definition: FastISel.h:203
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
bool selectFNeg(const User *I)
Emit an FNeg operation.
Definition: FastISel.cpp:1409
CallLoweringInfo & setTailCall(bool Value=true)
Definition: FastISel.h:167
SmallVector< Value *, 16 > OutVals
Definition: FastISel.h:81
const TargetInstrInfo & TII
Definition: FastISel.h:201
MachineInstr * LastLocalValue
The position of the last instruction for materializing constants for use in the current block...
Definition: FastISel.h:211
void recomputeInsertPt()
Reset InsertPt to prepare for inserting instructions into the current block.
Definition: FastISel.cpp:338
virtual unsigned fastEmit_rr(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill)
This method is called by target-independent code to request that an instruction with the given type...
Definition: FastISel.cpp:1638
bool isCommutativeIntrinsic(IntrinsicInst const *II)
Definition: FastISel.h:517
bool paramHasAttr(unsigned i, Attribute::AttrKind A) const
Return true if the call or the callee has the given attribute.
Definition: CallSite.h:242
virtual unsigned fastEmit_ri(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, bool Op0IsKill, uint64_t Imm)
This method is called by target-independent code to request that an instruction with the given type...
Definition: FastISel.cpp:1653
CallLoweringInfo & setCallee(Type *ResultTy, FunctionType *FuncTy, MCSymbol *Target, ArgListTy &&ArgsList, ImmutableCallSite &Call, unsigned FixedArgs=~0U)
Definition: FastISel.h:116
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:861
Provides information about what library functions are available for the current target.
const TargetLibraryInfo * LibInfo
Definition: FastISel.h:204
unsigned fastEmitInst_rr(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill)
Emit a MachineInstr with two register operands and a result register in the given register class...
Definition: FastISel.cpp:1768
void updateValueMap(const Value *I, unsigned Reg, unsigned NumRegs=1)
Update the value map to include the new mapping for this instruction, or insert an extra copy to get ...
Definition: FastISel.cpp:296
void startNewBlock()
Set the current block to which generated machine instructions will be appended, and clear the local C...
Definition: FastISel.cpp:96
bool selectBitCast(const User *I)
Definition: FastISel.cpp:1280
Target - Wrapper for Target specific information.
virtual unsigned fastEmit_f(MVT VT, MVT RetVT, unsigned Opcode, const ConstantFP *FPImm)
This method is called by target-independent code to request that an instruction with the given type...
Definition: FastISel.cpp:1648
SmallVector< unsigned, 16 > OutRegs
Definition: FastISel.h:83
const DataLayout & DL
Definition: FastISel.h:200
bool selectBinaryOp(const User *I, unsigned ISDOpcode)
Select and emit code for a binary operator instruction, which has an opcode which directly correspond...
Definition: FastISel.cpp:382
DebugLoc DbgLoc
Definition: FastISel.h:198
bool selectCall(const User *Call)
Definition: FastISel.cpp:1047
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
SavePoint enterLocalValueArea()
Prepare InsertPt to begin inserting instructions into the local value area and return the old insert ...
Definition: FastISel.cpp:364
Representation of each machine instruction.
Definition: MachineInstr.h:51
virtual bool fastLowerIntrinsicCall(const IntrinsicInst *II)
This method is called by target-independent code to do target- specific intrinsic lowering...
Definition: FastISel.cpp:1627
bool selectPatchpoint(const CallInst *I)
Definition: FastISel.cpp:714
bool selectExtractValue(const User *I)
Definition: FastISel.cpp:1452
MachineRegisterInfo & MRI
Definition: FastISel.h:195
bool lowerCallTo(const CallInst *CI, MCSymbol *Symbol, unsigned NumArgs)
Definition: FastISel.cpp:876
ImmutableCallSite - establish a view to a call site for examination.
Definition: CallSite.h:418
CallingConv::ID getCallingConv() const
getCallingConv/setCallingConv - get or set the calling convention of the call.
Definition: CallSite.h:212
#define I(x, y, z)
Definition: MD5.cpp:54
unsigned fastEmitInst_rf(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, const ConstantFP *FPImm)
Emit a MachineInstr with two register operands and a result register in the given register class...
Definition: FastISel.cpp:1867
FunctionLoweringInfo - This contains information that is global to a function that is used when lower...
virtual unsigned fastMaterializeAlloca(const AllocaInst *C)
Emit an alloca address in a register using target-specific logic.
Definition: FastISel.h:487
const TargetLowering & TLI
Definition: FastISel.h:202
unsigned createResultReg(const TargetRegisterClass *RC)
Definition: FastISel.cpp:1717
CallLoweringInfo & setIsPatchPoint(bool Value=true)
Definition: FastISel.h:172
unsigned fastEmit_ri_(MVT VT, unsigned Opcode, unsigned Op0, bool Op0IsKill, uint64_t Imm, MVT ImmType)
This method is a wrapper of fastEmit_ri.
Definition: FastISel.cpp:1674
bool isVarArg() const
Definition: DerivedTypes.h:120
unsigned fastEmitInst_ii(unsigned MachineInstrOpcode, const TargetRegisterClass *RC, uint64_t Imm1, uint64_t Imm2)
Emit a MachineInstr with a two immediate operands.
Definition: FastISel.cpp:1960
bool use_empty() const
Definition: Value.h:275
unsigned fastEmitInst_extractsubreg(MVT RetVT, unsigned Op0, bool Op0IsKill, uint32_t Idx)
Emit a MachineInstr for an extract_subreg from a specified index of a superregister to a specified ty...
Definition: FastISel.cpp:1979
MachineBasicBlock::iterator InsertPt
Definition: FastISel.h:299
FastISel(FunctionLoweringInfo &FuncInfo, const TargetLibraryInfo *LibInfo, bool SkipTargetIndependentISel=false)
Definition: FastISel.cpp:1610
virtual bool fastLowerArguments()
This method is called by target-independent code to do target- specific argument lowering.
Definition: FastISel.cpp:1623
LLVM Value Representation.
Definition: Value.h:69
Primary interface to the complete machine description for the target machine.
virtual bool fastSelectInstruction(const Instruction *I)=0
This method is called by target-independent code when the normal FastISel process fails to select an ...
FunctionLoweringInfo & FuncInfo
Definition: FastISel.h:193
IntrinsicInst - A useful wrapper class for inspecting calls to intrinsic functions.
Definition: IntrinsicInst.h:37
This file describes how to lower LLVM code to machine code.
AllocaInst - an instruction to allocate memory on the stack.
Definition: Instructions.h:76
std::pair< unsigned, bool > getRegForGEPIndex(const Value *V)
This is a wrapper around getRegForValue that also takes care of truncating or sign-extending the give...
Definition: FastISel.cpp:315