LLVM  3.7.0
HexagonBitTracker.h
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1 //===--- HexagonBitTracker.h ----------------------------------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 
10 #ifndef HEXAGONBITTRACKER_H
11 #define HEXAGONBITTRACKER_H
12 
13 #include "BitTracker.h"
14 #include "llvm/ADT/DenseMap.h"
15 
16 namespace llvm {
17  class HexagonInstrInfo;
18  class HexagonRegisterInfo;
19 
25 
27  const HexagonInstrInfo &tii, MachineFunction &mf);
28 
29  bool evaluate(const MachineInstr *MI, const CellMapType &Inputs,
30  CellMapType &Outputs) const override;
31  bool evaluate(const MachineInstr *BI, const CellMapType &Inputs,
32  BranchTargetList &Targets, bool &FallsThru) const override;
33 
34  BitTracker::BitMask mask(unsigned Reg, unsigned Sub) const override;
35 
39 
40 private:
41  bool evaluateLoad(const MachineInstr *MI, const CellMapType &Inputs,
42  CellMapType &Outputs) const;
43  bool evaluateFormalCopy(const MachineInstr *MI, const CellMapType &Inputs,
44  CellMapType &Outputs) const;
45 
46  unsigned getNextPhysReg(unsigned PReg, unsigned Width) const;
47  unsigned getVirtRegFor(unsigned PReg) const;
48 
49  // Type of formal parameter extension.
50  struct ExtType {
51  enum { SExt, ZExt };
52  char Type;
53  uint16_t Width;
54  ExtType() : Type(0), Width(0) {}
55  ExtType(char t, uint16_t w) : Type(t), Width(w) {}
56  };
57  // Map VR -> extension type.
58  typedef DenseMap<unsigned, ExtType> RegExtMap;
59  RegExtMap VRX;
60 };
61 
62 } // end namespace llvm
63 
64 #endif
BitTracker::BitMask mask(unsigned Reg, unsigned Sub) const override
MachineFrameInfo & MFI
const HexagonInstrInfo & TII
HexagonEvaluator(const HexagonRegisterInfo &tri, MachineRegisterInfo &mri, const HexagonInstrInfo &tii, MachineFunction &mf)
Reg
All possible values of the reg field in the ModR/M byte.
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted...
The instances of the Type class are immutable: once they are created, they are never changed...
Definition: Type.h:45
MachineFunction & MF
BitTracker::BranchTargetList BranchTargetList
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
Representation of each machine instruction.
Definition: MachineInstr.h:51
BitTracker::RegisterRef RegisterRef
bool evaluate(const MachineInstr *MI, const CellMapType &Inputs, CellMapType &Outputs) const override
BitTracker::CellMapType CellMapType
A vector that has set insertion semantics.
Definition: SetVector.h:37
BitTracker::RegisterCell RegisterCell