LLVM  3.7.0
Public Member Functions | List of all members
llvm::PPCInstrInfo Class Reference

#include <PPCInstrInfo.h>

Inheritance diagram for llvm::PPCInstrInfo:
[legend]
Collaboration diagram for llvm::PPCInstrInfo:
[legend]

Public Member Functions

 PPCInstrInfo (PPCSubtarget &STI)
 
const PPCRegisterInfogetRegisterInfo () const
 getRegisterInfo - TargetInstrInfo is a superset of MRegister info. More...
 
ScheduleHazardRecognizerCreateTargetHazardRecognizer (const TargetSubtargetInfo *STI, const ScheduleDAG *DAG) const override
 CreateTargetHazardRecognizer - Return the hazard recognizer to use for this target when scheduling the DAG. More...
 
ScheduleHazardRecognizerCreateTargetPostRAHazardRecognizer (const InstrItineraryData *II, const ScheduleDAG *DAG) const override
 CreateTargetPostRAHazardRecognizer - Return the postRA hazard recognizer to use for this target when scheduling the DAG. More...
 
unsigned getInstrLatency (const InstrItineraryData *ItinData, const MachineInstr *MI, unsigned *PredCost=nullptr) const override
 
int getOperandLatency (const InstrItineraryData *ItinData, const MachineInstr *DefMI, unsigned DefIdx, const MachineInstr *UseMI, unsigned UseIdx) const override
 
int getOperandLatency (const InstrItineraryData *ItinData, SDNode *DefNode, unsigned DefIdx, SDNode *UseNode, unsigned UseIdx) const override
 
bool hasLowDefLatency (const TargetSchedModel &SchedModel, const MachineInstr *DefMI, unsigned DefIdx) const override
 
bool isCoalescableExtInstr (const MachineInstr &MI, unsigned &SrcReg, unsigned &DstReg, unsigned &SubIdx) const override
 
unsigned isLoadFromStackSlot (const MachineInstr *MI, int &FrameIndex) const override
 
unsigned isStoreToStackSlot (const MachineInstr *MI, int &FrameIndex) const override
 
MachineInstrcommuteInstruction (MachineInstr *MI, bool NewMI) const override
 
bool findCommutedOpIndices (MachineInstr *MI, unsigned &SrcOpIdx1, unsigned &SrcOpIdx2) const override
 
void insertNoop (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const override
 
bool AnalyzeBranch (MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const override
 
unsigned RemoveBranch (MachineBasicBlock &MBB) const override
 
unsigned InsertBranch (MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, DebugLoc DL) const override
 
bool canInsertSelect (const MachineBasicBlock &, ArrayRef< MachineOperand > Cond, unsigned, unsigned, int &, int &, int &) const override
 
void insertSelect (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, DebugLoc DL, unsigned DstReg, ArrayRef< MachineOperand > Cond, unsigned TrueReg, unsigned FalseReg) const override
 
void copyPhysReg (MachineBasicBlock &MBB, MachineBasicBlock::iterator I, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const override
 
void storeRegToStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override
 
void loadRegFromStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override
 
bool ReverseBranchCondition (SmallVectorImpl< MachineOperand > &Cond) const override
 
bool FoldImmediate (MachineInstr *UseMI, MachineInstr *DefMI, unsigned Reg, MachineRegisterInfo *MRI) const override
 
bool isProfitableToIfCvt (MachineBasicBlock &MBB, unsigned NumCycles, unsigned ExtraPredCycles, const BranchProbability &Probability) const override
 
bool isProfitableToIfCvt (MachineBasicBlock &TMBB, unsigned NumT, unsigned ExtraT, MachineBasicBlock &FMBB, unsigned NumF, unsigned ExtraF, const BranchProbability &Probability) const override
 
bool isProfitableToDupForIfCvt (MachineBasicBlock &MBB, unsigned NumCycles, const BranchProbability &Probability) const override
 
bool isProfitableToUnpredicate (MachineBasicBlock &TMBB, MachineBasicBlock &FMBB) const override
 
bool isPredicated (const MachineInstr *MI) const override
 
bool isUnpredicatedTerminator (const MachineInstr *MI) const override
 
bool PredicateInstruction (MachineInstr *MI, ArrayRef< MachineOperand > Pred) const override
 
bool SubsumesPredicate (ArrayRef< MachineOperand > Pred1, ArrayRef< MachineOperand > Pred2) const override
 
bool DefinesPredicate (MachineInstr *MI, std::vector< MachineOperand > &Pred) const override
 
bool isPredicable (MachineInstr *MI) const override
 
bool analyzeCompare (const MachineInstr *MI, unsigned &SrcReg, unsigned &SrcReg2, int &Mask, int &Value) const override
 
bool optimizeCompareInstr (MachineInstr *CmpInstr, unsigned SrcReg, unsigned SrcReg2, int Mask, int Value, const MachineRegisterInfo *MRI) const override
 
unsigned GetInstSizeInBytes (const MachineInstr *MI) const
 GetInstSize - Return the number of bytes of code the specified instruction may be. More...
 
void getNoopForMachoTarget (MCInst &NopInst) const override
 getNoopForMachoTarget - Return the noop instruction to use for a noop. More...
 

Detailed Description

Definition at line 67 of file PPCInstrInfo.h.

Constructor & Destructor Documentation

PPCInstrInfo::PPCInstrInfo ( PPCSubtarget STI)
explicit

Definition at line 67 of file PPCInstrInfo.cpp.

Member Function Documentation

bool PPCInstrInfo::AnalyzeBranch ( MachineBasicBlock MBB,
MachineBasicBlock *&  TBB,
MachineBasicBlock *&  FBB,
SmallVectorImpl< MachineOperand > &  Cond,
bool  AllowModify 
) const
override
bool PPCInstrInfo::analyzeCompare ( const MachineInstr MI,
unsigned SrcReg,
unsigned SrcReg2,
int Mask,
int Value 
) const
override
bool PPCInstrInfo::canInsertSelect ( const MachineBasicBlock MBB,
ArrayRef< MachineOperand Cond,
unsigned  TrueReg,
unsigned  FalseReg,
int CondCycles,
int TrueCycles,
int FalseCycles 
) const
override
MachineInstr * PPCInstrInfo::commuteInstruction ( MachineInstr MI,
bool  NewMI 
) const
override
void PPCInstrInfo::copyPhysReg ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  I,
DebugLoc  DL,
unsigned  DestReg,
unsigned  SrcReg,
bool  KillSrc 
) const
override
ScheduleHazardRecognizer * PPCInstrInfo::CreateTargetHazardRecognizer ( const TargetSubtargetInfo STI,
const ScheduleDAG DAG 
) const
override

CreateTargetHazardRecognizer - Return the hazard recognizer to use for this target when scheduling the DAG.

Definition at line 74 of file PPCInstrInfo.cpp.

References llvm::TargetInstrInfo::CreateTargetHazardRecognizer(), llvm::PPC::DIR_440, llvm::PPC::DIR_A2, llvm::PPC::DIR_E500mc, and llvm::PPC::DIR_E5500.

ScheduleHazardRecognizer * PPCInstrInfo::CreateTargetPostRAHazardRecognizer ( const InstrItineraryData II,
const ScheduleDAG DAG 
) const
override

CreateTargetPostRAHazardRecognizer - Return the postRA hazard recognizer to use for this target when scheduling the DAG.

Definition at line 91 of file PPCInstrInfo.cpp.

References llvm::PPC::DIR_440, llvm::PPC::DIR_A2, llvm::PPC::DIR_E500mc, llvm::PPC::DIR_E5500, llvm::PPC::DIR_PWR7, llvm::PPC::DIR_PWR8, llvm::MachineFunction::getSubtarget(), llvm::ScheduleDAG::MF, and llvm::ScheduleDAG::TII.

bool PPCInstrInfo::DefinesPredicate ( MachineInstr MI,
std::vector< MachineOperand > &  Pred 
) const
override
bool PPCInstrInfo::findCommutedOpIndices ( MachineInstr MI,
unsigned SrcOpIdx1,
unsigned SrcOpIdx2 
) const
override
bool PPCInstrInfo::FoldImmediate ( MachineInstr UseMI,
MachineInstr DefMI,
unsigned  Reg,
MachineRegisterInfo MRI 
) const
override
unsigned PPCInstrInfo::getInstrLatency ( const InstrItineraryData ItinData,
const MachineInstr MI,
unsigned PredCost = nullptr 
) const
override
unsigned PPCInstrInfo::GetInstSizeInBytes ( const MachineInstr MI) const
void PPCInstrInfo::getNoopForMachoTarget ( MCInst NopInst) const
override

getNoopForMachoTarget - Return the noop instruction to use for a noop.

Definition at line 374 of file PPCInstrInfo.cpp.

References llvm::MCInst::setOpcode().

int PPCInstrInfo::getOperandLatency ( const InstrItineraryData ItinData,
const MachineInstr DefMI,
unsigned  DefIdx,
const MachineInstr UseMI,
unsigned  UseIdx 
) const
override
int llvm::PPCInstrInfo::getOperandLatency ( const InstrItineraryData ItinData,
SDNode DefNode,
unsigned  DefIdx,
SDNode UseNode,
unsigned  UseIdx 
) const
inlineoverride

Definition at line 106 of file PPCInstrInfo.h.

const PPCRegisterInfo& llvm::PPCInstrInfo::getRegisterInfo ( ) const
inline

getRegisterInfo - TargetInstrInfo is a superset of MRegister info.

As such, whenever a client has an instance of instruction info, it should always be able to get register info as well (through this method).

Definition at line 89 of file PPCInstrInfo.h.

Referenced by copyPhysReg(), llvm::PPCSubtarget::getRegisterInfo(), and optimizeCompareInstr().

bool llvm::PPCInstrInfo::hasLowDefLatency ( const TargetSchedModel SchedModel,
const MachineInstr DefMI,
unsigned  DefIdx 
) const
inlineoverride

Definition at line 113 of file PPCInstrInfo.h.

unsigned PPCInstrInfo::InsertBranch ( MachineBasicBlock MBB,
MachineBasicBlock TBB,
MachineBasicBlock FBB,
ArrayRef< MachineOperand Cond,
DebugLoc  DL 
) const
override
void PPCInstrInfo::insertNoop ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  MI 
) const
override
void PPCInstrInfo::insertSelect ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  MI,
DebugLoc  DL,
unsigned  DstReg,
ArrayRef< MachineOperand Cond,
unsigned  TrueReg,
unsigned  FalseReg 
) const
override
bool PPCInstrInfo::isCoalescableExtInstr ( const MachineInstr MI,
unsigned SrcReg,
unsigned DstReg,
unsigned SubIdx 
) const
override
unsigned PPCInstrInfo::isLoadFromStackSlot ( const MachineInstr MI,
int FrameIndex 
) const
override
bool PPCInstrInfo::isPredicable ( MachineInstr MI) const
override

Definition at line 1398 of file PPCInstrInfo.cpp.

References llvm::PPCISD::BCTRL, and llvm::MachineInstr::getOpcode().

bool PPCInstrInfo::isPredicated ( const MachineInstr MI) const
override

Definition at line 1217 of file PPCInstrInfo.cpp.

Referenced by isUnpredicatedTerminator().

bool llvm::PPCInstrInfo::isProfitableToDupForIfCvt ( MachineBasicBlock MBB,
unsigned  NumCycles,
const BranchProbability Probability 
) const
inlineoverride

Definition at line 196 of file PPCInstrInfo.h.

bool llvm::PPCInstrInfo::isProfitableToIfCvt ( MachineBasicBlock MBB,
unsigned  NumCycles,
unsigned  ExtraPredCycles,
const BranchProbability Probability 
) const
inlineoverride

Definition at line 184 of file PPCInstrInfo.h.

bool PPCInstrInfo::isProfitableToIfCvt ( MachineBasicBlock TMBB,
unsigned  NumT,
unsigned  ExtraT,
MachineBasicBlock FMBB,
unsigned  NumF,
unsigned  ExtraF,
const BranchProbability Probability 
) const
override

Definition at line 1208 of file PPCInstrInfo.cpp.

References MBBDefinesCTR().

bool llvm::PPCInstrInfo::isProfitableToUnpredicate ( MachineBasicBlock TMBB,
MachineBasicBlock FMBB 
) const
inlineoverride

Definition at line 203 of file PPCInstrInfo.h.

unsigned PPCInstrInfo::isStoreToStackSlot ( const MachineInstr MI,
int FrameIndex 
) const
override
bool PPCInstrInfo::isUnpredicatedTerminator ( const MachineInstr MI) const
override
void PPCInstrInfo::loadRegFromStackSlot ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  MBBI,
unsigned  DestReg,
int  FrameIndex,
const TargetRegisterClass RC,
const TargetRegisterInfo TRI 
) const
override
bool PPCInstrInfo::optimizeCompareInstr ( MachineInstr CmpInstr,
unsigned  SrcReg,
unsigned  SrcReg2,
int  Mask,
int  Value,
const MachineRegisterInfo MRI 
) const
override
bool PPCInstrInfo::PredicateInstruction ( MachineInstr MI,
ArrayRef< MachineOperand Pred 
) const
override
unsigned PPCInstrInfo::RemoveBranch ( MachineBasicBlock MBB) const
override
bool PPCInstrInfo::ReverseBranchCondition ( SmallVectorImpl< MachineOperand > &  Cond) const
override
void PPCInstrInfo::storeRegToStackSlot ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  MBBI,
unsigned  SrcReg,
bool  isKill,
int  FrameIndex,
const TargetRegisterClass RC,
const TargetRegisterInfo TRI 
) const
override
bool PPCInstrInfo::SubsumesPredicate ( ArrayRef< MachineOperand Pred1,
ArrayRef< MachineOperand Pred2 
) const
override

The documentation for this class was generated from the following files: