27 #define DEBUG_TYPE "regalloc"
43 for (
unsigned I = 0, E = Hints.
size();
I != E; ++
I)
49 for (
unsigned I = 0, E = Hints.
size();
I != E; ++
I)
50 assert(std::find(Order.
begin(), Order.
end(), Hints[
I]) != Order.
end() &&
51 "Target hint is outside allocation order.");
void rewind()
Start over from the beginning.
MachineFunction & getMachineFunction() const
const TargetRegisterClass * getRegClass(unsigned Reg) const
getRegClass - Return the register class of the specified virtual register.
ArrayRef< MCPhysReg > getOrder(const TargetRegisterClass *RC) const
getOrder - Returns the preferred allocation order for RC.
PrintReg - Helper class for printing registers on a raw_ostream.
bool LLVM_ATTRIBUTE_UNUSED_RESULT empty() const
AllocationOrder(unsigned VirtReg, const VirtRegMap &VRM, const RegisterClassInfo &RegClassInfo)
Create a new AllocationOrder for VirtReg.
const TargetRegisterInfo & getTargetRegInfo() const
virtual void getRegAllocationHints(unsigned VirtReg, ArrayRef< MCPhysReg > Order, SmallVectorImpl< MCPhysReg > &Hints, const MachineFunction &MF, const VirtRegMap *VRM=nullptr) const
Get a list of 'hint' registers that the register allocator should try first when allocating a physica...
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.