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LLVM
3.7.0
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#include "MCTargetDesc/SparcMCTargetDesc.h"#include "llvm/Support/ErrorHandling.h"#include "llvm/Target/TargetMachine.h"Go to the source code of this file.
Namespaces | |
| llvm | |
| Compute iterated dominance frontiers using a linear time algorithm. | |
| llvm::SPCC | |
Enumerations | |
| enum | llvm::SPCC::CondCodes { llvm::SPCC::ICC_A = 8, llvm::SPCC::ICC_N = 0, llvm::SPCC::ICC_NE = 9, llvm::SPCC::ICC_E = 1, llvm::SPCC::ICC_G = 10, llvm::SPCC::ICC_LE = 2, llvm::SPCC::ICC_GE = 11, llvm::SPCC::ICC_L = 3, llvm::SPCC::ICC_GU = 12, llvm::SPCC::ICC_LEU = 4, llvm::SPCC::ICC_CC = 13, llvm::SPCC::ICC_CS = 5, llvm::SPCC::ICC_POS = 14, llvm::SPCC::ICC_NEG = 6, llvm::SPCC::ICC_VC = 15, llvm::SPCC::ICC_VS = 7, llvm::SPCC::FCC_A = 8+16, llvm::SPCC::FCC_N = 0+16, llvm::SPCC::FCC_U = 7+16, llvm::SPCC::FCC_G = 6+16, llvm::SPCC::FCC_UG = 5+16, llvm::SPCC::FCC_L = 4+16, llvm::SPCC::FCC_UL = 3+16, llvm::SPCC::FCC_LG = 2+16, llvm::SPCC::FCC_NE = 1+16, llvm::SPCC::FCC_E = 9+16, llvm::SPCC::FCC_UE = 10+16, llvm::SPCC::FCC_GE = 11+16, llvm::SPCC::FCC_UGE = 12+16, llvm::SPCC::FCC_LE = 13+16, llvm::SPCC::FCC_ULE = 14+16, llvm::SPCC::FCC_O = 15+16 } |
Functions | |
| FunctionPass * | llvm::createSparcISelDag (SparcTargetMachine &TM) |
| createSparcISelDag - This pass converts a legalized DAG into a SPARC-specific DAG, ready for instruction scheduling. More... | |
| FunctionPass * | llvm::createSparcDelaySlotFillerPass (TargetMachine &TM) |
| createSparcDelaySlotFillerPass - Returns a pass that fills in delay slots in Sparc MachineFunctions More... | |
| void | llvm::LowerSparcMachineInstrToMCInst (const MachineInstr *MI, MCInst &OutMI, AsmPrinter &AP) |
| static const char * | llvm::SPARCCondCodeToString (SPCC::CondCodes CC) |
| static unsigned | llvm::HI22 (int64_t imm) |
| static unsigned | llvm::LO10 (int64_t imm) |
| static unsigned | llvm::HIX22 (int64_t imm) |
| static unsigned | llvm::LOX10 (int64_t imm) |
1.8.6