28 #define DEBUG_TYPE "x86-pseudo"
50 const char *getPassName()
const override {
51 return "X86 pseudo instruction expansion pass";
75 case X86::TCRETURNdi64:
76 case X86::TCRETURNri64:
77 case X86::TCRETURNmi64: {
78 bool isMem = Opcode == X86::TCRETURNmi || Opcode == X86::TCRETURNmi64;
81 assert(StackAdjust.
isImm() &&
"Expecting immediate value.");
84 int StackAdj = StackAdjust.
getImm();
88 StackAdj += X86FL->mergeSPUpdates(MBB, MBBI,
true);
89 X86FL->emitSPUpdate(MBB, MBBI, StackAdj,
true);
93 bool IsWin64 = STI->isTargetWin64();
94 if (Opcode == X86::TCRETURNdi || Opcode == X86::TCRETURNdi64) {
95 unsigned Op = (Opcode == X86::TCRETURNdi)
97 : (IsWin64 ? X86::TAILJMPd64_REX : X86::TAILJMPd64);
107 }
else if (Opcode == X86::TCRETURNmi || Opcode == X86::TCRETURNmi64) {
108 unsigned Op = (Opcode == X86::TCRETURNmi)
110 : (IsWin64 ? X86::TAILJMPm64_REX : X86::TAILJMPm64);
112 for (
unsigned i = 0; i != 5; ++i)
114 }
else if (Opcode == X86::TCRETURNri64) {
116 TII->get(IsWin64 ? X86::TAILJMPr64_REX : X86::TAILJMPr64))
119 BuildMI(MBB, MBBI, DL,
TII->get(X86::TAILJMPr))
132 case X86::EH_RETURN64: {
134 assert(DestAddr.
isReg() &&
"Offset should be in register!");
135 const bool Uses64BitFramePtr =
136 STI->isTarget64BitLP64() || STI->isTargetNaCl64();
137 unsigned StackPtr = TRI->getStackRegister();
139 TII->get(Uses64BitFramePtr ? X86::MOV64rr : X86::MOV32rr), StackPtr)
140 .addReg(DestAddr.
getReg());
151 bool Modified =
false;
157 Modified |= ExpandMI(MBB, MBBI);
166 TII = STI->getInstrInfo();
168 X86FL = STI->getFrameLowering();
170 bool Modified =
false;
172 Modified |= ExpandMBB(MBB);
178 return new X86ExpandPseudo();
const GlobalValue * getGlobal() const
char & MachineDominatorsID
MachineDominators - This pass is a machine dominators analysis pass.
const char * getSymbolName() const
char & MachineLoopInfoID
MachineLoopInfo - This pass is a loop analysis pass.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
const HexagonInstrInfo * TII
bool isImm() const
isImm - Tests if this is a MO_Immediate operand.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
bool isReg() const
isReg - Tests if this is a MO_Register operand.
bool isGlobal() const
isGlobal - Tests if this is a MO_GlobalAddress operand.
const HexagonRegisterInfo & getRegisterInfo() const
getRegisterInfo - TargetInstrInfo is a superset of MRegister info.
AnalysisUsage & addPreservedID(const void *ID)
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
bundle_iterator< MachineInstr, instr_iterator > iterator
unsigned getTargetFlags() const
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
FunctionPass * createX86ExpandPseudoPass()
Return a Machine IR pass that expands X86-specific pseudo instructions into a sequence of actual inst...
Represent the analysis usage information of a pass.
bool isSymbol() const
isSymbol - Tests if this is a MO_ExternalSymbol operand.
FunctionPass class - This class is used to implement most global optimizations.
int64_t getOffset() const
Return the offset from the symbol in this operand.
MachineInstrBuilder BuildMI(MachineFunction &MF, DebugLoc DL, const MCInstrDesc &MCID)
BuildMI - Builder interface.
MachineOperand class - Representation of each machine instruction operand.
void setPreservesCFG()
This function should be called by the pass, iff they do not:
const MachineInstrBuilder & addGlobalAddress(const GlobalValue *GV, int64_t Offset=0, unsigned char TargetFlags=0) const
Representation of each machine instruction.
void copyImplicitOps(MachineFunction &MF, const MachineInstr *MI)
Copy implicit register operands from specified instruction to this instruction.
const MachineInstrBuilder & addExternalSymbol(const char *FnName, unsigned char TargetFlags=0) const
static bool isMem(const MachineInstr *MI, unsigned Op)
OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents 'eh_return' gcc dwarf builtin...
unsigned getReg() const
getReg - Returns the register number.
const MachineInstrBuilder & addOperand(const MachineOperand &MO) const