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LLVM
3.7.0
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#include "llvm/Target/TargetRegisterInfo.h"#include "llvm/ADT/BitVector.h"#include "llvm/CodeGen/MachineFunction.h"#include "llvm/CodeGen/MachineRegisterInfo.h"#include "llvm/CodeGen/VirtRegMap.h"#include "llvm/Support/Debug.h"#include "llvm/Support/raw_ostream.h"Go to the source code of this file.
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| static void | getAllocatableSetForRC (const MachineFunction &MF, const TargetRegisterClass *RC, BitVector &R) |
| getAllocatableSetForRC - Toggle the bits that represent allocatable registers for the specific register class. More... | |
| static const TargetRegisterClass * | firstCommonClass (const uint32_t *A, const uint32_t *B, const TargetRegisterInfo *TRI) |
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inlinestatic |
Definition at line 162 of file TargetRegisterInfo.cpp.
References llvm::countTrailingZeros(), llvm::TargetRegisterInfo::getNumRegClasses(), llvm::TargetRegisterInfo::getRegClass(), and I.
Referenced by llvm::TargetRegisterInfo::getCommonSubClass(), llvm::TargetRegisterInfo::getCommonSuperRegClass(), and llvm::TargetRegisterInfo::getMatchingSuperRegClass().
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getAllocatableSetForRC - Toggle the bits that represent allocatable registers for the specific register class.
Definition at line 131 of file TargetRegisterInfo.cpp.
References llvm::TargetRegisterClass::getRawAllocationOrder(), llvm::TargetRegisterClass::isAllocatable(), and llvm::BitVector::set().
Referenced by llvm::TargetRegisterInfo::getAllocatableSet().
1.8.6