LLVM  3.7.0
llvm::SIRegisterInfo Member List

This is the complete list of members for llvm::SIRegisterInfo, including all inherited members.

AMDGPURegisterInfo()llvm::AMDGPURegisterInfo
CalleeSavedRegllvm::AMDGPURegisterInfostatic
eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj, unsigned FIOperandNum, RegScavenger *RS) const overridellvm::SIRegisterInfo
findUnusedRegister(const MachineRegisterInfo &MRI, const TargetRegisterClass *RC) const llvm::SIRegisterInfo
getCalleeSavedRegs(const MachineFunction *MF) const overridellvm::AMDGPURegisterInfo
getCFGStructurizerRegClass(MVT VT) const overridellvm::SIRegisterInfovirtual
getEquivalentVGPRClass(const TargetRegisterClass *SRC) const llvm::SIRegisterInfo
getFrameRegister(const MachineFunction &MF) const overridellvm::AMDGPURegisterInfo
getHWRegIndex(unsigned Reg) const overridellvm::SIRegisterInfovirtual
getIndirectSubReg(unsigned IndirectIndex) const llvm::AMDGPURegisterInfo
getNumSGPRsAllowed(AMDGPUSubtarget::Generation gen, unsigned WaveCount) const llvm::SIRegisterInfo
getNumVGPRsAllowed(unsigned WaveCount) const llvm::SIRegisterInfo
getPhysRegClass(unsigned Reg) const llvm::SIRegisterInfo
getPhysRegSubReg(unsigned Reg, const TargetRegisterClass *SubRC, unsigned Channel) const llvm::SIRegisterInfo
getPreloadedValue(const MachineFunction &MF, enum PreloadedValue Value) const llvm::SIRegisterInfo
getRegPressureSetLimit(const MachineFunction &MF, unsigned Idx) const overridellvm::SIRegisterInfo
getReservedRegs(const MachineFunction &MF) const overridellvm::SIRegisterInfo
getSubRegClass(const TargetRegisterClass *RC, unsigned SubIdx) const llvm::SIRegisterInfo
getSubRegFromChannel(unsigned Channel) const llvm::AMDGPURegisterInfo
hasVGPRs(const TargetRegisterClass *RC) const llvm::SIRegisterInfo
INPUT_PTR enum valuellvm::SIRegisterInfo
isSGPRClass(const TargetRegisterClass *RC) const llvm::SIRegisterInfoinline
isSGPRClassID(unsigned RCID) const llvm::SIRegisterInfoinline
opCanUseInlineConstant(unsigned OpType) const llvm::SIRegisterInfo
opCanUseLiteralConstant(unsigned OpType) const llvm::SIRegisterInfo
PreloadedValue enum namellvm::SIRegisterInfo
requiresRegisterScavenging(const MachineFunction &Fn) const overridellvm::SIRegisterInfo
SCRATCH_PTR enum valuellvm::SIRegisterInfo
SCRATCH_WAVE_OFFSET enum valuellvm::SIRegisterInfo
SIRegisterInfo()llvm::SIRegisterInfo
TGID_X enum valuellvm::SIRegisterInfo
TGID_Y enum valuellvm::SIRegisterInfo
TGID_Z enum valuellvm::SIRegisterInfo
TIDIG_X enum valuellvm::SIRegisterInfo
TIDIG_Y enum valuellvm::SIRegisterInfo
TIDIG_Z enum valuellvm::SIRegisterInfo