15 #ifndef LLVM_LIB_TARGET_MIPS_MIPSSEREGISTERINFO_H
16 #define LLVM_LIB_TARGET_MIPS_MIPSSEREGISTERINFO_H
21 class MipsSEInstrInfo;
36 int64_t SPOffset)
const override;
bool requiresRegisterScavenging(const MachineFunction &MF) const override
bundle_iterator< MachineInstr, instr_iterator > iterator
const TargetRegisterClass * intRegClass(unsigned Size) const override
Return GPR register class.
bool requiresFrameIndexScavenging(const MachineFunction &MF) const override