15 #ifndef LLVM_CODEGEN_FASTISEL_H
16 #define LLVM_CODEGEN_FASTISEL_H
108 Args = std::move(ArgsList);
119 unsigned FixedArgs = ~0U) {
132 Args = std::move(ArgsList);
142 unsigned FixedArgs = ~0U) {
146 Args = std::move(ArgsList);
154 unsigned FixedArgs = ~0U);
158 unsigned FixedArgs = ~0U) {
162 Args = std::move(ArgsList);
341 virtual unsigned fastEmit_r(
MVT VT,
MVT RetVT,
unsigned Opcode,
unsigned Op0,
347 bool Op0IsKill,
unsigned Op1,
bool Op1IsKill);
353 bool Op0IsKill, uint64_t Imm);
365 unsigned Op0,
bool Op0IsKill,
unsigned Op1,
366 bool Op1IsKill, uint64_t Imm);
373 unsigned fastEmit_ri_(
MVT VT,
unsigned Opcode,
unsigned Op0,
bool Op0IsKill,
374 uint64_t Imm,
MVT ImmType);
378 virtual unsigned fastEmit_i(
MVT VT,
MVT RetVT,
unsigned Opcode, uint64_t Imm);
401 bool Op0IsKill,
unsigned Op1,
bool Op1IsKill);
407 bool Op0IsKill,
unsigned Op1,
bool Op1IsKill,
408 unsigned Op2,
bool Op2IsKill);
414 bool Op0IsKill, uint64_t Imm);
420 bool Op0IsKill, uint64_t Imm1, uint64_t Imm2);
432 bool Op0IsKill,
unsigned Op1,
bool Op1IsKill,
439 bool Op0IsKill,
unsigned Op1,
bool Op1IsKill,
440 uint64_t Imm1, uint64_t Imm2);
519 case Intrinsic::sadd_with_overflow:
520 case Intrinsic::uadd_with_overflow:
521 case Intrinsic::smul_with_overflow:
522 case Intrinsic::umul_with_overflow:
553 bool handlePHINodesInSuccessorBlocks(
const BasicBlock *LLVMBB);
557 unsigned materializeConstant(
const Value *V,
MVT VT);
562 unsigned materializeRegForValue(
const Value *V,
MVT VT);
567 void flushLocalValueMap();
575 const CallInst *CI,
unsigned StartIdx);
576 bool lowerCallOperands(
const CallInst *CI,
unsigned ArgIdx,
unsigned NumArgs,
577 const Value *Callee,
bool ForceRetVoidTy,
578 CallLoweringInfo &CLI);
unsigned fastEmitInst_rrr(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, unsigned Op2, bool Op2IsKill)
Emit a MachineInstr with three register operands and a result register in the given register class...
A parsed version of the target data layout string in and methods for querying it. ...
The MachineConstantPool class keeps track of constants referenced by a function which must be spilled...
This class is the base class for the comparison instructions.
unsigned fastEmitInst_rrii(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, uint64_t Imm1, uint64_t Imm2)
Emit a MachineInstr with two register operands, two immediates operands, and a result register in the...
std::vector< ArgListEntry > ArgListTy
unsigned fastEmitZExtFromI1(MVT VT, unsigned Op0, bool Op0IsKill)
Emit MachineInstrs to compute the value of Op with all but the least significant bit set to zero...
MachineConstantPool & MCP
bool lowerCall(const CallInst *I)
virtual unsigned fastMaterializeConstant(const Constant *C)
Emit a constant in a register using target-specific logic, such as constant pool loads.
Sign extended before/after call.
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Force argument to be passed in register.
unsigned getNumParams() const
getNumParams - Return the number of fixed parameters this function type requires. ...
InstrTy * getInstruction() const
Intrinsic::ID getIntrinsicID() const
getIntrinsicID - Return the intrinsic ID of this intrinsic.
CmpInst::Predicate optimizeCmpPredicate(const CmpInst *CI) const
void fastEmitBranch(MachineBasicBlock *MBB, DebugLoc DL)
Emit an unconditional branch to the given block, unless it is the immediate (fall-through) successor...
bool selectGetElementPtr(const User *I)
void leaveLocalValueArea(SavePoint Old)
Reset InsertPt to the given old insert position.
Describe properties that are true of each instruction in the target description file.
virtual unsigned fastEmit_rf(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, bool Op0IsKill, const ConstantFP *FPImm)
This method is called by target-independent code to request that an instruction with the given type...
bool selectStackmap(const CallInst *I)
CallInst - This class represents a function call, abstracting a target machine's calling convention...
virtual bool tryToFoldLoadIntoMI(MachineInstr *, unsigned, const LoadInst *)
The specified machine instr operand is a vreg, and that vreg is being provided by the specified load ...
void setAttributes(ImmutableCallSite *CS, unsigned AttrIdx)
Set CallLoweringInfo attribute flags based on a call instruction and called function attributes...
MachineMemOperand * createMachineMemOperandFor(const Instruction *I) const
Create a machine mem operand from the given instruction.
virtual unsigned fastEmit_(MVT VT, MVT RetVT, unsigned Opcode)
This method is called by target-independent code to request that an instruction with the given type a...
SmallVector< unsigned, 4 > InRegs
LoadInst - an instruction for reading from memory.
DebugLoc getCurDebugLoc() const
Return current debug location information.
virtual unsigned fastEmit_i(MVT VT, MVT RetVT, unsigned Opcode, uint64_t Imm)
This method is called by target-independent code to request that an instruction with the given type...
virtual unsigned fastMaterializeFloatZero(const ConstantFP *CF)
Emit the floating-point constant +0.0 in a register using target- specific logic. ...
virtual bool fastLowerCall(CallLoweringInfo &CLI)
This method is called by target-independent code to do target- specific call lowering.
bool selectInstruction(const Instruction *I)
Do "fast" instruction selection for the given LLVM IR instruction and append the generated machine in...
unsigned fastEmitInst_rii(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, uint64_t Imm1, uint64_t Imm2)
Emit a MachineInstr with one register operand and two immediate operands.
virtual unsigned fastEmit_rri(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, uint64_t Imm)
This method is called by target-independent code to request that an instruction with the given type...
DenseMap< const Value *, unsigned > LocalValueMap
unsigned fastEmitInst_ri(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, uint64_t Imm)
Emit a MachineInstr with a register operand, an immediate, and a result register in the given registe...
void setLastLocalValue(MachineInstr *I)
Update the position of the last instruction emitted for materializing constants for use in the curren...
unsigned fastEmitInst_rri(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, uint64_t Imm)
Emit a MachineInstr with two register operands, an immediate, and a result register in the given regi...
MachineMemOperand - A description of a memory reference used in the backend.
CallLoweringInfo & setCallee(CallingConv::ID CC, Type *ResultTy, const Value *Target, ArgListTy &&ArgsList, unsigned FixedArgs=~0U)
unsigned fastEmitInst_i(unsigned MachineInstrOpcode, const TargetRegisterClass *RC, uint64_t Imm)
Emit a MachineInstr with a single immediate operand, and a result register in the given register clas...
bool canFoldAddIntoGEP(const User *GEP, const Value *Add)
Check if Add is an add that can be safely folded into GEP.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
unsigned fastEmitInst_r(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill)
Emit a MachineInstr with one register operand and a result register in the given register class...
MachineInstr * EmitStartPt
The top most instruction in the current block that is allowed for emitting local variables.
Reg
All possible values of the reg field in the ModR/M byte.
bool doesNotReturn() const
Determine if the call cannot return.
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted...
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
bool selectIntrinsicCall(const IntrinsicInst *II)
bool selectCast(const User *I, unsigned Opcode)
Context object for machine code objects.
This is a fast-path instruction selection class that generates poor code and doesn't support illegal ...
FunctionType - Class to represent function types.
SmallVector< ISD::InputArg, 4 > Ins
unsigned constrainOperandRegClass(const MCInstrDesc &II, unsigned Op, unsigned OpNum)
Try to constrain Op so that it is usable by argument OpNum of the provided MCInstrDesc.
bool selectOperator(const User *I, unsigned Opcode)
Do "fast" instruction selection for the given LLVM IR operator (Instruction or ConstantExpr), and append generated machine instructions to the current block.
ValTy * getCalledValue() const
getCalledValue - Return the pointer to function that is being called.
unsigned getRegForValue(const Value *V)
Create a virtual register and arrange for it to be assigned the value for the given LLVM value...
unsigned fastEmitInst_(unsigned MachineInstOpcode, const TargetRegisterClass *RC)
Emit a MachineInstr with no operands and a result register in the given register class.
bool hasTrivialKill(const Value *V)
Test whether the given value has exactly one use.
MachineInstr * getLastLocalValue()
Return the position of the last instruction emitted for materializing constants for use in the curren...
unsigned lookUpRegForValue(const Value *V)
Look up the value to see if its value is already cached in a register.
TargetInstrInfo - Interface to description of machine instruction set.
bundle_iterator< MachineInstr, instr_iterator > iterator
bool selectInsertValue(const User *I)
CallLoweringInfo & setCallee(Type *ResultTy, FunctionType *FuncTy, const Value *Target, ArgListTy &&ArgsList, ImmutableCallSite &Call)
MVT - Machine Value Type.
LLVM Basic Block Representation.
CallLoweringInfo & setCallee(CallingConv::ID CC, Type *ResultTy, MCSymbol *Target, ArgListTy &&ArgsList, unsigned FixedArgs=~0U)
The instances of the Type class are immutable: once they are created, they are never changed...
This is an important base class in LLVM.
void removeDeadCode(MachineBasicBlock::iterator I, MachineBasicBlock::iterator E)
Remove all dead instructions between the I and E.
SmallVector< ISD::ArgFlagsTy, 16 > OutFlags
bundle_iterator - MachineBasicBlock iterator that automatically skips over MIs that are inside bundle...
ConstantFP - Floating Point Values [float, double].
virtual unsigned fastEmit_r(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, bool Op0IsKill)
This method is called by target-independent code to request that an instruction with the given type...
bool SkipTargetIndependentISel
bool tryToFoldLoad(const LoadInst *LI, const Instruction *FoldInst)
We're checking to see if we can fold LI into FoldInst.
bool lowerArguments()
Do "fast" instruction selection for function arguments and append the machine instructions to the cur...
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Zero extended before/after call.
const TargetRegisterInfo & TRI
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
bool selectFNeg(const User *I)
Emit an FNeg operation.
CallLoweringInfo & setTailCall(bool Value=true)
SmallVector< Value *, 16 > OutVals
const TargetInstrInfo & TII
MachineInstr * LastLocalValue
The position of the last instruction for materializing constants for use in the current block...
void recomputeInsertPt()
Reset InsertPt to prepare for inserting instructions into the current block.
virtual unsigned fastEmit_rr(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill)
This method is called by target-independent code to request that an instruction with the given type...
bool isCommutativeIntrinsic(IntrinsicInst const *II)
bool paramHasAttr(unsigned i, Attribute::AttrKind A) const
Return true if the call or the callee has the given attribute.
virtual unsigned fastEmit_ri(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, bool Op0IsKill, uint64_t Imm)
This method is called by target-independent code to request that an instruction with the given type...
CallLoweringInfo & setCallee(Type *ResultTy, FunctionType *FuncTy, MCSymbol *Target, ArgListTy &&ArgsList, ImmutableCallSite &Call, unsigned FixedArgs=~0U)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small...
Provides information about what library functions are available for the current target.
const TargetLibraryInfo * LibInfo
unsigned fastEmitInst_rr(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill)
Emit a MachineInstr with two register operands and a result register in the given register class...
void updateValueMap(const Value *I, unsigned Reg, unsigned NumRegs=1)
Update the value map to include the new mapping for this instruction, or insert an extra copy to get ...
void startNewBlock()
Set the current block to which generated machine instructions will be appended, and clear the local C...
bool selectBitCast(const User *I)
Target - Wrapper for Target specific information.
virtual unsigned fastEmit_f(MVT VT, MVT RetVT, unsigned Opcode, const ConstantFP *FPImm)
This method is called by target-independent code to request that an instruction with the given type...
SmallVector< unsigned, 16 > OutRegs
bool selectBinaryOp(const User *I, unsigned ISDOpcode)
Select and emit code for a binary operator instruction, which has an opcode which directly correspond...
bool selectCall(const User *Call)
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
SavePoint enterLocalValueArea()
Prepare InsertPt to begin inserting instructions into the local value area and return the old insert ...
Representation of each machine instruction.
virtual bool fastLowerIntrinsicCall(const IntrinsicInst *II)
This method is called by target-independent code to do target- specific intrinsic lowering...
bool selectPatchpoint(const CallInst *I)
bool selectExtractValue(const User *I)
MachineRegisterInfo & MRI
bool lowerCallTo(const CallInst *CI, MCSymbol *Symbol, unsigned NumArgs)
ImmutableCallSite - establish a view to a call site for examination.
CallingConv::ID getCallingConv() const
getCallingConv/setCallingConv - get or set the calling convention of the call.
unsigned fastEmitInst_rf(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, const ConstantFP *FPImm)
Emit a MachineInstr with two register operands and a result register in the given register class...
FunctionLoweringInfo - This contains information that is global to a function that is used when lower...
virtual unsigned fastMaterializeAlloca(const AllocaInst *C)
Emit an alloca address in a register using target-specific logic.
const TargetLowering & TLI
unsigned createResultReg(const TargetRegisterClass *RC)
CallLoweringInfo & setIsPatchPoint(bool Value=true)
unsigned fastEmit_ri_(MVT VT, unsigned Opcode, unsigned Op0, bool Op0IsKill, uint64_t Imm, MVT ImmType)
This method is a wrapper of fastEmit_ri.
unsigned fastEmitInst_ii(unsigned MachineInstrOpcode, const TargetRegisterClass *RC, uint64_t Imm1, uint64_t Imm2)
Emit a MachineInstr with a two immediate operands.
unsigned fastEmitInst_extractsubreg(MVT RetVT, unsigned Op0, bool Op0IsKill, uint32_t Idx)
Emit a MachineInstr for an extract_subreg from a specified index of a superregister to a specified ty...
MachineBasicBlock::iterator InsertPt
FastISel(FunctionLoweringInfo &FuncInfo, const TargetLibraryInfo *LibInfo, bool SkipTargetIndependentISel=false)
virtual bool fastLowerArguments()
This method is called by target-independent code to do target- specific argument lowering.
LLVM Value Representation.
Primary interface to the complete machine description for the target machine.
virtual bool fastSelectInstruction(const Instruction *I)=0
This method is called by target-independent code when the normal FastISel process fails to select an ...
FunctionLoweringInfo & FuncInfo
IntrinsicInst - A useful wrapper class for inspecting calls to intrinsic functions.
This file describes how to lower LLVM code to machine code.
AllocaInst - an instruction to allocate memory on the stack.
std::pair< unsigned, bool > getRegForGEPIndex(const Value *V)
This is a wrapper around getRegForValue that also takes care of truncating or sign-extending the give...