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LLVM
3.7.0
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#include "SparcInstrInfo.h"#include "Sparc.h"#include "SparcMachineFunctionInfo.h"#include "SparcSubtarget.h"#include "llvm/ADT/STLExtras.h"#include "llvm/ADT/SmallVector.h"#include "llvm/CodeGen/MachineFrameInfo.h"#include "llvm/CodeGen/MachineInstrBuilder.h"#include "llvm/CodeGen/MachineMemOperand.h"#include "llvm/CodeGen/MachineRegisterInfo.h"#include "llvm/Support/ErrorHandling.h"#include "llvm/Support/TargetRegistry.h"#include "SparcGenInstrInfo.inc"Go to the source code of this file.
Macros | |
| #define | GET_INSTRINFO_CTOR_DTOR |
Functions | |
| static bool | IsIntegerCC (unsigned CC) |
| static SPCC::CondCodes | GetOppositeBranchCondition (SPCC::CondCodes CC) |
| #define GET_INSTRINFO_CTOR_DTOR |
Definition at line 29 of file SparcInstrInfo.cpp.
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Definition at line 87 of file SparcInstrInfo.cpp.
References llvm::SPCC::FCC_A, llvm::SPCC::FCC_E, llvm::SPCC::FCC_G, llvm::SPCC::FCC_GE, llvm::SPCC::FCC_L, llvm::SPCC::FCC_LE, llvm::SPCC::FCC_LG, llvm::SPCC::FCC_N, llvm::SPCC::FCC_NE, llvm::SPCC::FCC_O, llvm::SPCC::FCC_U, llvm::SPCC::FCC_UE, llvm::SPCC::FCC_UG, llvm::SPCC::FCC_UGE, llvm::SPCC::FCC_UL, llvm::SPCC::FCC_ULE, llvm::SPCC::ICC_A, llvm::SPCC::ICC_CC, llvm::SPCC::ICC_CS, llvm::SPCC::ICC_E, llvm::SPCC::ICC_G, llvm::SPCC::ICC_GE, llvm::SPCC::ICC_GU, llvm::SPCC::ICC_L, llvm::SPCC::ICC_LE, llvm::SPCC::ICC_LEU, llvm::SPCC::ICC_N, llvm::SPCC::ICC_NE, llvm::SPCC::ICC_NEG, llvm::SPCC::ICC_POS, llvm::SPCC::ICC_VC, llvm::SPCC::ICC_VS, and llvm_unreachable.
Referenced by llvm::SparcInstrInfo::AnalyzeBranch(), checkBoolTestSetCCCombine(), llvm::X86InstrInfo::optimizeCompareInstr(), PerformCMOVCombine(), and llvm::X86InstrInfo::ReverseBranchCondition().
Definition at line 81 of file SparcInstrInfo.cpp.
References llvm::SPCC::ICC_VC.
Referenced by llvm::SparcInstrInfo::InsertBranch().
1.8.6