14 #ifndef LLVM_LIB_TARGET_MIPS_MIPSREGISTERINFO_H
15 #define LLVM_LIB_TARGET_MIPS_MIPSREGISTERINFO_H
20 #define GET_REGINFO_HEADER
21 #include "MipsGenRegisterInfo.inc"
40 unsigned Kind)
const override;
57 int SPAdj,
unsigned FIOperandNum,
77 int64_t SPOffset)
const = 0;
void processFunctionBeforeFrameFinalized(MachineFunction &MF, RegScavenger *RS=nullptr) const
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
unsigned getFrameRegister(const MachineFunction &MF) const override
Debug information queries.
unsigned getRegPressureLimit(const TargetRegisterClass *RC, MachineFunction &MF) const override
static unsigned getRegisterNumbering(unsigned RegEnum)
getRegisterNumbering - Given the enum value for some register, e.g.
virtual const TargetRegisterClass * intRegClass(unsigned Size) const =0
Return GPR register class.
BitVector getReservedRegs(const MachineFunction &MF) const override
bundle_iterator< MachineInstr, instr_iterator > iterator
const TargetRegisterClass * getPointerRegClass(const MachineFunction &MF, unsigned Kind) const override
Code Generation virtual methods...
static unsigned getPICCallReg()
Get PIC indirect call register.
const MCPhysReg * getCalleeSavedRegs(const MachineFunction *MF) const override
Mips Callee Saved Registers.
bool canRealignStack(const MachineFunction &MF) const
void adjustMipsStackFrame(MachineFunction &MF) const
Adjust the Mips stack frame.
static const uint32_t * getMips16RetHelperMask()
bool needsStackRealignment(const MachineFunction &MF) const override
bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override
const ARM::ArchExtKind Kind
bool requiresRegisterScavenging(const MachineFunction &MF) const override
void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override
Stack Frame Processing Methods.
const uint32_t * getCallPreservedMask(const MachineFunction &MF, CallingConv::ID) const override