LLVM  3.7.0
Classes | Namespaces | Functions | Variables
Passes.cpp File Reference
#include "llvm/CodeGen/Passes.h"
#include "llvm/Analysis/Passes.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/RegAllocRegistry.h"
#include "llvm/IR/IRPrintingPasses.h"
#include "llvm/IR/LegacyPassManager.h"
#include "llvm/IR/Verifier.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Transforms/Instrumentation.h"
#include "llvm/Transforms/Scalar.h"
#include "llvm/Transforms/Utils/SymbolRewriter.h"
Include dependency graph for Passes.cpp:

Go to the source code of this file.

Classes

class  llvm::PassConfigImpl
 

Namespaces

 llvm
 Compute iterated dominance frontiers using a linear time algorithm.
 

Functions

static IdentifyingPassPtr applyDisable (IdentifyingPassPtr PassID, bool Override)
 Allow standard passes to be disabled by command line options. More...
 
static IdentifyingPassPtr overridePass (AnalysisID StandardID, IdentifyingPassPtr TargetID)
 Allow standard passes to be disabled by the command line, regardless of who is adding the pass. More...
 
static FunctionPassuseDefaultRegisterAllocator ()
 A dummy default pass factory indicates whether the register allocator is overridden on the command line. More...
 

Variables

static cl::opt< boolDisablePostRA ("disable-post-ra", cl::Hidden, cl::desc("Disable Post Regalloc"))
 
static cl::opt< boolDisableBranchFold ("disable-branch-fold", cl::Hidden, cl::desc("Disable branch folding"))
 
static cl::opt< boolDisableTailDuplicate ("disable-tail-duplicate", cl::Hidden, cl::desc("Disable tail duplication"))
 
static cl::opt< boolDisableEarlyTailDup ("disable-early-taildup", cl::Hidden, cl::desc("Disable pre-register allocation tail duplication"))
 
static cl::opt< boolDisableBlockPlacement ("disable-block-placement", cl::Hidden, cl::desc("Disable probability-driven block placement"))
 
static cl::opt< boolEnableBlockPlacementStats ("enable-block-placement-stats", cl::Hidden, cl::desc("Collect probability-driven block placement stats"))
 
static cl::opt< boolDisableSSC ("disable-ssc", cl::Hidden, cl::desc("Disable Stack Slot Coloring"))
 
static cl::opt< boolDisableMachineDCE ("disable-machine-dce", cl::Hidden, cl::desc("Disable Machine Dead Code Elimination"))
 
static cl::opt< boolDisableEarlyIfConversion ("disable-early-ifcvt", cl::Hidden, cl::desc("Disable Early If-conversion"))
 
static cl::opt< boolDisableMachineLICM ("disable-machine-licm", cl::Hidden, cl::desc("Disable Machine LICM"))
 
static cl::opt< boolDisableMachineCSE ("disable-machine-cse", cl::Hidden, cl::desc("Disable Machine Common Subexpression Elimination"))
 
static cl::opt< cl::boolOrDefaultEnableShrinkWrapOpt ("enable-shrink-wrap", cl::Hidden, cl::desc("enable the shrink-wrapping pass"))
 
static cl::opt< cl::boolOrDefaultOptimizeRegAlloc ("optimize-regalloc", cl::Hidden, cl::desc("Enable optimized register allocation compilation path."))
 
static cl::opt< boolDisablePostRAMachineLICM ("disable-postra-machine-licm", cl::Hidden, cl::desc("Disable Machine LICM"))
 
static cl::opt< boolDisableMachineSink ("disable-machine-sink", cl::Hidden, cl::desc("Disable Machine Sinking"))
 
static cl::opt< boolDisableLSR ("disable-lsr", cl::Hidden, cl::desc("Disable Loop Strength Reduction Pass"))
 
static cl::opt< boolDisableConstantHoisting ("disable-constant-hoisting", cl::Hidden, cl::desc("Disable ConstantHoisting"))
 
static cl::opt< boolDisableCGP ("disable-cgp", cl::Hidden, cl::desc("Disable Codegen Prepare"))
 
static cl::opt< boolDisableCopyProp ("disable-copyprop", cl::Hidden, cl::desc("Disable Copy Propagation pass"))
 
static cl::opt< boolDisablePartialLibcallInlining ("disable-partial-libcall-inlining", cl::Hidden, cl::desc("Disable Partial Libcall Inlining"))
 
static cl::opt< boolEnableImplicitNullChecks ("enable-implicit-null-checks", cl::desc("Fold null checks into faulting memory operations"), cl::init(false))
 
static cl::opt< boolPrintLSR ("print-lsr-output", cl::Hidden, cl::desc("Print LLVM IR produced by the loop-reduce pass"))
 
static cl::opt< boolPrintISelInput ("print-isel-input", cl::Hidden, cl::desc("Print LLVM IR input to isel pass"))
 
static cl::opt< boolPrintGCInfo ("print-gc", cl::Hidden, cl::desc("Dump garbage collector data"))
 
static cl::opt< boolVerifyMachineCode ("verify-machineinstrs", cl::Hidden, cl::desc("Verify generated machine code"), cl::init(false), cl::ZeroOrMore)
 
static cl::opt< std::string > PrintMachineInstrs ("print-machineinstrs", cl::ValueOptional, cl::desc("Print machine instrs"), cl::value_desc("pass-name"), cl::init("option-unspecified"))
 
static cl::opt< boolMISchedPostRA ("misched-postra", cl::Hidden, cl::desc("Run MachineScheduler post regalloc (independent of preRA sched)"))
 
static cl::opt< boolEarlyLiveIntervals ("early-live-intervals", cl::Hidden, cl::desc("Run live interval analysis earlier in the pipeline"))
 
static cl::opt< boolUseCFLAA ("use-cfl-aa-in-codegen", cl::init(false), cl::Hidden, cl::desc("Enable the new, experimental CFL alias analysis in CodeGen"))
 
static RegisterRegAlloc defaultRegAlloc ("default","pick register allocator based on -O option", useDefaultRegisterAllocator)
 
static cl::opt
< RegisterRegAlloc::FunctionPassCtor,
false, RegisterPassParser
< RegisterRegAlloc > > 
RegAlloc ("regalloc", cl::init(&useDefaultRegisterAllocator), cl::desc("Register allocator to use"))
 -regalloc=... command line option. More...
 

Function Documentation

static IdentifyingPassPtr applyDisable ( IdentifyingPassPtr  PassID,
bool  Override 
)
static

Allow standard passes to be disabled by command line options.

This supports simple binary flags that either suppress the pass or do nothing. i.e. -disable-mypass=false has no effect. These should be converted to boolOrDefault in order to use applyOverride.

Definition at line 116 of file Passes.cpp.

Referenced by overridePass().

static IdentifyingPassPtr overridePass ( AnalysisID  StandardID,
IdentifyingPassPtr  TargetID 
)
static

Allow standard passes to be disabled by the command line, regardless of who is adding the pass.

StandardID is the pass identified in the standard pass pipeline and provided to addPass(). It may be a target-specific ID in the case that the target directly adds its own pass, but in that case we harmlessly fall through.

TargetID is the pass that the target has configured to override StandardID.

StandardID may be a pseudo ID. In that case TargetID is the name of the real pass to run. This allows multiple options to control a single pass depending on where in the pipeline that pass is added.

Definition at line 135 of file Passes.cpp.

References applyDisable(), llvm::BranchFolderPassID, llvm::DeadMachineInstructionElimID, DisableBlockPlacement, DisableBranchFold, DisableCopyProp, DisableEarlyIfConversion, DisableEarlyTailDup, DisableMachineCSE, DisableMachineDCE, DisableMachineLICM, DisableMachineSink, DisablePostRA, DisablePostRAMachineLICM, DisableSSC, DisableTailDuplicate, llvm::EarlyIfConverterID, llvm::TargetPassConfig::EarlyTailDuplicateID, llvm::MachineBlockPlacementID, llvm::MachineCopyPropagationID, llvm::MachineCSEID, llvm::MachineLICMID, llvm::MachineSinkingID, llvm::TargetPassConfig::PostRAMachineLICMID, llvm::PostRASchedulerID, llvm::StackSlotColoringID, and llvm::TailDuplicateID.

Referenced by llvm::TargetPassConfig::addPass().

static FunctionPass* useDefaultRegisterAllocator ( )
static

A dummy default pass factory indicates whether the register allocator is overridden on the command line.

Definition at line 655 of file Passes.cpp.

Referenced by llvm::TargetPassConfig::createRegAllocPass().

Variable Documentation

RegisterRegAlloc defaultRegAlloc("default","pick register allocator based on -O option", useDefaultRegisterAllocator)
static
cl::opt<bool> DisableBlockPlacement("disable-block-placement", cl::Hidden, cl::desc("Disable probability-driven block placement"))
static

Referenced by overridePass().

cl::opt<bool> DisableBranchFold("disable-branch-fold", cl::Hidden, cl::desc("Disable branch folding"))
static

Referenced by overridePass().

cl::opt<bool> DisableCGP("disable-cgp", cl::Hidden, cl::desc("Disable Codegen Prepare"))
static
cl::opt<bool> DisableConstantHoisting("disable-constant-hoisting", cl::Hidden, cl::desc("Disable ConstantHoisting"))
static
cl::opt<bool> DisableCopyProp("disable-copyprop", cl::Hidden, cl::desc("Disable Copy Propagation pass"))
static

Referenced by overridePass().

cl::opt<bool> DisableEarlyIfConversion("disable-early-ifcvt", cl::Hidden, cl::desc("Disable Early If-conversion"))
static

Referenced by overridePass().

cl::opt<bool> DisableEarlyTailDup("disable-early-taildup", cl::Hidden, cl::desc("Disable pre-register allocation tail duplication"))
static

Referenced by overridePass().

cl::opt<bool> DisableLSR("disable-lsr", cl::Hidden, cl::desc("Disable Loop Strength Reduction Pass"))
static
cl::opt<bool> DisableMachineCSE("disable-machine-cse", cl::Hidden, cl::desc("Disable Machine Common Subexpression Elimination"))
static

Referenced by overridePass().

cl::opt<bool> DisableMachineDCE("disable-machine-dce", cl::Hidden, cl::desc("Disable Machine Dead Code Elimination"))
static

Referenced by overridePass().

cl::opt<bool> DisableMachineLICM("disable-machine-licm", cl::Hidden, cl::desc("Disable Machine LICM"))
static

Referenced by overridePass().

cl::opt<bool> DisableMachineSink("disable-machine-sink", cl::Hidden, cl::desc("Disable Machine Sinking"))
static

Referenced by overridePass().

cl::opt<bool> DisablePartialLibcallInlining("disable-partial-libcall-inlining", cl::Hidden, cl::desc("Disable Partial Libcall Inlining"))
static
cl::opt<bool> DisablePostRA("disable-post-ra", cl::Hidden, cl::desc("Disable Post Regalloc"))
static

Referenced by overridePass().

cl::opt<bool> DisablePostRAMachineLICM("disable-postra-machine-licm", cl::Hidden, cl::desc("Disable Machine LICM"))
static

Referenced by overridePass().

cl::opt<bool> DisableSSC("disable-ssc", cl::Hidden, cl::desc("Disable Stack Slot Coloring"))
static

Referenced by overridePass().

cl::opt<bool> DisableTailDuplicate("disable-tail-duplicate", cl::Hidden, cl::desc("Disable tail duplication"))
static

Referenced by overridePass().

cl::opt<bool> EarlyLiveIntervals("early-live-intervals", cl::Hidden, cl::desc("Run live interval analysis earlier in the pipeline"))
static
cl::opt<bool> EnableBlockPlacementStats("enable-block-placement-stats", cl::Hidden, cl::desc("Collect probability-driven block placement stats"))
static
cl::opt<bool> EnableImplicitNullChecks("enable-implicit-null-checks", cl::desc("Fold null checks into faulting memory operations"), cl::init(false))
static
cl::opt<cl::boolOrDefault> EnableShrinkWrapOpt("enable-shrink-wrap", cl::Hidden, cl::desc("enable the shrink-wrapping pass"))
static
cl::opt<bool> MISchedPostRA("misched-postra", cl::Hidden, cl::desc("Run MachineScheduler post regalloc (independent of preRA sched)"))
static
cl::opt<cl::boolOrDefault> OptimizeRegAlloc("optimize-regalloc", cl::Hidden, cl::desc("Enable optimized register allocation compilation path."))
static
cl::opt<bool> PrintGCInfo("print-gc", cl::Hidden, cl::desc("Dump garbage collector data"))
static
cl::opt<bool> PrintISelInput("print-isel-input", cl::Hidden, cl::desc("Print LLVM IR input to isel pass"))
static
cl::opt<bool> PrintLSR("print-lsr-output", cl::Hidden, cl::desc("Print LLVM IR produced by the loop-reduce pass"))
static
cl::opt<std::string> PrintMachineInstrs("print-machineinstrs", cl::ValueOptional, cl::desc("Print machine instrs"), cl::value_desc("pass-name"), cl::init("option-unspecified"))
static
cl::opt<RegisterRegAlloc::FunctionPassCtor, false, RegisterPassParser<RegisterRegAlloc> > RegAlloc("regalloc", cl::init(&useDefaultRegisterAllocator), cl::desc("Register allocator to use"))
static
cl::opt<bool> UseCFLAA("use-cfl-aa-in-codegen", cl::init(false), cl::Hidden, cl::desc("Enable the new, experimental CFL alias analysis in CodeGen"))
static
cl::opt<bool> VerifyMachineCode("verify-machineinstrs", cl::Hidden, cl::desc("Verify generated machine code"), cl::init(false), cl::ZeroOrMore)
static