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LLVM
3.7.0
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MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc. More...
#include <MachineRegisterInfo.h>
Classes | |
| class | defusechain_instr_iterator |
| defusechain_iterator - This class provides iterator support for machine operands in the function that use or define a specific register. More... | |
| class | defusechain_iterator |
| reg_begin/reg_end - Provide iteration support to walk over all definitions and uses of a register within the MachineFunction that corresponds to this MachineRegisterInfo object. More... | |
| class | Delegate |
Public Types | |
| typedef defusechain_iterator < true, true, false, true, false, false > | reg_iterator |
| reg_iterator/reg_begin/reg_end - Walk all defs and uses of the specified register. More... | |
| typedef defusechain_instr_iterator < true, true, false, false, true, false > | reg_instr_iterator |
| reg_instr_iterator/reg_instr_begin/reg_instr_end - Walk all defs and uses of the specified register, stepping by MachineInstr. More... | |
| typedef defusechain_instr_iterator < true, true, false, false, false, true > | reg_bundle_iterator |
| reg_bundle_iterator/reg_bundle_begin/reg_bundle_end - Walk all defs and uses of the specified register, stepping by bundle. More... | |
| typedef defusechain_iterator < true, true, true, true, false, false > | reg_nodbg_iterator |
| reg_nodbg_iterator/reg_nodbg_begin/reg_nodbg_end - Walk all defs and uses of the specified register, skipping those marked as Debug. More... | |
| typedef defusechain_instr_iterator < true, true, true, false, true, false > | reg_instr_nodbg_iterator |
| reg_instr_nodbg_iterator/reg_instr_nodbg_begin/reg_instr_nodbg_end - Walk all defs and uses of the specified register, stepping by MachineInstr, skipping those marked as Debug. More... | |
| typedef defusechain_instr_iterator < true, true, true, false, false, true > | reg_bundle_nodbg_iterator |
| reg_bundle_nodbg_iterator/reg_bundle_nodbg_begin/reg_bundle_nodbg_end - Walk all defs and uses of the specified register, stepping by bundle, skipping those marked as Debug. More... | |
| typedef defusechain_iterator < false, true, false, true, false, false > | def_iterator |
| def_iterator/def_begin/def_end - Walk all defs of the specified register. More... | |
| typedef defusechain_instr_iterator < false, true, false, false, true, false > | def_instr_iterator |
| def_instr_iterator/def_instr_begin/def_instr_end - Walk all defs of the specified register, stepping by MachineInst. More... | |
| typedef defusechain_instr_iterator < false, true, false, false, false, true > | def_bundle_iterator |
| def_bundle_iterator/def_bundle_begin/def_bundle_end - Walk all defs of the specified register, stepping by bundle. More... | |
| typedef defusechain_iterator < true, false, false, true, false, false > | use_iterator |
| use_iterator/use_begin/use_end - Walk all uses of the specified register. More... | |
| typedef defusechain_instr_iterator < true, false, false, false, true, false > | use_instr_iterator |
| use_instr_iterator/use_instr_begin/use_instr_end - Walk all uses of the specified register, stepping by MachineInstr. More... | |
| typedef defusechain_instr_iterator < true, false, false, false, false, true > | use_bundle_iterator |
| use_bundle_iterator/use_bundle_begin/use_bundle_end - Walk all uses of the specified register, stepping by bundle. More... | |
| typedef defusechain_iterator < true, false, true, true, false, false > | use_nodbg_iterator |
| use_nodbg_iterator/use_nodbg_begin/use_nodbg_end - Walk all uses of the specified register, skipping those marked as Debug. More... | |
| typedef defusechain_instr_iterator < true, false, true, false, true, false > | use_instr_nodbg_iterator |
| use_instr_nodbg_iterator/use_instr_nodbg_begin/use_instr_nodbg_end - Walk all uses of the specified register, stepping by MachineInstr, skipping those marked as Debug. More... | |
| typedef defusechain_instr_iterator < true, false, true, false, false, true > | use_bundle_nodbg_iterator |
| use_bundle_nodbg_iterator/use_bundle_nodbg_begin/use_bundle_nodbg_end - Walk all uses of the specified register, stepping by bundle, skipping those marked as Debug. More... | |
| typedef std::vector< std::pair < unsigned, unsigned > >::const_iterator | livein_iterator |
Public Member Functions | |
| MachineRegisterInfo (const MachineFunction *MF) | |
| const TargetRegisterInfo * | getTargetRegisterInfo () const |
| void | resetDelegate (Delegate *delegate) |
| void | setDelegate (Delegate *delegate) |
| bool | isSSA () const |
| void | leaveSSA () |
| bool | tracksLiveness () const |
| tracksLiveness - Returns true when tracking register liveness accurately. More... | |
| void | invalidateLiveness () |
| invalidateLiveness - Indicates that register liveness is no longer being tracked accurately. More... | |
| bool | shouldTrackSubRegLiveness (const TargetRegisterClass &RC) const |
Returns true if liveness for register class RC should be tracked at the subregister level. More... | |
| bool | shouldTrackSubRegLiveness (unsigned VReg) const |
| bool | subRegLivenessEnabled () const |
| void | enableSubRegLiveness (bool Enable=true) |
| void | addRegOperandToUseList (MachineOperand *MO) |
| Add MO to the linked list of operands for its register. More... | |
| void | removeRegOperandFromUseList (MachineOperand *MO) |
| Remove MO from its use-def list. More... | |
| void | moveOperands (MachineOperand *Dst, MachineOperand *Src, unsigned NumOps) |
| Move NumOps operands from Src to Dst, updating use-def lists as needed. More... | |
| void | verifyUseList (unsigned Reg) const |
| Verify the sanity of the use list for Reg. More... | |
| void | verifyUseLists () const |
| Verify the use list of all registers. More... | |
| reg_iterator | reg_begin (unsigned RegNo) const |
| iterator_range< reg_iterator > | reg_operands (unsigned Reg) const |
| reg_instr_iterator | reg_instr_begin (unsigned RegNo) const |
| iterator_range < reg_instr_iterator > | reg_instructions (unsigned Reg) const |
| reg_bundle_iterator | reg_bundle_begin (unsigned RegNo) const |
| iterator_range < reg_bundle_iterator > | reg_bundles (unsigned Reg) const |
| bool | reg_empty (unsigned RegNo) const |
| reg_empty - Return true if there are no instructions using or defining the specified register (it may be live-in). More... | |
| reg_nodbg_iterator | reg_nodbg_begin (unsigned RegNo) const |
| iterator_range < reg_nodbg_iterator > | reg_nodbg_operands (unsigned Reg) const |
| reg_instr_nodbg_iterator | reg_instr_nodbg_begin (unsigned RegNo) const |
| iterator_range < reg_instr_nodbg_iterator > | reg_nodbg_instructions (unsigned Reg) const |
| reg_bundle_nodbg_iterator | reg_bundle_nodbg_begin (unsigned RegNo) const |
| iterator_range < reg_bundle_nodbg_iterator > | reg_nodbg_bundles (unsigned Reg) const |
| bool | reg_nodbg_empty (unsigned RegNo) const |
| reg_nodbg_empty - Return true if the only instructions using or defining Reg are Debug instructions. More... | |
| def_iterator | def_begin (unsigned RegNo) const |
| iterator_range< def_iterator > | def_operands (unsigned Reg) const |
| def_instr_iterator | def_instr_begin (unsigned RegNo) const |
| iterator_range < def_instr_iterator > | def_instructions (unsigned Reg) const |
| def_bundle_iterator | def_bundle_begin (unsigned RegNo) const |
| iterator_range < def_bundle_iterator > | def_bundles (unsigned Reg) const |
| bool | def_empty (unsigned RegNo) const |
| def_empty - Return true if there are no instructions defining the specified register (it may be live-in). More... | |
| bool | hasOneDef (unsigned RegNo) const |
| hasOneDef - Return true if there is exactly one instruction defining the specified register. More... | |
| use_iterator | use_begin (unsigned RegNo) const |
| iterator_range< use_iterator > | use_operands (unsigned Reg) const |
| use_instr_iterator | use_instr_begin (unsigned RegNo) const |
| iterator_range < use_instr_iterator > | use_instructions (unsigned Reg) const |
| use_bundle_iterator | use_bundle_begin (unsigned RegNo) const |
| iterator_range < use_bundle_iterator > | use_bundles (unsigned Reg) const |
| bool | use_empty (unsigned RegNo) const |
| use_empty - Return true if there are no instructions using the specified register. More... | |
| bool | hasOneUse (unsigned RegNo) const |
| hasOneUse - Return true if there is exactly one instruction using the specified register. More... | |
| use_nodbg_iterator | use_nodbg_begin (unsigned RegNo) const |
| iterator_range < use_nodbg_iterator > | use_nodbg_operands (unsigned Reg) const |
| use_instr_nodbg_iterator | use_instr_nodbg_begin (unsigned RegNo) const |
| iterator_range < use_instr_nodbg_iterator > | use_nodbg_instructions (unsigned Reg) const |
| use_bundle_nodbg_iterator | use_bundle_nodbg_begin (unsigned RegNo) const |
| iterator_range < use_bundle_nodbg_iterator > | use_nodbg_bundles (unsigned Reg) const |
| bool | use_nodbg_empty (unsigned RegNo) const |
| use_nodbg_empty - Return true if there are no non-Debug instructions using the specified register. More... | |
| bool | hasOneNonDBGUse (unsigned RegNo) const |
| hasOneNonDBGUse - Return true if there is exactly one non-Debug instruction using the specified register. More... | |
| void | replaceRegWith (unsigned FromReg, unsigned ToReg) |
| replaceRegWith - Replace all instances of FromReg with ToReg in the machine function. More... | |
| MachineInstr * | getVRegDef (unsigned Reg) const |
| getVRegDef - Return the machine instr that defines the specified virtual register or null if none is found. More... | |
| MachineInstr * | getUniqueVRegDef (unsigned Reg) const |
| getUniqueVRegDef - Return the unique machine instr that defines the specified virtual register or null if none is found. More... | |
| void | clearKillFlags (unsigned Reg) const |
| clearKillFlags - Iterate over all the uses of the given register and clear the kill flag from the MachineOperand. More... | |
| void | dumpUses (unsigned RegNo) const |
| bool | isConstantPhysReg (unsigned PhysReg, const MachineFunction &MF) const |
| isConstantPhysReg - Returns true if PhysReg is unallocatable and constant throughout the function. More... | |
| PSetIterator | getPressureSets (unsigned RegUnit) const |
| Get an iterator over the pressure sets affected by the given physical or virtual register. More... | |
| const TargetRegisterClass * | getRegClass (unsigned Reg) const |
| getRegClass - Return the register class of the specified virtual register. More... | |
| void | setRegClass (unsigned Reg, const TargetRegisterClass *RC) |
| setRegClass - Set the register class of the specified virtual register. More... | |
| const TargetRegisterClass * | constrainRegClass (unsigned Reg, const TargetRegisterClass *RC, unsigned MinNumRegs=0) |
| constrainRegClass - Constrain the register class of the specified virtual register to be a common subclass of RC and the current register class, but only if the new class has at least MinNumRegs registers. More... | |
| bool | recomputeRegClass (unsigned Reg) |
| recomputeRegClass - Try to find a legal super-class of Reg's register class that still satisfies the constraints from the instructions using Reg. More... | |
| unsigned | createVirtualRegister (const TargetRegisterClass *RegClass) |
| createVirtualRegister - Create and return a new virtual register in the function with the specified register class. More... | |
| unsigned | getNumVirtRegs () const |
| getNumVirtRegs - Return the number of virtual registers created. More... | |
| void | clearVirtRegs () |
| clearVirtRegs - Remove all virtual registers (after physreg assignment). More... | |
| void | setRegAllocationHint (unsigned VReg, unsigned Type, unsigned PrefReg) |
| setRegAllocationHint - Specify a register allocation hint for the specified virtual register. More... | |
| std::pair< unsigned, unsigned > | getRegAllocationHint (unsigned VReg) const |
| getRegAllocationHint - Return the register allocation hint for the specified virtual register. More... | |
| unsigned | getSimpleHint (unsigned VReg) const |
| getSimpleHint - Return the preferred register allocation hint, or 0 if a standard simple hint (Type == 0) is not set. More... | |
| void | markUsesInDebugValueAsUndef (unsigned Reg) const |
| markUsesInDebugValueAsUndef - Mark every DBG_VALUE referencing the specified register as undefined which causes the DBG_VALUE to be deleted during LiveDebugVariables analysis. More... | |
| bool | isPhysRegModified (unsigned PhysReg) const |
| Return true if the specified register is modified in this function. More... | |
| bool | isPhysRegUsed (unsigned Reg) const |
| isPhysRegUsed - Return true if the specified register is used in this function. More... | |
| void | setRegUnitUsed (unsigned RegUnit) |
| Mark the specified register unit as used in this function. More... | |
| void | setPhysRegUsed (unsigned Reg) |
| setPhysRegUsed - Mark the specified register used in this function. More... | |
| void | addPhysRegsUsedFromRegMask (const uint32_t *RegMask) |
| addPhysRegsUsedFromRegMask - Mark any registers not in RegMask as used. More... | |
| void | setPhysRegUnused (unsigned Reg) |
| setPhysRegUnused - Mark the specified register unused in this function. More... | |
| void | freezeReservedRegs (const MachineFunction &) |
| freezeReservedRegs - Called by the register allocator to freeze the set of reserved registers before allocation begins. More... | |
| bool | reservedRegsFrozen () const |
| reservedRegsFrozen - Returns true after freezeReservedRegs() was called to ensure the set of reserved registers stays constant. More... | |
| bool | canReserveReg (unsigned PhysReg) const |
| canReserveReg - Returns true if PhysReg can be used as a reserved register. More... | |
| const BitVector & | getReservedRegs () const |
| getReservedRegs - Returns a reference to the frozen set of reserved registers. More... | |
| bool | isReserved (unsigned PhysReg) const |
| isReserved - Returns true when PhysReg is a reserved register. More... | |
| bool | isAllocatable (unsigned PhysReg) const |
| isAllocatable - Returns true when PhysReg belongs to an allocatable register class and it hasn't been reserved. More... | |
| void | addLiveIn (unsigned Reg, unsigned vreg=0) |
| addLiveIn - Add the specified register as a live-in. More... | |
| livein_iterator | livein_begin () const |
| livein_iterator | livein_end () const |
| bool | livein_empty () const |
| bool | isLiveIn (unsigned Reg) const |
| unsigned | getLiveInPhysReg (unsigned VReg) const |
| getLiveInPhysReg - If VReg is a live-in virtual register, return the corresponding live-in physical register. More... | |
| unsigned | getLiveInVirtReg (unsigned PReg) const |
| getLiveInVirtReg - If PReg is a live-in physical register, return the corresponding live-in physical register. More... | |
| void | EmitLiveInCopies (MachineBasicBlock *EntryMBB, const TargetRegisterInfo &TRI, const TargetInstrInfo &TII) |
| EmitLiveInCopies - Emit copies to initialize livein virtual registers into the given entry block. More... | |
| unsigned | getMaxLaneMaskForVReg (unsigned Reg) const |
Returns a mask covering all bits that can appear in lane masks of subregisters of the virtual register Reg. More... | |
Static Public Member Functions | |
| static reg_iterator | reg_end () |
| static reg_instr_iterator | reg_instr_end () |
| static reg_bundle_iterator | reg_bundle_end () |
| static reg_nodbg_iterator | reg_nodbg_end () |
| static reg_instr_nodbg_iterator | reg_instr_nodbg_end () |
| static reg_bundle_nodbg_iterator | reg_bundle_nodbg_end () |
| static def_iterator | def_end () |
| static def_instr_iterator | def_instr_end () |
| static def_bundle_iterator | def_bundle_end () |
| static use_iterator | use_end () |
| static use_instr_iterator | use_instr_end () |
| static use_bundle_iterator | use_bundle_end () |
| static use_nodbg_iterator | use_nodbg_end () |
| static use_instr_nodbg_iterator | use_instr_nodbg_end () |
| static use_bundle_nodbg_iterator | use_bundle_nodbg_end () |
Friends | |
| template<bool , bool , bool , bool , bool , bool > | |
| class | defusechain_iterator |
| template<bool , bool , bool , bool , bool , bool > | |
| class | defusechain_instr_iterator |
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
Definition at line 32 of file MachineRegisterInfo.h.
| typedef defusechain_instr_iterator<false,true,false,false,false,true> llvm::MachineRegisterInfo::def_bundle_iterator |
def_bundle_iterator/def_bundle_begin/def_bundle_end - Walk all defs of the specified register, stepping by bundle.
Definition at line 380 of file MachineRegisterInfo.h.
| typedef defusechain_instr_iterator<false,true,false,false,true,false> llvm::MachineRegisterInfo::def_instr_iterator |
def_instr_iterator/def_instr_begin/def_instr_end - Walk all defs of the specified register, stepping by MachineInst.
Definition at line 363 of file MachineRegisterInfo.h.
| typedef defusechain_iterator<false,true,false,true,false,false> llvm::MachineRegisterInfo::def_iterator |
def_iterator/def_begin/def_end - Walk all defs of the specified register.
Definition at line 350 of file MachineRegisterInfo.h.
| typedef std::vector<std::pair<unsigned,unsigned> >::const_iterator llvm::MachineRegisterInfo::livein_iterator |
Definition at line 777 of file MachineRegisterInfo.h.
| typedef defusechain_instr_iterator<true,true,false,false,false,true> llvm::MachineRegisterInfo::reg_bundle_iterator |
reg_bundle_iterator/reg_bundle_begin/reg_bundle_end - Walk all defs and uses of the specified register, stepping by bundle.
Definition at line 272 of file MachineRegisterInfo.h.
| typedef defusechain_instr_iterator<true,true,true,false,false,true> llvm::MachineRegisterInfo::reg_bundle_nodbg_iterator |
reg_bundle_nodbg_iterator/reg_bundle_nodbg_begin/reg_bundle_nodbg_end - Walk all defs and uses of the specified register, stepping by bundle, skipping those marked as Debug.
Definition at line 328 of file MachineRegisterInfo.h.
| typedef defusechain_instr_iterator<true,true,false,false,true,false> llvm::MachineRegisterInfo::reg_instr_iterator |
reg_instr_iterator/reg_instr_begin/reg_instr_end - Walk all defs and uses of the specified register, stepping by MachineInstr.
Definition at line 255 of file MachineRegisterInfo.h.
| typedef defusechain_instr_iterator<true,true,true,false,true,false> llvm::MachineRegisterInfo::reg_instr_nodbg_iterator |
reg_instr_nodbg_iterator/reg_instr_nodbg_begin/reg_instr_nodbg_end - Walk all defs and uses of the specified register, stepping by MachineInstr, skipping those marked as Debug.
Definition at line 310 of file MachineRegisterInfo.h.
| typedef defusechain_iterator<true,true,false,true,false,false> llvm::MachineRegisterInfo::reg_iterator |
reg_iterator/reg_begin/reg_end - Walk all defs and uses of the specified register.
Definition at line 242 of file MachineRegisterInfo.h.
| typedef defusechain_iterator<true,true,true,true,false,false> llvm::MachineRegisterInfo::reg_nodbg_iterator |
reg_nodbg_iterator/reg_nodbg_begin/reg_nodbg_end - Walk all defs and uses of the specified register, skipping those marked as Debug.
Definition at line 292 of file MachineRegisterInfo.h.
| typedef defusechain_instr_iterator<true,false,false,false,false,true> llvm::MachineRegisterInfo::use_bundle_iterator |
use_bundle_iterator/use_bundle_begin/use_bundle_end - Walk all uses of the specified register, stepping by bundle.
Definition at line 438 of file MachineRegisterInfo.h.
| typedef defusechain_instr_iterator<true,false,true,false,false,true> llvm::MachineRegisterInfo::use_bundle_nodbg_iterator |
use_bundle_nodbg_iterator/use_bundle_nodbg_begin/use_bundle_nodbg_end - Walk all uses of the specified register, stepping by bundle, skipping those marked as Debug.
Definition at line 503 of file MachineRegisterInfo.h.
| typedef defusechain_instr_iterator<true,false,false,false,true,false> llvm::MachineRegisterInfo::use_instr_iterator |
use_instr_iterator/use_instr_begin/use_instr_end - Walk all uses of the specified register, stepping by MachineInstr.
Definition at line 421 of file MachineRegisterInfo.h.
| typedef defusechain_instr_iterator<true,false,true,false,true,false> llvm::MachineRegisterInfo::use_instr_nodbg_iterator |
use_instr_nodbg_iterator/use_instr_nodbg_begin/use_instr_nodbg_end - Walk all uses of the specified register, stepping by MachineInstr, skipping those marked as Debug.
Definition at line 485 of file MachineRegisterInfo.h.
| typedef defusechain_iterator<true,false,false,true,false,false> llvm::MachineRegisterInfo::use_iterator |
use_iterator/use_begin/use_end - Walk all uses of the specified register.
Definition at line 408 of file MachineRegisterInfo.h.
| typedef defusechain_iterator<true,false,true,true,false,false> llvm::MachineRegisterInfo::use_nodbg_iterator |
use_nodbg_iterator/use_nodbg_begin/use_nodbg_end - Walk all uses of the specified register, skipping those marked as Debug.
Definition at line 467 of file MachineRegisterInfo.h.
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explicit |
Definition at line 27 of file MachineRegisterInfo.cpp.
References getTargetRegisterInfo(), and llvm::BitVector::resize().
addLiveIn - Add the specified register as a live-in.
Note that it is an error to add the same register to the same set more than once.
Definition at line 770 of file MachineRegisterInfo.h.
Referenced by llvm::MachineFunction::addLiveIn(), addLiveIn(), llvm::AMDGPUTargetLowering::CreateLiveInRegister(), llvm::HexagonTargetLowering::LowerFormalArguments(), llvm::SystemZTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), and llvm::R600TargetLowering::LowerOperation().
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inline |
addPhysRegsUsedFromRegMask - Mark any registers not in RegMask as used.
This corresponds to the bit mask attached to register mask operands.
Definition at line 691 of file MachineRegisterInfo.h.
References llvm::BitVector::setBitsNotInMask().
| void MachineRegisterInfo::addRegOperandToUseList | ( | MachineOperand * | MO | ) |
Add MO to the linked list of operands for its register.
Definition at line 170 of file MachineRegisterInfo.cpp.
References llvm::MachineOperand::getReg(), llvm::MachineOperand::isDef(), and llvm::MachineOperand::Reg.
Referenced by llvm::MachineOperand::ChangeToRegister(), llvm::MachineOperand::setIsDef(), and llvm::MachineOperand::setReg().
canReserveReg - Returns true if PhysReg can be used as a reserved register.
Any register can be reserved before freezeReservedRegs() is called.
Definition at line 730 of file MachineRegisterInfo.h.
References reservedRegsFrozen(), and llvm::BitVector::test().
Referenced by llvm::MipsRegisterInfo::canRealignStack(), llvm::X86RegisterInfo::canRealignStack(), and llvm::ARMBaseRegisterInfo::canRealignStack().
| void MachineRegisterInfo::clearKillFlags | ( | unsigned | Reg | ) | const |
clearKillFlags - Iterate over all the uses of the given register and clear the kill flag from the MachineOperand.
This function is used by optimization passes which extend register lifetimes and need only preserve conservative kill flag information.
Definition at line 335 of file MachineRegisterInfo.cpp.
References use_operands().
Referenced by llvm::HexagonInstrInfo::expandPostRAPseudo(), llvm::AArch64InstrInfo::insertSelect(), llvm::HexagonInstrInfo::PredicateInstruction(), and llvm::SelectionDAGISel::runOnMachineFunction().
| void MachineRegisterInfo::clearVirtRegs | ( | ) |
clearVirtRegs - Remove all virtual registers (after physreg assignment).
Definition at line 109 of file MachineRegisterInfo.cpp.
References getNumVirtRegs(), llvm::TargetRegisterInfo::index2VirtReg(), llvm_unreachable, and verifyUseList().
| const TargetRegisterClass * MachineRegisterInfo::constrainRegClass | ( | unsigned | Reg, |
| const TargetRegisterClass * | RC, | ||
| unsigned | MinNumRegs = 0 |
||
| ) |
constrainRegClass - Constrain the register class of the specified virtual register to be a common subclass of RC and the current register class, but only if the new class has at least MinNumRegs registers.
Return the new register class, or NULL if no such class exists. This should only be used when the constraint is known to be trivial, like GR32 -> GR32_NOSP. Beware of increasing register pressure.
Definition at line 48 of file MachineRegisterInfo.cpp.
References llvm::TargetRegisterInfo::getCommonSubClass(), llvm::TargetRegisterClass::getNumRegs(), getRegClass(), getTargetRegisterInfo(), and setRegClass().
Referenced by llvm::MachineBasicBlock::addLiveIn(), llvm::X86InstrInfo::classifyLEAReg(), llvm::FastISel::constrainOperandRegClass(), llvm::SystemZInstrInfo::convertToThreeAddress(), llvm::X86InstrInfo::convertToThreeAddress(), llvm::FastISel::fastEmitInst_extractsubreg(), llvm::AArch64InstrInfo::foldMemoryOperandImpl(), genMadd(), genMaddR(), llvm::AArch64InstrInfo::insertSelect(), llvm::Thumb2InstrInfo::loadRegFromStackSlot(), llvm::AArch64InstrInfo::loadRegFromStackSlot(), llvm::AArch64RegisterInfo::materializeFrameBaseRegister(), llvm::PPCRegisterInfo::materializeFrameBaseRegister(), llvm::ARMBaseRegisterInfo::materializeFrameBaseRegister(), llvm::ARMBaseInstrInfo::optimizeSelect(), reassociateOps(), llvm::PPCRegisterInfo::resolveFrameIndex(), llvm::SelectionDAGISel::runOnMachineFunction(), llvm::Thumb2InstrInfo::storeRegToStackSlot(), llvm::AArch64InstrInfo::storeRegToStackSlot(), and UpdateOperandRegClass().
| unsigned MachineRegisterInfo::createVirtualRegister | ( | const TargetRegisterClass * | RegClass | ) |
createVirtualRegister - Create and return a new virtual register in the function with the specified register class.
Definition at line 93 of file MachineRegisterInfo.cpp.
References getNumVirtRegs(), llvm::TargetRegisterInfo::index2VirtReg(), llvm::TargetRegisterClass::isAllocatable(), and llvm::MachineRegisterInfo::Delegate::MRI_NoteNewVirtualRegister().
Referenced by llvm::MachineFunction::addLiveIn(), llvm::MachineBasicBlock::addLiveIn(), addLiveIn(), llvm::X86InstrInfo::classifyLEAReg(), llvm::LiveRangeEdit::createEmptyIntervalFrom(), llvm::LiveRangeEdit::createFrom(), llvm::AMDGPUTargetLowering::CreateLiveInRegister(), llvm::FunctionLoweringInfo::CreateReg(), llvm::FastISel::createResultReg(), llvm::HexagonInstrInfo::createVR(), llvm::SystemZRegisterInfo::eliminateFrameIndex(), llvm::ThumbRegisterInfo::eliminateFrameIndex(), llvm::AArch64RegisterInfo::eliminateFrameIndex(), llvm::PPCRegisterInfo::eliminateFrameIndex(), llvm::ARMBaseRegisterInfo::eliminateFrameIndex(), llvm::PPCTargetLowering::EmitAtomicBinary(), llvm::PPCTargetLowering::emitEHSjLjLongJmp(), llvm::PPCTargetLowering::emitEHSjLjSetJmp(), llvm::R600TargetLowering::EmitInstrWithCustomInserter(), llvm::SITargetLowering::EmitInstrWithCustomInserter(), llvm::ARMTargetLowering::EmitInstrWithCustomInserter(), llvm::PPCTargetLowering::EmitInstrWithCustomInserter(), llvm::X86TargetLowering::EmitInstrWithCustomInserter(), llvm::PPCTargetLowering::EmitPartwordAtomicBinary(), llvm::MipsSEFrameLowering::emitPrologue(), llvm::MSP430TargetLowering::EmitShiftInstr(), emitThumbRegPlusImmInReg(), llvm::SparcTargetLowering::expandAtomicRMW(), llvm::ARMBaseInstrInfo::FoldImmediate(), forceReg(), llvm::AArch64InstrInfo::genAlternativeCodeSequence(), llvm::MipsFunctionInfo::getGlobalBaseReg(), llvm::SparcInstrInfo::getGlobalBaseReg(), llvm::X86InstrInfo::getGlobalBaseReg(), llvm::MipsFunctionInfo::getMips16SPAliasReg(), GetRegistersForValue(), llvm::MIRParserImpl::initializeRegisterInfo(), InsertNewDef(), llvm::SIInstrInfo::legalizeOperands(), llvm::SIInstrInfo::legalizeOpWithMove(), llvm::MipsSEInstrInfo::loadImmediate(), llvm::PPCRegisterInfo::lowerCRBitRestore(), llvm::PPCRegisterInfo::lowerCRBitSpilling(), llvm::PPCRegisterInfo::lowerCRRestore(), llvm::PPCRegisterInfo::lowerCRSpilling(), llvm::PPCRegisterInfo::lowerDynamicAlloc(), llvm::HexagonTargetLowering::LowerFormalArguments(), llvm::SystemZTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::PPCRegisterInfo::lowerVRSAVERestore(), llvm::PPCRegisterInfo::lowerVRSAVESpilling(), llvm::SIInstrInfo::moveSMRDToVALU(), llvm::SIInstrInfo::moveToVALU(), reassociateOps(), and llvm::SIInstrInfo::splitSMRD().
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Definition at line 351 of file MachineRegisterInfo.h.
Referenced by def_empty(), def_operands(), hasOneDef(), isKilled(), isPhysRegModified(), and MustSaveLR().
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Definition at line 381 of file MachineRegisterInfo.h.
Referenced by def_bundles().
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Definition at line 384 of file MachineRegisterInfo.h.
Referenced by def_bundles().
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Definition at line 388 of file MachineRegisterInfo.h.
References def_bundle_begin(), and def_bundle_end().
def_empty - Return true if there are no instructions defining the specified register (it may be live-in).
Definition at line 395 of file MachineRegisterInfo.h.
References def_begin(), and def_end().
Referenced by getUniqueVRegDef(), and isConstantPhysReg().
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Definition at line 354 of file MachineRegisterInfo.h.
Referenced by def_empty(), def_operands(), hasOneDef(), isKilled(), isPhysRegModified(), and MustSaveLR().
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Definition at line 364 of file MachineRegisterInfo.h.
Referenced by def_instructions(), getUniqueVRegDef(), getVRegDef(), and regIsPICBase().
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Definition at line 367 of file MachineRegisterInfo.h.
Referenced by def_instructions(), getUniqueVRegDef(), getVRegDef(), and regIsPICBase().
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Definition at line 372 of file MachineRegisterInfo.h.
References def_instr_begin(), and def_instr_end().
Referenced by getSingleDef(), and isImplicitlyDefined().
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Definition at line 356 of file MachineRegisterInfo.h.
References def_begin(), and def_end().
Referenced by llvm::LiveRangeCalc::createDeadDefs().
| void MachineRegisterInfo::dumpUses | ( | unsigned | RegNo | ) | const |
Definition at line 406 of file MachineRegisterInfo.cpp.
References I, and use_instructions().
| void MachineRegisterInfo::EmitLiveInCopies | ( | MachineBasicBlock * | EntryMBB, |
| const TargetRegisterInfo & | TRI, | ||
| const TargetInstrInfo & | TII | ||
| ) |
EmitLiveInCopies - Emit copies to initialize livein virtual registers into the given entry block.
Definition at line 368 of file MachineRegisterInfo.cpp.
References llvm::MachineBasicBlock::addLiveIn(), llvm::MachineBasicBlock::begin(), llvm::BuildMI(), llvm::TargetOpcode::COPY, llvm::MCInstrInfo::get(), and use_empty().
Referenced by llvm::SelectionDAGISel::runOnMachineFunction().
Definition at line 198 of file MachineRegisterInfo.h.
Referenced by llvm::MIRParserImpl::initializeRegisterInfo(), and llvm::LiveIntervals::runOnMachineFunction().
| void MachineRegisterInfo::freezeReservedRegs | ( | const MachineFunction & | MF | ) |
freezeReservedRegs - Called by the register allocator to freeze the set of reserved registers before allocation begins.
Definition at line 412 of file MachineRegisterInfo.cpp.
References llvm::MCRegisterInfo::getNumRegs(), llvm::TargetRegisterInfo::getReservedRegs(), getTargetRegisterInfo(), and llvm::BitVector::size().
Referenced by llvm::RegAllocBase::init(), and llvm::SelectionDAGISel::runOnMachineFunction().
getLiveInPhysReg - If VReg is a live-in virtual register, return the corresponding live-in physical register.
Definition at line 349 of file MachineRegisterInfo.cpp.
References I, livein_begin(), and livein_end().
getLiveInVirtReg - If PReg is a live-in physical register, return the corresponding live-in physical register.
Definition at line 358 of file MachineRegisterInfo.cpp.
References I, livein_begin(), and livein_end().
Referenced by llvm::MachineFunction::addLiveIn(), and llvm::AMDGPUTargetLowering::CreateLiveInRegister().
Returns a mask covering all bits that can appear in lane masks of subregisters of the virtual register Reg.
Definition at line 397 of file MachineRegisterInfo.cpp.
References llvm::TargetRegisterClass::getLaneMask(), getRegClass(), and llvm::TargetRegisterInfo::isVirtualRegister().
Referenced by llvm::LiveRangeCalc::calculate(), and llvm::LiveInterval::verify().
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getNumVirtRegs - Return the number of virtual registers created.
Definition at line 616 of file MachineRegisterInfo.h.
Referenced by llvm::LiveIntervals::addKillFlags(), llvm::LiveVariables::addNewBlock(), llvm::ScheduleDAGInstrs::buildSchedGraph(), clearVirtRegs(), createVirtualRegister(), llvm::VirtRegMap::grow(), llvm::RegPressureTracker::init(), llvm::VirtRegMap::print(), llvm::LiveIntervals::print(), llvm::LiveIntervals::runOnMachineFunction(), llvm::ScheduleDAGInstrs::ScheduleDAGInstrs(), llvm::MachineBasicBlock::SplitCriticalEdge(), and verifyUseLists().
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Get an iterator over the pressure sets affected by the given physical or virtual register.
If RegUnit is physical, it must be a register unit (from MCRegUnitIterator).
Definition at line 1039 of file MachineRegisterInfo.h.
Referenced by llvm::PressureDiff::addPressureChange(), llvm::RegPressureTracker::decreaseRegPressure(), llvm::RegPressureTracker::discoverLiveIn(), llvm::RegPressureTracker::discoverLiveOut(), llvm::RegPressureTracker::increaseRegPressure(), and llvm::RegPressureTracker::initLiveThru().
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getRegAllocationHint - Return the register allocation hint for the specified virtual register.
Definition at line 632 of file MachineRegisterInfo.h.
References llvm::TargetRegisterInfo::isVirtualRegister().
Referenced by llvm::VirtRegAuxInfo::calculateSpillWeightAndHint(), llvm::ARMBaseRegisterInfo::getRegAllocationHints(), llvm::TargetRegisterInfo::getRegAllocationHints(), getSimpleHint(), llvm::VirtRegMap::hasKnownPreference(), and llvm::ARMBaseRegisterInfo::updateRegAllocHint().
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getRegClass - Return the register class of the specified virtual register.
Definition at line 580 of file MachineRegisterInfo.h.
Referenced by llvm::RegsForValue::AddInlineAsmOperands(), llvm::MachineFunction::addLiveIn(), llvm::RegAllocBase::allocatePhysRegs(), llvm::AllocationOrder::AllocationOrder(), llvm::VirtRegMap::assignVirt2StackSlot(), llvm::LiveRangeEdit::calculateRegClassAndHint(), canFoldCopy(), canFoldIntoCSel(), llvm::AArch64InstrInfo::canInsertSelect(), llvm::PPCInstrInfo::canInsertSelect(), llvm::X86InstrInfo::canInsertSelect(), constrainRegClass(), llvm::SystemZInstrInfo::convertToThreeAddress(), copyHint(), llvm::NVPTXInstrInfo::copyPhysReg(), llvm::LiveRangeEdit::createEmptyIntervalFrom(), llvm::LiveRangeEdit::createFrom(), llvm::PPCTargetLowering::emitEHSjLjSetJmp(), llvm::SparcTargetLowering::expandAtomicRMW(), llvm::FastISel::fastEmitInst_extractsubreg(), llvm::SIInstrInfo::FoldImmediate(), llvm::ARMBaseInstrInfo::FoldImmediate(), llvm::SystemZInstrInfo::foldMemoryOperandImpl(), foldPatchpoint(), llvm::BitTracker::MachineEvaluator::getCell(), GetCostForDef(), getMaxLaneMaskForVReg(), llvm::PPCInstrInfo::getOperandLatency(), llvm::SIInstrInfo::getOpRegClass(), llvm::BitTracker::MachineEvaluator::getRegBitWidth(), getRegTy(), llvm::NVPTXAsmPrinter::getVirtualRegisterName(), hasVGPROperands(), llvm::MachineSSAUpdater::Initialize(), llvm::X86InstrInfo::insertSelect(), isFPR64(), isGPR64(), isNonFoldablePartialRegisterLoad(), llvm::SIInstrInfo::isOperandLegal(), isVGPR(), llvm::SIInstrInfo::legalizeOperands(), llvm::HexagonEvaluator::mask(), llvm::SIInstrInfo::moveToVALU(), llvm::X86InstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeSelect(), llvm::VirtRegMap::print(), llvm::MachineInstr::print(), llvm::PSetIterator::PSetIterator(), recomputeRegClass(), llvm::SelectionDAGISel::runOnMachineFunction(), llvm::CoalescerPair::setRegisters(), shouldTrackSubRegLiveness(), UpdateOperandRegClass(), and llvm::SIInstrInfo::usesConstantBus().
getReservedRegs - Returns a reference to the frozen set of reserved registers.
This method should always be preferred to calling TRI::getReservedRegs() when possible.
Definition at line 737 of file MachineRegisterInfo.h.
References reservedRegsFrozen().
Referenced by isReserved(), and llvm::RegisterClassInfo::runOnMachineFunction().
getSimpleHint - Return the preferred register allocation hint, or 0 if a standard simple hint (Type == 0) is not set.
Definition at line 639 of file MachineRegisterInfo.h.
References getRegAllocationHint(), Hint(), and llvm::TargetRegisterInfo::isVirtualRegister().
Referenced by llvm::VirtRegMap::hasPreferredPhys().
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Definition at line 131 of file MachineRegisterInfo.h.
References llvm::TargetSubtargetInfo::getRegisterInfo(), and llvm::MachineFunction::getSubtarget().
Referenced by llvm::LiveRangeCalc::calculate(), constrainRegClass(), freezeReservedRegs(), isAllocatable(), isConstantPhysReg(), isPhysRegModified(), isPhysRegUsed(), MachineRegisterInfo(), llvm::PSetIterator::PSetIterator(), recomputeRegClass(), replaceRegWith(), setPhysRegUnused(), setPhysRegUsed(), llvm::ARMBaseRegisterInfo::shouldCoalesce(), llvm::tryFoldSPUpdateIntoPushPop(), verifyUseList(), and verifyUseLists().
| MachineInstr * MachineRegisterInfo::getUniqueVRegDef | ( | unsigned | Reg | ) | const |
getUniqueVRegDef - Return the unique machine instr that defines the specified virtual register or null if none is found.
If there are multiple definitions or no definition, return null.
Definition at line 316 of file MachineRegisterInfo.cpp.
References def_empty(), def_instr_begin(), def_instr_end(), and I.
Referenced by canCombineWithMUL(), foldImmediates(), llvm::X86InstrInfo::genAlternativeCodeSequence(), genMadd(), genMaddR(), getDef(), hasReassocSibling(), hasVirtualRegDefsInBasicBlock(), llvm::AArch64InstrInfo::optimizeCompareInstr(), llvm::PPCInstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), and llvm::X86InstrInfo::optimizeCompareInstr().
| MachineInstr * MachineRegisterInfo::getVRegDef | ( | unsigned | Reg | ) | const |
getVRegDef - Return the machine instr that defines the specified virtual register or null if none is found.
This assumes that the code is in SSA form, so there should only be one definition.
Definition at line 305 of file MachineRegisterInfo.cpp.
References llvm::MachineRegisterInfo::defusechain_instr_iterator< Uses, Defs, SkipDebug, ByOperand, ByInstr, ByBundle >::atEnd(), def_instr_begin(), def_instr_end(), and I.
Referenced by canCompareBeNewValueJump(), canFoldIntoCSel(), canFoldIntoMOVCC(), llvm::R600TargetLowering::EmitInstrWithCustomInserter(), llvm::LiveVariables::HandleVirtRegUse(), llvm::LiveVariables::VarInfo::isLiveIn(), MatchingStackOffset(), llvm::AArch64InstrInfo::optimizeCondBranch(), llvm::X86InstrInfo::optimizeLoadInstr(), llvm::ARMBaseInstrInfo::produceSameValue(), removeCopies(), llvm::SelectionDAGISel::runOnMachineFunction(), llvm::LiveVariables::runOnMachineFunction(), and llvm::SSAUpdaterTraits< MachineSSAUpdater >::ValueIsPHI().
hasOneDef - Return true if there is exactly one instruction defining the specified register.
Definition at line 399 of file MachineRegisterInfo.h.
References def_begin(), def_end(), and llvm::DI.
Referenced by llvm::ScheduleDAGInstrs::addVRegDefDeps().
hasOneNonDBGUse - Return true if there is exactly one non-Debug instruction using the specified register.
Definition at line 324 of file MachineRegisterInfo.cpp.
References use_nodbg_begin(), and use_nodbg_end().
Referenced by canCombineWithMUL(), canFoldIntoMOVCC(), findOnlyInterestingUse(), llvm::SIInstrInfo::FoldImmediate(), llvm::PPCInstrInfo::FoldImmediate(), llvm::ARMBaseInstrInfo::FoldImmediate(), hasReassocSibling(), and isOperandKill().
hasOneUse - Return true if there is exactly one instruction using the specified register.
Definition at line 457 of file MachineRegisterInfo.h.
References use_begin(), and use_end().
Referenced by foldImmediates(), isKilled(), and llvm::FastISel::tryToFoldLoad().
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invalidateLiveness - Indicates that register liveness is no longer being tracked accurately.
This should be called by late passes that invalidate the liveness information.
Definition at line 183 of file MachineRegisterInfo.h.
Referenced by llvm::MIRParserImpl::initializeRegisterInfo(), and llvm::BranchFolder::OptimizeFunction().
isAllocatable - Returns true when PhysReg belongs to an allocatable register class and it hasn't been reserved.
Allocatable registers may show up in the allocation order of some virtual register, so a register allocator needs to track its liveness and availability.
Definition at line 759 of file MachineRegisterInfo.h.
References getTargetRegisterInfo(), llvm::TargetRegisterInfo::isInAllocatableClass(), and isReserved().
Referenced by llvm::CriticalAntiDepBreaker::BreakAntiDependencies(), llvm::AggressiveAntiDepBreaker::BreakAntiDependencies(), llvm::VirtRegAuxInfo::calculateSpillWeightAndHint(), llvm::PPCRegisterInfo::getCalleeSavedRegs(), and isConstantPhysReg().
| bool MachineRegisterInfo::isConstantPhysReg | ( | unsigned | PhysReg, |
| const MachineFunction & | MF | ||
| ) | const |
isConstantPhysReg - Returns true if PhysReg is unallocatable and constant throughout the function.
It is safe to move instructions that read such a physreg.
Definition at line 418 of file MachineRegisterInfo.cpp.
References def_empty(), getTargetRegisterInfo(), isAllocatable(), llvm::TargetRegisterInfo::isPhysicalRegister(), and llvm::MCRegAliasIterator::isValid().
Definition at line 340 of file MachineRegisterInfo.cpp.
References I, livein_begin(), and livein_end().
Referenced by llvm::X86FrameLowering::adjustForHiPEPrologue(), llvm::X86FrameLowering::adjustForSegmentedStacks(), llvm::AMDGPUTargetLowering::CreateLiveInRegister(), getPrologueDeath(), and llvm::Thumb1FrameLowering::spillCalleeSavedRegisters().
Return true if the specified register is modified in this function.
This checks that no defining machine operands exist for the register or any of its aliases. Definitions found on functions marked noreturn are ignored.
Definition at line 478 of file MachineRegisterInfo.cpp.
References def_begin(), def_end(), getTargetRegisterInfo(), isNoReturnDef(), llvm::MCRegAliasIterator::isValid(), llvm::make_range(), and llvm::BitVector::test().
Referenced by llvm::XCoreFrameLowering::determineCalleeSaves(), and llvm::TargetFrameLowering::determineCalleeSaves().
isPhysRegUsed - Return true if the specified register is used in this function.
Also check for clobbered aliases and registers clobbered by function calls with register mask operands.
This only works after register allocation.
Definition at line 665 of file MachineRegisterInfo.h.
References getTargetRegisterInfo(), llvm::MCRegisterInfo::DiffListIterator::isValid(), and llvm::BitVector::test().
Referenced by llvm::SIRegisterInfo::findUnusedRegister(), HandleVRSaveUpdate(), needToReserveScavengingSpillSlots(), and verifyLeafProcRegUse().
isReserved - Returns true when PhysReg is a reserved register.
Reserved registers may belong to an allocatable register class, but the target has explicitly requested that they are not used.
Definition at line 749 of file MachineRegisterInfo.h.
References getReservedRegs(), and llvm::BitVector::test().
Referenced by llvm::ARMFrameLowering::determineCalleeSaves(), llvm::ScheduleDAGInstrs::fixupKills(), llvm::ARMBaseRegisterInfo::getRegAllocationHints(), llvm::TargetRegisterInfo::getRegAllocationHints(), and isAllocatable().
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Definition at line 163 of file MachineRegisterInfo.h.
Referenced by foldImmediates(), llvm::MIRParserImpl::initializeRegisterInfo(), llvm::MachineFunction::print(), and llvm::LiveVariables::runOnMachineFunction().
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Definition at line 166 of file MachineRegisterInfo.h.
Referenced by llvm::MIRParserImpl::initializeRegisterInfo().
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Definition at line 778 of file MachineRegisterInfo.h.
Referenced by checkFnHasLiveInYmm(), llvm::AMDGPUInstrInfo::getIndirectIndexBegin(), getLiveInPhysReg(), getLiveInVirtReg(), HandleVRSaveUpdate(), isEAXLiveIn(), isLiveIn(), llvm::MachineFunction::print(), and llvm::SelectionDAGISel::runOnMachineFunction().
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Definition at line 780 of file MachineRegisterInfo.h.
Referenced by llvm::AMDGPUInstrInfo::getIndirectIndexBegin(), and llvm::MachineFunction::print().
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Definition at line 779 of file MachineRegisterInfo.h.
Referenced by checkFnHasLiveInYmm(), llvm::AMDGPUInstrInfo::getIndirectIndexBegin(), getLiveInPhysReg(), getLiveInVirtReg(), HandleVRSaveUpdate(), isEAXLiveIn(), isLiveIn(), llvm::MachineFunction::print(), and llvm::SelectionDAGISel::runOnMachineFunction().
| void MachineRegisterInfo::markUsesInDebugValueAsUndef | ( | unsigned | Reg | ) | const |
markUsesInDebugValueAsUndef - Mark every DBG_VALUE referencing the specified register as undefined which causes the DBG_VALUE to be deleted during LiveDebugVariables analysis.
Definition at line 434 of file MachineRegisterInfo.cpp.
References llvm::MachineInstr::getOperand(), I, llvm::MachineInstr::isDebugValue(), llvm::MachineOperand::setReg(), use_instr_begin(), and use_instr_end().
Referenced by llvm::MachineInstr::eraseFromParentAndMarkDBGValuesForRemoval().
| void MachineRegisterInfo::moveOperands | ( | MachineOperand * | Dst, |
| MachineOperand * | Src, | ||
| unsigned | NumOps | ||
| ) |
Move NumOps operands from Src to Dst, updating use-def lists as needed.
The Dst range is assumed to be uninitialized memory. (Or it may contain operands that won't be destroyed, which is OK because the MO destructor is trivial anyway).
The Src and Dst ranges may overlap.
Definition at line 238 of file MachineRegisterInfo.cpp.
References llvm::MachineOperand::getReg(), llvm::MachineOperand::isReg(), and llvm::MachineOperand::Reg.
recomputeRegClass - Try to find a legal super-class of Reg's register class that still satisfies the constraints from the instructions using Reg.
Returns true if Reg was upgraded.
This method can be used after constraints have been removed from a virtual register, for example after removing instructions or splitting the live range.
Definition at line 65 of file MachineRegisterInfo.cpp.
References llvm::TargetSubtargetInfo::getInstrInfo(), llvm::TargetRegisterInfo::getLargestLegalSuperClass(), llvm::MachineInstr::getOperand(), getRegClass(), llvm::MachineInstr::getRegClassConstraintEffect(), llvm::MachineFunction::getSubtarget(), getTargetRegisterInfo(), llvm::AArch64CC::MI, reg_nodbg_operands(), setRegClass(), and TII.
Referenced by llvm::LiveRangeEdit::calculateRegClassAndHint().
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Definition at line 243 of file MachineRegisterInfo.h.
Referenced by llvm::ConnectedVNInfoEqClasses::Distribute(), reg_empty(), reg_operands(), replaceRegWith(), and llvm::FastISel::tryToFoldLoad().
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Definition at line 273 of file MachineRegisterInfo.h.
Referenced by reg_bundles().
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Definition at line 276 of file MachineRegisterInfo.h.
Referenced by reg_bundles().
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Definition at line 329 of file MachineRegisterInfo.h.
Referenced by reg_nodbg_bundles().
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Definition at line 332 of file MachineRegisterInfo.h.
Referenced by reg_nodbg_bundles().
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Definition at line 280 of file MachineRegisterInfo.h.
References reg_bundle_begin(), and reg_bundle_end().
reg_empty - Return true if there are no instructions using or defining the specified register (it may be live-in).
Definition at line 287 of file MachineRegisterInfo.h.
References reg_begin(), and reg_end().
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Definition at line 246 of file MachineRegisterInfo.h.
Referenced by llvm::ConnectedVNInfoEqClasses::Distribute(), reg_empty(), reg_operands(), and replaceRegWith().
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Definition at line 256 of file MachineRegisterInfo.h.
Referenced by llvm::RegAllocBase::allocatePhysRegs(), llvm::VirtRegAuxInfo::calculateSpillWeightAndHint(), reg_instructions(), llvm::LiveIntervals::shrinkToUses(), and usesTheStack().
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Definition at line 259 of file MachineRegisterInfo.h.
Referenced by llvm::RegAllocBase::allocatePhysRegs(), llvm::VirtRegAuxInfo::calculateSpillWeightAndHint(), reg_instructions(), llvm::LiveIntervals::shrinkToUses(), and usesTheStack().
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Definition at line 311 of file MachineRegisterInfo.h.
Referenced by reg_nodbg_instructions().
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Definition at line 314 of file MachineRegisterInfo.h.
Referenced by reg_nodbg_instructions().
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Definition at line 264 of file MachineRegisterInfo.h.
References reg_instr_begin(), and reg_instr_end().
Referenced by llvm::findPHICopyInsertPoint().
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Definition at line 293 of file MachineRegisterInfo.h.
Referenced by reg_nodbg_empty(), and reg_nodbg_operands().
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Definition at line 337 of file MachineRegisterInfo.h.
References reg_bundle_nodbg_begin(), and reg_bundle_nodbg_end().
reg_nodbg_empty - Return true if the only instructions using or defining Reg are Debug instructions.
Definition at line 344 of file MachineRegisterInfo.h.
References reg_nodbg_begin(), and reg_nodbg_end().
Referenced by llvm::LiveIntervals::addKillFlags(), and llvm::RegAllocBase::allocatePhysRegs().
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Definition at line 296 of file MachineRegisterInfo.h.
Referenced by reg_nodbg_empty(), and reg_nodbg_operands().
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Definition at line 319 of file MachineRegisterInfo.h.
References reg_instr_nodbg_begin(), and reg_instr_nodbg_end().
Referenced by isTerminalReg().
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Definition at line 301 of file MachineRegisterInfo.h.
References reg_nodbg_begin(), and reg_nodbg_end().
Referenced by llvm::LiveRangeCalc::calculate(), and recomputeRegClass().
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Definition at line 248 of file MachineRegisterInfo.h.
References reg_begin(), and reg_end().
Referenced by llvm::LiveIntervals::shrinkToUses(), and verifyUseList().
| void MachineRegisterInfo::removeRegOperandFromUseList | ( | MachineOperand * | MO | ) |
Remove MO from its use-def list.
Definition at line 209 of file MachineRegisterInfo.cpp.
References llvm::MachineOperand::getReg(), and llvm::MachineOperand::Reg.
Referenced by llvm::MachineOperand::ChangeToRegister(), llvm::MachineInstr::RemoveOperand(), llvm::MachineOperand::setIsDef(), and llvm::MachineOperand::setReg().
replaceRegWith - Replace all instances of FromReg with ToReg in the machine function.
This is like llvm-level X->replaceAllUsesWith(Y), except that it also changes any definitions of the register as well.
Note that it is usually necessary to first constrain ToReg's register class to match the FromReg constraints using:
constrainRegClass(ToReg, getRegClass(FromReg))
That function will return NULL if the virtual registers have incompatible constraints.
Note that if ToReg is a physical register the function will replace and apply sub registers to ToReg in order to obtain a final/proper physical register.
This is like llvm-level X->replaceAllUsesWith(Y), except that it also changes any definitions of the register as well. If ToReg is a physical register we apply the sub register to obtain the final/proper physical register.
Definition at line 285 of file MachineRegisterInfo.cpp.
References getTargetRegisterInfo(), I, llvm::TargetRegisterInfo::isPhysicalRegister(), reg_begin(), reg_end(), llvm::MachineOperand::setReg(), and llvm::MachineOperand::substPhysReg().
Referenced by llvm::SIInstrInfo::moveSMRDToVALU(), llvm::SIInstrInfo::moveToVALU(), and llvm::SelectionDAGISel::runOnMachineFunction().
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reservedRegsFrozen - Returns true after freezeReservedRegs() was called to ensure the set of reserved registers stays constant.
Definition at line 723 of file MachineRegisterInfo.h.
References llvm::BitVector::empty().
Referenced by canReserveReg(), and getReservedRegs().
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Definition at line 135 of file MachineRegisterInfo.h.
Referenced by llvm::LiveRangeEdit::~LiveRangeEdit().
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Definition at line 144 of file MachineRegisterInfo.h.
Referenced by llvm::LiveRangeEdit::LiveRangeEdit().
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setPhysRegUnused - Mark the specified register unused in this function.
This should only be called during and after register allocation.
Definition at line 697 of file MachineRegisterInfo.h.
References getTargetRegisterInfo(), llvm::MCRegisterInfo::DiffListIterator::isValid(), and llvm::BitVector::reset().
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setPhysRegUsed - Mark the specified register used in this function.
This should only be called during and after register allocation.
Definition at line 683 of file MachineRegisterInfo.h.
References getTargetRegisterInfo(), llvm::MCRegisterInfo::DiffListIterator::isValid(), and llvm::BitVector::set().
Referenced by llvm::X86FrameLowering::adjustForSegmentedStacks(), llvm::LiveRegMatrix::assign(), llvm::AArch64FrameLowering::emitPrologue(), and llvm::SIMachineFunctionInfo::getSpilledReg().
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setRegAllocationHint - Specify a register allocation hint for the specified virtual register.
Definition at line 623 of file MachineRegisterInfo.h.
References llvm::TargetRegisterInfo::isVirtualRegister().
Referenced by llvm::VirtRegAuxInfo::calculateSpillWeightAndHint(), and llvm::ARMBaseRegisterInfo::updateRegAllocHint().
| void MachineRegisterInfo::setRegClass | ( | unsigned | Reg, |
| const TargetRegisterClass * | RC | ||
| ) |
setRegClass - Set the register class of the specified virtual register.
Definition at line 42 of file MachineRegisterInfo.cpp.
References llvm::TargetRegisterClass::isAllocatable().
Referenced by llvm::SITargetLowering::AdjustInstrPostInstrSelection(), constrainRegClass(), and recomputeRegClass().
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Mark the specified register unit as used in this function.
This should only be called during and after register allocation.
Definition at line 677 of file MachineRegisterInfo.h.
References llvm::BitVector::set().
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Returns true if liveness for register class RC should be tracked at the subregister level.
Definition at line 187 of file MachineRegisterInfo.h.
References llvm::TargetRegisterClass::HasDisjunctSubRegs, and subRegLivenessEnabled().
Referenced by shouldTrackSubRegLiveness().
Definition at line 190 of file MachineRegisterInfo.h.
References getRegClass(), llvm::TargetRegisterInfo::isVirtualRegister(), and shouldTrackSubRegLiveness().
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Definition at line 194 of file MachineRegisterInfo.h.
Referenced by llvm::LiveIntervals::addKillFlags(), and shouldTrackSubRegLiveness().
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tracksLiveness - Returns true when tracking register liveness accurately.
While this flag is true, register liveness information in basic block live-in lists and machine instruction operands is accurate. This means it can be used to change the code in ways that affect the values in registers, for example by the register scavenger.
When this flag is false, liveness is no longer reliable.
Definition at line 176 of file MachineRegisterInfo.h.
Referenced by llvm::RegScavenger::enterBasicBlock(), llvm::MIRParserImpl::initializeRegisterInfo(), llvm::BranchFolder::OptimizeFunction(), and llvm::MachineFunction::print().
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Definition at line 409 of file MachineRegisterInfo.h.
Referenced by hasOneUse(), llvm::SIInstrInfo::moveToVALU(), use_empty(), and use_operands().
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Definition at line 439 of file MachineRegisterInfo.h.
Referenced by use_bundles().
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Definition at line 442 of file MachineRegisterInfo.h.
Referenced by use_bundles().
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Definition at line 504 of file MachineRegisterInfo.h.
Referenced by use_nodbg_bundles().
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Definition at line 507 of file MachineRegisterInfo.h.
Referenced by use_nodbg_bundles().
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Definition at line 446 of file MachineRegisterInfo.h.
References use_bundle_begin(), and use_bundle_end().
use_empty - Return true if there are no instructions using the specified register.
Definition at line 453 of file MachineRegisterInfo.h.
References use_begin(), and use_end().
Referenced by llvm::R600TargetLowering::EmitInstrWithCustomInserter(), EmitLiveInCopies(), llvm::NVPTXFrameLowering::emitPrologue(), foldImmediates(), llvm::FastISel::hasTrivialKill(), llvm::MachineInstr::print(), and llvm::SelectionDAGISel::runOnMachineFunction().
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Definition at line 412 of file MachineRegisterInfo.h.
Referenced by hasOneUse(), llvm::SIInstrInfo::moveToVALU(), use_empty(), and use_operands().
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Definition at line 422 of file MachineRegisterInfo.h.
Referenced by markUsesInDebugValueAsUndef(), llvm::PPCInstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), llvm::SelectionDAGISel::runOnMachineFunction(), and use_instructions().
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Definition at line 425 of file MachineRegisterInfo.h.
Referenced by markUsesInDebugValueAsUndef(), llvm::PPCInstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), llvm::SelectionDAGISel::runOnMachineFunction(), and use_instructions().
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Definition at line 486 of file MachineRegisterInfo.h.
Referenced by findOnlyInterestingUse(), findUseBetween(), and use_nodbg_instructions().
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Definition at line 489 of file MachineRegisterInfo.h.
Referenced by findUseBetween(), and use_nodbg_instructions().
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Definition at line 430 of file MachineRegisterInfo.h.
References use_instr_begin(), and use_instr_end().
Referenced by dumpUses(), and isDefLiveOut().
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Definition at line 468 of file MachineRegisterInfo.h.
Referenced by hasOneNonDBGUse(), use_nodbg_empty(), and use_nodbg_operands().
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Definition at line 512 of file MachineRegisterInfo.h.
References use_bundle_nodbg_begin(), and use_bundle_nodbg_end().
use_nodbg_empty - Return true if there are no non-Debug instructions using the specified register.
Definition at line 519 of file MachineRegisterInfo.h.
References use_nodbg_begin(), and use_nodbg_end().
Referenced by eraseIfDead(), llvm::AArch64InstrInfo::optimizeCompareInstr(), and llvm::X86InstrInfo::optimizeCompareInstr().
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Definition at line 471 of file MachineRegisterInfo.h.
Referenced by hasOneNonDBGUse(), use_nodbg_empty(), and use_nodbg_operands().
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Definition at line 494 of file MachineRegisterInfo.h.
References use_instr_nodbg_begin(), and use_instr_nodbg_end().
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Definition at line 476 of file MachineRegisterInfo.h.
References use_nodbg_begin(), and use_nodbg_end().
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Definition at line 414 of file MachineRegisterInfo.h.
References use_begin(), and use_end().
Referenced by clearKillFlags().
| void MachineRegisterInfo::verifyUseList | ( | unsigned | Reg | ) | const |
Verify the sanity of the use list for Reg.
Definition at line 122 of file MachineRegisterInfo.cpp.
References llvm::errs(), llvm::MachineInstr::getNumOperands(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getParent(), llvm::MachineOperand::getReg(), getTargetRegisterInfo(), llvm::MachineOperand::isReg(), llvm::AArch64CC::MI, and reg_operands().
Referenced by clearVirtRegs(), and verifyUseLists().
| void MachineRegisterInfo::verifyUseLists | ( | ) | const |
Verify the use list of all registers.
Definition at line 160 of file MachineRegisterInfo.cpp.
References getNumVirtRegs(), getTargetRegisterInfo(), llvm::TargetRegisterInfo::index2VirtReg(), and verifyUseList().
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Definition at line 235 of file MachineRegisterInfo.h.
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Definition at line 229 of file MachineRegisterInfo.h.
1.8.6