LLVM  3.7.0
Namespaces | Macros | Typedefs | Functions | Variables
SparcDisassembler.cpp File Reference
#include "Sparc.h"
#include "SparcRegisterInfo.h"
#include "SparcSubtarget.h"
#include "llvm/MC/MCDisassembler.h"
#include "llvm/MC/MCFixedLenDisassembler.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/Support/TargetRegistry.h"
#include "SparcGenDisassemblerTables.inc"
Include dependency graph for SparcDisassembler.cpp:

Go to the source code of this file.

Namespaces

 llvm
 Compute iterated dominance frontiers using a linear time algorithm.
 

Macros

#define DEBUG_TYPE   "sparc-disassembler"
 

Typedefs

typedef
MCDisassembler::DecodeStatus 
DecodeStatus
 
typedef DecodeStatus(* DecodeFunc )(MCInst &MI, unsigned insn, uint64_t Address, const void *Decoder)
 

Functions

static MCDisassemblercreateSparcDisassembler (const Target &T, const MCSubtargetInfo &STI, MCContext &Ctx)
 
void LLVMInitializeSparcDisassembler ()
 
static DecodeStatus DecodeIntRegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeI64RegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeFPRegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeDFPRegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeQFPRegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeFCCRegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeASRRegsRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeLoadInt (MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeLoadFP (MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeLoadDFP (MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeLoadQFP (MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeStoreInt (MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeStoreFP (MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeStoreDFP (MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeStoreQFP (MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeCall (MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeSIMM13 (MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeJMPL (MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeReturn (MCInst &MI, unsigned insn, uint64_t Address, const void *Decoder)
 
static DecodeStatus DecodeSWAP (MCInst &Inst, unsigned insn, uint64_t Address, const void *Decoder)
 
static DecodeStatus readInstruction32 (ArrayRef< uint8_t > Bytes, uint64_t Address, uint64_t &Size, uint32_t &Insn, bool IsLittleEndian)
 Read four bytes from the ArrayRef and return 32 bit word. More...
 
static DecodeStatus DecodeMem (MCInst &MI, unsigned insn, uint64_t Address, const void *Decoder, bool isLoad, DecodeFunc DecodeRD)
 
static bool tryAddingSymbolicOperand (int64_t Value, bool isBranch, uint64_t Address, uint64_t Offset, uint64_t Width, MCInst &MI, const void *Decoder)
 

Variables

Target llvm::TheSparcTarget
 
Target llvm::TheSparcV9Target
 
Target llvm::TheSparcelTarget
 
static const unsigned IntRegDecoderTable []
 
static const unsigned FPRegDecoderTable []
 
static const unsigned DFPRegDecoderTable []
 
static const unsigned QFPRegDecoderTable []
 
static const unsigned FCCRegDecoderTable []
 
static const unsigned ASRRegDecoderTable []
 

Macro Definition Documentation

#define DEBUG_TYPE   "sparc-disassembler"

Definition at line 26 of file SparcDisassembler.cpp.

Typedef Documentation

typedef DecodeStatus(* DecodeFunc)(MCInst &MI, unsigned insn, uint64_t Address, const void *Decoder)

Definition at line 273 of file SparcDisassembler.cpp.

Definition at line 28 of file SparcDisassembler.cpp.

Function Documentation

static MCDisassembler* createSparcDisassembler ( const Target T,
const MCSubtargetInfo STI,
MCContext Ctx 
)
static

Definition at line 50 of file SparcDisassembler.cpp.

Referenced by LLVMInitializeSparcDisassembler().

static DecodeStatus DecodeASRRegsRegisterClass ( MCInst Inst,
unsigned  RegNo,
uint64_t  Address,
const void *  Decoder 
)
static
static DecodeStatus DecodeCall ( MCInst Inst,
unsigned  insn,
uint64_t  Address,
const void *  Decoder 
)
static
static DecodeStatus DecodeDFPRegsRegisterClass ( MCInst Inst,
unsigned  RegNo,
uint64_t  Address,
const void *  Decoder 
)
static
static DecodeStatus DecodeFCCRegsRegisterClass ( MCInst Inst,
unsigned  RegNo,
uint64_t  Address,
const void *  Decoder 
)
static
static DecodeStatus DecodeFPRegsRegisterClass ( MCInst Inst,
unsigned  RegNo,
uint64_t  Address,
const void *  Decoder 
)
static
static DecodeStatus DecodeI64RegsRegisterClass ( MCInst Inst,
unsigned  RegNo,
uint64_t  Address,
const void *  Decoder 
)
static
static DecodeStatus DecodeIntRegsRegisterClass ( MCInst Inst,
unsigned  RegNo,
uint64_t  Address,
const void *  Decoder 
)
static
static DecodeStatus DecodeJMPL ( MCInst Inst,
unsigned  insn,
uint64_t  Address,
const void *  Decoder 
)
static
static DecodeStatus DecodeLoadDFP ( MCInst Inst,
unsigned  insn,
uint64_t  Address,
const void *  Decoder 
)
static

Definition at line 335 of file SparcDisassembler.cpp.

References DecodeDFPRegsRegisterClass(), and DecodeMem().

static DecodeStatus DecodeLoadFP ( MCInst Inst,
unsigned  insn,
uint64_t  Address,
const void *  Decoder 
)
static

Definition at line 329 of file SparcDisassembler.cpp.

References DecodeFPRegsRegisterClass(), and DecodeMem().

static DecodeStatus DecodeLoadInt ( MCInst Inst,
unsigned  insn,
uint64_t  Address,
const void *  Decoder 
)
static

Definition at line 323 of file SparcDisassembler.cpp.

References DecodeIntRegsRegisterClass(), and DecodeMem().

static DecodeStatus DecodeLoadQFP ( MCInst Inst,
unsigned  insn,
uint64_t  Address,
const void *  Decoder 
)
static

Definition at line 341 of file SparcDisassembler.cpp.

References DecodeMem(), and DecodeQFPRegsRegisterClass().

static DecodeStatus DecodeMem ( MCInst MI,
unsigned  insn,
uint64_t  Address,
const void *  Decoder,
bool  isLoad,
DecodeFunc  DecodeRD 
)
static
static DecodeStatus DecodeQFPRegsRegisterClass ( MCInst Inst,
unsigned  RegNo,
uint64_t  Address,
const void *  Decoder 
)
static
static DecodeStatus DecodeReturn ( MCInst MI,
unsigned  insn,
uint64_t  Address,
const void *  Decoder 
)
static
static DecodeStatus DecodeSIMM13 ( MCInst Inst,
unsigned  insn,
uint64_t  Address,
const void *  Decoder 
)
static
static DecodeStatus DecodeStoreDFP ( MCInst Inst,
unsigned  insn,
uint64_t  Address,
const void *  Decoder 
)
static

Definition at line 359 of file SparcDisassembler.cpp.

References DecodeDFPRegsRegisterClass(), and DecodeMem().

static DecodeStatus DecodeStoreFP ( MCInst Inst,
unsigned  insn,
uint64_t  Address,
const void *  Decoder 
)
static

Definition at line 353 of file SparcDisassembler.cpp.

References DecodeFPRegsRegisterClass(), and DecodeMem().

static DecodeStatus DecodeStoreInt ( MCInst Inst,
unsigned  insn,
uint64_t  Address,
const void *  Decoder 
)
static

Definition at line 347 of file SparcDisassembler.cpp.

References DecodeIntRegsRegisterClass(), and DecodeMem().

static DecodeStatus DecodeStoreQFP ( MCInst Inst,
unsigned  insn,
uint64_t  Address,
const void *  Decoder 
)
static

Definition at line 365 of file SparcDisassembler.cpp.

References DecodeMem(), and DecodeQFPRegsRegisterClass().

static DecodeStatus DecodeSWAP ( MCInst Inst,
unsigned  insn,
uint64_t  Address,
const void *  Decoder 
)
static
void LLVMInitializeSparcDisassembler ( )
static DecodeStatus readInstruction32 ( ArrayRef< uint8_t >  Bytes,
uint64_t  Address,
uint64_t &  Size,
uint32_t &  Insn,
bool  IsLittleEndian 
)
static

Read four bytes from the ArrayRef and return 32 bit word.

Definition at line 230 of file SparcDisassembler.cpp.

References llvm::MCDisassembler::Fail, llvm::ArrayRef< T >::size(), and llvm::MCDisassembler::Success.

static bool tryAddingSymbolicOperand ( int64_t  Value,
bool  isBranch,
uint64_t  Address,
uint64_t  Offset,
uint64_t  Width,
MCInst MI,
const void *  Decoder 
)
static

Definition at line 371 of file SparcDisassembler.cpp.

References llvm::MCDisassembler::tryAddingSymbolicOperand().

Referenced by DecodeCall().

Variable Documentation

const unsigned ASRRegDecoderTable[]
static
Initial value:
= {
SP::Y, SP::ASR1, SP::ASR2, SP::ASR3,
SP::ASR4, SP::ASR5, SP::ASR6, SP::ASR7,
SP::ASR8, SP::ASR9, SP::ASR10, SP::ASR11,
SP::ASR12, SP::ASR13, SP::ASR14, SP::ASR15,
SP::ASR16, SP::ASR17, SP::ASR18, SP::ASR19,
SP::ASR20, SP::ASR21, SP::ASR22, SP::ASR23,
SP::ASR24, SP::ASR25, SP::ASR26, SP::ASR27,
SP::ASR28, SP::ASR29, SP::ASR30, SP::ASR31}
static GCMetadataPrinterRegistry::Add< OcamlGCMetadataPrinter > Y("ocaml","ocaml 3.10-compatible collector")

Definition at line 110 of file SparcDisassembler.cpp.

Referenced by DecodeASRRegsRegisterClass().

const unsigned DFPRegDecoderTable[]
static
Initial value:
= {
SP::D0, SP::D16, SP::D1, SP::D17,
SP::D2, SP::D18, SP::D3, SP::D19,
SP::D4, SP::D20, SP::D5, SP::D21,
SP::D6, SP::D22, SP::D7, SP::D23,
SP::D8, SP::D24, SP::D9, SP::D25,
SP::D10, SP::D26, SP::D11, SP::D27,
SP::D12, SP::D28, SP::D13, SP::D29,
SP::D14, SP::D30, SP::D15, SP::D31 }

Definition at line 87 of file SparcDisassembler.cpp.

Referenced by DecodeDFPRegsRegisterClass().

const unsigned FCCRegDecoderTable[]
static
Initial value:
= {
SP::FCC0, SP::FCC1, SP::FCC2, SP::FCC3 }

Definition at line 107 of file SparcDisassembler.cpp.

Referenced by DecodeFCCRegsRegisterClass().

const unsigned FPRegDecoderTable[]
static
Initial value:
= {
SP::F0, SP::F1, SP::F2, SP::F3,
SP::F4, SP::F5, SP::F6, SP::F7,
SP::F8, SP::F9, SP::F10, SP::F11,
SP::F12, SP::F13, SP::F14, SP::F15,
SP::F16, SP::F17, SP::F18, SP::F19,
SP::F20, SP::F21, SP::F22, SP::F23,
SP::F24, SP::F25, SP::F26, SP::F27,
SP::F28, SP::F29, SP::F30, SP::F31 }

Definition at line 77 of file SparcDisassembler.cpp.

Referenced by DecodeFPRegsRegisterClass().

const unsigned IntRegDecoderTable[]
static
Initial value:
= {
SP::G0, SP::G1, SP::G2, SP::G3,
SP::G4, SP::G5, SP::G6, SP::G7,
SP::O0, SP::O1, SP::O2, SP::O3,
SP::O4, SP::O5, SP::O6, SP::O7,
SP::L0, SP::L1, SP::L2, SP::L3,
SP::L4, SP::L5, SP::L6, SP::L7,
SP::I0, SP::I1, SP::I2, SP::I3,
SP::I4, SP::I5, SP::I6, SP::I7 }

Definition at line 67 of file SparcDisassembler.cpp.

Referenced by DecodeI64RegsRegisterClass(), and DecodeIntRegsRegisterClass().

const unsigned QFPRegDecoderTable[]
static
Initial value:
= {
SP::Q0, SP::Q8, ~0U, ~0U,
SP::Q1, SP::Q9, ~0U, ~0U,
SP::Q2, SP::Q10, ~0U, ~0U,
SP::Q3, SP::Q11, ~0U, ~0U,
SP::Q4, SP::Q12, ~0U, ~0U,
SP::Q5, SP::Q13, ~0U, ~0U,
SP::Q6, SP::Q14, ~0U, ~0U,
SP::Q7, SP::Q15, ~0U, ~0U }

Definition at line 97 of file SparcDisassembler.cpp.

Referenced by DecodeQFPRegsRegisterClass().