LLVM  3.7.0
X86InstComments.cpp
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1 //===-- X86InstComments.cpp - Generate verbose-asm comments for instrs ----===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This defines functionality used to emit comments about X86 instructions to
11 // an output stream for -fverbose-asm.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #include "X86InstComments.h"
17 #include "Utils/X86ShuffleDecode.h"
18 #include "llvm/MC/MCInst.h"
21 
22 using namespace llvm;
23 
24 /// \brief Extracts the src/dst types for a given zero extension instruction.
25 /// \note While the number of elements in DstVT type correct, the
26 /// number in the SrcVT type is expanded to fill the src xmm register and the
27 /// upper elements may not be included in the dst xmm/ymm register.
28 static void getZeroExtensionTypes(const MCInst *MI, MVT &SrcVT, MVT &DstVT) {
29  switch (MI->getOpcode()) {
30  default:
31  llvm_unreachable("Unknown zero extension instruction");
32  // i8 zero extension
33  case X86::PMOVZXBWrm:
34  case X86::PMOVZXBWrr:
35  case X86::VPMOVZXBWrm:
36  case X86::VPMOVZXBWrr:
37  SrcVT = MVT::v16i8;
38  DstVT = MVT::v8i16;
39  break;
40  case X86::VPMOVZXBWYrm:
41  case X86::VPMOVZXBWYrr:
42  SrcVT = MVT::v16i8;
43  DstVT = MVT::v16i16;
44  break;
45  case X86::PMOVZXBDrm:
46  case X86::PMOVZXBDrr:
47  case X86::VPMOVZXBDrm:
48  case X86::VPMOVZXBDrr:
49  SrcVT = MVT::v16i8;
50  DstVT = MVT::v4i32;
51  break;
52  case X86::VPMOVZXBDYrm:
53  case X86::VPMOVZXBDYrr:
54  SrcVT = MVT::v16i8;
55  DstVT = MVT::v8i32;
56  break;
57  case X86::PMOVZXBQrm:
58  case X86::PMOVZXBQrr:
59  case X86::VPMOVZXBQrm:
60  case X86::VPMOVZXBQrr:
61  SrcVT = MVT::v16i8;
62  DstVT = MVT::v2i64;
63  break;
64  case X86::VPMOVZXBQYrm:
65  case X86::VPMOVZXBQYrr:
66  SrcVT = MVT::v16i8;
67  DstVT = MVT::v4i64;
68  break;
69  // i16 zero extension
70  case X86::PMOVZXWDrm:
71  case X86::PMOVZXWDrr:
72  case X86::VPMOVZXWDrm:
73  case X86::VPMOVZXWDrr:
74  SrcVT = MVT::v8i16;
75  DstVT = MVT::v4i32;
76  break;
77  case X86::VPMOVZXWDYrm:
78  case X86::VPMOVZXWDYrr:
79  SrcVT = MVT::v8i16;
80  DstVT = MVT::v8i32;
81  break;
82  case X86::PMOVZXWQrm:
83  case X86::PMOVZXWQrr:
84  case X86::VPMOVZXWQrm:
85  case X86::VPMOVZXWQrr:
86  SrcVT = MVT::v8i16;
87  DstVT = MVT::v2i64;
88  break;
89  case X86::VPMOVZXWQYrm:
90  case X86::VPMOVZXWQYrr:
91  SrcVT = MVT::v8i16;
92  DstVT = MVT::v4i64;
93  break;
94  // i32 zero extension
95  case X86::PMOVZXDQrm:
96  case X86::PMOVZXDQrr:
97  case X86::VPMOVZXDQrm:
98  case X86::VPMOVZXDQrr:
99  SrcVT = MVT::v4i32;
100  DstVT = MVT::v2i64;
101  break;
102  case X86::VPMOVZXDQYrm:
103  case X86::VPMOVZXDQYrr:
104  SrcVT = MVT::v4i32;
105  DstVT = MVT::v4i64;
106  break;
107  }
108 }
109 
110 //===----------------------------------------------------------------------===//
111 // Top Level Entrypoint
112 //===----------------------------------------------------------------------===//
113 
114 /// EmitAnyX86InstComments - This function decodes x86 instructions and prints
115 /// newline terminated strings to the specified string if desired. This
116 /// information is shown in disassembly dumps when verbose assembly is enabled.
118  const char *(*getRegName)(unsigned)) {
119  // If this is a shuffle operation, the switch should fill in this state.
120  SmallVector<int, 8> ShuffleMask;
121  const char *DestName = nullptr, *Src1Name = nullptr, *Src2Name = nullptr;
122 
123  switch (MI->getOpcode()) {
124  default:
125  // Not an instruction for which we can decode comments.
126  return false;
127 
128  case X86::BLENDPDrri:
129  case X86::VBLENDPDrri:
130  Src2Name = getRegName(MI->getOperand(2).getReg());
131  // FALL THROUGH.
132  case X86::BLENDPDrmi:
133  case X86::VBLENDPDrmi:
134  if (MI->getOperand(MI->getNumOperands() - 1).isImm())
136  MI->getOperand(MI->getNumOperands() - 1).getImm(),
137  ShuffleMask);
138  Src1Name = getRegName(MI->getOperand(1).getReg());
139  DestName = getRegName(MI->getOperand(0).getReg());
140  break;
141  case X86::VBLENDPDYrri:
142  Src2Name = getRegName(MI->getOperand(2).getReg());
143  // FALL THROUGH.
144  case X86::VBLENDPDYrmi:
145  if (MI->getOperand(MI->getNumOperands() - 1).isImm())
147  MI->getOperand(MI->getNumOperands() - 1).getImm(),
148  ShuffleMask);
149  Src1Name = getRegName(MI->getOperand(1).getReg());
150  DestName = getRegName(MI->getOperand(0).getReg());
151  break;
152 
153  case X86::BLENDPSrri:
154  case X86::VBLENDPSrri:
155  Src2Name = getRegName(MI->getOperand(2).getReg());
156  // FALL THROUGH.
157  case X86::BLENDPSrmi:
158  case X86::VBLENDPSrmi:
159  if (MI->getOperand(MI->getNumOperands() - 1).isImm())
161  MI->getOperand(MI->getNumOperands() - 1).getImm(),
162  ShuffleMask);
163  Src1Name = getRegName(MI->getOperand(1).getReg());
164  DestName = getRegName(MI->getOperand(0).getReg());
165  break;
166  case X86::VBLENDPSYrri:
167  Src2Name = getRegName(MI->getOperand(2).getReg());
168  // FALL THROUGH.
169  case X86::VBLENDPSYrmi:
170  if (MI->getOperand(MI->getNumOperands() - 1).isImm())
172  MI->getOperand(MI->getNumOperands() - 1).getImm(),
173  ShuffleMask);
174  Src1Name = getRegName(MI->getOperand(1).getReg());
175  DestName = getRegName(MI->getOperand(0).getReg());
176  break;
177 
178  case X86::PBLENDWrri:
179  case X86::VPBLENDWrri:
180  Src2Name = getRegName(MI->getOperand(2).getReg());
181  // FALL THROUGH.
182  case X86::PBLENDWrmi:
183  case X86::VPBLENDWrmi:
184  if (MI->getOperand(MI->getNumOperands() - 1).isImm())
186  MI->getOperand(MI->getNumOperands() - 1).getImm(),
187  ShuffleMask);
188  Src1Name = getRegName(MI->getOperand(1).getReg());
189  DestName = getRegName(MI->getOperand(0).getReg());
190  break;
191  case X86::VPBLENDWYrri:
192  Src2Name = getRegName(MI->getOperand(2).getReg());
193  // FALL THROUGH.
194  case X86::VPBLENDWYrmi:
195  if (MI->getOperand(MI->getNumOperands() - 1).isImm())
197  MI->getOperand(MI->getNumOperands() - 1).getImm(),
198  ShuffleMask);
199  Src1Name = getRegName(MI->getOperand(1).getReg());
200  DestName = getRegName(MI->getOperand(0).getReg());
201  break;
202 
203  case X86::VPBLENDDrri:
204  Src2Name = getRegName(MI->getOperand(2).getReg());
205  // FALL THROUGH.
206  case X86::VPBLENDDrmi:
207  if (MI->getOperand(MI->getNumOperands() - 1).isImm())
209  MI->getOperand(MI->getNumOperands() - 1).getImm(),
210  ShuffleMask);
211  Src1Name = getRegName(MI->getOperand(1).getReg());
212  DestName = getRegName(MI->getOperand(0).getReg());
213  break;
214 
215  case X86::VPBLENDDYrri:
216  Src2Name = getRegName(MI->getOperand(2).getReg());
217  // FALL THROUGH.
218  case X86::VPBLENDDYrmi:
219  if (MI->getOperand(MI->getNumOperands() - 1).isImm())
221  MI->getOperand(MI->getNumOperands() - 1).getImm(),
222  ShuffleMask);
223  Src1Name = getRegName(MI->getOperand(1).getReg());
224  DestName = getRegName(MI->getOperand(0).getReg());
225  break;
226 
227  case X86::INSERTPSrr:
228  case X86::VINSERTPSrr:
229  Src2Name = getRegName(MI->getOperand(2).getReg());
230  // FALL THROUGH.
231  case X86::INSERTPSrm:
232  case X86::VINSERTPSrm:
233  DestName = getRegName(MI->getOperand(0).getReg());
234  Src1Name = getRegName(MI->getOperand(1).getReg());
235  if (MI->getOperand(MI->getNumOperands() - 1).isImm())
236  DecodeINSERTPSMask(MI->getOperand(MI->getNumOperands() - 1).getImm(),
237  ShuffleMask);
238  break;
239 
240  case X86::MOVLHPSrr:
241  case X86::VMOVLHPSrr:
242  Src2Name = getRegName(MI->getOperand(2).getReg());
243  Src1Name = getRegName(MI->getOperand(1).getReg());
244  DestName = getRegName(MI->getOperand(0).getReg());
245  DecodeMOVLHPSMask(2, ShuffleMask);
246  break;
247 
248  case X86::MOVHLPSrr:
249  case X86::VMOVHLPSrr:
250  Src2Name = getRegName(MI->getOperand(2).getReg());
251  Src1Name = getRegName(MI->getOperand(1).getReg());
252  DestName = getRegName(MI->getOperand(0).getReg());
253  DecodeMOVHLPSMask(2, ShuffleMask);
254  break;
255 
256  case X86::MOVSLDUPrr:
257  case X86::VMOVSLDUPrr:
258  Src1Name = getRegName(MI->getOperand(1).getReg());
259  // FALL THROUGH.
260  case X86::MOVSLDUPrm:
261  case X86::VMOVSLDUPrm:
262  DestName = getRegName(MI->getOperand(0).getReg());
263  DecodeMOVSLDUPMask(MVT::v4f32, ShuffleMask);
264  break;
265 
266  case X86::VMOVSHDUPYrr:
267  Src1Name = getRegName(MI->getOperand(1).getReg());
268  // FALL THROUGH.
269  case X86::VMOVSHDUPYrm:
270  DestName = getRegName(MI->getOperand(0).getReg());
271  DecodeMOVSHDUPMask(MVT::v8f32, ShuffleMask);
272  break;
273 
274  case X86::VMOVSLDUPYrr:
275  Src1Name = getRegName(MI->getOperand(1).getReg());
276  // FALL THROUGH.
277  case X86::VMOVSLDUPYrm:
278  DestName = getRegName(MI->getOperand(0).getReg());
279  DecodeMOVSLDUPMask(MVT::v8f32, ShuffleMask);
280  break;
281 
282  case X86::MOVSHDUPrr:
283  case X86::VMOVSHDUPrr:
284  Src1Name = getRegName(MI->getOperand(1).getReg());
285  // FALL THROUGH.
286  case X86::MOVSHDUPrm:
287  case X86::VMOVSHDUPrm:
288  DestName = getRegName(MI->getOperand(0).getReg());
289  DecodeMOVSHDUPMask(MVT::v4f32, ShuffleMask);
290  break;
291 
292  case X86::VMOVDDUPYrr:
293  Src1Name = getRegName(MI->getOperand(1).getReg());
294  // FALL THROUGH.
295  case X86::VMOVDDUPYrm:
296  DestName = getRegName(MI->getOperand(0).getReg());
297  DecodeMOVDDUPMask(MVT::v4f64, ShuffleMask);
298  break;
299 
300  case X86::MOVDDUPrr:
301  case X86::VMOVDDUPrr:
302  Src1Name = getRegName(MI->getOperand(1).getReg());
303  // FALL THROUGH.
304  case X86::MOVDDUPrm:
305  case X86::VMOVDDUPrm:
306  DestName = getRegName(MI->getOperand(0).getReg());
307  DecodeMOVDDUPMask(MVT::v2f64, ShuffleMask);
308  break;
309 
310  case X86::PSLLDQri:
311  case X86::VPSLLDQri:
312  Src1Name = getRegName(MI->getOperand(1).getReg());
313  DestName = getRegName(MI->getOperand(0).getReg());
314  if (MI->getOperand(MI->getNumOperands() - 1).isImm())
316  MI->getOperand(MI->getNumOperands() - 1).getImm(),
317  ShuffleMask);
318  break;
319 
320  case X86::VPSLLDQYri:
321  Src1Name = getRegName(MI->getOperand(1).getReg());
322  DestName = getRegName(MI->getOperand(0).getReg());
323  if (MI->getOperand(MI->getNumOperands() - 1).isImm())
325  MI->getOperand(MI->getNumOperands() - 1).getImm(),
326  ShuffleMask);
327  break;
328 
329  case X86::PSRLDQri:
330  case X86::VPSRLDQri:
331  Src1Name = getRegName(MI->getOperand(1).getReg());
332  DestName = getRegName(MI->getOperand(0).getReg());
333  if (MI->getOperand(MI->getNumOperands() - 1).isImm())
335  MI->getOperand(MI->getNumOperands() - 1).getImm(),
336  ShuffleMask);
337  break;
338 
339  case X86::VPSRLDQYri:
340  Src1Name = getRegName(MI->getOperand(1).getReg());
341  DestName = getRegName(MI->getOperand(0).getReg());
342  if (MI->getOperand(MI->getNumOperands() - 1).isImm())
344  MI->getOperand(MI->getNumOperands() - 1).getImm(),
345  ShuffleMask);
346  break;
347 
348  case X86::PALIGNR128rr:
349  case X86::VPALIGNR128rr:
350  Src1Name = getRegName(MI->getOperand(2).getReg());
351  // FALL THROUGH.
352  case X86::PALIGNR128rm:
353  case X86::VPALIGNR128rm:
354  Src2Name = getRegName(MI->getOperand(1).getReg());
355  DestName = getRegName(MI->getOperand(0).getReg());
356  if (MI->getOperand(MI->getNumOperands() - 1).isImm())
358  MI->getOperand(MI->getNumOperands() - 1).getImm(),
359  ShuffleMask);
360  break;
361  case X86::VPALIGNR256rr:
362  Src1Name = getRegName(MI->getOperand(2).getReg());
363  // FALL THROUGH.
364  case X86::VPALIGNR256rm:
365  Src2Name = getRegName(MI->getOperand(1).getReg());
366  DestName = getRegName(MI->getOperand(0).getReg());
367  if (MI->getOperand(MI->getNumOperands() - 1).isImm())
369  MI->getOperand(MI->getNumOperands() - 1).getImm(),
370  ShuffleMask);
371  break;
372 
373  case X86::PSHUFDri:
374  case X86::VPSHUFDri:
375  Src1Name = getRegName(MI->getOperand(1).getReg());
376  // FALL THROUGH.
377  case X86::PSHUFDmi:
378  case X86::VPSHUFDmi:
379  DestName = getRegName(MI->getOperand(0).getReg());
380  if (MI->getOperand(MI->getNumOperands() - 1).isImm())
382  MI->getOperand(MI->getNumOperands() - 1).getImm(),
383  ShuffleMask);
384  break;
385  case X86::VPSHUFDYri:
386  Src1Name = getRegName(MI->getOperand(1).getReg());
387  // FALL THROUGH.
388  case X86::VPSHUFDYmi:
389  DestName = getRegName(MI->getOperand(0).getReg());
390  if (MI->getOperand(MI->getNumOperands() - 1).isImm())
392  MI->getOperand(MI->getNumOperands() - 1).getImm(),
393  ShuffleMask);
394  break;
395 
396  case X86::PSHUFHWri:
397  case X86::VPSHUFHWri:
398  Src1Name = getRegName(MI->getOperand(1).getReg());
399  // FALL THROUGH.
400  case X86::PSHUFHWmi:
401  case X86::VPSHUFHWmi:
402  DestName = getRegName(MI->getOperand(0).getReg());
403  if (MI->getOperand(MI->getNumOperands() - 1).isImm())
405  MI->getOperand(MI->getNumOperands() - 1).getImm(),
406  ShuffleMask);
407  break;
408  case X86::VPSHUFHWYri:
409  Src1Name = getRegName(MI->getOperand(1).getReg());
410  // FALL THROUGH.
411  case X86::VPSHUFHWYmi:
412  DestName = getRegName(MI->getOperand(0).getReg());
413  if (MI->getOperand(MI->getNumOperands() - 1).isImm())
415  MI->getOperand(MI->getNumOperands() - 1).getImm(),
416  ShuffleMask);
417  break;
418  case X86::PSHUFLWri:
419  case X86::VPSHUFLWri:
420  Src1Name = getRegName(MI->getOperand(1).getReg());
421  // FALL THROUGH.
422  case X86::PSHUFLWmi:
423  case X86::VPSHUFLWmi:
424  DestName = getRegName(MI->getOperand(0).getReg());
425  if (MI->getOperand(MI->getNumOperands() - 1).isImm())
427  MI->getOperand(MI->getNumOperands() - 1).getImm(),
428  ShuffleMask);
429  break;
430  case X86::VPSHUFLWYri:
431  Src1Name = getRegName(MI->getOperand(1).getReg());
432  // FALL THROUGH.
433  case X86::VPSHUFLWYmi:
434  DestName = getRegName(MI->getOperand(0).getReg());
435  if (MI->getOperand(MI->getNumOperands() - 1).isImm())
437  MI->getOperand(MI->getNumOperands() - 1).getImm(),
438  ShuffleMask);
439  break;
440 
441  case X86::PUNPCKHBWrr:
442  case X86::VPUNPCKHBWrr:
443  Src2Name = getRegName(MI->getOperand(2).getReg());
444  // FALL THROUGH.
445  case X86::PUNPCKHBWrm:
446  case X86::VPUNPCKHBWrm:
447  Src1Name = getRegName(MI->getOperand(1).getReg());
448  DestName = getRegName(MI->getOperand(0).getReg());
449  DecodeUNPCKHMask(MVT::v16i8, ShuffleMask);
450  break;
451  case X86::VPUNPCKHBWYrr:
452  Src2Name = getRegName(MI->getOperand(2).getReg());
453  // FALL THROUGH.
454  case X86::VPUNPCKHBWYrm:
455  Src1Name = getRegName(MI->getOperand(1).getReg());
456  DestName = getRegName(MI->getOperand(0).getReg());
457  DecodeUNPCKHMask(MVT::v32i8, ShuffleMask);
458  break;
459  case X86::PUNPCKHWDrr:
460  case X86::VPUNPCKHWDrr:
461  Src2Name = getRegName(MI->getOperand(2).getReg());
462  // FALL THROUGH.
463  case X86::PUNPCKHWDrm:
464  case X86::VPUNPCKHWDrm:
465  Src1Name = getRegName(MI->getOperand(1).getReg());
466  DestName = getRegName(MI->getOperand(0).getReg());
467  DecodeUNPCKHMask(MVT::v8i16, ShuffleMask);
468  break;
469  case X86::VPUNPCKHWDYrr:
470  Src2Name = getRegName(MI->getOperand(2).getReg());
471  // FALL THROUGH.
472  case X86::VPUNPCKHWDYrm:
473  Src1Name = getRegName(MI->getOperand(1).getReg());
474  DestName = getRegName(MI->getOperand(0).getReg());
475  DecodeUNPCKHMask(MVT::v16i16, ShuffleMask);
476  break;
477  case X86::PUNPCKHDQrr:
478  case X86::VPUNPCKHDQrr:
479  Src2Name = getRegName(MI->getOperand(2).getReg());
480  // FALL THROUGH.
481  case X86::PUNPCKHDQrm:
482  case X86::VPUNPCKHDQrm:
483  Src1Name = getRegName(MI->getOperand(1).getReg());
484  DestName = getRegName(MI->getOperand(0).getReg());
485  DecodeUNPCKHMask(MVT::v4i32, ShuffleMask);
486  break;
487  case X86::VPUNPCKHDQYrr:
488  Src2Name = getRegName(MI->getOperand(2).getReg());
489  // FALL THROUGH.
490  case X86::VPUNPCKHDQYrm:
491  Src1Name = getRegName(MI->getOperand(1).getReg());
492  DestName = getRegName(MI->getOperand(0).getReg());
493  DecodeUNPCKHMask(MVT::v8i32, ShuffleMask);
494  break;
495  case X86::VPUNPCKHDQZrr:
496  Src2Name = getRegName(MI->getOperand(2).getReg());
497  // FALL THROUGH.
498  case X86::VPUNPCKHDQZrm:
499  Src1Name = getRegName(MI->getOperand(1).getReg());
500  DestName = getRegName(MI->getOperand(0).getReg());
501  DecodeUNPCKHMask(MVT::v16i32, ShuffleMask);
502  break;
503  case X86::PUNPCKHQDQrr:
504  case X86::VPUNPCKHQDQrr:
505  Src2Name = getRegName(MI->getOperand(2).getReg());
506  // FALL THROUGH.
507  case X86::PUNPCKHQDQrm:
508  case X86::VPUNPCKHQDQrm:
509  Src1Name = getRegName(MI->getOperand(1).getReg());
510  DestName = getRegName(MI->getOperand(0).getReg());
511  DecodeUNPCKHMask(MVT::v2i64, ShuffleMask);
512  break;
513  case X86::VPUNPCKHQDQYrr:
514  Src2Name = getRegName(MI->getOperand(2).getReg());
515  // FALL THROUGH.
516  case X86::VPUNPCKHQDQYrm:
517  Src1Name = getRegName(MI->getOperand(1).getReg());
518  DestName = getRegName(MI->getOperand(0).getReg());
519  DecodeUNPCKHMask(MVT::v4i64, ShuffleMask);
520  break;
521  case X86::VPUNPCKHQDQZrr:
522  Src2Name = getRegName(MI->getOperand(2).getReg());
523  // FALL THROUGH.
524  case X86::VPUNPCKHQDQZrm:
525  Src1Name = getRegName(MI->getOperand(1).getReg());
526  DestName = getRegName(MI->getOperand(0).getReg());
527  DecodeUNPCKHMask(MVT::v8i64, ShuffleMask);
528  break;
529 
530  case X86::PUNPCKLBWrr:
531  case X86::VPUNPCKLBWrr:
532  Src2Name = getRegName(MI->getOperand(2).getReg());
533  // FALL THROUGH.
534  case X86::PUNPCKLBWrm:
535  case X86::VPUNPCKLBWrm:
536  Src1Name = getRegName(MI->getOperand(1).getReg());
537  DestName = getRegName(MI->getOperand(0).getReg());
538  DecodeUNPCKLMask(MVT::v16i8, ShuffleMask);
539  break;
540  case X86::VPUNPCKLBWYrr:
541  Src2Name = getRegName(MI->getOperand(2).getReg());
542  // FALL THROUGH.
543  case X86::VPUNPCKLBWYrm:
544  Src1Name = getRegName(MI->getOperand(1).getReg());
545  DestName = getRegName(MI->getOperand(0).getReg());
546  DecodeUNPCKLMask(MVT::v32i8, ShuffleMask);
547  break;
548  case X86::PUNPCKLWDrr:
549  case X86::VPUNPCKLWDrr:
550  Src2Name = getRegName(MI->getOperand(2).getReg());
551  // FALL THROUGH.
552  case X86::PUNPCKLWDrm:
553  case X86::VPUNPCKLWDrm:
554  Src1Name = getRegName(MI->getOperand(1).getReg());
555  DestName = getRegName(MI->getOperand(0).getReg());
556  DecodeUNPCKLMask(MVT::v8i16, ShuffleMask);
557  break;
558  case X86::VPUNPCKLWDYrr:
559  Src2Name = getRegName(MI->getOperand(2).getReg());
560  // FALL THROUGH.
561  case X86::VPUNPCKLWDYrm:
562  Src1Name = getRegName(MI->getOperand(1).getReg());
563  DestName = getRegName(MI->getOperand(0).getReg());
564  DecodeUNPCKLMask(MVT::v16i16, ShuffleMask);
565  break;
566  case X86::PUNPCKLDQrr:
567  case X86::VPUNPCKLDQrr:
568  Src2Name = getRegName(MI->getOperand(2).getReg());
569  // FALL THROUGH.
570  case X86::PUNPCKLDQrm:
571  case X86::VPUNPCKLDQrm:
572  Src1Name = getRegName(MI->getOperand(1).getReg());
573  DestName = getRegName(MI->getOperand(0).getReg());
574  DecodeUNPCKLMask(MVT::v4i32, ShuffleMask);
575  break;
576  case X86::VPUNPCKLDQYrr:
577  Src2Name = getRegName(MI->getOperand(2).getReg());
578  // FALL THROUGH.
579  case X86::VPUNPCKLDQYrm:
580  Src1Name = getRegName(MI->getOperand(1).getReg());
581  DestName = getRegName(MI->getOperand(0).getReg());
582  DecodeUNPCKLMask(MVT::v8i32, ShuffleMask);
583  break;
584  case X86::VPUNPCKLDQZrr:
585  Src2Name = getRegName(MI->getOperand(2).getReg());
586  // FALL THROUGH.
587  case X86::VPUNPCKLDQZrm:
588  Src1Name = getRegName(MI->getOperand(1).getReg());
589  DestName = getRegName(MI->getOperand(0).getReg());
590  DecodeUNPCKLMask(MVT::v16i32, ShuffleMask);
591  break;
592  case X86::PUNPCKLQDQrr:
593  case X86::VPUNPCKLQDQrr:
594  Src2Name = getRegName(MI->getOperand(2).getReg());
595  // FALL THROUGH.
596  case X86::PUNPCKLQDQrm:
597  case X86::VPUNPCKLQDQrm:
598  Src1Name = getRegName(MI->getOperand(1).getReg());
599  DestName = getRegName(MI->getOperand(0).getReg());
600  DecodeUNPCKLMask(MVT::v2i64, ShuffleMask);
601  break;
602  case X86::VPUNPCKLQDQYrr:
603  Src2Name = getRegName(MI->getOperand(2).getReg());
604  // FALL THROUGH.
605  case X86::VPUNPCKLQDQYrm:
606  Src1Name = getRegName(MI->getOperand(1).getReg());
607  DestName = getRegName(MI->getOperand(0).getReg());
608  DecodeUNPCKLMask(MVT::v4i64, ShuffleMask);
609  break;
610  case X86::VPUNPCKLQDQZrr:
611  Src2Name = getRegName(MI->getOperand(2).getReg());
612  // FALL THROUGH.
613  case X86::VPUNPCKLQDQZrm:
614  Src1Name = getRegName(MI->getOperand(1).getReg());
615  DestName = getRegName(MI->getOperand(0).getReg());
616  DecodeUNPCKLMask(MVT::v8i64, ShuffleMask);
617  break;
618 
619  case X86::SHUFPDrri:
620  case X86::VSHUFPDrri:
621  Src2Name = getRegName(MI->getOperand(2).getReg());
622  // FALL THROUGH.
623  case X86::SHUFPDrmi:
624  case X86::VSHUFPDrmi:
625  if (MI->getOperand(MI->getNumOperands() - 1).isImm())
627  MI->getOperand(MI->getNumOperands() - 1).getImm(),
628  ShuffleMask);
629  Src1Name = getRegName(MI->getOperand(1).getReg());
630  DestName = getRegName(MI->getOperand(0).getReg());
631  break;
632  case X86::VSHUFPDYrri:
633  Src2Name = getRegName(MI->getOperand(2).getReg());
634  // FALL THROUGH.
635  case X86::VSHUFPDYrmi:
636  if (MI->getOperand(MI->getNumOperands() - 1).isImm())
638  MI->getOperand(MI->getNumOperands() - 1).getImm(),
639  ShuffleMask);
640  Src1Name = getRegName(MI->getOperand(1).getReg());
641  DestName = getRegName(MI->getOperand(0).getReg());
642  break;
643 
644  case X86::SHUFPSrri:
645  case X86::VSHUFPSrri:
646  Src2Name = getRegName(MI->getOperand(2).getReg());
647  // FALL THROUGH.
648  case X86::SHUFPSrmi:
649  case X86::VSHUFPSrmi:
650  if (MI->getOperand(MI->getNumOperands() - 1).isImm())
652  MI->getOperand(MI->getNumOperands() - 1).getImm(),
653  ShuffleMask);
654  Src1Name = getRegName(MI->getOperand(1).getReg());
655  DestName = getRegName(MI->getOperand(0).getReg());
656  break;
657  case X86::VSHUFPSYrri:
658  Src2Name = getRegName(MI->getOperand(2).getReg());
659  // FALL THROUGH.
660  case X86::VSHUFPSYrmi:
661  if (MI->getOperand(MI->getNumOperands() - 1).isImm())
663  MI->getOperand(MI->getNumOperands() - 1).getImm(),
664  ShuffleMask);
665  Src1Name = getRegName(MI->getOperand(1).getReg());
666  DestName = getRegName(MI->getOperand(0).getReg());
667  break;
668 
669  case X86::UNPCKLPDrr:
670  case X86::VUNPCKLPDrr:
671  Src2Name = getRegName(MI->getOperand(2).getReg());
672  // FALL THROUGH.
673  case X86::UNPCKLPDrm:
674  case X86::VUNPCKLPDrm:
675  DecodeUNPCKLMask(MVT::v2f64, ShuffleMask);
676  Src1Name = getRegName(MI->getOperand(1).getReg());
677  DestName = getRegName(MI->getOperand(0).getReg());
678  break;
679  case X86::VUNPCKLPDYrr:
680  Src2Name = getRegName(MI->getOperand(2).getReg());
681  // FALL THROUGH.
682  case X86::VUNPCKLPDYrm:
683  DecodeUNPCKLMask(MVT::v4f64, ShuffleMask);
684  Src1Name = getRegName(MI->getOperand(1).getReg());
685  DestName = getRegName(MI->getOperand(0).getReg());
686  break;
687  case X86::VUNPCKLPDZrr:
688  Src2Name = getRegName(MI->getOperand(2).getReg());
689  // FALL THROUGH.
690  case X86::VUNPCKLPDZrm:
691  DecodeUNPCKLMask(MVT::v8f64, ShuffleMask);
692  Src1Name = getRegName(MI->getOperand(1).getReg());
693  DestName = getRegName(MI->getOperand(0).getReg());
694  break;
695  case X86::UNPCKLPSrr:
696  case X86::VUNPCKLPSrr:
697  Src2Name = getRegName(MI->getOperand(2).getReg());
698  // FALL THROUGH.
699  case X86::UNPCKLPSrm:
700  case X86::VUNPCKLPSrm:
701  DecodeUNPCKLMask(MVT::v4f32, ShuffleMask);
702  Src1Name = getRegName(MI->getOperand(1).getReg());
703  DestName = getRegName(MI->getOperand(0).getReg());
704  break;
705  case X86::VUNPCKLPSYrr:
706  Src2Name = getRegName(MI->getOperand(2).getReg());
707  // FALL THROUGH.
708  case X86::VUNPCKLPSYrm:
709  DecodeUNPCKLMask(MVT::v8f32, ShuffleMask);
710  Src1Name = getRegName(MI->getOperand(1).getReg());
711  DestName = getRegName(MI->getOperand(0).getReg());
712  break;
713  case X86::VUNPCKLPSZrr:
714  Src2Name = getRegName(MI->getOperand(2).getReg());
715  // FALL THROUGH.
716  case X86::VUNPCKLPSZrm:
717  DecodeUNPCKLMask(MVT::v16f32, ShuffleMask);
718  Src1Name = getRegName(MI->getOperand(1).getReg());
719  DestName = getRegName(MI->getOperand(0).getReg());
720  break;
721  case X86::UNPCKHPDrr:
722  case X86::VUNPCKHPDrr:
723  Src2Name = getRegName(MI->getOperand(2).getReg());
724  // FALL THROUGH.
725  case X86::UNPCKHPDrm:
726  case X86::VUNPCKHPDrm:
727  DecodeUNPCKHMask(MVT::v2f64, ShuffleMask);
728  Src1Name = getRegName(MI->getOperand(1).getReg());
729  DestName = getRegName(MI->getOperand(0).getReg());
730  break;
731  case X86::VUNPCKHPDYrr:
732  Src2Name = getRegName(MI->getOperand(2).getReg());
733  // FALL THROUGH.
734  case X86::VUNPCKHPDYrm:
735  DecodeUNPCKHMask(MVT::v4f64, ShuffleMask);
736  Src1Name = getRegName(MI->getOperand(1).getReg());
737  DestName = getRegName(MI->getOperand(0).getReg());
738  break;
739  case X86::VUNPCKHPDZrr:
740  Src2Name = getRegName(MI->getOperand(2).getReg());
741  // FALL THROUGH.
742  case X86::VUNPCKHPDZrm:
743  DecodeUNPCKHMask(MVT::v8f64, ShuffleMask);
744  Src1Name = getRegName(MI->getOperand(1).getReg());
745  DestName = getRegName(MI->getOperand(0).getReg());
746  break;
747  case X86::UNPCKHPSrr:
748  case X86::VUNPCKHPSrr:
749  Src2Name = getRegName(MI->getOperand(2).getReg());
750  // FALL THROUGH.
751  case X86::UNPCKHPSrm:
752  case X86::VUNPCKHPSrm:
753  DecodeUNPCKHMask(MVT::v4f32, ShuffleMask);
754  Src1Name = getRegName(MI->getOperand(1).getReg());
755  DestName = getRegName(MI->getOperand(0).getReg());
756  break;
757  case X86::VUNPCKHPSYrr:
758  Src2Name = getRegName(MI->getOperand(2).getReg());
759  // FALL THROUGH.
760  case X86::VUNPCKHPSYrm:
761  DecodeUNPCKHMask(MVT::v8f32, ShuffleMask);
762  Src1Name = getRegName(MI->getOperand(1).getReg());
763  DestName = getRegName(MI->getOperand(0).getReg());
764  break;
765  case X86::VUNPCKHPSZrr:
766  Src2Name = getRegName(MI->getOperand(2).getReg());
767  // FALL THROUGH.
768  case X86::VUNPCKHPSZrm:
769  DecodeUNPCKHMask(MVT::v16f32, ShuffleMask);
770  Src1Name = getRegName(MI->getOperand(1).getReg());
771  DestName = getRegName(MI->getOperand(0).getReg());
772  break;
773  case X86::VPERMILPSri:
774  Src1Name = getRegName(MI->getOperand(1).getReg());
775  // FALL THROUGH.
776  case X86::VPERMILPSmi:
777  if (MI->getOperand(MI->getNumOperands() - 1).isImm())
779  MI->getOperand(MI->getNumOperands() - 1).getImm(),
780  ShuffleMask);
781  DestName = getRegName(MI->getOperand(0).getReg());
782  break;
783  case X86::VPERMILPSYri:
784  Src1Name = getRegName(MI->getOperand(1).getReg());
785  // FALL THROUGH.
786  case X86::VPERMILPSYmi:
787  if (MI->getOperand(MI->getNumOperands() - 1).isImm())
789  MI->getOperand(MI->getNumOperands() - 1).getImm(),
790  ShuffleMask);
791  DestName = getRegName(MI->getOperand(0).getReg());
792  break;
793  case X86::VPERMILPDri:
794  Src1Name = getRegName(MI->getOperand(1).getReg());
795  // FALL THROUGH.
796  case X86::VPERMILPDmi:
797  if (MI->getOperand(MI->getNumOperands() - 1).isImm())
799  MI->getOperand(MI->getNumOperands() - 1).getImm(),
800  ShuffleMask);
801  DestName = getRegName(MI->getOperand(0).getReg());
802  break;
803  case X86::VPERMILPDYri:
804  Src1Name = getRegName(MI->getOperand(1).getReg());
805  // FALL THROUGH.
806  case X86::VPERMILPDYmi:
807  if (MI->getOperand(MI->getNumOperands() - 1).isImm())
809  MI->getOperand(MI->getNumOperands() - 1).getImm(),
810  ShuffleMask);
811  DestName = getRegName(MI->getOperand(0).getReg());
812  break;
813  case X86::VPERM2F128rr:
814  case X86::VPERM2I128rr:
815  Src2Name = getRegName(MI->getOperand(2).getReg());
816  // FALL THROUGH.
817  case X86::VPERM2F128rm:
818  case X86::VPERM2I128rm:
819  // For instruction comments purpose, assume the 256-bit vector is v4i64.
820  if (MI->getOperand(MI->getNumOperands() - 1).isImm())
822  MI->getOperand(MI->getNumOperands() - 1).getImm(),
823  ShuffleMask);
824  Src1Name = getRegName(MI->getOperand(1).getReg());
825  DestName = getRegName(MI->getOperand(0).getReg());
826  break;
827  case X86::VPERMQYri:
828  case X86::VPERMPDYri:
829  Src1Name = getRegName(MI->getOperand(1).getReg());
830  // FALL THROUGH.
831  case X86::VPERMQYmi:
832  case X86::VPERMPDYmi:
833  if (MI->getOperand(MI->getNumOperands() - 1).isImm())
834  DecodeVPERMMask(MI->getOperand(MI->getNumOperands() - 1).getImm(),
835  ShuffleMask);
836  DestName = getRegName(MI->getOperand(0).getReg());
837  break;
838 
839  case X86::MOVSDrr:
840  case X86::VMOVSDrr:
841  Src2Name = getRegName(MI->getOperand(2).getReg());
842  Src1Name = getRegName(MI->getOperand(1).getReg());
843  // FALL THROUGH.
844  case X86::MOVSDrm:
845  case X86::VMOVSDrm:
846  DecodeScalarMoveMask(MVT::v2f64, nullptr == Src2Name, ShuffleMask);
847  DestName = getRegName(MI->getOperand(0).getReg());
848  break;
849  case X86::MOVSSrr:
850  case X86::VMOVSSrr:
851  Src2Name = getRegName(MI->getOperand(2).getReg());
852  Src1Name = getRegName(MI->getOperand(1).getReg());
853  // FALL THROUGH.
854  case X86::MOVSSrm:
855  case X86::VMOVSSrm:
856  DecodeScalarMoveMask(MVT::v4f32, nullptr == Src2Name, ShuffleMask);
857  DestName = getRegName(MI->getOperand(0).getReg());
858  break;
859 
860  case X86::MOVPQI2QIrr:
861  case X86::MOVZPQILo2PQIrr:
862  case X86::VMOVPQI2QIrr:
863  case X86::VMOVZPQILo2PQIrr:
864  Src1Name = getRegName(MI->getOperand(1).getReg());
865  // FALL THROUGH.
866  case X86::MOVQI2PQIrm:
867  case X86::MOVZQI2PQIrm:
868  case X86::MOVZPQILo2PQIrm:
869  case X86::VMOVQI2PQIrm:
870  case X86::VMOVZQI2PQIrm:
871  case X86::VMOVZPQILo2PQIrm:
872  DecodeZeroMoveLowMask(MVT::v2i64, ShuffleMask);
873  DestName = getRegName(MI->getOperand(0).getReg());
874  break;
875  case X86::MOVDI2PDIrm:
876  case X86::VMOVDI2PDIrm:
877  DecodeZeroMoveLowMask(MVT::v4i32, ShuffleMask);
878  DestName = getRegName(MI->getOperand(0).getReg());
879  break;
880 
881  case X86::EXTRQI:
882  if (MI->getOperand(2).isImm() &&
883  MI->getOperand(3).isImm())
885  MI->getOperand(3).getImm(),
886  ShuffleMask);
887 
888  DestName = getRegName(MI->getOperand(0).getReg());
889  Src1Name = getRegName(MI->getOperand(1).getReg());
890  break;
891 
892  case X86::INSERTQI:
893  if (MI->getOperand(3).isImm() &&
894  MI->getOperand(4).isImm())
896  MI->getOperand(4).getImm(),
897  ShuffleMask);
898 
899  DestName = getRegName(MI->getOperand(0).getReg());
900  Src1Name = getRegName(MI->getOperand(1).getReg());
901  Src2Name = getRegName(MI->getOperand(2).getReg());
902  break;
903 
904  case X86::PMOVZXBWrr:
905  case X86::PMOVZXBDrr:
906  case X86::PMOVZXBQrr:
907  case X86::PMOVZXWDrr:
908  case X86::PMOVZXWQrr:
909  case X86::PMOVZXDQrr:
910  case X86::VPMOVZXBWrr:
911  case X86::VPMOVZXBDrr:
912  case X86::VPMOVZXBQrr:
913  case X86::VPMOVZXWDrr:
914  case X86::VPMOVZXWQrr:
915  case X86::VPMOVZXDQrr:
916  case X86::VPMOVZXBWYrr:
917  case X86::VPMOVZXBDYrr:
918  case X86::VPMOVZXBQYrr:
919  case X86::VPMOVZXWDYrr:
920  case X86::VPMOVZXWQYrr:
921  case X86::VPMOVZXDQYrr:
922  Src1Name = getRegName(MI->getOperand(1).getReg());
923  // FALL THROUGH.
924  case X86::PMOVZXBWrm:
925  case X86::PMOVZXBDrm:
926  case X86::PMOVZXBQrm:
927  case X86::PMOVZXWDrm:
928  case X86::PMOVZXWQrm:
929  case X86::PMOVZXDQrm:
930  case X86::VPMOVZXBWrm:
931  case X86::VPMOVZXBDrm:
932  case X86::VPMOVZXBQrm:
933  case X86::VPMOVZXWDrm:
934  case X86::VPMOVZXWQrm:
935  case X86::VPMOVZXDQrm:
936  case X86::VPMOVZXBWYrm:
937  case X86::VPMOVZXBDYrm:
938  case X86::VPMOVZXBQYrm:
939  case X86::VPMOVZXWDYrm:
940  case X86::VPMOVZXWQYrm:
941  case X86::VPMOVZXDQYrm: {
942  MVT SrcVT, DstVT;
943  getZeroExtensionTypes(MI, SrcVT, DstVT);
944  DecodeZeroExtendMask(SrcVT, DstVT, ShuffleMask);
945  DestName = getRegName(MI->getOperand(0).getReg());
946  } break;
947  }
948 
949  // The only comments we decode are shuffles, so give up if we were unable to
950  // decode a shuffle mask.
951  if (ShuffleMask.empty())
952  return false;
953 
954  if (!DestName) DestName = Src1Name;
955  OS << (DestName ? DestName : "mem") << " = ";
956 
957  // If the two sources are the same, canonicalize the input elements to be
958  // from the first src so that we get larger element spans.
959  if (Src1Name == Src2Name) {
960  for (unsigned i = 0, e = ShuffleMask.size(); i != e; ++i) {
961  if ((int)ShuffleMask[i] >= 0 && // Not sentinel.
962  ShuffleMask[i] >= (int)e) // From second mask.
963  ShuffleMask[i] -= e;
964  }
965  }
966 
967  // The shuffle mask specifies which elements of the src1/src2 fill in the
968  // destination, with a few sentinel values. Loop through and print them
969  // out.
970  for (unsigned i = 0, e = ShuffleMask.size(); i != e; ++i) {
971  if (i != 0)
972  OS << ',';
973  if (ShuffleMask[i] == SM_SentinelZero) {
974  OS << "zero";
975  continue;
976  }
977 
978  // Otherwise, it must come from src1 or src2. Print the span of elements
979  // that comes from this src.
980  bool isSrc1 = ShuffleMask[i] < (int)ShuffleMask.size();
981  const char *SrcName = isSrc1 ? Src1Name : Src2Name;
982  OS << (SrcName ? SrcName : "mem") << '[';
983  bool IsFirst = true;
984  while (i != e && (int)ShuffleMask[i] != SM_SentinelZero &&
985  (ShuffleMask[i] < (int)ShuffleMask.size()) == isSrc1) {
986  if (!IsFirst)
987  OS << ',';
988  else
989  IsFirst = false;
990  if (ShuffleMask[i] == SM_SentinelUndef)
991  OS << "u";
992  else
993  OS << ShuffleMask[i] % ShuffleMask.size();
994  ++i;
995  }
996  OS << ']';
997  --i; // For loop increments element #.
998  }
999  //MI->print(OS, 0);
1000  OS << "\n";
1001 
1002  // We successfully added a comment to this instruction.
1003  return true;
1004 }
void DecodePSLLDQMask(MVT VT, unsigned Imm, SmallVectorImpl< int > &ShuffleMask)
void DecodeScalarMoveMask(MVT VT, bool IsLoad, SmallVectorImpl< int > &Mask)
Decode a scalar float move instruction as a shuffle mask.
void DecodePALIGNRMask(MVT VT, unsigned Imm, SmallVectorImpl< int > &ShuffleMask)
void DecodeUNPCKLMask(MVT VT, SmallVectorImpl< int > &ShuffleMask)
DecodeUNPCKLMask - This decodes the shuffle masks for unpcklps/unpcklpd and punpckl*.
SSE4A Extraction and Insertion.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:98
void DecodeMOVDDUPMask(MVT VT, SmallVectorImpl< int > &ShuffleMask)
void DecodeEXTRQIMask(int Len, int Idx, SmallVectorImpl< int > &ShuffleMask)
Decode a SSE4A EXTRQ instruction as a v16i8 shuffle mask.
void DecodeINSERTQIMask(int Len, int Idx, SmallVectorImpl< int > &ShuffleMask)
Decode a SSE4A INSERTQ instruction as a v16i8 shuffle mask.
bool LLVM_ATTRIBUTE_UNUSED_RESULT empty() const
Definition: SmallVector.h:57
unsigned getReg() const
Returns the register number.
Definition: MCInst.h:63
void DecodeZeroMoveLowMask(MVT VT, SmallVectorImpl< int > &ShuffleMask)
Decode a move lower and zero upper instruction as a shuffle mask.
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:150
void DecodeBLENDMask(MVT VT, unsigned Imm, SmallVectorImpl< int > &ShuffleMask)
Decode a BLEND immediate mask into a shuffle mask.
bool isImm() const
Definition: MCInst.h:57
void DecodeMOVSHDUPMask(MVT VT, SmallVectorImpl< int > &ShuffleMask)
void DecodeMOVLHPSMask(unsigned NElts, SmallVectorImpl< int > &ShuffleMask)
MVT - Machine Value Type.
void DecodeSHUFPMask(MVT VT, unsigned Imm, SmallVectorImpl< int > &ShuffleMask)
DecodeSHUFPMask - This decodes the shuffle masks for shufp*.
void DecodePSHUFLWMask(MVT VT, unsigned Imm, SmallVectorImpl< int > &ShuffleMask)
void DecodeINSERTPSMask(unsigned Imm, SmallVectorImpl< int > &ShuffleMask)
void DecodePSRLDQMask(MVT VT, unsigned Imm, SmallVectorImpl< int > &ShuffleMask)
void DecodeMOVSLDUPMask(MVT VT, SmallVectorImpl< int > &ShuffleMask)
void DecodePSHUFMask(MVT VT, unsigned Imm, SmallVectorImpl< int > &ShuffleMask)
DecodePSHUFMask - This decodes the shuffle masks for pshufd, and vpermilp*.
unsigned getOpcode() const
Definition: MCInst.h:159
int64_t getImm() const
Definition: MCInst.h:74
void DecodeUNPCKHMask(MVT VT, SmallVectorImpl< int > &ShuffleMask)
DecodeUNPCKHMask - This decodes the shuffle masks for unpckhps/unpckhpd and punpckh*.
void DecodeVPERM2X128Mask(MVT VT, unsigned Imm, SmallVectorImpl< int > &ShuffleMask)
void DecodePSHUFHWMask(MVT VT, unsigned Imm, SmallVectorImpl< int > &ShuffleMask)
unsigned getNumOperands() const
Definition: MCInst.h:166
static void getZeroExtensionTypes(const MCInst *MI, MVT &SrcVT, MVT &DstVT)
Extracts the src/dst types for a given zero extension instruction.
void DecodeZeroExtendMask(MVT SrcVT, MVT DstVT, SmallVectorImpl< int > &Mask)
Decode a zero extension instruction as a shuffle mask.
void DecodeVPERMMask(unsigned Imm, SmallVectorImpl< int > &ShuffleMask)
DecodeVPERMMask - this decodes the shuffle masks for VPERMQ/VPERMPD.
This class implements an extremely fast bulk output stream that can only output to a stream...
Definition: raw_ostream.h:38
void DecodeMOVHLPSMask(unsigned NElts, SmallVectorImpl< int > &ShuffleMask)
const MCOperand & getOperand(unsigned i) const
Definition: MCInst.h:164
bool EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS, const char *(*getRegName)(unsigned))
EmitAnyX86InstComments - This function decodes x86 instructions and prints newline terminated strings...