LLVM  3.7.0
MipsMCTargetDesc.cpp
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1 //===-- MipsMCTargetDesc.cpp - Mips Target Descriptions -------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file provides Mips specific target descriptions.
11 //
12 //===----------------------------------------------------------------------===//
13 
15 #include "MipsELFStreamer.h"
16 #include "MipsMCAsmInfo.h"
17 #include "MipsMCNaCl.h"
18 #include "MipsMCTargetDesc.h"
19 #include "MipsTargetStreamer.h"
20 #include "llvm/ADT/Triple.h"
21 #include "llvm/MC/MCCodeGenInfo.h"
22 #include "llvm/MC/MCELFStreamer.h"
23 #include "llvm/MC/MCInstrInfo.h"
24 #include "llvm/MC/MCRegisterInfo.h"
26 #include "llvm/MC/MCSymbol.h"
32 
33 using namespace llvm;
34 
35 #define GET_INSTRINFO_MC_DESC
36 #include "MipsGenInstrInfo.inc"
37 
38 #define GET_SUBTARGETINFO_MC_DESC
39 #include "MipsGenSubtargetInfo.inc"
40 
41 #define GET_REGINFO_MC_DESC
42 #include "MipsGenRegisterInfo.inc"
43 
44 /// Select the Mips CPU for the given triple and cpu name.
45 /// FIXME: Merge with the copy in MipsSubtarget.cpp
47  if (CPU.empty() || CPU == "generic") {
48  if (TT.getArch() == Triple::mips || TT.getArch() == Triple::mipsel)
49  CPU = "mips32";
50  else
51  CPU = "mips64";
52  }
53  return CPU;
54 }
55 
57  MCInstrInfo *X = new MCInstrInfo();
58  InitMipsMCInstrInfo(X);
59  return X;
60 }
61 
64  InitMipsMCRegisterInfo(X, Mips::RA);
65  return X;
66 }
67 
69  StringRef CPU, StringRef FS) {
70  CPU = MIPS_MC::selectMipsCPU(TT, CPU);
71  return createMipsMCSubtargetInfoImpl(TT, CPU, FS);
72 }
73 
75  const Triple &TT) {
76  MCAsmInfo *MAI = new MipsMCAsmInfo(TT);
77 
78  unsigned SP = MRI.getDwarfRegNum(Mips::SP, true);
79  MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, SP, 0);
80  MAI->addInitialFrameState(Inst);
81 
82  return MAI;
83 }
84 
87  CodeGenOpt::Level OL) {
88  MCCodeGenInfo *X = new MCCodeGenInfo();
89  if (CM == CodeModel::JITDefault)
90  RM = Reloc::Static;
91  else if (RM == Reloc::Default)
92  RM = Reloc::PIC_;
93  X->initMCCodeGenInfo(RM, CM, OL);
94  return X;
95 }
96 
98  unsigned SyntaxVariant,
99  const MCAsmInfo &MAI,
100  const MCInstrInfo &MII,
101  const MCRegisterInfo &MRI) {
102  return new MipsInstPrinter(MAI, MII, MRI);
103 }
104 
105 static MCStreamer *createMCStreamer(const Triple &T, MCContext &Context,
107  MCCodeEmitter *Emitter, bool RelaxAll) {
108  MCStreamer *S;
109  if (!T.isOSNaCl())
110  S = createMipsELFStreamer(Context, MAB, OS, Emitter, RelaxAll);
111  else
112  S = createMipsNaClELFStreamer(Context, MAB, OS, Emitter, RelaxAll);
113  return S;
114 }
115 
118  MCInstPrinter *InstPrint,
119  bool isVerboseAsm) {
120  return new MipsTargetAsmStreamer(S, OS);
121 }
122 
124  return new MipsTargetStreamer(S);
125 }
126 
127 static MCTargetStreamer *
129  return new MipsTargetELFStreamer(S, STI);
130 }
131 
132 extern "C" void LLVMInitializeMipsTargetMC() {
134  &TheMips64elTarget}) {
135  // Register the MC asm info.
137 
138  // Register the MC codegen info.
140 
141  // Register the MC instruction info.
143 
144  // Register the MC register info.
146 
147  // Register the elf streamer.
149 
150  // Register the asm target streamer.
152 
155 
156  // Register the MC subtarget info.
158 
159  // Register the MCInstPrinter.
161 
164  }
165 
166  // Register the MC Code Emitter
167  for (Target *T : {&TheMipsTarget, &TheMips64Target})
169 
172 
173  // Register the asm backend.
182 
183 }
static MCInstPrinter * createMipsMCInstPrinter(const Triple &T, unsigned SyntaxVariant, const MCAsmInfo &MAI, const MCInstrInfo &MII, const MCRegisterInfo &MRI)
int getDwarfRegNum(unsigned RegNum, bool isEH) const
Map a target register to an equivalent dwarf register number.
MCAsmBackend * createMipsAsmBackendEL32(const Target &T, const MCRegisterInfo &MRI, const Triple &TT, StringRef CPU)
formatted_raw_ostream - A raw_ostream that wraps another one and keeps track of line and column posit...
static MCTargetStreamer * createMipsNullTargetStreamer(MCStreamer &S)
Target specific streamer interface.
Definition: MCStreamer.h:73
static MCRegisterInfo * createMipsMCRegisterInfo(const Triple &TT)
static MCAsmInfo * createMipsMCAsmInfo(const MCRegisterInfo &MRI, const Triple &TT)
static void RegisterMCInstPrinter(Target &T, Target::MCInstPrinterCtorTy Fn)
RegisterMCInstPrinter - Register a MCInstPrinter implementation for the given target.
static void RegisterAsmTargetStreamer(Target &T, Target::AsmTargetStreamerCtorTy Fn)
static MCTargetStreamer * createMipsAsmTargetStreamer(MCStreamer &S, formatted_raw_ostream &OS, MCInstPrinter *InstPrint, bool isVerboseAsm)
void LLVMInitializeMipsTargetMC()
static MCSubtargetInfo * createMipsMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS)
Context object for machine code objects.
Definition: MCContext.h:48
Target TheMips64elTarget
bool isOSNaCl() const
Tests whether the OS is NaCl (Native Client)
Definition: Triple.h:469
void addInitialFrameState(const MCCFIInstruction &Inst)
Definition: MCAsmInfo.h:534
static MCCodeGenInfo * createMipsMCCodeGenInfo(const Triple &TT, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL)
ArchType getArch() const
getArch - Get the parsed architecture type of this triple.
Definition: Triple.h:242
MCAsmBackend * createMipsAsmBackendEB32(const Target &T, const MCRegisterInfo &MRI, const Triple &TT, StringRef CPU)
MCCodeEmitter * createMipsMCCodeEmitterEL(const MCInstrInfo &MCII, const MCRegisterInfo &MRI, MCContext &Ctx)
Target TheMips64Target
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
This class is intended to be used as a base class for asm properties and features specific to the tar...
Definition: MCAsmInfo.h:58
static MCTargetStreamer * createMipsObjectTargetStreamer(MCStreamer &S, const MCSubtargetInfo &STI)
static void RegisterMCAsmBackend(Target &T, Target::MCAsmBackendCtorTy Fn)
RegisterMCAsmBackend - Register a MCAsmBackend implementation for the given target.
Streaming machine code generation interface.
Definition: MCStreamer.h:157
static MCInstrInfo * createMipsMCInstrInfo()
static MCCFIInstruction createDefCfa(MCSymbol *L, unsigned Register, int Offset)
.cfi_def_cfa defines a rule for computing CFA as: take address from Register and add Offset to it...
Definition: MCDwarf.h:354
static MCStreamer * createMCStreamer(const Triple &T, MCContext &Context, MCAsmBackend &MAB, raw_pwrite_stream &OS, MCCodeEmitter *Emitter, bool RelaxAll)
MCCodeEmitter - Generic instruction encoding interface.
Definition: MCCodeEmitter.h:23
Interface to description of machine instruction set.
Definition: MCInstrInfo.h:24
MCELFStreamer * createMipsNaClELFStreamer(MCContext &Context, MCAsmBackend &TAB, raw_pwrite_stream &OS, MCCodeEmitter *Emitter, bool RelaxAll)
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang","erlang-compatible garbage collector")
static void RegisterMCCodeGenInfo(Target &T, Target::MCCodeGenInfoCtorFnTy Fn)
RegisterMCCodeGenInfo - Register a MCCodeGenInfo implementation for the given target.
StringRef selectMipsCPU(const Triple &TT, StringRef CPU)
Select the Mips CPU for the given triple and cpu name.
MCELFStreamer * createMipsELFStreamer(MCContext &Context, MCAsmBackend &MAB, raw_pwrite_stream &OS, MCCodeEmitter *Emitter, bool RelaxAll)
static void RegisterMCSubtargetInfo(Target &T, Target::MCSubtargetInfoCtorFnTy Fn)
RegisterMCSubtargetInfo - Register a MCSubtargetInfo implementation for the given target...
static void RegisterObjectTargetStreamer(Target &T, Target::ObjectTargetStreamerCtorTy Fn)
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
static void RegisterMCCodeEmitter(Target &T, Target::MCCodeEmitterCtorTy Fn)
RegisterMCCodeEmitter - Register a MCCodeEmitter implementation for the given target.
MCAsmBackend * createMipsAsmBackendEL64(const Target &T, const MCRegisterInfo &MRI, const Triple &TT, StringRef CPU)
static void RegisterMCRegInfo(Target &T, Target::MCRegInfoCtorFnTy Fn)
RegisterMCRegInfo - Register a MCRegisterInfo implementation for the given target.
Target - Wrapper for Target specific information.
MCCodeEmitter * createMipsMCCodeEmitterEB(const MCInstrInfo &MCII, const MCRegisterInfo &MRI, MCContext &Ctx)
RegisterMCAsmInfoFn - Helper template for registering a target assembly info implementation.
This is an instance of a target assembly language printer that converts an MCInst to valid target ass...
Definition: MCInstPrinter.h:38
void initMCCodeGenInfo(Reloc::Model RM=Reloc::Default, CodeModel::Model CM=CodeModel::Default, CodeGenOpt::Level OL=CodeGenOpt::Default)
static void RegisterMCInstrInfo(Target &T, Target::MCInstrInfoCtorFnTy Fn)
RegisterMCInstrInfo - Register a MCInstrInfo implementation for the given target. ...
MCAsmBackend * createMipsAsmBackendEB64(const Target &T, const MCRegisterInfo &MRI, const Triple &TT, StringRef CPU)
MCSubtargetInfo - Generic base class for all target subtargets.
static void RegisterELFStreamer(Target &T, Target::ELFStreamerCtorTy Fn)
Target TheMipselTarget
An abstract base class for streams implementations that also support a pwrite operation.
Definition: raw_ostream.h:321
cl::opt< bool > RelaxAll("mc-relax-all", cl::desc("When used with filetype=obj, ""relax all fixups in the emitted object file"))
static void RegisterNullTargetStreamer(Target &T, Target::NullTargetStreamerCtorTy Fn)
Generic interface to target specific assembler backends.
Definition: MCAsmBackend.h:34
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:40
Target TheMipsTarget
bool empty() const
empty - Check if the string is empty.
Definition: StringRef.h:110