LLVM  3.7.0
llvm::XCoreInstrInfo Member List

This is the complete list of members for llvm::XCoreInstrInfo, including all inherited members.

AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const overridellvm::XCoreInstrInfo
copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const overridellvm::XCoreInstrInfo
getRegisterInfo() const llvm::XCoreInstrInfoinline
InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, DebugLoc DL) const overridellvm::XCoreInstrInfo
isLoadFromStackSlot(const MachineInstr *MI, int &FrameIndex) const overridellvm::XCoreInstrInfo
isStoreToStackSlot(const MachineInstr *MI, int &FrameIndex) const overridellvm::XCoreInstrInfo
loadImmediate(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned Reg, uint64_t Value) const llvm::XCoreInstrInfo
loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const overridellvm::XCoreInstrInfo
RemoveBranch(MachineBasicBlock &MBB) const overridellvm::XCoreInstrInfo
ReverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const overridellvm::XCoreInstrInfo
storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const overridellvm::XCoreInstrInfo
XCoreInstrInfo()llvm::XCoreInstrInfo