LLVM  3.7.0
Public Member Functions | Protected Member Functions | Protected Attributes | List of all members
llvm::ARMBaseRegisterInfo Class Reference

#include <ARMBaseRegisterInfo.h>

Inheritance diagram for llvm::ARMBaseRegisterInfo:
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Collaboration diagram for llvm::ARMBaseRegisterInfo:
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Public Member Functions

const MCPhysReggetCalleeSavedRegs (const MachineFunction *MF) const override
 Code Generation virtual methods... More...
 
const uint32_t * getCallPreservedMask (const MachineFunction &MF, CallingConv::ID) const override
 
const uint32_t * getNoPreservedMask () const
 
const uint32_t * getThisReturnPreservedMask (const MachineFunction &MF, CallingConv::ID) const
 getThisReturnPreservedMask - Returns a call preserved mask specific to the case that 'returned' is on an i32 first argument if the calling convention is one that can (partially) model this attribute with a preserved mask (i.e. More...
 
BitVector getReservedRegs (const MachineFunction &MF) const override
 
const TargetRegisterClassgetPointerRegClass (const MachineFunction &MF, unsigned Kind=0) const override
 
const TargetRegisterClassgetCrossCopyRegClass (const TargetRegisterClass *RC) const override
 
const TargetRegisterClassgetLargestLegalSuperClass (const TargetRegisterClass *RC, const MachineFunction &MF) const override
 
unsigned getRegPressureLimit (const TargetRegisterClass *RC, MachineFunction &MF) const override
 
void getRegAllocationHints (unsigned VirtReg, ArrayRef< MCPhysReg > Order, SmallVectorImpl< MCPhysReg > &Hints, const MachineFunction &MF, const VirtRegMap *VRM) const override
 
void updateRegAllocHint (unsigned Reg, unsigned NewReg, MachineFunction &MF) const override
 
bool hasBasePointer (const MachineFunction &MF) const
 
bool canRealignStack (const MachineFunction &MF) const
 
bool needsStackRealignment (const MachineFunction &MF) const override
 
int64_t getFrameIndexInstrOffset (const MachineInstr *MI, int Idx) const override
 
bool needsFrameBaseReg (MachineInstr *MI, int64_t Offset) const override
 needsFrameBaseReg - Returns true if the instruction's frame index reference would be better served by a base register other than FP or SP. More...
 
void materializeFrameBaseRegister (MachineBasicBlock *MBB, unsigned BaseReg, int FrameIdx, int64_t Offset) const override
 materializeFrameBaseRegister - Insert defining instruction(s) for BaseReg to be a pointer to FrameIdx at the beginning of the basic block. More...
 
void resolveFrameIndex (MachineInstr &MI, unsigned BaseReg, int64_t Offset) const override
 
bool isFrameOffsetLegal (const MachineInstr *MI, unsigned BaseReg, int64_t Offset) const override
 
bool cannotEliminateFrame (const MachineFunction &MF) const
 
unsigned getFrameRegister (const MachineFunction &MF) const override
 
unsigned getBaseRegister () const
 
bool isLowRegister (unsigned Reg) const
 
virtual void emitLoadConstPool (MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, DebugLoc dl, unsigned DestReg, unsigned SubIdx, int Val, ARMCC::CondCodes Pred=ARMCC::AL, unsigned PredReg=0, unsigned MIFlags=MachineInstr::NoFlags) const
 emitLoadConstPool - Emits a load from constpool to materialize the specified immediate. More...
 
bool requiresRegisterScavenging (const MachineFunction &MF) const override
 Code Generation virtual methods... More...
 
bool trackLivenessAfterRegAlloc (const MachineFunction &MF) const override
 
bool requiresFrameIndexScavenging (const MachineFunction &MF) const override
 
bool requiresVirtualBaseRegisters (const MachineFunction &MF) const override
 
void eliminateFrameIndex (MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override
 
bool shouldCoalesce (MachineInstr *MI, const TargetRegisterClass *SrcRC, unsigned SubReg, const TargetRegisterClass *DstRC, unsigned DstSubReg, const TargetRegisterClass *NewRC) const override
 SrcRC and DstRC will be morphed into NewRC if this returns true. More...
 

Protected Member Functions

 ARMBaseRegisterInfo ()
 
unsigned getOpcode (int Op) const
 

Protected Attributes

unsigned BasePtr
 BasePtr - ARM physical register used as a base ptr in complex stack frames. More...
 

Detailed Description

Definition at line 79 of file ARMBaseRegisterInfo.h.

Constructor & Destructor Documentation

ARMBaseRegisterInfo::ARMBaseRegisterInfo ( )
explicitprotected

Definition at line 48 of file ARMBaseRegisterInfo.cpp.

Member Function Documentation

bool ARMBaseRegisterInfo::cannotEliminateFrame ( const MachineFunction MF) const
bool ARMBaseRegisterInfo::canRealignStack ( const MachineFunction MF) const
void ARMBaseRegisterInfo::eliminateFrameIndex ( MachineBasicBlock::iterator  II,
int  SPAdj,
unsigned  FIOperandNum,
RegScavenger RS = nullptr 
) const
override
void ARMBaseRegisterInfo::emitLoadConstPool ( MachineBasicBlock MBB,
MachineBasicBlock::iterator MBBI,
DebugLoc  dl,
unsigned  DestReg,
unsigned  SubIdx,
int  Val,
ARMCC::CondCodes  Pred = ARMCC::AL,
unsigned  PredReg = 0,
unsigned  MIFlags = MachineInstr::NoFlags 
) const
virtual
unsigned llvm::ARMBaseRegisterInfo::getBaseRegister ( ) const
inline
const MCPhysReg * ARMBaseRegisterInfo::getCalleeSavedRegs ( const MachineFunction MF) const
override
const uint32_t * ARMBaseRegisterInfo::getCallPreservedMask ( const MachineFunction MF,
CallingConv::ID  CC 
) const
override
const TargetRegisterClass * ARMBaseRegisterInfo::getCrossCopyRegClass ( const TargetRegisterClass RC) const
override

Definition at line 187 of file ARMBaseRegisterInfo.cpp.

int64_t ARMBaseRegisterInfo::getFrameIndexInstrOffset ( const MachineInstr MI,
int  Idx 
) const
override
unsigned ARMBaseRegisterInfo::getFrameRegister ( const MachineFunction MF) const
override
const TargetRegisterClass * ARMBaseRegisterInfo::getLargestLegalSuperClass ( const TargetRegisterClass RC,
const MachineFunction MF 
) const
override
const uint32_t * ARMBaseRegisterInfo::getNoPreservedMask ( ) const

Definition at line 104 of file ARMBaseRegisterInfo.cpp.

unsigned llvm::ARMBaseRegisterInfo::getOpcode ( int  Op) const
protected
const TargetRegisterClass * ARMBaseRegisterInfo::getPointerRegClass ( const MachineFunction MF,
unsigned  Kind = 0 
) const
override
void ARMBaseRegisterInfo::getRegAllocationHints ( unsigned  VirtReg,
ArrayRef< MCPhysReg Order,
SmallVectorImpl< MCPhysReg > &  Hints,
const MachineFunction MF,
const VirtRegMap VRM 
) const
override
unsigned ARMBaseRegisterInfo::getRegPressureLimit ( const TargetRegisterClass RC,
MachineFunction MF 
) const
override
BitVector ARMBaseRegisterInfo::getReservedRegs ( const MachineFunction MF) const
override
const uint32_t * ARMBaseRegisterInfo::getThisReturnPreservedMask ( const MachineFunction MF,
CallingConv::ID  CC 
) const

getThisReturnPreservedMask - Returns a call preserved mask specific to the case that 'returned' is on an i32 first argument if the calling convention is one that can (partially) model this attribute with a preserved mask (i.e.

it is a calling convention that uses the same register for the first i32 argument and an i32 return value)

Should return NULL in the case that the calling convention does not have this property

Definition at line 109 of file ARMBaseRegisterInfo.cpp.

References llvm::MachineFunction::getSubtarget(), llvm::CallingConv::GHC, and llvm::ARMSubtarget::isTargetDarwin().

bool ARMBaseRegisterInfo::hasBasePointer ( const MachineFunction MF) const
bool ARMBaseRegisterInfo::isFrameOffsetLegal ( const MachineInstr MI,
unsigned  BaseReg,
int64_t  Offset 
) const
override
bool llvm::ARMBaseRegisterInfo::isLowRegister ( unsigned  Reg) const
void ARMBaseRegisterInfo::materializeFrameBaseRegister ( MachineBasicBlock MBB,
unsigned  BaseReg,
int  FrameIdx,
int64_t  Offset 
) const
override
bool ARMBaseRegisterInfo::needsFrameBaseReg ( MachineInstr MI,
int64_t  Offset 
) const
override
bool ARMBaseRegisterInfo::needsStackRealignment ( const MachineFunction MF) const
override
bool ARMBaseRegisterInfo::requiresFrameIndexScavenging ( const MachineFunction MF) const
override

Definition at line 423 of file ARMBaseRegisterInfo.cpp.

bool ARMBaseRegisterInfo::requiresRegisterScavenging ( const MachineFunction MF) const
override

Code Generation virtual methods...

Definition at line 413 of file ARMBaseRegisterInfo.cpp.

bool ARMBaseRegisterInfo::requiresVirtualBaseRegisters ( const MachineFunction MF) const
override

Definition at line 428 of file ARMBaseRegisterInfo.cpp.

void ARMBaseRegisterInfo::resolveFrameIndex ( MachineInstr MI,
unsigned  BaseReg,
int64_t  Offset 
) const
override
bool ARMBaseRegisterInfo::shouldCoalesce ( MachineInstr MI,
const TargetRegisterClass SrcRC,
unsigned  SubReg,
const TargetRegisterClass DstRC,
unsigned  DstSubReg,
const TargetRegisterClass NewRC 
) const
override
bool ARMBaseRegisterInfo::trackLivenessAfterRegAlloc ( const MachineFunction MF) const
override

Definition at line 418 of file ARMBaseRegisterInfo.cpp.

void ARMBaseRegisterInfo::updateRegAllocHint ( unsigned  Reg,
unsigned  NewReg,
MachineFunction MF 
) const
override

Member Data Documentation

unsigned llvm::ARMBaseRegisterInfo::BasePtr
protected

BasePtr - ARM physical register used as a base ptr in complex stack frames.

I.e., when we need a 3rd base, not just SP and FP, due to variable size stack objects.

Definition at line 84 of file ARMBaseRegisterInfo.h.

Referenced by canRealignStack(), llvm::ThumbRegisterInfo::eliminateFrameIndex(), getBaseRegister(), and getReservedRegs().


The documentation for this class was generated from the following files: