76 return getValueAPF().bitwiseIsEqual(V);
112 if (i == e)
return false;
125 if (CN->getAPIntValue().countTrailingOnes() < EltSize)
128 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingOnes() < EltSize)
136 for (++i; i != e; ++i)
153 bool IsAllUndef =
true;
168 if (CN->getAPIntValue().countTrailingZeros() < EltSize)
171 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingZeros() < EltSize)
192 if (!isa<ConstantSDNode>(Op))
207 if (!isa<ConstantFPSDNode>(Op))
227 for (
unsigned i = 1; i < NumElems; ++i) {
271 unsigned OldL = (Operation >> 2) & 1;
272 unsigned OldG = (Operation >> 1) & 1;
281 unsigned Operation = Op;
323 unsigned Op = Op1 | Op2;
385 for (
auto& Op : Ops) {
395 for (
auto& Op : Ops) {
416 if (
auto *Node = dyn_cast<BinaryWithFlagsSDNode>(N))
444 ID.
AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
465 ID.
AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask());
468 ID.
AddPointer(cast<SrcValueSDNode>(N)->getValue());
472 ID.
AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
476 ID.
AddInteger(cast<JumpTableSDNode>(N)->getIndex());
477 ID.
AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
559 ID.
AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace());
579 static inline unsigned
581 bool isNonTemporal,
bool isInvariant) {
582 assert((ConvType & 3) == ConvType &&
583 "ConvType may not require more than 2 bits!");
584 assert((AM & 7) == AM &&
585 "AM may not require more than 3 bits!");
589 (isNonTemporal << 6) |
610 for (
unsigned i = 1, e = N->
getNumValues(); i != e; ++i)
643 while (!DeadNodes.
empty()) {
647 DUL->NodeDeleted(N,
nullptr);
650 RemoveNodeFromCSEMaps(N);
681 RemoveNodeFromCSEMaps(N);
685 DeleteNodeNotInCSEMaps(N);
688 void SelectionDAG::DeleteNodeNotInCSEMaps(
SDNode *
N) {
689 assert(N != AllNodes.begin() &&
"Cannot delete the entry node!");
690 assert(N->
use_empty() &&
"Cannot delete a node that is not dead!");
700 if (I == DbgValMap.end())
702 for (
auto &Val: I->second)
703 Val->setIsInvalidated();
707 void SelectionDAG::DeallocateNode(
SDNode *N) {
708 if (N->OperandsNeedDelete)
709 delete[] N->OperandList;
732 "Wrong return type!");
735 "Mismatched operand types!");
737 "Wrong operand type!");
739 "Wrong return type size");
746 "Wrong number of operands!");
749 assert((
I->getValueType() == EltVT ||
750 (EltVT.isInteger() &&
I->getValueType().isInteger() &&
751 EltVT.bitsLE(
I->getValueType()))) &&
752 "Wrong operand type!");
754 "Operands must all have the same type");
766 void SelectionDAG::InsertNode(
SDNode *N) {
767 AllNodes.push_back(N);
777 bool SelectionDAG::RemoveNodeFromCSEMaps(
SDNode *N) {
782 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->
get()] &&
783 "Cond code doesn't exist!");
784 Erased = CondCodeNodes[cast<CondCodeSDNode>(
N)->
get()] !=
nullptr;
785 CondCodeNodes[cast<CondCodeSDNode>(
N)->
get()] =
nullptr;
788 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
792 Erased = TargetExternalSymbols.erase(
793 std::pair<std::string,unsigned char>(ESN->
getSymbol(),
798 auto *MCSN = cast<MCSymbolSDNode>(
N);
799 Erased = MCSymbols.erase(MCSN->getMCSymbol());
803 EVT VT = cast<VTSDNode>(
N)->getVT();
805 Erased = ExtendedValueTypeNodes.erase(VT);
816 Erased = CSEMap.RemoveNode(N);
839 SelectionDAG::AddModifiedNodeToCSEMaps(
SDNode *N) {
843 SDNode *Existing = CSEMap.GetOrInsertNode(N);
852 DUL->NodeDeleted(N, Existing);
853 DeleteNodeNotInCSEMaps(N);
928 : TM(tm), TSI(nullptr), TLI(nullptr), OptLevel(OL),
931 UpdateListeners(nullptr) {
932 AllNodes.push_back(&EntryNode);
944 assert(!UpdateListeners &&
"Dangling registered DAGUpdateListeners");
949 void SelectionDAG::allnodes_clear() {
950 assert(&*AllNodes.begin() == &EntryNode);
951 AllNodes.remove(AllNodes.begin());
952 while (!AllNodes.empty())
953 DeallocateNode(AllNodes.begin());
963 if (Flags ==
nullptr)
979 SDNode *N = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
986 "debug location. Use another overload.");
994 SDNode *N = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
1013 OperandAllocator.
Reset();
1016 ExtendedValueTypeNodes.clear();
1017 ExternalSymbols.clear();
1018 TargetExternalSymbols.clear();
1020 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
1022 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
1023 static_cast<SDNode*
>(
nullptr));
1025 EntryNode.UseList =
nullptr;
1026 AllNodes.push_back(&EntryNode);
1060 "getZeroExtendInReg should use the vector element type instead of "
1061 "the vector type!");
1071 assert(VT.
isVector() &&
"This DAG node is restricted to vector types.");
1073 "The sizes of the input and result must match in order to perform the "
1074 "extend in-register.");
1076 "The destination vector type must have fewer lanes than the input.");
1081 assert(VT.
isVector() &&
"This DAG node is restricted to vector types.");
1083 "The sizes of the input and result must match in order to perform the "
1084 "extend in-register.");
1086 "The destination vector type must have fewer lanes than the input.");
1091 assert(VT.
isVector() &&
"This DAG node is restricted to vector types.");
1093 "The sizes of the input and result must match in order to perform the "
1094 "extend in-register.");
1096 "The destination vector type must have fewer lanes than the input.");
1129 (uint64_t)((int64_t)Val >> EltVT.
getSizeInBits()) + 1 < 2) &&
1130 "getConstant with a uint64_t value that doesn't fit in the type!");
1141 bool isT,
bool isO) {
1142 assert(VT.
isInteger() &&
"Cannot create FP integer constant!");
1169 unsigned ViaVecNumElts = VT.
getSizeInBits() / ViaEltSizeInBits;
1181 ViaEltVT, isT, isO));
1187 std::reverse(EltParts.begin(), EltParts.end());
1198 Ops.
insert(Ops.
end(), EltParts.begin(), EltParts.end());
1206 assert(Elt->
getBitWidth() == EltVT.getSizeInBits() &&
1207 "APInt size does not match type size!");
1222 CSEMap.InsertNode(N, IP);
1266 CSEMap.InsertNode(N, IP);
1298 EVT VT, int64_t Offset,
1300 unsigned char TargetFlags) {
1301 assert((TargetFlags == 0 || isTargetGA) &&
1302 "Cannot set target flags on target-independent globals");
1327 Offset, TargetFlags);
1328 CSEMap.InsertNode(N, IP);
1339 if (
SDNode *E = FindNodeOrInsertPos(ID, IP))
1343 CSEMap.InsertNode(N, IP);
1349 unsigned char TargetFlags) {
1350 assert((TargetFlags == 0 || isTarget) &&
1351 "Cannot set target flags on target-independent jump tables");
1358 if (
SDNode *E = FindNodeOrInsertPos(ID, IP))
1363 CSEMap.InsertNode(N, IP);
1369 unsigned Alignment,
int Offset,
1371 unsigned char TargetFlags) {
1372 assert((TargetFlags == 0 || isTarget) &&
1373 "Cannot set target flags on target-independent globals");
1384 if (
SDNode *E = FindNodeOrInsertPos(ID, IP))
1388 Alignment, TargetFlags);
1389 CSEMap.InsertNode(N, IP);
1396 unsigned Alignment,
int Offset,
1398 unsigned char TargetFlags) {
1399 assert((TargetFlags == 0 || isTarget) &&
1400 "Cannot set target flags on target-independent globals");
1411 if (
SDNode *E = FindNodeOrInsertPos(ID, IP))
1415 Alignment, TargetFlags);
1416 CSEMap.InsertNode(N, IP);
1422 unsigned char TargetFlags) {
1429 if (
SDNode *E = FindNodeOrInsertPos(ID, IP))
1434 CSEMap.InsertNode(N, IP);
1444 if (
SDNode *E = FindNodeOrInsertPos(ID, IP))
1448 CSEMap.InsertNode(N, IP);
1455 ValueTypeNodes.size())
1462 N =
new (NodeAllocator)
VTSDNode(VT);
1468 SDNode *&N = ExternalSymbols[Sym];
1476 SDNode *&N = MCSymbols[Sym];
1485 unsigned char TargetFlags) {
1487 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1496 if ((
unsigned)Cond >= CondCodeNodes.size())
1497 CondCodeNodes.resize(Cond+1);
1499 if (!CondCodeNodes[Cond]) {
1501 CondCodeNodes[Cond] =
N;
1505 return SDValue(CondCodeNodes[Cond], 0);
1517 SDValue N2,
const int *Mask) {
1519 "Invalid VECTOR_SHUFFLE");
1529 for (
unsigned i = 0; i != NElts; ++i) {
1530 assert(Mask[i] < (
int)(NElts * 2) &&
"Index out of range");
1537 for (
unsigned i = 0; i != NElts; ++i)
1538 if (MaskVec[i] >= (
int)NElts) MaskVec[i] -= NElts;
1553 for (
int i = 0; i < (
int)NElts; ++i) {
1554 if (MaskVec[i] < Offset || MaskVec[i] >= (Offset + (
int)NElts))
1558 if (UndefElements[MaskVec[i] - Offset]) {
1564 if (!UndefElements[i])
1565 MaskVec[i] = i + Offset;
1568 if (
auto *N1BV = dyn_cast<BuildVectorSDNode>(N1))
1569 BlendSplat(N1BV, 0);
1570 if (
auto *N2BV = dyn_cast<BuildVectorSDNode>(N2))
1571 BlendSplat(N2BV, NElts);
1575 bool AllLHS =
true, AllRHS =
true;
1577 for (
unsigned i = 0; i != NElts; ++i) {
1578 if (MaskVec[i] >= (
int)NElts) {
1583 }
else if (MaskVec[i] >= 0) {
1587 if (AllLHS && AllRHS)
1589 if (AllLHS && !N2Undef)
1602 bool Identity =
true, AllSame =
true;
1603 for (
unsigned i = 0; i != NElts; ++i) {
1604 if (MaskVec[i] >= 0 && MaskVec[i] != (
int)i) Identity =
false;
1605 if (MaskVec[i] != MaskVec[0]) AllSame =
false;
1607 if (Identity && NElts)
1620 if (
auto *BV = dyn_cast<BuildVectorSDNode>(V)) {
1632 if (Splat && UndefElements.
none()) {
1637 if (
auto *
C = dyn_cast<ConstantSDNode>(Splat))
1638 if (
C->isNullValue())
1643 if (AllSame && SameNumElts) {
1662 for (
unsigned i = 0; i != NElts; ++i)
1672 int *MaskAlloc = OperandAllocator.
Allocate<
int>(NElts);
1673 memcpy(MaskAlloc, &MaskVec[0], NElts *
sizeof(
int));
1679 CSEMap.InsertNode(N, IP);
1705 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1714 CSEMap.InsertNode(N, IP);
1724 if (
SDNode *E = FindNodeOrInsertPos(ID, IP))
1728 CSEMap.InsertNode(N, IP);
1738 if (
SDNode *E = FindNodeOrInsertPos(ID, IP))
1742 CSEMap.InsertNode(N, IP);
1753 if (
SDNode *E = FindNodeOrInsertPos(ID, IP))
1758 CSEMap.InsertNode(N, IP);
1767 unsigned char TargetFlags) {
1776 if (
SDNode *E = FindNodeOrInsertPos(ID, IP))
1781 CSEMap.InsertNode(N, IP);
1788 "SrcValue is not a pointer?");
1795 if (
SDNode *E = FindNodeOrInsertPos(ID, IP))
1799 CSEMap.InsertNode(N, IP);
1811 if (
SDNode *E = FindNodeOrInsertPos(ID, IP))
1815 CSEMap.InsertNode(N, IP);
1829 unsigned SrcAS,
unsigned DestAS) {
1842 VT, Ptr, SrcAS, DestAS);
1843 CSEMap.InsertNode(N, IP);
1853 if (OpTy == ShTy || OpTy.
isVector())
return Op;
1865 unsigned StackAlign =
1866 std::max((
unsigned)
getDataLayout().getPrefTypeAlignment(Ty), minAlign);
1919 const APInt &C2 = N2C->getAPIntValue();
1921 const APInt &C1 = N1C->getAPIntValue();
1989 return getSetCC(dl, VT, N2, N1, SwappedCond);
2012 unsigned Depth)
const {
2013 APInt KnownZero, KnownOne;
2015 return (KnownZero & Mask) == Mask;
2021 APInt &KnownOne,
unsigned Depth)
const {
2024 KnownZero = KnownOne =
APInt(BitWidth, 0);
2028 APInt KnownZero2, KnownOne2;
2033 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue();
2034 KnownZero = ~KnownOne;
2042 KnownOne &= KnownOne2;
2044 KnownZero |= KnownZero2;
2051 KnownZero &= KnownZero2;
2053 KnownOne |= KnownOne2;
2060 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
2062 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
2063 KnownZero = KnownZeroOut;
2074 KnownOne.clearAllBits();
2075 unsigned TrailZ = KnownZero.countTrailingOnes() +
2077 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
2079 BitWidth) - BitWidth;
2081 TrailZ =
std::min(TrailZ, BitWidth);
2094 KnownOne2.clearAllBits();
2097 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
2098 if (RHSUnknownLeadingOnes != BitWidth)
2100 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
2110 KnownOne &= KnownOne2;
2111 KnownZero &= KnownZero2;
2118 KnownOne &= KnownOne2;
2119 KnownZero &= KnownZero2;
2148 unsigned ShAmt = SA->getZExtValue();
2151 if (ShAmt >= BitWidth)
2155 KnownZero <<= ShAmt;
2164 unsigned ShAmt = SA->getZExtValue();
2167 if (ShAmt >= BitWidth)
2171 KnownZero = KnownZero.lshr(ShAmt);
2172 KnownOne = KnownOne.lshr(ShAmt);
2175 KnownZero |= HighBits;
2180 unsigned ShAmt = SA->getZExtValue();
2183 if (ShAmt >= BitWidth)
2191 KnownZero = KnownZero.lshr(ShAmt);
2192 KnownOne = KnownOne.lshr(ShAmt);
2196 SignBit = SignBit.
lshr(ShAmt);
2198 if (KnownZero.intersects(SignBit)) {
2199 KnownZero |= HighBits;
2200 }
else if (KnownOne.intersects(SignBit)) {
2201 KnownOne |= HighBits;
2218 InSignBit = InSignBit.
zext(BitWidth);
2220 InputDemandedBits |= InSignBit;
2223 KnownOne &= InputDemandedBits;
2224 KnownZero &= InputDemandedBits;
2228 if (KnownZero.intersects(InSignBit)) {
2229 KnownZero |= NewBits;
2230 KnownOne &= ~NewBits;
2231 }
else if (KnownOne.intersects(InSignBit)) {
2232 KnownOne |= NewBits;
2233 KnownZero &= ~NewBits;
2235 KnownZero &= ~NewBits;
2236 KnownOne &= ~NewBits;
2245 unsigned LowBits =
Log2_32(BitWidth)+1;
2247 KnownOne.clearAllBits();
2266 KnownZero = KnownZero.trunc(InBits);
2267 KnownOne = KnownOne.trunc(InBits);
2269 KnownZero = KnownZero.zext(BitWidth);
2270 KnownOne = KnownOne.zext(BitWidth);
2271 KnownZero |= NewBits;
2279 KnownZero = KnownZero.trunc(InBits);
2280 KnownOne = KnownOne.trunc(InBits);
2284 bool SignBitKnownZero = KnownZero.isNegative();
2285 bool SignBitKnownOne = KnownOne.isNegative();
2287 KnownZero = KnownZero.zext(BitWidth);
2288 KnownOne = KnownOne.zext(BitWidth);
2291 if (SignBitKnownZero)
2292 KnownZero |= NewBits;
2293 else if (SignBitKnownOne)
2294 KnownOne |= NewBits;
2300 KnownZero = KnownZero.trunc(InBits);
2301 KnownOne = KnownOne.trunc(InBits);
2303 KnownZero = KnownZero.zext(BitWidth);
2304 KnownOne = KnownOne.zext(BitWidth);
2310 KnownZero = KnownZero.zext(InBits);
2311 KnownOne = KnownOne.zext(InBits);
2313 KnownZero = KnownZero.trunc(BitWidth);
2314 KnownOne = KnownOne.trunc(BitWidth);
2321 KnownZero |= (~InMask);
2322 KnownOne &= (~KnownZero);
2335 if (CLHS->getAPIntValue().isNonNegative()) {
2344 if ((KnownZero2 & MaskV) == MaskV) {
2345 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
2367 KnownZeroHigh =
std::min(KnownZeroHigh,
2369 KnownZeroLow =
std::min(KnownZeroLow,
2374 if (KnownZeroHigh > 1)
2383 if (KnownZeroLow >= 2)
2389 const APInt &RA = Rem->getAPIntValue().
abs();
2391 APInt LowBits = RA - 1;
2395 KnownZero = KnownZero2 & LowBits;
2396 KnownOne = KnownOne2 & LowBits;
2400 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
2401 KnownZero |= ~LowBits;
2405 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
2406 KnownOne |= ~LowBits;
2407 assert((KnownZero & KnownOne) == 0&&
"Bits known to be one AND zero?");
2413 const APInt &RA = Rem->getAPIntValue();
2415 APInt LowBits = (RA - 1);
2419 KnownZero = KnownZero2 | ~LowBits;
2420 KnownOne = KnownOne2 & LowBits;
2430 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
2432 KnownOne.clearAllBits();
2438 const unsigned Index =
2439 cast<ConstantSDNode>(Op.
getOperand(1))->getZExtValue();
2443 KnownZero = KnownZero.getHiBits(KnownZero.getBitWidth() - Index * BitWidth);
2444 KnownOne = KnownOne.getHiBits(KnownOne.getBitWidth() - Index * BitWidth);
2447 KnownZero = KnownZero.trunc(BitWidth);
2448 KnownOne = KnownOne.trunc(BitWidth);
2455 APInt Op0Zero, Op0One;
2456 APInt Op1Zero, Op1One;
2460 KnownZero = Op0Zero & Op1Zero;
2461 KnownOne = Op0One & Op1One;
2485 assert((KnownZero & KnownOne) == 0 &&
"Bits known to be one AND zero?");
2495 assert(VT.
isInteger() &&
"Invalid VT!");
2498 unsigned FirstAnswer = 1;
2506 Tmp = cast<VTSDNode>(Op.
getOperand(1))->getVT().getSizeInBits();
2507 return VTBits-Tmp+1;
2509 Tmp = cast<VTSDNode>(Op.
getOperand(1))->getVT().getSizeInBits();
2513 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2525 cast<VTSDNode>(Op.
getOperand(1))->getVT().getScalarType().getSizeInBits();
2529 return std::max(Tmp, Tmp2);
2535 Tmp +=
C->getZExtValue();
2536 if (Tmp > VTBits) Tmp = VTBits;
2543 if (
C->getZExtValue() >= VTBits ||
2544 C->getZExtValue() >= Tmp)
break;
2545 return Tmp -
C->getZExtValue();
2564 if (Tmp == 1)
return 1;
2601 unsigned RotAmt =
C->getZExtValue() & (VTBits-1);
2605 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2610 if (Tmp > RotAmt+1)
return Tmp-RotAmt;
2617 if (Tmp == 1)
return 1;
2621 if (CRHS->isAllOnesValue()) {
2622 APInt KnownZero, KnownOne;
2627 if ((KnownZero |
APInt(VTBits, 1)).isAllOnesValue())
2637 if (Tmp2 == 1)
return 1;
2642 if (Tmp2 == 1)
return 1;
2646 if (CLHS->isNullValue()) {
2647 APInt KnownZero, KnownOne;
2651 if ((KnownZero |
APInt(VTBits, 1)).isAllOnesValue())
2665 if (Tmp == 1)
return 1;
2679 const int rIndex = Items - 1 -
2680 cast<ConstantSDNode>(Op.
getOperand(1))->getZExtValue();
2684 return std::max(std::min(KnownSign - rIndex * BitWidth, BitWidth), 0);
2692 unsigned ExtType =
LD->getExtensionType();
2696 Tmp =
LD->getMemoryVT().getScalarType().getSizeInBits();
2697 return VTBits-Tmp+1;
2699 Tmp =
LD->getMemoryVT().getScalarType().getSizeInBits();
2711 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2716 APInt KnownZero, KnownOne;
2750 cast<ConstantSDNode>(Op.
getOperand(1))->getAPIntValue()))
2764 return !
C->getValueAPF().isNaN();
2774 return !
C->isZero();
2781 return !
C->isNullValue();
2790 if (A == B)
return true;
2795 if (CA->isZero() && CB->isZero())
return true;
2812 CSEMap.InsertNode(N, IP);
2826 const APInt &Val =
C->getAPIntValue();
2831 C->isTargetOpcode(),
C->isOpaque());
2836 C->isTargetOpcode(),
C->isOpaque());
2934 if (BV->isConstant()) {
2958 EVT InVT = BV->getValueType(0);
2966 if (LegalSVT.
bitsLT(SVT))
break;
2980 OpN =
getNode(Opcode, DL, SVT, OpN);
2983 if (LegalSVT != SVT)
3014 "Vector element count mismatch!");
3020 "Invalid SIGN_EXTEND!");
3023 "Invalid sext node, dst < src!");
3027 "Vector element count mismatch!");
3036 "Invalid ZERO_EXTEND!");
3039 "Invalid zext node, dst < src!");
3043 "Vector element count mismatch!");
3053 "Invalid ANY_EXTEND!");
3056 "Invalid anyext node, dst < src!");
3060 "Vector element count mismatch!");
3078 "Invalid TRUNCATE!");
3081 "Invalid truncate node, src < dst!");
3085 "Vector element count mismatch!");
3105 "BSWAP types must be a multiple of 16 bits!");
3112 &&
"Cannot BITCAST between types of different sizes!");
3125 "Illegal SCALAR_TO_VECTOR node!");
3130 isa<ConstantSDNode>(Operand.
getOperand(1)) &&
3161 CSEMap.InsertNode(N, IP);
3174 case ISD::ADD:
return std::make_pair(C1 + C2,
true);
3175 case ISD::SUB:
return std::make_pair(C1 - C2,
true);
3176 case ISD::MUL:
return std::make_pair(C1 * C2,
true);
3177 case ISD::AND:
return std::make_pair(C1 & C2,
true);
3178 case ISD::OR:
return std::make_pair(C1 | C2,
true);
3179 case ISD::XOR:
return std::make_pair(C1 ^ C2,
true);
3180 case ISD::SHL:
return std::make_pair(C1 << C2,
true);
3181 case ISD::SRL:
return std::make_pair(C1.
lshr(C2),
true);
3182 case ISD::SRA:
return std::make_pair(C1.
ashr(C2),
true);
3186 if (!C2.getBoolValue())
3188 return std::make_pair(C1.
udiv(C2),
true);
3190 if (!C2.getBoolValue())
3192 return std::make_pair(C1.
urem(C2),
true);
3194 if (!C2.getBoolValue())
3196 return std::make_pair(C1.
sdiv(C2),
true);
3198 if (!C2.getBoolValue())
3200 return std::make_pair(C1.
srem(C2),
true);
3202 return std::make_pair(
APInt(1, 0),
false);
3227 if (
const ConstantSDNode *Scalar1 = dyn_cast<ConstantSDNode>(Cst1)) {
3228 if (
const ConstantSDNode *Scalar2 = dyn_cast<ConstantSDNode>(Cst2)) {
3251 assert(BV1->
getNumOperands() == BV2->getNumOperands() &&
"Out of sync!");
3261 if (V1->
isOpaque() || V2->isOpaque())
3266 if (V1->
getValueType(0) != SVT || V2->getValueType(0) != SVT)
3271 V2->getAPIntValue());
3278 "Vector size mismatch!");
3299 if (N1 == N2)
return N1;
3330 assert(VT.
isInteger() &&
"This operator does not apply to FP types!");
3332 N1.
getValueType() == VT &&
"Binary operator types must match!");
3335 if (N2C && N2C->isNullValue())
3337 if (N2C && N2C->isAllOnesValue())
3344 assert(VT.
isInteger() &&
"This operator does not apply to FP types!");
3346 N1.
getValueType() == VT &&
"Binary operator types must match!");
3349 if (N2C && N2C->isNullValue())
3359 assert(VT.
isInteger() &&
"This operator does not apply to FP types!");
3361 N1.
getValueType() == VT &&
"Binary operator types must match!");
3372 if (CFP->getValueAPF().isZero())
3376 if (CFP->getValueAPF().isZero())
3381 if (CFP->getValueAPF().isZero())
3403 assert(VT.
isFloatingPoint() &&
"This operator only applies to FP types!");
3405 N1.
getValueType() == VT &&
"Binary operator types must match!");
3411 "Invalid FCOPYSIGN!");
3419 "Shift operators return type must be the same as their first arg");
3421 "Shifts only work on integers");
3423 "Vector shift amounts must be in the same as their first arg");
3430 "Invalid use of small shift amount with oversized value!");
3437 if (N2C && N2C->isNullValue())
3441 EVT EVT = cast<VTSDNode>(N2)->getVT();
3442 assert(VT == N1.
getValueType() &&
"Not an inreg round!");
3444 "Cannot FP_ROUND_INREG integer types");
3446 "FP_ROUND_INREG type should be vector iff the operand "
3450 "Vector element counts must match in FP_ROUND_INREG");
3451 assert(EVT.
bitsLE(VT) &&
"Not rounding down!");
3453 if (cast<VTSDNode>(N2)->getVT() == VT)
return N1;
3460 isa<ConstantSDNode>(N2) &&
"Invalid FP_ROUND!");
3465 EVT EVT = cast<VTSDNode>(N2)->getVT();
3466 assert(VT == N1.
getValueType() &&
"Not an inreg extend!");
3468 "Cannot *_EXTEND_INREG FP types");
3470 "AssertSExt/AssertZExt type should be the vector element type "
3471 "rather than the vector type!");
3472 assert(EVT.
bitsLE(VT) &&
"Not extending!");
3473 if (VT == EVT)
return N1;
3477 EVT EVT = cast<VTSDNode>(N2)->getVT();
3478 assert(VT == N1.
getValueType() &&
"Not an inreg extend!");
3480 "Cannot *_EXTEND_INREG FP types");
3482 "SIGN_EXTEND_INREG type should be vector iff the operand "
3486 "Vector element counts must match in SIGN_EXTEND_INREG");
3487 assert(EVT.
bitsLE(VT) &&
"Not extending!");
3488 if (EVT == VT)
return N1;
3490 auto SignExtendInReg = [&](
APInt Val) {
3492 Val <<= Val.getBitWidth() - FromBits;
3493 Val = Val.ashr(Val.getBitWidth() - FromBits);
3499 return SignExtendInReg(Val);
3511 APInt Val =
C->getAPIntValue();
3567 if (N1Op2C && N2C) {
3580 assert(N2C && (
unsigned)N2C->getZExtValue() < 2 &&
"Bad EXTRACT_ELEMENT!");
3584 "Wrong types for EXTRACT_ELEMENT!");
3595 unsigned Shift = ElementSize * N2C->getZExtValue();
3596 APInt ShiftedVal =
C->getAPIntValue().lshr(Shift);
3604 "Extract subvector VTs must be a vectors!");
3607 "Extract subvector VTs must have the same element type!");
3609 "Extract subvector must be from larger vector to smaller vector!");
3611 if (isa<ConstantSDNode>(Index)) {
3613 cast<ConstantSDNode>(Index)->getZExtValue()
3615 &&
"Extract subvector overflow!");
3784 N = GetBinarySDNode(Opcode, DL, VTs, N1, N2, Flags);
3786 CSEMap.InsertNode(N, IP);
3788 N = GetBinarySDNode(Opcode, DL, VTs, N1, N2, Flags);
3804 if (N1CFP && N2CFP && N3CFP) {
3806 const APFloat &
V2 = N2CFP->getValueAPF();
3807 const APFloat &V3 = N3CFP->getValueAPF();
3831 if (Simp.
getNode())
return Simp;
3841 if (N2 == N3)
return N2;
3851 "Insert subvector VTs must be a vectors");
3853 "Dest and insert subvector source types must match!");
3855 "Insert subvector must be from smaller vector to larger vector!");
3856 if (isa<ConstantSDNode>(Index)) {
3858 cast<ConstantSDNode>(Index)->getZExtValue()
3860 &&
"Insert subvector overflow!");
3880 SDValue Ops[] = { N1, N2, N3 };
3889 CSEMap.InsertNode(N, IP);
3902 SDValue Ops[] = { N1, N2, N3, N4 };
3903 return getNode(Opcode, DL, VT, Ops);
3909 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3910 return getNode(Opcode, DL, VT, Ops);
3926 if (
LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3928 if (FI->getIndex() < 0)
3943 assert(C->getAPIntValue().getBitWidth() == 8);
3953 if (!IntVT.isInteger())
3969 "value type should be one vector element here");
3999 assert(!VT.
isVector() &&
"Can't handle vector type here!");
4001 unsigned NumVTBytes = NumVTBits / 8;
4002 unsigned NumBytes =
std::min(NumVTBytes,
unsigned(Str.
size()));
4004 APInt Val(NumVTBits, 0);
4006 for (
unsigned i = 0; i != NumBytes; ++i)
4007 Val |= (uint64_t)(
unsigned char)Str[i] << i*8;
4009 for (
unsigned i = 0; i != NumBytes; ++i)
4010 Val |= (uint64_t)(
unsigned char)Str[i] << (NumVTBytes-i-1)*8;
4033 unsigned SrcDelta = 0;
4036 G = cast<GlobalAddressSDNode>(Src);
4040 G = cast<GlobalAddressSDNode>(Src.
getOperand(0));
4041 SrcDelta = cast<ConstantSDNode>(Src.
getOperand(1))->getZExtValue();
4054 unsigned Limit, uint64_t Size,
4055 unsigned DstAlign,
unsigned SrcAlign,
4062 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
4063 "Expecting memcpy / memset source to meet alignment requirement!");
4072 IsMemset, ZeroMemset, MemcpyStrSrc,
4081 switch (DstAlign & 7) {
4098 unsigned NumMemOps = 0;
4101 while (VTSize > Size) {
4136 if (NumMemOps && AllowOverlap &&
4137 VTSize >= 8 && NewVTSize < Size &&
4146 if (++NumMemOps > Limit)
4149 MemOps.push_back(VT);
4159 unsigned Align,
bool isVol,
4172 std::vector<EVT> MemOps;
4173 bool DstAlignCanChange =
false;
4179 DstAlignCanChange =
true;
4181 if (Align > SrcAlign)
4185 bool isZeroStr = CopyFromStr && Str.
empty();
4189 (DstAlignCanChange ? 0 : Align),
4190 (isZeroStr ? 0 : SrcAlign),
4191 false,
false, CopyFromStr,
true, DAG, TLI))
4194 if (DstAlignCanChange) {
4202 while (NewAlign > Align &&
4206 if (NewAlign > Align) {
4215 unsigned NumMemOps = MemOps.
size();
4216 uint64_t SrcOff = 0, DstOff = 0;
4217 for (
unsigned i = 0; i != NumMemOps; ++i) {
4222 if (VTSize > Size) {
4225 assert(i == NumMemOps-1 && i != 0);
4226 SrcOff -= VTSize - Size;
4227 DstOff -= VTSize - Size;
4239 Store = DAG.
getStore(Chain, dl, Value,
4256 false,
MinAlign(SrcAlign, SrcOff));
4274 unsigned Align,
bool isVol,
4285 std::vector<EVT> MemOps;
4286 bool DstAlignCanChange =
false;
4292 DstAlignCanChange =
true;
4294 if (Align > SrcAlign)
4299 (DstAlignCanChange ? 0 : Align), SrcAlign,
4300 false,
false,
false,
false, DAG, TLI))
4303 if (DstAlignCanChange) {
4306 if (NewAlign > Align) {
4314 uint64_t SrcOff = 0, DstOff = 0;
4318 unsigned NumMemOps = MemOps.
size();
4319 for (
unsigned i = 0; i < NumMemOps; i++) {
4324 Value = DAG.
getLoad(VT, dl, Chain,
4327 false,
false, SrcAlign);
4334 for (
unsigned i = 0; i < NumMemOps; i++) {
4339 Store = DAG.
getStore(Chain, dl, LoadValues[i],
4370 unsigned Align,
bool isVol,
4379 std::vector<EVT> MemOps;
4380 bool DstAlignCanChange =
false;
4386 DstAlignCanChange =
true;
4388 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
4390 Size, (DstAlignCanChange ? 0 :
Align), 0,
4391 true, IsZeroVal,
false,
true, DAG, TLI))
4394 if (DstAlignCanChange) {
4397 if (NewAlign > Align) {
4406 uint64_t DstOff = 0;
4407 unsigned NumMemOps = MemOps.
size();
4410 EVT LargestVT = MemOps[0];
4411 for (
unsigned i = 1; i < NumMemOps; i++)
4412 if (MemOps[i].bitsGT(LargestVT))
4413 LargestVT = MemOps[i];
4416 for (
unsigned i = 0; i < NumMemOps; i++) {
4419 if (VTSize > Size) {
4422 assert(i == NumMemOps-1 && i != 0);
4423 DstOff -= VTSize - Size;
4429 if (VT.
bitsLT(LargestVT)) {
4436 assert(Value.
getValueType() == VT &&
"Value with wrong type.");
4440 isVol,
false,
Align);
4451 unsigned Align,
bool isVol,
bool AlwaysInline,
4454 assert(Align &&
"The SDAG layer expects explicit alignment and reserves 0");
4466 isVol,
false, DstPtrInfo, SrcPtrInfo);
4475 *
this, dl, Chain, Dst, Src, Size, Align, isVol, AlwaysInline,
4476 DstPtrInfo, SrcPtrInfo);
4484 assert(ConstantSize &&
"AlwaysInline requires a constant size!");
4487 true, DstPtrInfo, SrcPtrInfo);
4500 Entry.
Node = Dst; Args.push_back(Entry);
4501 Entry.
Node = Src; Args.push_back(Entry);
4502 Entry.
Node = Size; Args.push_back(Entry);
4515 std::pair<SDValue,SDValue> CallResult = TLI->
LowerCallTo(CLI);
4516 return CallResult.second;
4521 unsigned Align,
bool isVol,
bool isTailCall,
4524 assert(Align &&
"The SDAG layer expects explicit alignment and reserves 0");
4537 false, DstPtrInfo, SrcPtrInfo);
4546 *
this, dl, Chain, Dst, Src, Size, Align, isVol, DstPtrInfo, SrcPtrInfo);
4558 Entry.
Node = Dst; Args.push_back(Entry);
4559 Entry.
Node = Src; Args.push_back(Entry);
4560 Entry.
Node = Size; Args.push_back(Entry);
4573 std::pair<SDValue,SDValue> CallResult = TLI->
LowerCallTo(CLI);
4574 return CallResult.second;
4579 unsigned Align,
bool isVol,
bool isTailCall,
4581 assert(Align &&
"The SDAG layer expects explicit alignment and reserves 0");
4593 Align, isVol, DstPtrInfo);
4603 *
this, dl, Chain, Dst, Src, Size, Align, isVol, DstPtrInfo);
4612 Entry.
Node = Dst; Entry.
Ty = IntPtrTy;
4613 Args.push_back(Entry);
4616 Args.push_back(Entry);
4618 Entry.
Ty = IntPtrTy;
4619 Args.push_back(Entry);
4633 std::pair<SDValue,SDValue> CallResult = TLI->
LowerCallTo(CLI);
4634 return CallResult.second;
4649 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4658 unsigned NumOps = Ops.
size();
4664 Ops.
data(), DynOps, NumOps, MMO,
4665 SuccessOrdering, FailureOrdering,
4667 CSEMap.InsertNode(N, IP);
4677 return getAtomic(Opcode, dl, MemVT, VTList, Ops, MMO, Ordering,
4678 Ordering, SynchScope);
4705 SuccessOrdering, FailureOrdering, SynchScope);
4719 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
4720 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO,
4721 SuccessOrdering, FailureOrdering, SynchScope);
4727 const Value* PtrVal,
4751 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO,
4752 Ordering, SynchScope);
4773 "Invalid Atomic Op");
4779 SDValue Ops[] = {Chain, Ptr, Val};
4780 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO, Ordering, SynchScope);
4793 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO, Ordering, SynchScope);
4798 if (Ops.
size() == 1)
4803 for (
unsigned i = 0; i < Ops.
size(); ++i)
4812 unsigned Align,
bool Vol,
4813 bool ReadMem,
bool WriteMem,
unsigned Size) {
4842 (Opcode <= INT_MAX &&
4844 "Opcode is not a memory-accessing opcode!");
4854 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
4861 CSEMap.InsertNode(N, IP);
4886 int FI = cast<FrameIndexSDNode>(Ptr.
getOperand(0))->getIndex();
4888 cast<ConstantSDNode>(Ptr.
getOperand(1))->getSExtValue());
4897 if (
ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
4910 bool isVolatile,
bool isNonTemporal,
bool isInvariant,
4911 unsigned Alignment,
const AAMDNodes &AAInfo,
4914 "Invalid chain type");
4935 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
4946 assert(VT == MemVT &&
"Non-extending load from different memory type!");
4950 "Should only be an extending load, not truncating!");
4952 "Cannot convert from FP to Int or Int -> FP!");
4954 "Cannot use an ext load to convert to or from a vector!");
4957 "Cannot use an ext load to change the number of vector elements!");
4962 "Unindexed load with an offset!");
4966 SDValue Ops[] = { Chain, Ptr, Offset };
4976 cast<LoadSDNode>(E)->refineAlignment(MMO);
4982 CSEMap.InsertNode(N, IP);
4991 bool isInvariant,
unsigned Alignment,
4996 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment,
5012 bool isInvariant,
unsigned Alignment,
5016 PtrInfo, MemVT, isVolatile, isNonTemporal, isInvariant,
5034 "Load is already a indexed load!");
5044 unsigned Alignment,
const AAMDNodes &AAInfo) {
5046 "Invalid chain type");
5065 return getStore(Chain, dl, Val, Ptr, MMO);
5071 "Invalid chain type");
5075 SDValue Ops[] = { Chain, Val, Ptr, Undef };
5084 cast<StoreSDNode>(E)->refineAlignment(MMO);
5090 CSEMap.InsertNode(N, IP);
5101 "Invalid chain type");
5128 "Invalid chain type");
5130 return getStore(Chain, dl, Val, Ptr, MMO);
5133 "Should only be a truncating store, not extending!");
5135 "Can't do FP-INT conversion!");
5137 "Cannot use trunc store to convert to or from a vector!");
5140 "Cannot use trunc store to change the number of vector elements!");
5144 SDValue Ops[] = { Chain, Val, Ptr, Undef };
5153 cast<StoreSDNode>(E)->refineAlignment(MMO);
5159 CSEMap.InsertNode(N, IP);
5169 "Store is already a indexed store!");
5186 CSEMap.InsertNode(N, IP);
5197 SDValue Ops[] = { Chain, Ptr, Mask, Src0 };
5208 cast<MaskedLoadSDNode>(E)->refineAlignment(MMO);
5214 CSEMap.InsertNode(N, IP);
5223 "Invalid chain type");
5226 SDValue Ops[] = { Chain, Ptr, Mask, Val };
5235 cast<MaskedStoreSDNode>(E)->refineAlignment(MMO);
5240 VTs, isTrunc, MemVT, MMO);
5241 CSEMap.InsertNode(N, IP);
5261 cast<MaskedGatherSDNode>(E)->refineAlignment(MMO);
5267 CSEMap.InsertNode(N, IP);
5284 cast<MaskedScatterSDNode>(E)->refineAlignment(MMO);
5290 CSEMap.InsertNode(N, IP);
5305 switch (Ops.
size()) {
5306 case 0:
return getNode(Opcode, DL, VT);
5307 case 1:
return getNode(Opcode, DL, VT, static_cast<const SDValue>(Ops[0]));
5308 case 2:
return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
5309 case 3:
return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
5316 return getNode(Opcode, DL, VT, NewOps);
5321 unsigned NumOps = Ops.
size();
5323 case 0:
return getNode(Opcode, DL, VT);
5324 case 1:
return getNode(Opcode, DL, VT, Ops[0]);
5325 case 2:
return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
5326 case 3:
return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
5333 assert(NumOps == 5 &&
"SELECT_CC takes 5 operands!");
5335 "LHS and RHS of condition must have same type!");
5337 "True and False arms of SelectCC must have same type!");
5339 "select_cc node must be of same type as true and false value!");
5343 assert(NumOps == 5 &&
"BR_CC takes 5 operands!");
5345 "LHS/RHS of comparison should match types!");
5364 CSEMap.InsertNode(N, IP);
5382 return getNode(Opcode, DL, VTList.
VTs[0], Ops);
5393 cast<VTSDNode>(N3.getOperand(1))->getVT() !=
MVT::i1)
5395 else if (N3.getOpcode() ==
ISD::AND)
5396 if (
ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
5400 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
5409 unsigned NumOps = Ops.
size();
5420 }
else if (NumOps == 2) {
5424 }
else if (NumOps == 3) {
5432 CSEMap.InsertNode(N, IP);
5437 }
else if (NumOps == 2) {
5441 }
else if (NumOps == 3) {
5461 return getNode(Opcode, DL, VTList, Ops);
5467 return getNode(Opcode, DL, VTList, Ops);
5472 SDValue Ops[] = { N1, N2, N3 };
5473 return getNode(Opcode, DL, VTList, Ops);
5479 SDValue Ops[] = { N1, N2, N3, N4 };
5480 return getNode(Opcode, DL, VTList, Ops);
5486 SDValue Ops[] = { N1, N2, N3, N4, N5 };
5487 return getNode(Opcode, DL, VTList, Ops);
5491 return makeVTList(SDNode::getValueTypeList(VT), 1);
5501 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5507 VTListMap.InsertNode(Result, IP);
5520 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5527 VTListMap.InsertNode(Result, IP);
5541 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5549 VTListMap.InsertNode(Result, IP);
5555 unsigned NumVTs = VTs.
size();
5558 for (
unsigned index = 0; index < NumVTs; index++) {
5563 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5566 std::copy(VTs.
begin(), VTs.
end(), Array);
5568 VTListMap.InsertNode(Result, IP);
5581 assert(N->
getNumOperands() == 1 &&
"Update with wrong number of operands");
5587 void *InsertPos =
nullptr;
5588 if (
SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
5593 if (!RemoveNodeFromCSEMaps(N))
5594 InsertPos =
nullptr;
5597 N->OperandList[0].set(Op);
5600 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5605 assert(N->
getNumOperands() == 2 &&
"Update with wrong number of operands");
5612 void *InsertPos =
nullptr;
5613 if (
SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
5618 if (!RemoveNodeFromCSEMaps(N))
5619 InsertPos =
nullptr;
5622 if (N->OperandList[0] != Op1)
5623 N->OperandList[0].set(Op1);
5624 if (N->OperandList[1] != Op2)
5625 N->OperandList[1].set(Op2);
5628 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5634 SDValue Ops[] = { Op1, Op2, Op3 };
5641 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
5648 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
5654 unsigned NumOps = Ops.
size();
5656 "Update with wrong number of operands");
5663 void *InsertPos =
nullptr;
5664 if (
SDNode *Existing = FindModifiedNodeSlot(N, Ops, InsertPos))
5669 if (!RemoveNodeFromCSEMaps(N))
5670 InsertPos =
nullptr;
5673 for (
unsigned i = 0; i != NumOps; ++i)
5674 if (N->OperandList[i] != Ops[i])
5675 N->OperandList[i].set(Ops[i]);
5678 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5721 SDValue Ops[] = { Op1, Op2, Op3 };
5778 SDValue Ops[] = { Op1, Op2, Op3 };
5787 SDValue Ops[] = { Op1, Op2, Op3 };
5834 unsigned NumOps = Ops.
size();
5841 return UpdadeSDLocOnMergedSDNode(ON,
SDLoc(N));
5844 if (!RemoveNodeFromCSEMaps(N))
5849 N->ValueList = VTs.
VTs;
5850 N->NumValues = VTs.
NumVTs;
5860 DeadNodeSet.
insert(Used);
5865 MN->setMemRefs(
nullptr,
nullptr);
5868 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
5869 if (MN->OperandsNeedDelete)
5870 delete[] MN->OperandList;
5876 Ops.
data(), NumOps);
5878 MN->InitOperands(MN->LocalOperands, Ops.
data(), NumOps);
5879 MN->OperandsNeedDelete =
false;
5881 MN->InitOperands(MN->OperandList, Ops.
data(), NumOps);
5885 if (NumOps > N->NumOperands) {
5886 if (N->OperandsNeedDelete)
5887 delete[] N->OperandList;
5889 N->OperandsNeedDelete =
true;
5896 if (!DeadNodeSet.
empty()) {
5898 for (
SDNode *N : DeadNodeSet)
5905 CSEMap.InsertNode(N, IP);
5941 SDValue Ops[] = { Op1, Op2, Op3 };
5979 SDValue Ops[] = { Op1, Op2, Op3 };
6005 SDValue Ops[] = { Op1, Op2, Op3 };
6040 unsigned NumOps = OpsArray.
size();
6047 return cast<MachineSDNode>(UpdadeSDLocOnMergedSDNode(E, DL));
6064 N->OperandsNeedDelete =
false;
6067 CSEMap.InsertNode(N, IP);
6080 VT, Operand, SRIdxVal);
6091 VT, Operand, Subreg, SRIdxVal);
6115 unsigned R,
bool IsIndirect, uint64_t Off,
6117 assert(cast<DILocalVariable>(Var)->isValidLocationForIntrinsic(DL) &&
6118 "Expected inlined-at fields to agree");
6120 SDDbgValue(Var, Expr, N, R, IsIndirect, Off, DL, O);
6125 const Value *C, uint64_t Off,
6127 assert(cast<DILocalVariable>(Var)->isValidLocationForIntrinsic(DL) &&
6128 "Expected inlined-at fields to agree");
6134 unsigned FI, uint64_t Off,
6136 assert(cast<DILocalVariable>(Var)->isValidLocationForIntrinsic(DL) &&
6137 "Expected inlined-at fields to agree");
6153 while (UI != UE && N == *UI)
6161 :
SelectionDAG::DAGUpdateListener(d), UI(ui), UE(ue) {}
6174 "Cannot replace with this method!");
6175 assert(From != To.
getNode() &&
"Cannot replace uses of with self");
6185 RAUWUpdateListener Listener(*
this, UI, UE);
6190 RemoveNodeFromCSEMaps(User);
6200 }
while (UI != UE && *UI == User);
6204 AddModifiedNodeToCSEMaps(User);
6220 for (
unsigned i = 0, e = From->
getNumValues(); i != e; ++i)
6223 "Cannot use this version of ReplaceAllUsesWith!");
6233 RAUWUpdateListener Listener(*
this, UI, UE);
6238 RemoveNodeFromCSEMaps(User);
6248 }
while (UI != UE && *UI == User);
6252 AddModifiedNodeToCSEMaps(User);
6272 RAUWUpdateListener Listener(*
this, UI, UE);
6277 RemoveNodeFromCSEMaps(User);
6288 }
while (UI != UE && *UI == User);
6292 AddModifiedNodeToCSEMaps(User);
6305 if (From == To)
return;
6317 RAUWUpdateListener Listener(*
this, UI, UE);
6320 bool UserRemovedFromCSEMaps =
false;
6337 if (!UserRemovedFromCSEMaps) {
6338 RemoveNodeFromCSEMaps(User);
6339 UserRemovedFromCSEMaps =
true;
6344 }
while (UI != UE && *UI == User);
6348 if (!UserRemovedFromCSEMaps)
6353 AddModifiedNodeToCSEMaps(User);
6371 bool operator<(
const UseMemo &L,
const UseMemo &R) {
6391 for (
unsigned i = 0; i != Num; ++i) {
6392 unsigned FromResNo = From[i].
getResNo();
6395 E = FromNode->
use_end(); UI != E; ++UI) {
6398 UseMemo Memo = { *UI, i, &Use };
6405 std::sort(Uses.
begin(), Uses.
end());
6407 for (
unsigned UseIndex = 0, UseIndexEnd = Uses.
size();
6408 UseIndex != UseIndexEnd; ) {
6414 RemoveNodeFromCSEMaps(User);
6421 unsigned i = Uses[UseIndex].Index;
6426 }
while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
6430 AddModifiedNodeToCSEMaps(User);
6439 unsigned DAGSize = 0;
6462 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
6463 assert(SortedPos != AllNodes.end() &&
"Overran node list");
6482 assert(Degree != 0 &&
"Invalid node degree");
6488 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
6489 assert(SortedPos != AllNodes.end() &&
"Overran node list");
6496 if (
I == SortedPos) {
6499 dbgs() <<
"Overran sorted position:\n";
6501 dbgs() <<
"Checking if this is due to cycles\n";
6508 assert(SortedPos == AllNodes.end() &&
6509 "Topological sort incomplete!");
6511 "First node in topological sort is not the entry token!");
6512 assert(AllNodes.front().getNodeId() == 0 &&
6513 "First node in topological sort has non-zero id!");
6514 assert(AllNodes.front().getNumOperands() == 0 &&
6515 "First node in topological sort has operands!");
6516 assert(AllNodes.back().getNodeId() == (
int)DAGSize-1 &&
6517 "Last node in topologic sort has unexpected id!");
6518 assert(AllNodes.back().use_empty() &&
6519 "Last node in topologic sort has users!");
6520 assert(DAGSize ==
allnodes_size() &&
"Node count mismatch!");
6531 DbgInfo->
add(DB, SD, isParameter);
6554 E = ClonedDVs.
end();
I != E; ++
I)
6566 GlobalAddressSDNode::GlobalAddressSDNode(
unsigned Opc,
unsigned Order,
6568 EVT VT, int64_t o,
unsigned char TF)
6569 :
SDNode(Opc, Order, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
6577 SrcAddrSpace(SrcAS), DestAddrSpace(DestAS) {}
6581 :
SDNode(Opc, Order, dl, VTs), MemoryVT(memvt), MMO(mmo) {
6586 "Non-temporal encoding error!");
6595 :
SDNode(Opc, Order, dl, VTs, Ops),
6596 MemoryVT(memvt), MMO(mmo) {
6611 std::vector<EVT> VTs;
6627 const EVT *SDNode::getValueTypeList(
EVT VT) {
6630 return &(*
EVTs->insert(VT).first);
6633 "Value type out of range!");
6646 if (UI.getUse().getResNo() == Value) {
6664 if (UI.getUse().getResNo() == Value)
6708 unsigned Depth)
const {
6709 if (*
this == Dest)
return true;
6713 if (Depth == 0)
return false;
6725 if (
LoadSDNode *Ld = dyn_cast<LoadSDNode>(*
this)) {
6726 if (!Ld->isVolatile())
6727 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
6746 if (Visited.
empty()) {
6751 if (Visited.
count(N))
6756 while (!Worklist.
empty()) {
6760 if (Visited.
insert(Op).second)
6771 assert(Num < NumOperands &&
"Invalid child # of SDNode!");
6772 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
6777 "Can't unroll a vector with multiple results!");
6780 unsigned NE = VT.getVectorNumElements();
6790 else if (NE > ResNE)
6794 for (i= 0; i !=
NE; ++i) {
6836 for (; i < ResNE; ++i)
6848 unsigned Bytes,
int Dist)
const {
6861 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6862 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6865 if (FS != BFS || FS != (
int)Bytes)
return false;
6871 int64_t LocOffset = cast<ConstantSDNode>(Loc.
getOperand(1))->getSExtValue();
6875 if (LocOffset == Dist * (
int)Bytes)
6881 cast<ConstantSDNode>(BaseLoc.
getOperand(1))->getSExtValue();
6883 if ((LocOffset - BOffset) == Dist * (
int)Bytes)
6890 int64_t Offset1 = 0;
6891 int64_t Offset2 = 0;
6894 if (isGA1 && isGA2 && GV1 == GV2)
6895 return Offset1 == (Offset2 + Dist*Bytes);
6905 int64_t GVOffset = 0;
6908 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0);
6911 unsigned AlignBits = KnownZero.countTrailingOnes();
6912 unsigned Align = AlignBits ? 1 <<
std::min(31U, AlignBits) : 0;
6919 int FrameIdx = 1 << 31;
6920 int64_t FrameOffset = 0;
6922 FrameIdx = FI->getIndex();
6926 FrameIdx = cast<FrameIndexSDNode>(Ptr.
getOperand(0))->getIndex();
6930 if (FrameIdx != (1 << 31)) {
6949 assert(!(NumElements & 1) &&
"Splitting vector, but not in half!");
6953 return std::make_pair(LoVT, HiVT);
6958 std::pair<SDValue, SDValue>
6963 "More vector elements requested than available!");
6970 return std::make_pair(Lo, Hi);
6975 unsigned Start,
unsigned Count) {
6983 for (
unsigned i = Start, e = Start + Count; i != e; ++i) {
6997 return Val.MachineCPVal->getType();
6998 return Val.ConstVal->getType();
7003 unsigned &SplatBitSize,
7005 unsigned MinSplatBits,
7006 bool isBigEndian)
const {
7008 assert(VT.
isVector() &&
"Expected a vector type");
7010 if (MinSplatBits > sz)
7013 SplatValue =
APInt(sz, 0);
7014 SplatUndef =
APInt(sz, 0);
7021 assert(nOps > 0 &&
"isConstantSplat has 0-size build vector");
7024 for (
unsigned j = 0; j < nOps; ++j) {
7025 unsigned i = isBigEndian ? nOps-1-j : j;
7027 unsigned BitPos = j * EltBitSize;
7032 SplatValue |= CN->getAPIntValue().
zextOrTrunc(EltBitSize).
7033 zextOrTrunc(sz) << BitPos;
7035 SplatValue |= CN->getValueAPF().bitcastToAPInt().
zextOrTrunc(sz) <<BitPos;
7043 HasAnyUndefs = (SplatUndef != 0);
7046 unsigned HalfSize = sz / 2;
7053 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
7054 MinSplatBits > HalfSize)
7057 SplatValue = HighValue | LowValue;
7058 SplatUndef = HighUndef & LowUndef;
7068 if (UndefElements) {
7069 UndefElements->
clear();
7077 (*UndefElements)[i] =
true;
7078 }
else if (!Splatted) {
7080 }
else if (Splatted != Op) {
7087 "Can only have a splat without a constant for all undefs.");
7096 return dyn_cast_or_null<ConstantSDNode>(
getSplatValue(UndefElements));
7101 return dyn_cast_or_null<ConstantFPSDNode>(
getSplatValue(UndefElements));
7119 assert(i != e &&
"VECTOR_SHUFFLE node with all undef indices!");
7123 for (
int Idx = Mask[i]; i != e; ++i)
7124 if (Mask[i] >= 0 && Mask[i] != Idx)
7135 if (Checked.
count(N))
7140 if (!Visited.
insert(N).second) {
7141 errs() <<
"Detected cycle in SelectionDAG\n";
7142 dbgs() <<
"Offending node:\n";
7164 assert(N &&
"Checking nonexistent SDNode");
void clearAllBits()
Set every bit to 0.
MVT getSimpleValueType() const
Return the simple ValueType of the referenced return value.
SDValue getTruncStore(SDValue Chain, SDLoc dl, SDValue Val, SDValue Ptr, MachinePointerInfo PtrInfo, EVT TVT, bool isNonTemporal, bool isVolatile, unsigned Alignment, const AAMDNodes &AAInfo=AAMDNodes())
SDNode * MorphNodeTo(SDNode *N, unsigned Opc, SDVTList VTs, ArrayRef< SDValue > Ops)
This mutates the specified node to have the specified return type, opcode, and operands.
void resize(unsigned N, bool t=false)
resize - Grow or shrink the bitvector.
BITCAST - This operator converts between integer, vector and FP values, as if the value was stored to...
X = FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type down to the precision of the ...
APInt LLVM_ATTRIBUTE_UNUSED_RESULT ashr(unsigned shiftAmt) const
Arithmetic right-shift function.
void AddPointer(const void *Ptr)
Add* - Add various data types to Bit data.
bool use_empty() const
Return true if there are no uses of this node.
opStatus divide(const APFloat &, roundingMode)
void push_back(const T &Elt)
unsigned Log2_32_Ceil(uint32_t Value)
Log2_32_Ceil - This function returns the ceil log base 2 of the specified value, 32 if the value is z...
BUILTIN_OP_END - This must be the last enum value in this list.
The memory access reads data.
A parsed version of the target data layout string in and methods for querying it. ...
CallingConv::ID getLibcallCallingConv(RTLIB::Libcall Call) const
Get the CallingConv that should be used for the specified libcall.
unsigned getRawFlags() const
Return a raw encoding of the flags.
CallLoweringInfo & setCallee(CallingConv::ID CC, Type *ResultType, SDValue Target, ArgListTy &&ArgsList, unsigned FixedArgs=-1)
SDValue getValue(unsigned R) const
virtual SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, unsigned Align, bool isVolatile, MachinePointerInfo DstPtrInfo) const
EmitTargetCodeForMemset - Emit target-specific code that performs a memset.
static APInt getSignBit(unsigned BitWidth)
Get the SignBit for a specific bit width.
APInt LLVM_ATTRIBUTE_UNUSED_RESULT byteSwap() const
The memory access writes data.
ConstantFPSDNode * getConstantFPSplatNode(BitVector *UndefElements=nullptr) const
Returns the splatted constant FP or null if this is not a constant FP splat.
raw_ostream & errs()
This returns a reference to a raw_ostream for standard error.
const char * getSymbol() const
APInt LLVM_ATTRIBUTE_UNUSED_RESULT abs() const
Get the absolute value;.
This SDNode is used for target intrinsics that touch memory and need an associated MachineMemOperand...
bool isExactlyValue(double V) const
We don't rely on operator== working on double values, as it returns true for things that are clearly ...
EXTRACT_ELEMENT - This is used to get the lower or upper (determined by a Constant, which is required to be operand #1) half of the integer or float value specified as operand #0.
static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, SDLoc dl, SDValue Chain, SDValue Dst, SDValue Src, uint64_t Size, unsigned Align, bool isVol, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo)
SDValue getSplatValue(BitVector *UndefElements=nullptr) const
Returns the splatted value or a null value if this is not a splat.
LLVMContext & getContext() const
getContext - Return a reference to the LLVMContext associated with this function. ...
static APInt getAllOnesValue(unsigned numBits)
Get the all-ones value.
LLVMContext * getContext() const
SDValue getTargetIndex(int Index, EVT VT, int64_t Offset=0, unsigned char TargetFlags=0)
Keeps track of dbg_value information through SDISel.
bool isBuildVectorOfConstantSDNodes(const SDNode *N)
Return true if the specified node is a BUILD_VECTOR node of all ConstantSDNode or undef...
uint64_t getZExtValue() const
Get zero extended value.
bool LLVM_ATTRIBUTE_UNUSED_RESULT empty() const
SDValue UnrollVectorOp(SDNode *N, unsigned ResNE=0)
Utility function used by legalize and lowering to "unroll" a vector operation by splitting out the sc...
static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, SDLoc dl, SDValue Chain, SDValue Dst, SDValue Src, uint64_t Size, unsigned Align, bool isVol, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo)
void dumprFull(const SelectionDAG *G=nullptr) const
printrFull to dbgs().
SDValue getIndexedLoad(SDValue OrigLoad, SDLoc dl, SDValue Base, SDValue Offset, ISD::MemIndexedMode AM)
void dump() const
Dump this node, for debugging.
NodeType getExtForLoadExtType(bool IsFP, LoadExtType)
DELETED_NODE - This is an illegal value that is used to catch errors.
MDNODE_SDNODE - This is a node that holdes an MDNode*, which is used to reference metadata in the IR...
unsigned getMaxStoresPerMemcpy(bool OptSize) const
Get maximum # of store operations permitted for llvm.memcpy.
size_t size() const
size - Get the string size.
EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR (an vector value) starting with the ...
LegalizeTypeAction getTypeAction(LLVMContext &Context, EVT VT) const
Return how we should legalize values of this type, either it is already legal (return 'Legal') or we ...
bool isKnownNeverNaN(SDValue Op) const
Test whether the given SDValue is known to never be NaN.
BR_CC - Conditional branch.
bool none() const
none - Returns true if none of the bits are set.
SDValue getBoolExtOrTrunc(SDValue Op, SDLoc SL, EVT VT, EVT OpVT)
Convert Op, which must be of integer type, to the integer type VT, by using an extension appropriate ...
static const fltSemantics IEEEdouble
bool hasNUsesOfValue(unsigned NUses, unsigned Value) const
Return true if there are exactly NUSES uses of the indicated value.
VECTOR_SHUFFLE(VEC1, VEC2) - Returns a vector, of the same type as VEC1/VEC2.
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
This class is used for three-operand SDNodes.
SDVTList getVTList() const
SDValue getVAArg(EVT VT, SDLoc dl, SDValue Chain, SDValue Ptr, SDValue SV, unsigned Align)
VAArg produces a result and token chain, and takes a pointer and a source value as input...
ZERO_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register zero-extension of the low ...
SDValue getZeroExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT)
Return an operation which will zero extend the low lanes of the operand into the specified vector typ...
CallLoweringInfo & setDebugLoc(SDLoc dl)
unsigned getBitWidth() const
getBitWidth - Return the bitwidth of this constant.
SDValue getMergeValues(ArrayRef< SDValue > Ops, SDLoc dl)
Create a MERGE_VALUES node from the given operands.
Carry-setting nodes for multiple precision addition and subtraction.
const TargetMachine & getTarget() const
unsigned getPointerTypeSizeInBits(Type *) const
Layout pointer size, in bits, based on the type.
bool isExtended() const
isExtended - Test if the given EVT is extended (as opposed to being simple).
unsigned getPrefTypeAlignment(Type *Ty) const
Returns the preferred stack/global alignment for the specified type.
Clients of various APIs that cause global effects on the DAG can optionally implement this interface...
static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl< int > &M)
static bool isBinOpWithFlags(unsigned Opcode)
Returns true if the opcode is a binary operation with flags.
friend struct DAGUpdateListener
DAGUpdateListener is a friend so it can manipulate the listener stack.
const TargetSubtargetInfo & getSubtarget() const
unsigned InferPtrAlignment(SDValue Ptr) const
Infer alignment of a load / store address.
void computeKnownBits(SDValue Op, APInt &KnownZero, APInt &KnownOne, unsigned Depth=0) const
Determine which bits of Op are known to be either zero or one and return them in the KnownZero/KnownO...
unsigned getPointerPrefAlignment(unsigned AS=0) const
Return target's alignment for stack-based pointers FIXME: The defaults need to be removed once all of...
size_type count(PtrType Ptr) const
count - Return 1 if the specified pointer is in the set, 0 otherwise.
std::pair< EVT, EVT > GetSplitDestVTs(const EVT &VT) const
Compute the VTs needed for the low/hi parts of a type which is split (or expanded) into two not neces...
CondCode getSetCCAndOperation(CondCode Op1, CondCode Op2, bool isInteger)
getSetCCAndOperation - Return the result of a logical AND between different comparisons of identical ...
static APInt getLowBitsSet(unsigned numBits, unsigned loBitsSet)
Get a value with low bits set.
const GlobalValue * getGlobal() const
virtual void addSelectionDAGCSEId(FoldingSetNodeID &ID)=0
void computeKnownBits(Value *V, APInt &KnownZero, APInt &KnownOne, const DataLayout &DL, unsigned Depth=0, AssumptionCache *AC=nullptr, const Instruction *CxtI=nullptr, const DominatorTree *DT=nullptr)
Determine which bits of V are known to be either zero or one and return them in the KnownZero/KnownOn...
static PointerType * get(Type *ElementType, unsigned AddressSpace)
PointerType::get - This constructs a pointer to an object of the specified type in a numbered address...
SDValue getBasicBlock(MachineBasicBlock *MBB)
RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition.
Completely target-dependent object reference.
unsigned getOpcode() const
Return the SelectionDAG opcode value for this node.
static ISD::NodeType getExtendForContent(BooleanContent Content)
bool getHasDebugValue() const
Get this bit.
StringRef substr(size_t Start, size_t N=npos) const
Return a reference to the substring from [Start, Start + N).
bool NewNodesMustHaveLegalTypes
When true, additional steps are taken to ensure that getConstant() and similar functions return DAG n...
Type * getTypeForEVT(LLVMContext &Context) const
getTypeForEVT - This method returns an LLVM type corresponding to the specified EVT.
opStatus
IEEE-754R 7: Default exception handling.
SDValue getLoad(EVT VT, SDLoc dl, SDValue Chain, SDValue Ptr, MachinePointerInfo PtrInfo, bool isVolatile, bool isNonTemporal, bool isInvariant, unsigned Alignment, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr)
Loads are not normal binary operators: their result type is not determined by their operands...
SDValue getZeroExtendInReg(SDValue Op, SDLoc DL, EVT SrcTy)
Return the expression required to zero extend the Op value assuming it was the smaller SrcTy value...
TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or anything else with this node...
unsigned getRawSubclassData() const
Return the SubclassData value, which contains an encoding of the volatile flag, as well as bits used ...
static const fltSemantics & EVTToAPFloatSemantics(EVT VT)
Returns an APFloat semantics tag appropriate for the given type.
Val, Success, OUTCHAIN = ATOMIC_CMP_SWAP_WITH_SUCCESS(INCHAIN, ptr, cmp, swap) N.b.
unsigned getNumOperands() const
Return the number of values used by this operation.
unsigned getNumOperands() const
unsigned getValueSizeInBits() const
Returns the size of the value in bits.
void Deallocate(SubClass *E)
Deallocate - Release storage for the pointed-to object.
virtual bool isZExtFree(Type *, Type *) const
Return true if any actual instruction that defines a value of type Ty1 implicitly zero-extends the va...
int64_t getOffset() const
This class is an extension of BinarySDNode used from those opcodes that have associated extra flags...
const SDValue & getOperand(unsigned Num) const
const Function * getFunction() const
getFunction - Return the LLVM function that this machine code represents
SDValue getMaskedGather(SDVTList VTs, EVT VT, SDLoc dl, ArrayRef< SDValue > Ops, MachineMemOperand *MMO)
virtual bool allowsMisalignedMemoryAccesses(EVT, unsigned AddrSpace=0, unsigned Align=1, bool *=nullptr) const
Determine if the target supports unaligned memory accesses.
unsigned getAddressSpace() const
Return the address space of the Pointer type.
SIGN_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register sign-extension of the low ...
[US]{MIN/MAX} - Binary minimum or maximum or signed or unsigned integers.
void setNodeId(int Id)
Set unique node id.
static bool isCommutativeBinOp(unsigned Opcode)
Returns true if the opcode is a commutative binary operation.
SDValue getTargetExternalSymbol(const char *Sym, EVT VT, unsigned char TargetFlags=0)
ConstantSDNode * getConstantSplatNode(BitVector *UndefElements=nullptr) const
Returns the splatted constant or null if this is not a constant splat.
CvtCode
CvtCode enum - This enum defines the various converts CONVERT_RNDSAT supports.
const MachinePointerInfo & getPointerInfo() const
const SDValue & setRoot(SDValue N)
Set the current root tag of the SelectionDAG.
void reserve(size_type N)
unsigned getNumSignBits() const
Computes the number of leading bits of this APInt that are equal to its sign bit. ...
const SDValue & getValue() const
void DeleteNode(SDNode *N)
Remove the specified node from the system.
INSERT_SUBVECTOR(VECTOR1, VECTOR2, IDX) - Returns a vector with VECTOR2 inserted into VECTOR1 at the ...
SDValue getConstantPool(const Constant *C, EVT VT, unsigned Align=0, int Offs=0, bool isT=false, unsigned char TargetFlags=0)
APInt LLVM_ATTRIBUTE_UNUSED_RESULT zextOrTrunc(unsigned width) const
Zero extend or truncate to width.
std::size_t countLeadingZeros(T Val, ZeroBehavior ZB=ZB_Width)
Count number of 0's from the most significant bit to the least stopping at the first 1...
MachineMemOperand * getMachineMemOperand(MachinePointerInfo PtrInfo, unsigned f, uint64_t s, unsigned base_alignment, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr)
getMachineMemOperand - Allocate a new MachineMemOperand.
EntryToken - This is the marker used to indicate the start of a region.
virtual SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, unsigned Align, bool isVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const
EmitTargetCodeForMemcpy - Emit target-specific code that performs a memcpy.
void AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter)
Add a dbg_value SDNode.
Select with condition operator - This selects between a true value and a false value (ops #2 and #3) ...
NodeType
ISD::NodeType enum - This enum defines the target-independent operators for a SelectionDAG.
unsigned getResNo() const
get the index which selects a specific result in the SDNode
SDValue getMCSymbol(MCSymbol *Sym, EVT VT)
void ReplaceAllUsesOfValuesWith(const SDValue *From, const SDValue *To, unsigned Num)
Like ReplaceAllUsesOfValueWith, but for multiple values at once.
bool bitsLT(EVT VT) const
bitsLT - Return true if this has less bits than VT.
virtual void NodeUpdated(SDNode *N)
The node N that was updated.
INT = FGETSIGN(FP) - Return the sign bit of the specified floating point value as an integer 0/1 valu...
void computeKnownBitsFromRangeMetadata(const MDNode &Ranges, APInt &KnownZero)
Compute known bits from the range metadata.
This SDNode is used to implement the code generator support for the llvm IR shufflevector instruction...
SDValue getExternalSymbol(const char *Sym, EVT VT)
SDValue getMemcpy(SDValue Chain, SDLoc dl, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, bool isVol, bool AlwaysInline, bool isTailCall, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo)
static MachinePointerInfo getFixedStack(int FI, int64_t offset=0)
getFixedStack - Return a MachinePointerInfo record that refers to the the specified FrameIndex...
NOTE: avoid using this node as this may disappear in the future and most targets don't support it...
RESULT,OUTCHAIN = INTRINSIC_W_CHAIN(INCHAIN, INTRINSICID, arg1, ...) This node represents a target in...
A templated base class for SmallPtrSet which provides the typesafe interface that is common across al...
bool isKnownNeverZero(SDValue Op) const
Test whether the given SDValue is known to never be positive or negative Zero.
bool isNegative() const
Determine sign of this APInt.
APInt LLVM_ATTRIBUTE_UNUSED_RESULT rotl(unsigned rotateAmt) const
Rotate left by rotateAmt.
SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded integer shift operations...
bool isVector() const
isVector - Return true if this is a vector value type.
APInt LLVM_ATTRIBUTE_UNUSED_RESULT urem(const APInt &RHS) const
Unsigned remainder operation.
BlockAddress - The address of a basic block.
void clear()
Clear state and free memory necessary to make this SelectionDAG ready to process a new block...
SDValue getStore(SDValue Chain, SDLoc dl, SDValue Val, SDValue Ptr, MachinePointerInfo PtrInfo, bool isVolatile, bool isNonTemporal, unsigned Alignment, const AAMDNodes &AAInfo=AAMDNodes())
Helper function to build ISD::STORE nodes.
MachineMemOperand - A description of a memory reference used in the backend.
void clear()
clear - Clear all bits.
SDValue getMemset(SDValue Chain, SDLoc dl, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, bool isVol, bool isTailCall, MachinePointerInfo DstPtrInfo)
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
This file declares the MachineConstantPool class which is an abstract constant pool to keep track of ...
int64_t getOffset() const
void Reset()
Deallocate all but the current slab and reset the current pointer to the beginning of it...
const APInt & getValue() const
Return the constant as an APInt value reference.
Shift and rotation operations.
T LLVM_ATTRIBUTE_UNUSED_RESULT pop_back_val()
opStatus convertToInteger(integerPart *, unsigned int, bool, roundingMode, bool *) const
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
bool isBuildVectorAllZeros(const SDNode *N)
Return true if the specified node is a BUILD_VECTOR where all of the elements are 0 or undef...
EVT getValueType(unsigned ResNo) const
Return the type of a specified result.
A Use represents the edge between a Value definition and its users.
bool hasPredecessorHelper(const SDNode *N, SmallPtrSetImpl< const SDNode * > &Visited, SmallVectorImpl< const SDNode * > &Worklist) const
Return true if N is a predecessor of this node.
MachineFunction & getMachineFunction() const
bool isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base, unsigned Bytes, int Dist) const
Return true if LD is loading 'Bytes' bytes from a location that is 'Dist' units away from the locatio...
virtual void computeKnownBitsForTargetNode(const SDValue Op, APInt &KnownZero, APInt &KnownOne, const SelectionDAG &DAG, unsigned Depth=0) const
Determine which of the bits specified in Mask are known to be either zero or one and return them in t...
APInt LLVM_ATTRIBUTE_UNUSED_RESULT lshr(unsigned shiftAmt) const
Logical right-shift function.
CallLoweringInfo & setChain(SDValue InChain)
BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
bool isZEXTLoad(const SDNode *N)
Returns true if the specified node is a ZEXTLOAD.
unsigned getAddressSpace() const
MachinePointerInfo getWithOffset(int64_t O) const
SDDbgValue * getDbgValue(MDNode *Var, MDNode *Expr, SDNode *N, unsigned R, bool IsIndirect, uint64_t Off, DebugLoc DL, unsigned O)
Creates a SDDbgValue node.
void AddInteger(signed I)
EVT getScalarType() const
getScalarType - If this is a vector type, return the element type, otherwise return this...
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted...
Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amt) For double-word atomic operations: ValLo, ValHi, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amtLo, amtHi) ValLo, ValHi, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amtLo, amtHi) These correspond to the atomicrmw instruction.
Number of individual test Apply this number of consecutive mutations to each input exit after the first new interesting input is found the minimized corpus is saved into the first input directory Number of jobs to run If min(jobs, NumberOfCpuCores()/2)\" is used.") FUZZER_FLAG_INT(reload
bool isFixedObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a fixed stack object.
allnodes_const_iterator allnodes_end() const
bool bitsGE(EVT VT) const
bitsGE - Return true if this has no less bits than VT.
int getMaskElt(unsigned Idx) const
SDVTList getVTList(EVT VT)
Return an SDVTList that represents the list of values specified.
This class is used to represent EVT's, which are used to parameterize some operations.
The memory access is volatile.
This is an SDNode representing atomic operations.
MDNode * getExpression() const
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
SDValue getAnyExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT)
Return an operation which will any-extend the low lanes of the operand into the specified vector type...
void copySign(const APFloat &)
bool isInteger() const
isInteger - Return true if this is an integer, or a vector integer type.
This represents a list of ValueType's that has been intern'd by a SelectionDAG.
unsigned getEVTAlignment(EVT MemoryVT) const
getEVTAlignment - Compute the default alignment value for the given type.
bool getBoolValue() const
Convert APInt to a boolean value.
This class is used to represent an MSTORE node.
virtual MVT getVectorIdxTy(const DataLayout &DL) const
Returns the type to be used for the index operand of: ISD::INSERT_VECTOR_ELT, ISD::EXTRACT_VECTOR_ELT...
EVT getVectorElementType() const
getVectorElementType - Given a vector type, return the type of each element.
void assign(size_type NumElts, const T &Elt)
unsigned AssignTopologicalOrder()
Topological-sort the AllNodes list and a assign a unique node id for each node in the DAG based on th...
static void VerifySDNode(SDNode *N)
VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid.
bool isConstantSplat(APInt &SplatValue, APInt &SplatUndef, unsigned &SplatBitSize, bool &HasAnyUndefs, unsigned MinSplatBits=0, bool isBigEndian=false) const
Check if this is a constant splat, and if so, find the smallest element size that splats the vector...
void checkForCycles(const SelectionDAG *DAG, bool force=false)
unsigned getIROrder() const
Return the node ordering.
[SU]INT_TO_FP - These operators convert integers (whose interpreted sign depends on the first letter)...
std::pair< SDValue, SDValue > LowerCallTo(CallLoweringInfo &CLI) const
This function lowers an abstract call to a function into an actual call.
unsigned getNumValues() const
Return the number of values defined/returned by this operator.
bool LLVM_ATTRIBUTE_UNUSED_RESULT empty() const
SDValue getRegisterMask(const uint32_t *RegMask)
DAGUpdateListener *const Next
Select with a vector condition (op #0) and two vector operands (ops #1 and #2), returning a vector re...
Simple integer binary arithmetic operators.
SDValue getVectorShuffle(EVT VT, SDLoc dl, SDValue N1, SDValue N2, const int *MaskElts)
Return an ISD::VECTOR_SHUFFLE node.
bool sgt(const APInt &RHS) const
Signed greather than comparison.
DbgValueKind getKind() const
static std::error_code check(std::error_code Err)
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory)...
bool isLittleEndian() const
Layout endianness...
MachineConstantPoolValue * getMachineCPVal() const
SDValue getUNDEF(EVT VT)
Return an UNDEF node. UNDEF does not have a useful SDLoc.
CondCode
ISD::CondCode enum - These are ordered carefully to make the bitfields below work out...
const APInt & getAPIntValue() const
uint16_t SubclassData
This member is defined by this class, but is not used for anything.
TargetConstant* - Like Constant*, but the DAG does not do any folding, simplification, or lowering of the constant.
EVT getMemoryVT() const
Return the type of the in-memory value.
ANY_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register any-extension of the low la...
const ConstantInt * getConstantIntValue() const
SDValue getAnyExtOrTrunc(SDValue Op, SDLoc DL, EVT VT)
Convert Op, which must be of integer type, to the integer type VT, by either any-extending or truncat...
void setIROrder(unsigned Order)
Set the node ordering.
virtual bool shouldConvertConstantLoadToIntImm(const APInt &Imm, Type *Ty) const
Return true if it is beneficial to convert a load of a constant to just the constant itself...
static unsigned encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile, bool isNonTemporal, bool isInvariant)
encodeMemSDNodeFlags - Generic routine for computing a value for use in the CSE map that carries vola...
void init(MachineFunction &mf)
Prepare this SelectionDAG to process code in the given MachineFunction.
RESULT = INTRINSIC_WO_CHAIN(INTRINSICID, arg1, arg2, ...) This node represents a target intrinsic fun...
size_t size() const
size - Get the array size.
const DataLayout & getDataLayout() const
bool bitsLE(EVT VT) const
bitsLE - Return true if this has no more bits than VT.
unsigned char getTargetFlags() const
bool ult(const APInt &RHS) const
Unsigned less than comparison.
UNDEF - An undefined node.
SDValue getAddrSpaceCast(SDLoc dl, EVT VT, SDValue Ptr, unsigned SrcAS, unsigned DestAS)
Return an AddrSpaceCastSDNode.
This class is used to represent ISD::STORE nodes.
FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.
static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList)
AddNodeIDValueTypes - Value type lists are intern'd so we can represent them solely with their pointe...
opStatus mod(const APFloat &, roundingMode)
C fmod, or llvm frem.
BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a vector with the specified, possibly variable...
This corresponds to the llvm.lifetime.
opStatus convertFromAPInt(const APInt &, bool, roundingMode)
LLVM_CONSTEXPR size_t array_lengthof(T(&)[N])
Find the length of an array.
The memory access is non-temporal.
static APInt getHighBitsSet(unsigned numBits, unsigned hiBitsSet)
Get a value with high bits set.
SDNode * getNode() const
get the SDNode which holds the desired result
FoldingSetNodeID - This class is used to gather all the unique data bits of a node.
A self-contained host- and target-independent arbitrary-precision floating-point software implementat...
bool hasPredecessor(const SDNode *N) const
Return true if N is a predecessor of this node.
unsigned getScalarSizeInBits() const
unsigned getStoreSize() const
getStoreSize - Return the number of bytes overwritten by a store of the specified value type...
SDValue getMDNode(const MDNode *MD)
Return an MDNodeSDNode which holds an MDNode.
bool isTypeLegal(EVT VT) const
Return true if the target has native support for the specified value type.
bool isOnlyUserOf(const SDNode *N) const
Return true if this node is the only use of N.
SDValue getMaskedScatter(SDVTList VTs, EVT VT, SDLoc dl, ArrayRef< SDValue > Ops, MachineMemOperand *MMO)
OUTCHAIN = INTRINSIC_VOID(INCHAIN, INTRINSICID, arg1, arg2, ...) This node represents a target intrin...
unsigned UnsafeFPMath
UnsafeFPMath - This flag is enabled when the -enable-unsafe-fp-math flag is specified on the command ...
unsigned getStoreSizeInBits() const
getStoreSizeInBits - Return the number of bits overwritten by a store of the specified value type...
bool isInteger() const
isInteger - Return true if this is an integer, or a vector integer type.
SDValue getCommutedVectorShuffle(const ShuffleVectorSDNode &SV)
Returns an ISD::VECTOR_SHUFFLE node semantically equivalent to the shuffle node in input but with swa...
bool isZero() const
Return true if the value is positive or negative zero.
AddrSpaceCastSDNode(unsigned Order, DebugLoc dl, EVT VT, SDValue X, unsigned SrcAS, unsigned DestAS)
APInt LLVM_ATTRIBUTE_UNUSED_RESULT trunc(unsigned width) const
Truncate to new width.
bool hasFloatingPointExceptions() const
Return true if target supports floating point exceptions.
bool isMachineConstantPoolEntry() const
MVT - Machine Value Type.
static void AddNodeIDNode(FoldingSetNodeID &ID, unsigned short OpC, SDVTList VTList, ArrayRef< SDValue > OpList)
virtual bool needsStackRealignment(const MachineFunction &MF) const
needsStackRealignment - true if storage within the function requires the stack pointer to be aligned ...
const SDValue & getOperand(unsigned i) const
The instances of the Type class are immutable: once they are created, they are never changed...
Simple binary floating point operators.
bool isNonTemporal() const
static SDValue getMemsetStores(SelectionDAG &DAG, SDLoc dl, SDValue Chain, SDValue Dst, SDValue Src, uint64_t Size, unsigned Align, bool isVol, MachinePointerInfo DstPtrInfo)
Lower the call to 'memset' intrinsic function into a series of store operations.
bool isOperationLegalOrCustom(unsigned Op, EVT VT) const
Return true if the specified operation is legal on this target or can be made legal with custom lower...
static bool doNotCSE(SDNode *N)
doNotCSE - Return true if CSE should not be performed for this node.
bool sge(const APInt &RHS) const
Signed greather or equal comparison.
void DropOperands()
Release the operands and set this node to have zero operands.
virtual EVT getOptimalMemOpType(uint64_t, unsigned, unsigned, bool, bool, bool, MachineFunction &) const
Returns the target specific optimal type for load and store operations as a result of memset...
PointerUnion< const Value *, const PseudoSourceValue * > V
V - This is the IR pointer value for the access, or it is null if unknown.
This is an important base class in LLVM.
LoadExtType
LoadExtType enum - This enum defines the three variants of LOADEXT (load with extension).
INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element at IDX replaced with VAL...
const Constant * getConstVal() const
This file contains the declarations for the subclasses of Constant, which represent the different fla...
LLVM_ATTRIBUTE_RETURNS_NONNULL LLVM_ATTRIBUTE_RETURNS_NOALIAS void * Allocate(size_t Size, size_t Alignment)
Allocate space at the specified alignment.
Carry-using nodes for multiple precision addition and subtraction.
virtual bool isSafeMemOpType(MVT) const
Returns true if it's safe to use load / store of the specified type to expand memcpy / memset inline...
ConstantFP - Floating Point Values [float, double].
const unsigned int integerPartWidth
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
opStatus fusedMultiplyAdd(const APFloat &, const APFloat &, roundingMode)
unsigned getMaxStoresPerMemmove(bool OptSize) const
Get maximum # of store operations permitted for llvm.memmove.
INSERT_SUBREG - This instruction takes three operands: a register that has subregisters, a register providing an insert value, and a subregister index.
static SDValue getMemsetStringVal(EVT VT, SDLoc dl, SelectionDAG &DAG, const TargetLowering &TLI, StringRef Str)
getMemsetStringVal - Similar to getMemsetValue.
bool sle(const APInt &RHS) const
Signed less or equal comparison.
void RemoveDeadNodes()
This method deletes all unreachable nodes in the SelectionDAG.
This class is used for two-operand SDNodes.
virtual bool isTruncateFree(Type *, Type *) const
Return true if it's free to truncate a value of type Ty1 to type Ty2.
static void AddNodeIDOperands(FoldingSetNodeID &ID, ArrayRef< SDValue > Ops)
AddNodeIDOperands - Various routines for adding operands to the NodeID data.
static Type * getVoidTy(LLVMContext &C)
This class provides iterator support for SDUse operands that use a specific SDNode.
SDValue getSExtOrTrunc(SDValue Op, SDLoc DL, EVT VT)
Convert Op, which must be of integer type, to the integer type VT, by either sign-extending or trunca...
BumpPtrAllocator & getAlloc()
ArrayRef< SDDbgValue * > GetDbgValues(const SDNode *SD)
Get the debug values which reference the given SDNode.
static ManagedStatic< std::set< EVT, EVT::compareRawBits > > EVTs
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang","erlang-compatible garbage collector")
SDValue getTargetConstant(uint64_t Val, SDLoc DL, EVT VT, bool isOpaque=false)
unsigned getBitWidth() const
Return the number of bits in the APInt.
opStatus convert(const fltSemantics &, roundingMode, bool *)
APFloat::convert - convert a value of one floating point type to another.
bool uge(const APInt &RHS) const
Unsigned greater or equal comparison.
unsigned getOpcode() const
TargetIndex - Like a constant pool entry, but with completely target-dependent semantics.
void InitOperands(SDUse *Ops, const SDValue &Op0)
Initialize the operands list of this with 1 operand.
APInt LLVM_ATTRIBUTE_UNUSED_RESULT sdiv(const APInt &RHS) const
Signed division function for APInt.
AssertSext, AssertZext - These nodes record if a register contains a value that has already been zero...
unsigned char getTargetFlags() const
void RemoveDeadNode(SDNode *N)
Remove the specified node from the system.
This class is used for single-operand SDNodes.
CondCode getSetCCSwappedOperands(CondCode Operation)
getSetCCSwappedOperands - Return the operation corresponding to (Y op X) when given the operation for...
unsigned countPopulation() const
Count the number of bits set.
VAARG - VAARG has four operands: an input chain, a pointer, a SRCVALUE, and the alignment.
ilist< SDNode >::size_type allnodes_size() const
use_iterator use_begin() const
Provide iteration support to walk over all uses of an SDNode.
bool empty() const
empty - Check if the array is empty.
MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs, EVT MemoryVT, MachineMemOperand *MMO)
const SDValue & getValue() const
static bool isValueValidForType(EVT VT, const APFloat &Val)
SDValue getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT, SDValue Chain, SDValue Ptr, MachinePointerInfo PtrInfo, EVT MemVT, bool isVolatile, bool isNonTemporal, bool isInvariant, unsigned Alignment, const AAMDNodes &AAInfo=AAMDNodes())
bool isThreadLocal() const
If the value is "Thread Local", its value isn't shared by the threads.
Bit counting operators with an undefined result for zero inputs.
Val, OUTCHAIN = ATOMIC_CMP_SWAP(INCHAIN, ptr, cmp, swap) For double-word atomic operations: ValLo...
bool MaskedValueIsZero(SDValue Op, const APInt &Mask, unsigned Depth=0) const
Return true if 'Op & Mask' is known to be zero.
X = FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
static ManagedStatic< sys::SmartMutex< true > > VTMutex
void append(in_iter in_start, in_iter in_end)
Add the specified range to the end of the SmallVector.
ArrayRef< SDDbgValue * > getSDDbgValues(const SDNode *Node)
EVT - Extended Value Type.
bool isPointerTy() const
isPointerTy - True if this is an instance of PointerType.
std::vector< ArgListEntry > ArgListTy
const APFloat & getValueAPF() const
SDValue getGlobalAddress(const GlobalValue *GV, SDLoc DL, EVT VT, int64_t offset=0, bool isTargetGA=false, unsigned char TargetFlags=0)
SDValue getMaskedLoad(EVT VT, SDLoc dl, SDValue Chain, SDValue Ptr, SDValue Mask, SDValue Src0, EVT MemVT, MachineMemOperand *MMO, ISD::LoadExtType)
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
bool isEqualTo(SDValue A, SDValue B) const
Test whether two SDValues are known to compare equal.
Abstract base class for all machine specific constantpool value subclasses.
This structure contains all information that is necessary for lowering calls.
BooleanContent getBooleanContents(bool isVec, bool isFloat) const
For targets without i1 registers, this gives the nature of the high-bits of boolean values held in ty...
static EVT getVectorVT(LLVMContext &Context, EVT VT, unsigned NumElements)
getVectorVT - Returns the EVT that represents a vector NumElements in length, where each element is o...
MachinePointerInfo - This class contains a discriminated union of information about pointers in memor...
uint64_t getConstantOperandVal(unsigned Num) const
Helper method returns the integer value of a ConstantSDNode operand.
bool isPowerOf2() const
Check if this APInt's value is a power of two greater than zero.
static const fltSemantics IEEEhalf
HANDLENODE node - Used as a handle for various purposes.
APInt LLVM_ATTRIBUTE_UNUSED_RESULT rotr(unsigned rotateAmt) const
Rotate right by rotateAmt.
const SDValue & getRoot() const
Return the root tag of the SelectionDAG.
SDValue getMaskedStore(SDValue Chain, SDLoc dl, SDValue Val, SDValue Ptr, SDValue Mask, EVT MemVT, MachineMemOperand *MMO, bool IsTrunc)
const BlockAddress * getBlockAddress() const
SDValue CreateStackTemporary(EVT VT, unsigned minAlign=1)
Create a stack temporary, suitable for holding the specified value type.
bool isNull() const
isNull - Return true if the pointer held in the union is null, regardless of which type it is...
virtual const TargetSelectionDAGInfo * getSelectionDAGInfo() const
EH_LABEL - Represents a label in mid basic block used to track locations needed for debug and excepti...
The memory access is invariant.
APInt LLVM_ATTRIBUTE_UNUSED_RESULT srem(const APInt &RHS) const
Function for signed remainder operation.
const MachinePointerInfo & getPointerInfo() const
int64_t getObjectOffset(int ObjectIdx) const
Return the assigned stack offset of the specified object from the incoming stack pointer.
MachineMemOperand * MMO
Memory reference information.
const MDNode * getRanges() const
Returns the Ranges that describes the dereference.
static const char *const Magic
const SDValue & getOffset() const
bool bitsGT(EVT VT) const
bitsGT - Return true if this has more bits than VT.
ArrayRef< int > getMask() const
bool ugt(const APInt &RHS) const
Unsigned greather than comparison.
static void commuteMask(SmallVectorImpl< int > &Mask)
Change values in a shuffle permute mask assuming the two vector operands have swapped position...
SDValue getBitcast(EVT VT, SDValue V)
Return a bitcast using the SDLoc of the value operand, and casting to the provided type...
unsigned countTrailingZeros() const
Count the number of trailing zero bits.
IntegerType * getIntPtrType(LLVMContext &C, unsigned AddressSpace=0) const
Returns an integer type with size at least as big as that of a pointer in the given address space...
TokenFactor - This node takes multiple tokens as input and produces a single token result...
unsigned getABITypeAlignment(Type *Ty) const
Returns the minimum ABI-required alignment for the specified type.
bool isBuildVectorAllOnes(const SDNode *N)
Node predicates.
SDValue getConvertRndSat(EVT VT, SDLoc dl, SDValue Val, SDValue DTy, SDValue STy, SDValue Rnd, SDValue Sat, ISD::CvtCode Code)
Returns the ConvertRndSat Note: Avoid using this node because it may disappear in the future and most...
SDValue FoldConstantArithmetic(unsigned Opcode, SDLoc DL, EVT VT, SDNode *Cst1, SDNode *Cst2)
EXTRACT_SUBREG - This instruction takes two operands: a register that has subregisters, and a subregister index.
SDDbgValue * getConstantDbgValue(MDNode *Var, MDNode *Expr, const Value *C, uint64_t Off, DebugLoc DL, unsigned O)
Constant.
SDValue getNOT(SDLoc DL, SDValue Val, EVT VT)
Create a bitwise NOT operation as (XOR Val, -1).
static bool isMemSrcFromString(SDValue Src, StringRef &Str)
isMemSrcFromString - Returns true if memcpy source is a string constant.
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements...
This is the shared class of boolean and integer constants.
int64_t SignExtend64(uint64_t x)
SignExtend64 - Sign extend B-bit number x to 64-bit int.
allnodes_const_iterator allnodes_begin() const
virtual void NodeDeleted(SDNode *N, SDNode *E)
The node N that was deleted and, if E is not null, an equivalent node E that replaced it...
bool slt(const APInt &RHS) const
Signed less than comparison.
bool isBaseWithConstantOffset(SDValue Op) const
Return true if the specified operand is an ISD::ADD with a ConstantSDNode on the right-hand side...
bool erase(PtrType Ptr)
erase - If the set contains the specified pointer, remove it and return true, otherwise return false...
const char * getLibcallName(RTLIB::Libcall Call) const
Get the libcall routine name for the specified libcall.
EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR identified by the (potentially...
opStatus add(const APFloat &, roundingMode)
std::pair< SDValue, SDValue > SplitVector(const SDValue &N, const SDLoc &DL, const EVT &LoVT, const EVT &HiVT)
Split the vector with EXTRACT_SUBVECTOR using the provides VTs and return the low/high part...
SDNode * UpdateNodeOperands(SDNode *N, SDValue Op)
Mutate the specified node in-place to have the specified operands.
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
X = FP_ROUND_INREG(Y, VT) - This operator takes an FP register, and rounds it to a floating point val...
SDValue getTargetInsertSubreg(int SRIdx, SDLoc DL, EVT VT, SDValue Operand, SDValue Subreg)
A convenience function for creating TargetInstrInfo::INSERT_SUBREG nodes.
SDNode * SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT)
These are used for target selectors to mutate the specified node to have the specified return type...
ADDRSPACECAST - This operator converts between pointers of different address spaces.
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small...
unsigned getObjectAlignment(int ObjectIdx) const
Return the alignment of the specified stack object.
Type * getType() const
All values are typed, get the type of this value.
virtual const TargetLowering * getTargetLowering() const
bool allOperandsUndef(const SDNode *N)
Return true if the node has at least one operand and all operands of the specified node are ISD::UNDE...
opStatus multiply(const APFloat &, roundingMode)
An SDNode that represents everything that will be needed to construct a MachineInstr.
const SDValue & getChain() const
A collection of metadata nodes that might be associated with a memory access used by the alias-analys...
Byte Swap and Counting operators.
MachineMemOperand * getMemOperand() const
Return a MachineMemOperand object describing the memory reference performed by operation.
This is an abstract virtual class for memory operations.
unsigned char getTargetFlags() const
SDValue getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, SDValue Chain, SDValue Ptr, SDValue Val, const Value *PtrVal, unsigned Alignment, AtomicOrdering Ordering, SynchronizationScope SynchScope)
Gets a node for an atomic op, produces result (if relevant) and chain and takes 2 operands...
Wrapper class for IR location info (IR ordering and DebugLoc) to be passed into SDNode creation funct...
static void AddNodeIDFlags(FoldingSetNodeID &ID, unsigned Opcode, const SDNodeFlags *Flags)
Add logical or fast math flag values to FoldingSetNodeID value.
unsigned getAddrSpace() const
getAddrSpace - Return the LLVM IR address space number that this pointer points into.
void ExtractVectorElements(SDValue Op, SmallVectorImpl< SDValue > &Args, unsigned Start=0, unsigned Count=0)
Append the extracted elements from Start to Count out of the vector Op in Args.
static Constant * get(Type *Ty, uint64_t V, bool isSigned=false)
If Ty is a vector type, return a Constant with a splat of the given value.
virtual bool isGAPlusOffset(SDNode *N, const GlobalValue *&GA, int64_t &Offset) const
Returns true (and the GlobalValue and the offset) if the node is a GlobalAddress + offset...
static const int FIRST_TARGET_MEMORY_OPCODE
FIRST_TARGET_MEMORY_OPCODE - Target-specific pre-isel operations which do not reference a specific me...
MachineFrameInfo * getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
Represents one node in the SelectionDAG.
static Constant * get(Type *Ty, double V)
get() - This returns a ConstantFP, or a vector containing a splat of a ConstantFP, for the specified value in the specified type.
CondCode getSetCCInverse(CondCode Operation, bool isInteger)
getSetCCInverse - Return the operation corresponding to !(X op Y), where 'op' is a valid SetCC operat...
Type * getType() const
getType - get type of this MachineConstantPoolValue.
static cl::opt< AlignMode > Align(cl::desc("Load/store alignment support"), cl::Hidden, cl::init(NoStrictAlign), cl::values(clEnumValN(StrictAlign,"aarch64-strict-align","Disallow all unaligned memory accesses"), clEnumValN(NoStrictAlign,"aarch64-no-strict-align","Allow unaligned memory accesses"), clEnumValEnd))
virtual unsigned ComputeNumSignBitsForTargetNode(SDValue Op, const SelectionDAG &DAG, unsigned Depth=0) const
This method can be implemented by targets that want to expose additional information about sign bits ...
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
unsigned Log2_32(uint32_t Value)
Log2_32 - This function returns the floor log base 2 of the specified value, -1 if the value is zero...
void swap(llvm::BitVector &LHS, llvm::BitVector &RHS)
Implement std::swap in terms of BitVector swap.
static APInt getSplat(unsigned NewLen, const APInt &V)
Return a value containing V broadcasted over NewLen bits.
ISD::LoadExtType getExtensionType() const
Return whether this is a plain node, or one of the varieties of value-extending loads.
Class for arbitrary precision integers.
bool isBuildVectorOfConstantFPSDNodes(const SDNode *N)
Return true if the specified node is a BUILD_VECTOR node of all ConstantFPSDNode or undef...
bool exceedsNaturalStackAlignment(unsigned Align) const
Returns true if the given alignment exceeds the natural stack alignment.
static unsigned getReg(const void *D, unsigned RC, unsigned RegNo)
A "pseudo-class" with methods for operating on BUILD_VECTORs.
Select(COND, TRUEVAL, FALSEVAL).
op_iterator op_begin() const
static use_iterator use_end()
ZERO_EXTEND - Used for integer types, zeroing the new bits.
APInt bitcastToAPInt() const
LLVM_ATTRIBUTE_UNUSED_RESULT std::enable_if< !is_simple_type< Y >::value, typename cast_retty< X, const Y >::ret_type >::type dyn_cast(const Y &Val)
SDValue getNode(unsigned Opcode, SDLoc DL, EVT VT, ArrayRef< SDUse > Ops)
Gets or creates the specified node.
ANY_EXTEND - Used for integer types. The high bits are undefined.
iterator insert(iterator I, T &&Elt)
CondCode getSetCCOrOperation(CondCode Op1, CondCode Op2, bool isInteger)
getSetCCOrOperation - Return the result of a logical OR between different comparisons of identical va...
FCOPYSIGN(X, Y) - Return the value of X with the sign of Y.
static bool FindOptimalMemOpLowering(std::vector< EVT > &MemOps, unsigned Limit, uint64_t Size, unsigned DstAlign, unsigned SrcAlign, bool IsMemset, bool ZeroMemset, bool MemcpyStrSrc, bool AllowOverlap, SelectionDAG &DAG, const TargetLowering &TLI)
Determines the optimal series of memory ops to replace the memset / memcpy.
SDValue getShiftAmountOperand(EVT LHSTy, SDValue Op)
Return the specified value casted to the target's desired shift amount type.
SDValue getBlockAddress(const BlockAddress *BA, EVT VT, int64_t Offset=0, bool isTarget=false, unsigned char TargetFlags=0)
SDDbgValue * getFrameIndexDbgValue(MDNode *Var, MDNode *Expr, unsigned FI, uint64_t Off, DebugLoc DL, unsigned O)
FrameIndex.
iterator_range< value_op_iterator > op_values() const
static APInt getBitsSet(unsigned numBits, unsigned loBit, unsigned hiBit)
Get a value with a block of bits set.
bool isNonTemporal() const
int64_t getOffset() const
CallLoweringInfo & setTailCall(bool Value=true)
unsigned char getTargetFlags() const
static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, SDLoc dl, SelectionDAG &DAG)
getMemBasePlusOffset - Returns base and offset node for the
uint64_t MinAlign(uint64_t A, uint64_t B)
MinAlign - A and B are either alignments or offsets.
static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, SDLoc dl)
getMemsetValue - Vectorized representation of the memset value operand.
unsigned countLeadingOnes() const
Count the number of leading one bits.
SDValue getStackArgumentTokenFactor(SDValue Chain)
Compute a TokenFactor to force all the incoming stack arguments to be loaded from the stack...
These are IR-level optimization flags that may be propagated to SDNodes.
bool isScalarToVector(const SDNode *N)
Return true if the specified node is a ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only t...
PointerType * getType() const
Global values are always pointers.
Represents a use of a SDNode.
uint64_t getConstantOperandVal(unsigned i) const
static const fltSemantics IEEEsingle
Bitwise operators - logical and, logical or, logical xor.
bool hasAnyUseOfValue(unsigned Value) const
Return true if there are any use of the indicated value.
static void checkForCyclesHelper(const SDNode *N, SmallPtrSetImpl< const SDNode * > &Visited, SmallPtrSetImpl< const SDNode * > &Checked, const llvm::SelectionDAG *DAG)
bool hasFnAttribute(Attribute::AttrKind Kind) const
Return true if the function has the attribute.
APInt LLVM_ATTRIBUTE_UNUSED_RESULT udiv(const APInt &RHS) const
Unsigned division operation.
static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset=0)
InferPointerInfo - If the specified ptr/offset is a frame index, infer a MachinePointerInfo record fr...
opStatus roundToIntegral(roundingMode)
SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to sign extend a small value in ...
LOAD and STORE have token chains as their first operand, then the same operands as an LLVM load/store...
unsigned getMaxStoresPerMemset(bool OptSize) const
Get maximum # of store operations permitted for llvm.memset.
unsigned getSizeInBits() const
getSizeInBits - Return the size of the specified value type in bits.
void ReplaceAllUsesWith(SDValue From, SDValue Op)
Modify anything using 'From' to use 'To' instead.
SDValue getIndexedStore(SDValue OrigStoe, SDLoc dl, SDValue Base, SDValue Offset, ISD::MemIndexedMode AM)
ArrayRef< SDUse > ops() const
Fast - This calling convention attempts to make calls as fast as possible (e.g.
bool isOperandOf(const SDNode *N) const
isOperand - Return true if this node is an operand of N.
void Profile(FoldingSetNodeID &ID) const
Gather unique data for the node.
SDValue getLogicalNOT(SDLoc DL, SDValue Val, EVT VT)
Create a logical NOT operation as (XOR Val, BooleanOne).
static std::pair< APInt, bool > FoldValue(unsigned Opcode, const APInt &C1, const APInt &C2)
op_iterator op_end() const
An SDNode that holds an arbitrary LLVM IR Value.
const SDValue & getOffset() const
unsigned countTrailingOnes() const
Count the number of trailing one bits.
intptr_t getRawBits() const
MachineSDNode * getMachineNode(unsigned Opcode, SDLoc dl, EVT VT)
These are used for target selectors to create a new node with specified return type(s), MachineInstr opcode, and operands.
bool reachesChainWithoutSideEffects(SDValue Dest, unsigned Depth=2) const
Return true if this operand (which must be a chain) reaches the specified operand without crossing an...
SDValue FoldSetCC(EVT VT, SDValue N1, SDValue N2, ISD::CondCode Cond, SDLoc dl)
Constant fold a setcc to true or false.
static int isSignedOp(ISD::CondCode Opcode)
isSignedOp - For an integer comparison, return 1 if the comparison is a signed operation and 2 if the...
This class is used to represent an MSCATTER node.
DebugLoc getDebugLoc() const
int getNodeId() const
Return the unique node id.
SDValue getMemmove(SDValue Chain, SDLoc dl, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, bool isVol, bool isTailCall, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo)
int CreateStackObject(uint64_t Size, unsigned Alignment, bool isSS, const AllocaInst *Alloca=nullptr)
Create a new statically sized stack object, returning a nonnegative identifier to represent it...
EVT getValueType() const
Return the ValueType of the referenced return value.
SDValue getCondCode(ISD::CondCode Cond)
SDNode * getNode() const
Convenience function for get().getNode().
SDValue getConstant(uint64_t Val, SDLoc DL, EVT VT, bool isTarget=false, bool isOpaque=false)
bool getConstantStringInfo(const Value *V, StringRef &Str, uint64_t Offset=0, bool TrimAtNul=true)
getConstantStringInfo - This function computes the length of a null-terminated C string pointed to by...
CONVERT_RNDSAT - This operator is used to support various conversions between various types (float...
const DebugLoc & getDebugLoc() const
Return the source location info.
CONCAT_VECTORS(VECTOR0, VECTOR1, ...) - Given a number of values of vector type with the same length ...
bool isFloatingPoint() const
isFloatingPoint - Return true if this is a FP, or a vector FP type.
SDNode * getNodeIfExists(unsigned Opcode, SDVTList VTs, ArrayRef< SDValue > Ops, const SDNodeFlags *Flags=nullptr)
Get the specified node if it's already available, or else return NULL.
SDValue getJumpTable(int JTI, EVT VT, bool isTarget=false, unsigned char TargetFlags=0)
This class is used to form a handle around another node that is persistent and is updated across invo...
SDValue getFrameIndex(int FI, EVT VT, bool isTarget=false)
This class is used to represent an MLOAD node.
bool isSimple() const
isSimple - Test if the given EVT is simple (as opposed to being extended).
unsigned getAlignment() const
bool operator<(int64_t V1, const APSInt &V2)
MVT getPointerTy(const DataLayout &DL, uint32_t AS=0) const
Return the pointer type for the given address space, defaults to the pointer type from the data layou...
SDValue getTargetExtractSubreg(int SRIdx, SDLoc DL, EVT VT, SDValue Operand)
A convenience function for creating TargetInstrInfo::EXTRACT_SUBREG nodes.
SDValue getZExtOrTrunc(SDValue Op, SDLoc DL, EVT VT)
Convert Op, which must be of integer type, to the integer type VT, by either zero-extending or trunca...
uint64_t getOffset() const
EVT getTypeToTransformTo(LLVMContext &Context, EVT VT) const
For types supported by the target, this is an identity function.
LLVM Value Representation.
FMA - Perform a * b + c with no intermediate rounding step.
SDValue getRegister(unsigned Reg, EVT VT)
APInt LLVM_ATTRIBUTE_UNUSED_RESULT sextOrTrunc(unsigned width) const
Sign extend or truncate to width.
SDValue getEHLabel(SDLoc dl, SDValue Root, MCSymbol *Label)
bool isTruncatingStore() const
Return true if the op does a truncation before store.
void setDebugLoc(DebugLoc dl)
Set source location info.
This class is used to represent an MGATHER node.
SDValue getValueType(EVT)
PREFETCH - This corresponds to a prefetch intrinsic.
void setHasDebugValue(bool b)
Set this bit.
unsigned ComputeNumSignBits(SDValue Op, unsigned Depth=0) const
Return the number of times the sign bit of the register is replicated into the other bits...
uint64_t getSize() const
getSize - Return the size in bytes of the memory reference.
const TargetLowering & getTargetLoweringInfo() const
void ReplaceAllUsesOfValueWith(SDValue From, SDValue To)
Replace any uses of From with To, leaving uses of other values produced by From.Val alone...
unsigned countLeadingZeros() const
The APInt version of the countLeadingZeros functions in MathExtras.h.
Primary interface to the complete machine description for the target machine.
void add(SDDbgValue *V, const SDNode *Node, bool isParameter)
SDValue getSignExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT)
Return an operation which will sign extend the low lanes of the operand into the specified vector typ...
FoldingSetNodeIDRef Intern(BumpPtrAllocator &Allocator) const
Intern - Copy this node's data to a memory region allocated from the given allocator and return a Fol...
SDValue getSrcValue(const Value *v)
Construct a node to track a Value* through the backend.
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
StringRef - Represent a constant reference to a string, i.e.
APInt LLVM_ATTRIBUTE_UNUSED_RESULT zext(unsigned width) const
Zero extend to a new width.
SetCC operator - This evaluates to a true value iff the condition is true.
ManagedStatic - This transparently changes the behavior of global statics to be lazily constructed on...
SDValue getConstantFP(double Val, SDLoc DL, EVT VT, bool isTarget=false)
SDValue getSetCC(SDLoc DL, EVT VT, SDValue LHS, SDValue RHS, ISD::CondCode Cond)
Helper function to make it easier to build SetCC's if you just have an ISD::CondCode instead of an SD...
MERGE_VALUES - This node takes multiple discrete operands and returns them all as its individual resu...
static bool isVolatile(Instruction *Inst)
BooleanContent
Enum that describes how the target represents true/false values.
static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC)
AddNodeIDOpcode - Add the node opcode to the NodeID data.
static APInt getNullValue(unsigned numBits)
Get the '0' value.
static ManagedStatic< EVTArray > SimpleVTArray
SDValue getEntryNode() const
Return the token chain corresponding to the entry of the function.
OUTCHAIN = ATOMIC_STORE(INCHAIN, ptr, val) This corresponds to "store atomic" instruction.
MDNode * getVariable() const
bool SignBitIsZero(SDValue Op, unsigned Depth=0) const
Return true if the sign bit of Op is known to be zero.
bool isOperandOf(const SDNode *N) const
Return true if this node is an operand of N.
cmpResult
IEEE-754R 5.11: Floating Point Comparison Relations.
TRUNCATE - Completely drop the high bits.
EVT getShiftAmountTy(EVT LHSTy, const DataLayout &DL) const
bool isTargetMemoryOpcode() const
Test if this node has a target-specific memory-referencing opcode (in the <target>ISD namespace and g...
unsigned getAlignment() const
void TransferDbgValues(SDValue From, SDValue To)
Transfer SDDbgValues.
virtual SDValue EmitTargetCodeForMemmove(SelectionDAG &DAG, SDLoc dl, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, unsigned Align, bool isVolatile, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const
EmitTargetCodeForMemmove - Emit target-specific code that performs a memmove.
bool isCondCodeLegal(ISD::CondCode CC, MVT VT) const
Return true if the specified condition code is legal on this target.
void erase(const SDNode *Node)
Invalidate all DbgValues attached to the node and remove it from the Node-to-DbgValues map...
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation...
MVT getSimpleValueType(unsigned ResNo) const
Return the type of a specified result as a simple type.
SDDbgValue - Holds the information from a dbg_value node through SDISel.
FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW, FLOG, FLOG2, FLOG10, FEXP, FEXP2, FCEIL, FTRUNC, FRINT, FNEARBYINT, FROUND, FFLOOR - Perform various unary floating point operations.
void setObjectAlignment(int ObjectIdx, unsigned Align)
setObjectAlignment - Change the alignment of the specified stack object.
static EVT getIntegerVT(LLVMContext &Context, unsigned BitWidth)
getIntegerVT - Returns the EVT that represents an integer with the given number of bits...
bool ule(const APInt &RHS) const
Unsigned less or equal comparison.
static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N)
If this is an SDNode with special info, add this info to the NodeID data.
SDValue getAtomicCmpSwap(unsigned Opcode, SDLoc dl, EVT MemVT, SDVTList VTs, SDValue Chain, SDValue Ptr, SDValue Cmp, SDValue Swp, MachinePointerInfo PtrInfo, unsigned Alignment, AtomicOrdering SuccessOrdering, AtomicOrdering FailureOrdering, SynchronizationScope SynchScope)
Gets a node for an atomic cmpxchg op.
static IntegerType * getInt8Ty(LLVMContext &C)
Val, OUTCHAIN = ATOMIC_LOAD(INCHAIN, ptr) This corresponds to "load atomic" instruction.
opStatus subtract(const APFloat &, roundingMode)
int64_t getObjectSize(int ObjectIdx) const
Return the size of the specified object.
SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a scalar value into element 0 of the...
static bool isSplatMask(const int *Mask, EVT VT)
unsigned getResNo() const
Convenience function for get().getResNo().
MVT getSimpleVT() const
getSimpleVT - Return the SimpleValueType held in the specified simple EVT.
SDValue getIntPtrConstant(uint64_t Val, SDLoc DL, bool isTarget=false)
SDValue getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList, ArrayRef< SDValue > Ops, EVT MemVT, MachinePointerInfo PtrInfo, unsigned Align=0, bool Vol=false, bool ReadMem=true, bool WriteMem=true, unsigned Size=0)
Creates a MemIntrinsicNode that may produce a result and takes a list of operands.
bool isMachineOpcode() const
Test if this node has a post-isel opcode, directly corresponding to a MachineInstr opcode...
This file describes how to lower LLVM code to machine code.
unsigned char getTargetFlags() const
bool empty() const
empty - Check if the string is empty.
unsigned getOrder() const
uint64_t getZExtValue() const
MemIndexedMode
MemIndexedMode enum - This enum defines the load / store indexed addressing modes.
MULHU/MULHS - Multiply high - Multiply two integers of type iN, producing an unsigned/signed value of...
static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs)
makeVTList - Return an instance of the SDVTList struct initialized with the specified members...
unsigned getVectorNumElements() const
getVectorNumElements - Given a vector type, return the number of elements it contains.
SRCVALUE - This is a node type that holds a Value* that is used to make reference to a value in the L...
This class is used to represent ISD::LOAD nodes.