14 #ifndef LLVM_LIB_TARGET_MIPS_MIPS16INSTRINFO_H
15 #define LLVM_LIB_TARGET_MIPS_MIPS16INSTRINFO_H
44 int &FrameIndex)
const override;
48 unsigned DestReg,
unsigned SrcReg,
49 bool KillSrc)
const override;
53 unsigned SrcReg,
bool isKill,
int FrameIndex,
56 int64_t Offset)
const override;
60 unsigned DestReg,
int FrameIndex,
63 int64_t Offset)
const override;
89 unsigned &NewImm)
const;
94 return ((offset & 7) == 0) && isInt<11>(offset);
109 unsigned getAnalyzableBrOpc(
unsigned Opc)
const override;
117 unsigned Reg1,
unsigned Reg2)
const;
120 void adjustStackPtrBigUnrestricted(
unsigned SP, int64_t Amount,
Describe properties that are true of each instruction in the target description file.
void makeFrame(unsigned SP, int64_t FrameSize, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const
unsigned loadImmediate(unsigned FrameReg, int64_t Imm, MachineBasicBlock &MBB, MachineBasicBlock::iterator II, DebugLoc DL, unsigned &NewImm) const
Emit a series of instructions to load an immediate.
const MCInstrDesc & AddiuSpImm(int64_t Imm) const
Reg
All possible values of the reg field in the ModR/M byte.
bool expandPostRAPseudo(MachineBasicBlock::iterator MI) const override
static bool validImmediate(unsigned Opcode, unsigned Reg, int64_t Amount)
unsigned isStoreToStackSlot(const MachineInstr *MI, int &FrameIndex) const override
isStoreToStackSlot - If the specified machine instruction is a direct store to a stack slot...
void BuildAddiuSpImm(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, int64_t Imm) const
void adjustStackPtr(unsigned SP, int64_t Amount, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const override
Adjust SP by Amount bytes.
void restoreFrame(unsigned SP, int64_t FrameSize, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const
This class is intended to be used as a base class for asm properties and features specific to the tar...
bundle_iterator< MachineInstr, instr_iterator > iterator
bundle_iterator - MachineBasicBlock iterator that automatically skips over MIs that are inside bundle...
void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const override
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
static bool validSpImm8(int offset)
const MipsRegisterInfo & getRegisterInfo() const override
getRegisterInfo - TargetInstrInfo is a superset of MRegister info.
unsigned getInlineAsmLength(const char *Str, const MCAsmInfo &MAI) const override
Measure the specified inline asm to determine an approximation of its length.
Representation of each machine instruction.
void loadRegFromStack(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, int64_t Offset) const override
Mips16InstrInfo(const MipsSubtarget &STI)
void storeRegToStack(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, int64_t Offset) const override
unsigned isLoadFromStackSlot(const MachineInstr *MI, int &FrameIndex) const override
isLoadFromStackSlot - If the specified machine instruction is a direct load from a stack slot...
unsigned getOppositeBranchOpc(unsigned Opc) const override
GetOppositeBranchOpc - Return the inverse of the specified opcode, e.g.