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LLVM
3.7.0
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#include <XCoreInstrInfo.h>
Public Member Functions | |
| XCoreInstrInfo () | |
| const TargetRegisterInfo & | getRegisterInfo () const |
| getRegisterInfo - TargetInstrInfo is a superset of MRegister info. More... | |
| unsigned | isLoadFromStackSlot (const MachineInstr *MI, int &FrameIndex) const override |
| isLoadFromStackSlot - If the specified machine instruction is a direct load from a stack slot, return the virtual or physical register number of the destination along with the FrameIndex of the loaded stack slot. More... | |
| unsigned | isStoreToStackSlot (const MachineInstr *MI, int &FrameIndex) const override |
| isStoreToStackSlot - If the specified machine instruction is a direct store to a stack slot, return the virtual or physical register number of the source reg along with the FrameIndex of the loaded stack slot. More... | |
| bool | AnalyzeBranch (MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const override |
| AnalyzeBranch - Analyze the branching code at the end of MBB, returning true if it cannot be understood (e.g. More... | |
| unsigned | InsertBranch (MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, DebugLoc DL) const override |
| unsigned | RemoveBranch (MachineBasicBlock &MBB) const override |
| void | copyPhysReg (MachineBasicBlock &MBB, MachineBasicBlock::iterator I, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const override |
| void | storeRegToStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override |
| void | loadRegFromStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override |
| bool | ReverseBranchCondition (SmallVectorImpl< MachineOperand > &Cond) const override |
| ReverseBranchCondition - Return the inverse opcode of the specified Branch instruction. More... | |
| MachineBasicBlock::iterator | loadImmediate (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned Reg, uint64_t Value) const |
Definition at line 25 of file XCoreInstrInfo.h.
| XCoreInstrInfo::XCoreInstrInfo | ( | ) |
Definition at line 49 of file XCoreInstrInfo.cpp.
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AnalyzeBranch - Analyze the branching code at the end of MBB, returning true if it cannot be understood (e.g.
it's a switch dispatch or isn't implemented for a target). Upon success, this returns false and returns with the following information in various cases:
Note that RemoveBranch and InsertBranch must be implemented to support cases where this method returns success.
Definition at line 194 of file XCoreInstrInfo.cpp.
References llvm::MachineBasicBlock::begin(), llvm::XCore::COND_INVALID, llvm::MachineOperand::CreateImm(), llvm::MachineBasicBlock::end(), llvm::MachineInstr::eraseFromParent(), GetCondFromBranchOpc(), llvm::MachineBasicBlock::getLastNonDebugInstr(), llvm::MachineOperand::getMBB(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), I, IsBR_JT(), IsBRU(), and llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back().
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Definition at line 332 of file XCoreInstrInfo.cpp.
References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::getKillRegState(), and llvm_unreachable.
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getRegisterInfo - TargetInstrInfo is a superset of MRegister info.
As such, whenever a client has an instance of instruction info, it should always be able to get register info as well (through this method).
Definition at line 35 of file XCoreInstrInfo.h.
Referenced by llvm::XCoreSubtarget::getRegisterInfo().
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Definition at line 277 of file XCoreInstrInfo.cpp.
References llvm::MachineInstrBuilder::addMBB(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::ArrayRef< T >::empty(), GetCondBranchFromCond(), getReg(), and llvm::ArrayRef< T >::size().
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isLoadFromStackSlot - If the specified machine instruction is a direct load from a stack slot, return the virtual or physical register number of the destination along with the FrameIndex of the loaded stack slot.
If not, return 0. This predicate must return 0 if the instruction has any side effects other than loading from the stack slot.
Definition at line 64 of file XCoreInstrInfo.cpp.
References llvm::MachineOperand::getIndex(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isFI(), llvm::MachineOperand::isImm(), and isZeroImm().
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isStoreToStackSlot - If the specified machine instruction is a direct store to a stack slot, return the virtual or physical register number of the source reg along with the FrameIndex of the loaded stack slot.
If not, return 0. This predicate must return 0 if the instruction has any side effects other than storing to the stack slot.
Definition at line 85 of file XCoreInstrInfo.cpp.
References llvm::MachineOperand::getIndex(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isFI(), llvm::MachineOperand::isImm(), and isZeroImm().
| MachineBasicBlock::iterator XCoreInstrInfo::loadImmediate | ( | MachineBasicBlock & | MBB, |
| MachineBasicBlock::iterator | MI, | ||
| unsigned | Reg, | ||
| uint64_t | Value | ||
| ) | const |
Definition at line 431 of file XCoreInstrInfo.cpp.
References llvm::MachineInstrBuilder::addConstantPoolIndex(), llvm::MachineInstrBuilder::addImm(), llvm::BuildMI(), llvm::C, llvm::MachineBasicBlock::end(), llvm::ConstantInt::get(), llvm::MachineFunction::getConstantPool(), llvm::MachineConstantPool::getConstantPoolIndex(), llvm::Function::getContext(), llvm::MachineFunction::getFunction(), llvm::MachineInstrBuilder::getInstr(), llvm::Type::getInt32Ty(), llvm::MachineBasicBlock::getParent(), isImmMskBitp(), isImmU16(), isImmU6(), llvm::Log2_32(), and N.
Referenced by InsertFPConstInst(), and InsertSPConstInst().
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Definition at line 383 of file XCoreInstrInfo.cpp.
References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMemOperand(), llvm::BuildMI(), llvm::DL, llvm::MachineBasicBlock::end(), llvm::MachinePointerInfo::getFixedStack(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getMachineMemOperand(), llvm::MachineFrameInfo::getObjectAlignment(), llvm::MachineFrameInfo::getObjectSize(), llvm::MachineBasicBlock::getParent(), and llvm::MachineMemOperand::MOLoad.
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Definition at line 309 of file XCoreInstrInfo.cpp.
References llvm::MachineBasicBlock::begin(), llvm::MachineBasicBlock::end(), llvm::MachineBasicBlock::getLastNonDebugInstr(), I, IsBRU(), and IsCondBranch().
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ReverseBranchCondition - Return the inverse opcode of the specified Branch instruction.
Definition at line 408 of file XCoreInstrInfo.cpp.
References GetOppositeBranchCondition(), and llvm::SmallVectorTemplateCommon< T >::size().
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Definition at line 359 of file XCoreInstrInfo.cpp.
References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMemOperand(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::DL, llvm::MachineBasicBlock::end(), llvm::MachinePointerInfo::getFixedStack(), llvm::MachineFunction::getFrameInfo(), llvm::getKillRegState(), llvm::MachineFunction::getMachineMemOperand(), llvm::MachineFrameInfo::getObjectAlignment(), llvm::MachineFrameInfo::getObjectSize(), llvm::MachineBasicBlock::getParent(), and llvm::MachineMemOperand::MOStore.
1.8.6