LLVM  3.7.0
Enumerations
llvm::MachineCombinerPattern Namespace Reference

Enumeration of instruction pattern supported by machine combiner. More...

Enumerations

enum  MC_PATTERN : int {
  MC_NONE = 0, MC_MULADDW_OP1 = 1, MC_MULADDW_OP2 = 2, MC_MULSUBW_OP1 = 3,
  MC_MULSUBW_OP2 = 4, MC_MULADDWI_OP1 = 5, MC_MULSUBWI_OP1 = 6, MC_MULADDX_OP1 = 7,
  MC_MULADDX_OP2 = 8, MC_MULSUBX_OP1 = 9, MC_MULSUBX_OP2 = 10, MC_MULADDXI_OP1 = 11,
  MC_MULSUBXI_OP1 = 12, MC_REASSOC_AX_BY = 0, MC_REASSOC_AX_YB = 1, MC_REASSOC_XA_BY = 2,
  MC_REASSOC_XA_YB = 3
}
 
enum  MC_PATTERN : int {
  MC_NONE = 0, MC_MULADDW_OP1 = 1, MC_MULADDW_OP2 = 2, MC_MULSUBW_OP1 = 3,
  MC_MULSUBW_OP2 = 4, MC_MULADDWI_OP1 = 5, MC_MULSUBWI_OP1 = 6, MC_MULADDX_OP1 = 7,
  MC_MULADDX_OP2 = 8, MC_MULSUBX_OP1 = 9, MC_MULSUBX_OP2 = 10, MC_MULADDXI_OP1 = 11,
  MC_MULSUBXI_OP1 = 12, MC_REASSOC_AX_BY = 0, MC_REASSOC_AX_YB = 1, MC_REASSOC_XA_BY = 2,
  MC_REASSOC_XA_YB = 3
}
 

Detailed Description

Enumeration of instruction pattern supported by machine combiner.

Enumeration Type Documentation

Enumerator
MC_NONE 
MC_MULADDW_OP1 
MC_MULADDW_OP2 
MC_MULSUBW_OP1 
MC_MULSUBW_OP2 
MC_MULADDWI_OP1 
MC_MULSUBWI_OP1 
MC_MULADDX_OP1 
MC_MULADDX_OP2 
MC_MULSUBX_OP1 
MC_MULSUBX_OP2 
MC_MULADDXI_OP1 
MC_MULSUBXI_OP1 
MC_REASSOC_AX_BY 
MC_REASSOC_AX_YB 
MC_REASSOC_XA_BY 
MC_REASSOC_XA_YB 

Definition at line 24 of file AArch64MachineCombinerPattern.h.

Enumerator
MC_NONE 
MC_MULADDW_OP1 
MC_MULADDW_OP2 
MC_MULSUBW_OP1 
MC_MULSUBW_OP2 
MC_MULADDWI_OP1 
MC_MULSUBWI_OP1 
MC_MULADDX_OP1 
MC_MULADDX_OP2 
MC_MULSUBX_OP1 
MC_MULSUBX_OP2 
MC_MULADDXI_OP1 
MC_MULSUBXI_OP1 
MC_REASSOC_AX_BY 
MC_REASSOC_AX_YB 
MC_REASSOC_XA_BY 
MC_REASSOC_XA_YB 

Definition at line 30 of file X86InstrInfo.h.