LLVM  3.7.0
RegisterScavenging.h
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1 //===-- RegisterScavenging.h - Machine register scavenging ------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file declares the machine register scavenger class. It can provide
11 // information such as unused register at any point in a machine basic block.
12 // It also provides a mechanism to make registers available by evicting them
13 // to spill slots.
14 //
15 //===----------------------------------------------------------------------===//
16 
17 #ifndef LLVM_CODEGEN_REGISTERSCAVENGING_H
18 #define LLVM_CODEGEN_REGISTERSCAVENGING_H
19 
20 #include "llvm/ADT/BitVector.h"
23 
24 namespace llvm {
25 
26 class MachineRegisterInfo;
27 class TargetRegisterInfo;
28 class TargetInstrInfo;
29 class TargetRegisterClass;
30 
31 class RegScavenger {
32  const TargetRegisterInfo *TRI;
33  const TargetInstrInfo *TII;
35  MachineBasicBlock *MBB;
37  unsigned NumRegUnits;
38 
39  /// True if RegScavenger is currently tracking the liveness of registers.
40  bool Tracking;
41 
42  /// Information on scavenged registers (held in a spill slot).
43  struct ScavengedInfo {
44  ScavengedInfo(int FI = -1) : FrameIndex(FI), Reg(0), Restore(nullptr) {}
45 
46  /// A spill slot used for scavenging a register post register allocation.
47  int FrameIndex;
48 
49  /// If non-zero, the specific register is currently being
50  /// scavenged. That is, it is spilled to this scavenging stack slot.
51  unsigned Reg;
52 
53  /// The instruction that restores the scavenged register from stack.
54  const MachineInstr *Restore;
55  };
56 
57  /// A vector of information on scavenged registers.
59 
60  /// The current state of each reg unit immediately before MBBI.
61  /// One bit per register unit. If bit is not set it means any
62  /// register containing that register unit is currently being used.
63  BitVector RegUnitsAvailable;
64 
65  // These BitVectors are only used internally to forward(). They are members
66  // to avoid frequent reallocations.
67  BitVector KillRegUnits, DefRegUnits;
68  BitVector TmpRegUnits;
69 
70 public:
72  : MBB(nullptr), NumRegUnits(0), Tracking(false) {}
73 
74  /// Start tracking liveness from the begin of the specific basic block.
76 
77  /// Allow resetting register state info for multiple
78  /// passes over/within the same function.
79  void initRegState();
80 
81  /// Move the internal MBB iterator and update register states.
82  void forward();
83 
84  /// Move the internal MBB iterator and update register states until
85  /// it has processed the specific iterator.
87  if (!Tracking && MBB->begin() != I) forward();
88  while (MBBI != I) forward();
89  }
90 
91  /// Invert the behavior of forward() on the current instruction (undo the
92  /// changes to the available registers made by forward()).
93  void unprocess();
94 
95  /// Unprocess instructions until you reach the provided iterator.
97  while (MBBI != I) unprocess();
98  }
99 
100  /// Move the internal MBB iterator but do not update register states.
102  if (I == MachineBasicBlock::iterator(nullptr))
103  Tracking = false;
104  MBBI = I;
105  }
106 
108  return MBBI;
109  }
110 
111  /// Return if a specific register is currently used.
112  bool isRegUsed(unsigned Reg, bool includeReserved = true) const;
113 
114  /// Return all available registers in the register class in Mask.
116 
117  /// Find an unused register of the specified register class.
118  /// Return 0 if none is found.
119  unsigned FindUnusedReg(const TargetRegisterClass *RegClass) const;
120 
121  /// Add a scavenging frame index.
122  void addScavengingFrameIndex(int FI) {
123  Scavenged.push_back(ScavengedInfo(FI));
124  }
125 
126  /// Query whether a frame index is a scavenging frame index.
127  bool isScavengingFrameIndex(int FI) const {
129  IE = Scavenged.end(); I != IE; ++I)
130  if (I->FrameIndex == FI)
131  return true;
132 
133  return false;
134  }
135 
136  /// Get an array of scavenging frame indices.
139  IE = Scavenged.end(); I != IE; ++I)
140  if (I->FrameIndex >= 0)
141  A.push_back(I->FrameIndex);
142  }
143 
144  /// Make a register of the specific register class
145  /// available and do the appropriate bookkeeping. SPAdj is the stack
146  /// adjustment due to call frame, it's passed along to eliminateFrameIndex().
147  /// Returns the scavenged register.
148  unsigned scavengeRegister(const TargetRegisterClass *RegClass,
149  MachineBasicBlock::iterator I, int SPAdj);
150  unsigned scavengeRegister(const TargetRegisterClass *RegClass, int SPAdj) {
151  return scavengeRegister(RegClass, MBBI, SPAdj);
152  }
153 
154  /// Tell the scavenger a register is used.
155  void setRegUsed(unsigned Reg);
156 private:
157  /// Returns true if a register is reserved. It is never "unused".
158  bool isReserved(unsigned Reg) const { return MRI->isReserved(Reg); }
159 
160  /// setUsed / setUnused - Mark the state of one or a number of register units.
161  ///
162  void setUsed(BitVector &RegUnits) {
163  RegUnitsAvailable.reset(RegUnits);
164  }
165  void setUnused(BitVector &RegUnits) {
166  RegUnitsAvailable |= RegUnits;
167  }
168 
169  /// Processes the current instruction and fill the KillRegUnits and
170  /// DefRegUnits bit vectors.
171  void determineKillsAndDefs();
172 
173  /// Add all Reg Units that Reg contains to BV.
174  void addRegUnits(BitVector &BV, unsigned Reg);
175 
176  /// Return the candidate register that is unused for the longest after
177  /// StartMI. UseMI is set to the instruction where the search stopped.
178  ///
179  /// No more than InstrLimit instructions are inspected.
180  unsigned findSurvivorReg(MachineBasicBlock::iterator StartMI,
181  BitVector &Candidates,
182  unsigned InstrLimit,
184 
185 };
186 
187 } // End llvm namespace
188 
189 #endif
void push_back(const T &Elt)
Definition: SmallVector.h:222
void skipTo(MachineBasicBlock::iterator I)
Move the internal MBB iterator but do not update register states.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APInt.h:33
Reg
All possible values of the reg field in the ModR/M byte.
#define false
Definition: ConvertUTF.c:65
MachineBasicBlock::iterator getCurrentPosition() const
void forward()
Move the internal MBB iterator and update register states.
BitVector getRegsAvailable(const TargetRegisterClass *RC)
Return all available registers in the register class in Mask.
void unprocess(MachineBasicBlock::iterator I)
Unprocess instructions until you reach the provided iterator.
void enterBasicBlock(MachineBasicBlock *mbb)
Start tracking liveness from the begin of the specific basic block.
TargetInstrInfo - Interface to description of machine instruction set.
bundle_iterator< MachineInstr, instr_iterator > iterator
bool isReserved(unsigned PhysReg) const
isReserved - Returns true when PhysReg is a reserved register.
bundle_iterator - MachineBasicBlock iterator that automatically skips over MIs that are inside bundle...
void unprocess()
Invert the behavior of forward() on the current instruction (undo the changes to the available regist...
void forward(MachineBasicBlock::iterator I)
Move the internal MBB iterator and update register states until it has processed the specific iterato...
BitVector & reset()
Definition: BitVector.h:259
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
void getScavengingFrameIndices(SmallVectorImpl< int > &A) const
Get an array of scavenging frame indices.
bool isScavengingFrameIndex(int FI) const
Query whether a frame index is a scavenging frame index.
void addScavengingFrameIndex(int FI)
Add a scavenging frame index.
bool isRegUsed(unsigned Reg, bool includeReserved=true) const
Return if a specific register is currently used.
void setRegUsed(unsigned Reg)
Tell the scavenger a register is used.
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
Representation of each machine instruction.
Definition: MachineInstr.h:51
unsigned FindUnusedReg(const TargetRegisterClass *RegClass) const
Find an unused register of the specified register class.
#define I(x, y, z)
Definition: MD5.cpp:54
unsigned scavengeRegister(const TargetRegisterClass *RegClass, int SPAdj)
void initRegState()
Allow resetting register state info for multiple passes over/within the same function.
unsigned scavengeRegister(const TargetRegisterClass *RegClass, MachineBasicBlock::iterator I, int SPAdj)
Make a register of the specific register class available and do the appropriate bookkeeping.