LLVM  3.7.0
AMDGPURegisterInfo.cpp
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1 //===-- AMDGPURegisterInfo.cpp - AMDGPU Register Information -------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 /// \file
11 /// \brief Parent TargetRegisterInfo class common to all hw codegen targets.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #include "AMDGPURegisterInfo.h"
16 #include "AMDGPUTargetMachine.h"
17 
18 using namespace llvm;
19 
21 
22 //===----------------------------------------------------------------------===//
23 // Function handling callbacks - Functions are a seldom used feature of GPUS, so
24 // they are not supported at this time.
25 //===----------------------------------------------------------------------===//
26 
27 const MCPhysReg AMDGPURegisterInfo::CalleeSavedReg = AMDGPU::NoRegister;
28 
29 const MCPhysReg*
31  return &CalleeSavedReg;
32 }
33 
35  int SPAdj,
36  unsigned FIOperandNum,
37  RegScavenger *RS) const {
38  llvm_unreachable("Subroutines not supported yet");
39 }
40 
42  return AMDGPU::NoRegister;
43 }
44 
45 unsigned AMDGPURegisterInfo::getSubRegFromChannel(unsigned Channel) const {
46  static const unsigned SubRegs[] = {
47  AMDGPU::sub0, AMDGPU::sub1, AMDGPU::sub2, AMDGPU::sub3, AMDGPU::sub4,
48  AMDGPU::sub5, AMDGPU::sub6, AMDGPU::sub7, AMDGPU::sub8, AMDGPU::sub9,
49  AMDGPU::sub10, AMDGPU::sub11, AMDGPU::sub12, AMDGPU::sub13, AMDGPU::sub14,
50  AMDGPU::sub15
51  };
52 
53  assert(Channel < array_lengthof(SubRegs));
54  return SubRegs[Channel];
55 }
56 
57 unsigned AMDGPURegisterInfo::getIndirectSubReg(unsigned IndirectIndex) const {
58 
59  return getSubRegFromChannel(IndirectIndex);
60 }
61 
62 #define GET_REGINFO_TARGET_DESC
63 #include "AMDGPUGenRegisterInfo.inc"
unsigned getIndirectSubReg(unsigned IndirectIndex) const
const MCPhysReg * getCalleeSavedRegs(const MachineFunction *MF) const override
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:98
TargetRegisterInfo interface that is implemented by all hw codegen targets.
LLVM_CONSTEXPR size_t array_lengthof(T(&)[N])
Find the length of an array.
Definition: STLExtras.h:247
bundle_iterator< MachineInstr, instr_iterator > iterator
unsigned getSubRegFromChannel(unsigned Channel) const
The AMDGPU TargetMachine interface definition for hw codgen targets.
static const MCPhysReg CalleeSavedReg
void eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj, unsigned FIOperandNum, RegScavenger *RS) const override
unsigned getFrameRegister(const MachineFunction &MF) const override