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LLVM
3.7.0
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#include "llvm/MC/MCDisassembler.h"#include "MCTargetDesc/ARMAddressingModes.h"#include "MCTargetDesc/ARMBaseInfo.h"#include "MCTargetDesc/ARMMCExpr.h"#include "llvm/MC/MCContext.h"#include "llvm/MC/MCExpr.h"#include "llvm/MC/MCFixedLenDisassembler.h"#include "llvm/MC/MCInst.h"#include "llvm/MC/MCInstrDesc.h"#include "llvm/MC/MCSubtargetInfo.h"#include "llvm/Support/Debug.h"#include "llvm/Support/ErrorHandling.h"#include "llvm/Support/LEB128.h"#include "llvm/Support/TargetRegistry.h"#include "llvm/Support/raw_ostream.h"#include <vector>#include "ARMGenDisassemblerTables.inc"Go to the source code of this file.
Namespaces | |
| llvm | |
| Compute iterated dominance frontiers using a linear time algorithm. | |
Macros | |
| #define | DEBUG_TYPE "arm-disassembler" |
Typedefs | |
| typedef MCDisassembler::DecodeStatus | DecodeStatus |
Functions | |
| static bool | Check (DecodeStatus &Out, DecodeStatus In) |
| static DecodeStatus | DecodeGPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeGPRnopcRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeGPRwithAPSRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodetGPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodetcGPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecoderGPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeGPRPairRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeSPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeDPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeDPR_8RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeDPR_VFP2RegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeQPRRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeDPairRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeDPairSpacedRegisterClass (MCInst &Inst, unsigned RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodePredicateOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeCCOutOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeRegListOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeSPRRegListOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeDPRRegListOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeBitfieldMaskOperand (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeCopMemInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeAddrMode2IdxInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeSORegMemOperand (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeAddrMode3Instruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeSORegImmOperand (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeSORegRegOperand (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMemMultipleWritebackInstruction (MCInst &Inst, unsigned Insn, uint64_t Adddress, const void *Decoder) |
| static DecodeStatus | DecodeT2MOVTWInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeArmMOVTWInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeSMLAInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeCPSInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeTSTInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeSETPANInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeT2CPSInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeAddrModeImm12Operand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeAddrMode5Operand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeAddrMode7Operand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeT2BInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeBranchImmInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeAddrMode6Operand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeVLDST1Instruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeVLDST2Instruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeVLDST3Instruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeVLDST4Instruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeVLDInstruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeVSTInstruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeVLD1DupInstruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeVLD2DupInstruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeVLD3DupInstruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeVLD4DupInstruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeNEONModImmInstruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeVSHLMaxInstruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeShiftRight8Imm (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeShiftRight16Imm (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeShiftRight32Imm (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeShiftRight64Imm (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeTBLInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodePostIdxReg (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeCoprocessor (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMemBarrierOption (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeInstSyncBarrierOption (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMSRMask (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeBankedReg (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeDoubleRegLoad (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeDoubleRegStore (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeLDRPreImm (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeLDRPreReg (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeSTRPreImm (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeSTRPreReg (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeVLD1LN (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeVLD2LN (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeVLD3LN (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeVLD4LN (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeVST1LN (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeVST2LN (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeVST3LN (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeVST4LN (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeVMOVSRR (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeVMOVRRS (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeSwap (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeVCVTD (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeVCVTQ (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeThumbAddSpecialReg (MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeThumbBROperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeT2BROperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeThumbCmpBROperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeThumbAddrModeRR (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeThumbAddrModeIS (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeThumbAddrModePC (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeThumbAddrModeSP (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeT2AddrModeSOReg (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeT2LoadShift (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeT2LoadImm8 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeT2LoadImm12 (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeT2LoadT (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeT2LoadLabel (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeT2Imm8S4 (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeT2AddrModeImm8s4 (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeT2AddrModeImm0_1020s4 (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeT2Imm8 (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeT2AddrModeImm8 (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeThumbAddSPImm (MCInst &Inst, uint16_t Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeThumbAddSPReg (MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeThumbCPS (MCInst &Inst, uint16_t Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeQADDInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeThumbBLXOffset (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeT2AddrModeImm12 (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeThumbTableBranch (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeThumb2BCCInstruction (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeT2SOImm (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeThumbBCCTargetOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeThumbBLTargetOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeIT (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeT2LDRDPreInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeT2STRDPreInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeT2Adr (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeT2LdStPre (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeT2ShifterImmOperand (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeLDR (MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeMRRC2 (llvm::MCInst &Inst, unsigned Val, uint64_t Address, const void *Decoder) |
| static MCDisassembler * | createARMDisassembler (const Target &T, const MCSubtargetInfo &STI, MCContext &Ctx) |
| static MCDisassembler * | createThumbDisassembler (const Target &T, const MCSubtargetInfo &STI, MCContext &Ctx) |
| static DecodeStatus | checkDecodedInstruction (MCInst &MI, uint64_t &Size, uint64_t Address, raw_ostream &OS, raw_ostream &CS, uint32_t Insn, DecodeStatus Result) |
| static bool | tryAddingSymbolicOperand (uint64_t Address, int32_t Value, bool isBranch, uint64_t InstSize, MCInst &MI, const void *Decoder) |
| tryAddingSymbolicOperand - trys to add a symbolic operand in place of the immediate Value in the MCInst. More... | |
| static void | tryAddingPcLoadReferenceComment (uint64_t Address, int Value, const void *Decoder) |
| tryAddingPcLoadReferenceComment - trys to add a comment as to what is being referenced by a load instruction with the base register that is the Pc. More... | |
| static void | AddThumb1SBit (MCInst &MI, bool InITBlock) |
| void | LLVMInitializeARMDisassembler () |
| static DecodeStatus | DecodeRFEInstruction (MCInst &Inst, unsigned Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeT2Adr (MCInst &Inst, uint32_t Insn, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeT2ShifterImmOperand (MCInst &Inst, uint32_t Val, uint64_t Address, const void *Decoder) |
Variables | |
| const MCInstrDesc | llvm::ARMInsts [] |
| static const uint16_t | GPRDecoderTable [] |
| static const uint16_t | GPRPairDecoderTable [] |
| static const uint16_t | SPRDecoderTable [] |
| static const uint16_t | DPRDecoderTable [] |
| static const uint16_t | QPRDecoderTable [] |
| static const uint16_t | DPairDecoderTable [] |
| static const uint16_t | DPairSpacedDecoderTable [] |
| #define DEBUG_TYPE "arm-disassembler" |
Definition at line 29 of file ARMDisassembler.cpp.
Definition at line 31 of file ARMDisassembler.cpp.
Definition at line 577 of file ARMDisassembler.cpp.
References llvm::ARMInsts, llvm::MCInst::begin(), llvm::MCOperand::createReg(), llvm::MCInst::end(), llvm::MCInst::getOpcode(), I, llvm::MCInst::insert(), llvm::MCInstrDesc::NumOperands, llvm::MCInstrDesc::OpInfo, and llvm::MCOperandInfo::RegClass.
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Definition at line 123 of file ARMDisassembler.cpp.
References llvm::MCDisassembler::Fail, llvm::tgtok::In, llvm_unreachable, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 411 of file ARMDisassembler.cpp.
References llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), and llvm::MCDisassembler::SoftFail.
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Definition at line 398 of file ARMDisassembler.cpp.
Referenced by LLVMInitializeARMDisassembler().
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Definition at line 404 of file ARMDisassembler.cpp.
Referenced by LLVMInitializeARMDisassembler().
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Definition at line 1476 of file ARMDisassembler.cpp.
References llvm::ARM_AM::add, llvm::MCInst::addOperand(), llvm::ARM_AM::asr, llvm::Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeGPRnopcRegisterClass(), DecodeGPRRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, llvm::ARM_AM::getAM2Opc(), llvm::MCInst::getOpcode(), llvm::ARMII::IndexModePost, llvm::ARMII::IndexModePre, llvm::ARM_AM::lsl, llvm::ARM_AM::lsr, P, pred, llvm::ARM_AM::ror, llvm::ARM_AM::rrx, llvm::MCDisassembler::SoftFail, llvm::ARM_AM::sub, and llvm::MCDisassembler::Success.
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Definition at line 1625 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeGPRRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::ARMII::IndexModePost, llvm::ARMII::IndexModePre, P, pred, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 2196 of file ARMDisassembler.cpp.
References llvm::ARM_AM::add, llvm::MCInst::addOperand(), llvm::Check(), llvm::MCOperand::createImm(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::ARM_AM::getAM5Opc(), llvm::ARM_AM::sub, and llvm::MCDisassembler::Success.
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Definition at line 2274 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Check(), llvm::MCOperand::createImm(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
Referenced by DecodeVLDInstruction(), and DecodeVSTInstruction().
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Definition at line 2215 of file ARMDisassembler.cpp.
References DecodeGPRRegisterClass().
Referenced by DecodeLDR().
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Definition at line 2176 of file ARMDisassembler.cpp.
References add(), llvm::MCInst::addOperand(), llvm::Check(), llvm::MCOperand::createImm(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCDisassembler::Success, and tryAddingPcLoadReferenceComment().
Referenced by DecodeLDRPreImm(), and DecodeSTRPreImm().
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Definition at line 2072 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Check(), llvm::MCOperand::createImm(), DecodeGPRnopcRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), pred, llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
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Definition at line 4147 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 1299 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Check(), llvm::MCOperand::createImm(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 2248 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Check(), llvm::MCOperand::createImm(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, pred, llvm::MCInst::setOpcode(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
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Definition at line 1132 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), and llvm::MCDisassembler::Success.
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Definition at line 1326 of file ARMDisassembler.cpp.
References llvm::ARM_AM::add, llvm::MCInst::addOperand(), llvm::Check(), llvm::MCOperand::createImm(), DecodeGPRRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, llvm::ARM_AM::getAM5Opc(), llvm::MCInst::getOpcode(), pred, llvm::ARM_AM::sub, and llvm::MCDisassembler::Success.
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Definition at line 3929 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 1959 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, llvm::MCInst::setOpcode(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by DecodeQADDInstruction(), DecodeSMLAInstruction(), and DecodeSwap().
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Definition at line 4170 of file ARMDisassembler.cpp.
References llvm::Check(), DecodeGPRPairRegisterClass(), DecodeGPRRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, pred, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 4191 of file ARMDisassembler.cpp.
References llvm::Check(), DecodeGPRnopcRegisterClass(), DecodeGPRPairRegisterClass(), DecodeGPRRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, pred, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 1085 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), DPairDecoderTable, llvm::MCDisassembler::Fail, Register, and llvm::MCDisassembler::Success.
Referenced by DecodeTBLInstruction(), DecodeVLD1DupInstruction(), DecodeVLD2DupInstruction(), DecodeVLDInstruction(), and DecodeVSTInstruction().
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Definition at line 1106 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), DPairSpacedDecoderTable, llvm::MCDisassembler::Fail, Register, and llvm::MCDisassembler::Success.
Referenced by DecodeVLD2DupInstruction(), DecodeVLDInstruction(), and DecodeVSTInstruction().
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Definition at line 1042 of file ARMDisassembler.cpp.
References DecodeDPRRegisterClass(), and llvm::MCDisassembler::Fail.
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Definition at line 1050 of file ARMDisassembler.cpp.
References DecodeDPRRegisterClass(), and llvm::MCDisassembler::Fail.
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Definition at line 1027 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), DPRDecoderTable, llvm::MCDisassembler::Fail, Register, and llvm::MCDisassembler::Success.
Referenced by DecodeDPR_8RegisterClass(), DecodeDPR_VFP2RegisterClass(), DecodeDPRRegListOperand(), DecodeNEONModImmInstruction(), DecodeTBLInstruction(), DecodeVCVTD(), DecodeVLD1DupInstruction(), DecodeVLD1LN(), DecodeVLD2DupInstruction(), DecodeVLD2LN(), DecodeVLD3DupInstruction(), DecodeVLD3LN(), DecodeVLD4DupInstruction(), DecodeVLD4LN(), DecodeVLDInstruction(), DecodeVSHLMaxInstruction(), DecodeVST1LN(), DecodeVST2LN(), DecodeVST3LN(), DecodeVST4LN(), and DecodeVSTInstruction().
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Definition at line 1274 of file ARMDisassembler.cpp.
References llvm::Check(), DecodeDPRRegisterClass(), llvm::MCDisassembler::Fail, fuzzer::min(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 902 of file ARMDisassembler.cpp.
References llvm::Check(), DecodeGPRRegisterClass(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by DecodeAddrMode2IdxInstruction(), DecodeArmMOVTWInstruction(), DecodeDoubleRegStore(), DecodeLDR(), DecodeMRRC2(), DecodePostIdxReg(), DecodeQADDInstruction(), DecodeSMLAInstruction(), DecodeSORegRegOperand(), DecodeSwap(), and DecodeT2AddrModeImm0_1020s4().
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Definition at line 941 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, GPRPairDecoderTable, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by DecodeDoubleRegLoad(), and DecodeDoubleRegStore().
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Definition at line 891 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, GPRDecoderTable, Register, and llvm::MCDisassembler::Success.
Referenced by DecodeAddrMode2IdxInstruction(), DecodeAddrMode3Instruction(), DecodeAddrMode5Operand(), DecodeAddrMode6Operand(), DecodeAddrMode7Operand(), DecodeAddrModeImm12Operand(), DecodeCopMemInstruction(), DecodeDoubleRegLoad(), DecodeDoubleRegStore(), DecodeGPRnopcRegisterClass(), DecodeGPRwithAPSRRegisterClass(), DecodeLDRPreImm(), DecodeLDRPreReg(), DecodeMemMultipleWritebackInstruction(), DecodeRegListOperand(), DecodeRFEInstruction(), DecoderGPRRegisterClass(), DecodeSORegImmOperand(), DecodeSORegMemOperand(), DecodeSTRPreImm(), DecodeSTRPreReg(), DecodeT2AddrModeImm12(), DecodeT2AddrModeImm8(), DecodeT2AddrModeImm8s4(), DecodeT2AddrModeSOReg(), DecodeT2LdStPre(), DecodeT2LoadImm12(), DecodeT2LoadImm8(), DecodeT2LoadLabel(), DecodeT2LoadShift(), DecodetGPRRegisterClass(), DecodeThumbAddSPReg(), DecodeThumbTableBranch(), DecodeTSTInstruction(), DecodeVLD1DupInstruction(), DecodeVLD1LN(), DecodeVLD2DupInstruction(), DecodeVLD2LN(), DecodeVLD3DupInstruction(), DecodeVLD3LN(), DecodeVLD4DupInstruction(), DecodeVLD4LN(), DecodeVLDInstruction(), DecodeVMOVRRS(), DecodeVMOVSRR(), DecodeVST1LN(), DecodeVST2LN(), DecodeVST3LN(), DecodeVST4LN(), and DecodeVSTInstruction().
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Definition at line 915 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Check(), llvm::MCOperand::createReg(), DecodeGPRRegisterClass(), and llvm::MCDisassembler::Success.
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Definition at line 4075 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 4922 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, pred, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 5126 of file ARMDisassembler.cpp.
References llvm::Check(), DecodeAddrMode7Operand(), DecodeGPRnopcRegisterClass(), DecodePostIdxReg(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 4216 of file ARMDisassembler.cpp.
References llvm::Check(), DecodeAddrModeImm12Operand(), DecodeGPRRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, pred, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 4241 of file ARMDisassembler.cpp.
References llvm::Check(), DecodeGPRRegisterClass(), DecodePredicateOperand(), DecodeSORegMemOperand(), llvm::MCDisassembler::Fail, pred, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 4066 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
Referenced by DecodeThumb2BCCInstruction().
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Definition at line 1868 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Check(), llvm::MCOperand::createImm(), DecodeGPRRegisterClass(), DecodePredicateOperand(), DecodeRegListOperand(), DecodeRFEInstruction(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), pred, llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 5153 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Check(), llvm::MCOperand::createImm(), DecodeGPRnopcRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 4084 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 3070 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Check(), llvm::MCOperand::createImm(), DecodeDPRRegisterClass(), DecodeQPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), and llvm::MCDisassembler::Success.
Referenced by DecodeVCVTD(), and DecodeVCVTQ().
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Definition at line 3892 of file ARMDisassembler.cpp.
References add(), llvm::MCInst::addOperand(), llvm::Check(), llvm::MCOperand::createImm(), DecodeGPRnopcRegisterClass(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
Referenced by DecodeLDR().
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Definition at line 1118 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::ARMCC::AL, llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), and llvm::MCDisassembler::Success.
Referenced by DecodeAddrMode2IdxInstruction(), DecodeAddrMode3Instruction(), DecodeArmMOVTWInstruction(), DecodeBranchImmInstruction(), DecodeCopMemInstruction(), DecodeDoubleRegLoad(), DecodeDoubleRegStore(), DecodeLDR(), DecodeLDRPreImm(), DecodeLDRPreReg(), DecodeMemMultipleWritebackInstruction(), DecodeQADDInstruction(), DecodeSMLAInstruction(), DecodeSTRPreImm(), DecodeSTRPreReg(), DecodeSwap(), DecodeThumb2BCCInstruction(), DecodeTSTInstruction(), DecodeVMOVRRS(), and DecodeVMOVSRR().
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Definition at line 1845 of file ARMDisassembler.cpp.
References llvm::Check(), DecodeCPSInstruction(), DecodeGPRnopcRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, pred, and llvm::MCDisassembler::Success.
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Definition at line 1065 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, QPRDecoderTable, Register, and llvm::MCDisassembler::Success.
Referenced by DecodeNEONModImmInstruction(), DecodeVCVTQ(), and DecodeVSHLMaxInstruction().
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Definition at line 1213 of file ARMDisassembler.cpp.
References llvm::Check(), DecodeGPRRegisterClass(), llvm::MCInst::end(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::MCInst::getOperand(), llvm::MCOperand::getReg(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by DecodeMemMultipleWritebackInstruction().
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Definition at line 1816 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Check(), llvm::MCOperand::createImm(), llvm::ARM_AM::da, llvm::ARM_AM::db, DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::ARM_AM::ia, llvm::ARM_AM::ib, and llvm::MCDisassembler::Success.
Referenced by DecodeMemMultipleWritebackInstruction().
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Definition at line 986 of file ARMDisassembler.cpp.
References llvm::Check(), DecodeGPRRegisterClass(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by DecodeT2AddrModeSOReg(), DecodeT2LDRDPreInstruction(), DecodeT2LoadT(), DecodeT2MOVTWInstruction(), DecodeT2STRDPreInstruction(), and DecodeThumbTableBranch().
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Definition at line 2148 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, llvm::MCSubtargetInfo::getFeatureBits(), llvm::MCDisassembler::getSubtargetInfo(), llvm::MCInst::setOpcode(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
Referenced by DecodeTSTInstruction().
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Definition at line 3140 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
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Definition at line 3146 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
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Definition at line 3152 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
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Definition at line 3134 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
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Definition at line 2099 of file ARMDisassembler.cpp.
References llvm::Check(), DecodeCPSInstruction(), DecodeGPRnopcRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, pred, and llvm::MCDisassembler::Success.
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Definition at line 1141 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::ARM_AM::asr, llvm::Check(), llvm::MCOperand::createImm(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::ARM_AM::lsl, llvm::ARM_AM::lsr, llvm::ARM_AM::ror, llvm::ARM_AM::rrx, and llvm::MCDisassembler::Success.
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Definition at line 1581 of file ARMDisassembler.cpp.
References llvm::ARM_AM::add, llvm::MCInst::addOperand(), llvm::ARM_AM::asr, llvm::Check(), llvm::MCOperand::createImm(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::ARM_AM::getAM2Opc(), llvm::ARM_AM::lsl, llvm::ARM_AM::lsr, llvm::ARM_AM::ror, llvm::ARM_AM::rrx, llvm::ARM_AM::sub, and llvm::MCDisassembler::Success.
Referenced by DecodeLDRPreReg(), and DecodeSTRPreReg().
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Definition at line 1178 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::ARM_AM::asr, llvm::Check(), llvm::MCOperand::createImm(), DecodeGPRnopcRegisterClass(), llvm::MCDisassembler::Fail, llvm::ARM_AM::lsl, llvm::ARM_AM::lsr, llvm::ARM_AM::ror, and llvm::MCDisassembler::Success.
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Definition at line 1006 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, Register, SPRDecoderTable, and llvm::MCDisassembler::Success.
Referenced by DecodeSPRRegListOperand(), DecodeVMOVRRS(), and DecodeVMOVSRR().
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Definition at line 1250 of file ARMDisassembler.cpp.
References llvm::Check(), DecodeSPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 4269 of file ARMDisassembler.cpp.
References llvm::Check(), DecodeAddrModeImm12Operand(), DecodeGPRRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, pred, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 4294 of file ARMDisassembler.cpp.
References llvm::Check(), DecodeGPRRegisterClass(), DecodePredicateOperand(), DecodeSORegMemOperand(), llvm::MCDisassembler::Fail, pred, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 5039 of file ARMDisassembler.cpp.
References llvm::Check(), DecodeCPSInstruction(), DecodeGPRnopcRegisterClass(), DecodePredicateOperand(), llvm::MCDisassembler::Fail, pred, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 3684 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Check(), llvm::MCOperand::createImm(), DecodeGPRnopcRegisterClass(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 3819 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Check(), llvm::MCOperand::createImm(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), and llvm::MCDisassembler::Success.
Referenced by DecodeT2LoadImm12().
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Definition at line 3712 of file ARMDisassembler.cpp.
References llvm::Check(), DecodeGPRRegisterClass(), DecodeT2Imm8(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), and llvm::MCDisassembler::Success.
Referenced by DecodeT2LdStPre(), DecodeT2LoadImm8(), and DecodeT2LoadT().
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Definition at line 3669 of file ARMDisassembler.cpp.
References llvm::Check(), DecodeGPRRegisterClass(), DecodeT2Imm8S4(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
Referenced by DecodeT2LDRDPreInstruction(), and DecodeT2STRDPreInstruction().
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Definition at line 3289 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Check(), llvm::MCOperand::createImm(), DecodeGPRRegisterClass(), DecoderGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), and llvm::MCDisassembler::Success.
Referenced by DecodeT2LoadShift().
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Definition at line 5013 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 2221 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
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Definition at line 3226 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
Referenced by DecodeThumb2BCCInstruction().
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Definition at line 2006 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, llvm::MCInst::setOpcode(), llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 3699 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
Referenced by DecodeT2AddrModeImm8().
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Definition at line 3655 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
Referenced by DecodeT2AddrModeImm8s4().
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Definition at line 4942 of file ARMDisassembler.cpp.
References addr, llvm::Check(), DecoderGPRRegisterClass(), DecodeT2AddrModeImm8s4(), llvm::MCDisassembler::Fail, P, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 3758 of file ARMDisassembler.cpp.
References addr, llvm::Check(), DecodeGPRRegisterClass(), DecodeT2AddrModeImm8(), DecodeT2LoadLabel(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 3483 of file ARMDisassembler.cpp.
References llvm::Check(), DecodeGPRRegisterClass(), DecodeT2AddrModeImm12(), DecodeT2LoadLabel(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 3399 of file ARMDisassembler.cpp.
References add(), llvm::Check(), DecodeGPRRegisterClass(), DecodeT2AddrModeImm8(), DecodeT2LoadLabel(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 3602 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Check(), llvm::MCOperand::createImm(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
Referenced by DecodeT2LdStPre(), DecodeT2LoadImm12(), DecodeT2LoadImm8(), DecodeT2LoadShift(), and DecodeT2LoadT().
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Definition at line 3317 of file ARMDisassembler.cpp.
References llvm::Check(), DecodeGPRRegisterClass(), DecodeT2AddrModeSOReg(), DecodeT2LoadLabel(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 3563 of file ARMDisassembler.cpp.
References llvm::Check(), DecoderGPRRegisterClass(), DecodeT2AddrModeImm8(), DecodeT2LoadLabel(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 2048 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Check(), llvm::MCOperand::createImm(), DecoderGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
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Definition at line 5028 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 4003 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
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Definition at line 4979 of file ARMDisassembler.cpp.
References addr, llvm::Check(), DecoderGPRRegisterClass(), DecodeT2AddrModeImm8s4(), llvm::MCDisassembler::Fail, P, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 3158 of file ARMDisassembler.cpp.
References llvm::Check(), DecodeDPairRegisterClass(), DecodeDPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), op, llvm::MCDisassembler::Success, and llvm::ARMISD::VTBL2.
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Definition at line 956 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, R2, Register, and llvm::MCDisassembler::Success.
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Definition at line 929 of file ARMDisassembler.cpp.
References DecodeGPRRegisterClass(), and llvm::MCDisassembler::Fail.
Referenced by DecodeThumbAddrModeIS(), DecodeThumbAddrModeRR(), and DecodeThumbAddSpecialReg().
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Definition at line 3961 of file ARMDisassembler.cpp.
References llvm::Check(), DecodeMemBarrierOption(), DecodePredicateOperand(), DecodeT2BROperand(), llvm::MCDisassembler::Fail, pred, llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 3257 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Check(), llvm::MCOperand::createImm(), DecodetGPRRegisterClass(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 3271 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Success, and tryAddingPcLoadReferenceComment().
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Definition at line 3242 of file ARMDisassembler.cpp.
References llvm::Check(), DecodetGPRRegisterClass(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 3281 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), and llvm::MCDisassembler::Success.
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Definition at line 3194 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodetGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 3845 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), and llvm::MCDisassembler::Success.
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Definition at line 3856 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Check(), llvm::MCOperand::createReg(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 4035 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
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Definition at line 4043 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
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Definition at line 3905 of file ARMDisassembler.cpp.
References llvm::MCOperand::createImm(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
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Definition at line 3218 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
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Definition at line 3234 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
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Definition at line 3881 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.
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Definition at line 3945 of file ARMDisassembler.cpp.
References llvm::Check(), DecodeGPRRegisterClass(), DecoderGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 2127 of file ARMDisassembler.cpp.
References llvm::Check(), DecodeGPRRegisterClass(), DecodePredicateOperand(), DecodeSETPANInstruction(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 5066 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Check(), llvm::MCOperand::createImm(), DecodeDPRRegisterClass(), DecodeNEONModImmInstruction(), llvm::MCDisassembler::Fail, op, llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 5096 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Check(), llvm::MCOperand::createImm(), DecodeNEONModImmInstruction(), DecodeQPRRegisterClass(), llvm::MCDisassembler::Fail, op, llvm::MCInst::setOpcode(), and llvm::MCDisassembler::Success.
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Definition at line 2887 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Check(), llvm::MCOperand::createImm(), DecodeDPairRegisterClass(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), size, and llvm::MCDisassembler::Success.
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Definition at line 4319 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, size, and llvm::MCDisassembler::Success.
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Definition at line 2934 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Check(), llvm::MCOperand::createImm(), DecodeDPairRegisterClass(), DecodeDPairSpacedRegisterClass(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), size, and llvm::MCDisassembler::Success.
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Definition at line 4452 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, size, and llvm::MCDisassembler::Success.
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Definition at line 2982 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 4583 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, size, and llvm::MCDisassembler::Success.
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Definition at line 3017 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, size, and llvm::MCDisassembler::Success.
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Definition at line 4717 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, size, and llvm::MCDisassembler::Success.
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Definition at line 2291 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeAddrMode6Operand(), DecodeDPairRegisterClass(), DecodeDPairSpacedRegisterClass(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), and llvm::MCDisassembler::Success.
Referenced by DecodeVLDST1Instruction(), DecodeVLDST2Instruction(), DecodeVLDST3Instruction(), and DecodeVLDST4Instruction().
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Definition at line 2565 of file ARMDisassembler.cpp.
References DecodeVLDInstruction(), DecodeVSTInstruction(), and llvm::MCDisassembler::Fail.
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Definition at line 2578 of file ARMDisassembler.cpp.
References DecodeVLDInstruction(), DecodeVSTInstruction(), llvm::MCDisassembler::Fail, and size.
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Definition at line 2593 of file ARMDisassembler.cpp.
References DecodeVLDInstruction(), DecodeVSTInstruction(), llvm::MCDisassembler::Fail, and size.
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Definition at line 2606 of file ARMDisassembler.cpp.
References DecodeVLDInstruction(), DecodeVSTInstruction(), llvm::MCDisassembler::Fail, and size.
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Definition at line 4896 of file ARMDisassembler.cpp.
References llvm::Check(), DecodeGPRRegisterClass(), DecodePredicateOperand(), DecodeSPRRegisterClass(), llvm::MCDisassembler::Fail, pred, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 4870 of file ARMDisassembler.cpp.
References llvm::Check(), DecodeGPRRegisterClass(), DecodePredicateOperand(), DecodeSPRRegisterClass(), llvm::MCDisassembler::Fail, pred, llvm::MCDisassembler::SoftFail, and llvm::MCDisassembler::Success.
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Definition at line 3115 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Check(), llvm::MCOperand::createImm(), DecodeDPRRegisterClass(), DecodeQPRRegisterClass(), llvm::MCDisassembler::Fail, size, and llvm::MCDisassembler::Success.
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Definition at line 4386 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, size, and llvm::MCDisassembler::Success.
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Definition at line 4519 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, size, and llvm::MCDisassembler::Success.
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Definition at line 4653 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, size, and llvm::MCDisassembler::Success.
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Definition at line 4798 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, size, and llvm::MCDisassembler::Success.
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Definition at line 2616 of file ARMDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::Check(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), DecodeAddrMode6Operand(), DecodeDPairRegisterClass(), DecodeDPairSpacedRegisterClass(), DecodeDPRRegisterClass(), DecodeGPRRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCInst::getOpcode(), and llvm::MCDisassembler::Success.
Referenced by DecodeVLDST1Instruction(), DecodeVLDST2Instruction(), DecodeVLDST3Instruction(), and DecodeVLDST4Instruction().
| void LLVMInitializeARMDisassembler | ( | ) |
Definition at line 873 of file ARMDisassembler.cpp.
References createARMDisassembler(), createThumbDisassembler(), llvm::TargetRegistry::RegisterMCDisassembler(), llvm::TheARMBETarget, llvm::TheARMLETarget, llvm::TheThumbBETarget, and llvm::TheThumbLETarget.
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tryAddingPcLoadReferenceComment - trys to add a comment as to what is being referenced by a load instruction with the base register that is the Pc.
These can often be values in a literal pool near the Address of the instruction. The Address of the instruction and its immediate Value are used as a possible literal pool entry. The SymbolLookUp call back will return the name of a symbol referenced by the literal pool's entry if the referenced address is that of a symbol. Or it will return a pointer to a literal 'C' string if the referenced address of the literal pool's entry is an address into a section with 'C' string literals.
Definition at line 567 of file ARMDisassembler.cpp.
References llvm::MCDisassembler::tryAddingPcLoadReferenceComment().
Referenced by DecodeAddrModeImm12Operand(), and DecodeThumbAddrModePC().
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tryAddingSymbolicOperand - trys to add a symbolic operand in place of the immediate Value in the MCInst.
The immediate Value has had any PC adjustment made by the caller. If the instruction is a branch instruction then isBranch is true, else false. If the getOpInfo() function was set as part of the setupForSymbolicDisassembly() call then that function is called to get any symbolic information at the Address for this instruction. If that returns non-zero then the symbolic information it returns is used to create an MCExpr and that is added as an operand to the MCInst. If getOpInfo() returns zero and isBranch is true then a symbol look up for Value is done and if a symbol is found an MCExpr is created with that, else an MCExpr with Value is created. This function returns true if it adds an operand to the MCInst and false otherwise.
Definition at line 549 of file ARMDisassembler.cpp.
References llvm::MCDisassembler::tryAddingSymbolicOperand().
Referenced by DecodeArmMOVTWInstruction(), DecodeBranchImmInstruction(), DecodeT2BInstruction(), DecodeT2BROperand(), DecodeT2MOVTWInstruction(), DecodeThumbBCCTargetOperand(), DecodeThumbBLTargetOperand(), DecodeThumbBLXOffset(), DecodeThumbBROperand(), and DecodeThumbCmpBROperand().
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Definition at line 1076 of file ARMDisassembler.cpp.
Referenced by DecodeDPairRegisterClass().
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Definition at line 1095 of file ARMDisassembler.cpp.
Referenced by DecodeDPairSpacedRegisterClass().
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Definition at line 1016 of file ARMDisassembler.cpp.
Referenced by DecodeDPRRegisterClass().
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Definition at line 884 of file ARMDisassembler.cpp.
Referenced by DecodeGPRRegisterClass().
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Definition at line 936 of file ARMDisassembler.cpp.
Referenced by DecodeGPRPairRegisterClass().
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Definition at line 1057 of file ARMDisassembler.cpp.
Referenced by DecodeQPRRegisterClass().
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Definition at line 995 of file ARMDisassembler.cpp.
Referenced by DecodeSPRRegisterClass().
1.8.6