32 cl::desc(
"Enable the machine combiner pass"),
49 " linker optimization hints (LOH)"),
cl::init(
true),
54 cl::desc(
"Enable the pass that removes dead"
55 " definitons and replaces stores to"
56 " them with stores to the zero"
66 cl::desc(
"Run SimplifyCFG after expanding atomic operations"
67 " to make use of cmpxchg flow-based information"),
77 cl::desc(
"Enable the condition optimizer pass"),
82 cl::desc(
"Work around Cortex-A53 erratum 835769"),
87 cl::desc(
"Enable optimizations on complex GEPs"),
93 cl::desc(
"Enable the global merge pass"));
107 return make_unique<AArch64_MachoTargetObjectFile>();
109 return make_unique<AArch64_ELFTargetObjectFile>();
115 return "e-m:o-i64:64-i128:128-n32:64-S128";
117 return "e-m:e-i64:64-i128:128-n32:64-S128";
118 return "E-m:e-i64:64-i128:128-n32:64-S128";
132 Options, RM, CM, OL),
134 isLittle(LittleEndian) {
164 void AArch64leTargetMachine::anchor() { }
172 void AArch64beTargetMachine::anchor() { }
191 return getTM<AArch64TargetMachine>();
194 void addIRPasses()
override;
195 bool addPreISel()
override;
196 bool addInstSelector()
override;
197 bool addILPOpts()
override;
198 void addPreRegAlloc()
override;
199 void addPostRegAlloc()
override;
200 void addPreSched2()
override;
201 void addPreEmitPass()
override;
212 return new AArch64PassConfig(
this, PM);
215 void AArch64PassConfig::addIRPasses() {
247 bool AArch64PassConfig::addPreISel() {
269 bool AArch64PassConfig::addInstSelector() {
274 if (
TM->getTargetTriple().isOSBinFormatELF() &&
281 bool AArch64PassConfig::addILPOpts() {
295 void AArch64PassConfig::addPreRegAlloc() {
305 void AArch64PassConfig::addPostRegAlloc() {
314 void AArch64PassConfig::addPreSched2() {
322 void AArch64PassConfig::addPreEmitPass() {
329 TM->getTargetTriple().isOSBinFormatMachO())
static cl::opt< cl::boolOrDefault > EnableGlobalMerge("aarch64-global-merge", cl::Hidden, cl::desc("Enable the global merge pass"))
char & MachineCombinerID
This pass performs instruction combining using trace metrics to estimate critical-path and resource d...
bool isOSBinFormatMachO() const
Tests whether the environment is MachO.
FunctionPass * createAArch64BranchRelaxation()
createAArch64BranchRelaxation - returns an instance of the constpool island pass. ...
virtual void addIRPasses()
Add common target configurable passes that perform LLVM IR to IR transforms following machine indepen...
const AArch64Subtarget * getSubtargetImpl(const Function &F) const override
Virtual method implemented by subclasses that returns a reference to that target's TargetSubtargetInf...
Triple TargetTriple
Triple string, CPU name, and target feature strings the TargetMachine instance is created with...
char & EarlyIfConverterID
EarlyIfConverter - This pass performs if-conversion on SSA form by inserting cmov instructions...
Analysis pass providing the TargetTransformInfo.
FunctionPass * createInterleavedAccessPass(const TargetMachine *TM)
InterleavedAccess Pass - This pass identifies and matches interleaved memory accesses to target speci...
std::string str() const
str - Get the contents as an std::string.
Attribute getFnAttribute(Attribute::AttrKind Kind) const
Return the attribute for the given attribute kind.
FunctionPass * createAArch64ConditionalCompares()
ModulePass * createAArch64PromoteConstantPass()
bool hasAttribute(AttrKind Val) const
Return true if the attribute is present.
FunctionPass * createAArch64CollectLOHPass()
createAArch64CollectLOHPass - returns an instance of the Statistic for linker optimization pass...
static cl::opt< bool > EnableEarlyIfConversion("aarch64-enable-early-ifcvt", cl::Hidden, cl::desc("Run early if-conversion"), cl::init(true))
FunctionPass * createAtomicExpandPass(const TargetMachine *TM)
No attributes have been set.
Target-Independent Code Generator Pass Configuration Options.
TargetPassConfig * createPassConfig(PassManagerBase &PM) override
Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of ...
FunctionPass * createAArch64A57FPLoadBalancing()
static cl::opt< bool > EnableCollectLOH("aarch64-collect-loh", cl::desc("Enable the pass that emits the"" linker optimization hints (LOH)"), cl::init(true), cl::Hidden)
FunctionPass * createAArch64LoadStoreOptimizationPass()
createARMLoadStoreOptimizationPass - returns an instance of the load / store optimization pass...
CodeGenOpt::Level getOptLevel() const
Returns the optimization level: None, Less, Default, or Aggressive.
static std::string computeDataLayout(const Triple &TT, bool LittleEndian)
initializer< Ty > init(const Ty &Val)
AArch64beTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL)
FunctionPass * createSeparateConstOffsetFromGEPPass(const TargetMachine *TM=nullptr, bool LowerGEP=false)
void LLVMInitializeAArch64Target()
static cl::opt< bool > EnableDeadRegisterElimination("aarch64-dead-def-elimination", cl::Hidden, cl::desc("Enable the pass that removes dead"" definitons and replaces stores to"" them with stores to the zero"" register"), cl::init(true))
FunctionPass * createCFGSimplificationPass(int Threshold=-1, std::function< bool(const Function &)> Ftor=nullptr)
FunctionPass * createAArch64AdvSIMDScalar()
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang","erlang-compatible garbage collector")
This class describes a target machine that is implemented with the LLVM target-independent code gener...
AArch64TargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL, bool IsLittleEndian)
TargetMachine ctor - Create an AArch64 architecture model.
static cl::opt< bool > EnableGEPOpt("aarch64-gep-opt", cl::Hidden, cl::desc("Enable optimizations on complex GEPs"), cl::init(false))
FunctionPass * createEarlyCSEPass()
static cl::opt< bool > EnableCondOpt("aarch64-condopt", cl::desc("Enable the condition optimizer pass"), cl::init(true), cl::Hidden)
FunctionPass * createAArch64AddressTypePromotionPass()
~AArch64TargetMachine() override
Triple - Helper class for working with autoconf configuration names.
Target TheAArch64leTarget
char & PostRASchedulerID
createPostRAScheduler - This pass performs post register allocation scheduling.
static cl::opt< bool > EnableA53Fix835769("aarch64-fix-cortex-a53-835769", cl::Hidden, cl::desc("Work around Cortex-A53 erratum 835769"), cl::init(false))
Target TheAArch64beTarget
AArch64leTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL)
FunctionPass * createAArch64ExpandPseudoPass()
Returns an instance of the pseudo instruction expansion pass.
FunctionPass * createAArch64A53Fix835769()
FunctionPass * createAArch64StorePairSuppressPass()
static cl::opt< bool > EnablePromoteConstant("aarch64-promote-const", cl::desc("Enable the promote ""constant pass"), cl::init(true), cl::Hidden)
static std::unique_ptr< TargetLoweringObjectFile > createTLOF(const Triple &TT)
Target - Wrapper for Target specific information.
char & PeepholeOptimizerID
PeepholeOptimizer - This pass performs peephole optimizations - like extension and comparison elimina...
FunctionPass * createAArch64ConditionOptimizerPass()
static cl::opt< bool > EnableMCR("aarch64-mcr", cl::desc("Enable the machine combiner pass"), cl::init(true), cl::Hidden)
TargetIRAnalysis getTargetIRAnalysis() override
Get the TargetIRAnalysis for this target.
FunctionPass * createAArch64ISelDag(AArch64TargetMachine &TM, CodeGenOpt::Level OptLevel)
createAArch64ISelDag - This pass converts a legalized DAG into a AArch64-specific DAG...
static cl::opt< bool > EnableAtomicTidy("aarch64-atomic-cfg-tidy", cl::Hidden, cl::desc("Run SimplifyCFG after expanding atomic operations"" to make use of cmpxchg flow-based information"), cl::init(true))
static cl::opt< bool > EnableLoadStoreOpt("aarch64-load-store-opt", cl::desc("Enable the load/store pair"" optimization pass"), cl::init(true), cl::Hidden)
char & PostMachineSchedulerID
PostMachineScheduler - This pass schedules machine instructions postRA.
StringMap< std::unique_ptr< AArch64Subtarget > > SubtargetMap
void resetTargetOptions(const Function &F) const
Reset the target options based on the function's attributes.
StringRef getValueAsString() const
Return the attribute's value as a string.
static cl::opt< bool > EnableCCMP("aarch64-ccmp", cl::desc("Enable the CCMP formation pass"), cl::init(true), cl::Hidden)
RegisterTargetMachine - Helper template for registering a target machine implementation, for use in the target machine initialization function.
FunctionPass * createAArch64DeadRegisterDefinitions()
StringRef - Represent a constant reference to a string, i.e.
static GCMetadataPrinterRegistry::Add< OcamlGCMetadataPrinter > Y("ocaml","ocaml 3.10-compatible collector")
static cl::opt< bool > EnableAdvSIMDScalar("aarch64-simd-scalar", cl::desc("Enable use of AdvSIMD scalar"" integer instructions"), cl::init(false), cl::Hidden)
static cl::opt< bool > EnableStPairSuppress("aarch64-stp-suppress", cl::desc("Suppress STP for AArch64"), cl::init(true), cl::Hidden)
Pass * createGlobalMergePass(const TargetMachine *TM, unsigned MaximalOffset, bool OnlyOptimizeForSize=false)
FunctionPass * createAArch64CleanupLocalDynamicTLSPass()