LLVM  3.7.0
X86Subtarget.cpp
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1 //===-- X86Subtarget.cpp - X86 Subtarget Information ----------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the X86 specific subclass of TargetSubtargetInfo.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "X86Subtarget.h"
15 #include "X86InstrInfo.h"
16 #include "X86TargetMachine.h"
17 #include "llvm/IR/Attributes.h"
18 #include "llvm/IR/Function.h"
19 #include "llvm/IR/GlobalValue.h"
21 #include "llvm/Support/Debug.h"
23 #include "llvm/Support/Host.h"
27 
28 #if defined(_MSC_VER)
29 #include <intrin.h>
30 #endif
31 
32 using namespace llvm;
33 
34 #define DEBUG_TYPE "subtarget"
35 
36 #define GET_SUBTARGETINFO_TARGET_DESC
37 #define GET_SUBTARGETINFO_CTOR
38 #include "X86GenSubtargetInfo.inc"
39 
40 // Temporary option to control early if-conversion for x86 while adding machine
41 // models.
42 static cl::opt<bool>
43 X86EarlyIfConv("x86-early-ifcvt", cl::Hidden,
44  cl::desc("Enable early if-conversion on X86"));
45 
46 
47 /// ClassifyBlockAddressReference - Classify a blockaddress reference for the
48 /// current subtarget according to how we should reference it in a non-pcrel
49 /// context.
51  if (isPICStyleGOT()) // 32-bit ELF targets.
52  return X86II::MO_GOTOFF;
53 
54  if (isPICStyleStubPIC()) // Darwin/32 in PIC mode.
56 
57  // Direct static reference to label.
58  return X86II::MO_NO_FLAG;
59 }
60 
61 /// ClassifyGlobalReference - Classify a global variable reference for the
62 /// current subtarget according to how we should reference it in a non-pcrel
63 /// context.
64 unsigned char X86Subtarget::
66  // DLLImport only exists on windows, it is implemented as a load from a
67  // DLLIMPORT stub.
68  if (GV->hasDLLImportStorageClass())
69  return X86II::MO_DLLIMPORT;
70 
71  bool isDef = GV->isStrongDefinitionForLinker();
72 
73  // X86-64 in PIC mode.
74  if (isPICStyleRIPRel()) {
75  // Large model never uses stubs.
76  if (TM.getCodeModel() == CodeModel::Large)
77  return X86II::MO_NO_FLAG;
78 
79  if (isTargetDarwin()) {
80  // If symbol visibility is hidden, the extra load is not needed if
81  // target is x86-64 or the symbol is definitely defined in the current
82  // translation unit.
83  if (GV->hasDefaultVisibility() && !isDef)
84  return X86II::MO_GOTPCREL;
85  } else if (!isTargetWin64()) {
86  assert(isTargetELF() && "Unknown rip-relative target");
87 
88  // Extra load is needed for all externally visible.
89  if (!GV->hasLocalLinkage() && GV->hasDefaultVisibility())
90  return X86II::MO_GOTPCREL;
91  }
92 
93  return X86II::MO_NO_FLAG;
94  }
95 
96  if (isPICStyleGOT()) { // 32-bit ELF targets.
97  // Extra load is needed for all externally visible.
98  if (GV->hasLocalLinkage() || GV->hasHiddenVisibility())
99  return X86II::MO_GOTOFF;
100  return X86II::MO_GOT;
101  }
102 
103  if (isPICStyleStubPIC()) { // Darwin/32 in PIC mode.
104  // Determine whether we have a stub reference and/or whether the reference
105  // is relative to the PIC base or not.
106 
107  // If this is a strong reference to a definition, it is definitely not
108  // through a stub.
109  if (isDef)
111 
112  // Unless we have a symbol with hidden visibility, we have to go through a
113  // normal $non_lazy_ptr stub because this symbol might be resolved late.
114  if (!GV->hasHiddenVisibility()) // Non-hidden $non_lazy_ptr reference.
116 
117  // If symbol visibility is hidden, we have a stub for common symbol
118  // references and external declarations.
119  if (GV->isDeclarationForLinker() || GV->hasCommonLinkage()) {
120  // Hidden $non_lazy_ptr reference.
122  }
123 
124  // Otherwise, no stub.
126  }
127 
128  if (isPICStyleStubNoDynamic()) { // Darwin/32 in -mdynamic-no-pic mode.
129  // Determine whether we have a stub reference.
130 
131  // If this is a strong reference to a definition, it is definitely not
132  // through a stub.
133  if (isDef)
134  return X86II::MO_NO_FLAG;
135 
136  // Unless we have a symbol with hidden visibility, we have to go through a
137  // normal $non_lazy_ptr stub because this symbol might be resolved late.
138  if (!GV->hasHiddenVisibility()) // Non-hidden $non_lazy_ptr reference.
140 
141  // Otherwise, no stub.
142  return X86II::MO_NO_FLAG;
143  }
144 
145  // Direct static reference to global.
146  return X86II::MO_NO_FLAG;
147 }
148 
149 
150 /// getBZeroEntry - This function returns the name of a function which has an
151 /// interface like the non-standard bzero function, if such a function exists on
152 /// the current subtarget and it is considered prefereable over memset with zero
153 /// passed as the second argument. Otherwise it returns null.
154 const char *X86Subtarget::getBZeroEntry() const {
155  // Darwin 10 has a __bzero entry point for this purpose.
156  if (getTargetTriple().isMacOSX() &&
157  !getTargetTriple().isMacOSXVersionLT(10, 6))
158  return "__bzero";
159 
160  return nullptr;
161 }
162 
164  return getTargetTriple().isMacOSX() &&
166  is64Bit();
167 }
168 
169 /// IsLegalToCallImmediateAddr - Return true if the subtarget allows calls
170 /// to immediate address.
172  // FIXME: I386 PE/COFF supports PC relative calls using IMAGE_REL_I386_REL32
173  // but WinCOFFObjectWriter::RecordRelocation cannot emit them. Once it does,
174  // the following check for Win32 should be removed.
175  if (In64BitMode || isTargetWin32())
176  return false;
177  return isTargetELF() || TM.getRelocationModel() == Reloc::Static;
178 }
179 
180 void X86Subtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
181  std::string CPUName = CPU;
182  if (CPUName.empty())
183  CPUName = "generic";
184 
185  // Make sure 64-bit features are available in 64-bit mode. (But make sure
186  // SSE2 can be turned off explicitly.)
187  std::string FullFS = FS;
188  if (In64BitMode) {
189  if (!FullFS.empty())
190  FullFS = "+64bit,+sse2," + FullFS;
191  else
192  FullFS = "+64bit,+sse2";
193  }
194 
195  // Parse features string and set the CPU.
196  ParseSubtargetFeatures(CPUName, FullFS);
197 
198  InstrItins = getInstrItineraryForCPU(CPUName);
199 
200  // It's important to keep the MCSubtargetInfo feature bits in sync with
201  // target data structure which is shared with MC code emitter, etc.
202  if (In64BitMode)
203  ToggleFeature(X86::Mode64Bit);
204  else if (In32BitMode)
205  ToggleFeature(X86::Mode32Bit);
206  else if (In16BitMode)
207  ToggleFeature(X86::Mode16Bit);
208  else
209  llvm_unreachable("Not 16-bit, 32-bit or 64-bit mode!");
210 
211  DEBUG(dbgs() << "Subtarget features: SSELevel " << X86SSELevel
212  << ", 3DNowLevel " << X863DNowLevel
213  << ", 64bit " << HasX86_64 << "\n");
214  assert((!In64BitMode || HasX86_64) &&
215  "64-bit code requested on a subtarget that doesn't support it!");
216 
217  // Stack alignment is 16 bytes on Darwin, Linux and Solaris (both
218  // 32 and 64 bit) and for all 64-bit targets.
219  if (StackAlignOverride)
220  stackAlignment = StackAlignOverride;
221  else if (isTargetDarwin() || isTargetLinux() || isTargetSolaris() ||
222  In64BitMode)
223  stackAlignment = 16;
224 }
225 
226 void X86Subtarget::initializeEnvironment() {
229  HasCMov = false;
230  HasX86_64 = false;
231  HasPOPCNT = false;
232  HasSSE4A = false;
233  HasAES = false;
234  HasPCLMUL = false;
235  HasFMA = false;
236  HasFMA4 = false;
237  HasXOP = false;
238  HasTBM = false;
239  HasMOVBE = false;
240  HasRDRAND = false;
241  HasF16C = false;
242  HasFSGSBase = false;
243  HasLZCNT = false;
244  HasBMI = false;
245  HasBMI2 = false;
246  HasRTM = false;
247  HasHLE = false;
248  HasERI = false;
249  HasCDI = false;
250  HasPFI = false;
251  HasDQI = false;
252  HasBWI = false;
253  HasVLX = false;
254  HasADX = false;
255  HasSHA = false;
256  HasPRFCHW = false;
257  HasRDSEED = false;
258  HasMPX = false;
259  IsBTMemSlow = false;
260  IsSHLDSlow = false;
261  IsUAMemFast = false;
262  IsUAMem32Slow = false;
263  HasSSEUnalignedMem = false;
264  HasCmpxchg16b = false;
265  UseLeaForSP = false;
266  HasSlowDivide32 = false;
267  HasSlowDivide64 = false;
268  PadShortFunctions = false;
269  CallRegIndirect = false;
270  LEAUsesAG = false;
271  SlowLEA = false;
272  SlowIncDec = false;
273  stackAlignment = 4;
274  // FIXME: this is a known good value for Yonah. How about others?
276  UseSoftFloat = false;
277 }
278 
279 X86Subtarget &X86Subtarget::initializeSubtargetDependencies(StringRef CPU,
280  StringRef FS) {
281  initializeEnvironment();
282  initSubtargetFeatures(CPU, FS);
283  return *this;
284 }
285 
286 X86Subtarget::X86Subtarget(const Triple &TT, const std::string &CPU,
287  const std::string &FS, const X86TargetMachine &TM,
288  unsigned StackAlignOverride)
289  : X86GenSubtargetInfo(TT, CPU, FS), X86ProcFamily(Others),
290  PICStyle(PICStyles::None), TargetTriple(TT),
291  StackAlignOverride(StackAlignOverride),
292  In64BitMode(TargetTriple.getArch() == Triple::x86_64),
293  In32BitMode(TargetTriple.getArch() == Triple::x86 &&
294  TargetTriple.getEnvironment() != Triple::CODE16),
295  In16BitMode(TargetTriple.getArch() == Triple::x86 &&
296  TargetTriple.getEnvironment() == Triple::CODE16),
297  TSInfo(), InstrInfo(initializeSubtargetDependencies(CPU, FS)),
298  TLInfo(TM, *this), FrameLowering(*this, getStackAlignment()) {
299  // Determine the PICStyle based on the target selected.
300  if (TM.getRelocationModel() == Reloc::Static) {
301  // Unless we're in PIC or DynamicNoPIC mode, set the PIC style to None.
303  } else if (is64Bit()) {
304  // PIC in 64 bit mode is always rip-rel.
306  } else if (isTargetCOFF()) {
308  } else if (isTargetDarwin()) {
309  if (TM.getRelocationModel() == Reloc::PIC_)
311  else {
312  assert(TM.getRelocationModel() == Reloc::DynamicNoPIC);
314  }
315  } else if (isTargetELF()) {
317  }
318 }
319 
321  return hasCMov() && X86EarlyIfConv;
322 }
323 
void ParseSubtargetFeatures(StringRef CPU, StringRef FS)
ParseSubtargetFeatures - Parses features string setting specified subtarget options.
bool HasPRFCHW
Processor has PRFCHW instructions.
Definition: X86Subtarget.h:138
const NoneType None
Definition: None.h:23
bool HasTBM
Target has TBM instructions.
Definition: X86Subtarget.h:102
bool HasBMI2
Processor has BMI2 instructions.
Definition: X86Subtarget.h:123
Reloc::Model getRelocationModel() const
Returns the code generation relocation model.
bool HasCDI
Processor has AVX-512 Conflict Detection Instructions.
Definition: X86Subtarget.h:200
bool HasAES
Target has AES instructions.
Definition: X86Subtarget.h:87
void setPICStyle(PICStyles::Style Style)
Definition: X86Subtarget.h:319
bool HasERI
Processor has AVX-512 Exponential and Reciprocal Instructions.
Definition: X86Subtarget.h:197
unsigned char ClassifyGlobalReference(const GlobalValue *GV, const TargetMachine &TM) const
ClassifyGlobalReference - Classify a global variable reference for the current subtarget according to...
unsigned MaxInlineSizeThreshold
Max.
Definition: X86Subtarget.h:223
bool LEAUsesAG
True if the LEA instruction inputs have to be ready at address generation (AG) time.
Definition: X86Subtarget.h:185
static cl::opt< bool > X86EarlyIfConv("x86-early-ifcvt", cl::Hidden, cl::desc("Enable early if-conversion on X86"))
bool IsUAMem32Slow
True if unaligned 32-byte memory accesses are slow.
Definition: X86Subtarget.h:153
MO_GOTPCREL - On a symbol operand this indicates that the immediate is offset to the GOT entry for th...
Definition: X86BaseInfo.h:87
bool HasRDRAND
True if the processor has the RDRAND instruction.
Definition: X86Subtarget.h:108
bool HasFMA
Target has 3-operand fused multiply-add.
Definition: X86Subtarget.h:93
bool isMacOSX() const
isMacOSX - Is this a Mac OS X triple.
Definition: Triple.h:394
MO_DARWIN_NONLAZY_PIC_BASE - On a symbol operand "FOO", this indicates that the reference is actually...
Definition: X86BaseInfo.h:192
bool isTargetSolaris() const
Definition: X86Subtarget.h:389
bool hasCommonLinkage() const
Definition: GlobalValue.h:282
bool hasDefaultVisibility() const
Definition: GlobalValue.h:140
bool isTargetDarwin() const
Definition: X86Subtarget.h:386
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:98
bool HasPOPCNT
True if the processor supports POPCNT.
Definition: X86Subtarget.h:81
This file contains the simple types necessary to represent the attributes associated with functions a...
const Triple & getTargetTriple() const
Definition: X86Subtarget.h:384
bool HasSlowDivide32
True if 8-bit divisions are significantly faster than 32-bit divisions and should be used when possib...
Definition: X86Subtarget.h:169
bool isStrongDefinitionForLinker() const
Returns true if this global's definition will be the one chosen by the linker.
Definition: GlobalValue.h:353
bool HasPFI
Processor has AVX-512 PreFetch Instructions.
Definition: X86Subtarget.h:194
unsigned isMacOSXVersionLT(unsigned Major, unsigned Minor=0, unsigned Micro=0) const
isMacOSXVersionLT - Comparison function for checking OS X version compatibility, which handles suppor...
Definition: Triple.h:379
MO_GOT - On a symbol operand this indicates that the immediate is the offset to the GOT entry for the...
Definition: X86BaseInfo.h:72
bool is64Bit() const
Is this x86_64? (disregarding specific ABI / programming model)
Definition: X86Subtarget.h:294
bool HasCmpxchg16b
True if this processor has the CMPXCHG16B instruction; this is true for most x86-64 chips...
Definition: X86Subtarget.h:161
bool isPICStyleRIPRel() const
Definition: X86Subtarget.h:435
bool UseLeaForSP
True if the LEA instruction should be used for adjusting the stack pointer.
Definition: X86Subtarget.h:165
X863DNowEnum X863DNowLevel
3DNow, 3DNow Athlon, or none supported.
Definition: X86Subtarget.h:71
MO_DARWIN_NONLAZY - On a symbol operand "FOO", this indicates that the reference is actually to the "...
Definition: X86BaseInfo.h:187
bool HasSSE4A
True if the processor supports SSE4A instructions.
Definition: X86Subtarget.h:84
bool CallRegIndirect
True if the Calls with memory reference should be converted to a register-based indirect call...
Definition: X86Subtarget.h:181
bool HasLZCNT
Processor has LZCNT instruction.
Definition: X86Subtarget.h:117
bool HasF16C
Processor has 16-bit floating point conversion instructions.
Definition: X86Subtarget.h:111
bool SlowIncDec
True if INC and DEC instructions are slow when writing to flags.
Definition: X86Subtarget.h:191
MO_DARWIN_HIDDEN_NONLAZY_PIC_BASE - On a symbol operand "FOO", this indicates that the reference is a...
Definition: X86BaseInfo.h:198
unsigned char ClassifyBlockAddressReference() const
Classify a blockaddress reference for the current subtarget according to how we should reference it i...
CodeModel::Model getCodeModel() const
Returns the code model.
bool isTargetCOFF() const
Definition: X86Subtarget.h:393
bool hasSinCos() const
This function returns true if the target has sincos() routine in its compiler runtime or math librari...
bool isPICStyleStubPIC() const
Definition: X86Subtarget.h:437
bool IsBTMemSlow
True if BT (bit test) of memory instructions are slow.
Definition: X86Subtarget.h:144
bool HasADX
Processor has ADX instructions.
Definition: X86Subtarget.h:132
bool HasBWI
Processor has AVX-512 Byte and Word instructions.
Definition: X86Subtarget.h:206
bool hasHiddenVisibility() const
Definition: GlobalValue.h:141
bool isTargetWin32() const
Definition: X86Subtarget.h:429
bool IsLegalToCallImmediateAddr(const TargetMachine &TM) const
Return true if the subtarget allows calls to immediate address.
bool HasXOP
Target has XOP instructions.
Definition: X86Subtarget.h:99
bool SlowLEA
True if the LEA instruction with certain arguments is slow.
Definition: X86Subtarget.h:188
bool HasDQI
Processor has AVX-512 Doubleword and Quadword instructions.
Definition: X86Subtarget.h:203
bool isPICStyleStubNoDynamic() const
Definition: X86Subtarget.h:441
bool enableEarlyIfConversion() const override
bool IsSHLDSlow
True if SHLD instructions are slow.
Definition: X86Subtarget.h:147
bool isPICStyleGOT() const
Definition: X86Subtarget.h:434
InstrItineraryData InstrItins
Instruction itineraries for scheduling.
Definition: X86Subtarget.h:229
bool HasFSGSBase
Processor has FS/GS base insturctions.
Definition: X86Subtarget.h:114
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
X86Subtarget(const Triple &TT, const std::string &CPU, const std::string &FS, const X86TargetMachine &TM, unsigned StackAlignOverride)
This constructor initializes the data members to match that of the specified triple.
bool HasMPX
Processot supports MPX - Memory Protection Extensions.
Definition: X86Subtarget.h:212
bool hasDLLImportStorageClass() const
Definition: GlobalValue.h:167
bool HasX86_64
True if the processor supports X86-64 instructions.
Definition: X86Subtarget.h:78
bool HasSSEUnalignedMem
True if SSE operations can have unaligned memory operands.
Definition: X86Subtarget.h:157
bool isTargetELF() const
Definition: X86Subtarget.h:392
bool HasSHA
Processor has SHA instructions.
Definition: X86Subtarget.h:135
bool HasBMI
Processor has BMI1 instructions.
Definition: X86Subtarget.h:120
bool isTargetLinux() const
Definition: X86Subtarget.h:396
bool HasHLE
Processor has HLE.
Definition: X86Subtarget.h:129
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:123
bool UseSoftFloat
Use software floating point for code generation.
Definition: X86Subtarget.h:215
bool hasCMov() const
Definition: X86Subtarget.h:321
bool HasPCLMUL
Target has carry-less multiplication.
Definition: X86Subtarget.h:90
MO_GOTOFF - On a symbol operand this indicates that the immediate is the offset to the location of th...
Definition: X86BaseInfo.h:79
X86SSEEnum X86SSELevel
MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, or none supported.
Definition: X86Subtarget.h:68
bool hasLocalLinkage() const
Definition: GlobalValue.h:280
bool HasCMov
True if this processor has conditional move instructions (generally pentium pro+).
Definition: X86Subtarget.h:75
bool isTargetWin64() const
Definition: X86Subtarget.h:425
bool HasFMA4
Target has 4-operand fused multiply-add.
Definition: X86Subtarget.h:96
bool HasRTM
Processor has RTM instructions.
Definition: X86Subtarget.h:126
#define DEBUG(X)
Definition: Debug.h:92
Primary interface to the complete machine description for the target machine.
bool HasVLX
Processor has AVX-512 Vector Length eXtenstions.
Definition: X86Subtarget.h:209
const char * getBZeroEntry() const
This function returns the name of a function which has an interface like the non-standard bzero funct...
MO_PIC_BASE_OFFSET - On a symbol operand this indicates that the immediate should get the value of th...
Definition: X86BaseInfo.h:65
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:40
bool HasRDSEED
Processor has RDSEED instructions.
Definition: X86Subtarget.h:141
unsigned stackAlignment
The minimum alignment known to hold of the stack frame on entry to the function and which must be mai...
Definition: X86Subtarget.h:219
bool IsUAMemFast
True if unaligned memory access is fast.
Definition: X86Subtarget.h:150
bool isDeclarationForLinker() const
Definition: GlobalValue.h:344
bool HasMOVBE
True if the processor has the MOVBE instruction.
Definition: X86Subtarget.h:105
bool PadShortFunctions
True if the short functions should be padded to prevent a stall when returning too early...
Definition: X86Subtarget.h:177
MO_DLLIMPORT - On a symbol operand "FOO", this indicates that the reference is actually to the "__imp...
Definition: X86BaseInfo.h:177
bool HasSlowDivide64
True if 16-bit divides are significantly faster than 64-bit divisions and should be used when possibl...
Definition: X86Subtarget.h:173