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LLVM
3.7.0
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#include "SelectionDAGBuilder.h"#include "SDNodeDbgValue.h"#include "llvm/ADT/BitVector.h"#include "llvm/ADT/Optional.h"#include "llvm/ADT/SmallSet.h"#include "llvm/ADT/Statistic.h"#include "llvm/Analysis/AliasAnalysis.h"#include "llvm/Analysis/BranchProbabilityInfo.h"#include "llvm/Analysis/ConstantFolding.h"#include "llvm/Analysis/TargetLibraryInfo.h"#include "llvm/Analysis/ValueTracking.h"#include "llvm/CodeGen/FastISel.h"#include "llvm/CodeGen/FunctionLoweringInfo.h"#include "llvm/CodeGen/GCMetadata.h"#include "llvm/CodeGen/GCStrategy.h"#include "llvm/CodeGen/MachineFrameInfo.h"#include "llvm/CodeGen/MachineFunction.h"#include "llvm/CodeGen/MachineInstrBuilder.h"#include "llvm/CodeGen/MachineJumpTableInfo.h"#include "llvm/CodeGen/MachineModuleInfo.h"#include "llvm/CodeGen/MachineRegisterInfo.h"#include "llvm/CodeGen/SelectionDAG.h"#include "llvm/CodeGen/StackMaps.h"#include "llvm/CodeGen/WinEHFuncInfo.h"#include "llvm/IR/CallingConv.h"#include "llvm/IR/Constants.h"#include "llvm/IR/DataLayout.h"#include "llvm/IR/DebugInfo.h"#include "llvm/IR/DerivedTypes.h"#include "llvm/IR/Function.h"#include "llvm/IR/GlobalVariable.h"#include "llvm/IR/InlineAsm.h"#include "llvm/IR/Instructions.h"#include "llvm/IR/IntrinsicInst.h"#include "llvm/IR/Intrinsics.h"#include "llvm/IR/LLVMContext.h"#include "llvm/IR/Module.h"#include "llvm/IR/Statepoint.h"#include "llvm/MC/MCSymbol.h"#include "llvm/Support/CommandLine.h"#include "llvm/Support/Debug.h"#include "llvm/Support/ErrorHandling.h"#include "llvm/Support/MathExtras.h"#include "llvm/Support/raw_ostream.h"#include "llvm/Target/TargetFrameLowering.h"#include "llvm/Target/TargetInstrInfo.h"#include "llvm/Target/TargetIntrinsicInfo.h"#include "llvm/Target/TargetLowering.h"#include "llvm/Target/TargetOptions.h"#include "llvm/Target/TargetSelectionDAGInfo.h"#include "llvm/Target/TargetSubtargetInfo.h"#include <algorithm>#include "llvm/IR/Instruction.def"#include "llvm/CodeGen/SelectionDAGISel.h"Go to the source code of this file.
Macros | |
| #define | DEBUG_TYPE "isel" |
| #define | HANDLE_INST(NUM, OPCODE, CLASS) case Instruction::OPCODE: visit##OPCODE((const CLASS&)I); break; |
Functions | |
| static SDValue | getCopyFromPartsVector (SelectionDAG &DAG, SDLoc DL, const SDValue *Parts, unsigned NumParts, MVT PartVT, EVT ValueVT, const Value *V) |
| getCopyFromPartsVector - Create a value that contains the specified legal parts combined into the value they represent. More... | |
| static SDValue | getCopyFromParts (SelectionDAG &DAG, SDLoc DL, const SDValue *Parts, unsigned NumParts, MVT PartVT, EVT ValueVT, const Value *V, ISD::NodeType AssertOp=ISD::DELETED_NODE) |
| getCopyFromParts - Create a value that contains the specified legal parts combined into the value they represent. More... | |
| static void | diagnosePossiblyInvalidConstraint (LLVMContext &Ctx, const Value *V, const Twine &ErrMsg) |
| static void | getCopyToPartsVector (SelectionDAG &DAG, SDLoc DL, SDValue Val, SDValue *Parts, unsigned NumParts, MVT PartVT, const Value *V) |
| getCopyToPartsVector - Create a series of nodes that contain the specified value split into legal parts. More... | |
| static void | getCopyToParts (SelectionDAG &DAG, SDLoc DL, SDValue Val, SDValue *Parts, unsigned NumParts, MVT PartVT, const Value *V, ISD::NodeType ExtendKind=ISD::ANY_EXTEND) |
| getCopyToParts - Create a series of nodes that contain the specified value split into legal parts. More... | |
| static bool | InBlock (const Value *V, const BasicBlock *BB) |
| static void | ScaleWeights (uint64_t &NewTrue, uint64_t &NewFalse) |
| Scale down both weights to fit into uint32_t. More... | |
| static bool | isSequentialInRange (const SmallVectorImpl< int > &Mask, unsigned Pos, unsigned Size, int Low) |
| static bool | getUniformBase (Value *&Ptr, SDValue &Base, SDValue &Index, SelectionDAGBuilder *SDB) |
| static SDValue | GetSignificand (SelectionDAG &DAG, SDValue Op, SDLoc dl) |
| GetSignificand - Get the significand and build it into a floating-point number with exponent of 1: More... | |
| static SDValue | GetExponent (SelectionDAG &DAG, SDValue Op, const TargetLowering &TLI, SDLoc dl) |
| GetExponent - Get the exponent: More... | |
| static SDValue | getF32Constant (SelectionDAG &DAG, unsigned Flt, SDLoc dl) |
| getF32Constant - Get 32-bit floating point constant. More... | |
| static SDValue | getLimitedPrecisionExp2 (SDValue t0, SDLoc dl, SelectionDAG &DAG) |
| static SDValue | expandExp (SDLoc dl, SDValue Op, SelectionDAG &DAG, const TargetLowering &TLI) |
| expandExp - Lower an exp intrinsic. More... | |
| static SDValue | expandLog (SDLoc dl, SDValue Op, SelectionDAG &DAG, const TargetLowering &TLI) |
| expandLog - Lower a log intrinsic. More... | |
| static SDValue | expandLog2 (SDLoc dl, SDValue Op, SelectionDAG &DAG, const TargetLowering &TLI) |
| expandLog2 - Lower a log2 intrinsic. More... | |
| static SDValue | expandLog10 (SDLoc dl, SDValue Op, SelectionDAG &DAG, const TargetLowering &TLI) |
| expandLog10 - Lower a log10 intrinsic. More... | |
| static SDValue | expandExp2 (SDLoc dl, SDValue Op, SelectionDAG &DAG, const TargetLowering &TLI) |
| expandExp2 - Lower an exp2 intrinsic. More... | |
| static SDValue | expandPow (SDLoc dl, SDValue LHS, SDValue RHS, SelectionDAG &DAG, const TargetLowering &TLI) |
| visitPow - Lower a pow intrinsic. More... | |
| static SDValue | ExpandPowI (SDLoc DL, SDValue LHS, SDValue RHS, SelectionDAG &DAG) |
| ExpandPowI - Expand a llvm.powi intrinsic. More... | |
| static unsigned | getTruncatedArgReg (const SDValue &N) |
| static bool | IsOnlyUsedInZeroEqualityComparison (const Value *V) |
| IsOnlyUsedInZeroEqualityComparison - Return true if it only matters that the value is equal or not-equal to zero. More... | |
| static SDValue | getMemCmpLoad (const Value *PtrVal, MVT LoadVT, Type *LoadTy, SelectionDAGBuilder &Builder) |
| static void | GetRegistersForValue (SelectionDAG &DAG, const TargetLowering &TLI, SDLoc DL, SDISelAsmOperandInfo &OpInfo) |
| GetRegistersForValue - Assign registers (virtual or physical) for the specified operand. More... | |
| static void | addStackMapLiveVars (ImmutableCallSite CS, unsigned StartIdx, SDLoc DL, SmallVectorImpl< SDValue > &Ops, SelectionDAGBuilder &Builder) |
| Add a stack map intrinsic call's live variable operands to a stackmap or patchpoint target node's operand list. More... | |
| static AttributeSet | getReturnAttrs (TargetLowering::CallLoweringInfo &CLI) |
| Returns an AttributeSet representing the attributes applied to the return value of the given call. More... | |
| static bool | isOnlyUsedInEntryBlock (const Argument *A, bool FastISel) |
| isOnlyUsedInEntryBlock - If the specified argument is only used in the entry block, return true. More... | |
| static bool | areJTsAllowed (const TargetLowering &TLI) |
Variables | |
| static unsigned | LimitFloatPrecision |
| LimitFloatPrecision - Generate low-precision inline sequences for some float libcalls (6, 8 or 12 bits). More... | |
| static cl::opt< unsigned, true > | LimitFPPrecision ("limit-float-precision", cl::desc("Generate low-precision inline sequences ""for some float libcalls"), cl::location(LimitFloatPrecision), cl::init(0)) |
| static cl::opt< bool > | EnableFMFInDAG ("enable-fmf-dag", cl::init(false), cl::Hidden, cl::desc("Enable fast-math-flags for DAG nodes")) |
| static const unsigned | MaxParallelChains = 64 |
| #define DEBUG_TYPE "isel" |
Definition at line 68 of file SelectionDAGBuilder.cpp.
| #define HANDLE_INST | ( | NUM, | |
| OPCODE, | |||
| CLASS | |||
| ) | case Instruction::OPCODE: visit##OPCODE((const CLASS&)I); break; |
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Add a stack map intrinsic call's live variable operands to a stackmap or patchpoint target node's operand list.
Constants are converted to TargetConstants purely as an optimization to avoid constant materialization and register allocation.
FrameIndex operands are converted to TargetFrameIndex so that ISEL does not generate addess computation nodes, and so ExpandISelPseudo can convert the TargetFrameIndex into a DirectMemRefOp StackMap location. This avoids address materialization and register allocation, but may also be required for correctness. If a StackMap (or PatchPoint) intrinsic directly uses an alloca in the entry block, then the runtime may assume that the alloca's StackMap location can be read immediately after compilation and that the location is valid at any point during execution (this is similar to the assumption made by the llvm.gcroot intrinsic). If the alloca's location were only available in a register, then the runtime would need to trap when execution reaches the StackMap in order to read the alloca's location.
Definition at line 6512 of file SelectionDAGBuilder.cpp.
References llvm::CallSiteBase< FunTy, BBTy, ValTy, UserTy, InstrTy, CallTy, InvokeTy, IterTy >::arg_size(), llvm::StackMaps::ConstantOp, llvm::SelectionDAGBuilder::DAG, llvm::CallSiteBase< FunTy, BBTy, ValTy, UserTy, InstrTy, CallTy, InvokeTy, IterTy >::getArgument(), llvm::SelectionDAG::getDataLayout(), llvm::TargetLoweringBase::getPointerTy(), llvm::SelectionDAG::getTargetConstant(), llvm::SelectionDAG::getTargetFrameIndex(), llvm::SelectionDAG::getTargetLoweringInfo(), llvm::SelectionDAGBuilder::getValue(), llvm::MVT::i64, and llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back().
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Definition at line 7460 of file SelectionDAGBuilder.cpp.
References llvm::ISD::BR_JT, llvm::ISD::BRIND, llvm::TargetLoweringBase::isOperationLegalOrCustom(), and llvm::MVT::Other.
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Definition at line 228 of file SelectionDAGBuilder.cpp.
References llvm::LLVMContext::emitError(), and I.
Referenced by getCopyFromPartsVector(), and getCopyToParts().
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expandExp - Lower an exp intrinsic.
Handles the special sequences for limited-precision mode.
Definition at line 3602 of file SelectionDAGBuilder.cpp.
References llvm::MVT::f32, llvm::ISD::FEXP, llvm::ISD::FMUL, getF32Constant(), getLimitedPrecisionExp2(), llvm::SelectionDAG::getNode(), llvm::SDValue::getValueType(), and LimitFloatPrecision.
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expandExp2 - Lower an exp2 intrinsic.
Handles the special sequences for limited-precision mode.
Definition at line 3902 of file SelectionDAGBuilder.cpp.
References llvm::MVT::f32, llvm::ISD::FEXP2, getLimitedPrecisionExp2(), llvm::SelectionDAG::getNode(), llvm::SDValue::getValueType(), and LimitFloatPrecision.
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expandLog - Lower a log intrinsic.
Handles the special sequences for limited-precision mode.
Definition at line 3623 of file SelectionDAGBuilder.cpp.
References llvm::ISD::BITCAST, llvm::MVT::f32, llvm::ISD::FADD, llvm::ISD::FLOG, llvm::ISD::FMUL, llvm::ISD::FSUB, GetExponent(), getF32Constant(), llvm::SelectionDAG::getNode(), GetSignificand(), llvm::SDValue::getValueType(), llvm::MVT::i32, LimitFloatPrecision, and X.
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expandLog10 - Lower a log10 intrinsic.
Handles the special sequences for limited-precision mode.
Definition at line 3814 of file SelectionDAGBuilder.cpp.
References llvm::ISD::BITCAST, llvm::MVT::f32, llvm::ISD::FADD, llvm::ISD::FLOG10, llvm::ISD::FMUL, llvm::ISD::FSUB, GetExponent(), getF32Constant(), llvm::SelectionDAG::getNode(), GetSignificand(), llvm::SDValue::getValueType(), llvm::MVT::i32, LimitFloatPrecision, and X.
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expandLog2 - Lower a log2 intrinsic.
Handles the special sequences for limited-precision mode.
Definition at line 3719 of file SelectionDAGBuilder.cpp.
References llvm::ISD::BITCAST, llvm::MVT::f32, llvm::ISD::FADD, llvm::ISD::FLOG2, llvm::ISD::FMUL, llvm::ISD::FSUB, GetExponent(), getF32Constant(), llvm::SelectionDAG::getNode(), GetSignificand(), llvm::SDValue::getValueType(), llvm::MVT::i32, LimitFloatPrecision, and X.
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visitPow - Lower a pow intrinsic.
Handles the special sequences for limited-precision mode with x == 10.0f.
Definition at line 3914 of file SelectionDAGBuilder.cpp.
References llvm::MVT::f32, llvm::ISD::FMUL, llvm::ISD::FPOW, getF32Constant(), getLimitedPrecisionExp2(), llvm::SelectionDAG::getNode(), llvm::SDValue::getValueType(), and LimitFloatPrecision.
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ExpandPowI - Expand a llvm.powi intrinsic.
Definition at line 3942 of file SelectionDAGBuilder.cpp.
References llvm::countPopulation(), llvm::ISD::FDIV, llvm::ISD::FMUL, llvm::ISD::FPOWI, llvm::SelectionDAG::getConstantFP(), llvm::MachineFunction::getFunction(), llvm::SelectionDAG::getMachineFunction(), llvm::SDValue::getNode(), llvm::SelectionDAG::getNode(), llvm::SDValue::getValueType(), llvm::Function::hasFnAttribute(), llvm::Log2_32(), and llvm::Attribute::OptimizeForSize.
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getCopyFromParts - Create a value that contains the specified legal parts combined into the value they represent.
If the parts combine to a type larger then ValueVT then AssertOp can be used to specify whether the extra bits are known to be zero (ISD::AssertZext) or sign extended from ValueVT (ISD::AssertSext).
Definition at line 110 of file SelectionDAGBuilder.cpp.
References llvm::ISD::ANY_EXTEND, llvm::ISD::BITCAST, llvm::EVT::bitsLT(), llvm::ISD::BUILD_PAIR, llvm::ISD::DELETED_NODE, llvm::MVT::f64, llvm::ISD::FP_EXTEND, llvm::ISD::FP_ROUND, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getContext(), getCopyFromPartsVector(), llvm::SelectionDAG::getDataLayout(), llvm::EVT::getIntegerVT(), llvm::SelectionDAG::getNode(), llvm::TargetLoweringBase::getPointerTy(), llvm::EVT::getSizeInBits(), llvm::MVT::getSizeInBits(), llvm::SelectionDAG::getTargetConstant(), llvm::SelectionDAG::getTargetLoweringInfo(), llvm::SDValue::getValueType(), llvm::SelectionDAG::getValueType(), llvm::TargetLoweringBase::hasBigEndianPartOrdering(), llvm::MipsISD::Hi, llvm::DataLayout::isBigEndian(), llvm::EVT::isFloatingPoint(), llvm::MVT::isFloatingPoint(), llvm::EVT::isInteger(), llvm::MVT::isInteger(), llvm::EVT::isVector(), llvm::MVT::isVector(), llvm_unreachable, llvm::MipsISD::Lo, llvm::Log2_32(), llvm::ISD::OR, llvm::MVT::ppcf128, llvm::ISD::SHL, std::swap(), llvm::ISD::TRUNCATE, and llvm::ISD::ZERO_EXTEND.
Referenced by getCopyFromPartsVector(), llvm::RegsForValue::getCopyFromRegs(), and llvm::TargetLowering::LowerCallTo().
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getCopyFromPartsVector - Create a value that contains the specified legal parts combined into the value they represent.
If the parts combine to a type larger then ValueVT then AssertOp can be used to specify whether the extra bits are known to be zero (ISD::AssertZext) or sign extended from ValueVT (ISD::AssertSext).
Definition at line 247 of file SelectionDAGBuilder.cpp.
References llvm::ISD::ANY_EXTEND, llvm::ISD::BITCAST, llvm::EVT::bitsLE(), llvm::ISD::BUILD_VECTOR, llvm::ISD::CONCAT_VECTORS, diagnosePossiblyInvalidConstraint(), llvm::ISD::EXTRACT_SUBVECTOR, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getContext(), getCopyFromParts(), llvm::SelectionDAG::getDataLayout(), llvm::SelectionDAG::getNode(), llvm::EVT::getScalarType(), llvm::SDValue::getSimpleValueType(), llvm::EVT::getSizeInBits(), llvm::MVT::getSizeInBits(), llvm::SelectionDAG::getTargetLoweringInfo(), llvm::SelectionDAG::getUNDEF(), llvm::SDValue::getValueType(), llvm::EVT::getVectorElementType(), llvm::TargetLoweringBase::getVectorIdxTy(), llvm::EVT::getVectorNumElements(), llvm::TargetLoweringBase::getVectorTypeBreakdown(), llvm::TargetLoweringBase::isTypeLegal(), llvm::EVT::isVector(), and llvm::ISD::TRUNCATE.
Referenced by getCopyFromParts().
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getCopyToParts - Create a series of nodes that contain the specified value split into legal parts.
If the parts contain more bits than Val, then, for integers, ExtendKind can be used to specify how to generate the extra bits.
Definition at line 358 of file SelectionDAGBuilder.cpp.
References llvm::ISD::BITCAST, diagnosePossiblyInvalidConstraint(), llvm::ISD::EXTRACT_ELEMENT, llvm::ISD::FP_EXTEND, llvm::SelectionDAG::getContext(), getCopyToPartsVector(), llvm::SelectionDAG::getDataLayout(), llvm::EVT::getIntegerVT(), llvm::SelectionDAG::getIntPtrConstant(), llvm::SelectionDAG::getNode(), llvm::EVT::getSizeInBits(), llvm::MVT::getSizeInBits(), llvm::SelectionDAG::getTargetLoweringInfo(), llvm::SDValue::getValueType(), llvm::DataLayout::isBigEndian(), llvm::EVT::isFloatingPoint(), llvm::MVT::isFloatingPoint(), llvm::EVT::isInteger(), llvm::MVT::isInteger(), llvm::TargetLoweringBase::isTypeLegal(), llvm::EVT::isVector(), llvm::Log2_32(), llvm::ISD::SRL, llvm::ISD::TRUNCATE, and llvm::MVT::x86mmx.
Referenced by getCopyToPartsVector(), llvm::RegsForValue::getCopyToRegs(), and llvm::TargetLowering::LowerCallTo().
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getCopyToPartsVector - Create a series of nodes that contain the specified value split into legal parts.
Definition at line 481 of file SelectionDAGBuilder.cpp.
References llvm::ISD::ANY_EXTEND, llvm::ISD::BITCAST, llvm::EVT::bitsGE(), llvm::EVT::bitsLE(), llvm::ISD::BUILD_VECTOR, llvm::ISD::EXTRACT_SUBVECTOR, llvm::ISD::EXTRACT_VECTOR_ELT, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getContext(), getCopyToParts(), llvm::SelectionDAG::getDataLayout(), llvm::SelectionDAG::getNode(), llvm::EVT::getSizeInBits(), llvm::MVT::getSizeInBits(), llvm::SelectionDAG::getTargetLoweringInfo(), llvm::SelectionDAG::getUNDEF(), llvm::SDValue::getValueType(), llvm::EVT::getVectorElementType(), llvm::MVT::getVectorElementType(), llvm::EVT::getVectorNumElements(), llvm::MVT::getVectorNumElements(), llvm::EVT::isVector(), llvm::MVT::isVector(), llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back(), and llvm::ISD::TRUNCATE.
Referenced by getCopyToParts().
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GetExponent - Get the exponent:
(float)(int)(((Op & 0x7f800000) >> 23) - 127);
where Op is the hexadecimal representation of floating point value.
Definition at line 3493 of file SelectionDAGBuilder.cpp.
References llvm::ISD::AND, llvm::MVT::f32, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getDataLayout(), llvm::SelectionDAG::getNode(), llvm::TargetLoweringBase::getPointerTy(), llvm::MVT::i32, llvm::ISD::SINT_TO_FP, llvm::ISD::SRL, and llvm::ISD::SUB.
Referenced by expandLog(), expandLog10(), and expandLog2().
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getF32Constant - Get 32-bit floating point constant.
Definition at line 3507 of file SelectionDAGBuilder.cpp.
References llvm::lltok::APFloat, llvm::MVT::f32, llvm::SelectionDAG::getConstantFP(), and llvm::APFloat::IEEEsingle.
Referenced by expandExp(), expandLog(), expandLog10(), expandLog2(), expandPow(), and getLimitedPrecisionExp2().
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Definition at line 3512 of file SelectionDAGBuilder.cpp.
References llvm::ISD::ADD, llvm::ISD::BITCAST, llvm::MVT::f32, llvm::ISD::FADD, llvm::ISD::FMUL, llvm::ISD::FP_TO_SINT, llvm::ISD::FSUB, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getDataLayout(), getF32Constant(), llvm::SelectionDAG::getNode(), llvm::TargetLoweringBase::getPointerTy(), llvm::SelectionDAG::getTargetLoweringInfo(), llvm::MVT::i32, LimitFloatPrecision, llvm::ISD::SHL, llvm::ISD::SINT_TO_FP, and X.
Referenced by expandExp(), expandExp2(), and expandPow().
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Definition at line 5178 of file SelectionDAGBuilder.cpp.
References llvm::SelectionDAGBuilder::AA, llvm::ConstantFoldLoadFromConstPtr(), llvm::SelectionDAGBuilder::DAG, llvm::SelectionDAGBuilder::DL, llvm::ConstantExpr::getBitCast(), llvm::SelectionDAGBuilder::getCurSDLoc(), llvm::SelectionDAG::getEntryNode(), llvm::SelectionDAG::getLoad(), llvm::SelectionDAG::getRoot(), llvm::PointerType::getUnqual(), llvm::SDValue::getValue(), llvm::SelectionDAGBuilder::getValue(), llvm::SelectionDAGBuilder::PendingLoads, and llvm::AliasAnalysis::pointsToConstantMemory().
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GetRegistersForValue - Assign registers (virtual or physical) for the specified operand.
We prefer to assign virtual registers, to allow the register allocator to handle the assignment process. However, if the asm uses features that we can't model on machineinstrs, we have SDISel do the allocation. This produces generally horrible, but correct, code.
OpInfo describes the operand.
Definition at line 5777 of file SelectionDAGBuilder.cpp.
References llvm::TargetRegisterClass::begin(), llvm::ISD::BITCAST, llvm::MachineRegisterInfo::createVirtualRegister(), llvm::TargetRegisterClass::end(), llvm::SelectionDAG::getContext(), llvm::MVT::getIntegerVT(), llvm::SelectionDAG::getMachineFunction(), llvm::SelectionDAG::getNode(), llvm::TargetLoweringBase::getNumRegisters(), llvm::TargetLowering::getRegForInlineAsmConstraint(), llvm::MachineFunction::getRegInfo(), llvm::TargetSubtargetInfo::getRegisterInfo(), llvm::MVT::getSizeInBits(), llvm::MachineFunction::getSubtarget(), I, llvm::InlineAsm::isInput, llvm::MVT::isInteger(), llvm::MVT::Other, llvm::SmallVectorTemplateBase< T, isPodLike >::push_back(), and llvm::TargetRegisterClass::vt_begin().
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Returns an AttributeSet representing the attributes applied to the return value of the given call.
Definition at line 6745 of file SelectionDAGBuilder.cpp.
References llvm::Type::getContext(), llvm::Attribute::InReg, llvm::TargetLowering::CallLoweringInfo::IsInReg, llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back(), llvm::TargetLowering::CallLoweringInfo::RetSExt, llvm::TargetLowering::CallLoweringInfo::RetTy, llvm::AttributeSet::ReturnIndex, llvm::TargetLowering::CallLoweringInfo::RetZExt, llvm::Attribute::SExt, and llvm::Attribute::ZExt.
Referenced by llvm::TargetLowering::LowerCallTo().
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GetSignificand - Get the significand and build it into a floating-point number with exponent of 1:
Op = (Op & 0x007fffff) | 0x3f800000;
where Op is the hexadecimal representation of floating point value.
Definition at line 3479 of file SelectionDAGBuilder.cpp.
References llvm::ISD::AND, llvm::ISD::BITCAST, llvm::MVT::f32, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::MVT::i32, and llvm::ISD::OR.
Referenced by expandLog(), expandLog10(), and expandLog2().
Definition at line 3995 of file SelectionDAGBuilder.cpp.
References llvm::ISD::AssertSext, llvm::ISD::AssertZext, llvm::ISD::CopyFromReg, llvm::MipsISD::Ext, llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), getReg(), and llvm::ISD::TRUNCATE.
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Definition at line 3087 of file SelectionDAGBuilder.cpp.
References llvm::SelectionDAGBuilder::DAG, llvm::dyn_cast(), llvm::ISD::EXTRACT_VECTOR_ELT, llvm::SelectionDAGBuilder::findValue(), llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getDataLayout(), llvm::ShuffleVectorInst::getMask(), llvm::SelectionDAG::getNode(), llvm::User::getOperand(), llvm::EVT::getScalarType(), llvm::SelectionDAG::getTargetLoweringInfo(), llvm::Value::getType(), llvm::SelectionDAGBuilder::getValue(), llvm::SDValue::getValueType(), llvm::TargetLoweringBase::getVectorIdxTy(), llvm::Constant::isNullValue(), llvm::Type::isVectorTy(), and llvm::SelectionDAGBuilder::setValue().
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Definition at line 1356 of file SelectionDAGBuilder.cpp.
References llvm::Instruction::getParent().
Referenced by llvm::SelectionDAGBuilder::FindMergedConditions().
isOnlyUsedInEntryBlock - If the specified argument is only used in the entry block, return true.
This includes arguments used by switches, since the switch may expand into multiple basic blocks.
Definition at line 7066 of file SelectionDAGBuilder.cpp.
References llvm::Function::begin(), llvm::Argument::getParent(), llvm::Value::use_empty(), and llvm::Value::users().
IsOnlyUsedInZeroEqualityComparison - Return true if it only matters that the value is equal or not-equal to zero.
Definition at line 5165 of file SelectionDAGBuilder.cpp.
References llvm::CallingConv::C, and llvm::Value::users().
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Definition at line 2485 of file SelectionDAGBuilder.cpp.
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Scale down both weights to fit into uint32_t.
Definition at line 1411 of file SelectionDAGBuilder.cpp.
Referenced by llvm::SelectionDAGBuilder::FindMergedConditions().
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LimitFloatPrecision - Generate low-precision inline sequences for some float libcalls (6, 8 or 12 bits).
Definition at line 72 of file SelectionDAGBuilder.cpp.
Referenced by expandExp(), expandExp2(), expandLog(), expandLog10(), expandLog2(), expandPow(), and getLimitedPrecisionExp2().
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Definition at line 99 of file SelectionDAGBuilder.cpp.
1.8.6