LLVM  3.7.0
Enumerations | Functions
llvm::X86 Namespace Reference

Define some predicates that are used for node matching. More...

Enumerations

enum  {
  BX_SI = 500, BX_DI = 501, BP_SI = 502, BP_DI = 503,
  sib = 504, sib64 = 505
}
 
enum  {
  AddrBaseReg = 0, AddrScaleAmt = 1, AddrIndexReg = 2, AddrDisp = 3,
  AddrSegmentReg = 4, AddrNumOperands = 5
}
 
enum  Fixups {
  reloc_riprel_4byte = FirstTargetFixupKind, reloc_riprel_4byte_movq_load, reloc_signed_4byte, reloc_global_offset_table,
  reloc_global_offset_table8, LastTargetFixupKind, NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind
}
 
enum  CondCode {
  COND_A = 0, COND_AE = 1, COND_B = 2, COND_BE = 3,
  COND_E = 4, COND_G = 5, COND_GE = 6, COND_L = 7,
  COND_LE = 8, COND_NE = 9, COND_NO = 10, COND_NP = 11,
  COND_NS = 12, COND_O = 13, COND_P = 14, COND_S = 15,
  LAST_VALID_COND = COND_S, COND_NE_OR_P, COND_NP_OR_E, COND_INVALID
}
 
enum  STATIC_ROUNDING {
  TO_NEAREST_INT = 0, TO_NEG_INF = 1, TO_POS_INF = 2, TO_ZERO = 3,
  CUR_DIRECTION = 4
}
 AVX512 static rounding constants. More...
 

Functions

unsigned GetCondBranchFromCond (CondCode CC)
 
unsigned getSETFromCond (CondCode CC, bool HasMemoryOperand=false)
 Return a set opcode for the given condition and whether it has a memory operand. More...
 
unsigned getCMovFromCond (CondCode CC, unsigned RegBytes, bool HasMemoryOperand=false)
 Return a cmov opcode for the given condition, register size in bytes, and operand type. More...
 
CondCode getCondFromCMovOpc (unsigned Opc)
 Return condition code of a CMov opcode. More...
 
CondCode GetOppositeBranchCondition (CondCode CC)
 GetOppositeBranchCondition - Return the inverse of the specified cond, e.g. More...
 
bool isVEXTRACT128Index (SDNode *N)
 Return true if the specified EXTRACT_SUBVECTOR operand specifies a vector extract that is suitable for input to VEXTRACTF128, VEXTRACTI128 instructions. More...
 
bool isVINSERT128Index (SDNode *N)
 Return true if the specified INSERT_SUBVECTOR operand specifies a subvector insert that is suitable for input to VINSERTF128, VINSERTI128 instructions. More...
 
bool isVEXTRACT256Index (SDNode *N)
 Return true if the specified EXTRACT_SUBVECTOR operand specifies a vector extract that is suitable for input to VEXTRACTF64X4, VEXTRACTI64X4 instructions. More...
 
bool isVINSERT256Index (SDNode *N)
 Return true if the specified INSERT_SUBVECTOR operand specifies a subvector insert that is suitable for input to VINSERTF64X4, VINSERTI64X4 instructions. More...
 
unsigned getExtractVEXTRACT128Immediate (SDNode *N)
 Return the appropriate immediate to extract the specified EXTRACT_SUBVECTOR index with VEXTRACTF128, VEXTRACTI128 instructions. More...
 
unsigned getInsertVINSERT128Immediate (SDNode *N)
 Return the appropriate immediate to insert at the specified INSERT_SUBVECTOR index with VINSERTF128, VINSERT128 instructions. More...
 
unsigned getExtractVEXTRACT256Immediate (SDNode *N)
 Return the appropriate immediate to extract the specified EXTRACT_SUBVECTOR index with VEXTRACTF64X4, VEXTRACTI64x4 instructions. More...
 
unsigned getInsertVINSERT256Immediate (SDNode *N)
 Return the appropriate immediate to insert at the specified INSERT_SUBVECTOR index with VINSERTF64x4, VINSERTI64x4 instructions. More...
 
bool isZeroNode (SDValue Elt)
 Returns true if Elt is a constant zero or floating point constant +0.0. More...
 
bool isOffsetSuitableForCodeModel (int64_t Offset, CodeModel::Model M, bool hasSymbolicDisplacement=true)
 Returns true of the given offset can be fit into displacement field of the instruction. More...
 
bool isCalleePop (CallingConv::ID CallingConv, bool is64Bit, bool IsVarArg, bool TailCallOpt)
 Determines whether the callee is required to pop its own arguments. More...
 
FastISelcreateFastISel (FunctionLoweringInfo &funcInfo, const TargetLibraryInfo *libInfo)
 

Detailed Description

Define some predicates that are used for node matching.

Enumeration Type Documentation

anonymous enum
Enumerator
BX_SI 
BX_DI 
BP_SI 
BP_DI 
sib 
sib64 

Definition at line 60 of file X86Disassembler.cpp.

anonymous enum
Enumerator
AddrBaseReg 
AddrScaleAmt 
AddrIndexReg 
AddrDisp 
AddrSegmentReg 

AddrSegmentReg - The operand # of the segment in the memory operand.

AddrNumOperands 

AddrNumOperands - Total number of operands in a memory reference.

Definition at line 32 of file X86BaseInfo.h.

Enumerator
COND_A 
COND_AE 
COND_B 
COND_BE 
COND_E 
COND_G 
COND_GE 
COND_L 
COND_LE 
COND_NE 
COND_NO 
COND_NP 
COND_NS 
COND_O 
COND_P 
COND_S 
LAST_VALID_COND 
COND_NE_OR_P 
COND_NP_OR_E 
COND_INVALID 

Definition at line 45 of file X86InstrInfo.h.

Enumerator
reloc_riprel_4byte 
reloc_riprel_4byte_movq_load 
reloc_signed_4byte 
reloc_global_offset_table 
reloc_global_offset_table8 
LastTargetFixupKind 
NumTargetFixupKinds 

Definition at line 17 of file X86FixupKinds.h.

AVX512 static rounding constants.

These need to match the values in avx512fintrin.h.

Enumerator
TO_NEAREST_INT 
TO_NEG_INF 
TO_POS_INF 
TO_ZERO 
CUR_DIRECTION 

Definition at line 585 of file X86ISelLowering.h.

Function Documentation

FastISel * llvm::X86::createFastISel ( FunctionLoweringInfo funcInfo,
const TargetLibraryInfo libInfo 
)

Definition at line 3567 of file X86FastISel.cpp.

Referenced by llvm::X86TargetLowering::createFastISel().

unsigned llvm::X86::getCMovFromCond ( CondCode  CC,
unsigned  RegBytes,
bool  HasMemoryOperand = false 
)

Return a cmov opcode for the given condition, register size in bytes, and operand type.

Definition at line 3378 of file X86InstrInfo.cpp.

References llvm_unreachable.

Referenced by llvm::X86InstrInfo::insertSelect(), and llvm::X86InstrInfo::optimizeCompareInstr().

unsigned llvm::X86::GetCondBranchFromCond ( X86::CondCode  CC)
X86::CondCode llvm::X86::getCondFromCMovOpc ( unsigned  Opc)

Return condition code of a CMov opcode.

Definition at line 3232 of file X86InstrInfo.cpp.

References COND_A, COND_AE, COND_B, COND_BE, COND_E, COND_G, COND_GE, COND_INVALID, COND_L, COND_LE, COND_NE, COND_NO, COND_NP, COND_NS, COND_O, COND_P, and COND_S.

Referenced by llvm::X86InstrInfo::optimizeCompareInstr().

unsigned llvm::X86::getExtractVEXTRACT128Immediate ( SDNode N)

Return the appropriate immediate to extract the specified EXTRACT_SUBVECTOR index with VEXTRACTF128, VEXTRACTI128 instructions.

getExtractVEXTRACT128Immediate - Return the appropriate immediate to extract the specified EXTRACT_SUBVECTOR index with VEXTRACTF128 and VINSERTI128 instructions.

Definition at line 4091 of file X86ISelLowering.cpp.

References getExtractVEXTRACTImmediate().

unsigned llvm::X86::getExtractVEXTRACT256Immediate ( SDNode N)

Return the appropriate immediate to extract the specified EXTRACT_SUBVECTOR index with VEXTRACTF64X4, VEXTRACTI64x4 instructions.

getExtractVEXTRACT256Immediate - Return the appropriate immediate to extract the specified EXTRACT_SUBVECTOR index with VEXTRACTF64x4 and VINSERTI64x4 instructions.

Definition at line 4098 of file X86ISelLowering.cpp.

References getExtractVEXTRACTImmediate().

unsigned llvm::X86::getInsertVINSERT128Immediate ( SDNode N)

Return the appropriate immediate to insert at the specified INSERT_SUBVECTOR index with VINSERTF128, VINSERT128 instructions.

getInsertVINSERT128Immediate - Return the appropriate immediate to insert at the specified INSERT_SUBVECTOR index with VINSERTF128 and VINSERTI128 instructions.

Definition at line 4105 of file X86ISelLowering.cpp.

References getInsertVINSERTImmediate().

unsigned llvm::X86::getInsertVINSERT256Immediate ( SDNode N)

Return the appropriate immediate to insert at the specified INSERT_SUBVECTOR index with VINSERTF64x4, VINSERTI64x4 instructions.

getInsertVINSERT256Immediate - Return the appropriate immediate to insert at the specified INSERT_SUBVECTOR index with VINSERTF46x4 and VINSERTI64x4 instructions.

Definition at line 4112 of file X86ISelLowering.cpp.

References getInsertVINSERTImmediate().

X86::CondCode llvm::X86::GetOppositeBranchCondition ( X86::CondCode  CC)

GetOppositeBranchCondition - Return the inverse of the specified cond, e.g.

Return the inverse of the specified condition, e.g.

turning COND_E to COND_NE.

Definition at line 3310 of file X86InstrInfo.cpp.

References COND_A, COND_AE, COND_B, COND_BE, COND_E, COND_G, COND_GE, COND_L, COND_LE, COND_NE, COND_NO, COND_NP, COND_NS, COND_O, COND_P, COND_S, and llvm_unreachable.

unsigned llvm::X86::getSETFromCond ( CondCode  CC,
bool  HasMemoryOperand = false 
)

Return a set opcode for the given condition and whether it has a memory operand.

Return a set opcode for the given condition and whether it has memory operand.

Definition at line 3352 of file X86InstrInfo.cpp.

References LAST_VALID_COND.

Referenced by llvm::X86InstrInfo::optimizeCompareInstr().

bool llvm::X86::isCalleePop ( CallingConv::ID  CallingConv,
bool  is64Bit,
bool  IsVarArg,
bool  TailCallOpt 
)

Determines whether the callee is required to pop its own arguments.

isCalleePop - Determines whether the callee is required to pop its own arguments.

Callee pop is necessary to support tail calls.

Definition at line 3777 of file X86ISelLowering.cpp.

References llvm::CallingConv::Fast, llvm::CallingConv::GHC, llvm::CallingConv::HiPE, is64Bit(), llvm::CallingConv::X86_FastCall, llvm::CallingConv::X86_StdCall, and llvm::CallingConv::X86_ThisCall.

bool llvm::X86::isOffsetSuitableForCodeModel ( int64_t  Offset,
CodeModel::Model  M,
bool  hasSymbolicDisplacement = true 
)

Returns true of the given offset can be fit into displacement field of the instruction.

Definition at line 3745 of file X86ISelLowering.cpp.

References llvm::isInt< 32 >(), llvm::CodeModel::Kernel, and llvm::CodeModel::Small.

Referenced by llvm::X86TargetLowering::isLegalAddressingMode().

bool llvm::X86::isVEXTRACT128Index ( SDNode N)

Return true if the specified EXTRACT_SUBVECTOR operand specifies a vector extract that is suitable for input to VEXTRACTF128, VEXTRACTI128 instructions.

Definition at line 4050 of file X86ISelLowering.cpp.

References isVEXTRACTIndex().

bool llvm::X86::isVEXTRACT256Index ( SDNode N)

Return true if the specified EXTRACT_SUBVECTOR operand specifies a vector extract that is suitable for input to VEXTRACTF64X4, VEXTRACTI64X4 instructions.

Definition at line 4054 of file X86ISelLowering.cpp.

References isVEXTRACTIndex().

bool llvm::X86::isVINSERT128Index ( SDNode N)

Return true if the specified INSERT_SUBVECTOR operand specifies a subvector insert that is suitable for input to VINSERTF128, VINSERTI128 instructions.

Definition at line 4042 of file X86ISelLowering.cpp.

References isVINSERTIndex().

bool llvm::X86::isVINSERT256Index ( SDNode N)

Return true if the specified INSERT_SUBVECTOR operand specifies a subvector insert that is suitable for input to VINSERTF64X4, VINSERTI64X4 instructions.

Definition at line 4046 of file X86ISelLowering.cpp.

References isVINSERTIndex().

bool llvm::X86::isZeroNode ( SDValue  Elt)

Returns true if Elt is a constant zero or floating point constant +0.0.

isZeroNode - Returns true if Elt is a constant zero or a floating point constant +0.0.

Definition at line 4124 of file X86ISelLowering.cpp.

References isZero().

Referenced by computeZeroableShuffleElements(), getAtomicLoadArithTargetConstant(), LowerBuildVectorv4x32(), OptimizeConditionalInDecrement(), and PerformADCCombine().