LLVM  3.7.0
MipsAsmPrinter.cpp
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1 //===-- MipsAsmPrinter.cpp - Mips LLVM Assembly Printer -------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains a printer that converts from our internal representation
11 // of machine-dependent LLVM code to GAS-format MIPS assembly language.
12 //
13 //===----------------------------------------------------------------------===//
14 
18 #include "Mips.h"
19 #include "MipsAsmPrinter.h"
20 #include "MipsInstrInfo.h"
21 #include "MipsMCInstLower.h"
22 #include "MipsTargetMachine.h"
23 #include "MipsTargetStreamer.h"
24 #include "llvm/ADT/SmallString.h"
25 #include "llvm/ADT/Twine.h"
32 #include "llvm/IR/BasicBlock.h"
33 #include "llvm/IR/DataLayout.h"
34 #include "llvm/IR/InlineAsm.h"
35 #include "llvm/IR/Instructions.h"
36 #include "llvm/IR/Mangler.h"
37 #include "llvm/MC/MCAsmInfo.h"
38 #include "llvm/MC/MCContext.h"
39 #include "llvm/MC/MCELFStreamer.h"
40 #include "llvm/MC/MCExpr.h"
41 #include "llvm/MC/MCInst.h"
42 #include "llvm/MC/MCSection.h"
43 #include "llvm/MC/MCSectionELF.h"
44 #include "llvm/MC/MCSymbolELF.h"
45 #include "llvm/Support/ELF.h"
50 #include <string>
51 
52 using namespace llvm;
53 
54 #define DEBUG_TYPE "mips-asm-printer"
55 
56 MipsTargetStreamer &MipsAsmPrinter::getTargetStreamer() const {
57  return static_cast<MipsTargetStreamer &>(*OutStreamer->getTargetStreamer());
58 }
59 
62 
63  // Initialize TargetLoweringObjectFile.
65  .Initialize(OutContext, TM);
66 
68  if (Subtarget->inMips16Mode())
69  for (std::map<
70  const char *,
71  const llvm::Mips16HardFloatInfo::FuncSignature *>::const_iterator
72  it = MipsFI->StubsNeeded.begin();
73  it != MipsFI->StubsNeeded.end(); ++it) {
74  const char *Symbol = it->first;
75  const llvm::Mips16HardFloatInfo::FuncSignature *Signature = it->second;
76  if (StubsNeeded.find(Symbol) == StubsNeeded.end())
77  StubsNeeded[Symbol] = Signature;
78  }
79  MCP = MF.getConstantPool();
80 
81  // In NaCl, all indirect jump targets must be aligned to bundle size.
82  if (Subtarget->isTargetNaCl())
83  NaClAlignIndirectJumpTargets(MF);
84 
86  return true;
87 }
88 
89 bool MipsAsmPrinter::lowerOperand(const MachineOperand &MO, MCOperand &MCOp) {
90  MCOp = MCInstLowering.LowerOperand(MO);
91  return MCOp.isValid();
92 }
93 
94 #include "MipsGenMCPseudoLowering.inc"
95 
96 // Lower PseudoReturn/PseudoIndirectBranch/PseudoIndirectBranch64 to JR, JR_MM,
97 // JALR, or JALR64 as appropriate for the target
98 void MipsAsmPrinter::emitPseudoIndirectBranch(MCStreamer &OutStreamer,
99  const MachineInstr *MI) {
100  bool HasLinkReg = false;
101  MCInst TmpInst0;
102 
103  if (Subtarget->hasMips64r6()) {
104  // MIPS64r6 should use (JALR64 ZERO_64, $rs)
105  TmpInst0.setOpcode(Mips::JALR64);
106  HasLinkReg = true;
107  } else if (Subtarget->hasMips32r6()) {
108  // MIPS32r6 should use (JALR ZERO, $rs)
109  TmpInst0.setOpcode(Mips::JALR);
110  HasLinkReg = true;
111  } else if (Subtarget->inMicroMipsMode())
112  // microMIPS should use (JR_MM $rs)
113  TmpInst0.setOpcode(Mips::JR_MM);
114  else {
115  // Everything else should use (JR $rs)
116  TmpInst0.setOpcode(Mips::JR);
117  }
118 
119  MCOperand MCOp;
120 
121  if (HasLinkReg) {
122  unsigned ZeroReg = Subtarget->isGP64bit() ? Mips::ZERO_64 : Mips::ZERO;
123  TmpInst0.addOperand(MCOperand::createReg(ZeroReg));
124  }
125 
126  lowerOperand(MI->getOperand(0), MCOp);
127  TmpInst0.addOperand(MCOp);
128 
129  EmitToStreamer(OutStreamer, TmpInst0);
130 }
131 
133  MipsTargetStreamer &TS = getTargetStreamer();
135 
136  if (MI->isDebugValue()) {
137  SmallString<128> Str;
138  raw_svector_ostream OS(Str);
139 
140  PrintDebugValueComment(MI, OS);
141  return;
142  }
143 
144  // If we just ended a constant pool, mark it as such.
145  if (InConstantPool && MI->getOpcode() != Mips::CONSTPOOL_ENTRY) {
146  OutStreamer->EmitDataRegion(MCDR_DataRegionEnd);
147  InConstantPool = false;
148  }
149  if (MI->getOpcode() == Mips::CONSTPOOL_ENTRY) {
150  // CONSTPOOL_ENTRY - This instruction represents a floating
151  //constant pool in the function. The first operand is the ID#
152  // for this instruction, the second is the index into the
153  // MachineConstantPool that this is, the third is the size in
154  // bytes of this constant pool entry.
155  // The required alignment is specified on the basic block holding this MI.
156  //
157  unsigned LabelId = (unsigned)MI->getOperand(0).getImm();
158  unsigned CPIdx = (unsigned)MI->getOperand(1).getIndex();
159 
160  // If this is the first entry of the pool, mark it.
161  if (!InConstantPool) {
162  OutStreamer->EmitDataRegion(MCDR_DataRegion);
163  InConstantPool = true;
164  }
165 
166  OutStreamer->EmitLabel(GetCPISymbol(LabelId));
167 
168  const MachineConstantPoolEntry &MCPE = MCP->getConstants()[CPIdx];
169  if (MCPE.isMachineConstantPoolEntry())
171  else
173  return;
174  }
175 
176 
179 
180  do {
181  // Do any auto-generated pseudo lowerings.
182  if (emitPseudoExpansionLowering(*OutStreamer, &*I))
183  continue;
184 
185  if (I->getOpcode() == Mips::PseudoReturn ||
186  I->getOpcode() == Mips::PseudoReturn64 ||
187  I->getOpcode() == Mips::PseudoIndirectBranch ||
188  I->getOpcode() == Mips::PseudoIndirectBranch64) {
189  emitPseudoIndirectBranch(*OutStreamer, &*I);
190  continue;
191  }
192 
193  // The inMips16Mode() test is not permanent.
194  // Some instructions are marked as pseudo right now which
195  // would make the test fail for the wrong reason but
196  // that will be fixed soon. We need this here because we are
197  // removing another test for this situation downstream in the
198  // callchain.
199  //
200  if (I->isPseudo() && !Subtarget->inMips16Mode()
201  && !isLongBranchPseudo(I->getOpcode()))
202  llvm_unreachable("Pseudo opcode found in EmitInstruction()");
203 
204  MCInst TmpInst0;
205  MCInstLowering.Lower(I, TmpInst0);
206  EmitToStreamer(*OutStreamer, TmpInst0);
207  } while ((++I != E) && I->isInsideBundle()); // Delay slot check
208 }
209 
210 //===----------------------------------------------------------------------===//
211 //
212 // Mips Asm Directives
213 //
214 // -- Frame directive "frame Stackpointer, Stacksize, RARegister"
215 // Describe the stack frame.
216 //
217 // -- Mask directives "(f)mask bitmask, offset"
218 // Tells the assembler which registers are saved and where.
219 // bitmask - contain a little endian bitset indicating which registers are
220 // saved on function prologue (e.g. with a 0x80000000 mask, the
221 // assembler knows the register 31 (RA) is saved at prologue.
222 // offset - the position before stack pointer subtraction indicating where
223 // the first saved register on prologue is located. (e.g. with a
224 //
225 // Consider the following function prologue:
226 //
227 // .frame $fp,48,$ra
228 // .mask 0xc0000000,-8
229 // addiu $sp, $sp, -48
230 // sw $ra, 40($sp)
231 // sw $fp, 36($sp)
232 //
233 // With a 0xc0000000 mask, the assembler knows the register 31 (RA) and
234 // 30 (FP) are saved at prologue. As the save order on prologue is from
235 // left to right, RA is saved first. A -8 offset means that after the
236 // stack pointer subtration, the first register in the mask (RA) will be
237 // saved at address 48-8=40.
238 //
239 //===----------------------------------------------------------------------===//
240 
241 //===----------------------------------------------------------------------===//
242 // Mask directives
243 //===----------------------------------------------------------------------===//
244 
245 // Create a bitmask with all callee saved registers for CPU or Floating Point
246 // registers. For CPU registers consider RA, GP and FP for saving if necessary.
248  // CPU and FPU Saved Registers Bitmasks
249  unsigned CPUBitmask = 0, FPUBitmask = 0;
250  int CPUTopSavedRegOff, FPUTopSavedRegOff;
251 
252  // Set the CPU and FPU Bitmasks
253  const MachineFrameInfo *MFI = MF->getFrameInfo();
255  const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
256  // size of stack area to which FP callee-saved regs are saved.
257  unsigned CPURegSize = Mips::GPR32RegClass.getSize();
258  unsigned FGR32RegSize = Mips::FGR32RegClass.getSize();
259  unsigned AFGR64RegSize = Mips::AFGR64RegClass.getSize();
260  bool HasAFGR64Reg = false;
261  unsigned CSFPRegsSize = 0;
262 
263  for (const auto &I : CSI) {
264  unsigned Reg = I.getReg();
265  unsigned RegNum = TRI->getEncodingValue(Reg);
266 
267  // If it's a floating point register, set the FPU Bitmask.
268  // If it's a general purpose register, set the CPU Bitmask.
269  if (Mips::FGR32RegClass.contains(Reg)) {
270  FPUBitmask |= (1 << RegNum);
271  CSFPRegsSize += FGR32RegSize;
272  } else if (Mips::AFGR64RegClass.contains(Reg)) {
273  FPUBitmask |= (3 << RegNum);
274  CSFPRegsSize += AFGR64RegSize;
275  HasAFGR64Reg = true;
276  } else if (Mips::GPR32RegClass.contains(Reg))
277  CPUBitmask |= (1 << RegNum);
278  }
279 
280  // FP Regs are saved right below where the virtual frame pointer points to.
281  FPUTopSavedRegOff = FPUBitmask ?
282  (HasAFGR64Reg ? -AFGR64RegSize : -FGR32RegSize) : 0;
283 
284  // CPU Regs are saved below FP Regs.
285  CPUTopSavedRegOff = CPUBitmask ? -CSFPRegsSize - CPURegSize : 0;
286 
287  MipsTargetStreamer &TS = getTargetStreamer();
288  // Print CPUBitmask
289  TS.emitMask(CPUBitmask, CPUTopSavedRegOff);
290 
291  // Print FPUBitmask
292  TS.emitFMask(FPUBitmask, FPUTopSavedRegOff);
293 }
294 
295 //===----------------------------------------------------------------------===//
296 // Frame and Set directives
297 //===----------------------------------------------------------------------===//
298 
299 /// Frame Directive
302 
303  unsigned stackReg = RI.getFrameRegister(*MF);
304  unsigned returnReg = RI.getRARegister();
305  unsigned stackSize = MF->getFrameInfo()->getStackSize();
306 
307  getTargetStreamer().emitFrame(stackReg, stackSize, returnReg);
308 }
309 
310 /// Emit Set directives.
312  switch (static_cast<MipsTargetMachine &>(TM).getABI().GetEnumValue()) {
313  case MipsABIInfo::ABI::O32: return "abi32";
314  case MipsABIInfo::ABI::N32: return "abiN32";
315  case MipsABIInfo::ABI::N64: return "abi64";
316  case MipsABIInfo::ABI::EABI: return "eabi32"; // TODO: handle eabi64
317  default: llvm_unreachable("Unknown Mips ABI");
318  }
319 }
320 
322  MipsTargetStreamer &TS = getTargetStreamer();
323 
324  // NaCl sandboxing requires that indirect call instructions are masked.
325  // This means that function entry points should be bundle-aligned.
326  if (Subtarget->isTargetNaCl())
328 
329  if (Subtarget->inMicroMipsMode())
331  else
333 
334  if (Subtarget->inMips16Mode())
336  else
338 
340  OutStreamer->EmitLabel(CurrentFnSym);
341 }
342 
343 /// EmitFunctionBodyStart - Targets can override this to emit stuff before
344 /// the first basic block in the function.
346  MipsTargetStreamer &TS = getTargetStreamer();
347 
349 
350  bool IsNakedFunction = MF->getFunction()->hasFnAttribute(Attribute::Naked);
351  if (!IsNakedFunction)
353 
354  if (!IsNakedFunction)
356 
357  if (!Subtarget->inMips16Mode()) {
361  }
362 }
363 
364 /// EmitFunctionBodyEnd - Targets can override this to emit stuff after
365 /// the last basic block in the function.
367  MipsTargetStreamer &TS = getTargetStreamer();
368 
369  // There are instruction for this macros, but they must
370  // always be at the function end, and we can't emit and
371  // break with BB logic.
372  if (!Subtarget->inMips16Mode()) {
373  TS.emitDirectiveSetAt();
376  }
378  // Make sure to terminate any constant pools that were at the end
379  // of the function.
380  if (!InConstantPool)
381  return;
382  InConstantPool = false;
383  OutStreamer->EmitDataRegion(MCDR_DataRegionEnd);
384 }
385 
387  MipsTargetStreamer &TS = getTargetStreamer();
388  if (MBB.size() == 0)
389  TS.emitDirectiveInsn();
390 }
391 
392 /// isBlockOnlyReachableByFallthough - Return true if the basic block has
393 /// exactly one predecessor and the control transfer mechanism between
394 /// the predecessor and this block is a fall-through.
396  MBB) const {
397  // The predecessor has to be immediately before this block.
398  const MachineBasicBlock *Pred = *MBB->pred_begin();
399 
400  // If the predecessor is a switch statement, assume a jump table
401  // implementation, so it is not a fall through.
402  if (const BasicBlock *bb = Pred->getBasicBlock())
403  if (isa<SwitchInst>(bb->getTerminator()))
404  return false;
405 
406  // If this is a landing pad, it isn't a fall through. If it has no preds,
407  // then nothing falls through to it.
408  if (MBB->isLandingPad() || MBB->pred_empty())
409  return false;
410 
411  // If there isn't exactly one predecessor, it can't be a fall through.
413  ++PI2;
414 
415  if (PI2 != MBB->pred_end())
416  return false;
417 
418  // The predecessor has to be immediately before this block.
419  if (!Pred->isLayoutSuccessor(MBB))
420  return false;
421 
422  // If the block is completely empty, then it definitely does fall through.
423  if (Pred->empty())
424  return true;
425 
426  // Otherwise, check the last instruction.
427  // Check if the last terminator is an unconditional branch.
429  while (I != Pred->begin() && !(--I)->isTerminator()) ;
430 
431  return !I->isBarrier();
432 }
433 
434 // Print out an operand for an inline asm expression.
435 bool MipsAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
436  unsigned AsmVariant, const char *ExtraCode,
437  raw_ostream &O) {
438  // Does this asm operand have a single letter operand modifier?
439  if (ExtraCode && ExtraCode[0]) {
440  if (ExtraCode[1] != 0) return true; // Unknown modifier.
441 
442  const MachineOperand &MO = MI->getOperand(OpNum);
443  switch (ExtraCode[0]) {
444  default:
445  // See if this is a generic print operand
446  return AsmPrinter::PrintAsmOperand(MI,OpNum,AsmVariant,ExtraCode,O);
447  case 'X': // hex const int
449  return true;
450  O << "0x" << Twine::utohexstr(MO.getImm());
451  return false;
452  case 'x': // hex const int (low 16 bits)
454  return true;
455  O << "0x" << Twine::utohexstr(MO.getImm() & 0xffff);
456  return false;
457  case 'd': // decimal const int
459  return true;
460  O << MO.getImm();
461  return false;
462  case 'm': // decimal const int minus 1
464  return true;
465  O << MO.getImm() - 1;
466  return false;
467  case 'z': {
468  // $0 if zero, regular printing otherwise
469  if (MO.getType() == MachineOperand::MO_Immediate && MO.getImm() == 0) {
470  O << "$0";
471  return false;
472  }
473  // If not, call printOperand as normal.
474  break;
475  }
476  case 'D': // Second part of a double word register operand
477  case 'L': // Low order register of a double word register operand
478  case 'M': // High order register of a double word register operand
479  {
480  if (OpNum == 0)
481  return true;
482  const MachineOperand &FlagsOP = MI->getOperand(OpNum - 1);
483  if (!FlagsOP.isImm())
484  return true;
485  unsigned Flags = FlagsOP.getImm();
486  unsigned NumVals = InlineAsm::getNumOperandRegisters(Flags);
487  // Number of registers represented by this operand. We are looking
488  // for 2 for 32 bit mode and 1 for 64 bit mode.
489  if (NumVals != 2) {
490  if (Subtarget->isGP64bit() && NumVals == 1 && MO.isReg()) {
491  unsigned Reg = MO.getReg();
492  O << '$' << MipsInstPrinter::getRegisterName(Reg);
493  return false;
494  }
495  return true;
496  }
497 
498  unsigned RegOp = OpNum;
499  if (!Subtarget->isGP64bit()){
500  // Endianess reverses which register holds the high or low value
501  // between M and L.
502  switch(ExtraCode[0]) {
503  case 'M':
504  RegOp = (Subtarget->isLittle()) ? OpNum + 1 : OpNum;
505  break;
506  case 'L':
507  RegOp = (Subtarget->isLittle()) ? OpNum : OpNum + 1;
508  break;
509  case 'D': // Always the second part
510  RegOp = OpNum + 1;
511  }
512  if (RegOp >= MI->getNumOperands())
513  return true;
514  const MachineOperand &MO = MI->getOperand(RegOp);
515  if (!MO.isReg())
516  return true;
517  unsigned Reg = MO.getReg();
518  O << '$' << MipsInstPrinter::getRegisterName(Reg);
519  return false;
520  }
521  }
522  case 'w':
523  // Print MSA registers for the 'f' constraint
524  // In LLVM, the 'w' modifier doesn't need to do anything.
525  // We can just call printOperand as normal.
526  break;
527  }
528  }
529 
530  printOperand(MI, OpNum, O);
531  return false;
532 }
533 
535  unsigned OpNum, unsigned AsmVariant,
536  const char *ExtraCode,
537  raw_ostream &O) {
538  assert(OpNum + 1 < MI->getNumOperands() && "Insufficient operands");
539  const MachineOperand &BaseMO = MI->getOperand(OpNum);
540  const MachineOperand &OffsetMO = MI->getOperand(OpNum + 1);
541  assert(BaseMO.isReg() && "Unexpected base pointer for inline asm memory operand.");
542  assert(OffsetMO.isImm() && "Unexpected offset for inline asm memory operand.");
543  int Offset = OffsetMO.getImm();
544 
545  // Currently we are expecting either no ExtraCode or 'D'
546  if (ExtraCode) {
547  if (ExtraCode[0] == 'D')
548  Offset += 4;
549  else
550  return true; // Unknown modifier.
551  // FIXME: M = high order bits
552  // FIXME: L = low order bits
553  }
554 
555  O << Offset << "($" << MipsInstPrinter::getRegisterName(BaseMO.getReg()) << ")";
556 
557  return false;
558 }
559 
560 void MipsAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
561  raw_ostream &O) {
562  const DataLayout *DL = TM.getDataLayout();
563  const MachineOperand &MO = MI->getOperand(opNum);
564  bool closeP = false;
565 
566  if (MO.getTargetFlags())
567  closeP = true;
568 
569  switch(MO.getTargetFlags()) {
570  case MipsII::MO_GPREL: O << "%gp_rel("; break;
571  case MipsII::MO_GOT_CALL: O << "%call16("; break;
572  case MipsII::MO_GOT: O << "%got("; break;
573  case MipsII::MO_ABS_HI: O << "%hi("; break;
574  case MipsII::MO_ABS_LO: O << "%lo("; break;
575  case MipsII::MO_TLSGD: O << "%tlsgd("; break;
576  case MipsII::MO_GOTTPREL: O << "%gottprel("; break;
577  case MipsII::MO_TPREL_HI: O << "%tprel_hi("; break;
578  case MipsII::MO_TPREL_LO: O << "%tprel_lo("; break;
579  case MipsII::MO_GPOFF_HI: O << "%hi(%neg(%gp_rel("; break;
580  case MipsII::MO_GPOFF_LO: O << "%lo(%neg(%gp_rel("; break;
581  case MipsII::MO_GOT_DISP: O << "%got_disp("; break;
582  case MipsII::MO_GOT_PAGE: O << "%got_page("; break;
583  case MipsII::MO_GOT_OFST: O << "%got_ofst("; break;
584  }
585 
586  switch (MO.getType()) {
588  O << '$'
590  break;
591 
593  O << MO.getImm();
594  break;
595 
597  MO.getMBB()->getSymbol()->print(O, MAI);
598  return;
599 
601  getSymbol(MO.getGlobal())->print(O, MAI);
602  break;
603 
606  O << BA->getName();
607  break;
608  }
609 
611  O << DL->getPrivateGlobalPrefix() << "CPI"
612  << getFunctionNumber() << "_" << MO.getIndex();
613  if (MO.getOffset())
614  O << "+" << MO.getOffset();
615  break;
616 
617  default:
618  llvm_unreachable("<unknown operand type>");
619  }
620 
621  if (closeP) O << ")";
622 }
623 
625  raw_ostream &O) {
626  const MachineOperand &MO = MI->getOperand(opNum);
627  if (MO.isImm())
628  O << (unsigned short int)MO.getImm();
629  else
630  printOperand(MI, opNum, O);
631 }
632 
634  raw_ostream &O) {
635  const MachineOperand &MO = MI->getOperand(opNum);
636  if (MO.isImm())
637  O << (unsigned short int)(unsigned char)MO.getImm();
638  else
639  printOperand(MI, opNum, O);
640 }
641 
642 void MipsAsmPrinter::
643 printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O) {
644  // Load/Store memory operands -- imm($reg)
645  // If PIC target the target is loaded as the
646  // pattern lw $25,%call16($28)
647 
648  // opNum can be invalid if instruction has reglist as operand.
649  // MemOperand is always last operand of instruction (base + offset).
650  switch (MI->getOpcode()) {
651  default:
652  break;
653  case Mips::SWM32_MM:
654  case Mips::LWM32_MM:
655  opNum = MI->getNumOperands() - 2;
656  break;
657  }
658 
659  printOperand(MI, opNum+1, O);
660  O << "(";
661  printOperand(MI, opNum, O);
662  O << ")";
663 }
664 
665 void MipsAsmPrinter::
666 printMemOperandEA(const MachineInstr *MI, int opNum, raw_ostream &O) {
667  // when using stack locations for not load/store instructions
668  // print the same way as all normal 3 operand instructions.
669  printOperand(MI, opNum, O);
670  O << ", ";
671  printOperand(MI, opNum+1, O);
672  return;
673 }
674 
675 void MipsAsmPrinter::
676 printFCCOperand(const MachineInstr *MI, int opNum, raw_ostream &O,
677  const char *Modifier) {
678  const MachineOperand &MO = MI->getOperand(opNum);
680 }
681 
682 void MipsAsmPrinter::
683 printRegisterList(const MachineInstr *MI, int opNum, raw_ostream &O) {
684  for (int i = opNum, e = MI->getNumOperands(); i != e; ++i) {
685  if (i != opNum) O << ", ";
686  printOperand(MI, i, O);
687  }
688 }
689 
691 
692  // Compute MIPS architecture attributes based on the default subtarget
693  // that we'd have constructed. Module level directives aren't LTO
694  // clean anyhow.
695  // FIXME: For ifunc related functions we could iterate over and look
696  // for a feature string that doesn't match the default one.
697  const Triple &TT = TM.getTargetTriple();
700  const MipsTargetMachine &MTM = static_cast<const MipsTargetMachine &>(TM);
701  const MipsSubtarget STI(TT, CPU, FS, MTM.isLittleEndian(), MTM);
702 
703  bool IsABICalls = STI.isABICalls();
704  const MipsABIInfo &ABI = MTM.getABI();
705  if (IsABICalls) {
706  getTargetStreamer().emitDirectiveAbiCalls();
708  // FIXME: This condition should be a lot more complicated that it is here.
709  // Ideally it should test for properties of the ABI and not the ABI
710  // itself.
711  // For the moment, I'm only correcting enough to make MIPS-IV work.
712  if (RM == Reloc::Static && !ABI.IsN64())
713  getTargetStreamer().emitDirectiveOptionPic0();
714  }
715 
716  // Tell the assembler which ABI we are using
717  std::string SectionName = std::string(".mdebug.") + getCurrentABIString();
718  OutStreamer->SwitchSection(
719  OutContext.getELFSection(SectionName, ELF::SHT_PROGBITS, 0));
720 
721  // NaN: At the moment we only support:
722  // 1. .nan legacy (default)
723  // 2. .nan 2008
724  STI.isNaN2008() ? getTargetStreamer().emitDirectiveNaN2008()
725  : getTargetStreamer().emitDirectiveNaNLegacy();
726 
727  // TODO: handle O64 ABI
728 
729  if (ABI.IsEABI()) {
730  if (STI.isGP32bit())
731  OutStreamer->SwitchSection(OutContext.getELFSection(".gcc_compiled_long32",
732  ELF::SHT_PROGBITS, 0));
733  else
734  OutStreamer->SwitchSection(OutContext.getELFSection(".gcc_compiled_long64",
735  ELF::SHT_PROGBITS, 0));
736  }
737 
738  getTargetStreamer().updateABIInfo(STI);
739 
740  // We should always emit a '.module fp=...' but binutils 2.24 does not accept
741  // it. We therefore emit it when it contradicts the ABI defaults (-mfpxx or
742  // -mfp64) and omit it otherwise.
743  if (ABI.IsO32() && (STI.isABI_FPXX() || STI.isFP64bit()))
744  getTargetStreamer().emitDirectiveModuleFP();
745 
746  // We should always emit a '.module [no]oddspreg' but binutils 2.24 does not
747  // accept it. We therefore emit it when it contradicts the default or an
748  // option has changed the default (i.e. FPXX) and omit it otherwise.
749  if (ABI.IsO32() && (!STI.useOddSPReg() || STI.isABI_FPXX()))
750  getTargetStreamer().emitDirectiveModuleOddSPReg();
751 }
752 
753 void MipsAsmPrinter::emitInlineAsmStart() const {
754  MipsTargetStreamer &TS = getTargetStreamer();
755 
756  // GCC's choice of assembler options for inline assembly code ('at', 'macro'
757  // and 'reorder') is different from LLVM's choice for generated code ('noat',
758  // 'nomacro' and 'noreorder').
759  // In order to maintain compatibility with inline assembly code which depends
760  // on GCC's assembler options being used, we have to switch to those options
761  // for the duration of the inline assembly block and then switch back.
763  TS.emitDirectiveSetAt();
766  OutStreamer->AddBlankLine();
767 }
768 
769 void MipsAsmPrinter::emitInlineAsmEnd(const MCSubtargetInfo &StartInfo,
770  const MCSubtargetInfo *EndInfo) const {
771  OutStreamer->AddBlankLine();
772  getTargetStreamer().emitDirectiveSetPop();
773 }
774 
775 void MipsAsmPrinter::EmitJal(const MCSubtargetInfo &STI, MCSymbol *Symbol) {
776  MCInst I;
777  I.setOpcode(Mips::JAL);
778  I.addOperand(
780  OutStreamer->EmitInstruction(I, STI);
781 }
782 
783 void MipsAsmPrinter::EmitInstrReg(const MCSubtargetInfo &STI, unsigned Opcode,
784  unsigned Reg) {
785  MCInst I;
786  I.setOpcode(Opcode);
788  OutStreamer->EmitInstruction(I, STI);
789 }
790 
791 void MipsAsmPrinter::EmitInstrRegReg(const MCSubtargetInfo &STI,
792  unsigned Opcode, unsigned Reg1,
793  unsigned Reg2) {
794  MCInst I;
795  //
796  // Because of the current td files for Mips32, the operands for MTC1
797  // appear backwards from their normal assembly order. It's not a trivial
798  // change to fix this in the td file so we adjust for it here.
799  //
800  if (Opcode == Mips::MTC1) {
801  unsigned Temp = Reg1;
802  Reg1 = Reg2;
803  Reg2 = Temp;
804  }
805  I.setOpcode(Opcode);
808  OutStreamer->EmitInstruction(I, STI);
809 }
810 
811 void MipsAsmPrinter::EmitInstrRegRegReg(const MCSubtargetInfo &STI,
812  unsigned Opcode, unsigned Reg1,
813  unsigned Reg2, unsigned Reg3) {
814  MCInst I;
815  I.setOpcode(Opcode);
819  OutStreamer->EmitInstruction(I, STI);
820 }
821 
822 void MipsAsmPrinter::EmitMovFPIntPair(const MCSubtargetInfo &STI,
823  unsigned MovOpc, unsigned Reg1,
824  unsigned Reg2, unsigned FPReg1,
825  unsigned FPReg2, bool LE) {
826  if (!LE) {
827  unsigned temp = Reg1;
828  Reg1 = Reg2;
829  Reg2 = temp;
830  }
831  EmitInstrRegReg(STI, MovOpc, Reg1, FPReg1);
832  EmitInstrRegReg(STI, MovOpc, Reg2, FPReg2);
833 }
834 
835 void MipsAsmPrinter::EmitSwapFPIntParams(const MCSubtargetInfo &STI,
837  bool LE, bool ToFP) {
838  using namespace Mips16HardFloatInfo;
839  unsigned MovOpc = ToFP ? Mips::MTC1 : Mips::MFC1;
840  switch (PV) {
841  case FSig:
842  EmitInstrRegReg(STI, MovOpc, Mips::A0, Mips::F12);
843  break;
844  case FFSig:
845  EmitMovFPIntPair(STI, MovOpc, Mips::A0, Mips::A1, Mips::F12, Mips::F14, LE);
846  break;
847  case FDSig:
848  EmitInstrRegReg(STI, MovOpc, Mips::A0, Mips::F12);
849  EmitMovFPIntPair(STI, MovOpc, Mips::A2, Mips::A3, Mips::F14, Mips::F15, LE);
850  break;
851  case DSig:
852  EmitMovFPIntPair(STI, MovOpc, Mips::A0, Mips::A1, Mips::F12, Mips::F13, LE);
853  break;
854  case DDSig:
855  EmitMovFPIntPair(STI, MovOpc, Mips::A0, Mips::A1, Mips::F12, Mips::F13, LE);
856  EmitMovFPIntPair(STI, MovOpc, Mips::A2, Mips::A3, Mips::F14, Mips::F15, LE);
857  break;
858  case DFSig:
859  EmitMovFPIntPair(STI, MovOpc, Mips::A0, Mips::A1, Mips::F12, Mips::F13, LE);
860  EmitInstrRegReg(STI, MovOpc, Mips::A2, Mips::F14);
861  break;
862  case NoSig:
863  return;
864  }
865 }
866 
867 void MipsAsmPrinter::EmitSwapFPIntRetval(
869  bool LE) {
870  using namespace Mips16HardFloatInfo;
871  unsigned MovOpc = Mips::MFC1;
872  switch (RV) {
873  case FRet:
874  EmitInstrRegReg(STI, MovOpc, Mips::V0, Mips::F0);
875  break;
876  case DRet:
877  EmitMovFPIntPair(STI, MovOpc, Mips::V0, Mips::V1, Mips::F0, Mips::F1, LE);
878  break;
879  case CFRet:
880  EmitMovFPIntPair(STI, MovOpc, Mips::V0, Mips::V1, Mips::F0, Mips::F1, LE);
881  break;
882  case CDRet:
883  EmitMovFPIntPair(STI, MovOpc, Mips::V0, Mips::V1, Mips::F0, Mips::F1, LE);
884  EmitMovFPIntPair(STI, MovOpc, Mips::A0, Mips::A1, Mips::F2, Mips::F3, LE);
885  break;
886  case NoFPRet:
887  break;
888  }
889 }
890 
891 void MipsAsmPrinter::EmitFPCallStub(
892  const char *Symbol, const Mips16HardFloatInfo::FuncSignature *Signature) {
893  MCSymbol *MSymbol = OutContext.getOrCreateSymbol(StringRef(Symbol));
894  using namespace Mips16HardFloatInfo;
895  bool LE = getDataLayout().isLittleEndian();
896  // Construct a local MCSubtargetInfo here.
897  // This is because the MachineFunction won't exist (but have not yet been
898  // freed) and since we're at the global level we can use the default
899  // constructed subtarget.
900  std::unique_ptr<MCSubtargetInfo> STI(TM.getTarget().createMCSubtargetInfo(
903 
904  //
905  // .global xxxx
906  //
907  OutStreamer->EmitSymbolAttribute(MSymbol, MCSA_Global);
908  const char *RetType;
909  //
910  // make the comment field identifying the return and parameter
911  // types of the floating point stub
912  // # Stub function to call rettype xxxx (params)
913  //
914  switch (Signature->RetSig) {
915  case FRet:
916  RetType = "float";
917  break;
918  case DRet:
919  RetType = "double";
920  break;
921  case CFRet:
922  RetType = "complex";
923  break;
924  case CDRet:
925  RetType = "double complex";
926  break;
927  case NoFPRet:
928  RetType = "";
929  break;
930  }
931  const char *Parms;
932  switch (Signature->ParamSig) {
933  case FSig:
934  Parms = "float";
935  break;
936  case FFSig:
937  Parms = "float, float";
938  break;
939  case FDSig:
940  Parms = "float, double";
941  break;
942  case DSig:
943  Parms = "double";
944  break;
945  case DDSig:
946  Parms = "double, double";
947  break;
948  case DFSig:
949  Parms = "double, float";
950  break;
951  case NoSig:
952  Parms = "";
953  break;
954  }
955  OutStreamer->AddComment("\t# Stub function to call " + Twine(RetType) + " " +
956  Twine(Symbol) + " (" + Twine(Parms) + ")");
957  //
958  // probably not necessary but we save and restore the current section state
959  //
960  OutStreamer->PushSection();
961  //
962  // .section mips16.call.fpxxxx,"ax",@progbits
963  //
965  ".mips16.call.fp." + std::string(Symbol), ELF::SHT_PROGBITS,
967  OutStreamer->SwitchSection(M, nullptr);
968  //
969  // .align 2
970  //
971  OutStreamer->EmitValueToAlignment(4);
972  MipsTargetStreamer &TS = getTargetStreamer();
973  //
974  // .set nomips16
975  // .set nomicromips
976  //
979  //
980  // .ent __call_stub_fp_xxxx
981  // .type __call_stub_fp_xxxx,@function
982  // __call_stub_fp_xxxx:
983  //
984  std::string x = "__call_stub_fp_" + std::string(Symbol);
985  MCSymbolELF *Stub =
986  cast<MCSymbolELF>(OutContext.getOrCreateSymbol(StringRef(x)));
987  TS.emitDirectiveEnt(*Stub);
988  MCSymbol *MType =
989  OutContext.getOrCreateSymbol("__call_stub_fp_" + Twine(Symbol));
990  OutStreamer->EmitSymbolAttribute(MType, MCSA_ELF_TypeFunction);
991  OutStreamer->EmitLabel(Stub);
992 
993  // Only handle non-pic for now.
994  assert(TM.getRelocationModel() != Reloc::PIC_ &&
995  "should not be here if we are compiling pic");
997  //
998  // We need to add a MipsMCExpr class to MCTargetDesc to fully implement
999  // stubs without raw text but this current patch is for compiler generated
1000  // functions and they all return some value.
1001  // The calling sequence for non pic is different in that case and we need
1002  // to implement %lo and %hi in order to handle the case of no return value
1003  // See the corresponding method in Mips16HardFloat for details.
1004  //
1005  // mov the return address to S2.
1006  // we have no stack space to store it and we are about to make another call.
1007  // We need to make sure that the enclosing function knows to save S2
1008  // This should have already been handled.
1009  //
1010  // Mov $18, $31
1011 
1012  EmitInstrRegRegReg(*STI, Mips::ADDu, Mips::S2, Mips::RA, Mips::ZERO);
1013 
1014  EmitSwapFPIntParams(*STI, Signature->ParamSig, LE, true);
1015 
1016  // Jal xxxx
1017  //
1018  EmitJal(*STI, MSymbol);
1019 
1020  // fix return values
1021  EmitSwapFPIntRetval(*STI, Signature->RetSig, LE);
1022  //
1023  // do the return
1024  // if (Signature->RetSig == NoFPRet)
1025  // llvm_unreachable("should not be any stubs here with no return value");
1026  // else
1027  EmitInstrReg(*STI, Mips::JR, Mips::S2);
1028 
1030  OutStreamer->EmitLabel(Tmp);
1033  const MCExpr *T_min_E = MCBinaryExpr::createSub(T, E, OutContext);
1034  OutStreamer->emitELFSize(Stub, T_min_E);
1035  TS.emitDirectiveEnd(x);
1036  OutStreamer->PopSection();
1037 }
1038 
1040  // Emit needed stubs
1041  //
1042  for (std::map<
1043  const char *,
1044  const llvm::Mips16HardFloatInfo::FuncSignature *>::const_iterator
1045  it = StubsNeeded.begin();
1046  it != StubsNeeded.end(); ++it) {
1047  const char *Symbol = it->first;
1048  const llvm::Mips16HardFloatInfo::FuncSignature *Signature = it->second;
1049  EmitFPCallStub(Symbol, Signature);
1050  }
1051  // return to the text section
1053 }
1054 
1056  raw_ostream &OS) {
1057  // TODO: implement
1058 }
1059 
1060 // Align all targets of indirect branches on bundle size. Used only if target
1061 // is NaCl.
1062 void MipsAsmPrinter::NaClAlignIndirectJumpTargets(MachineFunction &MF) {
1063  // Align all blocks that are jumped to through jump table.
1064  if (MachineJumpTableInfo *JtInfo = MF.getJumpTableInfo()) {
1065  const std::vector<MachineJumpTableEntry> &JT = JtInfo->getJumpTables();
1066  for (unsigned I = 0; I < JT.size(); ++I) {
1067  const std::vector<MachineBasicBlock*> &MBBs = JT[I].MBBs;
1068 
1069  for (unsigned J = 0; J < MBBs.size(); ++J)
1070  MBBs[J]->setAlignment(MIPS_NACL_BUNDLE_ALIGN);
1071  }
1072  }
1073 
1074  // If basic block address is taken, block can be target of indirect branch.
1075  for (MachineFunction::iterator MBB = MF.begin(), E = MF.end();
1076  MBB != E; ++MBB) {
1077  if (MBB->hasAddressTaken())
1078  MBB->setAlignment(MIPS_NACL_BUNDLE_ALIGN);
1079  }
1080 }
1081 
1082 bool MipsAsmPrinter::isLongBranchPseudo(int Opcode) const {
1083  return (Opcode == Mips::LONG_BRANCH_LUi
1084  || Opcode == Mips::LONG_BRANCH_ADDiu
1085  || Opcode == Mips::LONG_BRANCH_DADDiu);
1086 }
1087 
1088 // Force static initialization.
1089 extern "C" void LLVMInitializeMipsAsmPrinter() {
1094 }
MachineConstantPoolValue * MachineCPVal
virtual void emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff)
A parsed version of the target data layout string in and methods for querying it. ...
Definition: DataLayout.h:104
unsigned getAlignment() const
getAlignment - Return the alignment (log2, not bytes) of the function.
StringRef getTargetCPU() const
virtual void AddComment(const Twine &T)
Add a textual command.
Definition: MCStreamer.h:252
const GlobalValue * getGlobal() const
bool isValid() const
Definition: MCInst.h:55
instr_iterator instr_end()
std::unique_ptr< MCStreamer > OutStreamer
This is the MCStreamer object for the file we are generating.
Definition: AsmPrinter.h:83
static const MCSymbolRefExpr * create(const MCSymbol *Symbol, MCContext &Ctx)
Definition: MCExpr.h:315
MCSymbol * getSymbol(const GlobalValue *GV) const
Definition: AsmPrinter.cpp:339
void print(raw_ostream &OS, const MCAsmInfo *MAI) const
print - Print the value to the stream OS.
Definition: MCSymbol.cpp:51
Reloc::Model getRelocationModel() const
Returns the code generation relocation model.
MachineBasicBlock * getMBB() const
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:39
A Module instance is used to store all the information related to an LLVM module. ...
Definition: Module.h:114
const DataLayout & getDataLayout() const
Return information about data layout.
Definition: AsmPrinter.cpp:139
virtual void AddBlankLine()
AddBlankLine - Emit a blank line to a .s file to pretty it up.
Definition: MCStreamer.h:266
void Lower(const MachineInstr *MI, MCInst &OutMI) const
MCContext & OutContext
This is the context for the output file that we are streaming.
Definition: AsmPrinter.h:78
static MCOperand createExpr(const MCExpr *Val)
Definition: MCInst.h:129
MCSectionELF * getELFSection(StringRef Section, unsigned Type, unsigned Flags)
Definition: MCContext.h:311
void EmitFunctionBodyEnd() override
EmitFunctionBodyEnd - Targets can override this to emit stuff after the last basic block in the funct...
MO_TLSGD - Represents the offset into the global offset table at which.
Definition: MipsBaseInfo.h:59
const MachineFunction * MF
The current machine function.
Definition: AsmPrinter.h:86
const char * getPrivateGlobalPrefix() const
Definition: DataLayout.h:281
virtual void emitDirectiveSetNoReorder()
A raw_ostream that writes to an SmallVector or SmallString.
Definition: raw_ostream.h:488
bool isBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB) const override
isBlockOnlyReachableByFallthough - Return true if the basic block has exactly one predecessor and the...
void PushSection()
Save the current and previous section on the section stack.
Definition: MCStreamer.h:301
MachineBasicBlock reference.
unsigned getFunctionNumber() const
Return a unique ID for the current function.
Definition: AsmPrinter.cpp:130
const std::string & str() const
Definition: Triple.h:306
const Function * getFunction() const
getFunction - Return the LLVM function that this machine code represents
void Initialize(MCContext *C)
void EmitFunctionBodyStart() override
EmitFunctionBodyStart - Targets can override this to emit stuff before the first basic block in the f...
Naked function.
Definition: Attributes.h:81
virtual void EmitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI)
Emit the given Instruction into the current section.
Definition: MCStreamer.cpp:639
void EmitFunctionEntryLabel() override
EmitFunctionEntryLabel - Emit the label that is the entrypoint for the function.
virtual void emitELFSize(MCSymbolELF *Symbol, const MCExpr *Value)
Emit an ELF .size directive.
Definition: MCStreamer.cpp:674
const std::vector< CalleeSavedInfo > & getCalleeSavedInfo() const
Returns a reference to call saved info vector for the current function.
const Triple & getTargetTriple() const
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects...
MCSubtargetInfo * createMCSubtargetInfo(StringRef TheTriple, StringRef CPU, StringRef Features) const
createMCSubtargetInfo - Create a MCSubtargetInfo implementation.
virtual void emitDirectiveSetMicroMips()
const MipsABIInfo & getABI() const
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
static MCOperand createReg(unsigned Reg)
Definition: MCInst.h:111
This file declares the MachineConstantPool class which is an abstract constant pool to keep track of ...
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:79
virtual void emitFrame(unsigned StackReg, unsigned StackSize, unsigned ReturnReg)
bool isImm() const
isImm - Tests if this is a MO_Immediate operand.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:98
void LLVMInitializeMipsAsmPrinter()
bool isReg() const
isReg - Tests if this is a MO_Register operand.
virtual void emitDirectiveSetNoMacro()
Base class for the full range of assembler expressions which are needed for parsing.
Definition: MCExpr.h:33
virtual void emitDirectiveEnd(StringRef Name)
Reg
All possible values of the reg field in the ModR/M byte.
Represent a reference to a symbol from inside an expression.
Definition: MCExpr.h:159
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted...
static bool contains(SmallPtrSetImpl< ConstantExpr * > &Cache, ConstantExpr *Expr, Constant *C)
Definition: Value.cpp:317
virtual unsigned getFrameRegister(const MachineFunction &MF) const =0
Debug information queries.
MO_ABS_HI/LO - Represents the hi or low part of an absolute symbol address.
Definition: MipsBaseInfo.h:53
unsigned getNumOperands() const
Access to explicit operands of the instruction.
Definition: MachineInstr.h:271
virtual void emitDirectiveModuleOddSPReg()
bool runOnMachineFunction(MachineFunction &MF) override
Emit the specified function out to the OutStreamer.
Definition: AsmPrinter.h:201
static const MCBinaryExpr * createSub(const MCExpr *LHS, const MCExpr *RHS, MCContext &Ctx)
Definition: MCExpr.h:514
Target TheMips64elTarget
bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, unsigned AsmVariant, const char *ExtraCode, raw_ostream &O) override
Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant...
void printRegisterList(const MachineInstr *MI, int opNum, raw_ostream &O)
virtual void emitDirectiveModuleFP()
const MachineJumpTableInfo * getJumpTableInfo() const
getJumpTableInfo - Return the jump table info object for the current function.
bool isLittleEndian() const
Layout endianness...
Definition: DataLayout.h:217
This class is a data container for one entry in a MachineConstantPool.
int64_t getImm() const
MCContext & getContext() const
void PrintDebugValueComment(const MachineInstr *MI, raw_ostream &OS)
void EmitEndOfAsmFile(Module &M) override
This virtual method can be overridden by targets that want to emit something at the end of their file...
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:150
const BasicBlock * getBasicBlock() const
getBasicBlock - Return the LLVM basic block that this instance corresponded to originally.
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
Definition: MachineInstr.h:267
MO_GPREL - Represents the offset from the current gp value to be used for the relocatable object file...
Definition: MipsBaseInfo.h:49
bool isMachineConstantPoolEntry() const
isMachineConstantPoolEntry - Return true if the MachineConstantPoolEntry is indeed a target specific ...
Target TheMips64Target
const MachineBasicBlock * getParent() const
Definition: MachineInstr.h:120
bool isDebugValue() const
Definition: MachineInstr.h:748
Address of a global value.
unsigned getTargetFlags() const
Streaming machine code generation interface.
Definition: MCStreamer.h:157
MO_GOT_CALL - Represents the offset into the global offset table at which the address of a call site ...
Definition: MipsBaseInfo.h:45
MCSymbol * createTempSymbol(bool CanBeUnnamed=true)
Create and return a new assembler temporary symbol with a unique but unspecified name.
Definition: MCContext.cpp:222
MCSymbol * CurrentFnSym
The symbol for the current function.
Definition: AsmPrinter.h:98
LLVM Basic Block Representation.
Definition: BasicBlock.h:65
const MCAsmInfo * MAI
Target Asm Printer information.
Definition: AsmPrinter.h:74
virtual void emitDirectiveSetNoMicroMips()
virtual void emitDirectiveSetMips16()
virtual void SwitchSection(MCSection *Section, const MCExpr *Subsection=nullptr)
Set the current section where code is being emitted to Section.
Definition: MCStreamer.cpp:701
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:273
virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, unsigned AsmVariant, const char *ExtraCode, raw_ostream &OS)
Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant...
void EmitInstruction(const MachineInstr *MI) override
Targets should implement this to emit instructions.
virtual void emitDirectiveSetMacro()
TargetMachine & TM
Target machine description.
Definition: AsmPrinter.h:70
static unsigned getNumOperandRegisters(unsigned Flag)
getNumOperandRegisters - Extract the number of registers field from the inline asm operand flag...
Definition: InlineAsm.h:332
virtual void EmitValueToAlignment(unsigned ByteAlignment, int64_t Value=0, unsigned ValueSize=1, unsigned MaxBytesToEmit=0)
Emit some number of copies of Value until the byte alignment ByteAlignment is reached.
Definition: MCStreamer.cpp:688
void printUnsignedImm8(const MachineInstr *MI, int opNum, raw_ostream &O)
virtual bool EmitSymbolAttribute(MCSymbol *Symbol, MCSymbolAttr Attribute)=0
Add the given Attribute to Symbol.
Address of a basic block.
bool IsN64() const
Definition: MipsABIInfo.h:45
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang","erlang-compatible garbage collector")
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
int64_t getOffset() const
Return the offset from the symbol in this operand.
StringRef selectMipsCPU(const Triple &TT, StringRef CPU)
Select the Mips CPU for the given triple and cpu name.
virtual void emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff)
MCSection * getTextSection() const
bool inMicroMipsMode() const
const char * getCurrentABIString() const
Emit Set directives.
MachineConstantPool * getConstantPool()
getConstantPool - Return the constant pool object for the current function.
bool runOnMachineFunction(MachineFunction &MF) override
Emit the specified function out to the OutStreamer.
bool inMips16Mode() const
MipsMCInstLower MCInstLowering
bool IsEABI() const
Definition: MipsABIInfo.h:46
bool hasMips32r6() const
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
MCSymbol * getSymbol() const
getSymbol - Return the MCSymbol for this basic block.
MO_GOTTPREL - Represents the offset from the thread pointer (Initial.
Definition: MipsBaseInfo.h:70
virtual void EmitDataRegion(MCDataRegionType Kind)
Note in the output the specified region Kind.
Definition: MCStreamer.h:385
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
void EmitAlignment(unsigned NumBits, const GlobalObject *GO=nullptr) const
Emit an alignment directive to the specified power of two boundary.
std::vector< MachineBasicBlock * >::const_iterator const_pred_iterator
size_t size() const
Definition: MCInst.h:174
virtual void emitDirectiveAbiCalls()
void setOpcode(unsigned Op)
Definition: MCInst.h:158
bool isTargetNaCl() const
bool isABICalls() const
StringRef getTargetFeatureString() const
virtual void EmitLabel(MCSymbol *Symbol)
Emit a label for Symbol into the current section.
Definition: MCStreamer.cpp:203
bool IsO32() const
Definition: MipsABIInfo.h:43
virtual void emitDirectiveOptionPic0()
void EmitGlobalConstant(const Constant *CV)
Print a general LLVM constant to the .s file.
const DataLayout * getDataLayout() const
Deprecated in 3.7, will be removed in 3.8.
MachineOperand class - Representation of each machine instruction operand.
void EmitToStreamer(MCStreamer &S, const MCInst &Inst)
Definition: AsmPrinter.cpp:148
bool isLittle() const
static Twine utohexstr(const uint64_t &Val)
Definition: Twine.h:386
void printUnsignedImm(const MachineInstr *MI, int opNum, raw_ostream &O)
virtual void emitDirectiveSetNoMips16()
MachineFrameInfo * getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
bool hasMips64r6() const
void printFCCOperand(const MachineInstr *MI, int opNum, raw_ostream &O, const char *Modifier=nullptr)
void EmitStartOfAsmFile(Module &M) override
This virtual method can be overridden by targets that want to emit something at the start of their fi...
const char * MipsFCCToString(Mips::CondCode CC)
bool isGP64bit() const
MO_TPREL_HI/LO - Represents the hi and low part of the offset from.
Definition: MipsBaseInfo.h:74
static const unsigned MIPS_NACL_BUNDLE_ALIGN
Definition: MipsMCNaCl.h:18
virtual void EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV)
void printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O)
Representation of each machine instruction.
Definition: MachineInstr.h:51
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.
bundle_iterator< const MachineInstr, const_instr_iterator > const_iterator
void updateABIInfo(const PredicateLibrary &P)
virtual void emitDirectiveEnt(const MCSymbol &Symbol)
bool isLandingPad() const
isLandingPad - Returns true if the block is a landing pad.
StringRef getName() const
getName - Get the symbol name.
Definition: MCSymbol.h:205
const MipsSubtarget * Subtarget
bool hasFnAttribute(Attribute::AttrKind Kind) const
Return true if the function has the attribute.
Definition: Function.h:217
.type _foo,
Definition: MCDirectives.h:30
MCSymbol * getOrCreateSymbol(const Twine &Name)
Lookup the symbol inside with the specified Name.
Definition: MCContext.cpp:111
.type _foo, STT_FUNC # aka
Definition: MCDirectives.h:23
std::map< const char *, const llvm::Mips16HardFloatInfo::FuncSignature * > StubsNeeded
#define I(x, y, z)
Definition: MD5.cpp:54
MCSymbol * GetBlockAddressSymbol(const BlockAddress *BA) const
Return the MCSymbol used to satisfy BlockAddress uses of the specified basic block.
MCSubtargetInfo - Generic base class for all target subtargets.
void printOperand(const MachineInstr *MI, int opNum, raw_ostream &O)
union llvm::MachineConstantPoolEntry::@30 Val
The constant itself.
MipsFunctionInfo - This class is derived from MachineFunction private Mips target-specific informatio...
MCSectionELF - This represents a section on linux, lots of unix variants and some bare metal systems...
Definition: MCSectionELF.h:30
Target TheMipselTarget
void printMemOperandEA(const MachineInstr *MI, int opNum, raw_ostream &O)
virtual MCSymbol * GetCPISymbol(unsigned CPID) const
Return the symbol for the specified constant pool entry.
unsigned getReg() const
getReg - Returns the register number.
const TargetLoweringObjectFile & getObjFileLowering() const
Return information about object file lowering.
Definition: AsmPrinter.cpp:134
bool PopSection()
Restore the current and previous section from the section stack.
Definition: MCStreamer.h:310
virtual void emitDirectiveSetReorder()
static const char * getRegisterName(unsigned RegNo)
uint16_t getEncodingValue(unsigned RegNo) const
Returns the encoding for RegNo.
const MCObjectFileInfo * getObjectFileInfo() const
Definition: MCContext.h:229
RegisterAsmPrinter - Helper template for registering a target specific assembly printer, for use in the target machine initialization function.
virtual void emitDirectiveNaNLegacy()
BasicBlockListType::iterator iterator
This class implements an extremely fast bulk output stream that can only output to a stream...
Definition: raw_ostream.h:38
MCOperand LowerOperand(const MachineOperand &MO, unsigned offset=0) const
static TraceState * TS
const Target & getTarget() const
const MipsFunctionInfo * MipsFI
const std::vector< MachineConstantPoolEntry > & getConstants() const
void emitFrameDirective()
Frame Directive.
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
void addOperand(const MCOperand &Op)
Definition: MCInst.h:168
virtual void print(raw_ostream &O, const Module *M) const
print - Print out the internal state of the pass.
Definition: Pass.cpp:111
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:40
const BlockAddress * getBlockAddress() const
Address of indexed Constant in Constant Pool.
bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum, unsigned AsmVariant, const char *ExtraCode, raw_ostream &O) override
Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant as...
static GCMetadataPrinterRegistry::Add< OcamlGCMetadataPrinter > Y("ocaml","ocaml 3.10-compatible collector")
void EmitBasicBlockEnd(const MachineBasicBlock &MBB) override
Targets can override this to emit stuff at the end of a basic block.
unsigned getRARegister() const
This method should return the register where the return address can be found.
bool isLayoutSuccessor(const MachineBasicBlock *MBB) const
isLayoutSuccessor - Return true if the specified MBB will be emitted immediately after this block...
Instances of this class represent operands of the MCInst class.
Definition: MCInst.h:33
std::string lower() const
Definition: StringRef.cpp:117
Target TheMipsTarget
.end_data_region
Definition: MCDirectives.h:60