LLVM  3.7.0
SparcISelLowering.h
Go to the documentation of this file.
1 //===-- SparcISelLowering.h - Sparc DAG Lowering Interface ------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file defines the interfaces that Sparc uses to lower LLVM code into a
11 // selection DAG.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #ifndef LLVM_LIB_TARGET_SPARC_SPARCISELLOWERING_H
16 #define LLVM_LIB_TARGET_SPARC_SPARCISELLOWERING_H
17 
18 #include "Sparc.h"
20 
21 namespace llvm {
22  class SparcSubtarget;
23 
24  namespace SPISD {
25  enum NodeType : unsigned {
27  CMPICC, // Compare two GPR operands, set icc+xcc.
28  CMPFCC, // Compare two FP operands, set fcc.
29  BRICC, // Branch to dest on icc condition
30  BRXCC, // Branch to dest on xcc condition (64-bit only).
31  BRFCC, // Branch to dest on fcc condition
32  SELECT_ICC, // Select between two values using the current ICC flags.
33  SELECT_XCC, // Select between two values using the current XCC flags.
34  SELECT_FCC, // Select between two values using the current FCC flags.
35 
36  Hi, Lo, // Hi/Lo operations, typically on a global address.
37 
38  FTOI, // FP to Int within a FP register.
39  ITOF, // Int to FP within a FP register.
40  FTOX, // FP to Int64 within a FP register.
41  XTOF, // Int64 to FP within a FP register.
42 
43  CALL, // A call instruction.
44  RET_FLAG, // Return with a flag operand.
45  GLOBAL_BASE_REG, // Global base reg for PIC.
46  FLUSHW, // FLUSH register windows to stack.
47 
48  TLS_ADD, // For Thread Local Storage (TLS).
51  };
52  }
53 
55  const SparcSubtarget *Subtarget;
56  public:
58  SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
59 
60  /// computeKnownBitsForTargetNode - Determine which of the bits specified
61  /// in Mask are known to be either zero or one and return them in the
62  /// KnownZero/KnownOne bitsets.
64  APInt &KnownZero,
65  APInt &KnownOne,
66  const SelectionDAG &DAG,
67  unsigned Depth = 0) const override;
68 
71  MachineBasicBlock *MBB) const override;
72 
73  const char *getTargetNodeName(unsigned Opcode) const override;
74 
75  ConstraintType getConstraintType(StringRef Constraint) const override;
78  const char *constraint) const override;
80  std::string &Constraint,
81  std::vector<SDValue> &Ops,
82  SelectionDAG &DAG) const override;
83  std::pair<unsigned, const TargetRegisterClass *>
85  StringRef Constraint, MVT VT) const override;
86 
87  bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const override;
88  MVT getScalarShiftAmountTy(const DataLayout &, EVT) const override {
89  return MVT::i32;
90  }
91 
92  /// getSetCCResultType - Return the ISD::SETCC ValueType
94  EVT VT) const override;
95 
96  SDValue
98  CallingConv::ID CallConv,
99  bool isVarArg,
101  SDLoc dl, SelectionDAG &DAG,
102  SmallVectorImpl<SDValue> &InVals) const override;
104  CallingConv::ID CallConv,
105  bool isVarArg,
107  SDLoc dl, SelectionDAG &DAG,
108  SmallVectorImpl<SDValue> &InVals) const;
110  CallingConv::ID CallConv,
111  bool isVarArg,
113  SDLoc dl, SelectionDAG &DAG,
114  SmallVectorImpl<SDValue> &InVals) const;
115 
116  SDValue
118  SmallVectorImpl<SDValue> &InVals) const override;
120  SmallVectorImpl<SDValue> &InVals) const;
122  SmallVectorImpl<SDValue> &InVals) const;
123 
124  SDValue
125  LowerReturn(SDValue Chain,
126  CallingConv::ID CallConv, bool isVarArg,
128  const SmallVectorImpl<SDValue> &OutVals,
129  SDLoc dl, SelectionDAG &DAG) const override;
131  CallingConv::ID CallConv, bool IsVarArg,
133  const SmallVectorImpl<SDValue> &OutVals,
134  SDLoc DL, SelectionDAG &DAG) const;
136  CallingConv::ID CallConv, bool IsVarArg,
138  const SmallVectorImpl<SDValue> &OutVals,
139  SDLoc DL, SelectionDAG &DAG) const;
140 
145 
146  unsigned getSRetArgSize(SelectionDAG &DAG, SDValue Callee) const;
147  SDValue withTargetFlags(SDValue Op, unsigned TF, SelectionDAG &DAG) const;
148  SDValue makeHiLoPair(SDValue Op, unsigned HiTF, unsigned LoTF,
149  SelectionDAG &DAG) const;
150  SDValue makeAddress(SDValue Op, SelectionDAG &DAG) const;
151 
153  SDValue Arg, SDLoc DL,
154  SelectionDAG &DAG) const;
156  const char *LibFuncName,
157  unsigned numArgs) const;
159  unsigned &SPCC,
160  SDLoc DL,
161  SelectionDAG &DAG) const;
162 
163  bool ShouldShrinkFPConstant(EVT VT) const override {
164  // Do not shrink FP constpool if VT == MVT::f128.
165  // (ldd, call _Q_fdtoq) is more expensive than two ldds.
166  return VT != MVT::f128;
167  }
168 
170  SmallVectorImpl<SDValue>& Results,
171  SelectionDAG &DAG) const override;
172 
174  unsigned BROpcode) const;
176  MachineBasicBlock *BB,
177  unsigned Opcode,
178  unsigned CondCode = 0) const;
179  };
180 } // end namespace llvm
181 
182 #endif // SPARC_ISELLOWERING_H
BUILTIN_OP_END - This must be the last enum value in this list.
Definition: ISDOpcodes.h:724
A parsed version of the target data layout string in and methods for querying it. ...
Definition: DataLayout.h:104
SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const
bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const override
Return true if folding a constant offset with the given GlobalAddress is legal.
SparcTargetLowering(TargetMachine &TM, const SparcSubtarget &STI)
unsigned getSRetArgSize(SelectionDAG &DAG, SDValue Callee) const
SDValue makeHiLoPair(SDValue Op, unsigned HiTF, unsigned LoTF, SelectionDAG &DAG) const
SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const
SDValue LowerCall_32(TargetLowering::CallLoweringInfo &CLI, SmallVectorImpl< SDValue > &InVals) const
MachineBasicBlock * EmitInstrWithCustomInserter(MachineInstr *MI, MachineBasicBlock *MBB) const override
This method should be implemented by targets that mark instructions with the 'usesCustomInserter' fla...
MachineBasicBlock * expandSelectCC(MachineInstr *MI, MachineBasicBlock *BB, unsigned BROpcode) const
ConstraintWeight getSingleConstraintMatchWeight(AsmOperandInfo &info, const char *constraint) const override
Examine constraint string and operand type and determine a weight value.
lazy value info
SDValue LowerCall_64(TargetLowering::CallLoweringInfo &CLI, SmallVectorImpl< SDValue > &InVals) const
void computeKnownBitsForTargetNode(const SDValue Op, APInt &KnownZero, APInt &KnownOne, const SelectionDAG &DAG, unsigned Depth=0) const override
computeKnownBitsForTargetNode - Determine which of the bits specified in Mask are known to be either ...
SDValue LowerF128_LibCallArg(SDValue Chain, ArgListTy &Args, SDValue Arg, SDLoc DL, SelectionDAG &DAG) const
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
MVT getScalarShiftAmountTy(const DataLayout &, EVT) const override
EVT is not used in-tree, but is used by out-of-tree target.
SDValue withTargetFlags(SDValue Op, unsigned TF, SelectionDAG &DAG) const
This contains information for each constraint that we are lowering.
SDValue LowerCall(TargetLowering::CallLoweringInfo &CLI, SmallVectorImpl< SDValue > &InVals) const override
This hook must be implemented to lower calls into the specified DAG.
CondCode
ISD::CondCode enum - These are ordered carefully to make the bitfields below work out...
Definition: ISDOpcodes.h:804
SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const
MVT - Machine Value Type.
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:41
void LowerAsmOperandForConstraint(SDValue Op, std::string &Constraint, std::vector< SDValue > &Ops, SelectionDAG &DAG) const override
LowerAsmOperandForConstraint - Lower the specified operand into the Ops vector.
bool ShouldShrinkFPConstant(EVT VT) const override
If true, then instruction selection should seek to shrink the FP constant of the specified type to a ...
void ReplaceNodeResults(SDNode *N, SmallVectorImpl< SDValue > &Results, SelectionDAG &DAG) const override
This callback is invoked when a node result type is illegal for the target, and the operation was reg...
SDValue LowerFormalArguments_64(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl< ISD::InputArg > &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl< SDValue > &InVals) const
EVT - Extended Value Type.
Definition: ValueTypes.h:31
std::vector< ArgListEntry > ArgListTy
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
This structure contains all information that is necessary for lowering calls.
ConstraintType getConstraintType(StringRef Constraint) const override
getConstraintType - Given a constraint letter, return the type of constraint it is for this target...
EVT getSetCCResultType(const DataLayout &DL, LLVMContext &Context, EVT VT) const override
getSetCCResultType - Return the ISD::SETCC ValueType
SDValue LowerFormalArguments_32(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl< ISD::InputArg > &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl< SDValue > &InVals) const
LowerFormalArguments32 - V8 uses a very simple ABI, where all values are passed in either one or two ...
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
Definition: SelectionDAG.h:179
Wrapper class for IR location info (IR ordering and DebugLoc) to be passed into SDNode creation funct...
Represents one node in the SelectionDAG.
const char * getTargetNodeName(unsigned Opcode) const override
This method returns the name of a target specific DAG node.
SDValue makeAddress(SDValue Op, SelectionDAG &DAG) const
Class for arbitrary precision integers.
Definition: APInt.h:73
SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override
This callback is invoked for operations that are unsupported by the target, which are registered to u...
SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl< ISD::OutputArg > &Outs, const SmallVectorImpl< SDValue > &OutVals, SDLoc dl, SelectionDAG &DAG) const override
This hook must be implemented to lower outgoing return values, described by the Outs array...
Representation of each machine instruction.
Definition: MachineInstr.h:51
SDValue LowerReturn_64(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl< ISD::OutputArg > &Outs, const SmallVectorImpl< SDValue > &OutVals, SDLoc DL, SelectionDAG &DAG) const
#define N
MachineBasicBlock * expandAtomicRMW(MachineInstr *MI, MachineBasicBlock *BB, unsigned Opcode, unsigned CondCode=0) const
SDValue LowerReturn_32(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl< ISD::OutputArg > &Outs, const SmallVectorImpl< SDValue > &OutVals, SDLoc DL, SelectionDAG &DAG) const
SDValue LowerF128Compare(SDValue LHS, SDValue RHS, unsigned &SPCC, SDLoc DL, SelectionDAG &DAG) const
std::pair< unsigned, const TargetRegisterClass * > getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI, StringRef Constraint, MVT VT) const override
Given a physical register constraint (e.g.
SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl< ISD::InputArg > &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl< SDValue > &InVals) const override
This hook must be implemented to lower the incoming (formal) arguments, described by the Ins array...
Primary interface to the complete machine description for the target machine.
SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:40
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation...
SDValue LowerF128Op(SDValue Op, SelectionDAG &DAG, const char *LibFuncName, unsigned numArgs) const
This file describes how to lower LLVM code to machine code.