LLVM  3.7.0
LiveRegMatrix.cpp
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1 //===-- LiveRegMatrix.cpp - Track register interference -------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file defines the LiveRegMatrix analysis pass.
11 //
12 //===----------------------------------------------------------------------===//
13 
15 #include "RegisterCoalescer.h"
16 #include "llvm/ADT/Statistic.h"
20 #include "llvm/Support/Debug.h"
21 #include "llvm/Support/Format.h"
24 
25 using namespace llvm;
26 
27 #define DEBUG_TYPE "regalloc"
28 
29 STATISTIC(NumAssigned , "Number of registers assigned");
30 STATISTIC(NumUnassigned , "Number of registers unassigned");
31 
32 char LiveRegMatrix::ID = 0;
33 INITIALIZE_PASS_BEGIN(LiveRegMatrix, "liveregmatrix",
34  "Live Register Matrix", false, false)
38  "Live Register Matrix", false, false)
39 
40 LiveRegMatrix::LiveRegMatrix() : MachineFunctionPass(ID),
41  UserTag(0), RegMaskTag(0), RegMaskVirtReg(0) {}
42 
43 void LiveRegMatrix::getAnalysisUsage(AnalysisUsage &AU) const {
44  AU.setPreservesAll();
48 }
49 
50 bool LiveRegMatrix::runOnMachineFunction(MachineFunction &MF) {
51  TRI = MF.getSubtarget().getRegisterInfo();
52  MRI = &MF.getRegInfo();
53  LIS = &getAnalysis<LiveIntervals>();
54  VRM = &getAnalysis<VirtRegMap>();
55 
56  unsigned NumRegUnits = TRI->getNumRegUnits();
57  if (NumRegUnits != Matrix.size())
58  Queries.reset(new LiveIntervalUnion::Query[NumRegUnits]);
59  Matrix.init(LIUAlloc, NumRegUnits);
60 
61  // Make sure no stale queries get reused.
63  return false;
64 }
65 
66 void LiveRegMatrix::releaseMemory() {
67  for (unsigned i = 0, e = Matrix.size(); i != e; ++i) {
68  Matrix[i].clear();
69  // No need to clear Queries here, since LiveIntervalUnion::Query doesn't
70  // have anything important to clear and LiveRegMatrix's runOnFunction()
71  // does a std::unique_ptr::reset anyways.
72  }
73 }
74 
75 template<typename Callable>
76 bool foreachUnit(const TargetRegisterInfo *TRI, LiveInterval &VRegInterval,
77  unsigned PhysReg, Callable Func) {
78  if (VRegInterval.hasSubRanges()) {
79  for (MCRegUnitMaskIterator Units(PhysReg, TRI); Units.isValid(); ++Units) {
80  unsigned Unit = (*Units).first;
81  unsigned Mask = (*Units).second;
82  for (LiveInterval::SubRange &S : VRegInterval.subranges()) {
83  if (S.LaneMask & Mask) {
84  if (Func(Unit, S))
85  return true;
86  break;
87  }
88  }
89  }
90  } else {
91  for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units) {
92  if (Func(*Units, VRegInterval))
93  return true;
94  }
95  }
96  return false;
97 }
98 
99 void LiveRegMatrix::assign(LiveInterval &VirtReg, unsigned PhysReg) {
100  DEBUG(dbgs() << "assigning " << PrintReg(VirtReg.reg, TRI)
101  << " to " << PrintReg(PhysReg, TRI) << ':');
102  assert(!VRM->hasPhys(VirtReg.reg) && "Duplicate VirtReg assignment");
103  VRM->assignVirt2Phys(VirtReg.reg, PhysReg);
104  MRI->setPhysRegUsed(PhysReg);
105 
106  foreachUnit(TRI, VirtReg, PhysReg, [&](unsigned Unit,
107  const LiveRange &Range) {
108  DEBUG(dbgs() << ' ' << PrintRegUnit(Unit, TRI) << ' ' << Range);
109  Matrix[Unit].unify(VirtReg, Range);
110  return false;
111  });
112 
113  ++NumAssigned;
114  DEBUG(dbgs() << '\n');
115 }
116 
118  unsigned PhysReg = VRM->getPhys(VirtReg.reg);
119  DEBUG(dbgs() << "unassigning " << PrintReg(VirtReg.reg, TRI)
120  << " from " << PrintReg(PhysReg, TRI) << ':');
121  VRM->clearVirt(VirtReg.reg);
122 
123  foreachUnit(TRI, VirtReg, PhysReg, [&](unsigned Unit,
124  const LiveRange &Range) {
125  DEBUG(dbgs() << ' ' << PrintRegUnit(Unit, TRI));
126  Matrix[Unit].extract(VirtReg, Range);
127  return false;
128  });
129 
130  ++NumUnassigned;
131  DEBUG(dbgs() << '\n');
132 }
133 
134 bool LiveRegMatrix::isPhysRegUsed(unsigned PhysReg) const {
135  for (MCRegUnitIterator Unit(PhysReg, TRI); Unit.isValid(); ++Unit) {
136  if (!Matrix[*Unit].empty())
137  return true;
138  }
139  return false;
140 }
141 
143  unsigned PhysReg) {
144  // Check if the cached information is valid.
145  // The same BitVector can be reused for all PhysRegs.
146  // We could cache multiple VirtRegs if it becomes necessary.
147  if (RegMaskVirtReg != VirtReg.reg || RegMaskTag != UserTag) {
148  RegMaskVirtReg = VirtReg.reg;
149  RegMaskTag = UserTag;
150  RegMaskUsable.clear();
151  LIS->checkRegMaskInterference(VirtReg, RegMaskUsable);
152  }
153 
154  // The BitVector is indexed by PhysReg, not register unit.
155  // Regmask interference is more fine grained than regunits.
156  // For example, a Win64 call can clobber %ymm8 yet preserve %xmm8.
157  return !RegMaskUsable.empty() && (!PhysReg || !RegMaskUsable.test(PhysReg));
158 }
159 
161  unsigned PhysReg) {
162  if (VirtReg.empty())
163  return false;
164  CoalescerPair CP(VirtReg.reg, PhysReg, *TRI);
165 
166  bool Result = foreachUnit(TRI, VirtReg, PhysReg, [&](unsigned Unit,
167  const LiveRange &Range) {
168  const LiveRange &UnitRange = LIS->getRegUnit(Unit);
169  return Range.overlaps(UnitRange, CP, *LIS->getSlotIndexes());
170  });
171  return Result;
172 }
173 
175  unsigned RegUnit) {
176  LiveIntervalUnion::Query &Q = Queries[RegUnit];
177  Q.init(UserTag, &VirtReg, &Matrix[RegUnit]);
178  return Q;
179 }
180 
182 LiveRegMatrix::checkInterference(LiveInterval &VirtReg, unsigned PhysReg) {
183  if (VirtReg.empty())
184  return IK_Free;
185 
186  // Regmask interference is the fastest check.
187  if (checkRegMaskInterference(VirtReg, PhysReg))
188  return IK_RegMask;
189 
190  // Check for fixed interference.
191  if (checkRegUnitInterference(VirtReg, PhysReg))
192  return IK_RegUnit;
193 
194  // Check the matrix for virtual register interference.
195  for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units)
196  if (query(VirtReg, *Units).checkInterference())
197  return IK_VirtReg;
198 
199  return IK_Free;
200 }
void setPhysRegUsed(unsigned Reg)
setPhysRegUsed - Mark the specified register used in this function.
No interference, go ahead and assign.
Definition: LiveRegMatrix.h:83
const unsigned reg
Definition: LiveInterval.h:616
bool isValid() const
Returns true if this iterator is not yet at the end.
STATISTIC(NumFunctions,"Total number of functions")
bool isValid() const
isValid - returns true if this iterator is not yet at the end.
InterferenceKind checkInterference(LiveInterval &VirtReg, unsigned PhysReg)
Check for interference before assigning VirtReg to PhysReg.
LiveInterval - This class represents the liveness of a register, or stack slot.
Definition: LiveInterval.h:588
PrintRegUnit - Helper class for printing register units on a raw_ostream.
liveregmatrix
A live range for subregisters.
Definition: LiveInterval.h:595
void init(unsigned UTag, LiveInterval *VReg, LiveIntervalUnion *LIU)
bool checkRegMaskInterference(LiveInterval &LI, BitVector &UsableRegs)
checkRegMaskInterference - Test if LI is live across any register mask instructions, and compute a bit mask of physical registers that are not clobbered by any of them.
bool foreachUnit(const TargetRegisterInfo *TRI, LiveInterval &VRegInterval, unsigned PhysReg, Callable Func)
bool empty() const
Definition: LiveInterval.h:353
Live Register Matrix
This class represents the liveness of a register, stack slot, etc.
Definition: LiveInterval.h:153
#define INITIALIZE_PASS_DEPENDENCY(depName)
Definition: PassSupport.h:70
void clear()
clear - Clear all bits.
Definition: BitVector.h:187
Query interferences between a single live virtual register and a live interval union.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MCRegUnitIterator enumerates a list of register units and their associated lane masks for Reg...
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
A helper class for register coalescers.
#define INITIALIZE_PASS_END(passName, arg, name, cfg, analysis)
Definition: PassSupport.h:75
iterator_range< subrange_iterator > subranges()
Definition: LiveInterval.h:670
Register unit interference.
Definition: LiveRegMatrix.h:93
PrintReg - Helper class for printing registers on a raw_ostream.
void assign(LiveInterval &VirtReg, unsigned PhysReg)
Assign VirtReg to PhysReg.
RegMask interference.
Definition: LiveRegMatrix.h:98
void invalidateVirtRegs()
Invalidate cached interference queries after modifying virtual register live ranges.
Definition: LiveRegMatrix.h:79
SlotIndexes * getSlotIndexes() const
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
bool empty() const
empty - Tests whether there are no bits in this bitvector.
Definition: BitVector.h:115
bool overlaps(const LiveRange &other) const
overlaps - Return true if the intersection of the two live ranges is not empty.
Definition: LiveInterval.h:419
Represent the analysis usage information of a pass.
bool isPhysRegUsed(unsigned PhysReg) const
Returns true if the given PhysReg has any live intervals assigned.
void unassign(LiveInterval &VirtReg)
Unassign VirtReg from its PhysReg.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
bool test(unsigned Idx) const
Definition: BitVector.h:322
bool checkRegUnitInterference(LiveInterval &VirtReg, unsigned PhysReg)
Check for regunit interference only.
void init(LiveIntervalUnion::Allocator &, unsigned Size)
Promote Memory to Register
Definition: Mem2Reg.cpp:58
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:123
void setPreservesAll()
Set by analyses that do not transform their input at all.
unsigned getNumRegUnits() const
Return the number of (native) register units in the target.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
AnalysisUsage & addRequiredTransitive()
LiveIntervalUnion::Query & query(LiveInterval &VirtReg, unsigned RegUnit)
Query a line of the assigned virtual register matrix directly.
std::vector< uint8_t > Unit
#define DEBUG(X)
Definition: Debug.h:92
bool checkRegMaskInterference(LiveInterval &VirtReg, unsigned PhysReg=0)
Check for regmask interference only.
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
Live Register false
bool hasSubRanges() const
Returns true if subregister liveness information is available.
Definition: LiveInterval.h:696
Virtual register interference.
Definition: LiveRegMatrix.h:88
LiveRange & getRegUnit(unsigned Unit)
getRegUnit - Return the live range for Unit.
INITIALIZE_PASS_BEGIN(LiveRegMatrix,"liveregmatrix","Live Register Matrix", false, false) INITIALIZE_PASS_END(LiveRegMatrix