37 #define DEBUG_TYPE "tailduplication"
39 STATISTIC(NumTails ,
"Number of tails duplicated");
40 STATISTIC(NumTailDups ,
"Number of tail duplicated blocks");
41 STATISTIC(NumInstrDups ,
"Additional instructions due to tail duplication");
42 STATISTIC(NumDeadBlocks,
"Number of dead blocks removed");
43 STATISTIC(NumAddedPHIs ,
"Number of phis added");
48 cl::desc(
"Maximum instructions to consider tail duplicating"),
53 cl::desc(
"Verify sanity of PHI instructions during taildup"),
69 std::unique_ptr<RegScavenger> RS;
81 explicit TailDuplicatePass() :
89 void AddSSAUpdateEntry(
unsigned OrigReg,
unsigned NewReg,
136 if (skipOptnoneFunction(*MF.getFunction()))
139 TII = MF.getSubtarget().getInstrInfo();
141 MRI = &MF.getRegInfo();
142 MMI = getAnalysisIfAvailable<MachineModuleInfo>();
143 MBPI = &getAnalysis<MachineBranchProbabilityInfo>();
145 PreRegAlloc = MRI->isSSA();
147 if (MRI->tracksLiveness() && TRI->trackLivenessAfterRegAlloc(MF))
150 bool MadeChange =
false;
151 while (TailDuplicateBlocks(MF))
157 void TailDuplicatePass::getAnalysisUsage(
AnalysisUsage &AU)
const {
168 while (MI != MBB->
end()) {
172 PE = Preds.end(); PI != PE; ++PI) {
175 for (
unsigned i = 1, e = MI->getNumOperands(); i != e; i += 2) {
177 if (PHIBB == PredBB) {
184 dbgs() <<
" missing input from predecessor BB#"
190 for (
unsigned i = 1, e = MI->getNumOperands(); i != e; i += 2) {
192 if (CheckExtra && !Preds.count(PHIBB)) {
193 dbgs() <<
"Warning: malformed PHI in BB#" << MBB->
getNumber()
195 dbgs() <<
" extra input from predecessor BB#"
221 if (!TailDuplicate(MBB, IsSimple, MF, TDBBs, Copies))
234 UpdateSuccessorsPHIs(MBB, isDead, TDBBs, Succs);
238 NumInstrDups -= MBB->
size();
239 RemoveDeadBlock(MBB);
244 if (!SSAUpdateVRs.empty()) {
245 for (
unsigned i = 0, e = SSAUpdateVRs.size(); i != e; ++i) {
246 unsigned VReg = SSAUpdateVRs[i];
247 SSAUpdate.Initialize(VReg);
255 SSAUpdate.AddAvailableValue(DefBB, VReg);
260 SSAUpdateVals.
find(VReg);
261 for (
unsigned j = 0, ee = LI->second.
size(); j != ee; ++j) {
263 unsigned SrcReg = LI->second[j].second;
264 SSAUpdate.AddAvailableValue(SrcBB, SrcReg);
269 while (UI != MRI->use_end()) {
283 SSAUpdate.RewriteUse(UseMO);
287 SSAUpdateVRs.clear();
288 SSAUpdateVals.clear();
293 for (
unsigned i = 0, e = Copies.
size(); i != e; ++i) {
299 if (MRI->hasOneNonDBGUse(Src) &&
300 MRI->constrainRegClass(Src, MRI->getRegClass(Dst))) {
302 MRI->replaceRegWith(Dst, Src);
308 NumAddedPHIs += NewPHIs.
size();
317 bool MadeChange =
false;
320 DEBUG(
dbgs() <<
"\n*** Before tail-duplicating\n");
330 bool IsSimple = isSimpleBB(MBB);
332 if (!shouldTailDuplicate(MF, IsSimple, *MBB))
335 MadeChange |= TailDuplicateAndUpdate(MBB, IsSimple, MF);
368 for (
const auto &
MI : BB) {
371 for (
unsigned i = 1, e =
MI.getNumOperands(); i != e; i += 2) {
372 unsigned SrcReg =
MI.getOperand(i).getReg();
373 UsedByPhi->
insert(SrcReg);
380 void TailDuplicatePass::AddSSAUpdateEntry(
unsigned OrigReg,
unsigned NewReg,
383 if (LI != SSAUpdateVals.
end())
384 LI->second.push_back(std::make_pair(BB, NewReg));
387 Vals.push_back(std::make_pair(BB, NewReg));
388 SSAUpdateVals.
insert(std::make_pair(OrigReg, Vals));
389 SSAUpdateVRs.push_back(OrigReg);
396 void TailDuplicatePass::ProcessPHI(
403 assert(SrcOpIdx &&
"Unable to find matching PHI source?");
406 LocalVRMap.
insert(std::make_pair(DefReg, SrcReg));
410 unsigned NewDef = MRI->createVirtualRegister(RC);
411 Copies.
push_back(std::make_pair(NewDef, SrcReg));
413 AddSSAUpdateEntry(DefReg, NewDef, PredBB);
427 void TailDuplicatePass::DuplicateInstruction(
MachineInstr *MI,
443 unsigned NewReg = MRI->createVirtualRegister(RC);
445 LocalVRMap.
insert(std::make_pair(Reg, NewReg));
447 AddSSAUpdateEntry(Reg, NewReg, PredBB);
450 if (VI != LocalVRMap.
end()) {
455 MRI->constrainRegClass(VI->second, MRI->getRegClass(Reg));
470 SE = Succs.
end();
SI != SE; ++
SI) {
478 for (
unsigned i = 1, e = II->getNumOperands(); i != e; i += 2) {
480 if (MO.
getMBB() == FromBB) {
488 unsigned Reg = MO0.
getReg();
493 for (
unsigned i = II->getNumOperands()-2; i != Idx; i -= 2) {
495 if (MO.
getMBB() == FromBB) {
496 II->RemoveOperand(i+1);
497 II->RemoveOperand(i);
507 if (LI != SSAUpdateVals.
end()) {
509 for (
unsigned j = 0, ee = LI->second.
size(); j != ee; ++j) {
518 unsigned SrcReg = LI->second[j].second;
520 II->getOperand(Idx).setReg(SrcReg);
521 II->getOperand(Idx+1).setMBB(SrcBB);
524 MIB.addReg(SrcReg).addMBB(SrcBB);
529 for (
unsigned j = 0, ee = TDBBs.
size(); j != ee; ++j) {
532 II->getOperand(Idx).setReg(Reg);
533 II->getOperand(Idx+1).setMBB(SrcBB);
536 MIB.addReg(Reg).addMBB(SrcBB);
541 II->RemoveOperand(Idx+1);
542 II->RemoveOperand(Idx);
564 unsigned MaxDuplicateCount;
567 MaxDuplicateCount = 1;
577 bool HasIndirectbr =
false;
581 if (HasIndirectbr && PreRegAlloc)
582 MaxDuplicateCount = 20;
586 unsigned InstrCount = 0;
589 if (
I->isNotDuplicable())
595 if (PreRegAlloc &&
I->isReturn())
601 if (PreRegAlloc &&
I->isCall())
604 if (!
I->isPHI() && !
I->isDebugValue())
607 if (InstrCount > MaxDuplicateCount)
611 if (HasIndirectbr && PreRegAlloc)
620 return canCompletelyDuplicateBB(TailBB);
631 if (I == TailBB->
end())
633 return I->isUnconditionalBranch();
652 PE = BB.
pred_end(); PI != PE; ++PI) {
663 if (!PredCond.
empty())
678 bool Changed =
false;
680 PE = Preds.end(); PI != PE; ++PI) {
695 DEBUG(
dbgs() <<
"\nTail-duplicating into PredBB: " << *PredBB
696 <<
"From simple Succ: " << *TailBB);
702 if (PredCond.
empty())
712 if (PredFBB == TailBB)
714 if (PredTBB == TailBB)
718 if (PredTBB == PredFBB) {
724 if (PredFBB == NextBB)
726 if (PredTBB == NextBB && PredFBB ==
nullptr)
734 uint32_t Weight = MBPI->getEdgeWeight(PredBB, TailBB);
736 unsigned NumSuccessors = PredBB->
succ_size();
737 assert(NumSuccessors <= 1);
738 if (NumSuccessors == 0 || *PredBB->
succ_begin() != NewTarget)
760 return duplicateSimpleBB(TailBB, TDBBs, UsedByPhi, Copies);
765 bool Changed =
false;
769 PE = Preds.end(); PI != PE; ++PI) {
772 assert(TailBB != PredBB &&
773 "Single-block loop should have been rejected earlier!");
782 if (!PredCond.
empty())
788 DEBUG(
dbgs() <<
"\nTail-duplicating into PredBB: " << *PredBB
789 <<
"From Succ: " << *TailBB);
798 RS->enterBasicBlock(PredBB);
799 if (!PredBB->
empty())
800 RS->forward(std::prev(PredBB->
end()));
803 if (!RS->isRegUsed(*I,
false))
823 ProcessPHI(MI, TailBB, PredBB, LocalVRMap, CopyInfos, UsedByPhi,
true);
827 DuplicateInstruction(MI, TailBB, PredBB, MF, LocalVRMap, UsedByPhi);
831 for (
unsigned i = 0, e = CopyInfos.
size(); i != e; ++i) {
834 CopyInfos[i].first).addReg(CopyInfos[i].second));
840 NumInstrDups += TailBB->
size() - 1;
845 "TailDuplicate called on block with multiple successors!");
848 PredBB->
addSuccessor(*I, MBPI->getEdgeWeight(TailBB, I));
866 DEBUG(
dbgs() <<
"\nMerging into block: " << *PrevBB
867 <<
"From MBB: " << *TailBB);
873 while (I != TailBB->
end() && I->isPHI()) {
877 ProcessPHI(MI, TailBB, PrevBB, LocalVRMap, CopyInfos, UsedByPhi,
true);
883 while (I != TailBB->
end()) {
887 assert(!MI->
isBundle() &&
"Not expecting bundles before regalloc!");
888 DuplicateInstruction(MI, TailBB, PrevBB, MF, LocalVRMap, UsedByPhi);
892 for (
unsigned i = 0, e = CopyInfos.
size(); i != e; ++i) {
896 .addReg(CopyInfos[i].second));
933 PE = Preds.end(); PI != PE; ++PI) {
935 if (std::find(TDBBs.
begin(), TDBBs.
end(), PredBB) != TDBBs.
end())
946 while (I != TailBB->
end() && I->isPHI()) {
950 ProcessPHI(MI, TailBB, PredBB, LocalVRMap, CopyInfos, UsedByPhi,
false);
953 for (
unsigned i = 0, e = CopyInfos.
size(); i != e; ++i) {
956 CopyInfos[i].first).addReg(CopyInfos[i].second));
966 assert(MBB->
pred_empty() &&
"MBB must be dead!");
967 DEBUG(
dbgs() <<
"\nRemoving MBB: " << *MBB);
unsigned succ_size() const
void push_back(const T &Elt)
const MachineFunction * getParent() const
getParent - Return the MachineFunction containing this basic block.
bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const override
static cl::opt< bool > TailDupVerify("tail-dup-verify", cl::desc("Verify sanity of PHI instructions during taildup"), cl::init(false), cl::Hidden)
MachineInstr * getParent()
getParent - Return the instruction that this operand belongs to.
instr_iterator instr_begin()
instr_iterator instr_end()
STATISTIC(NumFunctions,"Total number of functions")
MachineBasicBlock * getMBB() const
int getNumber() const
getNumber - MachineBasicBlocks are uniquely numbered at the function level, unless they're not in a M...
DenseSet - This implements a dense probed hash-table based set.
iterator getFirstNonDebugInstr()
getFirstNonDebugInstr - returns an iterator to the first non-debug instruction in the basic block...
std::vector< unsigned >::const_iterator livein_iterator
iterator getFirstTerminator()
getFirstTerminator - returns an iterator to the first terminator instruction of this basic block...
static bool isVirtualRegister(unsigned Reg)
isVirtualRegister - Return true if the specified register number is in the virtual register namespace...
size_type count(PtrType Ptr) const
count - Return 1 if the specified pointer is in the set, 0 otherwise.
void addLiveIn(unsigned Reg)
Adds the specified register as a live in.
const Function * getFunction() const
getFunction - Return the LLVM function that this machine code represents
static unsigned getPHISrcRegOpIdx(MachineInstr *MI, MachineBasicBlock *SrcBB)
Instructions::iterator instr_iterator
iterator end()
Get an iterator to the end of the SetVector.
MachineSSAUpdater - This class updates SSA form for a set of virtual registers defined in multiple bl...
COPY - Target-independent register copy.
std::pair< iterator, bool > insert(const std::pair< KeyT, ValueT > &KV)
livein_iterator livein_begin() const
AnalysisUsage & addRequired()
void eraseFromParent()
eraseFromParent - This method unlinks 'this' from the containing function and deletes it...
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
const HexagonInstrInfo * TII
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
bool isReg() const
isReg - Tests if this is a MO_Register operand.
void eraseFromParent()
Unlink 'this' from the containing basic block and delete it.
std::vector< MachineBasicBlock * >::iterator succ_iterator
Reg
All possible values of the reg field in the ModR/M byte.
unsigned getNumOperands() const
Access to explicit operands of the instruction.
void RemoveOperand(unsigned i)
Erase an operand from an instruction, leaving it with one fewer operand than it started with...
const HexagonRegisterInfo & getRegisterInfo() const
getRegisterInfo - TargetInstrInfo is a superset of MRegister info.
void transferSuccessors(MachineBasicBlock *fromMBB)
transferSuccessors - Transfers all the successors from MBB to this machine basic block (i...
bool LLVM_ATTRIBUTE_UNUSED_RESULT empty() const
bool canFallThrough()
canFallThrough - Return true if the block can implicitly transfer control to the block after it by fa...
iterator begin()
Get an iterator to the beginning of the SetVector.
bool livein_empty() const
std::vector< MachineBasicBlock * >::iterator pred_iterator
instr_iterator insert(instr_iterator I, MachineInstr *M)
Insert MI into the instruction list before I, possibly inside a bundle.
static bool bothUsedInPHI(const MachineBasicBlock &A, SmallPtrSet< MachineBasicBlock *, 8 > SuccsB)
const MachineBasicBlock * getParent() const
TargetInstrInfo - Interface to description of machine instruction set.
bool isDebugValue() const
bundle_iterator< MachineInstr, instr_iterator > iterator
initializer< Ty > init(const Ty &Val)
static void getRegsUsedByPHIs(const MachineBasicBlock &BB, DenseSet< unsigned > *UsedByPhi)
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
unsigned RemoveBranch(MachineBasicBlock &MBB) const override
size_type count(const ValueT &V) const
Return 1 if the specified key is in the set, 0 otherwise.
livein_iterator livein_end() const
const MachineOperand & getOperand(unsigned i) const
static cl::opt< unsigned > TailDupLimit("tail-dup-limit", cl::init(~0U), cl::Hidden)
bool isIndirectBranch(QueryType Type=AnyInBundle) const
Return true if this is an indirect branch, such as a branch through a register.
Represent the analysis usage information of a pass.
const MachineBasicBlock * getLandingPadSuccessor() const
getLandingPadSuccessor - If this block has a successor that is a landing pad, return it...
static bool isDefLiveOut(unsigned Reg, MachineBasicBlock *BB, const MachineRegisterInfo *MRI)
static cl::opt< unsigned > TailDuplicateSize("tail-dup-size", cl::desc("Maximum instructions to consider tail duplicating"), cl::init(2), cl::Hidden)
MachineInstrBuilder BuildMI(MachineFunction &MF, DebugLoc DL, const MCInstrDesc &MCID)
BuildMI - Builder interface.
succ_iterator succ_begin()
void removeSuccessor(MachineBasicBlock *succ)
removeSuccessor - Remove successor from the successors list of this MachineBasicBlock.
iterator_range< use_instr_iterator > use_instructions(unsigned Reg) const
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
pred_iterator pred_begin()
void setIsKill(bool Val=true)
A SetVector that performs no allocations if smaller than a certain size.
std::pair< iterator, bool > insert(const ValueT &V)
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements...
std::vector< std::pair< MachineBasicBlock *, unsigned > > AvailableValsTy
MachineOperand class - Representation of each machine instruction operand.
char & TailDuplicateID
TailDuplicate - Duplicate blocks with unconditional branches into tails of their predecessors.
bool isSuccessor(const MachineBasicBlock *MBB) const
isSuccessor - Return true if the specified MBB is a successor of this block.
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
Representation of each machine instruction.
bool hasAddressTaken() const
hasAddressTaken - Test whether this block is potentially the target of an indirect branch...
bool hasFnAttribute(Attribute::AttrKind Kind) const
Return true if the function has the attribute.
void splice(iterator Where, MachineBasicBlock *Other, iterator From)
Take an instruction from MBB 'Other' at the position From, and insert it into this MBB right before '...
void setReg(unsigned Reg)
Change the register this operand corresponds to.
INITIALIZE_PASS(TailDuplicatePass,"tailduplication","Tail Duplication", false, false) bool TailDuplicatePass
iterator find(const KeyT &Val)
static void VerifyPHIs(MachineFunction &MF, bool CheckExtra)
unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, DebugLoc DL) const override
unsigned getReg() const
getReg - Returns the register number.
std::vector< MachineBasicBlock * >::const_iterator const_succ_iterator
BasicBlockListType::iterator iterator
bool isLayoutSuccessor(const MachineBasicBlock *MBB) const
isLayoutSuccessor - Return true if the specified MBB will be emitted immediately after this block...
reg_begin/reg_end - Provide iteration support to walk over all definitions and uses of a register wit...
void addSuccessor(MachineBasicBlock *succ, uint32_t weight=0)
addSuccessor - Add succ as a successor of this MachineBasicBlock.
unsigned pred_size() const
MachineModuleInfo - This class contains meta information specific to a module.