23 #define DEBUG_TYPE "calcspillweights"
30 DEBUG(
dbgs() <<
"********** Compute Spill Weights **********\n"
31 <<
"********** Function: " << MF.
getName() <<
'\n');
35 for (
unsigned i = 0, e = MRI.getNumVirtRegs(); i != e; ++i) {
37 if (MRI.reg_nodbg_empty(Reg))
47 unsigned sub, hreg, hsub;
62 return sub == hsub ? hreg : 0;
68 return rc->
contains(hreg) ? hreg : 0;
87 assert(MI &&
"Dead valno in interval");
101 bool isExiting =
false;
102 float totalWeight = 0;
103 unsigned numInstr = 0;
107 float bestPhys = 0, bestVirt = 0;
108 unsigned hintPhys = 0, hintVirt = 0;
123 if (!visited.
insert(mi).second)
139 writes, reads, &MBFI, mi);
145 totalWeight += weight;
149 if (noHint || !mi->
isCopy())
158 volatile float hweight = Hint[hint] += weight;
161 bestPhys = hweight, hintPhys = hint;
163 if (hweight > bestVirt)
164 bestVirt = hweight, hintVirt = hint;
171 if (
unsigned hint = hintPhys ? hintPhys : hintVirt) {
174 totalWeight *= 1.01F;
Calculate auxiliary information for a virtual register such as its spill weight and allocation hint...
SlotIndex def
The index of the defining instruction.
static unsigned index2VirtReg(unsigned Index)
index2VirtReg - Convert a 0-based index to a virtual register number.
LiveInterval - This class represents the liveness of a register, or stack slot.
bool isSpillable() const
isSpillable - Can this interval be spilled?
static bool isVirtualRegister(unsigned Reg)
isVirtualRegister - Return true if the specified register number is in the virtual register namespace...
bool isLiveOutOfMBB(const LiveRange &LR, const MachineBasicBlock *mbb) const
MachineBlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate machine basic b...
bool isLoopExiting(const BlockT *BB) const
isLoopExiting - True if terminator in the block can branch to another block that is outside of the cu...
void calculateSpillWeightsAndHints(LiveIntervals &LIS, MachineFunction &MF, const MachineLoopInfo &MLI, const MachineBlockFrequencyInfo &MBFI, VirtRegAuxInfo::NormalizingFn norm=normalizeSpillWeight)
Compute spill weights and allocation hints for all virtual register live intervals.
VNInfo - Value Number Information.
static bool isRematerializable(const LiveInterval &LI, const LiveIntervals &LIS, const TargetInstrInfo &TII)
float(* NormalizingFn)(float, unsigned, unsigned)
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
const HexagonInstrInfo * TII
std::pair< bool, bool > readsWritesVirtualRegister(unsigned Reg, SmallVectorImpl< unsigned > *Ops=nullptr) const
Return a pair of bools (reads, writes) indicating if this instruction reads or writes Reg...
const TargetRegisterClass * getRegClass(unsigned Reg) const
getRegClass - Return the register class of the specified virtual register.
Reg
All possible values of the reg field in the ModR/M byte.
unsigned getSize() const
getSize - Returns the sum of sizes of all the LiveRange's.
bool isUnused() const
Returns true if this value is unused.
static reg_instr_iterator reg_instr_end()
defusechain_iterator - This class provides iterator support for machine operands in the function that...
static bool sub(uint64_t *dest, const uint64_t *x, const uint64_t *y, unsigned len)
Subtracts the integer array y from the integer array x.
unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx, const TargetRegisterClass *RC) const
getMatchingSuperReg - Return a super-register of the specified register Reg so its sub-register of in...
VNInfoList::const_iterator const_vni_iterator
static unsigned copyHint(const MachineInstr *mi, unsigned reg, const TargetRegisterInfo &tri, const MachineRegisterInfo &mri)
const MachineBasicBlock * getParent() const
TargetInstrInfo - Interface to description of machine instruction set.
bool isDebugValue() const
bool isImplicitDef() const
MachineLoop * getLoopFor(const MachineBasicBlock *BB) const
getLoopFor - Return the inner most loop that BB lives in.
SlotIndexes * getSlotIndexes() const
const MachineOperand & getOperand(unsigned i) const
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
reg_instr_iterator reg_instr_begin(unsigned RegNo) const
static float getSpillWeight(bool isDef, bool isUse, const MachineBlockFrequencyInfo *MBFI, const MachineInstr *Instr)
unsigned getSubReg() const
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
bool isPHIDef() const
Returns true if this value is defined by a PHI instruction (or was, PHI instructions may have been el...
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements...
void setRegAllocationHint(unsigned VReg, unsigned Type, unsigned PrefReg)
setRegAllocationHint - Specify a register allocation hint for the specified virtual register...
void calculateSpillWeightAndHint(LiveInterval &li)
(re)compute li's spill weight and allocation hint.
bool isIdentityCopy() const
Return true is the instruction is an identity copy.
bool isTriviallyReMaterializable(const MachineInstr *MI, AliasAnalysis *AA=nullptr) const
Return true if the instruction is trivially rematerializable, meaning it has no side effects and requ...
bool isAllocatable(unsigned PhysReg) const
isAllocatable - Returns true when PhysReg belongs to an allocatable register class and it hasn't been...
void markNotSpillable()
markNotSpillable - Mark interval as not spillable
LiveInterval & getInterval(unsigned Reg)
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
bool isZeroLength(SlotIndexes *Indexes) const
Returns true if the live range is zero length, i.e.
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
Representation of each machine instruction.
static bool isPhysicalRegister(unsigned Reg)
isPhysicalRegister - Return true if the specified register number is in the physical register namespa...
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
unsigned getReg() const
getReg - Returns the register number.
virtual const TargetInstrInfo * getInstrInfo() const
AliasAnalysis * getAliasAnalysis() const
MachineInstr * getInstructionFromIndex(SlotIndex index) const
Returns the instruction associated with the given index.
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
std::pair< unsigned, unsigned > getRegAllocationHint(unsigned VReg) const
getRegAllocationHint - Return the register allocation hint for the specified virtual register...
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
bool contains(unsigned Reg) const
contains - Return true if the specified register is included in this register class.