14 #ifndef LLVM_LIB_TARGET_MIPS_MIPSSEINSTRINFO_H
15 #define LLVM_LIB_TARGET_MIPS_MIPSSEINSTRINFO_H
44 int &FrameIndex)
const override;
48 unsigned DestReg,
unsigned SrcReg,
49 bool KillSrc)
const override;
53 unsigned SrcReg,
bool isKill,
int FrameIndex,
56 int64_t Offset)
const override;
60 unsigned DestReg,
int FrameIndex,
63 int64_t Offset)
const override;
78 unsigned *NewImm)
const;
81 unsigned getAnalyzableBrOpc(
unsigned Opc)
const override;
85 std::pair<bool, bool> compareOpndSize(
unsigned Opc,
89 unsigned NewOpc)
const;
92 unsigned LoOpc,
unsigned HiOpc,
93 bool HasExplicitDef)
const;
106 unsigned CvtOpc,
unsigned MovOpc,
bool IsI64)
const;
void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const override
unsigned getOppositeBranchOpc(unsigned Opc) const override
getOppositeBranchOpc - Return the inverse of the specified opcode, e.g.
void loadRegFromStack(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, int64_t Offset) const override
MipsSEInstrInfo(const MipsSubtarget &STI)
void adjustStackPtr(unsigned SP, int64_t Amount, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const override
Adjust SP by Amount bytes.
void storeRegToStack(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, int64_t Offset) const override
bundle_iterator< MachineInstr, instr_iterator > iterator
bool expandPostRAPseudo(MachineBasicBlock::iterator MI) const override
unsigned isLoadFromStackSlot(const MachineInstr *MI, int &FrameIndex) const override
isLoadFromStackSlot - If the specified machine instruction is a direct load from a stack slot...
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
unsigned isStoreToStackSlot(const MachineInstr *MI, int &FrameIndex) const override
isStoreToStackSlot - If the specified machine instruction is a direct store to a stack slot...
Representation of each machine instruction.
unsigned loadImmediate(int64_t Imm, MachineBasicBlock &MBB, MachineBasicBlock::iterator II, DebugLoc DL, unsigned *NewImm) const
Emit a series of instructions to load an immediate.
const MipsRegisterInfo & getRegisterInfo() const override
getRegisterInfo - TargetInstrInfo is a superset of MRegister info.