34 PPC::V0 , PPC::V1 ,
PPC::V2 , PPC::V3 ,
PPC::V4 , PPC::V5 , PPC::V6 , PPC::V7 ,
35 PPC::V8 , PPC::V9 , PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V14, PPC::V15,
36 PPC::V16, PPC::V17, PPC::V18, PPC::V19, PPC::V20, PPC::V21, PPC::V22, PPC::V23,
37 PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31
58 return STI.
isPPC64() ? -8U : -4U;
61 return STI.
isPPC64() ? -8U : -4U;
74 return STI.
isPPC64() ? -16U : -8U;
86 STI.getPlatformStackAlignment(), 0),
95 unsigned &NumEntries)
const {
99 static const SpillSlot darwin64Offsets = {PPC::X31, -8};
100 return &darwin64Offsets;
102 static const SpillSlot darwinOffsets = {PPC::R31, -4};
103 return &darwinOffsets;
265 assert(MBBI != Entry->
end() && MBBI->getOpcode() == PPC::MTVRSAVE);
266 MBBI->eraseFromParent();
268 bool RemovedAllMTVRSAVEs =
true;
273 if (!
I->empty() &&
I->back().isReturn()) {
274 bool FoundIt =
false;
275 for (MBBI =
I->end(); MBBI !=
I->begin(); ) {
277 if (MBBI->getOpcode() == PPC::MTVRSAVE) {
278 MBBI->eraseFromParent();
283 RemovedAllMTVRSAVEs &= FoundIt;
289 if (RemovedAllMTVRSAVEs) {
291 assert(MBBI != Entry->
begin() &&
"UPDATE_VRSAVE is first instr in block?");
293 assert(MBBI->getOpcode() == PPC::MFVRSAVE &&
"VRSAVE instrs wandered?");
294 MBBI->eraseFromParent();
309 unsigned UsedRegMask = 0;
310 for (
unsigned i = 0; i != 32; ++i)
312 UsedRegMask |= 1 << (31-i);
321 UsedRegMask &= ~(1 << (31-RegNo));
326 UsedRegMask != 0 && BI != BE; ++BI) {
333 if (!MO.
isReg() || !PPC::VRRCRegClass.contains(MO.
getReg()))
336 UsedRegMask &= ~(1 << (31-RegNo));
341 if (UsedRegMask == 0) {
350 if ((UsedRegMask & 0xFFFF) == UsedRegMask) {
351 if (DstReg != SrcReg)
359 }
else if ((UsedRegMask & 0xFFFF0000) == UsedRegMask) {
360 if (DstReg != SrcReg)
363 .
addImm(UsedRegMask >> 16);
367 .
addImm(UsedRegMask >> 16);
369 if (DstReg != SrcReg)
372 .
addImm(UsedRegMask >> 16);
376 .
addImm(UsedRegMask >> 16);
380 .
addImm(UsedRegMask & 0xFFFF);
425 bool UseEstimate)
const {
435 unsigned AlignMask = std::max(MaxAlign, TargetAlign) - 1;
446 unsigned LR = RegInfo->getRARegister();
447 if (!DisableRedZone &&
467 maxCallFrameSize = std::max(maxCallFrameSize, minCallFrameSize);
472 maxCallFrameSize = (maxCallFrameSize + AlignMask) & ~AlignMask;
479 FrameSize += maxCallFrameSize;
482 FrameSize = (FrameSize + AlignMask) & ~AlignMask;
521 unsigned FPReg = is31 ? PPC::R31 : PPC::R1;
522 unsigned FP8Reg = is31 ? PPC::X31 : PPC::X1;
528 unsigned BP8Reg = HasBP ? (
unsigned) PPC::X30 : FPReg;
534 for (
unsigned I = 0, E = MBBI->getNumOperands();
I != E; ++
I) {
560 assert(&MF.
front() == &MBB &&
"Shrink-wrapping not yet supported");
575 bool isPPC64 = Subtarget.
isPPC64();
580 "Currently only Darwin and SVR4 ABIs are supported for PowerPC.");
585 for (
unsigned i = 0; MBBI != MBB.
end(); ++i, ++MBBI) {
586 if (MBBI->getOpcode() == PPC::UPDATE_VRSAVE) {
597 int NegFrameSize = -FrameSize;
609 bool HasFP =
hasFP(MF);
612 unsigned SPReg = isPPC64 ? PPC::X1 : PPC::R1;
614 unsigned FPReg = isPPC64 ? PPC::X31 : PPC::R31;
615 unsigned LRReg = isPPC64 ? PPC::LR8 : PPC::LR;
616 unsigned ScratchReg = isPPC64 ? PPC::X0 : PPC::R0;
617 unsigned TempReg = isPPC64 ? PPC::X12 : PPC::R12;
619 const MCInstrDesc& MFLRInst = TII.get(isPPC64 ? PPC::MFLR8
623 const MCInstrDesc& StoreUpdtInst = TII.get(isPPC64 ? PPC::STDU
625 const MCInstrDesc& StoreUpdtIdxInst = TII.get(isPPC64 ? PPC::STDUX
627 const MCInstrDesc& LoadImmShiftedInst = TII.get(isPPC64 ? PPC::LIS8
629 const MCInstrDesc& OrImmInst = TII.get(isPPC64 ? PPC::ORI8
631 const MCInstrDesc& OrInst = TII.get(isPPC64 ? PPC::OR8
633 const MCInstrDesc& SubtractCarryingInst = TII.get(isPPC64 ? PPC::SUBFC8
635 const MCInstrDesc& SubtractImmCarryingInst = TII.get(isPPC64 ? PPC::SUBFIC8
642 assert((isPPC64 || !isSVR4ABI || !(!FrameSize && (MustSaveLR || HasFP))) &&
643 "FrameSize must be >0 to save/restore the FP or LR for 32-bit SVR4.");
652 assert(FPIndex &&
"No Frame Pointer Save Slot!");
664 assert(BPIndex &&
"No Base Pointer Save Slot!");
675 assert(PBPIndex &&
"No PIC Base Pointer Save Slot!");
681 if (HasBP && MaxAlign > 1)
683 "Invalid alignment!");
687 bool isLargeFrame = !
isInt<16>(NegFrameSize);
690 BuildMI(MBB, MBBI, dl, MFLRInst, ScratchReg);
692 assert((isPPC64 || MustSaveCRs.
empty()) &&
693 "Prologue CR saving supported only in 64-bit mode");
695 if (!MustSaveCRs.
empty()) {
700 BuildMI(MBB, MBBI, dl, TII.get(PPC::MFCR8), TempReg);
701 for (
unsigned i = 0, e = MustSaveCRs.
size(); i != e; ++i)
707 BuildMI(MBB, MBBI, dl, StoreInst)
714 BuildMI(MBB, MBBI, dl, StoreInst)
721 BuildMI(MBB, MBBI, dl, StoreInst)
728 BuildMI(MBB, MBBI, dl, StoreInst)
733 if (!MustSaveCRs.
empty())
734 BuildMI(MBB, MBBI, dl, TII.get(PPC::STW8))
740 if (!FrameSize)
return;
747 BuildMI(MBB, MBBI, dl, OrInst, BPReg)
752 if (HasBP && MaxAlign > 1) {
754 BuildMI(MBB, MBBI, dl, TII.get(PPC::RLDICL), ScratchReg)
759 BuildMI(MBB, MBBI, dl, TII.get(PPC::RLWINM), ScratchReg)
765 BuildMI(MBB, MBBI, dl, SubtractImmCarryingInst, ScratchReg)
769 BuildMI(MBB, MBBI, dl, LoadImmShiftedInst, TempReg)
770 .
addImm(NegFrameSize >> 16);
771 BuildMI(MBB, MBBI, dl, OrImmInst, TempReg)
773 .
addImm(NegFrameSize & 0xFFFF);
774 BuildMI(MBB, MBBI, dl, SubtractCarryingInst, ScratchReg)
778 BuildMI(MBB, MBBI, dl, StoreUpdtIdxInst, SPReg)
783 }
else if (!isLargeFrame) {
784 BuildMI(MBB, MBBI, dl, StoreUpdtInst, SPReg)
790 BuildMI(MBB, MBBI, dl, LoadImmShiftedInst, ScratchReg)
791 .
addImm(NegFrameSize >> 16);
792 BuildMI(MBB, MBBI, dl, OrImmInst, ScratchReg)
794 .
addImm(NegFrameSize & 0xFFFF);
795 BuildMI(MBB, MBBI, dl, StoreUpdtIdxInst, SPReg)
814 assert(NegFrameSize);
819 .addCFIIndex(CFIIndex);
827 .addCFIIndex(CFIIndex);
836 .addCFIIndex(CFIIndex);
845 .addCFIIndex(CFIIndex);
854 .addCFIIndex(CFIIndex);
860 BuildMI(MBB, MBBI, dl, OrInst, FPReg)
864 if (!HasBP && needsCFI) {
872 .addCFIIndex(CFIIndex);
880 for (
unsigned I = 0, E = CSI.size();
I != E; ++
I) {
881 unsigned Reg = CSI[
I].getReg();
882 if (Reg == PPC::LR || Reg == PPC::LR8 || Reg ==
PPC::RM)
continue;
886 if (PPC::CRBITRCRegClass.
contains(Reg))
891 if (isSVR4ABI && (PPC::CR2 <= Reg && Reg <= PPC::CR4)
892 && MustSaveCRs.
empty())
897 if (isSVR4ABI && isPPC64 && (PPC::CR2 <= Reg && Reg <= PPC::CR4)) {
901 unsigned CRReg = isELFv2ABI? Reg : (
unsigned) PPC::CR2;
905 .addCFIIndex(CFIIndex);
913 .addCFIIndex(CFIIndex);
921 assert(MBBI != MBB.
end() &&
"Returning block has no terminator");
927 unsigned RetOpcode = MBBI->getOpcode();
930 assert((RetOpcode == PPC::BLR ||
931 RetOpcode == PPC::BLR8 ||
932 RetOpcode == PPC::TCRETURNri ||
933 RetOpcode == PPC::TCRETURNdi ||
934 RetOpcode == PPC::TCRETURNai ||
935 RetOpcode == PPC::TCRETURNri8 ||
936 RetOpcode == PPC::TCRETURNdi8 ||
937 RetOpcode == PPC::TCRETURNai8) &&
938 "Can only insert epilog into returning blocks");
947 bool isPPC64 = Subtarget.
isPPC64();
956 bool HasFP =
hasFP(MF);
959 unsigned SPReg = isPPC64 ? PPC::X1 : PPC::R1;
961 unsigned FPReg = isPPC64 ? PPC::X31 : PPC::R31;
962 unsigned ScratchReg = isPPC64 ? PPC::X0 : PPC::R0;
963 unsigned TempReg = isPPC64 ? PPC::X12 : PPC::R12;
964 const MCInstrDesc& MTLRInst = TII.get( isPPC64 ? PPC::MTLR8
968 const MCInstrDesc& LoadImmShiftedInst = TII.get( isPPC64 ? PPC::LIS8
970 const MCInstrDesc& OrImmInst = TII.get( isPPC64 ? PPC::ORI8
972 const MCInstrDesc& AddImmInst = TII.get( isPPC64 ? PPC::ADDI8
974 const MCInstrDesc& AddInst = TII.get( isPPC64 ? PPC::ADD8
984 assert(FPIndex &&
"No Frame Pointer Save Slot!");
996 assert(BPIndex &&
"No Base Pointer Save Slot!");
1007 assert(PBPIndex &&
"No PIC Base Pointer Save Slot!");
1011 bool UsesTCRet = RetOpcode == PPC::TCRETURNri ||
1012 RetOpcode == PPC::TCRETURNdi ||
1013 RetOpcode == PPC::TCRETURNai ||
1014 RetOpcode == PPC::TCRETURNri8 ||
1015 RetOpcode == PPC::TCRETURNdi8 ||
1016 RetOpcode == PPC::TCRETURNai8;
1021 assert(StackAdjust.
isImm() &&
"Expecting immediate value.");
1023 int StackAdj = StackAdjust.
getImm();
1024 int Delta = StackAdj - MaxTCRetDelta;
1025 assert((Delta >= 0) &&
"Delta must be positive");
1026 if (MaxTCRetDelta>0)
1027 FrameSize += (StackAdj +Delta);
1029 FrameSize += StackAdj;
1034 bool isLargeFrame = !
isInt<16>(FrameSize);
1045 assert(HasFP &&
"Expecting a valid frame pointer.");
1046 if (!isLargeFrame) {
1047 BuildMI(MBB, MBBI, dl, AddImmInst, SPReg)
1050 BuildMI(MBB, MBBI, dl, LoadImmShiftedInst, ScratchReg)
1051 .
addImm(FrameSize >> 16);
1052 BuildMI(MBB, MBBI, dl, OrImmInst, ScratchReg)
1054 .
addImm(FrameSize & 0xFFFF);
1055 BuildMI(MBB, MBBI, dl, AddInst)
1061 BuildMI(MBB, MBBI, dl, AddImmInst, SPReg)
1065 BuildMI(MBB, MBBI, dl, LoadInst, SPReg)
1073 BuildMI(MBB, MBBI, dl, LoadInst, ScratchReg)
1077 assert((isPPC64 || MustSaveCRs.
empty()) &&
1078 "Epilogue CR restoring supported only in 64-bit mode");
1080 if (!MustSaveCRs.
empty())
1081 BuildMI(MBB, MBBI, dl, TII.
get(PPC::LWZ8), TempReg)
1086 BuildMI(MBB, MBBI, dl, LoadInst, FPReg)
1092 BuildMI(MBB, MBBI, dl, LoadInst)
1098 BuildMI(MBB, MBBI, dl, LoadInst, BPReg)
1102 if (!MustSaveCRs.
empty())
1103 for (
unsigned i = 0, e = MustSaveCRs.
size(); i != e; ++i)
1104 BuildMI(MBB, MBBI, dl, TII.
get(PPC::MTOCRF8), MustSaveCRs[i])
1113 (RetOpcode == PPC::BLR || RetOpcode == PPC::BLR8) &&
1118 if (CallerAllocatedAmt &&
isInt<16>(CallerAllocatedAmt)) {
1119 BuildMI(MBB, MBBI, dl, AddImmInst, SPReg)
1122 BuildMI(MBB, MBBI, dl, LoadImmShiftedInst, ScratchReg)
1123 .
addImm(CallerAllocatedAmt >> 16);
1124 BuildMI(MBB, MBBI, dl, OrImmInst, ScratchReg)
1126 .
addImm(CallerAllocatedAmt & 0xFFFF);
1127 BuildMI(MBB, MBBI, dl, AddInst)
1132 }
else if (RetOpcode == PPC::TCRETURNdi) {
1137 }
else if (RetOpcode == PPC::TCRETURNri) {
1139 assert(MBBI->getOperand(0).isReg() &&
"Expecting register operand.");
1140 BuildMI(MBB, MBBI, dl, TII.
get(PPC::TAILBCTR));
1141 }
else if (RetOpcode == PPC::TCRETURNai) {
1145 }
else if (RetOpcode == PPC::TCRETURNdi8) {
1148 BuildMI(MBB, MBBI, dl, TII.
get(PPC::TAILB8)).
1150 }
else if (RetOpcode == PPC::TCRETURNri8) {
1152 assert(MBBI->getOperand(0).isReg() &&
"Expecting register operand.");
1153 BuildMI(MBB, MBBI, dl, TII.
get(PPC::TAILBCTR8));
1154 }
else if (RetOpcode == PPC::TCRETURNai8) {
1171 unsigned LR = RegInfo->getRARegister();
1173 SavedRegs.
reset(LR);
1177 bool isPPC64 = Subtarget.
isPPC64();
1217 if (!isPPC64 && !isDarwinABI &&
1218 (SavedRegs.
test(PPC::CR2) ||
1219 SavedRegs.
test(PPC::CR3) ||
1220 SavedRegs.
test(PPC::CR4))) {
1239 if (CSI.empty() && !
needsFP(MF)) {
1244 unsigned MinGPR = PPC::R31;
1245 unsigned MinG8R = PPC::X31;
1246 unsigned MinFPR = PPC::F31;
1247 unsigned MinVR = PPC::V31;
1249 bool HasGPSaveArea =
false;
1250 bool HasG8SaveArea =
false;
1251 bool HasFPSaveArea =
false;
1252 bool HasVRSAVESaveArea =
false;
1253 bool HasVRSaveArea =
false;
1260 for (
unsigned i = 0, e = CSI.size(); i != e; ++i) {
1261 unsigned Reg = CSI[i].getReg();
1262 if (PPC::GPRCRegClass.
contains(Reg)) {
1263 HasGPSaveArea =
true;
1270 }
else if (PPC::G8RCRegClass.
contains(Reg)) {
1271 HasG8SaveArea =
true;
1278 }
else if (PPC::F8RCRegClass.
contains(Reg)) {
1279 HasFPSaveArea =
true;
1286 }
else if (PPC::CRBITRCRegClass.
contains(Reg) ||
1289 }
else if (PPC::VRSAVERCRegClass.
contains(Reg)) {
1290 HasVRSAVESaveArea =
true;
1291 }
else if (PPC::VRRCRegClass.
contains(Reg)) {
1292 HasVRSaveArea =
true;
1307 int64_t LowerBound = 0;
1313 LowerBound = TCSPDelta;
1318 if (HasFPSaveArea) {
1319 for (
unsigned i = 0, e = FPRegs.
size(); i != e; ++i) {
1320 int FI = FPRegs[i].getFrameIdx();
1325 LowerBound -= (31 - TRI->getEncodingValue(MinFPR) + 1) * 8;
1331 HasGPSaveArea =
true;
1334 assert(FI &&
"No Frame Pointer Save Slot!");
1340 HasGPSaveArea =
true;
1343 assert(FI &&
"No PIC Base Pointer Save Slot!");
1351 HasGPSaveArea =
true;
1354 assert(FI &&
"No Base Pointer Save Slot!");
1361 if (HasGPSaveArea || HasG8SaveArea) {
1364 for (
unsigned i = 0, e = GPRegs.
size(); i != e; ++i) {
1365 int FI = GPRegs[i].getFrameIdx();
1372 for (
unsigned i = 0, e = G8Regs.
size(); i != e; ++i) {
1373 int FI = G8Regs[i].getFrameIdx();
1379 std::min<unsigned>(TRI->getEncodingValue(MinGPR),
1380 TRI->getEncodingValue(MinG8R));
1383 LowerBound -= (31 - MinReg + 1) * 8;
1385 LowerBound -= (31 - MinReg + 1) * 4;
1396 for (
unsigned i = 0, e = CSI.size(); i != e; ++i) {
1397 unsigned Reg = CSI[i].getReg();
1399 if ((Subtarget.
isSVR4ABI() && Reg == PPC::CR2)
1402 (PPC::CRBITRCRegClass.contains(Reg) ||
1403 PPC::CRRCRegClass.contains(Reg)))) {
1404 int FI = CSI[i].getFrameIdx();
1413 if (HasVRSAVESaveArea) {
1417 for (
unsigned i = 0, e = CSI.size(); i != e; ++i) {
1418 unsigned Reg = CSI[i].getReg();
1420 if (PPC::VRSAVERCRegClass.
contains(Reg)) {
1421 int FI = CSI[i].getFrameIdx();
1430 if (HasVRSaveArea) {
1432 LowerBound = (LowerBound - 15) & ~(15);
1434 for (
unsigned i = 0, e = VRegs.
size(); i != e; ++i) {
1435 int FI = VRegs[i].getFrameIdx();
1487 const std::vector<CalleeSavedInfo> &CSI,
1499 bool CRSpilled =
false;
1502 for (
unsigned i = 0, e = CSI.size(); i != e; ++i) {
1503 unsigned Reg = CSI[i].getReg();
1507 if (Reg == PPC::VRSAVE && !Subtarget.
isDarwinABI())
1511 bool IsCRField = PPC::CR2 <= Reg && Reg <= PPC::CR4;
1516 if (CRSpilled && IsCRField) {
1533 CRMIB =
BuildMI(*MF, DL, TII.get(PPC::MFCR), PPC::R12)
1540 CSI[i].getFrameIdx()));
1545 CSI[i].getFrameIdx(), RC, TRI);
1553 bool CR2Spilled,
bool CR3Spilled,
bool CR4Spilled,
1555 const std::vector<CalleeSavedInfo> &CSI,
unsigned CSIIndex) {
1560 unsigned RestoreOp, MoveReg;
1569 CSI[CSIIndex].getFrameIdx()));
1570 RestoreOp = PPC::MTOCRF;
1575 MBB.
insert(MI,
BuildMI(*MF, DL, TII.get(RestoreOp), PPC::CR2)
1579 MBB.
insert(MI,
BuildMI(*MF, DL, TII.get(RestoreOp), PPC::CR3)
1583 MBB.
insert(MI,
BuildMI(*MF, DL, TII.get(RestoreOp), PPC::CR4)
1592 I->getOpcode() == PPC::ADJCALLSTACKUP) {
1594 if (
int CalleeAmt = I->getOperand(1).getImm()) {
1597 unsigned StackReg = is64Bit ? PPC::X1 : PPC::R1;
1598 unsigned TmpReg = is64Bit ? PPC::X0 : PPC::R0;
1599 unsigned ADDIInstr = is64Bit ? PPC::ADDI8 : PPC::ADDI;
1600 unsigned ADDInstr = is64Bit ? PPC::ADD8 : PPC::ADD4;
1601 unsigned LISInstr = is64Bit ? PPC::LIS8 : PPC::LIS;
1602 unsigned ORIInstr = is64Bit ? PPC::ORI8 : PPC::ORI;
1607 BuildMI(MBB, I, dl, TII.
get(ADDIInstr), StackReg)
1612 BuildMI(MBB, MBBI, dl, TII.
get(LISInstr), TmpReg)
1613 .addImm(CalleeAmt >> 16);
1614 BuildMI(MBB, MBBI, dl, TII.
get(ORIInstr), TmpReg)
1616 .
addImm(CalleeAmt & 0xFFFF);
1617 BuildMI(MBB, MBBI, dl, TII.
get(ADDInstr), StackReg)
1630 const std::vector<CalleeSavedInfo> &CSI,
1641 bool CR2Spilled =
false;
1642 bool CR3Spilled =
false;
1643 bool CR4Spilled =
false;
1644 unsigned CSIIndex = 0;
1649 bool AtStart = I == MBB.
begin();
1654 for (
unsigned i = 0, e = CSI.size(); i != e; ++i) {
1655 unsigned Reg = CSI[i].getReg();
1660 if (Reg == PPC::VRSAVE && !Subtarget.
isDarwinABI())
1663 if (Reg == PPC::CR2) {
1669 }
else if (Reg == PPC::CR3) {
1672 }
else if (Reg == PPC::CR4) {
1678 if ((CR2Spilled || CR3Spilled || CR4Spilled)
1679 && !(PPC::CR2 <= Reg && Reg <= PPC::CR4)) {
1682 CR2Spilled, CR3Spilled, CR4Spilled,
1683 MBB,
I, CSI, CSIIndex);
1684 CR2Spilled = CR3Spilled = CR4Spilled =
false;
1691 assert(I != MBB.
begin() &&
1692 "loadRegFromStackSlot didn't insert any code!");
1705 if (CR2Spilled || CR3Spilled || CR4Spilled) {
1708 MBB,
I, CSI, CSIIndex);
void replaceFPWithRealFP(MachineFunction &MF) const
bool isInt< 32 >(int64_t x)
unsigned getStackAlignment() const
getStackAlignment - This method returns the number of bytes to which the stack pointer must be aligne...
void push_back(const T &Elt)
const MachineFunction * getParent() const
getParent - Return the MachineFunction containing this basic block.
int getDwarfRegNum(unsigned RegNum, bool isEH) const
Map a target register to an equivalent dwarf register number.
bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const std::vector< CalleeSavedInfo > &CSI, const TargetRegisterInfo *TRI) const override
spillCalleeSavedRegisters - Issues instruction(s) to spill all callee saved registers and returns tru...
const GlobalValue * getGlobal() const
const SpillSlot * getCalleeSavedSpillSlots(unsigned &NumEntries) const override
getCalleeSavedSpillSlots - This method returns a pointer to an array of pairs, that contains an entry...
void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override
int getTailCallSPDelta() const
static const unsigned GPRegs[]
Reloc::Model getRelocationModel() const
Returns the code generation relocation model.
livein_iterator livein_end() const
const PPCTargetMachine & getTargetMachine() const
void addMustSaveCR(unsigned Reg)
Describe properties that are true of each instruction in the target description file.
static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register, int Offset)
.cfi_offset Previous value of Register is saved at offset Offset from CFA.
static void RemoveVRSaveCode(MachineInstr *MI)
RemoveVRSaveCode - We have found that this function does not need any code to manipulate the VRSAVE r...
bool adjustsStack() const
Return true if this function adjusts the stack – e.g., when calling another function.
void addLiveIn(unsigned Reg)
Adds the specified register as a live in.
void setFramePointerSaveIndex(int Idx)
static unsigned computeTOCSaveOffset(const PPCSubtarget &STI)
static const MCPhysReg VRegs[32]
bool isLRStoreRequired() const
const Function * getFunction() const
getFunction - Return the LLVM function that this machine code represents
LoadInst - an instruction for reading from memory.
void eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const override
eliminateCallFramePseudoInstr - This method is called during prolog/epilog code insertion to eliminat...
static MCCFIInstruction createDefCfaOffset(MCSymbol *L, int Offset)
.cfi_def_cfa_offset modifies a rule for computing CFA.
CallingConv::ID getCallingConv() const
getCallingConv()/setCallingConv(CC) - These method get and set the calling convention of this functio...
static void restoreCRs(bool isPPC64, bool is31, bool CR2Spilled, bool CR3Spilled, bool CR4Spilled, MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const std::vector< CalleeSavedInfo > &CSI, unsigned CSIIndex)
unsigned getMaxAlignment() const
Return the alignment in bytes that this function must be aligned to, which is greater than the defaul...
const std::vector< CalleeSavedInfo > & getCalleeSavedInfo() const
Returns a reference to call saved info vector for the current function.
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects...
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override
unsigned getSize() const
getSize - Return the size of the register in bytes, which is also the size of a stack slot allocated ...
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
PPCFunctionInfo - This class is derived from MachineFunction private PowerPC target-specific informat...
DILocation * get() const
Get the underlying DILocation.
const HexagonInstrInfo * TII
bool isImm() const
isImm - Tests if this is a MO_Immediate operand.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
unsigned getMinReservedArea() const
bool DisableFramePointerElim(const MachineFunction &MF) const
DisableFramePointerElim - This returns true if frame pointer elimination optimization should be disab...
bool isReg() const
isReg - Tests if this is a MO_Register operand.
void eraseFromParent()
Unlink 'this' from the containing basic block and delete it.
void processFunctionBeforeFrameFinalized(MachineFunction &MF, RegScavenger *RS=nullptr) const override
processFunctionBeforeFrameFinalized - This method is called immediately before the specified function...
Reg
All possible values of the reg field in the ModR/M byte.
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted...
bool isFrameAddressTaken() const
This method may be called any time after instruction selection is complete to determine if there is a...
bool isVRSAVESpilled() const
bool hasDebugInfo() const
hasDebugInfo - Returns true if valid debug info is present.
static bool contains(SmallPtrSetImpl< ConstantExpr * > &Cache, ConstantExpr *Expr, Constant *C)
bool hasFP(const MachineFunction &MF) const override
hasFP - Return true if the specified function should have a dedicated frame pointer register...
const MachineInstrBuilder & addImm(int64_t Val) const
addImm - Add a new immediate operand.
unsigned getNumOperands() const
Access to explicit operands of the instruction.
unsigned getReturnSaveOffset() const
getReturnSaveOffset - Return the previous frame offset to save the return address.
int getBasePointerSaveIndex() const
static bool hasNonRISpills(const MachineFunction &MF)
const MachineBasicBlock & front() const
void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const override
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
unsigned getBasePointerSaveOffset() const
getBasePointerSaveOffset - Return the previous frame offset to save the base pointer.
bool LLVM_ATTRIBUTE_UNUSED_RESULT empty() const
static const uint16_t VRRegNo[]
VRRegNo - Map from a numbered VR register to its enum value.
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override
emitProlog/emitEpilog - These methods insert prolog and epilog code into the function.
unsigned LLVM_ATTRIBUTE_UNUSED_RESULT addFrameInst(const MCCFIInstruction &Inst)
int getPICBasePointerSaveIndex() const
iterator getLastNonDebugInstr()
getLastNonDebugInstr - returns an iterator to the last non-debug instruction in the basic block...
StoreInst - an instruction for storing to memory.
int getFramePointerSaveIndex() const
const SmallVectorImpl< unsigned > & getMustSaveCRs() const
instr_iterator insert(instr_iterator I, MachineInstr *M)
Insert MI into the instruction list before I, possibly inside a bundle.
unsigned getKillRegState(bool B)
unsigned estimateStackSize(const MachineFunction &MF) const
Estimate and return the size of the stack frame.
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
const MachineBasicBlock * getParent() const
TargetInstrInfo - Interface to description of machine instruction set.
LLVM_CONSTEXPR size_t array_lengthof(T(&)[N])
Find the length of an array.
bundle_iterator< MachineInstr, instr_iterator > iterator
bool hasStackMap() const
This method may be called any time after instruction selection is complete to determine if there is a...
bool isReturn(QueryType Type=AnyInBundle) const
static const unsigned G8Regs[]
unsigned getFramePointerSaveOffset() const
getFramePointerSaveOffset - Return the previous frame offset to save the frame pointer.
void addScavengingSpillSlot(MachineFunction &MF, RegScavenger *RS) const
unsigned getBaseRegister(const MachineFunction &MF) const
unsigned getAlignment() const
getAlignment - Return the minimum required alignment for a register of this class.
static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register)
.cfi_def_cfa_register modifies a rule for computing CFA.
void setStackSize(uint64_t Size)
Set the size of the stack.
static bool is64Bit(const char *name)
const MachineOperand & getOperand(unsigned i) const
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
static unsigned computeReturnSaveOffset(const PPCSubtarget &STI)
void setBasePointerSaveIndex(int Idx)
unsigned GuaranteedTailCallOpt
GuaranteedTailCallOpt - This flag is enabled when -tailcallopt is specified on the commandline...
int64_t getOffset() const
Return the offset from the symbol in this operand.
int CreateFixedObject(uint64_t Size, int64_t SPOffset, bool Immutable, bool isAliased=false)
Create a new object at a fixed location on the stack.
MachineInstrBuilder BuildMI(MachineFunction &MF, DebugLoc DL, const MCInstrDesc &MCID)
BuildMI - Builder interface.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
static unsigned computeBasePointerSaveOffset(const PPCSubtarget &STI)
const MCInstrDesc & get(unsigned Opcode) const
Return the machine instruction descriptor that corresponds to the specified instruction opcode...
int64_t getObjectOffset(int ObjectIdx) const
Return the assigned stack offset of the specified object from the incoming stack pointer.
virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
static const MachineInstrBuilder & addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset=0, bool mem=true)
addFrameReference - This function is used to add a reference to the base of an abstract object on the...
void setCRSpillFrameIndex(int idx)
const PPCRegisterInfo * getRegisterInfo() const override
const MCContext & getContext() const
const PPCInstrInfo * getInstrInfo() const override
void addScavengingFrameIndex(int FI)
Add a scavenging frame index.
MachineOperand class - Representation of each machine instruction operand.
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small...
bool test(unsigned Idx) const
unsigned getMaxCallFrameSize() const
Return the maximum size of a call frame that must be allocated for an outgoing function call...
Information about stack frame layout on the target.
bool needsUnwindTableEntry() const
True if this function needs an unwind table.
static bool spillsVRSAVE(const MachineFunction &MF)
livein_iterator livein_begin() const
static void HandleVRSaveUpdate(MachineInstr *MI, const TargetInstrInfo &TII)
MachineFrameInfo * getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
static bool hasSpills(const MachineFunction &MF)
unsigned determineFrameLayout(MachineFunction &MF, bool UpdateMF=true, bool UseEstimate=false) const
determineFrameLayout - Determine the size of the frame and maximum call frame size.
bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const std::vector< CalleeSavedInfo > &CSI, const TargetRegisterInfo *TRI) const override
restoreCalleeSavedRegisters - Issues instruction(s) to restore all callee saved registers and returns...
unsigned Log2_32(uint32_t Value)
Log2_32 - This function returns the floor log base 2 of the specified value, -1 if the value is zero...
static bool spillsCR(const MachineFunction &MF)
const TargetRegisterClass * getMinimalPhysRegClass(unsigned Reg, MVT VT=MVT::Other) const
getMinimalPhysRegClass - Returns the Register Class of a physical register of the given type...
const DebugLoc & getDebugLoc() const
Returns the debug location id of this MachineInstr.
static bool MustSaveLR(const MachineFunction &MF, unsigned LR)
MustSaveLR - Return true if this function requires that we save the LR register onto the stack in the...
def_iterator def_begin(unsigned RegNo) const
bool needsFP(const MachineFunction &MF) const
const MCRegisterInfo * getRegisterInfo() const
void setPICBasePointerSaveIndex(int Idx)
Representation of each machine instruction.
bool hasPatchPoint() const
This method may be called any time after instruction selection is complete to determine if there is a...
bool hasFnAttribute(Attribute::AttrKind Kind) const
Return true if the function has the attribute.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
PPCFrameLowering(const PPCSubtarget &STI)
void setReg(unsigned Reg)
Change the register this operand corresponds to.
void setMaxCallFrameSize(unsigned S)
Fast - This calling convention attempts to make calls as fast as possible (e.g.
const TargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
bool isInt< 16 >(int64_t x)
bool hasVarSizedObjects() const
This method may be called any time after instruction selection is complete to determine if the stack ...
bool hasNonRISpills() const
static unsigned computeFramePointerSaveOffset(const PPCSubtarget &STI)
int CreateStackObject(uint64_t Size, unsigned Alignment, bool isSS, const AllocaInst *Alloca=nullptr)
Create a new statically sized stack object, returning a nonnegative identifier to represent it...
std::vector< std::pair< unsigned, unsigned > >::const_iterator livein_iterator
bool isPPC64() const
isPPC64 - Return true if we are generating code for 64-bit pointer mode.
unsigned getReg() const
getReg - Returns the register number.
static def_iterator def_end()
uint16_t getEncodingValue(unsigned RegNo) const
Returns the encoding for RegNo.
bool isPhysRegUsed(unsigned Reg) const
isPhysRegUsed - Return true if the specified register is used in this function.
BasicBlockListType::iterator iterator
void setObjectOffset(int ObjectIdx, int64_t SPOffset)
Set the stack frame offset of the specified object.
bool isPowerOf2_32(uint32_t Value)
isPowerOf2_32 - This function returns true if the argument is a power of two > 0. ...
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override
MachineModuleInfo & getMMI() const
unsigned getLinkageSize() const
getLinkageSize - Return the size of the PowerPC ABI linkage area.
const MachineInstrBuilder & addReg(unsigned RegNo, unsigned flags=0, unsigned SubReg=0) const
addReg - Add a new virtual register operand...
reg_begin/reg_end - Provide iteration support to walk over all definitions and uses of a register wit...
bool hasBasePointer(const MachineFunction &MF) const
static unsigned computeLinkageSize(const PPCSubtarget &STI)
void setMustSaveLR(bool U)
MustSaveLR - This is set when the prolog/epilog inserter does its initial scan of the function...
MachineModuleInfo - This class contains meta information specific to a module.