42 #define DEBUG_TYPE "mips-reg-info"
44 #define GET_REGINFO_TARGET_DESC
45 #include "MipsGenRegisterInfo.inc"
53 unsigned Kind)
const {
55 return ABI.
ArePtrs64bit() ? &Mips::GPR64RegClass : &Mips::GPR32RegClass;
61 switch (RC->
getID()) {
64 case Mips::GPR32RegClassID:
65 case Mips::GPR64RegClassID:
66 case Mips::DSPRRegClassID: {
68 return 28 - TFI->
hasFP(MF);
70 case Mips::FGR32RegClassID:
72 case Mips::AFGR64RegClassID:
74 case Mips::FGR64RegClassID:
88 return CSR_SingleFloatOnly_SaveList;
91 return CSR_N64_SaveList;
94 return CSR_N32_SaveList;
97 return CSR_O32_FP64_SaveList;
100 return CSR_O32_FPXX_SaveList;
102 return CSR_O32_SaveList;
110 return CSR_SingleFloatOnly_RegMask;
113 return CSR_N64_RegMask;
116 return CSR_N32_RegMask;
119 return CSR_O32_FP64_RegMask;
122 return CSR_O32_FPXX_RegMask;
124 return CSR_O32_RegMask;
128 return CSR_Mips16RetHelper_RegMask;
133 static const MCPhysReg ReservedGPR32[] = {
134 Mips::ZERO, Mips::K0, Mips::K1, Mips::SP
137 static const MCPhysReg ReservedGPR64[] = {
138 Mips::ZERO_64, Mips::K0_64, Mips::K1_64, Mips::SP_64
146 Reserved.
set(ReservedGPR32[
I]);
150 Reserved.
set(Mips::T6);
151 Reserved.
set(Mips::T7);
156 Reserved.
set(ReservedGPR64[I]);
160 Reserved.
set(Mips::GP);
161 Reserved.
set(Mips::GP_64);
166 for (RegIter
Reg = Mips::AFGR64RegClass.
begin(),
167 EReg = Mips::AFGR64RegClass.
end();
Reg != EReg; ++
Reg)
171 for (RegIter
Reg = Mips::FGR64RegClass.
begin(),
172 EReg = Mips::FGR64RegClass.
end();
Reg != EReg; ++
Reg)
178 Reserved.
set(Mips::S0);
180 Reserved.
set(Mips::FP);
181 Reserved.
set(Mips::FP_64);
188 Reserved.
set(Mips::S7);
189 Reserved.
set(Mips::S7_64);
195 Reserved.
set(Mips::HWR29);
198 Reserved.
set(Mips::DSPPos);
199 Reserved.
set(Mips::DSPSCount);
200 Reserved.
set(Mips::DSPCarry);
201 Reserved.
set(Mips::DSPEFI);
202 Reserved.
set(Mips::DSPOutFlag);
205 Reserved.
set(Mips::MSAIR);
206 Reserved.
set(Mips::MSACSR);
207 Reserved.
set(Mips::MSAAccess);
208 Reserved.
set(Mips::MSASave);
209 Reserved.
set(Mips::MSAModify);
210 Reserved.
set(Mips::MSARequest);
211 Reserved.
set(Mips::MSAMap);
212 Reserved.
set(Mips::MSAUnmap);
217 Reserved.
set(Mips::RA);
218 Reserved.
set(Mips::RA_64);
219 Reserved.
set(Mips::T0);
222 Reserved.
set(Mips::S2);
227 Reserved.
set(Mips::GP);
228 Reserved.
set(Mips::GP_64);
232 for (
const auto &
Reg : Mips::OddSPRegClass)
259 errs() <<
"<--------->\n" <<
MI);
265 DEBUG(
errs() <<
"FrameIndex : " << FrameIndex <<
"\n"
266 <<
"spOffset : " << spOffset <<
"\n"
267 <<
"stackSize : " << stackSize <<
"\n");
269 eliminateFI(MI, FIOperandNum, FrameIndex, stackSize, spOffset);
280 return TFI->hasFP(MF) ? Mips::S0 : Mips::SP;
282 return TFI->hasFP(MF) ? (IsN64 ? Mips::FP_64 : Mips::FP) :
283 (IsN64 ? Mips::SP_64 : Mips::SP);
288 unsigned FP = Subtarget.
isGP32bit() ? Mips::FP : Mips::FP_64;
289 unsigned BP = Subtarget.
isGP32bit() ? Mips::S7 : Mips::S7_64;
330 DEBUG(
dbgs() <<
"It's not possible to realign the stack of the function: "
337 if (MFI->getMaxAlignment() > StackAlignment) {
340 DEBUG(
dbgs() <<
"It's not possible to realign the stack of the function: "
unsigned getStackAlignment() const
getStackAlignment - This method returns the number of bytes to which the stack pointer must be aligne...
const MCPhysReg * const_iterator
const MachineFunction * getParent() const
getParent - Return the MachineFunction containing this basic block.
const_iterator end(StringRef path)
Get end iterator over path.
bool ArePtrs64bit() const
raw_ostream & errs()
This returns a reference to a raw_ostream for standard error.
Alignment of stack for function (3 bits) stored as log2 of alignment with +1 bias 0 means unaligned (...
unsigned getID() const
getID() - Return the register class ID number.
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
unsigned getFrameRegister(const MachineFunction &MF) const override
Debug information queries.
unsigned getRegPressureLimit(const TargetRegisterClass *RC, MachineFunction &MF) const override
const_iterator begin(StringRef path)
Get begin iterator over path.
const Function * getFunction() const
getFunction - Return the LLVM function that this machine code represents
bool canReserveReg(unsigned PhysReg) const
canReserveReg - Returns true if PhysReg can be used as a reserved register.
StringRef getName() const
Return a constant reference to the value's name.
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects...
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
virtual bool hasFP(const MachineFunction &MF) const =0
hasFP - Return true if the specified function should have a dedicated frame pointer register...
Reg
All possible values of the reg field in the ModR/M byte.
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted...
BitVector getReservedRegs(const MachineFunction &MF) const override
const TargetFrameLowering * getFrameLowering() const override
const MachineBasicBlock * getParent() const
LLVM_CONSTEXPR size_t array_lengthof(T(&)[N])
Find the length of an array.
bundle_iterator< MachineInstr, instr_iterator > iterator
friend const_iterator end(StringRef path)
Get end iterator over path.
This file contains the declarations for the subclasses of Constant, which represent the different fla...
const MachineOperand & getOperand(unsigned i) const
const TargetRegisterClass * getPointerRegClass(const MachineFunction &MF, unsigned Kind) const override
Code Generation virtual methods...
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
bool inMips16Mode() const
virtual bool hasReservedCallFrame(const MachineFunction &MF) const
hasReservedCallFrame - Under normal circumstances, when a frame pointer is not required, we reserve argument space for call sites in the function immediately on entry to the current function.
int64_t getObjectOffset(int ObjectIdx) const
Return the assigned stack offset of the specified object from the incoming stack pointer.
virtual const TargetFrameLowering * getFrameLowering() const
bool isTargetNaCl() const
static unsigned getPICCallReg()
Get PIC indirect call register.
const MCPhysReg * getCalleeSavedRegs(const MachineFunction *MF) const override
Mips Callee Saved Registers.
Information about stack frame layout on the target.
bool hasStandardEncoding() const
bool canRealignStack(const MachineFunction &MF) const
MachineFrameInfo * getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Representation of each machine instruction.
static const uint32_t * getMips16RetHelperMask()
bool needsStackRealignment(const MachineFunction &MF) const override
bool hasFnAttribute(Attribute::AttrKind Kind) const
Return true if the function has the attribute.
bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
bool isSingleFloat() const
const TargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
MipsFunctionInfo - This class is derived from MachineFunction private Mips target-specific informatio...
bool hasVarSizedObjects() const
This method may be called any time after instruction selection is complete to determine if the stack ...
const ARM::ArchExtKind Kind
bool useSmallSection() const
bool requiresRegisterScavenging(const MachineFunction &MF) const override
void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override
Stack Frame Processing Methods.
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
const uint32_t * getCallPreservedMask(const MachineFunction &MF, CallingConv::ID) const override