LLVM  3.7.0
LiveVariables.h
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1 //===-- llvm/CodeGen/LiveVariables.h - Live Variable Analysis ---*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the LiveVariables analysis pass. For each machine
11 // instruction in the function, this pass calculates the set of registers that
12 // are immediately dead after the instruction (i.e., the instruction calculates
13 // the value, but it is never used) and the set of registers that are used by
14 // the instruction, but are never used after the instruction (i.e., they are
15 // killed).
16 //
17 // This class computes live variables using a sparse implementation based on
18 // the machine code SSA form. This class computes live variable information for
19 // each virtual and _register allocatable_ physical register in a function. It
20 // uses the dominance properties of SSA form to efficiently compute live
21 // variables for virtual registers, and assumes that physical registers are only
22 // live within a single basic block (allowing it to do a single local analysis
23 // to resolve physical register lifetimes in each basic block). If a physical
24 // register is not register allocatable, it is not tracked. This is useful for
25 // things like the stack pointer and condition codes.
26 //
27 //===----------------------------------------------------------------------===//
28 
29 #ifndef LLVM_CODEGEN_LIVEVARIABLES_H
30 #define LLVM_CODEGEN_LIVEVARIABLES_H
31 
32 #include "llvm/ADT/DenseMap.h"
33 #include "llvm/ADT/IndexedMap.h"
34 #include "llvm/ADT/SmallSet.h"
35 #include "llvm/ADT/SmallVector.h"
40 
41 namespace llvm {
42 
43 class MachineBasicBlock;
44 class MachineRegisterInfo;
45 
47 public:
48  static char ID; // Pass identification, replacement for typeid
51  }
52 
53  /// VarInfo - This represents the regions where a virtual register is live in
54  /// the program. We represent this with three different pieces of
55  /// information: the set of blocks in which the instruction is live
56  /// throughout, the set of blocks in which the instruction is actually used,
57  /// and the set of non-phi instructions that are the last users of the value.
58  ///
59  /// In the common case where a value is defined and killed in the same block,
60  /// There is one killing instruction, and AliveBlocks is empty.
61  ///
62  /// Otherwise, the value is live out of the block. If the value is live
63  /// throughout any blocks, these blocks are listed in AliveBlocks. Blocks
64  /// where the liveness range ends are not included in AliveBlocks, instead
65  /// being captured by the Kills set. In these blocks, the value is live into
66  /// the block (unless the value is defined and killed in the same block) and
67  /// lives until the specified instruction. Note that there cannot ever be a
68  /// value whose Kills set contains two instructions from the same basic block.
69  ///
70  /// PHI nodes complicate things a bit. If a PHI node is the last user of a
71  /// value in one of its predecessor blocks, it is not listed in the kills set,
72  /// but does include the predecessor block in the AliveBlocks set (unless that
73  /// block also defines the value). This leads to the (perfectly sensical)
74  /// situation where a value is defined in a block, and the last use is a phi
75  /// node in the successor. In this case, AliveBlocks is empty (the value is
76  /// not live across any blocks) and Kills is empty (phi nodes are not
77  /// included). This is sensical because the value must be live to the end of
78  /// the block, but is not live in any successor blocks.
79  struct VarInfo {
80  /// AliveBlocks - Set of blocks in which this value is alive completely
81  /// through. This is a bit set which uses the basic block number as an
82  /// index.
83  ///
85 
86  /// Kills - List of MachineInstruction's which are the last use of this
87  /// virtual register (kill it) in their basic block.
88  ///
89  std::vector<MachineInstr*> Kills;
90 
91  /// removeKill - Delete a kill corresponding to the specified
92  /// machine instruction. Returns true if there was a kill
93  /// corresponding to this instruction, false otherwise.
95  std::vector<MachineInstr*>::iterator
96  I = std::find(Kills.begin(), Kills.end(), MI);
97  if (I == Kills.end())
98  return false;
99  Kills.erase(I);
100  return true;
101  }
102 
103  /// findKill - Find a kill instruction in MBB. Return NULL if none is found.
104  MachineInstr *findKill(const MachineBasicBlock *MBB) const;
105 
106  /// isLiveIn - Is Reg live in to MBB? This means that Reg is live through
107  /// MBB, or it is killed in MBB. If Reg is only used by PHI instructions in
108  /// MBB, it is not considered live in.
109  bool isLiveIn(const MachineBasicBlock &MBB,
110  unsigned Reg,
111  MachineRegisterInfo &MRI);
112 
113  void dump() const;
114  };
115 
116 private:
117  /// VirtRegInfo - This list is a mapping from virtual register number to
118  /// variable information.
119  ///
121 
122  /// PHIJoins - list of virtual registers that are PHI joins. These registers
123  /// may have multiple definitions, and they require special handling when
124  /// building live intervals.
125  SparseBitVector<> PHIJoins;
126 
127 private: // Intermediate data structures
128  MachineFunction *MF;
129 
130  MachineRegisterInfo* MRI;
131 
132  const TargetRegisterInfo *TRI;
133 
134  // PhysRegInfo - Keep track of which instruction was the last def of a
135  // physical register. This is a purely local property, because all physical
136  // register references are presumed dead across basic blocks.
137  std::vector<MachineInstr *> PhysRegDef;
138 
139  // PhysRegInfo - Keep track of which instruction was the last use of a
140  // physical register. This is a purely local property, because all physical
141  // register references are presumed dead across basic blocks.
142  std::vector<MachineInstr *> PhysRegUse;
143 
144  std::vector<SmallVector<unsigned, 4>> PHIVarInfo;
145 
146  // DistanceMap - Keep track the distance of a MI from the start of the
147  // current basic block.
149 
150  /// HandlePhysRegKill - Add kills of Reg and its sub-registers to the
151  /// uses. Pay special attention to the sub-register uses which may come below
152  /// the last use of the whole register.
153  bool HandlePhysRegKill(unsigned Reg, MachineInstr *MI);
154 
155  /// HandleRegMask - Call HandlePhysRegKill for all registers clobbered by Mask.
156  void HandleRegMask(const MachineOperand&);
157 
158  void HandlePhysRegUse(unsigned Reg, MachineInstr *MI);
159  void HandlePhysRegDef(unsigned Reg, MachineInstr *MI,
161  void UpdatePhysRegDefs(MachineInstr *MI, SmallVectorImpl<unsigned> &Defs);
162 
163  /// FindLastRefOrPartRef - Return the last reference or partial reference of
164  /// the specified register.
165  MachineInstr *FindLastRefOrPartRef(unsigned Reg);
166 
167  /// FindLastPartialDef - Return the last partial def of the specified
168  /// register. Also returns the sub-registers that're defined by the
169  /// instruction.
170  MachineInstr *FindLastPartialDef(unsigned Reg,
171  SmallSet<unsigned,4> &PartDefRegs);
172 
173  /// analyzePHINodes - Gather information about the PHI nodes in here. In
174  /// particular, we want to map the variable information of a virtual
175  /// register which is used in a PHI node. We map that to the BB the vreg
176  /// is coming from.
177  void analyzePHINodes(const MachineFunction& Fn);
178 
179  void runOnInstr(MachineInstr *MI, SmallVectorImpl<unsigned> &Defs);
180 
181  void runOnBlock(MachineBasicBlock *MBB, unsigned NumRegs);
182 public:
183 
184  bool runOnMachineFunction(MachineFunction &MF) override;
185 
186  /// RegisterDefIsDead - Return true if the specified instruction defines the
187  /// specified register, but that definition is dead.
188  bool RegisterDefIsDead(MachineInstr *MI, unsigned Reg) const;
189 
190  //===--------------------------------------------------------------------===//
191  // API to update live variable information
192 
193  /// replaceKillInstruction - Update register kill info by replacing a kill
194  /// instruction with a new one.
195  void replaceKillInstruction(unsigned Reg, MachineInstr *OldMI,
196  MachineInstr *NewMI);
197 
198  /// addVirtualRegisterKilled - Add information about the fact that the
199  /// specified register is killed after being used by the specified
200  /// instruction. If AddIfNotFound is true, add a implicit operand if it's
201  /// not found.
202  void addVirtualRegisterKilled(unsigned IncomingReg, MachineInstr *MI,
203  bool AddIfNotFound = false) {
204  if (MI->addRegisterKilled(IncomingReg, TRI, AddIfNotFound))
205  getVarInfo(IncomingReg).Kills.push_back(MI);
206  }
207 
208  /// removeVirtualRegisterKilled - Remove the specified kill of the virtual
209  /// register from the live variable information. Returns true if the
210  /// variable was marked as killed by the specified instruction,
211  /// false otherwise.
213  if (!getVarInfo(reg).removeKill(MI))
214  return false;
215 
216  bool Removed = false;
217  for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
218  MachineOperand &MO = MI->getOperand(i);
219  if (MO.isReg() && MO.isKill() && MO.getReg() == reg) {
220  MO.setIsKill(false);
221  Removed = true;
222  break;
223  }
224  }
225 
226  assert(Removed && "Register is not used by this instruction!");
227  (void)Removed;
228  return true;
229  }
230 
231  /// removeVirtualRegistersKilled - Remove all killed info for the specified
232  /// instruction.
234 
235  /// addVirtualRegisterDead - Add information about the fact that the specified
236  /// register is dead after being used by the specified instruction. If
237  /// AddIfNotFound is true, add a implicit operand if it's not found.
238  void addVirtualRegisterDead(unsigned IncomingReg, MachineInstr *MI,
239  bool AddIfNotFound = false) {
240  if (MI->addRegisterDead(IncomingReg, TRI, AddIfNotFound))
241  getVarInfo(IncomingReg).Kills.push_back(MI);
242  }
243 
244  /// removeVirtualRegisterDead - Remove the specified kill of the virtual
245  /// register from the live variable information. Returns true if the
246  /// variable was marked dead at the specified instruction, false
247  /// otherwise.
249  if (!getVarInfo(reg).removeKill(MI))
250  return false;
251 
252  bool Removed = false;
253  for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
254  MachineOperand &MO = MI->getOperand(i);
255  if (MO.isReg() && MO.isDef() && MO.getReg() == reg) {
256  MO.setIsDead(false);
257  Removed = true;
258  break;
259  }
260  }
261  assert(Removed && "Register is not defined by this instruction!");
262  (void)Removed;
263  return true;
264  }
265 
266  void getAnalysisUsage(AnalysisUsage &AU) const override;
267 
268  void releaseMemory() override {
269  VirtRegInfo.clear();
270  }
271 
272  /// getVarInfo - Return the VarInfo structure for the specified VIRTUAL
273  /// register.
274  VarInfo &getVarInfo(unsigned RegIdx);
275 
276  void MarkVirtRegAliveInBlock(VarInfo& VRInfo, MachineBasicBlock* DefBlock,
277  MachineBasicBlock *BB);
278  void MarkVirtRegAliveInBlock(VarInfo& VRInfo, MachineBasicBlock* DefBlock,
279  MachineBasicBlock *BB,
280  std::vector<MachineBasicBlock*> &WorkList);
281  void HandleVirtRegDef(unsigned reg, MachineInstr *MI);
282  void HandleVirtRegUse(unsigned reg, MachineBasicBlock *MBB,
283  MachineInstr *MI);
284 
285  bool isLiveIn(unsigned Reg, const MachineBasicBlock &MBB) {
286  return getVarInfo(Reg).isLiveIn(MBB, Reg, *MRI);
287  }
288 
289  /// isLiveOut - Determine if Reg is live out from MBB, when not considering
290  /// PHI nodes. This means that Reg is either killed by a successor block or
291  /// passed through one.
292  bool isLiveOut(unsigned Reg, const MachineBasicBlock &MBB);
293 
294  /// addNewBlock - Add a new basic block BB between DomBB and SuccBB. All
295  /// variables that are live out of DomBB and live into SuccBB will be marked
296  /// as passing live through BB. This method assumes that the machine code is
297  /// still in SSA form.
299  MachineBasicBlock *DomBB,
300  MachineBasicBlock *SuccBB);
301 
302  /// isPHIJoin - Return true if Reg is a phi join register.
303  bool isPHIJoin(unsigned Reg) { return PHIJoins.test(Reg); }
304 
305  /// setPHIJoin - Mark Reg as a phi join register.
306  void setPHIJoin(unsigned Reg) { PHIJoins.set(Reg); }
307 };
308 
309 } // End llvm namespace
310 
311 #endif
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
bool removeKill(MachineInstr *MI)
removeKill - Delete a kill corresponding to the specified machine instruction.
Definition: LiveVariables.h:94
bool addRegisterDead(unsigned Reg, const TargetRegisterInfo *RegInfo, bool AddIfNotFound=false)
We have determined MI defined a register without a use.
void set(unsigned Idx)
bool runOnMachineFunction(MachineFunction &MF) override
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
bool isLiveOut(unsigned Reg, const MachineBasicBlock &MBB)
isLiveOut - Determine if Reg is live out from MBB, when not considering PHI nodes.
VarInfo - This represents the regions where a virtual register is live in the program.
Definition: LiveVariables.h:79
void setIsDead(bool Val=true)
void initializeLiveVariablesPass(PassRegistry &)
bool test(unsigned Idx)
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
bool isReg() const
isReg - Tests if this is a MO_Register operand.
Reg
All possible values of the reg field in the ModR/M byte.
void replaceKillInstruction(unsigned Reg, MachineInstr *OldMI, MachineInstr *NewMI)
replaceKillInstruction - Update register kill info by replacing a kill instruction with a new one...
SparseBitVector AliveBlocks
AliveBlocks - Set of blocks in which this value is alive completely through.
Definition: LiveVariables.h:84
unsigned getNumOperands() const
Access to explicit operands of the instruction.
Definition: MachineInstr.h:271
void releaseMemory() override
releaseMemory() - This member can be implemented by a pass if it wants to be able to release its memo...
bool isKill() const
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - This function should be overriden by passes that need analysis information to do t...
void removeVirtualRegistersKilled(MachineInstr *MI)
removeVirtualRegistersKilled - Remove all killed info for the specified instruction.
void setPHIJoin(unsigned Reg)
setPHIJoin - Mark Reg as a phi join register.
bool removeVirtualRegisterDead(unsigned reg, MachineInstr *MI)
removeVirtualRegisterDead - Remove the specified kill of the virtual register from the live variable ...
SmallSet - This maintains a set of unique values, optimizing for the case when the set is small (less...
Definition: SmallSet.h:32
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:273
Represent the analysis usage information of a pass.
bool isPHIJoin(unsigned Reg)
isPHIJoin - Return true if Reg is a phi join register.
VarInfo & getVarInfo(unsigned RegIdx)
getVarInfo - Return the VarInfo structure for the specified VIRTUAL register.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
void MarkVirtRegAliveInBlock(VarInfo &VRInfo, MachineBasicBlock *DefBlock, MachineBasicBlock *BB)
void setIsKill(bool Val=true)
void addNewBlock(MachineBasicBlock *BB, MachineBasicBlock *DomBB, MachineBasicBlock *SuccBB)
addNewBlock - Add a new basic block BB between DomBB and SuccBB.
std::vector< MachineInstr * > Kills
Kills - List of MachineInstruction's which are the last use of this virtual register (kill it) in the...
Definition: LiveVariables.h:89
bool removeVirtualRegisterKilled(unsigned reg, MachineInstr *MI)
removeVirtualRegisterKilled - Remove the specified kill of the virtual register from the live variabl...
bool isLiveIn(const MachineBasicBlock &MBB, unsigned Reg, MachineRegisterInfo &MRI)
isLiveIn - Is Reg live in to MBB? This means that Reg is live through MBB, or it is killed in MBB...
MachineOperand class - Representation of each machine instruction operand.
void HandleVirtRegDef(unsigned reg, MachineInstr *MI)
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
MachineInstr * findKill(const MachineBasicBlock *MBB) const
findKill - Find a kill instruction in MBB. Return NULL if none is found.
Representation of each machine instruction.
Definition: MachineInstr.h:51
void addVirtualRegisterDead(unsigned IncomingReg, MachineInstr *MI, bool AddIfNotFound=false)
addVirtualRegisterDead - Add information about the fact that the specified register is dead after bei...
#define I(x, y, z)
Definition: MD5.cpp:54
unsigned getReg() const
getReg - Returns the register number.
bool addRegisterKilled(unsigned IncomingReg, const TargetRegisterInfo *RegInfo, bool AddIfNotFound=false)
We have determined MI kills a register.
bool RegisterDefIsDead(MachineInstr *MI, unsigned Reg) const
RegisterDefIsDead - Return true if the specified instruction defines the specified register...
bool isLiveIn(unsigned Reg, const MachineBasicBlock &MBB)
void addVirtualRegisterKilled(unsigned IncomingReg, MachineInstr *MI, bool AddIfNotFound=false)
addVirtualRegisterKilled - Add information about the fact that the specified register is killed after...
void HandleVirtRegUse(unsigned reg, MachineBasicBlock *MBB, MachineInstr *MI)