37 #ifndef LLVM_LIB_CODEGEN_REGALLOCBASE_H
38 #define LLVM_LIB_CODEGEN_REGALLOCBASE_H
45 template<
typename T>
class SmallVectorImpl;
46 class TargetRegisterInfo;
59 virtual void anchor();
LiveInterval - This class represents the liveness of a register, or stack slot.
virtual unsigned selectOrSplit(LiveInterval &VirtReg, SmallVectorImpl< unsigned > &splitLVRs)=0
RegAllocBase provides the register allocation driver and interface that can be extended to add intere...
void init(VirtRegMap &vrm, LiveIntervals &lis, LiveRegMatrix &mat)
static const char TimerGroupName[]
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
virtual void enqueue(LiveInterval *LI)=0
enqueue - Add VirtReg to the priority queue of unassigned registers.
virtual void aboutToRemoveInterval(LiveInterval &LI)
Method called when the allocator is about to remove a LiveInterval.
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
static bool VerifyEnabled
VerifyEnabled - True when -verify-regalloc is given.
const TargetRegisterInfo * TRI
RegisterClassInfo RegClassInfo
MachineRegisterInfo * MRI
virtual Spiller & spiller()=0
virtual LiveInterval * dequeue()=0
dequeue - Return the next unassigned register, or NULL.