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LLVM
3.7.0
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Target-Independent Code Generator Pass Configuration Options. More...
#include <Passes.h>
Public Member Functions | |
| TargetPassConfig (TargetMachine *tm, PassManagerBase &pm) | |
| TargetPassConfig () | |
| ~TargetPassConfig () override | |
| template<typename TMC > | |
| TMC & | getTM () const |
| Get the right type of TargetMachine for this target. More... | |
| void | setInitialized () |
| CodeGenOpt::Level | getOptLevel () const |
| void | setStartStopPasses (AnalysisID StartBefore, AnalysisID StartAfter, AnalysisID StopAfter) |
| Set the StartAfter, StartBefore and StopAfter passes to allow running only a portion of the normal code-gen pass sequence. More... | |
| void | setDisableVerify (bool Disable) |
| bool | getEnableTailMerge () const |
| void | setEnableTailMerge (bool Enable) |
| void | substitutePass (AnalysisID StandardID, IdentifyingPassPtr TargetID) |
| Allow the target to override a specific pass without overriding the pass pipeline. More... | |
| void | insertPass (AnalysisID TargetPassID, IdentifyingPassPtr InsertedPassID) |
| Insert InsertedPassID pass after TargetPassID pass. More... | |
| void | enablePass (AnalysisID PassID) |
| Allow the target to enable a specific standard pass by default. More... | |
| void | disablePass (AnalysisID PassID) |
| Allow the target to disable a specific standard pass by default. More... | |
| IdentifyingPassPtr | getPassSubstitution (AnalysisID StandardID) const |
| Return the pass substituted for StandardID by the target. More... | |
| bool | getOptimizeRegAlloc () const |
| Return true if the optimized regalloc pipeline is enabled. More... | |
| bool | getEnableShrinkWrap () const |
| Return true if shrink wrapping is enabled. More... | |
| bool | usingDefaultRegAlloc () const |
| Return true if the default global register allocator is in use and has not be overriden on the command line with '-regalloc=...'. More... | |
| virtual void | addIRPasses () |
| Add common target configurable passes that perform LLVM IR to IR transforms following machine independent optimization. More... | |
| void | addPassesToHandleExceptions () |
| Add passes to lower exception handling for the code generator. More... | |
| virtual void | addCodeGenPrepare () |
| Add pass to prepare the LLVM IR for code generation. More... | |
| virtual void | addISelPrepare () |
| Add common passes that perform LLVM IR to IR transforms in preparation for instruction selection. More... | |
| virtual bool | addInstSelector () |
| addInstSelector - This method should install an instruction selector pass, which converts from LLVM code to machine instructions. More... | |
| virtual void | addMachinePasses () |
| Add the complete, standard set of LLVM CodeGen passes. More... | |
| false **Return NULL to select the | default (generic) machine scheduler.*/virtual ScheduleDAGInstrs *createMachineScheduler(MachineSchedContext *C) const |
| Create an instance of ScheduleDAGInstrs to be run within the standard MachineScheduler pass for this function and target at the current optimization level. More... | |
| virtual ScheduleDAGInstrs * | createPostMachineScheduler (MachineSchedContext *C) const |
| Similar to createMachineScheduler but used when postRA machine scheduling is enabled. More... | |
Public Member Functions inherited from llvm::ImmutablePass | |
| virtual void | initializePass () |
| initializePass - This method may be overriden by immutable passes to allow them to perform various initialization actions they require. More... | |
| ImmutablePass * | getAsImmutablePass () override |
| bool | runOnModule (Module &) override |
| ImmutablePasses are never run. More... | |
| ImmutablePass (char &pid) | |
| ~ImmutablePass () override | |
Public Member Functions inherited from llvm::ModulePass | |
| Pass * | createPrinterPass (raw_ostream &O, const std::string &Banner) const override |
| createPrinterPass - Get a module printer pass. More... | |
| void | assignPassManager (PMStack &PMS, PassManagerType T) override |
| Find appropriate Module Pass Manager in the PM Stack and add self into that manager. More... | |
| PassManagerType | getPotentialPassManagerType () const override |
| Return what kind of Pass Manager can manage this pass. More... | |
| ModulePass (char &pid) | |
| ~ModulePass () override | |
Public Member Functions inherited from llvm::Pass | |
| Pass (PassKind K, char &pid) | |
| virtual | ~Pass () |
| PassKind | getPassKind () const |
| virtual const char * | getPassName () const |
| getPassName - Return a nice clean name for a pass. More... | |
| AnalysisID | getPassID () const |
| getPassID - Return the PassID number that corresponds to this pass. More... | |
| virtual bool | doInitialization (Module &) |
| doInitialization - Virtual method overridden by subclasses to do any necessary initialization before any pass is run. More... | |
| virtual bool | doFinalization (Module &) |
| doFinalization - Virtual method overriden by subclasses to do any necessary clean up after all passes have run. More... | |
| virtual void | print (raw_ostream &O, const Module *M) const |
| print - Print out the internal state of the pass. More... | |
| void | dump () const |
| virtual void | preparePassManager (PMStack &) |
| Check if available pass managers are suitable for this pass or not. More... | |
| void | setResolver (AnalysisResolver *AR) |
| AnalysisResolver * | getResolver () const |
| virtual void | getAnalysisUsage (AnalysisUsage &) const |
| getAnalysisUsage - This function should be overriden by passes that need analysis information to do their job. More... | |
| virtual void | releaseMemory () |
| releaseMemory() - This member can be implemented by a pass if it wants to be able to release its memory when it is no longer needed. More... | |
| virtual void * | getAdjustedAnalysisPointer (AnalysisID ID) |
| getAdjustedAnalysisPointer - This method is used when a pass implements an analysis interface through multiple inheritance. More... | |
| virtual PMDataManager * | getAsPMDataManager () |
| virtual void | verifyAnalysis () const |
| verifyAnalysis() - This member can be implemented by a analysis pass to check state of analysis information. More... | |
| virtual void | dumpPassStructure (unsigned Offset=0) |
| template<typename AnalysisType > | |
| AnalysisType * | getAnalysisIfAvailable () const |
| getAnalysisIfAvailable<AnalysisType>() - Subclasses use this function to get analysis information that might be around, for example to update it. More... | |
| bool | mustPreserveAnalysisID (char &AID) const |
| mustPreserveAnalysisID - This method serves the same function as getAnalysisIfAvailable, but works if you just have an AnalysisID. More... | |
| template<typename AnalysisType > | |
| AnalysisType & | getAnalysis () const |
| getAnalysis<AnalysisType>() - This function is used by subclasses to get to the analysis information that they claim to use by overriding the getAnalysisUsage function. More... | |
| template<typename AnalysisType > | |
| AnalysisType & | getAnalysis (Function &F) |
| getAnalysis<AnalysisType>() - This function is used by subclasses to get to the analysis information that they claim to use by overriding the getAnalysisUsage function. More... | |
| template<typename AnalysisType > | |
| AnalysisType & | getAnalysisID (AnalysisID PI) const |
| template<typename AnalysisType > | |
| AnalysisType & | getAnalysisID (AnalysisID PI, Function &F) |
Static Public Attributes | |
| static char | EarlyTailDuplicateID |
| Pseudo Pass IDs. More... | |
| static char | PostRAMachineLICMID = 0 |
| PostRAMachineLICM - A clone of the LICM pass that runs during late machine optimization after regalloc. More... | |
| static char | ID |
Protected Member Functions | |
| void | setOpt (bool &Opt, bool Val) |
| virtual bool | addPreISel () |
| Methods with trivial inline returns are convenient points in the common codegen pass pipeline where targets may insert passes. More... | |
| virtual void | addMachineSSAOptimization () |
| addMachineSSAOptimization - Add standard passes that optimize machine instructions in SSA form. More... | |
| virtual bool | addILPOpts () |
| Add passes that optimize instruction level parallelism for out-of-order targets. More... | |
| virtual void | addPreRegAlloc () |
| This method may be implemented by targets that want to run passes immediately before register allocation. More... | |
| virtual FunctionPass * | createTargetRegisterAllocator (bool Optimized) |
| createTargetRegisterAllocator - Create the register allocator pass for this target at the current optimization level. More... | |
| virtual void | addFastRegAlloc (FunctionPass *RegAllocPass) |
| addFastRegAlloc - Add the minimum set of target-independent passes that are required for fast register allocation. More... | |
| virtual void | addOptimizedRegAlloc (FunctionPass *RegAllocPass) |
| addOptimizedRegAlloc - Add passes related to register allocation. More... | |
| virtual bool | addPreRewrite () |
| addPreRewrite - Add passes to the optimized register allocation pipeline after register allocation is complete, but before virtual registers are rewritten to physical registers. More... | |
| virtual void | addPostRegAlloc () |
| This method may be implemented by targets that want to run passes after register allocation pass pipeline but before prolog-epilog insertion. More... | |
| virtual void | addMachineLateOptimization () |
| Add passes that optimize machine instructions after register allocation. More... | |
| virtual void | addPreSched2 () |
| This method may be implemented by targets that want to run passes after prolog-epilog insertion and before the second instruction scheduling pass. More... | |
| virtual bool | addGCPasses () |
| addGCPasses - Add late codegen passes that analyze code for garbage collection. More... | |
| virtual void | addBlockPlacement () |
| Add standard basic block placement passes. More... | |
| virtual void | addPreEmitPass () |
| This pass may be implemented by targets that want to run passes immediately before machine code is emitted. More... | |
| AnalysisID | addPass (AnalysisID PassID, bool verifyAfter=true, bool printAfter=true) |
| Utilities for targets to add passes to the pass manager. More... | |
| void | addPass (Pass *P, bool verifyAfter=true, bool printAfter=true) |
| Add a pass to the PassManager if that pass is supposed to be run, as determined by the StartAfter and StopAfter options. More... | |
| FunctionPass * | createRegAllocPass (bool Optimized) |
| addMachinePasses helper to create the target-selected or overriden regalloc pass. More... | |
| void | printAndVerify (const std::string &Banner) |
| printAndVerify - Add a pass to dump then verify the machine function, if those steps are enabled. More... | |
| void | addPrintPass (const std::string &Banner) |
| Add a pass to print the machine function if printing is enabled. More... | |
| void | addVerifyPass (const std::string &Banner) |
| Add a pass to perform basic verification of the machine function if verification is enabled. More... | |
Protected Attributes | |
| TargetMachine * | TM |
| PassConfigImpl * | Impl |
| bool | Initialized |
| bool | DisableVerify |
| bool | EnableTailMerge |
| Default setting for -enable-tail-merge on this target. More... | |
| bool | EnableShrinkWrap |
| Default setting for -enable-shrink-wrap on this target. More... | |
Additional Inherited Members | |
Static Public Member Functions inherited from llvm::Pass | |
| static const PassInfo * | lookupPassInfo (const void *TI) |
| static const PassInfo * | lookupPassInfo (StringRef Arg) |
| static Pass * | createPass (AnalysisID ID) |
Target-Independent Code Generator Pass Configuration Options.
This is an ImmutablePass solely for the purpose of exposing CodeGen options to the internals of other CodeGen passes.
Definition at line 87 of file CodeGen/Passes.h.
| TargetPassConfig::TargetPassConfig | ( | TargetMachine * | tm, |
| PassManagerBase & | pm | ||
| ) |
Definition at line 216 of file Passes.cpp.
References EarlyTailDuplicateID, llvm::PassRegistry::getPassRegistry(), Impl, llvm::initializeCodeGen(), llvm::MachineLICMID, PostRAMachineLICMID, substitutePass(), and llvm::TailDuplicateID.
| TargetPassConfig::TargetPassConfig | ( | ) |
Definition at line 253 of file Passes.cpp.
References llvm_unreachable.
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Definition at line 210 of file Passes.cpp.
References Impl.
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Add standard basic block placement passes.
Definition at line 799 of file Passes.cpp.
References addPass(), EnableBlockPlacementStats, llvm::MachineBlockPlacementID, and llvm::MachineBlockPlacementStatsID.
Referenced by addMachinePasses().
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Add pass to prepare the LLVM IR for code generation.
This should be done before exception handling preparation passes.
Definition at line 451 of file Passes.cpp.
References addPass(), llvm::createCodeGenPreparePass(), llvm::createRewriteSymbolsPass(), DisableCGP, getOptLevel(), llvm::CodeGenOpt::None, and TM.
Referenced by addPassesToGenerateCode().
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addFastRegAlloc - Add the minimum set of target-independent passes that are required for fast register allocation.
Add the minimum set of target-independent passes that are required for register allocation.
No coalescing or scheduling.
Definition at line 716 of file Passes.cpp.
References addPass(), llvm::PHIEliminationID, and llvm::TwoAddressInstructionPassID.
Referenced by addMachinePasses().
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addGCPasses - Add late codegen passes that analyze code for garbage collection.
Add standard GC passes.
This should return true if GC info should be printed after these passes.
Definition at line 793 of file Passes.cpp.
References addPass(), and llvm::GCMachineCodeAnalysisID.
Referenced by addMachinePasses().
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Add passes that optimize instruction level parallelism for out-of-order targets.
These passes are run while the machine code is still in SSA form, so they can use MachineTraceMetrics to control their heuristics.
All passes added here should preserve the MachineDominatorTree, MachineLoopInfo, and MachineTraceMetrics analyses.
Definition at line 273 of file CodeGen/Passes.h.
Referenced by addMachineSSAOptimization().
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addInstSelector - This method should install an instruction selector pass, which converts from LLVM code to machine instructions.
Definition at line 217 of file CodeGen/Passes.h.
Referenced by addPassesToGenerateCode().
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Add common target configurable passes that perform LLVM IR to IR transforms following machine independent optimization.
Definition at line 377 of file Passes.cpp.
References addPass(), llvm::createBasicAliasAnalysisPass(), llvm::createCFLAliasAnalysisPass(), llvm::createConstantHoistingPass(), llvm::createGCLoweringPass(), llvm::createLoopStrengthReducePass(), llvm::createPartiallyInlineLibCallsPass(), llvm::createPrintFunctionPass(), llvm::createScopedNoAliasAAPass(), llvm::createShadowStackGCLoweringPass(), llvm::createTypeBasedAliasAnalysisPass(), llvm::createUnreachableBlockEliminationPass(), llvm::createVerifierPass(), llvm::dbgs(), DisableConstantHoisting, DisableLSR, DisablePartialLibcallInlining, DisableVerify, getOptLevel(), llvm::CodeGenOpt::None, PrintLSR, and UseCFLAA.
Referenced by addPassesToGenerateCode().
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Add common passes that perform LLVM IR to IR transforms in preparation for instruction selection.
Definition at line 459 of file Passes.cpp.
References addPass(), addPreISel(), llvm::createPrintFunctionPass(), llvm::createSafeStackPass(), llvm::createStackProtectorPass(), llvm::createVerifierPass(), llvm::dbgs(), DisableVerify, PrintISelInput, and TM.
Referenced by addPassesToGenerateCode().
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Add passes that optimize machine instructions after register allocation.
Post RegAlloc Pass Configuration.
Add passes that optimize machine instructions after register allocation.
Definition at line 777 of file Passes.cpp.
References addPass(), llvm::BranchFolderPassID, llvm::MachineCopyPropagationID, llvm::TargetMachine::requiresStructuredCFG(), llvm::TailDuplicateID, and TM.
Referenced by addMachinePasses().
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Add the complete, standard set of LLVM CodeGen passes.
Add the complete set of target-independent postISel code generator passes.
Fully developed targets will not generally override this.
This can be read as the standard order of major LLVM CodeGen stages. Stages with nontrivial configuration or multiple passes are broken out below in addStage routines.
Any TargetPassConfig::addXX routine may be overriden by the Target. The addPre/Post methods with empty header implementations allow injecting target-specific fixups just before or after major stages. Additionally, targets have the flexibility to change pass order within a stage by overriding default implementation of addStage routines below. Each technique has maintainability tradeoffs because alternate pass orders are not well supported. addPre/Post works better if the target pass is easily tied to a common pass. But if it has subtle dependencies on multiple passes, the target should override the stage instead.
TODO: We could use a single addPre/Post(ID) hook to allow pass injection before/after any target-independent pass. But it's currently overkill.
Add passes that optimize machine instructions after register allocation.
Definition at line 495 of file Passes.cpp.
References addBlockPlacement(), addFastRegAlloc(), addGCPasses(), addMachineLateOptimization(), addMachineSSAOptimization(), addOptimizedRegAlloc(), addPass(), addPostRegAlloc(), addPreEmitPass(), addPreRegAlloc(), addPreSched2(), llvm::createGCInfoPrinter(), createRegAllocPass(), llvm::dbgs(), EnableImplicitNullChecks, llvm::ExpandISelPseudosID, llvm::ExpandPostRAPseudosID, getEnableShrinkWrap(), getOptimizeRegAlloc(), getOptLevel(), llvm::PassRegistry::getPassInfo(), llvm::PassRegistry::getPassRegistry(), llvm::PassInfo::getTypeInfo(), if(), llvm::ImplicitNullChecksID, insertPass(), llvm::LocalStackSlotAllocationID, MISchedPostRA, llvm::CodeGenOpt::None, llvm::TargetMachine::Options, llvm::PostMachineSchedulerID, llvm::PostRASchedulerID, printAndVerify(), PrintGCInfo, llvm::TargetOptions::PrintMachineCode, PrintMachineInstrs, llvm::PrologEpilogCodeInserterID, llvm::ShrinkWrapID, llvm::StackMapLivenessID, and TM.
Referenced by addPassesToGenerateCode().
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addMachineSSAOptimization - Add standard passes that optimize machine instructions in SSA form.
Add passes that optimize machine instructions in SSA form.
Definition at line 585 of file Passes.cpp.
References addILPOpts(), addPass(), llvm::DeadMachineInstructionElimID, EarlyTailDuplicateID, llvm::LocalStackSlotAllocationID, llvm::MachineCSEID, llvm::MachineLICMID, llvm::MachineSinkingID, llvm::OptimizePHIsID, llvm::PeepholeOptimizerID, and llvm::StackColoringID.
Referenced by addMachinePasses().
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addOptimizedRegAlloc - Add passes related to register allocation.
Add standard target-independent passes that are tightly coupled with optimized register allocation, including coalescing, machine instruction scheduling, and register allocation itself.
LLVMTargetMachine provides standard regalloc passes for most targets.
Definition at line 726 of file Passes.cpp.
References addPass(), addPreRewrite(), EarlyLiveIntervals, llvm::LiveIntervalsID, llvm::LiveVariablesID, llvm::MachineLoopInfoID, llvm::MachineSchedulerID, llvm::PHIEliminationID, PostRAMachineLICMID, llvm::ProcessImplicitDefsID, llvm::RegisterCoalescerID, llvm::StackSlotColoringID, llvm::TwoAddressInstructionPassID, and llvm::VirtRegRewriterID.
Referenced by addMachinePasses().
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Utilities for targets to add passes to the pass manager.
Add a CodeGen pass at this point in the pipeline after checking for target and command line overrides.
Add a CodeGen pass at this point in the pipeline after checking overrides. Return the pass that was added, or zero if no pass was added. printAfter if true and adding a machine function pass add an extra machine printer pass afterwards verifyAfter if true and adding a machine function pass add an extra machine verification pass afterwards.
addPass cannot return a pointer to the pass instance because is internal the PassManager and the instance we create here may already be freed.
Definition at line 339 of file Passes.cpp.
References llvm::Pass::createPass(), llvm::IdentifyingPassPtr::getID(), llvm::IdentifyingPassPtr::getInstance(), llvm::Pass::getPassID(), getPassSubstitution(), llvm::IdentifyingPassPtr::isInstance(), llvm::IdentifyingPassPtr::isValid(), llvm_unreachable, overridePass(), and P.
Referenced by addBlockPlacement(), addCodeGenPrepare(), addFastRegAlloc(), addGCPasses(), addIRPasses(), addISelPrepare(), addMachineLateOptimization(), addMachinePasses(), addMachineSSAOptimization(), addOptimizedRegAlloc(), addPass(), and addPassesToHandleExceptions().
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Add a pass to the PassManager if that pass is supposed to be run, as determined by the StartAfter and StopAfter options.
Add a pass to the PassManager if that pass is supposed to be run.
Takes ownership of the pass. printAfter if true and adding a machine function pass add an extra machine printer pass afterwards verifyAfter if true and adding a machine function pass add an extra machine verification pass afterwards.
If the Started/Stopped flags indicate either that the compilation should start at a later pass or that it should stop after an earlier pass, then do not add the pass. Finally, compare the current pass against the StartAfter and StopAfter options and change the Started/Stopped flags accordingly.
Definition at line 282 of file Passes.cpp.
References addPass(), addPrintPass(), addVerifyPass(), llvm::Pass::createPass(), llvm::Pass::getPassID(), llvm::Pass::getPassName(), I, Impl, Initialized, llvm::PassConfigImpl::InsertedPasses, P, and llvm::report_fatal_error().
| void TargetPassConfig::addPassesToHandleExceptions | ( | ) |
Add passes to lower exception handling for the code generator.
Turn exception handling constructs into something the code generators can handle.
Definition at line 418 of file Passes.cpp.
References addPass(), llvm::ARM, llvm::createDwarfEHPass(), llvm::createLowerInvokePass(), llvm::createSjLjEHPreparePass(), llvm::createUnreachableBlockEliminationPass(), llvm::createWinEHPass(), llvm::DwarfCFI, llvm::MCAsmInfo::getExceptionHandlingType(), llvm::TargetMachine::getMCAsmInfo(), llvm::None, llvm::SjLj, TM, and llvm::WinEH.
Referenced by addPassesToGenerateCode().
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This method may be implemented by targets that want to run passes after register allocation pass pipeline but before prolog-epilog insertion.
Definition at line 307 of file CodeGen/Passes.h.
Referenced by addMachinePasses().
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This pass may be implemented by targets that want to run passes immediately before machine code is emitted.
Definition at line 326 of file CodeGen/Passes.h.
Referenced by addMachinePasses().
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Methods with trivial inline returns are convenient points in the common codegen pass pipeline where targets may insert passes.
Methods with out-of-line standard implementations are major CodeGen stages called by addMachinePasses. Some targets may override major stages when inserting passes is insufficient, but maintaining overriden stages is more work.addPreISelPasses - This method should add any "last minute" LLVM->LLVM passes (which are run just before instruction selector).
Definition at line 259 of file CodeGen/Passes.h.
Referenced by addISelPrepare().
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This method may be implemented by targets that want to run passes immediately before register allocation.
Definition at line 279 of file CodeGen/Passes.h.
Referenced by addMachinePasses().
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addPreRewrite - Add passes to the optimized register allocation pipeline after register allocation is complete, but before virtual registers are rewritten to physical registers.
These passes must preserve VirtRegMap and LiveIntervals, and when running after RABasic or RAGreedy, they should take advantage of LiveRegMatrix. When these passes run, VirtRegMap contains legal physreg assignments for all virtual registers.
Definition at line 301 of file CodeGen/Passes.h.
Referenced by addOptimizedRegAlloc().
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This method may be implemented by targets that want to run passes after prolog-epilog insertion and before the second instruction scheduling pass.
Definition at line 314 of file CodeGen/Passes.h.
Referenced by addMachinePasses().
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Add a pass to print the machine function if printing is enabled.
Definition at line 365 of file Passes.cpp.
References llvm::createMachineFunctionPrinterPass(), llvm::dbgs(), llvm::TargetMachine::shouldPrintMachineCode(), and TM.
Referenced by addPass(), and printAndVerify().
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Add a pass to perform basic verification of the machine function if verification is enabled.
Definition at line 370 of file Passes.cpp.
References llvm::createMachineVerifierPass(), and VerifyMachineCode.
Referenced by addPass(), and printAndVerify().
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Similar to createMachineScheduler but used when postRA machine scheduling is enabled.
Definition at line 242 of file CodeGen/Passes.h.
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addMachinePasses helper to create the target-selected or overriden regalloc pass.
Find and instantiate the register allocation pass requested by this target at the current optimization level.
Different register allocators are defined as separate passes because they may require different analysis.
This helper ensures that the regalloc= option is always available, even for targets that override the default allocator.
FIXME: When MachinePassRegistry register pass IDs instead of function ptrs, this can be folded into addPass.
Definition at line 693 of file Passes.cpp.
References createTargetRegisterAllocator(), llvm::RegisterRegAlloc::getDefault(), RegAlloc, llvm::RegisterRegAlloc::setDefault(), and useDefaultRegisterAllocator().
Referenced by addMachinePasses().
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createTargetRegisterAllocator - Create the register allocator pass for this target at the current optimization level.
Instantiate the default register allocator pass for this target for either the optimized or unoptimized allocation path.
This will be added to the pass manager by addFastRegAlloc in the unoptimized case or addOptimizedRegAlloc in the optimized case.
A target that uses the standard regalloc pass order for fast or optimized allocation may still override this for per-target regalloc selection. But -regalloc=... always takes precedence.
Definition at line 677 of file Passes.cpp.
References llvm::createFastRegisterAllocator(), and llvm::createGreedyRegisterAllocator().
Referenced by createRegAllocPass().
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Create an instance of ScheduleDAGInstrs to be run within the standard MachineScheduler pass for this function and target at the current optimization level.
This can also be used to plug a new MachineSchedStrategy into an instance of the standard ScheduleDAGMI: return new ScheduleDAGMI(C, make_unique<MyStrategy>(C), /* IsPostRA=
Definition at line 233 of file CodeGen/Passes.h.
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Allow the target to disable a specific standard pass by default.
Definition at line 182 of file CodeGen/Passes.h.
References substitutePass().
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Allow the target to enable a specific standard pass by default.
Definition at line 179 of file CodeGen/Passes.h.
References substitutePass().
| bool TargetPassConfig::getEnableShrinkWrap | ( | ) | const |
Return true if shrink wrapping is enabled.
Definition at line 622 of file Passes.cpp.
References llvm::cl::BOU_FALSE, llvm::cl::BOU_TRUE, llvm::cl::BOU_UNSET, EnableShrinkWrap, EnableShrinkWrapOpt, getOptLevel(), llvm_unreachable, and llvm::CodeGenOpt::None.
Referenced by addMachinePasses().
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Definition at line 167 of file CodeGen/Passes.h.
References EnableTailMerge.
Referenced by INITIALIZE_PASS().
| bool TargetPassConfig::getOptimizeRegAlloc | ( | ) | const |
Return true if the optimized regalloc pipeline is enabled.
Register Allocation Pass Configuration.
Definition at line 641 of file Passes.cpp.
References llvm::cl::BOU_FALSE, llvm::cl::BOU_TRUE, llvm::cl::BOU_UNSET, getOptLevel(), llvm_unreachable, llvm::CodeGenOpt::None, and OptimizeRegAlloc.
Referenced by addMachinePasses().
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Definition at line 143 of file CodeGen/Passes.h.
References llvm::TargetMachine::getOptLevel(), and TM.
Referenced by addCodeGenPrepare(), addIRPasses(), addMachinePasses(), getEnableShrinkWrap(), and getOptimizeRegAlloc().
| IdentifyingPassPtr TargetPassConfig::getPassSubstitution | ( | AnalysisID | StandardID | ) | const |
Return the pass substituted for StandardID by the target.
If no substitution exists, return StandardID.
Definition at line 269 of file Passes.cpp.
References I, Impl, and llvm::PassConfigImpl::TargetPasses.
Referenced by addPass().
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Get the right type of TargetMachine for this target.
Definition at line 136 of file CodeGen/Passes.h.
References TM.
| void TargetPassConfig::insertPass | ( | AnalysisID | TargetPassID, |
| IdentifyingPassPtr | InsertedPassID | ||
| ) |
Insert InsertedPassID pass after TargetPassID pass.
Insert InsertedPassID pass after TargetPassID.
Definition at line 234 of file Passes.cpp.
References llvm::IdentifyingPassPtr::getID(), llvm::IdentifyingPassPtr::getInstance(), llvm::Pass::getPassID(), Impl, llvm::PassConfigImpl::InsertedPasses, llvm::IdentifyingPassPtr::isInstance(), and P.
Referenced by addMachinePasses().
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printAndVerify - Add a pass to dump then verify the machine function, if those steps are enabled.
Definition at line 360 of file Passes.cpp.
References addPrintPass(), and addVerifyPass().
Referenced by addMachinePasses().
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Definition at line 165 of file CodeGen/Passes.h.
References DisableVerify, and setOpt().
Referenced by addPassesToGenerateCode().
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Definition at line 168 of file CodeGen/Passes.h.
References EnableTailMerge, and setOpt().
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Definition at line 141 of file CodeGen/Passes.h.
References Initialized.
Referenced by addPassesToGenerateCode().
Definition at line 259 of file Passes.cpp.
References Initialized.
Referenced by setDisableVerify(), and setEnableTailMerge().
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Set the StartAfter, StartBefore and StopAfter passes to allow running only a portion of the normal code-gen pass sequence.
If the StartAfter and StartBefore pass ID is zero, then compilation will begin at the normal point; otherwise, clear the Started flag to indicate that passes should not be added until the starting pass is seen. If the Stop pass ID is zero, then compilation will continue to the end.
This function expects that at least one of the StartAfter or the StartBefore pass IDs is null.
Definition at line 155 of file CodeGen/Passes.h.
Referenced by addPassesToGenerateCode().
| void TargetPassConfig::substitutePass | ( | AnalysisID | StandardID, |
| IdentifyingPassPtr | TargetID | ||
| ) |
Allow the target to override a specific pass without overriding the pass pipeline.
When passes are added to the standard pipeline at the point where StandardID is expected, add TargetID in its place.
Definition at line 264 of file Passes.cpp.
References Impl, and llvm::PassConfigImpl::TargetPasses.
Referenced by disablePass(), enablePass(), and TargetPassConfig().
| bool TargetPassConfig::usingDefaultRegAlloc | ( | ) | const |
Return true if the default global register allocator is in use and has not be overriden on the command line with '-regalloc=...'.
Definition at line 710 of file Passes.cpp.
References RegAlloc.
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Definition at line 118 of file CodeGen/Passes.h.
Referenced by addIRPasses(), addISelPrepare(), and setDisableVerify().
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Pseudo Pass IDs.
These are defined within TargetPassConfig because they are unregistered pass IDs. They are only useful for use with TargetPassConfig APIs to identify multiple occurrences of the same pass.EarlyTailDuplicate - A clone of the TailDuplicate pass that runs early during codegen, on SSA form.
Definition at line 96 of file CodeGen/Passes.h.
Referenced by addMachineSSAOptimization(), overridePass(), and TargetPassConfig().
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Default setting for -enable-shrink-wrap on this target.
Definition at line 124 of file CodeGen/Passes.h.
Referenced by getEnableShrinkWrap().
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Default setting for -enable-tail-merge on this target.
Definition at line 121 of file CodeGen/Passes.h.
Referenced by getEnableTailMerge(), and setEnableTailMerge().
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Definition at line 133 of file CodeGen/Passes.h.
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Definition at line 112 of file CodeGen/Passes.h.
Referenced by addPass(), getPassSubstitution(), insertPass(), substitutePass(), TargetPassConfig(), and ~TargetPassConfig().
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Definition at line 113 of file CodeGen/Passes.h.
Referenced by addPass(), setInitialized(), and setOpt().
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PostRAMachineLICM - A clone of the LICM pass that runs during late machine optimization after regalloc.
Definition at line 100 of file CodeGen/Passes.h.
Referenced by addOptimizedRegAlloc(), overridePass(), and TargetPassConfig().
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Definition at line 111 of file CodeGen/Passes.h.
Referenced by addCodeGenPrepare(), addISelPrepare(), addMachineLateOptimization(), addMachinePasses(), addPassesToHandleExceptions(), addPrintPass(), getOptLevel(), and getTM().
1.8.6