19 #define DEBUG_TYPE "ppctti"
32 assert(
isPowerOf2_32(TyWidth) &&
"Ty width must be power of 2");
81 case Intrinsic::sadd_with_overflow:
82 case Intrinsic::uadd_with_overflow:
83 case Intrinsic::ssub_with_overflow:
84 case Intrinsic::usub_with_overflow:
88 case Intrinsic::experimental_stackmap:
92 case Intrinsic::experimental_patchpoint_void:
93 case Intrinsic::experimental_patchpoint_i64:
112 unsigned ImmIdx = ~0U;
113 bool ShiftedFree =
false, RunFree =
false, UnsignedFree =
false,
118 case Instruction::GetElementPtr:
128 case Instruction::Add:
133 case Instruction::Sub:
134 case Instruction::Mul:
135 case Instruction::Shl:
136 case Instruction::LShr:
137 case Instruction::AShr:
140 case Instruction::ICmp:
155 if (ZeroFree && Imm == 0)
200 return LoopHasReductions;
206 return ST->
hasVSX() ? 64 : 32;
211 if (ST->
hasQPX())
return 256;
257 Opd1PropInfo, Opd2PropInfo);
278 assert(Val->
isVectorTy() &&
"This must be a vector type");
281 assert(ISD &&
"Invalid opcode");
301 unsigned LHSPenalty = 2;
332 bool UnalignedAltivec =
335 LT.second.getSizeInBits() == 128 &&
340 unsigned SrcBytes = LT.second.getStoreSize();
341 if (SrcBytes && Alignment && Alignment < SrcBytes && !UnalignedAltivec) {
342 Cost += LT.first*(SrcBytes/Alignment-1);
bool isInt< 32 >(int64_t x)
unsigned getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment, unsigned AddressSpace)
uint64_t getZExtValue() const
Get zero extended value.
Cost tables and simple lookup functions.
bool isDoubleTy() const
isDoubleTy - Return true if this is 'double', a 64-bit IEEE fp type.
unsigned getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::OperandValueKind Opd1Info=TTI::OK_AnyValue, TTI::OperandValueKind Opd2Info=TTI::OK_AnyValue, TTI::OperandValueProperties Opd1PropInfo=TTI::OP_None, TTI::OperandValueProperties Opd2PropInfo=TTI::OP_None)
bool isShiftedMask_32(uint32_t Value)
isShiftedMask_32 - This function returns true if the argument contains a non-empty sequence of ones w...
unsigned getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src)
static ConstantInt * ExtractElement(Constant *V, Constant *Idx)
unsigned getMaxInterleaveFactor(unsigned VF)
int InstructionOpcodeToISD(unsigned Opcode) const
Get the ISD node that corresponds to the Instruction class opcode.
bool isFloatingPointTy() const
isFloatingPointTy - Return true if this is one of the six floating point types
unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy)
initializer< Ty > init(const Ty &Val)
unsigned getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src)
unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy)
The instances of the Type class are immutable: once they are created, they are never changed...
bool isVectorTy() const
isVectorTy - True if this is an instance of VectorType.
int64_t getSExtValue() const
Get sign extended value.
INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element at IDX replaced with VAL...
APInt Or(const APInt &LHS, const APInt &RHS)
Bitwise OR function for APInt.
APInt Xor(const APInt &LHS, const APInt &RHS)
Bitwise XOR function for APInt.
unsigned getBitWidth() const
Return the number of bits in the APInt.
This file provides a helper that implements much of the TTI interface in terms of the target-independ...
void getUnrollingPreferences(Loop *L, TTI::UnrollingPreferences &UP)
unsigned getNumberOfRegisters(bool Vector)
bool isShiftedMask_64(uint64_t Value)
isShiftedMask_64 - This function returns true if the argument contains a non-empty sequence of ones w...
unsigned getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index, Type *SubTp)
EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR identified by the (potentially...
unsigned getVectorNumElements() const
unsigned getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment, unsigned AddressSpace)
bool enableAggressiveInterleaving(bool LoopHasReductions)
unsigned getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::OperandValueKind Opd1Info=TTI::OK_AnyValue, TTI::OperandValueKind Opd2Info=TTI::OK_AnyValue, TTI::OperandValueProperties Opd1PropInfo=TTI::OP_None, TTI::OperandValueProperties Opd2PropInfo=TTI::OP_None)
Class for arbitrary precision integers.
bool isIntegerTy() const
isIntegerTy - True if this is an instance of IntegerType.
const Type * getScalarType() const LLVM_READONLY
getScalarType - If this is a vector type, return the element type, otherwise return 'this'...
APInt And(const APInt &LHS, const APInt &RHS)
Bitwise AND function for APInt.
unsigned getIntImmCost(const APInt &Imm, Type *Ty)
TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth)
unsigned getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index)
unsigned getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index)
bool isInt< 16 >(int64_t x)
bool isPPC64() const
isPPC64 - Return true if we are generating code for 64-bit pointer mode.
const ARM::ArchExtKind Kind
unsigned getPrimitiveSizeInBits() const LLVM_READONLY
getPrimitiveSizeInBits - Return the basic size of this type if it is a primitive type.
bool isUInt< 16 >(uint64_t x)
unsigned getDarwinDirective() const
getDarwinDirective - Returns the -m directive specified for the cpu.
unsigned getRegisterBitWidth(bool Vector)
bool isPowerOf2_32(uint32_t Value)
isPowerOf2_32 - This function returns true if the argument is a power of two > 0. ...
void getUnrollingPreferences(Loop *L, TTI::UnrollingPreferences &UP)
std::pair< unsigned, MVT > getTypeLegalizationCost(const DataLayout &DL, Type *Ty) const
Estimate the cost of type-legalization and the legalized type.
unsigned getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index, Type *SubTp)
This file describes how to lower LLVM code to machine code.