14 #ifndef LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64MCTARGETDESC_H
15 #define LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64MCTARGETDESC_H
17 #include "llvm/Support/DataTypes.h"
21 class formatted_raw_ostream;
30 class MCSubtargetInfo;
31 class MCTargetStreamer;
36 class raw_pwrite_stream;
43 const MCRegisterInfo &MRI,
46 const MCRegisterInfo &MRI,
47 const Triple &TT, StringRef CPU);
49 const MCRegisterInfo &MRI,
50 const Triple &TT, StringRef CPU);
61 formatted_raw_ostream &OS,
62 MCInstPrinter *InstPrint,
66 const MCSubtargetInfo &STI);
73 #define GET_REGINFO_ENUM
74 #include "AArch64GenRegisterInfo.inc"
78 #define GET_INSTRINFO_ENUM
79 #include "AArch64GenInstrInfo.inc"
81 #define GET_SUBTARGETINFO_ENUM
82 #include "AArch64GenSubtargetInfo.inc"
MCAsmBackend * createAArch64beAsmBackend(const Target &T, const MCRegisterInfo &MRI, const Triple &TT, StringRef CPU)
MCObjectWriter * createAArch64ELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI, bool IsLittleEndian)
MCObjectWriter * createAArch64MachObjectWriter(raw_pwrite_stream &OS, uint32_t CPUType, uint32_t CPUSubtype)
MCTargetStreamer * createAArch64ObjectTargetStreamer(MCStreamer &S, const MCSubtargetInfo &STI)
Target TheAArch64leTarget
MCCodeEmitter * createAArch64MCCodeEmitter(const MCInstrInfo &MCII, const MCRegisterInfo &MRI, MCContext &Ctx)
Target TheAArch64beTarget
MCAsmBackend * createAArch64leAsmBackend(const Target &T, const MCRegisterInfo &MRI, const Triple &TT, StringRef CPU)
MCTargetStreamer * createAArch64AsmTargetStreamer(MCStreamer &S, formatted_raw_ostream &OS, MCInstPrinter *InstPrint, bool isVerboseAsm)