17 #ifndef LLVM_LIB_TARGET_R600_AMDGPUTARGETTRANSFORMINFO_H
18 #define LLVM_LIB_TARGET_R600_AMDGPUTARGETTRANSFORMINFO_H
41 :
BaseT(TM, DL), ST(TM->getSubtargetImpl()),
42 TLI(ST->getTargetLowering()) {}
48 :
BaseT(std::move(static_cast<
BaseT &>(Arg))), ST(std::move(Arg.ST)),
49 TLI(std::move(Arg.TLI)) {}
56 assert(
isPowerOf2_32(TyWidth) &&
"Ty width must be power of 2");
A parsed version of the target data layout string in and methods for querying it. ...
unsigned getNumberOfRegisters(bool Vector)
void getUnrollingPreferences(Loop *L, TTI::UnrollingPreferences &UP)
AMDGPUTTIImpl(const AMDGPUTargetMachine *TM, const DataLayout &DL)
Base class which can be used to help build a TTI implementation.
unsigned getRegisterBitWidth(bool Vector)
unsigned getMaxInterleaveFactor(unsigned VF)
TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth)
This file provides a helper that implements much of the TTI interface in terms of the target-independ...
The AMDGPU TargetMachine interface definition for hw codgen targets.
AMDGPUTTIImpl(AMDGPUTTIImpl &&Arg)
bool hasBranchDivergence()
AMDGPUTTIImpl(const AMDGPUTTIImpl &Arg)
bool hasBCNT(unsigned Size) const
bool isPowerOf2_32(uint32_t Value)
isPowerOf2_32 - This function returns true if the argument is a power of two > 0. ...
This file describes how to lower LLVM code to machine code.