13 #ifndef LLVM_LIB_TARGET_R600_SIDEFINES_H
14 #define LLVM_LIB_TARGET_R600_SIDEFINES_H
16 namespace SIInstrFlags {
55 namespace SIInstrFlags {
95 #define R_00B028_SPI_SHADER_PGM_RSRC1_PS 0x00B028
96 #define R_00B02C_SPI_SHADER_PGM_RSRC2_PS 0x00B02C
97 #define S_00B02C_EXTRA_LDS_SIZE(x) (((x) & 0xFF) << 8)
98 #define R_00B128_SPI_SHADER_PGM_RSRC1_VS 0x00B128
99 #define R_00B228_SPI_SHADER_PGM_RSRC1_GS 0x00B228
100 #define R_00B848_COMPUTE_PGM_RSRC1 0x00B848
101 #define S_00B028_VGPRS(x) (((x) & 0x3F) << 0)
102 #define S_00B028_SGPRS(x) (((x) & 0x0F) << 6)
104 #define R_00B84C_COMPUTE_PGM_RSRC2 0x00B84C
105 #define S_00B84C_SCRATCH_EN(x) (((x) & 0x1) << 0)
106 #define G_00B84C_SCRATCH_EN(x) (((x) >> 0) & 0x1)
107 #define C_00B84C_SCRATCH_EN 0xFFFFFFFE
108 #define S_00B84C_USER_SGPR(x) (((x) & 0x1F) << 1)
109 #define G_00B84C_USER_SGPR(x) (((x) >> 1) & 0x1F)
110 #define C_00B84C_USER_SGPR 0xFFFFFFC1
111 #define S_00B84C_TGID_X_EN(x) (((x) & 0x1) << 7)
112 #define G_00B84C_TGID_X_EN(x) (((x) >> 7) & 0x1)
113 #define C_00B84C_TGID_X_EN 0xFFFFFF7F
114 #define S_00B84C_TGID_Y_EN(x) (((x) & 0x1) << 8)
115 #define G_00B84C_TGID_Y_EN(x) (((x) >> 8) & 0x1)
116 #define C_00B84C_TGID_Y_EN 0xFFFFFEFF
117 #define S_00B84C_TGID_Z_EN(x) (((x) & 0x1) << 9)
118 #define G_00B84C_TGID_Z_EN(x) (((x) >> 9) & 0x1)
119 #define C_00B84C_TGID_Z_EN 0xFFFFFDFF
120 #define S_00B84C_TG_SIZE_EN(x) (((x) & 0x1) << 10)
121 #define G_00B84C_TG_SIZE_EN(x) (((x) >> 10) & 0x1)
122 #define C_00B84C_TG_SIZE_EN 0xFFFFFBFF
123 #define S_00B84C_TIDIG_COMP_CNT(x) (((x) & 0x03) << 11)
124 #define G_00B84C_TIDIG_COMP_CNT(x) (((x) >> 11) & 0x03)
125 #define C_00B84C_TIDIG_COMP_CNT 0xFFFFE7FF
127 #define S_00B84C_EXCP_EN_MSB(x) (((x) & 0x03) << 13)
128 #define G_00B84C_EXCP_EN_MSB(x) (((x) >> 13) & 0x03)
129 #define C_00B84C_EXCP_EN_MSB 0xFFFF9FFF
131 #define S_00B84C_LDS_SIZE(x) (((x) & 0x1FF) << 15)
132 #define G_00B84C_LDS_SIZE(x) (((x) >> 15) & 0x1FF)
133 #define C_00B84C_LDS_SIZE 0xFF007FFF
134 #define S_00B84C_EXCP_EN(x) (((x) & 0x7F) << 24)
135 #define G_00B84C_EXCP_EN(x) (((x) >> 24) & 0x7F)
136 #define C_00B84C_EXCP_EN
138 #define R_0286CC_SPI_PS_INPUT_ENA 0x0286CC
141 #define R_00B848_COMPUTE_PGM_RSRC1 0x00B848
142 #define S_00B848_VGPRS(x) (((x) & 0x3F) << 0)
143 #define G_00B848_VGPRS(x) (((x) >> 0) & 0x3F)
144 #define C_00B848_VGPRS 0xFFFFFFC0
145 #define S_00B848_SGPRS(x) (((x) & 0x0F) << 6)
146 #define G_00B848_SGPRS(x) (((x) >> 6) & 0x0F)
147 #define C_00B848_SGPRS 0xFFFFFC3F
148 #define S_00B848_PRIORITY(x) (((x) & 0x03) << 10)
149 #define G_00B848_PRIORITY(x) (((x) >> 10) & 0x03)
150 #define C_00B848_PRIORITY 0xFFFFF3FF
151 #define S_00B848_FLOAT_MODE(x) (((x) & 0xFF) << 12)
152 #define G_00B848_FLOAT_MODE(x) (((x) >> 12) & 0xFF)
153 #define C_00B848_FLOAT_MODE 0xFFF00FFF
154 #define S_00B848_PRIV(x) (((x) & 0x1) << 20)
155 #define G_00B848_PRIV(x) (((x) >> 20) & 0x1)
156 #define C_00B848_PRIV 0xFFEFFFFF
157 #define S_00B848_DX10_CLAMP(x) (((x) & 0x1) << 21)
158 #define G_00B848_DX10_CLAMP(x) (((x) >> 21) & 0x1)
159 #define C_00B848_DX10_CLAMP 0xFFDFFFFF
160 #define S_00B848_DEBUG_MODE(x) (((x) & 0x1) << 22)
161 #define G_00B848_DEBUG_MODE(x) (((x) >> 22) & 0x1)
162 #define C_00B848_DEBUG_MODE 0xFFBFFFFF
163 #define S_00B848_IEEE_MODE(x) (((x) & 0x1) << 23)
164 #define G_00B848_IEEE_MODE(x) (((x) >> 23) & 0x1)
165 #define C_00B848_IEEE_MODE 0xFF7FFFFF
169 #define FP_ROUND_ROUND_TO_NEAREST 0
170 #define FP_ROUND_ROUND_TO_INF 1
171 #define FP_ROUND_ROUND_TO_NEGINF 2
172 #define FP_ROUND_ROUND_TO_ZERO 3
176 #define FP_ROUND_MODE_SP(x) ((x) & 0x3)
177 #define FP_ROUND_MODE_DP(x) (((x) & 0x3) << 2)
179 #define FP_DENORM_FLUSH_IN_FLUSH_OUT 0
180 #define FP_DENORM_FLUSH_OUT 1
181 #define FP_DENORM_FLUSH_IN 2
182 #define FP_DENORM_FLUSH_NONE 3
187 #define FP_DENORM_MODE_SP(x) (((x) & 0x3) << 4)
188 #define FP_DENORM_MODE_DP(x) (((x) & 0x3) << 6)
190 #define R_00B860_COMPUTE_TMPRING_SIZE 0x00B860
191 #define S_00B860_WAVESIZE(x) (((x) & 0x1FFF) << 12)
193 #define R_0286E8_SPI_TMPRING_SIZE 0x0286E8
194 #define S_0286E8_WAVESIZE(x) (((x) & 0x1FFF) << 12)
Operand with register or inline constant.
Operand with register or 32-bit immediate.