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| | ARMInstrInfo (const ARMSubtarget &STI) |
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| void | getNoopForMachoTarget (MCInst &NopInst) const override |
| | getNoopForMachoTarget - Return the noop instruction to use for a noop. More...
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| unsigned | getUnindexedOpcode (unsigned Opc) const override |
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| const ARMRegisterInfo & | getRegisterInfo () const override |
| | getRegisterInfo - TargetInstrInfo is a superset of MRegister info. More...
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| bool | hasNOP () const |
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| MachineInstr * | convertToThreeAddress (MachineFunction::iterator &MFI, MachineBasicBlock::iterator &MBBI, LiveVariables *LV) const override |
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| const ARMSubtarget & | getSubtarget () const |
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| ScheduleHazardRecognizer * | CreateTargetHazardRecognizer (const TargetSubtargetInfo *STI, const ScheduleDAG *DAG) const override |
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| ScheduleHazardRecognizer * | CreateTargetPostRAHazardRecognizer (const InstrItineraryData *II, const ScheduleDAG *DAG) const override |
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| bool | AnalyzeBranch (MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify=false) const override |
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| unsigned | RemoveBranch (MachineBasicBlock &MBB) const override |
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| unsigned | InsertBranch (MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, DebugLoc DL) const override |
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| bool | ReverseBranchCondition (SmallVectorImpl< MachineOperand > &Cond) const override |
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| bool | isPredicated (const MachineInstr *MI) const override |
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| ARMCC::CondCodes | getPredicate (const MachineInstr *MI) const |
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| bool | PredicateInstruction (MachineInstr *MI, ArrayRef< MachineOperand > Pred) const override |
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| bool | SubsumesPredicate (ArrayRef< MachineOperand > Pred1, ArrayRef< MachineOperand > Pred2) const override |
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| bool | DefinesPredicate (MachineInstr *MI, std::vector< MachineOperand > &Pred) const override |
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| bool | isPredicable (MachineInstr *MI) const override |
| | isPredicable - Return true if the specified instruction can be predicated. More...
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| virtual unsigned | GetInstSizeInBytes (const MachineInstr *MI) const |
| | GetInstSize - Returns the size of the specified MachineInstr. More...
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| unsigned | isLoadFromStackSlot (const MachineInstr *MI, int &FrameIndex) const override |
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| unsigned | isStoreToStackSlot (const MachineInstr *MI, int &FrameIndex) const override |
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| unsigned | isLoadFromStackSlotPostFE (const MachineInstr *MI, int &FrameIndex) const override |
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| unsigned | isStoreToStackSlotPostFE (const MachineInstr *MI, int &FrameIndex) const override |
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| void | copyToCPSR (MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned SrcReg, bool KillSrc, const ARMSubtarget &Subtarget) const |
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| void | copyFromCPSR (MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned DestReg, bool KillSrc, const ARMSubtarget &Subtarget) const |
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| void | copyPhysReg (MachineBasicBlock &MBB, MachineBasicBlock::iterator I, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const override |
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| void | storeRegToStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override |
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| void | loadRegFromStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override |
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| bool | expandPostRAPseudo (MachineBasicBlock::iterator MI) const override |
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| void | reMaterialize (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, unsigned SubIdx, const MachineInstr *Orig, const TargetRegisterInfo &TRI) const override |
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| MachineInstr * | duplicate (MachineInstr *Orig, MachineFunction &MF) const override |
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| MachineInstr * | commuteInstruction (MachineInstr *, bool=false) const override |
| | commuteInstruction - Handle commutable instructions. More...
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| const MachineInstrBuilder & | AddDReg (MachineInstrBuilder &MIB, unsigned Reg, unsigned SubIdx, unsigned State, const TargetRegisterInfo *TRI) const |
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| bool | produceSameValue (const MachineInstr *MI0, const MachineInstr *MI1, const MachineRegisterInfo *MRI) const override |
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| bool | areLoadsFromSameBasePtr (SDNode *Load1, SDNode *Load2, int64_t &Offset1, int64_t &Offset2) const override |
| | areLoadsFromSameBasePtr - This is used by the pre-regalloc scheduler to determine if two loads are loading from the same base address. More...
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| bool | shouldScheduleLoadsNear (SDNode *Load1, SDNode *Load2, int64_t Offset1, int64_t Offset2, unsigned NumLoads) const override |
| | shouldScheduleLoadsNear - This is a used by the pre-regalloc scheduler to determine (in conjunction with areLoadsFromSameBasePtr) if two loads should be scheduled togther. More...
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| bool | isSchedulingBoundary (const MachineInstr *MI, const MachineBasicBlock *MBB, const MachineFunction &MF) const override |
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| bool | isProfitableToIfCvt (MachineBasicBlock &MBB, unsigned NumCycles, unsigned ExtraPredCycles, const BranchProbability &Probability) const override |
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| bool | isProfitableToIfCvt (MachineBasicBlock &TMBB, unsigned NumT, unsigned ExtraT, MachineBasicBlock &FMBB, unsigned NumF, unsigned ExtraF, const BranchProbability &Probability) const override |
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| bool | isProfitableToDupForIfCvt (MachineBasicBlock &MBB, unsigned NumCycles, const BranchProbability &Probability) const override |
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| bool | isProfitableToUnpredicate (MachineBasicBlock &TMBB, MachineBasicBlock &FMBB) const override |
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| bool | analyzeCompare (const MachineInstr *MI, unsigned &SrcReg, unsigned &SrcReg2, int &CmpMask, int &CmpValue) const override |
| | analyzeCompare - For a comparison instruction, return the source registers in SrcReg and SrcReg2 if having two register operands, and the value it compares against in CmpValue. More...
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| bool | optimizeCompareInstr (MachineInstr *CmpInstr, unsigned SrcReg, unsigned SrcReg2, int CmpMask, int CmpValue, const MachineRegisterInfo *MRI) const override |
| | optimizeCompareInstr - Convert the instruction to set the zero flag so that we can remove a "comparison with zero"; Remove a redundant CMP instruction if the flags can be updated in the same way by an earlier instruction such as SUB. More...
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| bool | analyzeSelect (const MachineInstr *MI, SmallVectorImpl< MachineOperand > &Cond, unsigned &TrueOp, unsigned &FalseOp, bool &Optimizable) const override |
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| MachineInstr * | optimizeSelect (MachineInstr *MI, SmallPtrSetImpl< MachineInstr * > &SeenMIs, bool) const override |
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| bool | FoldImmediate (MachineInstr *UseMI, MachineInstr *DefMI, unsigned Reg, MachineRegisterInfo *MRI) const override |
| | FoldImmediate - 'Reg' is known to be defined by a move immediate instruction, try to fold the immediate into the use instruction. More...
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| unsigned | getNumMicroOps (const InstrItineraryData *ItinData, const MachineInstr *MI) const override |
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| int | getOperandLatency (const InstrItineraryData *ItinData, const MachineInstr *DefMI, unsigned DefIdx, const MachineInstr *UseMI, unsigned UseIdx) const override |
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| int | getOperandLatency (const InstrItineraryData *ItinData, SDNode *DefNode, unsigned DefIdx, SDNode *UseNode, unsigned UseIdx) const override |
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| std::pair< uint16_t, uint16_t > | getExecutionDomain (const MachineInstr *MI) const override |
| | VFP/NEON execution domains. More...
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| void | setExecutionDomain (MachineInstr *MI, unsigned Domain) const override |
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| unsigned | getPartialRegUpdateClearance (const MachineInstr *, unsigned, const TargetRegisterInfo *) const override |
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| void | breakPartialRegDependency (MachineBasicBlock::iterator, unsigned, const TargetRegisterInfo *TRI) const override |
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| unsigned | getNumLDMAddresses (const MachineInstr *MI) const |
| | Get the number of addresses by LDM or VLDM or zero for unknown. More...
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| bool | isFpMLxInstruction (unsigned Opcode) const |
| | isFpMLxInstruction - Return true if the specified opcode is a fp MLA / MLS instruction. More...
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| bool | isFpMLxInstruction (unsigned Opcode, unsigned &MulOpc, unsigned &AddSubOpc, bool &NegAcc, bool &HasLane) const |
| | isFpMLxInstruction - This version also returns the multiply opcode and the addition / subtraction opcode to expand to. More...
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| bool | canCauseFpMLxStall (unsigned Opcode) const |
| | canCauseFpMLxStall - Return true if an instruction of the specified opcode will cause stalls when scheduled after (within 4-cycle window) a fp MLA / MLS instruction. More...
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| bool | isSwiftFastImmShift (const MachineInstr *MI) const |
| | Returns true if the instruction has a shift by immediate that can be executed in one cycle less. More...
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Definition at line 23 of file ARMInstrInfo.h.