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LLVM
3.7.0
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Specify the latency in cpu cycles for a particular scheduling class and def index. More...
#include <MCSchedule.h>
Public Member Functions | |
| bool | operator== (const MCWriteLatencyEntry &Other) const |
Public Attributes | |
| int | Cycles |
| unsigned | WriteResourceID |
Specify the latency in cpu cycles for a particular scheduling class and def index.
-1 indicates an invalid latency. Heuristics would typically consider an instruction with invalid latency to have infinite latency. Also identify the WriteResources of this def. When the operand expands to a sequence of writes, this ID is the last write in the sequence.
Definition at line 69 of file MCSchedule.h.
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inline |
Definition at line 73 of file MCSchedule.h.
References Cycles, and WriteResourceID.
| int llvm::MCWriteLatencyEntry::Cycles |
Definition at line 70 of file MCSchedule.h.
Referenced by llvm::TargetSchedModel::computeOperandLatency(), getLatency(), and operator==().
| unsigned llvm::MCWriteLatencyEntry::WriteResourceID |
Definition at line 71 of file MCSchedule.h.
Referenced by llvm::TargetSchedModel::computeOperandLatency(), and operator==().
1.8.6