45 class X86MCInstLower {
75 X86AsmPrinter::StackMapShadowTracker::StackMapShadowTracker(
TargetMachine &
TM)
76 : TM(TM), InShadow(
false), RequiredShadowSize(0), CurrentShadowSize(0) {}
78 X86AsmPrinter::StackMapShadowTracker::~StackMapShadowTracker() {}
83 CodeEmitter.reset(
TM.getTarget().createMCCodeEmitter(
84 *MF->getSubtarget().getInstrInfo(),
85 *MF->getSubtarget().getRegisterInfo(), MF->getContext()));
88 void X86AsmPrinter::StackMapShadowTracker::count(
MCInst &Inst,
94 CodeEmitter->encodeInstruction(Inst, VecOS, Fixups, STI);
96 CurrentShadowSize += Code.
size();
97 if (CurrentShadowSize >= RequiredShadowSize)
102 void X86AsmPrinter::StackMapShadowTracker::emitShadowPadding(
104 if (InShadow && CurrentShadowSize < RequiredShadowSize) {
106 EmitNops(OutStreamer, RequiredShadowSize - CurrentShadowSize,
111 void X86AsmPrinter::EmitAndCountInstruction(
MCInst &Inst) {
119 : Ctx(mf.getContext()), MF(mf),
TM(mf.getTarget()), MAI(*
TM.getMCAsmInfo()),
149 Suffix =
"$non_lazy_ptr";
156 unsigned PrefixLen = Name.
size();
163 }
else if (MO.
isMBB()) {
164 assert(Suffix.
empty());
167 unsigned OrigLen = Name.
size() - PrefixLen;
171 Sym = Ctx.getOrCreateSymbol(Name);
184 assert(MO.
isGlobal() &&
"Extern symbol not handled yet");
196 assert(MO.
isGlobal() &&
"Extern symbol not handled yet");
218 StubValueTy(Ctx.getOrCreateSymbol(OrigName),
false);
231 const MCExpr *Expr =
nullptr;
245 Expr = MCSymbolRefExpr::create(Sym, MCSymbolRefExpr::VK_TLVP, Ctx);
247 Expr = MCBinaryExpr::createSub(Expr,
248 MCSymbolRefExpr::create(MF.getPICBaseSymbol(),
263 case X86II::MO_GOT: RefKind = MCSymbolRefExpr::VK_GOT;
break;
265 case X86II::MO_PLT: RefKind = MCSymbolRefExpr::VK_PLT;
break;
269 Expr = MCSymbolRefExpr::create(Sym, Ctx);
271 Expr = MCBinaryExpr::createSub(Expr,
272 MCSymbolRefExpr::create(MF.getPICBaseSymbol(), Ctx),
275 assert(MAI.doesSetDirectiveSuppressesReloc());
282 Expr = MCSymbolRefExpr::create(Label, Ctx);
288 Expr = MCSymbolRefExpr::create(Sym, RefKind, Ctx);
291 Expr = MCBinaryExpr::createAdd(Expr,
292 MCConstantExpr::create(MO.
getOffset(), Ctx),
294 return MCOperand::createExpr(Expr);
310 if (Reg !=
X86::AL && Reg != X86::AX && Reg !=
X86::EAX && Reg != X86::RAX)
323 unsigned NewOpcode = 0;
328 case X86::MOVSX16rr8:
329 if (Op0 == X86::AX && Op1 ==
X86::AL)
330 NewOpcode = X86::CBW;
332 case X86::MOVSX32rr16:
333 if (Op0 ==
X86::EAX && Op1 == X86::AX)
334 NewOpcode = X86::CWDE;
336 case X86::MOVSX64rr32:
337 if (Op0 == X86::RAX && Op1 ==
X86::EAX)
338 NewOpcode = X86::CDQE;
342 if (NewOpcode != 0) {
357 unsigned AddrBase = IsStore;
358 unsigned RegOp = IsStore ? 0 : 5;
359 unsigned AddrOp = AddrBase + 3;
367 "Unexpected instruction!");
371 if (Reg !=
X86::AL && Reg != X86::AX && Reg !=
X86::EAX && Reg != X86::RAX)
381 if (SRE->getKind() == MCSymbolRefExpr::VK_TLVP)
401 return Subtarget.
is64Bit() ? X86::RETQ : X86::RETL;
411 case MachineOperand::MO_Register:
415 return MCOperand::createReg(MO.
getReg());
416 case MachineOperand::MO_Immediate:
417 return MCOperand::createImm(MO.
getImm());
418 case MachineOperand::MO_MachineBasicBlock:
419 case MachineOperand::MO_GlobalAddress:
420 case MachineOperand::MO_ExternalSymbol:
422 case MachineOperand::MO_MCSymbol:
424 case MachineOperand::MO_JumpTableIndex:
426 case MachineOperand::MO_ConstantPoolIndex:
428 case MachineOperand::MO_BlockAddress:
431 case MachineOperand::MO_RegisterMask:
441 if (
auto MaybeMCOp = LowerMachineOperand(MI, MO))
453 "Unexpected # of LEA operands");
455 "LEA has segment specified!");
465 case X86::VMOVAPDYrr:
467 case X86::VMOVAPSYrr:
469 case X86::VMOVDQAYrr:
471 case X86::VMOVDQUYrr:
473 case X86::VMOVUPDYrr:
475 case X86::VMOVUPSYrr: {
481 case X86::VMOVAPDrr: NewOpc = X86::VMOVAPDrr_REV;
break;
482 case X86::VMOVAPDYrr: NewOpc = X86::VMOVAPDYrr_REV;
break;
483 case X86::VMOVAPSrr: NewOpc = X86::VMOVAPSrr_REV;
break;
484 case X86::VMOVAPSYrr: NewOpc = X86::VMOVAPSYrr_REV;
break;
485 case X86::VMOVDQArr: NewOpc = X86::VMOVDQArr_REV;
break;
486 case X86::VMOVDQAYrr: NewOpc = X86::VMOVDQAYrr_REV;
break;
487 case X86::VMOVDQUrr: NewOpc = X86::VMOVDQUrr_REV;
break;
488 case X86::VMOVDQUYrr: NewOpc = X86::VMOVDQUYrr_REV;
break;
489 case X86::VMOVUPDrr: NewOpc = X86::VMOVUPDrr_REV;
break;
490 case X86::VMOVUPDYrr: NewOpc = X86::VMOVUPDYrr_REV;
break;
491 case X86::VMOVUPSrr: NewOpc = X86::VMOVUPSrr_REV;
break;
492 case X86::VMOVUPSYrr: NewOpc = X86::VMOVUPSYrr_REV;
break;
499 case X86::VMOVSSrr: {
505 case X86::VMOVSDrr: NewOpc = X86::VMOVSDrr_REV;
break;
506 case X86::VMOVSSrr: NewOpc = X86::VMOVSSrr_REV;
break;
516 case X86::TAILJMPr64:
517 case X86::TAILJMPr64_REX:
519 case X86::CALL64pcrel32: {
529 case X86::EH_RETURN64: {
538 case X86::TAILJMPd64: {
542 case X86::TAILJMPr: Opcode = X86::JMP32r;
break;
544 case X86::TAILJMPd64: Opcode = X86::JMP_1;
break;
563 case X86::DEC16r: Opcode = X86::DEC16r_alt;
break;
564 case X86::DEC32r: Opcode = X86::DEC32r_alt;
break;
565 case X86::INC16r: Opcode = X86::INC16r_alt;
break;
566 case X86::INC32r: Opcode = X86::INC32r_alt;
break;
575 case X86::ADD16rr_DB: OutMI.
setOpcode(X86::OR16rr);
goto ReSimplify;
576 case X86::ADD32rr_DB: OutMI.
setOpcode(X86::OR32rr);
goto ReSimplify;
577 case X86::ADD64rr_DB: OutMI.
setOpcode(X86::OR64rr);
goto ReSimplify;
578 case X86::ADD16ri_DB: OutMI.
setOpcode(X86::OR16ri);
goto ReSimplify;
579 case X86::ADD32ri_DB: OutMI.
setOpcode(X86::OR32ri);
goto ReSimplify;
580 case X86::ADD64ri32_DB: OutMI.
setOpcode(X86::OR64ri32);
goto ReSimplify;
581 case X86::ADD16ri8_DB: OutMI.
setOpcode(X86::OR16ri8);
goto ReSimplify;
582 case X86::ADD32ri8_DB: OutMI.
setOpcode(X86::OR32ri8);
goto ReSimplify;
583 case X86::ADD64ri8_DB: OutMI.
setOpcode(X86::OR64ri8);
goto ReSimplify;
588 case X86::ACQUIRE_MOV8rm: OutMI.
setOpcode(X86::MOV8rm);
goto ReSimplify;
589 case X86::ACQUIRE_MOV16rm: OutMI.
setOpcode(X86::MOV16rm);
goto ReSimplify;
590 case X86::ACQUIRE_MOV32rm: OutMI.
setOpcode(X86::MOV32rm);
goto ReSimplify;
591 case X86::ACQUIRE_MOV64rm: OutMI.
setOpcode(X86::MOV64rm);
goto ReSimplify;
592 case X86::RELEASE_MOV8mr: OutMI.
setOpcode(X86::MOV8mr);
goto ReSimplify;
593 case X86::RELEASE_MOV16mr: OutMI.
setOpcode(X86::MOV16mr);
goto ReSimplify;
594 case X86::RELEASE_MOV32mr: OutMI.
setOpcode(X86::MOV32mr);
goto ReSimplify;
595 case X86::RELEASE_MOV64mr: OutMI.
setOpcode(X86::MOV64mr);
goto ReSimplify;
596 case X86::RELEASE_MOV8mi: OutMI.
setOpcode(X86::MOV8mi);
goto ReSimplify;
597 case X86::RELEASE_MOV16mi: OutMI.
setOpcode(X86::MOV16mi);
goto ReSimplify;
598 case X86::RELEASE_MOV32mi: OutMI.
setOpcode(X86::MOV32mi);
goto ReSimplify;
599 case X86::RELEASE_MOV64mi32: OutMI.
setOpcode(X86::MOV64mi32);
goto ReSimplify;
600 case X86::RELEASE_ADD8mi: OutMI.
setOpcode(X86::ADD8mi);
goto ReSimplify;
601 case X86::RELEASE_ADD32mi: OutMI.
setOpcode(X86::ADD32mi);
goto ReSimplify;
602 case X86::RELEASE_ADD64mi32: OutMI.
setOpcode(X86::ADD64mi32);
goto ReSimplify;
603 case X86::RELEASE_AND8mi: OutMI.
setOpcode(X86::AND8mi);
goto ReSimplify;
604 case X86::RELEASE_AND32mi: OutMI.
setOpcode(X86::AND32mi);
goto ReSimplify;
605 case X86::RELEASE_AND64mi32: OutMI.
setOpcode(X86::AND64mi32);
goto ReSimplify;
606 case X86::RELEASE_OR8mi: OutMI.
setOpcode(X86::OR8mi);
goto ReSimplify;
607 case X86::RELEASE_OR32mi: OutMI.
setOpcode(X86::OR32mi);
goto ReSimplify;
608 case X86::RELEASE_OR64mi32: OutMI.
setOpcode(X86::OR64mi32);
goto ReSimplify;
609 case X86::RELEASE_XOR8mi: OutMI.
setOpcode(X86::XOR8mi);
goto ReSimplify;
610 case X86::RELEASE_XOR32mi: OutMI.
setOpcode(X86::XOR32mi);
goto ReSimplify;
611 case X86::RELEASE_XOR64mi32: OutMI.
setOpcode(X86::XOR64mi32);
goto ReSimplify;
612 case X86::RELEASE_INC8m: OutMI.
setOpcode(X86::INC8m);
goto ReSimplify;
613 case X86::RELEASE_INC16m: OutMI.
setOpcode(X86::INC16m);
goto ReSimplify;
614 case X86::RELEASE_INC32m: OutMI.
setOpcode(X86::INC32m);
goto ReSimplify;
615 case X86::RELEASE_INC64m: OutMI.
setOpcode(X86::INC64m);
goto ReSimplify;
616 case X86::RELEASE_DEC8m: OutMI.
setOpcode(X86::DEC8m);
goto ReSimplify;
617 case X86::RELEASE_DEC16m: OutMI.
setOpcode(X86::DEC16m);
goto ReSimplify;
618 case X86::RELEASE_DEC32m: OutMI.
setOpcode(X86::DEC32m);
goto ReSimplify;
619 case X86::RELEASE_DEC64m: OutMI.
setOpcode(X86::DEC64m);
goto ReSimplify;
628 case X86::MOV8mr_NOREX:
630 case X86::MOV8rm_NOREX:
675 case X86::MOVSX16rr8:
676 case X86::MOVSX32rr16:
677 case X86::MOVSX64rr32:
683 void X86AsmPrinter::LowerTlsAddr(X86MCInstLower &MCInstLowering,
686 bool is64Bits = MI.
getOpcode() == X86::TLS_addr64 ||
689 bool needsPadding = MI.
getOpcode() == X86::TLS_addr64;
698 case X86::TLS_addr32:
699 case X86::TLS_addr64:
702 case X86::TLS_base_addr32:
705 case X86::TLS_base_addr64:
741 EmitAndCountInstruction(LEA);
749 StringRef name = is64Bits ?
"__tls_get_addr" :
"___tls_get_addr";
756 EmitAndCountInstruction(
MCInstBuilder(is64Bits ? X86::CALL64pcrel32
765 assert(Is64Bit &&
"EmitNops only supports X86-64");
767 unsigned Opc, BaseReg, ScaleVal, IndexReg, Displacement, SegmentReg;
768 Opc = IndexReg = Displacement = SegmentReg = 0;
769 BaseReg = X86::RAX; ScaleVal = 1;
772 case 1: NumBytes -= 1; Opc = X86::NOOP;
break;
773 case 2: NumBytes -= 2; Opc = X86::XCHG16ar;
break;
774 case 3: NumBytes -= 3; Opc = X86::NOOPL;
break;
775 case 4: NumBytes -= 4; Opc = X86::NOOPL; Displacement = 8;
break;
776 case 5: NumBytes -= 5; Opc = X86::NOOPL; Displacement = 8;
777 IndexReg = X86::RAX;
break;
778 case 6: NumBytes -= 6; Opc = X86::NOOPW; Displacement = 8;
779 IndexReg = X86::RAX;
break;
780 case 7: NumBytes -= 7; Opc = X86::NOOPL; Displacement = 512;
break;
781 case 8: NumBytes -= 8; Opc = X86::NOOPL; Displacement = 512;
782 IndexReg = X86::RAX;
break;
783 case 9: NumBytes -= 9; Opc = X86::NOOPW; Displacement = 512;
784 IndexReg = X86::RAX;
break;
785 default: NumBytes -= 10; Opc = X86::NOOPW; Displacement = 512;
786 IndexReg = X86::RAX; SegmentReg = X86::CS;
break;
789 unsigned NumPrefixes =
std::min(NumBytes, 5U);
790 NumBytes -= NumPrefixes;
791 for (
unsigned i = 0; i != NumPrefixes; ++i)
805 .addImm(ScaleVal).addReg(IndexReg)
806 .addImm(Displacement).addReg(SegmentReg), STI);
812 void X86AsmPrinter::LowerSTATEPOINT(
const MachineInstr &MI,
813 X86MCInstLower &MCIL) {
814 assert(Subtarget->
is64Bit() &&
"Statepoint currently only supports X86-64");
817 if (
unsigned PatchBytes = SOpers.getNumPatchBytes()) {
825 switch (CallTarget.
getType()) {
828 CallTargetMCOp = MCIL.LowerSymbolOperand(
829 CallTarget, MCIL.GetSymbolFromOperand(CallTarget));
830 CallOpcode = X86::CALL64pcrel32;
838 CallOpcode = X86::CALL64pcrel32;
846 CallOpcode = X86::CALL64r;
865 void X86AsmPrinter::LowerFAULTING_LOAD_OP(
const MachineInstr &MI,
866 X86MCInstLower &MCIL) {
872 unsigned LoadOperandsBeginIdx = 3;
882 if (
auto MaybeOperand = MCIL.LowerMachineOperand(&MI, *
I))
890 void X86AsmPrinter::LowerSTACKMAP(
const MachineInstr &MI) {
894 SMShadowTracker.reset(NumShadowBytes);
899 void X86AsmPrinter::LowerPATCHPOINT(
const MachineInstr &MI,
900 X86MCInstLower &MCIL) {
901 assert(Subtarget->
is64Bit() &&
"Patchpoint currently only supports X86-64");
908 unsigned ScratchIdx = opers.getNextScratchIdx();
909 unsigned EncodedBytes = 0;
928 MCIL.LowerSymbolOperand(CalleeMO,
929 MCIL.GetSymbolFromOperand(CalleeMO));
941 EmitAndCountInstruction(
942 MCInstBuilder(X86::MOV64ri).addReg(ScratchReg).addOperand(CalleeMCOp));
943 EmitAndCountInstruction(
MCInstBuilder(X86::CALL64r).addReg(ScratchReg));
948 assert(NumBytes >= EncodedBytes &&
949 "Patchpoint can't request size less than the length of a call.");
960 while (MBBI == MBB->
begin()) {
985 assert((!C || ConstantEntry.
getType() == C->getType()) &&
986 "Expected a constant of the same type!");
1000 auto GetRegisterName = [](
unsigned RegNum) ->
StringRef {
1008 CS << DstName <<
" = ";
1009 bool NeedComma =
false;
1011 for (
int M : Mask) {
1028 CS << SrcName <<
"[";
1044 X86MCInstLower MCInstLowering(*
MF, *
this);
1052 case X86::Int_MemBarrier:
1058 case X86::EH_RETURN64: {
1068 case X86::TAILJMPr64:
1069 case X86::TAILJMPm64:
1070 case X86::TAILJMPd64:
1071 case X86::TAILJMPr64_REX:
1072 case X86::TAILJMPm64_REX:
1073 case X86::TAILJMPd64_REX:
1078 case X86::TLS_addr32:
1079 case X86::TLS_addr64:
1080 case X86::TLS_base_addr32:
1081 case X86::TLS_base_addr64:
1082 return LowerTlsAddr(MCInstLowering, *MI);
1084 case X86::MOVPC32r: {
1107 case X86::ADD32ri: {
1140 return LowerSTATEPOINT(*MI, MCInstLowering);
1143 return LowerFAULTING_LOAD_OP(*MI, MCInstLowering);
1146 return LowerSTACKMAP(*MI);
1149 return LowerPATCHPOINT(*MI, MCInstLowering);
1151 case X86::MORESTACK_RET:
1155 case X86::MORESTACK_RET_RESTORE_R10:
1163 case X86::SEH_PushReg:
1167 case X86::SEH_SaveReg:
1172 case X86::SEH_SaveXMM:
1177 case X86::SEH_StackAlloc:
1181 case X86::SEH_SetFrame:
1186 case X86::SEH_PushFrame:
1190 case X86::SEH_EndPrologue:
1194 case X86::SEH_Epilogue: {
1200 if (!MBBI->isPseudo()) {
1213 case X86::VPSHUFBrm:
1214 case X86::VPSHUFBYrm: {
1218 "We should always have at least 5 operands!");
1231 case X86::VPERMILPSrm:
1232 case X86::VPERMILPDrm:
1233 case X86::VPERMILPSYrm:
1234 case X86::VPERMILPDYrm: {
1238 "We should always have at least 5 operands!");
1255 case X86::VMOVAPDrm:
1256 case X86::VMOVAPDYrm:
1258 case X86::VMOVUPDrm:
1259 case X86::VMOVUPDYrm:
1261 case X86::VMOVAPSrm:
1262 case X86::VMOVAPSYrm:
1264 case X86::VMOVUPSrm:
1265 case X86::VMOVUPSYrm:
1267 case X86::VMOVDQArm:
1268 case X86::VMOVDQAYrm:
1270 case X86::VMOVDQUrm:
1271 case X86::VMOVDQUYrm:
1276 std::string Comment;
1280 if (
auto *CDS = dyn_cast<ConstantDataSequential>(
C)) {
1282 for (
int i = 0, NumElements = CDS->getNumElements(); i < NumElements; ++i) {
1285 if (CDS->getElementType()->isIntegerTy())
1286 CS << CDS->getElementAsInteger(i);
1287 else if (CDS->getElementType()->isFloatTy())
1288 CS << CDS->getElementAsFloat(i);
1289 else if (CDS->getElementType()->isDoubleTy())
1290 CS << CDS->getElementAsDouble(i);
1296 }
else if (
auto *CV = dyn_cast<ConstantVector>(
C)) {
1298 for (
int i = 0, NumOperands = CV->getNumOperands(); i < NumOperands; ++i) {
1302 if (isa<UndefValue>(COp)) {
1304 }
else if (
auto *CI = dyn_cast<ConstantInt>(COp)) {
1305 CS << CI->getZExtValue();
1306 }
else if (
auto *CF = dyn_cast<ConstantFP>(COp)) {
1308 CF->getValueAPF().toString(Str);
1322 MCInstLowering.Lower(MI, TmpInst);
1339 EmitAndCountInstruction(TmpInst);
MO_SECREL - On a symbol operand this indicates that the immediate is the offset from beginning of sec...
MO_DLLIMPORT - On a symbol operand, this represents that the reference to the symbol is for an import...
StubValueTy & getHiddenGVStubEntry(MCSymbol *Sym)
const MachineFunction * getParent() const
getParent - Return the MachineFunction containing this basic block.
A parsed version of the target data layout string in and methods for querying it. ...
mop_iterator operands_end()
virtual void AddComment(const Twine &T)
Add a textual command.
const GlobalValue * getGlobal() const
static const char * getRegisterName(unsigned RegNo)
AddrSegmentReg - The operand # of the segment in the memory operand.
std::unique_ptr< MCStreamer > OutStreamer
This is the MCStreamer object for the file we are generating.
static const MCSymbolRefExpr * create(const MCSymbol *Symbol, MCContext &Ctx)
MCSymbol * getSymbol(const GlobalValue *GV) const
virtual void EmitWinCFIEndProlog()
MO_TLSLDM - Represents the offset into the global offset table at which.
MachineBasicBlock * getMBB() const
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
MO_TLSLD - On a symbol operand this indicates that the immediate is the offset of the GOT entry with ...
MO_TLVP_PIC_BASE - On a symbol operand this indicates that the immediate is some TLS offset from the ...
MCContext & OutContext
This is the context for the output file that we are streaming.
static MachineModuleInfoMachO & getMachOMMI(AsmPrinter &AP)
static MCOperand createExpr(const MCExpr *Val)
MO_TLSGD - Represents the offset into the global offset table at which.
virtual void EmitBytes(StringRef Data)
Emit the bytes in Data into the output.
A Stackmap instruction captures the location of live variables at its position in the instruction str...
CallInst - This class represents a function call, abstracting a target machine's calling convention...
const MachineFunction * MF
The current machine function.
const char * getPrivateGlobalPrefix() const
StringRef substr(size_t Start, size_t N=npos) const
Return a reference to the substring from [Start, Start + N).
A raw_ostream that writes to an SmallVector or SmallString.
const char * getSymbolName() const
MO_GOTPCREL - On a symbol operand this indicates that the immediate is offset to the GOT entry for th...
MO_DTPOFF - On a symbol operand this indicates that the immediate is the offset of the GOT entry with...
const MCSubtargetInfo & getSubtargetInfo() const
Return information about subtarget.
static void EmitNops(MCStreamer &OS, unsigned NumBytes, bool Is64Bit, const MCSubtargetInfo &STI)
Emit the optimal amount of multi-byte nops on X86.
MO_PLT - On a symbol operand, this represents an ELF PLT reference on a call operand.
iterator_range< mop_iterator > operands()
print alias Alias Set Printer
virtual void EmitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI)
Emit the given Instruction into the current section.
void getNameWithPrefix(SmallVectorImpl< char > &Name, const GlobalValue *GV) const
bool isJTI() const
isJTI - Tests if this is a MO_JumpTableIndex operand.
MO_DARWIN_NONLAZY_PIC_BASE - On a symbol operand "FOO", this indicates that the reference is actually...
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
static MCOperand createReg(unsigned Reg)
This file declares the MachineConstantPool class which is an abstract constant pool to keep track of ...
bool isImm() const
isImm - Tests if this is a MO_Immediate operand.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
bool hasInternalLinkage() const
bool isReg() const
isReg - Tests if this is a MO_Register operand.
Base class for the full range of assembler expressions which are needed for parsing.
Name of external global symbol.
Reg
All possible values of the reg field in the ModR/M byte.
NodeTy * getPrevNode()
Get the previous node, or 0 for the list head.
MCSymbol * GetJTISymbol(unsigned JTID, bool isLinkerPrivate=false) const
Return the symbol for the specified jump table entry.
Represent a reference to a symbol from inside an expression.
Number of individual test Apply this number of consecutive mutations to each input exit after the first new interesting input is found the minimized corpus is saved into the first input directory Number of jobs to run If min(jobs, NumberOfCpuCores()/2)\" is used.") FUZZER_FLAG_INT(reload
virtual bool isVerboseAsm() const
Return true if this streamer supports verbose assembly and if it is enabled.
MCContext & getContext() const
unsigned getNumOperands() const
Access to explicit operands of the instruction.
bool isCPI() const
isCPI - Tests if this is a MO_ConstantPoolIndex operand.
bool isGlobal() const
isGlobal - Tests if this is a MO_GlobalAddress operand.
Context object for machine code objects.
void recordFaultingOp(FaultKind FaultTy, const MCSymbol *HandlerLabel)
Mangler * Mang
Name-mangler for global names.
AddrNumOperands - Total number of operands in a memory reference.
static const MCBinaryExpr * createSub(const MCExpr *LHS, const MCExpr *RHS, MCContext &Ctx)
bool LLVM_ATTRIBUTE_UNUSED_RESULT empty() const
MO_GOT - This flag indicates that a symbol operand represents the address of the GOT entry for the sy...
unsigned getReg() const
Returns the register number.
bool is64Bit() const
Is this x86_64? (disregarding specific ABI / programming model)
MO_GOTTPOFF - On a symbol operand this indicates that the immediate is the offset of the GOT entry wi...
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory)...
virtual void emitRawComment(const Twine &T, bool TabPrefix=true)
Print T and prefix it with the comment string (normally #) and optionally a tab.
This class is a data container for one entry in a MachineConstantPool.
static const MCBinaryExpr * createAdd(const MCExpr *LHS, const MCExpr *RHS, MCContext &Ctx)
MO_DARWIN_NONLAZY - On a symbol operand "FOO", this indicates that the reference is actually to the "...
void recordStatepoint(const MachineInstr &MI)
Generate a stackmap record for a statepoint instruction.
Instances of this class represent a single low-level machine instruction.
MO_DARWIN_HIDDEN_NONLAZY_PIC_BASE - On a symbol operand "FOO", this indicates that the reference is a...
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
bool isMachineConstantPoolEntry() const
isMachineConstantPoolEntry - Return true if the MachineConstantPoolEntry is indeed a target specific ...
const MachineBasicBlock * getParent() const
bool isX86_64ExtendedReg(unsigned RegNo)
isX86_64ExtendedReg - Is the MachineOperand a x86-64 extended (r8 or higher) register? e.g.
MO_DARWIN_STUB - On a symbol operand "FOO", this indicates that the reference is actually to the "FOO...
const Constant * ConstVal
This class is intended to be used as a base class for asm properties and features specific to the tar...
DBG_VALUE - a mapping of the llvm.dbg.value intrinsic.
const MCExpr * getExpr() const
Loading instruction that may page fault, bundled with associated information on how to handle such a ...
Address of a global value.
unsigned getTargetFlags() const
Streaming machine code generation interface.
Patchable call instruction - this instruction represents a call to a constant address, followed by a series of NOPs.
MCSymbol * createTempSymbol(bool CanBeUnnamed=true)
Create and return a new assembler temporary symbol with a unique but unspecified name.
MO_GOT_ABSOLUTE_ADDRESS - On a symbol operand, this represents a relocation of: SYMBOL_LABEL + [...
PointerIntPair - This class implements a pair of a pointer and small integer.
MO_GOTNTPOFF - On a symbol operand this indicates that the immediate is the offset of the GOT entry w...
MO_TLVP - On a symbol operand this indicates that the immediate is some TLS offset.
virtual void EmitWinCFIPushReg(unsigned Register)
This is an important base class in LLVM.
const MachineOperand & getOperand(unsigned i) const
void DecodePSHUFBMask(const Constant *C, SmallVectorImpl< int > &ShuffleMask)
Decode a PSHUFB mask from an IR-level vector constant.
This class is intended to be used as a driving class for all asm writers.
bool isSymbol() const
isSymbol - Tests if this is a MO_ExternalSymbol operand.
static void SimplifyShortMoveForm(X86AsmPrinter &Printer, MCInst &Inst, unsigned Opcode)
Simplify things like MOV32rm to MOV32o32a.
Value * getOperand(unsigned i) const
int64_t getOffset() const
Return the offset from the symbol in this operand.
MO_NTPOFF - On a symbol operand this indicates that the immediate is the negative thread-pointer offs...
MI-level patchpoint operands.
MachineConstantPool * getConstantPool()
getConstantPool - Return the constant pool object for the current function.
static const Constant * getConstantFromPool(const MachineInstr &MI, const MachineOperand &Op)
MCSymbol * getSymbol() const
getSymbol - Return the MCSymbol for this basic block.
StubValueTy & getGVStubEntry(MCSymbol *Sym)
std::string & str()
Flushes the stream contents to the target string and returns the string's reference.
void recordPatchPoint(const MachineInstr &MI)
Generate a stackmap record for a patchpoint instruction.
MO_TPOFF - On a symbol operand this indicates that the immediate is the thread-pointer offset for the...
PointerTy getPointer() const
void setOpcode(unsigned Op)
MCSymbol * getPICBaseSymbol() const
getPICBaseSymbol - Return a function-local symbol to represent the PIC base.
virtual void EmitLabel(MCSymbol *Symbol)
Emit a label for Symbol into the current section.
virtual void EmitWinCFISaveXMM(unsigned Register, unsigned Offset)
static MCOperand LowerSymbolOperand(const MachineInstr *MI, const MachineOperand &MO, AsmPrinter &AP)
MachineOperand class - Representation of each machine instruction operand.
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small...
int getSEHRegNum(unsigned i) const
const X86Subtarget & getSubtarget() const
bool isMBB() const
isMBB - Tests if this is a MO_MachineBasicBlock operand.
virtual void EmitWinCFIAllocStack(unsigned Size)
unsigned getOpcode() const
StubValueTy & getFnStubEntry(MCSymbol *Sym)
void recordStackMap(const MachineInstr &MI)
Generate a stackmap record for a stackmap instruction.
LLVM_ATTRIBUTE_UNUSED_RESULT std::enable_if< !is_simple_type< Y >::value, typename cast_retty< X, const Y >::ret_type >::type dyn_cast(const Y &Val)
Representation of each machine instruction.
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.
bundle_iterator< const MachineInstr, const_instr_iterator > const_iterator
MO_GOTOFF - On a symbol operand this indicates that the immediate is the offset to the location of th...
static std::string getShuffleComment(const MachineOperand &DstOp, const MachineOperand &SrcOp, ArrayRef< int > Mask)
static unsigned getRetOpcode(const X86Subtarget &Subtarget)
MCSymbol * getOrCreateSymbol(const Twine &Name)
Lookup the symbol inside with the specified Name.
void DecodeVPERMILPMask(const Constant *C, SmallVectorImpl< int > &ShuffleMask)
Decode a VPERMILP variable mask from an IR-level vector constant.
Call instruction with associated vm state for deoptimization and list of live pointers for relocation...
unsigned getNumOperands() const
MCSymbol * GetBlockAddressSymbol(const BlockAddress *BA) const
Return the MCSymbol used to satisfy BlockAddress uses of the specified basic block.
bool isCall(QueryType Type=AnyInBundle) const
MCSymbol * getMCSymbol() const
MCSubtargetInfo - Generic base class for all target subtargets.
MI-level Statepoint operands.
union llvm::MachineConstantPoolEntry::@30 Val
The constant itself.
void EmitInstruction(const MachineInstr *MI) override
Targets should implement this to emit instructions.
MachineModuleInfoMachO - This is a MachineModuleInfoImpl implementation for MachO targets...
OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents 'eh_return' gcc dwarf builtin...
virtual MCSymbol * GetCPISymbol(unsigned CPID) const
Return the symbol for the specified constant pool entry.
unsigned getReg() const
getReg - Returns the register number.
A raw_ostream that writes to an std::string.
mop_iterator operands_begin()
Primary interface to the complete machine description for the target machine.
MO_PIC_BASE_OFFSET - On a symbol operand this indicates that the immediate should get the value of th...
static MachineBasicBlock::const_iterator PrevCrossBBInst(MachineBasicBlock::const_iterator MBBI)
virtual void EmitWinCFISaveReg(unsigned Register, unsigned Offset)
virtual void EmitWinCFIPushFrame(bool Code)
const std::vector< MachineConstantPoolEntry > & getConstants() const
void addOperand(const MCOperand &Op)
StringRef - Represent a constant reference to a string, i.e.
const BlockAddress * getBlockAddress() const
static MCSymbol * GetSymbolFromOperand(const MachineOperand &MO, AsmPrinter &AP)
Instances of this class represent operands of the MCInst class.
static MCOperand createImm(int64_t Val)
static void SimplifyShortImmForm(MCInst &Inst, unsigned Opcode)
Simplify FOO $imm, %{al,ax,eax,rax} to FOO $imm, for instruction with a short fixed-register form...
const MCOperand & getOperand(unsigned i) const
static void SimplifyMOVSX(MCInst &Inst)
If a movsx instruction has a shorter encoding for the used register simplify the instruction to use i...
virtual void EmitWinCFISetFrame(unsigned Register, unsigned Offset)
bool empty() const
empty - Check if the string is empty.