39 #define DEBUG_TYPE "codegen"
42 : BB(bb), Number(-1), xParent(&mf), Alignment(0), IsLandingPad(
false),
43 AddressTaken(
false), CachedMCSymbol(nullptr) {
47 MachineBasicBlock::~MachineBasicBlock() {
53 if (!CachedMCSymbol) {
62 return CachedMCSymbol;
86 I->AddRegOperandsToUseLists(RegInfo);
99 assert(!N->
getParent() &&
"machine instruction already in a basic block");
100 N->setParent(Parent);
105 N->AddRegOperandsToUseLists(MF->
getRegInfo());
112 assert(N->
getParent() &&
"machine instruction not in a basic block");
116 N->RemoveRegOperandsFromUseLists(MF->
getRegInfo());
118 N->setParent(
nullptr);
128 assert(Parent->getParent() == fromList.Parent->
getParent() &&
129 "MachineInstr parent mismatch!");
132 if (Parent == fromList.Parent)
return;
136 for (; first != last; ++first)
137 first->setParent(Parent);
141 assert(!MI->
getParent() &&
"MI is still in a block!");
142 Parent->getParent()->DeleteMachineInstr(MI);
147 while (I != E && I->isPHI())
149 assert((I == E || !I->isInsideBundle()) &&
150 "First non-phi MI cannot be inside a bundle!");
157 while (I != E && (I->isPHI() || I->isPosition() || I->isDebugValue()))
161 assert((I == E || !I->isInsideBundle()) &&
162 "First non-phi / non-label instruction is inside a bundle!");
168 while (
I != B && ((--
I)->isTerminator() ||
I->isDebugValue()))
170 while (
I != E && !
I->isTerminator())
177 while (
I != B && ((--
I)->isTerminator() ||
I->isDebugValue()))
179 while (
I != E && !
I->isTerminator())
187 while (I != E && I->isDebugValue())
198 if (
I->isDebugValue() ||
I->isInsideBundle())
211 if ((*I)->isLandingPad())
216 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
224 return LBB->getName();
244 OS <<
"Can't print out MachineBasicBlock because parent MachineFunction"
251 print(OS, MST, Indexes);
258 OS <<
"Can't print out MachineBasicBlock because parent MachineFunction"
268 const char *Comma =
"";
270 OS << Comma <<
"derived from LLVM BB ";
271 LBB->printAsOperand(OS,
false, MST);
274 if (
isLandingPad()) { OS << Comma <<
"EH LANDING PAD"; Comma =
", "; }
275 if (
hasAddressTaken()) { OS << Comma <<
"ADDRESS TAKEN"; Comma =
", "; }
277 OS << Comma <<
"Align " << Alignment <<
" (" << (1u << Alignment)
284 if (Indexes) OS <<
'\t';
292 if (Indexes) OS <<
'\t';
293 OS <<
" Predecessors according to CFG:";
295 OS <<
" BB#" << (*PI)->getNumber();
306 if (
I->isInsideBundle())
313 if (Indexes) OS <<
'\t';
314 OS <<
" Successors according to CFG:";
316 OS <<
" BB#" << (*SI)->getNumber();
317 if (!Weights.empty())
318 OS <<
'(' << *getWeightIterator(
SI) <<
')';
329 std::vector<unsigned>::iterator
I =
330 std::find(LiveIns.begin(), LiveIns.end(),
Reg);
331 if (I != LiveIns.end())
342 assert(
getParent() &&
"MBB must be inserted in function");
344 assert(RC &&
"Register class is required");
346 "Only the entry block and landing pads can have physreg live ins");
355 for (;I != E && I->isCopy(); ++
I)
356 if (I->getOperand(1).getReg() == PhysReg) {
357 unsigned VirtReg = I->getOperand(0).getReg();
391 assert(!B &&
"UpdateTerminators requires analyzable predecessors!");
403 if ((*SI)->isLandingPad())
405 assert(!TBB &&
"Found more than one non-landing-pad successor!");
439 if ((*SI)->isLandingPad() || *
SI == TBB)
441 assert(!FallthroughBB &&
"Found more than one fallthrough successor.");
464 TII->
InsertBranch(*
this, FallthroughBB,
nullptr, Cond, dl);
468 TII->
InsertBranch(*
this, FallthroughBB,
nullptr, Cond, dl);
481 if (weight != 0 && Weights.empty())
482 Weights.resize(Successors.size());
484 if (weight != 0 || !Weights.empty())
485 Weights.push_back(weight);
487 Successors.push_back(succ);
488 succ->addPredecessor(
this);
492 succ->removePredecessor(
this);
493 succ_iterator I = std::find(Successors.begin(), Successors.end(), succ);
494 assert(I != Successors.end() &&
"Not a current successor!");
497 if (!Weights.empty()) {
498 weight_iterator WI = getWeightIterator(I);
507 assert(I != Successors.end() &&
"Not a current successor!");
510 if (!Weights.empty()) {
511 weight_iterator WI = getWeightIterator(I);
515 (*I)->removePredecessor(
this);
516 return Successors.erase(I);
539 assert(OldI != E &&
"Old is not a successor of this block");
540 Old->removePredecessor(
this);
544 New->addPredecessor(
this);
551 if (!Weights.empty()) {
552 weight_iterator OldWI = getWeightIterator(OldI);
553 *getWeightIterator(NewI) += *OldWI;
554 Weights.erase(OldWI);
556 Successors.erase(OldI);
560 Predecessors.push_back(pred);
565 assert(I != Predecessors.end() &&
"Pred is not a predecessor of this block!");
566 Predecessors.erase(I);
578 if (!fromMBB->Weights.empty())
579 Weight = *fromMBB->Weights.begin();
594 if (!fromMBB->Weights.empty())
595 Weight = *fromMBB->Weights.begin();
602 for (
unsigned i = 2, e = MI->
getNumOperands()+1; i != e; i += 2) {
604 if (MO.
getMBB() == fromMBB)
648 if (!TBB)
return true;
658 if (Cond.
empty())
return false;
662 return FBB ==
nullptr;
692 if (TBB && TBB == FBB) {
693 DEBUG(
dbgs() <<
"Won't split critical edge after degenerate BB#"
700 DEBUG(
dbgs() <<
"Splitting critical edge:"
703 <<
" -- BB#" << Succ->
getNumber() <<
'\n');
710 Indexes->insertMBBInMaps(NMBB);
725 if (!OI->isReg() || OI->getReg() == 0 ||
726 !OI->isUse() || !OI->isKill() || OI->isUndef())
728 unsigned Reg = OI->getReg();
731 KilledRegs.push_back(Reg);
732 DEBUG(
dbgs() <<
"Removing terminator kill: " << *MI);
733 OI->setIsKill(
false);
746 if (!OI->isReg() || OI->getReg() == 0)
749 unsigned Reg = OI->getReg();
750 if (std::find(UsedRegs.
begin(), UsedRegs.
end(),
Reg) == UsedRegs.
end())
776 E = Terminators.
end(); I != E; ++
I) {
777 if (std::find(NewTerminators.
begin(), NewTerminators.
end(), *
I) ==
778 NewTerminators.
end())
779 Indexes->removeMachineInstrFromMaps(*I);
795 if (Indexes->hasIndex(I))
796 Indexes->removeMachineInstrFromMaps(I);
797 Indexes->insertMachineInstrInMaps(I);
805 i != e && i->isPHI(); ++i)
806 for (
unsigned ni = 1, ne = i->getNumOperands(); ni != ne; ni += 2)
807 if (i->getOperand(ni+1).getMBB() ==
this)
808 i->getOperand(ni+1).setMBB(NMBB);
819 while (!KilledRegs.empty()) {
820 unsigned Reg = KilledRegs.pop_back_val();
822 if (!(--I)->addRegisterKilled(Reg, TRI,
false))
826 DEBUG(
dbgs() <<
"Restored terminator kill: " << *I);
845 SlotIndex StartIndex = Indexes->getMBBEndIdx(
this);
847 SlotIndex EndIndex = Indexes->getMBBEndIdx(NMBB);
853 I != E && I->isPHI(); ++
I) {
854 for (
unsigned ni = 1, ne = I->getNumOperands(); ni != ne; ni += 2) {
855 if (I->getOperand(ni+1).getMBB() == NMBB) {
864 assert(VNI &&
"PHI sources should be live out of their predecessors.");
873 if (PHISrcRegs.
count(Reg) || !LIS->hasInterval(Reg))
877 if (!LI.
liveAt(PrevIndex))
880 bool isLiveOut = LI.
liveAt(LIS->getMBBStartIdx(Succ));
881 if (isLiveOut && isLastMBB) {
883 assert(VNI &&
"LiveInterval should have VNInfo where it is live.");
885 }
else if (!isLiveOut && !isLastMBB) {
897 MDT->recordSplitCriticalEdge(
this, Succ, NMBB);
903 if (
MachineLoop *DestLoop = MLI->getLoopFor(Succ)) {
904 if (TIL == DestLoop) {
906 DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase());
907 }
else if (TIL->contains(DestLoop)) {
909 TIL->addBasicBlockToLoop(NMBB, MLI->getBase());
910 }
else if (DestLoop->contains(TIL)) {
912 DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase());
918 assert(DestLoop->getHeader() == Succ &&
919 "Should not create irreducible loops!");
921 P->addBasicBlockToLoop(NMBB, MLI->getBase());
945 return Insts.
erase(I);
958 "Cannot insert instruction with bundle flags");
960 if (I !=
instr_end() && I->isBundledWithPred()) {
964 return Insts.
insert(I, MI);
970 assert(
getParent() &&
"Not embedded in a function!");
979 assert(
getParent() &&
"Not embedded in a function!");
988 assert(Old != New &&
"Cannot replace self with self!");
993 if (!I->isTerminator())
break;
997 for (
unsigned i = 0, e = I->getNumOperands(); i != e; ++i)
998 if (I->getOperand(i).isMBB() &&
999 I->getOperand(i).getMBB() == Old)
1000 I->getOperand(i).setMBB(New);
1032 bool Changed =
false;
1037 if (!DestA && !DestB) {
1041 }
else if (DestA && !DestB) {
1046 assert(DestA && DestB && isCond &&
1047 "CFG in a bad state. Cannot correct CFG edges");
1056 if (!SeenMBBs.
insert(MBB).second ||
1057 (MBB != DestA && MBB != DestB && !MBB->
isLandingPad())) {
1079 while (MBBI != E && MBBI->isDebugValue())
1082 DL = MBBI->getDebugLoc();
1088 uint32_t MachineBasicBlock::getSuccWeight(const_succ_iterator Succ)
const {
1089 if (Weights.empty())
1092 return *getWeightIterator(Succ);
1097 if (Weights.empty())
1099 *getWeightIterator(I) = weight;
1104 MachineBasicBlock::weight_iterator MachineBasicBlock::
1106 assert(Weights.size() == Successors.size() &&
"Async weight list!");
1107 size_t index = std::distance(Successors.begin(),
I);
1108 assert(index < Weights.size() &&
"Not a current successor!");
1109 return Weights.begin() + index;
1114 MachineBasicBlock::const_weight_iterator MachineBasicBlock::
1116 assert(Weights.size() == Successors.size() &&
"Async weight list!");
1117 const size_t index = std::distance(Successors.begin(),
I);
1118 assert(index < Weights.size() &&
"Not a current successor!");
1119 return Weights.begin() + index;
1131 unsigned Neighborhood)
const {
1132 unsigned N = Neighborhood;
1157 }
while (I !=
begin() && --N > 0);
1178 for (++I; I !=
end() && N > 0; ++
I, --
N) {
1184 return (Analysis.
Reads) ?
Pass interface - Implemented by all 'passes'.
unsigned succ_size() const
void push_back(const T &Elt)
const MachineFunction * getParent() const
getParent - Return the MachineFunction containing this basic block.
mop_iterator operands_end()
const MCAsmInfo * getAsmInfo() const
instr_iterator instr_begin()
void transferNodesFromList(ilist_node_traits &, ilist_iterator< NodeTy >, ilist_iterator< NodeTy >)
void removeNodeFromList(NodeTy *)
instr_iterator instr_end()
bool removeKill(MachineInstr *MI)
removeKill - Delete a kill corresponding to the specified machine instruction.
MachineBasicBlock * getMBB() const
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
static unsigned index2VirtReg(unsigned Index)
index2VirtReg - Convert a 0-based index to a virtual register number.
A Module instance is used to store all the information related to an LLVM module. ...
int getNumber() const
getNumber - MachineBasicBlocks are uniquely numbered at the function level, unless they're not in a M...
unsigned createVirtualRegister(const TargetRegisterClass *RegClass)
createVirtualRegister - Create and return a new virtual register in the function with the specified r...
instr_iterator getFirstInstrTerminator()
getFirstInstrTerminator - Same getFirstTerminator but it ignores bundles and return an instr_iterator...
iterator getFirstNonDebugInstr()
getFirstNonDebugInstr - returns an iterator to the first non-debug instruction in the basic block...
std::vector< unsigned >::const_iterator livein_iterator
LiveInterval - This class represents the liveness of a register, or stack slot.
iterator getFirstTerminator()
getFirstTerminator - returns an iterator to the first terminator instruction of this basic block...
static bool isVirtualRegister(unsigned Reg)
isVirtualRegister - Return true if the specified register number is in the virtual register namespace...
void removeLiveIn(unsigned Reg)
removeLiveIn - Remove the specified register from the live in set.
virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify=false) const
Analyze the branching code at the end of MBB, returning true if it cannot be understood (e...
void addLiveIn(unsigned Reg)
Adds the specified register as a live in.
This represents a simple continuous liveness interval for a value.
void moveAfter(MachineBasicBlock *NewBefore)
void transferSuccessorsAndUpdatePHIs(MachineBasicBlock *fromMBB)
transferSuccessorsAndUpdatePHIs - Transfers all the successors, as in transferSuccessors, and update PHI operands in the successor blocks which refer to fromMBB to refer to this.
const Function * getFunction() const
getFunction - Return the LLVM function that this machine code represents
Manage lifetime of a slot tracker for printing IR.
virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const
Remove the branching code at the end of the specific MBB.
unsigned getFunctionNumber() const
getFunctionNumber - Return a unique ID for the current function.
VNInfo - Value Number Information.
Instructions::iterator instr_iterator
MachineBasicBlock * removeFromParent()
removeFromParent - This method unlinks 'this' from the containing function, and returns it...
VNInfo * getVNInfoAt(SlotIndex Idx) const
getVNInfoAt - Return the VNInfo that is live at Idx, or NULL.
bool Clobbers
Clobbers - Reg or an overlapping register is defined, or a regmask clobbers Reg.
StringRef getName() const
Return a constant reference to the value's name.
bool DefinesDead
DefinesDead - All defs of a Reg or a super-register are dead.
COPY - Target-independent register copy.
livein_iterator livein_begin() const
unsigned getNumVirtRegs() const
getNumVirtRegs - Return the number of virtual registers created.
void ReplaceUsesOfBlockWith(MachineBasicBlock *Old, MachineBasicBlock *New)
ReplaceUsesOfBlockWith - Given a machine basic block that branched to 'Old', change the code and CFG ...
void eraseFromParent()
eraseFromParent - This method unlinks 'this' from the containing function and deletes it...
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
const HexagonInstrInfo * TII
AnalysisType * getAnalysisIfAvailable() const
getAnalysisIfAvailable<AnalysisType>() - Subclasses use this function to get analysis information tha...
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
std::vector< MachineBasicBlock * >::iterator succ_iterator
Reg
All possible values of the reg field in the ModR/M byte.
MachineBasicBlock * SplitCriticalEdge(MachineBasicBlock *Succ, Pass *P)
SplitCriticalEdge - Split the critical edge from this block to the given successor block...
static void unbundleSingleMI(MachineInstr *MI)
Prepare MI to be removed from its bundle.
MachineInstr * remove_instr(MachineInstr *I)
Remove the possibly bundled instruction from the instruction list without deleting it...
PhysRegInfo analyzePhysReg(unsigned Reg, const TargetRegisterInfo *TRI)
analyzePhysReg - Analyze how the current instruction or bundle uses a physical register.
unsigned getNumOperands() const
Access to explicit operands of the instruction.
Context object for machine code objects.
bool isBundledWithSucc() const
Return true if this instruction is part of a bundle, and it is not the last instruction in the bundle...
void unbundleFromPred()
Break bundle above this instruction.
PrintReg - Helper class for printing registers on a raw_ostream.
void transferSuccessors(MachineBasicBlock *fromMBB)
transferSuccessors - Transfers all the successors from MBB to this machine basic block (i...
bool LLVM_ATTRIBUTE_UNUSED_RESULT empty() const
iterator addSegment(Segment S)
Add the specified Segment to this range, merging segments as appropriate.
bool canFallThrough()
canFallThrough - Return true if the block can implicitly transfer control to the block after it by fa...
bool livein_empty() const
iterator getLastNonDebugInstr()
getLastNonDebugInstr - returns an iterator to the last non-debug instruction in the basic block...
virtual bool ReverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const
Reverses the branch condition of the specified condition list, returning false on success and true if...
void printAsOperand(raw_ostream &OS, bool PrintType=true) const
MCContext & getContext() const
instr_iterator insert(instr_iterator I, MachineInstr *M)
Insert MI into the instruction list before I, possibly inside a bundle.
LivenessQueryResult computeRegisterLiveness(const TargetRegisterInfo *TRI, unsigned Reg, const_iterator Before, unsigned Neighborhood=10) const
Return whether (physical) register Reg has been <def>ined and not <kill>ed as of just before Before...
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *bb=nullptr)
CreateMachineBasicBlock - Allocate a new MachineBasicBlock.
const TargetRegisterClass * constrainRegClass(unsigned Reg, const TargetRegisterClass *RC, unsigned MinNumRegs=0)
constrainRegClass - Constrain the register class of the specified virtual register to be a common sub...
const BasicBlock * getBasicBlock() const
getBasicBlock - Return the LLVM basic block that this instance corresponded to originally.
SlotIndex getPrevSlot() const
Returns the previous slot in the index list.
const MachineBasicBlock * getParent() const
TargetInstrInfo - Interface to description of machine instruction set.
static void deleteNode(NodeTy *V)
bundle_iterator< MachineInstr, instr_iterator > iterator
bool Kills
There is a kill of Reg or a super-register.
iterator SkipPHIsAndLabels(iterator I)
SkipPHIsAndLabels - Return the first instruction in MBB after I that is not a PHI or a label...
void insertMBBInMaps(MachineBasicBlock *mbb)
Add the given MachineBasicBlock into the maps.
LLVM Basic Block Representation.
bool ReadsOverlap
ReadsOverlap - Reg or an overlapping register is read.
livein_iterator livein_end() const
DebugLoc findDebugLoc(instr_iterator MBBI)
findDebugLoc - find the next valid DebugLoc starting at MBBI, skipping any DBG_VALUE instructions...
SmallSet - This maintains a set of unique values, optimizing for the case when the set is small (less...
const MachineOperand & getOperand(unsigned i) const
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
void setMBB(MachineBasicBlock *MBB)
iterator insert(iterator where, const NodeTy &val)
Register is known to be dead.
void setFlag(MIFlag Flag)
Set a MI flag.
MCRegAliasIterator enumerates all registers aliasing Reg.
void clearFlag(MIFlag Flag)
clearFlag - Clear a MI flag.
const MachineBasicBlock * getLandingPadSuccessor() const
getLandingPadSuccessor - If this block has a successor that is a landing pad, return it...
void remove(iterator MBBI)
bool isBundledWithPred() const
Return true if this instruction is part of a bundle, and it is not the first instruction in the bundl...
std::pair< NoneType, bool > insert(const T &V)
insert - Insert an element into the set if it isn't already there.
LivenessQueryResult
Possible outcome of a register liveness query to computeRegisterLiveness()
MachineInstrBuilder BuildMI(MachineFunction &MF, DebugLoc DL, const MCInstrDesc &MCID)
BuildMI - Builder interface.
Register is known to be live.
succ_iterator succ_begin()
void removeSuccessor(MachineBasicBlock *succ)
removeSuccessor - Remove successor from the successors list of this MachineBasicBlock.
void moveBefore(MachineBasicBlock *NewAfter)
moveBefore/moveAfter - move 'this' block before or after the specified block.
VarInfo & getVarInfo(unsigned RegIdx)
getVarInfo - Return the VarInfo structure for the specified VIRTUAL register.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
pred_iterator pred_begin()
bool liveAt(SlotIndex index) const
MCSymbol * getSymbol() const
getSymbol - Return the MCSymbol for this basic block.
SlotIndex getInstructionIndex(const MachineInstr *MI) const
Returns the base index for the given instruction.
iterator erase(iterator where)
const MCInstrDesc & get(unsigned Opcode) const
Return the machine instruction descriptor that corresponds to the specified instruction opcode...
std::vector< MachineBasicBlock * >::const_iterator const_pred_iterator
const char * getPrivateLabelPrefix() const
size_type count(const T &V) const
count - Return 1 if the element is in the set, 0 otherwise.
void addNewBlock(MachineBasicBlock *BB, MachineBasicBlock *DomBB, MachineBasicBlock *SuccBB)
addNewBlock - Add a new basic block BB between DomBB and SuccBB.
std::string getFullName() const
getFullName - Return a formatted string to identify this block and its parent function.
std::vector< MachineInstr * > Kills
Kills - List of MachineInstruction's which are the last use of this virtual register (kill it) in the...
void removeSegment(SlotIndex Start, SlotIndex End, bool RemoveDeadValNo=false)
Remove the specified segment from this range.
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements...
BasicBlockListType::const_iterator const_iterator
void splice(iterator InsertPt, iterator MBBI)
MachineOperand class - Representation of each machine instruction operand.
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small...
bool hasIndex(const MachineInstr *instr) const
Returns true if the given machine instr is mapped to an index, otherwise returns false.
void updateTerminator()
updateTerminator - Update the terminator instructions in block to account for changes to the layout...
bool isSuccessor(const MachineBasicBlock *MBB) const
isSuccessor - Return true if the specified MBB is a successor of this block.
bool Reads
Reads - Read or a super-register is read.
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
StringRef getName() const
getName - Return the name of the corresponding LLVM basic block, or "(null)".
ConstMIOperands - Iterate over operands of a single const instruction.
void replaceSuccessor(MachineBasicBlock *Old, MachineBasicBlock *New)
replaceSuccessor - Replace successor OLD with NEW and update weight info.
Register itself is not live, but some overlapping register is.
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
Representation of each machine instruction.
bundle_iterator< const MachineInstr, const_instr_iterator > const_iterator
static bool isPhysicalRegister(unsigned Reg)
isPhysicalRegister - Return true if the specified register number is in the physical register namespa...
bool hasAddressTaken() const
hasAddressTaken - Test whether this block is potentially the target of an indirect branch...
bool isLandingPad() const
isLandingPad - Returns true if the block is a landing pad.
block Block Frequency Analysis
void addNodeToList(NodeTy *)
bool isLiveIn(unsigned Reg) const
isLiveIn - Return true if the specified register is in the live in set.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
MCSymbol * getOrCreateSymbol(const Twine &Name)
Lookup the symbol inside with the specified Name.
Register liveness not decidable from local neighborhood.
bool Defines
Defines - Reg or a super-register is defined.
const TargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, DebugLoc DL) const
Insert branch code into the end of the specified MachineBasicBlock.
iterator getFirstNonPHI()
Returns a pointer to the first instruction in this block that is not a PHINode instruction.
void setSuccWeight(succ_iterator I, uint32_t weight)
Set successor weight of a given iterator.
PhysRegInfo - Information about a physical register used by a set of operands.
void removeFromMBBNumbering(unsigned N)
removeFromMBBNumbering - Remove the specific machine basic block from our tracker, this is only really to be used by the MachineBasicBlock implementation.
SlotIndex getMBBStartIdx(unsigned Num) const
Returns the first index in the given basic block number.
raw_ostream & operator<<(raw_ostream &OS, const APInt &I)
unsigned getReg() const
getReg - Returns the register number.
void erase(iterator MBBI)
void insert(iterator MBBI, MachineBasicBlock *MBB)
void unbundleFromSucc()
Break bundle below this instruction.
std::vector< MachineBasicBlock * >::const_iterator const_succ_iterator
virtual const TargetInstrInfo * getInstrInfo() const
unsigned addToMBBNumbering(MachineBasicBlock *MBB)
Adds the MBB to the internal numbering.
Module * getParent()
Get the module that this global value is contained inside of...
mop_iterator operands_begin()
BasicBlockListType::iterator iterator
This class implements an extremely fast bulk output stream that can only output to a stream...
virtual bool isPredicated(const MachineInstr *MI) const
Returns true if the instruction is already predicated.
bool isPredecessor(const MachineBasicBlock *MBB) const
isPredecessor - Return true if the specified MBB is a predecessor of this block.
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
StringRef - Represent a constant reference to a string, i.e.
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
void print(raw_ostream &OS, SlotIndexes *=nullptr) const
bool isLayoutSuccessor(const MachineBasicBlock *MBB) const
isLayoutSuccessor - Return true if the specified MBB will be emitted immediately after this block...
SlotIndex - An opaque wrapper around machine indexes.
bool requiresStructuredCFG() const
NodeTy * remove(iterator &IT)
void addSuccessor(MachineBasicBlock *succ, uint32_t weight=0)
addSuccessor - Add succ as a successor of this MachineBasicBlock.
DominatorTree Class - Concrete subclass of DominatorTreeBase that is used to compute a normal dominat...
bool CorrectExtraCFGEdges(MachineBasicBlock *DestA, MachineBasicBlock *DestB, bool isCond)
CorrectExtraCFGEdges - Various pieces of code can cause excess edges in the CFG to be inserted...
bool isBarrier(QueryType Type=AnyInBundle) const
Returns true if the specified instruction stops control flow from executing the instruction immediate...