LLVM  3.7.0
AArch64RegisterInfo.h
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1 //==- AArch64RegisterInfo.h - AArch64 Register Information Impl --*- C++ -*-==//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains the AArch64 implementation of the MRegisterInfo class.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64REGISTERINFO_H
15 #define LLVM_LIB_TARGET_AARCH64_AARCH64REGISTERINFO_H
16 
17 #define GET_REGINFO_HEADER
18 #include "AArch64GenRegisterInfo.inc"
19 
20 namespace llvm {
21 
22 class MachineFunction;
23 class RegScavenger;
24 class TargetRegisterClass;
25 class Triple;
26 
28 private:
29  const Triple &TT;
30 
31 public:
32  AArch64RegisterInfo(const Triple &TT);
33 
34  bool isReservedReg(const MachineFunction &MF, unsigned Reg) const;
35 
36  /// Code Generation virtual methods...
37  const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
38  const uint32_t *getCallPreservedMask(const MachineFunction &MF,
39  CallingConv::ID) const override;
40 
41  unsigned getCSRFirstUseCost() const override {
42  // The cost will be compared against BlockFrequency where entry has the
43  // value of 1 << 14. A value of 5 will choose to spill or split really
44  // cold path instead of using a callee-saved register.
45  return 5;
46  }
47 
48  // Calls involved in thread-local variable lookup save more registers than
49  // normal calls, so they need a different mask to represent this.
50  const uint32_t *getTLSCallPreservedMask() const;
51 
52  /// getThisReturnPreservedMask - Returns a call preserved mask specific to the
53  /// case that 'returned' is on an i64 first argument if the calling convention
54  /// is one that can (partially) model this attribute with a preserved mask
55  /// (i.e. it is a calling convention that uses the same register for the first
56  /// i64 argument and an i64 return value)
57  ///
58  /// Should return NULL in the case that the calling convention does not have
59  /// this property
60  const uint32_t *getThisReturnPreservedMask(const MachineFunction &MF,
61  CallingConv::ID) const;
62 
63  BitVector getReservedRegs(const MachineFunction &MF) const override;
64  const TargetRegisterClass *
66  unsigned Kind = 0) const override;
67  const TargetRegisterClass *
68  getCrossCopyRegClass(const TargetRegisterClass *RC) const override;
69 
70  bool requiresRegisterScavenging(const MachineFunction &MF) const override;
71  bool useFPForScavengingIndex(const MachineFunction &MF) const override;
72  bool requiresFrameIndexScavenging(const MachineFunction &MF) const override;
73 
74  bool needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const override;
75  bool isFrameOffsetLegal(const MachineInstr *MI, unsigned BaseReg,
76  int64_t Offset) const override;
77  void materializeFrameBaseRegister(MachineBasicBlock *MBB, unsigned BaseReg,
78  int FrameIdx,
79  int64_t Offset) const override;
80  void resolveFrameIndex(MachineInstr &MI, unsigned BaseReg,
81  int64_t Offset) const override;
83  unsigned FIOperandNum,
84  RegScavenger *RS = nullptr) const override;
85  bool cannotEliminateFrame(const MachineFunction &MF) const;
86 
87  bool requiresVirtualBaseRegisters(const MachineFunction &MF) const override;
88  bool hasBasePointer(const MachineFunction &MF) const;
89  unsigned getBaseRegister() const;
90 
91  // Debug information queries.
92  unsigned getFrameRegister(const MachineFunction &MF) const override;
93 
94  unsigned getRegPressureLimit(const TargetRegisterClass *RC,
95  MachineFunction &MF) const override;
96  // Base pointer (stack realignment) support.
97  bool canRealignStack(const MachineFunction &MF) const;
98  bool needsStackRealignment(const MachineFunction &MF) const override;
99 };
100 
101 } // end namespace llvm
102 
103 #endif
const MCPhysReg * getCalleeSavedRegs(const MachineFunction *MF) const override
Code Generation virtual methods...
bool isReservedReg(const MachineFunction &MF, unsigned Reg) const
bool isFrameOffsetLegal(const MachineInstr *MI, unsigned BaseReg, int64_t Offset) const override
bool requiresFrameIndexScavenging(const MachineFunction &MF) const override
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
bool needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const override
needsFrameBaseReg - Returns true if the instruction's frame index reference would be better served by...
const uint32_t * getCallPreservedMask(const MachineFunction &MF, CallingConv::ID) const override
const uint32_t * getThisReturnPreservedMask(const MachineFunction &MF, CallingConv::ID) const
getThisReturnPreservedMask - Returns a call preserved mask specific to the case that 'returned' is on...
bool canRealignStack(const MachineFunction &MF) const
Reg
All possible values of the reg field in the ModR/M byte.
bool cannotEliminateFrame(const MachineFunction &MF) const
const TargetRegisterClass * getCrossCopyRegClass(const TargetRegisterClass *RC) const override
bool hasBasePointer(const MachineFunction &MF) const
BitVector getReservedRegs(const MachineFunction &MF) const override
unsigned getCSRFirstUseCost() const override
void resolveFrameIndex(MachineInstr &MI, unsigned BaseReg, int64_t Offset) const override
bundle_iterator - MachineBasicBlock iterator that automatically skips over MIs that are inside bundle...
bool needsStackRealignment(const MachineFunction &MF) const override
unsigned getFrameRegister(const MachineFunction &MF) const override
const TargetRegisterClass * getPointerRegClass(const MachineFunction &MF, unsigned Kind=0) const override
const uint32_t * getTLSCallPreservedMask() const
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
bool requiresRegisterScavenging(const MachineFunction &MF) const override
bool requiresVirtualBaseRegisters(const MachineFunction &MF) const override
void materializeFrameBaseRegister(MachineBasicBlock *MBB, unsigned BaseReg, int FrameIdx, int64_t Offset) const override
Insert defining instruction(s) for BaseReg to be a pointer to FrameIdx at the beginning of the basic ...
Representation of each machine instruction.
Definition: MachineInstr.h:51
AArch64RegisterInfo(const Triple &TT)
const ARM::ArchExtKind Kind
void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override
bool useFPForScavengingIndex(const MachineFunction &MF) const override
unsigned getRegPressureLimit(const TargetRegisterClass *RC, MachineFunction &MF) const override