| addBypassSlowDiv(unsigned int SlowBitWidth, unsigned int FastBitWidth) | llvm::TargetLoweringBase | inlineprotected |
| AddPromotedToType(unsigned Opc, MVT OrigVT, MVT DestVT) | llvm::TargetLoweringBase | inlineprotected |
| addRegisterClass(MVT VT, const TargetRegisterClass *RC) | llvm::TargetLoweringBase | inlineprotected |
| allowsMisalignedMemoryAccesses(EVT, unsigned AddrSpace=0, unsigned Align=1, bool *=nullptr) const | llvm::TargetLoweringBase | inlinevirtual |
| allowTruncateForTailCall(Type *, Type *) const | llvm::TargetLoweringBase | inlinevirtual |
| AtomicRMWExpansionKind enum name | llvm::TargetLoweringBase | |
| BooleanContent enum name | llvm::TargetLoweringBase | |
| canCombineStoreAndExtract(Type *VectorTy, Value *Idx, unsigned &Cost) const | llvm::TargetLoweringBase | inlinevirtual |
| canOpTrap(unsigned Op, EVT VT) const | llvm::TargetLoweringBase | virtual |
| clearOperationActions() | llvm::TargetLoweringBase | inlineprotected |
| clearRegisterClasses() | llvm::TargetLoweringBase | inlineprotected |
| computeRegisterProperties(const TargetRegisterInfo *TRI) | llvm::TargetLoweringBase | protected |
| Custom enum value | llvm::TargetLoweringBase | |
| emitLeadingFence(IRBuilder<> &Builder, AtomicOrdering Ord, bool IsStore, bool IsLoad) const | llvm::TargetLoweringBase | inlinevirtual |
| emitLoadLinked(IRBuilder<> &Builder, Value *Addr, AtomicOrdering Ord) const | llvm::TargetLoweringBase | inlinevirtual |
| emitPatchPoint(MachineInstr *MI, MachineBasicBlock *MBB) const | llvm::TargetLoweringBase | protected |
| emitStoreConditional(IRBuilder<> &Builder, Value *Val, Value *Addr, AtomicOrdering Ord) const | llvm::TargetLoweringBase | inlinevirtual |
| emitTrailingFence(IRBuilder<> &Builder, AtomicOrdering Ord, bool IsStore, bool IsLoad) const | llvm::TargetLoweringBase | inlinevirtual |
| enableAggressiveFMAFusion(EVT VT) const | llvm::TargetLoweringBase | inlinevirtual |
| enableExtLdPromotion() const | llvm::TargetLoweringBase | inline |
| EnableExtLdPromotion | llvm::TargetLoweringBase | protected |
| Expand enum value | llvm::TargetLoweringBase | |
| findRepresentativeClass(const TargetRegisterInfo *TRI, MVT VT) const | llvm::TargetLoweringBase | protectedvirtual |
| GetAddrModeArguments(IntrinsicInst *, SmallVectorImpl< Value * > &, Type *&, unsigned AddrSpace=0) const | llvm::TargetLoweringBase | inlinevirtual |
| getBooleanContents(bool isVec, bool isFloat) const | llvm::TargetLoweringBase | inline |
| getBooleanContents(EVT Type) const | llvm::TargetLoweringBase | inline |
| getBypassSlowDivWidths() const | llvm::TargetLoweringBase | inline |
| getByValTypeAlignment(Type *Ty, const DataLayout &DL) const | llvm::TargetLoweringBase | virtual |
| getCmpLibcallCC(RTLIB::Libcall Call) const | llvm::TargetLoweringBase | inline |
| getCmpLibcallReturnType() const | llvm::TargetLoweringBase | virtual |
| getCondCodeAction(ISD::CondCode CC, MVT VT) const | llvm::TargetLoweringBase | inline |
| getExceptionPointerRegister() const | llvm::TargetLoweringBase | inline |
| getExceptionSelectorRegister() const | llvm::TargetLoweringBase | inline |
| getExtendForContent(BooleanContent Content) | llvm::TargetLoweringBase | inlinestatic |
| getIndexedLoadAction(unsigned IdxMode, MVT VT) const | llvm::TargetLoweringBase | inline |
| getIndexedStoreAction(unsigned IdxMode, MVT VT) const | llvm::TargetLoweringBase | inline |
| getInsertFencesForAtomic() const | llvm::TargetLoweringBase | inline |
| getJumpBufAlignment() const | llvm::TargetLoweringBase | inline |
| getJumpBufSize() const | llvm::TargetLoweringBase | inline |
| getLibcallCallingConv(RTLIB::Libcall Call) const | llvm::TargetLoweringBase | inline |
| getLibcallName(RTLIB::Libcall Call) const | llvm::TargetLoweringBase | inline |
| getLoadExtAction(unsigned ExtType, EVT ValVT, EVT MemVT) const | llvm::TargetLoweringBase | inline |
| getMaxStoresPerMemcpy(bool OptSize) const | llvm::TargetLoweringBase | inline |
| getMaxStoresPerMemmove(bool OptSize) const | llvm::TargetLoweringBase | inline |
| getMaxStoresPerMemset(bool OptSize) const | llvm::TargetLoweringBase | inline |
| getMaxSupportedInterleaveFactor() const | llvm::TargetLoweringBase | inlinevirtual |
| getMinFunctionAlignment() const | llvm::TargetLoweringBase | inline |
| getMinimumJumpTableEntries() const | llvm::TargetLoweringBase | inline |
| getMinStackArgumentAlignment() const | llvm::TargetLoweringBase | inline |
| getNumRegisters(LLVMContext &Context, EVT VT) const | llvm::TargetLoweringBase | inline |
| getOperationAction(unsigned Op, EVT VT) const | llvm::TargetLoweringBase | inline |
| getOptimalMemOpType(uint64_t, unsigned, unsigned, bool, bool, bool, MachineFunction &) const | llvm::TargetLoweringBase | inlinevirtual |
| getPointerTy(const DataLayout &DL, uint32_t AS=0) const | llvm::TargetLoweringBase | inline |
| getPreferredVectorAction(EVT VT) const | llvm::TargetLoweringBase | inlinevirtual |
| getPrefFunctionAlignment() const | llvm::TargetLoweringBase | inline |
| getPrefLoopAlignment(MachineLoop *ML=nullptr) const | llvm::TargetLoweringBase | inlinevirtual |
| getRegClassFor(MVT VT) const | llvm::TargetLoweringBase | inlinevirtual |
| getRegisterType(MVT VT) const | llvm::TargetLoweringBase | inline |
| getRegisterType(LLVMContext &Context, EVT VT) const | llvm::TargetLoweringBase | inline |
| getRepRegClassCostFor(MVT VT) const | llvm::TargetLoweringBase | inlinevirtual |
| getRepRegClassFor(MVT VT) const | llvm::TargetLoweringBase | inlinevirtual |
| getScalarShiftAmountTy(const DataLayout &, EVT) const | llvm::TargetLoweringBase | virtual |
| getScalingFactorCost(const DataLayout &DL, const AddrMode &AM, Type *Ty, unsigned AS=0) const | llvm::TargetLoweringBase | inlinevirtual |
| getSchedulingPreference() const | llvm::TargetLoweringBase | inline |
| getSchedulingPreference(SDNode *) const | llvm::TargetLoweringBase | inlinevirtual |
| getSetCCResultType(const DataLayout &DL, LLVMContext &Context, EVT VT) const | llvm::TargetLoweringBase | virtual |
| getShiftAmountTy(EVT LHSTy, const DataLayout &DL) const | llvm::TargetLoweringBase | |
| getSimpleValueType(const DataLayout &DL, Type *Ty, bool AllowUnknown=false) const | llvm::TargetLoweringBase | inline |
| getStackCookieLocation(unsigned &, unsigned &) const | llvm::TargetLoweringBase | inlinevirtual |
| getStackPointerRegisterToSaveRestore() const | llvm::TargetLoweringBase | inline |
| getTargetMachine() const | llvm::TargetLoweringBase | inline |
| getTgtMemIntrinsic(IntrinsicInfo &, const CallInst &, unsigned) const | llvm::TargetLoweringBase | inlinevirtual |
| getTruncStoreAction(EVT ValVT, EVT MemVT) const | llvm::TargetLoweringBase | inline |
| getTypeAction(LLVMContext &Context, EVT VT) const | llvm::TargetLoweringBase | inline |
| getTypeAction(MVT VT) const | llvm::TargetLoweringBase | inline |
| getTypeLegalizationCost(const DataLayout &DL, Type *Ty) const | llvm::TargetLoweringBase | |
| getTypeToExpandTo(LLVMContext &Context, EVT VT) const | llvm::TargetLoweringBase | inline |
| getTypeToPromoteTo(unsigned Op, MVT VT) const | llvm::TargetLoweringBase | inline |
| getTypeToTransformTo(LLVMContext &Context, EVT VT) const | llvm::TargetLoweringBase | inline |
| getValueType(const DataLayout &DL, Type *Ty, bool AllowUnknown=false) const | llvm::TargetLoweringBase | inline |
| getValueTypeActions() const | llvm::TargetLoweringBase | inline |
| getVectorIdxTy(const DataLayout &DL) const | llvm::TargetLoweringBase | inlinevirtual |
| getVectorTypeBreakdown(LLVMContext &Context, EVT VT, EVT &IntermediateVT, unsigned &NumIntermediates, MVT &RegisterVT) const | llvm::TargetLoweringBase | |
| hasBigEndianPartOrdering(EVT VT, const DataLayout &DL) const | llvm::TargetLoweringBase | inline |
| hasExtractBitsInsn() const | llvm::TargetLoweringBase | inline |
| hasFloatingPointExceptions() const | llvm::TargetLoweringBase | inline |
| hasLoadLinkedStoreConditional() const | llvm::TargetLoweringBase | inlinevirtual |
| hasMultipleConditionRegisters() const | llvm::TargetLoweringBase | inline |
| hasPairedLoad(Type *, unsigned &) const | llvm::TargetLoweringBase | inlinevirtual |
| hasPairedLoad(EVT, unsigned &) const | llvm::TargetLoweringBase | inlinevirtual |
| hasTargetDAGCombine(ISD::NodeType NT) const | llvm::TargetLoweringBase | inline |
| initActions() | llvm::TargetLoweringBase | protected |
| InstructionOpcodeToISD(unsigned Opcode) const | llvm::TargetLoweringBase | |
| isCheapToSpeculateCtlz() const | llvm::TargetLoweringBase | inlinevirtual |
| isCheapToSpeculateCttz() const | llvm::TargetLoweringBase | inlinevirtual |
| isCondCodeLegal(ISD::CondCode CC, MVT VT) const | llvm::TargetLoweringBase | inline |
| isExtFree(const Instruction *I) const | llvm::TargetLoweringBase | inline |
| isExtFreeImpl(const Instruction *I) const | llvm::TargetLoweringBase | inlineprotectedvirtual |
| isExtractSubvectorCheap(EVT ResVT, unsigned Index) const | llvm::TargetLoweringBase | inlinevirtual |
| isFAbsFree(EVT VT) const | llvm::TargetLoweringBase | inlinevirtual |
| isFMAFasterThanFMulAndFAdd(EVT) const | llvm::TargetLoweringBase | inlinevirtual |
| isFNegFree(EVT VT) const | llvm::TargetLoweringBase | inlinevirtual |
| isFPExtFree(EVT VT) const | llvm::TargetLoweringBase | inlinevirtual |
| isFPImmLegal(const APFloat &, EVT) const | llvm::TargetLoweringBase | inlinevirtual |
| isFsqrtCheap() const | llvm::TargetLoweringBase | inline |
| isIndexedLoadLegal(unsigned IdxMode, EVT VT) const | llvm::TargetLoweringBase | inline |
| isIndexedStoreLegal(unsigned IdxMode, EVT VT) const | llvm::TargetLoweringBase | inline |
| isIntDivCheap() const | llvm::TargetLoweringBase | inline |
| isJumpExpensive() const | llvm::TargetLoweringBase | inline |
| isLegalAddImmediate(int64_t) const | llvm::TargetLoweringBase | inlinevirtual |
| isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty, unsigned AddrSpace) const | llvm::TargetLoweringBase | virtual |
| isLegalICmpImmediate(int64_t) const | llvm::TargetLoweringBase | inlinevirtual |
| isLegalRC(const TargetRegisterClass *RC) const | llvm::TargetLoweringBase | protected |
| isLoadBitCastBeneficial(EVT, EVT) const | llvm::TargetLoweringBase | inlinevirtual |
| isLoadExtLegal(unsigned ExtType, EVT ValVT, EVT MemVT) const | llvm::TargetLoweringBase | inline |
| isLoadExtLegalOrCustom(unsigned ExtType, EVT ValVT, EVT MemVT) const | llvm::TargetLoweringBase | inline |
| isMaskAndBranchFoldingLegal() const | llvm::TargetLoweringBase | inline |
| isNarrowingProfitable(EVT, EVT) const | llvm::TargetLoweringBase | inlinevirtual |
| isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const | llvm::TargetLoweringBase | inlinevirtual |
| isOperationExpand(unsigned Op, EVT VT) const | llvm::TargetLoweringBase | inline |
| isOperationLegal(unsigned Op, EVT VT) const | llvm::TargetLoweringBase | inline |
| isOperationLegalOrCustom(unsigned Op, EVT VT) const | llvm::TargetLoweringBase | inline |
| isOperationLegalOrPromote(unsigned Op, EVT VT) const | llvm::TargetLoweringBase | inline |
| isPow2SDivCheap() const | llvm::TargetLoweringBase | inline |
| isPredictableSelectExpensive() const | llvm::TargetLoweringBase | inline |
| isProfitableToHoist(Instruction *I) const | llvm::TargetLoweringBase | inlinevirtual |
| isSafeMemOpType(MVT) const | llvm::TargetLoweringBase | inlinevirtual |
| isSelectExpensive() const | llvm::TargetLoweringBase | inline |
| isSelectSupported(SelectSupportKind) const | llvm::TargetLoweringBase | inlinevirtual |
| isShuffleMaskLegal(const SmallVectorImpl< int > &, EVT) const | llvm::TargetLoweringBase | inlinevirtual |
| isSlowDivBypassed() const | llvm::TargetLoweringBase | inline |
| isTruncateFree(Type *, Type *) const | llvm::TargetLoweringBase | inlinevirtual |
| isTruncateFree(EVT, EVT) const | llvm::TargetLoweringBase | inlinevirtual |
| isTruncStoreLegal(EVT ValVT, EVT MemVT) const | llvm::TargetLoweringBase | inline |
| isTypeLegal(EVT VT) const | llvm::TargetLoweringBase | inline |
| isVectorClearMaskLegal(const SmallVectorImpl< int > &, EVT) const | llvm::TargetLoweringBase | inlinevirtual |
| isVectorLoadExtDesirable(SDValue ExtVal) const | llvm::TargetLoweringBase | inlinevirtual |
| isVectorShiftByScalarCheap(Type *Ty) const | llvm::TargetLoweringBase | inlinevirtual |
| isZExtFree(Type *, Type *) const | llvm::TargetLoweringBase | inlinevirtual |
| isZExtFree(EVT, EVT) const | llvm::TargetLoweringBase | inlinevirtual |
| isZExtFree(SDValue Val, EVT VT2) const | llvm::TargetLoweringBase | inlinevirtual |
| Legal enum value | llvm::TargetLoweringBase | |
| LegalizeAction enum name | llvm::TargetLoweringBase | |
| LegalizeKind typedef | llvm::TargetLoweringBase | |
| LegalizeTypeAction enum name | llvm::TargetLoweringBase | |
| lowerIdempotentRMWIntoFencedLoad(AtomicRMWInst *RMWI) const | llvm::TargetLoweringBase | inlinevirtual |
| lowerInterleavedLoad(LoadInst *LI, ArrayRef< ShuffleVectorInst * > Shuffles, ArrayRef< unsigned > Indices, unsigned Factor) const | llvm::TargetLoweringBase | inlinevirtual |
| lowerInterleavedStore(StoreInst *SI, ShuffleVectorInst *SVI, unsigned Factor) const | llvm::TargetLoweringBase | inlinevirtual |
| MaskAndBranchFoldingIsLegal | llvm::TargetLoweringBase | protected |
| MaxStoresPerMemcpy | llvm::TargetLoweringBase | protected |
| MaxStoresPerMemcpyOptSize | llvm::TargetLoweringBase | protected |
| MaxStoresPerMemmove | llvm::TargetLoweringBase | protected |
| MaxStoresPerMemmoveOptSize | llvm::TargetLoweringBase | protected |
| MaxStoresPerMemset | llvm::TargetLoweringBase | protected |
| MaxStoresPerMemsetOptSize | llvm::TargetLoweringBase | protected |
| PredictableSelectIsExpensive | llvm::TargetLoweringBase | protected |
| Promote enum value | llvm::TargetLoweringBase | |
| ScalarCondVectorVal enum value | llvm::TargetLoweringBase | |
| ScalarValSelect enum value | llvm::TargetLoweringBase | |
| SelectSupportKind enum name | llvm::TargetLoweringBase | |
| setBooleanContents(BooleanContent Ty) | llvm::TargetLoweringBase | inlineprotected |
| setBooleanContents(BooleanContent IntTy, BooleanContent FloatTy) | llvm::TargetLoweringBase | inlineprotected |
| setBooleanVectorContents(BooleanContent Ty) | llvm::TargetLoweringBase | inlineprotected |
| setCmpLibcallCC(RTLIB::Libcall Call, ISD::CondCode CC) | llvm::TargetLoweringBase | inline |
| setCondCodeAction(ISD::CondCode CC, MVT VT, LegalizeAction Action) | llvm::TargetLoweringBase | inlineprotected |
| setExceptionPointerRegister(unsigned R) | llvm::TargetLoweringBase | inlineprotected |
| setExceptionSelectorRegister(unsigned R) | llvm::TargetLoweringBase | inlineprotected |
| setFsqrtIsCheap(bool isCheap=true) | llvm::TargetLoweringBase | inlineprotected |
| setHasExtractBitsInsn(bool hasExtractInsn=true) | llvm::TargetLoweringBase | inlineprotected |
| setHasFloatingPointExceptions(bool FPExceptions=true) | llvm::TargetLoweringBase | inlineprotected |
| setHasMultipleConditionRegisters(bool hasManyRegs=true) | llvm::TargetLoweringBase | inlineprotected |
| setIndexedLoadAction(unsigned IdxMode, MVT VT, LegalizeAction Action) | llvm::TargetLoweringBase | inlineprotected |
| setIndexedStoreAction(unsigned IdxMode, MVT VT, LegalizeAction Action) | llvm::TargetLoweringBase | inlineprotected |
| setInsertFencesForAtomic(bool fence) | llvm::TargetLoweringBase | inlineprotected |
| setIntDivIsCheap(bool isCheap=true) | llvm::TargetLoweringBase | inlineprotected |
| setJumpBufAlignment(unsigned Align) | llvm::TargetLoweringBase | inlineprotected |
| setJumpBufSize(unsigned Size) | llvm::TargetLoweringBase | inlineprotected |
| setJumpIsExpensive(bool isExpensive=true) | llvm::TargetLoweringBase | protected |
| setLibcallCallingConv(RTLIB::Libcall Call, CallingConv::ID CC) | llvm::TargetLoweringBase | inline |
| setLibcallName(RTLIB::Libcall Call, const char *Name) | llvm::TargetLoweringBase | inline |
| setLoadExtAction(unsigned ExtType, MVT ValVT, MVT MemVT, LegalizeAction Action) | llvm::TargetLoweringBase | inlineprotected |
| setMinFunctionAlignment(unsigned Align) | llvm::TargetLoweringBase | inlineprotected |
| setMinimumJumpTableEntries(int Val) | llvm::TargetLoweringBase | inlineprotected |
| setMinStackArgumentAlignment(unsigned Align) | llvm::TargetLoweringBase | inlineprotected |
| setOperationAction(unsigned Op, MVT VT, LegalizeAction Action) | llvm::TargetLoweringBase | inlineprotected |
| setPow2SDivIsCheap(bool isCheap=true) | llvm::TargetLoweringBase | inlineprotected |
| setPrefFunctionAlignment(unsigned Align) | llvm::TargetLoweringBase | inlineprotected |
| setPrefLoopAlignment(unsigned Align) | llvm::TargetLoweringBase | inlineprotected |
| setSchedulingPreference(Sched::Preference Pref) | llvm::TargetLoweringBase | inlineprotected |
| setSelectIsExpensive(bool isExpensive=true) | llvm::TargetLoweringBase | inlineprotected |
| setStackPointerRegisterToSaveRestore(unsigned R) | llvm::TargetLoweringBase | inlineprotected |
| setTargetDAGCombine(ISD::NodeType NT) | llvm::TargetLoweringBase | inlineprotected |
| setTruncStoreAction(MVT ValVT, MVT MemVT, LegalizeAction Action) | llvm::TargetLoweringBase | inlineprotected |
| setUseUnderscoreLongJmp(bool Val) | llvm::TargetLoweringBase | inlineprotected |
| setUseUnderscoreSetJmp(bool Val) | llvm::TargetLoweringBase | inlineprotected |
| shouldAlignPointerArgs(CallInst *, unsigned &, unsigned &) const | llvm::TargetLoweringBase | inlinevirtual |
| shouldConvertConstantLoadToIntImm(const APInt &Imm, Type *Ty) const | llvm::TargetLoweringBase | inlinevirtual |
| shouldExpandAtomicLoadInIR(LoadInst *LI) const | llvm::TargetLoweringBase | inlinevirtual |
| shouldExpandAtomicRMWInIR(AtomicRMWInst *) const | llvm::TargetLoweringBase | inlinevirtual |
| shouldExpandAtomicStoreInIR(StoreInst *SI) const | llvm::TargetLoweringBase | inlinevirtual |
| shouldExpandBuildVectorWithShuffles(EVT, unsigned DefinedValues) const | llvm::TargetLoweringBase | inlinevirtual |
| shouldNormalizeToSelectSequence(LLVMContext &Context, EVT VT) const | llvm::TargetLoweringBase | inlinevirtual |
| shouldReduceLoadWidth(SDNode *Load, ISD::LoadExtType ExtTy, EVT NewVT) const | llvm::TargetLoweringBase | inlinevirtual |
| ShouldShrinkFPConstant(EVT) const | llvm::TargetLoweringBase | inlinevirtual |
| shouldSignExtendTypeInLibCall(EVT Type, bool IsSigned) const | llvm::TargetLoweringBase | inlinevirtual |
| storeOfVectorConstantIsCheap(EVT MemVT, unsigned NumElem, unsigned AddrSpace) const | llvm::TargetLoweringBase | inlinevirtual |
| TargetLoweringBase(const TargetMachine &TM) | llvm::TargetLoweringBase | explicit |
| TypeExpandFloat enum value | llvm::TargetLoweringBase | |
| TypeExpandInteger enum value | llvm::TargetLoweringBase | |
| TypeLegal enum value | llvm::TargetLoweringBase | |
| TypePromoteFloat enum value | llvm::TargetLoweringBase | |
| TypePromoteInteger enum value | llvm::TargetLoweringBase | |
| TypeScalarizeVector enum value | llvm::TargetLoweringBase | |
| TypeSoftenFloat enum value | llvm::TargetLoweringBase | |
| TypeSplitVector enum value | llvm::TargetLoweringBase | |
| TypeWidenVector enum value | llvm::TargetLoweringBase | |
| UndefinedBooleanContent enum value | llvm::TargetLoweringBase | |
| useSoftFloat() const | llvm::TargetLoweringBase | inlinevirtual |
| usesUnderscoreLongJmp() const | llvm::TargetLoweringBase | inline |
| usesUnderscoreSetJmp() const | llvm::TargetLoweringBase | inline |
| VectorMaskSelect enum value | llvm::TargetLoweringBase | |
| ZeroOrNegativeOneBooleanContent enum value | llvm::TargetLoweringBase | |
| ZeroOrOneBooleanContent enum value | llvm::TargetLoweringBase | |
| ~TargetLoweringBase() | llvm::TargetLoweringBase | inlinevirtual |