49 #define DEBUG_TYPE "aarch64-a57-fp-load-balancing"
55 cl::desc(
"Always modify dest registers regardless of color"),
62 cl::desc(
"Ignore balance information, always return "
63 "(1: Even, 2: Odd)."),
72 case AArch64::FMULSrr:
73 case AArch64::FNMULSrr:
74 case AArch64::FMULDrr:
75 case AArch64::FNMULDrr:
85 case AArch64::FMSUBSrrr:
86 case AArch64::FMADDSrrr:
87 case AArch64::FNMSUBSrrr:
88 case AArch64::FNMADDSrrr:
89 case AArch64::FMSUBDrrr:
90 case AArch64::FMADDDrrr:
91 case AArch64::FNMSUBDrrr:
92 case AArch64::FNMADDDrrr:
110 static const char *ColorNames[2] = {
"Even",
"Odd" };
128 const char *getPassName()
const override {
129 return "A57 FP Anti-dependency breaker";
144 std::map<unsigned, Chain*> &Active,
145 std::vector<std::unique_ptr<Chain>> &AllChains);
147 std::map<unsigned, Chain*> &RegChains);
149 Chain *getAndEraseNext(
Color PreferredColor, std::vector<Chain*> &L);
156 "AArch64 A57 FP Load-Balancing",
false,
false)
205 : StartInst(MI), LastInst(MI), KillInst(nullptr),
206 StartInstIdx(Idx), LastInstIdx(Idx), KillInstIdx(0),
217 assert((KillInstIdx == 0 || LastInstIdx < KillInstIdx) &&
218 "Chain: broken invariant. A Chain can only be killed after its last "
237 KillIsImmutable = Immutable;
238 assert((KillInstIdx == 0 || LastInstIdx < KillInstIdx) &&
239 "Chain: broken invariant. A Chain can only be killed after its last "
267 unsigned End = KillInst ? KillInstIdx : LastInstIdx;
268 unsigned OtherEnd = Other.
KillInst ?
271 return StartInstIdx <= OtherEnd && Other.
StartInstIdx <= End;
281 return (getKill() && isKillImmutable()) || !getKill();
290 StartInst->print(OS,
true);
292 LastInst->print(OS,
true);
295 KillInst->print(OS,
true);
315 bool Changed =
false;
316 DEBUG(
dbgs() <<
"***** AArch64A57FPLoadBalancing *****\n");
320 RCI.runOnMachineFunction(F);
322 for (
auto &MBB : F) {
323 Changed |= runOnBasicBlock(MBB);
330 bool Changed =
false;
331 DEBUG(
dbgs() <<
"Running on MBB: " << MBB <<
" - scanning instructions...\n");
338 std::map<unsigned, Chain*> ActiveChains;
339 std::vector<std::unique_ptr<Chain>> AllChains;
342 scanInstruction(&
MI, Idx++, ActiveChains, AllChains);
344 DEBUG(
dbgs() <<
"Scan complete, "<< AllChains.size() <<
" chains created.\n");
354 for (
auto &
I : AllChains)
357 for (
auto &
I : AllChains)
358 for (
auto &J : AllChains)
359 if (
I != J &&
I->rangeOverlapsWith(*J))
360 EC.unionSets(
I.get(), J.get());
361 DEBUG(
dbgs() <<
"Created " << EC.getNumClasses() <<
" disjoint sets.\n");
367 std::vector<std::vector<Chain*> > V;
368 for (
auto I = EC.begin(), E = EC.end();
I != E; ++
I) {
369 std::vector<Chain*> Cs(EC.member_begin(
I), EC.member_end());
370 if (Cs.empty())
continue;
371 V.push_back(std::move(Cs));
376 std::sort(V.begin(), V.end(),
377 [](
const std::vector<Chain*> &
A,
378 const std::vector<Chain*> &B) {
379 return A.front()->startsBefore(B.front());
396 Changed |= colorChainSet(std::move(
I), MBB, Parity);
401 Chain *AArch64A57FPLoadBalancing::getAndEraseNext(
Color PreferredColor,
402 std::vector<Chain*> &L) {
414 const unsigned SizeFuzz = 1;
415 unsigned MinSize = L.front()->size() - SizeFuzz;
416 for (
auto I = L.begin(), E = L.end();
I != E; ++
I) {
417 if ((*I)->size() <= MinSize) {
424 if ((*I)->getPreferredColor() == PreferredColor) {
432 Chain *Ch = L.front();
437 bool AArch64A57FPLoadBalancing::colorChainSet(std::vector<Chain*> GV,
440 bool Changed =
false;
441 DEBUG(
dbgs() <<
"colorChainSet(): #sets=" << GV.size() <<
"\n");
452 std::sort(GV.begin(), GV.end(), [](
const Chain *G1,
const Chain *G2) {
453 if (G1->size() != G2->size())
454 return G1->size() > G2->size();
455 if (G1->requiresFixup() != G2->requiresFixup())
456 return G1->requiresFixup() > G2->requiresFixup();
458 assert((G1 == G2 || (G1->startsBefore(G2) ^ G2->startsBefore(G1))) &&
459 "Starts before not total order!");
460 return G1->startsBefore(G2);
463 Color PreferredColor = Parity < 0 ? Color::Even : Color::Odd;
464 while (Chain *
G = getAndEraseNext(PreferredColor, GV)) {
469 C =
G->getPreferredColor();
471 DEBUG(
dbgs() <<
" - Parity=" << Parity <<
", Color="
472 << ColorNames[(
int)C] <<
"\n");
477 if (
G->requiresFixup() && C !=
G->getPreferredColor()) {
478 C =
G->getPreferredColor();
479 DEBUG(
dbgs() <<
" - " <<
G->str() <<
" - not worthwhile changing; "
480 "color remains " << ColorNames[(
int)C] <<
"\n");
483 Changed |= colorChain(
G, C, MBB);
485 Parity += (C == Color::Even) ?
G->size() : -
G->size();
486 PreferredColor = Parity < 0 ? Color::Even : Color::Odd;
492 int AArch64A57FPLoadBalancing::scavengeRegister(Chain *
G,
Color C,
500 unsigned RegClassID = G->getStart()->getDesc().OpInfo[0].RegClass;
509 for (
auto J :
I->operands()) {
513 if (J.isReg() && J.isDef()) {
516 for (; AI.isValid(); ++AI)
517 AvailableRegs.
reset(*AI);
520 for (; AI.isValid(); ++AI)
521 assert(!AvailableRegs[*AI] &&
522 "Non-dead def should have been removed by now!");
529 auto Ord = RCI.getOrder(TRI->getRegClass(RegClassID));
530 for (
auto Reg : Ord) {
531 if (!AvailableRegs[
Reg])
533 if ((C == Color::Even && (Reg % 2) == 0) ||
534 (C == Color::Odd && (Reg % 2) == 1))
541 bool AArch64A57FPLoadBalancing::colorChain(Chain *G,
Color C,
543 bool Changed =
false;
544 DEBUG(
dbgs() <<
" - colorChain(" << G->str() <<
", "
545 << ColorNames[(
int)C] <<
")\n");
549 int Reg = scavengeRegister(G, C, MBB);
551 DEBUG(
dbgs() <<
"Scavenging (thus coloring) failed!\n");
554 DEBUG(
dbgs() <<
" - Scavenged register: " << TRI->getName(Reg) <<
"\n");
556 std::map<unsigned, unsigned> Substs;
559 if (!G->contains(
I) &&
560 (&*
I != G->getKill() || G->isKillImmutable()))
565 std::vector<unsigned> ToErase;
566 for (
auto &U :
I->operands()) {
567 if (U.isReg() && U.isUse() && Substs.find(U.getReg()) != Substs.end()) {
568 unsigned OrigReg = U.getReg();
569 U.setReg(Substs[OrigReg]);
573 ToErase.push_back(OrigReg);
574 }
else if (U.isRegMask()) {
575 for (
auto J : Substs) {
576 if (U.clobbersPhysReg(J.first))
577 ToErase.push_back(J.first);
582 for (
auto J : ToErase)
586 if (&*
I != G->getKill()) {
590 if (G->requiresFixup() && &*
I == G->getLast())
596 MRI->setPhysRegUsed(Reg);
602 assert(Substs.size() == 0 &&
"No substitutions should be left active!");
605 DEBUG(
dbgs() <<
" - Kill instruction seen.\n");
609 DEBUG(
dbgs() <<
" - Destination register not changed.\n");
614 void AArch64A57FPLoadBalancing::scanInstruction(
615 MachineInstr *
MI,
unsigned Idx, std::map<unsigned, Chain *> &ActiveChains,
616 std::vector<std::unique_ptr<Chain>> &AllChains) {
621 for (
auto &
I : MI->
uses())
622 maybeKillChain(
I, Idx, ActiveChains);
623 for (
auto &
I : MI->
defs())
624 maybeKillChain(
I, Idx, ActiveChains);
630 DEBUG(
dbgs() <<
"New chain started for register "
631 << TRI->getName(DestReg) <<
" at " << *
MI);
633 auto G = llvm::make_unique<Chain>(
MI, Idx, getColor(DestReg));
634 ActiveChains[DestReg] = G.get();
635 AllChains.push_back(std::move(G));
637 }
else if (
isMla(MI)) {
641 unsigned DestReg = MI->getOperand(0).getReg();
642 unsigned AccumReg = MI->getOperand(3).getReg();
644 maybeKillChain(MI->getOperand(1), Idx, ActiveChains);
645 maybeKillChain(MI->getOperand(2), Idx, ActiveChains);
646 if (DestReg != AccumReg)
647 maybeKillChain(MI->getOperand(0), Idx, ActiveChains);
649 if (ActiveChains.find(AccumReg) != ActiveChains.end()) {
650 DEBUG(
dbgs() <<
"Chain found for accumulator register "
651 << TRI->getName(AccumReg) <<
" in MI " << *
MI);
658 if (MI->getOperand(3).isKill()) {
660 DEBUG(
dbgs() <<
"Instruction was successfully added to chain.\n");
661 ActiveChains[AccumReg]->add(MI, Idx, getColor(DestReg));
663 if (DestReg != AccumReg) {
664 ActiveChains[DestReg] = ActiveChains[AccumReg];
665 ActiveChains.erase(AccumReg);
670 DEBUG(
dbgs() <<
"Cannot add to chain because accumulator operand wasn't "
671 <<
"marked <kill>!\n");
672 maybeKillChain(MI->getOperand(3), Idx, ActiveChains);
675 DEBUG(
dbgs() <<
"Creating new chain for dest register "
676 << TRI->getName(DestReg) <<
"\n");
677 auto G = llvm::make_unique<Chain>(
MI, Idx, getColor(DestReg));
678 ActiveChains[DestReg] = G.get();
679 AllChains.push_back(std::move(G));
685 for (
auto &
I : MI->uses())
686 maybeKillChain(
I, Idx, ActiveChains);
687 for (
auto &
I : MI->defs())
688 maybeKillChain(
I, Idx, ActiveChains);
693 void AArch64A57FPLoadBalancing::
695 std::map<unsigned, Chain*> &ActiveChains) {
703 if (MO.
isKill() && ActiveChains.find(MO.
getReg()) != ActiveChains.end()) {
706 ActiveChains[MO.
getReg()]->setKill(MI, Idx, MO.
isTied());
708 ActiveChains.erase(MO.
getReg());
712 for (
auto I = ActiveChains.begin(), E = ActiveChains.end();
715 DEBUG(
dbgs() <<
"Kill (regmask) seen for chain "
716 << TRI->getName(
I->first) <<
"\n");
717 I->second->setKill(MI, Idx,
true);
718 ActiveChains.erase(
I++);
726 Color AArch64A57FPLoadBalancing::getColor(
unsigned Reg) {
727 if ((TRI->getEncodingValue(Reg) % 2) == 0)
735 return new AArch64A57FPLoadBalancing();
bool startsBefore(const Chain *Other) const
Return true if this chain starts before Other.
MachineInstr * getParent()
getParent - Return the instruction that this operand belongs to.
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
MachineInstr * StartInst
The important (marker) instructions.
iterator_range< mop_iterator > uses()
bool contains(MachineInstr *MI)
Return true if MI is a member of the chain.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
const TargetRegisterInfo * getTargetRegisterInfo() const
#define INITIALIZE_PASS_END(passName, arg, name, cfg, analysis)
bool isReg() const
isReg - Tests if this is a MO_Register operand.
Reg
All possible values of the reg field in the ModR/M byte.
std::string str() const
Return a simple string representation of the chain.
MachineBasicBlock::iterator getEnd() const
Return an instruction that can be used as an iterator for the end of the chain.
INITIALIZE_PASS_BEGIN(AArch64A57FPLoadBalancing, DEBUG_TYPE,"AArch64 A57 FP Load-Balancing", false, false) INITIALIZE_PASS_END(AArch64A57FPLoadBalancing
void forward()
Move the internal MBB iterator and update register states.
FunctionPass * createAArch64A57FPLoadBalancing()
BitVector getRegsAvailable(const TargetRegisterClass *RC)
Return all available registers in the register class in Mask.
AArch64 A57 FP Load false
iterator insert(const ElemTy &Data)
insert - Insert a new value into the union/find set, ignoring the request if the value already exists...
bool requiresFixup() const
Return true if the group will require a fixup MOV at the end.
static cl::opt< bool > TransformAll("aarch64-a57-fp-load-balancing-force-all", cl::desc("Always modify dest registers regardless of color"), cl::init(false), cl::Hidden)
void enterBasicBlock(MachineBasicBlock *mbb)
Start tracking liveness from the begin of the specific basic block.
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
bundle_iterator< MachineInstr, instr_iterator > iterator
MachineInstr * getKill() const
Return the "kill" instruction (as set with setKill()) or NULL.
initializer< Ty > init(const Ty &Val)
void clearBitsNotInMask(const uint32_t *Mask, unsigned MaskWords=~0u)
clearBitsNotInMask - Clear a bit in this vector for every '0' bit in Mask.
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
const MachineOperand & getOperand(unsigned i) const
static void initializeAArch64A57FPLoadBalancingPass(PassRegistry &)
EquivalenceClasses - This represents a collection of equivalence classes and supports three efficient...
MCRegAliasIterator enumerates all registers aliasing Reg.
Represent the analysis usage information of a pass.
iterator_range< mop_iterator > defs()
bool isKillImmutable() const
Can the Kill instruction (assuming one exists) be modified?
bool rangeOverlapsWith(const Chain &Other) const
Return true if this chain (StartInst..KillInst) overlaps with Other.
FunctionPass class - This class is used to implement most global optimizations.
AArch64 A57 FP Load Balancing
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
std::string & str()
Flushes the stream contents to the target string and returns the string's reference.
Color LastColor
The "color" of LastInst.
void add(MachineInstr *MI, unsigned Idx, Color C)
Add a new instruction into the chain.
bool isRegMask() const
isRegMask - Tests if this is a MO_RegisterMask operand.
Color
A "color", which is either even or odd.
MachineOperand class - Representation of each machine instruction operand.
unsigned size() const
Return the number of instructions in the chain.
Promote Memory to Register
static bool isMla(MachineInstr *MI)
void setPreservesCFG()
This function should be called by the pass, iff they do not:
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
MachineInstr * getLast() const
Return the last instruction in the chain.
static bool clobbersPhysReg(const uint32_t *RegMask, unsigned PhysReg)
clobbersPhysReg - Returns true if this RegMask clobbers PhysReg.
std::set< MachineInstr * > Insts
All instructions in the chain.
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
Representation of each machine instruction.
bool KillIsImmutable
True if KillInst cannot be modified.
A Chain is a sequence of instructions that are linked together by an accumulation operand...
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
void setReg(unsigned Reg)
Change the register this operand corresponds to.
unsigned getReg() const
getReg - Returns the register number.
unsigned StartInstIdx
The index, from the start of the basic block, that each marker appears.
void setKill(MachineInstr *MI, unsigned Idx, bool Immutable)
Inform the chain that its last active register (the dest register of LastInst) is killed by MI with n...
A raw_ostream that writes to an std::string.
static cl::opt< unsigned > OverrideBalance("aarch64-a57-fp-load-balancing-override", cl::desc("Ignore balance information, always return ""(1: Even, 2: Odd)."), cl::init(0), cl::Hidden)
Color getPreferredColor()
Return the preferred color of this chain.
C - The default llvm calling convention, compatible with C.
static bool isMul(MachineInstr *MI)
PassRegistry - This class manages the registration and intitialization of the pass subsystem as appli...
MachineInstr * getStart() const
Return the first instruction in the chain.
Chain(MachineInstr *MI, unsigned Idx, Color C)