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LLVM
3.7.0
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ScheduleDAGMI is an implementation of ScheduleDAGInstrs that simply schedules machine instructions according to the given MachineSchedStrategy without much extra book-keeping. More...
#include <MachineScheduler.h>
Public Member Functions | |
| ScheduleDAGMI (MachineSchedContext *C, std::unique_ptr< MachineSchedStrategy > S, bool IsPostRA) | |
| ~ScheduleDAGMI () override | |
| virtual bool | hasVRegLiveness () const |
| Return true if this DAG supports VReg liveness and RegPressure. More... | |
| void | addMutation (std::unique_ptr< ScheduleDAGMutation > Mutation) |
| Add a postprocessing step to the DAG builder. More... | |
| bool | canAddEdge (SUnit *SuccSU, SUnit *PredSU) |
| True if an edge can be added from PredSU to SuccSU without creating a cycle. More... | |
| bool | addEdge (SUnit *SuccSU, const SDep &PredDep) |
| Add a DAG edge to the given SU with the given predecessor dependence data. More... | |
| MachineBasicBlock::iterator | top () const |
| MachineBasicBlock::iterator | bottom () const |
| void | enterRegion (MachineBasicBlock *bb, MachineBasicBlock::iterator begin, MachineBasicBlock::iterator end, unsigned regioninstrs) override |
| Implement the ScheduleDAGInstrs interface for handling the next scheduling region. More... | |
| void | schedule () override |
| Implement ScheduleDAGInstrs interface for scheduling a sequence of reorderable instructions. More... | |
| void | moveInstruction (MachineInstr *MI, MachineBasicBlock::iterator InsertPos) |
| Change the position of an instruction within the basic block and update live ranges and region boundary iterators. More... | |
| const SUnit * | getNextClusterPred () const |
| const SUnit * | getNextClusterSucc () const |
| void | viewGraph (const Twine &Name, const Twine &Title) override |
| viewGraph - Pop up a ghostview window with the reachable parts of the DAG rendered using 'dot'. More... | |
| void | viewGraph () override |
| Out-of-line implementation with no arguments is handy for gdb. More... | |
Public Member Functions inherited from llvm::ScheduleDAGInstrs | |
| ScheduleDAGInstrs (MachineFunction &mf, const MachineLoopInfo *mli, bool IsPostRAFlag, bool RemoveKillFlags=false, LiveIntervals *LIS=nullptr) | |
| ~ScheduleDAGInstrs () override | |
| bool | isPostRA () const |
| LiveIntervals * | getLIS () const |
| Expose LiveIntervals for use in DAG mutators and such. More... | |
| const TargetSchedModel * | getSchedModel () const |
| Get the machine model for instruction scheduling. More... | |
| const MCSchedClassDesc * | getSchedClass (SUnit *SU) const |
| Resolve and cache a resolved scheduling class for an SUnit. More... | |
| MachineBasicBlock::iterator | begin () const |
| begin - Return an iterator to the top of the current scheduling region. More... | |
| MachineBasicBlock::iterator | end () const |
| end - Return an iterator to the bottom of the current scheduling region. More... | |
| SUnit * | newSUnit (MachineInstr *MI) |
| newSUnit - Creates a new SUnit and return a ptr to it. More... | |
| SUnit * | getSUnit (MachineInstr *MI) const |
| getSUnit - Return an existing SUnit for this MI, or NULL. More... | |
| virtual void | startBlock (MachineBasicBlock *BB) |
| startBlock - Prepare to perform scheduling in the given block. More... | |
| virtual void | finishBlock () |
| finishBlock - Clean up after scheduling in the given block. More... | |
| virtual void | exitRegion () |
| Notify that the scheduler has finished scheduling the current region. More... | |
| void | buildSchedGraph (AliasAnalysis *AA, RegPressureTracker *RPTracker=nullptr, PressureDiffs *PDiffs=nullptr) |
| buildSchedGraph - Build SUnits from the MachineBasicBlock that we are input. More... | |
| void | addSchedBarrierDeps () |
| addSchedBarrierDeps - Add dependencies from instructions in the current list of instructions being scheduled to scheduling barrier. More... | |
| virtual void | finalizeSchedule () |
| finalizeSchedule - Allow targets to perform final scheduling actions at the level of the whole MachineFunction. More... | |
| void | dumpNode (const SUnit *SU) const override |
| std::string | getGraphNodeLabel (const SUnit *SU) const override |
| Return a label for a DAG node that points to an instruction. More... | |
| std::string | getDAGName () const override |
| Return a label for the region of code covered by the DAG. More... | |
| void | fixupKills (MachineBasicBlock *MBB) |
| Fix register kill flags that scheduling has made invalid. More... | |
Public Member Functions inherited from llvm::ScheduleDAG | |
| ScheduleDAG (MachineFunction &mf) | |
| virtual | ~ScheduleDAG () |
| void | clearDAG () |
| clearDAG - clear the DAG state (between regions). More... | |
| const MCInstrDesc * | getInstrDesc (const SUnit *SU) const |
| getInstrDesc - Return the MCInstrDesc of this SUnit. More... | |
| virtual void | addCustomGraphFeatures (GraphWriter< ScheduleDAG * > &) const |
| addCustomGraphFeatures - Add custom features for a visualization of the ScheduleDAG. More... | |
| unsigned | VerifyScheduledDAG (bool isBottomUp) |
| VerifyScheduledDAG - Verify that all SUnits were scheduled and that their state is consistent. More... | |
Protected Member Functions | |
| void | postprocessDAG () |
| Apply each ScheduleDAGMutation step in order. More... | |
| void | initQueues (ArrayRef< SUnit * > TopRoots, ArrayRef< SUnit * > BotRoots) |
| Release ExitSU predecessors and setup scheduler queues. More... | |
| void | updateQueues (SUnit *SU, bool IsTopNode) |
| Update scheduler DAG and queues after scheduling an instruction. More... | |
| void | placeDebugValues () |
| Reinsert debug_values recorded in ScheduleDAGInstrs::DbgValues. More... | |
| void | dumpSchedule () const |
| dump the scheduled Sequence. More... | |
| bool | checkSchedLimit () |
| void | findRootsAndBiasEdges (SmallVectorImpl< SUnit * > &TopRoots, SmallVectorImpl< SUnit * > &BotRoots) |
| void | releaseSucc (SUnit *SU, SDep *SuccEdge) |
| ReleaseSucc - Decrement the NumPredsLeft count of a successor. More... | |
| void | releaseSuccessors (SUnit *SU) |
| releaseSuccessors - Call releaseSucc on each of SU's successors. More... | |
| void | releasePred (SUnit *SU, SDep *PredEdge) |
| ReleasePred - Decrement the NumSuccsLeft count of a predecessor. More... | |
| void | releasePredecessors (SUnit *SU) |
| releasePredecessors - Call releasePred on each of SU's predecessors. More... | |
Protected Member Functions inherited from llvm::ScheduleDAGInstrs | |
| void | initSUnits () |
| Create an SUnit for each real instruction, numbered in top-down toplological order. More... | |
| void | addPhysRegDataDeps (SUnit *SU, unsigned OperIdx) |
| MO is an operand of SU's instruction that defines a physical register. More... | |
| void | addPhysRegDeps (SUnit *SU, unsigned OperIdx) |
| addPhysRegDeps - Add register dependencies (data, anti, and output) from this SUnit to following instructions in the same scheduling region that depend the physical register referenced at OperIdx. More... | |
| void | addVRegDefDeps (SUnit *SU, unsigned OperIdx) |
| addVRegDefDeps - Add register output and data dependencies from this SUnit to instructions that occur later in the same scheduling region if they read from or write to the virtual register defined at OperIdx. More... | |
| void | addVRegUseDeps (SUnit *SU, unsigned OperIdx) |
| addVRegUseDeps - Add a register data dependency if the instruction that defines the virtual register used at OperIdx is mapped to an SUnit. More... | |
| void | startBlockForKills (MachineBasicBlock *BB) |
| PostRA helper for rewriting kill flags. More... | |
| bool | toggleKillFlag (MachineInstr *MI, MachineOperand &MO) |
| Toggle a register operand kill flag. More... | |
Protected Attributes | |
| AliasAnalysis * | AA |
| std::unique_ptr < MachineSchedStrategy > | SchedImpl |
| ScheduleDAGTopologicalSort | Topo |
| Topo - A topological ordering for SUnits which permits fast IsReachable and similar queries. More... | |
| std::vector< std::unique_ptr < ScheduleDAGMutation > > | Mutations |
| Ordered list of DAG postprocessing steps. More... | |
| MachineBasicBlock::iterator | CurrentTop |
| The top of the unscheduled zone. More... | |
| MachineBasicBlock::iterator | CurrentBottom |
| The bottom of the unscheduled zone. More... | |
| const SUnit * | NextClusterPred |
| Record the next node in a scheduled cluster. More... | |
| const SUnit * | NextClusterSucc |
| unsigned | NumInstrsScheduled |
| The number of instructions scheduled so far. More... | |
Protected Attributes inherited from llvm::ScheduleDAGInstrs | |
| const MachineLoopInfo * | MLI |
| const MachineFrameInfo * | MFI |
| LiveIntervals * | LIS |
| Live Intervals provides reaching defs in preRA scheduling. More... | |
| TargetSchedModel | SchedModel |
| TargetSchedModel provides an interface to the machine model. More... | |
| bool | IsPostRA |
| isPostRA flag indicates vregs cannot be present. More... | |
| bool | RemoveKillFlags |
| True if the DAG builder should remove kill flags (in preparation for rescheduling). More... | |
| bool | CanHandleTerminators |
| The standard DAG builder does not normally include terminators as DAG nodes because it does not create the necessary dependencies to prevent reordering. More... | |
| MachineBasicBlock * | BB |
| State specific to the current scheduling region. More... | |
| MachineBasicBlock::iterator | RegionBegin |
| The beginning of the range to be scheduled. More... | |
| MachineBasicBlock::iterator | RegionEnd |
| The end of the range to be scheduled. More... | |
| unsigned | NumRegionInstrs |
| Instructions in this region (distance(RegionBegin, RegionEnd)). More... | |
| DenseMap< MachineInstr *, SUnit * > | MISUnitMap |
| After calling BuildSchedGraph, each machine instruction in the current scheduling region is mapped to an SUnit. More... | |
| VReg2UseMap | VRegUses |
| After calling BuildSchedGraph, each vreg used in the scheduling region is mapped to a set of SUnits. More... | |
| Reg2SUnitsMap | Defs |
| State internal to DAG building. More... | |
| Reg2SUnitsMap | Uses |
| VReg2SUnitMap | VRegDefs |
| Track the last instruction in this region defining each virtual register. More... | |
| std::vector< SUnit * > | PendingLoads |
| PendingLoads - Remember where unknown loads are after the most recent unknown store, as we iterate. More... | |
| DbgValueVector | DbgValues |
| MachineInstr * | FirstDbgValue |
| BitVector | LiveRegs |
| Set of live physical registers for updating kill flags. More... | |
Additional Inherited Members | |
Public Attributes inherited from llvm::ScheduleDAG | |
| const TargetMachine & | TM |
| const TargetInstrInfo * | TII |
| const TargetRegisterInfo * | TRI |
| MachineFunction & | MF |
| MachineRegisterInfo & | MRI |
| std::vector< SUnit > | SUnits |
| SUnit | EntrySU |
| SUnit | ExitSU |
| bool | StressSched |
Protected Types inherited from llvm::ScheduleDAGInstrs | |
| typedef std::vector< std::pair < MachineInstr *, MachineInstr * > > | DbgValueVector |
| DbgValues - Remember instruction that precedes DBG_VALUE. More... | |
ScheduleDAGMI is an implementation of ScheduleDAGInstrs that simply schedules machine instructions according to the given MachineSchedStrategy without much extra book-keeping.
This is the common functionality between PreRA and PostRA MachineScheduler.
Definition at line 222 of file MachineScheduler.h.
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Definition at line 250 of file MachineScheduler.h.
References NumInstrsScheduled.
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Definition at line 515 of file MachineScheduler.cpp.
Add a DAG edge to the given SU with the given predecessor dependence data.
Definition at line 522 of file MachineScheduler.cpp.
References llvm::SUnit::addPred(), llvm::ScheduleDAGTopologicalSort::AddPred(), llvm::ScheduleDAG::ExitSU, llvm::SDep::getSUnit(), llvm::SDep::isArtificial(), llvm::ScheduleDAGTopologicalSort::IsReachable(), and Topo.
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Add a postprocessing step to the DAG builder.
Mutations are applied in the order that they are added after normal DAG building and before MachineSchedStrategy initialization.
ScheduleDAGMI takes ownership of the Mutation object.
Definition at line 272 of file MachineScheduler.h.
References Mutations.
Referenced by createGenericSchedLive().
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Definition at line 288 of file MachineScheduler.h.
References CurrentBottom.
Referenced by llvm::ConvergingVLIWScheduler::pickNode(), llvm::GenericScheduler::pickNode(), and llvm::PostGenericScheduler::pickNode().
True if an edge can be added from PredSU to SuccSU without creating a cycle.
Definition at line 518 of file MachineScheduler.cpp.
References llvm::ScheduleDAG::ExitSU, llvm::ScheduleDAGTopologicalSort::IsReachable(), and Topo.
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Definition at line 647 of file MachineScheduler.cpp.
References CurrentBottom, CurrentTop, MISchedCutoff, and NumInstrsScheduled.
Referenced by llvm::VLIWMachineScheduler::schedule(), schedule(), and llvm::ScheduleDAGMILive::schedule().
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dump the scheduled Sequence.
Definition at line 825 of file MachineScheduler.cpp.
References llvm::ScheduleDAGInstrs::begin(), llvm::dbgs(), llvm::ScheduleDAGInstrs::end(), llvm::ScheduleDAGInstrs::getSUnit(), and llvm::AArch64CC::MI.
Referenced by schedule(), and llvm::ScheduleDAGMILive::schedule().
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Implement the ScheduleDAGInstrs interface for handling the next scheduling region.
enterRegion - Called back from MachineScheduler::runOnMachineFunction after crossing a scheduling boundary.
This covers all instructions in a block, while schedule() may only cover a subset.
[begin, end) includes all instructions in the region, including the boundary itself and single-instruction regions that don't get scheduled.
Reimplemented from llvm::ScheduleDAGInstrs.
Reimplemented in llvm::ScheduleDAGMILive.
Definition at line 617 of file MachineScheduler.cpp.
References llvm::ScheduleDAGInstrs::enterRegion(), and SchedImpl.
Referenced by llvm::ScheduleDAGMILive::enterRegion().
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Definition at line 739 of file MachineScheduler.cpp.
References llvm::SUnit::biasCriticalPath(), llvm::ScheduleDAG::ExitSU, I, llvm::SUnit::isBoundaryNode(), llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back(), and llvm::ScheduleDAG::SUnits.
Referenced by llvm::VLIWMachineScheduler::schedule(), schedule(), and llvm::ScheduleDAGMILive::schedule().
Definition at line 306 of file MachineScheduler.h.
References NextClusterPred.
Referenced by llvm::GenericScheduler::tryCandidate().
Definition at line 308 of file MachineScheduler.h.
References NextClusterSucc.
Referenced by llvm::GenericScheduler::tryCandidate().
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Return true if this DAG supports VReg liveness and RegPressure.
Reimplemented in llvm::ScheduleDAGMILive.
Definition at line 265 of file MachineScheduler.h.
Referenced by llvm::DOTGraphTraits< ScheduleDAGMI * >::getNodeAttributes(), llvm::DOTGraphTraits< ScheduleDAGMI * >::getNodeLabel(), llvm::R600SchedStrategy::initialize(), and llvm::GenericScheduler::initialize().
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Release ExitSU predecessors and setup scheduler queues.
Identify DAG roots and setup scheduler queues.
Definition at line 760 of file MachineScheduler.cpp.
References llvm::ArrayRef< T >::begin(), CurrentBottom, CurrentTop, llvm::ArrayRef< T >::end(), llvm::ScheduleDAG::EntrySU, llvm::ScheduleDAG::ExitSU, I, NextClusterPred, NextClusterSucc, nextIfDebug(), llvm::ArrayRef< T >::rbegin(), llvm::ScheduleDAGInstrs::RegionBegin, llvm::ScheduleDAGInstrs::RegionEnd, releasePredecessors(), releaseSuccessors(), llvm::ArrayRef< T >::rend(), and SchedImpl.
Referenced by llvm::VLIWMachineScheduler::schedule(), schedule(), and llvm::ScheduleDAGMILive::schedule().
| void ScheduleDAGMI::moveInstruction | ( | MachineInstr * | MI, |
| MachineBasicBlock::iterator | InsertPos | ||
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Change the position of an instruction within the basic block and update live ranges and region boundary iterators.
This is normally called from the main scheduler loop but may also be invoked by the scheduling strategy to perform additional code motion.
Definition at line 629 of file MachineScheduler.cpp.
References llvm::ScheduleDAGInstrs::BB, llvm::AArch64CC::MI, llvm::ScheduleDAGInstrs::RegionBegin, and llvm::MachineBasicBlock::splice().
Referenced by llvm::GenericScheduler::reschedulePhysRegCopies(), schedule(), and llvm::ScheduleDAGMILive::scheduleMI().
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Reinsert debug_values recorded in ScheduleDAGInstrs::DbgValues.
Reinsert any remaining debug_values, just like the PostRA scheduler.
Definition at line 802 of file MachineScheduler.cpp.
References llvm::ScheduleDAGInstrs::BB, llvm::ScheduleDAGInstrs::DbgValues, llvm::DI, llvm::ScheduleDAGInstrs::FirstDbgValue, P, llvm::ScheduleDAGInstrs::RegionBegin, llvm::ScheduleDAGInstrs::RegionEnd, and llvm::MachineBasicBlock::splice().
Referenced by llvm::VLIWMachineScheduler::schedule(), schedule(), and llvm::ScheduleDAGMILive::schedule().
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Apply each ScheduleDAGMutation step in order.
This allows different instances of ScheduleDAGMI to perform custom DAG postprocessing.
Definition at line 732 of file MachineScheduler.cpp.
References Mutations.
Referenced by schedule(), and llvm::ScheduleDAGMILive::schedule().
ReleasePred - Decrement the NumSuccsLeft count of a predecessor.
When NumSuccsLeft reaches zero, release the predecessor node.
FIXME: Adjust PredSU height based on MinLatency.
Definition at line 578 of file MachineScheduler.cpp.
References llvm::SUnit::BotReadyCycle, llvm::dbgs(), llvm::SUnit::dump(), llvm::ScheduleDAG::EntrySU, llvm::SDep::getLatency(), llvm::SDep::getSUnit(), llvm::SDep::isCluster(), llvm::SDep::isWeak(), llvm_unreachable, NextClusterPred, llvm::SUnit::NumSuccsLeft, SchedImpl, and llvm::SUnit::WeakSuccsLeft.
Referenced by releasePredecessors().
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releasePredecessors - Call releasePred on each of SU's predecessors.
Definition at line 606 of file MachineScheduler.cpp.
References I, llvm::SUnit::Preds, and releasePred().
Referenced by initQueues(), and updateQueues().
ReleaseSucc - Decrement the NumPredsLeft count of a successor.
When NumPredsLeft reaches zero, release the successor node.
FIXME: Adjust SuccSU height based on MinLatency.
Definition at line 539 of file MachineScheduler.cpp.
References llvm::dbgs(), llvm::SUnit::dump(), llvm::ScheduleDAG::ExitSU, llvm::SDep::getLatency(), llvm::SDep::getSUnit(), llvm::SDep::isCluster(), llvm::SDep::isWeak(), llvm_unreachable, NextClusterSucc, llvm::SUnit::NumPredsLeft, SchedImpl, llvm::SUnit::TopReadyCycle, and llvm::SUnit::WeakPredsLeft.
Referenced by releaseSuccessors().
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releaseSuccessors - Call releaseSucc on each of SU's successors.
Definition at line 567 of file MachineScheduler.cpp.
References I, releaseSucc(), and llvm::SUnit::Succs.
Referenced by initQueues(), and updateQueues().
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Implement ScheduleDAGInstrs interface for scheduling a sequence of reorderable instructions.
Per-region scheduling driver, called back from MachineScheduler::runOnMachineFunction.
This is a simplified driver that does not consider liveness or register pressure. It is useful for PostRA scheduling and potentially other custom schedulers.
Implements llvm::ScheduleDAGInstrs.
Reimplemented in llvm::ScheduleDAGMILive, and llvm::VLIWMachineScheduler.
Definition at line 662 of file MachineScheduler.cpp.
References llvm::ScheduleDAGInstrs::begin(), llvm::ScheduleDAGInstrs::buildSchedGraph(), checkSchedLimit(), CurrentBottom, CurrentTop, llvm::dbgs(), DEBUG, dumpSchedule(), findRootsAndBiasEdges(), llvm::ScheduleDAGTopologicalSort::InitDAGTopologicalSorting(), initQueues(), llvm::AArch64CC::MI, moveInstruction(), nextIfDebug(), placeDebugValues(), postprocessDAG(), priorNonDebug(), SchedImpl, llvm::ScheduleDAG::SUnits, Topo, updateQueues(), viewGraph(), and ViewMISchedDAGs.
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Definition at line 287 of file MachineScheduler.h.
References CurrentTop.
Referenced by llvm::ConvergingVLIWScheduler::pickNode(), llvm::GenericScheduler::pickNode(), and llvm::PostGenericScheduler::pickNode().
Update scheduler DAG and queues after scheduling an instruction.
Update scheduler queues after scheduling an instruction.
Definition at line 791 of file MachineScheduler.cpp.
References llvm::SUnit::isScheduled, releasePredecessors(), and releaseSuccessors().
Referenced by llvm::VLIWMachineScheduler::schedule(), schedule(), and llvm::ScheduleDAGMILive::schedule().
viewGraph - Pop up a ghostview window with the reachable parts of the DAG rendered using 'dot'.
Reimplemented from llvm::ScheduleDAG.
Definition at line 3311 of file MachineScheduler.cpp.
References llvm::errs(), and llvm::ViewGraph().
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Out-of-line implementation with no arguments is handy for gdb.
Reimplemented from llvm::ScheduleDAG.
Definition at line 3321 of file MachineScheduler.cpp.
Referenced by schedule(), and llvm::ScheduleDAGMILive::schedule().
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Definition at line 224 of file MachineScheduler.h.
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The bottom of the unscheduled zone.
Definition at line 238 of file MachineScheduler.h.
Referenced by bottom(), checkSchedLimit(), initQueues(), llvm::VLIWMachineScheduler::schedule(), schedule(), llvm::ScheduleDAGMILive::schedule(), and llvm::ScheduleDAGMILive::scheduleMI().
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The top of the unscheduled zone.
Definition at line 235 of file MachineScheduler.h.
Referenced by checkSchedLimit(), initQueues(), llvm::VLIWMachineScheduler::schedule(), schedule(), llvm::ScheduleDAGMILive::schedule(), llvm::ScheduleDAGMILive::scheduleMI(), and top().
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Ordered list of DAG postprocessing steps.
Definition at line 232 of file MachineScheduler.h.
Referenced by addMutation(), and postprocessDAG().
Record the next node in a scheduled cluster.
Definition at line 241 of file MachineScheduler.h.
Referenced by getNextClusterPred(), initQueues(), and releasePred().
Definition at line 242 of file MachineScheduler.h.
Referenced by getNextClusterSucc(), initQueues(), and releaseSucc().
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The number of instructions scheduled so far.
Used to cut off the scheduler at the point determined by misched-cutoff.
Definition at line 247 of file MachineScheduler.h.
Referenced by checkSchedLimit(), and ScheduleDAGMI().
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Definition at line 225 of file MachineScheduler.h.
Referenced by enterRegion(), llvm::ScheduleDAGMILive::enterRegion(), initQueues(), releasePred(), releaseSucc(), llvm::VLIWMachineScheduler::schedule(), schedule(), and llvm::ScheduleDAGMILive::schedule().
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Topo - A topological ordering for SUnits which permits fast IsReachable and similar queries.
Definition at line 229 of file MachineScheduler.h.
Referenced by addEdge(), canAddEdge(), schedule(), and llvm::ScheduleDAGMILive::schedule().
1.8.6