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LLVM
3.7.0
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This is the complete list of members for llvm::AArch64InstrInfo, including all inherited members.
| AArch64InstrInfo(const AArch64Subtarget &STI) | llvm::AArch64InstrInfo | explicit |
| AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify=false) const override | llvm::AArch64InstrInfo | |
| analyzeCompare(const MachineInstr *MI, unsigned &SrcReg, unsigned &SrcReg2, int &CmpMask, int &CmpValue) const override | llvm::AArch64InstrInfo | |
| areMemAccessesTriviallyDisjoint(MachineInstr *MIa, MachineInstr *MIb, AliasAnalysis *AA=nullptr) const override | llvm::AArch64InstrInfo | |
| canInsertSelect(const MachineBasicBlock &, ArrayRef< MachineOperand > Cond, unsigned, unsigned, int &, int &, int &) const override | llvm::AArch64InstrInfo | |
| copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const override | llvm::AArch64InstrInfo | |
| copyPhysRegTuple(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc, unsigned Opcode, llvm::ArrayRef< unsigned > Indices) const | llvm::AArch64InstrInfo | |
| emitFrameIndexDebugValue(MachineFunction &MF, int FrameIx, uint64_t Offset, const MDNode *Var, const MDNode *Expr, DebugLoc DL) const | llvm::AArch64InstrInfo | |
| enableClusterLoads() const override | llvm::AArch64InstrInfo | inline |
| expandPostRAPseudo(MachineBasicBlock::iterator MI) const override | llvm::AArch64InstrInfo | |
| foldMemoryOperandImpl(MachineFunction &MF, MachineInstr *MI, ArrayRef< unsigned > Ops, MachineBasicBlock::iterator InsertPt, int FrameIndex) const override | llvm::AArch64InstrInfo | |
| genAlternativeCodeSequence(MachineInstr &Root, MachineCombinerPattern::MC_PATTERN Pattern, SmallVectorImpl< MachineInstr * > &InsInstrs, SmallVectorImpl< MachineInstr * > &DelInstrs, DenseMap< unsigned, unsigned > &InstrIdxForVirtReg) const override | llvm::AArch64InstrInfo | |
| GetInstSizeInBytes(const MachineInstr *MI) const | llvm::AArch64InstrInfo | |
| getMachineCombinerPatterns(MachineInstr &Root, SmallVectorImpl< MachineCombinerPattern::MC_PATTERN > &Patterns) const override | llvm::AArch64InstrInfo | |
| getMemOpBaseRegImmOfs(MachineInstr *LdSt, unsigned &BaseReg, unsigned &Offset, const TargetRegisterInfo *TRI) const override | llvm::AArch64InstrInfo | |
| getMemOpBaseRegImmOfsWidth(MachineInstr *LdSt, unsigned &BaseReg, int &Offset, int &Width, const TargetRegisterInfo *TRI) const | llvm::AArch64InstrInfo | |
| getNoopForMachoTarget(MCInst &NopInst) const override | llvm::AArch64InstrInfo | |
| getRegisterInfo() const | llvm::AArch64InstrInfo | inline |
| hasExtendedReg(const MachineInstr *MI) const | llvm::AArch64InstrInfo | |
| hasShiftedReg(const MachineInstr *MI) const | llvm::AArch64InstrInfo | |
| InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, DebugLoc DL) const override | llvm::AArch64InstrInfo | |
| insertSelect(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, DebugLoc DL, unsigned DstReg, ArrayRef< MachineOperand > Cond, unsigned TrueReg, unsigned FalseReg) const override | llvm::AArch64InstrInfo | |
| isAsCheapAsAMove(const MachineInstr *MI) const override | llvm::AArch64InstrInfo | |
| isCoalescableExtInstr(const MachineInstr &MI, unsigned &SrcReg, unsigned &DstReg, unsigned &SubIdx) const override | llvm::AArch64InstrInfo | |
| isFPRCopy(const MachineInstr *MI) const | llvm::AArch64InstrInfo | |
| isGPRCopy(const MachineInstr *MI) const | llvm::AArch64InstrInfo | |
| isGPRZero(const MachineInstr *MI) const | llvm::AArch64InstrInfo | |
| isLdStPairSuppressed(const MachineInstr *MI) const | llvm::AArch64InstrInfo | |
| isLoadFromStackSlot(const MachineInstr *MI, int &FrameIndex) const override | llvm::AArch64InstrInfo | |
| isScaledAddr(const MachineInstr *MI) const | llvm::AArch64InstrInfo | |
| isStoreToStackSlot(const MachineInstr *MI, int &FrameIndex) const override | llvm::AArch64InstrInfo | |
| loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override | llvm::AArch64InstrInfo | |
| optimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg, unsigned SrcReg2, int CmpMask, int CmpValue, const MachineRegisterInfo *MRI) const override | llvm::AArch64InstrInfo | |
| optimizeCondBranch(MachineInstr *MI) const override | llvm::AArch64InstrInfo | |
| RemoveBranch(MachineBasicBlock &MBB) const override | llvm::AArch64InstrInfo | |
| ReverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const override | llvm::AArch64InstrInfo | |
| shouldClusterLoads(MachineInstr *FirstLdSt, MachineInstr *SecondLdSt, unsigned NumLoads) const override | llvm::AArch64InstrInfo | |
| shouldScheduleAdjacent(MachineInstr *First, MachineInstr *Second) const override | llvm::AArch64InstrInfo | |
| storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override | llvm::AArch64InstrInfo | |
| suppressLdStPair(MachineInstr *MI) const | llvm::AArch64InstrInfo | |
| useMachineCombiner() const override | llvm::AArch64InstrInfo |
1.8.6