LLVM  3.7.0
MipsMCCodeEmitter.h
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1 //===-- MipsMCCodeEmitter.h - Convert Mips Code to Machine Code -----------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file defines the MipsMCCodeEmitter class.
11 //
12 //===----------------------------------------------------------------------===//
13 //
14 
15 #ifndef LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSMCCODEEMITTER_H
16 #define LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSMCCODEEMITTER_H
17 
18 #include "llvm/MC/MCCodeEmitter.h"
19 #include "llvm/Support/DataTypes.h"
20 
21 using namespace llvm;
22 
23 namespace llvm {
24 class MCContext;
25 class MCExpr;
26 class MCInst;
27 class MCInstrInfo;
28 class MCFixup;
29 class MCOperand;
30 class MCSubtargetInfo;
31 class raw_ostream;
32 
34  MipsMCCodeEmitter(const MipsMCCodeEmitter &) = delete;
35  void operator=(const MipsMCCodeEmitter &) = delete;
36  const MCInstrInfo &MCII;
37  MCContext &Ctx;
38  bool IsLittleEndian;
39 
40  bool isMicroMips(const MCSubtargetInfo &STI) const;
41  bool isMips32r6(const MCSubtargetInfo &STI) const;
42 
43 public:
44  MipsMCCodeEmitter(const MCInstrInfo &mcii, MCContext &Ctx_, bool IsLittle)
45  : MCII(mcii), Ctx(Ctx_), IsLittleEndian(IsLittle) {}
46 
47  ~MipsMCCodeEmitter() override {}
48 
49  void EmitByte(unsigned char C, raw_ostream &OS) const;
50 
51  void EmitInstruction(uint64_t Val, unsigned Size, const MCSubtargetInfo &STI,
52  raw_ostream &OS) const;
53 
54  void encodeInstruction(const MCInst &MI, raw_ostream &OS,
56  const MCSubtargetInfo &STI) const override;
57 
58  // getBinaryCodeForInstr - TableGen'erated function for getting the
59  // binary encoding for an instruction.
60  uint64_t getBinaryCodeForInstr(const MCInst &MI,
62  const MCSubtargetInfo &STI) const;
63 
64  // getJumpTargetOpValue - Return binary encoding of the jump
65  // target operand. If the machine operand requires relocation,
66  // record the relocation and return zero.
67  unsigned getJumpTargetOpValue(const MCInst &MI, unsigned OpNo,
69  const MCSubtargetInfo &STI) const;
70 
71  // getBranchJumpOpValueMM - Return binary encoding of the microMIPS jump
72  // target operand. If the machine operand requires relocation,
73  // record the relocation and return zero.
74  unsigned getJumpTargetOpValueMM(const MCInst &MI, unsigned OpNo,
76  const MCSubtargetInfo &STI) const;
77 
78  // getUImm5Lsl2Encoding - Return binary encoding of the microMIPS jump
79  // target operand.
80  unsigned getUImm5Lsl2Encoding(const MCInst &MI, unsigned OpNo,
82  const MCSubtargetInfo &STI) const;
83 
84  unsigned getSImm3Lsa2Value(const MCInst &MI, unsigned OpNo,
86  const MCSubtargetInfo &STI) const;
87 
88  unsigned getUImm6Lsl2Encoding(const MCInst &MI, unsigned OpNo,
90  const MCSubtargetInfo &STI) const;
91 
92  // getSImm9AddiuspValue - Return binary encoding of the microMIPS addiusp
93  // instruction immediate operand.
94  unsigned getSImm9AddiuspValue(const MCInst &MI, unsigned OpNo,
96  const MCSubtargetInfo &STI) const;
97 
98  // getBranchTargetOpValue - Return binary encoding of the branch
99  // target operand. If the machine operand requires relocation,
100  // record the relocation and return zero.
101  unsigned getBranchTargetOpValue(const MCInst &MI, unsigned OpNo,
103  const MCSubtargetInfo &STI) const;
104 
105  // getBranchTarget7OpValue - Return binary encoding of the microMIPS branch
106  // target operand. If the machine operand requires relocation,
107  // record the relocation and return zero.
108  unsigned getBranchTarget7OpValueMM(const MCInst &MI, unsigned OpNo,
110  const MCSubtargetInfo &STI) const;
111 
112  // getBranchTargetOpValueMMPC10 - Return binary encoding of the microMIPS
113  // 10-bit branch target operand. If the machine operand requires relocation,
114  // record the relocation and return zero.
115  unsigned getBranchTargetOpValueMMPC10(const MCInst &MI, unsigned OpNo,
117  const MCSubtargetInfo &STI) const;
118 
119  // getBranchTargetOpValue - Return binary encoding of the microMIPS branch
120  // target operand. If the machine operand requires relocation,
121  // record the relocation and return zero.
122  unsigned getBranchTargetOpValueMM(const MCInst &MI, unsigned OpNo,
124  const MCSubtargetInfo &STI) const;
125 
126  // getBranchTarget21OpValue - Return binary encoding of the branch
127  // offset operand. If the machine operand requires relocation,
128  // record the relocation and return zero.
129  unsigned getBranchTarget21OpValue(const MCInst &MI, unsigned OpNo,
131  const MCSubtargetInfo &STI) const;
132 
133  // getBranchTarget26OpValue - Return binary encoding of the branch
134  // offset operand. If the machine operand requires relocation,
135  // record the relocation and return zero.
136  unsigned getBranchTarget26OpValue(const MCInst &MI, unsigned OpNo,
138  const MCSubtargetInfo &STI) const;
139 
140  // getJumpOffset16OpValue - Return binary encoding of the jump
141  // offset operand. If the machine operand requires relocation,
142  // record the relocation and return zero.
143  unsigned getJumpOffset16OpValue(const MCInst &MI, unsigned OpNo,
145  const MCSubtargetInfo &STI) const;
146 
147  // getMachineOpValue - Return binary encoding of operand. If the machin
148  // operand requires relocation, record the relocation and return zero.
149  unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
151  const MCSubtargetInfo &STI) const;
152 
153  unsigned getMSAMemEncoding(const MCInst &MI, unsigned OpNo,
155  const MCSubtargetInfo &STI) const;
156 
157  unsigned getMemEncoding(const MCInst &MI, unsigned OpNo,
159  const MCSubtargetInfo &STI) const;
160  unsigned getMemEncodingMMImm4(const MCInst &MI, unsigned OpNo,
162  const MCSubtargetInfo &STI) const;
163  unsigned getMemEncodingMMImm4Lsl1(const MCInst &MI, unsigned OpNo,
165  const MCSubtargetInfo &STI) const;
166  unsigned getMemEncodingMMImm4Lsl2(const MCInst &MI, unsigned OpNo,
168  const MCSubtargetInfo &STI) const;
169  unsigned getMemEncodingMMSPImm5Lsl2(const MCInst &MI, unsigned OpNo,
171  const MCSubtargetInfo &STI) const;
172  unsigned getMemEncodingMMGPImm7Lsl2(const MCInst &MI, unsigned OpNo,
174  const MCSubtargetInfo &STI) const;
175  unsigned getMemEncodingMMImm12(const MCInst &MI, unsigned OpNo,
177  const MCSubtargetInfo &STI) const;
178  unsigned getMemEncodingMMImm4sp(const MCInst &MI, unsigned OpNo,
180  const MCSubtargetInfo &STI) const;
181  unsigned getSizeExtEncoding(const MCInst &MI, unsigned OpNo,
183  const MCSubtargetInfo &STI) const;
184  unsigned getSizeInsEncoding(const MCInst &MI, unsigned OpNo,
186  const MCSubtargetInfo &STI) const;
187 
188  // getLSAImmEncoding - Return binary encoding of LSA immediate.
189  unsigned getLSAImmEncoding(const MCInst &MI, unsigned OpNo,
191  const MCSubtargetInfo &STI) const;
192 
193  unsigned getSimm19Lsl2Encoding(const MCInst &MI, unsigned OpNo,
195  const MCSubtargetInfo &STI) const;
196 
197  unsigned getSimm18Lsl3Encoding(const MCInst &MI, unsigned OpNo,
199  const MCSubtargetInfo &STI) const;
200 
201  unsigned getUImm3Mod8Encoding(const MCInst &MI, unsigned OpNo,
203  const MCSubtargetInfo &STI) const;
204  unsigned getUImm4AndValue(const MCInst &MI, unsigned OpNo,
206  const MCSubtargetInfo &STI) const;
207 
208  unsigned getRegisterPairOpValue(const MCInst &MI, unsigned OpNo,
210  const MCSubtargetInfo &STI) const;
211 
212  unsigned getMovePRegPairOpValue(const MCInst &MI, unsigned OpNo,
214  const MCSubtargetInfo &STI) const;
215 
216  unsigned getSimm23Lsl2Encoding(const MCInst &MI, unsigned OpNo,
218  const MCSubtargetInfo &STI) const;
219 
220  unsigned getExprOpValue(const MCExpr *Expr, SmallVectorImpl<MCFixup> &Fixups,
221  const MCSubtargetInfo &STI) const;
222 
223  unsigned getRegisterListOpValue(const MCInst &MI, unsigned OpNo,
225  const MCSubtargetInfo &STI) const;
226 
227  unsigned getRegisterListOpValue16(const MCInst &MI, unsigned OpNo,
229  const MCSubtargetInfo &STI) const;
230 }; // class MipsMCCodeEmitter
231 } // namespace llvm.
232 
233 #endif
void encodeInstruction(const MCInst &MI, raw_ostream &OS, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const override
encodeInstruction - Emit the instruction.
unsigned getRegisterListOpValue16(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getBranchTarget21OpValue(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
getBranchTarget21OpValue - Return binary encoding of the branch target operand.
unsigned getJumpTargetOpValue(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
getJumpTargetOpValue - Return binary encoding of the jump target operand.
unsigned getMemEncodingMMImm4sp(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getSimm23Lsl2Encoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getUImm5Lsl2Encoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getMemEncodingMMImm4(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
void EmitInstruction(uint64_t Val, unsigned Size, const MCSubtargetInfo &STI, raw_ostream &OS) const
unsigned getBranchTarget7OpValueMM(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
getBranchTarget7OpValueMM - Return binary encoding of the microMIPS branch target operand...
unsigned getRegisterListOpValue(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
uint64_t getBinaryCodeForInstr(const MCInst &MI, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getUImm3Mod8Encoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...
Definition: MCFixup.h:62
unsigned getRegisterPairOpValue(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getMemEncodingMMGPImm7Lsl2(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APInt.h:33
Base class for the full range of assembler expressions which are needed for parsing.
Definition: MCExpr.h:33
unsigned getMemEncodingMMImm4Lsl2(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getSizeExtEncoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
Context object for machine code objects.
Definition: MCContext.h:48
unsigned getMovePRegPairOpValue(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getJumpOffset16OpValue(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
getJumpOffset16OpValue - Return binary encoding of the jump target operand.
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:150
MCCodeEmitter - Generic instruction encoding interface.
Definition: MCCodeEmitter.h:23
Interface to description of machine instruction set.
Definition: MCInstrInfo.h:24
unsigned getBranchTarget26OpValue(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
getBranchTarget26OpValue - Return binary encoding of the branch target operand.
unsigned getSimm19Lsl2Encoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getMemEncodingMMImm12(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getUImm4AndValue(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getMemEncodingMMSPImm5Lsl2(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getSImm3Lsa2Value(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getLSAImmEncoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getBranchTargetOpValueMM(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
getBranchTargetOpValue - Return binary encoding of the microMIPS branch target operand.
unsigned getJumpTargetOpValueMM(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getSizeInsEncoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
MipsMCCodeEmitter(const MCInstrInfo &mcii, MCContext &Ctx_, bool IsLittle)
void EmitByte(unsigned char C, raw_ostream &OS) const
unsigned getMemEncoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
getMemEncoding - Return binary encoding of memory related operand.
unsigned getSImm9AddiuspValue(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
MCSubtargetInfo - Generic base class for all target subtargets.
unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
getMachineOpValue - Return binary encoding of operand.
unsigned getMSAMemEncoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
getMSAMemEncoding - Return binary encoding of memory operand for LD/ST instructions.
unsigned getExprOpValue(const MCExpr *Expr, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getSimm18Lsl3Encoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
This class implements an extremely fast bulk output stream that can only output to a stream...
Definition: raw_ostream.h:38
Instances of this class represent operands of the MCInst class.
Definition: MCInst.h:33
unsigned getMemEncodingMMImm4Lsl1(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getUImm6Lsl2Encoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
unsigned getBranchTargetOpValue(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
getBranchTargetOpValue - Return binary encoding of the branch target operand.
unsigned getBranchTargetOpValueMMPC10(const MCInst &MI, unsigned OpNo, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI) const
getBranchTargetOpValueMMPC10 - Return binary encoding of the microMIPS 10-bit branch target operand...