28 FeatureBits =
getFeatures(CPU, FS, ProcDesc, ProcFeatures);
36 FeatureBits =
getFeatures(CPU,
"", ProcDesc, ProcFeatures);
39 MCSubtargetInfo::MCSubtargetInfo(
44 const InstrStage *IS,
const unsigned *
OC,
const unsigned *FP)
45 : TargetTriple(TT), CPU(C), ProcFeatures(PF), ProcDesc(PD),
46 ProcSchedModels(ProcSched), WriteProcResTable(WPR), WriteLatencyTable(WL),
47 ReadAdvanceTable(RA), Stages(IS), OperandCycles(OC), ForwardingPaths(FP) {
67 FeatureBits = Features.
ToggleFeature(FeatureBits, FS, ProcFeatures);
78 assert(ProcSchedModels &&
"Processor machine model not available!");
80 unsigned NumProcs = ProcDesc.size();
82 for (
size_t i = 1; i < NumProcs; i++) {
83 assert(strcmp(ProcSchedModels[i - 1].Key, ProcSchedModels[i].Key) < 0 &&
84 "Processor machine model table is not sorted");
90 std::lower_bound(ProcSchedModels, ProcSchedModels+NumProcs, CPU);
91 if (Found == ProcSchedModels+NumProcs ||
StringRef(Found->
Key) != CPU) {
94 <<
"' is not a recognized processor for this target"
95 <<
" (ignoring processor)\n";
98 assert(Found->
Value &&
"Missing processor SchedModel value");
raw_ostream & errs()
This returns a reference to a raw_ostream for standard error.
InstrItineraryData getInstrItineraryForCPU(StringRef CPU) const
getInstrItineraryForCPU - Get scheduling itinerary of a CPU.
const FeatureBitset Features
SubtargetInfoKV - Used to provide key value pairs for CPU and arbitrary pointers. ...
FeatureBitset ApplyFeatureFlag(FeatureBitset Bits, StringRef Feature, ArrayRef< SubtargetFeatureKV > FeatureTable)
Apply the feature flag and return the newly updated feature bits.
void initInstrItins(InstrItineraryData &InstrItins) const
Initialize an InstrItineraryData instance.
const MCSchedModel & getSchedModelForCPU(StringRef CPU) const
getSchedModelForCPU - Get the machine model of a CPU.
const MCSchedModel & getSchedModel() const
Get the machine model for this subtarget's CPU.
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory)...
void setDefaultFeatures(StringRef CPU)
Set the features to the default for the given CPU.
Itinerary data supplied by a subtarget to be used by a target.
void InitMCProcessorInfo(StringRef CPU, StringRef FS)
Initialize the scheduling model and feature bits.
static const MCSchedModel & GetDefaultSchedModel()
Returns the default initialized model.
FeatureBitset ToggleFeature(uint64_t FB)
ToggleFeature - Toggle a feature and returns the re-computed feature bits.
Identify one of the processor resource kinds consumed by a particular scheduling class for the specif...
FeatureBitset ApplyFeatureFlag(StringRef FS)
Apply a feature flag and return the re-computed feature bits, including all feature bits implied by t...
Triple - Helper class for working with autoconf configuration names.
Specify the latency in cpu cycles for a particular scheduling class and def index.
SubtargetFeatures - Manages the enabling and disabling of subtarget specific features.
Specify the number of cycles allowed after instruction issue before a particular use operand reads it...
FeatureBitset ToggleFeature(FeatureBitset Bits, StringRef String, ArrayRef< SubtargetFeatureKV > FeatureTable)
ToggleFeature - Toggle a feature and returns the newly updated feature bits.
These values represent a non-pipelined step in the execution of an instruction.
StringRef - Represent a constant reference to a string, i.e.
static FeatureBitset getFeatures(StringRef CPU, StringRef FS, ArrayRef< SubtargetFeatureKV > ProcDesc, ArrayRef< SubtargetFeatureKV > ProcFeatures)
FeatureBitset getFeatureBits(StringRef CPU, ArrayRef< SubtargetFeatureKV > CPUTable, ArrayRef< SubtargetFeatureKV > FeatureTable)
Get feature bits of a CPU.
Machine model for scheduling, bundling, and heuristics.
bool empty() const
empty - Check if the string is empty.