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LLVM
3.7.0
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Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation. More...
#include <SelectionDAGNodes.h>
Public Member Functions | |
| SDValue () | |
| SDValue (SDNode *node, unsigned resno) | |
| unsigned | getResNo () const |
| get the index which selects a specific result in the SDNode More... | |
| SDNode * | getNode () const |
| get the SDNode which holds the desired result More... | |
| void | setNode (SDNode *N) |
| set the SDNode More... | |
| SDNode * | operator-> () const |
| bool | operator== (const SDValue &O) const |
| bool | operator!= (const SDValue &O) const |
| bool | operator< (const SDValue &O) const |
| operator bool () const | |
| SDValue | getValue (unsigned R) const |
| bool | isOperandOf (const SDNode *N) const |
| isOperand - Return true if this node is an operand of N. More... | |
| EVT | getValueType () const |
| Return the ValueType of the referenced return value. More... | |
| MVT | getSimpleValueType () const |
| Return the simple ValueType of the referenced return value. More... | |
| unsigned | getValueSizeInBits () const |
| Returns the size of the value in bits. More... | |
| unsigned | getScalarValueSizeInBits () const |
| unsigned | getOpcode () const |
| unsigned | getNumOperands () const |
| const SDValue & | getOperand (unsigned i) const |
| uint64_t | getConstantOperandVal (unsigned i) const |
| bool | isTargetMemoryOpcode () const |
| bool | isTargetOpcode () const |
| bool | isMachineOpcode () const |
| unsigned | getMachineOpcode () const |
| const DebugLoc & | getDebugLoc () const |
| void | dump () const |
| void | dumpr () const |
| bool | reachesChainWithoutSideEffects (SDValue Dest, unsigned Depth=2) const |
| Return true if this operand (which must be a chain) reaches the specified operand without crossing any side-effecting instructions. More... | |
| bool | use_empty () const |
| Return true if there are no nodes using value ResNo of Node. More... | |
| bool | hasOneUse () const |
| Return true if there is exactly one node using value ResNo of Node. More... | |
Friends | |
| struct | DenseMapInfo< SDValue > |
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
Many nodes return multiple values, from loads (which define a token and a return value) to ADDC (which returns a result and a carry value), to calls (which may return an arbitrary number of values).
As such, each use of a SelectionDAG computation must indicate the node that computes it as well as which return value to use from that node. This pair of information is represented with the SDValue value type.
Definition at line 105 of file SelectionDAGNodes.h.
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Definition at line 111 of file SelectionDAGNodes.h.
Referenced by getValue().
Definition at line 878 of file SelectionDAGNodes.h.
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Definition at line 921 of file SelectionDAGNodes.h.
References llvm::SDNode::dump().
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Definition at line 924 of file SelectionDAGNodes.h.
References llvm::SDNode::dumpr().
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Definition at line 897 of file SelectionDAGNodes.h.
References llvm::SDNode::getConstantOperandVal().
Referenced by checkBoolTestSetCCCombine(), CMPEQCombine(), FoldMaskAndShiftToExtract(), FoldMaskAndShiftToScale(), FoldMaskedShiftToScaledMask(), llvm::SelectionDAG::getNode(), llvm::SelectionDAG::InferPtrAlignment(), LowerAsSplatVectorLoad(), LowerFRAMEADDR(), LowerRETURNADDR(), OptimizeConditionalInDecrement(), and PeepholePPC64ZExtGather().
Definition at line 918 of file SelectionDAGNodes.h.
References llvm::SDNode::getDebugLoc().
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Definition at line 909 of file SelectionDAGNodes.h.
References llvm::SDNode::getMachineOpcode().
Referenced by FoldOperand(), and PeepholePPC64ZExtGather().
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get the SDNode which holds the desired result
Definition at line 118 of file SelectionDAGNodes.h.
Referenced by AddCombineTo64bitMLAL(), AddCombineToVPADDL(), llvm::DOTGraphTraits< SelectionDAG * >::addCustomGraphFeatures(), AddGlue(), BuildExactSDIV(), buildFromShuffleMostly(), llvm::TargetLowering::BuildSDIV(), llvm::PPCTargetLowering::BuildSDIVPow2(), llvm::TargetLowering::BuildUDIV(), buildVector(), canChangeToInt(), canFoldInAddressingMode(), CanFoldXORWithAllOnes(), ChangeVSETULTtoVSETULE(), checkBoolTestSetCCCombine(), llvm::checkForCycles(), checkForCyclesHelper(), CheckForMaskedLoad(), checkHighLaneIndex(), checkV64LaneV128(), checkValueWidth(), ChooseConstraint(), CombineBaseUpdate(), combineRedundantDWordShuffle(), combineRedundantHalfShuffle(), combineSelectAndUse(), combineSelectAndUseCommutative(), CombineVLDDUP(), combineX86ShuffleChain(), combineX86ShufflesRecursively(), llvm::SelectionDAG::computeKnownBits(), computeZeroableShuffleElements(), ConvertI1VectorToInterger(), ConvertSelectToConcatVector(), EltsFromConsecutiveLoads(), emitCmp(), emitIntrinsicWithChainAndGlue(), EmitVectorComparison(), llvm::TargetLowering::expandMUL(), ExpandPowI(), llvm::PPCTargetLowering::expandVSXLoadForLE(), llvm::PPCTargetLowering::expandVSXStoreForLE(), ExtendUsesToFormExtLoad(), findConsecutiveLoad(), findUser(), FoldOperand(), GenerateTBL(), llvm::PPC::get_VSPLTI_elt(), getAArch64Cmp(), getBuildPairElt(), llvm::SelectionDAG::getCALLSEQ_END(), llvm::SelectionDAG::getCopyFromReg(), llvm::SelectionDAG::getCopyToReg(), llvm::ScheduleDAGSDNodes::getCustomGraphFeatures(), llvm::DOTGraphTraits< SelectionDAG * >::getEdgeAttributes(), getExtractVEXTRACTImmediate(), llvm::MipsDAGToDAGISel::getGlobalBaseReg(), llvm::SDNode::getGluedNode(), llvm::DenseMapInfo< SDValue >::getHashValue(), getInsertVINSERTImmediate(), llvm::SelectionDAG::getMemcpy(), getMemcpyLoadsAndStores(), llvm::SelectionDAG::getMemmove(), llvm::SelectionDAG::getMemset(), llvm::SDUse::getNode(), llvm::SelectionDAG::getNode(), llvm::SelectionDAGBuilder::getNonRegisterValue(), llvm::MipsTargetLowering::getOpndList(), llvm::HexagonTargetLowering::getPostIndexedAddressParts(), llvm::ARMTargetLowering::getPreIndexedAddressParts(), llvm::PPCTargetLowering::getPreIndexedAddressParts(), getPSHUFShuffleMask(), getShuffleScalarElt(), llvm::simplify_type< SDValue >::getSimplifiedValue(), llvm::simplify_type< const SDValue >::getSimplifiedValue(), getTargetShuffleMask(), getTargetVShiftByConstNode(), getUsefulBits(), getUsefulBitsFromAndWithImmediate(), getUsefulBitsFromBFM(), getUsefulBitsFromOrWithShiftedReg(), getUsefulBitsFromUBFM(), llvm::SelectionDAGBuilder::getValue(), llvm::SelectionDAGBuilder::getValueImpl(), getVShiftImm(), hasNormalLoadOperand(), llvm::SDNode::hasPredecessorHelper(), llvm::SelectionDAG::InferPtrAlignment(), insertDAGNode(), InsertDAGNode(), isAddSubSExt(), isAddSubZExt(), isBitfieldExtractOp(), isBitfieldExtractOpFromAnd(), isBitfieldExtractOpFromShr(), isBitfieldInsertOpFromOr(), isBitfieldPositioningOp(), isBLACompatibleAddress(), isBSwapHWordElement(), llvm::ISD::isBuildVectorAllOnes(), llvm::ISD::isBuildVectorAllZeros(), isCalleeLoad(), llvm::SelectionDAG::isConsecutiveLoad(), isConsecutiveLSLoc(), isConstantFPBuildVectorOrConstantFP(), isConstantIntBuildVectorOrConstantInt(), llvm::X86TargetLowering::IsDesirableToPromoteOp(), isExtendedBUILD_VECTOR(), isFloatingPointZero(), llvm::TargetLowering::isGAPlusOffset(), isHorizontalBinOp(), isInt32Immediate(), isIntImmediate(), isIntS16Immediate(), llvm::SelectionDAGISel::IsLegalToFold(), isLoadIncOrDecStore(), isNaturalMemoryOperand(), isOpcWithIntImmediate(), llvm::SDNode::isOperandOf(), IsPredicateKnownToFail(), isSeveralBitsExtractOpFromShr(), isShuffleFoldableLoad(), llvm::ARMTargetLowering::isVectorLoadExtDesirable(), isVEXTRACTIndex(), isVINSERTIndex(), isVSplat(), isX86LogicalCmp(), llvm::SelectionDAG::Legalize(), LowerADDC_ADDE_SUBC_SUBE(), llvm::SparcTargetLowering::LowerAsmOperandForConstraint(), llvm::ARMTargetLowering::LowerAsmOperandForConstraint(), llvm::PPCTargetLowering::LowerAsmOperandForConstraint(), llvm::X86TargetLowering::LowerAsmOperandForConstraint(), LowerATOMIC_STORE(), llvm::HexagonTargetLowering::LowerBUILD_VECTOR(), LowerBuildVectorv16i8(), llvm::HexagonTargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::NVPTXTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), lowerCallFromStatepoint(), llvm::TargetLowering::LowerCallTo(), LowerCONCAT_VECTORSvXi1(), lowerCTPOP32BitElements(), lowerDSPIntr(), llvm::HexagonTargetLowering::LowerDYNAMIC_STACKALLOC(), LowerExtendedLoad(), LowerEXTRACT_VECTOR_ELT_SSE4(), LowerF128Load(), LowerF128Store(), llvm::NVPTXTargetLowering::LowerFormalArguments(), llvm::HexagonTargetLowering::LowerINLINEASM(), LowerINTRINSIC_W_CHAIN(), LowerINTRINSIC_WO_CHAIN(), LowerLOAD_SUB(), LowerMGATHER(), lowerMSABinaryBitImmIntr(), LowerMSCATTER(), LowerMUL(), llvm::R600TargetLowering::LowerOperation(), llvm::SITargetLowering::LowerOperation(), llvm::XCoreTargetLowering::LowerOperation(), llvm::HexagonTargetLowering::LowerOperation(), llvm::AMDGPUTargetLowering::LowerOperation(), llvm::ARMTargetLowering::LowerOperation(), llvm::TargetLowering::LowerOperationWrapper(), LowerREADCYCLECOUNTER(), llvm::HexagonTargetLowering::LowerReturn(), llvm::SystemZTargetLowering::LowerReturn(), llvm::SparcTargetLowering::LowerReturn_32(), llvm::SparcTargetLowering::LowerReturn_64(), LowerScalarVariableShift(), LowerShift(), llvm::MSP430TargetLowering::LowerShifts(), llvm::SelectionDAGBuilder::LowerStatepoint(), lowerStatepointMetaArgs(), llvm::AMDGPUTargetLowering::LowerSTORE(), lowerV2X128VectorShuffle(), LowerVAARG(), LowerVECTOR_SHIFT(), LowerVECTOR_SHUFFLE(), LowerVECTOR_SHUFFLEv8i8(), LowerVectorAllZeroTest(), LowerVectorBroadcast(), LowerVectorCTPOP(), LowerVectorFP_TO_INT(), LowerVectorINT_TO_FP(), lowerVSELECTtoVectorShuffle(), LowerVSETCC(), LowerXALUO(), MayFoldIntoStore(), MayFoldLoad(), MoveBelowOrigChain(), llvm::SDNodeIterator::operator*(), PeepholePPC64ZExtGather(), PerformADDCombine(), PerformADDCombineWithOperands(), performAddSubLongCombine(), PerformANDCombine(), PerformAndCombine(), PerformARMBUILD_VECTORCombine(), performBRCONDCombine(), PerformBUILD_VECTORCombine(), llvm::ARMTargetLowering::PerformCMOVCombine(), PerformCMOVCombine(), performCONDCombine(), llvm::R600TargetLowering::PerformDAGCombine(), llvm::MipsSETargetLowering::PerformDAGCombine(), llvm::SystemZTargetLowering::PerformDAGCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), performExtendCombine(), PerformEXTRACT_VECTOR_ELTCombine(), PerformInsertEltCombine(), performIntegerAbsCombine(), PerformINTRINSIC_WO_CHAINCombine(), performIntToFpCombine(), PerformISDSETCCCombine(), PerformMULCombine(), performNEONPostLDSTCombine(), performORCombine(), PerformORCombine(), PerformOrCombine(), performPostLD1Combine(), PerformSELECTCombine(), PerformSETCCCombine(), PerformSHLCombine(), PerformShuffleCombine(), PerformShuffleCombine256(), PerformSIGN_EXTEND_INREGCombine(), PerformSINT_TO_FPCombine(), PerformSTORECombine(), PerformSUBCombine(), PerformTargetShuffleCombine(), PerformVDIVCombine(), PerformVMOVDRRCombine(), PerformVMOVRRDCombine(), performXORCombine(), PerformXORCombine(), PrepareCall(), llvm::SDNode::print(), llvm::ResourcePriorityQueue::rawRegPressureDelta(), llvm::SelectionDAG::ReplaceAllUsesOfValuesWith(), llvm::SelectionDAG::ReplaceAllUsesOfValueWith(), llvm::SelectionDAG::ReplaceAllUsesWith(), ReplaceINTRINSIC_W_CHAIN(), llvm::AMDGPUTargetLowering::ReplaceNodeResults(), llvm::ARMTargetLowering::ReplaceNodeResults(), llvm::X86TargetLowering::ReplaceNodeResults(), reservePreviousStackSlotForValue(), llvm::SelectionDAGBuilder::resolveDanglingDebugInfo(), llvm::DAGTypeLegalizer::run(), llvm::ResourcePriorityQueue::scheduledNode(), llvm::SelectionDAGISel::SelectCodeCommon(), selectMADD(), selectMSUB(), llvm::SelectionDAG::setRoot(), llvm::SelectionDAGBuilder::setUnusedArgValue(), llvm::SelectionDAGBuilder::setValue(), llvm::TargetLowering::TargetLoweringOpt::ShrinkDemandedConstant(), llvm::TargetLowering::TargetLoweringOpt::ShrinkDemandedOp(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifySetCC(), SkipExtensionForVMULL(), spillIncomingStatepointValue(), llvm::SelectionDAG::TransferDbgValues(), transformVSELECTtoBlendVECTOR_SHUFFLE(), TranslateX86CC(), tryBuildVectorShuffle(), tryCombineLongOpWithDup(), tryToFoldExtendOfConstant(), useDivRem(), useSinCos(), ValueHasExactlyOneBitSet(), and XFormVExtractWithShuffleIntoLoad().
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Definition at line 891 of file SelectionDAGNodes.h.
References llvm::SDNode::getNumOperands().
Referenced by buildFromShuffleMostly(), CheckChildInteger(), CheckChildSame(), CheckChildType(), computeZeroableShuffleElements(), ConvertI1VectorToInterger(), llvm::InstrEmitter::EmitDbgValue(), emitIntrinsicWithChainAndGlue(), emitIntrinsicWithGlue(), llvm::SelectionDAG::getNode(), isCalleeLoad(), isLoadIncOrDecStore(), isScalarToVector(), LowerAVXCONCAT_VECTORS(), llvm::HexagonTargetLowering::LowerCONCAT_VECTORS(), LowerCONCAT_VECTORS(), LowerCONCAT_VECTORSvXi1(), LowerINTRINSIC_WO_CHAIN(), LowerScalarImmediateShift(), LowerScalarVariableShift(), LowerShiftParts(), LowerVECTOR_SHUFFLE(), lowerVectorShuffleAsBroadcast(), MoveBelowOrigChain(), partitionShuffleOfConcats(), PerformVECTOR_SHUFFLECombine(), reachesChainWithoutSideEffects(), llvm::SelectionDAGISel::SelectCodeCommon(), llvm::TargetLowering::TargetLoweringOpt::ShrinkDemandedOp(), and XFormVExtractWithShuffleIntoLoad().
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Definition at line 885 of file SelectionDAGNodes.h.
References llvm::SDNode::getOpcode().
Referenced by AddCombineToVPADDL(), buildFromShuffleMostly(), buildMergeScalars(), buildScalarToVector(), buildVector(), CanFoldXORWithAllOnes(), checkBoolTestAndOrSetCCCombine(), checkBoolTestSetCCCombine(), checkHighLaneIndex(), CMPEQCombine(), combineConcatVectorOfScalars(), combineRedundantDWordShuffle(), combineRedundantHalfShuffle(), combineX86ShufflesRecursively(), CompactSwizzlableVector(), llvm::SelectionDAG::computeKnownBits(), llvm::SparcTargetLowering::computeKnownBitsForTargetNode(), llvm::AMDGPUTargetLowering::computeKnownBitsForTargetNode(), llvm::AArch64TargetLowering::computeKnownBitsForTargetNode(), llvm::ARMTargetLowering::computeKnownBitsForTargetNode(), llvm::PPCTargetLowering::computeKnownBitsForTargetNode(), llvm::X86TargetLowering::computeKnownBitsForTargetNode(), llvm::TargetLowering::computeKnownBitsForTargetNode(), llvm::SelectionDAG::ComputeNumSignBits(), llvm::AMDGPUTargetLowering::ComputeNumSignBitsForTargetNode(), llvm::X86TargetLowering::ComputeNumSignBitsForTargetNode(), llvm::TargetLowering::ComputeNumSignBitsForTargetNode(), computeZeroableShuffleElements(), ConvertI1VectorToInterger(), ConvertSelectToConcatVector(), llvm::SelectionDAGBuilder::CopyValueToVirtualRegister(), createFPCmp(), EltsFromConsecutiveLoads(), EmitCMP(), emitComparison(), ExpandBVWithShuffles(), ExtractSubVector(), FindBaseOffset(), findEXTRHalf(), FoldIntToFPToInt(), FoldMaskAndShiftToExtract(), FoldMaskAndShiftToScale(), FoldMaskedShiftToScaledMask(), llvm::PPC::get_VSPLTI_elt(), getAArch64XALUOOp(), getARMIndexedAddressParts(), getAtomicLoadArithTargetConstant(), getBuildPairElt(), getCmp(), llvm::SelectionDAGBuilder::getControlRoot(), getExtendTypeForNode(), getGatherNode(), llvm::SelectionDAG::getIndexedLoad(), llvm::SelectionDAG::getIndexedStore(), llvm::SelectionDAG::getLoad(), getMemcpyLoadsAndStores(), getMemmoveLoadsAndStores(), getMemsetStores(), getMemsetValue(), GetNegatedExpression(), llvm::SelectionDAG::getNode(), getPSHUFShuffleMask(), getScalarMaskingNode(), getScalarValueForVectorElement(), getShiftTypeForNode(), getShuffleScalarElt(), llvm::BuildVectorSDNode::getSplatValue(), getTargetVShiftNode(), getTruncatedArgReg(), getVectorMaskingNode(), llvm::SelectionDAG::getVectorShuffle(), getVShiftImm(), InferPointerInfo(), Insert128BitVector(), InsertSubVector(), isAbsolute(), isADDADDMUL(), isAndOrOfSetCCs(), llvm::SelectionDAG::isBaseWithConstantOffset(), isBSwapHWordElement(), llvm::ISD::isBuildVectorAllOnes(), isCalleeLoad(), llvm::SelectionDAG::isConsecutiveLoad(), isConsecutiveLSLoc(), llvm::BuildVectorSDNode::isConstant(), llvm::BuildVectorSDNode::isConstantSplat(), llvm::AArch64TargetLowering::isDesirableToCommuteWithShift(), llvm::X86TargetLowering::IsDesirableToPromoteOp(), isEssentiallyExtractSubvector(), isFloatingPointZero(), isFrameIndexOp(), isFunctionGlobalAddress(), isHorizontalBinOp(), llvm::SelectionDAG::isKnownNeverZero(), isLoadIncOrDecStore(), isMemSrcFromString(), IsMulWideOperandDemotable(), isNegatibleForFree(), llvm::ISD::isScalarToVector(), isScalarToVector(), isSetCC(), isSetCCOrZExtSetCC(), isSExtFree(), isShuffleFoldableLoad(), isTruncWithZeroHighBitsInput(), isXor1OfSetCC(), llvm::XCoreTargetLowering::isZExtFree(), llvm::ARMTargetLowering::isZExtFree(), llvm::AArch64TargetLowering::isZExtFree(), llvm::X86TargetLowering::isZExtFree(), joinDwords(), LookThroughSetCC(), Lower256IntArith(), Lower256IntVSETCC(), LowerADDC_ADDE_SUBC_SUBE(), llvm::X86TargetLowering::LowerAsmOperandForConstraint(), llvm::TargetLowering::LowerAsmOperandForConstraint(), LowerAVXExtend(), llvm::HexagonTargetLowering::LowerBUILD_VECTOR(), LowerBuildVectorv4x32(), LowerCONCAT_VECTORS(), lowerDSPIntr(), llvm::HexagonTargetLowering::LowerEXTRACT_VECTOR(), LowerF128Load(), LowerF128Store(), LowerFABSorFNEG(), LowerFNEGorFABS(), lowerFP_TO_SINT_STORE(), LowerINSERT_SUBVECTOR(), llvm::HexagonTargetLowering::LowerINSERT_VECTOR(), llvm::R600TargetLowering::LowerOperation(), llvm::MipsSETargetLowering::LowerOperation(), llvm::BPFTargetLowering::LowerOperation(), llvm::SparcTargetLowering::LowerOperation(), llvm::MSP430TargetLowering::LowerOperation(), llvm::SITargetLowering::LowerOperation(), llvm::XCoreTargetLowering::LowerOperation(), llvm::HexagonTargetLowering::LowerOperation(), llvm::AMDGPUTargetLowering::LowerOperation(), llvm::ARMTargetLowering::LowerOperation(), llvm::MipsTargetLowering::LowerOperation(), llvm::AArch64TargetLowering::LowerOperation(), llvm::SystemZTargetLowering::LowerOperation(), llvm::NVPTXTargetLowering::LowerOperation(), llvm::PPCTargetLowering::LowerOperation(), llvm::X86TargetLowering::LowerOperation(), LowerScalarImmediateShift(), LowerScalarVariableShift(), llvm::MSP430TargetLowering::LowerSETCC(), LowerShift(), LowerShiftParts(), llvm::MSP430TargetLowering::LowerShifts(), LowerSIGN_EXTEND_AVX512(), LowerToAddSub(), LowerToHorizontalOp(), LowerUMULO_SMULO(), LowerVECTOR_SHIFT(), LowerVECTOR_SHUFFLE(), LowerVectorAllZeroTest(), LowerVectorBroadcast(), LowerVectorFP_TO_INT(), LowerVectorINT_TO_FP(), lowerVectorShuffle(), lowerVectorShuffleAsBroadcast(), LowerVSETCC(), LowerXALUO(), LowerXOR(), MatchingStackOffset(), MatchRotateHalf(), matchRotateSub(), MoveBelowOrigChain(), NormalizeBuildVector(), OptimizeConditionalInDecrement(), partitionShuffleOfConcats(), performADDCombine(), PerformADDCombineWithOperands(), performAddSubLongCombine(), performANDCombine(), PerformANDCombine(), PerformAndCombine(), PerformARMBUILD_VECTORCombine(), PerformBFICombine(), performBRCONDCombine(), llvm::ARMTargetLowering::PerformCMOVCombine(), PerformCMOVCombine(), performCONDCombine(), llvm::R600TargetLowering::PerformDAGCombine(), llvm::SITargetLowering::PerformDAGCombine(), llvm::AMDGPUTargetLowering::PerformDAGCombine(), llvm::SystemZTargetLowering::PerformDAGCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), performExtendCombine(), PerformExtendCombine(), PerformEXTRACT_VECTOR_ELTCombine(), PerformFMACombine(), performIntegerAbsCombine(), PerformISDSETCCCombine(), PerformMLOADCombine(), performORCombine(), PerformORCombine(), PerformOrCombine(), performSELECTCombine(), performSelectCombine(), PerformSELECTCombine(), PerformSExtCombine(), PerformShiftCombine(), PerformSHLCombine(), PerformShuffleCombine(), PerformShuffleCombine256(), PerformSIGN_EXTEND_INREGCombine(), PerformSINT_TO_FPCombine(), PerformSTORECombine(), PerformSubCombine(), PerformTargetShuffleCombine(), PerformVCVTCombine(), PerformVDIVCombine(), PerformVDUPLANECombine(), PerformVECTOR_SHUFFLECombine(), PerformVMOVDRRCombine(), PerformVMOVRRDCombine(), PerformVMULCombine(), performVSELECTCombine(), performVSelectCombine(), PerformVZEXT_MOVLCombine(), performVZEXTCombine(), PerformZExtCombine(), reachesChainWithoutSideEffects(), llvm::AArch64TargetLowering::ReconstructShuffle(), ReorganizeVector(), replaceSplatVectorStore(), llvm::PPCTargetLowering::SelectAddressRegImm(), llvm::PPCTargetLowering::SelectAddressRegReg(), llvm::PPCTargetLowering::SelectAddressRegRegOnly(), llvm::SelectionDAGISel::SelectCodeCommon(), selectMADD(), selectMSUB(), llvm::X86TargetLowering::shouldReduceLoadWidth(), llvm::TargetLowering::TargetLoweringOpt::ShrinkDemandedConstant(), llvm::TargetLowering::TargetLoweringOpt::ShrinkDemandedOp(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifySetCC(), simplifyShuffleOperandRecursively(), transformVSELECTtoBlendVECTOR_SHUFFLE(), tryBuildVectorByteMask(), tryBuildVectorShuffle(), tryCombineCRC32(), tryCombineFixedPointConvert(), tryCombineToBSL(), tryExtendDUPToExtractHigh(), tryLowerToSLI(), ValueHasExactlyOneBitSet(), VectorZextCombine(), WidenMaskArithmetic(), and XFormVExtractWithShuffleIntoLoad().
Definition at line 894 of file SelectionDAGNodes.h.
References llvm::SDNode::getOperand().
Referenced by llvm::X86TargetLowering::BuildFILD(), buildFromShuffleMostly(), CanFoldXORWithAllOnes(), CheckAndImm(), checkBoolTestSetCCCombine(), CheckChildInteger(), CheckChildSame(), CheckChildType(), checkHighLaneIndex(), CheckOrImm(), combineConcatVectorOfScalars(), combineRedundantDWordShuffle(), combineRedundantHalfShuffle(), combineX86ShuffleChain(), combineX86ShufflesRecursively(), CompactSwizzlableVector(), llvm::SelectionDAG::computeKnownBits(), llvm::SparcTargetLowering::computeKnownBitsForTargetNode(), llvm::AMDGPUTargetLowering::computeKnownBitsForTargetNode(), llvm::AArch64TargetLowering::computeKnownBitsForTargetNode(), llvm::ARMTargetLowering::computeKnownBitsForTargetNode(), llvm::PPCTargetLowering::computeKnownBitsForTargetNode(), llvm::X86TargetLowering::computeKnownBitsForTargetNode(), llvm::SelectionDAG::ComputeNumSignBits(), llvm::AMDGPUTargetLowering::ComputeNumSignBitsForTargetNode(), computeZeroableShuffleElements(), ConvertI1VectorToInterger(), ConvertSelectToConcatVector(), llvm::SelectionDAGBuilder::CopyValueToVirtualRegister(), createCMovFP(), createFPCmp(), EltsFromConsecutiveLoads(), emitComparison(), emitIntrinsicWithChainAndGlue(), emitIntrinsicWithGlue(), FindBaseOffset(), findEXTRHalf(), FoldIntToFPToInt(), FoldMaskAndShiftToExtract(), FoldMaskAndShiftToScale(), FoldMaskedShiftToScaledMask(), FoldOperand(), GenerateTBL(), getAArch64XALUOOp(), getAltivecCompareInfo(), getAtomicLoadArithTargetConstant(), getBuildPairElt(), getExtendTypeForNode(), GetNegatedExpression(), llvm::SelectionDAG::getNode(), getScalarValueForVectorElement(), getShuffleScalarElt(), getTargetVShiftNode(), getTruncatedArgReg(), getUsefulBitsFromAndWithImmediate(), getUsefulBitsFromBFM(), getUsefulBitsFromOrWithShiftedReg(), getUsefulBitsFromUBFM(), getVShiftImm(), InferPointerInfo(), llvm::SelectionDAG::InferPtrAlignment(), isAbsolute(), isADDADDMUL(), isAndOrOfSetCCs(), llvm::SelectionDAG::isBaseWithConstantOffset(), isBitfieldExtractOpFromAnd(), isBitfieldExtractOpFromShr(), isBitfieldPositioningOp(), isBSwapHWordElement(), isCalleeLoad(), llvm::SelectionDAG::isConsecutiveLoad(), isConsecutiveLSLoc(), isConstVecPow2(), llvm::X86TargetLowering::IsDesirableToPromoteOp(), isEssentiallyExtractSubvector(), isFloatingPointZero(), isFrameIndexOp(), isHorizontalBinOp(), isIntrinsicWithCC(), isIntrinsicWithCCAndChain(), llvm::SelectionDAG::isKnownNeverZero(), isLoadIncOrDecStore(), isMemSrcFromString(), IsMulWideOperandDemotable(), isNegatibleForFree(), isScalarToVector(), isSetCC(), isSeveralBitsExtractOpFromShr(), isSExtFree(), isShuffleFoldableLoad(), isSimpleShift(), isTruncWithZeroHighBitsInput(), isXor1OfSetCC(), LookThroughSetCC(), Lower256IntArith(), Lower256IntVSETCC(), LowerADD(), LowerADDC_ADDE_SUBC_SUBE(), LowerADJUST_TRAMPOLINE(), llvm::X86TargetLowering::LowerAsmOperandForConstraint(), llvm::TargetLowering::LowerAsmOperandForConstraint(), LowerAsSplatVectorLoad(), llvm::HexagonTargetLowering::LowerATOMIC_FENCE(), LowerATOMIC_FENCE(), LowerAVXCONCAT_VECTORS(), LowerBITCAST(), LowerBoolVSETCC_AVX512(), llvm::MSP430TargetLowering::LowerBR_CC(), LowerBR_CC(), llvm::HexagonTargetLowering::LowerBR_JT(), LowerBuildVectorv16i8(), LowerBuildVectorv4x32(), LowerBuildVectorv8i16(), llvm::SparcTargetLowering::LowerCall_64(), LowerCMP_SWAP(), llvm::HexagonTargetLowering::LowerCONCAT_VECTORS(), LowerCONCAT_VECTORS(), LowerCONCAT_VECTORSvXi1(), LowerCTLZ(), LowerCTLZ_ZERO_UNDEF(), llvm::HexagonTargetLowering::LowerCTPOP(), LowerCTTZ(), llvm::AMDGPUTargetLowering::LowerDIVREM24(), llvm::HexagonTargetLowering::LowerDYNAMIC_STACKALLOC(), LowerDYNAMIC_STACKALLOC(), llvm::HexagonTargetLowering::LowerEH_RETURN(), LowerEXTRACT_SUBVECTOR(), llvm::HexagonTargetLowering::LowerEXTRACT_VECTOR(), LowerEXTRACT_VECTOR_ELT(), LowerEXTRACT_VECTOR_ELT_SSE4(), LowerF128_FPEXTEND(), LowerF128_FPROUND(), llvm::SparcTargetLowering::LowerF128Op(), LowerF64Op(), LowerFABSorFNEG(), LowerFCOPYSIGN(), lowerFCOPYSIGN32(), lowerFCOPYSIGN64(), LowerFGETSIGN(), LowerFNEGorFABS(), LowerFP_EXTEND(), LowerFP_TO_SINT(), lowerFP_TO_SINT_STORE(), LowerFP_TO_UINT(), llvm::MSP430TargetLowering::LowerFRAMEADDR(), llvm::HexagonTargetLowering::LowerFRAMEADDR(), LowerFSINCOS(), LowerINSERT_SUBVECTOR(), llvm::HexagonTargetLowering::LowerINSERT_VECTOR(), LowerINSERT_VECTOR_ELT(), LowerINTRINSIC_W_CHAIN(), LowerINTRINSIC_WO_CHAIN(), llvm::AMDGPUTargetLowering::LowerIntrinsicIABS(), llvm::AMDGPUTargetLowering::LowerIntrinsicLRP(), LowerIntVSETCC_AVX512(), llvm::AMDGPUTargetLowering::LowerLOAD(), llvm::HexagonTargetLowering::LowerLOAD(), LowerMUL(), LowerMUL_LOHI(), llvm::R600TargetLowering::LowerOperation(), llvm::SystemZTargetLowering::LowerOperation(), LowerPREFETCH(), llvm::MSP430TargetLowering::LowerRETURNADDR(), llvm::HexagonTargetLowering::LowerRETURNADDR(), LowerReverse_VECTOR_SHUFFLEv16i8_v8i16(), LowerSCALAR_TO_VECTOR(), LowerScalarImmediateShift(), LowerScalarVariableShift(), LowerSDIV(), llvm::AMDGPUTargetLowering::LowerSDIVREM(), LowerSEHRESTOREFRAME(), llvm::MSP430TargetLowering::LowerSELECT_CC(), LowerSELECT_CC(), llvm::MSP430TargetLowering::LowerSETCC(), llvm::HexagonTargetLowering::LowerSETCC(), LowerShift(), LowerShiftParts(), llvm::MSP430TargetLowering::LowerSIGN_EXTEND(), LowerSIGN_EXTEND_AVX512(), LowerSINT_TO_FP(), LowerSUB(), LowerToAddSub(), LowerUDIV(), llvm::AMDGPUTargetLowering::LowerUDIVREM(), llvm::AMDGPUTargetLowering::LowerUDIVREM64(), LowerUINT_TO_FP(), LowerUMULO_SMULO(), LowerVACOPY(), llvm::MSP430TargetLowering::LowerVASTART(), llvm::HexagonTargetLowering::LowerVASTART(), LowerVASTART(), LowerVECTOR_SHIFT(), LowerVECTOR_SHUFFLE(), LowerVECTOR_SHUFFLEv8i8(), LowerVectorBroadcast(), LowerVectorCTPOP(), LowerVectorFP_TO_INT(), LowerVectorINT_TO_FP(), lowerVectorShuffle(), lowerVectorShuffleAsBroadcast(), llvm::HexagonTargetLowering::LowerVSELECT(), lowerVSELECTtoVectorShuffle(), LowerVSETCC(), LowerXOR(), LowerZERO_EXTEND(), MatchingStackOffset(), matchIntegerMINMAX(), MatchRotateHalf(), matchRotateSub(), MoveBelowOrigChain(), NormalizeBuildVector(), OptimizeConditionalInDecrement(), partitionShuffleOfConcats(), PeepholePPC64ZExtGather(), performADDCombine(), PerformADDCombineWithOperands(), performAddSubLongCombine(), performANDCombine(), PerformAndCombine(), PerformARMBUILD_VECTORCombine(), PerformBFICombine(), PerformBITCASTCombine(), performBRCONDCombine(), llvm::ARMTargetLowering::PerformCMOVCombine(), PerformCMOVCombine(), llvm::R600TargetLowering::PerformDAGCombine(), llvm::SITargetLowering::PerformDAGCombine(), llvm::AMDGPUTargetLowering::PerformDAGCombine(), llvm::SystemZTargetLowering::PerformDAGCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), PerformExtendCombine(), PerformEXTRACT_VECTOR_ELTCombine(), PerformFMACombine(), performIntegerAbsCombine(), PerformINTRINSIC_WO_CHAINCombine(), PerformISDSETCCCombine(), performORCombine(), PerformORCombine(), PerformOrCombine(), performSELECTCombine(), performSelectCombine(), PerformSELECTCombine(), PerformSExtCombine(), PerformShiftCombine(), PerformSHLCombine(), PerformShuffleCombine(), PerformShuffleCombine256(), PerformSIGN_EXTEND_INREGCombine(), PerformSTORECombine(), PerformSubCombine(), PerformTargetShuffleCombine(), PerformVDIVCombine(), PerformVDUPLANECombine(), PerformVECTOR_SHUFFLECombine(), PerformVMOVDRRCombine(), PerformVMOVRRDCombine(), performVSELECTCombine(), performVSelectCombine(), PerformVZEXT_MOVLCombine(), performVZEXTCombine(), PerformZExtCombine(), reachesChainWithoutSideEffects(), llvm::AArch64TargetLowering::ReconstructShuffle(), ReorganizeVector(), replaceSplatVectorStore(), llvm::PPCTargetLowering::SelectAddressRegImm(), llvm::PPCTargetLowering::SelectAddressRegReg(), llvm::PPCTargetLowering::SelectAddressRegRegOnly(), llvm::SelectionDAGISel::SelectCodeCommon(), llvm::X86TargetLowering::shouldReduceLoadWidth(), llvm::TargetLowering::TargetLoweringOpt::ShrinkDemandedConstant(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifySetCC(), transformVSELECTtoBlendVECTOR_SHUFFLE(), tryBuildVectorShuffle(), tryCombineCRC32(), tryCombineFixedPointConvert(), tryFormConcatFromShuffle(), tryLowerToSLI(), VectorZextCombine(), llvm::TargetLowering::verifyReturnAddressArgumentIsConstant(), llvm::SelectionDAGBuilder::visitSPDescriptorParent(), and XFormVExtractWithShuffleIntoLoad().
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get the index which selects a specific result in the SDNode
Definition at line 115 of file SelectionDAGNodes.h.
Referenced by llvm::DOTGraphTraits< SelectionDAG * >::addCustomGraphFeatures(), checkBoolTestSetCCCombine(), CheckForPhysRegDependency(), CombineBaseUpdate(), CombineVLDDUP(), llvm::SelectionDAG::computeKnownBits(), llvm::ARMTargetLowering::computeKnownBitsForTargetNode(), llvm::X86TargetLowering::computeKnownBitsForTargetNode(), llvm::SelectionDAG::ComputeNumSignBits(), llvm::ScheduleDAGSDNodes::computeOperandLatency(), ExtendUsesToFormExtLoad(), getBuildPairElt(), getCmp(), llvm::RegsForValue::getCopyToRegs(), llvm::DenseMapInfo< SDValue >::getHashValue(), llvm::SDUse::getResNo(), isLoadIncOrDecStore(), isX86LogicalCmp(), PerformEXTRACT_VECTOR_ELTCombine(), performNEONPostLDSTCombine(), performPostLD1Combine(), PerformSExtCombine(), PerformVMOVDRRCombine(), PerformZExtCombine(), llvm::ResourcePriorityQueue::rawRegPressureDelta(), llvm::SelectionDAG::ReplaceAllUsesOfValuesWith(), llvm::SelectionDAG::ReplaceAllUsesOfValueWith(), llvm::SelectionDAG::ReplaceAllUsesWith(), llvm::SelectionDAGBuilder::resolveDanglingDebugInfo(), llvm::ResourcePriorityQueue::scheduledNode(), selectMADD(), selectMSUB(), and llvm::SelectionDAG::TransferDbgValues().
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Definition at line 158 of file SelectionDAGNodes.h.
References llvm::EVT::getScalarType(), llvm::EVT::getSizeInBits(), and getValueType().
Referenced by ConvertI1VectorToInterger().
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Return the simple ValueType of the referenced return value.
Definition at line 149 of file SelectionDAGNodes.h.
References llvm::EVT::getSimpleVT(), and getValueType().
Referenced by buildFromShuffleMostly(), ChangeVSETULTtoVSETULE(), combineAcrossLanesIntrinsic(), combineRedundantDWordShuffle(), combineX86ShuffleChain(), combineX86ShufflesRecursively(), FoldMaskAndShiftToExtract(), FoldMaskAndShiftToScale(), FoldMaskedShiftToScaledMask(), getCopyFromPartsVector(), getExtractVEXTRACTImmediate(), getGatherNode(), llvm::SelectionDAG::getNode(), getPrefetchNode(), getPSHUFShuffleMask(), getScalarValueForVectorElement(), getScatterNode(), getShuffleScalarElt(), getShuffleVectorZeroOrUndef(), getTargetVShiftByConstNode(), getTargetVShiftNode(), getUnderlyingExtractedFromVec(), isHorizontalBinOp(), Lower256IntArith(), Lower256IntVSETCC(), LowerADD(), LowerAVXCONCAT_VECTORS(), LowerAVXExtend(), LowerBITCAST(), LowerBoolVSETCC_AVX512(), LowerBuildVectorv4x32(), LowerCMP_SWAP(), LowerCONCAT_VECTORS(), LowerCONCAT_VECTORSvXi1(), LowerCTLZ(), LowerCTLZ_ZERO_UNDEF(), LowerCTTZ(), LowerExtendedLoad(), LowerEXTRACT_SUBVECTOR(), LowerEXTRACT_VECTOR_ELT_SSE4(), LowerFABSorFNEG(), LowerFCOPYSIGN(), LowerFGETSIGN(), LowerFP_EXTEND(), LowerHorizontalByteSum(), LowerINSERT_SUBVECTOR(), LowerINTRINSIC_WO_CHAIN(), LowerIntVSETCC_AVX512(), LowerMUL(), LowerSCALAR_TO_VECTOR(), LowerScalarImmediateShift(), LowerScalarVariableShift(), LowerShift(), LowerShiftParts(), LowerSIGN_EXTEND(), LowerSIGN_EXTEND_AVX512(), LowerSIGN_EXTEND_VECTOR_INREG(), LowerSUB(), lowerV16F32VectorShuffle(), lowerV16I16VectorShuffle(), lowerV16I32VectorShuffle(), lowerV16I8VectorShuffle(), lowerV2F64VectorShuffle(), lowerV2I64VectorShuffle(), lowerV32I16VectorShuffle(), lowerV32I8VectorShuffle(), lowerV4F32VectorShuffle(), lowerV4F64VectorShuffle(), lowerV4I32VectorShuffle(), lowerV4I64VectorShuffle(), lowerV64I8VectorShuffle(), lowerV8F32VectorShuffle(), lowerV8F64VectorShuffle(), lowerV8I16VectorShuffle(), lowerV8I32VectorShuffle(), lowerV8I64VectorShuffle(), LowerVectorBroadcast(), LowerVectorCTPOP(), LowerVectorCTPOPBitmath(), LowerVectorCTPOPInRegLUT(), lowerVectorShuffle(), lowerVectorShuffleAsInsertPS(), lowerVSELECTtoVectorShuffle(), LowerVSETCC(), LowerZERO_EXTEND(), LowerZERO_EXTEND_AVX512(), NarrowVectorLoadToElement(), llvm::R600TargetLowering::PerformDAGCombine(), PerformTargetShuffleCombine(), PerformVCVTCombine(), PerformVDIVCombine(), performVZEXTCombine(), llvm::TargetLowering::SimplifySetCC(), splitAndLowerVectorShuffle(), and tryExtendDUPToExtractHigh().
Definition at line 138 of file SelectionDAGNodes.h.
References SDValue().
Referenced by AddCombineTo64bitMLAL(), llvm::X86TargetLowering::BuildFILD(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForMemchr(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForMemcmp(), llvm::ARMSelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemset(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrcmp(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrcpy(), Expand64BitShift(), ExpandBITCAST(), llvm::TargetLowering::expandMUL(), ExpandUnalignedLoad(), ExpandUnalignedStore(), llvm::PPCTargetLowering::expandVSXLoadForLE(), llvm::PPCTargetLowering::expandVSXStoreForLE(), getAArch64XALUOOp(), getBoundedStrlen(), llvm::RegsForValue::getCopyFromRegs(), llvm::RegsForValue::getCopyToRegs(), getMemCmpLoad(), getMemmoveLoadsAndStores(), llvm::MipsTargetLowering::getOpndList(), getReadPerformanceCounter(), getReadTimeStampCounter(), GetTLSADDR(), isCalleeLoad(), isLoadIncOrDecStore(), LowerADDC_ADDE_SUBC_SUBE(), LowerATOMIC_STORE(), llvm::HexagonTargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::NVPTXTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), llvm::HexagonTargetLowering::LowerCallResult(), LowerCallResult(), llvm::TargetLowering::LowerCallTo(), LowerCMP_SWAP(), LowerCTLZ(), LowerCTTZ(), LowerDYNAMIC_STACKALLOC(), LowerExtendedLoad(), llvm::SITargetLowering::LowerFormalArguments(), llvm::SystemZTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerGlobalTLSAddress(), LowerINTRINSIC_W_CHAIN(), llvm::AMDGPUTargetLowering::LowerLOAD(), llvm::HexagonTargetLowering::LowerLOAD(), llvm::MipsTargetLowering::lowerLOAD(), llvm::MipsTargetLowering::LowerOperationWrapper(), llvm::HexagonTargetLowering::LowerReturn(), llvm::SystemZTargetLowering::LowerReturn(), llvm::SparcTargetLowering::LowerReturn_32(), llvm::SparcTargetLowering::LowerReturn_64(), llvm::AMDGPUTargetLowering::LowerSDIVREM(), llvm::SelectionDAGBuilder::LowerStatepoint(), LowerToTLSGeneralDynamicModel32(), LowerToTLSLocalDynamicModel(), llvm::AMDGPUTargetLowering::LowerUDIVREM64(), LowerVAARG(), LowerVECTOR_SHUFFLE(), llvm::PPCTargetLowering::PerformDAGCombine(), performDivRemCombine(), performIntToFpCombine(), PerformLOADCombine(), PerformMLOADCombine(), PerformSExtCombine(), PerformSINT_TO_FPCombine(), performSTORECombine(), PerformSTORECombine(), PerformVMOVRRDCombine(), PerformZExtCombine(), PrepareCall(), PrepareTailCall(), ReplaceINTRINSIC_W_CHAIN(), ReplaceLoadVector(), llvm::R600TargetLowering::ReplaceNodeResults(), llvm::PPCTargetLowering::ReplaceNodeResults(), llvm::X86TargetLowering::ReplaceNodeResults(), ReplaceREADCYCLECOUNTER(), replaceSplatVectorStore(), llvm::AMDGPUTargetLowering::ScalarizeVectorLoad(), llvm::SelectionDAGISel::SelectCodeCommon(), llvm::AMDGPUTargetLowering::SplitVectorLoad(), and llvm::SelectionDAGBuilder::visitJumpTable().
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Returns the size of the value in bits.
Definition at line 154 of file SelectionDAGNodes.h.
References llvm::EVT::getSizeInBits(), and getValueType().
Referenced by llvm::SelectionDAGISel::CheckAndMask(), CheckForMaskedLoad(), llvm::SelectionDAGISel::CheckOrMask(), isTruncateOf(), isTruncWithZeroHighBitsInput(), lowerFCOPYSIGN64(), lowerFP_TO_SINT_STORE(), PerformBTCombine(), PerformSTORECombine(), ShrinkLoadReplaceStoreWithStore(), llvm::TargetLowering::SimplifySetCC(), and VerifySDNode().
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Return the ValueType of the referenced return value.
Definition at line 888 of file SelectionDAGNodes.h.
References llvm::SDNode::getValueType().
Referenced by AddCombineTo64bitMLAL(), AddCombineToVPADDL(), BuildExactSDIV(), llvm::X86TargetLowering::BuildFILD(), buildFromShuffleMostly(), BuildIntrinsicOp(), llvm::TargetLowering::BuildSDIV(), llvm::TargetLowering::BuildUDIV(), CalculateTailCallArgDest(), canChangeToInt(), CheckForMaskedLoad(), CheckType(), CMPEQCombine(), CombineBaseUpdate(), combineConcatVectorOfScalars(), combineRedundantDWordShuffle(), CompactSwizzlableVector(), llvm::SelectionDAG::computeKnownBits(), llvm::AArch64TargetLowering::computeKnownBitsForTargetNode(), llvm::SelectionDAG::ComputeNumSignBits(), llvm::X86TargetLowering::ComputeNumSignBitsForTargetNode(), ConvertI1VectorToInterger(), llvm::SITargetLowering::copyToM0(), countOperands(), createCMovFP(), createFPCmp(), createLoadLR(), createStoreLR(), EltsFromConsecutiveLoads(), emitCLC(), EmitCMP(), emitComparison(), emitMemMem(), llvm::ARMSelectionDAGInfo::EmitSpecializedLibcall(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForMemchr(), llvm::XCoreSelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForMemset(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemset(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrcmp(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrcpy(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrlen(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrnlen(), EmitVectorComparison(), ExpandBITCAST(), expandExp(), expandExp2(), expandf64Toi32(), llvm::TargetLowering::expandFP_TO_SINT(), ExpandHorizontalBinOp(), expandLog(), expandLog10(), expandLog2(), expandPow(), ExpandPowI(), ExpandUnalignedLoad(), ExpandUnalignedStore(), llvm::PPCTargetLowering::expandVSXStoreForLE(), ExtendUsesToFormExtLoad(), Extract128BitVector(), Extract256BitVector(), ExtractSubVector(), llvm::SelectionDAG::ExtractVectorElements(), findChainOperand(), FoldIntToFPToInt(), FoldMaskAndShiftToScale(), llvm::SelectionDAG::FoldSetCC(), GeneratePerfectShuffle(), GenerateTBL(), getAArch64Cmp(), getAArch64XALUOOp(), getAbsolute(), llvm::SelectionDAG::getAnyExtendVectorInReg(), llvm::SelectionDAG::getAnyExtOrTrunc(), llvm::SelectionDAG::getAtomic(), llvm::SelectionDAG::getAtomicCmpSwap(), llvm::SelectionDAG::getBitcast(), llvm::SelectionDAG::getBoolExtOrTrunc(), getBoundedStrlen(), getCopyFromParts(), getCopyFromPartsVector(), getCopyToParts(), getCopyToPartsVector(), llvm::SelectionDAG::getCopyToReg(), llvm::DOTGraphTraits< SelectionDAG * >::getEdgeAttributes(), getExtendTypeForNode(), getExtFactor(), llvm::SelectionDAG::getExtLoad(), getFRAMEADDR(), getGatherNode(), llvm::SelectionDAG::getIndexedLoad(), llvm::SelectionDAG::getIndexedStore(), getInputChainForNode(), getLeftShift(), llvm::SelectionDAG::getLoad(), llvm::SelectionDAG::getMaskedStore(), getMemBasePlusOffset(), llvm::SelectionDAG::getMemset(), getMemsetStores(), getMemsetValue(), GetNegatedExpression(), llvm::SelectionDAG::getNode(), getNumOperandsNoGlue(), llvm::AMDGPUTargetLowering::getRecipEstimate(), llvm::AMDGPUTargetLowering::getRsqrtEstimate(), getScalarMaskingNode(), getScalarValueSizeInBits(), getScatterNode(), llvm::SelectionDAG::getSelect(), llvm::SelectionDAG::getSelectCC(), llvm::SelectionDAG::getSetCC(), llvm::SelectionDAG::getSExtOrTrunc(), llvm::SelectionDAG::getShiftAmountOperand(), getShuffleScalarElt(), llvm::SelectionDAG::getSignExtendVectorInReg(), getSimpleValueType(), llvm::SelectionDAG::getStore(), getTargetShuffleMask(), llvm::SelectionDAG::getTruncStore(), getUniformBase(), getUsefulBits(), getValueSizeInBits(), llvm::SDUse::getValueType(), getVectorCmp(), getVectorMaskingNode(), llvm::SelectionDAG::getVectorShuffle(), llvm::SelectionDAG::getZeroExtendInReg(), llvm::SelectionDAG::getZeroExtendVectorInReg(), llvm::SelectionDAG::getZExtOrTrunc(), HandleMergeInputChains(), Insert128BitVector(), Insert256BitVector(), InsertSubVector(), isBitfieldPositioningOp(), isConditionalZeroOrAllOnes(), isConstOrConstSplat(), isConstVecPow2(), llvm::X86TargetLowering::IsDesirableToPromoteOp(), isHorizontalBinOp(), isI24(), IsMulWideOperandDemotable(), isNegatibleForFree(), isSimpleShift(), isTruncateOf(), isU24(), llvm::ARMTargetLowering::isVectorLoadExtDesirable(), llvm::XCoreTargetLowering::isZExtFree(), llvm::MSP430TargetLowering::isZExtFree(), llvm::AMDGPUTargetLowering::isZExtFree(), llvm::ARMTargetLowering::isZExtFree(), llvm::AArch64TargetLowering::isZExtFree(), llvm::X86TargetLowering::isZExtFree(), llvm::TargetLoweringBase::isZExtFree(), llvm::SITargetLowering::legalizeTargetIndependentNode(), LowerADD(), LowerADDC_ADDE_SUBC_SUBE(), llvm::SparcTargetLowering::LowerAsmOperandForConstraint(), llvm::ARMTargetLowering::LowerAsmOperandForConstraint(), llvm::SystemZTargetLowering::LowerAsmOperandForConstraint(), llvm::X86TargetLowering::LowerAsmOperandForConstraint(), llvm::TargetLowering::LowerAsmOperandForConstraint(), LowerAsSplatVectorLoad(), LowerBITCAST(), LowerBoolVSETCC_AVX512(), llvm::MSP430TargetLowering::LowerBR_CC(), LowerBR_CC(), llvm::HexagonTargetLowering::LowerBUILD_VECTOR(), llvm::HexagonTargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::TargetLowering::LowerCallTo(), llvm::HexagonTargetLowering::LowerCONCAT_VECTORS(), LowerCONCAT_VECTORS(), llvm::HexagonTargetLowering::LowerConstantPool(), LowerConstantPool(), LowerCTPOP(), llvm::AMDGPUTargetLowering::LowerDIVREM24(), lowerDSPIntr(), LowerExtendedLoad(), llvm::HexagonTargetLowering::LowerEXTRACT_VECTOR(), LowerEXTRACT_VECTOR_ELT(), LowerF128_FPEXTEND(), LowerF128_FPROUND(), llvm::SparcTargetLowering::LowerF128_LibCallArg(), llvm::SparcTargetLowering::LowerF128Compare(), LowerF128Load(), llvm::SparcTargetLowering::LowerF128Op(), LowerF128Store(), LowerF64Op(), lowerFCOPYSIGN32(), lowerFCOPYSIGN64(), LowerFNEGorFABS(), llvm::SITargetLowering::LowerFormalArguments(), LowerFP_TO_SINT(), LowerFP_TO_UINT(), llvm::MSP430TargetLowering::LowerFRAMEADDR(), llvm::HexagonTargetLowering::LowerFRAMEADDR(), LowerFSINCOS(), lowerIncomingStatepointValue(), llvm::HexagonTargetLowering::LowerINLINEASM(), llvm::HexagonTargetLowering::LowerINSERT_VECTOR(), LowerINTRINSIC_W_CHAIN(), LowerINTRINSIC_WO_CHAIN(), llvm::AMDGPUTargetLowering::LowerIntrinsicIABS(), llvm::AMDGPUTargetLowering::LowerIntrinsicLRP(), LowerIntVSETCC_AVX512(), LowerLabelRef(), llvm::AMDGPUTargetLowering::LowerLOAD(), llvm::HexagonTargetLowering::LowerLOAD(), llvm::MipsTargetLowering::lowerLOAD(), LowerMGATHER(), LowerMSCATTER(), LowerMUL(), LowerMUL_LOHI(), llvm::R600TargetLowering::LowerOperation(), llvm::SystemZTargetLowering::LowerOperation(), llvm::NVPTXTargetLowering::LowerReturn(), llvm::HexagonTargetLowering::LowerRETURNADDR(), LowerRETURNADDR(), LowerReverse_VECTOR_SHUFFLEv16i8_v8i16(), LowerSCALAR_TO_VECTOR(), LowerScalarVariableShift(), LowerSDIV(), llvm::AMDGPUTargetLowering::LowerSDIVREM(), llvm::MSP430TargetLowering::LowerSELECT_CC(), LowerSELECT_CC(), llvm::MSP430TargetLowering::LowerSETCC(), llvm::HexagonTargetLowering::LowerSETCC(), LowerShift(), llvm::MSP430TargetLowering::LowerShifts(), llvm::MSP430TargetLowering::LowerSIGN_EXTEND(), LowerSINT_TO_FP(), lowerStatepointMetaArgs(), llvm::AMDGPUTargetLowering::LowerSTORE(), LowerSUB(), LowerToAddSub(), LowerUDIV(), llvm::AMDGPUTargetLowering::LowerUDIVREM(), llvm::AMDGPUTargetLowering::LowerUDIVREM64(), LowerUINT_TO_FP(), lowerUINT_TO_FP_vXi32(), LowerUMULO_SMULO(), lowerUnalignedIntStore(), LowerVAARG(), LowerVECTOR_SHIFT(), LowerVECTOR_SHUFFLE(), LowerVectorAllZeroTest(), LowerVectorBroadcast(), LowerVectorFP_TO_INT(), LowerVectorINT_TO_FP(), lowerVectorSETCC(), llvm::HexagonTargetLowering::LowerVSELECT(), LowerVSETCC(), LowerWRITE_REGISTER(), LowerXALUO(), LowerXOR(), llvm::SparcTargetLowering::makeHiLoPair(), llvm::TargetLowering::makeLibCall(), MatchingStackOffset(), narrowIfNeeded(), NarrowVector(), NormalizeBuildVector(), OptimizeConditionalInDecrement(), partitionShuffleOfConcats(), PerformADDCombineWithOperands(), PerformANDCombine(), PerformARMBUILD_VECTORCombine(), PerformBITCASTCombine(), performBRCONDCombine(), PerformCMOVCombine(), performConcatVectorsCombine(), llvm::R600TargetLowering::PerformDAGCombine(), llvm::SystemZTargetLowering::PerformDAGCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), PerformExtendCombine(), PerformEXTRACT_VECTOR_ELTCombine(), PerformINTRINSIC_WO_CHAINCombine(), PerformIntrinsicCombine(), performIntToFpCombine(), PerformISDSETCCCombine(), PerformLOADCombine(), PerformMLOADCombine(), PerformMSTORECombine(), performNEONPostLDSTCombine(), performNVCASTCombine(), PerformOrCombine(), performSELECTCombine(), performSelectCombine(), PerformSELECTCombine(), performSetccAddFolding(), PerformSExtCombine(), PerformSHLCombine(), PerformShuffleCombine(), PerformSIGN_EXTEND_INREGCombine(), PerformSINT_TO_FPCombine(), performSTORECombine(), PerformSTORECombine(), PerformSubCombine(), PerformUINT_TO_FPCombine(), PerformVCVTCombine(), PerformVDIVCombine(), PerformVDUPLANECombine(), PerformVECTOR_SHUFFLECombine(), performVSelectCombine(), PerformVZEXT_MOVLCombine(), PerformZExtCombine(), PrepareCall(), llvm::AArch64TargetLowering::ReconstructShuffle(), ReorganizeVector(), ReplaceBITCASTResults(), llvm::SparcTargetLowering::ReplaceNodeResults(), llvm::PPCTargetLowering::ReplaceNodeResults(), llvm::X86TargetLowering::ReplaceNodeResults(), replaceSplatVectorStore(), reservePreviousStackSlotForValue(), llvm::DAGTypeLegalizer::run(), llvm::AMDGPUTargetLowering::ScalarizeVectorLoad(), llvm::AMDGPUTargetLowering::ScalarizeVectorStore(), llvm::PPCTargetLowering::SelectAddressRegImm(), llvm::PPCTargetLowering::SelectAddressRegRegOnly(), selectCCOpsAreFMaxCompatible(), llvm::SelectionDAGISel::SelectCodeCommon(), llvm::SelectionDAG::setRoot(), llvm::TargetLowering::TargetLoweringOpt::ShrinkDemandedConstant(), llvm::TargetLowering::TargetLoweringOpt::ShrinkDemandedOp(), ShrinkLoadReplaceStoreWithStore(), llvm::SelectionDAG::SignBitIsZero(), llvm::TargetLowering::SimplifyDemandedBits(), simplifyI24(), llvm::TargetLowering::SimplifySetCC(), simplifyShuffleOperandRecursively(), llvm::TargetLowering::softenSetCCOperands(), spillIncomingStatepointValue(), llvm::SelectionDAG::SplitVector(), llvm::AMDGPUTargetLowering::SplitVectorLoad(), llvm::AMDGPUTargetLowering::SplitVectorStore(), TranslateX86CC(), tryCombineFixedPointConvert(), tryCombineLongOpWithDup(), tryFormConcatFromShuffle(), llvm::SelectionDAG::UnrollVectorOp(), ValueHasExactlyOneBitSet(), VectorZextCombine(), VerifySDNode(), llvm::SelectionDAGBuilder::visitBitTestHeader(), llvm::SelectionDAGBuilder::visitJumpTableHeader(), llvm::SelectionDAGBuilder::visitSPDescriptorParent(), llvm::SelectionDAGBuilder::visitSwitchCase(), WidenVector(), llvm::SparcTargetLowering::withTargetFlags(), and XFormVExtractWithShuffleIntoLoad().
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Return true if there is exactly one node using value ResNo of Node.
Definition at line 915 of file SelectionDAGNodes.h.
References llvm::SDNode::hasNUsesOfValue().
Referenced by combineRedundantDWordShuffle(), combineRedundantHalfShuffle(), combineX86ShufflesRecursively(), FoldMaskAndShiftToExtract(), FoldMaskAndShiftToScale(), FoldMaskedShiftToScaledMask(), getAtomicLoadArithTargetConstant(), GetNegatedExpression(), isADDADDMUL(), isAndOrOfSetCCs(), isCalleeLoad(), isLoadIncOrDecStore(), isNegatibleForFree(), llvm::SelectionDAGISel::IsProfitableToFold(), isXor1OfSetCC(), LowerEXTRACT_VECTOR_ELT_SSE4(), llvm::MSP430TargetLowering::LowerSETCC(), LowerVectorBroadcast(), MayFoldIntoStore(), MayFoldLoad(), OptimizeConditionalInDecrement(), PerformBTCombine(), llvm::AMDGPUTargetLowering::PerformDAGCombine(), llvm::SystemZTargetLowering::PerformDAGCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), PerformEXTRACT_VECTOR_ELTCombine(), performIntToFpCombine(), PerformISDSETCCCombine(), PerformORCombine(), PerformOrCombine(), PerformShuffleCombine(), PerformSINT_TO_FPCombine(), PerformSTORECombine(), PerformTargetShuffleCombine(), PerformZExtCombine(), selectMADD(), selectMSUB(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifySetCC(), and XFormVExtractWithShuffleIntoLoad().
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Definition at line 906 of file SelectionDAGNodes.h.
References llvm::SDNode::isMachineOpcode().
Referenced by FoldOperand(), and PeepholePPC64ZExtGather().
isOperand - Return true if this node is an operand of N.
Definition at line 6688 of file SelectionDAG.cpp.
References llvm::SDNode::op_values().
Referenced by isCalleeLoad().
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Definition at line 903 of file SelectionDAGNodes.h.
References llvm::SDNode::isTargetMemoryOpcode().
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Definition at line 900 of file SelectionDAGNodes.h.
References llvm::SDNode::isTargetOpcode().
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Definition at line 134 of file SelectionDAGNodes.h.
Definition at line 128 of file SelectionDAGNodes.h.
References operator==().
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Definition at line 123 of file SelectionDAGNodes.h.
Definition at line 131 of file SelectionDAGNodes.h.
Definition at line 125 of file SelectionDAGNodes.h.
Referenced by operator!=().
Return true if this operand (which must be a chain) reaches the specified operand without crossing any side-effecting instructions.
reachesChainWithoutSideEffects - Return true if this operand (which must be a chain) reaches the specified operand without crossing any side-effecting instructions on any chain path.
In practice, this looks through token factors and non-volatile loads. In order to remain efficient, this only looks a couple of nodes in, it does not do an exhaustive search.
Definition at line 6707 of file SelectionDAG.cpp.
References getNumOperands(), getOpcode(), getOperand(), and llvm::ISD::TokenFactor.
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set the SDNode
Definition at line 121 of file SelectionDAGNodes.h.
References N.
Referenced by PrepareCall().
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Return true if there are no nodes using value ResNo of Node.
Definition at line 912 of file SelectionDAGNodes.h.
References llvm::SDNode::hasAnyUseOfValue().
Referenced by PerformADCCombine(), PerformCMOVCombine(), selectMADD(), and selectMSUB().
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Definition at line 106 of file SelectionDAGNodes.h.
1.8.6