47 "Live Variable Analysis",
false,
false)
61 for (
unsigned i = 0, e =
Kills.size(); i != e; ++i)
68 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
69 dbgs() <<
" Alive in blocks: ";
71 E = AliveBlocks.end();
I != E; ++
I)
73 dbgs() <<
"\n Killed by:";
75 dbgs() <<
" No instructions.\n";
77 for (
unsigned i = 0, e = Kills.size(); i != e; ++i)
78 dbgs() <<
"\n #" << i <<
": " << *Kills[i];
87 "getVarInfo: not a virtual register!");
88 VirtRegInfo.grow(RegIdx);
89 return VirtRegInfo[RegIdx];
95 std::vector<MachineBasicBlock*> &WorkList) {
100 for (
unsigned i = 0, e = VRInfo.
Kills.size(); i != e; ++i)
101 if (VRInfo.
Kills[i]->getParent() == MBB) {
106 if (MBB == DefBlock)
return;
114 assert(MBB != &MF->
front() &&
"Can't find reaching def for virtreg");
121 std::vector<MachineBasicBlock*> WorkList;
124 while (!WorkList.empty()) {
133 assert(MRI->
getVRegDef(reg) &&
"Register use before def!");
140 if (!VRInfo.
Kills.empty() && VRInfo.
Kills.back()->getParent() == MBB) {
148 for (
unsigned i = 0, e = VRInfo.
Kills.size(); i != e; ++i)
149 assert(VRInfo.
Kills[i]->getParent() != MBB &&
"entry should be at end!");
174 VRInfo.
Kills.push_back(MI);
187 VRInfo.
Kills.push_back(MI);
194 unsigned LastDefReg = 0;
195 unsigned LastDefDist = 0;
198 unsigned SubReg = *SubRegs;
202 unsigned Dist = DistanceMap[
Def];
203 if (Dist > LastDefDist) {
213 PartDefRegs.
insert(LastDefReg);
214 for (
unsigned i = 0, e = LastDef->
getNumOperands(); i != e; ++i) {
218 unsigned DefReg = MO.
getReg();
222 PartDefRegs.
insert(*SubRegs);
231 void LiveVariables::HandlePhysRegUse(
unsigned Reg,
MachineInstr *
MI) {
234 if (!LastDef && !PhysRegUse[Reg]) {
244 MachineInstr *LastPartialDef = FindLastPartialDef(Reg, PartDefRegs);
246 if (LastPartialDef) {
249 PhysRegDef[
Reg] = LastPartialDef;
252 unsigned SubReg = *SubRegs;
253 if (Processed.
count(SubReg))
255 if (PartDefRegs.
count(SubReg))
262 PhysRegDef[SubReg] = LastPartialDef;
267 }
else if (LastDef && !PhysRegUse[Reg] &&
276 PhysRegUse[*SubRegs] = MI;
281 MachineInstr *LiveVariables::FindLastRefOrPartRef(
unsigned Reg) {
284 if (!LastDef && !LastUse)
287 MachineInstr *LastRefOrPartRef = LastUse ? LastUse : LastDef;
288 unsigned LastRefOrPartRefDist = DistanceMap[LastRefOrPartRef];
289 unsigned LastPartDefDist = 0;
291 unsigned SubReg = *SubRegs;
293 if (Def && Def != LastDef) {
296 unsigned Dist = DistanceMap[
Def];
297 if (Dist > LastPartDefDist)
298 LastPartDefDist = Dist;
300 unsigned Dist = DistanceMap[
Use];
301 if (Dist > LastRefOrPartRefDist) {
302 LastRefOrPartRefDist = Dist;
303 LastRefOrPartRef =
Use;
308 return LastRefOrPartRef;
311 bool LiveVariables::HandlePhysRegKill(
unsigned Reg,
MachineInstr *MI) {
314 if (!LastDef && !LastUse)
317 MachineInstr *LastRefOrPartRef = LastUse ? LastUse : LastDef;
318 unsigned LastRefOrPartRefDist = DistanceMap[LastRefOrPartRef];
337 unsigned LastPartDefDist = 0;
340 unsigned SubReg = *SubRegs;
342 if (Def && Def != LastDef) {
345 unsigned Dist = DistanceMap[
Def];
346 if (Dist > LastPartDefDist) {
347 LastPartDefDist = Dist;
356 unsigned Dist = DistanceMap[
Use];
357 if (Dist > LastRefOrPartRefDist) {
358 LastRefOrPartRefDist = Dist;
359 LastRefOrPartRef =
Use;
364 if (!PhysRegUse[Reg]) {
369 PhysRegDef[
Reg]->addRegisterDead(Reg, TRI,
true);
371 unsigned SubReg = *SubRegs;
372 if (!PartUses.
count(SubReg))
375 if (PhysRegDef[Reg] == PhysRegDef[SubReg]) {
385 MachineInstr *LastSubRef = FindLastRefOrPartRef(SubReg);
392 PhysRegUse[*
SS] = LastRefOrPartRef;
397 }
else if (LastRefOrPartRef == PhysRegDef[Reg] && LastRefOrPartRef != MI) {
426 for (
unsigned Reg = 1, NumRegs = TRI->
getNumRegs(); Reg != NumRegs; ++
Reg) {
428 if (!PhysRegDef[Reg] && !PhysRegUse[Reg])
435 unsigned Super =
Reg;
439 HandlePhysRegKill(Super,
nullptr);
443 void LiveVariables::HandlePhysRegDef(
unsigned Reg,
MachineInstr *MI,
447 if (PhysRegDef[Reg] || PhysRegUse[Reg]) {
453 unsigned SubReg = *SubRegs;
460 if (Live.
count(SubReg))
462 if (PhysRegDef[SubReg] || PhysRegUse[SubReg]) {
472 HandlePhysRegKill(Reg, MI);
475 unsigned SubReg = *SubRegs;
476 if (!Live.
count(SubReg))
479 HandlePhysRegKill(SubReg, MI);
488 while (!Defs.
empty()) {
489 unsigned Reg = Defs.
back();
492 SubRegs.
isValid(); ++SubRegs) {
493 unsigned SubReg = *SubRegs;
494 PhysRegDef[SubReg] =
MI;
495 PhysRegUse[SubReg] =
nullptr;
509 NumOperandsToProcess = 1;
515 for (
unsigned i = 0; i != NumOperandsToProcess; ++i) {
523 unsigned MOReg = MO.
getReg();
536 for (
unsigned i = 0, e = UseRegs.
size(); i != e; ++i) {
537 unsigned MOReg = UseRegs[i];
541 HandlePhysRegUse(MOReg, MI);
545 for (
unsigned i = 0, e = RegMasks.
size(); i != e; ++i)
549 for (
unsigned i = 0, e = DefRegs.
size(); i != e; ++i) {
550 unsigned MOReg = DefRegs[i];
554 HandlePhysRegDef(MOReg, MI, Defs);
556 UpdatePhysRegDefs(MI, Defs);
565 "Cannot have a live-in virtual register!");
566 HandlePhysRegDef(*II,
nullptr, Defs);
577 DistanceMap.insert(std::make_pair(MI, Dist++));
579 runOnInstr(MI, Defs);
586 if (!PHIVarInfo[MBB->
getNumber()].empty()) {
590 E = VarInfoVec.
end();
I != E; ++
I)
615 for (
unsigned i = 0; i != NumRegs; ++i)
616 if ((PhysRegDef[i] || PhysRegUse[i]) && !LiveOuts.
count(i))
617 HandlePhysRegDef(i,
nullptr, Defs);
626 PhysRegDef.assign(NumRegs,
nullptr);
627 PhysRegUse.assign(NumRegs,
nullptr);
647 runOnBlock(MBB, NumRegs);
649 PhysRegDef.assign(NumRegs,
nullptr);
650 PhysRegUse.assign(NumRegs,
nullptr);
655 for (
unsigned i = 0, e1 = VirtRegInfo.size(); i != e1; ++i) {
657 for (
unsigned j = 0, e2 = VirtRegInfo[Reg].Kills.size(); j != e2; ++j)
658 if (VirtRegInfo[Reg].Kills[j] == MRI->
getVRegDef(Reg))
659 VirtRegInfo[Reg].Kills[j]->addRegisterDead(Reg, TRI);
661 VirtRegInfo[
Reg].Kills[j]->addRegisterKilled(Reg, TRI);
669 assert(Visited.
count(&*i) != 0 &&
"unreachable basic block found");
684 std::replace(VI.
Kills.begin(), VI.
Kills.end(), OldMI, NewMI);
694 unsigned Reg = MO.
getReg();
697 assert(removed &&
"kill not in register's VarInfo?");
709 for (
const auto &MBB : Fn)
710 for (
const auto &BBI : MBB) {
713 for (
unsigned i = 1, e = BBI.getNumOperands(); i != e; i += 2)
714 if (BBI.getOperand(i).readsReg())
715 PHIVarInfo[BBI.getOperand(i + 1).getMBB()->getNumber()]
716 .push_back(BBI.getOperand(i).getReg());
726 if (AliveBlocks.test(Num))
735 return findKill(&MBB);
742 for (
unsigned i = 0, e = VI.
Kills.size(); i != e; ++i)
753 if (Kills.
count(SuccMBB))
771 for (; BBI != BBE && BBI->isPHI(); ++BBI) {
773 Defs.
insert(BBI->getOperand(0).getReg());
776 for (
unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2)
777 if (BBI->getOperand(i+1).getMBB() == BB)
778 getVarInfo(BBI->getOperand(i).getReg()).AliveBlocks.set(NumNew);
782 for (; BBI != BBE; ++BBI) {
784 E = BBI->operands_end();
I != E; ++
I) {
788 else if (
I->isKill())
pred_reverse_iterator pred_rbegin()
void push_back(const T &Elt)
pred_reverse_iterator pred_rend()
bool removeKill(MachineInstr *MI)
removeKill - Delete a kill corresponding to the specified machine instruction.
bool isValid() const
isValid - returns true if this iterator is not yet at the end.
MachineOperand * findRegisterDefOperand(unsigned Reg, bool isDead=false, const TargetRegisterInfo *TRI=nullptr)
Wrapper for findRegisterDefOperandIdx, it returns a pointer to the MachineOperand rather than an inde...
static unsigned index2VirtReg(unsigned Index)
index2VirtReg - Convert a 0-based index to a virtual register number.
int getNumber() const
getNumber - MachineBasicBlocks are uniquely numbered at the function level, unless they're not in a M...
bool addRegisterDead(unsigned Reg, const TargetRegisterInfo *RegInfo, bool AddIfNotFound=false)
We have determined MI defined a register without a use.
INITIALIZE_PASS_BEGIN(LiveVariables,"livevars","Live Variable Analysis", false, false) INITIALIZE_PASS_END(LiveVariables
bool runOnMachineFunction(MachineFunction &MF) override
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
std::vector< unsigned >::const_iterator livein_iterator
static bool isVirtualRegister(unsigned Reg)
isVirtualRegister - Return true if the specified register number is in the virtual register namespace...
bool isLiveOut(unsigned Reg, const MachineBasicBlock &MBB)
isLiveOut - Determine if Reg is live out from MBB, when not considering PHI nodes.
size_type count(PtrType Ptr) const
count - Return 1 if the specified pointer is in the set, 0 otherwise.
VarInfo - This represents the regions where a virtual register is live in the program.
void setIsDead(bool Val=true)
bool isSubRegister(unsigned RegA, unsigned RegB) const
Returns true if RegB is a sub-register of RegA.
LLVM_ATTRIBUTE_NORETURN void report_fatal_error(const char *reason, bool gen_crash_diag=true)
Reports a serious error, calling any installed error handler.
iterator_range< succ_iterator > successors()
livein_iterator livein_begin() const
unsigned getNumVirtRegs() const
getNumVirtRegs - Return the number of virtual registers created.
#define INITIALIZE_PASS_DEPENDENCY(depName)
unsigned getNumBlockIDs() const
getNumBlockIDs - Return the number of MBB ID's allocated.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MCSuperRegIterator enumerates all super-registers of Reg.
static MachineOperand CreateReg(unsigned Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false)
A Use represents the edge between a Value definition and its users.
#define INITIALIZE_PASS_END(passName, arg, name, cfg, analysis)
bool isReg() const
isReg - Tests if this is a MO_Register operand.
Reg
All possible values of the reg field in the ModR/M byte.
void replaceKillInstruction(unsigned Reg, MachineInstr *OldMI, MachineInstr *NewMI)
replaceKillInstruction - Update register kill info by replacing a kill instruction with a new one...
SparseBitVector AliveBlocks
AliveBlocks - Set of blocks in which this value is alive completely through.
unsigned getNumOperands() const
Access to explicit operands of the instruction.
char & UnreachableMachineBlockElimID
UnreachableMachineBlockElimination - This pass removes unreachable machine basic blocks.
void setIsEarlyClobber(bool Val=true)
const MachineBasicBlock & front() const
unsigned getNumRegs() const
Return the number of registers this target has (useful for sizing arrays holding per register informa...
bool LLVM_ATTRIBUTE_UNUSED_RESULT empty() const
void removeVirtualRegistersKilled(MachineInstr *MI)
removeVirtualRegistersKilled - Remove all killed info for the specified instruction.
bool isInAllocatableClass(unsigned RegNo) const
isInAllocatableClass - Return true if the register is in the allocation of any register class...
const MachineBasicBlock * getParent() const
bool isDebugValue() const
bool isEarlyClobber() const
char & LiveVariablesID
LiveVariables pass - This pass computes the set of blocks in which each variable is life and sets mac...
bundle_iterator< MachineInstr, instr_iterator > iterator
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
bool isReserved(unsigned PhysReg) const
isReserved - Returns true when PhysReg is a reserved register.
livein_iterator livein_end() const
SmallSet - This maintains a set of unique values, optimizing for the case when the set is small (less...
const MachineOperand & getOperand(unsigned i) const
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
iterator_range< df_ext_iterator< T, SetTy > > depth_first_ext(const T &G, SetTy &S)
Represent the analysis usage information of a pass.
std::pair< NoneType, bool > insert(const T &V)
insert - Insert an element into the set if it isn't already there.
succ_iterator succ_begin()
VarInfo & getVarInfo(unsigned RegIdx)
getVarInfo - Return the VarInfo structure for the specified VIRTUAL register.
MCSubRegIterator enumerates all sub-registers of Reg.
pred_iterator pred_begin()
void MarkVirtRegAliveInBlock(VarInfo &VRInfo, MachineBasicBlock *DefBlock, MachineBasicBlock *BB)
void setIsKill(bool Val=true)
std::vector< MachineBasicBlock * >::const_iterator const_pred_iterator
bool isRegMask() const
isRegMask - Tests if this is a MO_RegisterMask operand.
size_type count(const T &V) const
count - Return 1 if the element is in the set, 0 otherwise.
void addNewBlock(MachineBasicBlock *BB, MachineBasicBlock *DomBB, MachineBasicBlock *SuccBB)
addNewBlock - Add a new basic block BB between DomBB and SuccBB.
std::vector< MachineInstr * > Kills
Kills - List of MachineInstruction's which are the last use of this virtual register (kill it) in the...
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements...
void addOperand(MachineFunction &MF, const MachineOperand &Op)
Add the specified operand to the instruction.
bool isLiveIn(const MachineBasicBlock &MBB, unsigned Reg, MachineRegisterInfo &MRI)
isLiveIn - Is Reg live in to MBB? This means that Reg is live through MBB, or it is killed in MBB...
MachineOperand class - Representation of each machine instruction operand.
void HandleVirtRegDef(unsigned reg, MachineInstr *MI)
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
static bool clobbersPhysReg(const uint32_t *RegMask, unsigned PhysReg)
clobbersPhysReg - Returns true if this RegMask clobbers PhysReg.
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
MachineInstr * findKill(const MachineBasicBlock *MBB) const
findKill - Find a kill instruction in MBB. Return NULL if none is found.
Representation of each machine instruction.
static bool isPhysicalRegister(unsigned Reg)
isPhysicalRegister - Return true if the specified register number is in the physical register namespa...
bool isLandingPad() const
isLandingPad - Returns true if the block is a landing pad.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
MachineInstr * getVRegDef(unsigned Reg) const
getVRegDef - Return the machine instr that defines the specified virtual register or null if none is ...
unsigned getReg() const
getReg - Returns the register number.
std::vector< MachineBasicBlock * >::const_iterator const_succ_iterator
SparseBitVectorIterator iterator
static const Function * getParent(const Value *V)
BasicBlockListType::iterator iterator
bool addRegisterKilled(unsigned IncomingReg, const TargetRegisterInfo *RegInfo, bool AddIfNotFound=false)
We have determined MI kills a register.
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
bool readsReg() const
readsReg - Returns true if this operand reads the previous value of its register. ...
void HandleVirtRegUse(unsigned reg, MachineBasicBlock *MBB, MachineInstr *MI)