78 std::string
Ret =
"e";
83 Ret +=
"-i64:64-v16:16-v32:32-n16:32:64";
96 Subtarget(TT, CPU, FS, *this) {
106 void NVPTXTargetMachine32::anchor() {}
115 void NVPTXTargetMachine64::anchor() {}
131 return getTM<NVPTXTargetMachine>();
134 void addIRPasses()
override;
135 bool addInstSelector()
override;
136 void addPostRegAlloc()
override;
137 void addMachineSSAOptimization()
override;
139 FunctionPass *createTargetRegisterAllocator(
bool)
override;
140 void addFastRegAlloc(
FunctionPass *RegAllocPass)
override;
141 void addOptimizedRegAlloc(
FunctionPass *RegAllocPass)
override;
146 NVPTXPassConfig *PassConfig =
new NVPTXPassConfig(
this, PM);
156 void NVPTXPassConfig::addIRPasses() {
199 bool NVPTXPassConfig::addInstSelector() {
212 void NVPTXPassConfig::addPostRegAlloc() {
220 FunctionPass *NVPTXPassConfig::createTargetRegisterAllocator(
bool) {
224 void NVPTXPassConfig::addFastRegAlloc(
FunctionPass *RegAllocPass) {
225 assert(!RegAllocPass &&
"NVPTX uses no regalloc!");
230 void NVPTXPassConfig::addOptimizedRegAlloc(
FunctionPass *RegAllocPass) {
231 assert(!RegAllocPass &&
"NVPTX uses no regalloc!");
243 printAndVerify(
"After Machine Scheduling");
251 printAndVerify(
"After StackSlotColoring");
254 void NVPTXPassConfig::addMachineSSAOptimization() {
256 if (addPass(&EarlyTailDuplicateID))
257 printAndVerify(
"After Pre-RegAlloc TailDuplicate");
276 printAndVerify(
"After codegen DCE pass");
282 printAndVerify(
"After ILP optimizations");
288 printAndVerify(
"After Machine LICM, CSE and Sinking passes");
291 printAndVerify(
"After codegen peephole optimization pass");
OSType getOS() const
getOS - Get the parsed operating system type of this triple.
FunctionPass * createStraightLineStrengthReducePass()
FunctionPass * createGVNPass(bool NoLoads=false)
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
FunctionPass * createNVPTXFavorNonGenericAddrSpacesPass()
void LLVMInitializeNVPTXTarget()
virtual void addIRPasses()
Add common target configurable passes that perform LLVM IR to IR transforms following machine indepen...
char & MachineLICMID
MachineLICM - This pass performs LICM on machine instructions.
ModulePass * createNVPTXAssignValidGlobalNamesPass()
static std::string computeDataLayout(bool is64Bit)
FunctionPass * createAllocaHoisting()
char & RegisterCoalescerID
RegisterCoalescer - This pass merges live ranges to eliminate copies.
Analysis pass providing the TargetTransformInfo.
MachineFunctionPass * createNVPTXPrologEpilogPass()
char & MachineSchedulerID
MachineScheduler - This pass schedules machine instructions.
ModulePass * createGenericToNVVMPass()
char & ProcessImplicitDefsID
ProcessImpicitDefs pass - This pass removes IMPLICIT_DEFs.
NVPTXTargetMachine32(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL)
void initializeNVPTXAssignValidGlobalNamesPass(PassRegistry &)
void initializeNVPTXLowerKernelArgsPass(PassRegistry &)
char & MachineLoopInfoID
MachineLoopInfo - This pass is a loop analysis pass.
char & StackColoringID
StackSlotColoring - This pass performs stack coloring and merging.
FunctionPass * createSROAPass(bool RequiresDomTree=true)
FunctionPass * createLowerAggrCopies()
void initializeNVPTXFavorNonGenericAddrSpacesPass(PassRegistry &)
Target-Independent Code Generator Pass Configuration Options.
FunctionPass * createDeadCodeEliminationPass()
char & MachineCSEID
MachineCSE - This pass performs global CSE on machine instructions.
TargetIRAnalysis getTargetIRAnalysis() override
Get a TargetIRAnalysis implementation for the target.
char & StackSlotColoringID
StackSlotColoring - This pass performs stack slot coloring.
char & DeadMachineInstructionElimID
DeadMachineInstructionElim - This pass removes dead machine instructions.
TargetPassConfig * createPassConfig(PassManagerBase &PM) override
Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of ...
FunctionPass * createNVPTXImageOptimizerPass()
char & PHIEliminationID
PHIElimination - This pass eliminates machine instruction PHI nodes by inserting copy instructions...
char & LiveVariablesID
LiveVariables pass - This pass computes the set of blocks in which each variable is life and sets mac...
FunctionPass * createSeparateConstOffsetFromGEPPass(const TargetMachine *TM=nullptr, bool LowerGEP=false)
void initializeNVVMReflectPass(PassRegistry &)
std::enable_if<!std::is_array< T >::value, std::unique_ptr< T > >::type make_unique(Args &&...args)
Constructs a new T() with the given args and returns a unique_ptr<T> which owns the object...
static bool is64Bit(const char *name)
MachineFunctionPass * createNVPTXReplaceImageHandlesPass()
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang","erlang-compatible garbage collector")
This class describes a target machine that is implemented with the LLVM target-independent code gener...
FunctionPass class - This class is used to implement most global optimizations.
FunctionPass * createEarlyCSEPass()
void initializeNVPTXAllocaHoistingPass(PassRegistry &)
char & MachineCopyPropagationID
MachineCopyPropagation - This pass performs copy propagation on machine instructions.
void initializeGenericToNVVMPass(PassRegistry &)
FunctionPass * createNVPTXLowerKernelArgsPass(const NVPTXTargetMachine *TM)
Triple - Helper class for working with autoconf configuration names.
void initializeNVPTXLowerAllocaPass(PassRegistry &)
BasicBlockPass * createNVPTXLowerAllocaPass()
char & TailDuplicateID
TailDuplicate - Duplicate blocks with unconditional branches into tails of their predecessors.
char & MachineSinkingID
MachineSinking - This pass performs sinking on machine instructions.
char & OptimizePHIsID
OptimizePHIs - This pass optimizes machine instruction PHIs to take advantage of opportunities create...
Target - Wrapper for Target specific information.
NVPTXTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OP, bool is64bit)
char & PeepholeOptimizerID
PeepholeOptimizer - This pass performs peephole optimizations - like extension and comparison elimina...
char & PrologEpilogCodeInserterID
PrologEpilogCodeInserter - This pass inserts prolog and epilog code, and eliminates abstract frame re...
MachineFunctionPass * createNVPTXPeephole()
FunctionPass * createNVPTXISelDag(NVPTXTargetMachine &TM, llvm::CodeGenOpt::Level OptLevel)
createNVPTXISelDag - This pass converts a legalized DAG into a NVPTX-specific DAG, ready for instruction scheduling.
~NVPTXTargetMachine() override
This file defines passes to print out IR in various granularities.
char & TwoAddressInstructionPassID
TwoAddressInstruction - This pass reduces two-address instructions to use two operands.
bool hasImageHandles() const
RegisterTargetMachine - Helper template for registering a target machine implementation, for use in the target machine initialization function.
char & BranchFolderPassID
BranchFolding - This pass performs machine code CFG based optimizations to delete branches to branche...
StringRef - Represent a constant reference to a string, i.e.
PassRegistry - This class manages the registration and intitialization of the pass subsystem as appli...
static GCMetadataPrinterRegistry::Add< OcamlGCMetadataPrinter > Y("ocaml","ocaml 3.10-compatible collector")
NVPTXTargetMachine64(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL)
char & LocalStackSlotAllocationID
LocalStackSlotAllocation - This pass assigns local frame indices to stack slots relative to one anoth...
This file describes how to lower LLVM code to machine code.
FunctionPass * createNaryReassociatePass()