LLVM  3.7.0
AArch64TargetTransformInfo.cpp
Go to the documentation of this file.
1 //===-- AArch64TargetTransformInfo.cpp - AArch64 specific TTI -------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 
13 #include "llvm/Analysis/LoopInfo.h"
15 #include "llvm/Support/Debug.h"
16 #include "llvm/Target/CostTable.h"
18 #include <algorithm>
19 using namespace llvm;
20 
21 #define DEBUG_TYPE "aarch64tti"
22 
23 /// \brief Calculate the cost of materializing a 64-bit value. This helper
24 /// method might only calculate a fraction of a larger immediate. Therefore it
25 /// is valid to return a cost of ZERO.
26 unsigned AArch64TTIImpl::getIntImmCost(int64_t Val) {
27  // Check if the immediate can be encoded within an instruction.
28  if (Val == 0 || AArch64_AM::isLogicalImmediate(Val, 64))
29  return 0;
30 
31  if (Val < 0)
32  Val = ~Val;
33 
34  // Calculate how many moves we will need to materialize this constant.
35  unsigned LZ = countLeadingZeros((uint64_t)Val);
36  return (64 - LZ + 15) / 16;
37 }
38 
39 /// \brief Calculate the cost of materializing the given constant.
40 unsigned AArch64TTIImpl::getIntImmCost(const APInt &Imm, Type *Ty) {
41  assert(Ty->isIntegerTy());
42 
43  unsigned BitSize = Ty->getPrimitiveSizeInBits();
44  if (BitSize == 0)
45  return ~0U;
46 
47  // Sign-extend all constants to a multiple of 64-bit.
48  APInt ImmVal = Imm;
49  if (BitSize & 0x3f)
50  ImmVal = Imm.sext((BitSize + 63) & ~0x3fU);
51 
52  // Split the constant into 64-bit chunks and calculate the cost for each
53  // chunk.
54  unsigned Cost = 0;
55  for (unsigned ShiftVal = 0; ShiftVal < BitSize; ShiftVal += 64) {
56  APInt Tmp = ImmVal.ashr(ShiftVal).sextOrTrunc(64);
57  int64_t Val = Tmp.getSExtValue();
58  Cost += getIntImmCost(Val);
59  }
60  // We need at least one instruction to materialze the constant.
61  return std::max(1U, Cost);
62 }
63 
64 unsigned AArch64TTIImpl::getIntImmCost(unsigned Opcode, unsigned Idx,
65  const APInt &Imm, Type *Ty) {
66  assert(Ty->isIntegerTy());
67 
68  unsigned BitSize = Ty->getPrimitiveSizeInBits();
69  // There is no cost model for constants with a bit size of 0. Return TCC_Free
70  // here, so that constant hoisting will ignore this constant.
71  if (BitSize == 0)
72  return TTI::TCC_Free;
73 
74  unsigned ImmIdx = ~0U;
75  switch (Opcode) {
76  default:
77  return TTI::TCC_Free;
78  case Instruction::GetElementPtr:
79  // Always hoist the base address of a GetElementPtr.
80  if (Idx == 0)
81  return 2 * TTI::TCC_Basic;
82  return TTI::TCC_Free;
83  case Instruction::Store:
84  ImmIdx = 0;
85  break;
86  case Instruction::Add:
87  case Instruction::Sub:
88  case Instruction::Mul:
89  case Instruction::UDiv:
90  case Instruction::SDiv:
91  case Instruction::URem:
92  case Instruction::SRem:
93  case Instruction::And:
94  case Instruction::Or:
95  case Instruction::Xor:
96  case Instruction::ICmp:
97  ImmIdx = 1;
98  break;
99  // Always return TCC_Free for the shift value of a shift instruction.
100  case Instruction::Shl:
101  case Instruction::LShr:
102  case Instruction::AShr:
103  if (Idx == 1)
104  return TTI::TCC_Free;
105  break;
106  case Instruction::Trunc:
107  case Instruction::ZExt:
108  case Instruction::SExt:
109  case Instruction::IntToPtr:
110  case Instruction::PtrToInt:
111  case Instruction::BitCast:
112  case Instruction::PHI:
113  case Instruction::Call:
114  case Instruction::Select:
115  case Instruction::Ret:
116  case Instruction::Load:
117  break;
118  }
119 
120  if (Idx == ImmIdx) {
121  unsigned NumConstants = (BitSize + 63) / 64;
122  unsigned Cost = AArch64TTIImpl::getIntImmCost(Imm, Ty);
123  return (Cost <= NumConstants * TTI::TCC_Basic)
124  ? static_cast<unsigned>(TTI::TCC_Free)
125  : Cost;
126  }
127  return AArch64TTIImpl::getIntImmCost(Imm, Ty);
128 }
129 
130 unsigned AArch64TTIImpl::getIntImmCost(Intrinsic::ID IID, unsigned Idx,
131  const APInt &Imm, Type *Ty) {
132  assert(Ty->isIntegerTy());
133 
134  unsigned BitSize = Ty->getPrimitiveSizeInBits();
135  // There is no cost model for constants with a bit size of 0. Return TCC_Free
136  // here, so that constant hoisting will ignore this constant.
137  if (BitSize == 0)
138  return TTI::TCC_Free;
139 
140  switch (IID) {
141  default:
142  return TTI::TCC_Free;
143  case Intrinsic::sadd_with_overflow:
144  case Intrinsic::uadd_with_overflow:
145  case Intrinsic::ssub_with_overflow:
146  case Intrinsic::usub_with_overflow:
147  case Intrinsic::smul_with_overflow:
148  case Intrinsic::umul_with_overflow:
149  if (Idx == 1) {
150  unsigned NumConstants = (BitSize + 63) / 64;
151  unsigned Cost = AArch64TTIImpl::getIntImmCost(Imm, Ty);
152  return (Cost <= NumConstants * TTI::TCC_Basic)
153  ? static_cast<unsigned>(TTI::TCC_Free)
154  : Cost;
155  }
156  break;
157  case Intrinsic::experimental_stackmap:
158  if ((Idx < 2) || (Imm.getBitWidth() <= 64 && isInt<64>(Imm.getSExtValue())))
159  return TTI::TCC_Free;
160  break;
161  case Intrinsic::experimental_patchpoint_void:
162  case Intrinsic::experimental_patchpoint_i64:
163  if ((Idx < 4) || (Imm.getBitWidth() <= 64 && isInt<64>(Imm.getSExtValue())))
164  return TTI::TCC_Free;
165  break;
166  }
167  return AArch64TTIImpl::getIntImmCost(Imm, Ty);
168 }
169 
172  assert(isPowerOf2_32(TyWidth) && "Ty width must be power of 2");
173  if (TyWidth == 32 || TyWidth == 64)
174  return TTI::PSK_FastHardware;
175  // TODO: AArch64TargetLowering::LowerCTPOP() supports 128bit popcount.
176  return TTI::PSK_Software;
177 }
178 
179 unsigned AArch64TTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst,
180  Type *Src) {
181  int ISD = TLI->InstructionOpcodeToISD(Opcode);
182  assert(ISD && "Invalid opcode");
183 
184  EVT SrcTy = TLI->getValueType(DL, Src);
185  EVT DstTy = TLI->getValueType(DL, Dst);
186 
187  if (!SrcTy.isSimple() || !DstTy.isSimple())
188  return BaseT::getCastInstrCost(Opcode, Dst, Src);
189 
190  static const TypeConversionCostTblEntry<MVT> ConversionTbl[] = {
191  // LowerVectorINT_TO_FP:
198 
199  // Complex: to v2f32
206 
207  // Complex: to v4f32
212 
213  // Complex: to v2f64
220 
221 
222  // LowerVectorFP_TO_INT
229 
230  // Complex, from v2f32: legal type is v2i32 (no cost) or v2i64 (1 ext).
237 
238  // Complex, from v4f32: legal type is v4i16, 1 narrowing => ~2
243 
244  // Complex, from v2f64: legal type is v2i32, 1 narrowing => ~2.
251  };
252 
253  int Idx = ConvertCostTableLookup<MVT>(
254  ConversionTbl, array_lengthof(ConversionTbl), ISD, DstTy.getSimpleVT(),
255  SrcTy.getSimpleVT());
256  if (Idx != -1)
257  return ConversionTbl[Idx].Cost;
258 
259  return BaseT::getCastInstrCost(Opcode, Dst, Src);
260 }
261 
262 unsigned AArch64TTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val,
263  unsigned Index) {
264  assert(Val->isVectorTy() && "This must be a vector type");
265 
266  if (Index != -1U) {
267  // Legalize the type.
268  std::pair<unsigned, MVT> LT = TLI->getTypeLegalizationCost(DL, Val);
269 
270  // This type is legalized to a scalar type.
271  if (!LT.second.isVector())
272  return 0;
273 
274  // The type may be split. Normalize the index to the new type.
275  unsigned Width = LT.second.getVectorNumElements();
276  Index = Index % Width;
277 
278  // The element at index zero is already inside the vector.
279  if (Index == 0)
280  return 0;
281  }
282 
283  // All other insert/extracts cost this much.
284  return 2;
285 }
286 
288  unsigned Opcode, Type *Ty, TTI::OperandValueKind Opd1Info,
289  TTI::OperandValueKind Opd2Info, TTI::OperandValueProperties Opd1PropInfo,
290  TTI::OperandValueProperties Opd2PropInfo) {
291  // Legalize the type.
292  std::pair<unsigned, MVT> LT = TLI->getTypeLegalizationCost(DL, Ty);
293 
294  int ISD = TLI->InstructionOpcodeToISD(Opcode);
295 
296  if (ISD == ISD::SDIV &&
298  Opd2PropInfo == TargetTransformInfo::OP_PowerOf2) {
299  // On AArch64, scalar signed division by constants power-of-two are
300  // normally expanded to the sequence ADD + CMP + SELECT + SRA.
301  // The OperandValue properties many not be same as that of previous
302  // operation; conservatively assume OP_None.
303  unsigned Cost =
304  getArithmeticInstrCost(Instruction::Add, Ty, Opd1Info, Opd2Info,
307  Cost += getArithmeticInstrCost(Instruction::Sub, Ty, Opd1Info, Opd2Info,
310  Cost += getArithmeticInstrCost(Instruction::Select, Ty, Opd1Info, Opd2Info,
313  Cost += getArithmeticInstrCost(Instruction::AShr, Ty, Opd1Info, Opd2Info,
316  return Cost;
317  }
318 
319  switch (ISD) {
320  default:
321  return BaseT::getArithmeticInstrCost(Opcode, Ty, Opd1Info, Opd2Info,
322  Opd1PropInfo, Opd2PropInfo);
323  case ISD::ADD:
324  case ISD::MUL:
325  case ISD::XOR:
326  case ISD::OR:
327  case ISD::AND:
328  // These nodes are marked as 'custom' for combining purposes only.
329  // We know that they are legal. See LowerAdd in ISelLowering.
330  return 1 * LT.first;
331  }
332 }
333 
334 unsigned AArch64TTIImpl::getAddressComputationCost(Type *Ty, bool IsComplex) {
335  // Address computations in vectorized code with non-consecutive addresses will
336  // likely result in more instructions compared to scalar code where the
337  // computation can more often be merged into the index mode. The resulting
338  // extra micro-ops can significantly decrease throughput.
339  unsigned NumVectorInstToHideOverhead = 10;
340 
341  if (Ty->isVectorTy() && IsComplex)
342  return NumVectorInstToHideOverhead;
343 
344  // In many cases the address computation is not merged into the instruction
345  // addressing mode.
346  return 1;
347 }
348 
349 unsigned AArch64TTIImpl::getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
350  Type *CondTy) {
351 
352  int ISD = TLI->InstructionOpcodeToISD(Opcode);
353  // We don't lower vector selects well that are wider than the register width.
354  if (ValTy->isVectorTy() && ISD == ISD::SELECT) {
355  // We would need this many instructions to hide the scalarization happening.
356  const unsigned AmortizationCost = 20;
358  VectorSelectTbl[] = {
359  { ISD::SELECT, MVT::v16i1, MVT::v16i16, 16 * AmortizationCost },
360  { ISD::SELECT, MVT::v8i1, MVT::v8i32, 8 * AmortizationCost },
361  { ISD::SELECT, MVT::v16i1, MVT::v16i32, 16 * AmortizationCost },
362  { ISD::SELECT, MVT::v4i1, MVT::v4i64, 4 * AmortizationCost },
363  { ISD::SELECT, MVT::v8i1, MVT::v8i64, 8 * AmortizationCost },
364  { ISD::SELECT, MVT::v16i1, MVT::v16i64, 16 * AmortizationCost }
365  };
366 
367  EVT SelCondTy = TLI->getValueType(DL, CondTy);
368  EVT SelValTy = TLI->getValueType(DL, ValTy);
369  if (SelCondTy.isSimple() && SelValTy.isSimple()) {
370  int Idx =
371  ConvertCostTableLookup(VectorSelectTbl, ISD, SelCondTy.getSimpleVT(),
372  SelValTy.getSimpleVT());
373  if (Idx != -1)
374  return VectorSelectTbl[Idx].Cost;
375  }
376  }
377  return BaseT::getCmpSelInstrCost(Opcode, ValTy, CondTy);
378 }
379 
380 unsigned AArch64TTIImpl::getMemoryOpCost(unsigned Opcode, Type *Src,
381  unsigned Alignment,
382  unsigned AddressSpace) {
383  std::pair<unsigned, MVT> LT = TLI->getTypeLegalizationCost(DL, Src);
384 
385  if (Opcode == Instruction::Store && Src->isVectorTy() && Alignment != 16 &&
386  Src->getVectorElementType()->isIntegerTy(64)) {
387  // Unaligned stores are extremely inefficient. We don't split
388  // unaligned v2i64 stores because the negative impact that has shown in
389  // practice on inlined memcpy code.
390  // We make v2i64 stores expensive so that we will only vectorize if there
391  // are 6 other instructions getting vectorized.
392  unsigned AmortizationCost = 6;
393 
394  return LT.first * 2 * AmortizationCost;
395  }
396 
397  if (Src->isVectorTy() && Src->getVectorElementType()->isIntegerTy(8) &&
398  Src->getVectorNumElements() < 8) {
399  // We scalarize the loads/stores because there is not v.4b register and we
400  // have to promote the elements to v.4h.
401  unsigned NumVecElts = Src->getVectorNumElements();
402  unsigned NumVectorizableInstsToAmortize = NumVecElts * 2;
403  // We generate 2 instructions per vector element.
404  return NumVectorizableInstsToAmortize * NumVecElts * 2;
405  }
406 
407  return LT.first;
408 }
409 
411  unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
412  unsigned Alignment, unsigned AddressSpace) {
413  assert(Factor >= 2 && "Invalid interleave factor");
414  assert(isa<VectorType>(VecTy) && "Expect a vector type");
415 
416  if (Factor <= TLI->getMaxSupportedInterleaveFactor()) {
417  unsigned NumElts = VecTy->getVectorNumElements();
418  Type *SubVecTy = VectorType::get(VecTy->getScalarType(), NumElts / Factor);
419  unsigned SubVecSize = DL.getTypeAllocSize(SubVecTy);
420 
421  // ldN/stN only support legal vector types of size 64 or 128 in bits.
422  if (NumElts % Factor == 0 && (SubVecSize == 64 || SubVecSize == 128))
423  return Factor;
424  }
425 
426  return BaseT::getInterleavedMemoryOpCost(Opcode, VecTy, Factor, Indices,
427  Alignment, AddressSpace);
428 }
429 
431  unsigned Cost = 0;
432  for (auto *I : Tys) {
433  if (!I->isVectorTy())
434  continue;
435  if (I->getScalarSizeInBits() * I->getVectorNumElements() == 128)
436  Cost += getMemoryOpCost(Instruction::Store, I, 128, 0) +
438  }
439  return Cost;
440 }
441 
443  if (ST->isCortexA57())
444  return 4;
445  return 2;
446 }
447 
450  // Enable partial unrolling and runtime unrolling.
452 
453  // For inner loop, it is more likely to be a hot one, and the runtime check
454  // can be promoted out from LICM pass, so the overhead is less, let's try
455  // a larger threshold to unroll more loops.
456  if (L->getLoopDepth() > 1)
457  UP.PartialThreshold *= 2;
458 
459  // Disable partial & runtime unrolling on -Os.
461 }
462 
464  Type *ExpectedType) {
465  switch (Inst->getIntrinsicID()) {
466  default:
467  return nullptr;
468  case Intrinsic::aarch64_neon_st2:
469  case Intrinsic::aarch64_neon_st3:
470  case Intrinsic::aarch64_neon_st4: {
471  // Create a struct type
472  StructType *ST = dyn_cast<StructType>(ExpectedType);
473  if (!ST)
474  return nullptr;
475  unsigned NumElts = Inst->getNumArgOperands() - 1;
476  if (ST->getNumElements() != NumElts)
477  return nullptr;
478  for (unsigned i = 0, e = NumElts; i != e; ++i) {
479  if (Inst->getArgOperand(i)->getType() != ST->getElementType(i))
480  return nullptr;
481  }
482  Value *Res = UndefValue::get(ExpectedType);
483  IRBuilder<> Builder(Inst);
484  for (unsigned i = 0, e = NumElts; i != e; ++i) {
485  Value *L = Inst->getArgOperand(i);
486  Res = Builder.CreateInsertValue(Res, L, i);
487  }
488  return Res;
489  }
490  case Intrinsic::aarch64_neon_ld2:
491  case Intrinsic::aarch64_neon_ld3:
492  case Intrinsic::aarch64_neon_ld4:
493  if (Inst->getType() == ExpectedType)
494  return Inst;
495  return nullptr;
496  }
497 }
498 
500  MemIntrinsicInfo &Info) {
501  switch (Inst->getIntrinsicID()) {
502  default:
503  break;
504  case Intrinsic::aarch64_neon_ld2:
505  case Intrinsic::aarch64_neon_ld3:
506  case Intrinsic::aarch64_neon_ld4:
507  Info.ReadMem = true;
508  Info.WriteMem = false;
509  Info.Vol = false;
510  Info.NumMemRefs = 1;
511  Info.PtrVal = Inst->getArgOperand(0);
512  break;
513  case Intrinsic::aarch64_neon_st2:
514  case Intrinsic::aarch64_neon_st3:
515  case Intrinsic::aarch64_neon_st4:
516  Info.ReadMem = false;
517  Info.WriteMem = true;
518  Info.Vol = false;
519  Info.NumMemRefs = 1;
520  Info.PtrVal = Inst->getArgOperand(Inst->getNumArgOperands() - 1);
521  break;
522  }
523 
524  switch (Inst->getIntrinsicID()) {
525  default:
526  return false;
527  case Intrinsic::aarch64_neon_ld2:
528  case Intrinsic::aarch64_neon_st2:
529  Info.MatchingId = VECTOR_LDST_TWO_ELEMENTS;
530  break;
531  case Intrinsic::aarch64_neon_ld3:
532  case Intrinsic::aarch64_neon_st3:
533  Info.MatchingId = VECTOR_LDST_THREE_ELEMENTS;
534  break;
535  case Intrinsic::aarch64_neon_ld4:
536  case Intrinsic::aarch64_neon_st4:
537  Info.MatchingId = VECTOR_LDST_FOUR_ELEMENTS;
538  break;
539  }
540  return true;
541 }
APInt LLVM_ATTRIBUTE_UNUSED_RESULT ashr(unsigned shiftAmt) const
Arithmetic right-shift function.
Definition: APInt.cpp:1051
unsigned getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef< unsigned > Indices, unsigned Alignment, unsigned AddressSpace)
Cost tables and simple lookup functions.
Intrinsic::ID getIntrinsicID() const
getIntrinsicID - Return the intrinsic ID of this intrinsic.
Definition: IntrinsicInst.h:44
TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth)
unsigned PartialOptSizeThreshold
The cost threshold for the unrolled loop when optimizing for size, like OptSizeThreshold, but used for partial/runtime unrolling (set to UINT_MAX to disable).
unsigned PartialThreshold
The cost threshold for the unrolled loop, like Threshold, but used for partial/runtime unrolling (set...
Type Conversion Cost Table.
Definition: CostTable.h:49
unsigned getMaxInterleaveFactor(unsigned VF)
std::size_t countLeadingZeros(T Val, ZeroBehavior ZB=ZB_Width)
Count number of 0's from the most significant bit to the least stopping at the first 1...
Definition: MathExtras.h:178
unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy)
unsigned getAddressComputationCost(Type *Ty, bool IsComplex)
unsigned getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src)
unsigned getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src)
Definition: BasicTTIImpl.h:342
StructType - Class to represent struct types.
Definition: DerivedTypes.h:191
unsigned getNumArgOperands() const
getNumArgOperands - Return the number of call arguments.
This provides a uniform API for creating instructions and inserting them into a basic block: either a...
Definition: IRBuilder.h:517
static bool isLogicalImmediate(uint64_t imm, unsigned regSize)
isLogicalImmediate - Return true if the immediate is valid for a logical immediate instruction of the...
Type * getVectorElementType() const
Definition: Type.h:364
unsigned getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment, unsigned AddressSpace)
int InstructionOpcodeToISD(unsigned Opcode) const
Get the ISD node that corresponds to the Instruction class opcode.
unsigned getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef< unsigned > Indices, unsigned Alignment, unsigned AddressSpace)
Definition: BasicTTIImpl.h:518
[SU]INT_TO_FP - These operators convert integers (whose interpreted sign depends on the first letter)...
Definition: ISDOpcodes.h:393
PopcntSupportKind
Flags indicating the kind of support for population count.
Simple integer binary arithmetic operators.
Definition: ISDOpcodes.h:191
EVT getValueType(const DataLayout &DL, Type *Ty, bool AllowUnknown=false) const
Return the EVT corresponding to this LLVM type.
bool getTgtMemIntrinsic(IntrinsicInst *Inst, MemIntrinsicInfo &Info)
FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.
Definition: ISDOpcodes.h:436
unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy)
Definition: BasicTTIImpl.h:440
LLVM_CONSTEXPR size_t array_lengthof(T(&)[N])
Find the length of an array.
Definition: STLExtras.h:247
Value * getOrCreateResultFromMemIntrinsic(IntrinsicInst *Inst, Type *ExpectedType)
The instances of the Type class are immutable: once they are created, they are never changed...
Definition: Type.h:45
bool isVectorTy() const
isVectorTy - True if this is an instance of VectorType.
Definition: Type.h:226
Type * getElementType(unsigned N) const
Definition: DerivedTypes.h:291
int64_t getSExtValue() const
Get sign extended value.
Definition: APInt.h:1339
APInt Or(const APInt &LHS, const APInt &RHS)
Bitwise OR function for APInt.
Definition: APInt.h:1895
APInt Xor(const APInt &LHS, const APInt &RHS)
Bitwise XOR function for APInt.
Definition: APInt.h:1900
Expected to fold away in lowering.
APInt LLVM_ATTRIBUTE_UNUSED_RESULT sext(unsigned width) const
Sign extend to a new width.
Definition: APInt.cpp:955
unsigned getBitWidth() const
Return the number of bits in the APInt.
Definition: APInt.h:1273
This file provides a helper that implements much of the TTI interface in terms of the target-independ...
This file a TargetTransformInfo::Concept conforming object specific to the AArch64 target machine...
EVT - Extended Value Type.
Definition: ValueTypes.h:31
static UndefValue * get(Type *T)
get() - Static factory methods - Return an 'undef' object of the specified type.
Definition: Constants.cpp:1473
OperandValueProperties
Additional properties of an operand's values.
unsigned getCostOfKeepingLiveOverCall(ArrayRef< Type * > Tys)
uint64_t getTypeAllocSize(Type *Ty) const
Returns the offset in bytes between successive objects of the specified type, including alignment pad...
Definition: DataLayout.h:388
unsigned getVectorNumElements() const
Definition: Type.cpp:212
Type * getType() const
All values are typed, get the type of this value.
Definition: Value.h:222
AddressSpace
Definition: NVPTXBaseInfo.h:22
unsigned getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::OperandValueKind Opd1Info=TTI::OK_AnyValue, TTI::OperandValueKind Opd2Info=TTI::OK_AnyValue, TTI::OperandValueProperties Opd1PropInfo=TTI::OP_None, TTI::OperandValueProperties Opd2PropInfo=TTI::OP_None)
Definition: BasicTTIImpl.h:285
Value * getArgOperand(unsigned i) const
getArgOperand/setArgOperand - Return/set the i-th call argument.
Class for arbitrary precision integers.
Definition: APInt.h:73
Select(COND, TRUEVAL, FALSEVAL).
Definition: ISDOpcodes.h:342
bool isIntegerTy() const
isIntegerTy - True if this is an instance of IntegerType.
Definition: Type.h:193
LLVM_ATTRIBUTE_UNUSED_RESULT std::enable_if< !is_simple_type< Y >::value, typename cast_retty< X, const Y >::ret_type >::type dyn_cast(const Y &Val)
Definition: Casting.h:285
Value * CreateInsertValue(Value *Agg, Value *Val, ArrayRef< unsigned > Idxs, const Twine &Name="")
Definition: IRBuilder.h:1549
const Type * getScalarType() const LLVM_READONLY
getScalarType - If this is a vector type, return the element type, otherwise return 'this'...
Definition: Type.cpp:51
APInt And(const APInt &LHS, const APInt &RHS)
Bitwise AND function for APInt.
Definition: APInt.h:1890
Bitwise operators - logical and, logical or, logical xor.
Definition: ISDOpcodes.h:321
unsigned getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index)
Parameters that control the generic loop unrolling transformation.
#define I(x, y, z)
Definition: MD5.cpp:54
void getUnrollingPreferences(Loop *L, TTI::UnrollingPreferences &UP)
The cost of a typical 'add' instruction.
bool isSimple() const
isSimple - Test if the given EVT is simple (as opposed to being extended).
Definition: ValueTypes.h:94
int ConvertCostTableLookup(const TypeConversionCostTblEntry< TypeTy > *Tbl, unsigned len, int ISD, CompareTy Dst, CompareTy Src)
Find in type conversion cost table, TypeTy must be comparable to CompareTy by ==. ...
Definition: CostTable.h:59
unsigned getPrimitiveSizeInBits() const LLVM_READONLY
getPrimitiveSizeInBits - Return the basic size of this type if it is a primitive type.
Definition: Type.cpp:121
LLVM Value Representation.
Definition: Value.h:69
APInt LLVM_ATTRIBUTE_UNUSED_RESULT sextOrTrunc(unsigned width) const
Sign extend or truncate to width.
Definition: APInt.cpp:1023
static VectorType * get(Type *ElementType, unsigned NumElements)
VectorType::get - This static method is the primary way to construct an VectorType.
Definition: Type.cpp:713
unsigned getIntImmCost(int64_t Val)
Calculate the cost of materializing a 64-bit value.
unsigned getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::OperandValueKind Opd1Info=TTI::OK_AnyValue, TTI::OperandValueKind Opd2Info=TTI::OK_AnyValue, TTI::OperandValueProperties Opd1PropInfo=TTI::OP_None, TTI::OperandValueProperties Opd2PropInfo=TTI::OP_None)
bool isPowerOf2_32(uint32_t Value)
isPowerOf2_32 - This function returns true if the argument is a power of two > 0. ...
Definition: MathExtras.h:354
OperandValueKind
Additional information about an operand's possible values.
This pass exposes codegen information to IR-level passes.
void getUnrollingPreferences(Loop *L, TTI::UnrollingPreferences &UP)
Definition: BasicTTIImpl.h:219
unsigned getNumElements() const
Random access to the elements.
Definition: DerivedTypes.h:290
unsigned getLoopDepth() const
getLoopDepth - Return the nesting level of this loop.
Definition: LoopInfo.h:89
Information about a load/store intrinsic defined by the target.
std::pair< unsigned, MVT > getTypeLegalizationCost(const DataLayout &DL, Type *Ty) const
Estimate the cost of type-legalization and the legalized type.
MVT getSimpleVT() const
getSimpleVT - Return the SimpleValueType held in the specified simple EVT.
Definition: ValueTypes.h:203
IntrinsicInst - A useful wrapper class for inspecting calls to intrinsic functions.
Definition: IntrinsicInst.h:37
This file describes how to lower LLVM code to machine code.