25 #define DEBUG_TYPE "aarch64-dead-defs"
27 STATISTIC(NumDeadDefsReplaced,
"Number of dead definitions replaced");
42 const char *getPassName()
const override {
return "Dead register definitions"; }
52 bool AArch64DeadRegisterDefinitions::implicitlyDefinesOverlappingReg(
55 if (MO.isReg() && MO.isDef())
56 if (TRI->regsOverlap(Reg, MO.getReg()))
61 bool AArch64DeadRegisterDefinitions::usesFrameIndex(
const MachineInstr &MI) {
68 bool AArch64DeadRegisterDefinitions::processMachineBasicBlock(
72 if (usesFrameIndex(MI)) {
76 DEBUG(
dbgs() <<
" Ignoring, operand is frame index\n");
82 assert(!MO.
isImplicit() &&
"Unexpected implicit def!");
83 DEBUG(
dbgs() <<
" Dead def operand #" << i <<
" in:\n ";
87 DEBUG(
dbgs() <<
" Ignoring, def is tied operand.\n");
92 if (implicitlyDefinesOverlappingReg(MO.
getReg(),
MI)) {
93 DEBUG(
dbgs() <<
" Ignoring, implicitly defines overlap reg.\n");
101 DEBUG(
dbgs() <<
" Ignoring, register is not a GPR.\n");
103 case AArch64::GPR32RegClassID:
104 NewReg = AArch64::WZR;
106 case AArch64::GPR64RegClassID:
107 NewReg = AArch64::XZR;
110 DEBUG(
dbgs() <<
" Replacing with zero register. New:\n ");
113 ++NumDeadDefsReplaced;
122 bool AArch64DeadRegisterDefinitions::runOnMachineFunction(
MachineFunction &MF) {
124 bool Changed =
false;
125 DEBUG(
dbgs() <<
"***** AArch64DeadRegisterDefinitions *****\n");
128 if (processMachineBasicBlock(MBB))
134 return new AArch64DeadRegisterDefinitions();
STATISTIC(NumFunctions,"Total number of functions")
iterator_range< mop_iterator > uses()
unsigned getNumDefs() const
Return the number of MachineOperands that are register definitions.
const MCInstrDesc & getDesc() const
Returns the target instruction descriptor of this MachineInstr.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
bool isReg() const
isReg - Tests if this is a MO_Register operand.
Reg
All possible values of the reg field in the ModR/M byte.
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
void print(raw_ostream &OS, bool SkipOpers=false) const
const MachineOperand & getOperand(unsigned i) const
bool isRegTiedToUseOperand(unsigned DefOpIdx, unsigned *UseOpIdx=nullptr) const
Given the index of a register def operand, check if the register def is tied to a source operand...
Represent the analysis usage information of a pass.
FunctionPass class - This class is used to implement most global optimizations.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
MachineOperand class - Representation of each machine instruction operand.
void setPreservesCFG()
This function should be called by the pass, iff they do not:
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
iterator_range< mop_iterator > implicit_operands()
Representation of each machine instruction.
int16_t RegClass
This specifies the register class enumeration of the operand if the operand is a register.
void setReg(unsigned Reg)
Change the register this operand corresponds to.
unsigned getReg() const
getReg - Returns the register number.
const MCOperandInfo * OpInfo
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
FunctionPass * createAArch64DeadRegisterDefinitions()