LLVM  3.7.0
MipsSEISelDAGToDAG.h
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1 //===-- MipsSEISelDAGToDAG.h - A Dag to Dag Inst Selector for MipsSE -----===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // Subclass of MipsDAGToDAGISel specialized for mips32/64.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_MIPS_MIPSSEISELDAGTODAG_H
15 #define LLVM_LIB_TARGET_MIPS_MIPSSEISELDAGTODAG_H
16 
17 #include "MipsISelDAGToDAG.h"
18 
19 namespace llvm {
20 
22 
23 public:
25 
26 private:
27 
28  bool runOnMachineFunction(MachineFunction &MF) override;
29 
30  void addDSPCtrlRegOperands(bool IsDef, MachineInstr &MI,
32 
33  unsigned getMSACtrlReg(const SDValue RegIdx) const;
34 
35  bool replaceUsesWithZeroReg(MachineRegisterInfo *MRI, const MachineInstr&);
36 
37  std::pair<SDNode*, SDNode*> selectMULT(SDNode *N, unsigned Opc, SDLoc dl,
38  EVT Ty, bool HasLo, bool HasHi);
39 
40  SDNode *selectAddESubE(unsigned MOp, SDValue InFlag, SDValue CmpLHS,
41  SDLoc DL, SDNode *Node) const;
42 
43  bool selectAddrFrameIndex(SDValue Addr, SDValue &Base, SDValue &Offset) const;
44  bool selectAddrFrameIndexOffset(SDValue Addr, SDValue &Base, SDValue &Offset,
45  unsigned OffsetBits) const;
46 
47  bool selectAddrRegImm(SDValue Addr, SDValue &Base,
48  SDValue &Offset) const override;
49 
50  bool selectAddrRegReg(SDValue Addr, SDValue &Base,
51  SDValue &Offset) const override;
52 
53  bool selectAddrDefault(SDValue Addr, SDValue &Base,
54  SDValue &Offset) const override;
55 
56  bool selectIntAddr(SDValue Addr, SDValue &Base,
57  SDValue &Offset) const override;
58 
59  bool selectAddrRegImm9(SDValue Addr, SDValue &Base,
60  SDValue &Offset) const;
61 
62  bool selectAddrRegImm10(SDValue Addr, SDValue &Base,
63  SDValue &Offset) const;
64 
65  bool selectAddrRegImm12(SDValue Addr, SDValue &Base,
66  SDValue &Offset) const;
67 
68  bool selectAddrRegImm16(SDValue Addr, SDValue &Base,
69  SDValue &Offset) const;
70 
71  bool selectIntAddrMM(SDValue Addr, SDValue &Base,
72  SDValue &Offset) const override;
73 
74  bool selectIntAddrLSL2MM(SDValue Addr, SDValue &Base,
75  SDValue &Offset) const override;
76 
77  bool selectIntAddrMSA(SDValue Addr, SDValue &Base,
78  SDValue &Offset) const override;
79 
80  /// \brief Select constant vector splats.
81  bool selectVSplat(SDNode *N, APInt &Imm,
82  unsigned MinSizeInBits) const override;
83  /// \brief Select constant vector splats whose value fits in a given integer.
84  bool selectVSplatCommon(SDValue N, SDValue &Imm, bool Signed,
85  unsigned ImmBitSize) const;
86  /// \brief Select constant vector splats whose value fits in a uimm1.
87  bool selectVSplatUimm1(SDValue N, SDValue &Imm) const override;
88  /// \brief Select constant vector splats whose value fits in a uimm2.
89  bool selectVSplatUimm2(SDValue N, SDValue &Imm) const override;
90  /// \brief Select constant vector splats whose value fits in a uimm3.
91  bool selectVSplatUimm3(SDValue N, SDValue &Imm) const override;
92  /// \brief Select constant vector splats whose value fits in a uimm4.
93  bool selectVSplatUimm4(SDValue N, SDValue &Imm) const override;
94  /// \brief Select constant vector splats whose value fits in a uimm5.
95  bool selectVSplatUimm5(SDValue N, SDValue &Imm) const override;
96  /// \brief Select constant vector splats whose value fits in a uimm6.
97  bool selectVSplatUimm6(SDValue N, SDValue &Imm) const override;
98  /// \brief Select constant vector splats whose value fits in a uimm8.
99  bool selectVSplatUimm8(SDValue N, SDValue &Imm) const override;
100  /// \brief Select constant vector splats whose value fits in a simm5.
101  bool selectVSplatSimm5(SDValue N, SDValue &Imm) const override;
102  /// \brief Select constant vector splats whose value is a power of 2.
103  bool selectVSplatUimmPow2(SDValue N, SDValue &Imm) const override;
104  /// \brief Select constant vector splats whose value is the inverse of a
105  /// power of 2.
106  bool selectVSplatUimmInvPow2(SDValue N, SDValue &Imm) const override;
107  /// \brief Select constant vector splats whose value is a run of set bits
108  /// ending at the most significant bit
109  bool selectVSplatMaskL(SDValue N, SDValue &Imm) const override;
110  /// \brief Select constant vector splats whose value is a run of set bits
111  /// starting at bit zero.
112  bool selectVSplatMaskR(SDValue N, SDValue &Imm) const override;
113 
114  std::pair<bool, SDNode*> selectNode(SDNode *Node) override;
115 
116  void processFunctionAfterISel(MachineFunction &MF) override;
117 
118  // Insert instructions to initialize the global base register in the
119  // first MBB of the function.
120  void initGlobalBaseReg(MachineFunction &MF);
121 
122  bool SelectInlineAsmMemoryOperand(const SDValue &Op,
123  unsigned ConstraintID,
124  std::vector<SDValue> &OutOps) override;
125 };
126 
127 FunctionPass *createMipsSEISelDag(MipsTargetMachine &TM);
128 
129 }
130 
131 #endif
MachineFunction * MF
MipsSEDAGToDAGISel(MipsTargetMachine &TM)
FunctionPass * createMipsSEISelDag(MipsTargetMachine &TM)
EVT - Extended Value Type.
Definition: ValueTypes.h:31
Wrapper class for IR location info (IR ordering and DebugLoc) to be passed into SDNode creation funct...
Represents one node in the SelectionDAG.
Class for arbitrary precision integers.
Definition: APInt.h:73
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
Representation of each machine instruction.
Definition: MachineInstr.h:51
#define N
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation...