16 #ifndef LLVM_LIB_TARGET_R600_AMDGPUREGISTERINFO_H
17 #define LLVM_LIB_TARGET_R600_AMDGPUREGISTERINFO_H
22 #define GET_REGINFO_HEADER
23 #define GET_REGINFO_ENUM
24 #include "AMDGPUGenRegisterInfo.inc"
28 class AMDGPUSubtarget;
29 class TargetInstrInfo;
37 assert(!
"Unimplemented");
return BitVector();
41 assert(!
"Unimplemented");
return nullptr;
45 assert(!
"Unimplemented");
return 0;
54 unsigned FIOperandNum,
unsigned getIndirectSubReg(unsigned IndirectIndex) const
const MCPhysReg * getCalleeSavedRegs(const MachineFunction *MF) const override
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
BitVector getReservedRegs(const MachineFunction &MF) const override
virtual const TargetRegisterClass * getCFGStructurizerRegClass(MVT VT) const
Reg
All possible values of the reg field in the ModR/M byte.
MVT - Machine Value Type.
bundle_iterator - MachineBasicBlock iterator that automatically skips over MIs that are inside bundle...
unsigned getSubRegFromChannel(unsigned Channel) const
virtual unsigned getHWRegIndex(unsigned Reg) const
static const MCPhysReg CalleeSavedReg
void eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj, unsigned FIOperandNum, RegScavenger *RS) const override
unsigned getFrameRegister(const MachineFunction &MF) const override