LLVM  3.7.0
MCTargetAsmParser.h
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1 //===-- llvm/MC/MCTargetAsmParser.h - Target Assembly Parser ----*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 
10 #ifndef LLVM_MC_MCTARGETASMPARSER_H
11 #define LLVM_MC_MCTARGETASMPARSER_H
12 
13 #include "llvm/MC/MCExpr.h"
16 #include <memory>
17 
18 namespace llvm {
19 class AsmToken;
20 class MCInst;
21 class MCParsedAsmOperand;
22 class MCStreamer;
23 class SMLoc;
24 class StringRef;
25 template <typename T> class SmallVectorImpl;
26 
28 
30  AOK_Delete = 0, // Rewrite should be ignored.
31  AOK_Align, // Rewrite align as .align.
32  AOK_DotOperator, // Rewrite a dot operator expression as an immediate.
33  // E.g., [eax].foo.bar -> [eax].8
34  AOK_Emit, // Rewrite _emit as .byte.
35  AOK_Imm, // Rewrite as $$N.
36  AOK_ImmPrefix, // Add $$ before a parsed Imm.
37  AOK_Input, // Rewrite in terms of $N.
38  AOK_Output, // Rewrite in terms of $N.
39  AOK_SizeDirective, // Add a sizing directive (e.g., dword ptr).
40  AOK_Label, // Rewrite local labels.
41  AOK_Skip // Skip emission (e.g., offset/type operators).
42 };
43 
44 const char AsmRewritePrecedence [] = {
45  0, // AOK_Delete
46  2, // AOK_Align
47  2, // AOK_DotOperator
48  2, // AOK_Emit
49  4, // AOK_Imm
50  4, // AOK_ImmPrefix
51  3, // AOK_Input
52  3, // AOK_Output
53  5, // AOK_SizeDirective
54  1, // AOK_Label
55  2 // AOK_Skip
56 };
57 
58 struct AsmRewrite {
61  unsigned Len;
62  unsigned Val;
64 public:
65  AsmRewrite(AsmRewriteKind kind, SMLoc loc, unsigned len = 0, unsigned val = 0)
66  : Kind(kind), Loc(loc), Len(len), Val(val) {}
67  AsmRewrite(AsmRewriteKind kind, SMLoc loc, unsigned len, StringRef label)
68  : Kind(kind), Loc(loc), Len(len), Val(0), Label(label) {}
69 };
70 
72 
74 
77  : AsmRewrites(rewrites) {}
78 };
79 
80 /// MCTargetAsmParser - Generic interface to target specific assembly parsers.
82 public:
89  };
90 
91 private:
92  MCTargetAsmParser(const MCTargetAsmParser &) = delete;
93  void operator=(const MCTargetAsmParser &) = delete;
94 protected: // Can only create subclasses.
96 
97  /// AvailableFeatures - The current set of available features.
99 
100  /// ParsingInlineAsm - Are we parsing ms-style inline assembly?
102 
103  /// SemaCallback - The Sema callback implementation. Must be set when parsing
104  /// ms-style inline assembly.
106 
107  /// Set of options which affects instrumentation of inline assembly.
109 
110 public:
111  ~MCTargetAsmParser() override;
112 
113  uint64_t getAvailableFeatures() const { return AvailableFeatures; }
114  void setAvailableFeatures(uint64_t Value) { AvailableFeatures = Value; }
115 
117  void setParsingInlineAsm (bool Value) { ParsingInlineAsm = Value; }
118 
120 
122  SemaCallback = Callback;
123  }
124 
125  virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc,
126  SMLoc &EndLoc) = 0;
127 
128  /// Sets frame register corresponding to the current MachineFunction.
129  virtual void SetFrameRegister(unsigned RegNo) {}
130 
131  /// ParseInstruction - Parse one assembly instruction.
132  ///
133  /// The parser is positioned following the instruction name. The target
134  /// specific instruction parser should parse the entire instruction and
135  /// construct the appropriate MCInst, or emit an error. On success, the entire
136  /// line should be parsed up to and including the end-of-statement token. On
137  /// failure, the parser is not required to read to the end of the line.
138  //
139  /// \param Name - The instruction name.
140  /// \param NameLoc - The source location of the name.
141  /// \param Operands [out] - The list of parsed operands, this returns
142  /// ownership of them to the caller.
143  /// \return True on failure.
145  SMLoc NameLoc, OperandVector &Operands) = 0;
146 
147  /// ParseDirective - Parse a target specific assembler directive
148  ///
149  /// The parser is positioned following the directive name. The target
150  /// specific directive parser should parse the entire directive doing or
151  /// recording any target specific work, or return true and do nothing if the
152  /// directive is not target specific. If the directive is specific for
153  /// the target, the entire line is parsed up to and including the
154  /// end-of-statement token and false is returned.
155  ///
156  /// \param DirectiveID - the identifier token of the directive.
157  virtual bool ParseDirective(AsmToken DirectiveID) = 0;
158 
159  /// mnemonicIsValid - This returns true if this is a valid mnemonic and false
160  /// otherwise.
161  virtual bool mnemonicIsValid(StringRef Mnemonic, unsigned VariantID) = 0;
162 
163  /// MatchAndEmitInstruction - Recognize a series of operands of a parsed
164  /// instruction as an actual MCInst and emit it to the specified MCStreamer.
165  /// This returns false on success and returns true on failure to match.
166  ///
167  /// On failure, the target parser is responsible for emitting a diagnostic
168  /// explaining the match failure.
169  virtual bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
171  uint64_t &ErrorInfo,
172  bool MatchingInlineAsm) = 0;
173 
174  /// Allows targets to let registers opt out of clobber lists.
175  virtual bool OmitRegisterFromClobberLists(unsigned RegNo) { return false; }
176 
177  /// Allow a target to add special case operand matching for things that
178  /// tblgen doesn't/can't handle effectively. For example, literal
179  /// immediates on ARM. TableGen expects a token operand, but the parser
180  /// will recognize them as immediates.
182  unsigned Kind) {
183  return Match_InvalidOperand;
184  }
185 
186  /// checkTargetMatchPredicate - Validate the instruction match against
187  /// any complex target predicates not expressible via match classes.
188  virtual unsigned checkTargetMatchPredicate(MCInst &Inst) {
189  return Match_Success;
190  }
191 
192  virtual void convertToMapAndConstraints(unsigned Kind,
193  const OperandVector &Operands) = 0;
194 
195  virtual const MCExpr *applyModifierToExpr(const MCExpr *E,
197  MCContext &Ctx) {
198  return nullptr;
199  }
200 
201  virtual void onLabelParsed(MCSymbol *Symbol) { };
202 };
203 
204 } // End llvm namespace
205 
206 #endif
MCAsmParserSemaCallback * SemaCallback
SemaCallback - The Sema callback implementation.
SmallVectorImpl< AsmRewrite > * AsmRewrites
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:39
MCTargetAsmParser - Generic interface to target specific assembly parsers.
ParseInstructionInfo(SmallVectorImpl< AsmRewrite > *rewrites)
virtual void onLabelParsed(MCSymbol *Symbol)
AsmRewrite(AsmRewriteKind kind, SMLoc loc, unsigned len, StringRef label)
MCTargetOptions MCOptions
Set of options which affects instrumentation of inline assembly.
virtual unsigned validateTargetOperandClass(MCParsedAsmOperand &Op, unsigned Kind)
Allow a target to add special case operand matching for things that tblgen doesn't/can't handle effec...
virtual void convertToMapAndConstraints(unsigned Kind, const OperandVector &Operands)=0
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APInt.h:33
Base class for the full range of assembler expressions which are needed for parsing.
Definition: MCExpr.h:33
virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc)=0
Target independent representation for an assembler token.
Definition: MCAsmLexer.h:22
MCParsedAsmOperand - This abstract class represents a source-level assembly instruction operand...
Context object for machine code objects.
Definition: MCContext.h:48
uint64_t getAvailableFeatures() const
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:150
virtual void SetFrameRegister(unsigned RegNo)
Sets frame register corresponding to the current MachineFunction.
Streaming machine code generation interface.
Definition: MCStreamer.h:157
virtual bool OmitRegisterFromClobberLists(unsigned RegNo)
Allows targets to let registers opt out of clobber lists.
uint64_t AvailableFeatures
AvailableFeatures - The current set of available features.
void setSemaCallback(MCAsmParserSemaCallback *Callback)
virtual unsigned checkTargetMatchPredicate(MCInst &Inst)
checkTargetMatchPredicate - Validate the instruction match against any complex target predicates not ...
virtual bool mnemonicIsValid(StringRef Mnemonic, unsigned VariantID)=0
mnemonicIsValid - This returns true if this is a valid mnemonic and false otherwise.
void setParsingInlineAsm(bool Value)
Generic Sema callback for assembly parser.
Definition: MCAsmParser.h:49
SI Fold Operands
void setAvailableFeatures(uint64_t Value)
virtual bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name, SMLoc NameLoc, OperandVector &Operands)=0
ParseInstruction - Parse one assembly instruction.
AsmRewrite(AsmRewriteKind kind, SMLoc loc, unsigned len=0, unsigned val=0)
bool ParsingInlineAsm
ParsingInlineAsm - Are we parsing ms-style inline assembly?
virtual bool ParseDirective(AsmToken DirectiveID)=0
ParseDirective - Parse a target specific assembler directive.
virtual const MCExpr * applyModifierToExpr(const MCExpr *E, MCSymbolRefExpr::VariantKind, MCContext &Ctx)
MCTargetOptions getTargetOptions() const
SmallVectorImpl< std::unique_ptr< MCParsedAsmOperand > > OperandVector
const ARM::ArchExtKind Kind
Generic interface for extending the MCAsmParser, which is implemented by target and object file assem...
const char AsmRewritePrecedence[]
LLVM Value Representation.
Definition: Value.h:69
AsmRewriteKind Kind
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:40
Represents a location in source code.
Definition: SMLoc.h:23
virtual bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, OperandVector &Operands, MCStreamer &Out, uint64_t &ErrorInfo, bool MatchingInlineAsm)=0
MatchAndEmitInstruction - Recognize a series of operands of a parsed instruction as an actual MCInst ...