LLVM  3.7.0
MachineOperand.h
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1 //===-- llvm/CodeGen/MachineOperand.h - MachineOperand class ----*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains the declaration of the MachineOperand class.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_CODEGEN_MACHINEOPERAND_H
15 #define LLVM_CODEGEN_MACHINEOPERAND_H
16 
17 #include "llvm/Support/DataTypes.h"
18 #include <cassert>
19 
20 namespace llvm {
21 
22 class BlockAddress;
23 class ConstantFP;
24 class ConstantInt;
25 class GlobalValue;
26 class MachineBasicBlock;
27 class MachineInstr;
28 class MachineRegisterInfo;
29 class MDNode;
30 class ModuleSlotTracker;
31 class TargetMachine;
32 class TargetRegisterInfo;
33 class hash_code;
34 class raw_ostream;
35 class MCSymbol;
36 
37 /// MachineOperand class - Representation of each machine instruction operand.
38 ///
39 /// This class isn't a POD type because it has a private constructor, but its
40 /// destructor must be trivial. Functions like MachineInstr::addOperand(),
41 /// MachineRegisterInfo::moveOperands(), and MF::DeleteMachineInstr() depend on
42 /// not having to call the MachineOperand destructor.
43 ///
45 public:
46  enum MachineOperandType : unsigned char {
47  MO_Register, ///< Register operand.
48  MO_Immediate, ///< Immediate operand
49  MO_CImmediate, ///< Immediate >64bit operand
50  MO_FPImmediate, ///< Floating-point immediate operand
51  MO_MachineBasicBlock, ///< MachineBasicBlock reference
52  MO_FrameIndex, ///< Abstract Stack Frame Index
53  MO_ConstantPoolIndex, ///< Address of indexed Constant in Constant Pool
54  MO_TargetIndex, ///< Target-dependent index+offset operand.
55  MO_JumpTableIndex, ///< Address of indexed Jump Table for switch
56  MO_ExternalSymbol, ///< Name of external global symbol
57  MO_GlobalAddress, ///< Address of a global value
58  MO_BlockAddress, ///< Address of a basic block
59  MO_RegisterMask, ///< Mask of preserved registers.
60  MO_RegisterLiveOut, ///< Mask of live-out registers.
61  MO_Metadata, ///< Metadata reference (for debug info)
62  MO_MCSymbol, ///< MCSymbol reference (for debug/eh info)
63  MO_CFIIndex ///< MCCFIInstruction index.
64  };
65 
66 private:
67  /// OpKind - Specify what kind of operand this is. This discriminates the
68  /// union.
69  MachineOperandType OpKind : 8;
70 
71  /// Subregister number for MO_Register. A value of 0 indicates the
72  /// MO_Register has no subReg.
73  ///
74  /// For all other kinds of operands, this field holds target-specific flags.
75  unsigned SubReg_TargetFlags : 12;
76 
77  /// TiedTo - Non-zero when this register operand is tied to another register
78  /// operand. The encoding of this field is described in the block comment
79  /// before MachineInstr::tieOperands().
80  unsigned char TiedTo : 4;
81 
82  /// IsDef/IsImp/IsKill/IsDead flags - These are only valid for MO_Register
83  /// operands.
84 
85  /// IsDef - True if this is a def, false if this is a use of the register.
86  ///
87  bool IsDef : 1;
88 
89  /// IsImp - True if this is an implicit def or use, false if it is explicit.
90  ///
91  bool IsImp : 1;
92 
93  /// IsKill - True if this instruction is the last use of the register on this
94  /// path through the function. This is only valid on uses of registers.
95  bool IsKill : 1;
96 
97  /// IsDead - True if this register is never used by a subsequent instruction.
98  /// This is only valid on definitions of registers.
99  bool IsDead : 1;
100 
101  /// IsUndef - True if this register operand reads an "undef" value, i.e. the
102  /// read value doesn't matter. This flag can be set on both use and def
103  /// operands. On a sub-register def operand, it refers to the part of the
104  /// register that isn't written. On a full-register def operand, it is a
105  /// noop. See readsReg().
106  ///
107  /// This is only valid on registers.
108  ///
109  /// Note that an instruction may have multiple <undef> operands referring to
110  /// the same register. In that case, the instruction may depend on those
111  /// operands reading the same dont-care value. For example:
112  ///
113  /// %vreg1<def> = XOR %vreg2<undef>, %vreg2<undef>
114  ///
115  /// Any register can be used for %vreg2, and its value doesn't matter, but
116  /// the two operands must be the same register.
117  ///
118  bool IsUndef : 1;
119 
120  /// IsInternalRead - True if this operand reads a value that was defined
121  /// inside the same instruction or bundle. This flag can be set on both use
122  /// and def operands. On a sub-register def operand, it refers to the part
123  /// of the register that isn't written. On a full-register def operand, it
124  /// is a noop.
125  ///
126  /// When this flag is set, the instruction bundle must contain at least one
127  /// other def of the register. If multiple instructions in the bundle define
128  /// the register, the meaning is target-defined.
129  bool IsInternalRead : 1;
130 
131  /// IsEarlyClobber - True if this MO_Register 'def' operand is written to
132  /// by the MachineInstr before all input registers are read. This is used to
133  /// model the GCC inline asm '&' constraint modifier.
134  bool IsEarlyClobber : 1;
135 
136  /// IsDebug - True if this MO_Register 'use' operand is in a debug pseudo,
137  /// not a real instruction. Such uses should be ignored during codegen.
138  bool IsDebug : 1;
139 
140  /// SmallContents - This really should be part of the Contents union, but
141  /// lives out here so we can get a better packed struct.
142  /// MO_Register: Register number.
143  /// OffsetedInfo: Low bits of offset.
144  union {
145  unsigned RegNo; // For MO_Register.
146  unsigned OffsetLo; // Matches Contents.OffsetedInfo.OffsetHi.
147  } SmallContents;
148 
149  /// ParentMI - This is the instruction that this operand is embedded into.
150  /// This is valid for all operand types, when the operand is in an instr.
151  MachineInstr *ParentMI;
152 
153  /// Contents union - This contains the payload for the various operand types.
154  union {
155  MachineBasicBlock *MBB; // For MO_MachineBasicBlock.
156  const ConstantFP *CFP; // For MO_FPImmediate.
157  const ConstantInt *CI; // For MO_CImmediate. Integers > 64bit.
158  int64_t ImmVal; // For MO_Immediate.
159  const uint32_t *RegMask; // For MO_RegisterMask and MO_RegisterLiveOut.
160  const MDNode *MD; // For MO_Metadata.
161  MCSymbol *Sym; // For MO_MCSymbol.
162  unsigned CFIIndex; // For MO_CFI.
163 
164  struct { // For MO_Register.
165  // Register number is in SmallContents.RegNo.
166  MachineOperand *Prev; // Access list for register. See MRI.
168  } Reg;
169 
170  /// OffsetedInfo - This struct contains the offset and an object identifier.
171  /// this represent the object as with an optional offset from it.
172  struct {
173  union {
174  int Index; // For MO_*Index - The index itself.
175  const char *SymbolName; // For MO_ExternalSymbol.
176  const GlobalValue *GV; // For MO_GlobalAddress.
177  const BlockAddress *BA; // For MO_BlockAddress.
178  } Val;
179  // Low bits of offset are in SmallContents.OffsetLo.
180  int OffsetHi; // An offset from the object, high 32 bits.
181  } OffsetedInfo;
182  } Contents;
183 
184  explicit MachineOperand(MachineOperandType K)
185  : OpKind(K), SubReg_TargetFlags(0), ParentMI(nullptr) {}
186 public:
187  /// getType - Returns the MachineOperandType for this operand.
188  ///
189  MachineOperandType getType() const { return (MachineOperandType)OpKind; }
190 
191  unsigned getTargetFlags() const {
192  return isReg() ? 0 : SubReg_TargetFlags;
193  }
194  void setTargetFlags(unsigned F) {
195  assert(!isReg() && "Register operands can't have target flags");
196  SubReg_TargetFlags = F;
197  assert(SubReg_TargetFlags == F && "Target flags out of range");
198  }
199  void addTargetFlag(unsigned F) {
200  assert(!isReg() && "Register operands can't have target flags");
201  SubReg_TargetFlags |= F;
202  assert((SubReg_TargetFlags & F) && "Target flags out of range");
203  }
204 
205 
206  /// getParent - Return the instruction that this operand belongs to.
207  ///
208  MachineInstr *getParent() { return ParentMI; }
209  const MachineInstr *getParent() const { return ParentMI; }
210 
211  /// clearParent - Reset the parent pointer.
212  ///
213  /// The MachineOperand copy constructor also copies ParentMI, expecting the
214  /// original to be deleted. If a MachineOperand is ever stored outside a
215  /// MachineInstr, the parent pointer must be cleared.
216  ///
217  /// Never call clearParent() on an operand in a MachineInstr.
218  ///
219  void clearParent() { ParentMI = nullptr; }
220 
221  void print(raw_ostream &os, const TargetRegisterInfo *TRI = nullptr) const;
222  void print(raw_ostream &os, ModuleSlotTracker &MST,
223  const TargetRegisterInfo *TRI = nullptr) const;
224 
225  //===--------------------------------------------------------------------===//
226  // Accessors that tell you what kind of MachineOperand you're looking at.
227  //===--------------------------------------------------------------------===//
228 
229  /// isReg - Tests if this is a MO_Register operand.
230  bool isReg() const { return OpKind == MO_Register; }
231  /// isImm - Tests if this is a MO_Immediate operand.
232  bool isImm() const { return OpKind == MO_Immediate; }
233  /// isCImm - Test if this is a MO_CImmediate operand.
234  bool isCImm() const { return OpKind == MO_CImmediate; }
235  /// isFPImm - Tests if this is a MO_FPImmediate operand.
236  bool isFPImm() const { return OpKind == MO_FPImmediate; }
237  /// isMBB - Tests if this is a MO_MachineBasicBlock operand.
238  bool isMBB() const { return OpKind == MO_MachineBasicBlock; }
239  /// isFI - Tests if this is a MO_FrameIndex operand.
240  bool isFI() const { return OpKind == MO_FrameIndex; }
241  /// isCPI - Tests if this is a MO_ConstantPoolIndex operand.
242  bool isCPI() const { return OpKind == MO_ConstantPoolIndex; }
243  /// isTargetIndex - Tests if this is a MO_TargetIndex operand.
244  bool isTargetIndex() const { return OpKind == MO_TargetIndex; }
245  /// isJTI - Tests if this is a MO_JumpTableIndex operand.
246  bool isJTI() const { return OpKind == MO_JumpTableIndex; }
247  /// isGlobal - Tests if this is a MO_GlobalAddress operand.
248  bool isGlobal() const { return OpKind == MO_GlobalAddress; }
249  /// isSymbol - Tests if this is a MO_ExternalSymbol operand.
250  bool isSymbol() const { return OpKind == MO_ExternalSymbol; }
251  /// isBlockAddress - Tests if this is a MO_BlockAddress operand.
252  bool isBlockAddress() const { return OpKind == MO_BlockAddress; }
253  /// isRegMask - Tests if this is a MO_RegisterMask operand.
254  bool isRegMask() const { return OpKind == MO_RegisterMask; }
255  /// isRegLiveOut - Tests if this is a MO_RegisterLiveOut operand.
256  bool isRegLiveOut() const { return OpKind == MO_RegisterLiveOut; }
257  /// isMetadata - Tests if this is a MO_Metadata operand.
258  bool isMetadata() const { return OpKind == MO_Metadata; }
259  bool isMCSymbol() const { return OpKind == MO_MCSymbol; }
260  bool isCFIIndex() const { return OpKind == MO_CFIIndex; }
261 
262  //===--------------------------------------------------------------------===//
263  // Accessors for Register Operands
264  //===--------------------------------------------------------------------===//
265 
266  /// getReg - Returns the register number.
267  unsigned getReg() const {
268  assert(isReg() && "This is not a register operand!");
269  return SmallContents.RegNo;
270  }
271 
272  unsigned getSubReg() const {
273  assert(isReg() && "Wrong MachineOperand accessor");
274  return SubReg_TargetFlags;
275  }
276 
277  bool isUse() const {
278  assert(isReg() && "Wrong MachineOperand accessor");
279  return !IsDef;
280  }
281 
282  bool isDef() const {
283  assert(isReg() && "Wrong MachineOperand accessor");
284  return IsDef;
285  }
286 
287  bool isImplicit() const {
288  assert(isReg() && "Wrong MachineOperand accessor");
289  return IsImp;
290  }
291 
292  bool isDead() const {
293  assert(isReg() && "Wrong MachineOperand accessor");
294  return IsDead;
295  }
296 
297  bool isKill() const {
298  assert(isReg() && "Wrong MachineOperand accessor");
299  return IsKill;
300  }
301 
302  bool isUndef() const {
303  assert(isReg() && "Wrong MachineOperand accessor");
304  return IsUndef;
305  }
306 
307  bool isInternalRead() const {
308  assert(isReg() && "Wrong MachineOperand accessor");
309  return IsInternalRead;
310  }
311 
312  bool isEarlyClobber() const {
313  assert(isReg() && "Wrong MachineOperand accessor");
314  return IsEarlyClobber;
315  }
316 
317  bool isTied() const {
318  assert(isReg() && "Wrong MachineOperand accessor");
319  return TiedTo;
320  }
321 
322  bool isDebug() const {
323  assert(isReg() && "Wrong MachineOperand accessor");
324  return IsDebug;
325  }
326 
327  /// readsReg - Returns true if this operand reads the previous value of its
328  /// register. A use operand with the <undef> flag set doesn't read its
329  /// register. A sub-register def implicitly reads the other parts of the
330  /// register being redefined unless the <undef> flag is set.
331  ///
332  /// This refers to reading the register value from before the current
333  /// instruction or bundle. Internal bundle reads are not included.
334  bool readsReg() const {
335  assert(isReg() && "Wrong MachineOperand accessor");
336  return !isUndef() && !isInternalRead() && (isUse() || getSubReg());
337  }
338 
339  //===--------------------------------------------------------------------===//
340  // Mutators for Register Operands
341  //===--------------------------------------------------------------------===//
342 
343  /// Change the register this operand corresponds to.
344  ///
345  void setReg(unsigned Reg);
346 
347  void setSubReg(unsigned subReg) {
348  assert(isReg() && "Wrong MachineOperand accessor");
349  SubReg_TargetFlags = subReg;
350  assert(SubReg_TargetFlags == subReg && "SubReg out of range");
351  }
352 
353  /// substVirtReg - Substitute the current register with the virtual
354  /// subregister Reg:SubReg. Take any existing SubReg index into account,
355  /// using TargetRegisterInfo to compose the subreg indices if necessary.
356  /// Reg must be a virtual register, SubIdx can be 0.
357  ///
358  void substVirtReg(unsigned Reg, unsigned SubIdx, const TargetRegisterInfo&);
359 
360  /// substPhysReg - Substitute the current register with the physical register
361  /// Reg, taking any existing SubReg into account. For instance,
362  /// substPhysReg(%EAX) will change %reg1024:sub_8bit to %AL.
363  ///
364  void substPhysReg(unsigned Reg, const TargetRegisterInfo&);
365 
366  void setIsUse(bool Val = true) { setIsDef(!Val); }
367 
368  void setIsDef(bool Val = true);
369 
370  void setImplicit(bool Val = true) {
371  assert(isReg() && "Wrong MachineOperand accessor");
372  IsImp = Val;
373  }
374 
375  void setIsKill(bool Val = true) {
376  assert(isReg() && !IsDef && "Wrong MachineOperand accessor");
377  assert((!Val || !isDebug()) && "Marking a debug operation as kill");
378  IsKill = Val;
379  }
380 
381  void setIsDead(bool Val = true) {
382  assert(isReg() && IsDef && "Wrong MachineOperand accessor");
383  IsDead = Val;
384  }
385 
386  void setIsUndef(bool Val = true) {
387  assert(isReg() && "Wrong MachineOperand accessor");
388  IsUndef = Val;
389  }
390 
391  void setIsInternalRead(bool Val = true) {
392  assert(isReg() && "Wrong MachineOperand accessor");
393  IsInternalRead = Val;
394  }
395 
396  void setIsEarlyClobber(bool Val = true) {
397  assert(isReg() && IsDef && "Wrong MachineOperand accessor");
398  IsEarlyClobber = Val;
399  }
400 
401  void setIsDebug(bool Val = true) {
402  assert(isReg() && !IsDef && "Wrong MachineOperand accessor");
403  IsDebug = Val;
404  }
405 
406  //===--------------------------------------------------------------------===//
407  // Accessors for various operand types.
408  //===--------------------------------------------------------------------===//
409 
410  int64_t getImm() const {
411  assert(isImm() && "Wrong MachineOperand accessor");
412  return Contents.ImmVal;
413  }
414 
415  const ConstantInt *getCImm() const {
416  assert(isCImm() && "Wrong MachineOperand accessor");
417  return Contents.CI;
418  }
419 
420  const ConstantFP *getFPImm() const {
421  assert(isFPImm() && "Wrong MachineOperand accessor");
422  return Contents.CFP;
423  }
424 
426  assert(isMBB() && "Wrong MachineOperand accessor");
427  return Contents.MBB;
428  }
429 
430  int getIndex() const {
431  assert((isFI() || isCPI() || isTargetIndex() || isJTI()) &&
432  "Wrong MachineOperand accessor");
433  return Contents.OffsetedInfo.Val.Index;
434  }
435 
436  const GlobalValue *getGlobal() const {
437  assert(isGlobal() && "Wrong MachineOperand accessor");
438  return Contents.OffsetedInfo.Val.GV;
439  }
440 
441  const BlockAddress *getBlockAddress() const {
442  assert(isBlockAddress() && "Wrong MachineOperand accessor");
443  return Contents.OffsetedInfo.Val.BA;
444  }
445 
447  assert(isMCSymbol() && "Wrong MachineOperand accessor");
448  return Contents.Sym;
449  }
450 
451  unsigned getCFIIndex() const {
452  assert(isCFIIndex() && "Wrong MachineOperand accessor");
453  return Contents.CFIIndex;
454  }
455 
456  /// Return the offset from the symbol in this operand. This always returns 0
457  /// for ExternalSymbol operands.
458  int64_t getOffset() const {
459  assert((isGlobal() || isSymbol() || isMCSymbol() || isCPI() ||
460  isTargetIndex() || isBlockAddress()) &&
461  "Wrong MachineOperand accessor");
462  return int64_t(uint64_t(Contents.OffsetedInfo.OffsetHi) << 32) |
463  SmallContents.OffsetLo;
464  }
465 
466  const char *getSymbolName() const {
467  assert(isSymbol() && "Wrong MachineOperand accessor");
468  return Contents.OffsetedInfo.Val.SymbolName;
469  }
470 
471  /// clobbersPhysReg - Returns true if this RegMask clobbers PhysReg.
472  /// It is sometimes necessary to detach the register mask pointer from its
473  /// machine operand. This static method can be used for such detached bit
474  /// mask pointers.
475  static bool clobbersPhysReg(const uint32_t *RegMask, unsigned PhysReg) {
476  // See TargetRegisterInfo.h.
477  assert(PhysReg < (1u << 30) && "Not a physical register");
478  return !(RegMask[PhysReg / 32] & (1u << PhysReg % 32));
479  }
480 
481  /// clobbersPhysReg - Returns true if this RegMask operand clobbers PhysReg.
482  bool clobbersPhysReg(unsigned PhysReg) const {
483  return clobbersPhysReg(getRegMask(), PhysReg);
484  }
485 
486  /// getRegMask - Returns a bit mask of registers preserved by this RegMask
487  /// operand.
488  const uint32_t *getRegMask() const {
489  assert(isRegMask() && "Wrong MachineOperand accessor");
490  return Contents.RegMask;
491  }
492 
493  /// getRegLiveOut - Returns a bit mask of live-out registers.
494  const uint32_t *getRegLiveOut() const {
495  assert(isRegLiveOut() && "Wrong MachineOperand accessor");
496  return Contents.RegMask;
497  }
498 
499  const MDNode *getMetadata() const {
500  assert(isMetadata() && "Wrong MachineOperand accessor");
501  return Contents.MD;
502  }
503 
504  //===--------------------------------------------------------------------===//
505  // Mutators for various operand types.
506  //===--------------------------------------------------------------------===//
507 
508  void setImm(int64_t immVal) {
509  assert(isImm() && "Wrong MachineOperand mutator");
510  Contents.ImmVal = immVal;
511  }
512 
513  void setFPImm(const ConstantFP *CFP) {
514  assert(isFPImm() && "Wrong MachineOperand mutator");
515  Contents.CFP = CFP;
516  }
517 
518  void setOffset(int64_t Offset) {
519  assert((isGlobal() || isSymbol() || isMCSymbol() || isCPI() ||
520  isTargetIndex() || isBlockAddress()) &&
521  "Wrong MachineOperand accessor");
522  SmallContents.OffsetLo = unsigned(Offset);
523  Contents.OffsetedInfo.OffsetHi = int(Offset >> 32);
524  }
525 
526  void setIndex(int Idx) {
527  assert((isFI() || isCPI() || isTargetIndex() || isJTI()) &&
528  "Wrong MachineOperand accessor");
529  Contents.OffsetedInfo.Val.Index = Idx;
530  }
531 
533  assert(isMBB() && "Wrong MachineOperand accessor");
534  Contents.MBB = MBB;
535  }
536 
537  //===--------------------------------------------------------------------===//
538  // Other methods.
539  //===--------------------------------------------------------------------===//
540 
541  /// isIdenticalTo - Return true if this operand is identical to the specified
542  /// operand. Note: This method ignores isKill and isDead properties.
543  bool isIdenticalTo(const MachineOperand &Other) const;
544 
545  /// \brief MachineOperand hash_value overload.
546  ///
547  /// Note that this includes the same information in the hash that
548  /// isIdenticalTo uses for comparison. It is thus suited for use in hash
549  /// tables which use that function for equality comparisons only.
550  friend hash_code hash_value(const MachineOperand &MO);
551 
552  /// ChangeToImmediate - Replace this operand with a new immediate operand of
553  /// the specified value. If an operand is known to be an immediate already,
554  /// the setImm method should be used.
555  void ChangeToImmediate(int64_t ImmVal);
556 
557  /// ChangeToFPImmediate - Replace this operand with a new FP immediate operand
558  /// of the specified value. If an operand is known to be an FP immediate
559  /// already, the setFPImm method should be used.
560  void ChangeToFPImmediate(const ConstantFP *FPImm);
561 
562  /// ChangeToES - Replace this operand with a new external symbol operand.
563  void ChangeToES(const char *SymName, unsigned char TargetFlags = 0);
564 
565  /// ChangeToMCSymbol - Replace this operand with a new MC symbol operand.
567 
568  /// ChangeToRegister - Replace this operand with a new register operand of
569  /// the specified value. If an operand is known to be an register already,
570  /// the setReg method should be used.
571  void ChangeToRegister(unsigned Reg, bool isDef, bool isImp = false,
572  bool isKill = false, bool isDead = false,
573  bool isUndef = false, bool isDebug = false);
574 
575  //===--------------------------------------------------------------------===//
576  // Construction methods.
577  //===--------------------------------------------------------------------===//
578 
579  static MachineOperand CreateImm(int64_t Val) {
581  Op.setImm(Val);
582  return Op;
583  }
584 
587  Op.Contents.CI = CI;
588  return Op;
589  }
590 
593  Op.Contents.CFP = CFP;
594  return Op;
595  }
596 
597  static MachineOperand CreateReg(unsigned Reg, bool isDef, bool isImp = false,
598  bool isKill = false, bool isDead = false,
599  bool isUndef = false,
600  bool isEarlyClobber = false,
601  unsigned SubReg = 0,
602  bool isDebug = false,
603  bool isInternalRead = false) {
604  assert(!(isDead && !isDef) && "Dead flag on non-def");
605  assert(!(isKill && isDef) && "Kill flag on def");
607  Op.IsDef = isDef;
608  Op.IsImp = isImp;
609  Op.IsKill = isKill;
610  Op.IsDead = isDead;
611  Op.IsUndef = isUndef;
612  Op.IsInternalRead = isInternalRead;
613  Op.IsEarlyClobber = isEarlyClobber;
614  Op.TiedTo = 0;
615  Op.IsDebug = isDebug;
616  Op.SmallContents.RegNo = Reg;
617  Op.Contents.Reg.Prev = nullptr;
618  Op.Contents.Reg.Next = nullptr;
619  Op.setSubReg(SubReg);
620  return Op;
621  }
623  unsigned char TargetFlags = 0) {
625  Op.setMBB(MBB);
626  Op.setTargetFlags(TargetFlags);
627  return Op;
628  }
629  static MachineOperand CreateFI(int Idx) {
631  Op.setIndex(Idx);
632  return Op;
633  }
634  static MachineOperand CreateCPI(unsigned Idx, int Offset,
635  unsigned char TargetFlags = 0) {
637  Op.setIndex(Idx);
638  Op.setOffset(Offset);
639  Op.setTargetFlags(TargetFlags);
640  return Op;
641  }
642  static MachineOperand CreateTargetIndex(unsigned Idx, int64_t Offset,
643  unsigned char TargetFlags = 0) {
645  Op.setIndex(Idx);
646  Op.setOffset(Offset);
647  Op.setTargetFlags(TargetFlags);
648  return Op;
649  }
650  static MachineOperand CreateJTI(unsigned Idx,
651  unsigned char TargetFlags = 0) {
653  Op.setIndex(Idx);
654  Op.setTargetFlags(TargetFlags);
655  return Op;
656  }
657  static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset,
658  unsigned char TargetFlags = 0) {
660  Op.Contents.OffsetedInfo.Val.GV = GV;
661  Op.setOffset(Offset);
662  Op.setTargetFlags(TargetFlags);
663  return Op;
664  }
665  static MachineOperand CreateES(const char *SymName,
666  unsigned char TargetFlags = 0) {
668  Op.Contents.OffsetedInfo.Val.SymbolName = SymName;
669  Op.setOffset(0); // Offset is always 0.
670  Op.setTargetFlags(TargetFlags);
671  return Op;
672  }
673  static MachineOperand CreateBA(const BlockAddress *BA, int64_t Offset,
674  unsigned char TargetFlags = 0) {
676  Op.Contents.OffsetedInfo.Val.BA = BA;
677  Op.setOffset(Offset);
678  Op.setTargetFlags(TargetFlags);
679  return Op;
680  }
681  /// CreateRegMask - Creates a register mask operand referencing Mask. The
682  /// operand does not take ownership of the memory referenced by Mask, it must
683  /// remain valid for the lifetime of the operand.
684  ///
685  /// A RegMask operand represents a set of non-clobbered physical registers on
686  /// an instruction that clobbers many registers, typically a call. The bit
687  /// mask has a bit set for each physreg that is preserved by this
688  /// instruction, as described in the documentation for
689  /// TargetRegisterInfo::getCallPreservedMask().
690  ///
691  /// Any physreg with a 0 bit in the mask is clobbered by the instruction.
692  ///
693  static MachineOperand CreateRegMask(const uint32_t *Mask) {
694  assert(Mask && "Missing register mask");
696  Op.Contents.RegMask = Mask;
697  return Op;
698  }
699  static MachineOperand CreateRegLiveOut(const uint32_t *Mask) {
700  assert(Mask && "Missing live-out register mask");
702  Op.Contents.RegMask = Mask;
703  return Op;
704  }
705  static MachineOperand CreateMetadata(const MDNode *Meta) {
707  Op.Contents.MD = Meta;
708  return Op;
709  }
710 
712  unsigned char TargetFlags = 0) {
714  Op.Contents.Sym = Sym;
715  Op.setOffset(0);
716  Op.setTargetFlags(TargetFlags);
717  return Op;
718  }
719 
722  Op.Contents.CFIIndex = CFIIndex;
723  return Op;
724  }
725 
726  friend class MachineInstr;
727  friend class MachineRegisterInfo;
728 private:
729  void removeRegFromUses();
730 
731  //===--------------------------------------------------------------------===//
732  // Methods for handling register use/def lists.
733  //===--------------------------------------------------------------------===//
734 
735  /// isOnRegUseList - Return true if this operand is on a register use/def list
736  /// or false if not. This can only be called for register operands that are
737  /// part of a machine instruction.
738  bool isOnRegUseList() const {
739  assert(isReg() && "Can only add reg operand to use lists");
740  return Contents.Reg.Prev != nullptr;
741  }
742 };
743 
745  MO.print(OS, nullptr);
746  return OS;
747 }
748 
749  // See friend declaration above. This additional declaration is required in
750  // order to compile LLVM with IBM xlC compiler.
751  hash_code hash_value(const MachineOperand &MO);
752 } // End llvm namespace
753 
754 #endif
bool isImplicit() const
MachineInstr * getParent()
getParent - Return the instruction that this operand belongs to.
const GlobalValue * getGlobal() const
static MachineOperand CreateCImm(const ConstantInt *CI)
static MachineOperand CreateMCSymbol(MCSymbol *Sym, unsigned char TargetFlags=0)
void setTargetFlags(unsigned F)
void ChangeToRegister(unsigned Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isDebug=false)
ChangeToRegister - Replace this operand with a new register operand of the specified value...
const ConstantFP * getFPImm() const
MachineBasicBlock * getMBB() const
bool isTargetIndex() const
isTargetIndex - Tests if this is a MO_TargetIndex operand.
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:39
const uint32_t * RegMask
void setFPImm(const ConstantFP *CFP)
static MachineOperand CreateJTI(unsigned Idx, unsigned char TargetFlags=0)
void setIsDef(bool Val=true)
Change a def to a use, or a use to a def.
void setIsUndef(bool Val=true)
bool isDead() const
Address of indexed Jump Table for switch.
bool isTied() const
bool isBlockAddress() const
isBlockAddress - Tests if this is a MO_BlockAddress operand.
MachineBasicBlock reference.
const char * getSymbolName() const
Metadata node.
Definition: Metadata.h:740
void setIsDead(bool Val=true)
F(f)
union llvm::MachineOperand::@33::@35::@36 Val
Manage lifetime of a slot tracker for printing IR.
const MDNode * getMetadata() const
Mask of live-out registers.
void substVirtReg(unsigned Reg, unsigned SubIdx, const TargetRegisterInfo &)
substVirtReg - Substitute the current register with the virtual subregister Reg:SubReg.
const ConstantFP * CFP
bool isMetadata() const
isMetadata - Tests if this is a MO_Metadata operand.
bool isMCSymbol() const
Mask of preserved registers.
void ChangeToMCSymbol(MCSymbol *Sym)
ChangeToMCSymbol - Replace this operand with a new MC symbol operand.
BlockAddress - The address of a basic block.
Definition: Constants.h:802
bool isJTI() const
isJTI - Tests if this is a MO_JumpTableIndex operand.
unsigned getCFIIndex() const
static MachineOperand CreateReg(unsigned Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false)
MCCFIInstruction index.
bool isImm() const
isImm - Tests if this is a MO_Immediate operand.
void ChangeToES(const char *SymName, unsigned char TargetFlags=0)
ChangeToES - Replace this operand with a new external symbol operand.
Target-dependent index+offset operand.
bool isReg() const
isReg - Tests if this is a MO_Register operand.
void setImplicit(bool Val=true)
Name of external global symbol.
void setIndex(int Idx)
bool isUndef() const
static MachineOperand CreateRegMask(const uint32_t *Mask)
CreateRegMask - Creates a register mask operand referencing Mask.
static MachineOperand CreateRegLiveOut(const uint32_t *Mask)
ELFYAML::ELF_STO Other
Definition: ELFYAML.cpp:591
bool isCPI() const
isCPI - Tests if this is a MO_ConstantPoolIndex operand.
bool isGlobal() const
isGlobal - Tests if this is a MO_GlobalAddress operand.
void setIsEarlyClobber(bool Val=true)
bool isKill() const
bool isFI() const
isFI - Tests if this is a MO_FrameIndex operand.
Immediate >64bit operand.
hash_code hash_value(const APFloat &Arg)
See friend declarations above.
Definition: APFloat.cpp:2848
void clearParent()
clearParent - Reset the parent pointer.
int64_t getImm() const
const GlobalValue * GV
void ChangeToImmediate(int64_t ImmVal)
ChangeToImmediate - Replace this operand with a new immediate operand of the specified value...
bool isEarlyClobber() const
Address of a global value.
unsigned getTargetFlags() const
void print(raw_ostream &os, const TargetRegisterInfo *TRI=nullptr) const
static MachineOperand CreateCPI(unsigned Idx, int Offset, unsigned char TargetFlags=0)
static MachineOperand CreateFPImm(const ConstantFP *CFP)
ConstantFP - Floating Point Values [float, double].
Definition: Constants.h:233
bool isCImm() const
isCImm - Test if this is a MO_CImmediate operand.
void setMBB(MachineBasicBlock *MBB)
static MachineOperand CreateBA(const BlockAddress *BA, int64_t Offset, unsigned char TargetFlags=0)
bool isSymbol() const
isSymbol - Tests if this is a MO_ExternalSymbol operand.
Address of a basic block.
void substPhysReg(unsigned Reg, const TargetRegisterInfo &)
substPhysReg - Substitute the current register with the physical register Reg, taking any existing Su...
void setImm(int64_t immVal)
static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset, unsigned char TargetFlags=0)
void setIsInternalRead(bool Val=true)
static MachineOperand CreateTargetIndex(unsigned Idx, int64_t Offset, unsigned char TargetFlags=0)
int64_t getOffset() const
Return the offset from the symbol in this operand.
void setOffset(int64_t Offset)
unsigned getSubReg() const
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
bool clobbersPhysReg(unsigned PhysReg) const
clobbersPhysReg - Returns true if this RegMask operand clobbers PhysReg.
struct llvm::MachineOperand::@33::@34 Reg
void setIsKill(bool Val=true)
bool isRegMask() const
isRegMask - Tests if this is a MO_RegisterMask operand.
const ConstantInt * CI
bool isCFIIndex() const
static MachineOperand CreateMetadata(const MDNode *Meta)
This is the shared class of boolean and integer constants.
Definition: Constants.h:47
const uint32_t * getRegMask() const
getRegMask - Returns a bit mask of registers preserved by this RegMask operand.
struct llvm::MachineOperand::@33::@35 OffsetedInfo
OffsetedInfo - This struct contains the offset and an object identifier.
MachineBasicBlock * MBB
MachineOperand class - Representation of each machine instruction operand.
void ChangeToFPImmediate(const ConstantFP *FPImm)
ChangeToFPImmediate - Replace this operand with a new FP immediate operand of the specified value...
bool isRegLiveOut() const
isRegLiveOut - Tests if this is a MO_RegisterLiveOut operand.
bool isMBB() const
isMBB - Tests if this is a MO_MachineBasicBlock operand.
const MachineInstr * getParent() const
friend hash_code hash_value(const MachineOperand &MO)
MachineOperand hash_value overload.
MCSymbol reference (for debug/eh info)
static bool clobbersPhysReg(const uint32_t *RegMask, unsigned PhysReg)
clobbersPhysReg - Returns true if this RegMask clobbers PhysReg.
bool isFPImm() const
isFPImm - Tests if this is a MO_FPImmediate operand.
const ConstantInt * getCImm() const
static MachineOperand CreateES(const char *SymName, unsigned char TargetFlags=0)
An opaque object representing a hash code.
Definition: Hashing.h:73
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
Representation of each machine instruction.
Definition: MachineInstr.h:51
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.
void addTargetFlag(unsigned F)
static MachineOperand CreateMBB(MachineBasicBlock *MBB, unsigned char TargetFlags=0)
const uint32_t * getRegLiveOut() const
getRegLiveOut - Returns a bit mask of live-out registers.
MachineOperand * Prev
static MachineOperand CreateCFIIndex(unsigned CFIIndex)
void setReg(unsigned Reg)
Change the register this operand corresponds to.
static MachineOperand CreateImm(int64_t Val)
void setIsUse(bool Val=true)
void setSubReg(unsigned subReg)
MCSymbol * getMCSymbol() const
Abstract Stack Frame Index.
const BlockAddress * BA
raw_ostream & operator<<(raw_ostream &OS, const APInt &I)
Definition: APInt.h:1738
unsigned getReg() const
getReg - Returns the register number.
Floating-point immediate operand.
const char * SymbolName
bool isDebug() const
MachineOperand * Next
This class implements an extremely fast bulk output stream that can only output to a stream...
Definition: raw_ostream.h:38
const BlockAddress * getBlockAddress() const
Address of indexed Constant in Constant Pool.
bool readsReg() const
readsReg - Returns true if this operand reads the previous value of its register. ...
bool isIdenticalTo(const MachineOperand &Other) const
isIdenticalTo - Return true if this operand is identical to the specified operand.
void setIsDebug(bool Val=true)
static MachineOperand CreateFI(int Idx)
bool isInternalRead() const
Metadata reference (for debug info)