LLVM  3.7.0
AArch64InstPrinter.h
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1 //===-- AArch64InstPrinter.h - Convert AArch64 MCInst to assembly syntax --===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This class prints an AArch64 MCInst to a .s file.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_AARCH64_INSTPRINTER_AARCH64INSTPRINTER_H
15 #define LLVM_LIB_TARGET_AARCH64_INSTPRINTER_AARCH64INSTPRINTER_H
16 
18 #include "llvm/ADT/StringRef.h"
19 #include "llvm/MC/MCInstPrinter.h"
21 
22 namespace llvm {
23 
24 class MCOperand;
25 
27 public:
29  const MCRegisterInfo &MRI);
30 
31  void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
32  const MCSubtargetInfo &STI) override;
33  void printRegName(raw_ostream &OS, unsigned RegNo) const override;
34 
35  // Autogenerated by tblgen.
36  virtual void printInstruction(const MCInst *MI, const MCSubtargetInfo &STI,
37  raw_ostream &O);
38  virtual bool printAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI,
39  raw_ostream &O);
40  virtual void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx,
41  unsigned PrintMethodIdx,
42  const MCSubtargetInfo &STI,
43  raw_ostream &O);
44  virtual StringRef getRegName(unsigned RegNo) const {
45  return getRegisterName(RegNo);
46  }
47  static const char *getRegisterName(unsigned RegNo,
48  unsigned AltIdx = AArch64::NoRegAltName);
49 
50 protected:
51  bool printSysAlias(const MCInst *MI, raw_ostream &O);
52  // Operand printers
53  void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
54  raw_ostream &O);
55  void printHexImm(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
56  raw_ostream &O);
57  void printPostIncOperand(const MCInst *MI, unsigned OpNo, unsigned Imm,
58  raw_ostream &O);
59  template <int Amount>
60  void printPostIncOperand(const MCInst *MI, unsigned OpNo,
61  const MCSubtargetInfo &STI, raw_ostream &O) {
62  printPostIncOperand(MI, OpNo, Amount, O);
63  }
64 
65  void printVRegOperand(const MCInst *MI, unsigned OpNo,
66  const MCSubtargetInfo &STI, raw_ostream &O);
67  void printSysCROperand(const MCInst *MI, unsigned OpNo,
68  const MCSubtargetInfo &STI, raw_ostream &O);
69  void printAddSubImm(const MCInst *MI, unsigned OpNum,
70  const MCSubtargetInfo &STI, raw_ostream &O);
71  void printLogicalImm32(const MCInst *MI, unsigned OpNum,
72  const MCSubtargetInfo &STI, raw_ostream &O);
73  void printLogicalImm64(const MCInst *MI, unsigned OpNum,
74  const MCSubtargetInfo &STI, raw_ostream &O);
75  void printShifter(const MCInst *MI, unsigned OpNum,
76  const MCSubtargetInfo &STI, raw_ostream &O);
77  void printShiftedRegister(const MCInst *MI, unsigned OpNum,
78  const MCSubtargetInfo &STI, raw_ostream &O);
79  void printExtendedRegister(const MCInst *MI, unsigned OpNum,
80  const MCSubtargetInfo &STI, raw_ostream &O);
81  void printArithExtend(const MCInst *MI, unsigned OpNum,
82  const MCSubtargetInfo &STI, raw_ostream &O);
83 
84  void printMemExtend(const MCInst *MI, unsigned OpNum, raw_ostream &O,
85  char SrcRegKind, unsigned Width);
86  template <char SrcRegKind, unsigned Width>
87  void printMemExtend(const MCInst *MI, unsigned OpNum,
88  const MCSubtargetInfo &STI, raw_ostream &O) {
89  printMemExtend(MI, OpNum, O, SrcRegKind, Width);
90  }
91 
92  void printCondCode(const MCInst *MI, unsigned OpNum,
93  const MCSubtargetInfo &STI, raw_ostream &O);
94  void printInverseCondCode(const MCInst *MI, unsigned OpNum,
95  const MCSubtargetInfo &STI, raw_ostream &O);
96  void printAlignedLabel(const MCInst *MI, unsigned OpNum,
97  const MCSubtargetInfo &STI, raw_ostream &O);
98  void printUImm12Offset(const MCInst *MI, unsigned OpNum, unsigned Scale,
99  raw_ostream &O);
100  void printAMIndexedWB(const MCInst *MI, unsigned OpNum, unsigned Scale,
101  raw_ostream &O);
102 
103  template <int Scale>
104  void printUImm12Offset(const MCInst *MI, unsigned OpNum,
105  const MCSubtargetInfo &STI, raw_ostream &O) {
106  printUImm12Offset(MI, OpNum, Scale, O);
107  }
108 
109  template <int BitWidth>
110  void printAMIndexedWB(const MCInst *MI, unsigned OpNum,
111  const MCSubtargetInfo &STI, raw_ostream &O) {
112  printAMIndexedWB(MI, OpNum, BitWidth / 8, O);
113  }
114 
115  void printAMNoIndex(const MCInst *MI, unsigned OpNum,
116  const MCSubtargetInfo &STI, raw_ostream &O);
117 
118  template <int Scale>
119  void printImmScale(const MCInst *MI, unsigned OpNum,
120  const MCSubtargetInfo &STI, raw_ostream &O);
121 
122  void printPrefetchOp(const MCInst *MI, unsigned OpNum,
123  const MCSubtargetInfo &STI, raw_ostream &O);
124 
125  void printFPImmOperand(const MCInst *MI, unsigned OpNum,
126  const MCSubtargetInfo &STI, raw_ostream &O);
127 
128  void printVectorList(const MCInst *MI, unsigned OpNum,
129  const MCSubtargetInfo &STI, raw_ostream &O,
130  StringRef LayoutSuffix);
131 
132  /// Print a list of vector registers where the type suffix is implicit
133  /// (i.e. attached to the instruction rather than the registers).
134  void printImplicitlyTypedVectorList(const MCInst *MI, unsigned OpNum,
135  const MCSubtargetInfo &STI,
136  raw_ostream &O);
137 
138  template <unsigned NumLanes, char LaneKind>
139  void printTypedVectorList(const MCInst *MI, unsigned OpNum,
140  const MCSubtargetInfo &STI, raw_ostream &O);
141 
142  void printVectorIndex(const MCInst *MI, unsigned OpNum,
143  const MCSubtargetInfo &STI, raw_ostream &O);
144  void printAdrpLabel(const MCInst *MI, unsigned OpNum,
145  const MCSubtargetInfo &STI, raw_ostream &O);
146  void printBarrierOption(const MCInst *MI, unsigned OpNum,
147  const MCSubtargetInfo &STI, raw_ostream &O);
148  void printMSRSystemRegister(const MCInst *MI, unsigned OpNum,
149  const MCSubtargetInfo &STI, raw_ostream &O);
150  void printMRSSystemRegister(const MCInst *MI, unsigned OpNum,
151  const MCSubtargetInfo &STI, raw_ostream &O);
152  void printSystemPStateField(const MCInst *MI, unsigned OpNum,
153  const MCSubtargetInfo &STI, raw_ostream &O);
154  void printSIMDType10Operand(const MCInst *MI, unsigned OpNum,
155  const MCSubtargetInfo &STI, raw_ostream &O);
156  template<unsigned size>
157  void printGPRSeqPairsClassOperand(const MCInst *MI, unsigned OpNum,
158  const MCSubtargetInfo &STI,
159  raw_ostream &O);
160 };
161 
163 public:
165  const MCRegisterInfo &MRI);
166 
167  void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
168  const MCSubtargetInfo &STI) override;
169 
170  void printInstruction(const MCInst *MI, const MCSubtargetInfo &STI,
171  raw_ostream &O) override;
172  bool printAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI,
173  raw_ostream &O) override;
174  void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx,
175  unsigned PrintMethodIdx,
176  const MCSubtargetInfo &STI,
177  raw_ostream &O) override;
178  StringRef getRegName(unsigned RegNo) const override {
179  return getRegisterName(RegNo);
180  }
181  static const char *getRegisterName(unsigned RegNo,
182  unsigned AltIdx = AArch64::NoRegAltName);
183 };
184 }
185 
186 #endif
void printAMIndexedWB(const MCInst *MI, unsigned OpNum, unsigned Scale, raw_ostream &O)
void printRegName(raw_ostream &OS, unsigned RegNo) const override
Print the assembler register name.
void printShifter(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printVectorIndex(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
static const char * getRegisterName(unsigned RegNo, unsigned AltIdx=AArch64::NoRegAltName)
void printSysCROperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O)
void printSystemPStateField(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printMemExtend(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printLogicalImm32(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printPrefetchOp(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
bool printSysAlias(const MCInst *MI, raw_ostream &O)
void printFPImmOperand(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printGPRSeqPairsClassOperand(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printMemExtend(const MCInst *MI, unsigned OpNum, raw_ostream &O, char SrcRegKind, unsigned Width)
void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot, const MCSubtargetInfo &STI) override
Print the specified MCInst to the specified raw_ostream.
void printUImm12Offset(const MCInst *MI, unsigned OpNum, unsigned Scale, raw_ostream &O)
StringRef getRegName(unsigned RegNo) const override
void printLogicalImm64(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printImplicitlyTypedVectorList(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
Print a list of vector registers where the type suffix is implicit (i.e.
void printAMIndexedWB(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printVRegOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O)
void printInstruction(const MCInst *MI, const MCSubtargetInfo &STI, raw_ostream &O) override
void printInverseCondCode(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
AArch64InstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII, const MCRegisterInfo &MRI)
void printAlignedLabel(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot, const MCSubtargetInfo &STI) override
Print the specified MCInst to the specified raw_ostream.
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:150
static const char * getRegisterName(unsigned RegNo, unsigned AltIdx=AArch64::NoRegAltName)
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
This class is intended to be used as a base class for asm properties and features specific to the tar...
Definition: MCAsmInfo.h:58
void printHexImm(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O)
bool printAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI, raw_ostream &O) override
Interface to description of machine instruction set.
Definition: MCInstrInfo.h:24
virtual void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx, unsigned PrintMethodIdx, const MCSubtargetInfo &STI, raw_ostream &O)
void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx, unsigned PrintMethodIdx, const MCSubtargetInfo &STI, raw_ostream &O) override
void printSIMDType10Operand(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printArithExtend(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printMSRSystemRegister(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printAdrpLabel(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printPostIncOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O)
void printPostIncOperand(const MCInst *MI, unsigned OpNo, unsigned Imm, raw_ostream &O)
void printBarrierOption(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printAMNoIndex(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printMRSSystemRegister(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printTypedVectorList(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printShiftedRegister(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
virtual void printInstruction(const MCInst *MI, const MCSubtargetInfo &STI, raw_ostream &O)
const MCAsmInfo & MAI
Definition: MCInstPrinter.h:44
void printExtendedRegister(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
virtual StringRef getRegName(unsigned RegNo) const
void printVectorList(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O, StringRef LayoutSuffix)
This is an instance of a target assembly language printer that converts an MCInst to valid target ass...
Definition: MCInstPrinter.h:38
void printAddSubImm(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
virtual bool printAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI, raw_ostream &O)
void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI, raw_ostream &O)
MCSubtargetInfo - Generic base class for all target subtargets.
AArch64AppleInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII, const MCRegisterInfo &MRI)
const MCInstrInfo & MII
Definition: MCInstPrinter.h:45
void printUImm12Offset(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
void printImmScale(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)
This class implements an extremely fast bulk output stream that can only output to a stream...
Definition: raw_ostream.h:38
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:40
const MCRegisterInfo & MRI
Definition: MCInstPrinter.h:46
void printCondCode(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, raw_ostream &O)