64 Value = (int64_t)Value / 4;
66 if (!
isIntN(16, Value) && Ctx)
67 Ctx->reportFatalError(Fixup.
getLoc(),
"out of range PC16 fixup");
71 Value = (int64_t)Value / 4;
73 if (!
isIntN(19, Value) && Ctx)
74 Ctx->reportFatalError(Fixup.
getLoc(),
"out of range PC19 fixup");
89 Value = ((Value + 0x8000) >> 16) & 0xffff;
93 Value = ((Value + 0x80008000LL) >> 32) & 0xffff;
97 Value = ((Value + 0x800080008000LL) >> 48) & 0xffff;
105 Value = (int64_t) Value / 2;
107 if (!
isIntN(7, Value) && Ctx)
108 Ctx->reportFatalError(Fixup.
getLoc(),
"out of range PC7 fixup");
113 Value = (int64_t) Value / 2;
115 if (!
isIntN(10, Value) && Ctx)
116 Ctx->reportFatalError(Fixup.
getLoc(),
"out of range PC10 fixup");
121 Value = (int64_t)Value / 2;
123 if (!
isIntN(16, Value) && Ctx)
124 Ctx->reportFatalError(Fixup.
getLoc(),
"out of range PC16 fixup");
128 Value = (int64_t)Value / 8;
130 if (!
isIntN(18, Value) && Ctx)
131 Ctx->reportFatalError(Fixup.
getLoc(),
"out of range PC18 fixup");
135 Value = (int64_t) Value / 4;
137 if (!
isIntN(21, Value) && Ctx)
138 Ctx->reportFatalError(Fixup.
getLoc(),
"out of range PC21 fixup");
142 Value = (int64_t) Value / 4;
144 if (!
isIntN(26, Value) && Ctx)
145 Ctx->reportFatalError(Fixup.
getLoc(),
"out of range PC26 fixup");
170 assert(i <= 3 &&
"Index out of range!");
172 return (1 - i / 2) * 2 + i % 2;
179 unsigned DataSize, uint64_t
Value,
180 bool IsPCRel)
const {
194 switch ((
unsigned)
Kind) {
215 for (
unsigned i = 0; i != NumBytes; ++i) {
218 : (FullSize - 1 - i);
219 CurVal |= (uint64_t)((uint8_t)Data[Offset + Idx]) << (i*8);
222 uint64_t Mask = ((uint64_t)(-1) >>
224 CurVal |= Value & Mask;
227 for (
unsigned i = 0; i != NumBytes; ++i) {
230 : (FullSize - 1 - i);
231 Data[Offset + Idx] = (uint8_t)((CurVal >> (i*8)) & 0xff);
242 {
"fixup_Mips_16", 0, 16, 0 },
243 {
"fixup_Mips_32", 0, 32, 0 },
244 {
"fixup_Mips_REL32", 0, 32, 0 },
245 {
"fixup_Mips_26", 0, 26, 0 },
246 {
"fixup_Mips_HI16", 0, 16, 0 },
247 {
"fixup_Mips_LO16", 0, 16, 0 },
248 {
"fixup_Mips_GPREL16", 0, 16, 0 },
249 {
"fixup_Mips_LITERAL", 0, 16, 0 },
250 {
"fixup_Mips_GOT_Global", 0, 16, 0 },
251 {
"fixup_Mips_GOT_Local", 0, 16, 0 },
253 {
"fixup_Mips_CALL16", 0, 16, 0 },
254 {
"fixup_Mips_GPREL32", 0, 32, 0 },
255 {
"fixup_Mips_SHIFT5", 6, 5, 0 },
256 {
"fixup_Mips_SHIFT6", 6, 5, 0 },
257 {
"fixup_Mips_64", 0, 64, 0 },
258 {
"fixup_Mips_TLSGD", 0, 16, 0 },
259 {
"fixup_Mips_GOTTPREL", 0, 16, 0 },
260 {
"fixup_Mips_TPREL_HI", 0, 16, 0 },
261 {
"fixup_Mips_TPREL_LO", 0, 16, 0 },
262 {
"fixup_Mips_TLSLDM", 0, 16, 0 },
263 {
"fixup_Mips_DTPREL_HI", 0, 16, 0 },
264 {
"fixup_Mips_DTPREL_LO", 0, 16, 0 },
266 {
"fixup_Mips_GPOFF_HI", 0, 16, 0 },
267 {
"fixup_Mips_GPOFF_LO", 0, 16, 0 },
268 {
"fixup_Mips_GOT_PAGE", 0, 16, 0 },
269 {
"fixup_Mips_GOT_OFST", 0, 16, 0 },
270 {
"fixup_Mips_GOT_DISP", 0, 16, 0 },
271 {
"fixup_Mips_HIGHER", 0, 16, 0 },
272 {
"fixup_Mips_HIGHEST", 0, 16, 0 },
273 {
"fixup_Mips_GOT_HI16", 0, 16, 0 },
274 {
"fixup_Mips_GOT_LO16", 0, 16, 0 },
275 {
"fixup_Mips_CALL_HI16", 0, 16, 0 },
276 {
"fixup_Mips_CALL_LO16", 0, 16, 0 },
283 {
"fixup_MICROMIPS_26_S1", 0, 26, 0 },
284 {
"fixup_MICROMIPS_HI16", 0, 16, 0 },
285 {
"fixup_MICROMIPS_LO16", 0, 16, 0 },
286 {
"fixup_MICROMIPS_GOT16", 0, 16, 0 },
290 {
"fixup_MICROMIPS_CALL16", 0, 16, 0 },
291 {
"fixup_MICROMIPS_GOT_DISP", 0, 16, 0 },
292 {
"fixup_MICROMIPS_GOT_PAGE", 0, 16, 0 },
293 {
"fixup_MICROMIPS_GOT_OFST", 0, 16, 0 },
294 {
"fixup_MICROMIPS_TLS_GD", 0, 16, 0 },
295 {
"fixup_MICROMIPS_TLS_LDM", 0, 16, 0 },
296 {
"fixup_MICROMIPS_TLS_DTPREL_HI16", 0, 16, 0 },
297 {
"fixup_MICROMIPS_TLS_DTPREL_LO16", 0, 16, 0 },
298 {
"fixup_MICROMIPS_TLS_TPREL_HI16", 0, 16, 0 },
299 {
"fixup_MICROMIPS_TLS_TPREL_LO16", 0, 16, 0 }
307 {
"fixup_Mips_16", 16, 16, 0 },
308 {
"fixup_Mips_32", 0, 32, 0 },
309 {
"fixup_Mips_REL32", 0, 32, 0 },
310 {
"fixup_Mips_26", 6, 26, 0 },
311 {
"fixup_Mips_HI16", 16, 16, 0 },
312 {
"fixup_Mips_LO16", 16, 16, 0 },
313 {
"fixup_Mips_GPREL16", 16, 16, 0 },
314 {
"fixup_Mips_LITERAL", 16, 16, 0 },
315 {
"fixup_Mips_GOT_Global", 16, 16, 0 },
316 {
"fixup_Mips_GOT_Local", 16, 16, 0 },
318 {
"fixup_Mips_CALL16", 16, 16, 0 },
319 {
"fixup_Mips_GPREL32", 0, 32, 0 },
320 {
"fixup_Mips_SHIFT5", 21, 5, 0 },
321 {
"fixup_Mips_SHIFT6", 21, 5, 0 },
322 {
"fixup_Mips_64", 0, 64, 0 },
323 {
"fixup_Mips_TLSGD", 16, 16, 0 },
324 {
"fixup_Mips_GOTTPREL", 16, 16, 0 },
325 {
"fixup_Mips_TPREL_HI", 16, 16, 0 },
326 {
"fixup_Mips_TPREL_LO", 16, 16, 0 },
327 {
"fixup_Mips_TLSLDM", 16, 16, 0 },
328 {
"fixup_Mips_DTPREL_HI", 16, 16, 0 },
329 {
"fixup_Mips_DTPREL_LO", 16, 16, 0 },
331 {
"fixup_Mips_GPOFF_HI", 16, 16, 0 },
332 {
"fixup_Mips_GPOFF_LO", 16, 16, 0 },
333 {
"fixup_Mips_GOT_PAGE", 16, 16, 0 },
334 {
"fixup_Mips_GOT_OFST", 16, 16, 0 },
335 {
"fixup_Mips_GOT_DISP", 16, 16, 0 },
336 {
"fixup_Mips_HIGHER", 16, 16, 0 },
337 {
"fixup_Mips_HIGHEST", 16, 16, 0 },
338 {
"fixup_Mips_GOT_HI16", 16, 16, 0 },
339 {
"fixup_Mips_GOT_LO16", 16, 16, 0 },
340 {
"fixup_Mips_CALL_HI16", 16, 16, 0 },
341 {
"fixup_Mips_CALL_LO16", 16, 16, 0 },
348 {
"fixup_MICROMIPS_26_S1", 6, 26, 0 },
349 {
"fixup_MICROMIPS_HI16", 16, 16, 0 },
350 {
"fixup_MICROMIPS_LO16", 16, 16, 0 },
351 {
"fixup_MICROMIPS_GOT16", 16, 16, 0 },
355 {
"fixup_MICROMIPS_CALL16", 16, 16, 0 },
356 {
"fixup_MICROMIPS_GOT_DISP", 16, 16, 0 },
357 {
"fixup_MICROMIPS_GOT_PAGE", 16, 16, 0 },
358 {
"fixup_MICROMIPS_GOT_OFST", 16, 16, 0 },
359 {
"fixup_MICROMIPS_TLS_GD", 16, 16, 0 },
360 {
"fixup_MICROMIPS_TLS_LDM", 16, 16, 0 },
361 {
"fixup_MICROMIPS_TLS_DTPREL_HI16", 16, 16, 0 },
362 {
"fixup_MICROMIPS_TLS_DTPREL_LO16", 16, 16, 0 },
363 {
"fixup_MICROMIPS_TLS_TPREL_HI16", 16, 16, 0 },
364 {
"fixup_MICROMIPS_TLS_TPREL_LO16", 16, 16, 0 }
OSType getOS() const
getOS - Get the parsed operating system type of this triple.
static bool needsMMLEByteOrder(unsigned Kind)
void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize, uint64_t Value, bool IsPCRel) const override
ApplyFixup - Apply the Value for given Fixup into the provided data fragment, at the offset specified...
void WriteZeros(unsigned N)
This represents an "assembler immediate".
static unsigned adjustFixupValue(const MCFixup &Fixup, uint64_t Value, MCContext *Ctx=nullptr)
MCAsmBackend * createMipsAsmBackendEL32(const Target &T, const MCRegisterInfo &MRI, const Triple &TT, StringRef CPU)
MCContext & getContext() const
Defines the object file and target independent interfaces used by the assembler backend to write nati...
Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...
Is this fixup kind PCrelative? This is used by the assembler backend to evaluate fixup values in a ta...
void processFixupValue(const MCAssembler &Asm, const MCAsmLayout &Layout, const MCFixup &Fixup, const MCFragment *DF, const MCValue &Target, uint64_t &Value, bool &IsResolved) override
processFixupValue - Target hook to process the literal value of a fixup if necessary.
Encapsulates the layout of an assembly file at a particular point in time.
const MCFixupKindInfo & getFixupKindInfo(MCFixupKind Kind) const override
Get information on a fixup kind.
unsigned getNumFixupKinds() const override
Get the number of target specific fixup kinds.
Context object for machine code objects.
A four-byte gp relative fixup.
bool writeNopData(uint64_t Count, MCObjectWriter *OW) const override
WriteNopData - Write an (optimal) nop sequence of Count bytes to the given output.
MCAsmBackend * createMipsAsmBackendEB32(const Target &T, const MCRegisterInfo &MRI, const Triple &TT, StringRef CPU)
uint32_t getOffset() const
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
MCObjectWriter * createObjectWriter(raw_pwrite_stream &OS) const override
Create a new MCObjectWriter instance for use by the assembler backend to emit the final object file...
MCFixupKind
Extensible enumeration to represent the type of a fixup.
bool isIntN(unsigned N, int64_t x)
isIntN - Checks if an signed integer fits into the given (dynamic) bit width.
MCFixupKind getKind() const
MCObjectWriter * createMipsELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI, bool IsLittleEndian, bool Is64Bit)
Triple - Helper class for working with autoconf configuration names.
PowerPC TLS Dynamic Call Fixup
unsigned TargetSize
The number of bits written by this fixup.
MCAsmBackend * createMipsAsmBackendEL64(const Target &T, const MCRegisterInfo &MRI, const Triple &TT, StringRef CPU)
Target - Wrapper for Target specific information.
MCAsmBackend * createMipsAsmBackendEB64(const Target &T, const MCRegisterInfo &MRI, const Triple &TT, StringRef CPU)
Target independent information on a fixup kind.
An abstract base class for streams implementations that also support a pwrite operation.
const ARM::ArchExtKind Kind
LLVM Value Representation.
Generic interface to target specific assembler backends.
StringRef - Represent a constant reference to a string, i.e.
static unsigned calculateMMLEIndex(unsigned i)
virtual const MCFixupKindInfo & getFixupKindInfo(MCFixupKind Kind) const
Get information on a fixup kind.