59 #define DEBUG_TYPE "hexagon-peephole"
63 cl::desc(
"Disable Peephole Optimization"));
67 cl::desc(
"Disable Optimization of PNotP"));
71 cl::desc(
"Disable Optimization of Sign/Zero Extends"));
75 cl::desc(
"Disable Optimization of extensions to i64."));
96 const char *getPassName()
const override {
97 return "Hexagon optimize redundant zero and size extends";
115 QII =
static_cast<const HexagonInstrInfo *
>(MF.getSubtarget().getInstrInfo());
117 MRI = &MF.getRegInfo();
126 MBBb != MBBe; ++MBBb) {
129 PeepholeDoubleRegsMap.
clear();
141 unsigned DstReg = Dst.
getReg();
142 unsigned SrcReg = Src.
getReg();
149 PeepholeMap[DstReg] = SrcReg;
156 MI->
getOpcode () == Hexagon::A4_combineir) {
163 unsigned DstReg = Dst.
getReg();
164 unsigned SrcReg = Src2.
getReg();
165 PeepholeMap[DstReg] = SrcReg;
173 if (MI->
getOpcode() == Hexagon::S2_lsr_i_p) {
180 unsigned DstReg = Dst.
getReg();
181 unsigned SrcReg = Src1.
getReg();
182 PeepholeDoubleRegsMap[DstReg] =
183 std::make_pair(*&SrcReg, 1);
192 unsigned DstReg = Dst.
getReg();
193 unsigned SrcReg = Src.
getReg();
200 PeepholeMap[DstReg] = SrcReg;
212 if (Src.
getSubReg() != Hexagon::subreg_loreg)
215 unsigned DstReg = Dst.
getReg();
216 unsigned SrcReg = Src.
getReg();
220 if (
unsigned PeepholeSrc = PeepholeMap.
lookup(SrcReg)) {
226 PeepholeDoubleRegsMap.
find(SrcReg);
227 if (DI != PeepholeDoubleRegsMap.
end()) {
228 std::pair<unsigned,unsigned> PeepholeSrc = DI->second;
237 PeepholeSrc.second));
246 if (QII->isPredicated(MI)) {
248 unsigned Reg0 = Op0.
getReg();
250 if (RC0->
getID() == Hexagon::PredRegsRegClassID) {
255 if (
unsigned PeepholeSrc = PeepholeMap.
lookup(Reg0)) {
258 int NewOp = QII->getInvertedPredicatedOpcode(MI->
getOpcode());
270 unsigned PR = 1, S1 = 2, S2 = 3;
273 case Hexagon::C2_mux:
274 case Hexagon::C2_muxii:
277 case Hexagon::C2_muxri:
278 NewOp = Hexagon::C2_muxir;
280 case Hexagon::C2_muxir:
281 NewOp = Hexagon::C2_muxri;
286 if (
unsigned POrig = PeepholeMap.
lookup(PSrc)) {
306 assert (&Dst != &Src &&
"Cannot duplicate into itself");
311 }
else if (Src.
isImm()) {
321 }
else if (Src.
isReg()) {
337 return new HexagonPeephole();
INITIALIZE_PASS(HexagonPeephole,"hexagon-peephole","Hexagon Peephole", false, false) bool HexagonPeephole
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
ValueT lookup(const KeyT &Val) const
lookup - Return the entry for the specified key, or a default constructed value if no such entry exis...
void ChangeToRegister(unsigned Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isDebug=false)
ChangeToRegister - Replace this operand with a new register operand of the specified value...
static bool isVirtualRegister(unsigned Reg)
isVirtualRegister - Return true if the specified register number is in the virtual register namespace...
unsigned getID() const
getID() - Return the register class ID number.
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
static MachineOperand CreateReg(unsigned Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false)
bool isImm() const
isImm - Tests if this is a MO_Immediate operand.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
static cl::opt< bool > DisableOptExtTo64("disable-hexagon-opt-ext-to-64", cl::Hidden, cl::ZeroOrMore, cl::init(false), cl::desc("Disable Optimization of extensions to i64."))
bool isReg() const
isReg - Tests if this is a MO_Register operand.
static cl::opt< bool > DisablePNotP("disable-hexagon-pnotp", cl::Hidden, cl::ZeroOrMore, cl::init(false), cl::desc("Disable Optimization of PNotP"))
unsigned getNumOperands() const
Access to explicit operands of the instruction.
void RemoveOperand(unsigned i)
Erase an operand from an instruction, leaving it with one fewer operand than it started with...
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
void ChangeToImmediate(int64_t ImmVal)
ChangeToImmediate - Replace this operand with a new immediate operand of the specified value...
bundle_iterator< MachineInstr, instr_iterator > iterator
initializer< Ty > init(const Ty &Val)
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
This file contains the declarations for the subclasses of Constant, which represent the different fla...
const MachineOperand & getOperand(unsigned i) const
Represent the analysis usage information of a pass.
void setImm(int64_t immVal)
FunctionPass class - This class is used to implement most global optimizations.
unsigned getSubReg() const
void initializeHexagonPeepholePass(PassRegistry &)
void setDesc(const MCInstrDesc &tid)
Replace the instruction descriptor (thus opcode) of the current instruction with a new one...
void addOperand(MachineFunction &MF, const MachineOperand &Op)
Add the specified operand to the instruction.
MachineOperand class - Representation of each machine instruction operand.
static cl::opt< bool > DisableOptSZExt("disable-hexagon-optszext", cl::Hidden, cl::ZeroOrMore, cl::init(false), cl::desc("Disable Optimization of Sign/Zero Extends"))
FunctionPass * createHexagonPeephole()
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
Representation of each machine instruction.
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.
static cl::opt< bool > DisableHexagonPeephole("disable-hexagon-peephole", cl::Hidden, cl::ZeroOrMore, cl::init(false), cl::desc("Disable Peephole Optimization"))
void setReg(unsigned Reg)
Change the register this operand corresponds to.
iterator find(const KeyT &Val)
unsigned getReg() const
getReg - Returns the register number.
BasicBlockListType::iterator iterator
PassRegistry - This class manages the registration and intitialization of the pass subsystem as appli...