15 #ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONREGISTERINFO_H
16 #define LLVM_LIB_TARGET_HEXAGON_HEXAGONREGISTERINFO_H
21 #define GET_REGINFO_HEADER
22 #include "HexagonGenRegisterInfo.inc"
36 #define HEXAGON_RESERVED_REG_1 Hexagon::R10
37 #define HEXAGON_RESERVED_REG_2 Hexagon::R11
52 unsigned FIOperandNum,
RegScavenger *RS =
nullptr)
const override;
unsigned getRARegister() const
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
unsigned getFrameRegister() const
Reg
All possible values of the reg field in the ModR/M byte.
void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override
const MCPhysReg * getCallerSavedRegs(const MachineFunction *MF) const
unsigned getFirstCallerSavedNonParamReg() const
bundle_iterator< MachineInstr, instr_iterator > iterator
bool isEHReturnCalleeSaveReg(unsigned Reg) const
bool requiresRegisterScavenging(const MachineFunction &MF) const override
Returns true since we may need scavenging for a temporary register when generating hardware loop inst...
bool useFPForScavengingIndex(const MachineFunction &MF) const override
Returns true if the frame pointer is valid.
bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override
bool needsStackRealignment(const MachineFunction &MF) const override
BitVector getReservedRegs(const MachineFunction &MF) const override
unsigned getStackRegister() const
bool requiresFrameIndexScavenging(const MachineFunction &MF) const override
Returns true.
bool isCalleeSaveReg(unsigned Reg) const
const MCPhysReg * getCalleeSavedRegs(const MachineFunction *MF) const override
Code Generation virtual methods...