29 #ifndef LLVM_CODEGEN_LIVEPHYSREGS_H
30 #define LLVM_CODEGEN_LIVEPHYSREGS_H
55 assert(TRI &&
"Invalid TargetRegisterInfo pointer.");
61 assert(TRI &&
"Invalid TargetRegisterInfo pointer.");
75 assert(TRI &&
"LivePhysRegs is not initialized.");
76 assert(Reg <= TRI->getNumRegs() &&
"Expected a physical register.");
85 assert(TRI &&
"LivePhysRegs is not initialized.");
86 assert(Reg <= TRI->getNumRegs() &&
"Expected a physical register.");
89 LiveRegs.
erase(*SubRegs);
91 SuperRegs.
isValid(); ++SuperRegs)
92 LiveRegs.
erase(*SuperRegs);
117 SmallVectorImpl<std::pair<unsigned, const MachineOperand*>> &Clobbers);
bool isValid() const
isValid - returns true if this iterator is not yet at the end.
std::pair< iterator, bool > insert(const ValueT &Val)
insert - Attempts to insert a new element.
size_type count(const KeyT &Key) const
count - Returns 1 if this set contains an element identified by Key, 0 otherwise. ...
void init(const TargetRegisterInfo *TRI)
Clear and initialize the LivePhysRegs set.
SparseSet< unsigned >::const_iterator const_iterator
bool empty() const
empty - Returns true if the set is empty.
MCSuperRegIterator enumerates all super-registers of Reg.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
const_iterator end() const
Reg
All possible values of the reg field in the ModR/M byte.
void print(raw_ostream &OS) const
Prints the currently live registers to OS.
unsigned getNumRegs() const
Return the number of registers this target has (useful for sizing arrays holding per register informa...
void stepForward(const MachineInstr &MI, SmallVectorImpl< std::pair< unsigned, const MachineOperand * >> &Clobbers)
Simulates liveness when stepping forward over an instruction(bundle): Remove killed-uses, add defs.
LivePhysRegs(const TargetRegisterInfo *TRI)
Constructs and initialize an empty LivePhysRegs set.
iterator erase(iterator I)
erase - Erases an existing element identified by a valid iterator.
void addLiveOuts(const MachineBasicBlock *MBB, bool AddPristines=false)
Adds all live-out registers of basic block MBB; After prologue/ epilogue insertion AddPristines shoul...
void stepBackward(const MachineInstr &MI)
Simulates liveness when stepping backwards over an instruction(bundle): Remove Defs, add uses.
bool contains(unsigned Reg) const
Returns true if register Reg is contained in the set.
void setUniverse(unsigned U)
setUniverse - Set the universe size which determines the largest key the set can hold.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
MCSubRegIterator enumerates all sub-registers of Reg.
const_iterator begin() const
void removeRegsInMask(const MachineOperand &MO, SmallVectorImpl< std::pair< unsigned, const MachineOperand * >> *Clobbers)
Removes physical registers clobbered by the regmask operand MO.
void addLiveIns(const MachineBasicBlock *MBB, bool AddPristines=false)
Adds all live-in registers of basic block MBB; After prologue/ epilogue insertion AddPristines should...
bool empty() const
Returns true if the set is empty.
MachineOperand class - Representation of each machine instruction operand.
Representation of each machine instruction.
void removeReg(unsigned Reg)
Removes a physical register, all its sub-registers, and all its super-registers from the set...
A set of live physical registers with functions to track liveness when walking backward/forward throu...
void dump() const
Dumps the currently live registers to the debug output.
raw_ostream & operator<<(raw_ostream &OS, const APInt &I)
void clear()
clear - Clears the set.
void clear()
Clears the LivePhysRegs set.
LivePhysRegs()
Constructs a new empty LivePhysRegs set.
This class implements an extremely fast bulk output stream that can only output to a stream...
const_iterator end() const
const_iterator begin() const
void addReg(unsigned Reg)
Adds a physical register and all its sub-registers to the set.