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LLVM
3.7.0
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This is the complete list of members for llvm::MipsSEInstrInfo, including all inherited members.
| adjustStackPtr(unsigned SP, int64_t Amount, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const override | llvm::MipsSEInstrInfo | virtual |
| AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const override | llvm::MipsInstrInfo | |
| AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify, SmallVectorImpl< MachineInstr * > &BranchInstrs) const | llvm::MipsInstrInfo | |
| BranchType enum name | llvm::MipsInstrInfo | |
| BT_Cond enum value | llvm::MipsInstrInfo | |
| BT_CondUncond enum value | llvm::MipsInstrInfo | |
| BT_Indirect enum value | llvm::MipsInstrInfo | |
| BT_NoBranch enum value | llvm::MipsInstrInfo | |
| BT_None enum value | llvm::MipsInstrInfo | |
| BT_Uncond enum value | llvm::MipsInstrInfo | |
| copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const override | llvm::MipsSEInstrInfo | |
| create(MipsSubtarget &STI) | llvm::MipsInstrInfo | static |
| expandPostRAPseudo(MachineBasicBlock::iterator MI) const override | llvm::MipsSEInstrInfo | |
| genInstrWithNewOpc(unsigned NewOpc, MachineBasicBlock::iterator I) const | llvm::MipsInstrInfo | |
| GetInstSizeInBytes(const MachineInstr *MI) const | llvm::MipsInstrInfo | |
| GetMemOperand(MachineBasicBlock &MBB, int FI, unsigned Flag) const | llvm::MipsInstrInfo | protected |
| getOppositeBranchOpc(unsigned Opc) const override | llvm::MipsSEInstrInfo | virtual |
| getRegisterInfo() const override | llvm::MipsSEInstrInfo | virtual |
| InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, DebugLoc DL) const override | llvm::MipsInstrInfo | |
| insertNoop(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const override | llvm::MipsInstrInfo | |
| isLoadFromStackSlot(const MachineInstr *MI, int &FrameIndex) const override | llvm::MipsSEInstrInfo | |
| isStoreToStackSlot(const MachineInstr *MI, int &FrameIndex) const override | llvm::MipsSEInstrInfo | |
| isZeroImm(const MachineOperand &op) const | llvm::MipsInstrInfo | protected |
| loadImmediate(int64_t Imm, MachineBasicBlock &MBB, MachineBasicBlock::iterator II, DebugLoc DL, unsigned *NewImm) const | llvm::MipsSEInstrInfo | |
| loadRegFromStack(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, int64_t Offset) const override | llvm::MipsSEInstrInfo | virtual |
| loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override | llvm::MipsInstrInfo | inline |
| MipsInstrInfo(const MipsSubtarget &STI, unsigned UncondBrOpc) | llvm::MipsInstrInfo | explicit |
| MipsSEInstrInfo(const MipsSubtarget &STI) | llvm::MipsSEInstrInfo | explicit |
| RemoveBranch(MachineBasicBlock &MBB) const override | llvm::MipsInstrInfo | |
| ReverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const override | llvm::MipsInstrInfo | |
| storeRegToStack(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, int64_t Offset) const override | llvm::MipsSEInstrInfo | virtual |
| storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override | llvm::MipsInstrInfo | inline |
| Subtarget | llvm::MipsInstrInfo | protected |
| UncondBrOpc | llvm::MipsInstrInfo | protected |
1.8.6