15 #ifndef LLVM_LIB_TARGET_R600_R600REGISTERINFO_H
16 #define LLVM_LIB_TARGET_R600_R600REGISTERINFO_H
22 class AMDGPUSubtarget;
unsigned getHWRegChan(unsigned reg) const
get the HW encoding for a register's channel.
const TargetRegisterClass * getCFGStructurizerRegClass(MVT VT) const override
get the register class of the specified type to use in the CFGStructurizer
Each TargetRegisterClass has a per register weight, and weight limit which must be less than the limi...
Reg
All possible values of the reg field in the ModR/M byte.
TargetRegisterInfo interface that is implemented by all hw codegen targets.
MVT - Machine Value Type.
unsigned getHWRegIndex(unsigned Reg) const override
bool isPhysRegLiveAcrossClauses(unsigned Reg) const
const RegClassWeight & getRegClassWeight(const TargetRegisterClass *RC) const override
BitVector getReservedRegs(const MachineFunction &MF) const override