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LLVM
3.7.0
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#include "MCTargetDesc/X86MCTargetDesc.h"#include "MCTargetDesc/X86BaseInfo.h"#include "MCTargetDesc/X86FixupKinds.h"#include "llvm/MC/MCCodeEmitter.h"#include "llvm/MC/MCContext.h"#include "llvm/MC/MCExpr.h"#include "llvm/MC/MCInst.h"#include "llvm/MC/MCInstrInfo.h"#include "llvm/MC/MCRegisterInfo.h"#include "llvm/MC/MCSubtargetInfo.h"#include "llvm/MC/MCSymbol.h"#include "llvm/Support/raw_ostream.h"Go to the source code of this file.
Macros | |
| #define | DEBUG_TYPE "mccodeemitter" |
Enumerations | |
| enum | GlobalOffsetTableExprKind { GOT_None, GOT_Normal, GOT_SymDiff } |
| StartsWithGlobalOffsetTable - Check if this expression starts with GLOBAL_OFFSET_TABLE and if it is of the form GLOBAL_OFFSET_TABLE-symbol. More... | |
Functions | |
| static bool | isDisp8 (int Value) |
| isDisp8 - Return true if this signed displacement fits in a 8-bit sign-extended field. More... | |
| static bool | isCDisp8 (uint64_t TSFlags, int Value, int &CValue) |
| isCDisp8 - Return true if this signed displacement fits in a 8-bit compressed dispacement field. More... | |
| static MCFixupKind | getImmFixupKind (uint64_t TSFlags) |
| getImmFixupKind - Return the appropriate fixup kind to use for an immediate in an instruction with the specified TSFlags. More... | |
| static bool | Is32BitMemOperand (const MCInst &MI, unsigned Op) |
| Is32BitMemOperand - Return true if the specified instruction has a 32-bit memory operand. More... | |
| static bool | Is64BitMemOperand (const MCInst &MI, unsigned Op) |
| Is64BitMemOperand - Return true if the specified instruction has a 64-bit memory operand. More... | |
| static GlobalOffsetTableExprKind | StartsWithGlobalOffsetTable (const MCExpr *Expr) |
| static bool | HasSecRelSymbolRef (const MCExpr *Expr) |
| static unsigned | DetermineREXPrefix (const MCInst &MI, uint64_t TSFlags, const MCInstrDesc &Desc) |
| DetermineREXPrefix - Determine if the MCInst has to be encoded with a X86-64 REX prefix which specifies 1) 64-bit instructions, 2) non-default operand size, and 3) use of X86-64 extended registers. More... | |
| #define DEBUG_TYPE "mccodeemitter" |
Definition at line 29 of file X86MCCodeEmitter.cpp.
StartsWithGlobalOffsetTable - Check if this expression starts with GLOBAL_OFFSET_TABLE and if it is of the form GLOBAL_OFFSET_TABLE-symbol.
This is needed to support PIC on ELF i386 as GLOBAL_OFFSET_TABLE is magical. We check only simple case that are know to be used: GLOBAL_OFFSET_TABLE by itself or at the start of a binary expression.
| Enumerator | |
|---|---|
| GOT_None | |
| GOT_Normal | |
| GOT_SymDiff | |
Definition at line 259 of file X86MCCodeEmitter.cpp.
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DetermineREXPrefix - Determine if the MCInst has to be encoded with a X86-64 REX prefix which specifies 1) 64-bit instructions, 2) non-default operand size, and 3) use of X86-64 extended registers.
Definition at line 988 of file X86MCCodeEmitter.cpp.
References llvm::X86::AddrNumOperands, llvm::tgtok::Bit, llvm::MCInst::getNumOperands(), llvm::MCInst::getOperand(), llvm::MCInstrDesc::getOperandConstraint(), llvm::MCOperand::getReg(), llvm::MCOperand::isReg(), llvm::X86II::isX86_64ExtendedReg(), llvm::X86II::isX86_64NonExtLowByteReg(), llvm::X86II::MRM0m, llvm::X86II::MRM1m, llvm::X86II::MRM2m, llvm::X86II::MRM3m, llvm::X86II::MRM4m, llvm::X86II::MRM5m, llvm::X86II::MRM6m, llvm::X86II::MRM7m, llvm::X86II::MRMDestMem, llvm::X86II::MRMSrcMem, llvm::X86II::MRMSrcReg, llvm::X86II::MRMXm, llvm::X86II::REX_W, and llvm::MCOI::TIED_TO.
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getImmFixupKind - Return the appropriate fixup kind to use for an immediate in an instruction with the specified TSFlags.
Definition at line 210 of file X86MCCodeEmitter.cpp.
References llvm::MCFixup::getKindForSize(), llvm::X86II::getSizeOfImm(), llvm::X86II::isImmPCRel(), llvm::X86II::isImmSigned(), llvm_unreachable, and llvm::X86::reloc_signed_4byte.
Definition at line 285 of file X86MCCodeEmitter.cpp.
References llvm::MCExpr::getKind(), llvm::MCSymbolRefExpr::getKind(), llvm::MCExpr::SymbolRef, and llvm::MCSymbolRefExpr::VK_SECREL.
Is32BitMemOperand - Return true if the specified instruction has a 32-bit memory operand.
Op specifies the operand # of the memoperand.
Definition at line 225 of file X86MCCodeEmitter.cpp.
References llvm::X86::AddrBaseReg, llvm::X86::AddrIndexReg, llvm::MCInst::getOperand(), and llvm::MCOperand::getReg().
Is64BitMemOperand - Return true if the specified instruction has a 64-bit memory operand.
Op specifies the operand # of the memoperand.
Definition at line 240 of file X86MCCodeEmitter.cpp.
References llvm::X86::AddrBaseReg, llvm::X86::AddrIndexReg, llvm::MCInst::getOperand(), and llvm::MCOperand::getReg().
isCDisp8 - Return true if this signed displacement fits in a 8-bit compressed dispacement field.
Definition at line 185 of file X86MCCodeEmitter.cpp.
References llvm::X86II::CD8_Scale_Mask, llvm::X86II::CD8_Scale_Shift, llvm::X86II::EncodingMask, llvm::X86II::EVEX, isDisp8(), and llvm::MipsISD::Ret.
isDisp8 - Return true if this signed displacement fits in a 8-bit sign-extended field.
Definition at line 179 of file X86MCCodeEmitter.cpp.
Referenced by isCDisp8().
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Definition at line 265 of file X86MCCodeEmitter.cpp.
References llvm::MCExpr::Binary, llvm::MCExpr::getKind(), llvm::MCBinaryExpr::getLHS(), llvm::MCSymbol::getName(), llvm::MCBinaryExpr::getRHS(), llvm::MCSymbolRefExpr::getSymbol(), GOT_None, GOT_Normal, GOT_SymDiff, and llvm::MCExpr::SymbolRef.
1.8.6