30 #define DEBUG_TYPE "r600mergeclause"
37 case AMDGPU::CF_ALU_PUSH_BEFORE:
57 void cleanPotentialDisabledCFAlu(
MachineInstr *CFAlu)
const;
69 const char *getPassName()
const override;
74 unsigned R600ClauseMergePass::getCFAluSize(
const MachineInstr *MI)
const {
80 bool R600ClauseMergePass::isCFAluEnabled(
const MachineInstr *MI)
const {
86 void R600ClauseMergePass::cleanPotentialDisabledCFAlu(
MachineInstr *CFAlu)
88 int CntIdx =
TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::COUNT);
92 while (I!= E && !isCFAlu(I))
97 if (isCFAluEnabled(MI))
104 bool R600ClauseMergePass::mergeIfPossible(
MachineInstr *RootCFAlu,
106 assert(isCFAlu(RootCFAlu) && isCFAlu(LatrCFAlu));
107 int CntIdx =
TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::COUNT);
108 unsigned RootInstCount = getCFAluSize(RootCFAlu),
109 LaterInstCount = getCFAluSize(LatrCFAlu);
110 unsigned CumuledInsts = RootInstCount + LaterInstCount;
111 if (CumuledInsts >=
TII->getMaxAlusPerClause()) {
115 if (RootCFAlu->
getOpcode() == AMDGPU::CF_ALU_PUSH_BEFORE)
119 TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::KCACHE_MODE0);
121 TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::KCACHE_BANK0);
123 TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::KCACHE_ADDR0);
135 TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::KCACHE_MODE1);
137 TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::KCACHE_BANK1);
139 TII->getOperandIdx(AMDGPU::CF_ALU, AMDGPU::OpName::KCACHE_ADDR1);
179 if ((!
TII->canBeConsideredALU(MI) && !isCFAlu(MI)) ||
184 cleanPotentialDisabledCFAlu(MI);
186 if (LatestCFAlu != E && mergeIfPossible(LatestCFAlu, MI)) {
197 const char *R600ClauseMergePass::getPassName()
const {
198 return "R600 Merge Clause Markers Pass";
205 return new R600ClauseMergePass(TM);
AMDGPU specific subclass of TargetSubtarget.
Interface definition for R600InstrInfo.
Interface definition for R600RegisterInfo.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
const HexagonInstrInfo * TII
void eraseFromParent()
Unlink 'this' from the containing basic block and delete it.
static cl::opt< bool > Enabled("stats", cl::desc("Enable statistics output from program (available with Asserts)"))
-stats - Command line option to cause transformations to emit stats about what they did...
FunctionPass * createR600ClauseMergePass(TargetMachine &tm)
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
const MachineBasicBlock * getParent() const
bundle_iterator< MachineInstr, instr_iterator > iterator
const MachineOperand & getOperand(unsigned i) const
void setImm(int64_t immVal)
FunctionPass class - This class is used to implement most global optimizations.
void setDesc(const MCInstrDesc &tid)
Replace the instruction descriptor (thus opcode) of the current instruction with a new one...
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Representation of each machine instruction.
virtual const TargetInstrInfo * getInstrInfo() const
BasicBlockListType::iterator iterator
Primary interface to the complete machine description for the target machine.