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Hexagon
MCTargetDesc
HexagonBaseInfo.h
Go to the documentation of this file.
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//===-- HexagonBaseInfo.h - Top level definitions for Hexagon --*- C++ -*--===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains small standalone helper functions and enum definitions for
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// the Hexagon target useful for the compiler back-end and the MC libraries.
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// As such, it deliberately does not include references to LLVM core
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// code gen types, passes, etc..
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONBASEINFO_H
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#define LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONBASEINFO_H
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#include "
HexagonMCTargetDesc.h
"
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#include "
llvm/Support/ErrorHandling.h
"
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#include <stdint.h>
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namespace
llvm {
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/// HexagonII - This namespace holds all of the target specific flags that
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/// instruction info tracks.
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///
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namespace
HexagonII {
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// *** The code below must match HexagonInstrFormat*.td *** //
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// Insn types.
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// *** Must match HexagonInstrFormat*.td ***
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enum
Type
{
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TypePSEUDO
= 0,
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TypeALU32
= 1,
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TypeCR
= 2,
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TypeJR
= 3,
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TypeJ
= 4,
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TypeLD
= 5,
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TypeST
= 6,
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TypeSYSTEM
= 7,
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TypeXTYPE
= 8,
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TypeMEMOP
= 9,
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TypeNV
= 10,
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TypeDUPLEX
= 11,
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TypePREFIX
= 30,
// Such as extenders.
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TypeENDLOOP
= 31
// Such as end of a HW loop.
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};
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enum
SubTarget
{
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HasV2SubT
= 0xf,
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HasV2SubTOnly
= 0x1,
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NoV2SubT
= 0x0,
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HasV3SubT
= 0xe,
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HasV3SubTOnly
= 0x2,
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NoV3SubT
= 0x1,
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HasV4SubT
= 0xc,
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NoV4SubT
= 0x3,
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HasV5SubT
= 0x8,
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NoV5SubT
= 0x7
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};
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enum
AddrMode
{
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NoAddrMode
= 0,
// No addressing mode
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Absolute
= 1,
// Absolute addressing mode
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AbsoluteSet
= 2,
// Absolute set addressing mode
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BaseImmOffset
= 3,
// Indirect with offset
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BaseLongOffset
= 4,
// Indirect with long offset
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BaseRegOffset
= 5,
// Indirect with register offset
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PostInc
= 6
// Post increment addressing mode
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};
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enum class
MemAccessSize
{
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NoMemAccess
= 0,
// Not a memory acces instruction.
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ByteAccess
= 1,
// Byte access instruction (memb).
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HalfWordAccess
= 2,
// Half word access instruction (memh).
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WordAccess
= 3,
// Word access instruction (memw).
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DoubleWordAccess
= 4
// Double word access instruction (memd)
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};
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// MCInstrDesc TSFlags
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// *** Must match HexagonInstrFormat*.td ***
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enum
{
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// This 5-bit field describes the insn type.
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TypePos
= 0,
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TypeMask
= 0x1f,
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// Solo instructions.
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SoloPos
= 5,
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SoloMask
= 0x1,
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// Packed only with A or X-type instructions.
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SoloAXPos
= 6,
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SoloAXMask
= 0x1,
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// Only A-type instruction in first slot or nothing.
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SoloAin1Pos
= 7,
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SoloAin1Mask
= 0x1,
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// Predicated instructions.
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PredicatedPos
= 8,
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PredicatedMask
= 0x1,
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PredicatedFalsePos
= 9,
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PredicatedFalseMask
= 0x1,
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PredicatedNewPos
= 10,
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PredicatedNewMask
= 0x1,
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PredicateLatePos
= 11,
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PredicateLateMask
= 0x1,
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// New-Value consumer instructions.
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NewValuePos
= 12,
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NewValueMask
= 0x1,
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// New-Value producer instructions.
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hasNewValuePos
= 13,
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hasNewValueMask
= 0x1,
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// Which operand consumes or produces a new value.
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NewValueOpPos
= 14,
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NewValueOpMask
= 0x7,
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// Stores that can become new-value stores.
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mayNVStorePos
= 17,
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mayNVStoreMask
= 0x1,
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// New-value store instructions.
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NVStorePos
= 18,
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NVStoreMask
= 0x1,
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// Loads that can become current-value loads.
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mayCVLoadPos
= 19,
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mayCVLoadMask
= 0x1,
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// Current-value load instructions.
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CVLoadPos
= 20,
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CVLoadMask
= 0x1,
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// Extendable insns.
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ExtendablePos
= 21,
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ExtendableMask
= 0x1,
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// Insns must be extended.
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ExtendedPos
= 22,
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ExtendedMask
= 0x1,
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// Which operand may be extended.
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ExtendableOpPos
= 23,
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ExtendableOpMask
= 0x7,
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// Signed or unsigned range.
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ExtentSignedPos
= 26,
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ExtentSignedMask
= 0x1,
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// Number of bits of range before extending operand.
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ExtentBitsPos
= 27,
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ExtentBitsMask
= 0x1f,
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// Alignment power-of-two before extending operand.
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ExtentAlignPos
= 32,
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ExtentAlignMask
= 0x3,
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// Valid subtargets
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validSubTargetPos
= 34,
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validSubTargetMask
= 0xf,
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// Addressing mode for load/store instructions.
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AddrModePos
= 40,
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AddrModeMask
= 0x7,
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// Access size for load/store instructions.
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MemAccessSizePos
= 43,
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MemAccesSizeMask
= 0x7,
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// Branch predicted taken.
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TakenPos
= 47,
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TakenMask
= 0x1,
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// Floating-point instructions.
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FPPos
= 48,
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FPMask
= 0x1
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};
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// *** The code above must match HexagonInstrFormat*.td *** //
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// Hexagon specific MO operand flag mask.
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enum
HexagonMOTargetFlagVal
{
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//===------------------------------------------------------------------===//
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// Hexagon Specific MachineOperand flags.
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MO_NO_FLAG
,
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HMOTF_ConstExtended
= 1,
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/// MO_PCREL - On a symbol operand, indicates a PC-relative relocation
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/// Used for computing a global address for PIC compilations
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MO_PCREL
,
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/// MO_GOT - Indicates a GOT-relative relocation
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MO_GOT
,
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// Low or high part of a symbol.
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MO_LO16
,
MO_HI16
,
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// Offset from the base of the SDA.
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MO_GPREL
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};
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// Hexagon Sub-instruction classes.
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enum
SubInstructionGroup
{
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HSIG_None
= 0,
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HSIG_L1
,
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HSIG_L2
,
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HSIG_S1
,
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HSIG_S2
,
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HSIG_A
,
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HSIG_Compound
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};
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// Hexagon Compound classes.
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enum
CompoundGroup
{
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HCG_None
= 0,
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HCG_A
,
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HCG_B
,
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HCG_C
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};
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enum
InstParseBits
{
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INST_PARSE_MASK
= 0x0000c000,
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INST_PARSE_PACKET_END
= 0x0000c000,
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INST_PARSE_LOOP_END
= 0x00008000,
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INST_PARSE_NOT_END
= 0x00004000,
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INST_PARSE_DUPLEX
= 0x00000000,
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INST_PARSE_EXTENDER
= 0x00000000
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};
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}
// End namespace HexagonII.
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}
// End namespace llvm.
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#endif
llvm::HexagonII::MemAccessSize::ByteAccess
llvm::HexagonII::SoloAXMask
Definition:
HexagonBaseInfo.h:94
llvm::HexagonII::HSIG_Compound
Definition:
HexagonBaseInfo.h:202
llvm::HexagonII::FPMask
Definition:
HexagonBaseInfo.h:167
llvm::HexagonII::TypeMEMOP
Definition:
HexagonBaseInfo.h:44
llvm::HexagonII::MemAccessSize
MemAccessSize
Definition:
HexagonBaseInfo.h:74
llvm::HexagonII::TypeSYSTEM
Definition:
HexagonBaseInfo.h:42
llvm::HexagonII::HSIG_S1
Definition:
HexagonBaseInfo.h:199
llvm::HexagonII::MO_NO_FLAG
Definition:
HexagonBaseInfo.h:176
llvm::HexagonII::AbsoluteSet
Definition:
HexagonBaseInfo.h:67
llvm::HexagonII::mayCVLoadMask
Definition:
HexagonBaseInfo.h:126
llvm::HexagonII::TypeNV
Definition:
HexagonBaseInfo.h:45
llvm::HexagonII::AddrModePos
Definition:
HexagonBaseInfo.h:155
llvm::HexagonII::SoloMask
Definition:
HexagonBaseInfo.h:91
llvm::HexagonII::ExtendedPos
Definition:
HexagonBaseInfo.h:135
llvm::HexagonII::TypeALU32
Definition:
HexagonBaseInfo.h:36
llvm::HexagonII::AddrModeMask
Definition:
HexagonBaseInfo.h:156
llvm::HexagonII::NoAddrMode
Definition:
HexagonBaseInfo.h:65
llvm::HexagonII::NewValueOpPos
Definition:
HexagonBaseInfo.h:116
llvm::HexagonII::TypeJ
Definition:
HexagonBaseInfo.h:39
llvm::HexagonII::TypeXTYPE
Definition:
HexagonBaseInfo.h:43
llvm::HexagonII::TypePREFIX
Definition:
HexagonBaseInfo.h:47
llvm::HexagonII::SubInstructionGroup
SubInstructionGroup
Definition:
HexagonBaseInfo.h:195
llvm::HexagonII::Absolute
Definition:
HexagonBaseInfo.h:66
llvm::HexagonII::hasNewValueMask
Definition:
HexagonBaseInfo.h:114
llvm::HexagonII::HasV2SubT
Definition:
HexagonBaseInfo.h:52
llvm::HexagonII::NVStoreMask
Definition:
HexagonBaseInfo.h:123
llvm::HexagonII::TakenPos
Definition:
HexagonBaseInfo.h:162
llvm::HexagonII::PredicatedMask
Definition:
HexagonBaseInfo.h:101
llvm::HexagonII::ExtendableOpPos
Definition:
HexagonBaseInfo.h:138
llvm::HexagonII::CompoundGroup
CompoundGroup
Definition:
HexagonBaseInfo.h:206
ErrorHandling.h
llvm::HexagonII::INST_PARSE_EXTENDER
Definition:
HexagonBaseInfo.h:219
llvm::HexagonII::NewValuePos
Definition:
HexagonBaseInfo.h:110
llvm::HexagonII::HCG_B
Definition:
HexagonBaseInfo.h:209
llvm::HexagonII::TypePSEUDO
Definition:
HexagonBaseInfo.h:35
llvm::HexagonII::NoV3SubT
Definition:
HexagonBaseInfo.h:57
llvm::HexagonII::mayNVStorePos
Definition:
HexagonBaseInfo.h:119
llvm::HexagonII::SubTarget
SubTarget
Definition:
HexagonBaseInfo.h:51
llvm::HexagonII::SoloAXPos
Definition:
HexagonBaseInfo.h:93
llvm::HexagonII::TypeCR
Definition:
HexagonBaseInfo.h:37
llvm::HexagonII::HSIG_S2
Definition:
HexagonBaseInfo.h:200
llvm::HexagonII::ExtentSignedMask
Definition:
HexagonBaseInfo.h:142
llvm::HexagonII::AddrMode
AddrMode
Definition:
HexagonBaseInfo.h:64
llvm::HexagonII::ExtentBitsMask
Definition:
HexagonBaseInfo.h:145
llvm::HexagonII::FPPos
Definition:
HexagonBaseInfo.h:166
llvm::HexagonII::PredicatedPos
Definition:
HexagonBaseInfo.h:100
llvm::HexagonII::HMOTF_ConstExtended
Definition:
HexagonBaseInfo.h:178
llvm::HexagonII::HasV3SubTOnly
Definition:
HexagonBaseInfo.h:56
llvm::HexagonII::ExtendablePos
Definition:
HexagonBaseInfo.h:132
llvm::HexagonII::HCG_None
Definition:
HexagonBaseInfo.h:207
llvm::HexagonII::hasNewValuePos
Definition:
HexagonBaseInfo.h:113
llvm::HexagonII::TypeJR
Definition:
HexagonBaseInfo.h:38
llvm::HexagonII::PredicateLateMask
Definition:
HexagonBaseInfo.h:107
llvm::HexagonII::MO_HI16
Definition:
HexagonBaseInfo.h:188
llvm::HexagonII::INST_PARSE_DUPLEX
Definition:
HexagonBaseInfo.h:218
llvm::HexagonII::TypeENDLOOP
Definition:
HexagonBaseInfo.h:48
llvm::HexagonII::HCG_A
Definition:
HexagonBaseInfo.h:208
llvm::HexagonII::MemAccessSize::NoMemAccess
llvm::HexagonII::mayCVLoadPos
Definition:
HexagonBaseInfo.h:125
llvm::HexagonII::PredicatedNewMask
Definition:
HexagonBaseInfo.h:105
llvm::HexagonII::NewValueOpMask
Definition:
HexagonBaseInfo.h:117
llvm::HexagonII::SoloAin1Pos
Definition:
HexagonBaseInfo.h:96
llvm::HexagonII::MO_LO16
Definition:
HexagonBaseInfo.h:188
llvm::HexagonII::SoloAin1Mask
Definition:
HexagonBaseInfo.h:97
llvm::HexagonII::MemAccessSizePos
Definition:
HexagonBaseInfo.h:158
llvm::HexagonII::NVStorePos
Definition:
HexagonBaseInfo.h:122
llvm::HexagonII::HSIG_None
Definition:
HexagonBaseInfo.h:196
llvm::HexagonII::HasV3SubT
Definition:
HexagonBaseInfo.h:55
llvm::HexagonII::MemAccessSize::HalfWordAccess
llvm::HexagonII::HasV2SubTOnly
Definition:
HexagonBaseInfo.h:53
llvm::HexagonII::TakenMask
Definition:
HexagonBaseInfo.h:163
llvm::HexagonII::NoV4SubT
Definition:
HexagonBaseInfo.h:59
llvm::HexagonII::NoV2SubT
Definition:
HexagonBaseInfo.h:54
llvm::HexagonII::BaseLongOffset
Definition:
HexagonBaseInfo.h:69
llvm::HexagonII::INST_PARSE_NOT_END
Definition:
HexagonBaseInfo.h:217
llvm::HexagonII::PredicateLatePos
Definition:
HexagonBaseInfo.h:106
llvm::HexagonII::TypeDUPLEX
Definition:
HexagonBaseInfo.h:46
llvm::HexagonII::MO_PCREL
MO_PCREL - On a symbol operand, indicates a PC-relative relocation Used for computing a global addres...
Definition:
HexagonBaseInfo.h:182
llvm::HexagonII::HexagonMOTargetFlagVal
HexagonMOTargetFlagVal
Definition:
HexagonBaseInfo.h:173
llvm::HexagonII::Type
Type
Definition:
HexagonBaseInfo.h:34
llvm::HexagonII::TypePos
Definition:
HexagonBaseInfo.h:86
llvm::HexagonII::HSIG_A
Definition:
HexagonBaseInfo.h:201
llvm::HexagonII::PredicatedNewPos
Definition:
HexagonBaseInfo.h:104
llvm::HexagonII::BaseImmOffset
Definition:
HexagonBaseInfo.h:68
llvm::HexagonII::MemAccesSizeMask
Definition:
HexagonBaseInfo.h:159
llvm::HexagonII::TypeMask
Definition:
HexagonBaseInfo.h:87
llvm::HexagonII::MO_GOT
MO_GOT - Indicates a GOT-relative relocation.
Definition:
HexagonBaseInfo.h:185
llvm::HexagonII::NewValueMask
Definition:
HexagonBaseInfo.h:111
llvm::HexagonII::HasV4SubT
Definition:
HexagonBaseInfo.h:58
llvm::HexagonII::ExtendableMask
Definition:
HexagonBaseInfo.h:133
llvm::HexagonII::mayNVStoreMask
Definition:
HexagonBaseInfo.h:120
llvm::HexagonII::ExtentSignedPos
Definition:
HexagonBaseInfo.h:141
llvm::HexagonII::HCG_C
Definition:
HexagonBaseInfo.h:210
llvm::HexagonII::ExtentAlignMask
Definition:
HexagonBaseInfo.h:148
llvm::HexagonII::INST_PARSE_PACKET_END
Definition:
HexagonBaseInfo.h:215
llvm::HexagonII::InstParseBits
InstParseBits
Definition:
HexagonBaseInfo.h:213
llvm::HexagonII::validSubTargetMask
Definition:
HexagonBaseInfo.h:152
llvm::HexagonII::INST_PARSE_LOOP_END
Definition:
HexagonBaseInfo.h:216
llvm::HexagonII::HasV5SubT
Definition:
HexagonBaseInfo.h:60
llvm::HexagonII::HSIG_L1
Definition:
HexagonBaseInfo.h:197
HexagonMCTargetDesc.h
llvm::HexagonII::MO_GPREL
Definition:
HexagonBaseInfo.h:191
llvm::HexagonII::MemAccessSize::DoubleWordAccess
llvm::HexagonII::BaseRegOffset
Definition:
HexagonBaseInfo.h:70
llvm::HexagonII::validSubTargetPos
Definition:
HexagonBaseInfo.h:151
llvm::HexagonII::MemAccessSize::WordAccess
llvm::HexagonII::PredicatedFalseMask
Definition:
HexagonBaseInfo.h:103
llvm::HexagonII::TypeST
Definition:
HexagonBaseInfo.h:41
llvm::HexagonII::PostInc
Definition:
HexagonBaseInfo.h:71
llvm::HexagonII::CVLoadMask
Definition:
HexagonBaseInfo.h:129
llvm::HexagonII::INST_PARSE_MASK
Definition:
HexagonBaseInfo.h:214
llvm::HexagonII::ExtendedMask
Definition:
HexagonBaseInfo.h:136
llvm::HexagonII::ExtendableOpMask
Definition:
HexagonBaseInfo.h:139
llvm::HexagonII::TypeLD
Definition:
HexagonBaseInfo.h:40
llvm::HexagonII::ExtentBitsPos
Definition:
HexagonBaseInfo.h:144
llvm::HexagonII::SoloPos
Definition:
HexagonBaseInfo.h:90
llvm::HexagonII::HSIG_L2
Definition:
HexagonBaseInfo.h:198
llvm::HexagonII::PredicatedFalsePos
Definition:
HexagonBaseInfo.h:102
llvm::HexagonII::CVLoadPos
Definition:
HexagonBaseInfo.h:128
llvm::HexagonII::ExtentAlignPos
Definition:
HexagonBaseInfo.h:147
llvm::HexagonII::NoV5SubT
Definition:
HexagonBaseInfo.h:61
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