LLVM  3.7.0
Public Member Functions | Protected Types | Protected Attributes | List of all members
llvm::X86Subtarget Class Referencefinal

#include <X86Subtarget.h>

Inheritance diagram for llvm::X86Subtarget:
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Collaboration diagram for llvm::X86Subtarget:
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Public Member Functions

 X86Subtarget (const Triple &TT, const std::string &CPU, const std::string &FS, const X86TargetMachine &TM, unsigned StackAlignOverride)
 This constructor initializes the data members to match that of the specified triple. More...
 
const X86TargetLoweringgetTargetLowering () const override
 
const X86InstrInfogetInstrInfo () const override
 
const X86FrameLoweringgetFrameLowering () const override
 
const X86SelectionDAGInfogetSelectionDAGInfo () const override
 
const X86RegisterInfogetRegisterInfo () const override
 
unsigned getStackAlignment () const
 Returns the minimum alignment known to hold of the stack frame on entry to the function and which must be maintained by every function for this subtarget. More...
 
unsigned getMaxInlineSizeThreshold () const
 Returns the maximum memset / memcpy size that still makes it profitable to inline the call. More...
 
void ParseSubtargetFeatures (StringRef CPU, StringRef FS)
 ParseSubtargetFeatures - Parses features string setting specified subtarget options. More...
 
bool is64Bit () const
 Is this x86_64? (disregarding specific ABI / programming model) More...
 
bool is32Bit () const
 
bool is16Bit () const
 
bool isTarget64BitILP32 () const
 Is this x86_64 with the ILP32 programming model (x32 ABI)? More...
 
bool isTarget64BitLP64 () const
 Is this x86_64 with the LP64 programming model (standard AMD64, no x32)? More...
 
PICStyles::Style getPICStyle () const
 
void setPICStyle (PICStyles::Style Style)
 
bool hasCMov () const
 
bool hasMMX () const
 
bool hasSSE1 () const
 
bool hasSSE2 () const
 
bool hasSSE3 () const
 
bool hasSSSE3 () const
 
bool hasSSE41 () const
 
bool hasSSE42 () const
 
bool hasAVX () const
 
bool hasAVX2 () const
 
bool hasAVX512 () const
 
bool hasFp256 () const
 
bool hasInt256 () const
 
bool hasSSE4A () const
 
bool has3DNow () const
 
bool has3DNowA () const
 
bool hasPOPCNT () const
 
bool hasAES () const
 
bool hasPCLMUL () const
 
bool hasFMA () const
 
bool hasFMA4 () const
 
bool hasXOP () const
 
bool hasTBM () const
 
bool hasMOVBE () const
 
bool hasRDRAND () const
 
bool hasF16C () const
 
bool hasFSGSBase () const
 
bool hasLZCNT () const
 
bool hasBMI () const
 
bool hasBMI2 () const
 
bool hasRTM () const
 
bool hasHLE () const
 
bool hasADX () const
 
bool hasSHA () const
 
bool hasPRFCHW () const
 
bool hasRDSEED () const
 
bool isBTMemSlow () const
 
bool isSHLDSlow () const
 
bool isUnalignedMemAccessFast () const
 
bool isUnalignedMem32Slow () const
 
bool hasSSEUnalignedMem () const
 
bool hasCmpxchg16b () const
 
bool useLeaForSP () const
 
bool hasSlowDivide32 () const
 
bool hasSlowDivide64 () const
 
bool padShortFunctions () const
 
bool callRegIndirect () const
 
bool LEAusesAG () const
 
bool slowLEA () const
 
bool slowIncDec () const
 
bool hasCDI () const
 
bool hasPFI () const
 
bool hasERI () const
 
bool hasDQI () const
 
bool hasBWI () const
 
bool hasVLX () const
 
bool hasMPX () const
 
bool isAtom () const
 
bool isSLM () const
 
bool useSoftFloat () const
 
const TriplegetTargetTriple () const
 
bool isTargetDarwin () const
 
bool isTargetFreeBSD () const
 
bool isTargetDragonFly () const
 
bool isTargetSolaris () const
 
bool isTargetPS4 () const
 
bool isTargetELF () const
 
bool isTargetCOFF () const
 
bool isTargetMachO () const
 
bool isTargetLinux () const
 
bool isTargetNaCl () const
 
bool isTargetNaCl32 () const
 
bool isTargetNaCl64 () const
 
bool isTargetWindowsMSVC () const
 
bool isTargetKnownWindowsMSVC () const
 
bool isTargetWindowsCygwin () const
 
bool isTargetWindowsGNU () const
 
bool isTargetWindowsItanium () const
 
bool isTargetCygMing () const
 
bool isOSWindows () const
 
bool isTargetWin64 () const
 
bool isTargetWin32 () const
 
bool isPICStyleSet () const
 
bool isPICStyleGOT () const
 
bool isPICStyleRIPRel () const
 
bool isPICStyleStubPIC () const
 
bool isPICStyleStubNoDynamic () const
 
bool isPICStyleStubAny () const
 
bool isCallingConvWin64 (CallingConv::ID CC) const
 
unsigned char ClassifyGlobalReference (const GlobalValue *GV, const TargetMachine &TM) const
 ClassifyGlobalReference - Classify a global variable reference for the current subtarget according to how we should reference it in a non-pcrel context. More...
 
unsigned char ClassifyBlockAddressReference () const
 Classify a blockaddress reference for the current subtarget according to how we should reference it in a non-pcrel context. More...
 
bool IsLegalToCallImmediateAddr (const TargetMachine &TM) const
 Return true if the subtarget allows calls to immediate address. More...
 
const char * getBZeroEntry () const
 This function returns the name of a function which has an interface like the non-standard bzero function, if such a function exists on the current subtarget and it is considered prefereable over memset with zero passed as the second argument. More...
 
bool hasSinCos () const
 This function returns true if the target has sincos() routine in its compiler runtime or math libraries. More...
 
bool enableMachineScheduler () const override
 Enable the MachineScheduler pass for all X86 subtargets. More...
 
bool enableEarlyIfConversion () const override
 
const InstrItineraryDatagetInstrItineraryData () const override
 Return the instruction itineraries based on the subtarget selection. More...
 
AntiDepBreakMode getAntiDepBreakMode () const override
 

Protected Types

enum  X86SSEEnum {
  NoMMXSSE, MMX, SSE1, SSE2,
  SSE3, SSSE3, SSE41, SSE42,
  AVX, AVX2, AVX512F
}
 
enum  X863DNowEnum { NoThreeDNow, ThreeDNow, ThreeDNowA }
 
enum  X86ProcFamilyEnum { Others, IntelAtom, IntelSLM }
 

Protected Attributes

X86ProcFamilyEnum X86ProcFamily
 X86 processor family: Intel Atom, and others. More...
 
PICStyles::Style PICStyle
 Which PIC style to use. More...
 
X86SSEEnum X86SSELevel
 MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, or none supported. More...
 
X863DNowEnum X863DNowLevel
 3DNow, 3DNow Athlon, or none supported. More...
 
bool HasCMov
 True if this processor has conditional move instructions (generally pentium pro+). More...
 
bool HasX86_64
 True if the processor supports X86-64 instructions. More...
 
bool HasPOPCNT
 True if the processor supports POPCNT. More...
 
bool HasSSE4A
 True if the processor supports SSE4A instructions. More...
 
bool HasAES
 Target has AES instructions. More...
 
bool HasPCLMUL
 Target has carry-less multiplication. More...
 
bool HasFMA
 Target has 3-operand fused multiply-add. More...
 
bool HasFMA4
 Target has 4-operand fused multiply-add. More...
 
bool HasXOP
 Target has XOP instructions. More...
 
bool HasTBM
 Target has TBM instructions. More...
 
bool HasMOVBE
 True if the processor has the MOVBE instruction. More...
 
bool HasRDRAND
 True if the processor has the RDRAND instruction. More...
 
bool HasF16C
 Processor has 16-bit floating point conversion instructions. More...
 
bool HasFSGSBase
 Processor has FS/GS base insturctions. More...
 
bool HasLZCNT
 Processor has LZCNT instruction. More...
 
bool HasBMI
 Processor has BMI1 instructions. More...
 
bool HasBMI2
 Processor has BMI2 instructions. More...
 
bool HasRTM
 Processor has RTM instructions. More...
 
bool HasHLE
 Processor has HLE. More...
 
bool HasADX
 Processor has ADX instructions. More...
 
bool HasSHA
 Processor has SHA instructions. More...
 
bool HasPRFCHW
 Processor has PRFCHW instructions. More...
 
bool HasRDSEED
 Processor has RDSEED instructions. More...
 
bool IsBTMemSlow
 True if BT (bit test) of memory instructions are slow. More...
 
bool IsSHLDSlow
 True if SHLD instructions are slow. More...
 
bool IsUAMemFast
 True if unaligned memory access is fast. More...
 
bool IsUAMem32Slow
 True if unaligned 32-byte memory accesses are slow. More...
 
bool HasSSEUnalignedMem
 True if SSE operations can have unaligned memory operands. More...
 
bool HasCmpxchg16b
 True if this processor has the CMPXCHG16B instruction; this is true for most x86-64 chips, but not the first AMD chips. More...
 
bool UseLeaForSP
 True if the LEA instruction should be used for adjusting the stack pointer. More...
 
bool HasSlowDivide32
 True if 8-bit divisions are significantly faster than 32-bit divisions and should be used when possible. More...
 
bool HasSlowDivide64
 True if 16-bit divides are significantly faster than 64-bit divisions and should be used when possible. More...
 
bool PadShortFunctions
 True if the short functions should be padded to prevent a stall when returning too early. More...
 
bool CallRegIndirect
 True if the Calls with memory reference should be converted to a register-based indirect call. More...
 
bool LEAUsesAG
 True if the LEA instruction inputs have to be ready at address generation (AG) time. More...
 
bool SlowLEA
 True if the LEA instruction with certain arguments is slow. More...
 
bool SlowIncDec
 True if INC and DEC instructions are slow when writing to flags. More...
 
bool HasPFI
 Processor has AVX-512 PreFetch Instructions. More...
 
bool HasERI
 Processor has AVX-512 Exponential and Reciprocal Instructions. More...
 
bool HasCDI
 Processor has AVX-512 Conflict Detection Instructions. More...
 
bool HasDQI
 Processor has AVX-512 Doubleword and Quadword instructions. More...
 
bool HasBWI
 Processor has AVX-512 Byte and Word instructions. More...
 
bool HasVLX
 Processor has AVX-512 Vector Length eXtenstions. More...
 
bool HasMPX
 Processot supports MPX - Memory Protection Extensions. More...
 
bool UseSoftFloat
 Use software floating point for code generation. More...
 
unsigned stackAlignment
 The minimum alignment known to hold of the stack frame on entry to the function and which must be maintained by every function. More...
 
unsigned MaxInlineSizeThreshold
 Max. More...
 
Triple TargetTriple
 What processor and OS we're targeting. More...
 
InstrItineraryData InstrItins
 Instruction itineraries for scheduling. More...
 

Detailed Description

Definition at line 46 of file X86Subtarget.h.

Member Enumeration Documentation

Enumerator
NoThreeDNow 
ThreeDNow 
ThreeDNowA 

Definition at line 53 of file X86Subtarget.h.

Enumerator
Others 
IntelAtom 
IntelSLM 

Definition at line 57 of file X86Subtarget.h.

Enumerator
NoMMXSSE 
MMX 
SSE1 
SSE2 
SSE3 
SSSE3 
SSE41 
SSE42 
AVX 
AVX2 
AVX512F 

Definition at line 49 of file X86Subtarget.h.

Constructor & Destructor Documentation

X86Subtarget::X86Subtarget ( const Triple TT,
const std::string &  CPU,
const std::string &  FS,
const X86TargetMachine TM,
unsigned  StackAlignOverride 
)

Member Function Documentation

bool llvm::X86Subtarget::callRegIndirect ( ) const
inline

Definition at line 368 of file X86Subtarget.h.

References CallRegIndirect.

Referenced by llvm::X86InstrInfo::foldMemoryOperandImpl().

unsigned char X86Subtarget::ClassifyBlockAddressReference ( ) const

Classify a blockaddress reference for the current subtarget according to how we should reference it in a non-pcrel context.

ClassifyBlockAddressReference - Classify a blockaddress reference for the current subtarget according to how we should reference it in a non-pcrel context.

Definition at line 50 of file X86Subtarget.cpp.

References isPICStyleGOT(), isPICStyleStubPIC(), llvm::X86II::MO_GOTOFF, llvm::X86II::MO_NO_FLAG, and llvm::X86II::MO_PIC_BASE_OFFSET.

unsigned char X86Subtarget::ClassifyGlobalReference ( const GlobalValue GV,
const TargetMachine TM 
) const
bool X86Subtarget::enableEarlyIfConversion ( ) const
override

Definition at line 320 of file X86Subtarget.cpp.

References hasCMov(), and X86EarlyIfConv.

bool llvm::X86Subtarget::enableMachineScheduler ( ) const
inlineoverride

Enable the MachineScheduler pass for all X86 subtargets.

Definition at line 497 of file X86Subtarget.h.

AntiDepBreakMode llvm::X86Subtarget::getAntiDepBreakMode ( ) const
inlineoverride

Definition at line 506 of file X86Subtarget.h.

References llvm::TargetSubtargetInfo::ANTIDEP_CRITICAL.

const char * X86Subtarget::getBZeroEntry ( ) const

This function returns the name of a function which has an interface like the non-standard bzero function, if such a function exists on the current subtarget and it is considered prefereable over memset with zero passed as the second argument.

getBZeroEntry - This function returns the name of a function which has an interface like the non-standard bzero function, if such a function exists on the current subtarget and it is considered prefereable over memset with zero passed as the second argument.

Otherwise it returns null.

Definition at line 154 of file X86Subtarget.cpp.

References getTargetTriple().

const X86FrameLowering* llvm::X86Subtarget::getFrameLowering ( ) const
inlineoverride
const X86InstrInfo* llvm::X86Subtarget::getInstrInfo ( ) const
inlineoverride
const InstrItineraryData* llvm::X86Subtarget::getInstrItineraryData ( ) const
inlineoverride

Return the instruction itineraries based on the subtarget selection.

Definition at line 502 of file X86Subtarget.h.

References InstrItins.

unsigned llvm::X86Subtarget::getMaxInlineSizeThreshold ( ) const
inline

Returns the maximum memset / memcpy size that still makes it profitable to inline the call.

Definition at line 280 of file X86Subtarget.h.

References MaxInlineSizeThreshold.

PICStyles::Style llvm::X86Subtarget::getPICStyle ( ) const
inline

Definition at line 318 of file X86Subtarget.h.

References PICStyle.

const X86RegisterInfo* llvm::X86Subtarget::getRegisterInfo ( ) const
inlineoverride
const X86SelectionDAGInfo* llvm::X86Subtarget::getSelectionDAGInfo ( ) const
inlineoverride

Definition at line 266 of file X86Subtarget.h.

unsigned llvm::X86Subtarget::getStackAlignment ( ) const
inline

Returns the minimum alignment known to hold of the stack frame on entry to the function and which must be maintained by every function for this subtarget.

Definition at line 276 of file X86Subtarget.h.

References stackAlignment.

const X86TargetLowering* llvm::X86Subtarget::getTargetLowering ( ) const
inlineoverride

Definition at line 259 of file X86Subtarget.h.

Referenced by PerformSINT_TO_FPCombine().

const Triple& llvm::X86Subtarget::getTargetTriple ( ) const
inline

Definition at line 384 of file X86Subtarget.h.

References TargetTriple.

Referenced by computeBytesPoppedByCallee(), getBZeroEntry(), and hasSinCos().

bool llvm::X86Subtarget::has3DNow ( ) const
inline

Definition at line 335 of file X86Subtarget.h.

References ThreeDNow, and X863DNowLevel.

bool llvm::X86Subtarget::has3DNowA ( ) const
inline

Definition at line 336 of file X86Subtarget.h.

References ThreeDNowA, and X863DNowLevel.

bool llvm::X86Subtarget::hasADX ( ) const
inline

Definition at line 354 of file X86Subtarget.h.

References HasADX.

bool llvm::X86Subtarget::hasAES ( ) const
inline

Definition at line 338 of file X86Subtarget.h.

References HasAES.

bool llvm::X86Subtarget::hasAVX ( ) const
inline
bool llvm::X86Subtarget::hasAVX2 ( ) const
inline
bool llvm::X86Subtarget::hasAVX512 ( ) const
inline
bool llvm::X86Subtarget::hasBMI ( ) const
inline
bool llvm::X86Subtarget::hasBMI2 ( ) const
inline

Definition at line 351 of file X86Subtarget.h.

References HasBMI2.

bool llvm::X86Subtarget::hasBWI ( ) const
inline
bool llvm::X86Subtarget::hasCDI ( ) const
inline

Definition at line 372 of file X86Subtarget.h.

References HasCDI.

Referenced by llvm::X86TargetLowering::X86TargetLowering().

bool llvm::X86Subtarget::hasCMov ( ) const
inline
bool llvm::X86Subtarget::hasCmpxchg16b ( ) const
inline

Definition at line 363 of file X86Subtarget.h.

References HasCmpxchg16b.

Referenced by llvm::X86TargetLowering::X86TargetLowering().

bool llvm::X86Subtarget::hasDQI ( ) const
inline

Definition at line 375 of file X86Subtarget.h.

References HasDQI.

Referenced by LowerSIGN_EXTEND_AVX512(), and llvm::X86TargetLowering::X86TargetLowering().

bool llvm::X86Subtarget::hasERI ( ) const
inline

Definition at line 374 of file X86Subtarget.h.

References HasERI.

bool llvm::X86Subtarget::hasF16C ( ) const
inline

Definition at line 347 of file X86Subtarget.h.

References HasF16C.

Referenced by llvm::X86TargetLowering::X86TargetLowering().

bool llvm::X86Subtarget::hasFMA ( ) const
inline
bool llvm::X86Subtarget::hasFMA4 ( ) const
inline
bool llvm::X86Subtarget::hasFp256 ( ) const
inline
bool llvm::X86Subtarget::hasFSGSBase ( ) const
inline

Definition at line 348 of file X86Subtarget.h.

References HasFSGSBase.

bool llvm::X86Subtarget::hasHLE ( ) const
inline

Definition at line 353 of file X86Subtarget.h.

References HasHLE.

bool llvm::X86Subtarget::hasInt256 ( ) const
inline
bool llvm::X86Subtarget::hasLZCNT ( ) const
inline
bool llvm::X86Subtarget::hasMMX ( ) const
inline
bool llvm::X86Subtarget::hasMOVBE ( ) const
inline

Definition at line 345 of file X86Subtarget.h.

References HasMOVBE.

Referenced by llvm::X86TargetLowering::X86TargetLowering().

bool llvm::X86Subtarget::hasMPX ( ) const
inline

Definition at line 378 of file X86Subtarget.h.

References HasMPX.

bool llvm::X86Subtarget::hasPCLMUL ( ) const
inline

Definition at line 339 of file X86Subtarget.h.

References HasPCLMUL.

bool llvm::X86Subtarget::hasPFI ( ) const
inline

Definition at line 373 of file X86Subtarget.h.

References HasPFI.

bool llvm::X86Subtarget::hasPOPCNT ( ) const
inline
bool llvm::X86Subtarget::hasPRFCHW ( ) const
inline

Definition at line 356 of file X86Subtarget.h.

References HasPRFCHW.

bool llvm::X86Subtarget::hasRDRAND ( ) const
inline

Definition at line 346 of file X86Subtarget.h.

References HasRDRAND.

bool llvm::X86Subtarget::hasRDSEED ( ) const
inline

Definition at line 357 of file X86Subtarget.h.

References HasRDSEED.

bool llvm::X86Subtarget::hasRTM ( ) const
inline

Definition at line 352 of file X86Subtarget.h.

References HasRTM.

bool llvm::X86Subtarget::hasSHA ( ) const
inline

Definition at line 355 of file X86Subtarget.h.

References HasSHA.

bool X86Subtarget::hasSinCos ( ) const

This function returns true if the target has sincos() routine in its compiler runtime or math libraries.

Definition at line 163 of file X86Subtarget.cpp.

References getTargetTriple(), is64Bit(), llvm::Triple::isMacOSX(), and llvm::Triple::isMacOSXVersionLT().

Referenced by llvm::X86TargetLowering::X86TargetLowering().

bool llvm::X86Subtarget::hasSlowDivide32 ( ) const
inline

Definition at line 365 of file X86Subtarget.h.

References HasSlowDivide32.

Referenced by llvm::X86TargetLowering::X86TargetLowering().

bool llvm::X86Subtarget::hasSlowDivide64 ( ) const
inline

Definition at line 366 of file X86Subtarget.h.

References HasSlowDivide64.

Referenced by llvm::X86TargetLowering::X86TargetLowering().

bool llvm::X86Subtarget::hasSSE1 ( ) const
inline
bool llvm::X86Subtarget::hasSSE2 ( ) const
inline
bool llvm::X86Subtarget::hasSSE3 ( ) const
inline
bool llvm::X86Subtarget::hasSSE41 ( ) const
inline
bool llvm::X86Subtarget::hasSSE42 ( ) const
inline
bool llvm::X86Subtarget::hasSSE4A ( ) const
inline
bool llvm::X86Subtarget::hasSSEUnalignedMem ( ) const
inline

Definition at line 362 of file X86Subtarget.h.

References HasSSEUnalignedMem.

bool llvm::X86Subtarget::hasSSSE3 ( ) const
inline
bool llvm::X86Subtarget::hasTBM ( ) const
inline

Definition at line 344 of file X86Subtarget.h.

References HasTBM.

Referenced by PerformAndCombine().

bool llvm::X86Subtarget::hasVLX ( ) const
inline
bool llvm::X86Subtarget::hasXOP ( ) const
inline

Definition at line 343 of file X86Subtarget.h.

References HasXOP.

bool llvm::X86Subtarget::is16Bit ( ) const
inline

Definition at line 302 of file X86Subtarget.h.

bool llvm::X86Subtarget::is32Bit ( ) const
inline

Definition at line 298 of file X86Subtarget.h.

bool llvm::X86Subtarget::is64Bit ( ) const
inline

Is this x86_64? (disregarding specific ABI / programming model)

Definition at line 294 of file X86Subtarget.h.

Referenced by CMPEQCombine(), computeBytesPoppedByCallee(), llvm::X86InstrInfo::convertToThreeAddress(), llvm::X86InstrInfo::copyPhysReg(), EmitMonitor(), llvm::X86TargetLowering::findRepresentativeClass(), llvm::X86InstrInfo::foldMemoryOperandImpl(), get64BitArgumentGPRs(), get64BitArgumentXMMs(), llvm::X86TargetLowering::getByValTypeAlignment(), llvm::X86InstrInfo::getGlobalBaseReg(), getLoadStoreRegOpcode(), llvm::X86TTIImpl::getNumberOfRegisters(), llvm::X86TargetLowering::getOptimalMemOpType(), llvm::X86TargetLowering::getPICJumpTableRelocBase(), getReadPerformanceCounter(), getReadTimeStampCounter(), llvm::X86TargetLowering::getRegForInlineAsmConstraint(), llvm::X86TTIImpl::getRegisterBitWidth(), getRetOpcode(), llvm::X86TargetLowering::getStackCookieLocation(), hasMFENCE(), hasSinCos(), llvm::X86InstrInfo::isCoalescableExtInstr(), llvm::X86TargetLowering::isLegalAddressingMode(), llvm::X86TargetLowering::isTargetFTOL(), isTargetNaCl32(), isTargetNaCl64(), llvm::X86TargetLowering::isZExtFree(), llvm::X86TargetLowering::LowerAsmOperandForConstraint(), LowerBITCAST(), LowerCMP_SWAP(), LowerFSINCOS(), LowerScalarImmediateShift(), LowerScalarVariableShift(), LowerVACOPY(), PerformSINT_TO_FPCombine(), PerformSTORECombine(), printAsmMRegister(), llvm::X86FrameLowering::restoreCalleeSavedRegisters(), llvm::X86InstrInfo::shouldScheduleLoadsNear(), SimplifyShortMoveForm(), llvm::X86FrameLowering::spillCalleeSavedRegisters(), llvm::X86TargetLowering::useLoadStackGuardNode(), llvm::X86FrameLowering::X86FrameLowering(), X86Subtarget(), and llvm::X86TargetLowering::X86TargetLowering().

bool llvm::X86Subtarget::isAtom ( ) const
inline
bool llvm::X86Subtarget::isBTMemSlow ( ) const
inline

Definition at line 358 of file X86Subtarget.h.

References IsBTMemSlow.

bool llvm::X86Subtarget::isCallingConvWin64 ( CallingConv::ID  CC) const
inline
bool X86Subtarget::IsLegalToCallImmediateAddr ( const TargetMachine TM) const

Return true if the subtarget allows calls to immediate address.

IsLegalToCallImmediateAddr - Return true if the subtarget allows calls to immediate address.

Definition at line 171 of file X86Subtarget.cpp.

References llvm::TargetMachine::getRelocationModel(), isTargetELF(), isTargetWin32(), and llvm::Reloc::Static.

bool llvm::X86Subtarget::isOSWindows ( ) const
inline

Definition at line 423 of file X86Subtarget.h.

References llvm::Triple::isOSWindows(), and TargetTriple.

Referenced by llvm::X86FrameLowering::emitPrologue().

bool llvm::X86Subtarget::isPICStyleGOT ( ) const
inline
bool llvm::X86Subtarget::isPICStyleRIPRel ( ) const
inline
bool llvm::X86Subtarget::isPICStyleSet ( ) const
inline

Definition at line 433 of file X86Subtarget.h.

References llvm::PICStyles::None, and PICStyle.

bool llvm::X86Subtarget::isPICStyleStubAny ( ) const
inline
bool llvm::X86Subtarget::isPICStyleStubNoDynamic ( ) const
inline

Definition at line 441 of file X86Subtarget.h.

References PICStyle, and llvm::PICStyles::StubDynamicNoPIC.

Referenced by ClassifyGlobalReference().

bool llvm::X86Subtarget::isPICStyleStubPIC ( ) const
inline
bool llvm::X86Subtarget::isSHLDSlow ( ) const
inline

Definition at line 359 of file X86Subtarget.h.

References IsSHLDSlow.

Referenced by PerformOrCombine().

bool llvm::X86Subtarget::isSLM ( ) const
inline

Definition at line 381 of file X86Subtarget.h.

References IntelSLM, and X86ProcFamily.

bool llvm::X86Subtarget::isTarget64BitILP32 ( ) const
inline
bool llvm::X86Subtarget::isTarget64BitLP64 ( ) const
inline

Is this x86_64 with the LP64 programming model (standard AMD64, no x32)?

Definition at line 313 of file X86Subtarget.h.

References llvm::Triple::getEnvironment(), llvm::Triple::GNUX32, llvm::Triple::isOSNaCl(), and TargetTriple.

Referenced by llvm::X86RegisterInfo::getPointerRegClass(), and llvm::X86FrameLowering::X86FrameLowering().

bool llvm::X86Subtarget::isTargetCOFF ( ) const
inline
bool llvm::X86Subtarget::isTargetCygMing ( ) const
inline
bool llvm::X86Subtarget::isTargetDarwin ( ) const
inline
bool llvm::X86Subtarget::isTargetDragonFly ( ) const
inline
bool llvm::X86Subtarget::isTargetELF ( ) const
inline
bool llvm::X86Subtarget::isTargetFreeBSD ( ) const
inline
bool llvm::X86Subtarget::isTargetKnownWindowsMSVC ( ) const
inline
bool llvm::X86Subtarget::isTargetLinux ( ) const
inline
bool llvm::X86Subtarget::isTargetMachO ( ) const
inline
bool llvm::X86Subtarget::isTargetNaCl ( ) const
inline

Definition at line 397 of file X86Subtarget.h.

References llvm::Triple::isOSNaCl(), and TargetTriple.

Referenced by isTargetNaCl32(), and isTargetNaCl64().

bool llvm::X86Subtarget::isTargetNaCl32 ( ) const
inline

Definition at line 398 of file X86Subtarget.h.

References is64Bit(), and isTargetNaCl().

bool llvm::X86Subtarget::isTargetNaCl64 ( ) const
inline

Definition at line 399 of file X86Subtarget.h.

References is64Bit(), and isTargetNaCl().

Referenced by llvm::X86FrameLowering::X86FrameLowering().

bool llvm::X86Subtarget::isTargetPS4 ( ) const
inline

Definition at line 390 of file X86Subtarget.h.

References llvm::Triple::isPS4(), and TargetTriple.

bool llvm::X86Subtarget::isTargetSolaris ( ) const
inline

Definition at line 389 of file X86Subtarget.h.

References llvm::Triple::isOSSolaris(), and TargetTriple.

bool llvm::X86Subtarget::isTargetWin32 ( ) const
inline
bool llvm::X86Subtarget::isTargetWin64 ( ) const
inline
bool llvm::X86Subtarget::isTargetWindowsCygwin ( ) const
inline

Definition at line 409 of file X86Subtarget.h.

References llvm::Triple::isWindowsCygwinEnvironment(), and TargetTriple.

bool llvm::X86Subtarget::isTargetWindowsGNU ( ) const
inline
bool llvm::X86Subtarget::isTargetWindowsItanium ( ) const
inline

Definition at line 417 of file X86Subtarget.h.

References llvm::Triple::isWindowsItaniumEnvironment(), and TargetTriple.

bool llvm::X86Subtarget::isTargetWindowsMSVC ( ) const
inline

Definition at line 401 of file X86Subtarget.h.

References llvm::Triple::isWindowsMSVCEnvironment(), and TargetTriple.

bool llvm::X86Subtarget::isUnalignedMem32Slow ( ) const
inline

Definition at line 361 of file X86Subtarget.h.

References IsUAMem32Slow.

Referenced by LowerINSERT_SUBVECTOR(), PerformLOADCombine(), and PerformSTORECombine().

bool llvm::X86Subtarget::isUnalignedMemAccessFast ( ) const
inline
bool llvm::X86Subtarget::LEAusesAG ( ) const
inline

Definition at line 369 of file X86Subtarget.h.

References LEAUsesAG.

bool llvm::X86Subtarget::padShortFunctions ( ) const
inline

Definition at line 367 of file X86Subtarget.h.

References PadShortFunctions.

void llvm::X86Subtarget::ParseSubtargetFeatures ( StringRef  CPU,
StringRef  FS 
)

ParseSubtargetFeatures - Parses features string setting specified subtarget options.

Definition of function is auto generated by tblgen.

void llvm::X86Subtarget::setPICStyle ( PICStyles::Style  Style)
inline

Definition at line 319 of file X86Subtarget.h.

References PICStyle.

Referenced by X86Subtarget().

bool llvm::X86Subtarget::slowIncDec ( ) const
inline

Definition at line 371 of file X86Subtarget.h.

References SlowIncDec.

Referenced by getAtomicLoadArithTargetConstant().

bool llvm::X86Subtarget::slowLEA ( ) const
inline

Definition at line 370 of file X86Subtarget.h.

References SlowLEA.

bool llvm::X86Subtarget::useLeaForSP ( ) const
inline

Definition at line 364 of file X86Subtarget.h.

References UseLeaForSP.

bool llvm::X86Subtarget::useSoftFloat ( ) const
inline

Member Data Documentation

bool llvm::X86Subtarget::CallRegIndirect
protected

True if the Calls with memory reference should be converted to a register-based indirect call.

Definition at line 181 of file X86Subtarget.h.

Referenced by callRegIndirect().

bool llvm::X86Subtarget::HasADX
protected

Processor has ADX instructions.

Definition at line 132 of file X86Subtarget.h.

Referenced by hasADX().

bool llvm::X86Subtarget::HasAES
protected

Target has AES instructions.

Definition at line 87 of file X86Subtarget.h.

Referenced by hasAES().

bool llvm::X86Subtarget::HasBMI
protected

Processor has BMI1 instructions.

Definition at line 120 of file X86Subtarget.h.

Referenced by hasBMI().

bool llvm::X86Subtarget::HasBMI2
protected

Processor has BMI2 instructions.

Definition at line 123 of file X86Subtarget.h.

Referenced by hasBMI2().

bool llvm::X86Subtarget::HasBWI
protected

Processor has AVX-512 Byte and Word instructions.

Definition at line 206 of file X86Subtarget.h.

Referenced by hasBWI().

bool llvm::X86Subtarget::HasCDI
protected

Processor has AVX-512 Conflict Detection Instructions.

Definition at line 200 of file X86Subtarget.h.

Referenced by hasCDI().

bool llvm::X86Subtarget::HasCMov
protected

True if this processor has conditional move instructions (generally pentium pro+).

Definition at line 75 of file X86Subtarget.h.

Referenced by hasCMov().

bool llvm::X86Subtarget::HasCmpxchg16b
protected

True if this processor has the CMPXCHG16B instruction; this is true for most x86-64 chips, but not the first AMD chips.

Definition at line 161 of file X86Subtarget.h.

Referenced by hasCmpxchg16b().

bool llvm::X86Subtarget::HasDQI
protected

Processor has AVX-512 Doubleword and Quadword instructions.

Definition at line 203 of file X86Subtarget.h.

Referenced by hasDQI().

bool llvm::X86Subtarget::HasERI
protected

Processor has AVX-512 Exponential and Reciprocal Instructions.

Definition at line 197 of file X86Subtarget.h.

Referenced by hasERI().

bool llvm::X86Subtarget::HasF16C
protected

Processor has 16-bit floating point conversion instructions.

Definition at line 111 of file X86Subtarget.h.

Referenced by hasF16C().

bool llvm::X86Subtarget::HasFMA
protected

Target has 3-operand fused multiply-add.

Definition at line 93 of file X86Subtarget.h.

Referenced by hasFMA(), and hasFMA4().

bool llvm::X86Subtarget::HasFMA4
protected

Target has 4-operand fused multiply-add.

Definition at line 96 of file X86Subtarget.h.

Referenced by hasFMA4().

bool llvm::X86Subtarget::HasFSGSBase
protected

Processor has FS/GS base insturctions.

Definition at line 114 of file X86Subtarget.h.

Referenced by hasFSGSBase().

bool llvm::X86Subtarget::HasHLE
protected

Processor has HLE.

Definition at line 129 of file X86Subtarget.h.

Referenced by hasHLE().

bool llvm::X86Subtarget::HasLZCNT
protected

Processor has LZCNT instruction.

Definition at line 117 of file X86Subtarget.h.

Referenced by hasLZCNT().

bool llvm::X86Subtarget::HasMOVBE
protected

True if the processor has the MOVBE instruction.

Definition at line 105 of file X86Subtarget.h.

Referenced by hasMOVBE().

bool llvm::X86Subtarget::HasMPX
protected

Processot supports MPX - Memory Protection Extensions.

Definition at line 212 of file X86Subtarget.h.

Referenced by hasMPX().

bool llvm::X86Subtarget::HasPCLMUL
protected

Target has carry-less multiplication.

Definition at line 90 of file X86Subtarget.h.

Referenced by hasPCLMUL().

bool llvm::X86Subtarget::HasPFI
protected

Processor has AVX-512 PreFetch Instructions.

Definition at line 194 of file X86Subtarget.h.

Referenced by hasPFI().

bool llvm::X86Subtarget::HasPOPCNT
protected

True if the processor supports POPCNT.

Definition at line 81 of file X86Subtarget.h.

Referenced by hasPOPCNT().

bool llvm::X86Subtarget::HasPRFCHW
protected

Processor has PRFCHW instructions.

Definition at line 138 of file X86Subtarget.h.

Referenced by hasPRFCHW().

bool llvm::X86Subtarget::HasRDRAND
protected

True if the processor has the RDRAND instruction.

Definition at line 108 of file X86Subtarget.h.

Referenced by hasRDRAND().

bool llvm::X86Subtarget::HasRDSEED
protected

Processor has RDSEED instructions.

Definition at line 141 of file X86Subtarget.h.

Referenced by hasRDSEED().

bool llvm::X86Subtarget::HasRTM
protected

Processor has RTM instructions.

Definition at line 126 of file X86Subtarget.h.

Referenced by hasRTM().

bool llvm::X86Subtarget::HasSHA
protected

Processor has SHA instructions.

Definition at line 135 of file X86Subtarget.h.

Referenced by hasSHA().

bool llvm::X86Subtarget::HasSlowDivide32
protected

True if 8-bit divisions are significantly faster than 32-bit divisions and should be used when possible.

Definition at line 169 of file X86Subtarget.h.

Referenced by hasSlowDivide32().

bool llvm::X86Subtarget::HasSlowDivide64
protected

True if 16-bit divides are significantly faster than 64-bit divisions and should be used when possible.

Definition at line 173 of file X86Subtarget.h.

Referenced by hasSlowDivide64().

bool llvm::X86Subtarget::HasSSE4A
protected

True if the processor supports SSE4A instructions.

Definition at line 84 of file X86Subtarget.h.

Referenced by hasSSE4A().

bool llvm::X86Subtarget::HasSSEUnalignedMem
protected

True if SSE operations can have unaligned memory operands.

This may require setting a configuration bit in the processor.

Definition at line 157 of file X86Subtarget.h.

Referenced by hasSSEUnalignedMem().

bool llvm::X86Subtarget::HasTBM
protected

Target has TBM instructions.

Definition at line 102 of file X86Subtarget.h.

Referenced by hasTBM().

bool llvm::X86Subtarget::HasVLX
protected

Processor has AVX-512 Vector Length eXtenstions.

Definition at line 209 of file X86Subtarget.h.

Referenced by hasVLX().

bool llvm::X86Subtarget::HasX86_64
protected

True if the processor supports X86-64 instructions.

Definition at line 78 of file X86Subtarget.h.

bool llvm::X86Subtarget::HasXOP
protected

Target has XOP instructions.

Definition at line 99 of file X86Subtarget.h.

Referenced by hasXOP().

InstrItineraryData llvm::X86Subtarget::InstrItins
protected

Instruction itineraries for scheduling.

Definition at line 229 of file X86Subtarget.h.

Referenced by getInstrItineraryData().

bool llvm::X86Subtarget::IsBTMemSlow
protected

True if BT (bit test) of memory instructions are slow.

Definition at line 144 of file X86Subtarget.h.

Referenced by isBTMemSlow().

bool llvm::X86Subtarget::IsSHLDSlow
protected

True if SHLD instructions are slow.

Definition at line 147 of file X86Subtarget.h.

Referenced by isSHLDSlow().

bool llvm::X86Subtarget::IsUAMem32Slow
protected

True if unaligned 32-byte memory accesses are slow.

Definition at line 153 of file X86Subtarget.h.

Referenced by isUnalignedMem32Slow().

bool llvm::X86Subtarget::IsUAMemFast
protected

True if unaligned memory access is fast.

Definition at line 150 of file X86Subtarget.h.

Referenced by isUnalignedMemAccessFast().

bool llvm::X86Subtarget::LEAUsesAG
protected

True if the LEA instruction inputs have to be ready at address generation (AG) time.

Definition at line 185 of file X86Subtarget.h.

Referenced by LEAusesAG().

unsigned llvm::X86Subtarget::MaxInlineSizeThreshold
protected

Max.

memset / memcpy size that is turned into rep/movs, rep/stos ops.

Definition at line 223 of file X86Subtarget.h.

Referenced by getMaxInlineSizeThreshold().

bool llvm::X86Subtarget::PadShortFunctions
protected

True if the short functions should be padded to prevent a stall when returning too early.

Definition at line 177 of file X86Subtarget.h.

Referenced by padShortFunctions().

PICStyles::Style llvm::X86Subtarget::PICStyle
protected
bool llvm::X86Subtarget::SlowIncDec
protected

True if INC and DEC instructions are slow when writing to flags.

Definition at line 191 of file X86Subtarget.h.

Referenced by slowIncDec().

bool llvm::X86Subtarget::SlowLEA
protected

True if the LEA instruction with certain arguments is slow.

Definition at line 188 of file X86Subtarget.h.

Referenced by slowLEA().

unsigned llvm::X86Subtarget::stackAlignment
protected

The minimum alignment known to hold of the stack frame on entry to the function and which must be maintained by every function.

Definition at line 219 of file X86Subtarget.h.

Referenced by getStackAlignment().

Triple llvm::X86Subtarget::TargetTriple
protected
bool llvm::X86Subtarget::UseLeaForSP
protected

True if the LEA instruction should be used for adjusting the stack pointer.

This is an optimization for Intel Atom processors.

Definition at line 165 of file X86Subtarget.h.

Referenced by useLeaForSP().

bool llvm::X86Subtarget::UseSoftFloat
protected

Use software floating point for code generation.

Definition at line 215 of file X86Subtarget.h.

Referenced by useSoftFloat().

X863DNowEnum llvm::X86Subtarget::X863DNowLevel
protected

3DNow, 3DNow Athlon, or none supported.

Definition at line 71 of file X86Subtarget.h.

Referenced by has3DNow(), and has3DNowA().

X86ProcFamilyEnum llvm::X86Subtarget::X86ProcFamily
protected

X86 processor family: Intel Atom, and others.

Definition at line 62 of file X86Subtarget.h.

Referenced by isAtom(), and isSLM().

X86SSEEnum llvm::X86Subtarget::X86SSELevel
protected

MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, or none supported.

Definition at line 68 of file X86Subtarget.h.

Referenced by hasAVX(), hasAVX2(), hasAVX512(), hasMMX(), hasSSE1(), hasSSE2(), hasSSE3(), hasSSE41(), hasSSE42(), and hasSSSE3().


The documentation for this class was generated from the following files: