LLVM  3.7.0
SparcFrameLowering.cpp
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1 //===-- SparcFrameLowering.cpp - Sparc Frame Information ------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains the Sparc implementation of TargetFrameLowering class.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "SparcFrameLowering.h"
15 #include "SparcInstrInfo.h"
17 #include "SparcSubtarget.h"
23 #include "llvm/IR/DataLayout.h"
24 #include "llvm/IR/Function.h"
27 
28 using namespace llvm;
29 
30 static cl::opt<bool>
31 DisableLeafProc("disable-sparc-leaf-proc",
32  cl::init(false),
33  cl::desc("Disable Sparc leaf procedure optimization."),
34  cl::Hidden);
35 
37  : TargetFrameLowering(TargetFrameLowering::StackGrowsDown,
38  ST.is64Bit() ? 16 : 8, 0, ST.is64Bit() ? 16 : 8) {}
39 
40 void SparcFrameLowering::emitSPAdjustment(MachineFunction &MF,
41  MachineBasicBlock &MBB,
43  int NumBytes,
44  unsigned ADDrr,
45  unsigned ADDri) const {
46 
47  DebugLoc dl = (MBBI != MBB.end()) ? MBBI->getDebugLoc() : DebugLoc();
48  const SparcInstrInfo &TII =
49  *static_cast<const SparcInstrInfo *>(MF.getSubtarget().getInstrInfo());
50 
51  if (NumBytes >= -4096 && NumBytes < 4096) {
52  BuildMI(MBB, MBBI, dl, TII.get(ADDri), SP::O6)
53  .addReg(SP::O6).addImm(NumBytes);
54  return;
55  }
56 
57  // Emit this the hard way. This clobbers G1 which we always know is
58  // available here.
59  if (NumBytes >= 0) {
60  // Emit nonnegative numbers with sethi + or.
61  // sethi %hi(NumBytes), %g1
62  // or %g1, %lo(NumBytes), %g1
63  // add %sp, %g1, %sp
64  BuildMI(MBB, MBBI, dl, TII.get(SP::SETHIi), SP::G1)
65  .addImm(HI22(NumBytes));
66  BuildMI(MBB, MBBI, dl, TII.get(SP::ORri), SP::G1)
67  .addReg(SP::G1).addImm(LO10(NumBytes));
68  BuildMI(MBB, MBBI, dl, TII.get(ADDrr), SP::O6)
69  .addReg(SP::O6).addReg(SP::G1);
70  return ;
71  }
72 
73  // Emit negative numbers with sethi + xor.
74  // sethi %hix(NumBytes), %g1
75  // xor %g1, %lox(NumBytes), %g1
76  // add %sp, %g1, %sp
77  BuildMI(MBB, MBBI, dl, TII.get(SP::SETHIi), SP::G1)
78  .addImm(HIX22(NumBytes));
79  BuildMI(MBB, MBBI, dl, TII.get(SP::XORri), SP::G1)
80  .addReg(SP::G1).addImm(LOX10(NumBytes));
81  BuildMI(MBB, MBBI, dl, TII.get(ADDrr), SP::O6)
82  .addReg(SP::O6).addReg(SP::G1);
83 }
84 
86  MachineBasicBlock &MBB) const {
88 
89  assert(&MF.front() == &MBB && "Shrink-wrapping not yet supported");
90  MachineFrameInfo *MFI = MF.getFrameInfo();
91  const SparcInstrInfo &TII =
92  *static_cast<const SparcInstrInfo *>(MF.getSubtarget().getInstrInfo());
94  DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
95 
96  // Get the number of bytes to allocate from the FrameInfo
97  int NumBytes = (int) MFI->getStackSize();
98 
99  unsigned SAVEri = SP::SAVEri;
100  unsigned SAVErr = SP::SAVErr;
101  if (FuncInfo->isLeafProc()) {
102  if (NumBytes == 0)
103  return;
104  SAVEri = SP::ADDri;
105  SAVErr = SP::ADDrr;
106  }
107  NumBytes = -MF.getSubtarget<SparcSubtarget>().getAdjustedFrameSize(NumBytes);
108  emitSPAdjustment(MF, MBB, MBBI, NumBytes, SAVErr, SAVEri);
109 
110  MachineModuleInfo &MMI = MF.getMMI();
111  const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
112  unsigned regFP = MRI->getDwarfRegNum(SP::I6, true);
113 
114  // Emit ".cfi_def_cfa_register 30".
115  unsigned CFIIndex =
117  BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
118  .addCFIIndex(CFIIndex);
119 
120  // Emit ".cfi_window_save".
121  CFIIndex = MMI.addFrameInst(MCCFIInstruction::createWindowSave(nullptr));
122  BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
123  .addCFIIndex(CFIIndex);
124 
125  unsigned regInRA = MRI->getDwarfRegNum(SP::I7, true);
126  unsigned regOutRA = MRI->getDwarfRegNum(SP::O7, true);
127  // Emit ".cfi_register 15, 31".
128  CFIIndex = MMI.addFrameInst(
129  MCCFIInstruction::createRegister(nullptr, regOutRA, regInRA));
130  BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
131  .addCFIIndex(CFIIndex);
132 }
133 
137  if (!hasReservedCallFrame(MF)) {
138  MachineInstr &MI = *I;
139  int Size = MI.getOperand(0).getImm();
140  if (MI.getOpcode() == SP::ADJCALLSTACKDOWN)
141  Size = -Size;
142 
143  if (Size)
144  emitSPAdjustment(MF, MBB, I, Size, SP::ADDrr, SP::ADDri);
145  }
146  MBB.erase(I);
147 }
148 
149 
151  MachineBasicBlock &MBB) const {
154  const SparcInstrInfo &TII =
155  *static_cast<const SparcInstrInfo *>(MF.getSubtarget().getInstrInfo());
156  DebugLoc dl = MBBI->getDebugLoc();
157  assert(MBBI->getOpcode() == SP::RETL &&
158  "Can only put epilog before 'retl' instruction!");
159  if (!FuncInfo->isLeafProc()) {
160  BuildMI(MBB, MBBI, dl, TII.get(SP::RESTORErr), SP::G0).addReg(SP::G0)
161  .addReg(SP::G0);
162  return;
163  }
164  MachineFrameInfo *MFI = MF.getFrameInfo();
165 
166  int NumBytes = (int) MFI->getStackSize();
167  if (NumBytes == 0)
168  return;
169 
170  NumBytes = MF.getSubtarget<SparcSubtarget>().getAdjustedFrameSize(NumBytes);
171  emitSPAdjustment(MF, MBB, MBBI, NumBytes, SP::ADDrr, SP::ADDri);
172 }
173 
175  // Reserve call frame if there are no variable sized objects on the stack.
176  return !MF.getFrameInfo()->hasVarSizedObjects();
177 }
178 
179 // hasFP - Return true if the specified function should have a dedicated frame
180 // pointer register. This is true if the function has variable sized allocas or
181 // if frame pointer elimination is disabled.
183  const MachineFrameInfo *MFI = MF.getFrameInfo();
184  return MF.getTarget().Options.DisableFramePointerElim(MF) ||
185  MFI->hasVarSizedObjects() || MFI->isFrameAddressTaken();
186 }
187 
188 
190 {
191 
192  for (unsigned reg = SP::I0; reg <= SP::I7; ++reg)
193  if (MRI->isPhysRegUsed(reg))
194  return false;
195 
196  for (unsigned reg = SP::L0; reg <= SP::L7; ++reg)
197  if (MRI->isPhysRegUsed(reg))
198  return false;
199 
200  return true;
201 }
202 
203 bool SparcFrameLowering::isLeafProc(MachineFunction &MF) const
204 {
205 
206  MachineRegisterInfo &MRI = MF.getRegInfo();
207  MachineFrameInfo *MFI = MF.getFrameInfo();
208 
209  return !(MFI->hasCalls() // has calls
210  || MRI.isPhysRegUsed(SP::L0) // Too many registers needed
211  || MRI.isPhysRegUsed(SP::O6) // %SP is used
212  || hasFP(MF)); // need %FP
213 }
214 
215 void SparcFrameLowering::remapRegsForLeafProc(MachineFunction &MF) const {
216 
217  MachineRegisterInfo &MRI = MF.getRegInfo();
218 
219  // Remap %i[0-7] to %o[0-7].
220  for (unsigned reg = SP::I0; reg <= SP::I7; ++reg) {
221  if (!MRI.isPhysRegUsed(reg))
222  continue;
223  unsigned mapped_reg = (reg - SP::I0 + SP::O0);
224  assert(!MRI.isPhysRegUsed(mapped_reg));
225 
226  // Replace I register with O register.
227  MRI.replaceRegWith(reg, mapped_reg);
228 
229  // Mark the reg unused.
230  MRI.setPhysRegUnused(reg);
231  }
232 
233  // Rewrite MBB's Live-ins.
234  for (MachineFunction::iterator MBB = MF.begin(), E = MF.end();
235  MBB != E; ++MBB) {
236  for (unsigned reg = SP::I0; reg <= SP::I7; ++reg) {
237  if (!MBB->isLiveIn(reg))
238  continue;
239  MBB->removeLiveIn(reg);
240  MBB->addLiveIn(reg - SP::I0 + SP::O0);
241  }
242  }
243 
244  assert(verifyLeafProcRegUse(&MRI));
245 #ifdef XDEBUG
246  MF.verify(0, "After LeafProc Remapping");
247 #endif
248 }
249 
251  BitVector &SavedRegs,
252  RegScavenger *RS) const {
254  if (!DisableLeafProc && isLeafProc(MF)) {
256  MFI->setLeafProc(true);
257 
258  remapRegsForLeafProc(MF);
259  }
260 
261 }
int getDwarfRegNum(unsigned RegNum, bool isEH) const
Map a target register to an equivalent dwarf register number.
bool hasFP(const MachineFunction &MF) const override
hasFP - Return true if the specified function should have a dedicated frame pointer register...
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override
void removeLiveIn(unsigned Reg)
removeLiveIn - Remove the specified register from the live in set.
void verify(Pass *p=nullptr, const char *Banner=nullptr) const
verify - Run the current MachineFunction through the machine code verifier, useful for debugger use...
void addLiveIn(unsigned Reg)
Adds the specified register as a live in.
A debug info location.
Definition: DebugLoc.h:34
static unsigned LO10(int64_t imm)
Definition: Sparc.h:121
void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const override
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects...
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
const HexagonInstrInfo * TII
bool DisableFramePointerElim(const MachineFunction &MF) const
DisableFramePointerElim - This returns true if frame pointer elimination optimization should be disab...
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted...
bool isFrameAddressTaken() const
This method may be called any time after instruction selection is complete to determine if there is a...
const MachineInstrBuilder & addImm(int64_t Val) const
addImm - Add a new immediate operand.
const MachineBasicBlock & front() const
static unsigned HIX22(int64_t imm)
Definition: Sparc.h:125
static unsigned HI22(int64_t imm)
Definition: Sparc.h:117
unsigned LLVM_ATTRIBUTE_UNUSED_RESULT addFrameInst(const MCCFIInstruction &Inst)
iterator getLastNonDebugInstr()
getLastNonDebugInstr - returns an iterator to the last non-debug instruction in the basic block...
int64_t getImm() const
void eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const override
eliminateCallFramePseudoInstr - This method is called during prolog/epilog code insertion to eliminat...
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
Definition: MachineInstr.h:267
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
bundle_iterator< MachineInstr, instr_iterator > iterator
initializer< Ty > init(const Ty &Val)
Definition: CommandLine.h:325
static unsigned LOX10(int64_t imm)
Definition: Sparc.h:129
static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register)
.cfi_def_cfa_register modifies a rule for computing CFA.
Definition: MCDwarf.h:361
static MCCFIInstruction createWindowSave(MCSymbol *L)
.cfi_window_save SPARC register window is saved.
Definition: MCDwarf.h:402
static bool is64Bit(const char *name)
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:273
static cl::opt< bool > DisableLeafProc("disable-sparc-leaf-proc", cl::init(false), cl::desc("Disable Sparc leaf procedure optimization."), cl::Hidden)
#define LLVM_ATTRIBUTE_UNUSED
Definition: Compiler.h:142
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
MachineInstrBuilder BuildMI(MachineFunction &MF, DebugLoc DL, const MCInstrDesc &MCID)
BuildMI - Builder interface.
virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
bool hasCalls() const
Return true if the current function has any function calls.
bool hasReservedCallFrame(const MachineFunction &MF) const override
hasReservedCallFrame - Under normal circumstances, when a frame pointer is not required, we reserve argument space for call sites in the function immediately on entry to the current function.
static bool LLVM_ATTRIBUTE_UNUSED verifyLeafProcRegUse(MachineRegisterInfo *MRI)
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override
emitProlog/emitEpilog - These methods insert prolog and epilog code into the function.
const MCContext & getContext() const
void setPhysRegUnused(unsigned Reg)
setPhysRegUnused - Mark the specified register unused in this function.
Information about stack frame layout on the target.
MachineFrameInfo * getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
void replaceRegWith(unsigned FromReg, unsigned ToReg)
replaceRegWith - Replace all instances of FromReg with ToReg in the machine function.
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
const MCRegisterInfo * getRegisterInfo() const
Definition: MCContext.h:227
Representation of each machine instruction.
Definition: MachineInstr.h:51
SparcFrameLowering(const SparcSubtarget &ST)
bool isLiveIn(unsigned Reg) const
isLiveIn - Return true if the specified register is in the live in set.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
#define I(x, y, z)
Definition: MD5.cpp:54
const TargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
bool hasVarSizedObjects() const
This method may be called any time after instruction selection is complete to determine if the stack ...
virtual const TargetInstrInfo * getInstrInfo() const
bool isPhysRegUsed(unsigned Reg) const
isPhysRegUsed - Return true if the specified register is used in this function.
BasicBlockListType::iterator iterator
MachineModuleInfo & getMMI() const
const MachineInstrBuilder & addReg(unsigned RegNo, unsigned flags=0, unsigned SubReg=0) const
addReg - Add a new virtual register operand...
static MCCFIInstruction createRegister(MCSymbol *L, unsigned Register1, unsigned Register2)
.cfi_register Previous value of Register1 is saved in register Register2.
Definition: MCDwarf.h:396
MachineModuleInfo - This class contains meta information specific to a module.