35 case X86::VPMOVZXBWrm:
36 case X86::VPMOVZXBWrr:
40 case X86::VPMOVZXBWYrm:
41 case X86::VPMOVZXBWYrr:
47 case X86::VPMOVZXBDrm:
48 case X86::VPMOVZXBDrr:
52 case X86::VPMOVZXBDYrm:
53 case X86::VPMOVZXBDYrr:
59 case X86::VPMOVZXBQrm:
60 case X86::VPMOVZXBQrr:
64 case X86::VPMOVZXBQYrm:
65 case X86::VPMOVZXBQYrr:
72 case X86::VPMOVZXWDrm:
73 case X86::VPMOVZXWDrr:
77 case X86::VPMOVZXWDYrm:
78 case X86::VPMOVZXWDYrr:
84 case X86::VPMOVZXWQrm:
85 case X86::VPMOVZXWQrr:
89 case X86::VPMOVZXWQYrm:
90 case X86::VPMOVZXWQYrr:
97 case X86::VPMOVZXDQrm:
98 case X86::VPMOVZXDQrr:
102 case X86::VPMOVZXDQYrm:
103 case X86::VPMOVZXDQYrr:
118 const char *(*getRegName)(
unsigned)) {
121 const char *DestName =
nullptr, *Src1Name =
nullptr, *Src2Name =
nullptr;
128 case X86::BLENDPDrri:
129 case X86::VBLENDPDrri:
132 case X86::BLENDPDrmi:
133 case X86::VBLENDPDrmi:
141 case X86::VBLENDPDYrri:
144 case X86::VBLENDPDYrmi:
153 case X86::BLENDPSrri:
154 case X86::VBLENDPSrri:
157 case X86::BLENDPSrmi:
158 case X86::VBLENDPSrmi:
166 case X86::VBLENDPSYrri:
169 case X86::VBLENDPSYrmi:
178 case X86::PBLENDWrri:
179 case X86::VPBLENDWrri:
182 case X86::PBLENDWrmi:
183 case X86::VPBLENDWrmi:
191 case X86::VPBLENDWYrri:
194 case X86::VPBLENDWYrmi:
203 case X86::VPBLENDDrri:
206 case X86::VPBLENDDrmi:
215 case X86::VPBLENDDYrri:
218 case X86::VPBLENDDYrmi:
227 case X86::INSERTPSrr:
228 case X86::VINSERTPSrr:
231 case X86::INSERTPSrm:
232 case X86::VINSERTPSrm:
241 case X86::VMOVLHPSrr:
249 case X86::VMOVHLPSrr:
256 case X86::MOVSLDUPrr:
257 case X86::VMOVSLDUPrr:
260 case X86::MOVSLDUPrm:
261 case X86::VMOVSLDUPrm:
266 case X86::VMOVSHDUPYrr:
269 case X86::VMOVSHDUPYrm:
274 case X86::VMOVSLDUPYrr:
277 case X86::VMOVSLDUPYrm:
282 case X86::MOVSHDUPrr:
283 case X86::VMOVSHDUPrr:
286 case X86::MOVSHDUPrm:
287 case X86::VMOVSHDUPrm:
292 case X86::VMOVDDUPYrr:
295 case X86::VMOVDDUPYrm:
301 case X86::VMOVDDUPrr:
305 case X86::VMOVDDUPrm:
320 case X86::VPSLLDQYri:
339 case X86::VPSRLDQYri:
348 case X86::PALIGNR128rr:
349 case X86::VPALIGNR128rr:
352 case X86::PALIGNR128rm:
353 case X86::VPALIGNR128rm:
361 case X86::VPALIGNR256rr:
364 case X86::VPALIGNR256rm:
385 case X86::VPSHUFDYri:
388 case X86::VPSHUFDYmi:
397 case X86::VPSHUFHWri:
401 case X86::VPSHUFHWmi:
408 case X86::VPSHUFHWYri:
411 case X86::VPSHUFHWYmi:
419 case X86::VPSHUFLWri:
423 case X86::VPSHUFLWmi:
430 case X86::VPSHUFLWYri:
433 case X86::VPSHUFLWYmi:
441 case X86::PUNPCKHBWrr:
442 case X86::VPUNPCKHBWrr:
445 case X86::PUNPCKHBWrm:
446 case X86::VPUNPCKHBWrm:
451 case X86::VPUNPCKHBWYrr:
454 case X86::VPUNPCKHBWYrm:
459 case X86::PUNPCKHWDrr:
460 case X86::VPUNPCKHWDrr:
463 case X86::PUNPCKHWDrm:
464 case X86::VPUNPCKHWDrm:
469 case X86::VPUNPCKHWDYrr:
472 case X86::VPUNPCKHWDYrm:
477 case X86::PUNPCKHDQrr:
478 case X86::VPUNPCKHDQrr:
481 case X86::PUNPCKHDQrm:
482 case X86::VPUNPCKHDQrm:
487 case X86::VPUNPCKHDQYrr:
490 case X86::VPUNPCKHDQYrm:
495 case X86::VPUNPCKHDQZrr:
498 case X86::VPUNPCKHDQZrm:
503 case X86::PUNPCKHQDQrr:
504 case X86::VPUNPCKHQDQrr:
507 case X86::PUNPCKHQDQrm:
508 case X86::VPUNPCKHQDQrm:
513 case X86::VPUNPCKHQDQYrr:
516 case X86::VPUNPCKHQDQYrm:
521 case X86::VPUNPCKHQDQZrr:
524 case X86::VPUNPCKHQDQZrm:
530 case X86::PUNPCKLBWrr:
531 case X86::VPUNPCKLBWrr:
534 case X86::PUNPCKLBWrm:
535 case X86::VPUNPCKLBWrm:
540 case X86::VPUNPCKLBWYrr:
543 case X86::VPUNPCKLBWYrm:
548 case X86::PUNPCKLWDrr:
549 case X86::VPUNPCKLWDrr:
552 case X86::PUNPCKLWDrm:
553 case X86::VPUNPCKLWDrm:
558 case X86::VPUNPCKLWDYrr:
561 case X86::VPUNPCKLWDYrm:
566 case X86::PUNPCKLDQrr:
567 case X86::VPUNPCKLDQrr:
570 case X86::PUNPCKLDQrm:
571 case X86::VPUNPCKLDQrm:
576 case X86::VPUNPCKLDQYrr:
579 case X86::VPUNPCKLDQYrm:
584 case X86::VPUNPCKLDQZrr:
587 case X86::VPUNPCKLDQZrm:
592 case X86::PUNPCKLQDQrr:
593 case X86::VPUNPCKLQDQrr:
596 case X86::PUNPCKLQDQrm:
597 case X86::VPUNPCKLQDQrm:
602 case X86::VPUNPCKLQDQYrr:
605 case X86::VPUNPCKLQDQYrm:
610 case X86::VPUNPCKLQDQZrr:
613 case X86::VPUNPCKLQDQZrm:
620 case X86::VSHUFPDrri:
624 case X86::VSHUFPDrmi:
632 case X86::VSHUFPDYrri:
635 case X86::VSHUFPDYrmi:
645 case X86::VSHUFPSrri:
649 case X86::VSHUFPSrmi:
657 case X86::VSHUFPSYrri:
660 case X86::VSHUFPSYrmi:
669 case X86::UNPCKLPDrr:
670 case X86::VUNPCKLPDrr:
673 case X86::UNPCKLPDrm:
674 case X86::VUNPCKLPDrm:
679 case X86::VUNPCKLPDYrr:
682 case X86::VUNPCKLPDYrm:
687 case X86::VUNPCKLPDZrr:
690 case X86::VUNPCKLPDZrm:
695 case X86::UNPCKLPSrr:
696 case X86::VUNPCKLPSrr:
699 case X86::UNPCKLPSrm:
700 case X86::VUNPCKLPSrm:
705 case X86::VUNPCKLPSYrr:
708 case X86::VUNPCKLPSYrm:
713 case X86::VUNPCKLPSZrr:
716 case X86::VUNPCKLPSZrm:
721 case X86::UNPCKHPDrr:
722 case X86::VUNPCKHPDrr:
725 case X86::UNPCKHPDrm:
726 case X86::VUNPCKHPDrm:
731 case X86::VUNPCKHPDYrr:
734 case X86::VUNPCKHPDYrm:
739 case X86::VUNPCKHPDZrr:
742 case X86::VUNPCKHPDZrm:
747 case X86::UNPCKHPSrr:
748 case X86::VUNPCKHPSrr:
751 case X86::UNPCKHPSrm:
752 case X86::VUNPCKHPSrm:
757 case X86::VUNPCKHPSYrr:
760 case X86::VUNPCKHPSYrm:
765 case X86::VUNPCKHPSZrr:
768 case X86::VUNPCKHPSZrm:
773 case X86::VPERMILPSri:
776 case X86::VPERMILPSmi:
783 case X86::VPERMILPSYri:
786 case X86::VPERMILPSYmi:
793 case X86::VPERMILPDri:
796 case X86::VPERMILPDmi:
803 case X86::VPERMILPDYri:
806 case X86::VPERMILPDYmi:
813 case X86::VPERM2F128rr:
814 case X86::VPERM2I128rr:
817 case X86::VPERM2F128rm:
818 case X86::VPERM2I128rm:
828 case X86::VPERMPDYri:
832 case X86::VPERMPDYmi:
860 case X86::MOVPQI2QIrr:
861 case X86::MOVZPQILo2PQIrr:
862 case X86::VMOVPQI2QIrr:
863 case X86::VMOVZPQILo2PQIrr:
866 case X86::MOVQI2PQIrm:
867 case X86::MOVZQI2PQIrm:
868 case X86::MOVZPQILo2PQIrm:
869 case X86::VMOVQI2PQIrm:
870 case X86::VMOVZQI2PQIrm:
871 case X86::VMOVZPQILo2PQIrm:
875 case X86::MOVDI2PDIrm:
876 case X86::VMOVDI2PDIrm:
904 case X86::PMOVZXBWrr:
905 case X86::PMOVZXBDrr:
906 case X86::PMOVZXBQrr:
907 case X86::PMOVZXWDrr:
908 case X86::PMOVZXWQrr:
909 case X86::PMOVZXDQrr:
910 case X86::VPMOVZXBWrr:
911 case X86::VPMOVZXBDrr:
912 case X86::VPMOVZXBQrr:
913 case X86::VPMOVZXWDrr:
914 case X86::VPMOVZXWQrr:
915 case X86::VPMOVZXDQrr:
916 case X86::VPMOVZXBWYrr:
917 case X86::VPMOVZXBDYrr:
918 case X86::VPMOVZXBQYrr:
919 case X86::VPMOVZXWDYrr:
920 case X86::VPMOVZXWQYrr:
921 case X86::VPMOVZXDQYrr:
924 case X86::PMOVZXBWrm:
925 case X86::PMOVZXBDrm:
926 case X86::PMOVZXBQrm:
927 case X86::PMOVZXWDrm:
928 case X86::PMOVZXWQrm:
929 case X86::PMOVZXDQrm:
930 case X86::VPMOVZXBWrm:
931 case X86::VPMOVZXBDrm:
932 case X86::VPMOVZXBQrm:
933 case X86::VPMOVZXWDrm:
934 case X86::VPMOVZXWQrm:
935 case X86::VPMOVZXDQrm:
936 case X86::VPMOVZXBWYrm:
937 case X86::VPMOVZXBDYrm:
938 case X86::VPMOVZXBQYrm:
939 case X86::VPMOVZXWDYrm:
940 case X86::VPMOVZXWQYrm:
941 case X86::VPMOVZXDQYrm: {
951 if (ShuffleMask.
empty())
954 if (!DestName) DestName = Src1Name;
955 OS << (DestName ? DestName :
"mem") <<
" = ";
959 if (Src1Name == Src2Name) {
960 for (
unsigned i = 0, e = ShuffleMask.
size(); i != e; ++i) {
961 if ((
int)ShuffleMask[i] >= 0 &&
962 ShuffleMask[i] >= (
int)e)
970 for (
unsigned i = 0, e = ShuffleMask.
size(); i != e; ++i) {
980 bool isSrc1 = ShuffleMask[i] < (
int)ShuffleMask.
size();
981 const char *SrcName = isSrc1 ? Src1Name : Src2Name;
982 OS << (SrcName ? SrcName :
"mem") <<
'[';
985 (ShuffleMask[i] < (
int)ShuffleMask.
size()) == isSrc1) {
993 OS << ShuffleMask[i] % ShuffleMask.
size();
void DecodePSLLDQMask(MVT VT, unsigned Imm, SmallVectorImpl< int > &ShuffleMask)
void DecodeScalarMoveMask(MVT VT, bool IsLoad, SmallVectorImpl< int > &Mask)
Decode a scalar float move instruction as a shuffle mask.
void DecodePALIGNRMask(MVT VT, unsigned Imm, SmallVectorImpl< int > &ShuffleMask)
void DecodeUNPCKLMask(MVT VT, SmallVectorImpl< int > &ShuffleMask)
DecodeUNPCKLMask - This decodes the shuffle masks for unpcklps/unpcklpd and punpckl*.
SSE4A Extraction and Insertion.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
void DecodeMOVDDUPMask(MVT VT, SmallVectorImpl< int > &ShuffleMask)
void DecodeEXTRQIMask(int Len, int Idx, SmallVectorImpl< int > &ShuffleMask)
Decode a SSE4A EXTRQ instruction as a v16i8 shuffle mask.
void DecodeINSERTQIMask(int Len, int Idx, SmallVectorImpl< int > &ShuffleMask)
Decode a SSE4A INSERTQ instruction as a v16i8 shuffle mask.
bool LLVM_ATTRIBUTE_UNUSED_RESULT empty() const
unsigned getReg() const
Returns the register number.
void DecodeZeroMoveLowMask(MVT VT, SmallVectorImpl< int > &ShuffleMask)
Decode a move lower and zero upper instruction as a shuffle mask.
Instances of this class represent a single low-level machine instruction.
void DecodeBLENDMask(MVT VT, unsigned Imm, SmallVectorImpl< int > &ShuffleMask)
Decode a BLEND immediate mask into a shuffle mask.
void DecodeMOVSHDUPMask(MVT VT, SmallVectorImpl< int > &ShuffleMask)
void DecodeMOVLHPSMask(unsigned NElts, SmallVectorImpl< int > &ShuffleMask)
MVT - Machine Value Type.
void DecodeSHUFPMask(MVT VT, unsigned Imm, SmallVectorImpl< int > &ShuffleMask)
DecodeSHUFPMask - This decodes the shuffle masks for shufp*.
void DecodePSHUFLWMask(MVT VT, unsigned Imm, SmallVectorImpl< int > &ShuffleMask)
void DecodeINSERTPSMask(unsigned Imm, SmallVectorImpl< int > &ShuffleMask)
void DecodePSRLDQMask(MVT VT, unsigned Imm, SmallVectorImpl< int > &ShuffleMask)
void DecodeMOVSLDUPMask(MVT VT, SmallVectorImpl< int > &ShuffleMask)
void DecodePSHUFMask(MVT VT, unsigned Imm, SmallVectorImpl< int > &ShuffleMask)
DecodePSHUFMask - This decodes the shuffle masks for pshufd, and vpermilp*.
unsigned getOpcode() const
void DecodeUNPCKHMask(MVT VT, SmallVectorImpl< int > &ShuffleMask)
DecodeUNPCKHMask - This decodes the shuffle masks for unpckhps/unpckhpd and punpckh*.
void DecodeVPERM2X128Mask(MVT VT, unsigned Imm, SmallVectorImpl< int > &ShuffleMask)
void DecodePSHUFHWMask(MVT VT, unsigned Imm, SmallVectorImpl< int > &ShuffleMask)
unsigned getNumOperands() const
void DecodeZeroExtendMask(MVT SrcVT, MVT DstVT, SmallVectorImpl< int > &Mask)
Decode a zero extension instruction as a shuffle mask.
void DecodeVPERMMask(unsigned Imm, SmallVectorImpl< int > &ShuffleMask)
DecodeVPERMMask - this decodes the shuffle masks for VPERMQ/VPERMPD.
This class implements an extremely fast bulk output stream that can only output to a stream...
void DecodeMOVHLPSMask(unsigned NElts, SmallVectorImpl< int > &ShuffleMask)
const MCOperand & getOperand(unsigned i) const
bool EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS, const char *(*getRegName)(unsigned))
EmitAnyX86InstComments - This function decodes x86 instructions and prints newline terminated strings...