17 #ifndef LLVM_CODEGEN_VIRTREGMAP_H
18 #define LLVM_CODEGEN_VIRTREGMAP_H
26 class MachineFunction;
27 class MachineRegisterInfo;
28 class TargetInstrInfo;
81 assert(MF &&
"getMachineFunction called before runOnMachineFunction");
98 unsigned getPhys(
unsigned virtReg)
const {
100 return Virt2PhysMap[virtReg];
109 "attempt to assign physical register to already mapped "
111 Virt2PhysMap[virtReg] = physReg;
119 "attempt to clear a not assigned virtual register");
125 Virt2PhysMap.clear();
139 Virt2SplitMap[virtReg] = SReg;
144 return Virt2SplitMap[virtReg];
153 return Orig ? Orig : VirtReg;
163 return (Virt2SplitMap[virtReg] && Virt2PhysMap[virtReg] !=
NO_PHYS_REG);
170 return Virt2StackSlotMap[virtReg];
bool hasPhys(unsigned virtReg) const
returns true if the specified virtual register is mapped to a physical register
MachineFunction & getMachineFunction() const
A Module instance is used to store all the information related to an LLVM module. ...
static bool isVirtualRegister(unsigned Reg)
isVirtualRegister - Return true if the specified register number is in the virtual register namespace...
void print(raw_ostream &OS, const Module *M=nullptr) const override
print - Print out the internal state of the pass.
void assignVirt2Phys(unsigned virtReg, unsigned physReg)
creates a mapping for the specified virtual register to the specified physical register ...
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
void setIsSplitFromReg(unsigned virtReg, unsigned SReg)
records virtReg is a split live interval from SReg.
TargetInstrInfo - Interface to description of machine instruction set.
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
unsigned getOriginal(unsigned VirtReg) const
getOriginal - Return the original virtual register that VirtReg descends from through splitting...
bool hasPreferredPhys(unsigned VirtReg)
returns true if VirtReg is assigned to its preferred physreg.
const TargetRegisterInfo & getTargetRegInfo() const
bool runOnMachineFunction(MachineFunction &MF) override
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
Represent the analysis usage information of a pass.
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
bool hasKnownPreference(unsigned VirtReg)
returns true if VirtReg has a known preferred register.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
void clearVirt(unsigned virtReg)
clears the specified virtual register's, physical register mapping
void setPreservesAll()
Set by analyses that do not transform their input at all.
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
static bool isPhysicalRegister(unsigned Reg)
isPhysicalRegister - Return true if the specified register number is in the physical register namespa...
raw_ostream & operator<<(raw_ostream &OS, const APInt &I)
bool isAssignedReg(unsigned virtReg) const
returns true if the specified virtual register is not mapped to a stack slot or rematerialized.
void clearAllVirt()
clears all virtual to physical register mappings
int getStackSlot(unsigned virtReg) const
returns the stack slot mapped to the specified virtual register
MachineRegisterInfo & getRegInfo() const
This class implements an extremely fast bulk output stream that can only output to a stream...
int assignVirt2StackSlot(unsigned virtReg)
create a mapping for the specifed virtual register to the next available stack slot ...
unsigned getPhys(unsigned virtReg) const
returns the physical register mapped to the specified virtual register
unsigned getPreSplitReg(unsigned virtReg) const
returns the live interval virtReg is split from.