LLVM  3.7.0
HexagonMCCodeEmitter.h
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1 //===-- HexagonMCCodeEmitter.h - Hexagon Target Descriptions ----*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 ///
10 /// \file
11 /// \brief Definition for classes that emit Hexagon machine code from MCInsts
12 ///
13 //===----------------------------------------------------------------------===//
14 
15 #ifndef HEXAGONMCCODEEMITTER_H
16 #define HEXAGONMCCODEEMITTER_H
17 
18 #include "llvm/MC/MCCodeEmitter.h"
19 #include "llvm/MC/MCExpr.h"
20 #include "llvm/MC/MCInst.h"
21 #include "llvm/MC/MCInstrInfo.h"
22 #include "llvm/MC/MCRegisterInfo.h"
25 
26 namespace llvm {
27 
29  MCContext &MCT;
30  MCInstrInfo const &MCII;
31  std::unique_ptr<unsigned> Addend;
32  std::unique_ptr<bool> Extended;
33  std::unique_ptr<MCInst const *> CurrentBundle;
34 
35  // helper routine for getMachineOpValue()
36  unsigned getExprOpValue(const MCInst &MI, const MCOperand &MO,
38  const MCSubtargetInfo &STI) const;
39 
40 public:
41  HexagonMCCodeEmitter(MCInstrInfo const &aMII, MCContext &aMCT);
42 
43  // Return parse bits for instruction `MCI' inside bundle `MCB'
44  uint32_t parseBits(size_t Instruction, size_t Last, MCInst const &MCB,
45  MCInst const &MCI) const;
46 
47  void encodeInstruction(MCInst const &MI, raw_ostream &OS,
49  MCSubtargetInfo const &STI) const override;
50 
51  void EncodeSingleInstruction(const MCInst &MI, raw_ostream &OS,
53  const MCSubtargetInfo &STI,
54  uint32_t Parse, size_t Index) const;
55 
56  // \brief TableGen'erated function for getting the
57  // binary encoding for an instruction.
58  uint64_t getBinaryCodeForInstr(MCInst const &MI,
60  MCSubtargetInfo const &STI) const;
61 
62  /// \brief Return binary encoding of operand.
63  unsigned getMachineOpValue(MCInst const &MI, MCOperand const &MO,
65  MCSubtargetInfo const &STI) const;
66 }; // class HexagonMCCodeEmitter
67 
68 } // namespace llvm
69 
70 #endif /* HEXAGONMCCODEEMITTER_H */
uint64_t getBinaryCodeForInstr(MCInst const &MI, SmallVectorImpl< MCFixup > &Fixups, MCSubtargetInfo const &STI) const
uint32_t parseBits(size_t Instruction, size_t Last, MCInst const &MCB, MCInst const &MCI) const
void EncodeSingleInstruction(const MCInst &MI, raw_ostream &OS, SmallVectorImpl< MCFixup > &Fixups, const MCSubtargetInfo &STI, uint32_t Parse, size_t Index) const
EncodeSingleInstruction - Emit a single.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APInt.h:33
Base class for the full range of assembler expressions which are needed for parsing.
Definition: MCExpr.h:33
Context object for machine code objects.
Definition: MCContext.h:48
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:150
void encodeInstruction(MCInst const &MI, raw_ostream &OS, SmallVectorImpl< MCFixup > &Fixups, MCSubtargetInfo const &STI) const override
EncodeInstruction - Encode the given Inst to bytes on the output stream OS.
MCCodeEmitter - Generic instruction encoding interface.
Definition: MCCodeEmitter.h:23
Interface to description of machine instruction set.
Definition: MCInstrInfo.h:24
HexagonMCCodeEmitter(MCInstrInfo const &aMII, MCContext &aMCT)
MCSubtargetInfo - Generic base class for all target subtargets.
This class implements an extremely fast bulk output stream that can only output to a stream...
Definition: raw_ostream.h:38
Instances of this class represent operands of the MCInst class.
Definition: MCInst.h:33
unsigned getMachineOpValue(MCInst const &MI, MCOperand const &MO, SmallVectorImpl< MCFixup > &Fixups, MCSubtargetInfo const &STI) const
Return binary encoding of operand.