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LLVM
3.7.0
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#include "AArch64InstrInfo.h"#include "AArch64Subtarget.h"#include "MCTargetDesc/AArch64AddressingModes.h"#include "llvm/ADT/BitVector.h"#include "llvm/ADT/SmallVector.h"#include "llvm/ADT/Statistic.h"#include "llvm/CodeGen/MachineBasicBlock.h"#include "llvm/CodeGen/MachineFunctionPass.h"#include "llvm/CodeGen/MachineInstr.h"#include "llvm/CodeGen/MachineInstrBuilder.h"#include "llvm/Support/CommandLine.h"#include "llvm/Support/Debug.h"#include "llvm/Support/ErrorHandling.h"#include "llvm/Support/raw_ostream.h"#include "llvm/Target/TargetInstrInfo.h"#include "llvm/Target/TargetMachine.h"#include "llvm/Target/TargetRegisterInfo.h"Go to the source code of this file.
Macros | |
| #define | DEBUG_TYPE "aarch64-ldst-opt" |
Functions | |
| STATISTIC (NumPairCreated,"Number of load/store pair instructions generated") | |
| AArch64AllocLoadStoreOpt - Post-register allocation pass to combine load / store instructions to form ldp / stp instructions. More... | |
| STATISTIC (NumPostFolded,"Number of post-index updates folded") | |
| STATISTIC (NumPreFolded,"Number of pre-index updates folded") | |
| STATISTIC (NumUnscaledPairCreated,"Number of load/store from unscaled generated") | |
| static bool | isUnscaledLdst (unsigned Opc) |
| static unsigned | getMatchingNonSExtOpcode (unsigned Opc, bool *IsValidLdStrOpc=nullptr) |
| static unsigned | getMatchingPairOpcode (unsigned Opc) |
| static unsigned | getPreIndexedOpcode (unsigned Opc) |
| static unsigned | getPostIndexedOpcode (unsigned Opc) |
| static void | trackRegDefsUses (MachineInstr *MI, BitVector &ModifiedRegs, BitVector &UsedRegs, const TargetRegisterInfo *TRI) |
| trackRegDefsUses - Remember what registers the specified instruction uses and modifies. More... | |
| static bool | inBoundsForPair (bool IsUnscaled, int Offset, int OffsetStride) |
| static int | alignTo (int Num, int PowOf2) |
| static bool | mayAlias (MachineInstr *MIa, MachineInstr *MIb, const AArch64InstrInfo *TII) |
| static bool | mayAlias (MachineInstr *MIa, SmallVectorImpl< MachineInstr * > &MemInsns, const AArch64InstrInfo *TII) |
| static bool | isMatchingUpdateInsn (MachineInstr *MI, unsigned BaseReg, int Offset) |
Variables | |
| static cl::opt< unsigned > | ScanLimit ("aarch64-load-store-scan-limit", cl::init(20), cl::Hidden) |
| static cl::opt< bool > | EnableAArch64UnscaledMemOp ("aarch64-unscaled-mem-op", cl::Hidden, cl::desc("Allow AArch64 unscaled load/store combining"), cl::init(true)) |
| #define DEBUG_TYPE "aarch64-ldst-opt" |
Definition at line 34 of file AArch64LoadStoreOptimizer.cpp.
Definition at line 483 of file AArch64LoadStoreOptimizer.cpp.
Definition at line 193 of file AArch64LoadStoreOptimizer.cpp.
Definition at line 230 of file AArch64LoadStoreOptimizer.cpp.
References llvm_unreachable.
Definition at line 299 of file AArch64LoadStoreOptimizer.cpp.
References llvm_unreachable.
Definition at line 270 of file AArch64LoadStoreOptimizer.cpp.
References llvm_unreachable.
Definition at line 466 of file AArch64LoadStoreOptimizer.cpp.
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Definition at line 755 of file AArch64LoadStoreOptimizer.cpp.
References llvm::MachineOperand::getImm(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::AArch64_AM::getShiftValue(), and llvm::MachineOperand::isImm().
Definition at line 123 of file AArch64LoadStoreOptimizer.cpp.
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Definition at line 487 of file AArch64LoadStoreOptimizer.cpp.
References llvm::AArch64InstrInfo::areMemAccessesTriviallyDisjoint(), llvm::MachineInstr::mayLoadOrStore(), and llvm::MachineInstr::mayStore().
Referenced by mayAlias().
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Definition at line 500 of file AArch64LoadStoreOptimizer.cpp.
References mayAlias().
| STATISTIC | ( | NumPairCreated | , |
| "Number of load/store pair instructions generated" | |||
| ) |
AArch64AllocLoadStoreOpt - Post-register allocation pass to combine load / store instructions to form ldp / stp instructions.
| STATISTIC | ( | NumPostFolded | , |
| "Number of post-index updates folded" | |||
| ) |
| STATISTIC | ( | NumPreFolded | , |
| "Number of pre-index updates folded" | |||
| ) |
| STATISTIC | ( | NumUnscaledPairCreated | , |
| "Number of load/store from unscaled generated" | |||
| ) |
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trackRegDefsUses - Remember what registers the specified instruction uses and modifies.
Definition at line 444 of file AArch64LoadStoreOptimizer.cpp.
References llvm::MachineInstr::getNumOperands(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::getRegMask(), llvm::MachineOperand::isDef(), llvm::MachineOperand::isReg(), llvm::MachineOperand::isRegMask(), llvm::MachineOperand::isUse(), llvm::MCRegAliasIterator::isValid(), llvm::BitVector::set(), and llvm::BitVector::setBitsNotInMask().
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1.8.6