59 const char *getPassName()
const override {
60 return "Hexagon Expand Predicate Spill Code";
69 bool HexagonExpandPredSpillCode::runOnMachineFunction(
MachineFunction &Fn) {
76 MBBb != MBBe; ++MBBb) {
83 if (Opc == Hexagon::S2_storerb_pci_pseudo ||
84 Opc == Hexagon::S2_storerh_pci_pseudo ||
85 Opc == Hexagon::S2_storeri_pci_pseudo ||
86 Opc == Hexagon::S2_storerd_pci_pseudo ||
87 Opc == Hexagon::S2_storerf_pci_pseudo) {
89 if (Opc == Hexagon::S2_storerd_pci_pseudo)
90 Opcode = Hexagon::S2_storerd_pci;
91 else if (Opc == Hexagon::S2_storeri_pci_pseudo)
92 Opcode = Hexagon::S2_storeri_pci;
93 else if (Opc == Hexagon::S2_storerh_pci_pseudo)
94 Opcode = Hexagon::S2_storerh_pci;
95 else if (Opc == Hexagon::S2_storerf_pci_pseudo)
96 Opcode = Hexagon::S2_storerf_pci;
97 else if (Opc == Hexagon::S2_storerb_pci_pseudo)
98 Opcode = Hexagon::S2_storerb_pci;
108 Hexagon::C6)->addOperand(Op3);
120 MII = MBB->
erase(MI);
122 }
else if (Opc == Hexagon::L2_loadrd_pci_pseudo ||
123 Opc == Hexagon::L2_loadri_pci_pseudo ||
124 Opc == Hexagon::L2_loadrh_pci_pseudo ||
125 Opc == Hexagon::L2_loadruh_pci_pseudo||
126 Opc == Hexagon::L2_loadrb_pci_pseudo ||
127 Opc == Hexagon::L2_loadrub_pci_pseudo) {
129 if (Opc == Hexagon::L2_loadrd_pci_pseudo)
130 Opcode = Hexagon::L2_loadrd_pci;
131 else if (Opc == Hexagon::L2_loadri_pci_pseudo)
132 Opcode = Hexagon::L2_loadri_pci;
133 else if (Opc == Hexagon::L2_loadrh_pci_pseudo)
134 Opcode = Hexagon::L2_loadrh_pci;
135 else if (Opc == Hexagon::L2_loadruh_pci_pseudo)
136 Opcode = Hexagon::L2_loadruh_pci;
137 else if (Opc == Hexagon::L2_loadrb_pci_pseudo)
138 Opcode = Hexagon::L2_loadrb_pci;
139 else if (Opc == Hexagon::L2_loadrub_pci_pseudo)
140 Opcode = Hexagon::L2_loadrub_pci;
151 Hexagon::C6)->addOperand(Op4);
163 MII = MBB->
erase(MI);
165 }
else if (Opc == Hexagon::L2_loadrd_pbr_pseudo ||
166 Opc == Hexagon::L2_loadri_pbr_pseudo ||
167 Opc == Hexagon::L2_loadrh_pbr_pseudo ||
168 Opc == Hexagon::L2_loadruh_pbr_pseudo||
169 Opc == Hexagon::L2_loadrb_pbr_pseudo ||
170 Opc == Hexagon::L2_loadrub_pbr_pseudo) {
172 if (Opc == Hexagon::L2_loadrd_pbr_pseudo)
173 Opcode = Hexagon::L2_loadrd_pbr;
174 else if (Opc == Hexagon::L2_loadri_pbr_pseudo)
175 Opcode = Hexagon::L2_loadri_pbr;
176 else if (Opc == Hexagon::L2_loadrh_pbr_pseudo)
177 Opcode = Hexagon::L2_loadrh_pbr;
178 else if (Opc == Hexagon::L2_loadruh_pbr_pseudo)
179 Opcode = Hexagon::L2_loadruh_pbr;
180 else if (Opc == Hexagon::L2_loadrb_pbr_pseudo)
181 Opcode = Hexagon::L2_loadrb_pbr;
182 else if (Opc == Hexagon::L2_loadrub_pbr_pseudo)
183 Opcode = Hexagon::L2_loadrub_pbr;
192 Hexagon::C6)->addOperand(Op4);
203 MII = MBB->
erase(MI);
205 }
else if (Opc == Hexagon::S2_storerd_pbr_pseudo ||
206 Opc == Hexagon::S2_storeri_pbr_pseudo ||
207 Opc == Hexagon::S2_storerh_pbr_pseudo ||
208 Opc == Hexagon::S2_storerb_pbr_pseudo ||
209 Opc == Hexagon::S2_storerf_pbr_pseudo) {
211 if (Opc == Hexagon::S2_storerd_pbr_pseudo)
212 Opcode = Hexagon::S2_storerd_pbr;
213 else if (Opc == Hexagon::S2_storeri_pbr_pseudo)
214 Opcode = Hexagon::S2_storeri_pbr;
215 else if (Opc == Hexagon::S2_storerh_pbr_pseudo)
216 Opcode = Hexagon::S2_storerh_pbr;
217 else if (Opc == Hexagon::S2_storerf_pbr_pseudo)
218 Opcode = Hexagon::S2_storerf_pbr;
219 else if (Opc == Hexagon::S2_storerb_pbr_pseudo)
220 Opcode = Hexagon::S2_storerb_pbr;
229 Hexagon::C6)->addOperand(Op3);
240 MII = MBB->
erase(MI);
242 }
else if (Opc == Hexagon::STriw_pred) {
246 "Not a Frame Pointer, Nor a Spill Slot");
250 assert(Hexagon::PredRegsRegClass.
contains(SrcReg) &&
251 "Not a predicate register");
252 if (!TII->isValidOffset(Hexagon::S2_storeri_io, Offset)) {
253 if (!TII->isValidOffset(Hexagon::A2_addi, Offset)) {
255 TII->
get(Hexagon::CONST32_Int_Real),
263 TII->
get(Hexagon::S2_storeri_io))
272 TII->
get(Hexagon::S2_storeri_io))
281 TII->
get(Hexagon::S2_storeri_io)).
284 MII = MBB->
erase(MI);
286 }
else if (Opc == Hexagon::LDriw_pred) {
289 assert(Hexagon::PredRegsRegClass.
contains(DstReg) &&
290 "Not a predicate register");
293 "Not a Frame Pointer, Nor a Spill Slot");
296 if (!TII->isValidOffset(Hexagon::L2_loadri_io, Offset)) {
297 if (!TII->isValidOffset(Hexagon::A2_addi, Offset)) {
299 TII->
get(Hexagon::CONST32_Int_Real),
327 MII = MBB->
erase(MI);
343 const char *
Name =
"Hexagon Expand Predicate Spill Code";
345 &HexagonExpandPredSpillCode::ID,
346 nullptr,
false,
false);
356 return new HexagonExpandPredSpillCode();
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
#define HEXAGON_RESERVED_REG_1
unsigned getFrameRegister(const MachineFunction &MF) const override
A global registry used in conjunction with static constructors to make pluggable components (like tar...
#define HEXAGON_RESERVED_REG_2
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
const HexagonInstrInfo * TII
static MachineOperand CreateReg(unsigned Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false)
bool isImm() const
isImm - Tests if this is a MO_Immediate operand.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
const HexagonRegisterInfo * getRegisterInfo() const override
static bool contains(SmallPtrSetImpl< ConstantExpr * > &Cache, ConstantExpr *Expr, Constant *C)
const MachineInstrBuilder & addImm(int64_t Val) const
addImm - Add a new immediate operand.
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
bundle_iterator< MachineInstr, instr_iterator > iterator
const MachineOperand & getOperand(unsigned i) const
FunctionPass class - This class is used to implement most global optimizations.
MachineInstrBuilder BuildMI(MachineFunction &MF, DebugLoc DL, const MCInstrDesc &MCID)
BuildMI - Builder interface.
PassInfo class - An instance of this class exists for every pass known by the system, and can be obtained from a live Pass by calling its getPassInfo() method.
void initializeHexagonExpandPredSpillCodePass(PassRegistry &)
void addOperand(MachineFunction &MF, const MachineOperand &Op)
Add the specified operand to the instruction.
MachineOperand class - Representation of each machine instruction operand.
static void initializePassOnce(PassRegistry &Registry)
const DebugLoc & getDebugLoc() const
Returns the debug location id of this MachineInstr.
static MDTuple * get(LLVMContext &Context, ArrayRef< Metadata * > MDs)
Representation of each machine instruction.
FunctionPass * createHexagonExpandPredSpillCode()
unsigned getReg() const
getReg - Returns the register number.
#define CALL_ONCE_INITIALIZATION(function)
const HexagonInstrInfo * getInstrInfo() const override
BasicBlockListType::iterator iterator
PassRegistry - This class manages the registration and intitialization of the pass subsystem as appli...
const MachineInstrBuilder & addReg(unsigned RegNo, unsigned flags=0, unsigned SubReg=0) const
addReg - Add a new virtual register operand...
void registerPass(const PassInfo &PI, bool ShouldFree=false)
registerPass - Register a pass (by means of its PassInfo) with the registry.