LLVM  3.7.0
StackMaps.cpp
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1 //===---------------------------- StackMaps.cpp ---------------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 
10 #include "llvm/CodeGen/StackMaps.h"
15 #include "llvm/IR/DataLayout.h"
16 #include "llvm/MC/MCContext.h"
17 #include "llvm/MC/MCExpr.h"
19 #include "llvm/MC/MCSectionMachO.h"
20 #include "llvm/MC/MCStreamer.h"
26 #include <iterator>
27 
28 using namespace llvm;
29 
30 #define DEBUG_TYPE "stackmaps"
31 
33  "stackmap-version", cl::init(1),
34  cl::desc("Specify the stackmap encoding version (default = 1)"));
35 
36 const char *StackMaps::WSMP = "Stack Maps: ";
37 
39  : MI(MI), HasDef(MI->getOperand(0).isReg() && MI->getOperand(0).isDef() &&
40  !MI->getOperand(0).isImplicit()),
41  IsAnyReg(MI->getOperand(getMetaIdx(CCPos)).getImm() ==
42  CallingConv::AnyReg) {
43 #ifndef NDEBUG
44  unsigned CheckStartIdx = 0, e = MI->getNumOperands();
45  while (CheckStartIdx < e && MI->getOperand(CheckStartIdx).isReg() &&
46  MI->getOperand(CheckStartIdx).isDef() &&
47  !MI->getOperand(CheckStartIdx).isImplicit())
48  ++CheckStartIdx;
49 
50  assert(getMetaIdx() == CheckStartIdx &&
51  "Unexpected additional definition in Patchpoint intrinsic.");
52 #endif
53 }
54 
55 unsigned PatchPointOpers::getNextScratchIdx(unsigned StartIdx) const {
56  if (!StartIdx)
57  StartIdx = getVarIdx();
58 
59  // Find the next scratch register (implicit def and early clobber)
60  unsigned ScratchIdx = StartIdx, e = MI->getNumOperands();
61  while (ScratchIdx < e &&
62  !(MI->getOperand(ScratchIdx).isReg() &&
63  MI->getOperand(ScratchIdx).isDef() &&
64  MI->getOperand(ScratchIdx).isImplicit() &&
65  MI->getOperand(ScratchIdx).isEarlyClobber()))
66  ++ScratchIdx;
67 
68  assert(ScratchIdx != e && "No scratch register available");
69  return ScratchIdx;
70 }
71 
73  if (StackMapVersion != 1)
74  llvm_unreachable("Unsupported stackmap version!");
75 }
76 
77 /// Go up the super-register chain until we hit a valid dwarf register number.
78 static unsigned getDwarfRegNum(unsigned Reg, const TargetRegisterInfo *TRI) {
79  int RegNum = TRI->getDwarfRegNum(Reg, false);
80  for (MCSuperRegIterator SR(Reg, TRI); SR.isValid() && RegNum < 0; ++SR)
81  RegNum = TRI->getDwarfRegNum(*SR, false);
82 
83  assert(RegNum >= 0 && "Invalid Dwarf register number.");
84  return (unsigned)RegNum;
85 }
86 
88 StackMaps::parseOperand(MachineInstr::const_mop_iterator MOI,
89  MachineInstr::const_mop_iterator MOE, LocationVec &Locs,
90  LiveOutVec &LiveOuts) const {
92  if (MOI->isImm()) {
93  switch (MOI->getImm()) {
94  default:
95  llvm_unreachable("Unrecognized operand type.");
97  unsigned Size = AP.TM.getDataLayout()->getPointerSizeInBits();
98  assert((Size % 8) == 0 && "Need pointer size in bytes.");
99  Size /= 8;
100  unsigned Reg = (++MOI)->getReg();
101  int64_t Imm = (++MOI)->getImm();
102  Locs.emplace_back(StackMaps::Location::Direct, Size,
103  getDwarfRegNum(Reg, TRI), Imm);
104  break;
105  }
107  int64_t Size = (++MOI)->getImm();
108  assert(Size > 0 && "Need a valid size for indirect memory locations.");
109  unsigned Reg = (++MOI)->getReg();
110  int64_t Imm = (++MOI)->getImm();
111  Locs.emplace_back(StackMaps::Location::Indirect, Size,
112  getDwarfRegNum(Reg, TRI), Imm);
113  break;
114  }
115  case StackMaps::ConstantOp: {
116  ++MOI;
117  assert(MOI->isImm() && "Expected constant operand.");
118  int64_t Imm = MOI->getImm();
119  Locs.emplace_back(Location::Constant, sizeof(int64_t), 0, Imm);
120  break;
121  }
122  }
123  return ++MOI;
124  }
125 
126  // The physical register number will ultimately be encoded as a DWARF regno.
127  // The stack map also records the size of a spill slot that can hold the
128  // register content. (The runtime can track the actual size of the data type
129  // if it needs to.)
130  if (MOI->isReg()) {
131  // Skip implicit registers (this includes our scratch registers)
132  if (MOI->isImplicit())
133  return ++MOI;
134 
136  "Virtreg operands should have been rewritten before now.");
137  const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(MOI->getReg());
138  assert(!MOI->getSubReg() && "Physical subreg still around.");
139 
140  unsigned Offset = 0;
141  unsigned DwarfRegNum = getDwarfRegNum(MOI->getReg(), TRI);
142  unsigned LLVMRegNum = TRI->getLLVMRegNum(DwarfRegNum, false);
143  unsigned SubRegIdx = TRI->getSubRegIndex(LLVMRegNum, MOI->getReg());
144  if (SubRegIdx)
145  Offset = TRI->getSubRegIdxOffset(SubRegIdx);
146 
147  Locs.emplace_back(Location::Register, RC->getSize(), DwarfRegNum, Offset);
148  return ++MOI;
149  }
150 
151  if (MOI->isRegLiveOut())
152  LiveOuts = parseRegisterLiveOutMask(MOI->getRegLiveOut());
153 
154  return ++MOI;
155 }
156 
157 void StackMaps::print(raw_ostream &OS) {
158  const TargetRegisterInfo *TRI =
159  AP.MF ? AP.MF->getSubtarget().getRegisterInfo() : nullptr;
160  OS << WSMP << "callsites:\n";
161  for (const auto &CSI : CSInfos) {
162  const LocationVec &CSLocs = CSI.Locations;
163  const LiveOutVec &LiveOuts = CSI.LiveOuts;
164 
165  OS << WSMP << "callsite " << CSI.ID << "\n";
166  OS << WSMP << " has " << CSLocs.size() << " locations\n";
167 
168  unsigned Idx = 0;
169  for (const auto &Loc : CSLocs) {
170  OS << WSMP << "\t\tLoc " << Idx << ": ";
171  switch (Loc.Type) {
173  OS << "<Unprocessed operand>";
174  break;
175  case Location::Register:
176  OS << "Register ";
177  if (TRI)
178  OS << TRI->getName(Loc.Reg);
179  else
180  OS << Loc.Reg;
181  break;
182  case Location::Direct:
183  OS << "Direct ";
184  if (TRI)
185  OS << TRI->getName(Loc.Reg);
186  else
187  OS << Loc.Reg;
188  if (Loc.Offset)
189  OS << " + " << Loc.Offset;
190  break;
191  case Location::Indirect:
192  OS << "Indirect ";
193  if (TRI)
194  OS << TRI->getName(Loc.Reg);
195  else
196  OS << Loc.Reg;
197  OS << "+" << Loc.Offset;
198  break;
199  case Location::Constant:
200  OS << "Constant " << Loc.Offset;
201  break;
203  OS << "Constant Index " << Loc.Offset;
204  break;
205  }
206  OS << "\t[encoding: .byte " << Loc.Type << ", .byte " << Loc.Size
207  << ", .short " << Loc.Reg << ", .int " << Loc.Offset << "]\n";
208  Idx++;
209  }
210 
211  OS << WSMP << "\thas " << LiveOuts.size() << " live-out registers\n";
212 
213  Idx = 0;
214  for (const auto &LO : LiveOuts) {
215  OS << WSMP << "\t\tLO " << Idx << ": ";
216  if (TRI)
217  OS << TRI->getName(LO.Reg);
218  else
219  OS << LO.Reg;
220  OS << "\t[encoding: .short " << LO.DwarfRegNum << ", .byte 0, .byte "
221  << LO.Size << "]\n";
222  Idx++;
223  }
224  }
225 }
226 
227 /// Create a live-out register record for the given register Reg.
229 StackMaps::createLiveOutReg(unsigned Reg, const TargetRegisterInfo *TRI) const {
230  unsigned DwarfRegNum = getDwarfRegNum(Reg, TRI);
231  unsigned Size = TRI->getMinimalPhysRegClass(Reg)->getSize();
232  return LiveOutReg(Reg, DwarfRegNum, Size);
233 }
234 
235 /// Parse the register live-out mask and return a vector of live-out registers
236 /// that need to be recorded in the stackmap.
238 StackMaps::parseRegisterLiveOutMask(const uint32_t *Mask) const {
239  assert(Mask && "No register mask specified");
240  const TargetRegisterInfo *TRI = AP.MF->getSubtarget().getRegisterInfo();
241  LiveOutVec LiveOuts;
242 
243  // Create a LiveOutReg for each bit that is set in the register mask.
244  for (unsigned Reg = 0, NumRegs = TRI->getNumRegs(); Reg != NumRegs; ++Reg)
245  if ((Mask[Reg / 32] >> Reg % 32) & 1)
246  LiveOuts.push_back(createLiveOutReg(Reg, TRI));
247 
248  // We don't need to keep track of a register if its super-register is already
249  // in the list. Merge entries that refer to the same dwarf register and use
250  // the maximum size that needs to be spilled.
251 
252  std::sort(LiveOuts.begin(), LiveOuts.end(),
253  [](const LiveOutReg &LHS, const LiveOutReg &RHS) {
254  // Only sort by the dwarf register number.
255  return LHS.DwarfRegNum < RHS.DwarfRegNum;
256  });
257 
258  for (auto I = LiveOuts.begin(), E = LiveOuts.end(); I != E; ++I) {
259  for (auto II = std::next(I); II != E; ++II) {
260  if (I->DwarfRegNum != II->DwarfRegNum) {
261  // Skip all the now invalid entries.
262  I = --II;
263  break;
264  }
265  I->Size = std::max(I->Size, II->Size);
266  if (TRI->isSuperRegister(I->Reg, II->Reg))
267  I->Reg = II->Reg;
268  II->Reg = 0; // mark for deletion.
269  }
270  }
271 
272  LiveOuts.erase(
273  std::remove_if(LiveOuts.begin(), LiveOuts.end(),
274  [](const LiveOutReg &LO) { return LO.Reg == 0; }),
275  LiveOuts.end());
276 
277  return LiveOuts;
278 }
279 
280 void StackMaps::recordStackMapOpers(const MachineInstr &MI, uint64_t ID,
283  bool recordResult) {
284 
285  MCContext &OutContext = AP.OutStreamer->getContext();
286  MCSymbol *MILabel = OutContext.createTempSymbol();
287  AP.OutStreamer->EmitLabel(MILabel);
288 
289  LocationVec Locations;
290  LiveOutVec LiveOuts;
291 
292  if (recordResult) {
293  assert(PatchPointOpers(&MI).hasDef() && "Stackmap has no return value.");
294  parseOperand(MI.operands_begin(), std::next(MI.operands_begin()), Locations,
295  LiveOuts);
296  }
297 
298  // Parse operands.
299  while (MOI != MOE) {
300  MOI = parseOperand(MOI, MOE, Locations, LiveOuts);
301  }
302 
303  // Move large constants into the constant pool.
304  for (auto &Loc : Locations) {
305  // Constants are encoded as sign-extended integers.
306  // -1 is directly encoded as .long 0xFFFFFFFF with no constant pool.
307  if (Loc.Type == Location::Constant && !isInt<32>(Loc.Offset)) {
308  Loc.Type = Location::ConstantIndex;
309  // ConstPool is intentionally a MapVector of 'uint64_t's (as
310  // opposed to 'int64_t's). We should never be in a situation
311  // where we have to insert either the tombstone or the empty
312  // keys into a map, and for a DenseMap<uint64_t, T> these are
313  // (uint64_t)0 and (uint64_t)-1. They can be and are
314  // represented using 32 bit integers.
315  assert((uint64_t)Loc.Offset != DenseMapInfo<uint64_t>::getEmptyKey() &&
316  (uint64_t)Loc.Offset !=
318  "empty and tombstone keys should fit in 32 bits!");
319  auto Result = ConstPool.insert(std::make_pair(Loc.Offset, Loc.Offset));
320  Loc.Offset = Result.first - ConstPool.begin();
321  }
322  }
323 
324  // Create an expression to calculate the offset of the callsite from function
325  // entry.
326  const MCExpr *CSOffsetExpr = MCBinaryExpr::createSub(
327  MCSymbolRefExpr::create(MILabel, OutContext),
328  MCSymbolRefExpr::create(AP.CurrentFnSymForSize, OutContext), OutContext);
329 
330  CSInfos.emplace_back(CSOffsetExpr, ID, std::move(Locations),
331  std::move(LiveOuts));
332 
333  // Record the stack size of the current function.
334  const MachineFrameInfo *MFI = AP.MF->getFrameInfo();
335  const TargetRegisterInfo *RegInfo = AP.MF->getSubtarget().getRegisterInfo();
336  bool HasDynamicFrameSize =
337  MFI->hasVarSizedObjects() || RegInfo->needsStackRealignment(*(AP.MF));
338  FnStackSize[AP.CurrentFnSym] =
339  HasDynamicFrameSize ? UINT64_MAX : MFI->getStackSize();
340 }
341 
343  assert(MI.getOpcode() == TargetOpcode::STACKMAP && "expected stackmap");
344 
345  int64_t ID = MI.getOperand(0).getImm();
346  recordStackMapOpers(MI, ID, std::next(MI.operands_begin(), 2),
347  MI.operands_end());
348 }
349 
351  assert(MI.getOpcode() == TargetOpcode::PATCHPOINT && "expected patchpoint");
352 
353  PatchPointOpers opers(&MI);
354  int64_t ID = opers.getMetaOper(PatchPointOpers::IDPos).getImm();
355 
356  auto MOI = std::next(MI.operands_begin(), opers.getStackMapStartIdx());
357  recordStackMapOpers(MI, ID, MOI, MI.operands_end(),
358  opers.isAnyReg() && opers.hasDef());
359 
360 #ifndef NDEBUG
361  // verify anyregcc
362  auto &Locations = CSInfos.back().Locations;
363  if (opers.isAnyReg()) {
364  unsigned NArgs = opers.getMetaOper(PatchPointOpers::NArgPos).getImm();
365  for (unsigned i = 0, e = (opers.hasDef() ? NArgs + 1 : NArgs); i != e; ++i)
366  assert(Locations[i].Type == Location::Register &&
367  "anyreg arg must be in reg.");
368  }
369 #endif
370 }
372  assert(MI.getOpcode() == TargetOpcode::STATEPOINT && "expected statepoint");
373 
374  StatepointOpers opers(&MI);
375  // Record all the deopt and gc operands (they're contiguous and run from the
376  // initial index to the end of the operand list)
377  const unsigned StartIdx = opers.getVarIdx();
378  recordStackMapOpers(MI, opers.getID(), MI.operands_begin() + StartIdx,
379  MI.operands_end(), false);
380 }
381 
382 /// Emit the stackmap header.
383 ///
384 /// Header {
385 /// uint8 : Stack Map Version (currently 1)
386 /// uint8 : Reserved (expected to be 0)
387 /// uint16 : Reserved (expected to be 0)
388 /// }
389 /// uint32 : NumFunctions
390 /// uint32 : NumConstants
391 /// uint32 : NumRecords
392 void StackMaps::emitStackmapHeader(MCStreamer &OS) {
393  // Header.
394  OS.EmitIntValue(StackMapVersion, 1); // Version.
395  OS.EmitIntValue(0, 1); // Reserved.
396  OS.EmitIntValue(0, 2); // Reserved.
397 
398  // Num functions.
399  DEBUG(dbgs() << WSMP << "#functions = " << FnStackSize.size() << '\n');
400  OS.EmitIntValue(FnStackSize.size(), 4);
401  // Num constants.
402  DEBUG(dbgs() << WSMP << "#constants = " << ConstPool.size() << '\n');
403  OS.EmitIntValue(ConstPool.size(), 4);
404  // Num callsites.
405  DEBUG(dbgs() << WSMP << "#callsites = " << CSInfos.size() << '\n');
406  OS.EmitIntValue(CSInfos.size(), 4);
407 }
408 
409 /// Emit the function frame record for each function.
410 ///
411 /// StkSizeRecord[NumFunctions] {
412 /// uint64 : Function Address
413 /// uint64 : Stack Size
414 /// }
415 void StackMaps::emitFunctionFrameRecords(MCStreamer &OS) {
416  // Function Frame records.
417  DEBUG(dbgs() << WSMP << "functions:\n");
418  for (auto const &FR : FnStackSize) {
419  DEBUG(dbgs() << WSMP << "function addr: " << FR.first
420  << " frame size: " << FR.second);
421  OS.EmitSymbolValue(FR.first, 8);
422  OS.EmitIntValue(FR.second, 8);
423  }
424 }
425 
426 /// Emit the constant pool.
427 ///
428 /// int64 : Constants[NumConstants]
429 void StackMaps::emitConstantPoolEntries(MCStreamer &OS) {
430  // Constant pool entries.
431  DEBUG(dbgs() << WSMP << "constants:\n");
432  for (const auto &ConstEntry : ConstPool) {
433  DEBUG(dbgs() << WSMP << ConstEntry.second << '\n');
434  OS.EmitIntValue(ConstEntry.second, 8);
435  }
436 }
437 
438 /// Emit the callsite info for each callsite.
439 ///
440 /// StkMapRecord[NumRecords] {
441 /// uint64 : PatchPoint ID
442 /// uint32 : Instruction Offset
443 /// uint16 : Reserved (record flags)
444 /// uint16 : NumLocations
445 /// Location[NumLocations] {
446 /// uint8 : Register | Direct | Indirect | Constant | ConstantIndex
447 /// uint8 : Size in Bytes
448 /// uint16 : Dwarf RegNum
449 /// int32 : Offset
450 /// }
451 /// uint16 : Padding
452 /// uint16 : NumLiveOuts
453 /// LiveOuts[NumLiveOuts] {
454 /// uint16 : Dwarf RegNum
455 /// uint8 : Reserved
456 /// uint8 : Size in Bytes
457 /// }
458 /// uint32 : Padding (only if required to align to 8 byte)
459 /// }
460 ///
461 /// Location Encoding, Type, Value:
462 /// 0x1, Register, Reg (value in register)
463 /// 0x2, Direct, Reg + Offset (frame index)
464 /// 0x3, Indirect, [Reg + Offset] (spilled value)
465 /// 0x4, Constant, Offset (small constant)
466 /// 0x5, ConstIndex, Constants[Offset] (large constant)
467 void StackMaps::emitCallsiteEntries(MCStreamer &OS) {
468  DEBUG(print(dbgs()));
469  // Callsite entries.
470  for (const auto &CSI : CSInfos) {
471  const LocationVec &CSLocs = CSI.Locations;
472  const LiveOutVec &LiveOuts = CSI.LiveOuts;
473 
474  // Verify stack map entry. It's better to communicate a problem to the
475  // runtime than crash in case of in-process compilation. Currently, we do
476  // simple overflow checks, but we may eventually communicate other
477  // compilation errors this way.
478  if (CSLocs.size() > UINT16_MAX || LiveOuts.size() > UINT16_MAX) {
479  OS.EmitIntValue(UINT64_MAX, 8); // Invalid ID.
480  OS.EmitValue(CSI.CSOffsetExpr, 4);
481  OS.EmitIntValue(0, 2); // Reserved.
482  OS.EmitIntValue(0, 2); // 0 locations.
483  OS.EmitIntValue(0, 2); // padding.
484  OS.EmitIntValue(0, 2); // 0 live-out registers.
485  OS.EmitIntValue(0, 4); // padding.
486  continue;
487  }
488 
489  OS.EmitIntValue(CSI.ID, 8);
490  OS.EmitValue(CSI.CSOffsetExpr, 4);
491 
492  // Reserved for flags.
493  OS.EmitIntValue(0, 2);
494  OS.EmitIntValue(CSLocs.size(), 2);
495 
496  for (const auto &Loc : CSLocs) {
497  OS.EmitIntValue(Loc.Type, 1);
498  OS.EmitIntValue(Loc.Size, 1);
499  OS.EmitIntValue(Loc.Reg, 2);
500  OS.EmitIntValue(Loc.Offset, 4);
501  }
502 
503  // Num live-out registers and padding to align to 4 byte.
504  OS.EmitIntValue(0, 2);
505  OS.EmitIntValue(LiveOuts.size(), 2);
506 
507  for (const auto &LO : LiveOuts) {
508  OS.EmitIntValue(LO.DwarfRegNum, 2);
509  OS.EmitIntValue(0, 1);
510  OS.EmitIntValue(LO.Size, 1);
511  }
512  // Emit alignment to 8 byte.
513  OS.EmitValueToAlignment(8);
514  }
515 }
516 
517 /// Serialize the stackmap data.
519  (void)WSMP;
520  // Bail out if there's no stack map data.
521  assert((!CSInfos.empty() || (CSInfos.empty() && ConstPool.empty())) &&
522  "Expected empty constant pool too!");
523  assert((!CSInfos.empty() || (CSInfos.empty() && FnStackSize.empty())) &&
524  "Expected empty function record too!");
525  if (CSInfos.empty())
526  return;
527 
528  MCContext &OutContext = AP.OutStreamer->getContext();
529  MCStreamer &OS = *AP.OutStreamer;
530 
531  // Create the section.
532  MCSection *StackMapSection =
533  OutContext.getObjectFileInfo()->getStackMapSection();
534  OS.SwitchSection(StackMapSection);
535 
536  // Emit a dummy symbol to force section inclusion.
537  OS.EmitLabel(OutContext.getOrCreateSymbol(Twine("__LLVM_StackMaps")));
538 
539  // Serialize data.
540  DEBUG(dbgs() << "********** Stack Map Output **********\n");
541  emitStackmapHeader(OS);
542  emitFunctionFrameRecords(OS);
543  emitConstantPoolEntries(OS);
544  emitCallsiteEntries(OS);
545  OS.AddBlankLine();
546 
547  // Clean up.
548  CSInfos.clear();
549  ConstPool.clear();
550 }
static bool isReg(const MCInst &MI, unsigned OpNo)
bool isInt< 32 >(int64_t x)
Definition: MathExtras.h:276
bool isImplicit() const
Instances of this class represent a uniqued identifier for a section in the current translation unit...
Definition: MCSection.h:48
void push_back(const T &Elt)
Definition: SmallVector.h:222
mop_iterator operands_end()
Definition: MachineInstr.h:290
MCSection * getStackMapSection() const
int getDwarfRegNum(unsigned RegNum, bool isEH) const
Map a target register to an equivalent dwarf register number.
std::unique_ptr< MCStreamer > OutStreamer
This is the MCStreamer object for the file we are generating.
Definition: AsmPrinter.h:83
static const MCSymbolRefExpr * create(const MCSymbol *Symbol, MCContext &Ctx)
Definition: MCExpr.h:315
void EmitSymbolValue(const MCSymbol *Sym, unsigned Size, bool IsSectionRelative=false)
Special case of EmitValue that avoids the client having to pass in a MCExpr for MCSymbols.
Definition: MCStreamer.cpp:115
bool isValid() const
isValid - returns true if this iterator is not yet at the end.
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:39
virtual void AddBlankLine()
AddBlankLine - Emit a blank line to a .s file to pretty it up.
Definition: MCStreamer.h:266
A Stackmap instruction captures the location of live variables at its position in the instruction str...
const MachineFunction * MF
The current machine function.
Definition: AsmPrinter.h:86
unsigned getVarIdx() const
Get the operand index of the variable list of non-argument operands.
Definition: StackMaps.h:69
unsigned getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const
For a given register pair, return the sub-register index if the second register is a sub-register of ...
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects...
unsigned getSize() const
getSize - Return the size of the register in bytes, which is also the size of a stack slot allocated ...
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MCSuperRegIterator enumerates all super-registers of Reg.
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:79
bool isImm() const
isImm - Tests if this is a MO_Immediate operand.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:98
bool isReg() const
isReg - Tests if this is a MO_Register operand.
Base class for the full range of assembler expressions which are needed for parsing.
Definition: MCExpr.h:33
Reg
All possible values of the reg field in the ModR/M byte.
static cl::opt< int > StackMapVersion("stackmap-version", cl::init(1), cl::desc("Specify the stackmap encoding version (default = 1)"))
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted...
unsigned getNumOperands() const
Access to explicit operands of the instruction.
Definition: MachineInstr.h:271
Context object for machine code objects.
Definition: MCContext.h:48
unsigned getNumRegs() const
Return the number of registers this target has (useful for sizing arrays holding per register informa...
PatchPointOpers(const MachineInstr *MI)
Definition: StackMaps.cpp:38
static const MCBinaryExpr * createSub(const MCExpr *LHS, const MCExpr *RHS, MCContext &Ctx)
Definition: MCExpr.h:514
int64_t getImm() const
virtual void EmitIntValue(uint64_t Value, unsigned Size)
Special case of EmitValue that avoids the client having to pass in a MCExpr for constant integers...
Definition: MCStreamer.cpp:79
void recordStatepoint(const MachineInstr &MI)
Generate a stackmap record for a statepoint instruction.
Definition: StackMaps.cpp:371
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
Definition: MachineInstr.h:267
initializer< Ty > init(const Ty &Val)
Definition: CommandLine.h:325
Streaming machine code generation interface.
Definition: MCStreamer.h:157
Patchable call instruction - this instruction represents a call to a constant address, followed by a series of NOPs.
MCSymbol * createTempSymbol(bool CanBeUnnamed=true)
Create and return a new assembler temporary symbol with a unique but unspecified name.
Definition: MCContext.cpp:222
MCSymbol * CurrentFnSym
The symbol for the current function.
Definition: AsmPrinter.h:98
virtual bool needsStackRealignment(const MachineFunction &MF) const
needsStackRealignment - true if storage within the function requires the stack pointer to be aligned ...
The instances of the Type class are immutable: once they are created, they are never changed...
Definition: Type.h:45
virtual void SwitchSection(MCSection *Section, const MCExpr *Subsection=nullptr)
Set the current section where code is being emitted to Section.
Definition: MCStreamer.cpp:701
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:273
TargetMachine & TM
Target machine description.
Definition: AsmPrinter.h:70
This class is intended to be used as a driving class for all asm writers.
Definition: AsmPrinter.h:66
virtual void EmitValueToAlignment(unsigned ByteAlignment, int64_t Value=0, unsigned ValueSize=1, unsigned MaxBytesToEmit=0)
Emit some number of copies of Value until the byte alignment ByteAlignment is reached.
Definition: MCStreamer.cpp:688
size_type size() const
Definition: MapVector.h:44
MI-level patchpoint operands.
Definition: StackMaps.h:40
unsigned getSubReg() const
int getLLVMRegNum(unsigned RegNum, bool isEH) const
Map a dwarf register back to a target register.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
void recordPatchPoint(const MachineInstr &MI)
Generate a stackmap record for a patchpoint instruction.
Definition: StackMaps.cpp:350
void serializeToStackMapSection()
If there is any stack map data, create a stack map section and serialize the map info into it...
Definition: StackMaps.cpp:518
std::pair< iterator, bool > insert(const std::pair< KeyT, ValueT > &KV)
Definition: MapVector.h:91
virtual void EmitLabel(MCSymbol *Symbol)
Emit a label for Symbol into the current section.
Definition: MCStreamer.cpp:203
const DataLayout * getDataLayout() const
Deprecated in 3.7, will be removed in 3.8.
MachineOperand class - Representation of each machine instruction operand.
bool isRegLiveOut() const
isRegLiveOut - Tests if this is a MO_RegisterLiveOut operand.
unsigned getNextScratchIdx(unsigned StartIdx=0) const
Get the next scratch register operand index.
Definition: StackMaps.cpp:55
MachineFrameInfo * getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:123
void recordStackMap(const MachineInstr &MI)
Generate a stackmap record for a stackmap instruction.
Definition: StackMaps.cpp:342
static unsigned getReg(const void *D, unsigned RC, unsigned RegNo)
const TargetRegisterClass * getMinimalPhysRegClass(unsigned Reg, MVT VT=MVT::Other) const
getMinimalPhysRegClass - Returns the Register Class of a physical register of the given type...
bool isSuperRegister(unsigned RegA, unsigned RegB) const
Returns true if RegB is a super-register of RegA.
Representation of each machine instruction.
Definition: MachineInstr.h:51
static bool isPhysicalRegister(unsigned Reg)
isPhysicalRegister - Return true if the specified register number is in the physical register namespa...
const uint32_t * getRegLiveOut() const
getRegLiveOut - Returns a bit mask of live-out registers.
MCSymbol * getOrCreateSymbol(const Twine &Name)
Lookup the symbol inside with the specified Name.
Definition: MCContext.cpp:111
StackMaps(AsmPrinter &AP)
Definition: StackMaps.cpp:72
Call instruction with associated vm state for deoptimization and list of live pointers for relocation...
#define I(x, y, z)
Definition: MD5.cpp:54
unsigned getPointerSizeInBits(unsigned AS=0) const
Layout pointer size, in bits FIXME: The defaults need to be removed once all of the backends/clients ...
Definition: DataLayout.h:329
MI-level Statepoint operands.
Definition: StackMaps.h:94
unsigned getSubRegIdxOffset(unsigned Idx) const
Get the offset of the bit range covered by a sub-register index.
bool hasVarSizedObjects() const
This method may be called any time after instruction selection is complete to determine if the stack ...
void EmitValue(const MCExpr *Value, unsigned Size, const SMLoc &Loc=SMLoc())
Definition: MCStreamer.cpp:110
iterator begin()
Definition: MapVector.h:46
unsigned getReg() const
getReg - Returns the register number.
mop_iterator operands_begin()
Definition: MachineInstr.h:289
const MCObjectFileInfo * getObjectFileInfo() const
Definition: MCContext.h:229
This class implements an extremely fast bulk output stream that can only output to a stream...
Definition: raw_ostream.h:38
#define DEBUG(X)
Definition: Debug.h:92
MCSymbol * CurrentFnSymForSize
The symbol used to represent the start of the current function for the purpose of calculating its siz...
Definition: AsmPrinter.h:103
const char * getName(unsigned RegNo) const
Return the human-readable symbolic target-specific name for the specified physical register...
static unsigned getDwarfRegNum(unsigned Reg, const TargetRegisterInfo *TRI)
Go up the super-register chain until we hit a valid dwarf register number.
Definition: StackMaps.cpp:78
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
unsigned getMetaIdx(unsigned Pos=0) const
Definition: StackMaps.h:56