LLVM  3.7.0
Public Types | Public Member Functions | Static Public Member Functions | Friends | List of all members
llvm::MachineOperand Class Reference

MachineOperand class - Representation of each machine instruction operand. More...

#include <MachineOperand.h>

Collaboration diagram for llvm::MachineOperand:
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Public Types

enum  MachineOperandType : unsigned char {
  MO_Register, MO_Immediate, MO_CImmediate, MO_FPImmediate,
  MO_MachineBasicBlock, MO_FrameIndex, MO_ConstantPoolIndex, MO_TargetIndex,
  MO_JumpTableIndex, MO_ExternalSymbol, MO_GlobalAddress, MO_BlockAddress,
  MO_RegisterMask, MO_RegisterLiveOut, MO_Metadata, MO_MCSymbol,
  MO_CFIIndex
}
 

Public Member Functions

MachineOperandType getType () const
 getType - Returns the MachineOperandType for this operand. More...
 
unsigned getTargetFlags () const
 
void setTargetFlags (unsigned F)
 
void addTargetFlag (unsigned F)
 
MachineInstrgetParent ()
 getParent - Return the instruction that this operand belongs to. More...
 
const MachineInstrgetParent () const
 
void clearParent ()
 clearParent - Reset the parent pointer. More...
 
void print (raw_ostream &os, const TargetRegisterInfo *TRI=nullptr) const
 
void print (raw_ostream &os, ModuleSlotTracker &MST, const TargetRegisterInfo *TRI=nullptr) const
 
bool isReg () const
 isReg - Tests if this is a MO_Register operand. More...
 
bool isImm () const
 isImm - Tests if this is a MO_Immediate operand. More...
 
bool isCImm () const
 isCImm - Test if this is a MO_CImmediate operand. More...
 
bool isFPImm () const
 isFPImm - Tests if this is a MO_FPImmediate operand. More...
 
bool isMBB () const
 isMBB - Tests if this is a MO_MachineBasicBlock operand. More...
 
bool isFI () const
 isFI - Tests if this is a MO_FrameIndex operand. More...
 
bool isCPI () const
 isCPI - Tests if this is a MO_ConstantPoolIndex operand. More...
 
bool isTargetIndex () const
 isTargetIndex - Tests if this is a MO_TargetIndex operand. More...
 
bool isJTI () const
 isJTI - Tests if this is a MO_JumpTableIndex operand. More...
 
bool isGlobal () const
 isGlobal - Tests if this is a MO_GlobalAddress operand. More...
 
bool isSymbol () const
 isSymbol - Tests if this is a MO_ExternalSymbol operand. More...
 
bool isBlockAddress () const
 isBlockAddress - Tests if this is a MO_BlockAddress operand. More...
 
bool isRegMask () const
 isRegMask - Tests if this is a MO_RegisterMask operand. More...
 
bool isRegLiveOut () const
 isRegLiveOut - Tests if this is a MO_RegisterLiveOut operand. More...
 
bool isMetadata () const
 isMetadata - Tests if this is a MO_Metadata operand. More...
 
bool isMCSymbol () const
 
bool isCFIIndex () const
 
unsigned getReg () const
 getReg - Returns the register number. More...
 
unsigned getSubReg () const
 
bool isUse () const
 
bool isDef () const
 
bool isImplicit () const
 
bool isDead () const
 
bool isKill () const
 
bool isUndef () const
 
bool isInternalRead () const
 
bool isEarlyClobber () const
 
bool isTied () const
 
bool isDebug () const
 
bool readsReg () const
 readsReg - Returns true if this operand reads the previous value of its register. More...
 
void setReg (unsigned Reg)
 Change the register this operand corresponds to. More...
 
void setSubReg (unsigned subReg)
 
void substVirtReg (unsigned Reg, unsigned SubIdx, const TargetRegisterInfo &)
 substVirtReg - Substitute the current register with the virtual subregister Reg:SubReg. More...
 
void substPhysReg (unsigned Reg, const TargetRegisterInfo &)
 substPhysReg - Substitute the current register with the physical register Reg, taking any existing SubReg into account. More...
 
void setIsUse (bool Val=true)
 
void setIsDef (bool Val=true)
 Change a def to a use, or a use to a def. More...
 
void setImplicit (bool Val=true)
 
void setIsKill (bool Val=true)
 
void setIsDead (bool Val=true)
 
void setIsUndef (bool Val=true)
 
void setIsInternalRead (bool Val=true)
 
void setIsEarlyClobber (bool Val=true)
 
void setIsDebug (bool Val=true)
 
int64_t getImm () const
 
const ConstantIntgetCImm () const
 
const ConstantFPgetFPImm () const
 
MachineBasicBlockgetMBB () const
 
int getIndex () const
 
const GlobalValuegetGlobal () const
 
const BlockAddressgetBlockAddress () const
 
MCSymbolgetMCSymbol () const
 
unsigned getCFIIndex () const
 
int64_t getOffset () const
 Return the offset from the symbol in this operand. More...
 
const char * getSymbolName () const
 
bool clobbersPhysReg (unsigned PhysReg) const
 clobbersPhysReg - Returns true if this RegMask operand clobbers PhysReg. More...
 
const uint32_t * getRegMask () const
 getRegMask - Returns a bit mask of registers preserved by this RegMask operand. More...
 
const uint32_t * getRegLiveOut () const
 getRegLiveOut - Returns a bit mask of live-out registers. More...
 
const MDNodegetMetadata () const
 
void setImm (int64_t immVal)
 
void setFPImm (const ConstantFP *CFP)
 
void setOffset (int64_t Offset)
 
void setIndex (int Idx)
 
void setMBB (MachineBasicBlock *MBB)
 
bool isIdenticalTo (const MachineOperand &Other) const
 isIdenticalTo - Return true if this operand is identical to the specified operand. More...
 
void ChangeToImmediate (int64_t ImmVal)
 ChangeToImmediate - Replace this operand with a new immediate operand of the specified value. More...
 
void ChangeToFPImmediate (const ConstantFP *FPImm)
 ChangeToFPImmediate - Replace this operand with a new FP immediate operand of the specified value. More...
 
void ChangeToES (const char *SymName, unsigned char TargetFlags=0)
 ChangeToES - Replace this operand with a new external symbol operand. More...
 
void ChangeToMCSymbol (MCSymbol *Sym)
 ChangeToMCSymbol - Replace this operand with a new MC symbol operand. More...
 
void ChangeToRegister (unsigned Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isDebug=false)
 ChangeToRegister - Replace this operand with a new register operand of the specified value. More...
 

Static Public Member Functions

static bool clobbersPhysReg (const uint32_t *RegMask, unsigned PhysReg)
 clobbersPhysReg - Returns true if this RegMask clobbers PhysReg. More...
 
static MachineOperand CreateImm (int64_t Val)
 
static MachineOperand CreateCImm (const ConstantInt *CI)
 
static MachineOperand CreateFPImm (const ConstantFP *CFP)
 
static MachineOperand CreateReg (unsigned Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false)
 
static MachineOperand CreateMBB (MachineBasicBlock *MBB, unsigned char TargetFlags=0)
 
static MachineOperand CreateFI (int Idx)
 
static MachineOperand CreateCPI (unsigned Idx, int Offset, unsigned char TargetFlags=0)
 
static MachineOperand CreateTargetIndex (unsigned Idx, int64_t Offset, unsigned char TargetFlags=0)
 
static MachineOperand CreateJTI (unsigned Idx, unsigned char TargetFlags=0)
 
static MachineOperand CreateGA (const GlobalValue *GV, int64_t Offset, unsigned char TargetFlags=0)
 
static MachineOperand CreateES (const char *SymName, unsigned char TargetFlags=0)
 
static MachineOperand CreateBA (const BlockAddress *BA, int64_t Offset, unsigned char TargetFlags=0)
 
static MachineOperand CreateRegMask (const uint32_t *Mask)
 CreateRegMask - Creates a register mask operand referencing Mask. More...
 
static MachineOperand CreateRegLiveOut (const uint32_t *Mask)
 
static MachineOperand CreateMetadata (const MDNode *Meta)
 
static MachineOperand CreateMCSymbol (MCSymbol *Sym, unsigned char TargetFlags=0)
 
static MachineOperand CreateCFIIndex (unsigned CFIIndex)
 

Friends

class MachineInstr
 
class MachineRegisterInfo
 
hash_code hash_value (const MachineOperand &MO)
 MachineOperand hash_value overload. More...
 

Detailed Description

MachineOperand class - Representation of each machine instruction operand.

This class isn't a POD type because it has a private constructor, but its destructor must be trivial. Functions like MachineInstr::addOperand(), MachineRegisterInfo::moveOperands(), and MF::DeleteMachineInstr() depend on not having to call the MachineOperand destructor.

Definition at line 44 of file MachineOperand.h.

Member Enumeration Documentation

Enumerator
MO_Register 

Register operand.

MO_Immediate 

Immediate operand.

MO_CImmediate 

Immediate >64bit operand.

MO_FPImmediate 

Floating-point immediate operand.

MO_MachineBasicBlock 

MachineBasicBlock reference.

MO_FrameIndex 

Abstract Stack Frame Index.

MO_ConstantPoolIndex 

Address of indexed Constant in Constant Pool.

MO_TargetIndex 

Target-dependent index+offset operand.

MO_JumpTableIndex 

Address of indexed Jump Table for switch.

MO_ExternalSymbol 

Name of external global symbol.

MO_GlobalAddress 

Address of a global value.

MO_BlockAddress 

Address of a basic block.

MO_RegisterMask 

Mask of preserved registers.

MO_RegisterLiveOut 

Mask of live-out registers.

MO_Metadata 

Metadata reference (for debug info)

MO_MCSymbol 

MCSymbol reference (for debug/eh info)

MO_CFIIndex 

MCCFIInstruction index.

Definition at line 46 of file MachineOperand.h.

Member Function Documentation

void llvm::MachineOperand::addTargetFlag ( unsigned  F)
inline

Definition at line 199 of file MachineOperand.h.

References F(), and isReg().

Referenced by llvm::HexagonInstrInfo::immediateExtend().

void MachineOperand::ChangeToES ( const char *  SymName,
unsigned char  TargetFlags = 0 
)

ChangeToES - Replace this operand with a new external symbol operand.

Definition at line 145 of file MachineInstr.cpp.

References isReg(), isTied(), MO_ExternalSymbol, setOffset(), and setTargetFlags().

void MachineOperand::ChangeToFPImmediate ( const ConstantFP FPImm)

ChangeToFPImmediate - Replace this operand with a new FP immediate operand of the specified value.

If an operand is known to be an FP immediate already, the setFPImm method should be used.

Definition at line 136 of file MachineInstr.cpp.

References isReg(), isTied(), and MO_FPImmediate.

void MachineOperand::ChangeToImmediate ( int64_t  ImmVal)
void MachineOperand::ChangeToMCSymbol ( MCSymbol Sym)

ChangeToMCSymbol - Replace this operand with a new MC symbol operand.

Definition at line 157 of file MachineInstr.cpp.

References isReg(), isTied(), MO_MCSymbol, and Sym.

void MachineOperand::ChangeToRegister ( unsigned  Reg,
bool  isDef,
bool  isImp = false,
bool  isKill = false,
bool  isDead = false,
bool  isUndef = false,
bool  isDebug = false 
)
void llvm::MachineOperand::clearParent ( )
inline

clearParent - Reset the parent pointer.

The MachineOperand copy constructor also copies ParentMI, expecting the original to be deleted. If a MachineOperand is ever stored outside a MachineInstr, the parent pointer must be cleared.

Never call clearParent() on an operand in a MachineInstr.

Definition at line 219 of file MachineOperand.h.

static bool llvm::MachineOperand::clobbersPhysReg ( const uint32_t *  RegMask,
unsigned  PhysReg 
)
inlinestatic
bool llvm::MachineOperand::clobbersPhysReg ( unsigned  PhysReg) const
inline

clobbersPhysReg - Returns true if this RegMask operand clobbers PhysReg.

Definition at line 482 of file MachineOperand.h.

References clobbersPhysReg(), and getRegMask().

static MachineOperand llvm::MachineOperand::CreateBA ( const BlockAddress BA,
int64_t  Offset,
unsigned char  TargetFlags = 0 
)
inlinestatic
static MachineOperand llvm::MachineOperand::CreateCFIIndex ( unsigned  CFIIndex)
inlinestatic

Definition at line 720 of file MachineOperand.h.

References CFIIndex, and MO_CFIIndex.

Referenced by llvm::MachineInstrBuilder::addCFIIndex().

static MachineOperand llvm::MachineOperand::CreateCImm ( const ConstantInt CI)
inlinestatic

Definition at line 585 of file MachineOperand.h.

References CI, and MO_CImmediate.

Referenced by llvm::MachineInstrBuilder::addCImm().

static MachineOperand llvm::MachineOperand::CreateCPI ( unsigned  Idx,
int  Offset,
unsigned char  TargetFlags = 0 
)
inlinestatic
static MachineOperand llvm::MachineOperand::CreateES ( const char *  SymName,
unsigned char  TargetFlags = 0 
)
inlinestatic
static MachineOperand llvm::MachineOperand::CreateFI ( int  Idx)
inlinestatic
static MachineOperand llvm::MachineOperand::CreateFPImm ( const ConstantFP CFP)
inlinestatic

Definition at line 591 of file MachineOperand.h.

References CFP, and MO_FPImmediate.

Referenced by llvm::MachineInstrBuilder::addFPImm().

static MachineOperand llvm::MachineOperand::CreateGA ( const GlobalValue GV,
int64_t  Offset,
unsigned char  TargetFlags = 0 
)
inlinestatic
static MachineOperand llvm::MachineOperand::CreateImm ( int64_t  Val)
inlinestatic
static MachineOperand llvm::MachineOperand::CreateJTI ( unsigned  Idx,
unsigned char  TargetFlags = 0 
)
inlinestatic
static MachineOperand llvm::MachineOperand::CreateMBB ( MachineBasicBlock MBB,
unsigned char  TargetFlags = 0 
)
inlinestatic

Definition at line 622 of file MachineOperand.h.

References MO_MachineBasicBlock, setMBB(), and setTargetFlags().

Referenced by llvm::MachineInstrBuilder::addMBB().

static MachineOperand llvm::MachineOperand::CreateMCSymbol ( MCSymbol Sym,
unsigned char  TargetFlags = 0 
)
inlinestatic

Definition at line 711 of file MachineOperand.h.

References MO_MCSymbol, setOffset(), setTargetFlags(), and Sym.

Referenced by llvm::MachineInstrBuilder::addSym().

static MachineOperand llvm::MachineOperand::CreateMetadata ( const MDNode Meta)
inlinestatic

Definition at line 705 of file MachineOperand.h.

References MD, and MO_Metadata.

Referenced by llvm::MachineInstrBuilder::addMetadata().

static MachineOperand llvm::MachineOperand::CreateReg ( unsigned  Reg,
bool  isDef,
bool  isImp = false,
bool  isKill = false,
bool  isDead = false,
bool  isUndef = false,
bool  isEarlyClobber = false,
unsigned  SubReg = 0,
bool  isDebug = false,
bool  isInternalRead = false 
)
inlinestatic
static MachineOperand llvm::MachineOperand::CreateRegLiveOut ( const uint32_t *  Mask)
inlinestatic

Definition at line 699 of file MachineOperand.h.

References MO_RegisterLiveOut, and RegMask.

static MachineOperand llvm::MachineOperand::CreateRegMask ( const uint32_t *  Mask)
inlinestatic

CreateRegMask - Creates a register mask operand referencing Mask.

The operand does not take ownership of the memory referenced by Mask, it must remain valid for the lifetime of the operand.

A RegMask operand represents a set of non-clobbered physical registers on an instruction that clobbers many registers, typically a call. The bit mask has a bit set for each physreg that is preserved by this instruction, as described in the documentation for TargetRegisterInfo::getCallPreservedMask().

Any physreg with a 0 bit in the mask is clobbered by the instruction.

Definition at line 693 of file MachineOperand.h.

References MO_RegisterMask, and RegMask.

Referenced by llvm::MachineInstrBuilder::addRegMask(), and llvm::FastISel::selectPatchpoint().

static MachineOperand llvm::MachineOperand::CreateTargetIndex ( unsigned  Idx,
int64_t  Offset,
unsigned char  TargetFlags = 0 
)
inlinestatic
const BlockAddress* llvm::MachineOperand::getBlockAddress ( ) const
inline
unsigned llvm::MachineOperand::getCFIIndex ( ) const
inline

Definition at line 451 of file MachineOperand.h.

References isCFIIndex().

Referenced by llvm::AsmPrinter::emitCFIInstruction(), llvm::hash_value(), and isIdenticalTo().

const ConstantInt* llvm::MachineOperand::getCImm ( ) const
inline

Definition at line 415 of file MachineOperand.h.

References isCImm().

Referenced by emitDebugValueComment(), getDebugLocValue(), llvm::hash_value(), and isIdenticalTo().

const ConstantFP* llvm::MachineOperand::getFPImm ( ) const
inline
const GlobalValue* llvm::MachineOperand::getGlobal ( ) const
inline
int64_t llvm::MachineOperand::getImm ( ) const
inline

Definition at line 410 of file MachineOperand.h.

References isImm().

Referenced by llvm::DwarfUnit::addConstantValue(), llvm::MachineInstrBuilder::addDisp(), llvm::R600InstrInfo::addFlag(), adjustDefLatency(), llvm::SITargetLowering::AdjustInstrPostInstrSelection(), llvm::HexagonInstrInfo::analyzeCompare(), llvm::SystemZInstrInfo::analyzeCompare(), llvm::AArch64InstrInfo::analyzeCompare(), llvm::PPCInstrInfo::analyzeCompare(), llvm::ARMBaseInstrInfo::analyzeCompare(), llvm::X86InstrInfo::analyzeCompare(), llvm::R600InstrInfo::buildSlotOfVectorInstruction(), canCompareBeNewValueJump(), canFoldIntoCSel(), canShrink(), llvm::R600InstrInfo::clearFlag(), llvm::SIInstrInfo::commuteInstruction(), llvm::PPCInstrInfo::commuteInstruction(), llvm::X86InstrInfo::commuteInstruction(), compareMachineOp(), llvm::ARMBaseInstrInfo::convertToThreeAddress(), llvm::SystemZInstrInfo::convertToThreeAddress(), llvm::X86InstrInfo::convertToThreeAddress(), llvm::SparcFrameLowering::eliminateCallFramePseudoInstr(), llvm::MSP430FrameLowering::eliminateCallFramePseudoInstr(), llvm::XCoreFrameLowering::eliminateCallFramePseudoInstr(), llvm::Thumb1FrameLowering::eliminateCallFramePseudoInstr(), llvm::BPFRegisterInfo::eliminateFrameIndex(), llvm::MSP430RegisterInfo::eliminateFrameIndex(), llvm::SparcRegisterInfo::eliminateFrameIndex(), llvm::XCoreRegisterInfo::eliminateFrameIndex(), llvm::NVPTXRegisterInfo::eliminateFrameIndex(), llvm::HexagonRegisterInfo::eliminateFrameIndex(), llvm::AArch64RegisterInfo::eliminateFrameIndex(), llvm::X86RegisterInfo::eliminateFrameIndex(), llvm::PPCRegisterInfo::eliminateFrameIndex(), llvm::ARMBaseRegisterInfo::eliminateFrameIndex(), emitDebugValueComment(), llvm::AArch64FrameLowering::emitEpilogue(), llvm::PPCFrameLowering::emitEpilogue(), llvm::AArch64TargetLowering::EmitF128CSEL(), llvm::AsmPrinter::emitFrameAlloc(), EmitGCCInlineAsmStr(), llvm::SystemZAsmPrinter::EmitInstruction(), llvm::ARMAsmPrinter::EmitInstruction(), llvm::X86AsmPrinter::EmitInstruction(), llvm::MipsAsmPrinter::EmitInstruction(), llvm::R600TargetLowering::EmitInstrWithCustomInserter(), llvm::BPFTargetLowering::EmitInstrWithCustomInserter(), llvm::MSP430TargetLowering::EmitInstrWithCustomInserter(), llvm::PPCTargetLowering::EmitInstrWithCustomInserter(), llvm::X86TargetLowering::EmitInstrWithCustomInserter(), llvm::ARMAsmPrinter::EmitJumpTableTBInst(), EmitMSInlineAsmStr(), llvm::HexagonEvaluator::evaluate(), llvm::BitTracker::MachineEvaluator::evaluate(), llvm::SIInstrInfo::expandPostRAPseudo(), llvm::SparcTargetLowering::expandSelectCC(), llvm::X86InstrInfo::findCommutedOpIndices(), llvm::MachineInstr::findInlineAsmFlagIdx(), llvm::MachineInstr::findTiedOperandIdx(), llvm::SIInstrInfo::FoldImmediate(), llvm::PPCInstrInfo::FoldImmediate(), llvm::ARMBaseInstrInfo::FoldImmediate(), foldImmediates(), llvm::SystemZInstrInfo::foldMemoryOperandImpl(), llvm::AArch64InstrInfo::genAlternativeCodeSequence(), llvm::SystemZInstrInfo::getBranchInfo(), llvm::SystemZInstrInfo::getCompareAndBranch(), getDebugLocValue(), llvm::TargetInstrInfo::getExtractSubregInputs(), getFPOffsetInPrologue(), llvm::ARMBaseRegisterInfo::getFrameIndexInstrOffset(), llvm::StatepointOpers::getID(), llvm::TargetInstrInfo::getInsertSubregInputs(), llvm::ARMBaseInstrInfo::getInsertSubregLikeInputs(), llvm::getInstrPredicate(), llvm::MipsInstrInfo::GetInstSizeInBytes(), llvm::ARMBaseInstrInfo::GetInstSizeInBytes(), llvm::PPCInstrInfo::GetInstSizeInBytes(), llvm::NVPTXInstrInfo::getLdStCodeAddrSpace(), llvm::SIInstrInfo::getMemOpBaseRegImmOfs(), llvm::AArch64InstrInfo::getMemOpBaseRegImmOfs(), llvm::X86InstrInfo::getMemOpBaseRegImmOfs(), llvm::AArch64InstrInfo::getMemOpBaseRegImmOfsWidth(), getMemoryOpOffset(), getNumMicroOpsSwiftLdSt(), llvm::StatepointOpers::getNumPatchBytes(), llvm::ARMBaseInstrInfo::getPredicate(), llvm::TargetInstrInfo::getRegSequenceInputs(), llvm::TargetInstrInfo::getSPAdjust(), llvm::X86InstrInfo::getSPAdjust(), getSrcFromCopy(), llvm::R600InstrInfo::getSrcs(), getTruncatedShiftCount(), llvm::PatchPointOpers::getVarIdx(), llvm::StatepointOpers::getVarIdx(), llvm::AArch64InstrInfo::hasExtendedReg(), llvm::hash_value(), HashMachineInstr(), llvm::SIInstrInfo::hasModifiersSet(), llvm::AArch64InstrInfo::hasShiftedReg(), llvm::HexagonLowerToMC(), INITIALIZE_PASS(), invertBccCondition(), llvm::isAArch64FrameOffsetLegal(), llvm::AArch64InstrInfo::isAsCheapAsAMove(), llvm::AArch64InstrInfo::isCoalescableExtInstr(), isCompareZero(), llvm::HexagonInstrInfo::isConstExtended(), llvm::PPCRegisterInfo::isFrameOffsetLegal(), llvm::AArch64InstrInfo::isGPRCopy(), llvm::AArch64InstrInfo::isGPRZero(), isGreaterThanNBitTFRI(), isIdenticalTo(), llvm::SIInstrInfo::isInlineConstant(), llvm::HexagonInstrInfo::isLoadFromStackSlot(), llvm::SparcInstrInfo::isLoadFromStackSlot(), llvm::AArch64InstrInfo::isLoadFromStackSlot(), llvm::PPCInstrInfo::isLoadFromStackSlot(), llvm::ARMBaseInstrInfo::isLoadFromStackSlot(), isMatchingDecrement(), isMatchingIncrement(), isMatchingUpdateInsn(), llvm::HexagonInstrInfo::isPredicable(), llvm::R600InstrInfo::isPredicable(), llvm::ARMBaseInstrInfo::isPredicated(), isRedundantFlagInstr(), llvm::isScale(), llvm::AArch64InstrInfo::isScaledAddr(), isShift(), isSimpleBD12Move(), isSimpleMove(), llvm::SystemZInstrInfo::isStackSlotCopy(), llvm::HexagonInstrInfo::isStoreToStackSlot(), llvm::AArch64InstrInfo::isStoreToStackSlot(), llvm::SparcInstrInfo::isStoreToStackSlot(), llvm::PPCInstrInfo::isStoreToStackSlot(), llvm::ARMBaseInstrInfo::isStoreToStackSlot(), isSuitableForMask(), llvm::ARMBaseInstrInfo::isSwiftFastImmShift(), isZeroImm(), llvm::MipsInstrInfo::isZeroImm(), llvm::MSP430MCInstLower::Lower(), llvm::BPFMCInstLower::Lower(), llvm::XCoreMCInstLower::LowerOperand(), llvm::MipsMCInstLower::LowerOperand(), llvm::SystemZMCInstLower::lowerOperand(), llvm::AArch64MCInstLower::lowerOperand(), LowerOperand(), llvm::ARMAsmPrinter::lowerOperand(), llvm::LowerPPCMachineInstrToMCInst(), lowerRIEfLow(), lowerRIHigh(), lowerRILow(), lowerSubvectorLoad(), lowerSubvectorStore(), llvm::MachineInstr::mayLoad(), llvm::MachineInstr::mayStore(), llvm::SIInstrInfo::moveSMRDToVALU(), llvm::SIInstrInfo::moveToVALU(), llvm::PPCRegisterInfo::needsFrameBaseReg(), llvm::AArch64InstrInfo::optimizeCompareInstr(), llvm::PPCInstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), llvm::AArch64InstrInfo::optimizeCondBranch(), llvm::ARMBaseInstrInfo::optimizeSelect(), llvm::MachineInstr::print(), llvm::SystemZAsmPrinter::PrintAsmMemoryOperand(), llvm::HexagonAsmPrinter::PrintAsmMemoryOperand(), llvm::MipsAsmPrinter::PrintAsmMemoryOperand(), llvm::SystemZAsmPrinter::PrintAsmOperand(), llvm::ARMAsmPrinter::PrintAsmOperand(), llvm::X86AsmPrinter::PrintAsmOperand(), llvm::MipsAsmPrinter::PrintAsmOperand(), llvm::AsmPrinter::PrintAsmOperand(), llvm::MipsAsmPrinter::printFCCOperand(), printIntelMemReference(), printLeaMemReference(), llvm::HexagonAsmPrinter::printOperand(), llvm::ARMAsmPrinter::printOperand(), llvm::MipsAsmPrinter::printOperand(), printOperand(), printPCRelImm(), llvm::MipsAsmPrinter::printUnsignedImm(), llvm::MipsAsmPrinter::printUnsignedImm8(), llvm::StackMaps::recordStackMap(), llvm::PPCRegisterInfo::resolveFrameIndex(), llvm::R600InstrInfo::ReverseBranchCondition(), llvm::rewriteAArch64FrameIndex(), llvm::rewriteARMFrameIndex(), llvm::ThumbRegisterInfo::rewriteFrameIndex(), llvm::rewriteT2FrameIndex(), llvm::SelectionDAGISel::runOnMachineFunction(), llvm::AArch64InstrInfo::shouldClusterLoads(), llvm::SIInstrInfo::splitSMRD(), switch(), and llvm::X86InstrInfo::unfoldMemoryOperand().

int llvm::MachineOperand::getIndex ( ) const
inline

Definition at line 430 of file MachineOperand.h.

References isCPI(), isFI(), isJTI(), and isTargetIndex().

Referenced by llvm::ARMBaseInstrInfo::duplicate(), llvm::BPFRegisterInfo::eliminateFrameIndex(), llvm::MSP430RegisterInfo::eliminateFrameIndex(), llvm::SIRegisterInfo::eliminateFrameIndex(), llvm::SparcRegisterInfo::eliminateFrameIndex(), llvm::NVPTXRegisterInfo::eliminateFrameIndex(), llvm::XCoreRegisterInfo::eliminateFrameIndex(), llvm::HexagonRegisterInfo::eliminateFrameIndex(), llvm::MipsRegisterInfo::eliminateFrameIndex(), llvm::ThumbRegisterInfo::eliminateFrameIndex(), llvm::AArch64RegisterInfo::eliminateFrameIndex(), llvm::X86RegisterInfo::eliminateFrameIndex(), llvm::PPCRegisterInfo::eliminateFrameIndex(), llvm::ARMBaseRegisterInfo::eliminateFrameIndex(), emitDebugValueComment(), llvm::ARMAsmPrinter::EmitInstruction(), llvm::MipsAsmPrinter::EmitInstruction(), llvm::X86TargetLowering::EmitInstrWithCustomInserter(), llvm::ARMAsmPrinter::EmitJumpTableAddrs(), llvm::ARMAsmPrinter::EmitJumpTableInsts(), llvm::ARMAsmPrinter::EmitJumpTableTBInst(), llvm::TargetLoweringBase::emitPatchPoint(), getConstantFromPool(), llvm::MSP430MCInstLower::GetConstantPoolIndexSymbol(), llvm::SystemZMCInstLower::getExpr(), llvm::MSP430MCInstLower::GetJumpTableSymbol(), llvm::hash_value(), HashMachineInstr(), llvm::HexagonLowerToMC(), isIdenticalTo(), llvm::MipsSEInstrInfo::isLoadFromStackSlot(), llvm::XCoreInstrInfo::isLoadFromStackSlot(), llvm::HexagonInstrInfo::isLoadFromStackSlot(), llvm::SparcInstrInfo::isLoadFromStackSlot(), llvm::AArch64InstrInfo::isLoadFromStackSlot(), llvm::PPCInstrInfo::isLoadFromStackSlot(), llvm::ARMBaseInstrInfo::isLoadFromStackSlot(), isSimpleMove(), llvm::SystemZInstrInfo::isStackSlotCopy(), llvm::MipsSEInstrInfo::isStoreToStackSlot(), llvm::XCoreInstrInfo::isStoreToStackSlot(), llvm::HexagonInstrInfo::isStoreToStackSlot(), llvm::AArch64InstrInfo::isStoreToStackSlot(), llvm::SparcInstrInfo::isStoreToStackSlot(), llvm::PPCInstrInfo::isStoreToStackSlot(), llvm::ARMBaseInstrInfo::isStoreToStackSlot(), llvm::AArch64MCInstLower::lowerOperand(), llvm::ARMAsmPrinter::lowerOperand(), llvm::LowerPPCMachineInstrToMCInst(), LowerSymbolOperand(), MatchingStackOffset(), llvm::BranchFolder::OptimizeFunction(), llvm::HexagonAsmPrinter::printOperand(), llvm::ARMAsmPrinter::printOperand(), llvm::MipsAsmPrinter::printOperand(), printSymbolOperand(), llvm::ARMBaseInstrInfo::produceSameValue(), and llvm::ARMBaseInstrInfo::reMaterialize().

MachineBasicBlock* llvm::MachineOperand::getMBB ( ) const
inline
MCSymbol* llvm::MachineOperand::getMCSymbol ( ) const
inline
const MDNode* llvm::MachineOperand::getMetadata ( ) const
inline
int64_t llvm::MachineOperand::getOffset ( ) const
inline
MachineInstr* llvm::MachineOperand::getParent ( )
inline
const MachineInstr* llvm::MachineOperand::getParent ( ) const
inline

Definition at line 209 of file MachineOperand.h.

unsigned llvm::MachineOperand::getReg ( ) const
inline

getReg - Returns the register number.

Definition at line 267 of file MachineOperand.h.

References isReg().

Referenced by addLiveInRegs(), llvm::ScheduleDAGInstrs::addPhysRegDataDeps(), llvm::ScheduleDAGInstrs::addPhysRegDeps(), llvm::MachineInstr::addRegisterDead(), llvm::MachineInstr::addRegisterDefined(), llvm::MachineInstr::addRegisterDefReadUndef(), llvm::MachineInstr::addRegisterKilled(), llvm::MachineRegisterInfo::addRegOperandToUseList(), llvm::ScheduleDAGInstrs::addSchedBarrierDeps(), llvm::ScheduleDAGInstrs::addVRegDefDeps(), llvm::ScheduleDAGInstrs::addVRegUseDeps(), llvm::SITargetLowering::AdjustInstrPostInstrSelection(), llvm::ARMTargetLowering::AdjustInstrPostInstrSelection(), llvm::HexagonInstrInfo::analyzeCompare(), llvm::SystemZInstrInfo::analyzeCompare(), llvm::AArch64InstrInfo::analyzeCompare(), llvm::PPCInstrInfo::analyzeCompare(), llvm::ARMBaseInstrInfo::analyzeCompare(), llvm::X86InstrInfo::analyzeCompare(), llvm::MachineOperandIteratorBase::analyzePhysReg(), llvm::MachineOperandIteratorBase::analyzeVirtReg(), biasPhysRegCopy(), llvm::CriticalAntiDepBreaker::BreakAntiDependencies(), llvm::ARMBaseInstrInfo::breakPartialRegDependency(), llvm::ScheduleDAGInstrs::buildSchedGraph(), llvm::R600InstrInfo::buildSlotOfVectorInstruction(), canCombineWithMUL(), canCompareBeNewValueJump(), canFoldCopy(), canFoldIntoCSel(), canFoldIntoMOVCC(), llvm::X86InstrInfo::classifyLEAReg(), llvm::MachineInstr::clearRegisterDeads(), llvm::MachineInstr::clearRegisterKills(), clobbersCTR(), collectDebugValues(), CombineCVTAToLocal(), llvm::SIInstrInfo::commuteInstruction(), llvm::PPCInstrInfo::commuteInstruction(), llvm::TargetInstrInfo::commuteInstruction(), compareMachineOp(), computeOthers(), llvm::TargetSchedModel::computeOutputLatency(), llvm::ARMBaseInstrInfo::convertToThreeAddress(), llvm::SystemZInstrInfo::convertToThreeAddress(), llvm::X86InstrInfo::convertToThreeAddress(), copyHint(), llvm::SSAUpdaterTraits< MachineSSAUpdater >::CreateEmptyPHI(), llvm::ARMBaseInstrInfo::DefinesPredicate(), llvm::HexagonInstrInfo::DefinesPredicate(), llvm::PPCInstrInfo::DefinesPredicate(), llvm::BPFRegisterInfo::eliminateFrameIndex(), llvm::MSP430RegisterInfo::eliminateFrameIndex(), llvm::SIRegisterInfo::eliminateFrameIndex(), llvm::SparcRegisterInfo::eliminateFrameIndex(), llvm::XCoreRegisterInfo::eliminateFrameIndex(), llvm::ThumbRegisterInfo::eliminateFrameIndex(), llvm::PPCRegisterInfo::eliminateFrameIndex(), llvm::ARMBaseRegisterInfo::eliminateFrameIndex(), llvm::PPCTargetLowering::EmitAtomicBinary(), emitDebugValueComment(), llvm::PPCTargetLowering::emitEHSjLjLongJmp(), llvm::PPCTargetLowering::emitEHSjLjSetJmp(), llvm::AArch64TargetLowering::EmitF128CSEL(), llvm::AsmPrinter::emitImplicitDef(), llvm::SystemZAsmPrinter::EmitInstruction(), llvm::ARMAsmPrinter::EmitInstruction(), llvm::X86AsmPrinter::EmitInstruction(), llvm::R600TargetLowering::EmitInstrWithCustomInserter(), llvm::BPFTargetLowering::EmitInstrWithCustomInserter(), llvm::XCoreTargetLowering::EmitInstrWithCustomInserter(), llvm::MSP430TargetLowering::EmitInstrWithCustomInserter(), llvm::PPCTargetLowering::EmitInstrWithCustomInserter(), llvm::X86TargetLowering::EmitInstrWithCustomInserter(), emitKill(), EmitMonitor(), llvm::PPCTargetLowering::EmitPartwordAtomicBinary(), EmitPCMPSTRI(), EmitPCMPSTRM(), llvm::MSP430TargetLowering::EmitShiftInstr(), EmitXBegin(), eraseGPOpnd(), eraseIfDead(), Expand2AddrUndef(), llvm::SparcTargetLowering::expandAtomicRMW(), expandLoadStackGuard(), llvm::SIInstrInfo::expandPostRAPseudo(), llvm::SparcTargetLowering::expandSelectCC(), llvm::finalizeBundle(), findDeadCallerSavedReg(), findHoistingInsertPosAndDeps(), llvm::MachineInstr::findRegisterDefOperandIdx(), llvm::MachineInstr::findRegisterUseOperandIdx(), finishConvertToThreeAddress(), llvm::ARMFrameLowering::fixTCReturn(), llvm::ScheduleDAGInstrs::fixupKills(), llvm::SIInstrInfo::FoldImmediate(), llvm::PPCInstrInfo::FoldImmediate(), llvm::ARMBaseInstrInfo::FoldImmediate(), llvm::TargetInstrInfo::foldMemoryOperand(), llvm::AArch64InstrInfo::foldMemoryOperandImpl(), llvm::SystemZInstrInfo::foldMemoryOperandImpl(), llvm::X86InstrInfo::foldMemoryOperandImpl(), foldPatchpoint(), for(), forceReg(), llvm::RegScavenger::forward(), llvm::X86InstrInfo::genAlternativeCodeSequence(), genMadd(), genMaddR(), getCallTargetRegOpnd(), getDataDeps(), getDebugLocValue(), llvm::TargetInstrInfo::getExtractSubregInputs(), llvm::ARMBaseInstrInfo::getExtractSubregLikeInputs(), getFPOffsetInPrologue(), getFPReg(), llvm::MachineInstrExpressionTrait::getHashValue(), llvm::TargetInstrInfo::getInsertSubregInputs(), llvm::ARMBaseInstrInfo::getInsertSubregLikeInputs(), llvm::getInstrPredicate(), llvm::SIInstrInfo::getMemOpBaseRegImmOfs(), llvm::AArch64InstrInfo::getMemOpBaseRegImmOfs(), llvm::X86InstrInfo::getMemOpBaseRegImmOfs(), llvm::AArch64InstrInfo::getMemOpBaseRegImmOfsWidth(), getNumMicroOpsSwiftLdSt(), llvm::PPCInstrInfo::getOperandLatency(), llvm::ARMBaseInstrInfo::getOperandLatency(), llvm::SIInstrInfo::getOpRegClass(), llvm::ARMBaseInstrInfo::getPartialRegUpdateClearance(), llvm::X86InstrInfo::getPartialRegUpdateClearance(), getPHIDeps(), llvm::SSAUpdaterTraits< MachineSSAUpdater >::GetPHIValue(), GetPostIncrementOperand(), getPredicatedRegister(), llvm::TargetInstrInfo::getRegSequenceInputs(), llvm::ARMBaseInstrInfo::getRegSequenceLikeInputs(), getShuffleComment(), getSrcFromCopy(), llvm::R600InstrInfo::getSrcs(), llvm::X86InstrInfo::getUndefRegClearance(), llvm::SSAUpdaterTraits< MachineSSAUpdater >::GetUndefVal(), llvm::MachineSSAUpdater::GetValueInMiddleOfBlock(), HandleVRSaveUpdate(), llvm::hash_value(), HashMachineInstr(), hasLiveCondCodeDef(), hasRAWHazard(), hasReassocSibling(), hasVGPROperands(), hasVirtualRegDefsInBasicBlock(), hasYmmReg(), llvm::HexagonLowerToMC(), INITIALIZE_PASS(), llvm::HexagonInstrInfo::InsertBranch(), insertDivByZeroTrap(), isCandidateStore(), llvm::AArch64InstrInfo::isCoalescableExtInstr(), llvm::PPCInstrInfo::isCoalescableExtInstr(), llvm::X86InstrInfo::isCoalescableExtInstr(), llvm::MachineInstr::isConstantValuePHI(), isCopyToReg(), llvm::IsCPSRDead< MachineInstr >(), isCSRestore(), isDescribedByReg(), llvm::AArch64InstrInfo::isFPRCopy(), isFullCopyOf(), llvm::AArch64InstrInfo::isGPRCopy(), llvm::AArch64InstrInfo::isGPRZero(), isIdenticalTo(), llvm::MachineInstr::isIdenticalTo(), llvm::MachineInstr::isIdentityCopy(), llvm::MipsSEInstrInfo::isLoadFromStackSlot(), llvm::XCoreInstrInfo::isLoadFromStackSlot(), llvm::HexagonInstrInfo::isLoadFromStackSlot(), llvm::SparcInstrInfo::isLoadFromStackSlot(), llvm::AArch64InstrInfo::isLoadFromStackSlot(), llvm::PPCInstrInfo::isLoadFromStackSlot(), llvm::ARMBaseInstrInfo::isLoadFromStackSlot(), llvm::X86InstrInfo::isLoadFromStackSlot(), isLocalCopy(), isMatchingDecrement(), isMatchingIncrement(), isMatchingUpdateInsn(), llvm::NVPTXInstrInfo::isMoveInstr(), isNonFoldablePartialRegisterLoad(), isNopCopy(), isOperandKill(), llvm::SIInstrInfo::isOperandLegal(), isPhysicalRegCopy(), llvm::R600InstrInfo::isPredicated(), llvm::X86InstrInfo::isReallyTriviallyReMaterializable(), isRedundantFlagInstr(), IsSafeAndProfitableToMove(), llvm::X86InstrInfo::isSafeToClobberEFLAGS(), isSecondInstructionInSequence(), isShift(), isSimpleBD12Move(), isSimpleIndexCalc(), isSimpleMove(), isSourceDefinedByImplicitDef(), llvm::MipsSEInstrInfo::isStoreToStackSlot(), llvm::XCoreInstrInfo::isStoreToStackSlot(), llvm::HexagonInstrInfo::isStoreToStackSlot(), llvm::AArch64InstrInfo::isStoreToStackSlot(), llvm::SparcInstrInfo::isStoreToStackSlot(), llvm::PPCInstrInfo::isStoreToStackSlot(), llvm::ARMBaseInstrInfo::isStoreToStackSlot(), llvm::X86InstrInfo::isStoreToStackSlot(), isSuitableForMask(), isTwoAddrUse(), isVGPR(), llvm::X86InstrInfo::isX86_64ExtendedReg(), llvm::SIInstrInfo::legalizeOperands(), llvm::Mips16InstrInfo::loadImmediate(), llvm::MSP430MCInstLower::Lower(), llvm::BPFMCInstLower::Lower(), llvm::PPCRegisterInfo::lowerCRBitRestore(), llvm::PPCRegisterInfo::lowerCRBitSpilling(), llvm::PPCRegisterInfo::lowerCRRestore(), llvm::PPCRegisterInfo::lowerCRSpilling(), llvm::PPCRegisterInfo::lowerDynamicAlloc(), llvm::XCoreMCInstLower::LowerOperand(), llvm::MipsMCInstLower::LowerOperand(), llvm::SystemZMCInstLower::lowerOperand(), llvm::AArch64MCInstLower::lowerOperand(), LowerOperand(), llvm::ARMAsmPrinter::lowerOperand(), llvm::LowerPPCMachineInstrToMCInst(), lowerRIEfLow(), lowerRIHigh(), lowerRILow(), lowerSubvectorLoad(), lowerSubvectorStore(), llvm::PPCRegisterInfo::lowerVRSAVERestore(), llvm::PPCRegisterInfo::lowerVRSAVESpilling(), MaySpeculate(), MIIsInTerminatorSequence(), llvm::MachineRegisterInfo::moveOperands(), llvm::SIInstrInfo::moveSMRDToVALU(), llvm::SIInstrInfo::moveToVALU(), llvm::AArch64InstrInfo::optimizeCompareInstr(), llvm::PPCInstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), llvm::X86InstrInfo::optimizeCompareInstr(), llvm::AArch64InstrInfo::optimizeCondBranch(), llvm::X86InstrInfo::optimizeLoadInstr(), llvm::ARMBaseInstrInfo::optimizeSelect(), print(), llvm::MachineInstr::print(), llvm::SystemZAsmPrinter::PrintAsmMemoryOperand(), llvm::ARMAsmPrinter::PrintAsmMemoryOperand(), printAsmMRegister(), llvm::ARMAsmPrinter::PrintAsmOperand(), llvm::AMDGPUAsmPrinter::PrintAsmOperand(), llvm::MipsAsmPrinter::PrintAsmOperand(), printIntelMemReference(), printLeaMemReference(), printMemReference(), llvm::HexagonAsmPrinter::printOperand(), llvm::ARMAsmPrinter::printOperand(), llvm::MipsAsmPrinter::printOperand(), printOperand(), llvm::ARMBaseInstrInfo::produceSameValue(), llvm::MachineInstr::readsWritesVirtualRegister(), reassociateOps(), registerADRCandidate(), llvm::ARMBaseInstrInfo::reMaterialize(), llvm::TargetInstrInfo::reMaterialize(), llvm::X86InstrInfo::reMaterialize(), removeCopies(), removeIPMBasedCompare(), removeKillInfo(), llvm::MachineRegisterInfo::removeRegOperandFromUseList(), llvm::LiveVariables::removeVirtualRegisterDead(), llvm::LiveVariables::removeVirtualRegisterKilled(), llvm::LiveVariables::removeVirtualRegistersKilled(), llvm::PPCFrameLowering::replaceFPWithRealFP(), resultTests(), llvm::R600InstrInfo::ReverseBranchCondition(), llvm::rewriteAArch64FrameIndex(), llvm::ThumbRegisterInfo::rewriteFrameIndex(), llvm::rewriteT2FrameIndex(), llvm::SelectionDAGISel::runOnMachineFunction(), llvm::ThumbRegisterInfo::saveScavengerRegister(), llvm::RegScavenger::scavengeRegister(), llvm::R600SchedStrategy::schedNode(), llvm::FastISel::selectIntrinsicCall(), llvm::ARMBaseInstrInfo::setExecutionDomain(), llvm::MachineInstr::setPhysRegsDeadExcept(), setReg(), llvm::MachineBasicBlock::SplitCriticalEdge(), llvm::SIInstrInfo::splitSMRD(), llvm::MachineInstr::substituteRegister(), switch(), llvm::ScheduleDAGInstrs::toggleKillFlag(), TrackDefUses(), trackRegDefsUses(), transferImpOps(), llvm::tryFoldSPUpdateIntoPushPop(), tryOrrMovk(), trySequenceOfOnes(), tryToreplicateChunks(), llvm::X86InstrInfo::unfoldMemoryOperand(), UpdateCPSRDef(), UpdateCPSRUse(), llvm::AntiDepBreaker::UpdateDbgValue(), updateOperand(), UpdateOperandRegClass(), updatePhysDepsDownwards(), updatePhysDepsUpwards(), UpdatePredRedefs(), UseReg(), llvm::SIInstrInfo::usesConstantBus(), llvm::SIInstrInfo::verifyInstruction(), VerifyLowRegs(), and llvm::MachineRegisterInfo::verifyUseList().

const uint32_t* llvm::MachineOperand::getRegLiveOut ( ) const
inline

getRegLiveOut - Returns a bit mask of live-out registers.

Definition at line 494 of file MachineOperand.h.

References isRegLiveOut().

const uint32_t* llvm::MachineOperand::getRegMask ( ) const
inline

getRegMask - Returns a bit mask of registers preserved by this RegMask operand.

Definition at line 488 of file MachineOperand.h.

References isRegMask().

Referenced by clobbersPhysReg(), llvm::ScheduleDAGInstrs::fixupKills(), llvm::hash_value(), isIdenticalTo(), and trackRegDefsUses().

unsigned llvm::MachineOperand::getSubReg ( ) const
inline

Definition at line 272 of file MachineOperand.h.

References isReg().

Referenced by llvm::MachineInstr::addRegisterDefined(), llvm::MachineInstr::addRegisterDefReadUndef(), canFoldCopy(), llvm::SIInstrInfo::commuteInstruction(), llvm::PPCInstrInfo::commuteInstruction(), llvm::TargetInstrInfo::commuteInstruction(), llvm::SystemZInstrInfo::convertToThreeAddress(), copyHint(), llvm::HexagonEvaluator::evaluate(), llvm::SIInstrInfo::FoldImmediate(), llvm::X86InstrInfo::foldMemoryOperandImpl(), foldPatchpoint(), llvm::TargetInstrInfo::getExtractSubregInputs(), llvm::ARMBaseInstrInfo::getExtractSubregLikeInputs(), llvm::TargetInstrInfo::getInsertSubregInputs(), llvm::ARMBaseInstrInfo::getInsertSubregLikeInputs(), llvm::ARMBaseInstrInfo::getPartialRegUpdateClearance(), llvm::MachineInstr::getRegClassConstraintEffect(), llvm::TargetInstrInfo::getRegSequenceInputs(), llvm::ARMBaseInstrInfo::getRegSequenceLikeInputs(), getSrcFromCopy(), llvm::hash_value(), INITIALIZE_PASS(), llvm::X86InstrInfo::isCoalescableExtInstr(), llvm::MachineInstr::isFullCopy(), isIdenticalTo(), llvm::MachineInstr::isIdentityCopy(), llvm::AArch64InstrInfo::isLoadFromStackSlot(), llvm::ARMBaseInstrInfo::isLoadFromStackSlot(), llvm::X86InstrInfo::isLoadFromStackSlot(), llvm::AArch64InstrInfo::isStoreToStackSlot(), llvm::ARMBaseInstrInfo::isStoreToStackSlot(), llvm::X86InstrInfo::isStoreToStackSlot(), llvm::ARMAsmPrinter::lowerOperand(), llvm::LowerPPCMachineInstrToMCInst(), llvm::PPCInstrInfo::optimizeCompareInstr(), llvm::X86InstrInfo::optimizeLoadInstr(), print(), llvm::ARMAsmPrinter::printOperand(), readsReg(), llvm::MachineInstr::readsWritesVirtualRegister(), resultTests(), llvm::SIInstrInfo::splitSMRD(), substPhysReg(), substVirtReg(), and updateOperand().

const char* llvm::MachineOperand::getSymbolName ( ) const
inline
unsigned llvm::MachineOperand::getTargetFlags ( ) const
inline
MachineOperandType llvm::MachineOperand::getType ( ) const
inline
bool llvm::MachineOperand::isBlockAddress ( ) const
inline

isBlockAddress - Tests if this is a MO_BlockAddress operand.

Definition at line 252 of file MachineOperand.h.

References MO_BlockAddress.

Referenced by llvm::HexagonEvaluator::evaluate(), getBlockAddress(), getOffset(), llvm::HexagonInstrInfo::isConstExtended(), and setOffset().

bool llvm::MachineOperand::isCFIIndex ( ) const
inline

Definition at line 260 of file MachineOperand.h.

References MO_CFIIndex.

Referenced by getCFIIndex().

bool llvm::MachineOperand::isCImm ( ) const
inline

isCImm - Test if this is a MO_CImmediate operand.

Definition at line 234 of file MachineOperand.h.

References MO_CImmediate.

Referenced by emitDebugValueComment(), getCImm(), and getDebugLocValue().

bool llvm::MachineOperand::isCPI ( ) const
inline
bool llvm::MachineOperand::isDead ( ) const
inline
bool llvm::MachineOperand::isDebug ( ) const
inline

Definition at line 322 of file MachineOperand.h.

References isReg().

Referenced by ChangeToRegister(), CreateReg(), hasYmmReg(), setIsDef(), and setIsKill().

bool llvm::MachineOperand::isDef ( ) const
inline

Definition at line 282 of file MachineOperand.h.

References isReg().

Referenced by addLiveInRegs(), llvm::ScheduleDAGInstrs::addPhysRegDataDeps(), llvm::ScheduleDAGInstrs::addPhysRegDeps(), llvm::MachineInstr::addRegisterDead(), llvm::MachineInstr::addRegisterDefined(), llvm::MachineInstr::addRegisterDefReadUndef(), llvm::MachineRegisterInfo::addRegOperandToUseList(), llvm::ScheduleDAGInstrs::addSchedBarrierDeps(), llvm::ARMTargetLowering::AdjustInstrPostInstrSelection(), llvm::MachineOperandIteratorBase::analyzePhysReg(), llvm::MachineOperandIteratorBase::analyzeVirtReg(), llvm::CriticalAntiDepBreaker::BreakAntiDependencies(), llvm::ScheduleDAGInstrs::buildSchedGraph(), canFoldIntoMOVCC(), ChangeToRegister(), llvm::MachineInstr::clearRegisterDeads(), clobbersCTR(), llvm::ARMBaseInstrInfo::convertToThreeAddress(), CreateReg(), llvm::ARMBaseInstrInfo::DefinesPredicate(), llvm::HexagonInstrInfo::DefinesPredicate(), llvm::PPCInstrInfo::DefinesPredicate(), emitKill(), llvm::HexagonEvaluator::evaluate(), llvm::finalizeBundle(), findDeadCallerSavedReg(), findDefIdx(), llvm::MachineInstr::findRegisterDefOperandIdx(), llvm::ScheduleDAGInstrs::fixupKills(), for(), llvm::RegScavenger::forward(), llvm::MachineInstrExpressionTrait::getHashValue(), llvm::PPCInstrInfo::getInstrLatency(), GetPostIncrementOperand(), llvm::hash_value(), hasLiveCondCodeDef(), isIdenticalTo(), llvm::MachineInstr::isIdenticalTo(), llvm::MachineInstr::isRegTiedToUseOperand(), IsSafeAndProfitableToMove(), llvm::X86InstrInfo::isSafeToClobberEFLAGS(), llvm::Mips16InstrInfo::loadImmediate(), MaySpeculate(), MIIsInTerminatorSequence(), llvm::AArch64InstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), llvm::X86InstrInfo::optimizeCompareInstr(), llvm::X86InstrInfo::optimizeLoadInstr(), llvm::PatchPointOpers::PatchPointOpers(), llvm::HexagonInstrInfo::PredicateInstruction(), print(), llvm::MachineInstr::print(), printImplicitRegisterFlag(), llvm::LiveVariables::removeVirtualRegisterDead(), resultTests(), llvm::MachineInstr::setPhysRegsDeadExcept(), llvm::MachineInstr::tieOperands(), trackRegDefsUses(), llvm::X86InstrInfo::unfoldMemoryOperand(), UpdateCPSRUse(), updatePhysDepsDownwards(), and updatePhysDepsUpwards().

bool llvm::MachineOperand::isEarlyClobber ( ) const
inline

Definition at line 312 of file MachineOperand.h.

References isReg().

Referenced by createDeadDef(), CreateReg(), dumpMachineInstrRangeWithSlotIndex(), and print().

bool llvm::MachineOperand::isFI ( ) const
inline

isFI - Tests if this is a MO_FrameIndex operand.

Definition at line 240 of file MachineOperand.h.

References MO_FrameIndex.

Referenced by canFoldIntoMOVCC(), llvm::BPFRegisterInfo::eliminateFrameIndex(), emitDebugValueComment(), llvm::TargetLoweringBase::emitPatchPoint(), getFrameIndexOperandNum(), getIndex(), isCSRestore(), llvm::PPCRegisterInfo::isFrameOffsetLegal(), llvm::ARMBaseRegisterInfo::isFrameOffsetLegal(), llvm::SIInstrInfo::isImmOperandLegal(), llvm::isLeaMem(), llvm::MipsSEInstrInfo::isLoadFromStackSlot(), llvm::XCoreInstrInfo::isLoadFromStackSlot(), llvm::HexagonInstrInfo::isLoadFromStackSlot(), llvm::SparcInstrInfo::isLoadFromStackSlot(), llvm::AArch64InstrInfo::isLoadFromStackSlot(), llvm::PPCInstrInfo::isLoadFromStackSlot(), llvm::ARMBaseInstrInfo::isLoadFromStackSlot(), llvm::isMem(), llvm::SIInstrInfo::isOperandLegal(), isSimpleMove(), llvm::SystemZInstrInfo::isStackSlotCopy(), llvm::MipsSEInstrInfo::isStoreToStackSlot(), llvm::XCoreInstrInfo::isStoreToStackSlot(), llvm::HexagonInstrInfo::isStoreToStackSlot(), llvm::AArch64InstrInfo::isStoreToStackSlot(), llvm::SparcInstrInfo::isStoreToStackSlot(), llvm::PPCInstrInfo::isStoreToStackSlot(), llvm::ARMBaseInstrInfo::isStoreToStackSlot(), MatchingStackOffset(), llvm::AArch64RegisterInfo::needsFrameBaseReg(), llvm::ARMBaseRegisterInfo::needsFrameBaseReg(), llvm::ThumbRegisterInfo::resolveFrameIndex(), llvm::AArch64RegisterInfo::resolveFrameIndex(), llvm::PPCRegisterInfo::resolveFrameIndex(), llvm::ARMBaseRegisterInfo::resolveFrameIndex(), llvm::SelectionDAGISel::runOnMachineFunction(), setIndex(), UpdateOperandRegClass(), and llvm::SIInstrInfo::verifyInstruction().

bool llvm::MachineOperand::isFPImm ( ) const
inline
bool llvm::MachineOperand::isGlobal ( ) const
inline
bool MachineOperand::isIdenticalTo ( const MachineOperand Other) const
bool llvm::MachineOperand::isImm ( ) const
inline

isImm - Tests if this is a MO_Immediate operand.

Definition at line 232 of file MachineOperand.h.

References MO_Immediate.

Referenced by llvm::DwarfUnit::addConstantValue(), llvm::SystemZInstrInfo::analyzeCompare(), llvm::R600InstrInfo::buildSlotOfVectorInstruction(), canFoldIntoCSel(), llvm::SIInstrInfo::commuteInstruction(), llvm::SIInstrInfo::convertToThreeAddress(), llvm::X86RegisterInfo::eliminateFrameIndex(), emitDebugValueComment(), llvm::PPCFrameLowering::emitEpilogue(), llvm::X86TargetLowering::EmitInstrWithCustomInserter(), llvm::HexagonEvaluator::evaluate(), llvm::SIInstrInfo::expandPostRAPseudo(), llvm::MachineInstr::findInlineAsmFlagIdx(), llvm::MachineInstr::findTiedOperandIdx(), llvm::SIInstrInfo::FoldImmediate(), llvm::PPCInstrInfo::FoldImmediate(), llvm::ARMBaseInstrInfo::FoldImmediate(), foldImmediates(), llvm::AArch64InstrInfo::genAlternativeCodeSequence(), getDebugLocValue(), llvm::TargetInstrInfo::getExtractSubregInputs(), llvm::R600InstrInfo::getFlagOp(), getImm(), llvm::TargetInstrInfo::getInsertSubregInputs(), llvm::AArch64InstrInfo::getMemOpBaseRegImmOfs(), llvm::X86InstrInfo::getMemOpBaseRegImmOfs(), llvm::AArch64InstrInfo::getMemOpBaseRegImmOfsWidth(), llvm::TargetInstrInfo::getRegSequenceInputs(), llvm::AArch64InstrInfo::hasExtendedReg(), llvm::AArch64InstrInfo::hasShiftedReg(), llvm::HexagonInstrInfo::immediateExtend(), isCompareZero(), llvm::HexagonInstrInfo::isConstExtended(), llvm::AArch64InstrInfo::isGPRZero(), isGreaterThanNBitTFRI(), llvm::SIInstrInfo::isImmOperandLegal(), llvm::MachineInstr::isIndirectDebugValue(), llvm::SIInstrInfo::isInlineConstant(), llvm::isLeaMem(), llvm::SIInstrInfo::isLiteralConstant(), llvm::MipsSEInstrInfo::isLoadFromStackSlot(), llvm::XCoreInstrInfo::isLoadFromStackSlot(), llvm::HexagonInstrInfo::isLoadFromStackSlot(), llvm::SparcInstrInfo::isLoadFromStackSlot(), llvm::AArch64InstrInfo::isLoadFromStackSlot(), llvm::PPCInstrInfo::isLoadFromStackSlot(), llvm::ARMBaseInstrInfo::isLoadFromStackSlot(), isMatchingUpdateInsn(), llvm::SIInstrInfo::isOperandLegal(), llvm::X86InstrInfo::isReallyTriviallyReMaterializable(), llvm::isScale(), llvm::MipsSEInstrInfo::isStoreToStackSlot(), llvm::XCoreInstrInfo::isStoreToStackSlot(), llvm::HexagonInstrInfo::isStoreToStackSlot(), llvm::AArch64InstrInfo::isStoreToStackSlot(), llvm::SparcInstrInfo::isStoreToStackSlot(), llvm::PPCInstrInfo::isStoreToStackSlot(), llvm::ARMBaseInstrInfo::isStoreToStackSlot(), llvm::SIInstrInfo::isTriviallyReMaterializable(), isZeroImm(), llvm::MipsInstrInfo::isZeroImm(), llvm::SIInstrInfo::moveSMRDToVALU(), llvm::SIInstrInfo::moveToVALU(), llvm::TargetInstrInfo::PredicateInstruction(), llvm::MachineInstr::print(), llvm::HexagonAsmPrinter::PrintAsmMemoryOperand(), llvm::MipsAsmPrinter::PrintAsmMemoryOperand(), llvm::SystemZAsmPrinter::PrintAsmOperand(), llvm::HexagonAsmPrinter::PrintAsmOperand(), llvm::ARMAsmPrinter::PrintAsmOperand(), llvm::X86AsmPrinter::PrintAsmOperand(), llvm::MipsAsmPrinter::PrintAsmOperand(), printIntelMemReference(), llvm::MipsAsmPrinter::printUnsignedImm(), llvm::MipsAsmPrinter::printUnsignedImm8(), setImm(), llvm::R600InstrInfo::setImmOperand(), switch(), and llvm::SIInstrInfo::verifyInstruction().

bool llvm::MachineOperand::isImplicit ( ) const
inline
bool llvm::MachineOperand::isInternalRead ( ) const
inline
bool llvm::MachineOperand::isJTI ( ) const
inline
bool llvm::MachineOperand::isKill ( ) const
inline

Definition at line 297 of file MachineOperand.h.

References isReg().

Referenced by llvm::MachineInstr::addRegisterKilled(), llvm::MachineOperandIteratorBase::analyzePhysReg(), ChangeToRegister(), llvm::X86InstrInfo::classifyLEAReg(), llvm::MachineInstr::clearRegisterKills(), llvm::PPCInstrInfo::commuteInstruction(), llvm::TargetInstrInfo::commuteInstruction(), llvm::ARMBaseInstrInfo::convertToThreeAddress(), llvm::SystemZInstrInfo::convertToThreeAddress(), llvm::X86InstrInfo::convertToThreeAddress(), CreateReg(), llvm::AArch64TargetLowering::EmitF128CSEL(), llvm::finalizeBundle(), llvm::MachineInstr::findRegisterUseOperandIdx(), finishConvertToThreeAddress(), llvm::ScheduleDAGInstrs::fixupKills(), llvm::SIInstrInfo::FoldImmediate(), llvm::ARMBaseInstrInfo::FoldImmediate(), llvm::TargetInstrInfo::foldMemoryOperand(), genMadd(), genMaddR(), insertDivByZeroTrap(), InsertFPConstInst(), InsertFPImmInst(), InsertSPConstInst(), InsertSPImmInst(), llvm::MachineInstr::isIdenticalTo(), isOperandKill(), llvm::X86InstrInfo::isSafeToClobberEFLAGS(), llvm::PPCRegisterInfo::lowerCRBitSpilling(), llvm::PPCRegisterInfo::lowerCRSpilling(), llvm::PPCRegisterInfo::lowerDynamicAlloc(), llvm::PPCRegisterInfo::lowerVRSAVESpilling(), print(), reassociateOps(), removeKillInfo(), llvm::LiveVariables::removeVirtualRegisterKilled(), llvm::LiveVariables::removeVirtualRegistersKilled(), llvm::SIInstrInfo::splitSMRD(), llvm::ScheduleDAGInstrs::toggleKillFlag(), llvm::X86InstrInfo::unfoldMemoryOperand(), UpdateCPSRUse(), and updatePhysDepsDownwards().

bool llvm::MachineOperand::isMBB ( ) const
inline
bool llvm::MachineOperand::isMCSymbol ( ) const
inline

Definition at line 259 of file MachineOperand.h.

References MO_MCSymbol.

Referenced by getMCSymbol(), getOffset(), and setOffset().

bool llvm::MachineOperand::isMetadata ( ) const
inline

isMetadata - Tests if this is a MO_Metadata operand.

Definition at line 258 of file MachineOperand.h.

References MO_Metadata.

Referenced by llvm::MachineInstr::emitError(), EmitGCCInlineAsmStr(), EmitMSInlineAsmStr(), getMetadata(), and llvm::MachineInstr::print().

bool llvm::MachineOperand::isReg ( ) const
inline

isReg - Tests if this is a MO_Register operand.

Definition at line 230 of file MachineOperand.h.

References MO_Register.

Referenced by addLiveInRegs(), llvm::MachineInstr::addRegisterDead(), llvm::MachineInstr::addRegisterDefined(), llvm::MachineInstr::addRegisterDefReadUndef(), llvm::MachineInstr::addRegisterKilled(), llvm::ScheduleDAGInstrs::addSchedBarrierDeps(), addTargetFlag(), llvm::ARMTargetLowering::AdjustInstrPostInstrSelection(), llvm::MachineInstr::allDefsAreDead(), llvm::SystemZInstrInfo::analyzeCompare(), llvm::MachineOperandIteratorBase::analyzePhysReg(), llvm::MachineOperandIteratorBase::analyzeVirtReg(), llvm::CriticalAntiDepBreaker::BreakAntiDependencies(), llvm::ScheduleDAGInstrs::buildSchedGraph(), canCombineWithMUL(), canFoldIntoMOVCC(), ChangeToES(), ChangeToFPImmediate(), ChangeToImmediate(), ChangeToMCSymbol(), ChangeToRegister(), llvm::MachineInstr::clearKillInfo(), llvm::MachineInstr::clearRegisterDeads(), llvm::MachineInstr::clearRegisterKills(), clobbersCTR(), collectDebugValues(), llvm::SIInstrInfo::commuteInstruction(), llvm::TargetInstrInfo::commuteInstruction(), llvm::ARMBaseInstrInfo::convertToThreeAddress(), llvm::MachineInstr::copyImplicitOps(), llvm::ARMBaseInstrInfo::DefinesPredicate(), llvm::HexagonInstrInfo::DefinesPredicate(), llvm::PPCInstrInfo::DefinesPredicate(), earlyUseOperand(), emitDebugValueComment(), llvm::X86TargetLowering::EmitInstrWithCustomInserter(), emitKill(), EmitPCMPSTRI(), EmitPCMPSTRM(), eraseGPOpnd(), llvm::HexagonEvaluator::evaluate(), llvm::SIInstrInfo::expandPostRAPseudo(), llvm::finalizeBundle(), llvm::SIInstrInfo::findCommutedOpIndices(), llvm::TargetInstrInfo::findCommutedOpIndices(), findDeadCallerSavedReg(), findDefIdx(), findHoistingInsertPosAndDeps(), llvm::MachineInstr::findRegisterDefOperandIdx(), llvm::MachineInstr::findRegisterUseOperandIdx(), llvm::MachineInstr::findTiedOperandIdx(), findUseIdx(), finishConvertToThreeAddress(), llvm::ScheduleDAGInstrs::fixupKills(), llvm::SIInstrInfo::FoldImmediate(), llvm::PPCInstrInfo::FoldImmediate(), llvm::X86InstrInfo::foldMemoryOperandImpl(), for(), forceReg(), llvm::RegScavenger::forward(), FuseInst(), getCallTargetRegOpnd(), getDataDeps(), getDebugLocValue(), getFPReg(), llvm::MachineInstrExpressionTrait::getHashValue(), llvm::PPCInstrInfo::getInstrLatency(), llvm::AArch64InstrInfo::getMachineCombinerPatterns(), llvm::AArch64InstrInfo::getMemOpBaseRegImmOfs(), llvm::AArch64InstrInfo::getMemOpBaseRegImmOfsWidth(), llvm::MachineInstr::getNumExplicitOperands(), GetPostIncrementOperand(), getPredicatedRegister(), getReg(), llvm::MachineInstr::getRegClassConstraint(), llvm::MachineInstr::getRegClassConstraintEffect(), getShuffleComment(), getSubReg(), getTargetFlags(), llvm::SIInstrInfo::getVALUOp(), HandleVRSaveUpdate(), hasLiveCondCodeDef(), hasVGPROperands(), hasVirtualRegDefsInBasicBlock(), hasYmmReg(), INITIALIZE_PASS(), llvm::IsCPSRDead< MachineInstr >(), isDead(), isDebug(), isDef(), isDescribedByReg(), isEarlyClobber(), llvm::AArch64InstrInfo::isFPRCopy(), llvm::MachineInstr::isIdenticalTo(), isImplicit(), llvm::MachineInstr::isIndirectDebugValue(), isInternalRead(), isKill(), llvm::isLeaMem(), llvm::ARMBaseInstrInfo::isLoadFromStackSlot(), llvm::isMem(), isMemoryOp(), llvm::NVPTXInstrInfo::isMoveInstr(), llvm::SIInstrInfo::isOperandLegal(), llvm::X86InstrInfo::isReallyTriviallyReMaterializable(), llvm::MachineInstr::isRegTiedToDefOperand(), llvm::MachineInstr::isRegTiedToUseOperand(), IsSafeAndProfitableToMove(), llvm::X86InstrInfo::isSafeToClobberEFLAGS(), llvm::ARMBaseInstrInfo::isStoreToStackSlot(), isTied(), isTwoAddrUse(), isUndef(), isUse(), isVGPR(), llvm::X86InstrInfo::isX86_64ExtendedReg(), llvm::SIInstrInfo::legalizeOperands(), llvm::SIInstrInfo::legalizeOpWithMove(), llvm::Mips16InstrInfo::loadImmediate(), llvm::SystemZMCInstLower::lower(), MaySpeculate(), MIIsInTerminatorSequence(), llvm::MachineRegisterInfo::moveOperands(), llvm::SIInstrInfo::moveSMRDToVALU(), llvm::SIInstrInfo::moveToVALU(), llvm::AArch64InstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), llvm::X86InstrInfo::optimizeCompareInstr(), llvm::X86InstrInfo::optimizeLoadInstr(), llvm::HexagonInstrInfo::PredicateInstruction(), llvm::TargetInstrInfo::PredicateInstruction(), llvm::MachineInstr::print(), llvm::HexagonAsmPrinter::PrintAsmMemoryOperand(), llvm::ARMAsmPrinter::PrintAsmMemoryOperand(), llvm::HexagonAsmPrinter::PrintAsmOperand(), llvm::ARMAsmPrinter::PrintAsmOperand(), llvm::X86AsmPrinter::PrintAsmOperand(), llvm::MipsAsmPrinter::PrintAsmOperand(), readsReg(), llvm::MachineInstr::readsWritesVirtualRegister(), removeKillInfo(), llvm::MachineInstr::RemoveOperand(), llvm::LiveVariables::removeVirtualRegisterDead(), llvm::LiveVariables::removeVirtualRegisterKilled(), llvm::LiveVariables::removeVirtualRegistersKilled(), llvm::PPCFrameLowering::replaceFPWithRealFP(), resultTests(), llvm::ThumbRegisterInfo::saveScavengerRegister(), llvm::RegScavenger::scavengeRegister(), llvm::R600SchedStrategy::schedNode(), llvm::FastISel::selectIntrinsicCall(), setImplicit(), setIsDead(), setIsDebug(), setIsDef(), setIsEarlyClobber(), setIsInternalRead(), setIsKill(), setIsUndef(), llvm::MachineInstr::setPhysRegsDeadExcept(), setSubReg(), setTargetFlags(), llvm::MachineInstr::substituteRegister(), switch(), TrackDefUses(), trackRegDefsUses(), transferImpOps(), llvm::X86InstrInfo::unfoldMemoryOperand(), llvm::MachineInstr::untieRegOperand(), UpdateCPSRDef(), UpdateCPSRUse(), llvm::AntiDepBreaker::UpdateDbgValue(), updateOperand(), UpdateOperandRegClass(), updatePhysDepsDownwards(), updatePhysDepsUpwards(), UpdatePredRedefs(), UseReg(), llvm::SIInstrInfo::usesConstantBus(), llvm::SIInstrInfo::verifyInstruction(), VerifyLowRegs(), and llvm::MachineRegisterInfo::verifyUseList().

bool llvm::MachineOperand::isRegLiveOut ( ) const
inline

isRegLiveOut - Tests if this is a MO_RegisterLiveOut operand.

Definition at line 256 of file MachineOperand.h.

References MO_RegisterLiveOut.

Referenced by getRegLiveOut().

bool llvm::MachineOperand::isRegMask ( ) const
inline
bool llvm::MachineOperand::isSymbol ( ) const
inline
bool llvm::MachineOperand::isTargetIndex ( ) const
inline

isTargetIndex - Tests if this is a MO_TargetIndex operand.

Definition at line 244 of file MachineOperand.h.

References MO_TargetIndex.

Referenced by getIndex(), getOffset(), llvm::SIInstrInfo::isImmOperandLegal(), llvm::SIInstrInfo::isOperandLegal(), setIndex(), and setOffset().

bool llvm::MachineOperand::isTied ( ) const
inline
bool llvm::MachineOperand::isUndef ( ) const
inline
bool llvm::MachineOperand::isUse ( ) const
inline
void MachineOperand::print ( raw_ostream os,
const TargetRegisterInfo TRI = nullptr 
) const

Definition at line 300 of file MachineInstr.cpp.

Referenced by llvm::operator<<(), and llvm::MachineInstr::print().

void MachineOperand::print ( raw_ostream os,
ModuleSlotTracker MST,
const TargetRegisterInfo TRI = nullptr 
) const
bool llvm::MachineOperand::readsReg ( ) const
inline

readsReg - Returns true if this operand reads the previous value of its register.

A use operand with the <undef> flag set doesn't read its register. A sub-register def implicitly reads the other parts of the register being redefined unless the <undef> flag is set.

This refers to reading the register value from before the current instruction or bundle. Internal bundle reads are not included.

Definition at line 334 of file MachineOperand.h.

References getSubReg(), isInternalRead(), isReg(), isUndef(), and isUse().

Referenced by llvm::ScheduleDAGInstrs::addSchedBarrierDeps(), llvm::MachineOperandIteratorBase::analyzePhysReg(), llvm::MachineOperandIteratorBase::analyzeVirtReg(), llvm::ScheduleDAGInstrs::buildSchedGraph(), llvm::ConnectedVNInfoEqClasses::Distribute(), findUseIdx(), getDataDeps(), llvm::ARMBaseInstrInfo::getPartialRegUpdateClearance(), llvm::X86InstrInfo::getPartialRegUpdateClearance(), updatePhysDepsDownwards(), and updatePhysDepsUpwards().

void llvm::MachineOperand::setFPImm ( const ConstantFP CFP)
inline

Definition at line 513 of file MachineOperand.h.

References CFP, and isFPImm().

void llvm::MachineOperand::setImm ( int64_t  immVal)
inline
void llvm::MachineOperand::setImplicit ( bool  Val = true)
inline

Definition at line 370 of file MachineOperand.h.

References isReg(), and Val.

Referenced by llvm::X86InstrInfo::classifyLEAReg(), and llvm::ARMBaseInstrInfo::optimizeSelect().

void llvm::MachineOperand::setIndex ( int  Idx)
inline
void llvm::MachineOperand::setIsDead ( bool  Val = true)
inline
void llvm::MachineOperand::setIsDebug ( bool  Val = true)
inline

Definition at line 401 of file MachineOperand.h.

References isReg(), and Val.

Referenced by llvm::FastISel::selectIntrinsicCall().

void MachineOperand::setIsDef ( bool  Val = true)
void llvm::MachineOperand::setIsEarlyClobber ( bool  Val = true)
inline

Definition at line 396 of file MachineOperand.h.

References isReg(), and Val.

void llvm::MachineOperand::setIsInternalRead ( bool  Val = true)
inline

Definition at line 391 of file MachineOperand.h.

References isReg(), and Val.

Referenced by llvm::TargetInstrInfo::commuteInstruction(), llvm::finalizeBundle(), and INITIALIZE_PASS().

void llvm::MachineOperand::setIsKill ( bool  Val = true)
inline
void llvm::MachineOperand::setIsUndef ( bool  Val = true)
inline
void llvm::MachineOperand::setIsUse ( bool  Val = true)
inline

Definition at line 366 of file MachineOperand.h.

References setIsDef(), and Val.

void llvm::MachineOperand::setMBB ( MachineBasicBlock MBB)
inline
void llvm::MachineOperand::setOffset ( int64_t  Offset)
inline
void MachineOperand::setReg ( unsigned  Reg)
void llvm::MachineOperand::setSubReg ( unsigned  subReg)
inline
void llvm::MachineOperand::setTargetFlags ( unsigned  F)
inline
void MachineOperand::substPhysReg ( unsigned  Reg,
const TargetRegisterInfo TRI 
)

substPhysReg - Substitute the current register with the physical register Reg, taking any existing SubReg into account.

For instance, substPhysReg(EAX) will change reg1024:sub_8bit to AL.

Definition at line 80 of file MachineInstr.cpp.

References getSubReg(), llvm::MCRegisterInfo::getSubReg(), llvm::TargetRegisterInfo::isPhysicalRegister(), setReg(), and setSubReg().

Referenced by llvm::MachineRegisterInfo::replaceRegWith(), and llvm::MachineInstr::substituteRegister().

void MachineOperand::substVirtReg ( unsigned  Reg,
unsigned  SubIdx,
const TargetRegisterInfo TRI 
)

substVirtReg - Substitute the current register with the virtual subregister Reg:SubReg.

Take any existing SubReg index into account, using TargetRegisterInfo to compose the subreg indices if necessary. Reg must be a virtual register, SubIdx can be 0.

Definition at line 70 of file MachineInstr.cpp.

References llvm::TargetRegisterInfo::composeSubRegIndices(), getSubReg(), llvm::TargetRegisterInfo::isVirtualRegister(), setReg(), and setSubReg().

Referenced by llvm::MachineInstr::substituteRegister(), and updateOperand().

Friends And Related Function Documentation

hash_code hash_value ( const MachineOperand MO)
friend

MachineOperand hash_value overload.

Note that this includes the same information in the hash that isIdenticalTo uses for comparison. It is thus suited for use in hash tables which use that function for equality comparisons only.

Referenced by llvm::MachineInstrExpressionTrait::getHashValue().

friend class MachineInstr
friend

Definition at line 726 of file MachineOperand.h.

friend class MachineRegisterInfo
friend

Definition at line 727 of file MachineOperand.h.

Member Data Documentation

const BlockAddress* llvm::MachineOperand::BA

Definition at line 177 of file MachineOperand.h.

Referenced by CreateBA().

unsigned llvm::MachineOperand::CFIIndex

Definition at line 162 of file MachineOperand.h.

Referenced by CreateCFIIndex().

const ConstantFP* llvm::MachineOperand::CFP

Definition at line 156 of file MachineOperand.h.

Referenced by CreateFPImm(), and setFPImm().

const ConstantInt* llvm::MachineOperand::CI

Definition at line 157 of file MachineOperand.h.

Referenced by CreateCImm(), and llvm::MachineInstr::emitError().

const GlobalValue* llvm::MachineOperand::GV

Definition at line 176 of file MachineOperand.h.

Referenced by CreateGA().

int64_t llvm::MachineOperand::ImmVal

Definition at line 158 of file MachineOperand.h.

Referenced by ChangeToImmediate().

int llvm::MachineOperand::Index

Definition at line 174 of file MachineOperand.h.

MachineBasicBlock* llvm::MachineOperand::MBB
const MDNode* llvm::MachineOperand::MD

Definition at line 160 of file MachineOperand.h.

Referenced by CreateMetadata().

MachineOperand* llvm::MachineOperand::Next

Definition at line 167 of file MachineOperand.h.

struct { ... } llvm::MachineOperand::OffsetedInfo

OffsetedInfo - This struct contains the offset and an object identifier.

this represent the object as with an optional offset from it.

Referenced by CreateBA(), CreateES(), and CreateGA().

int llvm::MachineOperand::OffsetHi

Definition at line 180 of file MachineOperand.h.

unsigned llvm::MachineOperand::OffsetLo

Definition at line 146 of file MachineOperand.h.

MachineOperand* llvm::MachineOperand::Prev

Definition at line 166 of file MachineOperand.h.

struct { ... } llvm::MachineOperand::Reg
const uint32_t* llvm::MachineOperand::RegMask

Definition at line 159 of file MachineOperand.h.

Referenced by CreateRegLiveOut(), and CreateRegMask().

unsigned llvm::MachineOperand::RegNo

Definition at line 145 of file MachineOperand.h.

Referenced by CreateReg().

MCSymbol* llvm::MachineOperand::Sym

Definition at line 161 of file MachineOperand.h.

Referenced by ChangeToMCSymbol(), and CreateMCSymbol().

const char* llvm::MachineOperand::SymbolName

Definition at line 175 of file MachineOperand.h.

union { ... } llvm::MachineOperand::Val

The documentation for this class was generated from the following files: