14 #ifndef LLVM_LIB_TARGET_X86_X86INSTRINFO_H
15 #define LLVM_LIB_TARGET_X86_X86INSTRINFO_H
22 #define GET_INSTRINFO_HEADER
23 #include "X86GenInstrInfo.inc"
26 class X86RegisterInfo;
29 namespace MachineCombinerPattern {
85 bool HasMemoryOperand =
false);
116 switch (TargetFlag) {
178 unsigned RegOp,
unsigned MemOp,
unsigned Flags);
180 virtual void anchor();
186 bool AllowModify)
const;
209 unsigned &SrcReg,
unsigned &DstReg,
210 unsigned &SubIdx)
const override;
231 unsigned DestReg,
unsigned SubIdx,
244 unsigned LEAOpcode,
bool AllowSP,
245 unsigned &NewSrc,
bool &isKill,
268 unsigned &SrcOpIdx2)
const override;
275 bool AllowModify)
const override;
282 bool AllowModify =
false)
const override;
289 unsigned,
unsigned,
int&,
int&,
int&)
const override;
293 unsigned TrueReg,
unsigned FalseReg)
const override;
296 unsigned DestReg,
unsigned SrcReg,
297 bool KillSrc)
const override;
354 unsigned Reg,
bool UnfoldLoad,
bool UnfoldStore,
367 bool UnfoldLoad,
bool UnfoldStore,
368 unsigned *LoadRegIndex =
nullptr)
const override;
376 int64_t &Offset2)
const override;
387 int64_t Offset1, int64_t Offset2,
388 unsigned NumLoads)
const override;
410 if (!MO.
isReg())
return false;
420 std::pair<uint16_t, uint16_t>
437 unsigned Size,
unsigned Alignment,
438 bool AllowCommute)
const;
454 unsigned UseIdx)
const override;
481 unsigned &SrcReg2,
int &CmpMask,
482 int &CmpValue)
const override;
488 unsigned SrcReg2,
int CmpMask,
int CmpValue,
500 unsigned &FoldAsLoadDefReg,
504 MachineInstr * convertToThreeAddressWithLEA(
unsigned MIOpc,
const X86RegisterInfo & getRegisterInfo() const
getRegisterInfo - TargetInstrInfo is a superset of MRegister info.
unsigned GetCondBranchFromCond(CondCode CC)
void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, unsigned SubIdx, const MachineInstr *Orig, const TargetRegisterInfo &TRI) const override
static bool isScale(const MachineOperand &MO)
AddrSegmentReg - The operand # of the segment in the memory operand.
void storeRegToAddr(MachineFunction &MF, unsigned SrcReg, bool isKill, SmallVectorImpl< MachineOperand > &Addr, const TargetRegisterClass *RC, MachineInstr::mmo_iterator MMOBegin, MachineInstr::mmo_iterator MMOEnd, SmallVectorImpl< MachineInstr * > &NewMIs) const
bool areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, int64_t &Offset1, int64_t &Offset2) const override
areLoadsFromSameBasePtr - This is used by the pre-regalloc scheduler to determine if two loads are lo...
void setExecutionDomain(MachineInstr *MI, unsigned Domain) const override
CondCode getCondFromCMovOpc(unsigned Opc)
Return condition code of a CMov opcode.
bool isHighLatencyDef(int opc) const override
unsigned isLoadFromStackSlot(const MachineInstr *MI, int &FrameIndex) const override
MachineInstr * foldMemoryOperandImpl(MachineFunction &MF, MachineInstr *MI, ArrayRef< unsigned > Ops, MachineBasicBlock::iterator InsertPt, int FrameIndex) const override
foldMemoryOperand - If this target supports it, fold a load or store of the specified stack slot into...
MO_GOTPCREL - On a symbol operand this indicates that the immediate is offset to the GOT entry for th...
unsigned getUndefRegClearance(const MachineInstr *MI, unsigned &OpNum, const TargetRegisterInfo *TRI) const override
Inform the ExeDepsFix pass how many idle instructions we would like before certain undef register rea...
int getSPAdjust(const MachineInstr *MI) const override
getSPAdjust - This returns the stack pointer adjustment made by this instruction. ...
bool getMachineCombinerPatterns(MachineInstr &Root, SmallVectorImpl< MachineCombinerPattern::MC_PATTERN > &P) const override
Return true when there is potentially a faster code sequence for an instruction chain ending in <Root...
Represents a predicate at the MachineFunction level.
MachineInstr * optimizeLoadInstr(MachineInstr *MI, const MachineRegisterInfo *MRI, unsigned &FoldAsLoadDefReg, MachineInstr *&DefMI) const override
optimizeLoadInstr - Try to remove the load by folding it to a register operand at the use...
bool isJTI() const
isJTI - Tests if this is a MO_JumpTableIndex operand.
MO_DARWIN_NONLAZY_PIC_BASE - On a symbol operand "FOO", this indicates that the reference is actually...
MachineMemOperand - A description of a memory reference used in the backend.
unsigned getJumpInstrTableEntryBound() const override
Provide an instruction scheduling machine model to CodeGen passes.
bool isImm() const
isImm - Tests if this is a MO_Immediate operand.
bool isUnpredicatedTerminator(const MachineInstr *MI) const override
void getTrap(MCInst &MI) const override
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
bool isReg() const
isReg - Tests if this is a MO_Register operand.
static bool isGlobalStubReference(unsigned char TargetFlag)
isGlobalStubReference - Return true if the specified TargetFlag operand is a reference to a stub for ...
Reg
All possible values of the reg field in the ModR/M byte.
Represent a reference to a symbol from inside an expression.
bool isCoalescableExtInstr(const MachineInstr &MI, unsigned &SrcReg, unsigned &DstReg, unsigned &SubIdx) const override
isCoalescableExtInstr - Return true if the instruction is a "coalescable" extension instruction...
bool isSafeToMoveRegClassDefs(const TargetRegisterClass *RC) const override
isSafeToMoveRegClassDefs - Return true if it's safe to move a machine instruction that defines the sp...
static bool isLeaMem(const MachineInstr *MI, unsigned Op)
bool hasHighOperandLatency(const TargetSchedModel &SchedModel, const MachineRegisterInfo *MRI, const MachineInstr *DefMI, unsigned DefIdx, const MachineInstr *UseMI, unsigned UseIdx) const override
unsigned getNumOperands() const
Access to explicit operands of the instruction.
bool isCPI() const
isCPI - Tests if this is a MO_ConstantPoolIndex operand.
bool isGlobal() const
isGlobal - Tests if this is a MO_GlobalAddress operand.
static bool isGlobalRelativeToPICBase(unsigned char TargetFlag)
isGlobalRelativeToPICBase - Return true if the specified global value reference is relative to a 32-b...
AddrNumOperands - Total number of operands in a memory reference.
bool isFI() const
isFI - Tests if this is a MO_FrameIndex operand.
unsigned isStoreToStackSlotPostFE(const MachineInstr *MI, int &FrameIndex) const override
isStoreToStackSlotPostFE - Check for post-frame ptr elimination stack locations as well...
MO_GOT - On a symbol operand this indicates that the immediate is the offset to the GOT entry for the...
bool shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2, int64_t Offset1, int64_t Offset2, unsigned NumLoads) const override
shouldScheduleLoadsNear - This is a used by the pre-regalloc scheduler to determine (in conjunction w...
bool getMemOpBaseRegImmOfs(MachineInstr *LdSt, unsigned &BaseReg, unsigned &Offset, const TargetRegisterInfo *TRI) const override
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory)...
bool optimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg, unsigned SrcReg2, int CmpMask, int CmpValue, const MachineRegisterInfo *MRI) const override
optimizeCompareInstr - Check if there exists an earlier instruction that operates on the same source ...
MO_DARWIN_NONLAZY - On a symbol operand "FOO", this indicates that the reference is actually to the "...
Instances of this class represent a single low-level machine instruction.
MO_DARWIN_HIDDEN_NONLAZY_PIC_BASE - On a symbol operand "FOO", this indicates that the reference is a...
bool isX86_64ExtendedReg(unsigned RegNo)
isX86_64ExtendedReg - Is the MachineOperand a x86-64 extended (r8 or higher) register? e.g.
void genAlternativeCodeSequence(MachineInstr &Root, MachineCombinerPattern::MC_PATTERN P, SmallVectorImpl< MachineInstr * > &InsInstrs, SmallVectorImpl< MachineInstr * > &DelInstrs, DenseMap< unsigned, unsigned > &InstrIdxForVirtReg) const override
When getMachineCombinerPatterns() finds a pattern, this function generates the instructions that coul...
void breakPartialRegDependency(MachineBasicBlock::iterator MI, unsigned OpNum, const TargetRegisterInfo *TRI) const override
bool analyzeCompare(const MachineInstr *MI, unsigned &SrcReg, unsigned &SrcReg2, int &CmpMask, int &CmpValue) const override
analyzeCompare - For a comparison instruction, return the source registers in SrcReg and SrcReg2 if h...
void getUnconditionalBranch(MCInst &Branch, const MCSymbolRefExpr *BranchTarget) const override
void insertSelect(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, DebugLoc DL, unsigned DstReg, ArrayRef< MachineOperand > Cond, unsigned TrueReg, unsigned FalseReg) const override
bool findCommutedOpIndices(MachineInstr *MI, unsigned &SrcOpIdx1, unsigned &SrcOpIdx2) const override
std::pair< uint16_t, uint16_t > getExecutionDomain(const MachineInstr *MI) const override
unsigned isLoadFromStackSlotPostFE(const MachineInstr *MI, int &FrameIndex) const override
isLoadFromStackSlotPostFE - Check for post-frame ptr elimination stack locations as well...
MO_TLVP - On a symbol operand this indicates that the immediate is some TLS offset.
bundle_iterator - MachineBasicBlock iterator that automatically skips over MIs that are inside bundle...
const MachineOperand & getOperand(unsigned i) const
static bool isX86_64ExtendedReg(const MachineOperand &MO)
X86InstrInfo(X86Subtarget &STI)
unsigned isStoreToStackSlot(const MachineInstr *MI, int &FrameIndex) const override
bool unfoldMemoryOperand(MachineFunction &MF, MachineInstr *MI, unsigned Reg, bool UnfoldLoad, bool UnfoldStore, SmallVectorImpl< MachineInstr * > &NewMIs) const override
unfoldMemoryOperand - Separate a single instruction which folded a load or a store or a load and a st...
void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const override
bool useMachineCombiner() const override
unsigned RemoveBranch(MachineBasicBlock &MBB) const override
bool classifyLEAReg(MachineInstr *MI, const MachineOperand &Src, unsigned LEAOpcode, bool AllowSP, unsigned &NewSrc, bool &isKill, bool &isUndef, MachineOperand &ImplicitOp) const
Given an operand within a MachineInstr, insert preceding code to put it into the right format for a p...
unsigned getSETFromCond(CondCode CC, bool HasMemoryOperand=false)
Return a set opcode for the given condition and whether it has a memory operand.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
bool isSafeToClobberEFLAGS(MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const
isSafeToClobberEFLAGS - Return true if it's safe insert an instruction tha would clobber the EFLAGS c...
bool shouldScheduleAdjacent(MachineInstr *First, MachineInstr *Second) const override
bool canFoldMemoryOperand(const MachineInstr *, ArrayRef< unsigned >) const override
canFoldMemoryOperand - Returns true if the specified load / store is folding is possible.
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
MachineOperand class - Representation of each machine instruction operand.
CondCode GetOppositeBranchCondition(CondCode CC)
GetOppositeBranchCondition - Return the inverse of the specified cond, e.g.
unsigned getGlobalBaseReg(MachineFunction *MF) const
getGlobalBaseReg - Return a virtual register initialized with the the global base register value...
unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, DebugLoc DL) const override
Represents one node in the SelectionDAG.
void getNoopForMachoTarget(MCInst &NopInst) const override
Return the noop instruction to use for a noop.
MachineInstr * commuteInstruction(MachineInstr *MI, bool NewMI) const override
commuteInstruction - We have a few instructions that must be hacked on to commute them...
MachineInstr * convertToThreeAddress(MachineFunction::iterator &MFI, MachineBasicBlock::iterator &MBBI, LiveVariables *LV) const override
convertToThreeAddress - This method must be implemented by targets that set the M_CONVERTIBLE_TO_3_AD...
unsigned getCMovFromCond(CondCode CC, unsigned RegBytes, bool HasMemoryOperand=false)
Return a cmov opcode for the given condition, register size in bytes, and operand type...
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
bool canInsertSelect(const MachineBasicBlock &, ArrayRef< MachineOperand > Cond, unsigned, unsigned, int &, int &, int &) const override
void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override
Representation of each machine instruction.
MO_GOTOFF - On a symbol operand this indicates that the immediate is the offset to the location of th...
bool AnalyzeBranchPredicate(MachineBasicBlock &MBB, TargetInstrInfo::MachineBranchPredicate &MBP, bool AllowModify=false) const override
unsigned getPartialRegUpdateClearance(const MachineInstr *MI, unsigned OpNum, const TargetRegisterInfo *TRI) const override
Inform the ExeDepsFix pass how many idle instructions we would like before a partial register update...
static bool isMem(const MachineInstr *MI, unsigned Op)
void loadRegFromAddr(MachineFunction &MF, unsigned DestReg, SmallVectorImpl< MachineOperand > &Addr, const TargetRegisterClass *RC, MachineInstr::mmo_iterator MMOBegin, MachineInstr::mmo_iterator MMOEnd, SmallVectorImpl< MachineInstr * > &NewMIs) const
unsigned getReg() const
getReg - Returns the register number.
BasicBlockListType::iterator iterator
MO_PIC_BASE_OFFSET - On a symbol operand this indicates that the immediate should get the value of th...
bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const override
void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override
bool expandPostRAPseudo(MachineBasicBlock::iterator MI) const override
unsigned getOpcodeAfterMemoryUnfold(unsigned Opc, bool UnfoldLoad, bool UnfoldStore, unsigned *LoadRegIndex=nullptr) const override
getOpcodeAfterMemoryUnfold - Returns the opcode of the would be new instruction after load / store ar...
MO_DLLIMPORT - On a symbol operand "FOO", this indicates that the reference is actually to the "__imp...
bool isReallyTriviallyReMaterializable(const MachineInstr *MI, AliasAnalysis *AA) const override
bool ReverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const override