16 #ifndef LLVM_CODEGEN_TARGETSCHEDULE_H
17 #define LLVM_CODEGEN_TARGETSCHEDULE_H
26 class TargetRegisterInfo;
27 class TargetSubtargetInfo;
28 class TargetInstrInfo;
41 unsigned MicroOpFactor;
127 return ResourceFactors[ResIdx];
133 return MicroOpFactor;
172 bool UseDefaultDefLatency =
true)
const;
173 unsigned computeInstrLatency(
unsigned Opcode)
const;
const MCSchedClassDesc * resolveSchedClass(const MachineInstr *MI) const
Return the MCSchedClassDesc for this instruction.
bool hasInstrItineraries() const
Return true if this machine model includes cycle-to-cycle itinerary data.
unsigned MicroOpBufferSize
const MCWriteProcResEntry * getWriteProcResBegin(const MCSchedClassDesc *SC) const
Return an iterator at the first process resource consumed by the given scheduling class...
unsigned computeOutputLatency(const MachineInstr *DefMI, unsigned DefIdx, const MachineInstr *DepMI) const
Output dependency latency of a pair of defs of the same register.
void init(const MCSchedModel &sm, const TargetSubtargetInfo *sti, const TargetInstrInfo *tii)
Initialize the machine model for instruction scheduling.
unsigned getMicroOpBufferSize() const
Number of micro-ops that may be buffered for OOO execution.
const MCProcResourceDesc * getProcResource(unsigned ProcResourceIdx) const
const TargetInstrInfo * getInstrInfo() const
TargetInstrInfo getter.
unsigned getResourceFactor(unsigned ResIdx) const
Multiply the number of units consumed for a resource by this factor to normalize it relative to other...
const MCWriteProcResEntry * getWriteProcResEnd(const MCSchedClassDesc *SC) const
Provide an instruction scheduling machine model to CodeGen passes.
Itinerary data supplied by a subtarget to be used by a target.
TargetInstrInfo - Interface to description of machine instruction set.
unsigned getNumProcResourceKinds() const
const InstrItineraryData * getInstrItineraries() const
Identify one of the processor resource kinds consumed by a particular scheduling class for the specif...
Summarize the scheduling resources required for an instruction of a particular scheduling class...
unsigned getLatencyFactor() const
Multiply cycle count by this factor to normalize it relative to other resources.
unsigned getNumProcResourceKinds() const
Get the number of kinds of resources for this target.
const MCWriteProcResEntry * ProcResIter
ProcResIter getWriteProcResEnd(const MCSchedClassDesc *SC) const
const MCSchedModel * getMCSchedModel() const
bool hasInstrSchedModel() const
Return true if this machine model includes an instruction-level scheduling model. ...
int getResourceBufferSize(unsigned PIdx) const
Number of resource units that may be buffered for OOO execution.
const MCProcResourceDesc * getProcResource(unsigned PIdx) const
Get a processor resource by ID for convenience.
Define a kind of processor resource that will be modeled by the scheduler.
CHAIN = SC CHAIN, Imm128 - System call.
unsigned getProcessorID() const
Identify the processor corresponding to the current subtarget.
TargetSubtargetInfo - Generic base class for all target subtargets.
unsigned getNumMicroOps(const MachineInstr *MI, const MCSchedClassDesc *SC=nullptr) const
Return the number of issue slots required for this MI.
Representation of each machine instruction.
unsigned getProcessorID() const
unsigned computeOperandLatency(const MachineInstr *DefMI, unsigned DefOperIdx, const MachineInstr *UseMI, unsigned UseOperIdx) const
Compute operand latency based on the available machine model.
unsigned getMicroOpFactor() const
Multiply number of micro-ops by this factor to normalize it relative to other resources.
unsigned getIssueWidth() const
Maximum number of micro-ops that may be scheduled per cycle.
ProcResIter getWriteProcResBegin(const MCSchedClassDesc *SC) const
const char * getResourceName(unsigned PIdx) const
Machine model for scheduling, bundling, and heuristics.