27 void SIMachineFunctionInfo::anchor() {}
31 TIDReg(AMDGPU::NoRegister),
32 HasSpilledVGPRs(
false),
35 LDSWaveSpillSize(0) { }
48 unsigned LaneVGPRIdx = Offset / (64 * 4);
49 unsigned Lane = (Offset / 4) % 64;
62 BI->addLiveIn(LaneVGPR);
void setPhysRegUsed(unsigned Reg)
setPhysRegUsed - Mark the specified register used in this function.
AMDGPU specific subclass of TargetSubtarget.
SIMachineFunctionInfo(const MachineFunction &MF)
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
unsigned getShaderType() const
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted...
unsigned getMaximumWorkGroupSize(const MachineFunction &MF) const
unsigned findUnusedRegister(const MachineRegisterInfo &MRI, const TargetRegisterClass *RC) const
Returns a register that is not used at any point in the function.
int64_t getObjectOffset(int ObjectIdx) const
Return the assigned stack offset of the specified object from the incoming stack pointer.
SpilledReg getSpilledReg(MachineFunction *MF, unsigned FrameIndex, unsigned SubIdx)
MachineFrameInfo * getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
std::map< unsigned, unsigned > LaneVGPRs
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
Interface definition for SIInstrInfo.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
unsigned getWavefrontSize() const
BasicBlockListType::iterator iterator