LLVM  3.7.0
ARMTargetMachine.h
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1 //===-- ARMTargetMachine.h - Define TargetMachine for ARM -------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file declares the ARM specific subclass of TargetMachine.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_ARM_ARMTARGETMACHINE_H
15 #define LLVM_LIB_TARGET_ARM_ARMTARGETMACHINE_H
16 
17 #include "ARMInstrInfo.h"
18 #include "ARMSubtarget.h"
19 #include "llvm/IR/DataLayout.h"
21 
22 namespace llvm {
23 
25 public:
26  enum ARMABI {
29  ARM_ABI_AAPCS // ARM EABI
30  } TargetABI;
31 
32 protected:
33  std::unique_ptr<TargetLoweringObjectFile> TLOF;
35  bool isLittle;
37 
38 public:
39  ARMBaseTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
42  CodeGenOpt::Level OL, bool isLittle);
43  ~ARMBaseTargetMachine() override;
44 
45  const ARMSubtarget *getSubtargetImpl() const { return &Subtarget; }
46  const ARMSubtarget *getSubtargetImpl(const Function &F) const override;
47  bool isLittleEndian() const { return isLittle; }
48 
49  /// \brief Get the TargetIRAnalysis for this target.
51 
52  // Pass Pipeline Configuration
53  TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
54 
56  return TLOF.get();
57  }
58 };
59 
60 /// ARMTargetMachine - ARM target machine.
61 ///
63  virtual void anchor();
64  public:
65  ARMTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
68 };
69 
70 /// ARMLETargetMachine - ARM little endian target machine.
71 ///
73  void anchor() override;
74 public:
75  ARMLETargetMachine(const Target &T, const Triple &TT, StringRef CPU,
79 };
80 
81 /// ARMBETargetMachine - ARM big endian target machine.
82 ///
84  void anchor() override;
85 public:
86  ARMBETargetMachine(const Target &T, const Triple &TT, StringRef CPU,
90 };
91 
92 /// ThumbTargetMachine - Thumb target machine.
93 /// Due to the way architectures are handled, this represents both
94 /// Thumb-1 and Thumb-2.
95 ///
97  virtual void anchor();
98 public:
99  ThumbTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
102  bool isLittle);
103 };
104 
105 /// ThumbLETargetMachine - Thumb little endian target machine.
106 ///
108  void anchor() override;
109 public:
110  ThumbLETargetMachine(const Target &T, const Triple &TT, StringRef CPU,
113  CodeGenOpt::Level OL);
114 };
115 
116 /// ThumbBETargetMachine - Thumb big endian target machine.
117 ///
119  void anchor() override;
120 public:
121  ThumbBETargetMachine(const Target &T, const Triple &TT, StringRef CPU,
124  CodeGenOpt::Level OL);
125 };
126 
127 } // end namespace llvm
128 
129 #endif
ThumbTargetMachine - Thumb target machine.
TargetIRAnalysis getTargetIRAnalysis() override
Get the TargetIRAnalysis for this target.
Analysis pass providing the TargetTransformInfo.
F(f)
enum llvm::ARMBaseTargetMachine::ARMABI TargetABI
TargetLoweringObjectFile * getObjFileLowering() const override
ThumbBETargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL)
Target-Independent Code Generator Pass Configuration Options.
ARMBETargetMachine - ARM big endian target machine.
std::unique_ptr< TargetLoweringObjectFile > TLOF
StringMap< std::unique_ptr< ARMSubtarget > > SubtargetMap
ARMLETargetMachine - ARM little endian target machine.
ARMBaseTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle)
TargetMachine ctor - Create an ARM architecture model.
const ARMSubtarget * getSubtargetImpl() const
ARMBETargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL)
This class describes a target machine that is implemented with the LLVM target-independent code gener...
ThumbLETargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL)
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
ARMTargetMachine - ARM target machine.
TargetPassConfig * createPassConfig(PassManagerBase &PM) override
Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of ...
ARMTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle)
StringMap - This is an unconventional map that is specialized for handling keys that are "strings"...
Definition: StringMap.h:214
Target - Wrapper for Target specific information.
ThumbTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle)
ThumbBETargetMachine - Thumb big endian target machine.
ThumbLETargetMachine - Thumb little endian target machine.
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:40
ARMLETargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL)