LLVM  3.7.0
SystemZFrameLowering.cpp
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1 //===-- SystemZFrameLowering.cpp - Frame lowering for SystemZ -------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 
10 #include "SystemZFrameLowering.h"
11 #include "SystemZCallingConv.h"
12 #include "SystemZInstrBuilder.h"
13 #include "SystemZInstrInfo.h"
15 #include "SystemZRegisterInfo.h"
16 #include "SystemZSubtarget.h"
20 #include "llvm/IR/Function.h"
21 
22 using namespace llvm;
23 
24 namespace {
25 // The ABI-defined register save slots, relative to the incoming stack
26 // pointer.
27 static const TargetFrameLowering::SpillSlot SpillOffsetTable[] = {
28  { SystemZ::R2D, 0x10 },
29  { SystemZ::R3D, 0x18 },
30  { SystemZ::R4D, 0x20 },
31  { SystemZ::R5D, 0x28 },
32  { SystemZ::R6D, 0x30 },
33  { SystemZ::R7D, 0x38 },
34  { SystemZ::R8D, 0x40 },
35  { SystemZ::R9D, 0x48 },
36  { SystemZ::R10D, 0x50 },
37  { SystemZ::R11D, 0x58 },
38  { SystemZ::R12D, 0x60 },
39  { SystemZ::R13D, 0x68 },
40  { SystemZ::R14D, 0x70 },
41  { SystemZ::R15D, 0x78 },
42  { SystemZ::F0D, 0x80 },
43  { SystemZ::F2D, 0x88 },
44  { SystemZ::F4D, 0x90 },
45  { SystemZ::F6D, 0x98 }
46 };
47 } // end anonymous namespace
48 
50  : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 8,
51  -SystemZMC::CallFrameSize, 8) {
52  // Create a mapping from register number to save slot offset.
53  RegSpillOffsets.grow(SystemZ::NUM_TARGET_REGS);
54  for (unsigned I = 0, E = array_lengthof(SpillOffsetTable); I != E; ++I)
55  RegSpillOffsets[SpillOffsetTable[I].Reg] = SpillOffsetTable[I].Offset;
56 }
57 
60  NumEntries = array_lengthof(SpillOffsetTable);
61  return SpillOffsetTable;
62 }
63 
65  BitVector &SavedRegs,
66  RegScavenger *RS) const {
68 
69  MachineFrameInfo *MFFrame = MF.getFrameInfo();
71  bool HasFP = hasFP(MF);
73  bool IsVarArg = MF.getFunction()->isVarArg();
74 
75  // va_start stores incoming FPR varargs in the normal way, but delegates
76  // the saving of incoming GPR varargs to spillCalleeSavedRegisters().
77  // Record these pending uses, which typically include the call-saved
78  // argument register R6D.
79  if (IsVarArg)
80  for (unsigned I = MFI->getVarArgsFirstGPR(); I < SystemZ::NumArgGPRs; ++I)
81  SavedRegs.set(SystemZ::ArgGPRs[I]);
82 
83  // If the function requires a frame pointer, record that the hard
84  // frame pointer will be clobbered.
85  if (HasFP)
86  SavedRegs.set(SystemZ::R11D);
87 
88  // If the function calls other functions, record that the return
89  // address register will be clobbered.
90  if (MFFrame->hasCalls())
91  SavedRegs.set(SystemZ::R14D);
92 
93  // If we are saving GPRs other than the stack pointer, we might as well
94  // save and restore the stack pointer at the same time, via STMG and LMG.
95  // This allows the deallocation to be done by the LMG, rather than needing
96  // a separate %r15 addition.
97  const MCPhysReg *CSRegs = TRI->getCalleeSavedRegs(&MF);
98  for (unsigned I = 0; CSRegs[I]; ++I) {
99  unsigned Reg = CSRegs[I];
100  if (SystemZ::GR64BitRegClass.contains(Reg) && SavedRegs.test(Reg)) {
101  SavedRegs.set(SystemZ::R15D);
102  break;
103  }
104  }
105 }
106 
107 // Add GPR64 to the save instruction being built by MIB, which is in basic
108 // block MBB. IsImplicit says whether this is an explicit operand to the
109 // instruction, or an implicit one that comes between the explicit start
110 // and end registers.
112  unsigned GPR64, bool IsImplicit) {
113  const TargetRegisterInfo *RI =
115  unsigned GPR32 = RI->getSubReg(GPR64, SystemZ::subreg_l32);
116  bool IsLive = MBB.isLiveIn(GPR64) || MBB.isLiveIn(GPR32);
117  if (!IsLive || !IsImplicit) {
118  MIB.addReg(GPR64, getImplRegState(IsImplicit) | getKillRegState(!IsLive));
119  if (!IsLive)
120  MBB.addLiveIn(GPR64);
121  }
122 }
123 
127  const std::vector<CalleeSavedInfo> &CSI,
128  const TargetRegisterInfo *TRI) const {
129  if (CSI.empty())
130  return false;
131 
132  MachineFunction &MF = *MBB.getParent();
135  bool IsVarArg = MF.getFunction()->isVarArg();
136  DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
137 
138  // Scan the call-saved GPRs and find the bounds of the register spill area.
139  unsigned LowGPR = 0;
140  unsigned HighGPR = SystemZ::R15D;
141  unsigned StartOffset = -1U;
142  for (unsigned I = 0, E = CSI.size(); I != E; ++I) {
143  unsigned Reg = CSI[I].getReg();
144  if (SystemZ::GR64BitRegClass.contains(Reg)) {
145  unsigned Offset = RegSpillOffsets[Reg];
146  assert(Offset && "Unexpected GPR save");
147  if (StartOffset > Offset) {
148  LowGPR = Reg;
149  StartOffset = Offset;
150  }
151  }
152  }
153 
154  // Save the range of call-saved registers, for use by the epilogue inserter.
155  ZFI->setLowSavedGPR(LowGPR);
156  ZFI->setHighSavedGPR(HighGPR);
157 
158  // Include the GPR varargs, if any. R6D is call-saved, so would
159  // be included by the loop above, but we also need to handle the
160  // call-clobbered argument registers.
161  if (IsVarArg) {
162  unsigned FirstGPR = ZFI->getVarArgsFirstGPR();
163  if (FirstGPR < SystemZ::NumArgGPRs) {
164  unsigned Reg = SystemZ::ArgGPRs[FirstGPR];
165  unsigned Offset = RegSpillOffsets[Reg];
166  if (StartOffset > Offset) {
167  LowGPR = Reg; StartOffset = Offset;
168  }
169  }
170  }
171 
172  // Save GPRs
173  if (LowGPR) {
174  assert(LowGPR != HighGPR && "Should be saving %r15 and something else");
175 
176  // Build an STMG instruction.
177  MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(SystemZ::STMG));
178 
179  // Add the explicit register operands.
180  addSavedGPR(MBB, MIB, LowGPR, false);
181  addSavedGPR(MBB, MIB, HighGPR, false);
182 
183  // Add the address.
184  MIB.addReg(SystemZ::R15D).addImm(StartOffset);
185 
186  // Make sure all call-saved GPRs are included as operands and are
187  // marked as live on entry.
188  for (unsigned I = 0, E = CSI.size(); I != E; ++I) {
189  unsigned Reg = CSI[I].getReg();
190  if (SystemZ::GR64BitRegClass.contains(Reg))
191  addSavedGPR(MBB, MIB, Reg, true);
192  }
193 
194  // ...likewise GPR varargs.
195  if (IsVarArg)
196  for (unsigned I = ZFI->getVarArgsFirstGPR(); I < SystemZ::NumArgGPRs; ++I)
197  addSavedGPR(MBB, MIB, SystemZ::ArgGPRs[I], true);
198  }
199 
200  // Save FPRs in the normal TargetInstrInfo way.
201  for (unsigned I = 0, E = CSI.size(); I != E; ++I) {
202  unsigned Reg = CSI[I].getReg();
203  if (SystemZ::FP64BitRegClass.contains(Reg)) {
204  MBB.addLiveIn(Reg);
205  TII->storeRegToStackSlot(MBB, MBBI, Reg, true, CSI[I].getFrameIdx(),
206  &SystemZ::FP64BitRegClass, TRI);
207  }
208  }
209 
210  return true;
211 }
212 
216  const std::vector<CalleeSavedInfo> &CSI,
217  const TargetRegisterInfo *TRI) const {
218  if (CSI.empty())
219  return false;
220 
221  MachineFunction &MF = *MBB.getParent();
224  bool HasFP = hasFP(MF);
225  DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
226 
227  // Restore FPRs in the normal TargetInstrInfo way.
228  for (unsigned I = 0, E = CSI.size(); I != E; ++I) {
229  unsigned Reg = CSI[I].getReg();
230  if (SystemZ::FP64BitRegClass.contains(Reg))
231  TII->loadRegFromStackSlot(MBB, MBBI, Reg, CSI[I].getFrameIdx(),
232  &SystemZ::FP64BitRegClass, TRI);
233  }
234 
235  // Restore call-saved GPRs (but not call-clobbered varargs, which at
236  // this point might hold return values).
237  unsigned LowGPR = ZFI->getLowSavedGPR();
238  unsigned HighGPR = ZFI->getHighSavedGPR();
239  unsigned StartOffset = RegSpillOffsets[LowGPR];
240  if (LowGPR) {
241  // If we saved any of %r2-%r5 as varargs, we should also be saving
242  // and restoring %r6. If we're saving %r6 or above, we should be
243  // restoring it too.
244  assert(LowGPR != HighGPR && "Should be loading %r15 and something else");
245 
246  // Build an LMG instruction.
247  MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(SystemZ::LMG));
248 
249  // Add the explicit register operands.
250  MIB.addReg(LowGPR, RegState::Define);
251  MIB.addReg(HighGPR, RegState::Define);
252 
253  // Add the address.
254  MIB.addReg(HasFP ? SystemZ::R11D : SystemZ::R15D);
255  MIB.addImm(StartOffset);
256 
257  // Do a second scan adding regs as being defined by instruction
258  for (unsigned I = 0, E = CSI.size(); I != E; ++I) {
259  unsigned Reg = CSI[I].getReg();
260  if (Reg != LowGPR && Reg != HighGPR)
262  }
263  }
264 
265  return true;
266 }
267 
270  RegScavenger *RS) const {
271  MachineFrameInfo *MFFrame = MF.getFrameInfo();
272  uint64_t MaxReach = (MFFrame->estimateStackSize(MF) +
274  if (!isUInt<12>(MaxReach)) {
275  // We may need register scavenging slots if some parts of the frame
276  // are outside the reach of an unsigned 12-bit displacement.
277  // Create 2 for the case where both addresses in an MVC are
278  // out of range.
279  RS->addScavengingFrameIndex(MFFrame->CreateStackObject(8, 8, false));
280  RS->addScavengingFrameIndex(MFFrame->CreateStackObject(8, 8, false));
281  }
282 }
283 
284 // Emit instructions before MBBI (in MBB) to add NumBytes to Reg.
287  const DebugLoc &DL,
288  unsigned Reg, int64_t NumBytes,
289  const TargetInstrInfo *TII) {
290  while (NumBytes) {
291  unsigned Opcode;
292  int64_t ThisVal = NumBytes;
293  if (isInt<16>(NumBytes))
294  Opcode = SystemZ::AGHI;
295  else {
296  Opcode = SystemZ::AGFI;
297  // Make sure we maintain 8-byte stack alignment.
298  int64_t MinVal = -uint64_t(1) << 31;
299  int64_t MaxVal = (int64_t(1) << 31) - 8;
300  if (ThisVal < MinVal)
301  ThisVal = MinVal;
302  else if (ThisVal > MaxVal)
303  ThisVal = MaxVal;
304  }
305  MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII->get(Opcode), Reg)
306  .addReg(Reg).addImm(ThisVal);
307  // The CC implicit def is dead.
308  MI->getOperand(3).setIsDead();
309  NumBytes -= ThisVal;
310  }
311 }
312 
314  MachineBasicBlock &MBB) const {
315  assert(&MF.front() == &MBB && "Shrink-wrapping not yet supported");
316  MachineFrameInfo *MFFrame = MF.getFrameInfo();
317  auto *ZII =
318  static_cast<const SystemZInstrInfo *>(MF.getSubtarget().getInstrInfo());
320  MachineBasicBlock::iterator MBBI = MBB.begin();
321  MachineModuleInfo &MMI = MF.getMMI();
322  const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
323  const std::vector<CalleeSavedInfo> &CSI = MFFrame->getCalleeSavedInfo();
324  bool HasFP = hasFP(MF);
325  DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
326 
327  // The current offset of the stack pointer from the CFA.
328  int64_t SPOffsetFromCFA = -SystemZMC::CFAOffsetFromInitialSP;
329 
330  if (ZFI->getLowSavedGPR()) {
331  // Skip over the GPR saves.
332  if (MBBI != MBB.end() && MBBI->getOpcode() == SystemZ::STMG)
333  ++MBBI;
334  else
335  llvm_unreachable("Couldn't skip over GPR saves");
336 
337  // Add CFI for the GPR saves.
338  for (auto &Save : CSI) {
339  unsigned Reg = Save.getReg();
340  if (SystemZ::GR64BitRegClass.contains(Reg)) {
341  int64_t Offset = SPOffsetFromCFA + RegSpillOffsets[Reg];
342  unsigned CFIIndex = MMI.addFrameInst(MCCFIInstruction::createOffset(
343  nullptr, MRI->getDwarfRegNum(Reg, true), Offset));
344  BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::CFI_INSTRUCTION))
345  .addCFIIndex(CFIIndex);
346  }
347  }
348  }
349 
350  uint64_t StackSize = getAllocatedStackSize(MF);
351  if (StackSize) {
352  // Allocate StackSize bytes.
353  int64_t Delta = -int64_t(StackSize);
354  emitIncrement(MBB, MBBI, DL, SystemZ::R15D, Delta, ZII);
355 
356  // Add CFI for the allocation.
357  unsigned CFIIndex = MMI.addFrameInst(
358  MCCFIInstruction::createDefCfaOffset(nullptr, SPOffsetFromCFA + Delta));
359  BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::CFI_INSTRUCTION))
360  .addCFIIndex(CFIIndex);
361  SPOffsetFromCFA += Delta;
362  }
363 
364  if (HasFP) {
365  // Copy the base of the frame to R11.
366  BuildMI(MBB, MBBI, DL, ZII->get(SystemZ::LGR), SystemZ::R11D)
367  .addReg(SystemZ::R15D);
368 
369  // Add CFI for the new frame location.
370  unsigned HardFP = MRI->getDwarfRegNum(SystemZ::R11D, true);
371  unsigned CFIIndex = MMI.addFrameInst(
372  MCCFIInstruction::createDefCfaRegister(nullptr, HardFP));
373  BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::CFI_INSTRUCTION))
374  .addCFIIndex(CFIIndex);
375 
376  // Mark the FramePtr as live at the beginning of every block except
377  // the entry block. (We'll have marked R11 as live on entry when
378  // saving the GPRs.)
379  for (auto I = std::next(MF.begin()), E = MF.end(); I != E; ++I)
380  I->addLiveIn(SystemZ::R11D);
381  }
382 
383  // Skip over the FPR saves.
384  SmallVector<unsigned, 8> CFIIndexes;
385  for (auto &Save : CSI) {
386  unsigned Reg = Save.getReg();
387  if (SystemZ::FP64BitRegClass.contains(Reg)) {
388  if (MBBI != MBB.end() &&
389  (MBBI->getOpcode() == SystemZ::STD ||
390  MBBI->getOpcode() == SystemZ::STDY))
391  ++MBBI;
392  else
393  llvm_unreachable("Couldn't skip over FPR save");
394 
395  // Add CFI for the this save.
396  unsigned DwarfReg = MRI->getDwarfRegNum(Reg, true);
397  int64_t Offset = getFrameIndexOffset(MF, Save.getFrameIdx());
398  unsigned CFIIndex = MMI.addFrameInst(MCCFIInstruction::createOffset(
399  nullptr, DwarfReg, SPOffsetFromCFA + Offset));
400  CFIIndexes.push_back(CFIIndex);
401  }
402  }
403  // Complete the CFI for the FPR saves, modelling them as taking effect
404  // after the last save.
405  for (auto CFIIndex : CFIIndexes) {
406  BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::CFI_INSTRUCTION))
407  .addCFIIndex(CFIIndex);
408  }
409 }
410 
412  MachineBasicBlock &MBB) const {
414  auto *ZII =
415  static_cast<const SystemZInstrInfo *>(MF.getSubtarget().getInstrInfo());
417 
418  // Skip the return instruction.
419  assert(MBBI->isReturn() && "Can only insert epilogue into returning blocks");
420 
421  uint64_t StackSize = getAllocatedStackSize(MF);
422  if (ZFI->getLowSavedGPR()) {
423  --MBBI;
424  unsigned Opcode = MBBI->getOpcode();
425  if (Opcode != SystemZ::LMG)
426  llvm_unreachable("Expected to see callee-save register restore code");
427 
428  unsigned AddrOpNo = 2;
429  DebugLoc DL = MBBI->getDebugLoc();
430  uint64_t Offset = StackSize + MBBI->getOperand(AddrOpNo + 1).getImm();
431  unsigned NewOpcode = ZII->getOpcodeForOffset(Opcode, Offset);
432 
433  // If the offset is too large, use the largest stack-aligned offset
434  // and add the rest to the base register (the stack or frame pointer).
435  if (!NewOpcode) {
436  uint64_t NumBytes = Offset - 0x7fff8;
437  emitIncrement(MBB, MBBI, DL, MBBI->getOperand(AddrOpNo).getReg(),
438  NumBytes, ZII);
439  Offset -= NumBytes;
440  NewOpcode = ZII->getOpcodeForOffset(Opcode, Offset);
441  assert(NewOpcode && "No restore instruction available");
442  }
443 
444  MBBI->setDesc(ZII->get(NewOpcode));
445  MBBI->getOperand(AddrOpNo + 1).ChangeToImmediate(Offset);
446  } else if (StackSize) {
447  DebugLoc DL = MBBI->getDebugLoc();
448  emitIncrement(MBB, MBBI, DL, SystemZ::R15D, StackSize, ZII);
449  }
450 }
451 
453  return (MF.getTarget().Options.DisableFramePointerElim(MF) ||
455  MF.getInfo<SystemZMachineFunctionInfo>()->getManipulatesSP());
456 }
457 
459  int FI) const {
460  const MachineFrameInfo *MFFrame = MF.getFrameInfo();
461 
462  // Start with the offset of FI from the top of the caller-allocated frame
463  // (i.e. the top of the 160 bytes allocated by the caller). This initial
464  // offset is therefore negative.
465  int64_t Offset = (MFFrame->getObjectOffset(FI) +
466  MFFrame->getOffsetAdjustment());
467 
468  // Make the offset relative to the incoming stack pointer.
469  Offset -= getOffsetOfLocalArea();
470 
471  // Make the offset relative to the bottom of the frame.
472  Offset += getAllocatedStackSize(MF);
473 
474  return Offset;
475 }
476 
477 uint64_t SystemZFrameLowering::
479  const MachineFrameInfo *MFFrame = MF.getFrameInfo();
480 
481  // Start with the size of the local variables and spill slots.
482  uint64_t StackSize = MFFrame->getStackSize();
483 
484  // We need to allocate the ABI-defined 160-byte base area whenever
485  // we allocate stack space for our own use and whenever we call another
486  // function.
487  if (StackSize || MFFrame->hasVarSizedObjects() || MFFrame->hasCalls())
488  StackSize += SystemZMC::CallFrameSize;
489 
490  return StackSize;
491 }
492 
493 bool
495  // The ABI requires us to allocate 160 bytes of stack space for the callee,
496  // with any outgoing stack arguments being placed above that. It seems
497  // better to make that area a permanent feature of the frame even if
498  // we're using a frame pointer.
499  return true;
500 }
501 
504  MachineBasicBlock &MBB,
506  switch (MI->getOpcode()) {
507  case SystemZ::ADJCALLSTACKDOWN:
508  case SystemZ::ADJCALLSTACKUP:
509  assert(hasReservedCallFrame(MF) &&
510  "ADJSTACKDOWN and ADJSTACKUP should be no-ops");
511  MBB.erase(MI);
512  break;
513 
514  default:
515  llvm_unreachable("Unexpected call frame instruction");
516  }
517 }
void push_back(const T &Elt)
Definition: SmallVector.h:222
const MachineFunction * getParent() const
getParent - Return the MachineFunction containing this basic block.
BitVector & set()
Definition: BitVector.h:218
int getDwarfRegNum(unsigned RegNum, bool isEH) const
Map a target register to an equivalent dwarf register number.
bool hasFP(const MachineFunction &MF) const override
hasFP - Return true if the specified function should have a dedicated frame pointer register...
const int64_t CallFrameSize
const unsigned ArgGPRs[NumArgGPRs]
static void emitIncrement(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, const DebugLoc &DL, unsigned Reg, int64_t NumBytes, const TargetInstrInfo *TII)
void processFunctionBeforeFrameFinalized(MachineFunction &MF, RegScavenger *RS) const override
processFunctionBeforeFrameFinalized - This method is called immediately before the specified function...
static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register, int Offset)
.cfi_offset Previous value of Register is saved at offset Offset from CFA.
Definition: MCDwarf.h:381
int getFrameIndexOffset(const MachineFunction &MF, int FI) const override
getFrameIndexOffset - Returns the displacement from the frame register to the stack frame of the spec...
void addLiveIn(unsigned Reg)
Adds the specified register as a live in.
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
bool hasReservedCallFrame(const MachineFunction &MF) const override
hasReservedCallFrame - Under normal circumstances, when a frame pointer is not required, we reserve argument space for call sites in the function immediately on entry to the current function.
A debug info location.
Definition: DebugLoc.h:34
void setIsDead(bool Val=true)
const Function * getFunction() const
getFunction - Return the LLVM function that this machine code represents
const unsigned NumArgGPRs
static MCCFIInstruction createDefCfaOffset(MCSymbol *L, int Offset)
.cfi_def_cfa_offset modifies a rule for computing CFA.
Definition: MCDwarf.h:368
void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS) const override
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects...
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
const HexagonInstrInfo * TII
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition: ErrorHandling.h:98
bool DisableFramePointerElim(const MachineFunction &MF) const
DisableFramePointerElim - This returns true if frame pointer elimination optimization should be disab...
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override
Reg
All possible values of the reg field in the ModR/M byte.
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted...
static bool contains(SmallPtrSetImpl< ConstantExpr * > &Cache, ConstantExpr *Expr, Constant *C)
Definition: Value.cpp:317
const MachineInstrBuilder & addImm(int64_t Val) const
addImm - Add a new immediate operand.
const MachineBasicBlock & front() const
int getOffsetAdjustment() const
Return the correction for frame offsets.
unsigned LLVM_ATTRIBUTE_UNUSED_RESULT addFrameInst(const MCCFIInstruction &Inst)
iterator getLastNonDebugInstr()
getLastNonDebugInstr - returns an iterator to the last non-debug instruction in the basic block...
virtual const MCPhysReg * getCalleeSavedRegs(const MachineFunction *MF) const =0
getCalleeSavedRegs - Return a null-terminated list of all of the callee saved registers on this targe...
unsigned getKillRegState(bool B)
unsigned estimateStackSize(const MachineFunction &MF) const
Estimate and return the size of the stack frame.
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
TargetInstrInfo - Interface to description of machine instruction set.
LLVM_CONSTEXPR size_t array_lengthof(T(&)[N])
Find the length of an array.
Definition: STLExtras.h:247
bundle_iterator< MachineInstr, instr_iterator > iterator
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override
emitProlog/emitEpilog - These methods insert prolog and epilog code into the function.
static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register)
.cfi_def_cfa_register modifies a rule for computing CFA.
Definition: MCDwarf.h:361
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:273
const int64_t CFAOffsetFromInitialSP
unsigned getSubReg(unsigned Reg, unsigned Idx) const
Returns the physical register number of sub-register "Index" for physical register RegNo...
virtual void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const
Load the specified register of the given register class from the specified stack frame index...
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
MachineInstrBuilder BuildMI(MachineFunction &MF, DebugLoc DL, const MCInstrDesc &MCID)
BuildMI - Builder interface.
virtual void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const
Store the specified register of the given register class to the specified stack frame index...
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
const MCInstrDesc & get(unsigned Opcode) const
Return the machine instruction descriptor that corresponds to the specified instruction opcode...
Definition: MCInstrInfo.h:45
int64_t getObjectOffset(int ObjectIdx) const
Return the assigned stack offset of the specified object from the incoming stack pointer.
virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
bool hasCalls() const
Return true if the current function has any function calls.
const MDOperand & getOperand(unsigned I) const
Definition: Metadata.h:936
static void addSavedGPR(MachineBasicBlock &MBB, MachineInstrBuilder &MIB, unsigned GPR64, bool IsImplicit)
const MCContext & getContext() const
uint64_t getAllocatedStackSize(const MachineFunction &MF) const
void addScavengingFrameIndex(int FI)
Add a scavenging frame index.
bool test(unsigned Idx) const
Definition: BitVector.h:322
int getOffsetOfLocalArea() const
getOffsetOfLocalArea - This method returns the offset of the local area from the stack pointer on ent...
Information about stack frame layout on the target.
MachineFrameInfo * getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
const MCRegisterInfo * getRegisterInfo() const
Definition: MCContext.h:227
static MDTuple * get(LLVMContext &Context, ArrayRef< Metadata * > MDs)
Definition: Metadata.h:1030
Representation of each machine instruction.
Definition: MachineInstr.h:51
bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBII, const std::vector< CalleeSavedInfo > &CSI, const TargetRegisterInfo *TRI) const override
restoreCalleeSavedRegisters - Issues instruction(s) to restore all callee saved registers and returns...
bool isLiveIn(unsigned Reg) const
isLiveIn - Return true if the specified register is in the live in set.
#define I(x, y, z)
Definition: MD5.cpp:54
unsigned getImplRegState(bool B)
const TargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
const SpillSlot * getCalleeSavedSpillSlots(unsigned &NumEntries) const override
getCalleeSavedSpillSlots - This method returns a pointer to an array of pairs, that contains an entry...
bool isInt< 16 >(int64_t x)
Definition: MathExtras.h:272
bool hasVarSizedObjects() const
This method may be called any time after instruction selection is complete to determine if the stack ...
int CreateStackObject(uint64_t Size, unsigned Alignment, bool isSS, const AllocaInst *Alloca=nullptr)
Create a new statically sized stack object, returning a nonnegative identifier to represent it...
void grow(IndexT n)
Definition: IndexedMap.h:68
virtual const TargetInstrInfo * getInstrInfo() const
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
MachineModuleInfo & getMMI() const
bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const std::vector< CalleeSavedInfo > &CSI, const TargetRegisterInfo *TRI) const override
spillCalleeSavedRegisters - Issues instruction(s) to spill all callee saved registers and returns tru...
const MachineInstrBuilder & addReg(unsigned RegNo, unsigned flags=0, unsigned SubReg=0) const
addReg - Add a new virtual register operand...
bool isVarArg() const
isVarArg - Return true if this function takes a variable number of arguments.
Definition: Function.cpp:229
MachineModuleInfo - This class contains meta information specific to a module.
void eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const override
eliminateCallFramePseudoInstr - This method is called during prolog/epilog code insertion to eliminat...