16 #ifndef LLVM_MC_MCREGISTERINFO_H
17 #define LLVM_MC_MCREGISTERINFO_H
69 unsigned InByte = Reg % 8;
70 unsigned Byte = Reg / 8;
73 return (
RegSet[Byte] & (1 << InByte)) != 0;
77 bool contains(
unsigned Reg1,
unsigned Reg2)
const {
162 unsigned NumRegUnits;
167 const char *RegStrings;
168 const char *RegClassStrings;
169 const uint16_t *SubRegIndices;
173 unsigned NumSubRegIndices;
174 const uint16_t *RegEncodingTable;
177 unsigned L2DwarfRegsSize;
178 unsigned EHL2DwarfRegsSize;
179 unsigned Dwarf2LRegsSize;
180 unsigned EHDwarf2LRegsSize;
254 const char *ClassStrings,
255 const uint16_t *SubIndices,
258 const uint16_t *RET) {
265 RegUnitMaskSequences = RUMS;
266 RegStrings = Strings;
267 RegClassStrings = ClassStrings;
269 RegUnitRoots = RURoots;
271 SubRegIndices = SubIndices;
272 NumSubRegIndices = NumIndices;
273 SubRegIdxRanges = SubIdxRanges;
274 RegEncodingTable = RET;
277 EHL2DwarfRegs =
nullptr;
278 EHL2DwarfRegsSize = 0;
279 L2DwarfRegs =
nullptr;
281 EHDwarf2LRegs =
nullptr;
282 EHDwarf2LRegsSize = 0;
283 Dwarf2LRegs =
nullptr;
294 EHL2DwarfRegsSize = Size;
297 L2DwarfRegsSize = Size;
308 EHDwarf2LRegsSize = Size;
311 Dwarf2LRegsSize = Size;
321 L2SEHRegs[LLVMReg] = SEHReg;
325 L2CVRegs[LLVMReg] = CVReg;
341 "Attempting to access record for invalid register number!");
379 return RegStrings +
get(RegNo).
Name;
392 return NumSubRegIndices;
434 return RegClassStrings + Class->
NameIdx;
440 "Attempting to get encoding for invalid register number!");
441 return RegEncodingTable[RegNo];
482 bool IncludeSelf =
false) {
494 const uint16_t *SRIndex;
499 : SRIter(Reg, MCRI) {
528 bool IncludeSelf =
false) {
565 assert(Reg &&
"Null register has no regunits");
568 unsigned Scale = RU & 15;
569 unsigned Offset = RU >> 4;
573 init(Reg * Scale, MCRI->DiffLists + Offset);
594 : RUIter(Reg, MCRI) {
596 MaskListIter = &MCRI->RegUnitMaskSequences[Idx];
601 return std::make_pair(*RUIter, *MaskListIter);
630 assert(RegUnit < MCRI->getNumRegUnits() &&
"Invalid register unit");
631 Reg0 = MCRI->RegUnitRoots[RegUnit][0];
632 Reg1 = MCRI->RegUnitRoots[RegUnit][1];
668 : Reg(Reg), MCRI(MCRI), IncludeSelf(IncludeSelf) {
674 if (!(!IncludeSelf && Reg == *SI))
684 assert (SI.
isValid() &&
"Cannot dereference an invalid iterator.");
709 while (!IncludeSelf &&
isValid() && *SI == Reg);
bool isValid() const
Check if the iterator is at the end of the list.
int getDwarfRegNum(unsigned RegNum, bool isEH) const
Map a target register to an equivalent dwarf register number.
A common definition of LaneBitmask for use in TableGen and CodeGen.
const uint8_t *const RegSet
bool isValid() const
Returns true if this iterator is not yet at the end.
bool contains(unsigned Reg1, unsigned Reg2) const
contains - Return true if both registers are in this class.
const MCRegisterDesc & get(unsigned RegNo) const
Provide a get method, equivalent to [], but more useful with a pointer to this object.
void operator++()
Pre-increment to move to the next position.
bool isValid() const
isValid - returns true if this iterator is not yet at the end.
MachineInstrBuilder MachineInstrBuilder &DefMI const MCInstrDesc & Desc
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
bool isValid() const
Returns true if this iterator is not yet at the end.
bool isSubRegister(unsigned RegA, unsigned RegB) const
Returns true if RegB is a sub-register of RegA.
const MCRegisterDesc & operator[](unsigned RegNo) const
unsigned operator*() const
Dereference to get the current root register.
unsigned getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const
For a given register pair, return the sub-register index if the second register is a sub-register of ...
bool isSubRegisterEq(unsigned RegA, unsigned RegB) const
Returns true if RegB is a sub-register of RegA or if RegB == RegA.
MCSubRegIterator(unsigned Reg, const MCRegisterInfo *MCRI, bool IncludeSelf=false)
bool isAllocatable() const
isAllocatable - Return true if this register class may be used to create virtual registers.
MCRegUnitMaskIterator enumerates a list of register units and their associated lane masks for Reg...
MCSuperRegIterator enumerates all super-registers of Reg.
unsigned getNumRegs() const
getNumRegs - Return the number of registers in this class.
static GCRegistry::Add< StatepointGC > D("statepoint-example","an example strategy for statepoint")
MCRegUnitIterator(unsigned Reg, const MCRegisterInfo *MCRI)
Reg
All possible values of the reg field in the ModR/M byte.
void InitMCRegisterInfo(const MCRegisterDesc *D, unsigned NR, unsigned RA, unsigned PC, const MCRegisterClass *C, unsigned NC, const MCPhysReg(*RURoots)[2], unsigned NRU, const MCPhysReg *DL, const LaneBitmask *RUMS, const char *Strings, const char *ClassStrings, const uint16_t *SubIndices, unsigned NumIndices, const SubRegCoveredBits *SubIdxRanges, const uint16_t *RET)
Initialize MCRegisterInfo, called by TableGen auto-generated routines.
int getSEHRegNum(unsigned RegNum) const
Map a target register to an equivalent SEH register number.
unsigned getNumRegs() const
Return the number of registers this target has (useful for sizing arrays holding per register informa...
bool operator<(DwarfLLVMRegPair RHS) const
const char * getRegClassName(const MCRegisterClass *Class) const
unsigned getNumSubRegIndices() const
Return the number of sub-register indices understood by the target.
MCRegUnitRootIterator enumerates the root registers of a register unit.
bool isSuperOrSubRegisterEq(unsigned RegA, unsigned RegB) const
Returns true if RegB is a super-register or sub-register of RegA or if RegB == RegA.
unsigned getProgramCounter() const
Return the register which is the program counter.
DiffListIterator - Base iterator class that can traverse the differentially encoded register and regu...
unsigned getID() const
getID() - Return the register class ID number.
MCRegUnitMaskIterator(unsigned Reg, const MCRegisterInfo *MCRI)
Constructs an iterator that traverses the register units and their associated LaneMasks in Reg...
int getCodeViewRegNum(unsigned RegNum) const
Map a target register to an equivalent CodeView register number.
MCRegisterClass - Base class of TargetRegisterClass.
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
const MCPhysReg * iterator
void operator++()
Moves to the next position.
SubRegCoveredBits - Emitted by tablegen: bit range covered by a subreg index, -1 in any being invalid...
Iterator that enumerates the sub-registers of a Reg and the associated sub-register indices...
const MCRegisterClass & getRegClass(unsigned i) const
Returns the register class associated with the enumeration value.
void mapLLVMRegsToDwarfRegs(const DwarfLLVMRegPair *Map, unsigned Size, bool isEH)
Used to initialize LLVM register to Dwarf register number mapping.
unsigned getSubReg(unsigned Reg, unsigned Idx) const
Returns the physical register number of sub-register "Index" for physical register RegNo...
std::pair< unsigned, LaneBitmask > operator*() const
Returns a (RegUnit, LaneMask) pair.
void mapDwarfRegsToLLVMRegs(const DwarfLLVMRegPair *Map, unsigned Size, bool isEH)
Used to initialize Dwarf register to LLVM register number mapping.
unsigned getRegister(unsigned i) const
getRegister - Return the specified register in the class.
unsigned getSize() const
getSize - Return the size of the register in bytes, which is also the size of a stack slot allocated ...
MCRegAliasIterator enumerates all registers aliasing Reg.
MCRegAliasIterator(unsigned Reg, const MCRegisterInfo *MCRI, bool IncludeSelf)
int getCopyCost() const
getCopyCost - Return the cost of copying a value between two registers in this class.
int getLLVMRegNum(unsigned RegNum, bool isEH) const
Map a dwarf register back to a target register.
MCSubRegIterator enumerates all sub-registers of Reg.
const MCPhysReg * const_iterator
unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx, const MCRegisterClass *RC) const
Return a super-register of the specified register Reg so its sub-register of index SubIdx is Reg...
unsigned getSubReg() const
Returns current sub-register.
MCRegisterDesc - This record contains information about a particular register.
DwarfLLVMRegPair - Emitted by tablegen so Dwarf<->LLVM reg mappings can be performed with a binary se...
bool contains(unsigned Reg) const
contains - Return true if the specified register is included in this register class.
MCSubRegIndexIterator(unsigned Reg, const MCRegisterInfo *MCRI)
Constructs an iterator that traverses subregisters and their associated subregister indices...
bool isSuperRegisterEq(unsigned RegA, unsigned RegB) const
Returns true if RegB is a super-register of RegA or if RegB == RegA.
MCSuperRegIterator(unsigned Reg, const MCRegisterInfo *MCRI, bool IncludeSelf=false)
MCRegUnitRootIterator(unsigned RegUnit, const MCRegisterInfo *MCRI)
static GCRegistry::Add< ShadowStackGC > C("shadow-stack","Very portable GC for uncooperative code generators")
regclass_iterator regclass_begin() const
DiffListIterator()
Create an invalid iterator. Call init() to point to something useful.
unsigned getNumRegUnits() const
Return the number of (native) register units in the target.
uint16_t RegUnitLaneMasks
Index into list with lane mask sequences.
unsigned getSubRegIndex() const
Returns sub-register index of the current sub-register.
bool isSuperRegister(unsigned RegA, unsigned RegB) const
Returns true if RegB is a super-register of RegA.
void mapLLVMRegToCVReg(unsigned LLVMReg, int CVReg)
const uint16_t RegSetSize
unsigned getAlignment() const
getAlignment - Return the minimum required alignment for a register of this class.
unsigned advance()
advance - Move to the next list position, return the applied differential.
unsigned getSubRegIdxOffset(unsigned Idx) const
Get the offset of the bit range covered by a sub-register index.
unsigned operator*() const
Dereference the iterator to get the value at the current position.
unsigned getNumRegClasses() const
void operator++()
Moves to the next position.
iterator begin() const
begin/end - Return all of the registers in this class.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
unsigned operator*() const
uint16_t getEncodingValue(unsigned RegNo) const
Returns the encoding for RegNo.
const MCRegisterClass * regclass_iterator
void operator++()
Preincrement to move to the next root register.
const char * getName(unsigned RegNo) const
Return the human-readable symbolic target-specific name for the specified physical register...
regclass_iterator regclass_end() const
unsigned getSubRegIdxSize(unsigned Idx) const
Get the size of the bit range covered by a sub-register index.
unsigned getRARegister() const
This method should return the register where the return address can be found.
void mapLLVMRegToSEHReg(unsigned LLVMReg, int SEHReg)
mapLLVMRegToSEHReg - Used to initialize LLVM register to SEH register number mapping.
void init(MCPhysReg InitVal, const MCPhysReg *DiffList)
init - Point the iterator to InitVal, decoding subsequent values from DiffList.
MCRegUnitIterator()
MCRegUnitIterator - Create an iterator that traverses the register units in Reg.