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LLVM
4.0.0
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MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc. More...
#include <MachineRegisterInfo.h>
Classes | |
| class | defusechain_instr_iterator |
| defusechain_iterator - This class provides iterator support for machine operands in the function that use or define a specific register. More... | |
| class | defusechain_iterator |
| reg_begin/reg_end - Provide iteration support to walk over all definitions and uses of a register within the MachineFunction that corresponds to this MachineRegisterInfo object. More... | |
| class | Delegate |
Public Types | |
| typedef defusechain_iterator < true, true, false, true, false, false > | reg_iterator |
| reg_iterator/reg_begin/reg_end - Walk all defs and uses of the specified register. More... | |
| typedef defusechain_instr_iterator < true, true, false, false, true, false > | reg_instr_iterator |
| reg_instr_iterator/reg_instr_begin/reg_instr_end - Walk all defs and uses of the specified register, stepping by MachineInstr. More... | |
| typedef defusechain_instr_iterator < true, true, false, false, false, true > | reg_bundle_iterator |
| reg_bundle_iterator/reg_bundle_begin/reg_bundle_end - Walk all defs and uses of the specified register, stepping by bundle. More... | |
| typedef defusechain_iterator < true, true, true, true, false, false > | reg_nodbg_iterator |
| reg_nodbg_iterator/reg_nodbg_begin/reg_nodbg_end - Walk all defs and uses of the specified register, skipping those marked as Debug. More... | |
| typedef defusechain_instr_iterator < true, true, true, false, true, false > | reg_instr_nodbg_iterator |
| reg_instr_nodbg_iterator/reg_instr_nodbg_begin/reg_instr_nodbg_end - Walk all defs and uses of the specified register, stepping by MachineInstr, skipping those marked as Debug. More... | |
| typedef defusechain_instr_iterator < true, true, true, false, false, true > | reg_bundle_nodbg_iterator |
| reg_bundle_nodbg_iterator/reg_bundle_nodbg_begin/reg_bundle_nodbg_end - Walk all defs and uses of the specified register, stepping by bundle, skipping those marked as Debug. More... | |
| typedef defusechain_iterator < false, true, false, true, false, false > | def_iterator |
| def_iterator/def_begin/def_end - Walk all defs of the specified register. More... | |
| typedef defusechain_instr_iterator < false, true, false, false, true, false > | def_instr_iterator |
| def_instr_iterator/def_instr_begin/def_instr_end - Walk all defs of the specified register, stepping by MachineInst. More... | |
| typedef defusechain_instr_iterator < false, true, false, false, false, true > | def_bundle_iterator |
| def_bundle_iterator/def_bundle_begin/def_bundle_end - Walk all defs of the specified register, stepping by bundle. More... | |
| typedef defusechain_iterator < true, false, false, true, false, false > | use_iterator |
| use_iterator/use_begin/use_end - Walk all uses of the specified register. More... | |
| typedef defusechain_instr_iterator < true, false, false, false, true, false > | use_instr_iterator |
| use_instr_iterator/use_instr_begin/use_instr_end - Walk all uses of the specified register, stepping by MachineInstr. More... | |
| typedef defusechain_instr_iterator < true, false, false, false, false, true > | use_bundle_iterator |
| use_bundle_iterator/use_bundle_begin/use_bundle_end - Walk all uses of the specified register, stepping by bundle. More... | |
| typedef defusechain_iterator < true, false, true, true, false, false > | use_nodbg_iterator |
| use_nodbg_iterator/use_nodbg_begin/use_nodbg_end - Walk all uses of the specified register, skipping those marked as Debug. More... | |
| typedef defusechain_instr_iterator < true, false, true, false, true, false > | use_instr_nodbg_iterator |
| use_instr_nodbg_iterator/use_instr_nodbg_begin/use_instr_nodbg_end - Walk all uses of the specified register, stepping by MachineInstr, skipping those marked as Debug. More... | |
| typedef defusechain_instr_iterator < true, false, true, false, false, true > | use_bundle_nodbg_iterator |
| use_bundle_nodbg_iterator/use_bundle_nodbg_begin/use_bundle_nodbg_end - Walk all uses of the specified register, stepping by bundle, skipping those marked as Debug. More... | |
| typedef std::vector< std::pair < unsigned, unsigned > >::const_iterator | livein_iterator |
Public Member Functions | |
| MachineRegisterInfo (MachineFunction *MF) | |
| const TargetRegisterInfo * | getTargetRegisterInfo () const |
| void | resetDelegate (Delegate *delegate) |
| void | setDelegate (Delegate *delegate) |
| bool | isSSA () const |
| void | leaveSSA () |
| bool | tracksLiveness () const |
| tracksLiveness - Returns true when tracking register liveness accurately. More... | |
| void | invalidateLiveness () |
| invalidateLiveness - Indicates that register liveness is no longer being tracked accurately. More... | |
| bool | shouldTrackSubRegLiveness (const TargetRegisterClass &RC) const |
Returns true if liveness for register class RC should be tracked at the subregister level. More... | |
| bool | shouldTrackSubRegLiveness (unsigned VReg) const |
| bool | subRegLivenessEnabled () const |
| void | addRegOperandToUseList (MachineOperand *MO) |
| Add MO to the linked list of operands for its register. More... | |
| void | removeRegOperandFromUseList (MachineOperand *MO) |
| Remove MO from its use-def list. More... | |
| void | moveOperands (MachineOperand *Dst, MachineOperand *Src, unsigned NumOps) |
| Move NumOps operands from Src to Dst, updating use-def lists as needed. More... | |
| void | verifyUseList (unsigned Reg) const |
| Verify the sanity of the use list for Reg. More... | |
| void | verifyUseLists () const |
| Verify the use list of all registers. More... | |
| reg_iterator | reg_begin (unsigned RegNo) const |
| iterator_range< reg_iterator > | reg_operands (unsigned Reg) const |
| reg_instr_iterator | reg_instr_begin (unsigned RegNo) const |
| iterator_range < reg_instr_iterator > | reg_instructions (unsigned Reg) const |
| reg_bundle_iterator | reg_bundle_begin (unsigned RegNo) const |
| iterator_range < reg_bundle_iterator > | reg_bundles (unsigned Reg) const |
| bool | reg_empty (unsigned RegNo) const |
| reg_empty - Return true if there are no instructions using or defining the specified register (it may be live-in). More... | |
| reg_nodbg_iterator | reg_nodbg_begin (unsigned RegNo) const |
| iterator_range < reg_nodbg_iterator > | reg_nodbg_operands (unsigned Reg) const |
| reg_instr_nodbg_iterator | reg_instr_nodbg_begin (unsigned RegNo) const |
| iterator_range < reg_instr_nodbg_iterator > | reg_nodbg_instructions (unsigned Reg) const |
| reg_bundle_nodbg_iterator | reg_bundle_nodbg_begin (unsigned RegNo) const |
| iterator_range < reg_bundle_nodbg_iterator > | reg_nodbg_bundles (unsigned Reg) const |
| bool | reg_nodbg_empty (unsigned RegNo) const |
| reg_nodbg_empty - Return true if the only instructions using or defining Reg are Debug instructions. More... | |
| def_iterator | def_begin (unsigned RegNo) const |
| iterator_range< def_iterator > | def_operands (unsigned Reg) const |
| def_instr_iterator | def_instr_begin (unsigned RegNo) const |
| iterator_range < def_instr_iterator > | def_instructions (unsigned Reg) const |
| def_bundle_iterator | def_bundle_begin (unsigned RegNo) const |
| iterator_range < def_bundle_iterator > | def_bundles (unsigned Reg) const |
| bool | def_empty (unsigned RegNo) const |
| def_empty - Return true if there are no instructions defining the specified register (it may be live-in). More... | |
| bool | hasOneDef (unsigned RegNo) const |
| Return true if there is exactly one operand defining the specified register. More... | |
| use_iterator | use_begin (unsigned RegNo) const |
| iterator_range< use_iterator > | use_operands (unsigned Reg) const |
| use_instr_iterator | use_instr_begin (unsigned RegNo) const |
| iterator_range < use_instr_iterator > | use_instructions (unsigned Reg) const |
| use_bundle_iterator | use_bundle_begin (unsigned RegNo) const |
| iterator_range < use_bundle_iterator > | use_bundles (unsigned Reg) const |
| bool | use_empty (unsigned RegNo) const |
| use_empty - Return true if there are no instructions using the specified register. More... | |
| bool | hasOneUse (unsigned RegNo) const |
| hasOneUse - Return true if there is exactly one instruction using the specified register. More... | |
| use_nodbg_iterator | use_nodbg_begin (unsigned RegNo) const |
| iterator_range < use_nodbg_iterator > | use_nodbg_operands (unsigned Reg) const |
| use_instr_nodbg_iterator | use_instr_nodbg_begin (unsigned RegNo) const |
| iterator_range < use_instr_nodbg_iterator > | use_nodbg_instructions (unsigned Reg) const |
| use_bundle_nodbg_iterator | use_bundle_nodbg_begin (unsigned RegNo) const |
| iterator_range < use_bundle_nodbg_iterator > | use_nodbg_bundles (unsigned Reg) const |
| bool | use_nodbg_empty (unsigned RegNo) const |
| use_nodbg_empty - Return true if there are no non-Debug instructions using the specified register. More... | |
| bool | hasOneNonDBGUse (unsigned RegNo) const |
| hasOneNonDBGUse - Return true if there is exactly one non-Debug instruction using the specified register. More... | |
| void | replaceRegWith (unsigned FromReg, unsigned ToReg) |
| replaceRegWith - Replace all instances of FromReg with ToReg in the machine function. More... | |
| MachineInstr * | getVRegDef (unsigned Reg) const |
| getVRegDef - Return the machine instr that defines the specified virtual register or null if none is found. More... | |
| MachineInstr * | getUniqueVRegDef (unsigned Reg) const |
| getUniqueVRegDef - Return the unique machine instr that defines the specified virtual register or null if none is found. More... | |
| void | clearKillFlags (unsigned Reg) const |
| clearKillFlags - Iterate over all the uses of the given register and clear the kill flag from the MachineOperand. More... | |
| void | dumpUses (unsigned RegNo) const |
| bool | isConstantPhysReg (unsigned PhysReg) const |
| Returns true if PhysReg is unallocatable and constant throughout the function. More... | |
| PSetIterator | getPressureSets (unsigned RegUnit) const |
| Get an iterator over the pressure sets affected by the given physical or virtual register. More... | |
| const TargetRegisterClass * | getRegClass (unsigned Reg) const |
| Return the register class of the specified virtual register. More... | |
| const TargetRegisterClass * | getRegClassOrNull (unsigned Reg) const |
Return the register class of Reg, or null if Reg has not been assigned a register class yet. More... | |
| const RegisterBank * | getRegBankOrNull (unsigned Reg) const |
Return the register bank of Reg, or null if Reg has not been assigned a register bank or has been assigned a register class. More... | |
| const RegClassOrRegBank & | getRegClassOrRegBank (unsigned Reg) const |
Return the register bank or register class of Reg. More... | |
| void | setRegClass (unsigned Reg, const TargetRegisterClass *RC) |
| setRegClass - Set the register class of the specified virtual register. More... | |
| void | setRegBank (unsigned Reg, const RegisterBank &RegBank) |
Set the register bank to RegBank for Reg. More... | |
| const TargetRegisterClass * | constrainRegClass (unsigned Reg, const TargetRegisterClass *RC, unsigned MinNumRegs=0) |
| constrainRegClass - Constrain the register class of the specified virtual register to be a common subclass of RC and the current register class, but only if the new class has at least MinNumRegs registers. More... | |
| bool | recomputeRegClass (unsigned Reg) |
| recomputeRegClass - Try to find a legal super-class of Reg's register class that still satisfies the constraints from the instructions using Reg. More... | |
| unsigned | createVirtualRegister (const TargetRegisterClass *RegClass) |
| createVirtualRegister - Create and return a new virtual register in the function with the specified register class. More... | |
| VRegToTypeMap & | getVRegToType () const |
| Accessor for VRegToType. More... | |
| LLT | getType (unsigned VReg) const |
Get the low-level type of VReg or LLT{} if VReg is not a generic (target independent) virtual register. More... | |
| void | setType (unsigned VReg, LLT Ty) |
Set the low-level type of VReg to Ty. More... | |
| unsigned | createGenericVirtualRegister (LLT Ty) |
Create and return a new generic virtual register with low-level type Ty. More... | |
| void | clearVirtRegTypes () |
| Remove all types associated to virtual registers (after instruction selection and constraining of all generic virtual registers). More... | |
| unsigned | createIncompleteVirtualRegister () |
| Creates a new virtual register that has no register class, register bank or size assigned yet. More... | |
| unsigned | getNumVirtRegs () const |
| getNumVirtRegs - Return the number of virtual registers created. More... | |
| void | clearVirtRegs () |
| clearVirtRegs - Remove all virtual registers (after physreg assignment). More... | |
| void | setRegAllocationHint (unsigned VReg, unsigned Type, unsigned PrefReg) |
| setRegAllocationHint - Specify a register allocation hint for the specified virtual register. More... | |
| void | setSimpleHint (unsigned VReg, unsigned PrefReg) |
| Specify the preferred register allocation hint for the specified virtual register. More... | |
| std::pair< unsigned, unsigned > | getRegAllocationHint (unsigned VReg) const |
| getRegAllocationHint - Return the register allocation hint for the specified virtual register. More... | |
| unsigned | getSimpleHint (unsigned VReg) const |
| getSimpleHint - Return the preferred register allocation hint, or 0 if a standard simple hint (Type == 0) is not set. More... | |
| void | markUsesInDebugValueAsUndef (unsigned Reg) const |
| markUsesInDebugValueAsUndef - Mark every DBG_VALUE referencing the specified register as undefined which causes the DBG_VALUE to be deleted during LiveDebugVariables analysis. More... | |
| bool | isPhysRegModified (unsigned PhysReg, bool SkipNoReturnDef=false) const |
| Return true if the specified register is modified in this function. More... | |
| bool | isPhysRegUsed (unsigned PhysReg) const |
| Return true if the specified register is modified or read in this function. More... | |
| void | addPhysRegsUsedFromRegMask (const uint32_t *RegMask) |
| addPhysRegsUsedFromRegMask - Mark any registers not in RegMask as used. More... | |
| const BitVector & | getUsedPhysRegsMask () const |
| void | setUsedPhysRegMask (BitVector &Mask) |
| void | freezeReservedRegs (const MachineFunction &) |
| freezeReservedRegs - Called by the register allocator to freeze the set of reserved registers before allocation begins. More... | |
| bool | reservedRegsFrozen () const |
| reservedRegsFrozen - Returns true after freezeReservedRegs() was called to ensure the set of reserved registers stays constant. More... | |
| bool | canReserveReg (unsigned PhysReg) const |
| canReserveReg - Returns true if PhysReg can be used as a reserved register. More... | |
| const BitVector & | getReservedRegs () const |
| getReservedRegs - Returns a reference to the frozen set of reserved registers. More... | |
| bool | isReserved (unsigned PhysReg) const |
| isReserved - Returns true when PhysReg is a reserved register. More... | |
| bool | isAllocatable (unsigned PhysReg) const |
| isAllocatable - Returns true when PhysReg belongs to an allocatable register class and it hasn't been reserved. More... | |
| void | addLiveIn (unsigned Reg, unsigned vreg=0) |
| addLiveIn - Add the specified register as a live-in. More... | |
| livein_iterator | livein_begin () const |
| livein_iterator | livein_end () const |
| bool | livein_empty () const |
| bool | isLiveIn (unsigned Reg) const |
| unsigned | getLiveInPhysReg (unsigned VReg) const |
| getLiveInPhysReg - If VReg is a live-in virtual register, return the corresponding live-in physical register. More... | |
| unsigned | getLiveInVirtReg (unsigned PReg) const |
| getLiveInVirtReg - If PReg is a live-in physical register, return the corresponding live-in physical register. More... | |
| void | EmitLiveInCopies (MachineBasicBlock *EntryMBB, const TargetRegisterInfo &TRI, const TargetInstrInfo &TII) |
| EmitLiveInCopies - Emit copies to initialize livein virtual registers into the given entry block. More... | |
| LaneBitmask | getMaxLaneMaskForVReg (unsigned Reg) const |
Returns a mask covering all bits that can appear in lane masks of subregisters of the virtual register Reg. More... | |
Static Public Member Functions | |
| static reg_iterator | reg_end () |
| static reg_instr_iterator | reg_instr_end () |
| static reg_bundle_iterator | reg_bundle_end () |
| static reg_nodbg_iterator | reg_nodbg_end () |
| static reg_instr_nodbg_iterator | reg_instr_nodbg_end () |
| static reg_bundle_nodbg_iterator | reg_bundle_nodbg_end () |
| static def_iterator | def_end () |
| static def_instr_iterator | def_instr_end () |
| static def_bundle_iterator | def_bundle_end () |
| static use_iterator | use_end () |
| static use_instr_iterator | use_instr_end () |
| static use_bundle_iterator | use_bundle_end () |
| static use_nodbg_iterator | use_nodbg_end () |
| static use_instr_nodbg_iterator | use_instr_nodbg_end () |
| static use_bundle_nodbg_iterator | use_bundle_nodbg_end () |
Friends | |
| template<bool , bool , bool , bool , bool , bool > | |
| class | defusechain_iterator |
| template<bool , bool , bool , bool , bool , bool > | |
| class | defusechain_instr_iterator |
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
Definition at line 40 of file MachineRegisterInfo.h.
| typedef defusechain_instr_iterator<false,true,false,false,false,true> llvm::MachineRegisterInfo::def_bundle_iterator |
def_bundle_iterator/def_bundle_begin/def_bundle_end - Walk all defs of the specified register, stepping by bundle.
Definition at line 367 of file MachineRegisterInfo.h.
| typedef defusechain_instr_iterator<false,true,false,false,true,false> llvm::MachineRegisterInfo::def_instr_iterator |
def_instr_iterator/def_instr_begin/def_instr_end - Walk all defs of the specified register, stepping by MachineInst.
Definition at line 351 of file MachineRegisterInfo.h.
| typedef defusechain_iterator<false,true,false,true,false,false> llvm::MachineRegisterInfo::def_iterator |
def_iterator/def_begin/def_end - Walk all defs of the specified register.
Definition at line 338 of file MachineRegisterInfo.h.
| typedef std::vector<std::pair<unsigned,unsigned> >::const_iterator llvm::MachineRegisterInfo::livein_iterator |
Definition at line 804 of file MachineRegisterInfo.h.
| typedef defusechain_instr_iterator<true,true,false,false,false,true> llvm::MachineRegisterInfo::reg_bundle_iterator |
reg_bundle_iterator/reg_bundle_begin/reg_bundle_end - Walk all defs and uses of the specified register, stepping by bundle.
Definition at line 264 of file MachineRegisterInfo.h.
| typedef defusechain_instr_iterator<true,true,true,false,false,true> llvm::MachineRegisterInfo::reg_bundle_nodbg_iterator |
reg_bundle_nodbg_iterator/reg_bundle_nodbg_begin/reg_bundle_nodbg_end - Walk all defs and uses of the specified register, stepping by bundle, skipping those marked as Debug.
Definition at line 317 of file MachineRegisterInfo.h.
| typedef defusechain_instr_iterator<true,true,false,false,true,false> llvm::MachineRegisterInfo::reg_instr_iterator |
reg_instr_iterator/reg_instr_begin/reg_instr_end - Walk all defs and uses of the specified register, stepping by MachineInstr.
Definition at line 248 of file MachineRegisterInfo.h.
| typedef defusechain_instr_iterator<true,true,true,false,true,false> llvm::MachineRegisterInfo::reg_instr_nodbg_iterator |
reg_instr_nodbg_iterator/reg_instr_nodbg_begin/reg_instr_nodbg_end - Walk all defs and uses of the specified register, stepping by MachineInstr, skipping those marked as Debug.
Definition at line 300 of file MachineRegisterInfo.h.
| typedef defusechain_iterator<true,true,false,true,false,false> llvm::MachineRegisterInfo::reg_iterator |
reg_iterator/reg_begin/reg_end - Walk all defs and uses of the specified register.
Definition at line 235 of file MachineRegisterInfo.h.
| typedef defusechain_iterator<true,true,true,true,false,false> llvm::MachineRegisterInfo::reg_nodbg_iterator |
reg_nodbg_iterator/reg_nodbg_begin/reg_nodbg_end - Walk all defs and uses of the specified register, skipping those marked as Debug.
Definition at line 283 of file MachineRegisterInfo.h.
| typedef defusechain_instr_iterator<true,false,false,false,false,true> llvm::MachineRegisterInfo::use_bundle_iterator |
use_bundle_iterator/use_bundle_begin/use_bundle_end - Walk all uses of the specified register, stepping by bundle.
Definition at line 423 of file MachineRegisterInfo.h.
| typedef defusechain_instr_iterator<true,false,true,false,false,true> llvm::MachineRegisterInfo::use_bundle_nodbg_iterator |
use_bundle_nodbg_iterator/use_bundle_nodbg_begin/use_bundle_nodbg_end - Walk all uses of the specified register, stepping by bundle, skipping those marked as Debug.
Definition at line 485 of file MachineRegisterInfo.h.
| typedef defusechain_instr_iterator<true,false,false,false,true,false> llvm::MachineRegisterInfo::use_instr_iterator |
use_instr_iterator/use_instr_begin/use_instr_end - Walk all uses of the specified register, stepping by MachineInstr.
Definition at line 407 of file MachineRegisterInfo.h.
| typedef defusechain_instr_iterator<true,false,true,false,true,false> llvm::MachineRegisterInfo::use_instr_nodbg_iterator |
use_instr_nodbg_iterator/use_instr_nodbg_begin/use_instr_nodbg_end - Walk all uses of the specified register, stepping by MachineInstr, skipping those marked as Debug.
Definition at line 468 of file MachineRegisterInfo.h.
| typedef defusechain_iterator<true,false,false,true,false,false> llvm::MachineRegisterInfo::use_iterator |
use_iterator/use_begin/use_end - Walk all uses of the specified register.
Definition at line 394 of file MachineRegisterInfo.h.
| typedef defusechain_iterator<true,false,true,true,false,false> llvm::MachineRegisterInfo::use_nodbg_iterator |
use_nodbg_iterator/use_nodbg_begin/use_nodbg_end - Walk all uses of the specified register, skipping those marked as Debug.
Definition at line 451 of file MachineRegisterInfo.h.
|
explicit |
Definition at line 30 of file MachineRegisterInfo.cpp.
References llvm::MCRegisterInfo::getNumRegs(), getTargetRegisterInfo(), and llvm::BitVector::resize().
addLiveIn - Add the specified register as a live-in.
Note that it is an error to add the same register to the same set more than once.
Definition at line 797 of file MachineRegisterInfo.h.
Referenced by llvm::MachineFunction::addLiveIn(), addLiveIn(), llvm::AMDGPUTargetLowering::CreateLiveInRegister(), llvm::SIFrameLowering::emitPrologue(), llvm::HexagonTargetLowering::LowerFormalArguments(), llvm::SystemZTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), and llvm::MIRParserImpl::parseRegisterInfo().
addPhysRegsUsedFromRegMask - Mark any registers not in RegMask as used.
This corresponds to the bit mask attached to register mask operands.
Definition at line 724 of file MachineRegisterInfo.h.
References llvm::BitVector::setBitsNotInMask().
Referenced by llvm::MIRParserImpl::setupRegisterInfo().
| void MachineRegisterInfo::addRegOperandToUseList | ( | MachineOperand * | MO | ) |
Add MO to the linked list of operands for its register.
Definition at line 213 of file MachineRegisterInfo.cpp.
References assert(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isDef(), and llvm::MachineOperand::Reg.
Referenced by llvm::MachineOperand::ChangeToRegister(), llvm::MachineOperand::setIsDef(), and llvm::MachineOperand::setReg().
canReserveReg - Returns true if PhysReg can be used as a reserved register.
Any register can be reserved before freezeReservedRegs() is called.
Definition at line 757 of file MachineRegisterInfo.h.
References reservedRegsFrozen(), and llvm::BitVector::test().
Referenced by llvm::MipsRegisterInfo::canRealignStack(), llvm::X86RegisterInfo::canRealignStack(), and llvm::ARMBaseRegisterInfo::canRealignStack().
| void MachineRegisterInfo::clearKillFlags | ( | unsigned | Reg | ) | const |
clearKillFlags - Iterate over all the uses of the given register and clear the kill flag from the MachineOperand.
This function is used by optimization passes which extend register lifetimes and need only preserve conservative kill flag information.
Definition at line 378 of file MachineRegisterInfo.cpp.
References use_operands().
Referenced by emitIndirectDst(), llvm::HexagonInstrInfo::expandPostRAPseudo(), insertPHI(), llvm::AArch64InstrInfo::insertSelect(), llvm::SIInstrInfo::moveToVALU(), llvm::HexagonInstrInfo::PredicateInstruction(), and llvm::SelectionDAGISel::runOnMachineFunction().
| void MachineRegisterInfo::clearVirtRegs | ( | ) |
clearVirtRegs - Remove all virtual registers (after physreg assignment).
Definition at line 150 of file MachineRegisterInfo.cpp.
References getNumVirtRegs(), I, i, llvm::TargetRegisterInfo::index2VirtReg(), llvm_unreachable, and verifyUseList().
Referenced by llvm::SIInstrInfo::insertIndirectBranch().
| void MachineRegisterInfo::clearVirtRegTypes | ( | ) |
Remove all types associated to virtual registers (after instruction selection and constraining of all generic virtual registers).
Definition at line 145 of file MachineRegisterInfo.cpp.
References llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::clear(), and getVRegToType().
| const TargetRegisterClass * MachineRegisterInfo::constrainRegClass | ( | unsigned | Reg, |
| const TargetRegisterClass * | RC, | ||
| unsigned | MinNumRegs = 0 |
||
| ) |
constrainRegClass - Constrain the register class of the specified virtual register to be a common subclass of RC and the current register class, but only if the new class has at least MinNumRegs registers.
Return the new register class, or NULL if no such class exists. This should only be used when the constraint is known to be trivial, like GR32 -> GR32_NOSP. Beware of increasing register pressure.
Definition at line 55 of file MachineRegisterInfo.cpp.
References llvm::TargetRegisterInfo::getCommonSubClass(), llvm::TargetRegisterClass::getNumRegs(), getRegClass(), getTargetRegisterInfo(), and setRegClass().
Referenced by llvm::MachineBasicBlock::addLiveIn(), llvm::X86InstrInfo::classifyLEAReg(), llvm::RegisterBankInfo::constrainGenericRegister(), llvm::FastISel::constrainOperandRegClass(), llvm::SystemZInstrInfo::convertToThreeAddress(), llvm::X86InstrInfo::convertToThreeAddress(), llvm::FastISel::fastEmitInst_extractsubreg(), llvm::AArch64InstrInfo::foldMemoryOperandImpl(), genFusedMultiply(), genMaddR(), llvm::AArch64InstrInfo::insertSelect(), llvm::SystemZInstrInfo::insertSelect(), llvm::Thumb2InstrInfo::loadRegFromStackSlot(), llvm::SIInstrInfo::loadRegFromStackSlot(), llvm::AArch64InstrInfo::loadRegFromStackSlot(), llvm::AArch64RegisterInfo::materializeFrameBaseRegister(), llvm::PPCRegisterInfo::materializeFrameBaseRegister(), llvm::ARMBaseRegisterInfo::materializeFrameBaseRegister(), llvm::ARMBaseInstrInfo::optimizeSelect(), llvm::TargetInstrInfo::reassociateOps(), llvm::PPCRegisterInfo::resolveFrameIndex(), llvm::SelectionDAGISel::runOnMachineFunction(), llvm::Thumb2InstrInfo::storeRegToStackSlot(), llvm::SIInstrInfo::storeRegToStackSlot(), llvm::AArch64InstrInfo::storeRegToStackSlot(), llvm::TailDuplicator::tailDuplicateAndUpdate(), and UpdateOperandRegClass().
Create and return a new generic virtual register with low-level type Ty.
Definition at line 134 of file MachineRegisterInfo.cpp.
References createIncompleteVirtualRegister(), getVRegToType(), and llvm::MachineRegisterInfo::Delegate::MRI_NoteNewVirtualRegister().
Referenced by llvm::RegisterBankInfo::OperandsMapper::createVRegs(), llvm::CallLowering::ValueHandler::extendRegister(), llvm::LegalizerHelper::fewerElementsVector(), llvm::LegalizerHelper::narrowScalar(), and llvm::LegalizerHelper::widenScalar().
| unsigned MachineRegisterInfo::createIncompleteVirtualRegister | ( | ) |
Creates a new virtual register that has no register class, register bank or size assigned yet.
This is only allowed to be used temporarily while constructing machine instructions. Most operations are undefined on an incomplete register until one of setRegClass(), setRegBank() or setSize() has been called on it.
Definition at line 96 of file MachineRegisterInfo.cpp.
References getNumVirtRegs(), and llvm::TargetRegisterInfo::index2VirtReg().
Referenced by createGenericVirtualRegister(), createVirtualRegister(), and llvm::PerFunctionMIParsingState::getVRegInfo().
| unsigned MachineRegisterInfo::createVirtualRegister | ( | const TargetRegisterClass * | RegClass | ) |
createVirtualRegister - Create and return a new virtual register in the function with the specified register class.
Definition at line 107 of file MachineRegisterInfo.cpp.
References assert(), createIncompleteVirtualRegister(), llvm::TargetRegisterClass::isAllocatable(), and llvm::MachineRegisterInfo::Delegate::MRI_NoteNewVirtualRegister().
Referenced by llvm::MachineBasicBlock::addLiveIn(), llvm::MachineFunction::addLiveIn(), addLiveIn(), attachMEMCPYScratchRegs(), llvm::X86InstrInfo::classifyLEAReg(), llvm::constrainOperandRegClass(), llvm::LiveRangeEdit::createEmptyIntervalFrom(), llvm::LiveRangeEdit::createFrom(), llvm::AMDGPUTargetLowering::CreateLiveInRegister(), llvm::FunctionLoweringInfo::CreateReg(), llvm::FastISel::createResultReg(), createSwiftErrorEntriesInEntryBlock(), createVirtualRegs(), llvm::HexagonInstrInfo::createVR(), llvm::WebAssemblyRegisterInfo::eliminateFrameIndex(), llvm::SystemZRegisterInfo::eliminateFrameIndex(), llvm::ThumbRegisterInfo::eliminateFrameIndex(), llvm::AArch64RegisterInfo::eliminateFrameIndex(), llvm::SIRegisterInfo::eliminateFrameIndex(), llvm::PPCRegisterInfo::eliminateFrameIndex(), llvm::ARMBaseRegisterInfo::eliminateFrameIndex(), llvm::PPCTargetLowering::EmitAtomicBinary(), llvm::SparcTargetLowering::emitEHSjLjLongJmp(), llvm::PPCTargetLowering::emitEHSjLjLongJmp(), llvm::SparcTargetLowering::emitEHSjLjSetJmp(), llvm::PPCTargetLowering::emitEHSjLjSetJmp(), emitIndirectDst(), emitIndirectSrc(), llvm::SITargetLowering::EmitInstrWithCustomInserter(), llvm::ARMTargetLowering::EmitInstrWithCustomInserter(), llvm::PPCTargetLowering::EmitInstrWithCustomInserter(), llvm::X86TargetLowering::EmitInstrWithCustomInserter(), emitLoadM0FromVGPRLoop(), llvm::PPCTargetLowering::EmitPartwordAtomicBinary(), llvm::MipsSEFrameLowering::emitPrologue(), llvm::MSP430TargetLowering::EmitShiftInstr(), emitThumbRegPlusImmInReg(), llvm::ARMBaseInstrInfo::FoldImmediate(), foldVGPRCopyIntoRegSequence(), forceReg(), llvm::AArch64InstrInfo::genAlternativeCodeSequence(), llvm::FunctionLoweringInfo::getCatchPadExceptionPointerVReg(), llvm::MipsFunctionInfo::getGlobalBaseReg(), llvm::LanaiMachineFunctionInfo::getGlobalBaseReg(), llvm::SparcInstrInfo::getGlobalBaseReg(), llvm::X86InstrInfo::getGlobalBaseReg(), llvm::FunctionLoweringInfo::getOrCreateSwiftErrorVReg(), GetRegistersForValue(), llvm::AArch64TargetLowering::insertCopiesSplitCSR(), llvm::PPCTargetLowering::insertCopiesSplitCSR(), llvm::SIInstrInfo::insertIndirectBranch(), InsertNewDef(), insertPHI(), llvm::SIInstrInfo::legalizeGenericOperand(), llvm::SIInstrInfo::legalizeOperands(), llvm::SIInstrInfo::legalizeOpWithMove(), llvm::MipsSEInstrInfo::loadImmediate(), loadM0FromVGPR(), llvm::SelectionDAGBuilder::LowerCallTo(), llvm::PPCRegisterInfo::lowerCRBitRestore(), llvm::PPCRegisterInfo::lowerCRBitSpilling(), llvm::PPCRegisterInfo::lowerCRRestore(), llvm::PPCRegisterInfo::lowerCRSpilling(), llvm::PPCRegisterInfo::lowerDynamicAlloc(), llvm::HexagonTargetLowering::LowerFormalArguments(), llvm::SystemZTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::PPCRegisterInfo::lowerVRSAVERestore(), llvm::PPCRegisterInfo::lowerVRSAVESpilling(), llvm::SIRegisterInfo::materializeFrameBaseRegister(), MaybeRewriteToDrop(), MaybeRewriteToFallthrough(), MoveAndTeeForMultiUse(), MoveForSingleUse(), llvm::SIInstrInfo::moveToVALU(), propagateSwiftErrorVRegs(), llvm::SIInstrInfo::readlaneVGPRToSGPR(), llvm::TargetInstrInfo::reassociateOps(), RematerializeCheapDef(), llvm::SIRegisterInfo::restoreSGPR(), llvm::AVRDynAllocaSR::runOnMachineFunction(), llvm::AArch64InstructionSelector::select(), llvm::AVRDAGToDAGISel::SelectInlineAsmMemoryOperand(), setM0ToIndexFromSGPR(), llvm::SIRegisterInfo::spillSGPR(), llvm::LiveIntervals::splitSeparateComponents(), and writeSPToMemory().
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Definition at line 339 of file MachineRegisterInfo.h.
Referenced by def_empty(), def_operands(), hasOneDef(), isKilled(), isPhysRegModified(), and MustSaveLR().
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Definition at line 368 of file MachineRegisterInfo.h.
Referenced by def_bundles().
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Definition at line 371 of file MachineRegisterInfo.h.
Referenced by def_bundles().
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Definition at line 375 of file MachineRegisterInfo.h.
References def_bundle_begin(), def_bundle_end(), and llvm::make_range().
def_empty - Return true if there are no instructions defining the specified register (it may be live-in).
Definition at line 381 of file MachineRegisterInfo.h.
References def_begin(), and def_end().
Referenced by llvm::MIRPrinter::convert(), getUniqueVRegDef(), isConstantPhysReg(), isSSA(), and llvm::AArch64InstrInfo::optimizeCondBranch().
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Definition at line 342 of file MachineRegisterInfo.h.
Referenced by def_empty(), def_operands(), hasOneDef(), isKilled(), isPhysRegModified(), and MustSaveLR().
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Definition at line 352 of file MachineRegisterInfo.h.
Referenced by llvm::Legalizer::combineExtracts(), def_instructions(), getUniqueVRegDef(), getVRegDef(), isDefBetween(), isImplicitlyDef(), regIsPICBase(), and llvm::InstructionSelect::runOnMachineFunction().
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Definition at line 355 of file MachineRegisterInfo.h.
Referenced by def_instructions(), getUniqueVRegDef(), getVRegDef(), isDefBetween(), isImplicitlyDef(), regIsPICBase(), and llvm::InstructionSelect::runOnMachineFunction().
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Definition at line 360 of file MachineRegisterInfo.h.
References def_instr_begin(), def_instr_end(), and llvm::make_range().
Referenced by getSingleDef(), HasArgumentDef(), and isImplicitlyDefined().
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Definition at line 344 of file MachineRegisterInfo.h.
References def_begin(), def_end(), and llvm::make_range().
Referenced by llvm::LiveInterval::computeSubRangeUndefs(), and llvm::LiveRangeCalc::createDeadDefs().
| void MachineRegisterInfo::dumpUses | ( | unsigned | RegNo | ) | const |
Definition at line 448 of file MachineRegisterInfo.cpp.
References I, and use_instructions().
| void MachineRegisterInfo::EmitLiveInCopies | ( | MachineBasicBlock * | EntryMBB, |
| const TargetRegisterInfo & | TRI, | ||
| const TargetInstrInfo & | TII | ||
| ) |
EmitLiveInCopies - Emit copies to initialize livein virtual registers into the given entry block.
Definition at line 411 of file MachineRegisterInfo.cpp.
References llvm::MachineBasicBlock::addLiveIn(), llvm::MachineBasicBlock::begin(), llvm::BuildMI(), llvm::MCInstrInfo::get(), i, and use_empty().
Referenced by llvm::SelectionDAGISel::runOnMachineFunction().
| void MachineRegisterInfo::freezeReservedRegs | ( | const MachineFunction & | MF | ) |
freezeReservedRegs - Called by the register allocator to freeze the set of reserved registers before allocation begins.
Definition at line 454 of file MachineRegisterInfo.cpp.
References assert(), llvm::MCRegisterInfo::getNumRegs(), llvm::TargetRegisterInfo::getReservedRegs(), getTargetRegisterInfo(), and llvm::BitVector::size().
Referenced by llvm::RegAllocBase::init(), llvm::SelectionDAGISel::runOnMachineFunction(), llvm::IRTranslator::runOnMachineFunction(), and llvm::MIRParserImpl::setupRegisterInfo().
getLiveInPhysReg - If VReg is a live-in virtual register, return the corresponding live-in physical register.
Definition at line 392 of file MachineRegisterInfo.cpp.
References E, I, livein_begin(), and livein_end().
Referenced by llvm::TargetLowering::parametersInCSRMatch().
getLiveInVirtReg - If PReg is a live-in physical register, return the corresponding live-in physical register.
Definition at line 401 of file MachineRegisterInfo.cpp.
References E, I, livein_begin(), and livein_end().
Referenced by llvm::MachineFunction::addLiveIn(), and llvm::AMDGPUTargetLowering::CreateLiveInRegister().
| LaneBitmask MachineRegisterInfo::getMaxLaneMaskForVReg | ( | unsigned | Reg | ) | const |
Returns a mask covering all bits that can appear in lane masks of subregisters of the virtual register Reg.
Definition at line 440 of file MachineRegisterInfo.cpp.
References assert(), llvm::TargetRegisterClass::getLaneMask(), getRegClass(), and llvm::TargetRegisterInfo::isVirtualRegister().
Referenced by llvm::LiveRangeCalc::calculate(), llvm::LiveInterval::computeSubRangeUndefs(), getLanesWithProperty(), and llvm::LiveInterval::verify().
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getNumVirtRegs - Return the number of virtual registers created.
Definition at line 668 of file MachineRegisterInfo.h.
Referenced by llvm::LiveIntervals::addKillFlags(), llvm::LiveVariables::addNewBlock(), llvm::ScheduleDAGInstrs::buildSchedGraph(), clearVirtRegs(), llvm::MIRPrinter::convert(), createIncompleteVirtualRegister(), llvm::VirtRegMap::grow(), llvm::LiveRegSet::init(), llvm::RegPressureTracker::init(), llvm::ScheduleDAGMILive::initRegPressure(), llvm::WebAssemblyFunctionInfo::initWARegs(), isSSA(), llvm::VirtRegMap::print(), llvm::LiveIntervals::print(), llvm::LiveIntervals::runOnMachineFunction(), llvm::MachineBasicBlock::SplitCriticalEdge(), and verifyUseLists().
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Get an iterator over the pressure sets affected by the given physical or virtual register.
If RegUnit is physical, it must be a register unit (from MCRegUnitIterator).
Definition at line 1065 of file MachineRegisterInfo.h.
Referenced by llvm::PressureDiff::addPressureChange(), decreaseSetPressure(), llvm::SIScheduleDAGMI::fillVgprSgprCost(), llvm::RegPressureTracker::increaseRegPressure(), and increaseSetPressure().
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getRegAllocationHint - Return the register allocation hint for the specified virtual register.
Definition at line 690 of file MachineRegisterInfo.h.
References assert(), and llvm::TargetRegisterInfo::isVirtualRegister().
Referenced by llvm::VirtRegAuxInfo::calculateSpillWeightAndHint(), llvm::ARMBaseRegisterInfo::getRegAllocationHints(), llvm::TargetRegisterInfo::getRegAllocationHints(), getSimpleHint(), llvm::VirtRegMap::hasKnownPreference(), and llvm::ARMBaseRegisterInfo::updateRegAllocHint().
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Return the register bank of Reg, or null if Reg has not been assigned a register bank or has been assigned a register class.
Definition at line 589 of file MachineRegisterInfo.h.
References llvm::PointerUnion< PT1, PT2 >::dyn_cast().
Referenced by llvm::MIRPrinter::convert().
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Return the register class of the specified virtual register.
This shouldn't be used directly unless Reg has a register class.
Definition at line 562 of file MachineRegisterInfo.h.
References assert().
Referenced by llvm::RegsForValue::AddInlineAsmOperands(), llvm::MachineFunction::addLiveIn(), llvm::SITargetLowering::AdjustInstrPostInstrSelection(), llvm::RegAllocBase::allocatePhysRegs(), llvm::AllocationOrder::AllocationOrder(), llvm::VirtRegMap::assignVirt2StackSlot(), llvm::LiveRangeEdit::calculateRegClassAndHint(), canFoldCopy(), canFoldIntoCSel(), llvm::PPCInstrInfo::canInsertSelect(), llvm::AArch64InstrInfo::canInsertSelect(), llvm::SystemZInstrInfo::canInsertSelect(), llvm::X86InstrInfo::canInsertSelect(), constrainRegClass(), llvm::MIRPrinter::convert(), ConvertImplicitDefToConstZero(), llvm::SystemZInstrInfo::convertToThreeAddress(), copyHint(), llvm::NVPTXInstrInfo::copyPhysReg(), llvm::LiveRangeEdit::createEmptyIntervalFrom(), llvm::LiveRangeEdit::createFrom(), llvm::HexagonFrameLowering::determineCalleeSaves(), doScavengeFrameVirtualRegs(), llvm::SparcTargetLowering::emitEHSjLjSetJmp(), llvm::PPCTargetLowering::emitEHSjLjSetJmp(), emitIndirectDst(), emitIndirectSrc(), llvm::FastISel::fastEmitInst_extractsubreg(), llvm::SIInstrInfo::FoldImmediate(), llvm::ARMBaseInstrInfo::FoldImmediate(), llvm::AArch64InstrInfo::foldMemoryOperandImpl(), llvm::SystemZInstrInfo::foldMemoryOperandImpl(), foldPatchpoint(), foldVGPRCopyIntoRegSequence(), llvm::BitTracker::MachineEvaluator::getCell(), getCopyRegClasses(), GetCostForDef(), llvm::ScheduleDAGInstrs::getLaneMaskForMO(), getMaxLaneMaskForVReg(), llvm::PPCInstrInfo::getOperandLatency(), llvm::SIInstrInfo::getOpRegClass(), llvm::BitTracker::MachineEvaluator::getRegBitWidth(), llvm::SIRegisterInfo::getRegClassForReg(), getRegTy(), hasVGPROperands(), llvm::MachineSSAUpdater::Initialize(), insertPHI(), llvm::SystemZInstrInfo::insertSelect(), llvm::X86InstrInfo::insertSelect(), isCrossCopy(), isFPR64(), llvm::SIInstrInfo::isLegalRegOperand(), isNonFoldablePartialRegisterLoad(), llvm::SIRegisterInfo::isSGPRReg(), isVGPR(), llvm::SIInstrInfo::legalizeOperands(), llvm::SIInstrInfo::legalizeOperandsSMRD(), llvm::SIInstrInfo::legalizeOperandsVOP3(), llvm::HexagonEvaluator::mask(), MaybeRewriteToDrop(), MaybeRewriteToFallthrough(), MoveAndTeeForMultiUse(), MoveForSingleUse(), optimizeCall(), llvm::X86InstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeSelect(), phiHasVGPROperands(), llvm::VirtRegMap::print(), PrintNodeInfo(), llvm::PSetIterator::PSetIterator(), llvm::SIInstrInfo::readlaneVGPRToSGPR(), recomputeRegClass(), RematerializeCheapDef(), llvm::SelectionDAGISel::runOnMachineFunction(), llvm::AVRDAGToDAGISel::SelectInlineAsmMemoryOperand(), setM0ToIndexFromSGPR(), llvm::CoalescerPair::setRegisters(), llvm::SIInstrInfo::shouldClusterMemOps(), shouldTrackSubRegLiveness(), llvm::LiveIntervals::splitSeparateComponents(), llvm::TailDuplicator::tailDuplicateAndUpdate(), UpdateOperandRegClass(), and llvm::SIInstrInfo::usesConstantBus().
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Return the register class of Reg, or null if Reg has not been assigned a register class yet.
Definition at line 579 of file MachineRegisterInfo.h.
References llvm::PointerUnion< PT1, PT2 >::dyn_cast().
Referenced by llvm::MIRPrinter::convert(), and llvm::InstructionSelect::runOnMachineFunction().
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Return the register bank or register class of Reg.
Reg may not have either. Definition at line 598 of file MachineRegisterInfo.h.
Referenced by llvm::RegisterBankInfo::constrainGenericRegister(), llvm::RegisterBankInfo::getRegBank(), llvm::MachineInstr::print(), llvm::AArch64InstructionSelector::select(), and setType().
getReservedRegs - Returns a reference to the frozen set of reserved registers.
This method should always be preferred to calling TRI::getReservedRegs() when possible.
Definition at line 764 of file MachineRegisterInfo.h.
References assert(), and reservedRegsFrozen().
Referenced by isReserved(), and llvm::RegisterClassInfo::runOnMachineFunction().
getSimpleHint - Return the preferred register allocation hint, or 0 if a standard simple hint (Type == 0) is not set.
Definition at line 697 of file MachineRegisterInfo.h.
References assert(), getRegAllocationHint(), and llvm::TargetRegisterInfo::isVirtualRegister().
Referenced by llvm::MIRPrinter::convert(), and llvm::VirtRegMap::hasPreferredPhys().
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Definition at line 123 of file MachineRegisterInfo.h.
References llvm::TargetSubtargetInfo::getRegisterInfo(), and llvm::MachineFunction::getSubtarget().
Referenced by llvm::LiveRangeCalc::calculate(), llvm::LiveInterval::computeSubRangeUndefs(), constrainRegClass(), llvm::WebAssemblyRegisterInfo::eliminateFrameIndex(), findUseBetween(), freezeReservedRegs(), llvm::LiveRegSet::init(), isAllocatable(), isConstantPhysReg(), isCrossCopy(), llvm::SIInstrInfo::isLegalRegOperand(), isPhysRegModified(), isPhysRegUsed(), MachineRegisterInfo(), llvm::MIPrinter::print(), PrintNodeInfo(), llvm::PSetIterator::PSetIterator(), recomputeRegClass(), replaceRegWith(), llvm::ARMBaseRegisterInfo::shouldCoalesce(), llvm::tryFoldSPUpdateIntoPushPop(), verifyUseList(), verifyUseLists(), and writeSPToMemory().
Get the low-level type of VReg or LLT{} if VReg is not a generic (target independent) virtual register.
Definition at line 120 of file MachineRegisterInfo.cpp.
References llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::end(), llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::find(), and getVRegToType().
Referenced by llvm::MachineIRBuilder::buildAdd(), llvm::MachineIRBuilder::buildBrCond(), llvm::MachineIRBuilder::buildConstant(), llvm::MachineIRBuilder::buildExtract(), llvm::MachineIRBuilder::buildFCmp(), llvm::MachineIRBuilder::buildFConstant(), llvm::MachineIRBuilder::buildFrameIndex(), llvm::MachineIRBuilder::buildGEP(), llvm::MachineIRBuilder::buildGlobalValue(), llvm::MachineIRBuilder::buildICmp(), llvm::MachineIRBuilder::buildLoad(), llvm::MachineIRBuilder::buildMul(), llvm::MachineIRBuilder::buildSelect(), llvm::MachineIRBuilder::buildSequence(), llvm::MachineIRBuilder::buildSExtOrTrunc(), llvm::MachineIRBuilder::buildStore(), llvm::MachineIRBuilder::buildSub(), llvm::MachineIRBuilder::buildUAdde(), llvm::Legalizer::combineExtracts(), llvm::MIRPrinter::convert(), llvm::LegalizerHelper::fewerElementsVector(), llvm::LegalizerInfo::getAction(), llvm::AArch64RegisterBankInfo::getInstrMapping(), getTypeToPrint(), llvm::LegalizerHelper::libcall(), llvm::LegalizerHelper::narrowScalar(), llvm::MachineInstr::print(), llvm::AArch64InstructionSelector::select(), selectCopy(), unsupportedBinOp(), and llvm::LegalizerHelper::widenScalar().
| MachineInstr * MachineRegisterInfo::getUniqueVRegDef | ( | unsigned | Reg | ) | const |
getUniqueVRegDef - Return the unique machine instr that defines the specified virtual register or null if none is found.
If there are multiple definitions or no definition, return null.
Definition at line 359 of file MachineRegisterInfo.cpp.
References def_empty(), def_instr_begin(), def_instr_end(), and I.
Referenced by canCombine(), llvm::WebAssemblyRegisterInfo::eliminateFrameIndex(), foldImmediates(), llvm::TargetInstrInfo::genAlternativeCodeSequence(), genFusedMultiply(), genMaddR(), getDef(), GetVRegDef(), getWinAllocaAmount(), llvm::TargetInstrInfo::hasReassociableOperands(), llvm::TargetInstrInfo::hasReassociableSibling(), llvm::LanaiInstrInfo::optimizeCompareInstr(), llvm::PPCInstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), llvm::X86InstrInfo::optimizeCompareInstr(), phiHasBreakDef(), and llvm::WebAssemblyFunctionInfo::stackifyVReg().
Definition at line 728 of file MachineRegisterInfo.h.
Referenced by llvm::MIRPrinter::convert(), and llvm::MIRParserImpl::parseRegisterInfo().
| MachineInstr * MachineRegisterInfo::getVRegDef | ( | unsigned | Reg | ) | const |
getVRegDef - Return the machine instr that defines the specified virtual register or null if none is found.
This assumes that the code is in SSA form, so there should only be one definition.
Definition at line 348 of file MachineRegisterInfo.cpp.
References assert(), llvm::MachineRegisterInfo::defusechain_instr_iterator< Uses, Defs, SkipDebug, ByOperand, ByInstr, ByBundle >::atEnd(), def_instr_begin(), def_instr_end(), and I.
Referenced by canCompareBeNewValueJump(), canFoldIntoCSel(), canFoldIntoMOVCC(), canFoldIntoSelect(), llvm::R600TargetLowering::EmitInstrWithCustomInserter(), FindStartOfTree(), getImmOrMaterializedImm(), llvm::LiveVariables::HandleVirtRegUse(), llvm::LiveVariables::VarInfo::isLiveIn(), llvm::SIInstrInfo::legalizeGenericOperand(), MatchingStackOffset(), llvm::AArch64InstrInfo::optimizeCondBranch(), llvm::X86InstrInfo::optimizeLoadInstr(), llvm::ARMBaseInstrInfo::produceSameValue(), removeCopies(), llvm::SelectionDAGISel::runOnMachineFunction(), llvm::LiveVariables::runOnMachineFunction(), llvm::TailDuplicator::tailDuplicateAndUpdate(), and llvm::SSAUpdaterTraits< MachineSSAUpdater >::ValueIsPHI().
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Accessor for VRegToType.
This accessor should only be used by global-isel related work.
Definition at line 638 of file MachineRegisterInfo.h.
Referenced by clearVirtRegTypes(), createGenericVirtualRegister(), getType(), llvm::InstructionSelect::runOnMachineFunction(), and setType().
Return true if there is exactly one operand defining the specified register.
Definition at line 385 of file MachineRegisterInfo.h.
References def_begin(), and def_end().
Referenced by llvm::ScheduleDAGInstrs::addVRegDefDeps(), IsSafeToMove(), isSSA(), MoveForSingleUse(), and llvm::AArch64InstrInfo::optimizeCondBranch().
hasOneNonDBGUse - Return true if there is exactly one non-Debug instruction using the specified register.
Definition at line 367 of file MachineRegisterInfo.cpp.
References use_nodbg_begin(), and use_nodbg_end().
Referenced by canCombine(), canFoldIntoMOVCC(), canFoldIntoSelect(), llvm::WebAssemblyRegisterInfo::eliminateFrameIndex(), findOnlyInterestingUse(), llvm::SystemZInstrInfo::FoldImmediate(), llvm::SIInstrInfo::FoldImmediate(), llvm::PPCInstrInfo::FoldImmediate(), llvm::ARMBaseInstrInfo::FoldImmediate(), llvm::TargetInstrInfo::hasReassociableSibling(), isOperandKill(), llvm::AArch64InstrInfo::optimizeCondBranch(), and llvm::TailDuplicator::tailDuplicateAndUpdate().
hasOneUse - Return true if there is exactly one instruction using the specified register.
Definition at line 441 of file MachineRegisterInfo.h.
References use_begin(), and use_end().
Referenced by foldImmediates(), foldVGPRCopyIntoRegSequence(), HasOneUse(), isKilled(), MoveForSingleUse(), OneUseDominatesOtherUses(), and llvm::FastISel::tryToFoldLoad().
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invalidateLiveness - Indicates that register liveness is no longer being tracked accurately.
This should be called by late passes that invalidate the liveness information.
Definition at line 177 of file MachineRegisterInfo.h.
References llvm::MachineFunction::getProperties(), llvm::MachineFunctionProperties::reset(), and llvm::MachineFunctionProperties::TracksLiveness.
Referenced by llvm::BranchFolder::OptimizeFunction(), and llvm::MIRParserImpl::parseRegisterInfo().
isAllocatable - Returns true when PhysReg belongs to an allocatable register class and it hasn't been reserved.
Allocatable registers may show up in the allocation order of some virtual register, so a register allocator needs to track its liveness and availability.
Definition at line 786 of file MachineRegisterInfo.h.
References getTargetRegisterInfo(), llvm::TargetRegisterInfo::isInAllocatableClass(), and isReserved().
Referenced by llvm::CriticalAntiDepBreaker::BreakAntiDependencies(), llvm::VirtRegAuxInfo::calculateSpillWeightAndHint(), computeLiveOuts(), llvm::SIRegisterInfo::findUnusedRegister(), llvm::PPCRegisterInfo::getCalleeSavedRegs(), and isConstantPhysReg().
Returns true if PhysReg is unallocatable and constant throughout the function.
Writing to a constant register has no effect.
Definition at line 460 of file MachineRegisterInfo.cpp.
References assert(), def_empty(), getTargetRegisterInfo(), isAllocatable(), llvm::TargetRegisterInfo::isConstantPhysReg(), llvm::TargetRegisterInfo::isPhysicalRegister(), and llvm::MCRegAliasIterator::isValid().
Referenced by llvm::ScheduleDAGInstrs::addPhysRegDeps().
Definition at line 383 of file MachineRegisterInfo.cpp.
References E, I, livein_begin(), and livein_end().
Referenced by llvm::X86FrameLowering::adjustForHiPEPrologue(), llvm::X86FrameLowering::adjustForSegmentedStacks(), llvm::AMDGPUTargetLowering::CreateLiveInRegister(), llvm::ARMFrameLowering::determineCalleeSaves(), getPrologueDeath(), llvm::Thumb1FrameLowering::spillCalleeSavedRegisters(), and llvm::X86FrameLowering::spillCalleeSavedRegisters().
| bool MachineRegisterInfo::isPhysRegModified | ( | unsigned | PhysReg, |
| bool | SkipNoReturnDef = false |
||
| ) | const |
Return true if the specified register is modified in this function.
This checks that no defining machine operands exist for the register or any of its aliases. Definitions found on functions marked noreturn are ignored, to consider them pass 'true' for optional parameter SkipNoReturnDef. The register is also considered modified when it is set in the UsedPhysRegMask.
Definition at line 520 of file MachineRegisterInfo.cpp.
References def_begin(), def_end(), getTargetRegisterInfo(), isNoReturnDef(), llvm::MCRegAliasIterator::isValid(), llvm::make_range(), and llvm::BitVector::test().
Referenced by llvm::XCoreFrameLowering::determineCalleeSaves(), llvm::TargetFrameLowering::determineCalleeSaves(), HandleVRSaveUpdate(), and IsSafeToMove().
Return true if the specified register is modified or read in this function.
This checks that no machine operands exist for the register or any of its aliases. The register is also considered used when it is set in the UsedPhysRegMask.
Definition at line 535 of file MachineRegisterInfo.cpp.
References getTargetRegisterInfo(), llvm::MCRegAliasIterator::isValid(), reg_nodbg_empty(), and llvm::BitVector::test().
Referenced by llvm::SIRegisterInfo::findUnusedRegister(), llvm::LEONMachineFunctionPass::getUnusedFPRegister(), and needToReserveScavengingSpillSlots().
isReserved - Returns true when PhysReg is a reserved register.
Reserved registers may belong to an allocatable register class, but the target has explicitly requested that they are not used.
Definition at line 776 of file MachineRegisterInfo.h.
References getReservedRegs(), and llvm::BitVector::test().
Referenced by llvm::LivePhysRegs::available(), llvm::ARMFrameLowering::determineCalleeSaves(), llvm::ARMBaseRegisterInfo::getRegAllocationHints(), llvm::TargetRegisterInfo::getRegAllocationHints(), isAllocatable(), and isImplicitlyDef().
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Definition at line 155 of file MachineRegisterInfo.h.
References llvm::MachineFunction::getProperties(), llvm::MachineFunctionProperties::hasProperty(), and llvm::MachineFunctionProperties::IsSSA.
Referenced by foldImmediates(), llvm::TailDuplicator::initMF(), and llvm::LiveVariables::runOnMachineFunction().
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Definition at line 161 of file MachineRegisterInfo.h.
References llvm::MachineFunction::getProperties(), llvm::MachineFunctionProperties::IsSSA, and llvm::MachineFunctionProperties::reset().
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Definition at line 805 of file MachineRegisterInfo.h.
Referenced by llvm::rdf::DataFlowGraph::build(), checkFnHasLiveInYmm(), llvm::rdf::Liveness::computeLiveIns(), llvm::MIRPrinter::convert(), llvm::R600InstrInfo::getIndirectIndexBegin(), getLiveInPhysReg(), getLiveInVirtReg(), HandleVRSaveUpdate(), isLiveIn(), llvm::MachineFunction::print(), and llvm::SelectionDAGISel::runOnMachineFunction().
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Definition at line 807 of file MachineRegisterInfo.h.
Referenced by llvm::R600InstrInfo::getIndirectIndexBegin(), and llvm::MachineFunction::print().
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Definition at line 806 of file MachineRegisterInfo.h.
Referenced by llvm::rdf::DataFlowGraph::build(), checkFnHasLiveInYmm(), llvm::rdf::Liveness::computeLiveIns(), llvm::MIRPrinter::convert(), llvm::R600InstrInfo::getIndirectIndexBegin(), getLiveInPhysReg(), getLiveInVirtReg(), HandleVRSaveUpdate(), isLiveIn(), llvm::MachineFunction::print(), and llvm::SelectionDAGISel::runOnMachineFunction().
| void MachineRegisterInfo::markUsesInDebugValueAsUndef | ( | unsigned | Reg | ) | const |
markUsesInDebugValueAsUndef - Mark every DBG_VALUE referencing the specified register as undefined which causes the DBG_VALUE to be deleted during LiveDebugVariables analysis.
Definition at line 479 of file MachineRegisterInfo.cpp.
References E, llvm::MachineInstr::getOperand(), I, llvm::MachineInstr::isDebugValue(), llvm::MachineOperand::setReg(), use_instr_begin(), use_instr_end(), and UseMI.
Referenced by llvm::MachineInstr::eraseFromParentAndMarkDBGValuesForRemoval().
| void MachineRegisterInfo::moveOperands | ( | MachineOperand * | Dst, |
| MachineOperand * | Src, | ||
| unsigned | NumOps | ||
| ) |
Move NumOps operands from Src to Dst, updating use-def lists as needed.
The Dst range is assumed to be uninitialized memory. (Or it may contain operands that won't be destroyed, which is OK because the MO destructor is trivial anyway).
The Src and Dst ranges may overlap.
Definition at line 281 of file MachineRegisterInfo.cpp.
References assert(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isReg(), and llvm::MachineOperand::Reg.
recomputeRegClass - Try to find a legal super-class of Reg's register class that still satisfies the constraints from the instructions using Reg.
Returns true if Reg was upgraded.
This method can be used after constraints have been removed from a virtual register, for example after removing instructions or splitting the live range.
Definition at line 72 of file MachineRegisterInfo.cpp.
References llvm::TargetSubtargetInfo::getInstrInfo(), llvm::TargetRegisterInfo::getLargestLegalSuperClass(), llvm::MachineInstr::getOperand(), getRegClass(), llvm::MachineInstr::getRegClassConstraintEffect(), llvm::MachineFunction::getSubtarget(), getTargetRegisterInfo(), MI, reg_nodbg_operands(), setRegClass(), and TII.
Referenced by llvm::LiveRangeEdit::calculateRegClassAndHint().
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Definition at line 236 of file MachineRegisterInfo.h.
Referenced by llvm::ConnectedVNInfoEqClasses::Distribute(), reg_empty(), reg_operands(), replaceRegWith(), and llvm::FastISel::tryToFoldLoad().
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Definition at line 265 of file MachineRegisterInfo.h.
Referenced by reg_bundles().
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Definition at line 268 of file MachineRegisterInfo.h.
Referenced by reg_bundles().
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Definition at line 318 of file MachineRegisterInfo.h.
Referenced by reg_nodbg_bundles().
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Definition at line 321 of file MachineRegisterInfo.h.
Referenced by reg_nodbg_bundles().
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Definition at line 272 of file MachineRegisterInfo.h.
References llvm::make_range(), reg_bundle_begin(), and reg_bundle_end().
reg_empty - Return true if there are no instructions using or defining the specified register (it may be live-in).
Definition at line 278 of file MachineRegisterInfo.h.
References reg_begin(), and reg_end().
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Definition at line 239 of file MachineRegisterInfo.h.
Referenced by llvm::ConnectedVNInfoEqClasses::Distribute(), reg_empty(), reg_operands(), and replaceRegWith().
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Definition at line 249 of file MachineRegisterInfo.h.
Referenced by llvm::RegAllocBase::allocatePhysRegs(), llvm::VirtRegAuxInfo::calculateSpillWeightAndHint(), reg_instructions(), and llvm::LiveIntervals::shrinkToUses().
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Definition at line 252 of file MachineRegisterInfo.h.
Referenced by llvm::RegAllocBase::allocatePhysRegs(), llvm::VirtRegAuxInfo::calculateSpillWeightAndHint(), reg_instructions(), and llvm::LiveIntervals::shrinkToUses().
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Definition at line 301 of file MachineRegisterInfo.h.
Referenced by reg_nodbg_instructions().
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Definition at line 304 of file MachineRegisterInfo.h.
Referenced by reg_nodbg_instructions().
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Definition at line 257 of file MachineRegisterInfo.h.
References llvm::make_range(), reg_instr_begin(), and reg_instr_end().
Referenced by llvm::findPHICopyInsertPoint(), and llvm::X86TargetLowering::hasCopyImplyingStackAdjustment().
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Definition at line 284 of file MachineRegisterInfo.h.
Referenced by reg_nodbg_empty(), and reg_nodbg_operands().
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Definition at line 326 of file MachineRegisterInfo.h.
References llvm::make_range(), reg_bundle_nodbg_begin(), and reg_bundle_nodbg_end().
reg_nodbg_empty - Return true if the only instructions using or defining Reg are Debug instructions.
Definition at line 332 of file MachineRegisterInfo.h.
References reg_nodbg_begin(), and reg_nodbg_end().
Referenced by llvm::LiveIntervals::addKillFlags(), llvm::RegAllocBase::allocatePhysRegs(), isPhysRegUsed(), and verifyLeafProcRegUse().
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Definition at line 287 of file MachineRegisterInfo.h.
Referenced by reg_nodbg_empty(), and reg_nodbg_operands().
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Definition at line 309 of file MachineRegisterInfo.h.
References llvm::make_range(), reg_instr_nodbg_begin(), and reg_instr_nodbg_end().
Referenced by isTerminalReg().
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Definition at line 292 of file MachineRegisterInfo.h.
References llvm::make_range(), reg_nodbg_begin(), and reg_nodbg_end().
Referenced by llvm::LiveRangeCalc::calculate(), computeWeight(), and recomputeRegClass().
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Definition at line 241 of file MachineRegisterInfo.h.
References llvm::make_range(), reg_begin(), and reg_end().
Referenced by verifyUseList().
| void MachineRegisterInfo::removeRegOperandFromUseList | ( | MachineOperand * | MO | ) |
Remove MO from its use-def list.
Definition at line 252 of file MachineRegisterInfo.cpp.
References assert(), llvm::MachineOperand::getReg(), and llvm::MachineOperand::Reg.
Referenced by llvm::MachineOperand::ChangeToRegister(), llvm::MachineInstr::RemoveOperand(), llvm::MachineOperand::setIsDef(), and llvm::MachineOperand::setReg().
replaceRegWith - Replace all instances of FromReg with ToReg in the machine function.
This is like llvm-level X->replaceAllUsesWith(Y), except that it also changes any definitions of the register as well.
Note that it is usually necessary to first constrain ToReg's register class to match the FromReg constraints using:
constrainRegClass(ToReg, getRegClass(FromReg))
That function will return NULL if the virtual registers have incompatible constraints.
Note that if ToReg is a physical register the function will replace and apply sub registers to ToReg in order to obtain a final/proper physical register.
This is like llvm-level X->replaceAllUsesWith(Y), except that it also changes any definitions of the register as well. If ToReg is a physical register we apply the sub register to obtain the final/proper physical register.
Definition at line 328 of file MachineRegisterInfo.cpp.
References assert(), E, getTargetRegisterInfo(), I, llvm::TargetRegisterInfo::isPhysicalRegister(), reg_begin(), reg_end(), llvm::MachineOperand::setReg(), and llvm::MachineOperand::substPhysReg().
Referenced by doScavengeFrameVirtualRegs(), llvm::SIInstrInfo::insertIndirectBranch(), llvm::SIInstrInfo::moveToVALU(), llvm::SelectionDAGISel::runOnMachineFunction(), and llvm::TailDuplicator::tailDuplicateAndUpdate().
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reservedRegsFrozen - Returns true after freezeReservedRegs() was called to ensure the set of reserved registers stays constant.
Definition at line 750 of file MachineRegisterInfo.h.
References llvm::BitVector::empty().
Referenced by canReserveReg(), and getReservedRegs().
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Definition at line 127 of file MachineRegisterInfo.h.
References assert().
Referenced by llvm::LiveRangeEdit::~LiveRangeEdit().
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Definition at line 136 of file MachineRegisterInfo.h.
References assert().
Referenced by llvm::LiveRangeEdit::LiveRangeEdit().
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setRegAllocationHint - Specify a register allocation hint for the specified virtual register.
Definition at line 675 of file MachineRegisterInfo.h.
References assert(), and llvm::TargetRegisterInfo::isVirtualRegister().
Referenced by llvm::VirtRegAuxInfo::calculateSpillWeightAndHint(), setSimpleHint(), and llvm::ARMBaseRegisterInfo::updateRegAllocHint().
| void MachineRegisterInfo::setRegBank | ( | unsigned | Reg, |
| const RegisterBank & | RegBank | ||
| ) |
Set the register bank to RegBank for Reg.
Definition at line 49 of file MachineRegisterInfo.cpp.
Referenced by llvm::RegisterBankInfo::OperandsMapper::createVRegs(), and llvm::MIRParserImpl::setupRegisterInfo().
| void MachineRegisterInfo::setRegClass | ( | unsigned | Reg, |
| const TargetRegisterClass * | RC | ||
| ) |
setRegClass - Set the register class of the specified virtual register.
Definition at line 44 of file MachineRegisterInfo.cpp.
References assert(), and llvm::TargetRegisterClass::isAllocatable().
Referenced by llvm::SITargetLowering::AdjustInstrPostInstrSelection(), llvm::RegisterBankInfo::constrainGenericRegister(), constrainRegClass(), foldVGPRCopyIntoRegSequence(), recomputeRegClass(), and llvm::MIRParserImpl::setupRegisterInfo().
Specify the preferred register allocation hint for the specified virtual register.
Definition at line 683 of file MachineRegisterInfo.h.
References setRegAllocationHint().
Referenced by emitLoadM0FromVGPRLoop(), and llvm::MIRParserImpl::setupRegisterInfo().
Set the low-level type of VReg to Ty.
Definition at line 125 of file MachineRegisterInfo.cpp.
References assert(), getRegClassOrRegBank(), getVRegToType(), and llvm::yaml::isNull().
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Definition at line 730 of file MachineRegisterInfo.h.
References llvm::BitmaskEnumDetail::Mask().
Referenced by llvm::MIRParserImpl::parseRegisterInfo().
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Returns true if liveness for register class RC should be tracked at the subregister level.
Definition at line 184 of file MachineRegisterInfo.h.
References llvm::TargetRegisterClass::HasDisjunctSubRegs, and subRegLivenessEnabled().
Referenced by shouldTrackSubRegLiveness().
Definition at line 187 of file MachineRegisterInfo.h.
References assert(), getRegClass(), llvm::TargetRegisterInfo::isVirtualRegister(), and shouldTrackSubRegLiveness().
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Definition at line 191 of file MachineRegisterInfo.h.
Referenced by llvm::LiveIntervals::addKillFlags(), and shouldTrackSubRegLiveness().
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tracksLiveness - Returns true when tracking register liveness accurately.
(see MachineFUnctionProperties::Property description for details)
Definition at line 167 of file MachineRegisterInfo.h.
References llvm::MachineFunction::getProperties(), llvm::MachineFunctionProperties::hasProperty(), and llvm::MachineFunctionProperties::TracksLiveness.
Referenced by llvm::MIRPrinter::convert(), llvm::BranchFolder::OptimizeFunction(), llvm::MIRParserImpl::parseRegisterInfo(), and llvm::MIPrinter::print().
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Definition at line 395 of file MachineRegisterInfo.h.
Referenced by hasOneUse(), hasUseAfterLoop(), OneUseDominatesOtherUses(), replaceRegUsesAfterLoop(), llvm::TailDuplicator::tailDuplicateAndUpdate(), use_empty(), and use_operands().
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Definition at line 424 of file MachineRegisterInfo.h.
Referenced by use_bundles().
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Definition at line 427 of file MachineRegisterInfo.h.
Referenced by use_bundles().
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Definition at line 486 of file MachineRegisterInfo.h.
Referenced by use_nodbg_bundles().
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Definition at line 489 of file MachineRegisterInfo.h.
Referenced by use_nodbg_bundles().
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Definition at line 431 of file MachineRegisterInfo.h.
References llvm::make_range(), use_bundle_begin(), and use_bundle_end().
use_empty - Return true if there are no instructions using the specified register.
Definition at line 437 of file MachineRegisterInfo.h.
References use_begin(), and use_end().
Referenced by llvm::Legalizer::combineExtracts(), llvm::R600TargetLowering::EmitInstrWithCustomInserter(), EmitLiveInCopies(), llvm::NVPTXFrameLowering::emitPrologue(), llvm::SIFrameLowering::emitPrologue(), foldImmediates(), llvm::FastISel::hasTrivialKill(), llvm::MachineInstr::print(), RematerializeCheapDef(), and llvm::SelectionDAGISel::runOnMachineFunction().
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Definition at line 398 of file MachineRegisterInfo.h.
Referenced by hasOneUse(), hasUseAfterLoop(), replaceRegUsesAfterLoop(), llvm::TailDuplicator::tailDuplicateAndUpdate(), use_empty(), and use_operands().
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Definition at line 408 of file MachineRegisterInfo.h.
Referenced by foldVGPRCopyIntoRegSequence(), markUsesInDebugValueAsUndef(), llvm::PPCInstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), llvm::SelectionDAGISel::runOnMachineFunction(), and use_instructions().
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Definition at line 411 of file MachineRegisterInfo.h.
Referenced by markUsesInDebugValueAsUndef(), llvm::PPCInstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), llvm::SelectionDAGISel::runOnMachineFunction(), and use_instructions().
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Definition at line 469 of file MachineRegisterInfo.h.
Referenced by findOnlyInterestingUse(), and use_nodbg_instructions().
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Definition at line 472 of file MachineRegisterInfo.h.
Referenced by use_nodbg_instructions().
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Definition at line 416 of file MachineRegisterInfo.h.
References llvm::make_range(), use_instr_begin(), and use_instr_end().
Referenced by dumpUses(), and llvm::isDefLiveOut().
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Definition at line 452 of file MachineRegisterInfo.h.
Referenced by hasOneNonDBGUse(), ReplaceDominatedUses(), use_nodbg_empty(), and use_nodbg_operands().
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Definition at line 494 of file MachineRegisterInfo.h.
References llvm::make_range(), use_bundle_nodbg_begin(), and use_bundle_nodbg_end().
use_nodbg_empty - Return true if there are no non-Debug instructions using the specified register.
Definition at line 500 of file MachineRegisterInfo.h.
References use_nodbg_begin(), and use_nodbg_end().
Referenced by eraseIfDead(), llvm::AArch64InstrInfo::optimizeCompareInstr(), and llvm::X86InstrInfo::optimizeCompareInstr().
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Definition at line 455 of file MachineRegisterInfo.h.
Referenced by hasOneNonDBGUse(), ReplaceDominatedUses(), use_nodbg_empty(), and use_nodbg_operands().
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Definition at line 477 of file MachineRegisterInfo.h.
References llvm::make_range(), use_instr_nodbg_begin(), and use_instr_nodbg_end().
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Definition at line 460 of file MachineRegisterInfo.h.
References llvm::make_range(), use_nodbg_begin(), and use_nodbg_end().
Referenced by findUseBetween(), HasOneUse(), OneUseDominatesOtherUses(), and llvm::LiveIntervals::shrinkToUses().
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Definition at line 400 of file MachineRegisterInfo.h.
References llvm::make_range(), use_begin(), and use_end().
Referenced by clearKillFlags(), and llvm::Legalizer::combineExtracts().
| void MachineRegisterInfo::verifyUseList | ( | unsigned | Reg | ) | const |
Verify the sanity of the use list for Reg.
Definition at line 165 of file MachineRegisterInfo.cpp.
References assert(), llvm::errs(), llvm::MachineInstr::getNumOperands(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getParent(), llvm::MachineOperand::getReg(), getTargetRegisterInfo(), llvm::MachineOperand::isReg(), MI, llvm::PrintReg(), and reg_operands().
Referenced by clearVirtRegs(), and verifyUseLists().
| void MachineRegisterInfo::verifyUseLists | ( | ) | const |
Verify the use list of all registers.
Definition at line 203 of file MachineRegisterInfo.cpp.
References getNumVirtRegs(), getTargetRegisterInfo(), i, llvm::TargetRegisterInfo::index2VirtReg(), and verifyUseList().
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Definition at line 228 of file MachineRegisterInfo.h.
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Definition at line 222 of file MachineRegisterInfo.h.
1.8.6