LLVM  4.0.0
RegisterScavenging.h
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1 //===-- RegisterScavenging.h - Machine register scavenging ------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 /// \file
11 /// This file declares the machine register scavenger class. It can provide
12 /// information such as unused register at any point in a machine basic block.
13 /// It also provides a mechanism to make registers available by evicting them
14 /// to spill slots.
15 //
16 //===----------------------------------------------------------------------===//
17 
18 #ifndef LLVM_CODEGEN_REGISTERSCAVENGING_H
19 #define LLVM_CODEGEN_REGISTERSCAVENGING_H
20 
21 #include "llvm/ADT/BitVector.h"
24 
25 namespace llvm {
26 
27 class MachineRegisterInfo;
28 class TargetRegisterInfo;
29 class TargetInstrInfo;
30 class TargetRegisterClass;
31 
32 class RegScavenger {
33  const TargetRegisterInfo *TRI;
34  const TargetInstrInfo *TII;
36  MachineBasicBlock *MBB;
38  unsigned NumRegUnits;
39 
40  /// True if RegScavenger is currently tracking the liveness of registers.
41  bool Tracking;
42 
43  /// Information on scavenged registers (held in a spill slot).
44  struct ScavengedInfo {
45  ScavengedInfo(int FI = -1) : FrameIndex(FI), Reg(0), Restore(nullptr) {}
46 
47  /// A spill slot used for scavenging a register post register allocation.
48  int FrameIndex;
49 
50  /// If non-zero, the specific register is currently being
51  /// scavenged. That is, it is spilled to this scavenging stack slot.
52  unsigned Reg;
53 
54  /// The instruction that restores the scavenged register from stack.
55  const MachineInstr *Restore;
56  };
57 
58  /// A vector of information on scavenged registers.
60 
61  /// The current state of each reg unit immediately before MBBI.
62  /// One bit per register unit. If bit is not set it means any
63  /// register containing that register unit is currently being used.
64  BitVector RegUnitsAvailable;
65 
66  // These BitVectors are only used internally to forward(). They are members
67  // to avoid frequent reallocations.
68  BitVector KillRegUnits, DefRegUnits;
69  BitVector TmpRegUnits;
70 
71 public:
73  : MBB(nullptr), NumRegUnits(0), Tracking(false) {}
74 
75  /// Start tracking liveness from the begin of basic block \p MBB.
77 
78  /// Start tracking liveness from the end of basic block \p MBB.
79  /// Use backward() to move towards the beginning of the block. This is
80  /// preferred to enterBasicBlock() and forward() because it does not depend
81  /// on the presence of kill flags.
83 
84  /// Move the internal MBB iterator and update register states.
85  void forward();
86 
87  /// Move the internal MBB iterator and update register states until
88  /// it has processed the specific iterator.
90  if (!Tracking && MBB->begin() != I) forward();
91  while (MBBI != I) forward();
92  }
93 
94  /// Invert the behavior of forward() on the current instruction (undo the
95  /// changes to the available registers made by forward()).
96  void unprocess();
97 
98  /// Unprocess instructions until you reach the provided iterator.
100  while (MBBI != I) unprocess();
101  }
102 
103  /// Update internal register state and move MBB iterator backwards.
104  /// Contrary to unprocess() this method gives precise results even in the
105  /// absence of kill flags.
106  void backward();
107 
108  /// Call backward() as long as the internal iterator does not point to \p I.
110  while (MBBI != I)
111  backward();
112  }
113 
114  /// Move the internal MBB iterator but do not update register states.
116  if (I == MachineBasicBlock::iterator(nullptr))
117  Tracking = false;
118  MBBI = I;
119  }
120 
122 
123  /// Return if a specific register is currently used.
124  bool isRegUsed(unsigned Reg, bool includeReserved = true) const;
125 
126  /// Return all available registers in the register class in Mask.
128 
129  /// Find an unused register of the specified register class.
130  /// Return 0 if none is found.
131  unsigned FindUnusedReg(const TargetRegisterClass *RegClass) const;
132 
133  /// Add a scavenging frame index.
134  void addScavengingFrameIndex(int FI) {
135  Scavenged.push_back(ScavengedInfo(FI));
136  }
137 
138  /// Query whether a frame index is a scavenging frame index.
139  bool isScavengingFrameIndex(int FI) const {
141  IE = Scavenged.end(); I != IE; ++I)
142  if (I->FrameIndex == FI)
143  return true;
144 
145  return false;
146  }
147 
148  /// Get an array of scavenging frame indices.
151  IE = Scavenged.end(); I != IE; ++I)
152  if (I->FrameIndex >= 0)
153  A.push_back(I->FrameIndex);
154  }
155 
156  /// Make a register of the specific register class
157  /// available and do the appropriate bookkeeping. SPAdj is the stack
158  /// adjustment due to call frame, it's passed along to eliminateFrameIndex().
159  /// Returns the scavenged register.
160  unsigned scavengeRegister(const TargetRegisterClass *RegClass,
161  MachineBasicBlock::iterator I, int SPAdj);
162  unsigned scavengeRegister(const TargetRegisterClass *RegClass, int SPAdj) {
163  return scavengeRegister(RegClass, MBBI, SPAdj);
164  }
165 
166  /// Tell the scavenger a register is used.
167  void setRegUsed(unsigned Reg, LaneBitmask LaneMask = LaneBitmask::getAll());
168 private:
169  /// Returns true if a register is reserved. It is never "unused".
170  bool isReserved(unsigned Reg) const { return MRI->isReserved(Reg); }
171 
172  /// setUsed / setUnused - Mark the state of one or a number of register units.
173  ///
174  void setUsed(BitVector &RegUnits) {
175  RegUnitsAvailable.reset(RegUnits);
176  }
177  void setUnused(BitVector &RegUnits) {
178  RegUnitsAvailable |= RegUnits;
179  }
180 
181  /// Processes the current instruction and fill the KillRegUnits and
182  /// DefRegUnits bit vectors.
183  void determineKillsAndDefs();
184 
185  /// Add all Reg Units that Reg contains to BV.
186  void addRegUnits(BitVector &BV, unsigned Reg);
187 
188  /// Remove all Reg Units that \p Reg contains from \p BV.
189  void removeRegUnits(BitVector &BV, unsigned Reg);
190 
191  /// Return the candidate register that is unused for the longest after
192  /// StartMI. UseMI is set to the instruction where the search stopped.
193  ///
194  /// No more than InstrLimit instructions are inspected.
195  unsigned findSurvivorReg(MachineBasicBlock::iterator StartMI,
196  BitVector &Candidates,
197  unsigned InstrLimit,
199 
200  /// Initialize RegisterScavenger.
201  void init(MachineBasicBlock &MBB);
202 
203  /// Mark live-in registers of basic block as used.
204  void setLiveInsUsed(const MachineBasicBlock &MBB);
205 };
206 
207 } // End llvm namespace
208 
209 #endif
void push_back(const T &Elt)
Definition: SmallVector.h:211
void skipTo(MachineBasicBlock::iterator I)
Move the internal MBB iterator but do not update register states.
void backward(MachineBasicBlock::iterator I)
Call backward() as long as the internal iterator does not point to I.
static LaneBitmask getAll()
Definition: LaneBitmask.h:75
MachineInstrBundleIterator< MachineInstr > iterator
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:32
Reg
All possible values of the reg field in the ModR/M byte.
void backward()
Update internal register state and move MBB iterator backwards.
MachineBasicBlock::iterator getCurrentPosition() const
void forward()
Move the internal MBB iterator and update register states.
BitVector getRegsAvailable(const TargetRegisterClass *RC)
Return all available registers in the register class in Mask.
Function Alias Analysis false
void unprocess(MachineBasicBlock::iterator I)
Unprocess instructions until you reach the provided iterator.
TargetInstrInfo - Interface to description of machine instruction set.
MachineInstrBuilder & UseMI
bool isReserved(unsigned PhysReg) const
isReserved - Returns true when PhysReg is a reserved register.
LLVM_ATTRIBUTE_ALWAYS_INLINE iterator begin()
Definition: SmallVector.h:115
void unprocess()
Invert the behavior of forward() on the current instruction (undo the changes to the available regist...
void forward(MachineBasicBlock::iterator I)
Move the internal MBB iterator and update register states until it has processed the specific iterato...
BitVector & reset()
Definition: BitVector.h:260
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
void getScavengingFrameIndices(SmallVectorImpl< int > &A) const
Get an array of scavenging frame indices.
bool isScavengingFrameIndex(int FI) const
Query whether a frame index is a scavenging frame index.
void addScavengingFrameIndex(int FI)
Add a scavenging frame index.
bool isRegUsed(unsigned Reg, bool includeReserved=true) const
Return if a specific register is currently used.
void enterBasicBlockEnd(MachineBasicBlock &MBB)
Start tracking liveness from the end of basic block MBB.
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
Representation of each machine instruction.
Definition: MachineInstr.h:52
LLVM_ATTRIBUTE_ALWAYS_INLINE iterator end()
Definition: SmallVector.h:119
unsigned FindUnusedReg(const TargetRegisterClass *RegClass) const
Find an unused register of the specified register class.
void enterBasicBlock(MachineBasicBlock &MBB)
Start tracking liveness from the begin of basic block MBB.
#define I(x, y, z)
Definition: MD5.cpp:54
static cl::opt< unsigned > InstrLimit("dfa-instr-limit", cl::Hidden, cl::init(0), cl::desc("If present, stops packetizing after N instructions"))
void setRegUsed(unsigned Reg, LaneBitmask LaneMask=LaneBitmask::getAll())
Tell the scavenger a register is used.
unsigned scavengeRegister(const TargetRegisterClass *RegClass, int SPAdj)
static GCRegistry::Add< ErlangGC > A("erlang","erlang-compatible garbage collector")
unsigned scavengeRegister(const TargetRegisterClass *RegClass, MachineBasicBlock::iterator I, int SPAdj)
Make a register of the specific register class available and do the appropriate bookkeeping.