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| LLVM_READONLY int16_t | llvm::AMDGPU::getNamedOperandIdx (uint16_t Opcode, uint16_t NamedIdx) |
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| IsaVersion | llvm::AMDGPU::getIsaVersion (const FeatureBitset &Features) |
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| void | llvm::AMDGPU::initDefaultAMDKernelCodeT (amd_kernel_code_t &Header, const FeatureBitset &Features) |
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| MCSection * | llvm::AMDGPU::getHSATextSection (MCContext &Ctx) |
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| MCSection * | llvm::AMDGPU::getHSADataGlobalAgentSection (MCContext &Ctx) |
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| MCSection * | llvm::AMDGPU::getHSADataGlobalProgramSection (MCContext &Ctx) |
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| MCSection * | llvm::AMDGPU::getHSARodataReadonlyAgentSection (MCContext &Ctx) |
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| bool | llvm::AMDGPU::isGroupSegment (const GlobalValue *GV) |
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| bool | llvm::AMDGPU::isGlobalSegment (const GlobalValue *GV) |
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| bool | llvm::AMDGPU::isReadOnlySegment (const GlobalValue *GV) |
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| bool | llvm::AMDGPU::shouldEmitConstantsToTextSection (const Triple &TT) |
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| int | llvm::AMDGPU::getIntegerAttribute (const Function &F, StringRef Name, int Default) |
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| std::pair< int, int > | llvm::AMDGPU::getIntegerPairAttribute (const Function &F, StringRef Name, std::pair< int, int > Default, bool OnlyFirstRequired) |
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| unsigned | llvm::AMDGPU::getWaitcntBitMask (IsaVersion Version) |
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| unsigned | llvm::AMDGPU::getVmcntBitMask (IsaVersion Version) |
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| unsigned | llvm::AMDGPU::getExpcntBitMask (IsaVersion Version) |
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| unsigned | llvm::AMDGPU::getLgkmcntBitMask (IsaVersion Version) |
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| unsigned | llvm::AMDGPU::decodeVmcnt (IsaVersion Version, unsigned Waitcnt) |
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| unsigned | llvm::AMDGPU::decodeExpcnt (IsaVersion Version, unsigned Waitcnt) |
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| unsigned | llvm::AMDGPU::decodeLgkmcnt (IsaVersion Version, unsigned Waitcnt) |
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| void | llvm::AMDGPU::decodeWaitcnt (IsaVersion Version, unsigned Waitcnt, unsigned &Vmcnt, unsigned &Expcnt, unsigned &Lgkmcnt) |
| | Decodes Vmcnt, Expcnt and Lgkmcnt from given Waitcnt for given isa Version, and writes decoded values into Vmcnt, Expcnt and Lgkmcnt respectively. More...
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| unsigned | llvm::AMDGPU::encodeVmcnt (IsaVersion Version, unsigned Waitcnt, unsigned Vmcnt) |
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| unsigned | llvm::AMDGPU::encodeExpcnt (IsaVersion Version, unsigned Waitcnt, unsigned Expcnt) |
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| unsigned | llvm::AMDGPU::encodeLgkmcnt (IsaVersion Version, unsigned Waitcnt, unsigned Lgkmcnt) |
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| unsigned | llvm::AMDGPU::encodeWaitcnt (IsaVersion Version, unsigned Vmcnt, unsigned Expcnt, unsigned Lgkmcnt) |
| | Encodes Vmcnt, Expcnt and Lgkmcnt into Waitcnt for given isa Version. More...
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| unsigned | llvm::AMDGPU::getInitialPSInputAddr (const Function &F) |
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| bool | llvm::AMDGPU::isShader (CallingConv::ID cc) |
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| bool | llvm::AMDGPU::isCompute (CallingConv::ID cc) |
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| bool | llvm::AMDGPU::isSI (const MCSubtargetInfo &STI) |
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| bool | llvm::AMDGPU::isCI (const MCSubtargetInfo &STI) |
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| bool | llvm::AMDGPU::isVI (const MCSubtargetInfo &STI) |
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| unsigned | llvm::AMDGPU::getMCReg (unsigned Reg, const MCSubtargetInfo &STI) |
| | If Reg is a pseudo reg, return the correct hardware register given STI otherwise return Reg. More...
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| bool | llvm::AMDGPU::isSISrcOperand (const MCInstrDesc &Desc, unsigned OpNo) |
| | Can this operand also contain immediate values? More...
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| bool | llvm::AMDGPU::isSISrcFPOperand (const MCInstrDesc &Desc, unsigned OpNo) |
| | Is this floating-point operand? More...
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| bool | llvm::AMDGPU::isSISrcInlinableOperand (const MCInstrDesc &Desc, unsigned OpNo) |
| | Does this opearnd support only inlinable literals? More...
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| unsigned | llvm::AMDGPU::getRegBitWidth (unsigned RCID) |
| | Get the size in bits of a register from the register class RC. More...
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| unsigned | llvm::AMDGPU::getRegBitWidth (const MCRegisterClass &RC) |
| | Get the size in bits of a register from the register class RC. More...
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| unsigned | llvm::AMDGPU::getRegOperandSize (const MCRegisterInfo *MRI, const MCInstrDesc &Desc, unsigned OpNo) |
| | Get size of register operand. More...
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| LLVM_READNONE unsigned | llvm::AMDGPU::getOperandSize (const MCOperandInfo &OpInfo) |
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| LLVM_READNONE unsigned | llvm::AMDGPU::getOperandSize (const MCInstrDesc &Desc, unsigned OpNo) |
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| bool | llvm::AMDGPU::isInlinableLiteral64 (int64_t Literal, bool HasInv2Pi) |
| | Is this literal inlinable. More...
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| bool | llvm::AMDGPU::isInlinableLiteral32 (int32_t Literal, bool HasInv2Pi) |
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| bool | llvm::AMDGPU::isInlinableLiteral16 (int16_t Literal, bool HasInv2Pi) |
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