LLVM  4.0.0
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llvm::ARM Namespace Reference

Define some predicates that are used for node matching. More...

Namespaces

 EHABI
 
 WinEH
 

Enumerations

enum  FPUKind { ARM_FPU, ARM_FPU }
 
enum  FPUVersion {
  FV_NONE = 0, FV_VFPV2, FV_VFPV3, FV_VFPV3_FP16,
  FV_VFPV4, FV_VFPV5
}
 
enum  NeonSupportLevel { NS_None = 0, NS_Neon, NS_Crypto }
 
enum  FPURestriction { FR_None = 0, FR_D16, FR_SP_D16 }
 
enum  ArchKind { ARM_FPU, ARM_FPU }
 
enum  ArchExtKind : unsigned {
  AEK_INVALID = 0x0, AEK_NONE = 0x1, AEK_CRC = 0x2, AEK_CRYPTO = 0x4,
  AEK_FP = 0x8, AEK_HWDIV = 0x10, AEK_HWDIVARM = 0x20, AEK_MP = 0x40,
  AEK_SIMD = 0x80, AEK_SEC = 0x100, AEK_VIRT = 0x200, AEK_DSP = 0x400,
  AEK_FP16 = 0x800, AEK_RAS = 0x1000, AEK_OS = 0x8000000, AEK_IWMMXT = 0x10000000,
  AEK_IWMMXT2 = 0x20000000, AEK_MAVERICK = 0x40000000, AEK_XSCALE = 0x80000000
}
 
enum  ISAKind { IK_INVALID = 0, IK_ARM, IK_THUMB, IK_AARCH64 }
 
enum  EndianKind { EK_INVALID = 0, EK_LITTLE, EK_BIG }
 
enum  ProfileKind { PK_INVALID = 0, PK_A, PK_R, PK_M }
 
enum  DW_ISA { DW_ISA_ARM_thumb = 1, DW_ISA_ARM_arm = 2 }
 
enum  { GPRRegBankID = 0, NumRegisterBanks }
 
enum  Fixups {
  fixup_arm_ldst_pcrel_12 = FirstTargetFixupKind, fixup_t2_ldst_pcrel_12, fixup_arm_pcrel_10_unscaled, fixup_arm_pcrel_10,
  fixup_t2_pcrel_10, fixup_arm_pcrel_9, fixup_t2_pcrel_9, fixup_thumb_adr_pcrel_10,
  fixup_arm_adr_pcrel_12, fixup_t2_adr_pcrel_12, fixup_arm_condbranch, fixup_arm_uncondbranch,
  fixup_t2_condbranch, fixup_t2_uncondbranch, fixup_arm_thumb_br, fixup_arm_uncondbl,
  fixup_arm_condbl, fixup_arm_blx, fixup_arm_thumb_bl, fixup_arm_thumb_blx,
  fixup_arm_thumb_cb, fixup_arm_thumb_cp, fixup_arm_thumb_bcc, fixup_arm_movt_hi16,
  fixup_arm_movw_lo16, fixup_t2_movt_hi16, fixup_t2_movw_lo16, fixup_arm_mod_imm,
  LastTargetFixupKind, NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind
}
 

Functions

StringRef getCanonicalArchName (StringRef Arch)
 
StringRef getFPUName (unsigned FPUKind)
 
unsigned getFPUVersion (unsigned FPUKind)
 
unsigned getFPUNeonSupportLevel (unsigned FPUKind)
 
unsigned getFPURestriction (unsigned FPUKind)
 
bool getFPUFeatures (unsigned FPUKind, std::vector< StringRef > &Features)
 
bool getHWDivFeatures (unsigned HWDivKind, std::vector< StringRef > &Features)
 
bool getExtensionFeatures (unsigned Extensions, std::vector< StringRef > &Features)
 
StringRef getArchName (unsigned ArchKind)
 
unsigned getArchAttr (unsigned ArchKind)
 
StringRef getCPUAttr (unsigned ArchKind)
 
StringRef getSubArch (unsigned ArchKind)
 
StringRef getArchExtName (unsigned ArchExtKind)
 
StringRef getArchExtFeature (StringRef ArchExt)
 
StringRef getHWDivName (unsigned HWDivKind)
 
unsigned getDefaultFPU (StringRef CPU, unsigned ArchKind)
 
unsigned getDefaultExtensions (StringRef CPU, unsigned ArchKind)
 
StringRef getDefaultCPU (StringRef Arch)
 
unsigned parseHWDiv (StringRef HWDiv)
 
unsigned parseFPU (StringRef FPU)
 
unsigned parseArch (StringRef Arch)
 
unsigned parseArchExt (StringRef ArchExt)
 
unsigned parseCPUArch (StringRef CPU)
 
unsigned parseArchISA (StringRef Arch)
 
unsigned parseArchEndian (StringRef Arch)
 
unsigned parseArchProfile (StringRef Arch)
 
unsigned parseArchVersion (StringRef Arch)
 
bool isBitFieldInvertedMask (unsigned v)
 
FastISelcreateFastISel (FunctionLoweringInfo &funcInfo, const TargetLibraryInfo *libInfo)
 

Variables

const uint32_t GPRCoverageData []
 
RegisterBank GPRRegBank (ARM::GPRRegBankID,"GPRB", 32, ARM::GPRCoverageData)
 
RegisterBankRegBanks [] = {&GPRRegBank}
 
RegisterBankInfo::PartialMapping GPRPartialMapping
 
RegisterBankInfo::ValueMapping ValueMappings []
 

Detailed Description

Define some predicates that are used for node matching.

Enumeration Type Documentation

anonymous enum
Enumerator
GPRRegBankID 
NumRegisterBanks 

Definition at line 24 of file ARMRegisterBankInfo.h.

Enumerator
AEK_INVALID 
AEK_NONE 
AEK_CRC 
AEK_CRYPTO 
AEK_FP 
AEK_HWDIV 
AEK_HWDIVARM 
AEK_MP 
AEK_SIMD 
AEK_SEC 
AEK_VIRT 
AEK_DSP 
AEK_FP16 
AEK_RAS 
AEK_OS 
AEK_IWMMXT 
AEK_IWMMXT2 
AEK_MAVERICK 
AEK_XSCALE 

Definition at line 72 of file TargetParser.h.

Enumerator
ARM_FPU 
ARM_FPU 

Definition at line 65 of file TargetParser.h.

Enumerator
DW_ISA_ARM_thumb 
DW_ISA_ARM_arm 

Definition at line 26 of file ARMAsmPrinter.h.

Enumerator
EK_INVALID 
EK_LITTLE 
EK_BIG 

Definition at line 100 of file TargetParser.h.

Enumerator
fixup_arm_ldst_pcrel_12 
fixup_t2_ldst_pcrel_12 
fixup_arm_pcrel_10_unscaled 
fixup_arm_pcrel_10 
fixup_t2_pcrel_10 
fixup_arm_pcrel_9 
fixup_t2_pcrel_9 
fixup_thumb_adr_pcrel_10 
fixup_arm_adr_pcrel_12 
fixup_t2_adr_pcrel_12 
fixup_arm_condbranch 
fixup_arm_uncondbranch 
fixup_t2_condbranch 
fixup_t2_uncondbranch 
fixup_arm_thumb_br 
fixup_arm_uncondbl 
fixup_arm_condbl 
fixup_arm_blx 
fixup_arm_thumb_bl 
fixup_arm_thumb_blx 
fixup_arm_thumb_cb 
fixup_arm_thumb_cp 
fixup_arm_thumb_bcc 
fixup_arm_movt_hi16 
fixup_arm_movw_lo16 
fixup_t2_movt_hi16 
fixup_t2_movw_lo16 
fixup_arm_mod_imm 
LastTargetFixupKind 
NumTargetFixupKinds 

Definition at line 17 of file ARMFixupKinds.h.

Enumerator
ARM_FPU 
ARM_FPU 

Definition at line 34 of file TargetParser.h.

Enumerator
FR_None 

No restriction.

FR_D16 

Only 16 D registers.

FR_SP_D16 

Only single-precision instructions, with 16 D registers.

Definition at line 58 of file TargetParser.h.

Enumerator
FV_NONE 
FV_VFPV2 
FV_VFPV3 
FV_VFPV3_FP16 
FV_VFPV4 
FV_VFPV5 

Definition at line 41 of file TargetParser.h.

Enumerator
IK_INVALID 
IK_ARM 
IK_THUMB 
IK_AARCH64 

Definition at line 96 of file TargetParser.h.

Enumerator
NS_None 

No Neon.

NS_Neon 

Neon.

NS_Crypto 

Neon with Crypto.

Definition at line 51 of file TargetParser.h.

Enumerator
PK_INVALID 
PK_A 
PK_R 
PK_M 

Definition at line 103 of file TargetParser.h.

Function Documentation

FastISel * llvm::ARM::createFastISel ( FunctionLoweringInfo funcInfo,
const TargetLibraryInfo libInfo 
)
unsigned llvm::AArch64::getArchAttr ( unsigned  ArchKind)

Definition at line 340 of file TargetParser.cpp.

References llvm::ARMBuildAttrs::Pre_v4.

StringRef llvm::AArch64::getArchExtFeature ( StringRef  ArchExt)

Definition at line 354 of file TargetParser.cpp.

References llvm::StringRef::startswith(), and llvm::StringRef::substr().

StringRef llvm::AArch64::getArchExtName ( unsigned  ArchExtKind)

Definition at line 346 of file TargetParser.cpp.

StringRef llvm::AArch64::getArchName ( unsigned  ArchKind)

Definition at line 322 of file TargetParser.cpp.

Referenced by computeTargetABI(), and llvm::ARM_MC::ParseARMTriple().

StringRef llvm::AArch64::getCanonicalArchName ( StringRef  Arch)
StringRef llvm::AArch64::getCPUAttr ( unsigned  ArchKind)

Definition at line 328 of file TargetParser.cpp.

StringRef llvm::AArch64::getDefaultCPU ( StringRef  Arch)

Definition at line 378 of file TargetParser.cpp.

References parseArch().

Referenced by llvm::Triple::getARMCPUForArch().

unsigned llvm::AArch64::getDefaultExtensions ( StringRef  CPU,
unsigned  ArchKind 
)

Definition at line 191 of file TargetParser.cpp.

References AEK_INVALID, and ARM_CPU_NAME.

unsigned llvm::AArch64::getDefaultFPU ( StringRef  CPU,
unsigned  ArchKind 
)

Definition at line 180 of file TargetParser.cpp.

References ARM_CPU_NAME.

bool llvm::AArch64::getExtensionFeatures ( unsigned  Extensions,
std::vector< StringRef > &  Features 
)

Definition at line 221 of file TargetParser.cpp.

References AEK_CRC, AEK_DSP, AEK_INVALID, and getHWDivFeatures().

bool llvm::AArch64::getFPUFeatures ( unsigned  FPUKind,
std::vector< StringRef > &  Features 
)
StringRef llvm::AArch64::getFPUName ( unsigned  FPUKind)

Definition at line 156 of file TargetParser.cpp.

unsigned llvm::AArch64::getFPUNeonSupportLevel ( unsigned  FPUKind)

Definition at line 168 of file TargetParser.cpp.

unsigned llvm::AArch64::getFPURestriction ( unsigned  FPUKind)

Definition at line 174 of file TargetParser.cpp.

unsigned llvm::AArch64::getFPUVersion ( unsigned  FPUKind)

Definition at line 162 of file TargetParser.cpp.

bool llvm::ARM::getHWDivFeatures ( unsigned  HWDivKind,
std::vector< StringRef > &  Features 
)

Definition at line 202 of file TargetParser.cpp.

References AEK_HWDIV, AEK_HWDIVARM, and AEK_INVALID.

Referenced by getExtensionFeatures().

StringRef llvm::ARM::getHWDivName ( unsigned  HWDivKind)

Definition at line 370 of file TargetParser.cpp.

References D.

StringRef llvm::AArch64::getSubArch ( unsigned  ArchKind)

Definition at line 334 of file TargetParser.cpp.

bool llvm::ARM::isBitFieldInvertedMask ( unsigned  v)

Definition at line 12758 of file ARMISelLowering.cpp.

References llvm::isShiftedMask_32().

Referenced by PerformORCombine().

unsigned llvm::AArch64::parseArch ( StringRef  Arch)
unsigned llvm::AArch64::parseArchEndian ( StringRef  Arch)
unsigned llvm::AArch64::parseArchExt ( StringRef  ArchExt)

Definition at line 669 of file TargetParser.cpp.

References A, and AEK_INVALID.

unsigned llvm::AArch64::parseArchISA ( StringRef  Arch)
unsigned llvm::AArch64::parseArchProfile ( StringRef  Arch)

Definition at line 715 of file TargetParser.cpp.

References getCanonicalArchName(), parseArch(), PK_A, PK_INVALID, PK_M, and PK_R.

Referenced by computeTargetABI(), and parseARMArch().

unsigned llvm::AArch64::parseArchVersion ( StringRef  Arch)

Definition at line 738 of file TargetParser.cpp.

References getCanonicalArchName(), and parseArch().

Referenced by parseARMArch().

unsigned llvm::AArch64::parseCPUArch ( StringRef  CPU)

Definition at line 677 of file TargetParser.cpp.

References C.

Referenced by computeTargetABI().

unsigned llvm::AArch64::parseFPU ( StringRef  FPU)

Definition at line 649 of file TargetParser.cpp.

References F, and getFPUSynonym().

unsigned llvm::ARM::parseHWDiv ( StringRef  HWDiv)

Definition at line 640 of file TargetParser.cpp.

References AEK_INVALID, D, and getHWDivSynonym().

Variable Documentation

const uint32_t llvm::ARM::GPRCoverageData[]
Initial value:
= {
(1u << ARM::GPRRegClassID) | (1u << ARM::GPRwithAPSRRegClassID) |
(1u << ARM::GPRnopcRegClassID) | (1u << ARM::rGPRRegClassID) |
(1u << ARM::hGPRRegClassID) | (1u << ARM::tGPRRegClassID) |
(1u << ARM::GPRnopc_and_hGPRRegClassID) |
(1u << ARM::hGPR_and_rGPRRegClassID) | (1u << ARM::tcGPRRegClassID) |
(1u << ARM::tGPR_and_tcGPRRegClassID) | (1u << ARM::GPRspRegClassID) |
(1u << ARM::hGPR_and_tcGPRRegClassID),
0,
0,
0,
0,
0,
0,
}

Definition at line 32 of file ARMRegisterBankInfo.cpp.

RegisterBankInfo::PartialMapping llvm::ARM::GPRPartialMapping

Definition at line 61 of file ARMRegisterBankInfo.cpp.

RegisterBankInfo::PartialMapping llvm::ARM::GPRRegBank
RegisterBank* llvm::ARM::RegBanks[] = {&GPRRegBank}

Definition at line 59 of file ARMRegisterBankInfo.cpp.

RegisterBankInfo::ValueMapping llvm::ARM::ValueMappings[]
Initial value:
= {
RegisterBankInfo::PartialMapping GPRPartialMapping

Definition at line 63 of file ARMRegisterBankInfo.cpp.

Referenced by llvm::ARMRegisterBankInfo::getInstrMapping().