27 #define DEBUG_TYPE "hexagon_cfg"
48 StringRef getPassName()
const override {
return "Hexagon CFG Optimizer"; }
59 static bool IsConditionalBranch(
int Opc) {
61 case Hexagon::J2_jumpt:
62 case Hexagon::J2_jumptpt:
63 case Hexagon::J2_jumpf:
64 case Hexagon::J2_jumpfpt:
65 case Hexagon::J2_jumptnew:
66 case Hexagon::J2_jumpfnew:
67 case Hexagon::J2_jumptnewpt:
68 case Hexagon::J2_jumpfnewpt:
75 static bool IsUnconditionalJump(
int Opc) {
76 return (Opc == Hexagon::J2_jump);
79 void HexagonCFGOptimizer::InvertAndChangeJumpTarget(
85 case Hexagon::J2_jumpt:
86 NewOpcode = Hexagon::J2_jumpf;
89 case Hexagon::J2_jumpf:
90 NewOpcode = Hexagon::J2_jumpt;
93 case Hexagon::J2_jumptnewpt:
94 NewOpcode = Hexagon::J2_jumpfnewpt;
97 case Hexagon::J2_jumpfnewpt:
98 NewOpcode = Hexagon::J2_jumptnewpt;
116 MBBb != MBBe; ++MBBb) {
121 if (MII != MBB->
end()) {
124 if (IsConditionalBranch(Opc)) {
163 LayoutSucc = FirstSucc;
164 JumpAroundTarget = SecondSucc;
166 LayoutSucc = SecondSucc;
167 JumpAroundTarget = FirstSucc;
175 if (MI.
getOpcode() == Hexagon::J2_jumpt ||
180 if (!LayoutSucc || (CondBranchTarget != JumpAroundTarget)) {
184 if ((NumSuccs == 2) && LayoutSucc && (LayoutSucc->
pred_size() == 1)) {
187 if ((LayoutSucc->
size() == 1) &&
189 assert(JumpAroundTarget &&
"jump target is needed to process second basic block");
194 bool case2 = JumpAroundTarget->
isSuccessor(UncondTarget) &&
195 JumpAroundTarget->
size() >= 1 &&
200 if (case1 || case2) {
201 InvertAndChangeJumpTarget(MI, UncondTarget);
210 if (case2 && !case1) {
215 UncondTarget->
moveAfter(JumpAroundTarget);
224 std::vector<MachineBasicBlock::RegisterMaskPair> OrigLiveIn(
226 std::vector<MachineBasicBlock::RegisterMaskPair> NewLiveIn(
229 for (
const auto &OrigLI : OrigLiveIn)
231 for (
const auto &NewLI : NewLiveIn)
252 return new HexagonCFGOptimizer();
unsigned succ_size() const
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
MachineBasicBlock * getMBB() const
iterator getFirstTerminator()
Returns an iterator to the first terminator instruction of this basic block.
void moveAfter(MachineBasicBlock *NewBefore)
const Function * getFunction() const
getFunction - Return the LLVM function that this machine code represents
void removeLiveIn(MCPhysReg Reg, LaneBitmask LaneMask=LaneBitmask::getAll())
Remove the specified register from the live in set.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
const HexagonInstrInfo * TII
std::vector< MachineBasicBlock * >::iterator succ_iterator
bool canFallThrough()
Return true if the block can implicitly transfer control to the block after it by falling off the end...
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
const MachineBasicBlock * getParent() const
TargetInstrInfo - Interface to description of machine instruction set.
void addLiveIn(MCPhysReg PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
livein_iterator livein_begin() const
livein_iterator livein_end() const
const MachineOperand & getOperand(unsigned i) const
void setMBB(MachineBasicBlock *MBB)
FunctionPass class - This class is used to implement most global optimizations.
succ_iterator succ_begin()
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
const MCInstrDesc & get(unsigned Opcode) const
Return the machine instruction descriptor that corresponds to the specified instruction opcode...
Iterator for intrusive lists based on ilist_node.
void setDesc(const MCInstrDesc &tid)
Replace the instruction descriptor (thus opcode) of the current instruction with a new one...
bool isSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB is a successor of this block.
void replaceSuccessor(MachineBasicBlock *Old, MachineBasicBlock *New)
Replace successor OLD with NEW and update probability info.
MachineFunctionProperties & set(Property P)
Representation of each machine instruction.
INITIALIZE_PASS(HexagonCFGOptimizer,"hexagon-cfg","Hexagon CFG Optimizer", false, false) FunctionPass *llvm
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
virtual const TargetInstrInfo * getInstrInfo() const
void initializeHexagonCFGOptimizerPass(PassRegistry &)
StringRef - Represent a constant reference to a string, i.e.
PassRegistry - This class manages the registration and intitialization of the pass subsystem as appli...
bool isLayoutSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB will be emitted immediately after this block, such that if this bloc...
unsigned pred_size() const
Properties which a MachineFunction may have at a given point in time.
FunctionPass * createHexagonCFGOptimizer()