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LLVM
4.0.0
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This file implements the targeting of the InstructionSelector class for AArch64. More...
#include "AArch64InstructionSelector.h"#include "AArch64InstrInfo.h"#include "AArch64RegisterBankInfo.h"#include "AArch64RegisterInfo.h"#include "AArch64Subtarget.h"#include "AArch64TargetMachine.h"#include "MCTargetDesc/AArch64AddressingModes.h"#include "llvm/CodeGen/MachineBasicBlock.h"#include "llvm/CodeGen/MachineFunction.h"#include "llvm/CodeGen/MachineInstr.h"#include "llvm/CodeGen/MachineInstrBuilder.h"#include "llvm/CodeGen/MachineRegisterInfo.h"#include "llvm/IR/Type.h"#include "llvm/Support/Debug.h"#include "llvm/Support/raw_ostream.h"#include "AArch64GenGlobalISel.inc"Go to the source code of this file.
Macros | |
| #define | DEBUG_TYPE "aarch64-isel" |
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| static const TargetRegisterClass * | getRegClassForTypeOnBank (LLT Ty, const RegisterBank &RB, const RegisterBankInfo &RBI) |
| static bool | unsupportedBinOp (const MachineInstr &I, const AArch64RegisterBankInfo &RBI, const MachineRegisterInfo &MRI, const AArch64RegisterInfo &TRI) |
Check whether I is a currently unsupported binary operation: More... | |
| static unsigned | selectBinaryOp (unsigned GenericOpc, unsigned RegBankID, unsigned OpSize) |
Select the AArch64 opcode for the basic binary operation GenericOpc (such as G_OR or G_ADD), appropriate for the register bank RegBankID and of size OpSize. More... | |
| static unsigned | selectLoadStoreUIOp (unsigned GenericOpc, unsigned RegBankID, unsigned OpSize) |
Select the AArch64 opcode for the G_LOAD or G_STORE operation GenericOpc, appropriate for the (value) register bank RegBankID and of memory access size OpSize. More... | |
| static bool | selectCopy (MachineInstr &I, const TargetInstrInfo &TII, MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI, const RegisterBankInfo &RBI) |
| static unsigned | selectFPConvOpc (unsigned GenericOpc, LLT DstTy, LLT SrcTy) |
| static AArch64CC::CondCode | changeICMPPredToAArch64CC (CmpInst::Predicate P) |
| static void | changeFCMPPredToAArch64CC (CmpInst::Predicate P, AArch64CC::CondCode &CondCode, AArch64CC::CondCode &CondCode2) |
This file implements the targeting of the InstructionSelector class for AArch64.
Definition in file AArch64InstructionSelector.cpp.
| #define DEBUG_TYPE "aarch64-isel" |
Definition at line 31 of file AArch64InstructionSelector.cpp.
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Definition at line 422 of file AArch64InstructionSelector.cpp.
References llvm::AArch64CC::AL, llvm::AArch64CC::EQ, llvm::CmpInst::FCMP_OEQ, llvm::CmpInst::FCMP_OGE, llvm::CmpInst::FCMP_OGT, llvm::CmpInst::FCMP_OLE, llvm::CmpInst::FCMP_OLT, llvm::CmpInst::FCMP_ONE, llvm::CmpInst::FCMP_ORD, llvm::CmpInst::FCMP_UEQ, llvm::CmpInst::FCMP_UGE, llvm::CmpInst::FCMP_UGT, llvm::CmpInst::FCMP_ULE, llvm::CmpInst::FCMP_ULT, llvm::CmpInst::FCMP_UNE, llvm::CmpInst::FCMP_UNO, llvm::AArch64CC::GE, llvm::AArch64CC::GT, llvm::AArch64CC::HI, llvm::AArch64CC::LE, llvm_unreachable, llvm::AArch64CC::LS, llvm::AArch64CC::LT, llvm::AArch64CC::MI, llvm::AArch64CC::NE, llvm::AArch64CC::PL, llvm::AArch64CC::VC, and llvm::AArch64CC::VS.
Referenced by llvm::AArch64InstructionSelector::select().
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Definition at line 395 of file AArch64InstructionSelector.cpp.
References llvm::AArch64CC::EQ, llvm::AArch64CC::GE, llvm::AArch64CC::GT, llvm::AArch64CC::HI, llvm::AArch64CC::HS, llvm::CmpInst::ICMP_EQ, llvm::CmpInst::ICMP_NE, llvm::CmpInst::ICMP_SGE, llvm::CmpInst::ICMP_SGT, llvm::CmpInst::ICMP_SLE, llvm::CmpInst::ICMP_SLT, llvm::CmpInst::ICMP_UGE, llvm::CmpInst::ICMP_UGT, llvm::CmpInst::ICMP_ULE, llvm::CmpInst::ICMP_ULT, llvm::AArch64CC::LE, llvm_unreachable, llvm::AArch64CC::LO, llvm::AArch64CC::LS, llvm::AArch64CC::LT, and llvm::AArch64CC::NE.
Referenced by llvm::AArch64InstructionSelector::select().
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Definition at line 50 of file AArch64InstructionSelector.cpp.
References llvm::AArch64::FPRRegBankID, llvm::RegisterBank::getID(), llvm::LLT::getSizeInBits(), and llvm::AArch64::GPRRegBankID.
Referenced by llvm::AArch64InstructionSelector::select().
Select the AArch64 opcode for the basic binary operation GenericOpc (such as G_OR or G_ADD), appropriate for the register bank RegBankID and of size OpSize.
GenericOpc if the combination is unsupported. Definition at line 125 of file AArch64InstructionSelector.cpp.
References assert(), llvm::AArch64::FPRRegBankID, and llvm::AArch64::GPRRegBankID.
Referenced by llvm::AArch64InstructionSelector::select().
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Definition at line 257 of file AArch64InstructionSelector.cpp.
References assert(), llvm::RegisterBankInfo::constrainGenericRegister(), llvm::dbgs(), DEBUG, llvm::AArch64::FPRRegBankID, llvm::MCInstrInfo::get(), llvm::RegisterBank::getID(), llvm::MCInstrInfo::getName(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::RegisterBankInfo::getRegBank(), llvm::LLT::getSizeInBits(), llvm::MachineRegisterInfo::getType(), llvm::AArch64::GPRRegBankID, llvm::MachineInstr::isCopy(), llvm::TargetRegisterInfo::isPhysicalRegister(), and llvm::MachineInstr::setDesc().
Referenced by llvm::AArch64InstructionSelector::select().
Definition at line 319 of file AArch64InstructionSelector.cpp.
References llvm::LLT::getSizeInBits(), and llvm::LLT::isScalar().
Referenced by llvm::AArch64InstructionSelector::select().
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Select the AArch64 opcode for the G_LOAD or G_STORE operation GenericOpc, appropriate for the (value) register bank RegBankID and of memory access size OpSize.
This returns the variant with the base+unsigned-immediate addressing mode (e.g., LDRXui).
GenericOpc if the combination is unsupported. Definition at line 227 of file AArch64InstructionSelector.cpp.
References llvm::AArch64::FPRRegBankID, and llvm::AArch64::GPRRegBankID.
Referenced by llvm::AArch64InstructionSelector::select().
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Check whether I is a currently unsupported binary operation:
Definition at line 79 of file AArch64InstructionSelector.cpp.
References llvm::dbgs(), DEBUG, llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::RegisterBankInfo::getRegBank(), llvm::MachineRegisterInfo::getType(), llvm::LLT::isValid(), llvm::TargetRegisterInfo::isVirtualRegister(), MRI, and llvm::MachineInstr::operands().
Referenced by llvm::AArch64InstructionSelector::select().
1.8.6