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LLVM
4.0.0
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#include <SIInstrInfo.h>
Public Types | |
| enum | TargetOperandFlags { MO_NONE = 0, MO_GOTPCREL = 1, MO_GOTPCREL32 = 2, MO_GOTPCREL32_LO = 2, MO_GOTPCREL32_HI = 3, MO_REL32 = 4, MO_REL32_LO = 4, MO_REL32_HI = 5 } |
Protected Member Functions | |
| bool | swapSourceModifiers (MachineInstr &MI, MachineOperand &Src0, unsigned Src0OpName, MachineOperand &Src1, unsigned Src1OpName) const |
| MachineInstr * | commuteInstructionImpl (MachineInstr &MI, bool NewMI, unsigned OpIdx0, unsigned OpIdx1) const override |
Definition at line 25 of file SIInstrInfo.h.
| Enumerator | |
|---|---|
| MO_NONE | |
| MO_GOTPCREL | |
| MO_GOTPCREL32 | |
| MO_GOTPCREL32_LO | |
| MO_GOTPCREL32_HI | |
| MO_REL32 | |
| MO_REL32_LO | |
| MO_REL32_HI | |
Definition at line 99 of file SIInstrInfo.h.
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Definition at line 38 of file SIInstrInfo.cpp.
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Definition at line 1230 of file SIInstrInfo.cpp.
References analyzeBranchImpl(), llvm::SmallVectorBase::empty(), llvm::MachineBasicBlock::end(), llvm::MachineBasicBlock::getFirstTerminator(), and I.
| bool SIInstrInfo::analyzeBranchImpl | ( | MachineBasicBlock & | MBB, |
| MachineBasicBlock::iterator | I, | ||
| MachineBasicBlock *& | TBB, | ||
| MachineBasicBlock *& | FBB, | ||
| SmallVectorImpl< MachineOperand > & | Cond, | ||
| bool | AllowModify | ||
| ) | const |
Definition at line 1193 of file SIInstrInfo.cpp.
References llvm::MachineOperand::CreateImm(), llvm::MachineBasicBlock::end(), I, and llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back().
Referenced by analyzeBranch().
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Definition at line 100 of file SIInstrInfo.cpp.
References assert(), llvm::dyn_cast(), findChainOperand(), llvm::SDNode::getMachineOpcode(), llvm::AMDGPU::getNamedOperandIdx(), getNumOperandsNoGlue(), llvm::SDNode::getOperand(), llvm::ConstantSDNode::getZExtValue(), isDS(), llvm::SDNode::isMachineOpcode(), isMTBUF(), isMUBUF(), isSMRD(), and nodesHaveSameOperandValue().
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Definition at line 1548 of file SIInstrInfo.cpp.
References llvm::AAResults::alias(), assert(), llvm::MachineMemOperand::getAAInfo(), llvm::MachineMemOperand::getSize(), llvm::MachineMemOperand::getValue(), llvm::MachineInstr::hasOneMemOperand(), llvm::MachineInstr::hasOrderedMemoryRef(), llvm::MachineInstr::hasUnmodeledSideEffects(), isDS(), isFLAT(), isMTBUF(), isMUBUF(), isSMRD(), llvm::MachineInstr::mayLoad(), llvm::MachineInstr::mayStore(), and llvm::MachineInstr::memoperands_begin().
Referenced by memAccessesCanBeReordered().
| unsigned SIInstrInfo::calculateLDSSpillAddress | ( | MachineBasicBlock & | MBB, |
| MachineInstr & | MI, | ||
| RegScavenger * | RS, | ||
| unsigned | TmpReg, | ||
| unsigned | FrameOffset, | ||
| unsigned | Size | ||
| ) | const |
| @Offset | Offset in bytes of the FrameIndex being spilled |
Definition at line 683 of file SIInstrInfo.cpp.
References llvm::MachineInstrBuilder::addImm(), llvm::MachineBasicBlock::addLiveIn(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::RegScavenger::enterBasicBlock(), llvm::MachineBasicBlock::findDebugLoc(), llvm::SIRegisterInfo::findUnusedRegister(), llvm::MachineBasicBlock::front(), llvm::MachineFunction::front(), llvm::Function::getCallingConv(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getInfo(), llvm::AMDGPUMachineFunction::getLDSSize(), llvm::SIMachineFunctionInfo::getMaxFlatWorkGroupSize(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), llvm::SIMachineFunctionInfo::getTIDReg(), llvm::SIMachineFunctionInfo::hasCalculatedTID(), llvm::MachineBasicBlock::isLiveIn(), llvm::AMDGPU::isShader(), llvm::SIRegisterInfo::KERNARG_SEGMENT_PTR, llvm::SI::KernelInputOffsets::NGROUPS_Y, llvm::SI::KernelInputOffsets::NGROUPS_Z, llvm::RegScavenger::scavengeRegister(), llvm::SIMachineFunctionInfo::setTIDReg(), llvm::SIRegisterInfo::WORKGROUP_ID_X, llvm::SIRegisterInfo::WORKGROUP_ID_Y, and llvm::SIRegisterInfo::WORKGROUP_ID_Z.
| bool SIInstrInfo::canReadVGPR | ( | const MachineInstr & | MI, |
| unsigned | OpNo | ||
| ) | const |
OpNo to read a VGPR. Definition at line 2208 of file SIInstrInfo.cpp.
References llvm::MachineInstr::getOpcode(), getOpRegClass(), and llvm::SIRegisterInfo::hasVGPRs().
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Definition at line 963 of file SIInstrInfo.cpp.
References assert(), llvm::TargetInstrInfo::commuteInstructionImpl(), commuteOpcode(), llvm::AMDGPU::getNamedOperandIdx(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), isOperandLegal(), llvm::MachineOperand::isReg(), llvm::MachineInstr::setDesc(), swapRegAndNonRegOperand(), and swapSourceModifiers().
| int SIInstrInfo::commuteOpcode | ( | unsigned | Opc | ) | const |
Definition at line 445 of file SIInstrInfo.cpp.
References llvm::AMDGPU::getCommuteOrig(), llvm::AMDGPU::getCommuteRev(), and llvm::AMDGPUInstrInfo::pseudoToMCOpcode().
Referenced by commuteInstructionImpl(), commuteOpcode(), and legalizeOperandsVOP2().
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Definition at line 165 of file SIInstrInfo.h.
References commuteOpcode(), and llvm::MachineInstr::getOpcode().
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Definition at line 1610 of file SIInstrInfo.cpp.
References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addOperand(), llvm::BuildMI(), llvm::MachineInstr::getDebugLoc(), getNamedOperand(), llvm::AMDGPU::getNamedOperandIdx(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), and isInlineConstant().
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Definition at line 349 of file SIInstrInfo.cpp.
References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::BuildMI(), contains(), llvm::RegState::Define, llvm::SIRegisterInfo::getHWRegIndex(), llvm::getKillRegState(), llvm::SIRegisterInfo::getPhysRegClass(), llvm::SIRegisterInfo::getRegSplitParts(), llvm::TargetRegisterClass::getSize(), llvm::RegState::Implicit, llvm::SIRegisterInfo::isSGPRClass(), and llvm::ArrayRef< T >::size().
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This is used by the post-RA scheduler (SchedulePostRAList.cpp).
The post-RA version of misched uses CreateTargetMIHazardRecognizer.
Definition at line 3632 of file SIInstrInfo.cpp.
References llvm::ScheduleDAG::MF.
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This is the hazard recognizer used at -O0 by the PostRAHazardRecognizer pass.
Definition at line 3640 of file SIInstrInfo.cpp.
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Definition at line 808 of file SIInstrInfo.cpp.
References llvm::MachineInstrBuilder::addImm(), addOperand(), llvm::MachineInstrBuilder::addOperand(), llvm::MachineInstrBuilder::addReg(), llvm::MIBundleBuilder::append(), assert(), llvm::MIBundleBuilder::begin(), llvm::BuildMI(), llvm::RegState::Define, llvm::MachineInstr::eraseFromParent(), llvm::finalizeBundle(), llvm::MachineBasicBlock::findDebugLoc(), llvm::MachineOperand::getImm(), llvm::MCInstrDesc::getNumImplicitUses(), llvm::MCInstrDesc::getNumOperands(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineOperand::getReg(), llvm::MachineOperand::getTargetFlags(), llvm::RegState::Implicit, llvm::RegState::ImplicitDefine, llvm::MachineOperand::isFPImm(), llvm::MachineOperand::isImm(), llvm::MachineOperand::isReg(), llvm::MachineOperand::isUndef(), MBB, MO_NONE, llvm::MachineInstr::setDesc(), SubReg, and llvm::RegState::Undef.
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Definition at line 1016 of file SIInstrInfo.cpp.
References llvm::AMDGPU::getNamedOperandIdx(), llvm::MachineInstr::getOpcode(), and llvm::MachineInstr::isCommutable().
Referenced by tryAddToFoldList().
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Definition at line 1368 of file SIInstrInfo.cpp.
References llvm::MachineInstr::addImplicitDefUseOperands(), assert(), llvm::MachineOperand::ChangeToImmediate(), llvm::MachineInstr::eraseFromParent(), llvm::MachineOperand::getImm(), getNamedOperand(), llvm::AMDGPU::getNamedOperandIdx(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineOperand::getReg(), llvm::MachineRegisterInfo::getRegClass(), llvm::MachineOperand::getSubReg(), hasModifiersSet(), llvm::MachineRegisterInfo::hasOneNonDBGUse(), llvm::MachineOperand::isImm(), isInlineConstant(), llvm::MachineOperand::isKill(), llvm::MachineOperand::isReg(), llvm::SIRegisterInfo::isSGPRClass(), llvm::SIRegisterInfo::isVGPR(), isVGPRCopy(), removeModOperands(), llvm::MachineInstr::RemoveOperand(), llvm::MachineInstr::setDesc(), llvm::MachineOperand::setIsKill(), llvm::MachineOperand::setReg(), llvm::MachineOperand::setSubReg(), and llvm::MachineInstr::untieRegOperand().
Referenced by legalizeGenericOperand().
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Definition at line 1049 of file SIInstrInfo.cpp.
References llvm::MachineOperand::getMBB(), llvm::MachineInstr::getOpcode(), and llvm::MachineInstr::getOperand().
| uint64_t SIInstrInfo::getDefaultRsrcDataFormat | ( | ) | const |
Definition at line 3448 of file SIInstrInfo.cpp.
References llvm::AMDGPUSubtarget::getGeneration(), llvm::AMDGPUSubtarget::isAmdHsaOS(), llvm::AMDGPU::RSRC_DATA_FORMAT, and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.
Referenced by getScratchRsrcWords23(), legalizeOperands(), and llvm::SITargetLowering::wrapAddr64Rsrc().
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Definition at line 3542 of file SIInstrInfo.cpp.
References assert(), llvm::ISD::EH_LABEL, llvm::TargetMachine::getMCAsmInfo(), getMCOpcodeFromPseudo(), llvm::AMDGPU::getNamedOperandIdx(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MCInstrDesc::getSize(), llvm::MachineOperand::getSymbolName(), llvm::MachineFunction::getTarget(), llvm::ISD::INLINEASM, isFixedSize(), isLiteralConstantLike(), isSALU(), isVALU(), llvm::AMDGPUISD::KILL, llvm_unreachable, and llvm::MCInstrDesc::OpInfo.
Referenced by removeBranch().
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Definition at line 213 of file SIInstrInfo.h.
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Return the descriptor of the target-specific machine instruction that corresponds to the specified pseudo or native opcode.
Definition at line 709 of file SIInstrInfo.h.
References llvm::AMDGPUInstrInfo::pseudoToMCOpcode().
Referenced by getInstSizeInBytes().
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Definition at line 212 of file SIInstrInfo.cpp.
References assert(), llvm::MachineOperand::getImm(), getNamedOperand(), llvm::AMDGPU::getNamedOperandIdx(), llvm::MachineInstr::getOpcode(), getOpRegClass(), llvm::MachineOperand::getReg(), llvm::TargetRegisterClass::getSize(), isDS(), isFLAT(), isMTBUF(), isMUBUF(), llvm::MachineOperand::isReg(), isSMRD(), isStride64(), llvm::MachineInstr::mayLoad(), and llvm::MachineInstr::mayStore().
Referenced by llvm::SIScheduleDAGMI::schedule().
| unsigned SIInstrInfo::getMovOpcode | ( | const TargetRegisterClass * | DstRC | ) | const |
Definition at line 463 of file SIInstrInfo.cpp.
References llvm::TargetRegisterClass::getSize(), and llvm::SIRegisterInfo::isSGPRClass().
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Get required immediate operand.
Definition at line 696 of file SIInstrInfo.h.
References llvm::MachineOperand::getImm(), llvm::AMDGPU::getNamedOperandIdx(), llvm::MachineInstr::getOpcode(), and llvm::MachineInstr::getOperand().
Referenced by legalizeOperands().
| MachineOperand * SIInstrInfo::getNamedOperand | ( | MachineInstr & | MI, |
| unsigned | OperandName | ||
| ) | const |
Returns the operand named Op.
If MI does not have an operand named Op, this function returns nullptr.
Definition at line 3439 of file SIInstrInfo.cpp.
References llvm::AMDGPU::getNamedOperandIdx(), llvm::MachineInstr::getOpcode(), and llvm::MachineInstr::getOperand().
Referenced by buildMUBUFOffsetLoadStore(), canShrink(), convertToThreeAddress(), emitIndirectDst(), emitIndirectSrc(), FoldImmediate(), getHWReg(), getMemOpBaseRegImmOfs(), getNamedOperand(), hasModifiersSet(), isSafeToFoldImmIntoCopy(), isSGPRStackAccess(), isStackAccess(), legalizeOperands(), legalizeOperandsSMRD(), loadM0FromVGPR(), setM0ToIndexFromSGPR(), shouldClusterMemOps(), swapSourceModifiers(), and verifyInstruction().
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Definition at line 690 of file SIInstrInfo.h.
References getNamedOperand().
| unsigned SIInstrInfo::getNumWaitStates | ( | const MachineInstr & | MI | ) | const |
Return the number of wait states that result from executing this instruction.
Definition at line 799 of file SIInstrInfo.cpp.
References llvm::MachineOperand::getImm(), llvm::MachineInstr::getOpcode(), and llvm::MachineInstr::getOperand().
Referenced by llvm::GCNHazardRecognizer::AdvanceCycle().
| const TargetRegisterClass * SIInstrInfo::getOpRegClass | ( | const MachineInstr & | MI, |
| unsigned | OpNo | ||
| ) | const |
Return the correct register class for OpNo.
For target-specific instructions, this will return the register class that has been defined in tablegen. For generic instructions, like REG_SEQUENCE it will return the register class of its machine operand. to infer the correct register class base on the other operands.
Definition at line 2191 of file SIInstrInfo.cpp.
References Desc, llvm::MCInstrDesc::getNumOperands(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::SIRegisterInfo::getPhysRegClass(), llvm::MachineOperand::getReg(), llvm::MachineRegisterInfo::getRegClass(), llvm::MachineFunction::getRegInfo(), llvm::MachineInstr::isVariadic(), llvm::TargetRegisterInfo::isVirtualRegister(), MRI, llvm::MCInstrDesc::OpInfo, and llvm::MCOperandInfo::RegClass.
Referenced by canReadVGPR(), getMemOpBaseRegImmOfs(), getOpSize(), and legalizeOperands().
Return the size in bytes of the operand OpNo on the given.
Definition at line 592 of file SIInstrInfo.h.
References assert(), llvm::MCOI::OPERAND_IMMEDIATE, llvm::MCOperandInfo::OperandType, and llvm::MCOperandInfo::RegClass.
Referenced by isInlineConstant().
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This form should usually be preferred since it handles operands with unknown register classes.
Definition at line 606 of file SIInstrInfo.h.
References getOpRegClass(), and llvm::TargetRegisterClass::getSize().
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Definition at line 117 of file SIInstrInfo.h.
Referenced by emitIndirectDst(), emitIndirectSrc(), llvm::SISubtarget::getRegisterInfo(), setM0ToIndexFromSGPR(), and tryConstantFoldOp().
| uint64_t SIInstrInfo::getScratchRsrcWords23 | ( | ) | const |
Definition at line 3461 of file SIInstrInfo.cpp.
References getDefaultRsrcDataFormat(), llvm::AMDGPUSubtarget::getGeneration(), llvm::AMDGPUSubtarget::getMaxPrivateElementSize(), llvm::Log2_32(), llvm::AMDGPU::RSRC_DATA_FORMAT, llvm::AMDGPU::RSRC_ELEMENT_SIZE_SHIFT, llvm::AMDGPU::RSRC_INDEX_STRIDE_SHIFT, llvm::AMDGPU::RSRC_TID_ENABLE, and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.
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Definition at line 3619 of file SIInstrInfo.cpp.
References llvm::makeArrayRef(), llvm::AMDGPU::TI_CONSTDATA_START, llvm::AMDGPU::TI_SCRATCH_RSRC_DWORD0, llvm::AMDGPU::TI_SCRATCH_RSRC_DWORD1, llvm::AMDGPU::TI_SCRATCH_RSRC_DWORD2, and llvm::AMDGPU::TI_SCRATCH_RSRC_DWORD3.
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Definition at line 2126 of file SIInstrInfo.cpp.
References llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), and llvm::MachineOperand::isReg().
Referenced by isSALUOpSupportedOnVALU(), and moveToVALU().
Return true if this instruction has any modifiers.
e.g. src[012]_mod, omod, clamp.
Definition at line 1790 of file SIInstrInfo.cpp.
References llvm::AMDGPU::getNamedOperandIdx().
| bool SIInstrInfo::hasModifiersSet | ( | const MachineInstr & | MI, |
| unsigned | OpName | ||
| ) | const |
Definition at line 1798 of file SIInstrInfo.cpp.
References llvm::MachineOperand::getImm(), and getNamedOperand().
Referenced by canShrink(), and FoldImmediate().
Return true if this 64-bit VALU instruction has a 32-bit encoding.
This function will return false if you pass it a 32-bit instruction.
Definition at line 1782 of file SIInstrInfo.cpp.
References llvm::AMDGPU::getVOPe32(), and llvm::AMDGPUInstrInfo::pseudoToMCOpcode().
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Definition at line 1293 of file SIInstrInfo.cpp.
References llvm::MachineInstrBuilder::addMBB(), assert(), llvm::BuildMI(), llvm::ArrayRef< T >::empty(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::setIsKill(), and llvm::MachineOperand::setIsUndef().
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Definition at line 1060 of file SIInstrInfo.cpp.
References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMBB(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::BuildMI(), llvm::MachineRegisterInfo::clearVirtRegs(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::RegState::Define, llvm::MachineBasicBlock::empty(), llvm::MachineBasicBlock::end(), llvm::RegScavenger::enterBasicBlockEnd(), llvm::MachineBasicBlock::getParent(), I, MRI, llvm::MachineBasicBlock::pred_size(), llvm::MachineRegisterInfo::replaceRegWith(), llvm::RegScavenger::scavengeRegister(), llvm::RegScavenger::setRegUsed(), llvm::AMDGPU::TF_LONG_BRANCH_BACKWARD, and llvm::AMDGPU::TF_LONG_BRANCH_FORWARD.
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Definition at line 794 of file SIInstrInfo.cpp.
References insertWaitStates().
| void SIInstrInfo::insertWaitStates | ( | MachineBasicBlock & | MBB, |
| MachineBasicBlock::iterator | MI, | ||
| int | Count | ||
| ) | const |
Definition at line 778 of file SIInstrInfo.cpp.
References llvm::MachineInstrBuilder::addImm(), llvm::BuildMI(), and llvm::MachineBasicBlock::findDebugLoc().
Referenced by insertNoop().
Definition at line 1033 of file SIInstrInfo.cpp.
References assert(), BranchOffsetBits, and llvm::isIntN().
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Definition at line 391 of file SIInstrInfo.h.
References llvm::SIInstrFlags::DisableWQM, llvm::MachineInstr::getDesc(), and llvm::MCInstrDesc::TSFlags.
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Definition at line 395 of file SIInstrInfo.h.
References llvm::SIInstrFlags::DisableWQM.
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Definition at line 415 of file SIInstrInfo.h.
References llvm::SIInstrFlags::DPP, llvm::MachineInstr::getDesc(), and llvm::MCInstrDesc::TSFlags.
Referenced by llvm::GCNHazardRecognizer::getHazardType(), and llvm::GCNHazardRecognizer::PreEmitNoops().
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Definition at line 419 of file SIInstrInfo.h.
References llvm::SIInstrFlags::DPP.
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Definition at line 343 of file SIInstrInfo.h.
References llvm::SIInstrFlags::DS, llvm::MachineInstr::getDesc(), and llvm::MCInstrDesc::TSFlags.
Referenced by areLoadsFromSameBasePtr(), areMemAccessesTriviallyDisjoint(), getMemOpBaseRegImmOfs(), and shouldClusterMemOps().
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Definition at line 347 of file SIInstrInfo.h.
References llvm::SIInstrFlags::DS.
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Definition at line 375 of file SIInstrInfo.h.
References llvm::SIInstrFlags::EXP, llvm::MachineInstr::getDesc(), and llvm::MCInstrDesc::TSFlags.
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Definition at line 379 of file SIInstrInfo.h.
References llvm::SIInstrFlags::EXP.
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Definition at line 449 of file SIInstrInfo.h.
References llvm::SIInstrFlags::FIXED_SIZE, llvm::MachineInstr::getDesc(), and llvm::MCInstrDesc::TSFlags.
Referenced by getInstSizeInBytes().
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Definition at line 453 of file SIInstrInfo.h.
References llvm::SIInstrFlags::FIXED_SIZE.
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Definition at line 367 of file SIInstrInfo.h.
References llvm::SIInstrFlags::FLAT, llvm::MachineInstr::getDesc(), and llvm::MCInstrDesc::TSFlags.
Referenced by areMemAccessesTriviallyDisjoint(), getMemOpBaseRegImmOfs(), and mayAccessFlatAddressSpace().
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Definition at line 371 of file SIInstrInfo.h.
References llvm::SIInstrFlags::FLAT.
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Definition at line 359 of file SIInstrInfo.h.
References llvm::SIInstrFlags::Gather4, llvm::MachineInstr::getDesc(), and llvm::MCInstrDesc::TSFlags.
Referenced by llvm::SITargetLowering::PostISelFolding().
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Definition at line 363 of file SIInstrInfo.h.
References llvm::SIInstrFlags::Gather4.
| bool SIInstrInfo::isHighLatencyInstruction | ( | const MachineInstr & | MI | ) | const |
Definition at line 3486 of file SIInstrInfo.cpp.
References llvm::MachineInstr::getOpcode(), isMIMG(), isMTBUF(), and isMUBUF().
Referenced by llvm::SIScheduleDAGMI::schedule().
| bool SIInstrInfo::isImmOperandLegal | ( | const MachineInstr & | MI, |
| unsigned | OpNo, | ||
| const MachineOperand & | MO | ||
| ) | const |
Definition at line 1764 of file SIInstrInfo.cpp.
References assert(), llvm::MachineInstr::getOpcode(), llvm::MachineOperand::isFI(), llvm::MachineOperand::isImm(), isInlineConstant(), llvm::MachineOperand::isTargetIndex(), llvm::SIRegisterInfo::opCanUseInlineConstant(), llvm::SIRegisterInfo::opCanUseLiteralConstant(), llvm::MCOI::OPERAND_IMMEDIATE, llvm::MCOperandInfo::OperandType, and llvm::MCOperandInfo::RegClass.
Referenced by isOperandLegal().
Definition at line 1681 of file SIInstrInfo.cpp.
References llvm::APInt::getBitWidth(), llvm::APInt::getSExtValue(), llvm::SISubtarget::hasInv2PiInlineImm(), llvm::AMDGPU::isInlinableLiteral16(), llvm::AMDGPU::isInlinableLiteral32(), llvm::AMDGPU::isInlinableLiteral64(), and llvm_unreachable.
Referenced by convertToThreeAddress(), FoldImmediate(), isImmOperandLegal(), isInlineConstant(), isKImmOperand(), isKImmOrKUImmOperand(), isKUImmOperand(), isLiteralConstant(), isLiteralConstantLike(), isReverseInlineImm(), usesConstantBus(), and verifyInstruction().
| bool SIInstrInfo::isInlineConstant | ( | const MachineOperand & | MO, |
| uint8_t | OperandType | ||
| ) | const |
Definition at line 1697 of file SIInstrInfo.cpp.
References llvm::MachineOperand::getImm(), llvm::SISubtarget::hasInv2PiInlineImm(), llvm::MachineOperand::isImm(), llvm::AMDGPU::isInlinableLiteral16(), llvm::AMDGPU::isInlinableLiteral32(), llvm::AMDGPU::isInlinableLiteral64(), llvm::isInt< 16 >(), llvm::isUInt< 16 >(), llvm_unreachable, llvm::MCOI::OPERAND_FIRST_TARGET, and operandBitWidth().
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Definition at line 491 of file SIInstrInfo.h.
References isInlineConstant(), and llvm::MCOperandInfo::OperandType.
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returns true if UseMO is substituted with DefMO in MI it would be an inline immediate.
Definition at line 498 of file SIInstrInfo.h.
References assert(), llvm::MachineInstr::getDesc(), llvm::MachineInstr::getOperandNo(), llvm::MachineOperand::getParent(), isInlineConstant(), MI, llvm::MCInstrDesc::NumOperands, and llvm::MCInstrDesc::OpInfo.
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returns true if the operand OpIdx in MI is a valid inline immediate.
Definition at line 512 of file SIInstrInfo.h.
References llvm::MachineInstr::getDesc(), llvm::MachineInstr::getOperand(), isInlineConstant(), llvm::MCOperandInfo::OperandType, and llvm::MCInstrDesc::OpInfo.
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Definition at line 517 of file SIInstrInfo.h.
References assert(), llvm::MachineInstr::getDesc(), getOpSize(), llvm::MachineInstr::isCopy(), isInlineConstant(), llvm::MCInstrDesc::NumOperands, llvm::AMDGPU::OPERAND_REG_IMM_INT32, llvm::AMDGPU::OPERAND_REG_IMM_INT64, llvm::MCOperandInfo::OperandType, and llvm::MCInstrDesc::OpInfo.
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Definition at line 534 of file SIInstrInfo.h.
References llvm::MachineInstr::getOperandNo(), llvm::MachineOperand::getParent(), and isInlineConstant().
| bool SIInstrInfo::isLegalRegOperand | ( | const MachineRegisterInfo & | MRI, |
| const MCOperandInfo & | OpInfo, | ||
| const MachineOperand & | MO | ||
| ) | const |
Check if MO (a register operand) is a legal register for the given operand description.
Definition at line 2306 of file SIInstrInfo.cpp.
References llvm::SIRegisterInfo::getPhysRegClass(), llvm::MachineOperand::getReg(), llvm::MachineRegisterInfo::getRegClass(), llvm::MachineOperand::getSubReg(), llvm::SIRegisterInfo::getSubRegClass(), llvm::MachineRegisterInfo::getTargetRegisterInfo(), llvm::MachineOperand::isReg(), llvm::TargetRegisterInfo::isVirtualRegister(), and llvm::MCOperandInfo::RegClass.
Referenced by isLegalVSrcOperand(), isOperandLegal(), and legalizeOperandsVOP2().
| bool SIInstrInfo::isLegalVSrcOperand | ( | const MachineRegisterInfo & | MRI, |
| const MCOperandInfo & | OpInfo, | ||
| const MachineOperand & | MO | ||
| ) | const |
Check if MO would be a valid operand for the given operand definition OpInfo.
Note this does not attempt to validate constant bus restrictions (e.g. literal constant usage).
Definition at line 2334 of file SIInstrInfo.cpp.
References assert(), llvm::MachineOperand::isFI(), llvm::MachineOperand::isImm(), isLegalRegOperand(), llvm::MachineOperand::isReg(), and llvm::MachineOperand::isTargetIndex().
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Definition at line 539 of file SIInstrInfo.h.
References llvm::MachineOperand::isImm(), isInlineConstant(), and llvm::MCOperandInfo::OperandType.
Referenced by foldImmediates().
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Definition at line 544 of file SIInstrInfo.h.
References llvm::MachineInstr::getOperand(), llvm::MachineOperand::isImm(), and isInlineConstant().
| bool SIInstrInfo::isLiteralConstantLike | ( | const MachineOperand & | MO, |
| const MCOperandInfo & | OpInfo | ||
| ) | const |
Definition at line 1731 of file SIInstrInfo.cpp.
References llvm::MachineOperand::getType(), isInlineConstant(), llvm_unreachable, llvm::MachineOperand::MO_ExternalSymbol, llvm::MachineOperand::MO_FrameIndex, llvm::MachineOperand::MO_GlobalAddress, llvm::MachineOperand::MO_Immediate, llvm::MachineOperand::MO_MachineBasicBlock, llvm::MachineOperand::MO_MCSymbol, and llvm::MachineOperand::MO_Register.
Referenced by getInstSizeInBytes().
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Definition at line 3513 of file SIInstrInfo.cpp.
References isMUBUF(), isSGPRSpill(), isSGPRStackAccess(), isStackAccess(), isVGPRSpill(), and llvm::MachineInstr::mayLoad().
| bool SIInstrInfo::isLowLatencyInstruction | ( | const MachineInstr & | MI | ) | const |
Definition at line 3480 of file SIInstrInfo.cpp.
References llvm::MachineInstr::getOpcode(), and isSMRD().
Referenced by llvm::SIScheduleDAGMI::schedule().
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Definition at line 351 of file SIInstrInfo.h.
References llvm::MachineInstr::getDesc(), llvm::SIInstrFlags::MIMG, and llvm::MCInstrDesc::TSFlags.
Referenced by llvm::SITargetLowering::AdjustInstrPostInstrSelection(), llvm::SITargetLowering::EmitInstrWithCustomInserter(), isHighLatencyInstruction(), isVMEM(), legalizeOperands(), and llvm::SITargetLowering::PostISelFolding().
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Definition at line 355 of file SIInstrInfo.h.
References llvm::SIInstrFlags::MIMG.
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Definition at line 327 of file SIInstrInfo.h.
References llvm::MachineInstr::getDesc(), llvm::SIInstrFlags::MTBUF, and llvm::MCInstrDesc::TSFlags.
Referenced by areLoadsFromSameBasePtr(), areMemAccessesTriviallyDisjoint(), getMemOpBaseRegImmOfs(), isHighLatencyInstruction(), isVMEM(), legalizeOperands(), and shouldClusterMemOps().
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Definition at line 331 of file SIInstrInfo.h.
References llvm::SIInstrFlags::MTBUF.
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Definition at line 319 of file SIInstrInfo.h.
References llvm::MachineInstr::getDesc(), llvm::SIInstrFlags::MUBUF, and llvm::MCInstrDesc::TSFlags.
Referenced by areLoadsFromSameBasePtr(), areMemAccessesTriviallyDisjoint(), llvm::SIRegisterInfo::getFrameIndexInstrOffset(), getMemOpBaseRegImmOfs(), llvm::SIRegisterInfo::getMUBUFInstrOffset(), llvm::SIRegisterInfo::isFrameOffsetLegal(), isHighLatencyInstruction(), isLoadFromStackSlot(), isStoreToStackSlot(), isVMEM(), legalizeOperands(), and shouldClusterMemOps().
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Definition at line 323 of file SIInstrInfo.h.
References llvm::SIInstrFlags::MUBUF.
| bool SIInstrInfo::isOperandLegal | ( | const MachineInstr & | MI, |
| unsigned | OpIdx, | ||
| const MachineOperand * | MO = nullptr |
||
| ) | const |
Check if MO is a legal operand if it was the OpIdx Operand for MI.
Definition at line 2345 of file SIInstrInfo.cpp.
References assert(), llvm::MachineInstr::getDesc(), llvm::MachineInstr::getNumOperands(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getRegInfo(), llvm::MachineOperand::getSubReg(), i, llvm::MachineOperand::isFI(), llvm::MachineOperand::isImm(), isImmOperandLegal(), isLegalRegOperand(), llvm::MachineOperand::isReg(), llvm::MachineOperand::isTargetIndex(), isVALU(), llvm::AMDGPU::OPERAND_KIMM32, llvm::MCOperandInfo::OperandType, llvm::MCInstrDesc::OpInfo, llvm::MCOperandInfo::RegClass, and usesConstantBus().
Referenced by commuteInstructionImpl(), and tryAddToFoldList().
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Definition at line 85 of file SIInstrInfo.cpp.
References llvm::MachineInstr::getOpcode().
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Definition at line 223 of file SIInstrInfo.h.
References llvm::MachineInstr::getDesc(), llvm::SIInstrFlags::SALU, and llvm::MCInstrDesc::TSFlags.
Referenced by getInstSizeInBytes(), and shouldReadExec().
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Definition at line 227 of file SIInstrInfo.h.
References llvm::SIInstrFlags::SALU.
| bool SIInstrInfo::isSALUOpSupportedOnVALU | ( | const MachineInstr & | MI | ) | const |
Definition at line 2187 of file SIInstrInfo.cpp.
References getVALUOp().
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Definition at line 441 of file SIInstrInfo.h.
References llvm::MachineInstr::getDesc(), llvm::SIInstrFlags::SCALAR_STORE, and llvm::MCInstrDesc::TSFlags.
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Definition at line 445 of file SIInstrInfo.h.
References llvm::SIInstrFlags::SCALAR_STORE.
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Definition at line 423 of file SIInstrInfo.h.
References llvm::MachineInstr::getDesc(), llvm::SIInstrFlags::SALU, llvm::SIInstrFlags::SMRD, and llvm::MCInstrDesc::TSFlags.
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Definition at line 1666 of file SIInstrInfo.cpp.
References changesVGPRIndexingMode(), llvm::MachineInstr::getOpcode(), llvm::TargetInstrInfo::isSchedulingBoundary(), and llvm::MachineInstr::modifiesRegister().
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Definition at line 407 of file SIInstrInfo.h.
References llvm::MachineInstr::getDesc(), llvm::SIInstrFlags::SGPRSpill, and llvm::MCInstrDesc::TSFlags.
Referenced by isLoadFromStackSlot(), and isStoreToStackSlot().
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Definition at line 411 of file SIInstrInfo.h.
References llvm::SIInstrFlags::SGPRSpill.
| unsigned SIInstrInfo::isSGPRStackAccess | ( | const MachineInstr & | MI, |
| int & | FrameIndex | ||
| ) | const |
Definition at line 3505 of file SIInstrInfo.cpp.
References assert(), llvm::MachineOperand::getIndex(), getNamedOperand(), llvm::MachineOperand::getReg(), and llvm::MachineOperand::isFI().
Referenced by isLoadFromStackSlot(), and isStoreToStackSlot().
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Definition at line 335 of file SIInstrInfo.h.
References llvm::MachineInstr::getDesc(), llvm::SIInstrFlags::SMRD, and llvm::MCInstrDesc::TSFlags.
Referenced by areLoadsFromSameBasePtr(), areMemAccessesTriviallyDisjoint(), llvm::GCNHazardRecognizer::getHazardType(), getMemOpBaseRegImmOfs(), isLowLatencyInstruction(), legalizeOperands(), llvm::GCNHazardRecognizer::PreEmitNoops(), shouldClusterMemOps(), shouldReadExec(), and verifyInstruction().
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Definition at line 339 of file SIInstrInfo.h.
References llvm::SIInstrFlags::SMRD.
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Definition at line 247 of file SIInstrInfo.h.
References llvm::MachineInstr::getDesc(), llvm::SIInstrFlags::SOP1, and llvm::MCInstrDesc::TSFlags.
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Definition at line 251 of file SIInstrInfo.h.
References llvm::SIInstrFlags::SOP1.
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Definition at line 255 of file SIInstrInfo.h.
References llvm::MachineInstr::getDesc(), llvm::SIInstrFlags::SOP2, and llvm::MCInstrDesc::TSFlags.
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Definition at line 259 of file SIInstrInfo.h.
References llvm::SIInstrFlags::SOP2.
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Definition at line 263 of file SIInstrInfo.h.
References llvm::MachineInstr::getDesc(), llvm::SIInstrFlags::SOPC, and llvm::MCInstrDesc::TSFlags.
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Definition at line 267 of file SIInstrInfo.h.
References llvm::SIInstrFlags::SOPC.
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Definition at line 271 of file SIInstrInfo.h.
References llvm::MachineInstr::getDesc(), llvm::SIInstrFlags::SOPK, and llvm::MCInstrDesc::TSFlags.
Referenced by verifyInstruction().
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Definition at line 275 of file SIInstrInfo.h.
References llvm::SIInstrFlags::SOPK.
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Definition at line 279 of file SIInstrInfo.h.
References llvm::MachineInstr::getDesc(), llvm::SIInstrFlags::SOPP, and llvm::MCInstrDesc::TSFlags.
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Definition at line 283 of file SIInstrInfo.h.
References llvm::SIInstrFlags::SOPP.
| unsigned SIInstrInfo::isStackAccess | ( | const MachineInstr & | MI, |
| int & | FrameIndex | ||
| ) | const |
Definition at line 3492 of file SIInstrInfo.cpp.
References assert(), llvm::MachineOperand::getIndex(), getNamedOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isFI(), llvm::MachineInstr::memoperands_begin(), llvm::MachineInstr::memoperands_empty(), and AMDGPUAS::PRIVATE_ADDRESS.
Referenced by isLoadFromStackSlot(), and isStoreToStackSlot().
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Definition at line 3528 of file SIInstrInfo.cpp.
References isMUBUF(), isSGPRSpill(), isSGPRStackAccess(), isStackAccess(), isVGPRSpill(), and llvm::MachineInstr::mayStore().
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Definition at line 231 of file SIInstrInfo.h.
References llvm::MachineInstr::getDesc(), llvm::MCInstrDesc::TSFlags, and llvm::SIInstrFlags::VALU.
Referenced by llvm::GCNHazardRecognizer::getHazardType(), getInstSizeInBytes(), isOperandLegal(), llvm::GCNHazardRecognizer::PreEmitNoops(), and shouldReadExec().
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Definition at line 235 of file SIInstrInfo.h.
References llvm::SIInstrFlags::VALU.
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Definition at line 457 of file SIInstrInfo.h.
References assert(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getRegInfo(), llvm::MachineInstr::isCopy(), and llvm::SIRegisterInfo::isSGPRReg().
Referenced by FoldImmediate().
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Definition at line 399 of file SIInstrInfo.h.
References llvm::MachineInstr::getDesc(), llvm::MCInstrDesc::TSFlags, and llvm::SIInstrFlags::VGPRSpill.
Referenced by isLoadFromStackSlot(), and isStoreToStackSlot().
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Definition at line 403 of file SIInstrInfo.h.
References llvm::SIInstrFlags::VGPRSpill.
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Definition at line 239 of file SIInstrInfo.h.
References isMIMG(), isMTBUF(), and isMUBUF().
Referenced by llvm::GCNHazardRecognizer::getHazardType(), and llvm::GCNHazardRecognizer::PreEmitNoops().
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Definition at line 243 of file SIInstrInfo.h.
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Definition at line 287 of file SIInstrInfo.h.
References llvm::MachineInstr::getDesc(), llvm::MCInstrDesc::TSFlags, and llvm::SIInstrFlags::VOP1.
Referenced by foldImmediates(), and verifyInstruction().
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Definition at line 291 of file SIInstrInfo.h.
References llvm::SIInstrFlags::VOP1.
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Definition at line 295 of file SIInstrInfo.h.
References llvm::MachineInstr::getDesc(), llvm::MCInstrDesc::TSFlags, and llvm::SIInstrFlags::VOP2.
Referenced by foldImmediates(), legalizeOperands(), and verifyInstruction().
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Definition at line 299 of file SIInstrInfo.h.
References llvm::SIInstrFlags::VOP2.
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Definition at line 303 of file SIInstrInfo.h.
References llvm::MachineInstr::getDesc(), llvm::MCInstrDesc::TSFlags, and llvm::SIInstrFlags::VOP3.
Referenced by llvm::SITargetLowering::AdjustInstrPostInstrSelection(), legalizeOperands(), and verifyInstruction().
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Definition at line 307 of file SIInstrInfo.h.
References llvm::SIInstrFlags::VOP3.
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Definition at line 311 of file SIInstrInfo.h.
References llvm::MachineInstr::getDesc(), llvm::MCInstrDesc::TSFlags, and llvm::SIInstrFlags::VOPC.
Referenced by foldImmediates(), legalizeOperands(), and verifyInstruction().
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Definition at line 315 of file SIInstrInfo.h.
References llvm::SIInstrFlags::VOPC.
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Definition at line 383 of file SIInstrInfo.h.
References llvm::MachineInstr::getDesc(), llvm::MCInstrDesc::TSFlags, and llvm::SIInstrFlags::WQM.
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Definition at line 387 of file SIInstrInfo.h.
References llvm::SIInstrFlags::WQM.
| void SIInstrInfo::legalizeGenericOperand | ( | MachineBasicBlock & | InsertMBB, |
| MachineBasicBlock::iterator | I, | ||
| const TargetRegisterClass * | DstRC, | ||
| MachineOperand & | Op, | ||
| MachineRegisterInfo & | MRI, | ||
| const DebugLoc & | DL | ||
| ) | const |
Definition at line 2549 of file SIInstrInfo.cpp.
References llvm::MachineInstrBuilder::addOperand(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::tgtok::Def, FoldImmediate(), llvm::MachineOperand::getReg(), llvm::SIRegisterInfo::getRegClassForReg(), llvm::MachineOperand::getSubReg(), llvm::MachineRegisterInfo::getVRegDef(), llvm::MachineInstr::isMoveImmediate(), llvm::MachineOperand::setReg(), and llvm::MachineOperand::setSubReg().
Referenced by legalizeOperands().
| void SIInstrInfo::legalizeOperands | ( | MachineInstr & | MI | ) | const |
Legalize all operands in this instruction.
This function may create new instruction and insert them before MI.
Definition at line 2582 of file SIInstrInfo.cpp.
References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addOperand(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), E, llvm::AMDGPU::getAddr64Inst(), llvm::Function::getCallingConv(), llvm::MachineInstr::getDebugLoc(), getDefaultRsrcDataFormat(), llvm::SIRegisterInfo::getEquivalentVGPRClass(), llvm::MachineBasicBlock::getFirstTerminator(), llvm::MachineFunction::getFunction(), llvm::MachineOperand::getMBB(), getNamedImmOperand(), getNamedOperand(), llvm::AMDGPU::getNamedOperandIdx(), llvm::MachineInstr::getNumOperands(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), getOpRegClass(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineOperand::getReg(), llvm::MachineRegisterInfo::getRegClass(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), llvm::SIRegisterInfo::hasVGPRs(), I, i, isMIMG(), isMTBUF(), isMUBUF(), llvm::MachineOperand::isReg(), llvm::SIRegisterInfo::isSGPRClass(), llvm::AMDGPU::isShader(), isSMRD(), llvm::TargetRegisterInfo::isVirtualRegister(), isVOP2(), isVOP3(), isVOPC(), legalizeGenericOperand(), legalizeOperandsSMRD(), legalizeOperandsVOP2(), legalizeOperandsVOP3(), llvm::MachineInstr::memoperands_begin(), llvm::MachineInstr::memoperands_end(), MI, MRI, Offset, readlaneVGPRToSGPR(), llvm::MachineInstr::removeFromParent(), llvm::MachineOperand::setIsKill(), llvm::MachineInstrBuilder::setMemRefs(), llvm::MachineOperand::setReg(), and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.
Referenced by moveToVALU().
| void SIInstrInfo::legalizeOperandsSMRD | ( | MachineRegisterInfo & | MRI, |
| MachineInstr & | MI | ||
| ) | const |
Definition at line 2535 of file SIInstrInfo.cpp.
References getNamedOperand(), llvm::MachineOperand::getReg(), llvm::MachineRegisterInfo::getRegClass(), llvm::SIRegisterInfo::isSGPRClass(), MI, MRI, readlaneVGPRToSGPR(), and llvm::MachineOperand::setReg().
Referenced by legalizeOperands().
| void SIInstrInfo::legalizeOperandsVOP2 | ( | MachineRegisterInfo & | MRI, |
| MachineInstr & | MI | ||
| ) | const |
Legalize operands in MI by either commuting it or inserting a copy of src1.
Definition at line 2392 of file SIInstrInfo.cpp.
References llvm::MachineOperand::ChangeToImmediate(), llvm::MachineOperand::ChangeToRegister(), commuteOpcode(), findImplicitSGPRRead(), llvm::MachineOperand::getImm(), llvm::AMDGPU::getNamedOperandIdx(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::getSubReg(), llvm::MachineInstr::isCommutable(), llvm::MachineOperand::isImm(), llvm::MachineOperand::isKill(), isLegalRegOperand(), llvm::MachineOperand::isReg(), llvm::SIRegisterInfo::isSGPRReg(), legalizeOpWithMove(), llvm_unreachable, llvm::MCInstrDesc::OpInfo, llvm::MachineInstr::setDesc(), and llvm::MachineOperand::setSubReg().
Referenced by legalizeOperands().
| void SIInstrInfo::legalizeOperandsVOP3 | ( | MachineRegisterInfo & | MRI, |
| MachineInstr & | MI | ||
| ) | const |
Fix operands in MI to satisfy constant bus requirements.
Definition at line 2471 of file SIInstrInfo.cpp.
References llvm::AMDGPU::getNamedOperandIdx(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineRegisterInfo::getRegClass(), i, llvm::MachineOperand::isReg(), llvm::SIRegisterInfo::isSGPRClass(), and legalizeOpWithMove().
Referenced by llvm::SITargetLowering::AdjustInstrPostInstrSelection(), and legalizeOperands().
| void SIInstrInfo::legalizeOpWithMove | ( | MachineInstr & | MI, |
| unsigned | OpIdx | ||
| ) | const |
Legalize the OpIndex operand of this instruction by inserting a MOV.
For example: ADD_I32_e32 VGPR0, 15 to MOV VGPR1, 15 ADD_I32_e32 VGPR0, VGPR1
If the operand being legalized is a register, then a COPY will be used instead of MOV.
Definition at line 2220 of file SIInstrInfo.cpp.
References llvm::MachineInstrBuilder::addOperand(), llvm::BuildMI(), llvm::MachineOperand::ChangeToRegister(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::MachineBasicBlock::findDebugLoc(), llvm::SIRegisterInfo::getEquivalentVGPRClass(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getRegInfo(), I, llvm::MachineOperand::isReg(), llvm::SIRegisterInfo::isSGPRClass(), MBB, MI, and MRI.
Referenced by legalizeOperandsVOP2(), and legalizeOperandsVOP3().
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Definition at line 621 of file SIInstrInfo.cpp.
References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addMemOperand(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::BuildMI(), llvm::MachineRegisterInfo::constrainRegClass(), llvm::LLVMContext::emitError(), llvm::MachineBasicBlock::findDebugLoc(), llvm::Function::getContext(), llvm::MachinePointerInfo::getFixedStack(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getInfo(), llvm::MachineFunction::getMachineMemOperand(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getRegInfo(), llvm::SIMachineFunctionInfo::getScratchRSrcReg(), llvm::SIMachineFunctionInfo::getScratchWaveOffsetReg(), getSGPRSpillRestoreOpcode(), llvm::TargetRegisterClass::getSize(), getVGPRSpillRestoreOpcode(), llvm::SISubtarget::hasScalarStores(), llvm::SIRegisterInfo::hasVGPRs(), llvm::RegState::Implicit, llvm::RegState::ImplicitDefine, llvm::SIRegisterInfo::isSGPRClass(), llvm::SISubtarget::isVGPRSpillingEnabled(), llvm::TargetRegisterInfo::isVirtualRegister(), llvm::MachineMemOperand::MOLoad, and MRI.
| bool SIInstrInfo::mayAccessFlatAddressSpace | ( | const MachineInstr & | MI | ) | const |
Definition at line 3604 of file SIInstrInfo.cpp.
References AMDGPUAS::FLAT_ADDRESS, isFLAT(), llvm::MachineInstr::memoperands(), and llvm::MachineInstr::memoperands_empty().
| void SIInstrInfo::moveToVALU | ( | MachineInstr & | MI | ) | const |
Replace this instruction's opcode with the equivalent VALU opcode.
This function will also move the users of MI to the VALU if necessary.
Definition at line 2872 of file SIInstrInfo.cpp.
References llvm::MachineInstr::addImplicitDefUseOperands(), llvm::MachineInstr::addOperand(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::BuildMI(), llvm::MachineRegisterInfo::clearKillFlags(), llvm::MachineOperand::CreateImm(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::SmallVectorBase::empty(), llvm::MachineInstr::eraseFromParent(), llvm::MachineInstr::getDebugLoc(), llvm::AMDGPUSubtarget::getGeneration(), llvm::MachineOperand::getImm(), llvm::MachineInstr::getNumOperands(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineOperand::getReg(), llvm::SIRegisterInfo::getRegClassForReg(), llvm::MachineFunction::getRegInfo(), getVALUOp(), i, llvm::MachineInstr::isCopy(), llvm::MachineOperand::isDef(), llvm::MachineOperand::isImm(), llvm::MachineOperand::isReg(), llvm::TargetRegisterInfo::isVirtualRegister(), legalizeOperands(), llvm_unreachable, Offset, llvm::SmallVectorImpl< T >::pop_back_val(), llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back(), llvm::MachineInstr::RemoveOperand(), llvm::MachineRegisterInfo::replaceRegWith(), llvm::MachineInstr::setDesc(), llvm::MachineOperand::setReg(), and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.
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Definition at line 465 of file SIInstrInfo.h.
References llvm_unreachable, llvm::AMDGPU::OPERAND_REG_IMM_FP16, llvm::AMDGPU::OPERAND_REG_IMM_FP32, llvm::AMDGPU::OPERAND_REG_IMM_FP64, llvm::AMDGPU::OPERAND_REG_IMM_INT16, llvm::AMDGPU::OPERAND_REG_IMM_INT32, llvm::AMDGPU::OPERAND_REG_IMM_INT64, llvm::AMDGPU::OPERAND_REG_INLINE_C_FP16, llvm::AMDGPU::OPERAND_REG_INLINE_C_FP32, llvm::AMDGPU::OPERAND_REG_INLINE_C_FP64, llvm::AMDGPU::OPERAND_REG_INLINE_C_INT16, llvm::AMDGPU::OPERAND_REG_INLINE_C_INT32, and llvm::AMDGPU::OPERAND_REG_INLINE_C_INT64.
Referenced by isInlineConstant().
| unsigned SIInstrInfo::readlaneVGPRToSGPR | ( | unsigned | SrcReg, |
| MachineInstr & | UseMI, | ||
| MachineRegisterInfo & | MRI | ||
| ) | const |
Copy a value from a VGPR (SrcReg) to SGPR.
This function can only be used when it is know that the value in SrcReg is same across all threads in the wave.
SrcReg was copied to. Definition at line 2509 of file SIInstrInfo.cpp.
References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::MachineInstr::getDebugLoc(), llvm::SIRegisterInfo::getEquivalentSGPRClass(), llvm::MachineInstr::getParent(), llvm::MachineRegisterInfo::getRegClass(), llvm::TargetRegisterClass::getSize(), llvm::AMDGPURegisterInfo::getSubRegFromChannel(), i, llvm::SmallVectorTemplateBase< T, isPodLike >::push_back(), and UseMI.
Referenced by legalizeOperands(), and legalizeOperandsSMRD().
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Definition at line 1268 of file SIInstrInfo.cpp.
References llvm::MachineBasicBlock::end(), llvm::MachineBasicBlock::getFirstTerminator(), getInstSizeInBytes(), and I.
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Definition at line 1347 of file SIInstrInfo.cpp.
References assert(), and llvm::SmallVectorTemplateCommon< T >::size().
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Definition at line 311 of file SIInstrInfo.cpp.
References getNamedOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineOperand::getReg(), llvm::MachineRegisterInfo::getRegClass(), llvm::MachineFunction::getRegInfo(), llvm::TargetRegisterClass::getSize(), isDS(), isMTBUF(), isMUBUF(), isSMRD(), and MRI.
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Definition at line 431 of file SIInstrInfo.h.
References llvm::MachineInstr::getDesc(), llvm::SIInstrFlags::SOPK_ZEXT, and llvm::MCInstrDesc::TSFlags.
Referenced by shrinkScalarCompare(), and verifyInstruction().
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Definition at line 435 of file SIInstrInfo.h.
References llvm::SIInstrFlags::SOPK_ZEXT.
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Definition at line 511 of file SIInstrInfo.cpp.
References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addMemOperand(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::BuildMI(), llvm::MachineRegisterInfo::constrainRegClass(), llvm::LLVMContext::emitError(), llvm::MachineBasicBlock::findDebugLoc(), llvm::Function::getContext(), llvm::MachinePointerInfo::getFixedStack(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getInfo(), llvm::getKillRegState(), llvm::MachineFunction::getMachineMemOperand(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getRegInfo(), llvm::SIMachineFunctionInfo::getScratchRSrcReg(), llvm::SIMachineFunctionInfo::getScratchWaveOffsetReg(), getSGPRSpillSaveOpcode(), llvm::TargetRegisterClass::getSize(), getVGPRSpillSaveOpcode(), llvm::SISubtarget::hasScalarStores(), llvm::SIRegisterInfo::hasVGPRs(), llvm::RegState::Implicit, llvm::RegState::ImplicitDefine, llvm::SIRegisterInfo::isSGPRClass(), llvm::SISubtarget::isVGPRSpillingEnabled(), llvm::TargetRegisterInfo::isVirtualRegister(), llvm::AMDGPUISD::KILL, llvm::MachineMemOperand::MOStore, MRI, llvm::SIMachineFunctionInfo::setHasSpilledSGPRs(), and llvm::SIMachineFunctionInfo::setHasSpilledVGPRs().
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Definition at line 919 of file SIInstrInfo.cpp.
References assert(), llvm::MachineOperand::getImm(), getNamedOperand(), and llvm::MachineOperand::setImm().
Referenced by commuteInstructionImpl().
| bool SIInstrInfo::usesConstantBus | ( | const MachineRegisterInfo & | MRI, |
| const MachineOperand & | MO, | ||
| const MCOperandInfo & | OpInfo | ||
| ) | const |
Returns true if this operand uses the constant bus.
Definition at line 1804 of file SIInstrInfo.cpp.
References contains(), llvm::MachineOperand::getReg(), llvm::MachineRegisterInfo::getRegClass(), llvm::MachineOperand::isImm(), llvm::MachineOperand::isImplicit(), isInlineConstant(), llvm::MachineOperand::isReg(), llvm::SIRegisterInfo::isSGPRClass(), llvm::MachineOperand::isUse(), and llvm::TargetRegisterInfo::isVirtualRegister().
Referenced by isOperandLegal(), and verifyInstruction().
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Definition at line 427 of file SIInstrInfo.h.
References llvm::MachineInstr::getDesc(), llvm::MCInstrDesc::TSFlags, and llvm::SIInstrFlags::VM_CNT.
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Definition at line 1890 of file SIInstrInfo.cpp.
References compareMachineOp(), llvm::TargetRegisterClass::contains(), Desc, E, findImplicitSGPRRead(), llvm::MachineInstr::getDesc(), llvm::MachineOperand::getImm(), getNamedOperand(), llvm::AMDGPU::getNamedOperandIdx(), llvm::MachineInstr::getNumExplicitOperands(), llvm::MCInstrDesc::getNumImplicitUses(), llvm::MCInstrDesc::getNumOperands(), llvm::MachineInstr::getNumOperands(), llvm::MCInstrDesc::getOpcode(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineOperand::getReg(), llvm::MachineInstr::getRegClassConstraint(), llvm::MachineFunction::getRegInfo(), llvm::MachineInstr::hasRegisterImplicitUseOperand(), I, i, llvm::MachineOperand::isFI(), llvm::MachineOperand::isFPImm(), llvm::MachineOperand::isImm(), llvm::MachineInstr::isInlineAsm(), isInlineConstant(), llvm::isInt< 16 >(), llvm::MachineOperand::isReg(), llvm::MachineInstr::isRegTiedToUseOperand(), isSMRD(), isSOPK(), isSubRegOf(), llvm::isUInt< 16 >(), llvm::MachineOperand::isUse(), llvm::MCInstrDesc::isVariadic(), llvm::TargetRegisterInfo::isVirtualRegister(), isVOP1(), isVOP2(), isVOP3(), isVOPC(), LLVM_FALLTHROUGH, llvm::MachineInstr::mayStore(), llvm::InlineAsm::MIOp_FirstOperand, MRI, llvm::MCOI::OPERAND_IMMEDIATE, llvm::AMDGPU::OPERAND_KIMM32, llvm::AMDGPU::OPERAND_REG_IMM_FP32, llvm::AMDGPU::OPERAND_REG_IMM_INT32, llvm::AMDGPU::OPERAND_REG_INLINE_C_FP16, llvm::AMDGPU::OPERAND_REG_INLINE_C_FP32, llvm::AMDGPU::OPERAND_REG_INLINE_C_FP64, llvm::AMDGPU::OPERAND_REG_INLINE_C_INT16, llvm::AMDGPU::OPERAND_REG_INLINE_C_INT32, llvm::AMDGPU::OPERAND_REG_INLINE_C_INT64, llvm::MCOI::OPERAND_REGISTER, llvm::MCOperandInfo::OperandType, llvm::MCInstrDesc::OpInfo, llvm::MCOperandInfo::RegClass, shouldReadExec(), sopkIsZext(), and usesConstantBus().
1.8.6