29 assert((PrevMask & ~NewMask).none() &&
"Must not remove bits");
30 if (PrevMask.
any() || NewMask.
none())
35 for (; PSetI.
isValid(); ++PSetI)
36 CurrSetPressure[*PSetI] += Weight;
44 if (NewMask.
any() || PrevMask.
none())
49 for (; PSetI.
isValid(); ++PSetI) {
50 assert(CurrSetPressure[*PSetI] >= Weight &&
"register pressure underflow");
51 CurrSetPressure[*PSetI] -= Weight;
59 for (
unsigned i = 0, e = SetPressure.
size();
i < e; ++
i) {
60 if (SetPressure[
i] != 0) {
71 dbgs() <<
"Max Pressure: ";
73 dbgs() <<
"Live In: ";
76 if (!
P.LaneMask.all())
81 dbgs() <<
"Live Out: ";
84 if (!
P.LaneMask.all())
94 dbgs() <<
"Curr Pressure: ";
101 const char *sep =
"";
115 if (PreviousMask.
any() || NewMask.
none())
120 for (; PSetI.
isValid(); ++PSetI) {
121 CurrSetPressure[*PSetI] += Weight;
187 this->NumRegUnits = NumRegUnits;
204 CurrSetPressure.clear();
205 LiveThruPressure.clear();
208 if (RequireIntervals)
225 bool TrackLaneMasks,
bool TrackUntiedDefs) {
233 this->TrackUntiedDefs = TrackUntiedDefs;
234 this->TrackLaneMasks = TrackLaneMasks;
236 if (RequireIntervals) {
237 assert(lis &&
"IntervalPressure requires LiveIntervals");
253 if (RequireIntervals)
255 return (static_cast<RegionPressure&>(P).TopPos ==
261 if (RequireIntervals)
263 return (static_cast<RegionPressure&>(P).BottomPos ==
271 if (IdxPos == MBB->
end())
278 if (RequireIntervals)
290 if (RequireIntervals)
303 assert(LiveRegs.
size() == 0 &&
"no region boundary");
321 unsigned RegUnit = Pair.
RegUnit;
332 return Other.
RegUnit == RegUnit;
334 if (
I == RegUnits.
end())
341 unsigned RegUnit = Pair.
RegUnit;
344 return Other.
RegUnit == RegUnit;
346 if (I == RegUnits.
end()) {
356 return Other.
RegUnit == RegUnit;
358 if (
I == RegUnits.
end()) {
367 unsigned RegUnit = Pair.
RegUnit;
370 return Other.
RegUnit == RegUnit;
372 if (I != RegUnits.
end()) {
374 if (I->LaneMask.none())
388 if (Property(SR, Pos))
389 Result |= SR.LaneMask;
391 }
else if (Property(LI, Pos)) {
409 bool TrackLaneMasks,
unsigned RegUnit,
425 class RegisterOperandsCollector {
434 : RegOpers(RegOpers), TRI(TRI), MRI(MRI), IgnoreDead(IgnoreDead) {}
438 collectOperand(*OperI);
447 collectOperandLanes(*OperI);
461 pushReg(Reg, RegOpers.Uses);
466 pushReg(Reg, RegOpers.Uses);
470 pushReg(Reg, RegOpers.DeadDefs);
472 pushReg(Reg, RegOpers.Defs);
476 void pushReg(
unsigned Reg,
489 unsigned Reg = MO.
getReg();
493 pushRegLanes(Reg, SubRegIdx, RegOpers.Uses);
502 pushRegLanes(Reg, SubRegIdx, RegOpers.DeadDefs);
504 pushRegLanes(Reg, SubRegIdx, RegOpers.Defs);
508 void pushRegLanes(
unsigned Reg,
unsigned SubRegIdx,
512 ? TRI.getSubRegIndexLaneMask(SubRegIdx)
529 bool TrackLaneMasks,
bool IgnoreDead) {
530 RegisterOperandsCollector
Collector(*
this, TRI, MRI, IgnoreDead);
532 Collector.collectInstrLanes(MI);
534 Collector.collectInstr(MI);
540 for (
auto RI =
Defs.begin(); RI !=
Defs.end(); ) {
541 unsigned Reg = RI->RegUnit;
561 for (
auto I =
Defs.begin();
I !=
Defs.end(); ) {
566 unsigned RegUnit =
I->RegUnit;
568 AddFlagsMI !=
nullptr && (LiveAfter & ~
I->LaneMask).none())
572 if (ActualDef.
none()) {
575 I->LaneMask = ActualDef;
579 for (
auto I =
Uses.begin();
I !=
Uses.end(); ) {
583 if (LaneMask.none()) {
586 I->LaneMask = LaneMask;
590 if (AddFlagsMI !=
nullptr) {
592 unsigned RegUnit =
P.RegUnit;
597 if (LiveAfter.
none())
632 for (; PSetI.
isValid(); ++PSetI) {
649 unsigned NewUnitInc = I->
getUnitInc() + Weight;
650 if (NewUnitInc != 0) {
655 for (J = std::next(I); J !=
E && J->
isValid(); ++J, ++
I)
676 unsigned RegUnit = Pair.
RegUnit;
678 return Other.
RegUnit == RegUnit;
682 if (
I == LiveInOrOut.
end()) {
687 PrevMask =
I->LaneMask;
689 I->LaneMask = NewMask;
704 unsigned Reg =
P.RegUnit;
710 unsigned Reg =
P.RegUnit;
724 assert(!CurrPos->isDebugValue());
743 PreviousMask = LiveOut;
746 if (NewMask.
none()) {
749 if (TrackLaneMasks && LiveUses !=
nullptr)
757 if (RequireIntervals)
766 if (NewMask == PreviousMask)
770 if (PreviousMask.none()) {
771 if (LiveUses !=
nullptr) {
772 if (!TrackLaneMasks) {
778 bool IsRedef =
I != LiveUses->
end();
790 if (RequireIntervals) {
799 if (TrackUntiedDefs) {
801 unsigned RegUnit = Def.
RegUnit;
804 UntiedDefs.insert(RegUnit);
816 static_cast<RegionPressure&>(
P).openTop(CurrPos);
822 if (RequireIntervals)
835 RegOpers.
collect(MI, *TRI, *MRI, TrackLaneMasks,
false);
836 if (TrackLaneMasks) {
839 }
else if (RequireIntervals) {
843 recede(RegOpers, LiveUses);
848 assert(!TrackUntiedDefs &&
"unsupported mode");
854 if (RequireIntervals)
859 if (RequireIntervals)
875 if (RequireIntervals) {
877 if (LastUseMask.
any()) {
901 RegOpers.
collect(MI, *TRI, *MRI, TrackLaneMasks,
false);
902 if (TrackLaneMasks) {
916 for (
unsigned i = 0, e = OldPressureVec.
size();
i < e; ++
i) {
917 unsigned POld = OldPressureVec[
i];
918 unsigned PNew = NewPressureVec[
i];
919 int PDiff = (int)PNew - (
int)POld;
924 if (!LiveThruPressureVec.
empty())
925 Limit += LiveThruPressureVec[
i];
931 PDiff = PNew - Limit;
932 }
else if (Limit > PNew)
933 PDiff = Limit - POld;
957 unsigned CritIdx = 0, CritEnd = CriticalPSets.
size();
958 for (
unsigned i = 0, e = OldMaxPressureVec.
size();
i < e; ++
i) {
959 unsigned POld = OldMaxPressureVec[
i];
960 unsigned PNew = NewMaxPressureVec[
i];
965 while (CritIdx != CritEnd && CriticalPSets[CritIdx].getPSet() <
i)
968 if (CritIdx != CritEnd && CriticalPSets[CritIdx].getPSet() ==
i) {
969 int PDiff = (int)PNew - (
int)CriticalPSets[CritIdx].getUnitInc();
997 if (RequireIntervals)
1002 RegOpers.
collect(*MI, *TRI, *MRI, TrackLaneMasks,
true);
1006 else if (RequireIntervals)
1019 LaneBitmask LiveAfter = (LiveLanes & ~DefLanes) | UseLanes;
1052 std::vector<unsigned> SavedPressure = CurrSetPressure;
1053 std::vector<unsigned> SavedMaxPressure =
P.MaxSetPressure;
1060 MaxPressureLimit, Delta);
1065 P.MaxSetPressure.swap(SavedMaxPressure);
1066 CurrSetPressure.swap(SavedPressure);
1075 if (Delta != Delta2) {
1076 dbgs() <<
"PDiff: ";
1078 dbgs() <<
"DELTA: " << *
MI;
1117 unsigned CritIdx = 0, CritEnd = CriticalPSets.
size();
1119 PDiffI = PDiff.
begin(), PDiffE = PDiff.
end();
1120 PDiffI != PDiffE && PDiffI->
isValid(); ++PDiffI) {
1122 unsigned PSetID = PDiffI->getPSet();
1124 if (!LiveThruPressure.empty())
1125 Limit += LiveThruPressure[PSetID];
1127 unsigned POld = CurrSetPressure[PSetID];
1128 unsigned MOld =
P.MaxSetPressure[PSetID];
1129 unsigned MNew = MOld;
1131 unsigned PNew = POld + PDiffI->getUnitInc();
1132 assert((PDiffI->getUnitInc() >= 0) == (PNew >= POld)
1133 &&
"PSet overflow/underflow");
1138 unsigned ExcessInc = 0;
1140 ExcessInc = POld > Limit ? PNew - POld : PNew - Limit;
1141 else if (POld > Limit)
1142 ExcessInc = Limit - POld;
1152 while (CritIdx != CritEnd && CriticalPSets[CritIdx].getPSet() < PSetID)
1155 if (CritIdx != CritEnd && CriticalPSets[CritIdx].getPSet() == PSetID) {
1156 int CritInc = (int)MNew - (
int)CriticalPSets[CritIdx].getUnitInc();
1157 if (CritInc > 0 && CritInc <= INT16_MAX) {
1184 if (InstSlot >= PriorUseIdx && InstSlot < NextUseIdx) {
1187 LastUseMask &= ~UseMask;
1188 if (LastUseMask.
none())
1197 assert(RequireIntervals);
1207 assert(RequireIntervals);
1218 assert(RequireIntervals);
1238 if (RequireIntervals)
1243 RegOpers.
collect(*MI, *TRI, *MRI, TrackLaneMasks,
false);
1247 if (RequireIntervals) {
1251 if (LastUseMask.
none())
1261 if (LastUseMask.
none())
1298 std::vector<unsigned> SavedPressure = CurrSetPressure;
1299 std::vector<unsigned> SavedMaxPressure =
P.MaxSetPressure;
1306 MaxPressureLimit, Delta);
1311 P.MaxSetPressure.swap(SavedMaxPressure);
1312 CurrSetPressure.swap(SavedPressure);
1318 std::vector<unsigned> &PressureResult,
1319 std::vector<unsigned> &MaxPressureResult) {
1321 PressureResult = CurrSetPressure;
1322 MaxPressureResult =
P.MaxSetPressure;
1327 P.MaxSetPressure.swap(MaxPressureResult);
1328 CurrSetPressure.swap(PressureResult);
1334 std::vector<unsigned> &PressureResult,
1335 std::vector<unsigned> &MaxPressureResult) {
1337 PressureResult = CurrSetPressure;
1338 MaxPressureResult =
P.MaxSetPressure;
1343 P.MaxSetPressure.swap(MaxPressureResult);
1344 CurrSetPressure.swap(PressureResult);
void dump(const TargetRegisterInfo *TRI) const
void addInstruction(unsigned Idx, const RegisterOperands &RegOpers, const MachineRegisterInfo &MRI)
Record pressure difference induced by the given operand list to node with index Idx.
void push_back(const T &Elt)
static void decreaseSetPressure(std::vector< unsigned > &CurrSetPressure, const MachineRegisterInfo &MRI, unsigned Reg, LaneBitmask PrevMask, LaneBitmask NewMask)
Decrease pressure for each pressure set provided by TargetRegisterInfo.
const Segment * getSegmentContaining(SlotIndex Idx) const
Return the segment that contains the specified index, or null if there is none.
MachineInstr * getParent()
getParent - Return the instruction that this operand belongs to.
virtual unsigned getNumRegPressureSets() const =0
Get the number of dimensions of register pressure.
void detectDeadDefs(const MachineInstr &MI, const LiveIntervals &LIS)
Use liveness information to find dead defs not marked with a dead flag and move them to the DeadDefs ...
void bumpDeadDefs(ArrayRef< RegisterMaskPair > DeadDefs)
void addPressureChange(unsigned RegUnit, bool IsDec, const MachineRegisterInfo *MRI)
Add a change in pressure to the pressure diff of a given instruction.
#define LLVM_DUMP_METHOD
Mark debug helper function definitions like dump() that should not be stripped from debug builds...
bool isValid() const
isValid - returns true if this iterator is not yet at the end.
void init(unsigned N)
Initialize an array of N PressureDiffs.
static const LiveRange * getLiveRange(const LiveIntervals &LIS, unsigned Reg)
SlotIndex getBaseIndex() const
Returns the base index for associated with this index.
void setRegisterDefReadUndef(unsigned Reg, bool IsUndef=true)
Mark all subregister defs of register Reg with the undef flag.
void decreaseRegPressure(unsigned RegUnit, LaneBitmask PreviousMask, LaneBitmask NewMask)
static LaneBitmask getAll()
void appendTo(ContainerT &To) const
LiveInterval - This class represents the liveness of a register, or stack slot.
static bool isVirtualRegister(unsigned Reg)
Return true if the specified register number is in the virtual register namespace.
SlotIndex getMBBEndIdx(const MachineBasicBlock *mbb) const
Return the last index in the given basic block.
unsigned RegUnit
Virtual register or register unit.
SmallVector< RegisterMaskPair, 8 > DeadDefs
List of virtual registers and register units defined by the instruction but dead. ...
SlotIndex getInstructionIndex(const MachineInstr &Instr) const
Returns the base index of the given instruction.
A live range for subregisters.
This represents a simple continuous liveness interval for a value.
void closeRegion()
Finalize the region boundaries and recored live ins and live outs.
static void increaseSetPressure(std::vector< unsigned > &CurrSetPressure, const MachineRegisterInfo &MRI, unsigned Reg, LaneBitmask PrevMask, LaneBitmask NewMask)
Increase pressure for each pressure set provided by TargetRegisterInfo.
bool isTopClosed() const
Does this pressure result have a valid top position and live ins.
void openBottom(MachineBasicBlock::const_iterator PrevBottom)
If the current bottom is the previous instr (before advancing), open it.
LaneBitmask getSubRegIndexLaneMask(unsigned SubIdx) const
Return a bitmask representing the parts of a register that are covered by SubIdx. ...
static LaneBitmask getLiveLanesAt(const LiveIntervals &LIS, const MachineRegisterInfo &MRI, bool TrackLaneMasks, unsigned RegUnit, SlotIndex Pos)
void discoverLiveInOrOut(RegisterMaskPair Pair, SmallVectorImpl< RegisterMaskPair > &LiveInOrOut)
This class represents the liveness of a register, stack slot, etc.
void recede(SmallVectorImpl< RegisterMaskPair > *LiveUses=nullptr)
Recede across the previous instruction.
unsigned getNumVirtRegs() const
getNumVirtRegs - Return the number of virtual registers created.
void discoverLiveIn(RegisterMaskPair Pair)
Add Reg to the live in set and increase max pressure.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
SlotIndex TopIdx
Record the boundary of the region being tracked.
void closeBottom()
Set the boundary for the bottom of the region and summarize live outs.
const TargetRegisterInfo * getTargetRegisterInfo() const
virtual const char * getRegPressureSetName(unsigned Idx) const =0
Get the name of this register unit pressure set.
A Use represents the edge between a Value definition and its users.
void openBottom(SlotIndex PrevBottom)
If the current bottom is not greater than the previous index, open it.
MachineBasicBlock::const_iterator TopPos
Record the boundary of the region being tracked.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
bool isReg() const
isReg - Tests if this is a MO_Register operand.
iterator_range< subrange_iterator > subranges()
Result of a LiveRange query.
Reg
All possible values of the reg field in the ModR/M byte.
SlotIndex getDeadSlot() const
Returns the dead def kill slot for the current instruction.
constexpr bool any() const
static LaneBitmask findUseBetween(unsigned Reg, LaneBitmask LastUseMask, SlotIndex PriorUseIdx, SlotIndex NextUseIdx, const MachineRegisterInfo &MRI, const LiveIntervals *LIS)
Helper to find a vreg use between two indices [PriorUseIdx, NextUseIdx).
SlotIndex getCurrSlot() const
Get the SlotIndex for the first nondebug instruction including or after the current position...
unsigned getNumRegs() const
Return the number of registers this target has (useful for sizing arrays holding per register informa...
const_iterator end() const
void openTop(SlotIndex NextTop)
If the current top is not less than or equal to the next index, open it.
bool hasUntiedDef(unsigned VirtReg) const
SmallVector< RegisterMaskPair, 8 > LiveInRegs
List of live in virtual registers or physical register units.
void collect(const MachineInstr &MI, const TargetRegisterInfo &TRI, const MachineRegisterInfo &MRI, bool TrackLaneMasks, bool IgnoreDead)
Analyze the given instruction MI and fill in the Uses, Defs and DeadDefs list based on the MachineOpe...
List of registers defined and used by a machine instruction.
size_t size() const
size - Get the array size.
void increaseRegPressure(unsigned RegUnit, LaneBitmask PreviousMask, LaneBitmask NewMask)
LiveRange * getCachedRegUnit(unsigned Unit)
getCachedRegUnit - Return the live range for Unit if it has already been computed, or NULL if it hasn't been computed yet.
static GCRegistry::Add< CoreCLRGC > E("coreclr","CoreCLR-compatible GC")
bool isDebugValue() const
void recedeSkipDebugValues()
Recede until we find an instruction which is not a DebugValue.
LaneBitmask getLiveLanesAt(unsigned RegUnit, SlotIndex Pos) const
void init(const MachineRegisterInfo &MRI)
bool isDeadDef() const
Return true if this instruction has a dead def.
SmallVector< RegisterMaskPair, 8 > LiveOutRegs
void addLiveRegs(ArrayRef< RegisterMaskPair > Regs)
Force liveness of virtual registers or physical register units.
void getMaxDownwardPressureDelta(const MachineInstr *MI, RegPressureDelta &Delta, ArrayRef< PressureChange > CriticalPSets, ArrayRef< unsigned > MaxPressureLimit)
Consider the pressure increase caused by traversing this instruction top-down.
SmallVector< RegisterMaskPair, 8 > Uses
List of virtual registers and register units read by the instruction.
LaneBitmask getLiveThroughAt(unsigned RegUnit, SlotIndex Pos) const
LiveQueryResult Query(SlotIndex Idx) const
Query Liveness at Idx.
unsigned const MachineRegisterInfo * MRI
PressureChange CurrentMax
RegisterPressure computed within a region of instructions delimited by TopIdx and BottomIdx...
iterator_range< use_nodbg_iterator > use_nodbg_operands(unsigned Reg) const
constexpr bool none() const
void bumpDownwardPressure(const MachineInstr *MI)
Record the downward impact of a single instruction on current register pressure.
RegisterPressure computed within a region of instructions delimited by TopPos and BottomPos...
void openTop(MachineBasicBlock::const_iterator PrevTop)
If the current top is the previous instruction (before receding), open it.
Track the current register pressure at some position in the instruction stream, and remember the high...
List of PressureChanges in order of increasing, unique PSetID.
unsigned getRegPressureSetLimit(unsigned Idx) const
Get the register unit limit for the given pressure set index.
void setUniverse(unsigned U)
setUniverse - Set the universe size which determines the largest key the set can hold.
bool empty() const
empty - Check if the array is empty.
SmallVector< RegisterMaskPair, 8 > Defs
List of virtual registers and register units defined by the instruction which are not dead...
unsigned getSubReg() const
void discoverLiveOut(RegisterMaskPair Pair)
Add Reg to the live out set and increase max pressure.
iterator erase(const_iterator CI)
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
bool liveAt(SlotIndex index) const
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
void initLiveThru(const RegPressureTracker &RPTracker)
Initialize the LiveThru pressure set based on the untied defs found in RPTracker. ...
std::vector< unsigned > MaxSetPressure
Map of max reg pressure indexed by pressure set ID, not class ID.
void adjustLaneLiveness(const LiveIntervals &LIS, const MachineRegisterInfo &MRI, SlotIndex Pos, MachineInstr *AddFlagsMI=nullptr)
Use liveness information to find out which uses/defs are partially undefined/dead and adjust the Regi...
void advance()
Advance across the current instruction.
ConstMIBundleOperands - Iterate over all operands in a const bundle of machine instructions.
MachineOperand class - Representation of each machine instruction operand.
LaneBitmask erase(RegisterMaskPair Pair)
Clears the Pair.LaneMask lanes of Pair.Reg (mark them as dead).
static LaneBitmask getNone()
bool isAllocatable(unsigned PhysReg) const
isAllocatable - Returns true when PhysReg belongs to an allocatable register class and it hasn't been...
unsigned getWeight() const
LaneBitmask getLastUsedLanes(unsigned RegUnit, SlotIndex Pos) const
static LaneBitmask getRegLanes(ArrayRef< RegisterMaskPair > RegUnits, unsigned RegUnit)
void reset()
Clear the result so it can be used for another round of pressure tracking.
LiveInterval & getInterval(unsigned Reg)
IterT skipDebugInstructionsBackward(IterT It, IterT Begin)
Decrement It until it points to a non-debug instruction or to Begin and return the resulting iterator...
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
void swap(llvm::BitVector &LHS, llvm::BitVector &RHS)
Implement std::swap in terms of BitVector swap.
static void addRegLanes(SmallVectorImpl< RegisterMaskPair > &RegUnits, RegisterMaskPair Pair)
PressureChange CriticalMax
static LaneBitmask getLanesWithProperty(const LiveIntervals &LIS, const MachineRegisterInfo &MRI, bool TrackLaneMasks, unsigned RegUnit, SlotIndex Pos, LaneBitmask SafeDefault, bool(*Property)(const LiveRange &LR, SlotIndex Pos))
IterT skipDebugInstructionsForward(IterT It, IterT End)
Increment It until it points to a non-debug instruction or to End and return the resulting iterator...
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
LaneBitmask contains(unsigned Reg) const
void closeTop()
Set the boundary for the top of the region and summarize live ins.
Representation of each machine instruction.
LLVM_ATTRIBUTE_ALWAYS_INLINE iterator end()
void dumpRegSetPressure(ArrayRef< unsigned > SetPressure, const TargetRegisterInfo *TRI)
static void removeRegLanes(SmallVectorImpl< RegisterMaskPair > &RegUnits, RegisterMaskPair Pair)
LaneBitmask getMaxLaneMaskForVReg(unsigned Reg) const
Returns a mask covering all bits that can appear in lane masks of subregisters of the virtual registe...
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Iterate over the pressure sets affected by the given physical or virtual register.
LLVM_DUMP_METHOD void dump(const TargetRegisterInfo &TRI) const
PSetIterator getPressureSets(unsigned RegUnit) const
Get an iterator over the pressure sets affected by the given physical or virtual register.
Capture a change in pressure for a single pressure set.
void getMaxUpwardPressureDelta(const MachineInstr *MI, PressureDiff *PDiff, RegPressureDelta &Delta, ArrayRef< PressureChange > CriticalPSets, ArrayRef< unsigned > MaxPressureLimit)
Consider the pressure increase caused by traversing this instruction bottom-up.
void getUpwardPressure(const MachineInstr *MI, std::vector< unsigned > &PressureResult, std::vector< unsigned > &MaxPressureResult)
Get the pressure of each PSet after traversing this instruction bottom-up.
const_iterator begin() const
void clear()
clear - Clears the set.
bool isBottomClosed() const
Does this pressure result have a valid bottom position and live outs.
void init(const MachineFunction *mf, const RegisterClassInfo *rci, const LiveIntervals *lis, const MachineBasicBlock *mbb, MachineBasicBlock::const_iterator pos, bool TrackLaneMasks, bool TrackUntiedDefs)
Setup the RegPressureTracker.
void bumpUpwardPressure(const MachineInstr *MI)
Record the upward impact of a single instruction on current register pressure.
SlotIndex getRegSlot(bool EC=false) const
Returns the register use/def slot in the current instruction for a normal or early-clobber def...
unsigned getReg() const
getReg - Returns the register number.
bool isValid() const
isValid - Returns true until all the operands have been visited.
Store the effects of a change in pressure on things that MI scheduler cares about.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
static void setRegZero(SmallVectorImpl< RegisterMaskPair > &RegUnits, unsigned RegUnit)
LaneBitmask insert(RegisterMaskPair Pair)
Mark the Pair.LaneMask lanes of Pair.Reg as live.
static LLVM_ATTRIBUTE_UNUSED Printable PrintLaneMask(LaneBitmask LaneMask)
Create Printable object to print LaneBitmasks on a raw_ostream.
static void computeMaxPressureDelta(ArrayRef< unsigned > OldMaxPressureVec, ArrayRef< unsigned > NewMaxPressureVec, ArrayRef< PressureChange > CriticalPSets, ArrayRef< unsigned > MaxPressureLimit, RegPressureDelta &Delta)
Find the max change in max pressure that either surpasses a critical PSet limit or exceeds the curren...
void reset()
Clear the result so it can be used for another round of pressure tracking.
MachineInstrBundleIterator< const MachineInstr > const_iterator
void getDownwardPressure(const MachineInstr *MI, std::vector< unsigned > &PressureResult, std::vector< unsigned > &MaxPressureResult)
Get the pressure of each PSet after traversing this instruction top-down.
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
bool readsReg() const
readsReg - Returns true if this operand reads the previous value of its register. ...
MachineBasicBlock::const_iterator BottomPos
auto find_if(R &&Range, UnaryPredicate P) -> decltype(std::begin(Range))
Provide wrappers to std::find_if which take ranges instead of having to pass begin/end explicitly...
bool hasSubRanges() const
Returns true if subregister liveness information is available.
SlotIndex - An opaque wrapper around machine indexes.
Printable PrintVRegOrUnit(unsigned VRegOrUnit, const TargetRegisterInfo *TRI)
Create Printable object to print virtual registers and physical registers on a raw_ostream.
Register Usage Information Collector
void getUpwardPressureDelta(const MachineInstr *MI, PressureDiff &PDiff, RegPressureDelta &Delta, ArrayRef< PressureChange > CriticalPSets, ArrayRef< unsigned > MaxPressureLimit) const
This is the fast version of querying register pressure that does not directly depend on current liven...
bool isInternalRead() const
static void computeExcessPressureDelta(ArrayRef< unsigned > OldPressureVec, ArrayRef< unsigned > NewPressureVec, RegPressureDelta &Delta, const RegisterClassInfo *RCI, ArrayRef< unsigned > LiveThruPressureVec)
Find the max change in excess pressure across all sets.