33 unsigned ZMask = Imm & 15;
34 unsigned CountD = (Imm >> 4) & 3;
35 unsigned CountS = (Imm >> 6) & 3;
38 unsigned InVal = 4 + CountS;
40 ShuffleMask[CountD] = InVal;
51 assert((Idx + Len) <= NumElts &&
"Insertion out of range");
53 for (
unsigned i = 0;
i != NumElts; ++
i)
55 for (
unsigned i = 0;
i != Len; ++
i)
56 ShuffleMask[Idx +
i] = NumElts +
i;
61 for (
unsigned i = NElts / 2;
i != NElts; ++
i)
64 for (
unsigned i = NElts / 2;
i != NElts; ++
i)
70 for (
unsigned i = 0;
i != NElts / 2; ++
i)
73 for (
unsigned i = 0;
i != NElts / 2; ++
i)
79 for (
int i = 0, e = NumElts / 2;
i < e; ++
i) {
87 for (
int i = 0, e = NumElts / 2;
i < e; ++
i) {
97 unsigned NumLanes = VectorSizeInBits / 128;
98 unsigned NumLaneElts = NumElts / NumLanes;
99 unsigned NumLaneSubElts = 64 / ScalarSizeInBits;
101 for (
unsigned l = 0; l < NumElts; l += NumLaneElts)
102 for (
unsigned i = 0;
i < NumLaneElts;
i += NumLaneSubElts)
103 for (
unsigned s = 0; s != NumLaneSubElts; s++)
109 unsigned NumElts = VectorSizeInBits / 8;
110 unsigned NumLanes = VectorSizeInBits / 128;
111 unsigned NumLaneElts = NumElts / NumLanes;
113 for (
unsigned l = 0; l < NumElts; l += NumLaneElts)
114 for (
unsigned i = 0;
i < NumLaneElts; ++
i) {
116 if (
i >= Imm) M =
i - Imm + l;
123 unsigned NumElts = VectorSizeInBits / 8;
124 unsigned NumLanes = VectorSizeInBits / 128;
125 unsigned NumLaneElts = NumElts / NumLanes;
127 for (
unsigned l = 0; l < NumElts; l += NumLaneElts)
128 for (
unsigned i = 0;
i < NumLaneElts; ++
i) {
129 unsigned Base =
i + Imm;
142 unsigned NumLaneElts = NumElts / NumLanes;
144 for (
unsigned l = 0; l != NumElts; l += NumLaneElts) {
145 for (
unsigned i = 0;
i != NumLaneElts; ++
i) {
148 if (Base >= NumLaneElts) Base += NumElts - NumLaneElts;
159 Imm = Imm & (NumElts - 1);
160 for (
int i = 0;
i != NumElts; ++
i)
171 if (NumLanes == 0) NumLanes = 1;
172 unsigned NumLaneElts = NumElts / NumLanes;
174 unsigned NewImm = Imm;
175 for (
unsigned l = 0; l != NumElts; l += NumLaneElts) {
176 for (
unsigned i = 0;
i != NumLaneElts; ++
i) {
177 ShuffleMask.
push_back(NewImm % NumLaneElts + l);
178 NewImm /= NumLaneElts;
180 if (NumLaneElts == 4) NewImm = Imm;
188 for (
unsigned l = 0; l != NumElts; l += 8) {
189 unsigned NewImm = Imm;
190 for (
unsigned i = 0, e = 4;
i != e; ++
i) {
193 for (
unsigned i = 4, e = 8;
i != e; ++
i) {
194 ShuffleMask.
push_back(l + 4 + (NewImm & 3));
204 for (
unsigned l = 0; l != NumElts; l += 8) {
205 unsigned NewImm = Imm;
206 for (
unsigned i = 0, e = 4;
i != e; ++
i) {
210 for (
unsigned i = 4, e = 8;
i != e; ++
i) {
218 unsigned NumHalfElts = NumElts / 2;
220 for (
unsigned l = 0; l != NumHalfElts; ++l)
222 for (
unsigned h = 0; h != NumHalfElts; ++h)
233 unsigned NumLaneElts = NumElts / NumLanes;
235 unsigned NewImm = Imm;
236 for (
unsigned l = 0; l != NumElts; l += NumLaneElts) {
238 for (
unsigned s = 0; s != NumElts * 2; s += NumElts) {
239 for (
unsigned i = 0;
i != NumLaneElts / 2; ++
i) {
240 ShuffleMask.
push_back(NewImm % NumLaneElts + s + l);
241 NewImm /= NumLaneElts;
244 if (NumLaneElts == 4) NewImm = Imm;
257 if (NumLanes == 0) NumLanes = 1;
258 unsigned NumLaneElts = NumElts / NumLanes;
260 for (
unsigned l = 0; l != NumElts; l += NumLaneElts) {
261 for (
unsigned i = l + NumLaneElts / 2, e = l + NumLaneElts;
i != e; ++
i) {
277 if (NumLanes == 0 ) NumLanes = 1;
278 unsigned NumLaneElts = NumElts / NumLanes;
280 for (
unsigned l = 0; l != NumElts; l += NumLaneElts) {
281 for (
unsigned i = l, e = l + NumLaneElts / 2;
i != e; ++
i) {
291 ShuffleMask.
append(NumElts, 0);
298 "Non matching vector element types");
302 for (
unsigned i = 0;
i != Scale; ++
i)
303 for (
unsigned j = 0; j != NumElts; ++j)
314 unsigned ControlBitsMask = NumLanes - 1;
315 unsigned NumControlBits = NumLanes / 2;
317 for (
unsigned l = 0; l != NumLanes; ++l) {
318 unsigned LaneMask = (Imm >> (l * NumControlBits)) & ControlBitsMask;
320 if (l >= NumLanes / 2)
321 LaneMask += NumLanes;
322 for (
unsigned i = 0;
i != NumElementsInLane; ++
i)
323 ShuffleMask.
push_back(LaneMask * NumElementsInLane +
i);
331 for (
unsigned l = 0; l != 2; ++l) {
332 unsigned HalfMask = Imm >> (l * 4);
333 unsigned HalfBegin = (HalfMask & 0x3) * HalfSize;
334 for (
unsigned i = HalfBegin, e = HalfBegin + HalfSize;
i != e; ++
i)
341 for (
int i = 0, e = RawMask.
size();
i < e; ++
i) {
342 uint64_t M = RawMask[
i];
349 int Base = (
i / 16) * 16;
355 int Index = Base + (M & 0xf);
364 for (
int i = 0;
i < NumElements; ++
i) {
368 int Bit = NumElements > 8 ?
i % (128 / ElementBits) :
i;
370 "Immediate blends only operate over 8 elements at a time!");
371 ShuffleMask.
push_back(((Imm >> Bit) & 1) ? NumElements +
i :
i);
377 assert(RawMask.
size() == 16 &&
"Illegal VPPERM shuffle mask size");
392 for (
int i = 0, e = RawMask.
size();
i < e; ++
i) {
393 uint64_t M = RawMask[
i];
399 uint64_t PermuteOp = (M >> 5) & 0x7;
400 if (PermuteOp == 4) {
404 if (PermuteOp != 0) {
409 uint64_t Index = M & 0x1F;
419 for (
unsigned l = 0; l != NumElts; l += 4)
420 for (
unsigned i = 0;
i != 4; ++
i)
421 ShuffleMask.
push_back(l + ((Imm >> (2 *
i)) & 3));
428 unsigned Scale = DstScalarBits / SrcScalarBits;
429 assert(SrcScalarBits < DstScalarBits &&
430 "Expected zero extension mask to increase scalar size");
432 for (
unsigned i = 0;
i != NumDstElts;
i++) {
434 for (
unsigned j = 1; j != Scale; j++)
442 for (
unsigned i = 1;
i < NumElts;
i++)
451 for (
unsigned i = 1;
i < NumElts;
i++)
463 if (0 != (Len % 8) || 0 != (Idx % 8))
471 if ((Len + Idx) > 64) {
482 for (
int i = 0;
i != Len; ++
i)
484 for (
int i = Len;
i != 8; ++
i)
486 for (
int i = 8;
i != 16; ++
i)
498 if (0 != (Len % 8) || 0 != (Idx % 8))
506 if ((Len + Idx) > 64) {
518 for (
int i = 0;
i != Idx; ++
i)
520 for (
int i = 0;
i != Len; ++
i)
522 for (
int i = Idx + Len;
i != 8; ++
i)
524 for (
int i = 8;
i != 16; ++
i)
532 unsigned NumLanes = VecSize / 128;
534 assert((VecSize == 128 || VecSize == 256 || VecSize == 512) &&
535 "Unexpected vector size");
536 assert((EltSize == 32 || EltSize == 64) &&
"Unexpected element size");
538 for (
unsigned i = 0, e = RawMask.
size();
i < e; ++
i) {
539 uint64_t M = RawMask[
i];
540 M = (EltSize == 64 ? ((M >> 1) & 0x1) : (M & 0x3));
541 unsigned LaneOffset =
i & ~(NumEltsPerLane - 1);
542 ShuffleMask.
push_back((
int)(LaneOffset + M));
550 unsigned NumLanes = VecSize / 128;
552 unsigned NumEltsPerLane = NumElts / NumLanes;
553 assert((VecSize == 128 || VecSize == 256) &&
"Unexpected vector size");
554 assert((EltSize == 32 || EltSize == 64) &&
"Unexpected element size");
555 assert((NumElts == RawMask.
size()) &&
"Unexpected mask size");
557 for (
unsigned i = 0, e = RawMask.
size();
i < e; ++
i) {
562 uint64_t Selector = RawMask[
i];
563 unsigned MatchBit = (Selector >> 3) & 0x1;
571 if ((M2Z & 0x2) != 0 && MatchBit != (M2Z & 0x1)) {
576 int Index =
i & ~(NumEltsPerLane - 1);
578 Index += (Selector >> 1) & 0x1;
580 Index += Selector & 0x3;
582 int Src = (Selector >> 2) & 0x1;
583 Index += Src * NumElts;
590 uint64_t EltMaskSize = RawMask.
size() - 1;
591 for (
auto M : RawMask) {
599 uint64_t EltMaskSize = (RawMask.
size() * 2) - 1;
600 for (
auto M : RawMask) {
void push_back(const T &Elt)
void DecodeVPERMILPMask(MVT VT, ArrayRef< uint64_t > RawMask, SmallVectorImpl< int > &ShuffleMask)
Decode a VPERMILPD/VPERMILPS variable mask from a raw array of constants.
void DecodePSLLDQMask(MVT VT, unsigned Imm, SmallVectorImpl< int > &ShuffleMask)
void DecodeScalarMoveMask(MVT VT, bool IsLoad, SmallVectorImpl< int > &Mask)
Decode a scalar float move instruction as a shuffle mask.
unsigned getScalarSizeInBits() const
void DecodePALIGNRMask(MVT VT, unsigned Imm, SmallVectorImpl< int > &ShuffleMask)
bool is512BitVector() const
is512BitVector - Return true if this is a 512-bit vector type.
unsigned getSizeInBits() const
void DecodeUNPCKLMask(MVT VT, SmallVectorImpl< int > &ShuffleMask)
DecodeUNPCKLMask - This decodes the shuffle masks for unpcklps/unpcklpd and punpckl*.
void DecodeMOVDDUPMask(MVT VT, SmallVectorImpl< int > &ShuffleMask)
MVT getScalarType() const
getScalarType - If this is a vector type, return the element type, otherwise return this...
void DecodeSubVectorBroadcast(MVT DstVT, MVT SrcVT, SmallVectorImpl< int > &ShuffleMask)
Decodes a broadcast of a subvector to a larger vector type.
void DecodeEXTRQIMask(int Len, int Idx, SmallVectorImpl< int > &ShuffleMask)
Decode a SSE4A EXTRQ instruction as a v16i8 shuffle mask.
void DecodeINSERTQIMask(int Len, int Idx, SmallVectorImpl< int > &ShuffleMask)
Decode a SSE4A INSERTQ instruction as a v16i8 shuffle mask.
size_t size() const
size - Get the array size.
void DecodeZeroMoveLowMask(MVT VT, SmallVectorImpl< int > &ShuffleMask)
Decode a move lower and zero upper instruction as a shuffle mask.
void DecodeBLENDMask(MVT VT, unsigned Imm, SmallVectorImpl< int > &ShuffleMask)
Decode a BLEND immediate mask into a shuffle mask.
void DecodeMOVSHDUPMask(MVT VT, SmallVectorImpl< int > &ShuffleMask)
void DecodeMOVLHPSMask(unsigned NElts, SmallVectorImpl< int > &ShuffleMask)
Decode a MOVLHPS instruction as a v2f64/v4f32 shuffle mask.
unsigned getVectorNumElements() const
constexpr bool isPowerOf2_32(uint32_t Value)
isPowerOf2_32 - This function returns true if the argument is a power of two > 0. ...
MVT - Machine Value Type.
void DecodeVPPERMMask(ArrayRef< uint64_t > RawMask, SmallVectorImpl< int > &ShuffleMask)
Decode a VPPERM mask from a raw array of constants such as from BUILD_VECTOR.
void DecodeSHUFPMask(MVT VT, unsigned Imm, SmallVectorImpl< int > &ShuffleMask)
DecodeSHUFPMask - This decodes the shuffle masks for shufp*.
void DecodePSHUFLWMask(MVT VT, unsigned Imm, SmallVectorImpl< int > &ShuffleMask)
Decodes the shuffle masks for pshuflw.
void DecodeINSERTPSMask(unsigned Imm, SmallVectorImpl< int > &ShuffleMask)
Decode a 128-bit INSERTPS instruction as a v4f32 shuffle mask.
void DecodeZeroExtendMask(MVT SrcScalarVT, MVT DstVT, SmallVectorImpl< int > &Mask)
Decode a zero extension instruction as a shuffle mask.
void DecodeVectorBroadcast(MVT DstVT, SmallVectorImpl< int > &ShuffleMask)
Decodes a broadcast of the first element of a vector.
void append(in_iter in_start, in_iter in_end)
Add the specified range to the end of the SmallVector.
void DecodeVPERMVMask(ArrayRef< uint64_t > RawMask, SmallVectorImpl< int > &ShuffleMask)
Decode a VPERM W/D/Q/PS/PD mask from a raw array of constants.
void DecodeVPERMIL2PMask(MVT VT, unsigned M2Z, ArrayRef< uint64_t > RawMask, SmallVectorImpl< int > &ShuffleMask)
Decode a VPERMIL2PD/VPERMIL2PS variable mask from a raw array of constants.
void DecodePSRLDQMask(MVT VT, unsigned Imm, SmallVectorImpl< int > &ShuffleMask)
void DecodeMOVSLDUPMask(MVT VT, SmallVectorImpl< int > &ShuffleMask)
void DecodeVALIGNMask(MVT VT, unsigned Imm, SmallVectorImpl< int > &ShuffleMask)
void DecodePSHUFMask(MVT VT, unsigned Imm, SmallVectorImpl< int > &ShuffleMask)
DecodePSHUFMask - This decodes the shuffle masks for pshufw, pshufd, and vpermilp*.
void DecodeVPERMV3Mask(ArrayRef< uint64_t > RawMask, SmallVectorImpl< int > &ShuffleMask)
Decode a VPERMT2 W/D/Q/PS/PD mask from a raw array of constants.
void DecodePSWAPMask(MVT VT, SmallVectorImpl< int > &ShuffleMask)
Decodes a PSWAPD 3DNow! instruction.
void DecodeUNPCKHMask(MVT VT, SmallVectorImpl< int > &ShuffleMask)
DecodeUNPCKHMask - This decodes the shuffle masks for unpckhps/unpckhpd and punpckh*.
void DecodeVPERM2X128Mask(MVT VT, unsigned Imm, SmallVectorImpl< int > &ShuffleMask)
bool is256BitVector() const
is256BitVector - Return true if this is a 256-bit vector type.
void DecodeInsertElementMask(MVT VT, unsigned Idx, unsigned Len, SmallVectorImpl< int > &ShuffleMask)
void decodeVSHUF64x2FamilyMask(MVT VT, unsigned Imm, SmallVectorImpl< int > &ShuffleMask)
Decode a shuffle packed values at 128-bit granularity (SHUFF32x4/SHUFF64x2/SHUFI32x4/SHUFI64x2) immed...
void DecodePSHUFHWMask(MVT VT, unsigned Imm, SmallVectorImpl< int > &ShuffleMask)
Decodes the shuffle masks for pshufhw.
void DecodeVPERMMask(MVT VT, unsigned Imm, SmallVectorImpl< int > &ShuffleMask)
DecodeVPERMMask - this decodes the shuffle masks for VPERMQ/VPERMPD.
void DecodePSHUFBMask(ArrayRef< uint64_t > RawMask, SmallVectorImpl< int > &ShuffleMask)
Decode a PSHUFB mask from a raw array of constants such as from BUILD_VECTOR.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
std::underlying_type< E >::type Mask()
Get a bitmask with 1s in all places up to the high-order bit of E's largest value.
void DecodeMOVHLPSMask(unsigned NElts, SmallVectorImpl< int > &ShuffleMask)
Decode a MOVHLPS instruction as a v2f64/v4f32 shuffle mask.