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LLVM
4.0.0
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#include "AArch64.h"#include "AArch64CallLowering.h"#include "AArch64InstructionSelector.h"#include "AArch64LegalizerInfo.h"#include "AArch64RegisterBankInfo.h"#include "AArch64Subtarget.h"#include "AArch64TargetMachine.h"#include "AArch64TargetObjectFile.h"#include "AArch64TargetTransformInfo.h"#include "MCTargetDesc/AArch64MCTargetDesc.h"#include "llvm/ADT/STLExtras.h"#include "llvm/ADT/Triple.h"#include "llvm/Analysis/TargetTransformInfo.h"#include "llvm/CodeGen/GlobalISel/GISelAccessor.h"#include "llvm/CodeGen/GlobalISel/IRTranslator.h"#include "llvm/CodeGen/GlobalISel/InstructionSelect.h"#include "llvm/CodeGen/GlobalISel/Legalizer.h"#include "llvm/CodeGen/GlobalISel/RegBankSelect.h"#include "llvm/CodeGen/MachineScheduler.h"#include "llvm/CodeGen/Passes.h"#include "llvm/CodeGen/TargetPassConfig.h"#include "llvm/IR/Attributes.h"#include "llvm/IR/Function.h"#include "llvm/MC/MCTargetOptions.h"#include "llvm/Pass.h"#include "llvm/Support/CodeGen.h"#include "llvm/Support/CommandLine.h"#include "llvm/Support/TargetRegistry.h"#include "llvm/Target/TargetLoweringObjectFile.h"#include "llvm/Target/TargetOptions.h"#include "llvm/Transforms/Scalar.h"#include <memory>#include <string>Go to the source code of this file.
Functions | |
| void | LLVMInitializeAArch64Target () |
| static std::unique_ptr < TargetLoweringObjectFile > | createTLOF (const Triple &TT) |
| static std::string | computeDataLayout (const Triple &TT, const MCTargetOptions &Options, bool LittleEndian) |
| static Reloc::Model | getEffectiveRelocModel (const Triple &TT, Optional< Reloc::Model > RM) |
Variables | |
| static cl::opt< bool > | EnableCCMP ("aarch64-enable-ccmp", cl::desc("Enable the CCMP formation pass"), cl::init(true), cl::Hidden) |
| static cl::opt< bool > | EnableMCR ("aarch64-enable-mcr", cl::desc("Enable the machine combiner pass"), cl::init(true), cl::Hidden) |
| static cl::opt< bool > | EnableStPairSuppress ("aarch64-enable-stp-suppress", cl::desc("Suppress STP for AArch64"), cl::init(true), cl::Hidden) |
| static cl::opt< bool > | EnableAdvSIMDScalar ("aarch64-enable-simd-scalar", cl::desc("Enable use of AdvSIMD scalar integer instructions"), cl::init(false), cl::Hidden) |
| static cl::opt< bool > | EnablePromoteConstant ("aarch64-enable-promote-const", cl::desc("Enable the promote constant pass"), cl::init(true), cl::Hidden) |
| static cl::opt< bool > | EnableCollectLOH ("aarch64-enable-collect-loh", cl::desc("Enable the pass that emits the linker optimization hints (LOH)"), cl::init(true), cl::Hidden) |
| static cl::opt< bool > | EnableDeadRegisterElimination ("aarch64-enable-dead-defs", cl::Hidden, cl::desc("Enable the pass that removes dead"" definitons and replaces stores to"" them with stores to the zero"" register"), cl::init(true)) |
| static cl::opt< bool > | EnableRedundantCopyElimination ("aarch64-enable-copyelim", cl::desc("Enable the redundant copy elimination pass"), cl::init(true), cl::Hidden) |
| static cl::opt< bool > | EnableLoadStoreOpt ("aarch64-enable-ldst-opt", cl::desc("Enable the load/store pair"" optimization pass"), cl::init(true), cl::Hidden) |
| static cl::opt< bool > | EnableAtomicTidy ("aarch64-enable-atomic-cfg-tidy", cl::Hidden, cl::desc("Run SimplifyCFG after expanding atomic operations"" to make use of cmpxchg flow-based information"), cl::init(true)) |
| static cl::opt< bool > | EnableEarlyIfConversion ("aarch64-enable-early-ifcvt", cl::Hidden, cl::desc("Run early if-conversion"), cl::init(true)) |
| static cl::opt< bool > | EnableCondOpt ("aarch64-enable-condopt", cl::desc("Enable the condition optimizer pass"), cl::init(true), cl::Hidden) |
| static cl::opt< bool > | EnableA53Fix835769 ("aarch64-fix-cortex-a53-835769", cl::Hidden, cl::desc("Work around Cortex-A53 erratum 835769"), cl::init(false)) |
| static cl::opt< bool > | EnableAddressTypePromotion ("aarch64-enable-type-promotion", cl::Hidden, cl::desc("Enable the type promotion pass"), cl::init(true)) |
| static cl::opt< bool > | EnableGEPOpt ("aarch64-enable-gep-opt", cl::Hidden, cl::desc("Enable optimizations on complex GEPs"), cl::init(false)) |
| static cl::opt< bool > | BranchRelaxation ("aarch64-enable-branch-relax", cl::Hidden, cl::init(true), cl::desc("Relax out of range conditional branches")) |
| static cl::opt< cl::boolOrDefault > | EnableGlobalMerge ("aarch64-enable-global-merge", cl::Hidden, cl::desc("Enable the global merge pass")) |
| static cl::opt< bool > | EnableLoopDataPrefetch ("aarch64-enable-loop-data-prefetch", cl::Hidden, cl::desc("Enable the loop data prefetch pass"), cl::init(true)) |
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Definition at line 174 of file AArch64TargetMachine.cpp.
References llvm::MCTargetOptions::getABIName(), and llvm::Triple::isOSBinFormatMachO().
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Definition at line 166 of file AArch64TargetMachine.cpp.
References llvm::Triple::isOSBinFormatMachO().
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Definition at line 186 of file AArch64TargetMachine.cpp.
References llvm::Reloc::DynamicNoPIC, llvm::Optional< T >::hasValue(), llvm::Triple::isOSDarwin(), llvm::Reloc::PIC_, llvm::NVPTX::PTXCvtMode::RM, and llvm::Reloc::Static.
| void LLVMInitializeAArch64Target | ( | ) |
Definition at line 139 of file AArch64TargetMachine.cpp.
References llvm::PassRegistry::getPassRegistry(), llvm::getTheAArch64beTarget(), llvm::getTheAArch64leTarget(), llvm::getTheARM64Target(), llvm::initializeAArch64A53Fix835769Pass(), llvm::initializeAArch64A57FPLoadBalancingPass(), llvm::initializeAArch64AddressTypePromotionPass(), llvm::initializeAArch64AdvSIMDScalarPass(), llvm::initializeAArch64CollectLOHPass(), llvm::initializeAArch64ConditionalComparesPass(), llvm::initializeAArch64ConditionOptimizerPass(), llvm::initializeAArch64DeadRegisterDefinitionsPass(), llvm::initializeAArch64ExpandPseudoPass(), llvm::initializeAArch64LoadStoreOptPass(), llvm::initializeAArch64PromoteConstantPass(), llvm::initializeAArch64RedundantCopyEliminationPass(), llvm::initializeAArch64StorePairSuppressPass(), llvm::initializeAArch64VectorByElementOptPass(), llvm::initializeGlobalISel(), llvm::initializeLDTLSCleanupPass(), X, and Y.
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1.8.6