10 #ifndef LLVM_LIB_TARGET_ARM_ARMASMBACKEND_H
11 #define LLVM_LIB_TARGET_ARM_ARMASMBACKEND_H
29 IsLittleEndian(IsLittle) {}
46 bool &IsResolved)
override;
50 bool IsResolved)
const;
53 uint64_t
Value,
bool IsPCRel)
const override;
60 uint64_t
Value)
const;
67 MCInst &Res)
const override;
74 bool isThumb()
const {
return isThumbMode; }
76 bool isLittle()
const {
return IsLittleEndian; }
unsigned getNumFixupKinds() const override
Get the number of target specific fixup kinds.
This represents an "assembler immediate".
const char * reasonForFixupRelaxation(const MCFixup &Fixup, uint64_t Value) const
unsigned getRelaxedOpcode(unsigned Op) const
Defines the object file and target independent interfaces used by the assembler backend to write nati...
Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...
unsigned adjustFixupValue(const MCFixup &Fixup, uint64_t Value, bool IsPCRel, MCContext *Ctx, bool IsLittleEndian, bool IsResolved) const
StringRef getArchName(unsigned ArchKind)
~ARMAsmBackend() override
Encapsulates the layout of an assembly file at a particular point in time.
bool mayNeedRelaxation(const MCInst &Inst) const override
Check whether the given instruction may need relaxation.
Context object for machine code objects.
void processFixupValue(const MCAssembler &Asm, const MCAsmLayout &Layout, const MCFixup &Fixup, const MCFragment *DF, const MCValue &Target, uint64_t &Value, bool &IsResolved) override
processFixupValue - Target hook to process the literal value of a fixup if necessary.
Instances of this class represent a single low-level machine instruction.
Flag
These should be considered private to the implementation of the MCInstrDesc class.
A relaxable fragment holds on to its MCInst, since it may need to be relaxed during the assembler lay...
unsigned getPointerSize() const
bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value, const MCRelaxableFragment *DF, const MCAsmLayout &Layout) const override
Simple predicate for targets where !Resolved implies requiring relaxation.
MCFixupKind
Extensible enumeration to represent the type of a fixup.
ARMAsmBackend(const Target &T, const Triple &TT, bool IsLittle)
const MCFixupKindInfo & getFixupKindInfo(MCFixupKind Kind) const override
Get information on a fixup kind.
MCSubtargetInfo * createARMMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS)
Create a ARM MCSubtargetInfo instance.
Triple - Helper class for working with autoconf configuration names.
void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize, uint64_t Value, bool IsPCRel) const override
Apply the Value for given Fixup into the provided data fragment, at the offset specified by the fixup...
bool writeNopData(uint64_t Count, MCObjectWriter *OW) const override
Write an (optimal) nop sequence of Count bytes to the given output.
void relaxInstruction(const MCInst &Inst, const MCSubtargetInfo &STI, MCInst &Res) const override
Relax the instruction in the given fragment to the next wider instruction.
const FeatureBitset & getFeatureBits() const
getFeatureBits - Return the feature bits.
Target - Wrapper for Target specific information.
void handleAssemblerFlag(MCAssemblerFlag Flag) override
Handle any target-specific assembler flags. By default, do nothing.
static bool startswith(StringRef Magic, const char(&S)[N])
MCSubtargetInfo - Generic base class for all target subtargets.
Target independent information on a fixup kind.
LLVM Value Representation.
Generic interface to target specific assembler backends.