LLVM  4.0.0
Macros | Functions
AtomicExpandPass.cpp File Reference
#include "llvm/CodeGen/AtomicExpandUtils.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/IR/Function.h"
#include "llvm/IR/IRBuilder.h"
#include "llvm/IR/InstIterator.h"
#include "llvm/IR/Instructions.h"
#include "llvm/IR/Intrinsics.h"
#include "llvm/IR/Module.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetLowering.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetSubtargetInfo.h"
Include dependency graph for AtomicExpandPass.cpp:

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Macros

#define DEBUG_TYPE   "atomic-expand"
 

Functions

 INITIALIZE_TM_PASS (AtomicExpand,"atomic-expand","Expand Atomic instructions", false, false) FunctionPass *llvm
 
static void createCmpXchgInstFun (IRBuilder<> &Builder, Value *Addr, Value *Loaded, Value *NewVal, AtomicOrdering MemOpOrder, Value *&Success, Value *&NewLoaded)
 
static ValueperformAtomicOp (AtomicRMWInst::BinOp Op, IRBuilder<> &Builder, Value *Loaded, Value *Inc)
 Emit IR to implement the given atomicrmw operation on values in registers, returning the new value. More...
 
static PartwordMaskValues createMaskInstrs (IRBuilder<> &Builder, Instruction *I, Type *ValueType, Value *Addr, unsigned WordSize)
 This is a helper function which builds instructions to provide values necessary for partword atomic operations. More...
 
static ValueperformMaskedAtomicOp (AtomicRMWInst::BinOp Op, IRBuilder<> &Builder, Value *Loaded, Value *Shifted_Inc, Value *Inc, const PartwordMaskValues &PMV)
 Emit IR to implement a masked version of a given atomicrmw operation. More...
 
static bool canUseSizedAtomicCall (unsigned Size, unsigned Align, const DataLayout &DL)
 
static ArrayRef< RTLIB::LibcallGetRMWLibcall (AtomicRMWInst::BinOp Op)
 

Macro Definition Documentation

#define DEBUG_TYPE   "atomic-expand"

Definition at line 34 of file AtomicExpandPass.cpp.

Function Documentation

static bool canUseSizedAtomicCall ( unsigned  Size,
unsigned  Align,
const DataLayout DL 
)
static
static void createCmpXchgInstFun ( IRBuilder<> &  Builder,
Value Addr,
Value Loaded,
Value NewVal,
AtomicOrdering  MemOpOrder,
Value *&  Success,
Value *&  NewLoaded 
)
static
static PartwordMaskValues createMaskInstrs ( IRBuilder<> &  Builder,
Instruction I,
Type ValueType,
Value Addr,
unsigned  WordSize 
)
static

This is a helper function which builds instructions to provide values necessary for partword atomic operations.

It takes an incoming address, Addr, and ValueType, and constructs the address, shift-amounts and masks needed to work with a larger value of size WordSize.

AlignedAddr: Addr rounded down to a multiple of WordSize

ShiftAmt: Number of bits to right-shift a WordSize value loaded from AlignAddr for it to have the same value as if ValueType was loaded from Addr.

Mask: Value to mask with the value loaded from AlignAddr to include only the part that would've been loaded from Addr.

Inv_Mask: The inverse of Mask.

Definition at line 591 of file AtomicExpandPass.cpp.

References assert(), llvm::IRBuilder< T, Inserter >::CreateAnd(), llvm::IRBuilder< T, Inserter >::CreateIntToPtr(), llvm::IRBuilder< T, Inserter >::CreateNot(), llvm::IRBuilder< T, Inserter >::CreatePtrToInt(), llvm::IRBuilder< T, Inserter >::CreateShl(), llvm::IRBuilder< T, Inserter >::CreateTrunc(), llvm::IRBuilder< T, Inserter >::CreateXor(), llvm::ConstantInt::get(), llvm::Function::getContext(), llvm::Module::getDataLayout(), llvm::Type::getIntNTy(), llvm::DataLayout::getIntPtrType(), llvm::Instruction::getModule(), llvm::Instruction::getParent(), llvm::BasicBlock::getParent(), llvm::Type::getPointerAddressSpace(), llvm::Value::getType(), llvm::DataLayout::getTypeStoreSize(), llvm::DataLayout::isLittleEndian(), and llvm::MipsISD::Ret.

static ArrayRef<RTLIB::Libcall> GetRMWLibcall ( AtomicRMWInst::BinOp  Op)
static

Definition at line 1355 of file AtomicExpandPass.cpp.

References llvm::AtomicRMWInst::Add, llvm::AtomicRMWInst::And, llvm::RTLIB::ATOMIC_EXCHANGE, llvm::RTLIB::ATOMIC_EXCHANGE_1, llvm::RTLIB::ATOMIC_EXCHANGE_16, llvm::RTLIB::ATOMIC_EXCHANGE_2, llvm::RTLIB::ATOMIC_EXCHANGE_4, llvm::RTLIB::ATOMIC_EXCHANGE_8, llvm::RTLIB::ATOMIC_FETCH_ADD_1, llvm::RTLIB::ATOMIC_FETCH_ADD_16, llvm::RTLIB::ATOMIC_FETCH_ADD_2, llvm::RTLIB::ATOMIC_FETCH_ADD_4, llvm::RTLIB::ATOMIC_FETCH_ADD_8, llvm::RTLIB::ATOMIC_FETCH_AND_1, llvm::RTLIB::ATOMIC_FETCH_AND_16, llvm::RTLIB::ATOMIC_FETCH_AND_2, llvm::RTLIB::ATOMIC_FETCH_AND_4, llvm::RTLIB::ATOMIC_FETCH_AND_8, llvm::RTLIB::ATOMIC_FETCH_NAND_1, llvm::RTLIB::ATOMIC_FETCH_NAND_16, llvm::RTLIB::ATOMIC_FETCH_NAND_2, llvm::RTLIB::ATOMIC_FETCH_NAND_4, llvm::RTLIB::ATOMIC_FETCH_NAND_8, llvm::RTLIB::ATOMIC_FETCH_OR_1, llvm::RTLIB::ATOMIC_FETCH_OR_16, llvm::RTLIB::ATOMIC_FETCH_OR_2, llvm::RTLIB::ATOMIC_FETCH_OR_4, llvm::RTLIB::ATOMIC_FETCH_OR_8, llvm::RTLIB::ATOMIC_FETCH_SUB_1, llvm::RTLIB::ATOMIC_FETCH_SUB_16, llvm::RTLIB::ATOMIC_FETCH_SUB_2, llvm::RTLIB::ATOMIC_FETCH_SUB_4, llvm::RTLIB::ATOMIC_FETCH_SUB_8, llvm::RTLIB::ATOMIC_FETCH_XOR_1, llvm::RTLIB::ATOMIC_FETCH_XOR_16, llvm::RTLIB::ATOMIC_FETCH_XOR_2, llvm::RTLIB::ATOMIC_FETCH_XOR_4, llvm::RTLIB::ATOMIC_FETCH_XOR_8, llvm::AtomicRMWInst::BAD_BINOP, llvm_unreachable, llvm::makeArrayRef(), llvm::AtomicRMWInst::Max, llvm::AtomicRMWInst::Min, llvm::AtomicRMWInst::Nand, llvm::AtomicRMWInst::Or, llvm::AtomicRMWInst::Sub, llvm::AtomicRMWInst::UMax, llvm::AtomicRMWInst::UMin, llvm::RTLIB::UNKNOWN_LIBCALL, llvm::AtomicRMWInst::Xchg, and llvm::AtomicRMWInst::Xor.

INITIALIZE_TM_PASS ( AtomicExpand  ,
"atomic-expand ,
"Expand Atomic instructions ,
false  ,
false   
)

Definition at line 101 of file AtomicExpandPass.cpp.

static Value* performAtomicOp ( AtomicRMWInst::BinOp  Op,
IRBuilder<> &  Builder,
Value Loaded,
Value Inc 
)
static
static Value* performMaskedAtomicOp ( AtomicRMWInst::BinOp  Op,
IRBuilder<> &  Builder,
Value Loaded,
Value Shifted_Inc,
Value Inc,
const PartwordMaskValues &  PMV 
)
static