LLVM  4.0.0
Public Member Functions | List of all members
llvm::PPCRegisterInfo Class Reference

#include <PPCRegisterInfo.h>

Inheritance diagram for llvm::PPCRegisterInfo:
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Collaboration diagram for llvm::PPCRegisterInfo:
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Public Member Functions

 PPCRegisterInfo (const PPCTargetMachine &TM)
 
const TargetRegisterClassgetPointerRegClass (const MachineFunction &MF, unsigned Kind=0) const override
 getPointerRegClass - Return the register class to use to hold pointers. More...
 
unsigned getRegPressureLimit (const TargetRegisterClass *RC, MachineFunction &MF) const override
 
const TargetRegisterClassgetLargestLegalSuperClass (const TargetRegisterClass *RC, const MachineFunction &MF) const override
 
const MCPhysReggetCalleeSavedRegs (const MachineFunction *MF) const override
 Code Generation virtual methods... More...
 
const MCPhysReggetCalleeSavedRegsViaCopy (const MachineFunction *MF) const
 
const uint32_tgetCallPreservedMask (const MachineFunction &MF, CallingConv::ID CC) const override
 
const uint32_tgetNoPreservedMask () const override
 
void adjustStackMapLiveOutMask (uint32_t *Mask) const override
 
BitVector getReservedRegs (const MachineFunction &MF) const override
 
bool requiresRegisterScavenging (const MachineFunction &MF) const override
 We require the register scavenger. More...
 
bool requiresFrameIndexScavenging (const MachineFunction &MF) const override
 
bool trackLivenessAfterRegAlloc (const MachineFunction &MF) const override
 
bool requiresVirtualBaseRegisters (const MachineFunction &MF) const override
 
void lowerDynamicAlloc (MachineBasicBlock::iterator II) const
 lowerDynamicAlloc - Generate the code for allocating an object in the current frame. More...
 
void lowerDynamicAreaOffset (MachineBasicBlock::iterator II) const
 
void lowerCRSpilling (MachineBasicBlock::iterator II, unsigned FrameIndex) const
 lowerCRSpilling - Generate the code for spilling a CR register. More...
 
void lowerCRRestore (MachineBasicBlock::iterator II, unsigned FrameIndex) const
 
void lowerCRBitSpilling (MachineBasicBlock::iterator II, unsigned FrameIndex) const
 
void lowerCRBitRestore (MachineBasicBlock::iterator II, unsigned FrameIndex) const
 
void lowerVRSAVESpilling (MachineBasicBlock::iterator II, unsigned FrameIndex) const
 
void lowerVRSAVERestore (MachineBasicBlock::iterator II, unsigned FrameIndex) const
 
bool hasReservedSpillSlot (const MachineFunction &MF, unsigned Reg, int &FrameIdx) const override
 
void eliminateFrameIndex (MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override
 
bool needsFrameBaseReg (MachineInstr *MI, int64_t Offset) const override
 Returns true if the instruction's frame index reference would be better served by a base register other than FP or SP. More...
 
void materializeFrameBaseRegister (MachineBasicBlock *MBB, unsigned BaseReg, int FrameIdx, int64_t Offset) const override
 Insert defining instruction(s) for BaseReg to be a pointer to FrameIdx at the beginning of the basic block. More...
 
void resolveFrameIndex (MachineInstr &MI, unsigned BaseReg, int64_t Offset) const override
 
bool isFrameOffsetLegal (const MachineInstr *MI, unsigned BaseReg, int64_t Offset) const override
 
unsigned getFrameRegister (const MachineFunction &MF) const override
 
unsigned getBaseRegister (const MachineFunction &MF) const
 
bool hasBasePointer (const MachineFunction &MF) const
 

Detailed Description

Definition at line 57 of file PPCRegisterInfo.h.

Constructor & Destructor Documentation

PPCRegisterInfo::PPCRegisterInfo ( const PPCTargetMachine TM)

Definition at line 60 of file PPCRegisterInfo.cpp.

References llvm::ARM_MB::LD.

Member Function Documentation

void PPCRegisterInfo::adjustStackMapLiveOutMask ( uint32_t Mask) const
override

Definition at line 200 of file PPCRegisterInfo.cpp.

References llvm::NVPTX::PTXCvtMode::RM.

void PPCRegisterInfo::eliminateFrameIndex ( MachineBasicBlock::iterator  II,
int  SPAdj,
unsigned  FIOperandNum,
RegScavenger RS = nullptr 
) const
override

Definition at line 786 of file PPCRegisterInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), assert(), llvm::BuildMI(), llvm::MachineOperand::ChangeToImmediate(), llvm::MachineOperand::ChangeToRegister(), llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::count(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::PPCISD::DYNALLOC, llvm::PPCISD::DYNAREAOFFSET, llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::find(), llvm::ISD::FrameIndex, llvm::DebugLoc::get(), getBaseRegister(), llvm::MachineInstr::getDebugLoc(), llvm::MachineFunction::getFrameInfo(), llvm::PPCFunctionInfo::getFramePointerSaveIndex(), getFrameRegister(), llvm::MachineFunction::getFunction(), llvm::MachineOperand::getImm(), llvm::MachineOperand::getIndex(), llvm::MachineFunction::getInfo(), llvm::PPCSubtarget::getInstrInfo(), llvm::MachineFrameInfo::getObjectOffset(), getOffsetONFromFION(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getRegInfo(), llvm::MachineFrameInfo::getStackSize(), llvm::MachineFunction::getSubtarget(), hasBasePointer(), llvm::Function::hasFnAttribute(), llvm::ISD::INLINEASM, is64Bit(), llvm::MachineInstr::isInlineAsm(), llvm::isInt< 16 >(), llvm::PPCTargetMachine::isPPC64(), llvm::RegState::Kill, lowerCRBitRestore(), lowerCRBitSpilling(), lowerCRRestore(), lowerCRSpilling(), lowerDynamicAlloc(), lowerDynamicAreaOffset(), lowerVRSAVERestore(), lowerVRSAVESpilling(), MBB, MI, Offset, llvm::MachineInstr::setDesc(), TII, and usesIXAddr().

unsigned PPCRegisterInfo::getBaseRegister ( const MachineFunction MF) const
const MCPhysReg * PPCRegisterInfo::getCalleeSavedRegs ( const MachineFunction MF) const
override
const MCPhysReg * PPCRegisterInfo::getCalleeSavedRegsViaCopy ( const MachineFunction MF) const
const uint32_t * PPCRegisterInfo::getCallPreservedMask ( const MachineFunction MF,
CallingConv::ID  CC 
) const
override
unsigned PPCRegisterInfo::getFrameRegister ( const MachineFunction MF) const
override
const TargetRegisterClass * PPCRegisterInfo::getLargestLegalSuperClass ( const TargetRegisterClass RC,
const MachineFunction MF 
) const
override
const uint32_t * PPCRegisterInfo::getNoPreservedMask ( ) const
override

Definition at line 196 of file PPCRegisterInfo.cpp.

Referenced by llvm::PPCTargetLowering::emitEHSjLjSetJmp().

const TargetRegisterClass * PPCRegisterInfo::getPointerRegClass ( const MachineFunction MF,
unsigned  Kind = 0 
) const
override

getPointerRegClass - Return the register class to use to hold pointers.

This is used for addressing modes.

Definition at line 98 of file PPCRegisterInfo.cpp.

References llvm::PPCTargetMachine::isPPC64().

unsigned PPCRegisterInfo::getRegPressureLimit ( const TargetRegisterClass RC,
MachineFunction MF 
) const
override
BitVector PPCRegisterInfo::getReservedRegs ( const MachineFunction MF) const
override
bool PPCRegisterInfo::hasBasePointer ( const MachineFunction MF) const
bool PPCRegisterInfo::hasReservedSpillSlot ( const MachineFunction MF,
unsigned  Reg,
int &  FrameIdx 
) const
override
bool PPCRegisterInfo::isFrameOffsetLegal ( const MachineInstr MI,
unsigned  BaseReg,
int64_t  Offset 
) const
override
void PPCRegisterInfo::lowerCRBitRestore ( MachineBasicBlock::iterator  II,
unsigned  FrameIndex 
) const
void PPCRegisterInfo::lowerCRBitSpilling ( MachineBasicBlock::iterator  II,
unsigned  FrameIndex 
) const
void PPCRegisterInfo::lowerCRRestore ( MachineBasicBlock::iterator  II,
unsigned  FrameIndex 
) const
void PPCRegisterInfo::lowerCRSpilling ( MachineBasicBlock::iterator  II,
unsigned  FrameIndex 
) const

lowerCRSpilling - Generate the code for spilling a CR register.

Instead of reserving a whole register (R0), we scrounge for one here. This generates code like this:

mfcr rA ; Move the conditional register into GPR rA. rlwinm rA, rA, SB, 0, 31 ; Shift the bits left so they are in CR0's slot. stw rA, FI ; Store rA to the frame.

Definition at line 500 of file PPCRegisterInfo.cpp.

References llvm::addFrameReference(), llvm::MachineInstrBuilder::addImm(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::MachineBasicBlock::erase(), llvm::ISD::FrameIndex, llvm::DebugLoc::get(), llvm::MachineInstr::getDebugLoc(), llvm::PPCSubtarget::getInstrInfo(), llvm::getKillRegState(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), llvm::MachineOperand::isKill(), llvm::PPCTargetMachine::isPPC64(), llvm::RegState::Kill, MBB, llvm::PPCISD::MFOCRF, MI, and TII.

Referenced by eliminateFrameIndex().

void PPCRegisterInfo::lowerDynamicAlloc ( MachineBasicBlock::iterator  II) const
void PPCRegisterInfo::lowerDynamicAreaOffset ( MachineBasicBlock::iterator  II) const
void PPCRegisterInfo::lowerVRSAVERestore ( MachineBasicBlock::iterator  II,
unsigned  FrameIndex 
) const
void PPCRegisterInfo::lowerVRSAVESpilling ( MachineBasicBlock::iterator  II,
unsigned  FrameIndex 
) const
void PPCRegisterInfo::materializeFrameBaseRegister ( MachineBasicBlock MBB,
unsigned  BaseReg,
int  FrameIdx,
int64_t  Offset 
) const
override
bool PPCRegisterInfo::needsFrameBaseReg ( MachineInstr MI,
int64_t  Offset 
) const
override

Returns true if the instruction's frame index reference would be better served by a base register other than FP or SP.

Used by LocalStackFrameAllocation to determine which frame index references it should create new base registers for.

Definition at line 971 of file PPCRegisterInfo.cpp.

References assert(), llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::count(), llvm::PPCFrameLowering::determineFrameLayout(), getBaseRegister(), llvm::MachineOperand::getImm(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), isFrameOffsetLegal(), and MBB.

bool llvm::PPCRegisterInfo::requiresFrameIndexScavenging ( const MachineFunction MF) const
inlineoverride

Definition at line 92 of file PPCRegisterInfo.h.

bool llvm::PPCRegisterInfo::requiresRegisterScavenging ( const MachineFunction MF) const
inlineoverride

We require the register scavenger.

Definition at line 88 of file PPCRegisterInfo.h.

bool llvm::PPCRegisterInfo::requiresVirtualBaseRegisters ( const MachineFunction MF) const
inlineoverride

Definition at line 100 of file PPCRegisterInfo.h.

void PPCRegisterInfo::resolveFrameIndex ( MachineInstr MI,
unsigned  BaseReg,
int64_t  Offset 
) const
override
bool llvm::PPCRegisterInfo::trackLivenessAfterRegAlloc ( const MachineFunction MF) const
inlineoverride

Definition at line 96 of file PPCRegisterInfo.h.


The documentation for this class was generated from the following files: