14 #ifndef LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCTARGETDESC_H
15 #define LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCTARGETDESC_H
22 struct InstrItinerary;
30 class MCSubtargetInfo;
31 class MCTargetOptions;
36 class raw_pwrite_stream;
46 const MCRegisterInfo &
MRI,
50 const MCRegisterInfo &
MRI,
51 const Triple &TT, StringRef CPU,
52 const MCTargetOptions &Options);
55 uint8_t OSABI, StringRef CPU);
57 namespace Hexagon_MC {
68 #define GET_REGINFO_ENUM
69 #include "HexagonGenRegisterInfo.inc"
73 #define GET_INSTRINFO_ENUM
74 #include "HexagonGenInstrInfo.inc"
76 #define GET_SUBTARGETINFO_ENUM
77 #include "HexagonGenSubtargetInfo.inc"
79 #endif // LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCTARGETDESC_H
StringRef selectHexagonCPU(const Triple &TT, StringRef CPU)
MCCodeEmitter * createHexagonMCCodeEmitter(const MCInstrInfo &MCII, const MCRegisterInfo &MRI, MCContext &MCT)
MCInstrInfo * createHexagonMCInstrInfo()
MCObjectWriter * createHexagonELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI, StringRef CPU)
unsigned const MachineRegisterInfo * MRI
cl::opt< bool > HexagonDisableCompound
Triple - Helper class for working with autoconf configuration names.
static const char * Target
const InstrStage HexagonStages[]
MCAsmBackend * createHexagonAsmBackend(Target const &T, MCRegisterInfo const &, const Triple &TT, StringRef CPU, const MCTargetOptions &Options)
StringRef - Represent a constant reference to a string, i.e.
Target & getTheHexagonTarget()
cl::opt< bool > HexagonDisableDuplex