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LLVM
4.0.0
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This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representation suitable for instruction selection. More...
#include <SelectionDAG.h>
Classes | |
| struct | DAGNodeDeletedListener |
| struct | DAGUpdateListener |
| Clients of various APIs that cause global effects on the DAG can optionally implement this interface. More... | |
Public Types | |
| typedef ilist< SDNode > ::const_iterator | allnodes_const_iterator |
| typedef ilist< SDNode >::iterator | allnodes_iterator |
Public Member Functions | |
| SelectionDAG (const TargetMachine &TM, llvm::CodeGenOpt::Level) | |
| ~SelectionDAG () | |
| void | init (MachineFunction &mf) |
| Prepare this SelectionDAG to process code in the given MachineFunction. More... | |
| void | clear () |
| Clear state and free memory necessary to make this SelectionDAG ready to process a new block. More... | |
| MachineFunction & | getMachineFunction () const |
| const DataLayout & | getDataLayout () const |
| const TargetMachine & | getTarget () const |
| const TargetSubtargetInfo & | getSubtarget () const |
| const TargetLowering & | getTargetLoweringInfo () const |
| const SelectionDAGTargetInfo & | getSelectionDAGInfo () const |
| LLVMContext * | getContext () const |
| void | viewGraph (const std::string &Title) |
| Pop up a GraphViz/gv window with the DAG rendered using 'dot'. More... | |
| void | viewGraph () |
| void | clearGraphAttrs () |
| Clear all previously defined node graph attributes. More... | |
| void | setGraphAttrs (const SDNode *N, const char *Attrs) |
| Set graph attributes for a node. (eg. "color=red".) More... | |
| const std::string | getGraphAttrs (const SDNode *N) const |
| Get graph attributes for a node. More... | |
| void | setGraphColor (const SDNode *N, const char *Color) |
| Convenience for setting node color attribute. More... | |
| void | setSubgraphColor (SDNode *N, const char *Color) |
| Convenience for setting subgraph color attribute. More... | |
| allnodes_const_iterator | allnodes_begin () const |
| allnodes_const_iterator | allnodes_end () const |
| allnodes_iterator | allnodes_begin () |
| allnodes_iterator | allnodes_end () |
| ilist< SDNode >::size_type | allnodes_size () const |
| iterator_range< allnodes_iterator > | allnodes () |
| iterator_range < allnodes_const_iterator > | allnodes () const |
| const SDValue & | getRoot () const |
| Return the root tag of the SelectionDAG. More... | |
| SDValue | getEntryNode () const |
| Return the token chain corresponding to the entry of the function. More... | |
| const SDValue & | setRoot (SDValue N) |
| Set the current root tag of the SelectionDAG. More... | |
| void | Combine (CombineLevel Level, AliasAnalysis &AA, CodeGenOpt::Level OptLevel) |
| This iterates over the nodes in the SelectionDAG, folding certain types of nodes together, or eliminating superfluous nodes. More... | |
| bool | LegalizeTypes () |
| This transforms the SelectionDAG into a SelectionDAG that only uses types natively supported by the target. More... | |
| void | Legalize () |
| This transforms the SelectionDAG into a SelectionDAG that is compatible with the target instruction selector, as indicated by the TargetLowering object. More... | |
| bool | LegalizeOp (SDNode *N, SmallSetVector< SDNode *, 16 > &UpdatedNodes) |
| Transforms a SelectionDAG node and any operands to it into a node that is compatible with the target instruction selector, as indicated by the TargetLowering object. More... | |
| bool | LegalizeVectors () |
| This transforms the SelectionDAG into a SelectionDAG that only uses vector math operations supported by the target. More... | |
| void | RemoveDeadNodes () |
| This method deletes all unreachable nodes in the SelectionDAG. More... | |
| void | DeleteNode (SDNode *N) |
| Remove the specified node from the system. More... | |
| SDVTList | getVTList (EVT VT) |
| Return an SDVTList that represents the list of values specified. More... | |
| SDVTList | getVTList (EVT VT1, EVT VT2) |
| SDVTList | getVTList (EVT VT1, EVT VT2, EVT VT3) |
| SDVTList | getVTList (EVT VT1, EVT VT2, EVT VT3, EVT VT4) |
| SDVTList | getVTList (ArrayRef< EVT > VTs) |
| SDValue | getGlobalAddress (const GlobalValue *GV, const SDLoc &DL, EVT VT, int64_t offset=0, bool isTargetGA=false, unsigned char TargetFlags=0) |
| SDValue | getTargetGlobalAddress (const GlobalValue *GV, const SDLoc &DL, EVT VT, int64_t offset=0, unsigned char TargetFlags=0) |
| SDValue | getFrameIndex (int FI, EVT VT, bool isTarget=false) |
| SDValue | getTargetFrameIndex (int FI, EVT VT) |
| SDValue | getJumpTable (int JTI, EVT VT, bool isTarget=false, unsigned char TargetFlags=0) |
| SDValue | getTargetJumpTable (int JTI, EVT VT, unsigned char TargetFlags=0) |
| SDValue | getConstantPool (const Constant *C, EVT VT, unsigned Align=0, int Offs=0, bool isT=false, unsigned char TargetFlags=0) |
| SDValue | getTargetConstantPool (const Constant *C, EVT VT, unsigned Align=0, int Offset=0, unsigned char TargetFlags=0) |
| SDValue | getConstantPool (MachineConstantPoolValue *C, EVT VT, unsigned Align=0, int Offs=0, bool isT=false, unsigned char TargetFlags=0) |
| SDValue | getTargetConstantPool (MachineConstantPoolValue *C, EVT VT, unsigned Align=0, int Offset=0, unsigned char TargetFlags=0) |
| SDValue | getTargetIndex (int Index, EVT VT, int64_t Offset=0, unsigned char TargetFlags=0) |
| SDValue | getBasicBlock (MachineBasicBlock *MBB) |
| SDValue | getBasicBlock (MachineBasicBlock *MBB, SDLoc dl) |
| SDValue | getExternalSymbol (const char *Sym, EVT VT) |
| SDValue | getExternalSymbol (const char *Sym, const SDLoc &dl, EVT VT) |
| SDValue | getTargetExternalSymbol (const char *Sym, EVT VT, unsigned char TargetFlags=0) |
| SDValue | getMCSymbol (MCSymbol *Sym, EVT VT) |
| SDValue | getValueType (EVT) |
| SDValue | getRegister (unsigned Reg, EVT VT) |
| SDValue | getRegisterMask (const uint32_t *RegMask) |
| SDValue | getEHLabel (const SDLoc &dl, SDValue Root, MCSymbol *Label) |
| SDValue | getBlockAddress (const BlockAddress *BA, EVT VT, int64_t Offset=0, bool isTarget=false, unsigned char TargetFlags=0) |
| SDValue | getTargetBlockAddress (const BlockAddress *BA, EVT VT, int64_t Offset=0, unsigned char TargetFlags=0) |
| SDValue | getCopyToReg (SDValue Chain, const SDLoc &dl, unsigned Reg, SDValue N) |
| SDValue | getCopyToReg (SDValue Chain, const SDLoc &dl, unsigned Reg, SDValue N, SDValue Glue) |
| SDValue | getCopyToReg (SDValue Chain, const SDLoc &dl, SDValue Reg, SDValue N, SDValue Glue) |
| SDValue | getCopyFromReg (SDValue Chain, const SDLoc &dl, unsigned Reg, EVT VT) |
| SDValue | getCopyFromReg (SDValue Chain, const SDLoc &dl, unsigned Reg, EVT VT, SDValue Glue) |
| SDValue | getCondCode (ISD::CondCode Cond) |
| SDValue | getVectorShuffle (EVT VT, const SDLoc &dl, SDValue N1, SDValue N2, ArrayRef< int > Mask) |
| Return an ISD::VECTOR_SHUFFLE node. More... | |
| SDValue | getBuildVector (EVT VT, const SDLoc &DL, ArrayRef< SDValue > Ops) |
| Return an ISD::BUILD_VECTOR node. More... | |
| SDValue | getSplatBuildVector (EVT VT, const SDLoc &DL, SDValue Op) |
| Return a splat ISD::BUILD_VECTOR node, consisting of Op splatted to all elements. More... | |
| SDValue | getCommutedVectorShuffle (const ShuffleVectorSDNode &SV) |
| Returns an ISD::VECTOR_SHUFFLE node semantically equivalent to the shuffle node in input but with swapped operands. More... | |
| SDValue | getAnyExtOrTrunc (SDValue Op, const SDLoc &DL, EVT VT) |
| Convert Op, which must be of integer type, to the integer type VT, by either any-extending or truncating it. More... | |
| SDValue | getSExtOrTrunc (SDValue Op, const SDLoc &DL, EVT VT) |
| Convert Op, which must be of integer type, to the integer type VT, by either sign-extending or truncating it. More... | |
| SDValue | getZExtOrTrunc (SDValue Op, const SDLoc &DL, EVT VT) |
| Convert Op, which must be of integer type, to the integer type VT, by either zero-extending or truncating it. More... | |
| SDValue | getZeroExtendInReg (SDValue Op, const SDLoc &DL, EVT SrcTy) |
| Return the expression required to zero extend the Op value assuming it was the smaller SrcTy value. More... | |
| SDValue | getAnyExtendVectorInReg (SDValue Op, const SDLoc &DL, EVT VT) |
| Return an operation which will any-extend the low lanes of the operand into the specified vector type. More... | |
| SDValue | getSignExtendVectorInReg (SDValue Op, const SDLoc &DL, EVT VT) |
| Return an operation which will sign extend the low lanes of the operand into the specified vector type. More... | |
| SDValue | getZeroExtendVectorInReg (SDValue Op, const SDLoc &DL, EVT VT) |
| Return an operation which will zero extend the low lanes of the operand into the specified vector type. More... | |
| SDValue | getBoolExtOrTrunc (SDValue Op, const SDLoc &SL, EVT VT, EVT OpVT) |
| Convert Op, which must be of integer type, to the integer type VT, by using an extension appropriate for the target's BooleanContent for type OpVT or truncating it. More... | |
| SDValue | getNOT (const SDLoc &DL, SDValue Val, EVT VT) |
| Create a bitwise NOT operation as (XOR Val, -1). More... | |
| SDValue | getLogicalNOT (const SDLoc &DL, SDValue Val, EVT VT) |
| Create a logical NOT operation as (XOR Val, BooleanOne). More... | |
| SDValue | getCALLSEQ_START (SDValue Chain, SDValue Op, const SDLoc &DL) |
| Return a new CALLSEQ_START node, which always must have a glue result (to ensure it's not CSE'd). More... | |
| SDValue | getCALLSEQ_END (SDValue Chain, SDValue Op1, SDValue Op2, SDValue InGlue, const SDLoc &DL) |
| Return a new CALLSEQ_END node, which always must have a glue result (to ensure it's not CSE'd). More... | |
| SDValue | getUNDEF (EVT VT) |
| Return an UNDEF node. UNDEF does not have a useful SDLoc. More... | |
| SDValue | getGLOBAL_OFFSET_TABLE (EVT VT) |
| Return a GLOBAL_OFFSET_TABLE node. This does not have a useful SDLoc. More... | |
| SDValue | getNode (unsigned Opcode, const SDLoc &DL, EVT VT, ArrayRef< SDUse > Ops) |
| Gets or creates the specified node. More... | |
| SDValue | getNode (unsigned Opcode, const SDLoc &DL, EVT VT, ArrayRef< SDValue > Ops, const SDNodeFlags *Flags=nullptr) |
| SDValue | getNode (unsigned Opcode, const SDLoc &DL, ArrayRef< EVT > ResultTys, ArrayRef< SDValue > Ops) |
| SDValue | getNode (unsigned Opcode, const SDLoc &DL, SDVTList VTs, ArrayRef< SDValue > Ops) |
| SDValue | getNode (unsigned Opcode, const SDLoc &DL, EVT VT) |
| Gets or creates the specified node. More... | |
| SDValue | getNode (unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N) |
| SDValue | getNode (unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1, SDValue N2, const SDNodeFlags *Flags=nullptr) |
| SDValue | getNode (unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1, SDValue N2, SDValue N3) |
| SDValue | getNode (unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1, SDValue N2, SDValue N3, SDValue N4) |
| SDValue | getNode (unsigned Opcode, const SDLoc &DL, EVT VT, SDValue N1, SDValue N2, SDValue N3, SDValue N4, SDValue N5) |
| SDValue | getNode (unsigned Opcode, const SDLoc &DL, SDVTList VTs) |
| SDValue | getNode (unsigned Opcode, const SDLoc &DL, SDVTList VTs, SDValue N) |
| SDValue | getNode (unsigned Opcode, const SDLoc &DL, SDVTList VTs, SDValue N1, SDValue N2) |
| SDValue | getNode (unsigned Opcode, const SDLoc &DL, SDVTList VTs, SDValue N1, SDValue N2, SDValue N3) |
| SDValue | getNode (unsigned Opcode, const SDLoc &DL, SDVTList VTs, SDValue N1, SDValue N2, SDValue N3, SDValue N4) |
| SDValue | getNode (unsigned Opcode, const SDLoc &DL, SDVTList VTs, SDValue N1, SDValue N2, SDValue N3, SDValue N4, SDValue N5) |
| SDValue | getStackArgumentTokenFactor (SDValue Chain) |
| Compute a TokenFactor to force all the incoming stack arguments to be loaded from the stack. More... | |
| SDValue | getMemcpy (SDValue Chain, const SDLoc &dl, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, bool isVol, bool AlwaysInline, bool isTailCall, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) |
| SDValue | getMemmove (SDValue Chain, const SDLoc &dl, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, bool isVol, bool isTailCall, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) |
| SDValue | getMemset (SDValue Chain, const SDLoc &dl, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, bool isVol, bool isTailCall, MachinePointerInfo DstPtrInfo) |
| SDValue | getSetCC (const SDLoc &DL, EVT VT, SDValue LHS, SDValue RHS, ISD::CondCode Cond) |
| Helper function to make it easier to build SetCC's if you just have an ISD::CondCode instead of an SDValue. More... | |
| SDValue | getSelect (const SDLoc &DL, EVT VT, SDValue Cond, SDValue LHS, SDValue RHS) |
| Helper function to make it easier to build Select's if you just have operands and don't want to check for vector. More... | |
| SDValue | getSelectCC (const SDLoc &DL, SDValue LHS, SDValue RHS, SDValue True, SDValue False, ISD::CondCode Cond) |
| Helper function to make it easier to build SelectCC's if you just have an ISD::CondCode instead of an SDValue. More... | |
| SDValue | getVAArg (EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr, SDValue SV, unsigned Align) |
| VAArg produces a result and token chain, and takes a pointer and a source value as input. More... | |
| SDValue | getAtomicCmpSwap (unsigned Opcode, const SDLoc &dl, EVT MemVT, SDVTList VTs, SDValue Chain, SDValue Ptr, SDValue Cmp, SDValue Swp, MachinePointerInfo PtrInfo, unsigned Alignment, AtomicOrdering SuccessOrdering, AtomicOrdering FailureOrdering, SynchronizationScope SynchScope) |
| Gets a node for an atomic cmpxchg op. More... | |
| SDValue | getAtomicCmpSwap (unsigned Opcode, const SDLoc &dl, EVT MemVT, SDVTList VTs, SDValue Chain, SDValue Ptr, SDValue Cmp, SDValue Swp, MachineMemOperand *MMO) |
| SDValue | getAtomic (unsigned Opcode, const SDLoc &dl, EVT MemVT, SDValue Chain, SDValue Ptr, SDValue Val, const Value *PtrVal, unsigned Alignment, AtomicOrdering Ordering, SynchronizationScope SynchScope) |
| Gets a node for an atomic op, produces result (if relevant) and chain and takes 2 operands. More... | |
| SDValue | getAtomic (unsigned Opcode, const SDLoc &dl, EVT MemVT, SDValue Chain, SDValue Ptr, SDValue Val, MachineMemOperand *MMO) |
| SDValue | getAtomic (unsigned Opcode, const SDLoc &dl, EVT MemVT, EVT VT, SDValue Chain, SDValue Ptr, MachineMemOperand *MMO) |
| Gets a node for an atomic op, produces result and chain and takes 1 operand. More... | |
| SDValue | getAtomic (unsigned Opcode, const SDLoc &dl, EVT MemVT, SDVTList VTList, ArrayRef< SDValue > Ops, MachineMemOperand *MMO) |
| Gets a node for an atomic op, produces result and chain and takes N operands. More... | |
| SDValue | getMemIntrinsicNode (unsigned Opcode, const SDLoc &dl, SDVTList VTList, ArrayRef< SDValue > Ops, EVT MemVT, MachinePointerInfo PtrInfo, unsigned Align=0, bool Vol=false, bool ReadMem=true, bool WriteMem=true, unsigned Size=0) |
| Creates a MemIntrinsicNode that may produce a result and takes a list of operands. More... | |
| SDValue | getMemIntrinsicNode (unsigned Opcode, const SDLoc &dl, SDVTList VTList, ArrayRef< SDValue > Ops, EVT MemVT, MachineMemOperand *MMO) |
| SDValue | getMergeValues (ArrayRef< SDValue > Ops, const SDLoc &dl) |
| Create a MERGE_VALUES node from the given operands. More... | |
| SDValue | getLoad (EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr, MachinePointerInfo PtrInfo, unsigned Alignment=0, MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr) |
| Loads are not normal binary operators: their result type is not determined by their operands, and they produce a value AND a token chain. More... | |
| SDValue | getLoad (EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr, MachineMemOperand *MMO) |
| SDValue | getExtLoad (ISD::LoadExtType ExtType, const SDLoc &dl, EVT VT, SDValue Chain, SDValue Ptr, MachinePointerInfo PtrInfo, EVT MemVT, unsigned Alignment=0, MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const AAMDNodes &AAInfo=AAMDNodes()) |
| SDValue | getExtLoad (ISD::LoadExtType ExtType, const SDLoc &dl, EVT VT, SDValue Chain, SDValue Ptr, EVT MemVT, MachineMemOperand *MMO) |
| SDValue | getIndexedLoad (SDValue OrigLoad, const SDLoc &dl, SDValue Base, SDValue Offset, ISD::MemIndexedMode AM) |
| SDValue | getLoad (ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr, SDValue Offset, MachinePointerInfo PtrInfo, EVT MemVT, unsigned Alignment=0, MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr) |
| SDValue | getLoad (ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr, SDValue Offset, EVT MemVT, MachineMemOperand *MMO) |
| SDValue | getStore (SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr, MachinePointerInfo PtrInfo, unsigned Alignment=0, MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const AAMDNodes &AAInfo=AAMDNodes()) |
| Helper function to build ISD::STORE nodes. More... | |
| SDValue | getStore (SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr, MachineMemOperand *MMO) |
| SDValue | getTruncStore (SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr, MachinePointerInfo PtrInfo, EVT TVT, unsigned Alignment=0, MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const AAMDNodes &AAInfo=AAMDNodes()) |
| SDValue | getTruncStore (SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr, EVT TVT, MachineMemOperand *MMO) |
| SDValue | getIndexedStore (SDValue OrigStoe, const SDLoc &dl, SDValue Base, SDValue Offset, ISD::MemIndexedMode AM) |
| SDValue | getMemBasePlusOffset (SDValue Base, unsigned Offset, const SDLoc &DL) |
| Returns sum of the base pointer and offset. More... | |
| SDValue | getMaskedLoad (EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr, SDValue Mask, SDValue Src0, EVT MemVT, MachineMemOperand *MMO, ISD::LoadExtType, bool IsExpanding=false) |
| SDValue | getMaskedStore (SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr, SDValue Mask, EVT MemVT, MachineMemOperand *MMO, bool IsTruncating=false, bool IsCompressing=false) |
| SDValue | getMaskedGather (SDVTList VTs, EVT VT, const SDLoc &dl, ArrayRef< SDValue > Ops, MachineMemOperand *MMO) |
| SDValue | getMaskedScatter (SDVTList VTs, EVT VT, const SDLoc &dl, ArrayRef< SDValue > Ops, MachineMemOperand *MMO) |
| template<class TargetMemSDNode > | |
| SDValue | getTargetMemSDNode (SDVTList VTs, ArrayRef< SDValue > Ops, const SDLoc &dl, EVT MemVT, MachineMemOperand *MMO) |
| Return (create a new or find existing) a target-specific node. More... | |
| SDValue | getSrcValue (const Value *v) |
| Construct a node to track a Value* through the backend. More... | |
| SDValue | getMDNode (const MDNode *MD) |
| Return an MDNodeSDNode which holds an MDNode. More... | |
| SDValue | getBitcast (EVT VT, SDValue V) |
| Return a bitcast using the SDLoc of the value operand, and casting to the provided type. More... | |
| SDValue | getAddrSpaceCast (const SDLoc &dl, EVT VT, SDValue Ptr, unsigned SrcAS, unsigned DestAS) |
| Return an AddrSpaceCastSDNode. More... | |
| SDValue | getShiftAmountOperand (EVT LHSTy, SDValue Op) |
| Return the specified value casted to the target's desired shift amount type. More... | |
| SDValue | expandVAArg (SDNode *Node) |
Expand the specified ISD::VAARG node as the Legalize pass would. More... | |
| SDValue | expandVACopy (SDNode *Node) |
Expand the specified ISD::VACOPY node as the Legalize pass would. More... | |
| SDNode * | UpdateNodeOperands (SDNode *N, SDValue Op) |
| Mutate the specified node in-place to have the specified operands. More... | |
| SDNode * | UpdateNodeOperands (SDNode *N, SDValue Op1, SDValue Op2) |
| SDNode * | UpdateNodeOperands (SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) |
| SDNode * | UpdateNodeOperands (SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3, SDValue Op4) |
| SDNode * | UpdateNodeOperands (SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3, SDValue Op4, SDValue Op5) |
| SDNode * | UpdateNodeOperands (SDNode *N, ArrayRef< SDValue > Ops) |
| SDNode * | SelectNodeTo (SDNode *N, unsigned TargetOpc, EVT VT) |
| These are used for target selectors to mutate the specified node to have the specified return type, Target opcode, and operands. More... | |
| SDNode * | SelectNodeTo (SDNode *N, unsigned TargetOpc, EVT VT, SDValue Op1) |
| SDNode * | SelectNodeTo (SDNode *N, unsigned TargetOpc, EVT VT, SDValue Op1, SDValue Op2) |
| SDNode * | SelectNodeTo (SDNode *N, unsigned TargetOpc, EVT VT, SDValue Op1, SDValue Op2, SDValue Op3) |
| SDNode * | SelectNodeTo (SDNode *N, unsigned TargetOpc, EVT VT, ArrayRef< SDValue > Ops) |
| SDNode * | SelectNodeTo (SDNode *N, unsigned TargetOpc, EVT VT1, EVT VT2) |
| SDNode * | SelectNodeTo (SDNode *N, unsigned TargetOpc, EVT VT1, EVT VT2, ArrayRef< SDValue > Ops) |
| SDNode * | SelectNodeTo (SDNode *N, unsigned TargetOpc, EVT VT1, EVT VT2, EVT VT3, ArrayRef< SDValue > Ops) |
| SDNode * | SelectNodeTo (SDNode *N, unsigned TargetOpc, EVT VT1, EVT VT2, SDValue Op1) |
| SDNode * | SelectNodeTo (SDNode *N, unsigned TargetOpc, EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) |
| SDNode * | SelectNodeTo (SDNode *N, unsigned TargetOpc, SDVTList VTs, ArrayRef< SDValue > Ops) |
| SDNode * | MorphNodeTo (SDNode *N, unsigned Opc, SDVTList VTs, ArrayRef< SDValue > Ops) |
| This mutates the specified node to have the specified return type, opcode, and operands. More... | |
| MachineSDNode * | getMachineNode (unsigned Opcode, const SDLoc &dl, EVT VT) |
| These are used for target selectors to create a new node with specified return type(s), MachineInstr opcode, and operands. More... | |
| MachineSDNode * | getMachineNode (unsigned Opcode, const SDLoc &dl, EVT VT, SDValue Op1) |
| MachineSDNode * | getMachineNode (unsigned Opcode, const SDLoc &dl, EVT VT, SDValue Op1, SDValue Op2) |
| MachineSDNode * | getMachineNode (unsigned Opcode, const SDLoc &dl, EVT VT, SDValue Op1, SDValue Op2, SDValue Op3) |
| MachineSDNode * | getMachineNode (unsigned Opcode, const SDLoc &dl, EVT VT, ArrayRef< SDValue > Ops) |
| MachineSDNode * | getMachineNode (unsigned Opcode, const SDLoc &dl, EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) |
| MachineSDNode * | getMachineNode (unsigned Opcode, const SDLoc &dl, EVT VT1, EVT VT2, SDValue Op1, SDValue Op2, SDValue Op3) |
| MachineSDNode * | getMachineNode (unsigned Opcode, const SDLoc &dl, EVT VT1, EVT VT2, ArrayRef< SDValue > Ops) |
| MachineSDNode * | getMachineNode (unsigned Opcode, const SDLoc &dl, EVT VT1, EVT VT2, EVT VT3, SDValue Op1, SDValue Op2) |
| MachineSDNode * | getMachineNode (unsigned Opcode, const SDLoc &dl, EVT VT1, EVT VT2, EVT VT3, SDValue Op1, SDValue Op2, SDValue Op3) |
| MachineSDNode * | getMachineNode (unsigned Opcode, const SDLoc &dl, EVT VT1, EVT VT2, EVT VT3, ArrayRef< SDValue > Ops) |
| MachineSDNode * | getMachineNode (unsigned Opcode, const SDLoc &dl, ArrayRef< EVT > ResultTys, ArrayRef< SDValue > Ops) |
| MachineSDNode * | getMachineNode (unsigned Opcode, const SDLoc &dl, SDVTList VTs, ArrayRef< SDValue > Ops) |
| SDValue | getTargetExtractSubreg (int SRIdx, const SDLoc &DL, EVT VT, SDValue Operand) |
| A convenience function for creating TargetInstrInfo::EXTRACT_SUBREG nodes. More... | |
| SDValue | getTargetInsertSubreg (int SRIdx, const SDLoc &DL, EVT VT, SDValue Operand, SDValue Subreg) |
| A convenience function for creating TargetInstrInfo::INSERT_SUBREG nodes. More... | |
| SDNode * | getNodeIfExists (unsigned Opcode, SDVTList VTs, ArrayRef< SDValue > Ops, const SDNodeFlags *Flags=nullptr) |
| Get the specified node if it's already available, or else return NULL. More... | |
| SDDbgValue * | getDbgValue (MDNode *Var, MDNode *Expr, SDNode *N, unsigned R, bool IsIndirect, uint64_t Off, const DebugLoc &DL, unsigned O) |
| Creates a SDDbgValue node. More... | |
| SDDbgValue * | getConstantDbgValue (MDNode *Var, MDNode *Expr, const Value *C, uint64_t Off, const DebugLoc &DL, unsigned O) |
| Constant. More... | |
| SDDbgValue * | getFrameIndexDbgValue (MDNode *Var, MDNode *Expr, unsigned FI, uint64_t Off, const DebugLoc &DL, unsigned O) |
| FrameIndex. More... | |
| void | RemoveDeadNode (SDNode *N) |
| Remove the specified node from the system. More... | |
| void | RemoveDeadNodes (SmallVectorImpl< SDNode * > &DeadNodes) |
| This method deletes the unreachable nodes in the given list, and any nodes that become unreachable as a result. More... | |
| void | ReplaceAllUsesWith (SDValue From, SDValue Op) |
| Modify anything using 'From' to use 'To' instead. More... | |
| void | ReplaceAllUsesWith (SDNode *From, SDNode *To) |
| ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. More... | |
| void | ReplaceAllUsesWith (SDNode *From, const SDValue *To) |
| ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead. More... | |
| void | ReplaceAllUsesOfValueWith (SDValue From, SDValue To) |
| Replace any uses of From with To, leaving uses of other values produced by From.Val alone. More... | |
| void | ReplaceAllUsesOfValuesWith (const SDValue *From, const SDValue *To, unsigned Num) |
| Like ReplaceAllUsesOfValueWith, but for multiple values at once. More... | |
| unsigned | AssignTopologicalOrder () |
| Topological-sort the AllNodes list and a assign a unique node id for each node in the DAG based on their topological order. More... | |
| void | RepositionNode (allnodes_iterator Position, SDNode *N) |
| Move node N in the AllNodes list to be immediately before the given iterator Position. More... | |
| void | AddDbgValue (SDDbgValue *DB, SDNode *SD, bool isParameter) |
| Add a dbg_value SDNode. More... | |
| ArrayRef< SDDbgValue * > | GetDbgValues (const SDNode *SD) |
| Get the debug values which reference the given SDNode. More... | |
| bool | hasDebugValues () const |
| Return true if there are any SDDbgValue nodes associated with this SelectionDAG. More... | |
| SDDbgInfo::DbgIterator | DbgBegin () |
| SDDbgInfo::DbgIterator | DbgEnd () |
| SDDbgInfo::DbgIterator | ByvalParmDbgBegin () |
| SDDbgInfo::DbgIterator | ByvalParmDbgEnd () |
| void | dump () const |
| SDValue | CreateStackTemporary (EVT VT, unsigned minAlign=1) |
| Create a stack temporary, suitable for holding the specified value type. More... | |
| SDValue | CreateStackTemporary (EVT VT1, EVT VT2) |
| Create a stack temporary suitable for holding either of the specified value types. More... | |
| SDValue | FoldSymbolOffset (unsigned Opcode, EVT VT, const GlobalAddressSDNode *GA, const SDNode *N2) |
| SDValue | FoldConstantArithmetic (unsigned Opcode, const SDLoc &DL, EVT VT, SDNode *Cst1, SDNode *Cst2) |
| SDValue | FoldConstantArithmetic (unsigned Opcode, const SDLoc &DL, EVT VT, const ConstantSDNode *Cst1, const ConstantSDNode *Cst2) |
| SDValue | FoldConstantVectorArithmetic (unsigned Opcode, const SDLoc &DL, EVT VT, ArrayRef< SDValue > Ops, const SDNodeFlags *Flags=nullptr) |
| SDValue | FoldSetCC (EVT VT, SDValue N1, SDValue N2, ISD::CondCode Cond, const SDLoc &dl) |
| Constant fold a setcc to true or false. More... | |
| bool | SignBitIsZero (SDValue Op, unsigned Depth=0) const |
| Return true if the sign bit of Op is known to be zero. More... | |
| bool | MaskedValueIsZero (SDValue Op, const APInt &Mask, unsigned Depth=0) const |
| Return true if 'Op & Mask' is known to be zero. More... | |
| void | computeKnownBits (SDValue Op, APInt &KnownZero, APInt &KnownOne, unsigned Depth=0) const |
| Determine which bits of Op are known to be either zero or one and return them in the KnownZero/KnownOne bitsets. More... | |
| void | computeKnownBits (SDValue Op, APInt &KnownZero, APInt &KnownOne, const APInt &DemandedElts, unsigned Depth=0) const |
| Determine which bits of Op are known to be either zero or one and return them in the KnownZero/KnownOne bitsets. More... | |
| bool | isKnownToBeAPowerOfTwo (SDValue Val) const |
| Test if the given value is known to have exactly one bit set. More... | |
| unsigned | ComputeNumSignBits (SDValue Op, unsigned Depth=0) const |
| Return the number of times the sign bit of the register is replicated into the other bits. More... | |
| bool | isBaseWithConstantOffset (SDValue Op) const |
| Return true if the specified operand is an ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an ISD::OR with a ConstantSDNode that is guaranteed to have the same semantics as an ADD. More... | |
| bool | isKnownNeverNaN (SDValue Op) const |
| Test whether the given SDValue is known to never be NaN. More... | |
| bool | isKnownNeverZero (SDValue Op) const |
| Test whether the given SDValue is known to never be positive or negative zero. More... | |
| bool | isEqualTo (SDValue A, SDValue B) const |
| Test whether two SDValues are known to compare equal. More... | |
| bool | haveNoCommonBitsSet (SDValue A, SDValue B) const |
| Return true if A and B have no common bits set. More... | |
| SDValue | UnrollVectorOp (SDNode *N, unsigned ResNE=0) |
| Utility function used by legalize and lowering to "unroll" a vector operation by splitting out the scalars and operating on each element individually. More... | |
| bool | areNonVolatileConsecutiveLoads (LoadSDNode *LD, LoadSDNode *Base, unsigned Bytes, int Dist) const |
| Return true if loads are next to each other and can be merged. More... | |
| unsigned | InferPtrAlignment (SDValue Ptr) const |
| Infer alignment of a load / store address. More... | |
| std::pair< EVT, EVT > | GetSplitDestVTs (const EVT &VT) const |
| Compute the VTs needed for the low/hi parts of a type which is split (or expanded) into two not necessarily identical pieces. More... | |
| std::pair< SDValue, SDValue > | SplitVector (const SDValue &N, const SDLoc &DL, const EVT &LoVT, const EVT &HiVT) |
| Split the vector with EXTRACT_SUBVECTOR using the provides VTs and return the low/high part. More... | |
| std::pair< SDValue, SDValue > | SplitVector (const SDValue &N, const SDLoc &DL) |
| Split the vector with EXTRACT_SUBVECTOR and return the low/high part. More... | |
| std::pair< SDValue, SDValue > | SplitVectorOperand (const SDNode *N, unsigned OpNo) |
| Split the node's operand with EXTRACT_SUBVECTOR and return the low/high part. More... | |
| void | ExtractVectorElements (SDValue Op, SmallVectorImpl< SDValue > &Args, unsigned Start=0, unsigned Count=0) |
| Append the extracted elements from Start to Count out of the vector Op in Args. More... | |
| unsigned | getEVTAlignment (EVT MemoryVT) const |
| Compute the default alignment value for the given type. More... | |
| SDNode * | isConstantIntBuildVectorOrConstantInt (SDValue N) |
| Test whether the given value is a constant int or similar node. More... | |
| SDNode * | isConstantFPBuildVectorOrConstantFP (SDValue N) |
| Test whether the given value is a constant FP or similar node. More... | |
| bool | isConstantValueOfAnyType (SDValue N) |
| SDValue | getConstant (uint64_t Val, const SDLoc &DL, EVT VT, bool isTarget=false, bool isOpaque=false) |
| Create a ConstantSDNode wrapping a constant value. More... | |
| SDValue | getConstant (const APInt &Val, const SDLoc &DL, EVT VT, bool isTarget=false, bool isOpaque=false) |
| SDValue | getConstant (const ConstantInt &Val, const SDLoc &DL, EVT VT, bool isTarget=false, bool isOpaque=false) |
| SDValue | getIntPtrConstant (uint64_t Val, const SDLoc &DL, bool isTarget=false) |
| SDValue | getTargetConstant (uint64_t Val, const SDLoc &DL, EVT VT, bool isOpaque=false) |
| SDValue | getTargetConstant (const APInt &Val, const SDLoc &DL, EVT VT, bool isOpaque=false) |
| SDValue | getTargetConstant (const ConstantInt &Val, const SDLoc &DL, EVT VT, bool isOpaque=false) |
| SDValue | getConstantFP (double Val, const SDLoc &DL, EVT VT, bool isTarget=false) |
| Create a ConstantFPSDNode wrapping a constant value. More... | |
| SDValue | getConstantFP (const APFloat &Val, const SDLoc &DL, EVT VT, bool isTarget=false) |
| SDValue | getConstantFP (const ConstantFP &CF, const SDLoc &DL, EVT VT, bool isTarget=false) |
| SDValue | getTargetConstantFP (double Val, const SDLoc &DL, EVT VT) |
| SDValue | getTargetConstantFP (const APFloat &Val, const SDLoc &DL, EVT VT) |
| SDValue | getTargetConstantFP (const ConstantFP &Val, const SDLoc &DL, EVT VT) |
Static Public Member Functions | |
| static bool | isCommutativeBinOp (unsigned Opcode) |
| Returns true if the opcode is a commutative binary operation. More... | |
| static const fltSemantics & | EVTToAPFloatSemantics (EVT VT) |
| Returns an APFloat semantics tag appropriate for the given type. More... | |
Public Attributes | |
| bool | NewNodesMustHaveLegalTypes |
| When true, additional steps are taken to ensure that getConstant() and similar functions return DAG nodes that have legal types. More... | |
| std::map< const SDNode *, std::string > | NodeGraphAttrs |
Friends | |
| struct | DAGUpdateListener |
| DAGUpdateListener is a friend so it can manipulate the listener stack. More... | |
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representation suitable for instruction selection.
This DAG is constructed as the first step of instruction selection in order to allow implementation of machine specific optimizations and code simplifications.
The representation used by the SelectionDAG is a target-independent representation, which has some similarities to the GCC RTL representation, but is significantly more simple, powerful, and is a graph form instead of a linear form.
Definition at line 166 of file SelectionDAG.h.
| typedef ilist<SDNode>::const_iterator llvm::SelectionDAG::allnodes_const_iterator |
Definition at line 360 of file SelectionDAG.h.
| typedef ilist<SDNode>::iterator llvm::SelectionDAG::allnodes_iterator |
Definition at line 363 of file SelectionDAG.h.
|
explicit |
Definition at line 865 of file SelectionDAG.cpp.
References Other.
| SelectionDAG::~SelectionDAG | ( | ) |
Definition at line 881 of file SelectionDAG.cpp.
References assert().
| void SelectionDAG::AddDbgValue | ( | SDDbgValue * | DB, |
| SDNode * | SD, | ||
| bool | isParameter | ||
| ) |
Add a dbg_value SDNode.
AddDbgValue - Add a dbg_value SDNode.
If SD is non-null that means the value is produced by SD.
Definition at line 6838 of file SelectionDAG.cpp.
References llvm::SDDbgInfo::add(), assert(), llvm::SDNode::getHasDebugValue(), llvm::SDDbgInfo::getSDDbgValues(), and llvm::SDNode::setHasDebugValue().
Referenced by llvm::SelectionDAGBuilder::resolveDanglingDebugInfo().
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inline |
Definition at line 370 of file SelectionDAG.h.
References allnodes_begin(), allnodes_end(), and llvm::make_range().
Referenced by AssignTopologicalOrder(), RemoveDeadNodes(), and llvm::DAGTypeLegalizer::run().
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inline |
Definition at line 373 of file SelectionDAG.h.
References allnodes_begin(), allnodes_end(), and llvm::make_range().
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Definition at line 361 of file SelectionDAG.h.
Referenced by allnodes(), AssignTopologicalOrder(), Legalize(), and llvm::GraphTraits< SelectionDAG * >::nodes_begin().
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Definition at line 364 of file SelectionDAG.h.
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inline |
Definition at line 362 of file SelectionDAG.h.
Referenced by allnodes(), AssignTopologicalOrder(), Legalize(), and llvm::GraphTraits< SelectionDAG * >::nodes_end().
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Definition at line 365 of file SelectionDAG.h.
Definition at line 366 of file SelectionDAG.h.
Referenced by AssignTopologicalOrder().
| bool SelectionDAG::areNonVolatileConsecutiveLoads | ( | LoadSDNode * | LD, |
| LoadSDNode * | Base, | ||
| unsigned | Bytes, | ||
| int | Dist | ||
| ) | const |
Return true if loads are next to each other and can be merged.
Check that both are nonvolatile and if LD is loading 'Bytes' bytes from a location that is 'Dist' units away from the location that the 'Base' load is loading from.
Definition at line 7191 of file SelectionDAG.cpp.
References llvm::AMDGPUISD::BFI, llvm::ISD::FrameIndex, llvm::MemSDNode::getChain(), llvm::MachineFunction::getFrameInfo(), getMachineFunction(), llvm::SDValue::getNode(), llvm::MachineFrameInfo::getObjectOffset(), llvm::MachineFrameInfo::getObjectSize(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::SDNode::getOperand(), llvm::EVT::getSizeInBits(), llvm::SDNode::getValueType(), isBaseWithConstantOffset(), llvm::TargetLowering::isGAPlusOffset(), llvm::LSBaseSDNode::isIndexed(), and llvm::MemSDNode::isVolatile().
Referenced by EltsFromConsecutiveLoads().
| unsigned SelectionDAG::AssignTopologicalOrder | ( | ) |
Topological-sort the AllNodes list and a assign a unique node id for each node in the DAG based on their topological order.
AssignTopologicalOrder - Assign a unique node id for each node in the DAG based on their topological order.
Returns the number of nodes.
It returns the maximum id and a vector of the SDNodes* in assigned order by reference.
Definition at line 6748 of file SelectionDAG.cpp.
References allnodes(), allnodes_begin(), allnodes_end(), allnodes_size(), assert(), llvm::checkForCycles(), llvm::dbgs(), llvm::SDNode::dumprFull(), E, llvm::ISD::EntryToken, llvm::ilist_node_impl< OptionsT >::getIterator(), llvm::SDNode::getNodeId(), llvm::SDNode::getNumOperands(), I, llvm_unreachable, P, llvm::SDNode::setNodeId(), llvm::SDNode::use_begin(), and llvm::SDNode::use_end().
Referenced by Legalize().
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inline |
Definition at line 1214 of file SelectionDAG.h.
References llvm::SDDbgInfo::ByvalParmDbgBegin().
Referenced by llvm::ScheduleDAGSDNodes::EmitSchedule().
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inline |
Definition at line 1217 of file SelectionDAG.h.
References llvm::SDDbgInfo::ByvalParmDbgEnd().
Referenced by llvm::ScheduleDAGSDNodes::EmitSchedule().
| void SelectionDAG::clear | ( | ) |
Clear state and free memory necessary to make this SelectionDAG ready to process a new block.
Definition at line 961 of file SelectionDAG.cpp.
References llvm::SDDbgInfo::clear(), getEntryNode(), and llvm::BumpPtrAllocatorImpl< AllocatorT, SlabSize, SizeThreshold >::Reset().
| void SelectionDAG::clearGraphAttrs | ( | ) |
Clear all previously defined node graph attributes.
clearGraphAttrs - Clear all previously defined node graph attributes.
Intended to be used from a debugging tool (eg. gdb).
Definition at line 172 of file SelectionDAGPrinter.cpp.
References llvm::errs(), and NodeGraphAttrs.
| void SelectionDAG::Combine | ( | CombineLevel | Level, |
| AliasAnalysis & | AA, | ||
| CodeGenOpt::Level | OptLevel | ||
| ) |
This iterates over the nodes in the SelectionDAG, folding certain types of nodes together, or eliminating superfluous nodes.
This is the entry point for the file.
The Level argument controls whether Combine is allowed to produce nodes and types that are illegal on the target.
This is the main entry point to this class.
Definition at line 15568 of file DAGCombiner.cpp.
| void SelectionDAG::computeKnownBits | ( | SDValue | Op, |
| APInt & | KnownZero, | ||
| APInt & | KnownOne, | ||
| unsigned | Depth = 0 |
||
| ) | const |
Determine which bits of Op are known to be either zero or one and return them in the KnownZero/KnownOne bitsets.
For vectors, the known bits are those that are shared by every vector element. Targets can implement the computeKnownBitsForTargetNode method in the TargetLowering class to allow target nodes to be understood.
For vectors, the known bits are those that are shared by every vector element.
Definition at line 1984 of file SelectionDAG.cpp.
References llvm::APInt::getAllOnesValue(), llvm::SDValue::getValueType(), llvm::EVT::getVectorNumElements(), and llvm::EVT::isVector().
Referenced by llvm::SelectionDAGISel::CheckOrMask(), computeKnownBits(), computeKnownBits(), llvm::SparcTargetLowering::computeKnownBitsForTargetNode(), llvm::AArch64TargetLowering::computeKnownBitsForTargetNode(), llvm::ARMTargetLowering::computeKnownBitsForTargetNode(), llvm::X86TargetLowering::computeKnownBitsForTargetNode(), ComputeNumSignBits(), foldMaskAndShiftToScale(), haveNoCommonBitsSet(), isBitfieldPositioningOp(), isKnownToBeAPowerOfTwo(), isTruncateOf(), isU24(), isWordAligned(), LowerAndToBT(), MaskedValueIsZero(), llvm::ARMTargetLowering::PerformCMOVCombine(), llvm::PPCTargetLowering::SelectAddressRegImm(), llvm::PPCTargetLowering::SelectAddressRegReg(), llvm::TargetLowering::SimplifyDemandedBits(), tryBitfieldInsertOpFromOr(), and tryBitfieldInsertOpFromOrAndImm().
| void SelectionDAG::computeKnownBits | ( | SDValue | Op, |
| APInt & | KnownZero, | ||
| APInt & | KnownOne, | ||
| const APInt & | DemandedElts, | ||
| unsigned | Depth = 0 |
||
| ) | const |
Determine which bits of Op are known to be either zero or one and return them in the KnownZero/KnownOne bitsets.
The DemandedElts argument allows us to only collect the known bits that are shared by the requested vector elements. Targets can implement the computeKnownBitsForTargetNode method in the TargetLowering class to allow target nodes to be understood.
The DemandedElts argument allows us to only collect the known bits that are shared by the requested vector elements. TODO: We only support DemandedElts on a few opcodes so far, the remainder should be added when they become necessary.
Definition at line 1999 of file SelectionDAG.cpp.
References llvm::APInt::abs(), llvm::ISD::ADD, llvm::ISD::ADDE, llvm::ISD::AND, llvm::ISD::ANY_EXTEND, assert(), llvm::ISD::AssertZext, llvm::ISD::BITCAST, llvm::ISD::BSWAP, llvm::ISD::BUILD_VECTOR, llvm::ISD::BUILTIN_OP_END, llvm::APInt::byteSwap(), llvm::APInt::clearAllBits(), computeKnownBits(), llvm::TargetLowering::computeKnownBitsForTargetNode(), llvm::computeKnownBitsFromRangeMetadata(), llvm::ISD::CONCAT_VECTORS, llvm::ISD::Constant, llvm::APInt::countLeadingOnes(), llvm::countLeadingZeros(), llvm::APInt::countTrailingOnes(), llvm::ISD::CTLZ, llvm::ISD::CTLZ_ZERO_UNDEF, llvm::ISD::CTPOP, llvm::ISD::CTTZ, llvm::ISD::CTTZ_ZERO_UNDEF, llvm::dyn_cast(), llvm::ISD::EXTRACT_ELEMENT, llvm::ISD::EXTRACT_SUBVECTOR, llvm::ISD::EXTRACT_VECTOR_ELT, llvm::ISD::FGETSIGN, llvm::ISD::FrameIndex, llvm::APInt::getAllOnesValue(), llvm::ConstantSDNode::getAPIntValue(), llvm::APInt::getBitsSet(), llvm::APInt::getBitWidth(), llvm::TargetLoweringBase::getBooleanContents(), llvm::APInt::getBoolValue(), llvm::SDValue::getConstantOperandVal(), getDataLayout(), llvm::LoadSDNode::getExtensionType(), llvm::APInt::getHighBitsSet(), llvm::APInt::getLowBitsSet(), llvm::ShuffleVectorSDNode::getMask(), llvm::ShuffleVectorSDNode::getMaskElt(), llvm::MemSDNode::getMemoryVT(), llvm::SDValue::getNode(), llvm::SDValue::getNumOperands(), llvm::APInt::getOneBitSet(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::MemSDNode::getRanges(), llvm::SDValue::getResNo(), llvm::EVT::getScalarSizeInBits(), llvm::SDValue::getScalarValueSizeInBits(), llvm::APInt::getSignBit(), llvm::EVT::getSizeInBits(), getValidShiftAmountConstant(), llvm::SDValue::getValueSizeInBits(), llvm::SDValue::getValueType(), llvm::EVT::getVectorNumElements(), llvm::ConstantSDNode::getZExtValue(), i, InferPtrAlignment(), llvm::ISD::INSERT_VECTOR_ELT, llvm::ISD::INTRINSIC_VOID, llvm::ISD::INTRINSIC_W_CHAIN, llvm::ISD::INTRINSIC_WO_CHAIN, llvm::isConstOrConstSplat(), llvm::EVT::isInteger(), llvm::DataLayout::isLittleEndian(), llvm::APInt::isPowerOf2(), llvm::EVT::isVector(), llvm::ISD::isZEXTLoad(), llvm::ARM_MB::LD, LLVM_FALLTHROUGH, llvm::ISD::LOAD, llvm::Log2_32(), llvm::APInt::lshr(), fuzzer::min(), llvm::ISD::MUL, llvm::ISD::NON_EXTLOAD, Offset, llvm::ISD::OR, llvm::ISD::SADDO, llvm::ISD::SELECT, llvm::ISD::SELECT_CC, llvm::APInt::setBit(), llvm::ISD::SETCC, llvm::ISD::SHL, llvm::APInt::shl(), llvm::ISD::SIGN_EXTEND, llvm::ISD::SIGN_EXTEND_INREG, llvm::ISD::SMAX, llvm::ISD::SMIN, llvm::ISD::SMULO, llvm::ISD::SRA, llvm::ISD::SREM, llvm::ISD::SRL, llvm::ISD::SSUBO, llvm::ISD::SUB, llvm::ISD::TargetFrameIndex, llvm::APInt::trunc(), llvm::ISD::TRUNCATE, llvm::ISD::UADDO, llvm::ISD::UDIV, llvm::APInt::ule(), llvm::APInt::ult(), llvm::ISD::UMAX, llvm::ISD::UMIN, llvm::ISD::UMULO, llvm::ISD::UREM, llvm::ISD::USUBO, llvm::ISD::VECTOR_SHUFFLE, llvm::ISD::XOR, llvm::ISD::ZERO_EXTEND, llvm::TargetLoweringBase::ZeroOrOneBooleanContent, llvm::APInt::zext(), and llvm::APInt::zextOrTrunc().
Return the number of times the sign bit of the register is replicated into the other bits.
We know that at least 1 bit is always equal to the sign bit (itself), but other cases can give us information. For example, immediately after an "SRA X, 2", we know that the top 3 bits are all equal to each other, so we return 3. Targets can implement the ComputeNumSignBitsForTarget method in the TargetLowering class to allow target nodes to be understood.
Definition at line 2765 of file SelectionDAG.cpp.
References llvm::ISD::ADD, llvm::ISD::AND, assert(), llvm::ISD::AssertSext, llvm::ISD::AssertZext, llvm::ISD::BUILTIN_OP_END, C, computeKnownBits(), llvm::TargetLowering::ComputeNumSignBitsForTargetNode(), llvm::ISD::CONCAT_VECTORS, llvm::ISD::Constant, llvm::APInt::countLeadingZeros(), llvm::ISD::EXTRACT_ELEMENT, llvm::ISD::EXTRACT_SUBVECTOR, llvm::ISD::EXTRACT_VECTOR_ELT, llvm::APInt::getBitWidth(), llvm::TargetLoweringBase::getBooleanContents(), llvm::SDValue::getConstantOperandVal(), llvm::SDValue::getNumOperands(), llvm::APInt::getNumSignBits(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::SDValue::getResNo(), llvm::EVT::getScalarSizeInBits(), llvm::SDValue::getScalarValueSizeInBits(), llvm::SDValue::getValueSizeInBits(), llvm::SDValue::getValueType(), llvm::APInt::getZExtValue(), i, llvm::ISD::INTRINSIC_VOID, llvm::ISD::INTRINSIC_W_CHAIN, llvm::ISD::INTRINSIC_WO_CHAIN, llvm::isConstOrConstSplat(), llvm::EVT::isInteger(), llvm::APInt::isNegative(), llvm::EVT::isVector(), llvm::ARM_MB::LD, llvm::BitmaskEnumDetail::Mask(), fuzzer::min(), llvm::ISD::OR, llvm::ISD::ROTL, llvm::ISD::ROTR, llvm::ISD::SADDO, llvm::ISD::SELECT, llvm::ISD::SELECT_CC, llvm::ISD::SETCC, llvm::ISD::SEXTLOAD, llvm::ISD::SHL, llvm::ISD::SIGN_EXTEND, llvm::ISD::SIGN_EXTEND_INREG, llvm::ISD::SMAX, llvm::ISD::SMIN, llvm::ISD::SMULO, llvm::ISD::SRA, llvm::ISD::SSUBO, llvm::ISD::SUB, llvm::ISD::TRUNCATE, llvm::ISD::UADDO, llvm::APInt::uge(), llvm::ISD::UMAX, llvm::ISD::UMIN, llvm::ISD::UMULO, llvm::ISD::USUBO, llvm::ISD::XOR, llvm::TargetLoweringBase::ZeroOrNegativeOneBooleanContent, and llvm::ISD::ZEXTLOAD.
Referenced by canReduceVMulWidth(), combineSIntToFP(), combineVectorSignBitsTruncation(), llvm::AMDGPUTargetLowering::ComputeNumSignBitsForTargetNode(), llvm::X86TargetLowering::ComputeNumSignBitsForTargetNode(), llvm::TargetLowering::expandMUL_LOHI(), isI24(), llvm::AMDGPUTargetLowering::LowerDIVREM24(), LowerMUL(), llvm::AMDGPUTargetLowering::LowerSDIVREM(), and llvm::AMDGPUTargetLowering::PerformDAGCombine().
Create a stack temporary, suitable for holding the specified value type.
If minAlign is specified, the slot size will have at least that alignment.
Definition at line 1819 of file SelectionDAG.cpp.
References llvm::MachineFrameInfo::CreateStackObject(), getContext(), getDataLayout(), getFrameIndex(), llvm::MachineFunction::getFrameInfo(), getMachineFunction(), llvm::TargetLoweringBase::getPointerTy(), llvm::EVT::getStoreSize(), and llvm::EVT::getTypeForEVT().
Referenced by llvm::StatepointLoweringState::allocateStackSlot(), combineExtractVectorElt(), llvm::TargetLowering::expandUnalignedLoad(), llvm::TargetLowering::expandUnalignedStore(), and llvm::SystemZTargetLowering::LowerCall().
Create a stack temporary suitable for holding either of the specified value types.
Definition at line 1830 of file SelectionDAG.cpp.
References llvm::MachineFrameInfo::CreateStackObject(), getContext(), getDataLayout(), getFrameIndex(), llvm::MachineFunction::getFrameInfo(), getMachineFunction(), llvm::TargetLoweringBase::getPointerTy(), llvm::DataLayout::getPrefTypeAlignment(), llvm::EVT::getStoreSize(), and llvm::EVT::getTypeForEVT().
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inline |
Definition at line 1212 of file SelectionDAG.h.
References llvm::SDDbgInfo::DbgBegin().
Referenced by llvm::ScheduleDAGSDNodes::EmitSchedule().
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inline |
Definition at line 1213 of file SelectionDAG.h.
References llvm::SDDbgInfo::DbgEnd().
Referenced by llvm::ScheduleDAGSDNodes::EmitSchedule().
| void SelectionDAG::DeleteNode | ( | SDNode * | N | ) |
Remove the specified node from the system.
This node must have no referrers.
Definition at line 609 of file SelectionDAG.cpp.
Referenced by Legalize(), and llvm::SelectionDAGBuilder::LowerAsSTATEPOINT().
| LLVM_DUMP_METHOD void SelectionDAG::dump | ( | ) | const |
Definition at line 581 of file SelectionDAGDumper.cpp.
|
inlinestatic |
Returns an APFloat semantics tag appropriate for the given type.
If VT is a vector type, the element semantics are returned.
Definition at line 1182 of file SelectionDAG.h.
References llvm::MVT::f128, llvm::MVT::f16, llvm::MVT::f32, llvm::MVT::f64, llvm::MVT::f80, llvm::EVT::getScalarType(), llvm::EVT::getSimpleVT(), llvm::APFloatBase::IEEEdouble(), llvm::APFloatBase::IEEEhalf(), llvm::APFloatBase::IEEEquad(), llvm::APFloatBase::IEEEsingle(), llvm_unreachable, llvm::APFloatBase::PPCDoubleDouble(), llvm::MVT::ppcf128, llvm::MVT::SimpleTy, and llvm::APFloatBase::x87DoubleExtended().
Referenced by FoldIntToFPToInt(), getConstantFP(), getMemsetValue(), getNode(), and llvm::ConstantFPSDNode::isValueValidForType().
Expand the specified ISD::VAARG node as the Legalize pass would.
Definition at line 1770 of file SelectionDAG.cpp.
References llvm::ISD::ADD, llvm::ISD::AND, assert(), getConstant(), llvm::SDNode::getConstantOperandVal(), getContext(), getDataLayout(), getLoad(), llvm::TargetLoweringBase::getMinStackArgumentAlignment(), getNode(), llvm::SDNode::getOperand(), llvm::TargetLoweringBase::getPointerTy(), getStore(), getTargetLoweringInfo(), llvm::EVT::getTypeForEVT(), llvm::SDValue::getValue(), and llvm::SDNode::getValueType().
Expand the specified ISD::VACOPY node as the Legalize pass would.
Definition at line 1805 of file SelectionDAG.cpp.
References getDataLayout(), getLoad(), llvm::SDNode::getOperand(), llvm::TargetLoweringBase::getPointerTy(), getStore(), getTargetLoweringInfo(), llvm::SDValue::getValue(), and llvm::AArch64CC::VS.
Referenced by LowerVACOPY().
| void SelectionDAG::ExtractVectorElements | ( | SDValue | Op, |
| SmallVectorImpl< SDValue > & | Args, | ||
| unsigned | Start = 0, |
||
| unsigned | Count = 0 |
||
| ) |
Append the extracted elements from Start to Count out of the vector Op in Args.
If Count is 0, all of the elements will be extracted.
Definition at line 7323 of file SelectionDAG.cpp.
References llvm::ISD::EXTRACT_VECTOR_ELT, getConstant(), getDataLayout(), getNode(), llvm::SDValue::getValueType(), llvm::EVT::getVectorElementType(), llvm::TargetLoweringBase::getVectorIdxTy(), llvm::EVT::getVectorNumElements(), i, and llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back().
Referenced by llvm::AMDGPUTargetLowering::LowerCONCAT_VECTORS(), llvm::AMDGPUTargetLowering::LowerEXTRACT_SUBVECTOR(), and llvm::AMDGPUTargetLowering::LowerSIGN_EXTEND_INREG().
| SDValue SelectionDAG::FoldConstantArithmetic | ( | unsigned | Opcode, |
| const SDLoc & | DL, | ||
| EVT | VT, | ||
| SDNode * | Cst1, | ||
| SDNode * | Cst2 | ||
| ) |
Definition at line 3572 of file SelectionDAG.cpp.
References assert(), llvm::SmallVectorTemplateCommon< T >::back(), llvm::ISD::BUILTIN_OP_END, llvm::ISD::Constant, llvm::ISD::ConstantFP, llvm::dyn_cast(), E, FoldSymbolOffset(), getBuildVector(), getNode(), llvm::SDNode::getNumOperands(), llvm::SDValue::getOpcode(), llvm::SDNode::getOperand(), llvm::EVT::getScalarType(), llvm::SDNode::getValueType(), llvm::EVT::getVectorNumElements(), I, isCommutativeBinOp(), llvm::SDValue::isUndef(), llvm::EVT::isVector(), llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back(), llvm::SmallVectorImpl< T >::resize(), llvm::SmallVectorTemplateCommon< T >::size(), and llvm::NVPTX::PTXLdStInstCode::V2.
Referenced by getNode().
| SDValue SelectionDAG::FoldConstantArithmetic | ( | unsigned | Opcode, |
| const SDLoc & | DL, | ||
| EVT | VT, | ||
| const ConstantSDNode * | Cst1, | ||
| const ConstantSDNode * | Cst2 | ||
| ) |
Definition at line 3539 of file SelectionDAG.cpp.
References FoldValue(), llvm::ConstantSDNode::getAPIntValue(), getConstant(), and llvm::ConstantSDNode::isOpaque().
| SDValue SelectionDAG::FoldConstantVectorArithmetic | ( | unsigned | Opcode, |
| const SDLoc & | DL, | ||
| EVT | VT, | ||
| ArrayRef< SDValue > | Ops, | ||
| const SDNodeFlags * | Flags = nullptr |
||
| ) |
Definition at line 3638 of file SelectionDAG.cpp.
References llvm::all_of(), llvm::EVT::bitsGT(), llvm::EVT::bitsLT(), llvm::ISD::BUILTIN_OP_END, llvm::ISD::CONDCODE, llvm::ISD::Constant, llvm::ISD::ConstantFP, llvm::dyn_cast(), getBuildVector(), getContext(), getNode(), llvm::SDValue::getOpcode(), llvm::SDNode::getOperand(), llvm::EVT::getScalarType(), llvm::TargetLoweringBase::getTypeToTransformTo(), getUNDEF(), llvm::SDValue::getValueType(), llvm::EVT::getVectorNumElements(), i, llvm::MVT::i1, llvm::BuildVectorSDNode::isConstant(), llvm::EVT::isInteger(), llvm::SDValue::isUndef(), llvm::EVT::isVector(), llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back(), llvm::ISD::SETCC, llvm::ISD::SIGN_EXTEND, and llvm::ISD::TRUNCATE.
Referenced by getNode().
| SDValue SelectionDAG::FoldSetCC | ( | EVT | VT, |
| SDValue | N1, | ||
| SDValue | N2, | ||
| ISD::CondCode | Cond, | ||
| const SDLoc & | dl | ||
| ) |
Constant fold a setcc to true or false.
Definition at line 1843 of file SelectionDAG.cpp.
References assert(), llvm::APFloatBase::cmpEqual, llvm::APFloatBase::cmpGreaterThan, llvm::APFloatBase::cmpLessThan, llvm::APFloatBase::cmpUnordered, llvm::TargetLoweringBase::getBooleanContents(), getConstant(), getSetCC(), llvm::ISD::getSetCCSwappedOperands(), llvm::EVT::getSimpleVT(), getUNDEF(), llvm::SDValue::getValueType(), llvm::SDNode::getValueType(), llvm::TargetLoweringBase::isCondCodeLegal(), llvm::EVT::isInteger(), LLVM_FALLTHROUGH, llvm_unreachable, llvm::ISD::SETEQ, llvm::ISD::SETFALSE, llvm::ISD::SETFALSE2, llvm::ISD::SETGE, llvm::ISD::SETGT, llvm::ISD::SETLE, llvm::ISD::SETLT, llvm::ISD::SETNE, llvm::ISD::SETO, llvm::ISD::SETOEQ, llvm::ISD::SETOGE, llvm::ISD::SETOGT, llvm::ISD::SETOLE, llvm::ISD::SETOLT, llvm::ISD::SETONE, llvm::ISD::SETTRUE, llvm::ISD::SETTRUE2, llvm::ISD::SETUEQ, llvm::ISD::SETUGE, llvm::ISD::SETUGT, llvm::ISD::SETULE, llvm::ISD::SETULT, llvm::ISD::SETUNE, llvm::ISD::SETUO, llvm::APInt::sge(), llvm::APInt::sgt(), llvm::APInt::sle(), llvm::APInt::slt(), llvm::APInt::uge(), llvm::APInt::ugt(), llvm::APInt::ule(), llvm::APInt::ult(), and llvm::TargetLoweringBase::ZeroOrNegativeOneBooleanContent.
Referenced by getNode(), and llvm::TargetLowering::SimplifySetCC().
| SDValue SelectionDAG::FoldSymbolOffset | ( | unsigned | Opcode, |
| EVT | VT, | ||
| const GlobalAddressSDNode * | GA, | ||
| const SDNode * | N2 | ||
| ) |
Definition at line 3552 of file SelectionDAG.cpp.
References llvm::ISD::ADD, llvm::dyn_cast(), llvm::GlobalAddressSDNode::getGlobal(), getGlobalAddress(), llvm::GlobalAddressSDNode::getOffset(), llvm::SDNode::getOpcode(), llvm::ConstantSDNode::getSExtValue(), llvm::ISD::GlobalAddress, llvm::TargetLowering::isOffsetFoldingLegal(), Offset, and llvm::ISD::SUB.
Referenced by FoldConstantArithmetic().
| SDValue SelectionDAG::getAddrSpaceCast | ( | const SDLoc & | dl, |
| EVT | VT, | ||
| SDValue | Ptr, | ||
| unsigned | SrcAS, | ||
| unsigned | DestAS | ||
| ) |
Return an AddrSpaceCastSDNode.
Definition at line 1739 of file SelectionDAG.cpp.
References llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), llvm::ISD::ADDRSPACECAST, E, llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), and getVTList().
Return an operation which will any-extend the low lanes of the operand into the specified vector type.
For example, this can convert a v16i8 into a v4i32 by any-extending the low four lanes of the operand from i8 to i32.
Definition at line 1021 of file SelectionDAG.cpp.
References llvm::ISD::ANY_EXTEND_VECTOR_INREG, assert(), getNode(), llvm::EVT::getSizeInBits(), llvm::SDValue::getValueSizeInBits(), llvm::SDValue::getValueType(), llvm::EVT::getVectorNumElements(), and llvm::EVT::isVector().
Convert Op, which must be of integer type, to the integer type VT, by either any-extending or truncating it.
Definition at line 982 of file SelectionDAG.cpp.
References llvm::ISD::ANY_EXTEND, llvm::EVT::bitsGT(), getNode(), llvm::SDValue::getValueType(), and llvm::ISD::TRUNCATE.
Referenced by createGPRPairNode(), getCopyFromPartsVector(), getCopyToPartsVector(), and getNode().
| SDValue SelectionDAG::getAtomic | ( | unsigned | Opcode, |
| const SDLoc & | dl, | ||
| EVT | MemVT, | ||
| SDValue | Chain, | ||
| SDValue | Ptr, | ||
| SDValue | Val, | ||
| const Value * | PtrVal, | ||
| unsigned | Alignment, | ||
| AtomicOrdering | Ordering, | ||
| SynchronizationScope | SynchScope | ||
| ) |
Gets a node for an atomic op, produces result (if relevant) and chain and takes 2 operands.
Definition at line 5141 of file SelectionDAG.cpp.
References llvm::ISD::ATOMIC_LOAD, llvm::ISD::ATOMIC_STORE, getEVTAlignment(), getMachineFunction(), llvm::MachineFunction::getMachineMemOperand(), llvm::EVT::getStoreSize(), llvm::MachineMemOperand::MOLoad, llvm::MachineMemOperand::MOStore, and llvm::MachineMemOperand::MOVolatile.
Referenced by getAtomic(), getAtomicCmpSwap(), LowerATOMIC_STORE(), and lowerAtomicArith().
| SDValue SelectionDAG::getAtomic | ( | unsigned | Opcode, |
| const SDLoc & | dl, | ||
| EVT | MemVT, | ||
| SDValue | Chain, | ||
| SDValue | Ptr, | ||
| SDValue | Val, | ||
| MachineMemOperand * | MMO | ||
| ) |
Definition at line 5170 of file SelectionDAG.cpp.
References assert(), llvm::ISD::ATOMIC_LOAD_ADD, llvm::ISD::ATOMIC_LOAD_AND, llvm::ISD::ATOMIC_LOAD_MAX, llvm::ISD::ATOMIC_LOAD_MIN, llvm::ISD::ATOMIC_LOAD_NAND, llvm::ISD::ATOMIC_LOAD_OR, llvm::ISD::ATOMIC_LOAD_SUB, llvm::ISD::ATOMIC_LOAD_UMAX, llvm::ISD::ATOMIC_LOAD_UMIN, llvm::ISD::ATOMIC_LOAD_XOR, llvm::ISD::ATOMIC_STORE, llvm::ISD::ATOMIC_SWAP, getAtomic(), llvm::SDValue::getValueType(), getVTList(), llvm::MVT::Other, and Ptr.
| SDValue SelectionDAG::getAtomic | ( | unsigned | Opcode, |
| const SDLoc & | dl, | ||
| EVT | MemVT, | ||
| EVT | VT, | ||
| SDValue | Chain, | ||
| SDValue | Ptr, | ||
| MachineMemOperand * | MMO | ||
| ) |
Gets a node for an atomic op, produces result and chain and takes 1 operand.
Definition at line 5195 of file SelectionDAG.cpp.
References assert(), llvm::ISD::ATOMIC_LOAD, getAtomic(), getVTList(), and llvm::MVT::Other.
| SDValue SelectionDAG::getAtomic | ( | unsigned | Opcode, |
| const SDLoc & | dl, | ||
| EVT | MemVT, | ||
| SDVTList | VTList, | ||
| ArrayRef< SDValue > | Ops, | ||
| MachineMemOperand * | MMO | ||
| ) |
Gets a node for an atomic op, produces result and chain and takes N operands.
Definition at line 5081 of file SelectionDAG.cpp.
References llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), E, llvm::MachinePointerInfo::getAddrSpace(), llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), llvm::MachineMemOperand::getPointerInfo(), and llvm::EVT::getRawBits().
| SDValue SelectionDAG::getAtomicCmpSwap | ( | unsigned | Opcode, |
| const SDLoc & | dl, | ||
| EVT | MemVT, | ||
| SDVTList | VTs, | ||
| SDValue | Chain, | ||
| SDValue | Ptr, | ||
| SDValue | Cmp, | ||
| SDValue | Swp, | ||
| MachinePointerInfo | PtrInfo, | ||
| unsigned | Alignment, | ||
| AtomicOrdering | SuccessOrdering, | ||
| AtomicOrdering | FailureOrdering, | ||
| SynchronizationScope | SynchScope | ||
| ) |
Gets a node for an atomic cmpxchg op.
There are two valid Opcodes. ISD::ATOMIC_CMO_SWAP produces the value loaded and a chain result. ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS produces the value loaded, a success flag (initially i1), and a chain.
Definition at line 5103 of file SelectionDAG.cpp.
References assert(), llvm::ISD::ATOMIC_CMP_SWAP, llvm::ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS, getEVTAlignment(), getMachineFunction(), llvm::MachineFunction::getMachineMemOperand(), llvm::EVT::getStoreSize(), llvm::SDValue::getValueType(), llvm::MachineMemOperand::MOLoad, llvm::MachineMemOperand::MOStore, and llvm::MachineMemOperand::MOVolatile.
| SDValue SelectionDAG::getAtomicCmpSwap | ( | unsigned | Opcode, |
| const SDLoc & | dl, | ||
| EVT | MemVT, | ||
| SDVTList | VTs, | ||
| SDValue | Chain, | ||
| SDValue | Ptr, | ||
| SDValue | Cmp, | ||
| SDValue | Swp, | ||
| MachineMemOperand * | MMO | ||
| ) |
Definition at line 5129 of file SelectionDAG.cpp.
References assert(), llvm::ISD::ATOMIC_CMP_SWAP, llvm::ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS, getAtomic(), llvm::SDValue::getValueType(), and Ptr.
| SDValue SelectionDAG::getBasicBlock | ( | MachineBasicBlock * | MBB | ) |
Definition at line 1378 of file SelectionDAG.cpp.
References AddNodeIDNode(), llvm::FoldingSetNodeID::AddPointer(), llvm::ISD::BasicBlock, E, getVTList(), MBB, llvm::None, and llvm::MVT::Other.
Referenced by AddNodeIDCustom(), llvm::SelectionDAGBuilder::visitBitTestCase(), llvm::SelectionDAGBuilder::visitBitTestHeader(), llvm::SelectionDAGBuilder::visitJumpTableHeader(), llvm::SelectionDAGBuilder::visitSPDescriptorParent(), and llvm::SelectionDAGBuilder::visitSwitchCase().
| SDValue llvm::SelectionDAG::getBasicBlock | ( | MachineBasicBlock * | MBB, |
| SDLoc | dl | ||
| ) |
Return a bitcast using the SDLoc of the value operand, and casting to the provided type.
Use getNode to set a custom SDLoc.
Definition at line 1732 of file SelectionDAG.cpp.
References llvm::ISD::BITCAST, getNode(), and llvm::SDValue::getValueType().
Referenced by llvm::X86TargetLowering::BuildFILD(), BuildSplatI(), combineBitcast(), combineBitcastForMaskedOp(), combineCompareEqual(), combineConcatVectorOfExtracts(), combineConcatVectorOfScalars(), combineExtractVectorElt(), combineFneg(), combineLogicBlendIntoPBLENDV(), combineMaskedLoad(), combineMaskedStore(), combinePCMPAnd1(), combineRedundantDWordShuffle(), combineShuffle(), combineStore(), combineTargetShuffle(), combineVectorCompareAndMaskUnaryOp(), combineVectorTruncationWithPACKUS(), combineVSelectWithAllOnesOrZeros(), combineVSZext(), combineX86ShuffleChain(), combineX86ShufflesConstants(), convertIntLogicToFPLogic(), EltsFromConsecutiveLoads(), FoldIntToFPToInt(), getConstVector(), getMaskNode(), getMemsetValue(), getOnesVector(), getScalarValueForVectorElement(), getTargetVShiftNode(), getv64i1Argument(), getVShift(), getZeroVector(), llvm::TargetLowering::IncrementMemoryAddress(), insert128BitVector(), lower256BitVectorShuffle(), LowerAVXExtend(), LowerBITCAST(), LowerBITREVERSE_XOP(), LowerBuildVectorv16i8(), LowerBuildVectorv4x32(), LowerEXTEND_VECTOR_INREG(), LowerExtended1BitVectorLoad(), LowerExtendedLoad(), LowerEXTRACT_VECTOR_ELT_SSE4(), LowerHorizontalByteSum(), LowerINTRINSIC_WO_CHAIN(), lowerMasksToReg(), LowerMSCATTER(), LowerMUL(), LowerMUL_LOHI(), LowerMULH(), lowerRegToMasks(), LowerSCALAR_TO_VECTOR(), LowerScalarImmediateShift(), LowerShift(), LowerTruncateVecI1(), lowerUINT_TO_FP_vXi32(), lowerV16I32VectorShuffle(), lowerV16I8VectorShuffle(), lowerV2I64VectorShuffle(), lowerV4I32VectorShuffle(), lowerV4I64VectorShuffle(), lowerV8I16GeneralSingleInputVectorShuffle(), lowerV8I32VectorShuffle(), lowerV8I64VectorShuffle(), LowerVectorAllZeroTest(), LowerVectorBroadcast(), LowerVectorCTLZInRegLUT(), LowerVectorCTPOPBitmath(), LowerVectorCTPOPInRegLUT(), lowerVectorShuffle(), lowerVectorShuffleAsBitBlend(), lowerVectorShuffleAsBlend(), lowerVectorShuffleAsBlendOfPSHUFBs(), lowerVectorShuffleAsBroadcast(), lowerVectorShuffleAsByteRotate(), lowerVectorShuffleAsElementInsertion(), lowerVectorShuffleAsPermuteAndUnpack(), lowerVectorShuffleAsShift(), lowerVectorShuffleAsSpecificZeroOrAnyExtend(), lowerVectorShuffleAsZeroOrAnyExtend(), lowerVectorShuffleByMerging128BitLanes(), lowerVectorShuffleWithPSHUFB(), LowerVSETCC(), lowerX86FPLogicOp(), Passv64i1ArgInRegs(), llvm::X86TargetLowering::ReplaceNodeResults(), splitAndLowerVectorShuffle(), truncateVectorCompareWithPACKSS(), and XFormVExtractWithShuffleIntoLoad().
| SDValue SelectionDAG::getBlockAddress | ( | const BlockAddress * | BA, |
| EVT | VT, | ||
| int64_t | Offset = 0, |
||
| bool | isTarget = false, |
||
| unsigned char | TargetFlags = 0 |
||
| ) |
Definition at line 1678 of file SelectionDAG.cpp.
References llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), llvm::FoldingSetNodeID::AddPointer(), llvm::ISD::BlockAddress, E, getVTList(), llvm::None, Offset, and llvm::ISD::TargetBlockAddress.
Referenced by getTargetBlockAddress(), llvm::SelectionDAGBuilder::getValueImpl(), and llvm::LanaiTargetLowering::LowerBlockAddress().
Convert Op, which must be of integer type, to the integer type VT, by using an extension appropriate for the target's BooleanContent for type OpVT or truncating it.
Definition at line 1000 of file SelectionDAG.cpp.
References llvm::EVT::bitsLE(), llvm::TargetLoweringBase::getBooleanContents(), llvm::TargetLoweringBase::getExtendForContent(), getNode(), llvm::SDValue::getValueType(), and llvm::ISD::TRUNCATE.
Referenced by llvm::TargetLowering::SimplifySetCC().
|
inline |
Return an ISD::BUILD_VECTOR node.
The number of elements in VT, which must be a vector type, must match the number of operands in Ops. The operands must have the same type as (or, for integers, a type wider than) VT's element type.
Definition at line 639 of file SelectionDAG.h.
References llvm::ISD::BUILD_VECTOR, and getNode().
Referenced by buildScalarToVector(), buildVector(), ChangeVSETULTtoVSETULE(), combineConcatVectorOfScalars(), combineShuffleOfScalars(), combineX86ShuffleChain(), CompactSwizzlableVector(), convertLocVTToValVT(), ExtendToType(), FoldCONCAT_VECTORS(), FoldConstantArithmetic(), FoldConstantVectorArithmetic(), GenerateTBL(), getBuildVectorSplat(), getConstant(), getConstVector(), getGeneralPermuteNode(), getNode(), getTargetVShiftByConstNode(), getTargetVShiftNode(), LowerBITCAST(), LowerBITREVERSE(), LowerBITREVERSE_XOP(), lowerBuildVectorToBitOp(), llvm::AMDGPUTargetLowering::LowerCONCAT_VECTORS(), llvm::AMDGPUTargetLowering::LowerEXTRACT_SUBVECTOR(), llvm::SITargetLowering::LowerFormalArguments(), llvm::AMDGPUTargetLowering::LowerFP64_TO_INT(), llvm::AMDGPUTargetLowering::LowerFTRUNC(), lowerMSABinaryBitImmIntr(), lowerMSASplatZExt(), LowerShift(), llvm::AMDGPUTargetLowering::LowerSIGN_EXTEND_INREG(), llvm::AMDGPUTargetLowering::LowerUDIVREM64(), lowerVECTOR_SHUFFLE_VSHF(), LowerVECTOR_SHUFFLEv8i8(), LowerVectorCTLZInRegLUT(), LowerVectorCTPOPInRegLUT(), lowerVectorShuffleAsBitBlend(), lowerVectorShuffleAsBitMask(), lowerVectorShuffleAsBlend(), lowerVectorShuffleAsBlendOfPSHUFBs(), lowerVectorShuffleAsSpecificZeroOrAnyExtend(), lowerVectorShuffleWithPSHUFB(), LowerVSETCC(), NormalizeBuildVector(), PerformBUILD_VECTORCombine(), llvm::R600TargetLowering::PerformDAGCombine(), llvm::AMDGPUTargetLowering::PerformDAGCombine(), llvm::AMDGPUTargetLowering::performShlCombine(), llvm::AMDGPUTargetLowering::performSraCombine(), llvm::AMDGPUTargetLowering::performSrlCombine(), ReorganizeVector(), ReplaceINTRINSIC_W_CHAIN(), ReplaceLoadVector(), llvm::X86TargetLowering::ReplaceNodeResults(), llvm::TargetLowering::scalarizeVectorLoad(), skipExtensionForVectorMULL(), SkipExtensionForVMULL(), splitAndLowerVectorShuffle(), llvm::AMDGPUTargetLowering::splitBinaryBitConstantOpImpl(), tryBuildVectorShuffle(), tryToFoldExtendOfConstant(), and UnrollVectorOp().
|
inline |
Return a new CALLSEQ_END node, which always must have a glue result (to ensure it's not CSE'd).
CALLSEQ_END does not have a useful SDLoc.
Definition at line 724 of file SelectionDAG.h.
References llvm::ISD::CALLSEQ_END, llvm::SDValue::getNode(), getNode(), getVTList(), llvm::MVT::Glue, llvm::MVT::Other, and llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back().
Referenced by llvm::HexagonTargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::NVPTXTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), llvm::SparcTargetLowering::LowerGlobalTLSAddress(), and PrepareTailCall().
Return a new CALLSEQ_START node, which always must have a glue result (to ensure it's not CSE'd).
CALLSEQ_START does not have a useful SDLoc.
Definition at line 715 of file SelectionDAG.h.
References llvm::ISD::CALLSEQ_START, getNode(), getVTList(), llvm::MVT::Glue, and llvm::MVT::Other.
Referenced by llvm::HexagonTargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::NVPTXTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), and llvm::SparcTargetLowering::LowerGlobalTLSAddress().
| SDValue SelectionDAG::getCommutedVectorShuffle | ( | const ShuffleVectorSDNode & | SV | ) |
Returns an ISD::VECTOR_SHUFFLE node semantically equivalent to the shuffle node in input but with swapped operands.
Example: shuffle A, B, <0,5,2,7> -> shuffle B, A, <4,1,6,3>
Definition at line 1622 of file SelectionDAG.cpp.
References llvm::ShuffleVectorSDNode::commuteMask(), llvm::ShuffleVectorSDNode::getMask(), llvm::SDNode::getOperand(), llvm::SDNode::getSimpleValueType(), and getVectorShuffle().
Referenced by lowerVectorShuffle().
| SDValue SelectionDAG::getCondCode | ( | ISD::CondCode | Cond | ) |
Definition at line 1434 of file SelectionDAG.cpp.
References N.
Referenced by getSelectCC(), getSetCC(), LowerVSETCC(), and llvm::TargetLowering::softenSetCCOperands().
| SDValue SelectionDAG::getConstant | ( | uint64_t | Val, |
| const SDLoc & | DL, | ||
| EVT | VT, | ||
| bool | isTarget = false, |
||
| bool | isOpaque = false |
||
| ) |
Create a ConstantSDNode wrapping a constant value.
If VT is a vector type, the constant is splatted into a BUILD_VECTOR.
If only legal types can be produced, this does the necessary transformations (e.g., if the vector element type is illegal).
Definition at line 1079 of file SelectionDAG.cpp.
References assert(), llvm::EVT::getScalarType(), and llvm::EVT::getSizeInBits().
Referenced by AddCombineBUILD_VECTORToVPADDL(), AddCombineToVPADD(), AddCombineVUZPToVPADDL(), addIPMSequence(), adjustForSubtraction(), adjustForTestUnderMask(), adjustICmpTruncate(), adjustSubwordCmp(), adjustZeroCmp(), bitcastf32Toi32(), BuildExactSDIV(), BuildIntrinsicOp(), llvm::SITargetLowering::buildRSRC(), llvm::PPCTargetLowering::BuildSDIVPow2(), BuildSplatI(), llvm::TargetLowering::BuildUDIV(), buildVector(), BuildVectorFromScalar(), ChangeVSETULTtoVSETULE(), clampDynamicVectorIndex(), combineAcrossLanesIntrinsic(), combineADC(), combineAnd(), CombineBaseUpdate(), combineBitcastForMaskedOp(), combineBrCond(), combineCMov(), combineCompareEqual(), combineExtractVectorElt(), combineIntegerAbs(), combineLockSub(), combineMaskedLoad(), combineMaskedStore(), combineMul(), combinePCMPAnd1(), combineSelect(), combineSelectOfTwoConstants(), combineSetCC(), combineSext(), combineShiftLeft(), combineShiftRightAlgebraic(), combineSub(), combineTargetShuffle(), combineVectorTruncationWithPACKSS(), combineVectorTruncationWithPACKUS(), CombineVMOVDRRCandidateWithVecOp(), combineVSelectWithAllOnesOrZeros(), combineX86ShuffleChain(), combineZext(), constantFoldBFE(), ConvertI1VectorToInteger(), convertValVTToLocVT(), CreateCopyOfByValArgument(), createFPCmp(), createGPRPairNode(), createLoadLR(), createPSADBW(), createStoreLR(), detectAVGPattern(), EltsFromConsecutiveLoads(), emitCLC(), EmitCMP(), emitCmp(), emitConditionalComparison(), emitMemMem(), emitSETCC(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForMemchr(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::ARMSelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForMemset(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemset(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrcmp(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrcpy(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrlen(), Expand64BitShift(), ExpandBITCAST(), expandf64Toi32(), llvm::TargetLowering::expandFP_TO_SINT(), llvm::TargetLowering::expandMUL_LOHI(), llvm::TargetLowering::expandUnalignedLoad(), llvm::TargetLowering::expandUnalignedStore(), expandVAArg(), ExtendToType(), extractF64Exponent(), ExtractVectorElements(), FoldConstantArithmetic(), foldMaskAndShiftToExtract(), foldMaskAndShiftToScale(), foldMaskedShiftToScaledMask(), FoldSetCC(), foldXorTruncShiftIntoCmp(), genConstMult(), generateEquivalentSub(), GeneratePerfectShuffle(), GenerateTBL(), getAArch64Cmp(), getAArch64XALUOOp(), getAbsolute(), getARMIndexedAddressParts(), getBoundedStrlen(), getBuildVectorSplat(), getCCResult(), getConstant(), llvm::TargetLowering::getConstTrueVal(), getConstVector(), getCopyFromParts(), getCopyFromPartsVector(), llvm::RegsForValue::getCopyFromRegs(), getCopyToPartsVector(), GetExponent(), getExtendedControlRegister(), getGeneralPermuteNode(), llvm::AMDGPUTargetLowering::getHiHalf64(), getIntPtrConstant(), getLimitedPrecisionExp2(), getLogicalNOT(), llvm::AMDGPUTargetLowering::getLoHalf64(), getMaskNode(), getMemBasePlusOffset(), getMemsetStringVal(), getMemsetValue(), getNode(), getNOT(), getOnesVector(), getPermuteNode(), llvm::AVRTargetLowering::getPostIndexedAddressParts(), llvm::AVRTargetLowering::getPreIndexedAddressParts(), getReadPerformanceCounter(), getReadTimeStampCounter(), getSETCC(), getShuffleScalarElt(), GetSignificand(), getT2IndexedAddressParts(), getTargetConstant(), getTargetVShiftByConstNode(), getTargetVShiftNode(), getV4X86ShuffleImm8ForMask(), llvm::SelectionDAGBuilder::getValueImpl(), llvm::TargetLowering::getVectorElementPointer(), getVShift(), getZeroExtendInReg(), getZeroVector(), llvm::TargetLowering::IncrementMemoryAddress(), initAccumulator(), insert128BitVector(), insert1BitVector(), IntCondCCodeToICC(), isBLACompatibleAddress(), isConditionalZeroOrAllOnes(), IsSingleInstrConstant(), LowerADDC_ADDE_SUBC_SUBE(), LowerAndToBT(), LowerAsSplatVectorLoad(), LowerATOMIC_FENCE(), lowerAtomicArith(), LowerBITREVERSE(), LowerBITREVERSE_XOP(), LowerBoolVSETCC_AVX512(), llvm::LanaiTargetLowering::LowerBR_CC(), LowerBR_CC(), llvm::HexagonTargetLowering::LowerBUILD_VECTOR(), LowerBuildVectorv16i8(), llvm::HexagonTargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::NVPTXTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), LowerCallResult(), llvm::TargetLowering::LowerCallTo(), llvm::TargetLowering::lowerCmpEqZeroToCtlzSrl(), llvm::HexagonTargetLowering::LowerCONCAT_VECTORS(), llvm::AMDGPUTargetLowering::LowerCTLZ(), LowerCTLZ(), LowerCTTZ(), llvm::AMDGPUTargetLowering::LowerDIVREM24(), llvm::HexagonTargetLowering::LowerDYNAMIC_STACKALLOC(), llvm::AMDGPUTargetLowering::LowerDYNAMIC_STACKALLOC(), LowerDYNAMIC_STACKALLOC(), LowerEXTEND_VECTOR_INREG(), LowerExtended1BitVectorLoad(), LowerExtendedLoad(), llvm::HexagonTargetLowering::LowerEXTRACT_VECTOR(), LowerF128Load(), LowerF128Store(), lowerFCOPYSIGN32(), lowerFCOPYSIGN64(), LowerFGETSIGN(), llvm::R600TargetLowering::LowerFormalArguments(), llvm::NVPTXTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_64(), llvm::AMDGPUTargetLowering::LowerFP_TO_FP16(), llvm::AMDGPUTargetLowering::LowerFROUND64(), llvm::AMDGPUTargetLowering::LowerFTRUNC(), llvm::AMDGPUTargetLowering::LowerGlobalAddress(), llvm::HexagonTargetLowering::LowerGLOBALADDRESS(), LowerHorizontalByteSum(), llvm::HexagonTargetLowering::LowerINSERT_VECTOR(), llvm::AMDGPUTargetLowering::LowerINT_TO_FP32(), llvm::AMDGPUTargetLowering::LowerINT_TO_FP64(), LowerInterruptReturn(), llvm::HexagonTargetLowering::LowerINTRINSIC_VOID(), LowerINTRINSIC_W_CHAIN(), LowerINTRINSIC_WO_CHAIN(), LowerIntVSETCC_AVX512(), LowerLabelRef(), llvm::HexagonTargetLowering::LowerLOAD(), llvm::MipsTargetLowering::lowerLOAD(), LowerMemOpCallTo(), lowerMSABinaryBitImmIntr(), lowerMSABitClear(), lowerMSABitClearImm(), lowerMSASplatImm(), lowerMSASplatZExt(), llvm::LanaiTargetLowering::LowerMUL(), LowerMUL(), LowerMUL_LOHI(), lowerMUL_LOHI32(), LowerMULH(), llvm::R600TargetLowering::LowerOperation(), llvm::HexagonTargetLowering::LowerPREFETCH(), LowerPREFETCH(), llvm::SITargetLowering::LowerReturn(), llvm::NVPTXTargetLowering::LowerReturn(), llvm::SparcTargetLowering::LowerReturn_32(), llvm::SparcTargetLowering::LowerReturn_64(), llvm::MSP430TargetLowering::LowerRETURNADDR(), llvm::HexagonTargetLowering::LowerRETURNADDR(), LowerReverse_VECTOR_SHUFFLEv16i8_v8i16(), LowerRotate(), LowerScalarImmediateShift(), LowerSDIV_v4i16(), LowerSDIV_v4i8(), llvm::AMDGPUTargetLowering::LowerSDIVREM(), llvm::LanaiTargetLowering::LowerSELECT_CC(), LowerSELECT_CC(), llvm::LanaiTargetLowering::LowerSETCC(), llvm::MSP430TargetLowering::LowerSETCC(), llvm::LanaiTargetLowering::LowerSETCCE(), LowerSETCCE(), LowerShift(), LowerShiftParts(), llvm::LanaiTargetLowering::LowerSHL_PARTS(), llvm::LanaiTargetLowering::LowerSRL_PARTS(), llvm::SelectionDAGBuilder::LowerStatepoint(), LowerTruncateVecI1(), LowerTruncatingStore(), LowerUDIV(), llvm::AMDGPUTargetLowering::LowerUDIVREM(), llvm::AMDGPUTargetLowering::LowerUDIVREM64(), lowerUINT_TO_FP_v2i32(), lowerUINT_TO_FP_vXi32(), LowerUMULO_SMULO(), lowerV16I8VectorShuffle(), lowerV2F64VectorShuffle(), lowerV2X128VectorShuffle(), lowerV4F64VectorShuffle(), lowerV4X128VectorShuffle(), lowerV8F64VectorShuffle(), llvm::HexagonTargetLowering::LowerVECTOR_SHUFFLE(), LowerVECTOR_SHUFFLE(), lowerVECTOR_SHUFFLE_SHF(), LowerVECTOR_SHUFFLEv8i8(), LowerVectorCTLZ_AVX512(), LowerVectorCTLZInRegLUT(), LowerVectorCTPOPBitmath(), LowerVectorCTPOPInRegLUT(), lowerVectorSETCC(), lowerVectorShuffleAsBitBlend(), lowerVectorShuffleAsBitMask(), lowerVectorShuffleAsBlend(), lowerVectorShuffleAsBlendOfPSHUFBs(), lowerVectorShuffleAsByteRotate(), lowerVectorShuffleAsElementInsertion(), lowerVectorShuffleAsInsertPS(), lowerVectorShuffleAsLanePermuteAndBlend(), lowerVectorShuffleAsRotate(), lowerVectorShuffleAsShift(), lowerVectorShuffleAsSpecificZeroOrAnyExtend(), lowerVectorShuffleAsTruncBroadcast(), lowerVectorShuffleToEXPAND(), lowerVectorShuffleWithPSHUFB(), lowerVectorShuffleWithSHUFPD(), lowerVectorShuffleWithSSE4A(), LowerVSETCC(), LowerWRITE_REGISTER(), lowerX86CmpEqZeroToCtlzSrl(), LowerXALUO(), LowerXOR(), LowerZERO_EXTEND_AVX512(), llvm::SparcTargetLowering::makeAddress(), MaterializeSETB(), memsetStore(), NormalizeBuildVector(), OptimizeConditionalInDecrement(), Passv64i1ArgInRegs(), performANDCombine(), PerformARMBUILD_VECTORCombine(), PerformBFICombine(), performBitcastCombine(), llvm::ARMTargetLowering::PerformCMOVToBFICombine(), performConcatVectorsCombine(), llvm::R600TargetLowering::PerformDAGCombine(), llvm::AMDGPUTargetLowering::PerformDAGCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), performDSPShiftCombine(), performExtendCombine(), performFDivCombine(), performFpToIntCombine(), performIntegerAbsCombine(), PerformIntrinsicCombine(), performMulCombine(), PerformMULCombine(), performORCombine(), PerformORCombine(), PerformSELECTCombine(), performSetccAddFolding(), PerformShiftCombine(), llvm::AMDGPUTargetLowering::performShlCombine(), llvm::AMDGPUTargetLowering::performSraCombine(), llvm::AMDGPUTargetLowering::performSrlCombine(), PerformSTORECombine(), performTBZCombine(), PerformVCVTCombine(), PerformVDIVCombine(), PerformVDUPCombine(), PrepareCall(), promoteExtBeforeAdd(), llvm::AArch64TargetLowering::ReconstructShuffle(), recoverFramePointer(), llvm::AVRTargetLowering::ReplaceNodeResults(), llvm::X86TargetLowering::ReplaceNodeResults(), ReplaceREADCYCLECOUNTER(), llvm::TargetLowering::scalarizeVectorLoad(), llvm::TargetLowering::scalarizeVectorStore(), ShrinkLoadReplaceStoreWithStore(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifySetCC(), skipExtensionForVectorMULL(), SkipExtensionForVMULL(), llvm::TargetLowering::softenSetCCOperands(), llvm::AMDGPUTargetLowering::split64BitValue(), llvm::AMDGPUTargetLowering::splitBinaryBitConstantOpImpl(), splitInt128(), splitStores(), splitStoreSplat(), SplitVector(), llvm::AMDGPUTargetLowering::SplitVectorLoad(), llvm::AMDGPUTargetLowering::SplitVectorStore(), TranslateX86CC(), tryBuildVectorReplicate(), tryCombineShiftImm(), tryCombineToEXTR(), tryExtendDUPToExtractHigh(), tryFoldToZero(), tryFormConcatFromShuffle(), tryLowerToSLI(), tryMatchAcrossLaneShuffleForReduction(), TryMULWIDECombine(), tryToFoldExtendOfConstant(), UnpackFromArgumentSlot(), UnrollVectorOp(), llvm::SelectionDAGBuilder::visitBitTestCase(), llvm::SelectionDAGBuilder::visitBitTestHeader(), llvm::SelectionDAGBuilder::visitJumpTableHeader(), llvm::SelectionDAGBuilder::visitSPDescriptorParent(), llvm::SelectionDAGBuilder::visitSwitchCase(), WidenMaskArithmetic(), WidenVector(), WinDBZCheckDenominator(), and XFormVExtractWithShuffleIntoLoad().
| SDValue SelectionDAG::getConstant | ( | const APInt & | Val, |
| const SDLoc & | DL, | ||
| EVT | VT, | ||
| bool | isTarget = false, |
||
| bool | isOpaque = false |
||
| ) |
Definition at line 1088 of file SelectionDAG.cpp.
References llvm::ConstantInt::get(), and getConstant().
| SDValue SelectionDAG::getConstant | ( | const ConstantInt & | Val, |
| const SDLoc & | DL, | ||
| EVT | VT, | ||
| bool | isTarget = false, |
||
| bool | isOpaque = false |
||
| ) |
Definition at line 1093 of file SelectionDAG.cpp.
References llvm::FoldingSetNodeID::AddBoolean(), AddNodeIDNode(), llvm::FoldingSetNodeID::AddPointer(), assert(), llvm::ISD::BITCAST, llvm::ISD::Constant, llvm::SmallVectorTemplateCommon< T >::end(), llvm::ConstantInt::get(), llvm::ConstantInt::getBitWidth(), getBuildVector(), getConstant(), getContext(), getDataLayout(), llvm::SDLoc::getDebugLoc(), getNode(), llvm::EVT::getScalarType(), llvm::EVT::getSizeInBits(), getSplatBuildVector(), llvm::TargetLoweringBase::getTypeAction(), llvm::TargetLoweringBase::getTypeToTransformTo(), llvm::ConstantInt::getValue(), llvm::EVT::getVectorNumElements(), llvm::EVT::getVectorVT(), getVTList(), i, llvm::SmallVectorImpl< T >::insert(), llvm::DataLayout::isBigEndian(), llvm::EVT::isInteger(), llvm::EVT::isVector(), llvm::APInt::lshr(), NewNodesMustHaveLegalTypes, llvm::None, llvm::SmallVectorTemplateBase< T, isPodLike >::push_back(), llvm::reverse(), llvm::ISD::TargetConstant, llvm::TargetLoweringBase::TypeExpandInteger, llvm::TargetLoweringBase::TypePromoteInteger, and llvm::APInt::zextOrTrunc().
| SDDbgValue * SelectionDAG::getConstantDbgValue | ( | MDNode * | Var, |
| MDNode * | Expr, | ||
| const Value * | C, | ||
| uint64_t | Off, | ||
| const DebugLoc & | DL, | ||
| unsigned | O | ||
| ) |
Definition at line 6414 of file SelectionDAG.cpp.
References assert(), and llvm::SDDbgInfo::getAlloc().
Create a ConstantFPSDNode wrapping a constant value.
If VT is a vector type, the constant is splatted into a BUILD_VECTOR.
If only legal types can be produced, this does the necessary transformations (e.g., if the vector element type is illegal). The forms that take a double should only be used for simple constants that can be exactly represented in VT. No checks are made.
Definition at line 1221 of file SelectionDAG.cpp.
References llvm::lltok::APFloat, llvm::APFloat::convert(), EVTToAPFloatSemantics(), llvm::MVT::f128, llvm::MVT::f16, llvm::MVT::f32, llvm::MVT::f64, llvm::MVT::f80, llvm::EVT::getScalarType(), llvm_unreachable, llvm::MVT::ppcf128, and llvm::APFloatBase::rmNearestTiesToEven.
Referenced by llvm::X86TargetLowering::BuildFILD(), combineFneg(), EltsFromConsecutiveLoads(), ExpandPowI(), getConstantFP(), getConstVector(), getF32Constant(), getMemsetStringVal(), getMemsetValue(), GetNegatedExpression(), getNode(), getShuffleScalarElt(), getTargetConstantFP(), llvm::SelectionDAGBuilder::getValueImpl(), getZeroVector(), LowerFABSorFNEG(), llvm::AMDGPUTargetLowering::LowerFCEIL(), LowerFCOPYSIGN(), llvm::AMDGPUTargetLowering::LowerFFLOOR(), llvm::AMDGPUTargetLowering::LowerFP64_TO_INT(), llvm::AMDGPUTargetLowering::LowerFRINT(), llvm::AMDGPUTargetLowering::LowerFROUND32(), llvm::AMDGPUTargetLowering::LowerFROUND64(), lowerUINT_TO_FP_v2i32(), lowerUINT_TO_FP_vXi32(), llvm::X86TargetLowering::ReplaceNodeResults(), and XFormVExtractWithShuffleIntoLoad().
| SDValue SelectionDAG::getConstantFP | ( | const APFloat & | Val, |
| const SDLoc & | DL, | ||
| EVT | VT, | ||
| bool | isTarget = false |
||
| ) |
Definition at line 1185 of file SelectionDAG.cpp.
References llvm::ConstantFP::get(), getConstantFP(), and getContext().
| SDValue SelectionDAG::getConstantFP | ( | const ConstantFP & | CF, |
| const SDLoc & | DL, | ||
| EVT | VT, | ||
| bool | isTarget = false |
||
| ) |
Definition at line 1190 of file SelectionDAG.cpp.
References AddNodeIDNode(), llvm::FoldingSetNodeID::AddPointer(), assert(), llvm::ISD::ConstantFP, llvm::SDLoc::getDebugLoc(), llvm::EVT::getScalarType(), getSplatBuildVector(), getVTList(), llvm::EVT::isFloatingPoint(), llvm::EVT::isVector(), llvm::None, and llvm::ISD::TargetConstantFP.
| SDValue SelectionDAG::getConstantPool | ( | const Constant * | C, |
| EVT | VT, | ||
| unsigned | Align = 0, |
||
| int | Offs = 0, |
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| bool | isT = false, |
||
| unsigned char | TargetFlags = 0 |
||
| ) |
Definition at line 1306 of file SelectionDAG.cpp.
References llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), llvm::FoldingSetNodeID::AddPointer(), assert(), C, llvm::ISD::ConstantPool, E, llvm::DataLayout::getABITypeAlignment(), getDataLayout(), llvm::MachineFunction::getFunction(), llvm::DataLayout::getPrefTypeAlignment(), llvm::Value::getType(), getVTList(), llvm::None, Offset, llvm::Function::optForSize(), and llvm::ISD::TargetConstantPool.
Referenced by llvm::X86TargetLowering::BuildFILD(), getAddressForMemoryInput(), getTargetConstantPool(), and LowerVectorBroadcast().
| SDValue SelectionDAG::getConstantPool | ( | MachineConstantPoolValue * | C, |
| EVT | VT, | ||
| unsigned | Align = 0, |
||
| int | Offs = 0, |
||
| bool | isT = false, |
||
| unsigned char | TargetFlags = 0 |
||
| ) |
Definition at line 1335 of file SelectionDAG.cpp.
References llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), llvm::MachineConstantPoolValue::addSelectionDAGCSEId(), assert(), C, llvm::ISD::ConstantPool, E, getDataLayout(), llvm::DataLayout::getPrefTypeAlignment(), llvm::MachineConstantPoolValue::getType(), getVTList(), llvm::None, Offset, and llvm::ISD::TargetConstantPool.
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Definition at line 333 of file SelectionDAG.h.
References Context.
Referenced by AddCombineVUZPToVPADDL(), llvm::RegsForValue::AddInlineAsmOperands(), llvm::X86TargetLowering::BuildFILD(), BuildVectorFromScalar(), canFoldInAddressingMode(), combineConcatVectorOfScalars(), combineFMinNumFMaxNum(), combineLoad(), combineMaskedLoad(), combineMaskedStore(), combineSIntToFP(), combineStore(), combineToExtendVectorInReg(), combineUIntToFP(), combineVectorTruncation(), CombineVMOVDRRCandidateWithVecOp(), combineVSelectWithAllOnesOrZeros(), CreateStackTemporary(), llvm::SelectionDAGBuilder::EmitBranchForMergedCondition(), emitNonHSAIntrinsicError(), emitRemovedIntrinsicError(), llvm::ARMSelectionDAGInfo::EmitSpecializedLibcall(), llvm::XCoreSelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::HexagonSelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::AArch64SelectionDAGInfo::EmitTargetCodeForMemset(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemset(), llvm::TargetLowering::expandFP_TO_SINT(), llvm::TargetLowering::expandUnalignedLoad(), llvm::TargetLowering::expandUnalignedStore(), expandVAArg(), extractSubVector(), fail(), FindMemType(), FoldConstantVectorArithmetic(), foldXorTruncShiftIntoCmp(), getConstant(), getConstantFP(), getCopyFromParts(), getCopyFromPartsVector(), llvm::SelectionDAGBuilder::getCopyFromRegs(), llvm::RegsForValue::getCopyFromRegs(), getCopyToParts(), getCopyToPartsVector(), llvm::RegsForValue::getCopyToRegs(), getEVTAlignment(), getMemcpy(), getMemcpyLoadsAndStores(), getMemmove(), getMemmoveLoadsAndStores(), getMemset(), getMemsetStringVal(), getMemsetValue(), GetRegistersForValue(), GetSplitDestVTs(), getUniformBase(), llvm::SelectionDAGBuilder::getValueImpl(), llvm::TargetLowering::IncrementMemoryAddress(), llvm::SelectionDAGBuilder::init(), llvm::X86TargetLowering::LowerAsmOperandForConstraint(), LowerAsSplatVectorLoad(), LowerBITCAST(), llvm::AMDGPUTargetLowering::LowerCall(), llvm::HexagonTargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), llvm::HexagonTargetLowering::LowerCallResult(), llvm::SelectionDAGBuilder::LowerCallSiteWithDeoptBundleImpl(), llvm::AMDGPUTargetLowering::LowerCTLZ(), llvm::AMDGPUTargetLowering::LowerDIVREM24(), llvm::AMDGPUTargetLowering::LowerDYNAMIC_STACKALLOC(), LowerExtendedLoad(), llvm::SparcTargetLowering::LowerF128_LibCallArg(), llvm::SparcTargetLowering::LowerF128Compare(), llvm::SparcTargetLowering::LowerF128Op(), llvm::AMDGPUTargetLowering::LowerFCEIL(), llvm::AMDGPUTargetLowering::LowerFFLOOR(), llvm::R600TargetLowering::LowerFormalArguments(), llvm::HexagonTargetLowering::LowerFormalArguments(), llvm::SITargetLowering::LowerFormalArguments(), llvm::SystemZTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::SparcTargetLowering::LowerFormalArguments_64(), LowerFPOWI(), llvm::AMDGPUTargetLowering::LowerFRINT(), llvm::AMDGPUTargetLowering::LowerFROUND32(), llvm::AMDGPUTargetLowering::LowerFROUND64(), LowerFSINCOS(), llvm::AMDGPUTargetLowering::LowerFTRUNC(), llvm::AMDGPUTargetLowering::LowerGlobalAddress(), LowerINSERT_SUBVECTOR(), llvm::AMDGPUTargetLowering::LowerINT_TO_FP32(), llvm::SelectionDAGBuilder::lowerRangeToAssertZExt(), llvm::SITargetLowering::LowerReturn(), llvm::HexagonTargetLowering::LowerReturn(), llvm::SystemZTargetLowering::LowerReturn(), llvm::SparcTargetLowering::LowerReturn_32(), llvm::SparcTargetLowering::LowerReturn_64(), llvm::AMDGPUTargetLowering::LowerSDIVREM(), llvm::SelectionDAGBuilder::LowerStatepoint(), llvm::TargetLowering::LowerToTLSEmulatedModel(), LowerToTLSExecModel(), llvm::AMDGPUTargetLowering::LowerUDIVREM64(), LowerVECTOR_SHUFFLE(), LowerVectorBroadcast(), LowerVSETCC(), llvm::TargetLowering::makeLibCall(), PerformARMBUILD_VECTORCombine(), PerformBUILD_VECTORCombine(), llvm::AMDGPUTargetLowering::PerformDAGCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), performExtendCombine(), PerformInsertEltCombine(), llvm::AMDGPUTargetLowering::performLoadCombine(), performSelectCombine(), llvm::AMDGPUTargetLowering::performStoreCombine(), PerformSTORECombine(), promoteToConstantPool(), llvm::AArch64TargetLowering::ReconstructShuffle(), reduceVMULWidth(), ReplaceLoadVector(), llvm::PPCTargetLowering::ReplaceNodeResults(), llvm::X86TargetLowering::ReplaceNodeResults(), llvm::TargetLowering::SimplifySetCC(), llvm::TargetLowering::softenSetCCOperands(), splitStores(), truncateVectorCompareWithPACKSS(), tryFormConcatFromShuffle(), UnrollVectorOp(), llvm::TargetLowering::verifyReturnAddressArgumentIsConstant(), llvm::SelectionDAGBuilder::visitBitTestCase(), llvm::SelectionDAGBuilder::visitBitTestHeader(), llvm::SelectionDAGBuilder::visitJumpTableHeader(), llvm::SelectionDAGBuilder::visitSPDescriptorParent(), llvm::SelectionDAGBuilder::visitSwitchCase(), and XFormVExtractWithShuffleIntoLoad().
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Definition at line 610 of file SelectionDAG.h.
References llvm::ISD::CopyFromReg, getNode(), getRegister(), getVTList(), and llvm::MVT::Other.
Referenced by llvm::SITargetLowering::CreateLiveInRegister(), llvm::RegsForValue::getCopyFromRegs(), llvm::HexagonTargetLowering::GetDynamicTLSAddr(), getExtendedControlRegister(), getFRAMEADDR(), getReadPerformanceCounter(), getReadTimeStampCounter(), GetTLSADDR(), getv64i1Argument(), llvm::HexagonTargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), llvm::HexagonTargetLowering::LowerCallResult(), LowerCallResult(), LowerCMP_SWAP(), llvm::LanaiTargetLowering::LowerDYNAMIC_STACKALLOC(), LowerDYNAMIC_STACKALLOC(), llvm::R600TargetLowering::LowerFormalArguments(), llvm::HexagonTargetLowering::LowerFormalArguments(), llvm::SITargetLowering::LowerFormalArguments(), llvm::SystemZTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::SparcTargetLowering::LowerFormalArguments_64(), llvm::LanaiTargetLowering::LowerFRAMEADDR(), llvm::MSP430TargetLowering::LowerFRAMEADDR(), llvm::HexagonTargetLowering::LowerFRAMEADDR(), llvm::SparcTargetLowering::LowerGlobalTLSAddress(), LowerINTRINSIC_W_CHAIN(), LowerINTRINSIC_WO_CHAIN(), llvm::SparcTargetLowering::LowerReturn_32(), llvm::LanaiTargetLowering::LowerRETURNADDR(), llvm::HexagonTargetLowering::LowerRETURNADDR(), LowerRETURNADDR(), llvm::MSP430TargetLowering::LowerSETCC(), llvm::HexagonTargetLowering::LowerToTLSInitialExecModel(), llvm::HexagonTargetLowering::LowerToTLSLocalExecModel(), performDivRemCombine(), llvm::X86TargetLowering::ReplaceNodeResults(), llvm::AVRDAGToDAGISel::SelectInlineAsmMemoryOperand(), llvm::SelectionDAGBuilder::visitBitTestCase(), and llvm::SelectionDAGBuilder::visitJumpTable().
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Definition at line 619 of file SelectionDAG.h.
References llvm::ISD::CopyFromReg, llvm::SDValue::getNode(), getNode(), getRegister(), getVTList(), llvm::MVT::Glue, llvm::makeArrayRef(), and llvm::MVT::Other.
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Definition at line 584 of file SelectionDAG.h.
References llvm::ISD::CopyToReg, getNode(), getRegister(), llvm::SDValue::getValueType(), and llvm::MVT::Other.
Referenced by llvm::X86SelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemset(), llvm::RegsForValue::getCopyToRegs(), getExtendedControlRegister(), llvm::MipsTargetLowering::getOpndList(), getReadPerformanceCounter(), llvm::HexagonTargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), llvm::HexagonTargetLowering::LowerCallResult(), llvm::SelectionDAGBuilder::LowerCallTo(), LowerCMP_SWAP(), llvm::LanaiTargetLowering::LowerDYNAMIC_STACKALLOC(), LowerDYNAMIC_STACKALLOC(), llvm::HexagonTargetLowering::LowerEH_RETURN(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::SparcTargetLowering::LowerGlobalTLSAddress(), llvm::SITargetLowering::LowerReturn(), llvm::HexagonTargetLowering::LowerReturn(), llvm::SystemZTargetLowering::LowerReturn(), llvm::SparcTargetLowering::LowerReturn_32(), llvm::SparcTargetLowering::LowerReturn_64(), LowerSETCCE(), llvm::HexagonTargetLowering::LowerToTLSGeneralDynamicModel(), LowerToTLSGeneralDynamicModel32(), LowerToTLSLocalDynamicModel(), PrepareCall(), llvm::X86TargetLowering::ReplaceNodeResults(), llvm::SelectionDAGISel::SelectCodeCommon(), llvm::AVRDAGToDAGISel::SelectInlineAsmMemoryOperand(), llvm::SelectionDAGBuilder::visitBitTestHeader(), and llvm::SelectionDAGBuilder::visitJumpTableHeader().
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Definition at line 593 of file SelectionDAG.h.
References llvm::ISD::CopyToReg, llvm::SDValue::getNode(), getNode(), getRegister(), llvm::SDValue::getValueType(), getVTList(), llvm::MVT::Glue, llvm::makeArrayRef(), and llvm::MVT::Other.
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Definition at line 602 of file SelectionDAG.h.
References llvm::ISD::CopyToReg, llvm::SDValue::getNode(), getNode(), getVTList(), llvm::MVT::Glue, llvm::makeArrayRef(), N, and llvm::MVT::Other.
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Definition at line 328 of file SelectionDAG.h.
References llvm::MachineFunction::getDataLayout().
Referenced by AddCombineBUILD_VECTORToVPADDL(), AddCombineToVPADD(), AddCombineVUZPToVPADDL(), addStackMapLiveVars(), BuildExactSDIV(), llvm::X86TargetLowering::BuildFILD(), llvm::TargetLowering::BuildUDIV(), BuildVectorFromScalar(), canFoldInAddressingMode(), combineExtractVectorElt(), combineFMinNumFMaxNum(), combineLoad(), combineStore(), combineVSelectWithAllOnesOrZeros(), computeKnownBits(), llvm::SelectionDAGBuilder::CopyValueToVirtualRegister(), CreateStackTemporary(), llvm::ARMSelectionDAGInfo::EmitSpecializedLibcall(), llvm::HexagonSelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::XCoreSelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::AArch64SelectionDAGInfo::EmitTargetCodeForMemset(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemset(), ExpandBITCAST(), llvm::TargetLowering::expandFP_TO_SINT(), llvm::TargetLowering::expandMUL_LOHI(), llvm::TargetLowering::expandUnalignedLoad(), llvm::TargetLowering::expandUnalignedStore(), expandVAArg(), expandVACopy(), ExtractVectorElements(), FindOptimalMemOpLowering(), foldXorTruncShiftIntoCmp(), getAddressForMemoryInput(), getConstant(), getConstantPool(), getCopyFromParts(), getCopyFromPartsVector(), llvm::SelectionDAGBuilder::getCopyFromRegs(), getCopyToParts(), getCopyToPartsVector(), getEVTAlignment(), GetExponent(), getGlobalAddress(), llvm::MipsDAGToDAGISel::getGlobalBaseReg(), getIntPtrConstant(), getLimitedPrecisionExp2(), getLoadStackGuard(), getMemcpy(), getMemcpyLoadsAndStores(), getMemmove(), getMemmoveLoadsAndStores(), getMemset(), getMemsetStringVal(), llvm::X86TargetLowering::getPICJumpTableRelocBase(), llvm::PPCTargetLowering::getPICJumpTableRelocBase(), llvm::TargetLowering::getPICJumpTableRelocBase(), getPPCf128HiElementSelector(), llvm::X86TargetLowering::getReturnAddressFrameIndex(), getShiftAmountOperand(), llvm::SparcTargetLowering::getSRetArgSize(), llvm::SelectionDAGBuilder::getValueImpl(), llvm::TargetLowering::getVectorElementPointer(), getVShift(), llvm::PPC::getVSPLTImmediate(), InferPtrAlignment(), llvm::SelectionDAGBuilder::init(), isBLACompatibleAddress(), isExtendedBUILD_VECTOR(), isNEONModifiedImm(), IsPredicateKnownToFail(), llvm::PPC::isVMRGEOShuffleMask(), llvm::PPC::isVMRGHShuffleMask(), llvm::PPC::isVMRGLShuffleMask(), llvm::PPC::isVPKUDUMShuffleMask(), llvm::PPC::isVPKUHUMShuffleMask(), llvm::PPC::isVPKUWUMShuffleMask(), llvm::PPC::isVSLDOIShuffleMask(), llvm::MSP430TargetLowering::LowerBlockAddress(), llvm::HexagonTargetLowering::LowerBlockAddress(), llvm::NVPTXTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), llvm::SelectionDAGBuilder::LowerCallTo(), llvm::TargetLowering::LowerCallTo(), llvm::LanaiTargetLowering::LowerConstantPool(), llvm::AMDGPUTargetLowering::LowerCTLZ(), llvm::SelectionDAGBuilder::LowerDeoptimizeCall(), llvm::AMDGPUTargetLowering::LowerDIVREM24(), llvm::HexagonTargetLowering::LowerEH_RETURN(), LowerExtendedLoad(), llvm::MSP430TargetLowering::LowerExternalSymbol(), llvm::SparcTargetLowering::LowerF128_LibCallArg(), llvm::SparcTargetLowering::LowerF128Compare(), llvm::SparcTargetLowering::LowerF128Op(), LowerF64Op(), llvm::AMDGPUTargetLowering::LowerFCEIL(), llvm::AMDGPUTargetLowering::LowerFFLOOR(), llvm::SystemZTargetLowering::LowerFormalArguments(), llvm::NVPTXTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), LowerFPOWI(), llvm::AMDGPUTargetLowering::LowerFRINT(), llvm::AMDGPUTargetLowering::LowerFROUND32(), llvm::AMDGPUTargetLowering::LowerFROUND64(), LowerFSINCOS(), llvm::AMDGPUTargetLowering::LowerFTRUNC(), llvm::HexagonTargetLowering::LowerGLOBAL_OFFSET_TABLE(), llvm::LanaiTargetLowering::LowerGlobalAddress(), llvm::MSP430TargetLowering::LowerGlobalAddress(), llvm::AMDGPUTargetLowering::LowerGlobalAddress(), llvm::HexagonTargetLowering::LowerGLOBALADDRESS(), llvm::NVPTXTargetLowering::LowerGlobalAddress(), llvm::SparcTargetLowering::LowerGlobalTLSAddress(), LowerINSERT_SUBVECTOR(), llvm::AMDGPUTargetLowering::LowerINT_TO_FP32(), LowerINTRINSIC_W_CHAIN(), llvm::SparcTargetLowering::LowerINTRINSIC_WO_CHAIN(), LowerINTRINSIC_WO_CHAIN(), llvm::LanaiTargetLowering::LowerJumpTable(), llvm::MSP430TargetLowering::LowerJumpTable(), LowerMemOpCallTo(), LowerMUL_LOHI(), llvm::R600TargetLowering::LowerOperation(), llvm::NVPTXTargetLowering::LowerReturn(), llvm::SparcTargetLowering::LowerReturn_32(), llvm::MSP430TargetLowering::LowerRETURNADDR(), LowerRETURNADDR(), llvm::SelectionDAGBuilder::LowerStatepoint(), llvm::TargetLowering::LowerToTLSEmulatedModel(), llvm::HexagonTargetLowering::LowerToTLSGeneralDynamicModel(), llvm::HexagonTargetLowering::LowerToTLSInitialExecModel(), llvm::HexagonTargetLowering::LowerToTLSLocalExecModel(), llvm::LanaiTargetLowering::LowerVASTART(), llvm::MSP430TargetLowering::LowerVASTART(), LowerVASTART(), LowerVectorBroadcast(), lowerVectorShuffleAsElementInsertion(), llvm::SparcTargetLowering::makeAddress(), llvm::TargetLowering::makeLibCall(), llvm::PPCTargetLowering::PerformDAGCombine(), performMULCombine(), PerformSTORECombine(), PerformVMOVRRDCombine(), PrepareCall(), promoteToConstantPool(), recoverFramePointer(), ReplaceLoadVector(), llvm::PPCTargetLowering::ReplaceNodeResults(), llvm::TargetLowering::scalarizeVectorStore(), llvm::AVRDAGToDAGISel::SelectAddr(), llvm::PPCTargetLowering::SelectAddressRegImm(), llvm::SelectionDAGISel::SelectCodeCommon(), llvm::AVRDAGToDAGISel::selectIndexedLoad(), llvm::AVRDAGToDAGISel::SelectInlineAsmMemoryOperand(), ShrinkLoadReplaceStoreWithStore(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifySetCC(), SkipExtensionForVMULL(), llvm::TargetLowering::softenSetCCOperands(), SplitVector(), UnrollVectorOp(), llvm::SelectionDAGBuilder::visitBitTestCase(), llvm::SelectionDAGBuilder::visitBitTestHeader(), llvm::SelectionDAGBuilder::visitJumpTable(), llvm::SelectionDAGBuilder::visitJumpTableHeader(), llvm::SelectionDAGBuilder::visitSPDescriptorParent(), and XFormVExtractWithShuffleIntoLoad().
| SDDbgValue * SelectionDAG::getDbgValue | ( | MDNode * | Var, |
| MDNode * | Expr, | ||
| SDNode * | N, | ||
| unsigned | R, | ||
| bool | IsIndirect, | ||
| uint64_t | Off, | ||
| const DebugLoc & | DL, | ||
| unsigned | O | ||
| ) |
Creates a SDDbgValue node.
getDbgValue - Creates a SDDbgValue node.
Definition at line 6404 of file SelectionDAG.cpp.
References assert(), and llvm::SDDbgInfo::getAlloc().
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inline |
Get the debug values which reference the given SDNode.
Definition at line 1199 of file SelectionDAG.h.
References llvm::SDDbgInfo::getSDDbgValues().
Referenced by ProcessSDDbgValues().
Definition at line 1660 of file SelectionDAG.cpp.
References AddNodeIDNode(), llvm::FoldingSetNodeID::AddPointer(), E, llvm::ISD::EH_LABEL, llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), getVTList(), and llvm::MVT::Other.
Referenced by llvm::SelectionDAGBuilder::lowerInvokable().
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inline |
Return the token chain corresponding to the entry of the function.
Definition at line 381 of file SelectionDAG.h.
Referenced by llvm::X86TargetLowering::BuildFILD(), clear(), combineExtractVectorElt(), llvm::SelectionDAGBuilder::CopyValueToVirtualRegister(), llvm::SITargetLowering::CreateLiveInRegister(), llvm::MipsTargetLowering::getAddrLocal(), llvm::SelectionDAGBuilder::getCopyFromRegs(), getFLUSHW(), getFRAMEADDR(), getMemCmpLoad(), getStackArgumentTokenFactor(), llvm::SelectionDAGBuilder::getValueImpl(), llvm::AMDGPUTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerF128Compare(), llvm::SparcTargetLowering::LowerF128Op(), llvm::SITargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), LowerFPOWI(), llvm::LanaiTargetLowering::LowerFRAMEADDR(), llvm::MSP430TargetLowering::LowerFRAMEADDR(), llvm::HexagonTargetLowering::LowerFRAMEADDR(), LowerFSINCOS(), llvm::SparcTargetLowering::LowerGlobalTLSAddress(), LowerINTRINSIC_W_CHAIN(), LowerINTRINSIC_WO_CHAIN(), llvm::LanaiTargetLowering::LowerRETURNADDR(), llvm::MSP430TargetLowering::LowerRETURNADDR(), llvm::HexagonTargetLowering::LowerRETURNADDR(), LowerRETURNADDR(), llvm::MSP430TargetLowering::LowerSETCC(), LowerSETCCE(), llvm::SelectionDAGBuilder::LowerStatepoint(), llvm::TargetLowering::LowerToTLSEmulatedModel(), LowerToTLSExecModel(), llvm::HexagonTargetLowering::LowerToTLSGeneralDynamicModel(), LowerToTLSGeneralDynamicModel32(), LowerToTLSGeneralDynamicModel64(), llvm::HexagonTargetLowering::LowerToTLSInitialExecModel(), LowerToTLSLocalDynamicModel(), llvm::HexagonTargetLowering::LowerToTLSLocalExecModel(), LowerVectorBroadcast(), llvm::SparcTargetLowering::makeAddress(), llvm::TargetLowering::makeLibCall(), performDivRemCombine(), llvm::SelectionDAGISel::SelectCodeCommon(), and llvm::SelectionDAGBuilder::visitSPDescriptorParent().
Compute the default alignment value for the given type.
Definition at line 856 of file SelectionDAG.cpp.
References llvm::PointerType::get(), llvm::DataLayout::getABITypeAlignment(), getContext(), getDataLayout(), llvm::Type::getInt8Ty(), llvm::EVT::getTypeForEVT(), and llvm::MVT::iPTR.
Referenced by getAtomic(), getAtomicCmpSwap(), getLoad(), getLoadStackGuard(), getMemIntrinsicNode(), getStore(), and getTruncStore().
Definition at line 1406 of file SelectionDAG.cpp.
Referenced by llvm::ARMSelectionDAGInfo::EmitSpecializedLibcall(), llvm::XCoreSelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::AArch64SelectionDAGInfo::EmitTargetCodeForMemset(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemset(), getMemcpy(), getMemmove(), getMemset(), llvm::SelectionDAGBuilder::LowerDeoptimizeCall(), llvm::SparcTargetLowering::LowerF128Compare(), llvm::SparcTargetLowering::LowerF128Op(), LowerFPOWI(), LowerFSINCOS(), llvm::TargetLowering::LowerToTLSEmulatedModel(), and llvm::TargetLowering::makeLibCall().
| SDValue SelectionDAG::getExtLoad | ( | ISD::LoadExtType | ExtType, |
| const SDLoc & | dl, | ||
| EVT | VT, | ||
| SDValue | Chain, | ||
| SDValue | Ptr, | ||
| MachinePointerInfo | PtrInfo, | ||
| EVT | MemVT, | ||
| unsigned | Alignment = 0, |
||
| MachineMemOperand::Flags | MMOFlags = MachineMemOperand::MONone, |
||
| const AAMDNodes & | AAInfo = AAMDNodes() |
||
| ) |
Definition at line 5405 of file SelectionDAG.cpp.
References getLoad(), getUNDEF(), llvm::SDValue::getValueType(), llvm::RegState::Undef, and llvm::ISD::UNINDEXED.
Referenced by adjustSubwordCmp(), llvm::TargetLowering::expandUnalignedLoad(), llvm::TargetLowering::expandUnalignedStore(), getMemcpyLoadsAndStores(), LowerExtendedLoad(), llvm::NVPTXTargetLowering::LowerFormalArguments(), llvm::HexagonTargetLowering::LowerLOAD(), llvm::SparcTargetLowering::ReplaceNodeResults(), llvm::TargetLowering::scalarizeVectorLoad(), SkipLoadExtensionForVMULL(), and llvm::AMDGPUTargetLowering::SplitVectorLoad().
| SDValue SelectionDAG::getExtLoad | ( | ISD::LoadExtType | ExtType, |
| const SDLoc & | dl, | ||
| EVT | VT, | ||
| SDValue | Chain, | ||
| SDValue | Ptr, | ||
| EVT | MemVT, | ||
| MachineMemOperand * | MMO | ||
| ) |
Definition at line 5416 of file SelectionDAG.cpp.
References getLoad(), getUNDEF(), llvm::SDValue::getValueType(), llvm::RegState::Undef, and llvm::ISD::UNINDEXED.
Definition at line 1272 of file SelectionDAG.cpp.
References llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), E, llvm::ISD::FrameIndex, getVTList(), llvm::None, and llvm::ISD::TargetFrameIndex.
Referenced by llvm::StatepointLoweringState::allocateStackSlot(), llvm::X86TargetLowering::BuildFILD(), CalculateTailCallArgDest(), CreateStackTemporary(), EmitTailCallStoreFPAndRetAddr(), EmitTailCallStoreRetAddr(), getAddressForMemoryInput(), llvm::MSP430TargetLowering::getReturnAddressFrameIndex(), llvm::X86TargetLowering::getReturnAddressFrameIndex(), getTargetFrameIndex(), llvm::SelectionDAGBuilder::getValueImpl(), llvm::SparcTargetLowering::LowerCall_32(), llvm::TargetLowering::LowerCallTo(), llvm::SparcTargetLowering::LowerF128_LibCallArg(), llvm::SparcTargetLowering::LowerF128Op(), llvm::HexagonTargetLowering::LowerFormalArguments(), llvm::SystemZTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::SparcTargetLowering::LowerFormalArguments_64(), LowerINTRINSIC_W_CHAIN(), llvm::LanaiTargetLowering::LowerVASTART(), llvm::MSP430TargetLowering::LowerVASTART(), llvm::HexagonTargetLowering::LowerVASTART(), LowerVASTART(), and llvm::SelectionDAGBuilder::visitSPDescriptorParent().
| SDDbgValue * SelectionDAG::getFrameIndexDbgValue | ( | MDNode * | Var, |
| MDNode * | Expr, | ||
| unsigned | FI, | ||
| uint64_t | Off, | ||
| const DebugLoc & | DL, | ||
| unsigned | O | ||
| ) |
FrameIndex.
Definition at line 6423 of file SelectionDAG.cpp.
References assert(), and llvm::SDDbgInfo::getAlloc().
Return a GLOBAL_OFFSET_TABLE node. This does not have a useful SDLoc.
Definition at line 742 of file SelectionDAG.h.
References getNode(), and llvm::ISD::GLOBAL_OFFSET_TABLE.
Referenced by llvm::TargetLowering::getPICJumpTableRelocBase(), and llvm::HexagonTargetLowering::LowerGLOBALADDRESS().
| SDValue SelectionDAG::getGlobalAddress | ( | const GlobalValue * | GV, |
| const SDLoc & | DL, | ||
| EVT | VT, | ||
| int64_t | offset = 0, |
||
| bool | isTargetGA = false, |
||
| unsigned char | TargetFlags = 0 |
||
| ) |
Definition at line 1239 of file SelectionDAG.cpp.
References llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), llvm::FoldingSetNodeID::AddPointer(), assert(), E, getDataLayout(), llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), llvm::DataLayout::getPointerTypeSizeInBits(), llvm::GlobalValue::getType(), getVTList(), llvm::ISD::GlobalAddress, llvm::ISD::GlobalTLSAddress, llvm::GlobalValue::isThreadLocal(), llvm::None, Offset, llvm::SignExtend64(), llvm::ISD::TargetGlobalAddress, and llvm::ISD::TargetGlobalTLSAddress.
Referenced by FoldSymbolOffset(), getTargetGlobalAddress(), llvm::SelectionDAGBuilder::getValueImpl(), and llvm::TargetLowering::LowerToTLSEmulatedModel().
Get graph attributes for a node.
getGraphAttrs - Get graph attributes for a node.
(eg. "color=red".) Used from getNodeAttributes.
Definition at line 196 of file SelectionDAGPrinter.cpp.
References llvm::errs(), I, and NodeGraphAttrs.
Referenced by llvm::DOTGraphTraits< SelectionDAG * >::getNodeAttributes().
| SDValue SelectionDAG::getIndexedLoad | ( | SDValue | OrigLoad, |
| const SDLoc & | dl, | ||
| SDValue | Base, | ||
| SDValue | Offset, | ||
| ISD::MemIndexedMode | AM | ||
| ) |
Definition at line 5424 of file SelectionDAG.cpp.
References assert(), llvm::MemSDNode::getAAInfo(), llvm::MemSDNode::getAlignment(), llvm::MemSDNode::getChain(), llvm::LoadSDNode::getExtensionType(), llvm::MachineMemOperand::getFlags(), getLoad(), llvm::MemSDNode::getMemOperand(), llvm::MemSDNode::getMemoryVT(), llvm::LoadSDNode::getOffset(), llvm::MemSDNode::getPointerInfo(), llvm::SDValue::getValueType(), llvm::SDValue::isUndef(), llvm::ARM_MB::LD, llvm::MachineMemOperand::MODereferenceable, llvm::MachineMemOperand::MOInvariant, and Offset.
| SDValue SelectionDAG::getIndexedStore | ( | SDValue | OrigStoe, |
| const SDLoc & | dl, | ||
| SDValue | Base, | ||
| SDValue | Offset, | ||
| ISD::MemIndexedMode | AM | ||
| ) |
Definition at line 5553 of file SelectionDAG.cpp.
References llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), assert(), E, llvm::MachinePointerInfo::getAddrSpace(), llvm::MemSDNode::getChain(), llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), llvm::MemSDNode::getMemOperand(), llvm::MemSDNode::getMemoryVT(), llvm::StoreSDNode::getOffset(), llvm::MemSDNode::getPointerInfo(), llvm::EVT::getRawBits(), llvm::MemSDNode::getRawSubclassData(), llvm::StoreSDNode::getValue(), llvm::SDValue::getValueType(), getVTList(), llvm::StoreSDNode::isTruncatingStore(), llvm::SDValue::isUndef(), llvm::MVT::Other, llvm::ARM_MB::ST, and llvm::ISD::STORE.
Definition at line 1180 of file SelectionDAG.cpp.
References getConstant(), getDataLayout(), and llvm::TargetLoweringBase::getPointerTy().
Referenced by llvm::X86TargetLowering::BuildFILD(), buildFromShuffleMostly(), combineCompareEqual(), combineLoopSADPattern(), combineStore(), combineToExtendVectorInReg(), combineVectorTruncation(), combineVectorTruncationWithPACKUS(), combineVSZext(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemset(), ExtendToType(), extractSubVector(), getCopyToParts(), getFRAMEADDR(), getMaskNode(), getParamsForOneTrueMaskedElt(), insert128BitVector(), insert1BitVector(), insertSubVector(), LowerBITCAST(), LowerBITREVERSE_XOP(), LowerBuildVectorv16i8(), LowerBuildVectorv4x32(), LowerBuildVectorv8i16(), llvm::HexagonTargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::NVPTXTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), LowerCONCAT_VECTORS(), LowerCONCAT_VECTORSvXi1(), lowerCTPOP16BitElements(), lowerCTPOP32BitElements(), llvm::HexagonTargetLowering::LowerEH_RETURN(), LowerExtended1BitVectorLoad(), LowerExtendedLoad(), LowerFABSorFNEG(), LowerFCOPYSIGN(), llvm::SystemZTargetLowering::LowerFormalArguments(), llvm::NVPTXTargetLowering::LowerFormalArguments(), llvm::LanaiTargetLowering::LowerFRAMEADDR(), LowerFSINCOS(), llvm::SparcTargetLowering::LowerGlobalTLSAddress(), LowerINTRINSIC_WO_CHAIN(), LowerMGATHER(), LowerMLOAD(), LowerMULH(), llvm::NVPTXTargetLowering::LowerReturn(), llvm::LanaiTargetLowering::LowerRETURNADDR(), LowerRETURNADDR(), LowerScalarVariableShift(), LowerSDIV(), llvm::AMDGPUTargetLowering::LowerSINT_TO_FP(), llvm::SelectionDAGBuilder::LowerStatepoint(), LowerToTLSExecModel(), LowerTruncatingStore(), LowerUDIV(), llvm::AMDGPUTargetLowering::LowerUINT_TO_FP(), LowerUMULO_SMULO(), lowerV2X128VectorShuffle(), lowerV4X128VectorShuffle(), LowerVAARG(), LowerVACOPY(), LowerVASTART(), LowerVectorCTLZ_AVX512(), LowerVectorINT_TO_FP(), lowerVectorShuffleAsBroadcast(), lowerVectorShuffleWithUndefHalf(), llvm::PPCTargetLowering::PerformDAGCombine(), PerformSTORECombine(), PrepareCall(), PrepareTailCall(), reduceVMULWidth(), ReplaceLoadVector(), llvm::PPCTargetLowering::ReplaceNodeResults(), llvm::X86TargetLowering::ReplaceNodeResults(), and splitAndLowerVectorShuffle().
| SDValue SelectionDAG::getJumpTable | ( | int | JTI, |
| EVT | VT, | ||
| bool | isTarget = false, |
||
| unsigned char | TargetFlags = 0 |
||
| ) |
Definition at line 1287 of file SelectionDAG.cpp.
References llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), assert(), E, getVTList(), llvm::ISD::JumpTable, llvm::None, and llvm::ISD::TargetJumpTable.
Referenced by getTargetJumpTable(), and llvm::SelectionDAGBuilder::visitJumpTable().
| SDValue SelectionDAG::getLoad | ( | EVT | VT, |
| const SDLoc & | dl, | ||
| SDValue | Chain, | ||
| SDValue | Ptr, | ||
| MachinePointerInfo | PtrInfo, | ||
| unsigned | Alignment = 0, |
||
| MachineMemOperand::Flags | MMOFlags = MachineMemOperand::MONone, |
||
| const AAMDNodes & | AAInfo = AAMDNodes(), |
||
| const MDNode * | Ranges = nullptr |
||
| ) |
Loads are not normal binary operators: their result type is not determined by their operands, and they produce a value AND a token chain.
This function will set the MOLoad flag on MMOFlags, but you can set it if you want. The MOStore flag must not be set.
Definition at line 5388 of file SelectionDAG.cpp.
References getUNDEF(), llvm::SDValue::getValueType(), llvm::ISD::NON_EXTLOAD, llvm::RegState::Undef, and llvm::ISD::UNINDEXED.
Referenced by bitcastf32Toi32(), llvm::X86TargetLowering::BuildFILD(), combineBVOfConsecutiveLoads(), combineExtractVectorElt(), combineLoad(), combineMaskedLoadConstantMask(), combineStore(), EltsFromConsecutiveLoads(), llvm::ARMSelectionDAGInfo::EmitTargetCodeForMemcpy(), expandf64Toi32(), llvm::TargetLowering::expandUnalignedLoad(), llvm::TargetLowering::expandUnalignedStore(), expandVAArg(), expandVACopy(), llvm::MipsTargetLowering::getAddrGlobal(), llvm::MipsTargetLowering::getAddrGlobalLargeGOT(), llvm::MipsTargetLowering::getAddrLocal(), getExtLoad(), getFRAMEADDR(), getIndexedLoad(), getLoad(), getMemCmpLoad(), getMemmoveLoadsAndStores(), LowerAsSplatVectorLoad(), llvm::NVPTXTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_64(), llvm::TargetLowering::LowerCallTo(), LowerExtended1BitVectorLoad(), LowerExtendedLoad(), LowerF128Load(), llvm::SparcTargetLowering::LowerF128Op(), llvm::R600TargetLowering::LowerFormalArguments(), llvm::HexagonTargetLowering::LowerFormalArguments(), llvm::SystemZTargetLowering::LowerFormalArguments(), llvm::NVPTXTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::SparcTargetLowering::LowerFormalArguments_64(), llvm::LanaiTargetLowering::LowerFRAMEADDR(), llvm::MSP430TargetLowering::LowerFRAMEADDR(), llvm::HexagonTargetLowering::LowerFRAMEADDR(), LowerINTRINSIC_W_CHAIN(), llvm::HexagonTargetLowering::LowerLOAD(), lowerMSALoadIntr(), llvm::LanaiTargetLowering::LowerRETURNADDR(), llvm::MSP430TargetLowering::LowerRETURNADDR(), llvm::HexagonTargetLowering::LowerRETURNADDR(), LowerRETURNADDR(), LowerToTLSExecModel(), llvm::HexagonTargetLowering::LowerToTLSInitialExecModel(), LowerVAARG(), LowerVectorBroadcast(), lowerVectorShuffleAsBroadcast(), llvm::SparcTargetLowering::makeAddress(), llvm::PPCTargetLowering::PerformDAGCombine(), performIntToFpCombine(), llvm::AMDGPUTargetLowering::performLoadCombine(), PrepareCall(), reduceMaskedLoadToScalarLoad(), llvm::X86TargetLowering::ReplaceNodeResults(), llvm::TargetLowering::SimplifySetCC(), SkipLoadExtensionForVMULL(), and llvm::SelectionDAGBuilder::visitSPDescriptorParent().
| SDValue SelectionDAG::getLoad | ( | EVT | VT, |
| const SDLoc & | dl, | ||
| SDValue | Chain, | ||
| SDValue | Ptr, | ||
| MachineMemOperand * | MMO | ||
| ) |
Definition at line 5398 of file SelectionDAG.cpp.
References getLoad(), getUNDEF(), llvm::SDValue::getValueType(), llvm::ISD::NON_EXTLOAD, llvm::RegState::Undef, and llvm::ISD::UNINDEXED.
| SDValue SelectionDAG::getLoad | ( | ISD::MemIndexedMode | AM, |
| ISD::LoadExtType | ExtType, | ||
| EVT | VT, | ||
| const SDLoc & | dl, | ||
| SDValue | Chain, | ||
| SDValue | Ptr, | ||
| SDValue | Offset, | ||
| MachinePointerInfo | PtrInfo, | ||
| EVT | MemVT, | ||
| unsigned | Alignment = 0, |
||
| MachineMemOperand::Flags | MMOFlags = MachineMemOperand::MONone, |
||
| const AAMDNodes & | AAInfo = AAMDNodes(), |
||
| const MDNode * | Ranges = nullptr |
||
| ) |
Definition at line 5316 of file SelectionDAG.cpp.
References assert(), getEVTAlignment(), getLoad(), getMachineFunction(), llvm::MachineFunction::getMachineMemOperand(), llvm::EVT::getStoreSize(), llvm::SDValue::getValueType(), InferPointerInfo(), llvm::PointerUnion< PT1, PT2 >::isNull(), llvm::MachineMemOperand::MOLoad, llvm::MachineMemOperand::MOStore, llvm::MVT::Other, and llvm::MachinePointerInfo::V.
| SDValue SelectionDAG::getLoad | ( | ISD::MemIndexedMode | AM, |
| ISD::LoadExtType | ExtType, | ||
| EVT | VT, | ||
| const SDLoc & | dl, | ||
| SDValue | Chain, | ||
| SDValue | Ptr, | ||
| SDValue | Offset, | ||
| EVT | MemVT, | ||
| MachineMemOperand * | MMO | ||
| ) |
Definition at line 5341 of file SelectionDAG.cpp.
References llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), assert(), llvm::EVT::bitsLT(), E, llvm::MachinePointerInfo::getAddrSpace(), llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), llvm::MachineMemOperand::getPointerInfo(), llvm::EVT::getRawBits(), llvm::EVT::getScalarType(), llvm::SDValue::getValueType(), llvm::EVT::getVectorNumElements(), getVTList(), Indexed, llvm::EVT::isInteger(), llvm::SDValue::isUndef(), llvm::EVT::isVector(), llvm::ISD::LOAD, llvm::ISD::NON_EXTLOAD, llvm::MVT::Other, Ptr, and llvm::ISD::UNINDEXED.
Create a logical NOT operation as (XOR Val, BooleanOne).
Definition at line 1063 of file SelectionDAG.cpp.
References llvm::APInt::getAllOnesValue(), llvm::TargetLoweringBase::getBooleanContents(), getConstant(), getNode(), llvm::EVT::getScalarType(), llvm::EVT::getSizeInBits(), llvm::TargetLoweringBase::UndefinedBooleanContent, llvm::ISD::XOR, llvm::TargetLoweringBase::ZeroOrNegativeOneBooleanContent, and llvm::TargetLoweringBase::ZeroOrOneBooleanContent.
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inline |
Definition at line 327 of file SelectionDAG.h.
Referenced by llvm::RegsForValue::AddInlineAsmOperands(), llvm::StatepointLoweringState::allocateStackSlot(), areNonVolatileConsecutiveLoads(), llvm::X86TargetLowering::BuildFILD(), llvm::TargetLowering::BuildSDIVPow2(), CalculateTailCallSPDiff(), combineFMinNumFMaxNum(), combineMul(), combineOr(), combineStore(), llvm::AMDGPUTargetLowering::CreateLiveInRegister(), CreateStackTemporary(), createVirtualRegs(), emitNonHSAIntrinsicError(), emitRemovedIntrinsicError(), llvm::ARMSelectionDAGInfo::EmitSpecializedLibcall(), EmitTailCallStoreFPAndRetAddr(), EmitTailCallStoreRetAddr(), llvm::HexagonSelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::ARMSelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::AArch64SelectionDAGInfo::EmitTargetCodeForMemset(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemset(), ExpandPowI(), fail(), llvm::SelectionDAGBuilder::FindMergedConditions(), FindOptimalMemOpLowering(), fixupFuncForFI(), getAddressForMemoryInput(), llvm::MipsTargetLowering::getAddrLocal(), getAtomic(), getAtomicCmpSwap(), llvm::HexagonTargetLowering::GetDynamicTLSAddr(), getFRAMEADDR(), llvm::MipsTargetLowering::getGlobalReg(), llvm::DOTGraphTraits< SelectionDAG * >::getGraphName(), getLoad(), getLoadStackGuard(), getMemcpyLoadsAndStores(), getMemIntrinsicNode(), getMemmoveLoadsAndStores(), getMemsetStores(), llvm::MipsTargetLowering::getOpndList(), llvm::X86TargetLowering::getRegisterByName(), GetRegistersForValue(), llvm::MSP430TargetLowering::getReturnAddressFrameIndex(), llvm::X86TargetLowering::getReturnAddressFrameIndex(), llvm::SparcTargetLowering::getSRetArgSize(), getStore(), GetTLSADDR(), getTOCEntry(), getTruncStore(), getv64i1Argument(), hasReturnsTwiceAttr(), InferPointerInfo(), InferPtrAlignment(), isConsecutiveLSLoc(), llvm::HexagonTargetLowering::IsEligibleForTailCallOptimization(), llvm::TargetLowering::isInTailCallPosition(), LowerAsSplatVectorLoad(), llvm::AMDGPUTargetLowering::LowerCall(), llvm::HexagonTargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::NVPTXTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), llvm::HexagonTargetLowering::LowerCallResult(), llvm::TargetLowering::LowerCallTo(), llvm::AMDGPUTargetLowering::LowerDYNAMIC_STACKALLOC(), LowerDYNAMIC_STACKALLOC(), llvm::HexagonTargetLowering::LowerEH_RETURN(), llvm::SparcTargetLowering::LowerF128_LibCallArg(), llvm::SparcTargetLowering::LowerF128Op(), llvm::R600TargetLowering::LowerFormalArguments(), llvm::SITargetLowering::LowerFormalArguments(), llvm::HexagonTargetLowering::LowerFormalArguments(), llvm::SystemZTargetLowering::LowerFormalArguments(), llvm::NVPTXTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::SparcTargetLowering::LowerFormalArguments_64(), LowerFPOWI(), llvm::LanaiTargetLowering::LowerFRAMEADDR(), llvm::MSP430TargetLowering::LowerFRAMEADDR(), llvm::HexagonTargetLowering::LowerFRAMEADDR(), llvm::AMDGPUTargetLowering::LowerGlobalAddress(), llvm::SparcTargetLowering::LowerGlobalTLSAddress(), llvm::HexagonTargetLowering::LowerINLINEASM(), LowerInterruptReturn(), LowerINTRINSIC_W_CHAIN(), LowerINTRINSIC_WO_CHAIN(), llvm::SelectionDAGBuilder::lowerInvokable(), llvm::R600TargetLowering::LowerOperation(), llvm::SITargetLowering::LowerOperation(), llvm::SITargetLowering::LowerReturn(), llvm::HexagonTargetLowering::LowerReturn(), llvm::SystemZTargetLowering::LowerReturn(), llvm::NVPTXTargetLowering::LowerReturn(), llvm::SparcTargetLowering::LowerReturn_32(), llvm::SparcTargetLowering::LowerReturn_64(), llvm::LanaiTargetLowering::LowerRETURNADDR(), llvm::MSP430TargetLowering::LowerRETURNADDR(), llvm::HexagonTargetLowering::LowerRETURNADDR(), LowerRETURNADDR(), llvm::TargetLowering::LowerToTLSEmulatedModel(), LowerToTLSExecModel(), LowerToTLSLocalDynamicModel(), LowerVACOPY(), llvm::LanaiTargetLowering::LowerVASTART(), llvm::MSP430TargetLowering::LowerVASTART(), llvm::HexagonTargetLowering::LowerVASTART(), LowerVASTART(), LowerVectorBroadcast(), lowerVectorShuffleAsBroadcast(), llvm::SparcTargetLowering::makeAddress(), MarkEHGuard(), MarkEHRegistrationNode(), PerformADDCombineWithOperands(), llvm::PPCTargetLowering::PerformDAGCombine(), PrepareCall(), promoteToConstantPool(), recoverFramePointer(), reduceVMULWidth(), ReplaceCMP_SWAP_128Results(), ReplaceCMP_SWAP_64Results(), llvm::X86TargetLowering::ReplaceNodeResults(), setUsesTOCBasePtr(), spillIncomingStatepointValue(), splitStores(), StoreTailCallArgumentsToStackSlot(), llvm::X86InstrInfo::unfoldMemoryOperand(), viewGraph(), and llvm::SelectionDAGBuilder::visitSPDescriptorParent().
| MachineSDNode * SelectionDAG::getMachineNode | ( | unsigned | Opcode, |
| const SDLoc & | dl, | ||
| EVT | VT | ||
| ) |
These are used for target selectors to create a new node with specified return type(s), MachineInstr opcode, and operands.
getMachineNode - These are used for target selectors to create a new node with specified return type(s), MachineInstr opcode, and operands.
Note that getMachineNode returns the resultant node. If there is already a node of the specified opcode and operands, it returns that node instead of the current one.
Definition at line 6248 of file SelectionDAG.cpp.
References getVTList(), and llvm::None.
Referenced by llvm::SITargetLowering::buildRSRC(), buildSMovImm32(), llvm::SITargetLowering::copyToM0(), createGPRPairNode(), getExtendedControlRegister(), getInt64(), getInt64Direct(), getLeftShift(), getLoadStackGuard(), getMachineNode(), getPrefetchNode(), getScatterNode(), getTargetExtractSubreg(), getTargetInsertSubreg(), llvm::SITargetLowering::legalizeTargetIndependentNode(), llvm::SelectionDAGBuilder::LowerAsSTATEPOINT(), LowerATOMIC_FENCE(), LowerBITCAST(), LowerF128Load(), LowerF128Store(), LowerF64Op(), lowerGR128Binary(), narrowIfNeeded(), performBitcastCombine(), ReplaceBITCASTResults(), ReplaceCMP_SWAP_128Results(), ReplaceCMP_SWAP_64Results(), llvm::PPCTargetLowering::SelectAddressRegImm(), llvm::SelectionDAGISel::SelectCodeCommon(), llvm::AVRDAGToDAGISel::selectIndexedLoad(), tryBitfieldInsertOpFromOr(), tryBitfieldInsertOpFromOrAndImm(), llvm::X86InstrInfo::unfoldMemoryOperand(), Widen(), and llvm::SITargetLowering::wrapAddr64Rsrc().
| MachineSDNode * SelectionDAG::getMachineNode | ( | unsigned | Opcode, |
| const SDLoc & | dl, | ||
| EVT | VT, | ||
| SDValue | Op1 | ||
| ) |
Definition at line 6254 of file SelectionDAG.cpp.
References getMachineNode(), and getVTList().
| MachineSDNode * SelectionDAG::getMachineNode | ( | unsigned | Opcode, |
| const SDLoc & | dl, | ||
| EVT | VT, | ||
| SDValue | Op1, | ||
| SDValue | Op2 | ||
| ) |
Definition at line 6261 of file SelectionDAG.cpp.
References getMachineNode(), and getVTList().
| MachineSDNode * SelectionDAG::getMachineNode | ( | unsigned | Opcode, |
| const SDLoc & | dl, | ||
| EVT | VT, | ||
| SDValue | Op1, | ||
| SDValue | Op2, | ||
| SDValue | Op3 | ||
| ) |
Definition at line 6268 of file SelectionDAG.cpp.
References getMachineNode(), and getVTList().
| MachineSDNode * SelectionDAG::getMachineNode | ( | unsigned | Opcode, |
| const SDLoc & | dl, | ||
| EVT | VT, | ||
| ArrayRef< SDValue > | Ops | ||
| ) |
Definition at line 6276 of file SelectionDAG.cpp.
References getMachineNode(), and getVTList().
| MachineSDNode * SelectionDAG::getMachineNode | ( | unsigned | Opcode, |
| const SDLoc & | dl, | ||
| EVT | VT1, | ||
| EVT | VT2, | ||
| SDValue | Op1, | ||
| SDValue | Op2 | ||
| ) |
Definition at line 6282 of file SelectionDAG.cpp.
References getMachineNode(), and getVTList().
| MachineSDNode * SelectionDAG::getMachineNode | ( | unsigned | Opcode, |
| const SDLoc & | dl, | ||
| EVT | VT1, | ||
| EVT | VT2, | ||
| SDValue | Op1, | ||
| SDValue | Op2, | ||
| SDValue | Op3 | ||
| ) |
Definition at line 6290 of file SelectionDAG.cpp.
References getMachineNode(), and getVTList().
| MachineSDNode * SelectionDAG::getMachineNode | ( | unsigned | Opcode, |
| const SDLoc & | dl, | ||
| EVT | VT1, | ||
| EVT | VT2, | ||
| ArrayRef< SDValue > | Ops | ||
| ) |
Definition at line 6298 of file SelectionDAG.cpp.
References getMachineNode(), and getVTList().
| MachineSDNode * SelectionDAG::getMachineNode | ( | unsigned | Opcode, |
| const SDLoc & | dl, | ||
| EVT | VT1, | ||
| EVT | VT2, | ||
| EVT | VT3, | ||
| SDValue | Op1, | ||
| SDValue | Op2 | ||
| ) |
Definition at line 6305 of file SelectionDAG.cpp.
References getMachineNode(), and getVTList().
| MachineSDNode * SelectionDAG::getMachineNode | ( | unsigned | Opcode, |
| const SDLoc & | dl, | ||
| EVT | VT1, | ||
| EVT | VT2, | ||
| EVT | VT3, | ||
| SDValue | Op1, | ||
| SDValue | Op2, | ||
| SDValue | Op3 | ||
| ) |
Definition at line 6313 of file SelectionDAG.cpp.
References getMachineNode(), and getVTList().
| MachineSDNode * SelectionDAG::getMachineNode | ( | unsigned | Opcode, |
| const SDLoc & | dl, | ||
| EVT | VT1, | ||
| EVT | VT2, | ||
| EVT | VT3, | ||
| ArrayRef< SDValue > | Ops | ||
| ) |
Definition at line 6322 of file SelectionDAG.cpp.
References getMachineNode(), and getVTList().
| MachineSDNode * SelectionDAG::getMachineNode | ( | unsigned | Opcode, |
| const SDLoc & | dl, | ||
| ArrayRef< EVT > | ResultTys, | ||
| ArrayRef< SDValue > | Ops | ||
| ) |
Definition at line 6329 of file SelectionDAG.cpp.
References getMachineNode(), and getVTList().
| MachineSDNode * SelectionDAG::getMachineNode | ( | unsigned | Opcode, |
| const SDLoc & | dl, | ||
| SDVTList | VTs, | ||
| ArrayRef< SDValue > | Ops | ||
| ) |
Definition at line 6336 of file SelectionDAG.cpp.
References AddNodeIDNode(), E, llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), llvm::MVT::Glue, N, llvm::SDVTList::NumVTs, and llvm::SDVTList::VTs.
| SDValue SelectionDAG::getMaskedGather | ( | SDVTList | VTs, |
| EVT | VT, | ||
| const SDLoc & | dl, | ||
| ArrayRef< SDValue > | Ops, | ||
| MachineMemOperand * | MMO | ||
| ) |
Definition at line 5635 of file SelectionDAG.cpp.
References AddNodeIDNode(), assert(), E, llvm::MachinePointerInfo::getAddrSpace(), llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), llvm::MachineMemOperand::getPointerInfo(), llvm::EVT::getRawBits(), llvm::SDNode::getValueType(), llvm::EVT::getVectorNumElements(), llvm::ISD::MGATHER, and llvm::ArrayRef< T >::size().
Referenced by LowerMGATHER().
| SDValue SelectionDAG::getMaskedLoad | ( | EVT | VT, |
| const SDLoc & | dl, | ||
| SDValue | Chain, | ||
| SDValue | Ptr, | ||
| SDValue | Mask, | ||
| SDValue | Src0, | ||
| EVT | MemVT, | ||
| MachineMemOperand * | MMO, | ||
| ISD::LoadExtType | ExtTy, | ||
| bool | IsExpanding = false |
||
| ) |
Definition at line 5579 of file SelectionDAG.cpp.
References llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), E, llvm::MachinePointerInfo::getAddrSpace(), llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), llvm::MachineMemOperand::getPointerInfo(), llvm::EVT::getRawBits(), getVTList(), llvm::BitmaskEnumDetail::Mask(), llvm::ISD::MLOAD, llvm::MVT::Other, and Ptr.
Referenced by combineMaskedLoad(), combineMaskedLoadConstantMask(), LowerINTRINSIC_W_CHAIN(), and LowerMLOAD().
| SDValue SelectionDAG::getMaskedScatter | ( | SDVTList | VTs, |
| EVT | VT, | ||
| const SDLoc & | dl, | ||
| ArrayRef< SDValue > | Ops, | ||
| MachineMemOperand * | MMO | ||
| ) |
Definition at line 5670 of file SelectionDAG.cpp.
References AddNodeIDNode(), assert(), E, llvm::MachinePointerInfo::getAddrSpace(), llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), llvm::MachineMemOperand::getPointerInfo(), llvm::EVT::getRawBits(), llvm::SDNode::getValueType(), llvm::EVT::getVectorNumElements(), llvm::ISD::MSCATTER, and llvm::ArrayRef< T >::size().
Referenced by LowerMSCATTER().
| SDValue SelectionDAG::getMaskedStore | ( | SDValue | Chain, |
| const SDLoc & | dl, | ||
| SDValue | Val, | ||
| SDValue | Ptr, | ||
| SDValue | Mask, | ||
| EVT | MemVT, | ||
| MachineMemOperand * | MMO, | ||
| bool | IsTruncating = false, |
||
| bool | IsCompressing = false |
||
| ) |
Definition at line 5606 of file SelectionDAG.cpp.
References llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), assert(), E, llvm::MachinePointerInfo::getAddrSpace(), llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), llvm::MachineMemOperand::getPointerInfo(), llvm::SDValue::getValueType(), getVTList(), llvm::BitmaskEnumDetail::Mask(), llvm::ISD::MSTORE, llvm::MVT::Other, and Ptr.
Referenced by combineMaskedStore(), LowerINTRINSIC_W_CHAIN(), and LowerMSTORE().
Definition at line 1414 of file SelectionDAG.cpp.
Referenced by LowerINTRINSIC_WO_CHAIN(), and recoverFramePointer().
Return an MDNodeSDNode which holds an MDNode.
Definition at line 1717 of file SelectionDAG.cpp.
References AddNodeIDNode(), llvm::FoldingSetNodeID::AddPointer(), E, getVTList(), llvm::ISD::MDNODE_SDNODE, llvm::None, and llvm::MVT::Other.
Returns sum of the base pointer and offset.
Definition at line 4435 of file SelectionDAG.cpp.
References llvm::ISD::ADD, getConstant(), getNode(), and llvm::SDValue::getValueType().
Referenced by combineLoad(), combineStore(), getMemcpyLoadsAndStores(), getMemmoveLoadsAndStores(), getParamsForOneTrueMaskedElt(), and lowerVectorShuffleAsBroadcast().
| SDValue SelectionDAG::getMemcpy | ( | SDValue | Chain, |
| const SDLoc & | dl, | ||
| SDValue | Dst, | ||
| SDValue | Src, | ||
| SDValue | Size, | ||
| unsigned | Align, | ||
| bool | isVol, | ||
| bool | AlwaysInline, | ||
| bool | isTailCall, | ||
| MachinePointerInfo | DstPtrInfo, | ||
| MachinePointerInfo | SrcPtrInfo | ||
| ) |
Definition at line 4885 of file SelectionDAG.cpp.
References AMDGPU::RuntimeMD::KeyName::Args, assert(), checkAddrSpaceIsValidForLibcall(), llvm::dyn_cast(), llvm::SelectionDAGTargetInfo::EmitTargetCodeForMemcpy(), llvm::MachinePointerInfo::getAddrSpace(), getContext(), getDataLayout(), getExternalSymbol(), llvm::DataLayout::getIntPtrType(), llvm::TargetLoweringBase::getLibcallCallingConv(), llvm::TargetLoweringBase::getLibcallName(), getMemcpyLoadsAndStores(), llvm::SDValue::getNode(), llvm::TargetLoweringBase::getPointerTy(), llvm::EVT::getTypeForEVT(), llvm::SDValue::getValueType(), llvm::ConstantSDNode::getZExtValue(), llvm::ConstantSDNode::isNullValue(), llvm::TargetLowering::LowerCallTo(), llvm::RTLIB::MEMCPY, llvm::TargetLowering::ArgListEntry::Node, llvm::TargetLowering::CallLoweringInfo::setCallee(), llvm::TargetLowering::CallLoweringInfo::setChain(), llvm::TargetLowering::CallLoweringInfo::setDebugLoc(), llvm::TargetLowering::CallLoweringInfo::setTailCall(), and llvm::TargetLowering::ArgListEntry::Ty.
Referenced by CreateCopyOfByValArgument(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::SparcTargetLowering::LowerCall_32(), and LowerVACOPY().
| SDValue SelectionDAG::getMemIntrinsicNode | ( | unsigned | Opcode, |
| const SDLoc & | dl, | ||
| SDVTList | VTList, | ||
| ArrayRef< SDValue > | Ops, | ||
| EVT | MemVT, | ||
| MachinePointerInfo | PtrInfo, | ||
| unsigned | Align = 0, |
||
| bool | Vol = false, |
||
| bool | ReadMem = true, |
||
| bool | WriteMem = true, |
||
| unsigned | Size = 0 |
||
| ) |
Creates a MemIntrinsicNode that may produce a result and takes a list of operands.
Opcode may be INTRINSIC_VOID, INTRINSIC_W_CHAIN, or a target-specific opcode with a value not less than FIRST_TARGET_MEMORY_OPCODE.
Definition at line 5217 of file SelectionDAG.cpp.
References getEVTAlignment(), getMachineFunction(), llvm::MachineFunction::getMachineMemOperand(), llvm::EVT::getStoreSize(), llvm::MachineMemOperand::MOLoad, llvm::MachineMemOperand::MONone, llvm::MachineMemOperand::MOStore, and llvm::MachineMemOperand::MOVolatile.
Referenced by llvm::X86TargetLowering::BuildFILD(), CombineBaseUpdate(), combineLockSub(), CombineVLDDUP(), createLoadLR(), createStoreLR(), EltsFromConsecutiveLoads(), llvm::PPCTargetLowering::expandVSXLoadForLE(), llvm::PPCTargetLowering::expandVSXStoreForLE(), getTOCEntry(), lowerAtomicArithWithLOCK(), llvm::NVPTXTargetLowering::LowerCall(), LowerCMP_SWAP(), llvm::NVPTXTargetLowering::LowerReturn(), llvm::PPCTargetLowering::PerformDAGCombine(), performNEONPostLDSTCombine(), performPostLD1Combine(), PerformVDUPCombine(), ReplaceINTRINSIC_W_CHAIN(), ReplaceLoadVector(), and llvm::X86TargetLowering::ReplaceNodeResults().
| SDValue SelectionDAG::getMemIntrinsicNode | ( | unsigned | Opcode, |
| const SDLoc & | dl, | ||
| SDVTList | VTList, | ||
| ArrayRef< SDValue > | Ops, | ||
| EVT | MemVT, | ||
| MachineMemOperand * | MMO | ||
| ) |
Definition at line 5240 of file SelectionDAG.cpp.
References llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), assert(), E, llvm::ISD::FIRST_TARGET_MEMORY_OPCODE, llvm::MachinePointerInfo::getAddrSpace(), llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), llvm::MachineMemOperand::getPointerInfo(), llvm::MVT::Glue, llvm::ISD::INTRINSIC_VOID, llvm::ISD::INTRINSIC_W_CHAIN, llvm::ISD::LIFETIME_END, llvm::ISD::LIFETIME_START, N, llvm::SDVTList::NumVTs, llvm::ISD::PREFETCH, and llvm::SDVTList::VTs.
| SDValue SelectionDAG::getMemmove | ( | SDValue | Chain, |
| const SDLoc & | dl, | ||
| SDValue | Dst, | ||
| SDValue | Src, | ||
| SDValue | Size, | ||
| unsigned | Align, | ||
| bool | isVol, | ||
| bool | isTailCall, | ||
| MachinePointerInfo | DstPtrInfo, | ||
| MachinePointerInfo | SrcPtrInfo | ||
| ) |
Definition at line 4958 of file SelectionDAG.cpp.
References AMDGPU::RuntimeMD::KeyName::Args, assert(), checkAddrSpaceIsValidForLibcall(), llvm::dyn_cast(), llvm::SelectionDAGTargetInfo::EmitTargetCodeForMemmove(), llvm::MachinePointerInfo::getAddrSpace(), getContext(), getDataLayout(), getExternalSymbol(), llvm::DataLayout::getIntPtrType(), llvm::TargetLoweringBase::getLibcallCallingConv(), llvm::TargetLoweringBase::getLibcallName(), getMemmoveLoadsAndStores(), llvm::SDValue::getNode(), llvm::TargetLoweringBase::getPointerTy(), llvm::EVT::getTypeForEVT(), llvm::SDValue::getValueType(), llvm::ConstantSDNode::getZExtValue(), llvm::ConstantSDNode::isNullValue(), llvm::TargetLowering::LowerCallTo(), llvm::RTLIB::MEMMOVE, llvm::TargetLowering::ArgListEntry::Node, llvm::TargetLowering::CallLoweringInfo::setCallee(), llvm::TargetLowering::CallLoweringInfo::setChain(), llvm::TargetLowering::CallLoweringInfo::setDebugLoc(), llvm::TargetLowering::CallLoweringInfo::setTailCall(), and llvm::TargetLowering::ArgListEntry::Ty.
| SDValue SelectionDAG::getMemset | ( | SDValue | Chain, |
| const SDLoc & | dl, | ||
| SDValue | Dst, | ||
| SDValue | Src, | ||
| SDValue | Size, | ||
| unsigned | Align, | ||
| bool | isVol, | ||
| bool | isTailCall, | ||
| MachinePointerInfo | DstPtrInfo | ||
| ) |
Definition at line 5019 of file SelectionDAG.cpp.
References AMDGPU::RuntimeMD::KeyName::Args, assert(), checkAddrSpaceIsValidForLibcall(), llvm::dyn_cast(), llvm::SelectionDAGTargetInfo::EmitTargetCodeForMemset(), llvm::MachinePointerInfo::getAddrSpace(), getContext(), getDataLayout(), getExternalSymbol(), llvm::DataLayout::getIntPtrType(), llvm::TargetLoweringBase::getLibcallCallingConv(), llvm::TargetLoweringBase::getLibcallName(), getMemsetStores(), llvm::SDValue::getNode(), llvm::TargetLoweringBase::getPointerTy(), llvm::EVT::getTypeForEVT(), llvm::SDValue::getValueType(), llvm::ConstantSDNode::getZExtValue(), llvm::ConstantSDNode::isNullValue(), llvm::TargetLowering::LowerCallTo(), llvm::RTLIB::MEMSET, llvm::TargetLowering::ArgListEntry::Node, llvm::TargetLowering::CallLoweringInfo::setCallee(), llvm::TargetLowering::CallLoweringInfo::setChain(), llvm::TargetLowering::CallLoweringInfo::setDebugLoc(), llvm::TargetLowering::CallLoweringInfo::setTailCall(), and llvm::TargetLowering::ArgListEntry::Ty.
Referenced by llvm::X86SelectionDAGInfo::EmitTargetCodeForMemset().
Create a MERGE_VALUES node from the given operands.
getMergeValues - Create a MERGE_VALUES node from the given operands.
Definition at line 5206 of file SelectionDAG.cpp.
References getNode(), getVTList(), i, llvm::ISD::MERGE_VALUES, llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back(), llvm::SmallVectorImpl< T >::reserve(), and llvm::ArrayRef< T >::size().
Referenced by llvm::SelectionDAGBuilder::getValueImpl(), LowerADDC_ADDE_SUBC_SUBE(), llvm::AMDGPUTargetLowering::LowerDIVREM24(), lowerDSPIntr(), llvm::LanaiTargetLowering::LowerDYNAMIC_STACKALLOC(), llvm::AMDGPUTargetLowering::LowerDYNAMIC_STACKALLOC(), LowerDYNAMIC_STACKALLOC(), LowerF128Load(), LowerINTRINSIC_W_CHAIN(), llvm::HexagonTargetLowering::LowerLOAD(), llvm::MipsTargetLowering::lowerLOAD(), LowerMGATHER(), LowerMLOAD(), LowerMUL_LOHI(), llvm::SelectionDAGBuilder::lowerRangeToAssertZExt(), llvm::AMDGPUTargetLowering::LowerSDIVREM(), LowerShiftParts(), llvm::LanaiTargetLowering::LowerSHL_PARTS(), llvm::LanaiTargetLowering::LowerSRL_PARTS(), llvm::AMDGPUTargetLowering::LowerUDIVREM(), LowerUMULO_SMULO(), llvm::AMDGPUTargetLowering::performLoadCombine(), llvm::AMDGPUTargetLowering::performMulLoHi24Combine(), llvm::TargetLowering::scalarizeVectorLoad(), and llvm::AMDGPUTargetLowering::SplitVectorLoad().
Gets or creates the specified node.
Definition at line 5708 of file SelectionDAG.cpp.
References llvm::ArrayRef< T >::begin(), llvm::ArrayRef< T >::end(), and llvm::ArrayRef< T >::size().
Referenced by AddCombineBUILD_VECTORToVPADDL(), AddCombineTo64bitMLAL(), AddCombineTo64bitUMAAL(), AddCombineToVPADD(), AddCombineVUZPToVPADDL(), addIPMSequence(), addRequiredExtensionForVectorMULL(), AddRequiredExtensionForVMULL(), BuildExactSDIV(), llvm::X86TargetLowering::BuildFILD(), buildFromShuffleMostly(), BuildIntrinsicOp(), buildMergeScalars(), buildPCRelGlobalAddress(), buildScalarToVector(), llvm::PPCTargetLowering::BuildSDIVPow2(), llvm::TargetLowering::BuildUDIV(), buildVector(), BuildVectorFromScalar(), BuildVSLDOI(), clampDynamicVectorIndex(), combineAcrossLanesIntrinsic(), combineADC(), combineAdd(), combineAnd(), combineANDXORWithAllOnesIntoANDNP(), CombineBaseUpdate(), combineBasicSADPattern(), combineBitcast(), combineBitcastForMaskedOp(), combineBrCond(), combineCMov(), combineCompareEqual(), combineConcatVectorOfScalars(), combineExtractVectorElt(), combineFaddFsub(), combineFAndFNotToFAndn(), combineFMA(), combineFMinFMax(), llvm::AMDGPUTargetLowering::CombineFMinMaxLegacy(), combineFMinNumFMaxNum(), combineFneg(), combineIntegerAbs(), combineLoad(), combineLogicBlendIntoPBLENDV(), combineLoopSADPattern(), combineMaskedLoad(), combineMaskedStore(), combineMinNumMaxNum(), combineMul(), combineOr(), combineOrCmpEqZeroToCtlzSrl(), combinePCMPAnd1(), combineRedundantDWordShuffle(), combineRedundantHalfShuffle(), combineSelect(), combineSelectAndUse(), combineSelectOfTwoConstants(), combineSetCC(), combineSext(), combineShiftLeft(), combineShiftRightAlgebraic(), combineShuffle(), combineShuffleOfConcatUndef(), combineShuffleToAddSubOrFMAddSub(), combineSignExtendInReg(), combineSIntToFP(), combineStore(), combineSub(), combineTargetShuffle(), combineTestM(), combineToExtendVectorInReg(), combineTruncate(), combineTruncatedArithmetic(), combineUIntToFP(), combineVectorCompareAndMaskUnaryOp(), combineVectorTruncation(), combineVectorTruncationWithPACKSS(), combineVectorTruncationWithPACKUS(), CombineVMOVDRRCandidateWithVecOp(), combineVSelectWithAllOnesOrZeros(), combineVSZext(), combineX86SetCC(), combineX86ShuffleChain(), combineZext(), convertIntLogicToFPLogic(), convertLocVTToValVT(), ConvertSelectToConcatVector(), convertValVTToLocVT(), createCMovFP(), createFPCmp(), createGPRPairNode(), createLoadLR(), createPSADBW(), createSplat(), createStoreLR(), detectAVGPattern(), distributeOpThroughSelect(), EltsFromConsecutiveLoads(), emitCLC(), EmitCMP(), emitCmp(), emitComparison(), emitConditionalComparison(), emitIntrinsicWithChainAndGlue(), emitIntrinsicWithGlue(), EmitKTEST(), emitMemMem(), emitSETCC(), llvm::ARMSelectionDAGInfo::EmitSpecializedLibcall(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForMemchr(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::ARMSelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForMemset(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemset(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrcmp(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrcpy(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrnlen(), EmitVectorComparison(), Expand64BitShift(), ExpandBITCAST(), ExpandBVWithShuffles(), expandExp(), expandExp2(), expandf64Toi32(), llvm::TargetLowering::expandFP_TO_SINT(), ExpandHorizontalBinOp(), expandLog(), expandLog10(), expandLog2(), llvm::TargetLowering::expandMUL_LOHI(), expandPow(), ExpandPowI(), ExpandREAD_REGISTER(), llvm::TargetLowering::expandUnalignedLoad(), llvm::TargetLowering::expandUnalignedStore(), expandV4F32ToV2F64(), expandVAArg(), llvm::PPCTargetLowering::expandVSXLoadForLE(), llvm::PPCTargetLowering::expandVSXStoreForLE(), ExtendToType(), extractF64Exponent(), extractLOHI(), extractSubVector(), ExtractVectorElements(), foldBitcastedFPLogic(), FoldConstantArithmetic(), FoldConstantVectorArithmetic(), foldFreeOpFromSelect(), FoldIntToFPToInt(), foldMaskAndShiftToExtract(), foldMaskAndShiftToScale(), foldMaskedShiftToScaledMask(), foldVectorXorShiftIntoCmp(), foldXorTruncShiftIntoCmp(), genConstMult(), generateEquivalentSub(), GeneratePerfectShuffle(), GenerateTBL(), getAArch64Cmp(), getAArch64XALUOOp(), getAbsolute(), llvm::MipsTargetLowering::getAddrGlobal(), llvm::MipsTargetLowering::getAddrGlobalLargeGOT(), llvm::MipsTargetLowering::getAddrGPRel(), llvm::MipsTargetLowering::getAddrLocal(), llvm::MipsTargetLowering::getAddrNonPIC(), getAnyExtendVectorInReg(), getAnyExtOrTrunc(), getBitcast(), getBitTestCondition(), getBoolExtOrTrunc(), getBoundedStrlen(), getBuildVector(), getBuildVectorSplat(), getCALLSEQ_END(), getCALLSEQ_START(), getCCResult(), getConstant(), llvm::SelectionDAGBuilder::getControlRoot(), getCopyFromParts(), getCopyFromPartsVector(), getCopyFromReg(), llvm::RegsForValue::getCopyFromRegs(), getCopyToParts(), getCopyToPartsVector(), getCopyToReg(), llvm::RegsForValue::getCopyToRegs(), getCTPOP16BitCounts(), getDivRem8(), llvm::HexagonTargetLowering::GetDynamicTLSAddr(), getEstimate(), GetExponent(), getExtendedControlRegister(), getFLUSHW(), getFPBinOp(), getFPTernOp(), getFRAMEADDR(), getGeneralPermuteNode(), getGLOBAL_OFFSET_TABLE(), llvm::AMDGPUTargetLowering::getHiHalf64(), getLimitedPrecisionExp2(), getLogicalNOT(), llvm::AMDGPUTargetLowering::getLoHalf64(), getMaskNode(), getMemBasePlusOffset(), getMemcpyLoadsAndStores(), getMemmoveLoadsAndStores(), getMemsetStringVal(), getMemsetValue(), getMergeValues(), getMul24(), GetNegatedExpression(), getNode(), getNOT(), getPermuteNode(), llvm::HexagonTargetLowering::getPICJumpTableRelocBase(), llvm::X86TargetLowering::getPICJumpTableRelocBase(), llvm::PPCTargetLowering::getPICJumpTableRelocBase(), getReadPerformanceCounter(), getReadTimeStampCounter(), llvm::AMDGPUTargetLowering::getRecipEstimate(), GetRegistersForValue(), llvm::SelectionDAGBuilder::getRoot(), getScalarMaskingNode(), getSelect(), getSelectCC(), getSetCC(), getSETCC(), getSExtOrTrunc(), getSignExtendVectorInReg(), GetSignificand(), getSplatBuildVector(), llvm::AMDGPUTargetLowering::getSqrtEstimate(), getStackArgumentTokenFactor(), getTargetVShiftByConstNode(), getTargetVShiftNode(), GetTLSADDR(), getTOCEntry(), getUNDEF(), getv64i1Argument(), getVAArg(), llvm::SelectionDAGBuilder::getValueImpl(), getVectorCmp(), llvm::TargetLowering::getVectorElementPointer(), getVectorMaskingNode(), getVectorShuffle(), getVShift(), getZeroExtendInReg(), getZeroExtendVectorInReg(), getZeroVector(), getZExtOrTrunc(), HandleMergeInputChains(), llvm::TargetLowering::IncrementMemoryAddress(), initAccumulator(), insert128BitVector(), insert1BitVector(), insertSubVector(), isLoadIncOrDecStore(), joinDwords(), lower1BitVectorShuffle(), Lower256IntArith(), Lower256IntVSETCC(), Lower512IntArith(), LowerADD(), LowerADDC_ADDE_SUBC_SUBE(), LowerAsSplatVectorLoad(), llvm::SelectionDAGBuilder::LowerAsSTATEPOINT(), llvm::HexagonTargetLowering::LowerATOMIC_FENCE(), LowerATOMIC_FENCE(), lowerAtomicArith(), LowerAVXExtend(), LowerBITCAST(), LowerBITREVERSE(), LowerBITREVERSE_XOP(), llvm::LanaiTargetLowering::LowerBlockAddress(), llvm::MSP430TargetLowering::LowerBlockAddress(), llvm::HexagonTargetLowering::LowerBlockAddress(), LowerBoolVSETCC_AVX512(), llvm::LanaiTargetLowering::LowerBR_CC(), llvm::MSP430TargetLowering::LowerBR_CC(), LowerBR_CC(), llvm::HexagonTargetLowering::LowerBUILD_VECTOR(), lowerBuildVectorToBitOp(), LowerBuildVectorv16i8(), LowerBuildVectorv4x32(), LowerBuildVectorv8i16(), llvm::HexagonTargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::NVPTXTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), LowerCallResult(), llvm::TargetLowering::LowerCallTo(), llvm::TargetLowering::lowerCmpEqZeroToCtlzSrl(), llvm::HexagonTargetLowering::LowerCONCAT_VECTORS(), LowerCONCAT_VECTORS(), LowerCONCAT_VECTORSvXi1(), llvm::LanaiTargetLowering::LowerConstantPool(), llvm::HexagonTargetLowering::LowerConstantPool(), LowerConstantPool(), llvm::AMDGPUTargetLowering::LowerCTLZ(), LowerCTLZ(), llvm::HexagonTargetLowering::LowerCTPOP(), lowerCTPOP16BitElements(), lowerCTPOP32BitElements(), LowerCTTZ(), llvm::SelectionDAGBuilder::LowerDeoptimizingReturn(), llvm::AMDGPUTargetLowering::LowerDIVREM24(), lowerDSPIntr(), llvm::LanaiTargetLowering::LowerDYNAMIC_STACKALLOC(), llvm::HexagonTargetLowering::LowerDYNAMIC_STACKALLOC(), LowerDYNAMIC_STACKALLOC(), llvm::HexagonTargetLowering::LowerEH_RETURN(), llvm::SparcTargetLowering::LowerEH_SJLJ_LONGJMP(), llvm::SparcTargetLowering::LowerEH_SJLJ_SETJMP(), LowerEXTEND_VECTOR_INREG(), LowerExtended1BitVectorLoad(), LowerExtendedLoad(), llvm::MSP430TargetLowering::LowerExternalSymbol(), llvm::HexagonTargetLowering::LowerEXTRACT_VECTOR(), LowerEXTRACT_VECTOR_ELT(), LowerEXTRACT_VECTOR_ELT_SSE4(), llvm::SparcTargetLowering::LowerF128Compare(), LowerF128Load(), LowerF128Store(), LowerF64Op(), LowerFABSorFNEG(), llvm::AMDGPUTargetLowering::LowerFCEIL(), LowerFCOPYSIGN(), lowerFCOPYSIGN32(), lowerFCOPYSIGN64(), llvm::AMDGPUTargetLowering::LowerFFLOOR(), LowerFGETSIGN(), llvm::AMDGPUTargetLowering::LowerFNEARBYINT(), llvm::HexagonTargetLowering::LowerFormalArguments(), llvm::SITargetLowering::LowerFormalArguments(), llvm::SystemZTargetLowering::LowerFormalArguments(), llvm::NVPTXTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::SparcTargetLowering::LowerFormalArguments_64(), llvm::AMDGPUTargetLowering::LowerFP64_TO_INT(), LowerFP_EXTEND(), llvm::AMDGPUTargetLowering::LowerFP_TO_FP16(), llvm::AMDGPUTargetLowering::LowerFP_TO_SINT(), LowerFP_TO_SINT(), lowerFP_TO_SINT_STORE(), llvm::AMDGPUTargetLowering::LowerFP_TO_UINT(), LowerFPOWI(), llvm::LanaiTargetLowering::LowerFRAMEADDR(), llvm::AMDGPUTargetLowering::LowerFREM(), llvm::AMDGPUTargetLowering::LowerFRINT(), llvm::AMDGPUTargetLowering::LowerFROUND32(), llvm::AMDGPUTargetLowering::LowerFROUND64(), LowerFSINCOS(), llvm::AMDGPUTargetLowering::LowerFTRUNC(), llvm::HexagonTargetLowering::LowerGLOBAL_OFFSET_TABLE(), llvm::LanaiTargetLowering::LowerGlobalAddress(), llvm::MSP430TargetLowering::LowerGlobalAddress(), llvm::HexagonTargetLowering::LowerGLOBALADDRESS(), llvm::NVPTXTargetLowering::LowerGlobalAddress(), llvm::SparcTargetLowering::LowerGlobalTLSAddress(), lowerGR128Binary(), LowerHorizontalByteSum(), LowerINSERT_SUBVECTOR(), llvm::HexagonTargetLowering::LowerINSERT_VECTOR(), llvm::AMDGPUTargetLowering::LowerINT_TO_FP32(), llvm::AMDGPUTargetLowering::LowerINT_TO_FP64(), LowerInterruptReturn(), llvm::HexagonTargetLowering::LowerINTRINSIC_VOID(), LowerINTRINSIC_W_CHAIN(), llvm::AMDGPUTargetLowering::LowerINTRINSIC_WO_CHAIN(), LowerINTRINSIC_WO_CHAIN(), LowerIntVSETCC_AVX512(), llvm::LanaiTargetLowering::LowerJumpTable(), llvm::MSP430TargetLowering::LowerJumpTable(), llvm::HexagonTargetLowering::LowerJumpTable(), LowerLabelRef(), llvm::HexagonTargetLowering::LowerLOAD(), llvm::MipsTargetLowering::lowerLOAD(), lowerMasksToReg(), LowerMemOpCallTo(), LowerMGATHER(), LowerMLOAD(), lowerMSABinaryBitImmIntr(), lowerMSABitClear(), lowerMSABitClearImm(), lowerMSACopyIntr(), lowerMSALoadIntr(), lowerMSASplatZExt(), lowerMSAStoreIntr(), LowerMSCATTER(), LowerMSTORE(), llvm::LanaiTargetLowering::LowerMUL(), LowerMUL(), LowerMUL_LOHI(), lowerMUL_LOHI32(), LowerMULH(), llvm::R600TargetLowering::LowerOperation(), llvm::HexagonTargetLowering::LowerPREFETCH(), LowerPREFETCH(), llvm::SelectionDAGBuilder::lowerRangeToAssertZExt(), lowerRegToMasks(), llvm::SITargetLowering::LowerReturn(), llvm::AMDGPUTargetLowering::LowerReturn(), llvm::HexagonTargetLowering::LowerReturn(), llvm::SystemZTargetLowering::LowerReturn(), llvm::NVPTXTargetLowering::LowerReturn(), llvm::SparcTargetLowering::LowerReturn_32(), llvm::SparcTargetLowering::LowerReturn_64(), llvm::LanaiTargetLowering::LowerRETURNADDR(), llvm::MSP430TargetLowering::LowerRETURNADDR(), llvm::HexagonTargetLowering::LowerRETURNADDR(), LowerRETURNADDR(), LowerReverse_VECTOR_SHUFFLEv16i8_v8i16(), LowerRotate(), LowerSCALAR_TO_VECTOR(), LowerScalarImmediateShift(), LowerScalarVariableShift(), LowerSDIV(), LowerSDIV_v4i16(), LowerSDIV_v4i8(), llvm::AMDGPUTargetLowering::LowerSDIVREM(), llvm::LanaiTargetLowering::LowerSELECT_CC(), llvm::MSP430TargetLowering::LowerSELECT_CC(), LowerSELECT_CC(), llvm::LanaiTargetLowering::LowerSETCC(), llvm::MSP430TargetLowering::LowerSETCC(), llvm::HexagonTargetLowering::LowerSETCC(), llvm::LanaiTargetLowering::LowerSETCCE(), LowerSETCCE(), LowerShift(), LowerShiftParts(), llvm::MSP430TargetLowering::LowerShifts(), llvm::LanaiTargetLowering::LowerSHL_PARTS(), llvm::MSP430TargetLowering::LowerSIGN_EXTEND(), LowerSIGN_EXTEND(), LowerSIGN_EXTEND_AVX512(), llvm::AMDGPUTargetLowering::LowerSIGN_EXTEND_INREG(), llvm::AMDGPUTargetLowering::LowerSINT_TO_FP(), LowerSINT_TO_FP(), llvm::LanaiTargetLowering::LowerSRL_PARTS(), LowerSTORE(), LowerSUB(), lowerToAddSubOrFMAddSub(), LowerToHorizontalOp(), LowerToTLSExecModel(), llvm::HexagonTargetLowering::LowerToTLSGeneralDynamicModel(), LowerToTLSGeneralDynamicModel32(), llvm::HexagonTargetLowering::LowerToTLSInitialExecModel(), LowerToTLSLocalDynamicModel(), llvm::HexagonTargetLowering::LowerToTLSLocalExecModel(), LowerTruncateVecI1(), LowerTruncatingStore(), LowerUDIV(), llvm::AMDGPUTargetLowering::LowerUDIVREM(), llvm::AMDGPUTargetLowering::LowerUDIVREM64(), llvm::AMDGPUTargetLowering::LowerUINT_TO_FP(), lowerUINT_TO_FP_v2i32(), lowerUINT_TO_FP_vXi32(), LowerUMULO_SMULO(), lowerV16F32VectorShuffle(), lowerV16I32VectorShuffle(), lowerV16I8VectorShuffle(), lowerV2F64VectorShuffle(), lowerV2I64VectorShuffle(), lowerV2X128VectorShuffle(), lowerV4F32VectorShuffle(), lowerV4F64VectorShuffle(), lowerV4I32VectorShuffle(), lowerV4I64VectorShuffle(), lowerV4X128VectorShuffle(), lowerV8F32VectorShuffle(), lowerV8F64VectorShuffle(), lowerV8I16GeneralSingleInputVectorShuffle(), lowerV8I32VectorShuffle(), lowerV8I64VectorShuffle(), LowerVAARG(), LowerVASTART(), llvm::HexagonTargetLowering::LowerVECTOR_SHIFT(), llvm::HexagonTargetLowering::LowerVECTOR_SHUFFLE(), LowerVECTOR_SHUFFLE(), lowerVECTOR_SHUFFLE_ILVEV(), lowerVECTOR_SHUFFLE_ILVL(), lowerVECTOR_SHUFFLE_ILVOD(), lowerVECTOR_SHUFFLE_ILVR(), lowerVECTOR_SHUFFLE_PCKEV(), lowerVECTOR_SHUFFLE_PCKOD(), lowerVECTOR_SHUFFLE_SHF(), lowerVECTOR_SHUFFLE_VSHF(), LowerVECTOR_SHUFFLEv8i8(), LowerVectorAllZeroTest(), LowerVectorBroadcast(), LowerVectorCTLZ(), LowerVectorCTLZ_AVX512(), LowerVectorCTLZInRegLUT(), LowerVectorCTPOP(), LowerVectorCTPOPBitmath(), LowerVectorCTPOPInRegLUT(), LowerVectorFP_TO_INT(), LowerVectorINT_TO_FP(), lowerVectorSETCC(), lowerVectorShuffleAsBitBlend(), lowerVectorShuffleAsBitMask(), lowerVectorShuffleAsBlend(), lowerVectorShuffleAsBlendOfPSHUFBs(), lowerVectorShuffleAsBroadcast(), lowerVectorShuffleAsByteRotate(), lowerVectorShuffleAsElementInsertion(), lowerVectorShuffleAsInsertPS(), lowerVectorShuffleAsLanePermuteAndBlend(), lowerVectorShuffleAsPermuteAndUnpack(), lowerVectorShuffleAsRotate(), lowerVectorShuffleAsShift(), lowerVectorShuffleAsSpecificZeroOrAnyExtend(), lowerVectorShuffleAsTruncBroadcast(), lowerVectorShuffleAsZeroOrAnyExtend(), lowerVectorShuffleToEXPAND(), lowerVectorShuffleWithPERMV(), lowerVectorShuffleWithPSHUFB(), lowerVectorShuffleWithSHUFPD(), lowerVectorShuffleWithSHUFPS(), lowerVectorShuffleWithSSE4A(), lowerVectorShuffleWithUndefHalf(), lowerVectorShuffleWithUNPCK(), llvm::HexagonTargetLowering::LowerVSELECT(), LowerVSETCC(), LowerWRITE_REGISTER(), lowerX86CmpEqZeroToCtlzSrl(), lowerX86FPLogicOp(), LowerXALUO(), LowerXOR(), LowerZERO_EXTEND_AVX512(), llvm::SparcTargetLowering::makeAddress(), llvm::SparcTargetLowering::makeHiLoPair(), MaterializeSETB(), moveBelowOrigChain(), OptimizeConditionalInDecrement(), partitionShuffleOfConcats(), Passv64i1ArgInRegs(), performADDCombine(), PerformADDCombineWithOperands(), performAddSubLongCombine(), performANDCombine(), PerformANDCombine(), PerformARMBUILD_VECTORCombine(), performAssertZextCombine(), PerformBFICombine(), performBitcastCombine(), llvm::ARMTargetLowering::PerformBRCONDCombine(), performBRCONDCombine(), PerformBUILD_VECTORCombine(), llvm::ARMTargetLowering::PerformCMOVCombine(), performCMovFPCombine(), llvm::ARMTargetLowering::PerformCMOVToBFICombine(), performConcatVectorsCombine(), performCONDCombine(), llvm::R600TargetLowering::PerformDAGCombine(), llvm::AMDGPUTargetLowering::PerformDAGCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), performDivRemCombine(), performDSPShiftCombine(), performExtendCombine(), PerformExtendCombine(), performFDivCombine(), llvm::AMDGPUTargetLowering::performFNegCombine(), performFPMed3ImmCombine(), performFpToIntCombine(), PerformInsertEltCombine(), performIntegerAbsCombine(), performIntMed3ImmCombine(), performIntrinsicCombine(), PerformIntrinsicCombine(), performIntToFpCombine(), llvm::AMDGPUTargetLowering::performLoadCombine(), performMulCombine(), PerformMULCombine(), llvm::AMDGPUTargetLowering::performMulhsCombine(), llvm::AMDGPUTargetLowering::performMulhuCombine(), llvm::AMDGPUTargetLowering::performMulLoHi24Combine(), performORCombine(), PerformORCombine(), PerformREMCombine(), llvm::AMDGPUTargetLowering::performSelectCombine(), performSELECTCombine(), PerformSELECTCombine(), performSelectCombine(), performSetccAddFolding(), performSETCCCombine(), PerformShiftCombine(), llvm::AMDGPUTargetLowering::performShlCombine(), llvm::AMDGPUTargetLowering::performSraCombine(), performSRACombine(), llvm::AMDGPUTargetLowering::performSrlCombine(), performSRLCombine(), llvm::AMDGPUTargetLowering::performStoreCombine(), PerformSTORECombine(), performTBZCombine(), PerformVCVTCombine(), PerformVDIVCombine(), PerformVDUPLANECombine(), PerformVECTOR_SHUFFLECombine(), performVectorCompareAndMaskUnaryOpCombine(), PerformVMOVDRRCombine(), PerformVMULCombine(), performVSELECTCombine(), performVSelectCombine(), performXORCombine(), PrepareCall(), PrepareTailCall(), llvm::SystemZTargetLowering::prepareVolatileOrAtomicLoad(), promoteExtBeforeAdd(), promoteToConstantPool(), llvm::AArch64TargetLowering::ReconstructShuffle(), recoverFramePointer(), reduceMaskedLoadToScalarLoad(), reduceMaskedStoreToScalarStore(), reduceVMULWidth(), ReplaceAllUsesWith(), ReplaceBITCASTResults(), replaceInChain(), ReplaceINTRINSIC_W_CHAIN(), ReplaceLoadVector(), llvm::AVRTargetLowering::ReplaceNodeResults(), llvm::SparcTargetLowering::ReplaceNodeResults(), llvm::PPCTargetLowering::ReplaceNodeResults(), llvm::X86TargetLowering::ReplaceNodeResults(), ReplaceREADCYCLECOUNTER(), ReplaceReductionResults(), llvm::TargetLowering::scalarizeVectorLoad(), llvm::TargetLowering::scalarizeVectorStore(), selectMADD(), selectMSUB(), ShrinkLoadReplaceStoreWithStore(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifySetCC(), simplifyShuffleOperandRecursively(), llvm::TargetLowering::softenSetCCOperands(), llvm::AMDGPUTargetLowering::split64BitValue(), splitAndLowerVectorShuffle(), llvm::AMDGPUTargetLowering::splitBinaryBitConstantOpImpl(), splitInt128(), splitStores(), splitStoreSplat(), SplitVector(), llvm::AMDGPUTargetLowering::SplitVectorLoad(), llvm::AMDGPUTargetLowering::SplitVectorStore(), SplitVSETCC(), truncateVectorCompareWithPACKSS(), tryBuildVectorReplicate(), tryCombineCRC32(), tryCombineFixedPointConvert(), tryCombineLongOpWithDup(), tryCombineShiftImm(), tryCombineToBSL(), tryCombineToEXTR(), tryExtendDUPToExtractHigh(), tryFormConcatFromShuffle(), tryLowerToSLI(), tryMatchAcrossLaneShuffleForReduction(), TryMULWIDECombine(), tryToFoldExtendOfConstant(), UnpackFromArgumentSlot(), UnrollVectorOp(), llvm::SelectionDAGBuilder::visitBitTestCase(), llvm::SelectionDAGBuilder::visitBitTestHeader(), llvm::SelectionDAGBuilder::visitJumpTable(), llvm::SelectionDAGBuilder::visitJumpTableHeader(), llvm::SelectionDAGBuilder::visitSPDescriptorParent(), llvm::SelectionDAGBuilder::visitSwitchCase(), WidenMaskArithmetic(), WidenVector(), WinDBZCheckDenominator(), and XFormVExtractWithShuffleIntoLoad().
| SDValue SelectionDAG::getNode | ( | unsigned | Opcode, |
| const SDLoc & | DL, | ||
| EVT | VT, | ||
| ArrayRef< SDValue > | Ops, | ||
| const SDNodeFlags * | Flags = nullptr |
||
| ) |
Definition at line 5724 of file SelectionDAG.cpp.
References AddNodeIDNode(), assert(), llvm::ISD::BR_CC, llvm::ISD::CONCAT_VECTORS, E, FoldCONCAT_VECTORS(), llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), getNode(), getValueType(), getVTList(), llvm::MVT::Glue, N, llvm::ISD::SELECT_CC, and llvm::ArrayRef< T >::size().
| SDValue SelectionDAG::getNode | ( | unsigned | Opcode, |
| const SDLoc & | DL, | ||
| ArrayRef< EVT > | ResultTys, | ||
| ArrayRef< SDValue > | Ops | ||
| ) |
Definition at line 5786 of file SelectionDAG.cpp.
References getNode(), and getVTList().
| SDValue SelectionDAG::getNode | ( | unsigned | Opcode, |
| const SDLoc & | DL, | ||
| SDVTList | VTs, | ||
| ArrayRef< SDValue > | Ops | ||
| ) |
Definition at line 5791 of file SelectionDAG.cpp.
References AddNodeIDNode(), llvm::ISD::AND, E, llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), getNode(), llvm::SDValue::getOperand(), llvm::EVT::getScalarSizeInBits(), llvm::MVT::Glue, llvm::MVT::i1, N, llvm::SDVTList::NumVTs, llvm::ISD::SHL_PARTS, llvm::ISD::SIGN_EXTEND_INREG, llvm::ISD::SRA_PARTS, llvm::ISD::SRL_PARTS, and llvm::SDVTList::VTs.
Gets or creates the specified node.
Definition at line 3156 of file SelectionDAG.cpp.
References AddNodeIDNode(), E, llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), getVTList(), and llvm::None.
Definition at line 3171 of file SelectionDAG.cpp.
References AddNodeIDNode(), llvm::ISD::ANY_EXTEND, llvm::lltok::APFloat, assert(), llvm::ISD::BITCAST, llvm::APFloat::bitcastToAPInt(), llvm::ISD::BITREVERSE, llvm::EVT::bitsGT(), llvm::EVT::bitsLE(), llvm::EVT::bitsLT(), llvm::ISD::BSWAP, llvm::APInt::byteSwap(), C, llvm::APFloat::changeSign(), llvm::APFloat::clearSign(), llvm::ISD::CONCAT_VECTORS, llvm::APFloat::convert(), llvm::APFloat::convertFromAPInt(), llvm::APFloat::convertToInteger(), llvm::APInt::countLeadingZeros(), llvm::APInt::countPopulation(), llvm::APInt::countTrailingZeros(), llvm::ISD::CTLZ, llvm::ISD::CTLZ_ZERO_UNDEF, llvm::ISD::CTPOP, llvm::ISD::CTTZ, llvm::ISD::CTTZ_ZERO_UNDEF, E, EVTToAPFloatSemantics(), llvm::ISD::EXTRACT_VECTOR_ELT, llvm::MVT::f128, llvm::MVT::f16, llvm::MVT::f32, llvm::MVT::f64, llvm::ISD::FABS, llvm::ISD::FCEIL, llvm::ISD::FFLOOR, llvm::ISD::FNEG, FoldConstantVectorArithmetic(), llvm::ISD::FP_EXTEND, llvm::ISD::FP_ROUND, llvm::ISD::FP_TO_SINT, llvm::ISD::FP_TO_UINT, llvm::ISD::FSUB, llvm::ISD::FTRUNC, getConstant(), getConstantFP(), llvm::SDValue::getConstantOperandVal(), llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), llvm::SDValue::getNode(), getNode(), llvm::APInt::getNullValue(), llvm::SDNode::getOpcode(), llvm::SDValue::getOperand(), llvm::SDNode::getOperand(), llvm::EVT::getScalarSizeInBits(), llvm::EVT::getScalarType(), llvm::EVT::getSizeInBits(), getTarget(), getUNDEF(), llvm::SDValue::getValueSizeInBits(), llvm::SDValue::getValueType(), llvm::EVT::getVectorElementType(), llvm::EVT::getVectorNumElements(), getVTList(), llvm::APInt::getZExtValue(), llvm::MVT::Glue, llvm::MVT::i128, llvm::MVT::i16, llvm::MVT::i32, llvm::MVT::i64, llvm::APFloatBase::IEEEdouble(), llvm::APFloatBase::IEEEhalf(), llvm::APFloatBase::IEEEquad(), llvm::APFloatBase::IEEEsingle(), llvm::integerPartWidth, llvm::EVT::isFloatingPoint(), llvm::EVT::isInteger(), llvm::SDValue::isUndef(), llvm::EVT::isVector(), llvm_unreachable, llvm::ISD::MERGE_VALUES, N, llvm::APFloatBase::opInexact, llvm::APFloatBase::opInvalidOp, llvm::APFloatBase::opOK, llvm::APFloatBase::rmNearestTiesToEven, llvm::APFloatBase::rmTowardNegative, llvm::APFloatBase::rmTowardPositive, llvm::APFloatBase::rmTowardZero, llvm::APFloat::roundToIntegral(), llvm::ISD::SCALAR_TO_VECTOR, llvm::APInt::sextOrTrunc(), llvm::ISD::SIGN_EXTEND, llvm::ISD::SINT_TO_FP, llvm::ISD::TokenFactor, llvm::ISD::TRUNCATE, llvm::ISD::UINT_TO_FP, llvm::ISD::UNDEF, llvm::ISD::ZERO_EXTEND, and llvm::APInt::zextOrTrunc().
| SDValue SelectionDAG::getNode | ( | unsigned | Opcode, |
| const SDLoc & | DL, | ||
| EVT | VT, | ||
| SDValue | N1, | ||
| SDValue | N2, | ||
| const SDNodeFlags * | Flags = nullptr |
||
| ) |
Definition at line 3729 of file SelectionDAG.cpp.
References llvm::ISD::ADD, llvm::APFloat::add(), llvm::ISD::ADDC, llvm::ISD::ADDE, AddNodeIDNode(), llvm::ISD::AND, assert(), llvm::ISD::AssertSext, llvm::ISD::AssertZext, llvm::EVT::bitsLE(), llvm::ISD::BUILD_PAIR, llvm::ISD::BUILD_VECTOR, C, llvm::ISD::CONCAT_VECTORS, llvm::APFloat::convert(), llvm::APFloat::copySign(), llvm::APFloat::divide(), llvm::dyn_cast(), E, llvm::ISD::EntryToken, EVTToAPFloatSemantics(), llvm::ISD::EXTRACT_ELEMENT, llvm::ISD::EXTRACT_SUBVECTOR, llvm::ISD::EXTRACT_VECTOR_ELT, llvm::ISD::FADD, llvm::ISD::FCOPYSIGN, llvm::ISD::FDIV, llvm::ISD::FMUL, FoldCONCAT_VECTORS(), FoldConstantArithmetic(), llvm::ISD::FP_ROUND, llvm::ISD::FP_ROUND_INREG, llvm::ISD::FREM, llvm::ISD::FSUB, llvm::APInt::getAllOnesValue(), getAnyExtOrTrunc(), llvm::ConstantSDNode::getAPIntValue(), getBuildVector(), getConstant(), getConstantFP(), llvm::SDValue::getNode(), getNode(), llvm::SDValue::getNumOperands(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::EVT::getScalarSizeInBits(), llvm::EVT::getScalarType(), getSExtOrTrunc(), llvm::SDValue::getSimpleValueType(), llvm::EVT::getSimpleVT(), llvm::EVT::getSizeInBits(), getTarget(), getUNDEF(), llvm::SDValue::getValueSizeInBits(), llvm::SDValue::getValueType(), llvm::EVT::getVectorElementType(), llvm::EVT::getVectorNumElements(), getVTList(), llvm::ConstantSDNode::getZExtValue(), llvm::MVT::Glue, llvm::TargetLoweringBase::hasFloatingPointExceptions(), i, llvm::MVT::i1, llvm::ISD::INSERT_SUBVECTOR, llvm::ISD::INSERT_VECTOR_ELT, llvm::ISD::isBuildVectorOfConstantSDNodes(), isCommutativeBinOp(), llvm::EVT::isFloatingPoint(), llvm::EVT::isInteger(), llvm::EVT::isSimple(), llvm::SDValue::isUndef(), llvm::EVT::isVector(), LLVM_FALLTHROUGH, llvm::Log2_32_Ceil(), llvm::APInt::lshr(), llvm::APFloat::mod(), llvm::ISD::MUL, llvm::ISD::MULHS, llvm::ISD::MULHU, llvm::APFloat::multiply(), N, llvm::APFloatBase::opDivByZero, llvm::APFloatBase::opInvalidOp, llvm::TargetMachine::Options, llvm::ISD::OR, llvm::MVT::Other, llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back(), llvm::APFloatBase::rmNearestTiesToEven, llvm::ISD::ROTL, llvm::ISD::ROTR, llvm::ISD::SDIV, llvm::ISD::SHL, llvm::ISD::SIGN_EXTEND_INREG, llvm::SmallVectorTemplateCommon< T >::size(), llvm::ISD::SMAX, llvm::ISD::SMIN, llvm::ISD::SRA, llvm::ISD::SREM, llvm::ISD::SRL, llvm::ISD::SUB, llvm::APFloat::subtract(), std::swap(), llvm::ISD::TokenFactor, llvm::APInt::trunc(), llvm::ISD::UDIV, llvm::ISD::UMAX, llvm::ISD::UMIN, llvm::TargetOptions::UnsafeFPMath, llvm::ISD::UREM, llvm::NVPTX::PTXLdStInstCode::V2, llvm::ISD::XOR, and llvm::APInt::zextOrTrunc().
| SDValue SelectionDAG::getNode | ( | unsigned | Opcode, |
| const SDLoc & | DL, | ||
| EVT | VT, | ||
| SDValue | N1, | ||
| SDValue | N2, | ||
| SDValue | N3 | ||
| ) |
Definition at line 4210 of file SelectionDAG.cpp.
References AddNodeIDNode(), assert(), llvm::ISD::BITCAST, llvm::ISD::CONCAT_VECTORS, llvm::dyn_cast(), E, llvm::ISD::FMA, FoldCONCAT_VECTORS(), FoldConstantVectorArithmetic(), FoldSetCC(), llvm::APFloat::fusedMultiplyAdd(), getConstantFP(), llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), llvm::SDValue::getSimpleValueType(), llvm::EVT::getSimpleVT(), getUNDEF(), llvm::ConstantFPSDNode::getValueAPF(), llvm::SDValue::getValueType(), llvm::EVT::getVectorNumElements(), getVTList(), llvm::ConstantSDNode::getZExtValue(), llvm::MVT::Glue, llvm::TargetLoweringBase::hasFloatingPointExceptions(), llvm::ISD::INSERT_SUBVECTOR, llvm::ISD::INSERT_VECTOR_ELT, llvm::EVT::isSimple(), llvm::EVT::isVector(), llvm_unreachable, N, llvm::APFloatBase::opInvalidOp, llvm::APFloatBase::rmNearestTiesToEven, llvm::ISD::SELECT, llvm::ISD::SETCC, llvm::NVPTX::PTXLdStInstCode::V2, and llvm::ISD::VECTOR_SHUFFLE.
| SDValue SelectionDAG::getNode | ( | unsigned | Opcode, |
| const SDLoc & | DL, | ||
| EVT | VT, | ||
| SDValue | N1, | ||
| SDValue | N2, | ||
| SDValue | N3, | ||
| SDValue | N4 | ||
| ) |
Definition at line 4318 of file SelectionDAG.cpp.
References getNode().
| SDValue SelectionDAG::getNode | ( | unsigned | Opcode, |
| const SDLoc & | DL, | ||
| EVT | VT, | ||
| SDValue | N1, | ||
| SDValue | N2, | ||
| SDValue | N3, | ||
| SDValue | N4, | ||
| SDValue | N5 | ||
| ) |
Definition at line 4324 of file SelectionDAG.cpp.
References getNode().
Definition at line 5839 of file SelectionDAG.cpp.
References getNode(), and llvm::None.
Definition at line 5844 of file SelectionDAG.cpp.
References getNode().
| SDValue SelectionDAG::getNode | ( | unsigned | Opcode, |
| const SDLoc & | DL, | ||
| SDVTList | VTs, | ||
| SDValue | N1, | ||
| SDValue | N2 | ||
| ) |
Definition at line 5850 of file SelectionDAG.cpp.
References getNode().
| SDValue SelectionDAG::getNode | ( | unsigned | Opcode, |
| const SDLoc & | DL, | ||
| SDVTList | VTs, | ||
| SDValue | N1, | ||
| SDValue | N2, | ||
| SDValue | N3 | ||
| ) |
Definition at line 5856 of file SelectionDAG.cpp.
References getNode().
| SDValue SelectionDAG::getNode | ( | unsigned | Opcode, |
| const SDLoc & | DL, | ||
| SDVTList | VTs, | ||
| SDValue | N1, | ||
| SDValue | N2, | ||
| SDValue | N3, | ||
| SDValue | N4 | ||
| ) |
Definition at line 5862 of file SelectionDAG.cpp.
References getNode().
| SDValue SelectionDAG::getNode | ( | unsigned | Opcode, |
| const SDLoc & | DL, | ||
| SDVTList | VTs, | ||
| SDValue | N1, | ||
| SDValue | N2, | ||
| SDValue | N3, | ||
| SDValue | N4, | ||
| SDValue | N5 | ||
| ) |
Definition at line 5868 of file SelectionDAG.cpp.
References getNode().
| SDNode * SelectionDAG::getNodeIfExists | ( | unsigned | Opcode, |
| SDVTList | VTList, | ||
| ArrayRef< SDValue > | Ops, | ||
| const SDNodeFlags * | Flags = nullptr |
||
| ) |
Get the specified node if it's already available, or else return NULL.
getNodeIfExists - Get the specified node if it's already available, or else return NULL.
Definition at line 6385 of file SelectionDAG.cpp.
References AddNodeIDNode(), E, llvm::MVT::Glue, llvm::SDVTList::NumVTs, and llvm::SDVTList::VTs.
Create a bitwise NOT operation as (XOR Val, -1).
getNOT - Create a bitwise NOT operation as (XOR Val, -1).
Definition at line 1056 of file SelectionDAG.cpp.
References llvm::APInt::getAllOnesValue(), getConstant(), getNode(), llvm::EVT::getScalarType(), llvm::EVT::getSizeInBits(), and llvm::ISD::XOR.
Referenced by combineSetCC(), llvm::AMDGPUTargetLowering::LowerFROUND64(), llvm::AMDGPUTargetLowering::LowerFTRUNC(), lowerMSABitClear(), LowerVSETCC(), and llvm::TargetLowering::SimplifySetCC().
Definition at line 1632 of file SelectionDAG.cpp.
References llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), E, getVTList(), llvm::None, and llvm::ISD::Register.
Referenced by llvm::RegsForValue::AddInlineAsmOperands(), createCMovFP(), llvm::AMDGPUTargetLowering::CreateLiveInRegister(), llvm::MipsTargetLowering::getAddrGPRel(), getCopyFromReg(), getCopyToReg(), llvm::HexagonTargetLowering::GetDynamicTLSAddr(), getGatherNode(), llvm::MipsDAGToDAGISel::getGlobalBaseReg(), llvm::MipsTargetLowering::getGlobalReg(), llvm::MipsTargetLowering::getOpndList(), getPrefetchNode(), getScatterNode(), getTOCEntry(), LowerATOMIC_FENCE(), llvm::HexagonTargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), llvm::SelectionDAGBuilder::LowerCallTo(), llvm::LanaiTargetLowering::LowerConstantPool(), llvm::HexagonTargetLowering::LowerEH_RETURN(), llvm::LanaiTargetLowering::LowerGlobalAddress(), llvm::SparcTargetLowering::LowerGlobalTLSAddress(), llvm::SparcTargetLowering::LowerINTRINSIC_WO_CHAIN(), llvm::LanaiTargetLowering::LowerJumpTable(), LowerMemOpCallTo(), llvm::SITargetLowering::LowerReturn(), llvm::HexagonTargetLowering::LowerReturn(), llvm::SystemZTargetLowering::LowerReturn(), llvm::SparcTargetLowering::LowerReturn_32(), llvm::SparcTargetLowering::LowerReturn_64(), LowerSETCCE(), LowerVASTART(), llvm::PPCTargetLowering::PerformDAGCombine(), performNEONPostLDSTCombine(), performPostLD1Combine(), PrepareCall(), replaceZeroVectorStore(), llvm::PPCTargetLowering::SelectAddressRegImm(), llvm::PPCTargetLowering::SelectAddressRegRegOnly(), and llvm::SelectionDAGISel::SelectCodeCommon().
Definition at line 1646 of file SelectionDAG.cpp.
References AddNodeIDNode(), llvm::FoldingSetNodeID::AddPointer(), E, getVTList(), llvm::None, llvm::ISD::RegisterMask, and llvm::MVT::Untyped.
Referenced by llvm::MipsTargetLowering::getOpndList(), llvm::SystemZTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), and llvm::SparcTargetLowering::LowerGlobalTLSAddress().
Return the root tag of the SelectionDAG.
Definition at line 378 of file SelectionDAG.h.
Referenced by llvm::DOTGraphTraits< SelectionDAG * >::addCustomGraphFeatures(), llvm::checkForCycles(), llvm::SelectionDAGBuilder::getControlRoot(), llvm::ScheduleDAGSDNodes::getCustomGraphFeatures(), getMemCmpLoad(), llvm::SelectionDAGBuilder::getRoot(), Legalize(), llvm::SelectionDAGBuilder::LowerDeoptimizingReturn(), llvm::NVPTXTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), LowerFPOWI(), RemoveDeadNode(), RemoveDeadNodes(), ReplaceAllUsesOfValueWith(), ReplaceAllUsesWith(), and llvm::DAGTypeLegalizer::run().
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Helper function to make it easier to build Select's if you just have operands and don't want to check for vector.
Definition at line 817 of file SelectionDAG.h.
References assert(), getNode(), llvm::SDValue::getValueType(), llvm::EVT::isVector(), llvm::ISD::SELECT, and llvm::ISD::VSELECT.
Referenced by combineMaskedLoadConstantMask(), llvm::AMDGPUTargetLowering::LowerFRINT(), llvm::AMDGPUTargetLowering::LowerINT_TO_FP32(), llvm::LanaiTargetLowering::LowerSHL_PARTS(), llvm::LanaiTargetLowering::LowerSRL_PARTS(), and performSelectCombine().
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Helper function to make it easier to build SelectCC's if you just have an ISD::CondCode instead of an SDValue.
Definition at line 830 of file SelectionDAG.h.
References getCondCode(), getNode(), llvm::SDValue::getValueType(), and llvm::ISD::SELECT_CC.
Referenced by llvm::TargetLowering::expandFP_TO_SINT(), llvm::TargetLowering::expandMUL_LOHI(), llvm::AMDGPUTargetLowering::LowerFP_TO_FP16(), llvm::AMDGPUTargetLowering::LowerSDIVREM(), llvm::AMDGPUTargetLowering::LowerUDIVREM(), llvm::AMDGPUTargetLowering::LowerUDIVREM64(), and llvm::R600TargetLowering::PerformDAGCombine().
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Definition at line 332 of file SelectionDAG.h.
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Helper function to make it easier to build SetCC's if you just have an ISD::CondCode instead of an SDValue.
Definition at line 804 of file SelectionDAG.h.
References assert(), getCondCode(), getNode(), llvm::SDValue::getValueType(), llvm::EVT::isVector(), llvm::ISD::SETCC, and llvm::ISD::SETCC_INVALID.
Referenced by combineFMinNumFMaxNum(), combineSelect(), combineSetCC(), combineVSelectWithAllOnesOrZeros(), FoldSetCC(), foldXorTruncShiftIntoCmp(), llvm::AMDGPUTargetLowering::LowerCTLZ(), llvm::AMDGPUTargetLowering::LowerDIVREM24(), llvm::AMDGPUTargetLowering::LowerFCEIL(), llvm::AMDGPUTargetLowering::LowerFFLOOR(), llvm::AMDGPUTargetLowering::LowerFRINT(), llvm::AMDGPUTargetLowering::LowerFROUND32(), llvm::AMDGPUTargetLowering::LowerFROUND64(), llvm::AMDGPUTargetLowering::LowerFTRUNC(), llvm::AMDGPUTargetLowering::LowerINT_TO_FP32(), llvm::LanaiTargetLowering::LowerSHL_PARTS(), llvm::LanaiTargetLowering::LowerSRL_PARTS(), LowerUMULO_SMULO(), LowerVectorCTLZInRegLUT(), LowerVSETCC(), llvm::AMDGPUTargetLowering::performSelectCombine(), performSELECTCombine(), performVSelectCombine(), llvm::TargetLowering::SimplifySetCC(), llvm::SelectionDAGBuilder::visitBitTestCase(), llvm::SelectionDAGBuilder::visitBitTestHeader(), llvm::SelectionDAGBuilder::visitJumpTableHeader(), llvm::SelectionDAGBuilder::visitSPDescriptorParent(), and llvm::SelectionDAGBuilder::visitSwitchCase().
Convert Op, which must be of integer type, to the integer type VT, by either sign-extending or truncating it.
Definition at line 988 of file SelectionDAG.cpp.
References llvm::EVT::bitsGT(), getNode(), llvm::SDValue::getValueType(), llvm::ISD::SIGN_EXTEND, and llvm::ISD::TRUNCATE.
Referenced by combineShuffleOfScalars(), llvm::TargetLowering::expandFP_TO_SINT(), FoldCONCAT_VECTORS(), getNode(), LowerExtendedLoad(), llvm::AMDGPUTargetLowering::LowerINT_TO_FP32(), LowerVSETCC(), llvm::AMDGPUTargetLowering::performMulCombine(), and llvm::AMDGPUTargetLowering::performMulhsCombine().
Return the specified value casted to the target's desired shift amount type.
getShiftAmountOperand - Return the specified value casted to the target's desired shift amount type.
Definition at line 1762 of file SelectionDAG.cpp.
References getDataLayout(), llvm::TargetLoweringBase::getShiftAmountTy(), llvm::SDValue::getValueType(), getZExtOrTrunc(), and llvm::EVT::isVector().
Referenced by UnrollVectorOp().
Return an operation which will sign extend the low lanes of the operand into the specified vector type.
For example, this can convert a v16i8 into a v4i32 by sign extending the low four lanes of the operand from i8 to i32.
Definition at line 1032 of file SelectionDAG.cpp.
References assert(), getNode(), llvm::EVT::getSizeInBits(), llvm::SDValue::getValueSizeInBits(), llvm::SDValue::getValueType(), llvm::EVT::getVectorNumElements(), llvm::EVT::isVector(), and llvm::ISD::SIGN_EXTEND_VECTOR_INREG.
Referenced by combineToExtendVectorInReg(), and LowerExtendedLoad().
Return a splat ISD::BUILD_VECTOR node, consisting of Op splatted to all elements.
VT must be a vector type. Op's type must be the same as (or, for integers, a type wider than) VT's element type.
Definition at line 647 of file SelectionDAG.h.
References assert(), llvm::EVT::bitsLE(), llvm::ISD::BUILD_VECTOR, getNode(), llvm::SDValue::getOpcode(), llvm::SDValue::getValueType(), llvm::EVT::getVectorElementType(), llvm::EVT::getVectorNumElements(), llvm::EVT::isInteger(), and llvm::ISD::UNDEF.
Referenced by getConstant(), getConstantFP(), getMemsetValue(), getUniformBase(), getVectorShuffle(), and WidenMaskArithmetic().
Compute the VTs needed for the low/hi parts of a type which is split (or expanded) into two not necessarily identical pieces.
GetSplitDestVTs - Compute the VTs needed for the low/hi parts of a type which is split (or expanded) into two not necessarily identical pieces.
Definition at line 7292 of file SelectionDAG.cpp.
References assert(), getContext(), llvm::TargetLoweringBase::getTypeToTransformTo(), llvm::EVT::getVectorElementType(), llvm::EVT::getVectorNumElements(), llvm::EVT::getVectorVT(), and llvm::EVT::isVector().
Referenced by ReplaceReductionResults(), SplitVector(), llvm::AMDGPUTargetLowering::SplitVectorLoad(), llvm::AMDGPUTargetLowering::SplitVectorStore(), and SplitVSETCC().
Construct a node to track a Value* through the backend.
Definition at line 1699 of file SelectionDAG.cpp.
References AddNodeIDNode(), llvm::FoldingSetNodeID::AddPointer(), assert(), E, llvm::Value::getType(), getVTList(), llvm::Type::isPointerTy(), llvm::None, llvm::MVT::Other, and llvm::ISD::SRCVALUE.
Referenced by llvm::SelectionDAGBuilder::LowerAsSTATEPOINT().
Compute a TokenFactor to force all the incoming stack arguments to be loaded from the stack.
getStackArgumentTokenFactor - Compute a TokenFactor to force all the incoming stack arguments to be loaded from the stack.
This is used in tail call lowering to protect stack arguments from being clobbered.
Definition at line 4333 of file SelectionDAG.cpp.
References getEntryNode(), getNode(), L, llvm::MVT::Other, llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back(), and llvm::ISD::TokenFactor.
| SDValue SelectionDAG::getStore | ( | SDValue | Chain, |
| const SDLoc & | dl, | ||
| SDValue | Val, | ||
| SDValue | Ptr, | ||
| MachinePointerInfo | PtrInfo, | ||
| unsigned | Alignment = 0, |
||
| MachineMemOperand::Flags | MMOFlags = MachineMemOperand::MONone, |
||
| const AAMDNodes & | AAInfo = AAMDNodes() |
||
| ) |
Helper function to build ISD::STORE nodes.
This function will set the MOStore flag on MMOFlags, but you can set it if you want. The MOLoad and MOInvariant flags must not be set.
Definition at line 5439 of file SelectionDAG.cpp.
References assert(), getEVTAlignment(), getMachineFunction(), llvm::MachineFunction::getMachineMemOperand(), llvm::EVT::getStoreSize(), llvm::SDValue::getValueType(), InferPointerInfo(), llvm::PointerUnion< PT1, PT2 >::isNull(), llvm::MachineMemOperand::MOLoad, llvm::MachineMemOperand::MOStore, llvm::MVT::Other, and llvm::MachinePointerInfo::V.
Referenced by combineExtractVectorElt(), combineStore(), EmitTailCallStoreFPAndRetAddr(), EmitTailCallStoreRetAddr(), llvm::ARMSelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForMemset(), llvm::TargetLowering::expandUnalignedLoad(), llvm::TargetLowering::expandUnalignedStore(), expandVAArg(), expandVACopy(), getAddressForMemoryInput(), getMemcpyLoadsAndStores(), getMemmoveLoadsAndStores(), getReadTimeStampCounter(), getTruncStore(), llvm::HexagonTargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), llvm::HexagonTargetLowering::LowerEH_RETURN(), llvm::SparcTargetLowering::LowerF128_LibCallArg(), LowerF128Store(), llvm::SystemZTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::SparcTargetLowering::LowerFormalArguments_64(), lowerFP_TO_SINT_STORE(), LowerINTRINSIC_W_CHAIN(), LowerMemOpCallTo(), lowerMSAStoreIntr(), LowerSTORE(), LowerTruncatingStore(), LowerVAARG(), llvm::LanaiTargetLowering::LowerVASTART(), llvm::MSP430TargetLowering::LowerVASTART(), llvm::HexagonTargetLowering::LowerVASTART(), LowerVASTART(), memsetStore(), llvm::AMDGPUTargetLowering::performStoreCombine(), PerformSTORECombine(), reduceMaskedStoreToScalarStore(), ShrinkLoadReplaceStoreWithStore(), spillIncomingStatepointValue(), splitStores(), splitStoreSplat(), and StoreTailCallArgumentsToStackSlot().
| SDValue SelectionDAG::getStore | ( | SDValue | Chain, |
| const SDLoc & | dl, | ||
| SDValue | Val, | ||
| SDValue | Ptr, | ||
| MachineMemOperand * | MMO | ||
| ) |
Definition at line 5460 of file SelectionDAG.cpp.
References llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), assert(), E, llvm::MachinePointerInfo::getAddrSpace(), llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), llvm::MachineMemOperand::getPointerInfo(), getUNDEF(), llvm::SDValue::getValueType(), getVTList(), llvm::MVT::Other, Ptr, llvm::ISD::STORE, llvm::RegState::Undef, and llvm::ISD::UNINDEXED.
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Definition at line 330 of file SelectionDAG.h.
References llvm::MachineFunction::getSubtarget().
Referenced by llvm::HexagonSelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::XCoreSelectionDAGInfo::EmitTargetCodeForMemcpy(), getIndexedAddressParts(), llvm::SDNode::getOperationName(), init(), insert128BitVector(), llvm::PPC::isVPKUDUMShuffleMask(), patchMatchingInput(), and recoverFramePointer().
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Definition at line 329 of file SelectionDAG.h.
References llvm::SystemZISD::TM.
Referenced by combineFMinFMax(), combineSelect(), GetNegatedExpression(), getNode(), llvm::SDNode::getOperationName(), isFMAddSub(), isKnownNeverNaN(), llvm::SelectionDAGBuilder::LowerCallTo(), llvm::SelectionDAGBuilder::LowerDeoptimizingReturn(), llvm::SparcTargetLowering::LowerGlobalTLSAddress(), lowerUINT_TO_FP_vXi32(), and PrepareCall().
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Definition at line 578 of file SelectionDAG.h.
References getBlockAddress(), and Offset.
Referenced by llvm::MSP430TargetLowering::LowerBlockAddress(), llvm::HexagonTargetLowering::LowerBlockAddress(), and llvm::SparcTargetLowering::withTargetFlags().
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Definition at line 487 of file SelectionDAG.h.
References getConstant().
Referenced by llvm::RegsForValue::AddInlineAsmOperands(), addStackMapLiveVars(), llvm::SITargetLowering::buildRSRC(), buildSMovImm32(), createGPRPairNode(), llvm::PPC::get_VSPLTI_elt(), getAL(), getCopyFromParts(), getGatherNode(), getInt64(), getInt64Direct(), getIntOperandsFromRegisterString(), getLeftShift(), getMaskNode(), getPrefetchNode(), getScatterNode(), getTargetExtractSubreg(), getTargetInsertSubreg(), getVAArg(), getZeroVector(), isNEONModifiedImm(), llvm::SparcTargetLowering::LowerAsmOperandForConstraint(), llvm::LanaiTargetLowering::LowerAsmOperandForConstraint(), llvm::AVRTargetLowering::LowerAsmOperandForConstraint(), llvm::ARMTargetLowering::LowerAsmOperandForConstraint(), llvm::SystemZTargetLowering::LowerAsmOperandForConstraint(), llvm::PPCTargetLowering::LowerAsmOperandForConstraint(), llvm::X86TargetLowering::LowerAsmOperandForConstraint(), llvm::TargetLowering::LowerAsmOperandForConstraint(), llvm::SelectionDAGBuilder::LowerAsSTATEPOINT(), LowerATOMIC_FENCE(), LowerBITCAST(), llvm::SparcTargetLowering::LowerCall_32(), LowerCMP_SWAP(), llvm::HexagonTargetLowering::LowerCTPOP(), LowerCTTZ(), llvm::SparcTargetLowering::LowerF128Compare(), LowerF128Load(), LowerF128Store(), LowerINTRINSIC_WO_CHAIN(), lowerVECTOR_SHUFFLE_VSHF(), narrowIfNeeded(), performBitcastCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), pushStackMapConstant(), ReplaceBITCASTResults(), llvm::AVRDAGToDAGISel::SelectAddr(), llvm::PPCTargetLowering::SelectAddressRegImm(), llvm::SelectionDAGISel::SelectCodeCommon(), llvm::AVRDAGToDAGISel::SelectInlineAsmMemoryOperand(), llvm::NVPTXDAGToDAGISel::SelectInlineAsmMemoryOperand(), llvm::SelectionDAGISel::SelectInlineAsmMemoryOperands(), tryBitfieldInsertOpFromOr(), tryBitfieldInsertOpFromOrAndImm(), Widen(), and llvm::SITargetLowering::wrapAddr64Rsrc().
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Definition at line 491 of file SelectionDAG.h.
References getConstant().
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Definition at line 495 of file SelectionDAG.h.
References getConstant().
Definition at line 515 of file SelectionDAG.h.
References getConstantFP().
Referenced by llvm::SelectionDAGISel::SelectCodeCommon().
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Definition at line 518 of file SelectionDAG.h.
References getConstantFP().
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Definition at line 521 of file SelectionDAG.h.
References getConstantFP().
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Definition at line 546 of file SelectionDAG.h.
References getConstantPool(), and Offset.
Referenced by llvm::LanaiTargetLowering::LowerConstantPool(), llvm::HexagonTargetLowering::LowerConstantPool(), LowerConstantPool(), promoteToConstantPool(), and llvm::SparcTargetLowering::withTargetFlags().
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Definition at line 554 of file SelectionDAG.h.
References getConstantPool(), and Offset.
| SDValue SelectionDAG::getTargetExternalSymbol | ( | const char * | Sym, |
| EVT | VT, | ||
| unsigned char | TargetFlags = 0 |
||
| ) |
Definition at line 1423 of file SelectionDAG.cpp.
Referenced by llvm::HexagonSelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::HexagonTargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::NVPTXTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), llvm::MSP430TargetLowering::LowerExternalSymbol(), llvm::HexagonTargetLowering::LowerGLOBAL_OFFSET_TABLE(), llvm::SparcTargetLowering::LowerGlobalTLSAddress(), PrepareCall(), and llvm::SparcTargetLowering::withTargetFlags().
| SDValue SelectionDAG::getTargetExtractSubreg | ( | int | SRIdx, |
| const SDLoc & | DL, | ||
| EVT | VT, | ||
| SDValue | Operand | ||
| ) |
A convenience function for creating TargetInstrInfo::EXTRACT_SUBREG nodes.
getTargetExtractSubreg - A convenience function for creating TargetOpcode::EXTRACT_SUBREG nodes.
Definition at line 6365 of file SelectionDAG.cpp.
References getMachineNode(), getTargetConstant(), and llvm::MVT::i32.
Referenced by llvm::SITargetLowering::buildRSRC(), llvm::HexagonTargetLowering::LowerBUILD_VECTOR(), llvm::HexagonTargetLowering::LowerEXTRACT_SUBVECTOR_HVX(), llvm::HexagonTargetLowering::LowerEXTRACT_VECTOR(), LowerF64Op(), lowerGR128Binary(), NarrowVector(), and ReplaceCMP_SWAP_64Results().
Definition at line 535 of file SelectionDAG.h.
References getFrameIndex().
Referenced by addStackMapLiveVars(), lowerIncomingStatepointValue(), lowerStatepointMetaArgs(), reservePreviousStackSlotForValue(), llvm::AVRDAGToDAGISel::SelectAddr(), llvm::PPCTargetLowering::SelectAddressRegImm(), and spillIncomingStatepointValue().
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Definition at line 529 of file SelectionDAG.h.
References getGlobalAddress().
Referenced by buildPCRelGlobalAddress(), llvm::HexagonTargetLowering::GetDynamicTLSAddr(), GetTLSADDR(), llvm::X86TargetLowering::LowerAsmOperandForConstraint(), llvm::TargetLowering::LowerAsmOperandForConstraint(), llvm::HexagonTargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), llvm::LanaiTargetLowering::LowerGlobalAddress(), llvm::MSP430TargetLowering::LowerGlobalAddress(), llvm::HexagonTargetLowering::LowerGLOBALADDRESS(), llvm::NVPTXTargetLowering::LowerGlobalAddress(), LowerToTLSExecModel(), llvm::HexagonTargetLowering::LowerToTLSGeneralDynamicModel(), llvm::HexagonTargetLowering::LowerToTLSInitialExecModel(), LowerToTLSLocalDynamicModel(), llvm::HexagonTargetLowering::LowerToTLSLocalExecModel(), PrepareCall(), and llvm::SparcTargetLowering::withTargetFlags().
| SDValue SelectionDAG::getTargetIndex | ( | int | Index, |
| EVT | VT, | ||
| int64_t | Offset = 0, |
||
| unsigned char | TargetFlags = 0 |
||
| ) |
Definition at line 1361 of file SelectionDAG.cpp.
References llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), E, getVTList(), llvm::None, Offset, and llvm::ISD::TargetIndex.
| SDValue SelectionDAG::getTargetInsertSubreg | ( | int | SRIdx, |
| const SDLoc & | DL, | ||
| EVT | VT, | ||
| SDValue | Operand, | ||
| SDValue | Subreg | ||
| ) |
A convenience function for creating TargetInstrInfo::INSERT_SUBREG nodes.
getTargetInsertSubreg - A convenience function for creating TargetOpcode::INSERT_SUBREG nodes.
Definition at line 6375 of file SelectionDAG.cpp.
References getMachineNode(), getTargetConstant(), and llvm::MVT::i32.
Referenced by LowerF64Op().
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inline |
Definition at line 540 of file SelectionDAG.h.
References getJumpTable().
Referenced by llvm::HexagonTargetLowering::getPICJumpTableRelocBase(), llvm::LanaiTargetLowering::LowerJumpTable(), llvm::MSP430TargetLowering::LowerJumpTable(), and llvm::HexagonTargetLowering::LowerJumpTable().
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inline |
Definition at line 331 of file SelectionDAG.h.
Referenced by AddCombineBUILD_VECTORToVPADDL(), AddCombineToVPADD(), AddCombineVUZPToVPADDL(), llvm::RegsForValue::AddInlineAsmOperands(), addStackMapLiveVars(), buildFromShuffleMostly(), llvm::TargetLowering::BuildSDIVPow2(), BuildVectorFromScalar(), combineBT(), combineConcatVectorOfExtracts(), combineConcatVectorOfScalars(), combineExtractVectorElt(), combineFMA(), combineFMinNumFMaxNum(), combineFneg(), combineLoad(), combineMaskedLoad(), combineMaskedStore(), combineSelect(), combineSelectOfTwoConstants(), combineShuffle(), combineSIntToFP(), combineStore(), combineToExtendVectorInReg(), combineTruncatedArithmetic(), combineUIntToFP(), combineVSelectWithAllOnesOrZeros(), combineX86ShuffleChain(), llvm::SelectionDAGBuilder::CopyValueToVirtualRegister(), createVirtualRegs(), EltsFromConsecutiveLoads(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemset(), ExpandBITCAST(), expandVAArg(), expandVACopy(), FoldCONCAT_VECTORS(), foldXorTruncShiftIntoCmp(), getAddressForMemoryInput(), getConstVector(), getCopyFromParts(), getCopyFromPartsVector(), llvm::SelectionDAGBuilder::getCopyFromRegs(), llvm::RegsForValue::getCopyFromRegs(), getCopyToParts(), getCopyToPartsVector(), llvm::RegsForValue::getCopyToRegs(), getLimitedPrecisionExp2(), getLoadStackGuard(), getMemcpyLoadsAndStores(), getMemmoveLoadsAndStores(), getMemsetStores(), GetNegatedExpression(), llvm::SDNode::getOperationName(), llvm::SelectionDAGBuilder::getValueImpl(), isBLACompatibleAddress(), isConsecutiveLSLoc(), isKnownNeverSNan(), LowerADDC_ADDE_SUBC_SUBE(), LowerATOMIC_STORE(), lowerBuildVectorToBitOp(), llvm::SelectionDAGBuilder::LowerCallTo(), llvm::SelectionDAGBuilder::LowerDeoptimizeCall(), LowerExtendedLoad(), LowerFPOWI(), LowerFSINCOS(), LowerINTRINSIC_WO_CHAIN(), llvm::SelectionDAGBuilder::lowerInvokable(), LowerMemOpCallTo(), LowerMUL_LOHI(), llvm::SelectionDAGBuilder::LowerStatepoint(), LowerVASTART(), LowerVectorBroadcast(), lowerVectorShuffle(), lowerVectorShuffleAsElementInsertion(), lowerVectorShuffleAsShift(), LowerXALUO(), llvm::ScheduleDAGSDNodes::newSUnit(), patchMatchingInput(), PerformADDCombineWithOperands(), PerformANDCombine(), PerformARMBUILD_VECTORCombine(), llvm::AMDGPUTargetLowering::PerformDAGCombine(), performExtendCombine(), PerformExtendCombine(), PerformLOADCombine(), performORCombine(), PerformORCombine(), performSelectCombine(), PerformShiftCombine(), PerformSTORECombine(), performTBISimplification(), PerformVECTOR_SHUFFLECombine(), PerformXORCombine(), PrepareCall(), recoverFramePointer(), llvm::X86TargetLowering::ReplaceNodeResults(), llvm::SelectionDAGBuilder::visitBitTestCase(), llvm::SelectionDAGBuilder::visitBitTestHeader(), llvm::SelectionDAGBuilder::visitJumpTable(), llvm::SelectionDAGBuilder::visitJumpTableHeader(), llvm::SelectionDAGBuilder::visitSPDescriptorFailure(), llvm::SelectionDAGBuilder::visitSPDescriptorParent(), WidenMaskArithmetic(), and XFormVExtractWithShuffleIntoLoad().
| SDValue llvm::SelectionDAG::getTargetMemSDNode | ( | SDVTList | VTs, |
| ArrayRef< SDValue > | Ops, | ||
| const SDLoc & | dl, | ||
| EVT | MemVT, | ||
| MachineMemOperand * | MMO | ||
| ) |
Return (create a new or find existing) a target-specific node.
TargetMemSDNode should be derived class from MemSDNode.
Compose node ID and try to find an existing node.
Existing node was not found. Create a new one.
Definition at line 1434 of file SelectionDAG.h.
References llvm::FoldingSetNodeID::AddInteger(), llvm::FoldingSetNodeID::AddPointer(), E, llvm::MachinePointerInfo::getAddrSpace(), llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), llvm::MachineMemOperand::getPointerInfo(), and llvm::SDVTList::VTs.
Referenced by EmitMaskedTruncSStore(), and EmitTruncSStore().
| SDValue SelectionDAG::getTruncStore | ( | SDValue | Chain, |
| const SDLoc & | dl, | ||
| SDValue | Val, | ||
| SDValue | Ptr, | ||
| MachinePointerInfo | PtrInfo, | ||
| EVT | TVT, | ||
| unsigned | Alignment = 0, |
||
| MachineMemOperand::Flags | MMOFlags = MachineMemOperand::MONone, |
||
| const AAMDNodes & | AAInfo = AAMDNodes() |
||
| ) |
Definition at line 5488 of file SelectionDAG.cpp.
References assert(), getEVTAlignment(), getMachineFunction(), llvm::MachineFunction::getMachineMemOperand(), llvm::EVT::getStoreSize(), llvm::SDValue::getValueType(), InferPointerInfo(), llvm::PointerUnion< PT1, PT2 >::isNull(), llvm::MachineMemOperand::MOLoad, llvm::MachineMemOperand::MOStore, llvm::MVT::Other, and llvm::MachinePointerInfo::V.
Referenced by llvm::TargetLowering::expandUnalignedLoad(), llvm::TargetLowering::expandUnalignedStore(), getMemcpyLoadsAndStores(), LowerINTRINSIC_W_CHAIN(), llvm::TargetLowering::scalarizeVectorStore(), and llvm::AMDGPUTargetLowering::SplitVectorStore().
| SDValue SelectionDAG::getTruncStore | ( | SDValue | Chain, |
| const SDLoc & | dl, | ||
| SDValue | Val, | ||
| SDValue | Ptr, | ||
| EVT | TVT, | ||
| MachineMemOperand * | MMO | ||
| ) |
Definition at line 5510 of file SelectionDAG.cpp.
References llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), assert(), llvm::EVT::bitsLT(), E, llvm::MachinePointerInfo::getAddrSpace(), llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), llvm::MachineMemOperand::getPointerInfo(), llvm::EVT::getRawBits(), llvm::EVT::getScalarType(), getStore(), getUNDEF(), llvm::SDValue::getValueType(), llvm::EVT::getVectorNumElements(), getVTList(), llvm::EVT::isInteger(), llvm::EVT::isVector(), llvm::MVT::Other, Ptr, llvm::ISD::STORE, llvm::RegState::Undef, and llvm::ISD::UNINDEXED.
Return an UNDEF node. UNDEF does not have a useful SDLoc.
Definition at line 737 of file SelectionDAG.h.
References getNode(), and llvm::ISD::UNDEF.
Referenced by buildFromShuffleMostly(), buildMergeScalars(), buildScalarToVector(), buildVector(), combineBasicSADPattern(), combineBVOfConsecutiveLoads(), combineConcatVectorOfExtracts(), combineLoad(), combineMaskedLoad(), combineMaskedLoadConstantMask(), combineMaskedStore(), combineSetCCAtomicArith(), combineShuffleOfConcatUndef(), combineShuffleOfScalars(), combineStore(), combineTargetShuffle(), combineToExtendVectorInReg(), combineX86ShuffleChain(), combineX86ShufflesRecursively(), CompactSwizzlableVector(), concat128BitVectors(), concat256BitVectors(), convertLocVTToValVT(), EltsFromConsecutiveLoads(), emitNonHSAIntrinsicError(), emitRemovedIntrinsicError(), EmitTruncSStore(), ExpandBVWithShuffles(), ExpandHorizontalBinOp(), expandV4F32ToV2F64(), ExtendToType(), extractSubVector(), FoldCONCAT_VECTORS(), FoldConstantVectorArithmetic(), FoldSetCC(), getConstVector(), getCopyFromPartsVector(), getCopyToPartsVector(), getExtLoad(), getGeneralPermuteNode(), getLoad(), getNode(), getShuffleScalarElt(), getShuffleVectorZeroOrUndef(), getStore(), getTargetVShiftNode(), getTruncStore(), llvm::SelectionDAGBuilder::getValueImpl(), getVectorShuffle(), insert128BitVector(), insert1BitVector(), isAddSub(), isHorizontalBinOp(), joinDwords(), lower1BitVectorShuffle(), LowerAsSplatVectorLoad(), LowerAVXExtend(), LowerBITCAST(), LowerBITREVERSE_XOP(), LowerBuildVectorv16i8(), LowerBuildVectorv8i16(), llvm::AMDGPUTargetLowering::LowerCall(), llvm::NVPTXTargetLowering::LowerCall(), LowerCONCAT_VECTORS(), LowerCONCAT_VECTORSvXi1(), LowerEXTEND_VECTOR_INREG(), LowerExtendedLoad(), llvm::R600TargetLowering::LowerFormalArguments(), llvm::SITargetLowering::LowerFormalArguments(), LowerFP_EXTEND(), LowerINTRINSIC_W_CHAIN(), LowerINTRINSIC_WO_CHAIN(), llvm::MipsTargetLowering::lowerLOAD(), LowerMSCATTER(), llvm::NVPTXTargetLowering::LowerReturn(), LowerSCALAR_TO_VECTOR(), LowerShift(), lowerShuffleAsRepeatedMaskAndLanePermute(), LowerSIGN_EXTEND(), LowerTruncatingStore(), lowerUINT_TO_FP_v2i32(), lowerV16I8VectorShuffle(), lowerV2F64VectorShuffle(), lowerV2X128VectorShuffle(), lowerV4X128VectorShuffle(), LowerVECTOR_SHUFFLE(), LowerVectorCTLZ_AVX512(), lowerVectorShuffle(), lowerVectorShuffleAsBlend(), lowerVectorShuffleAsBlendAndPermute(), lowerVectorShuffleAsBlendOfPSHUFBs(), lowerVectorShuffleAsDecomposedShuffleBlend(), lowerVectorShuffleAsElementInsertion(), lowerVectorShuffleAsLanePermuteAndBlend(), lowerVectorShuffleAsPermuteAndUnpack(), lowerVectorShuffleAsSpecificZeroOrAnyExtend(), lowerVectorShuffleByMerging128BitLanes(), lowerVectorShuffleWithPSHUFB(), lowerVectorShuffleWithSSE4A(), lowerVectorShuffleWithUndefHalf(), matchBinaryPermuteVectorShuffle(), matchVectorShuffleAsInsertPS(), partitionShuffleOfConcats(), PerformARMBUILD_VECTORCombine(), llvm::R600TargetLowering::PerformDAGCombine(), PerformSTORECombine(), PerformVECTOR_SHUFFLECombine(), llvm::AArch64TargetLowering::ReconstructShuffle(), reduceVMULWidth(), ReplaceBITCASTResults(), llvm::X86TargetLowering::ReplaceNodeResults(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifySetCC(), simplifyShuffleOperandRecursively(), splitAndLowerVectorShuffle(), tryBuildVectorShuffle(), tryToFoldExtendOfConstant(), UnrollVectorOp(), WidenVector(), and XFormVExtractWithShuffleIntoLoad().
| SDValue SelectionDAG::getVAArg | ( | EVT | VT, |
| const SDLoc & | dl, | ||
| SDValue | Chain, | ||
| SDValue | Ptr, | ||
| SDValue | SV, | ||
| unsigned | Align | ||
| ) |
VAArg produces a result and token chain, and takes a pointer and a source value as input.
Definition at line 5702 of file SelectionDAG.cpp.
References getNode(), getTargetConstant(), getVTList(), llvm::MVT::i32, llvm::MVT::Other, Ptr, and llvm::ISD::VAARG.
Definition at line 1392 of file SelectionDAG.cpp.
References llvm::EVT::getSimpleVT(), llvm::EVT::isExtended(), llvm::EVT::isSimple(), and llvm::MVT::SimpleTy.
Referenced by llvm::X86TargetLowering::BuildFILD(), combineShiftRightAlgebraic(), convertLocVTToValVT(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemset(), getAArch64Cmp(), getCopyFromParts(), llvm::RegsForValue::getCopyFromRegs(), getNode(), llvm::SparcTargetLowering::LowerCall_64(), llvm::AMDGPUTargetLowering::LowerDIVREM24(), LowerEXTRACT_VECTOR_ELT_SSE4(), llvm::SITargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::SparcTargetLowering::LowerFormalArguments_64(), lowerMSACopyIntr(), llvm::SelectionDAGBuilder::lowerRangeToAssertZExt(), llvm::MSP430TargetLowering::LowerSIGN_EXTEND(), llvm::AMDGPUTargetLowering::LowerSIGN_EXTEND_INREG(), performAssertZextCombine(), llvm::ARMTargetLowering::PerformCMOVCombine(), llvm::AMDGPUTargetLowering::PerformDAGCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), UnpackFromArgumentSlot(), UnrollVectorOp(), and WidenMaskArithmetic().
| SDValue SelectionDAG::getVectorShuffle | ( | EVT | VT, |
| const SDLoc & | dl, | ||
| SDValue | N1, | ||
| SDValue | N2, | ||
| ArrayRef< int > | Mask | ||
| ) |
Return an ISD::VECTOR_SHUFFLE node.
The number of elements in VT, which must be a vector type, must match the number of mask elements NumElts. An integer mask element equal to -1 is treated as undefined.
Definition at line 1454 of file SelectionDAG.cpp.
References llvm::FoldingSetNodeID::AddInteger(), AddNodeIDNode(), llvm::all_of(), llvm::BumpPtrAllocatorImpl< AllocatorT, SlabSize, SizeThreshold >::Allocate(), assert(), llvm::ArrayRef< T >::begin(), llvm::ISD::BITCAST, C, commuteShuffle(), E, llvm::ArrayRef< T >::end(), llvm::SDLoc::getDebugLoc(), llvm::SDLoc::getIROrder(), getNode(), llvm::SDValue::getOpcode(), llvm::SDNode::getOperand(), getSplatBuildVector(), llvm::BuildVectorSDNode::getSplatValue(), getUNDEF(), llvm::SDValue::getValueType(), llvm::SDNode::getValueType(), llvm::EVT::getVectorNumElements(), getVTList(), i, llvm::SDValue::isUndef(), llvm::BitVector::none(), Offset, llvm::ArrayRef< T >::size(), and llvm::ISD::VECTOR_SHUFFLE.
Referenced by llvm::X86TargetLowering::BuildFILD(), buildFromShuffleMostly(), BuildVSLDOI(), combineBasicSADPattern(), combineBVOfConsecutiveLoads(), combineConcatVectorOfExtracts(), combineMaskedLoad(), combineMaskedStore(), combineShuffle(), combineShuffleOfConcatUndef(), combineStore(), EltsFromConsecutiveLoads(), ExpandBVWithShuffles(), expandV4F32ToV2F64(), GeneratePerfectShuffle(), getCommutedVectorShuffle(), getMOVL(), getShuffleVectorZeroOrUndef(), getUnpackh(), getUnpackl(), insert1BitVector(), lower1BitVectorShuffle(), lower256BitVectorShuffle(), LowerAsSplatVectorLoad(), LowerBuildVectorv4x32(), LowerEXTEND_VECTOR_INREG(), LowerExtendedLoad(), LowerMSCATTER(), LowerMUL(), LowerMUL_LOHI(), LowerMULH(), LowerScalarImmediateShift(), LowerShift(), lowerShuffleAsRepeatedMaskAndLanePermute(), LowerSIGN_EXTEND(), lowerV16I8VectorShuffle(), lowerV2I64VectorShuffle(), lowerV4I32VectorShuffle(), lowerVectorShuffle(), lowerVectorShuffleAsBlendAndPermute(), lowerVectorShuffleAsDecomposedShuffleBlend(), lowerVectorShuffleAsElementInsertion(), lowerVectorShuffleAsLanePermuteAndBlend(), lowerVectorShuffleAsPermuteAndUnpack(), lowerVectorShuffleAsSpecificZeroOrAnyExtend(), lowerVectorShuffleByMerging128BitLanes(), lowerVectorShuffleWithUndefHalf(), lowerVSELECTtoVectorShuffle(), LowerVSETCC(), partitionShuffleOfConcats(), performConcatVectorsCombine(), performSelectCombine(), PerformSTORECombine(), PerformVECTOR_SHUFFLECombine(), llvm::AArch64TargetLowering::ReconstructShuffle(), reduceVMULWidth(), simplifyShuffleOperands(), splitAndLowerVectorShuffle(), truncateVectorCompareWithPACKSS(), and XFormVExtractWithShuffleIntoLoad().
Return an SDVTList that represents the list of values specified.
Definition at line 5875 of file SelectionDAG.cpp.
References makeVTList().
Referenced by AddCombineTo64bitMLAL(), AddCombineTo64bitUMAAL(), llvm::X86TargetLowering::BuildFILD(), llvm::TargetLowering::BuildUDIV(), CloneNodeWithValues(), CombineBaseUpdate(), combineIntegerAbs(), combineLockSub(), CombineVLDDUP(), createLoadLR(), createStoreLR(), EltsFromConsecutiveLoads(), emitCLC(), emitComparison(), emitIntrinsicWithChainAndGlue(), emitIntrinsicWithGlue(), EmitMaskedTruncSStore(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForMemchr(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::ARMSelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemset(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrcmp(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrcpy(), EmitTruncSStore(), Expand64BitShift(), ExpandBITCAST(), llvm::TargetLowering::expandMUL_LOHI(), ExpandREAD_REGISTER(), llvm::PPCTargetLowering::expandVSXLoadForLE(), llvm::PPCTargetLowering::expandVSXStoreForLE(), GeneratePerfectShuffle(), getAArch64XALUOOp(), llvm::MipsTargetLowering::getAddrGPRel(), getAddrSpaceCast(), getAtomic(), getBasicBlock(), getBlockAddress(), getBoundedStrlen(), getCALLSEQ_END(), getCALLSEQ_START(), getConstant(), getConstantFP(), getConstantPool(), getCopyFromReg(), llvm::RegsForValue::getCopyFromRegs(), getCopyToReg(), getDivRem8(), llvm::HexagonTargetLowering::GetDynamicTLSAddr(), getEHLabel(), getExtendedControlRegister(), getFPBinOp(), getFPTernOp(), getFrameIndex(), getGatherNode(), getGlobalAddress(), getIndexedStore(), getJumpTable(), getLoad(), getMachineNode(), getMaskedLoad(), getMaskedStore(), getMDNode(), getMergeValues(), getMul24(), getNode(), getReadPerformanceCounter(), getReadTimeStampCounter(), getRegister(), getRegisterMask(), getScatterNode(), getSrcValue(), getStore(), getTargetIndex(), GetTLSADDR(), getTOCEntry(), getTruncStore(), getVAArg(), getVectorShuffle(), LowerADDC_ADDE_SUBC_SUBE(), llvm::SelectionDAGBuilder::LowerAsSTATEPOINT(), lowerAtomicArithWithLOCK(), llvm::HexagonTargetLowering::LowerCall(), llvm::SystemZTargetLowering::LowerCall(), llvm::NVPTXTargetLowering::LowerCall(), llvm::SparcTargetLowering::LowerCall_32(), llvm::SparcTargetLowering::LowerCall_64(), LowerCallResult(), llvm::TargetLowering::LowerCallTo(), LowerCMP_SWAP(), LowerCTLZ(), LowerCTTZ(), llvm::HexagonTargetLowering::LowerDYNAMIC_STACKALLOC(), llvm::SparcTargetLowering::LowerEH_SJLJ_SETJMP(), LowerFSINCOS(), llvm::SparcTargetLowering::LowerGlobalTLSAddress(), LowerINTRINSIC_W_CHAIN(), LowerINTRINSIC_WO_CHAIN(), LowerMGATHER(), LowerMSCATTER(), LowerMUL_LOHI(), llvm::NVPTXTargetLowering::LowerReturn(), llvm::AMDGPUTargetLowering::LowerSDIVREM(), llvm::LanaiTargetLowering::LowerSELECT_CC(), llvm::MSP430TargetLowering::LowerSELECT_CC(), llvm::MSP430TargetLowering::LowerSETCC(), LowerSETCCE(), llvm::AMDGPUTargetLowering::LowerUDIVREM64(), LowerVECTOR_SHUFFLE(), LowerXALUO(), performCONDCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), performIntegerAbsCombine(), performNEONPostLDSTCombine(), performPostLD1Combine(), PerformVDUPCombine(), ReplaceCMP_SWAP_128Results(), ReplaceCMP_SWAP_64Results(), ReplaceINTRINSIC_W_CHAIN(), ReplaceLoadVector(), llvm::PPCTargetLowering::ReplaceNodeResults(), llvm::X86TargetLowering::ReplaceNodeResults(), ReplaceREADCYCLECOUNTER(), llvm::SelectionDAGISel::SelectCodeCommon(), and SelectNodeTo().
Definition at line 5939 of file SelectionDAG.cpp.
References llvm::FoldingSetNodeID::AddInteger(), llvm::BumpPtrAllocatorImpl< AllocatorT, SlabSize, SizeThreshold >::Allocate(), llvm::ArrayRef< T >::begin(), llvm::ArrayRef< T >::end(), llvm::SDVTListNode::getSDVTList(), llvm::FoldingSetNodeID::Intern(), and llvm::ArrayRef< T >::size().
Return the expression required to zero extend the Op value assuming it was the smaller SrcTy value.
Definition at line 1009 of file SelectionDAG.cpp.
References llvm::ISD::AND, assert(), getConstant(), llvm::APInt::getLowBitsSet(), getNode(), llvm::SDValue::getScalarValueSizeInBits(), llvm::EVT::getSizeInBits(), llvm::SDValue::getValueType(), and llvm::EVT::isVector().
Referenced by llvm::AMDGPUTargetLowering::PerformDAGCombine().
Return an operation which will zero extend the low lanes of the operand into the specified vector type.
For example, this can convert a v16i8 into a v4i32 by zero extending the low four lanes of the operand from i8 to i32.
Definition at line 1043 of file SelectionDAG.cpp.
References assert(), getNode(), llvm::EVT::getSizeInBits(), llvm::SDValue::getValueSizeInBits(), llvm::SDValue::getValueType(), llvm::EVT::getVectorNumElements(), llvm::EVT::isVector(), and llvm::ISD::ZERO_EXTEND_VECTOR_INREG.
Referenced by combineToExtendVectorInReg().
Convert Op, which must be of integer type, to the integer type VT, by either zero-extending or truncating it.
Definition at line 994 of file SelectionDAG.cpp.
References llvm::EVT::bitsGT(), getNode(), llvm::SDValue::getValueType(), llvm::ISD::TRUNCATE, and llvm::ISD::ZERO_EXTEND.
Referenced by combineShuffleOfScalars(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForMemchr(), llvm::SystemZSelectionDAGInfo::EmitTargetCodeForStrnlen(), llvm::TargetLowering::expandFP_TO_SINT(), FoldCONCAT_VECTORS(), getShiftAmountOperand(), llvm::TargetLowering::getVectorElementPointer(), llvm::TargetLowering::IncrementMemoryAddress(), LowerFGETSIGN(), llvm::AMDGPUTargetLowering::LowerFP_TO_FP16(), LowerINTRINSIC_W_CHAIN(), LowerVSETCC(), lowerX86CmpEqZeroToCtlzSrl(), llvm::AMDGPUTargetLowering::performMulCombine(), llvm::AMDGPUTargetLowering::performMulhuCombine(), llvm::X86TargetLowering::ReplaceNodeResults(), llvm::SelectionDAGBuilder::visitBitTestHeader(), and llvm::SelectionDAGBuilder::visitJumpTableHeader().
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inline |
Return true if there are any SDDbgValue nodes associated with this SelectionDAG.
Definition at line 1210 of file SelectionDAG.h.
References llvm::SDDbgInfo::empty().
Referenced by llvm::ScheduleDAGSDNodes::EmitSchedule().
Return true if A and B have no common bits set.
As an example, this can allow an 'add' to be transformed into an 'or'.
Definition at line 3096 of file SelectionDAG.cpp.
References assert(), computeKnownBits(), and llvm::SDValue::getValueType().
Infer alignment of a load / store address.
InferPtrAlignment - Infer alignment of a load / store address.
Return 0 if it cannot be inferred.
Definition at line 7252 of file SelectionDAG.cpp.
References llvm::computeKnownBits(), llvm::SDValue::getConstantOperandVal(), getDataLayout(), llvm::MachineFunction::getFrameInfo(), getMachineFunction(), llvm::SDValue::getNode(), llvm::MachineFrameInfo::getObjectAlignment(), llvm::SDValue::getOperand(), llvm::DataLayout::getPointerTypeSizeInBits(), llvm::GlobalValue::getType(), isBaseWithConstantOffset(), llvm::TargetLowering::isGAPlusOffset(), fuzzer::min(), and llvm::MinAlign().
Referenced by computeKnownBits(), getMemcpyLoadsAndStores(), getMemmoveLoadsAndStores(), and LowerAsSplatVectorLoad().
| void SelectionDAG::init | ( | MachineFunction & | mf | ) |
Prepare this SelectionDAG to process code in the given MachineFunction.
Definition at line 874 of file SelectionDAG.cpp.
References llvm::Function::getContext(), llvm::MachineFunction::getFunction(), llvm::TargetSubtargetInfo::getSelectionDAGInfo(), getSubtarget(), and llvm::TargetSubtargetInfo::getTargetLowering().
Referenced by llvm::SelectionDAGISel::runOnMachineFunction().
Return true if the specified operand is an ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an ISD::OR with a ConstantSDNode that is guaranteed to have the same semantics as an ADD.
This handles the equivalence: X|Cst == X+Cst iff X&Cst = 0.
Definition at line 3039 of file SelectionDAG.cpp.
References llvm::ISD::ADD, llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), MaskedValueIsZero(), and llvm::ISD::OR.
Referenced by areNonVolatileConsecutiveLoads(), getBaseWithConstantOffset(), InferPtrAlignment(), LowerAsSplatVectorLoad(), replaceZeroVectorStore(), and llvm::AVRDAGToDAGISel::SelectAddr().
Returns true if the opcode is a commutative binary operation.
Definition at line 1148 of file SelectionDAG.h.
References llvm::ISD::ADD, llvm::ISD::ADDC, llvm::ISD::ADDE, llvm::ISD::AND, llvm::ISD::FADD, llvm::ISD::FMAXNAN, llvm::ISD::FMAXNUM, llvm::ISD::FMINNAN, llvm::ISD::FMINNUM, llvm::ISD::FMUL, llvm::ISD::MUL, llvm::ISD::MULHS, llvm::ISD::MULHU, llvm::ISD::OR, llvm::ISD::SADDO, llvm::ISD::SMAX, llvm::ISD::SMIN, llvm::ISD::SMUL_LOHI, llvm::ISD::UADDO, llvm::ISD::UMAX, llvm::ISD::UMIN, llvm::ISD::UMUL_LOHI, and llvm::ISD::XOR.
Referenced by FoldConstantArithmetic(), getNode(), and llvm::TargetLowering::SimplifySetCC().
Test whether the given value is a constant FP or similar node.
Definition at line 7513 of file SelectionDAG.cpp.
References llvm::SDValue::getNode(), and llvm::ISD::isBuildVectorOfConstantFPSDNodes().
Referenced by isConstantValueOfAnyType().
Test whether the given value is a constant int or similar node.
Definition at line 7499 of file SelectionDAG.cpp.
References llvm::SDValue::getNode(), llvm::ISD::GlobalAddress, llvm::ISD::isBuildVectorOfConstantSDNodes(), and llvm::TargetLowering::isOffsetFoldingLegal().
Referenced by isConstantValueOfAnyType().
N is any kind of constant or build_vector of constants, int or float. If a vector, it may not necessarily be a splat. Definition at line 1372 of file SelectionDAG.h.
References isConstantFPBuildVectorOrConstantFP(), and isConstantIntBuildVectorOrConstantInt().
Referenced by llvm::AMDGPUTargetLowering::performSelectCombine().
Test whether two SDValues are known to compare equal.
This is true if they are the same value, or if one is negative zero and the other positive zero.
Definition at line 3083 of file SelectionDAG.cpp.
Referenced by combineSelect().
Test whether the given SDValue is known to never be NaN.
Definition at line 3052 of file SelectionDAG.cpp.
References C, and getTarget().
Referenced by combineSelect(), and isKnownNeverSNan().
Test whether the given SDValue is known to never be positive or negative zero.
Definition at line 3066 of file SelectionDAG.cpp.
References C, llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), and llvm::ISD::OR.
Referenced by combineCMov(), and combineSelect().
Test if the given value is known to have exactly one bit set.
This differs from computeKnownBits in that it doesn't necessarily determine which bit is set.
Definition at line 2722 of file SelectionDAG.cpp.
References llvm::all_of(), llvm::ISD::BUILD_VECTOR, C, computeKnownBits(), llvm::APInt::countPopulation(), llvm::dyn_cast(), E, llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::EVT::getScalarSizeInBits(), llvm::SDValue::getValueType(), llvm::SDNode::ops(), llvm::ISD::SHL, and llvm::ISD::SRL.
| void SelectionDAG::Legalize | ( | ) |
This transforms the SelectionDAG into a SelectionDAG that is compatible with the target instruction selector, as indicated by the TargetLowering object.
This is the entry point for the file.
Note that this is an involved process that may invalidate pointers into the graph.
Definition at line 4518 of file LegalizeDAG.cpp.
References allnodes_begin(), allnodes_end(), AssignTopologicalOrder(), DeleteNode(), llvm::SDValue::getNode(), getRoot(), llvm::SmallPtrSetImpl< PtrType >::insert(), N, RemoveDeadNodes(), and llvm::SDNode::use_empty().
| bool SelectionDAG::LegalizeOp | ( | SDNode * | N, |
| SmallSetVector< SDNode *, 16 > & | UpdatedNodes | ||
| ) |
Transforms a SelectionDAG node and any operands to it into a node that is compatible with the target instruction selector, as indicated by the TargetLowering object.
N is a valid, legal node after calling this.This essentially runs a single recursive walk of the Legalize process over the given node (and its operands). This can be used to incrementally legalize the DAG. All of the nodes which are directly replaced, potentially including N, are added to the output parameter UpdatedNodes so that the delta to the DAG can be understood by the caller.
When this returns false, N has been legalized in a way that make the pointer passed in no longer valid. It may have even been deleted from the DAG, and so it shouldn't be used further. When this returns true, the N passed in is a legal node, and can be immediately processed as such. This may still have done some work on the DAG, and will still populate UpdatedNodes with any new nodes replacing those originally in the DAG.
Definition at line 4559 of file LegalizeDAG.cpp.
References llvm::SmallPtrSetImpl< PtrType >::count(), and llvm::SmallPtrSetImpl< PtrType >::insert().
| bool SelectionDAG::LegalizeTypes | ( | ) |
This transforms the SelectionDAG into a SelectionDAG that only uses types natively supported by the target.
Returns "true" if it made any changes.
Note that this is an involved process that may invalidate pointers into the graph.
Definition at line 1162 of file LegalizeTypes.cpp.
References llvm::DAGTypeLegalizer::run().
| bool SelectionDAG::LegalizeVectors | ( | ) |
This transforms the SelectionDAG into a SelectionDAG that only uses vector math operations supported by the target.
This is necessary as a separate step from Legalize because unrolling a vector operation can introduce illegal types, which requires running LegalizeTypes again.
This returns true if it made any changes; in that case, LegalizeTypes is called again before Legalize.
Note that this is an involved process that may invalidate pointers into the graph.
Definition at line 1110 of file LegalizeVectorOps.cpp.
Return true if 'Op & Mask' is known to be zero.
MaskedValueIsZero - Return true if 'V & Mask' is known to be zero.
We use this predicate to simplify operations downstream. Op and Mask are known to be the same type.
We use this predicate to simplify operations downstream. Mask is known to be zero for bits that V cannot have.
Definition at line 1962 of file SelectionDAG.cpp.
References computeKnownBits(), and llvm::BitmaskEnumDetail::Mask().
Referenced by llvm::SelectionDAGISel::CheckAndMask(), llvm::XCoreSelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::TargetLowering::expandMUL_LOHI(), getBitTestCondition(), isBaseWithConstantOffset(), isTruncWithZeroHighBitsInput(), LowerMUL(), llvm::AMDGPUTargetLowering::LowerUDIVREM64(), llvm::PPCTargetLowering::PerformDAGCombine(), PerformORCombine(), PerformShiftCombine(), performSRLCombine(), ShrinkLoadReplaceStoreWithStore(), SignBitIsZero(), and llvm::TargetLowering::SimplifySetCC().
| SDNode * SelectionDAG::MorphNodeTo | ( | SDNode * | N, |
| unsigned | Opc, | ||
| SDVTList | VTs, | ||
| ArrayRef< SDValue > | Ops | ||
| ) |
This mutates the specified node to have the specified return type, opcode, and operands.
MorphNodeTo - This mutates the specified node to have the specified return type, opcode, and operands.
Note that MorphNodeTo returns the resultant node. If there is already a node of the specified opcode and operands, it returns that node instead of the current one. Note that the SDLoc need not be the same.
Using MorphNodeTo is faster than creating a new node and swapping it in with ReplaceAllUsesWith both because it often avoids allocating a new node, and because it doesn't require CSE recalculation for any of the node's users.
However, note that MorphNodeTo recursively deletes dead nodes from the DAG. As a consequence it isn't appropriate to use from within the DAG combiner or the legalizer which maintain worklists that would need to be updated when deleting things.
Definition at line 6188 of file SelectionDAG.cpp.
References AddNodeIDNode(), E, llvm::SmallPtrSetImplBase::empty(), llvm::SDUse::getNode(), llvm::MVT::Glue, I, llvm::SmallPtrSetImpl< PtrType >::insert(), N, llvm::SDVTList::NumVTs, llvm::SDNode::op_begin(), llvm::SDNode::op_end(), llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back(), RemoveDeadNodes(), llvm::SDNode::use_empty(), and llvm::SDVTList::VTs.
Referenced by CloneNodeWithValues(), and SelectNodeTo().
| void SelectionDAG::RemoveDeadNode | ( | SDNode * | N | ) |
Remove the specified node from the system.
If any of its operands then becomes dead, remove them as well. Inform UpdateListener for each node deleted.
Definition at line 598 of file SelectionDAG.cpp.
References llvm::NVPTXISD::Dummy, getRoot(), and RemoveDeadNodes().
Referenced by llvm::SelectionDAGISel::ReplaceNode(), llvm::SelectionDAGISel::SelectCodeCommon(), llvm::AVRDAGToDAGISel::selectIndexedLoad(), and SelectNodeTo().
| void SelectionDAG::RemoveDeadNodes | ( | ) |
This method deletes all unreachable nodes in the SelectionDAG.
RemoveDeadNodes - This method deletes all unreachable nodes in the SelectionDAG.
Definition at line 549 of file SelectionDAG.cpp.
References allnodes(), llvm::NVPTXISD::Dummy, getRoot(), llvm::HandleSDNode::getValue(), llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back(), and setRoot().
Referenced by Legalize(), MorphNodeTo(), RemoveDeadNode(), and llvm::DAGTypeLegalizer::run().
| void SelectionDAG::RemoveDeadNodes | ( | SmallVectorImpl< SDNode * > & | DeadNodes | ) |
This method deletes the unreachable nodes in the given list, and any nodes that become unreachable as a result.
RemoveDeadNodes - This method deletes the unreachable nodes in the given list, and any nodes that become unreachable as a result.
Definition at line 569 of file SelectionDAG.cpp.
References E, llvm::SmallVectorBase::empty(), llvm::SDUse::getNode(), I, N, llvm::SelectionDAG::DAGUpdateListener::Next, llvm::SDNode::op_begin(), llvm::SDNode::op_end(), llvm::SmallVectorImpl< T >::pop_back_val(), llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back(), and llvm::SDNode::use_empty().
| void SelectionDAG::ReplaceAllUsesOfValuesWith | ( | const SDValue * | From, |
| const SDValue * | To, | ||
| unsigned | Num | ||
| ) |
Like ReplaceAllUsesOfValueWith, but for multiple values at once.
ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving uses of other values produced by From.getNode() alone.
This correctly handles the case where there is an overlap between the From values and the To values.
The same value may appear in both the From and To list. The Deleted vector is handled the same way as for ReplaceAllUsesWith.
Definition at line 6689 of file SelectionDAG.cpp.
References llvm::SmallVectorTemplateCommon< T >::begin(), E, llvm::SmallVectorTemplateCommon< T >::end(), llvm::SDValue::getNode(), llvm::SDValue::getResNo(), llvm::SDUse::getResNo(), i, llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back(), ReplaceAllUsesOfValueWith(), llvm::SmallVectorTemplateCommon< T >::size(), llvm::SDNode::use_begin(), and llvm::SDNode::use_end().
Referenced by llvm::SelectionDAGISel::ReplaceUses().
Replace any uses of From with To, leaving uses of other values produced by From.Val alone.
ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving uses of other values produced by From.getNode() alone.
The Deleted vector is handled the same way as for ReplaceAllUsesWith.
Definition at line 6609 of file SelectionDAG.cpp.
References llvm::SDValue::getNode(), llvm::SDNode::getNumValues(), llvm::SDValue::getResNo(), llvm::SDUse::getResNo(), getRoot(), llvm::SDNode::use_iterator::getUse(), ReplaceAllUsesWith(), setRoot(), llvm::SDNode::use_begin(), and llvm::SDNode::use_end().
Referenced by AddCombineTo64bitMLAL(), AddCombineTo64bitUMAAL(), combineCMov(), combineExtractVectorElt(), combineSelect(), combineSetCCAtomicArith(), combineSIntToFP(), EltsFromConsecutiveLoads(), emitIntrinsicWithChainAndGlue(), getDivRem8(), lowerAtomicArith(), LowerCMP_SWAP(), llvm::HexagonTargetLowering::LowerDYNAMIC_STACKALLOC(), LowerExtended1BitVectorLoad(), LowerExtendedLoad(), lowerVectorShuffleAsBroadcast(), llvm::PPCTargetLowering::PerformDAGCombine(), performDivRemCombine(), performIntToFpCombine(), llvm::AMDGPUTargetLowering::performStoreCombine(), PerformVDUPCombine(), ReplaceAllUsesOfValuesWith(), llvm::SelectionDAGISel::ReplaceUses(), llvm::SelectionDAGISel::SelectCodeCommon(), selectMADD(), and selectMSUB().
Modify anything using 'From' to use 'To' instead.
ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
This can cause recursive merging of nodes in the DAG. Use the first version if 'From' is known to have a single result, use the second if you have two nodes with identical results (or if 'To' has a superset of the results of 'From'), use the third otherwise.
These methods all take an optional UpdateListener, which (if not null) is informed about nodes that are deleted and modified due to recursive changes in the dag.
These functions only replace all existing uses. It's possible that as these replacements are being performed, CSE may cause the From node to be given new uses. These new uses of From are left in place, and not automatically transferred to To.
This can cause recursive merging of nodes in the DAG.
This version assumes From has a single result value.
Definition at line 6462 of file SelectionDAG.cpp.
References assert(), llvm::SDValue::getNode(), llvm::SDNode::getNumValues(), llvm::SDValue::getResNo(), getRoot(), llvm::SDNode::use_iterator::getUse(), setRoot(), llvm::SDNode::use_begin(), and llvm::SDNode::use_end().
Referenced by foldMaskAndShiftToExtract(), foldMaskAndShiftToScale(), foldMaskedShiftToScaledMask(), llvm::SelectionDAGBuilder::LowerAsSTATEPOINT(), LowerMSCATTER(), PerformBFICombine(), performCONDCombine(), llvm::AMDGPUTargetLowering::performFNegCombine(), ReplaceAllUsesOfValueWith(), ReplaceAllUsesWith(), llvm::SelectionDAGISel::ReplaceNode(), llvm::SelectionDAGISel::ReplaceUses(), and SelectNodeTo().
ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
This can cause recursive merging of nodes in the DAG.
This version assumes that for each value of From, there is a corresponding value in To in the same position with the same type.
Definition at line 6513 of file SelectionDAG.cpp.
References assert(), getNode(), llvm::SDNode::getNumValues(), getRoot(), llvm::SDNode::use_iterator::getUse(), llvm::SDNode::getValueType(), llvm::SDNode::hasAnyUseOfValue(), i, setRoot(), llvm::SDNode::use_begin(), and llvm::SDNode::use_end().
ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
This can cause recursive merging of nodes in the DAG.
This version can replace From with any result values. To must match the number and types of values returned by From.
Definition at line 6567 of file SelectionDAG.cpp.
References getNode(), llvm::SDNode::getNumValues(), llvm::SDUse::getResNo(), getRoot(), llvm::SDNode::use_iterator::getUse(), i, ReplaceAllUsesWith(), setRoot(), llvm::SDNode::use_begin(), and llvm::SDNode::use_end().
|
inline |
Move node N in the AllNodes list to be immediately before the given iterator Position.
This may be used to update the topological ordering when the list of nodes is modified.
Definition at line 1143 of file SelectionDAG.h.
Referenced by insertDAGNode().
These are used for target selectors to mutate the specified node to have the specified return type, Target opcode, and operands.
SelectNodeTo - These are wrappers around MorphNodeTo that accept a machine opcode.
Note that target opcodes are stored as ~TargetOpcode in the node opcode field. The resultant node is returned.
Definition at line 6081 of file SelectionDAG.cpp.
References getVTList(), and llvm::None.
Referenced by SelectNodeTo(), tryBitfieldInsertOpFromOr(), and tryBitfieldInsertOpFromOrAndImm().
Definition at line 6087 of file SelectionDAG.cpp.
References getVTList(), and SelectNodeTo().
| SDNode * SelectionDAG::SelectNodeTo | ( | SDNode * | N, |
| unsigned | TargetOpc, | ||
| EVT | VT, | ||
| SDValue | Op1, | ||
| SDValue | Op2 | ||
| ) |
Definition at line 6094 of file SelectionDAG.cpp.
References getVTList(), and SelectNodeTo().
| SDNode * SelectionDAG::SelectNodeTo | ( | SDNode * | N, |
| unsigned | TargetOpc, | ||
| EVT | VT, | ||
| SDValue | Op1, | ||
| SDValue | Op2, | ||
| SDValue | Op3 | ||
| ) |
Definition at line 6102 of file SelectionDAG.cpp.
References getVTList(), and SelectNodeTo().
| SDNode * SelectionDAG::SelectNodeTo | ( | SDNode * | N, |
| unsigned | TargetOpc, | ||
| EVT | VT, | ||
| ArrayRef< SDValue > | Ops | ||
| ) |
Definition at line 6110 of file SelectionDAG.cpp.
References getVTList(), and SelectNodeTo().
Definition at line 6122 of file SelectionDAG.cpp.
References getVTList(), llvm::None, and SelectNodeTo().
| SDNode * SelectionDAG::SelectNodeTo | ( | SDNode * | N, |
| unsigned | TargetOpc, | ||
| EVT | VT1, | ||
| EVT | VT2, | ||
| ArrayRef< SDValue > | Ops | ||
| ) |
Definition at line 6116 of file SelectionDAG.cpp.
References getVTList(), and SelectNodeTo().
| SDNode * SelectionDAG::SelectNodeTo | ( | SDNode * | N, |
| unsigned | TargetOpc, | ||
| EVT | VT1, | ||
| EVT | VT2, | ||
| EVT | VT3, | ||
| ArrayRef< SDValue > | Ops | ||
| ) |
Definition at line 6128 of file SelectionDAG.cpp.
References getVTList(), and SelectNodeTo().
| SDNode* llvm::SelectionDAG::SelectNodeTo | ( | SDNode * | N, |
| unsigned | TargetOpc, | ||
| EVT | VT1, | ||
| EVT | VT2, | ||
| SDValue | Op1 | ||
| ) |
| SDNode * SelectionDAG::SelectNodeTo | ( | SDNode * | N, |
| unsigned | TargetOpc, | ||
| EVT | VT1, | ||
| EVT | VT2, | ||
| SDValue | Op1, | ||
| SDValue | Op2 | ||
| ) |
Definition at line 6135 of file SelectionDAG.cpp.
References getVTList(), and SelectNodeTo().
| SDNode * SelectionDAG::SelectNodeTo | ( | SDNode * | N, |
| unsigned | TargetOpc, | ||
| SDVTList | VTs, | ||
| ArrayRef< SDValue > | Ops | ||
| ) |
Definition at line 6143 of file SelectionDAG.cpp.
References MorphNodeTo(), RemoveDeadNode(), ReplaceAllUsesWith(), and llvm::SDNode::setNodeId().
Set graph attributes for a node. (eg. "color=red".)
setGraphAttrs - Set graph attributes for a node.
(eg. "color=red".)
Definition at line 184 of file SelectionDAGPrinter.cpp.
References llvm::errs(), N, and NodeGraphAttrs.
Convenience for setting node color attribute.
setGraphColor - Convenience for setting node color attribute.
Definition at line 214 of file SelectionDAGPrinter.cpp.
References llvm::errs(), N, and NodeGraphAttrs.
Set the current root tag of the SelectionDAG.
Definition at line 387 of file SelectionDAG.h.
References assert(), llvm::checkForCycles(), llvm::SDValue::getNode(), llvm::SDValue::getValueType(), N, and llvm::MVT::Other.
Referenced by llvm::SelectionDAGBuilder::getControlRoot(), llvm::SelectionDAGBuilder::getRoot(), llvm::SelectionDAGBuilder::LowerCallTo(), llvm::TargetLowering::LowerCallTo(), llvm::SelectionDAGBuilder::LowerDeoptimizingReturn(), llvm::NVPTXTargetLowering::LowerFormalArguments(), lowerIncomingStatepointValue(), llvm::SelectionDAGBuilder::lowerInvokable(), RemoveDeadNodes(), ReplaceAllUsesOfValueWith(), ReplaceAllUsesWith(), llvm::DAGTypeLegalizer::run(), llvm::SelectionDAGBuilder::visitBitTestCase(), llvm::SelectionDAGBuilder::visitBitTestHeader(), llvm::SelectionDAGBuilder::visitJumpTable(), llvm::SelectionDAGBuilder::visitJumpTableHeader(), llvm::SelectionDAGBuilder::visitSPDescriptorFailure(), llvm::SelectionDAGBuilder::visitSPDescriptorParent(), and llvm::SelectionDAGBuilder::visitSwitchCase().
Convenience for setting subgraph color attribute.
setSubgraphColor - Convenience for setting subgraph color attribute.
Definition at line 258 of file SelectionDAGPrinter.cpp.
References llvm::errs(), and fuzzer::strcmp.
Return true if the sign bit of Op is known to be zero.
SignBitIsZero - Return true if the sign bit of Op is known to be zero.
We use this predicate to simplify operations downstream.
Definition at line 1954 of file SelectionDAG.cpp.
References llvm::SDValue::getScalarValueSizeInBits(), llvm::APInt::getSignBit(), and MaskedValueIsZero().
Referenced by combineUIntToFP(), and getCmp().
| std::pair< SDValue, SDValue > SelectionDAG::SplitVector | ( | const SDValue & | N, |
| const SDLoc & | DL, | ||
| const EVT & | LoVT, | ||
| const EVT & | HiVT | ||
| ) |
Split the vector with EXTRACT_SUBVECTOR using the provides VTs and return the low/high part.
SplitVector - Split the vector with EXTRACT_SUBVECTOR and return the low/high part.
Definition at line 7309 of file SelectionDAG.cpp.
References assert(), llvm::ISD::EXTRACT_SUBVECTOR, getConstant(), getDataLayout(), getNode(), llvm::SDValue::getValueType(), llvm::TargetLoweringBase::getVectorIdxTy(), llvm::EVT::getVectorNumElements(), llvm::MipsISD::Hi, and llvm::MipsISD::Lo.
Referenced by LowerVectorCTLZ_AVX512(), SplitVector(), llvm::AMDGPUTargetLowering::SplitVectorLoad(), SplitVectorOperand(), and llvm::AMDGPUTargetLowering::SplitVectorStore().
|
inline |
Split the vector with EXTRACT_SUBVECTOR and return the low/high part.
Definition at line 1343 of file SelectionDAG.h.
References GetSplitDestVTs(), llvm::SDValue::getValueType(), and SplitVector().
|
inline |
Split the node's operand with EXTRACT_SUBVECTOR and return the low/high part.
Definition at line 1351 of file SelectionDAG.h.
References llvm::SDNode::getOperand(), and SplitVector().
Referenced by ReplaceReductionResults(), and SplitVSETCC().
Utility function used by legalize and lowering to "unroll" a vector operation by splitting out the scalars and operating on each element individually.
If the ResNE is 0, fully unroll the vector op. If ResNE is less than the width of the vector op, unroll up to ResNE. If the ResNE is greater than the width of the vector op, unroll the vector op and fill the end of the resulting vector with UNDEFS.
Definition at line 7121 of file SelectionDAG.cpp.
References assert(), llvm::ISD::EXTRACT_VECTOR_ELT, llvm::ISD::FP_ROUND_INREG, getBuildVector(), getConstant(), getContext(), getDataLayout(), llvm::SDNode::getFlags(), getNode(), llvm::SDNode::getNumOperands(), llvm::SDNode::getNumValues(), llvm::SDNode::getOpcode(), llvm::SDNode::getOperand(), getShiftAmountOperand(), getUNDEF(), llvm::SDValue::getValueType(), getValueType(), llvm::SDNode::getValueType(), llvm::EVT::getVectorElementType(), llvm::TargetLoweringBase::getVectorIdxTy(), llvm::EVT::getVectorVT(), i, llvm::EVT::isVector(), llvm::AArch64CC::NE, llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back(), llvm::ISD::ROTL, llvm::ISD::ROTR, llvm::ISD::SELECT, llvm::ISD::SHL, llvm::ISD::SIGN_EXTEND_INREG, llvm::ISD::SRA, llvm::ISD::SRL, and llvm::ISD::VSELECT.
Referenced by LowerVectorFP_TO_INT(), and LowerVectorINT_TO_FP().
Mutate the specified node in-place to have the specified operands.
UpdateNodeOperands - Mutate the specified node in-place to have the specified operands.
If the resultant node already exists in the DAG, this does not modify the specified node, instead it returns the node that already exists. If the resultant node does not exist in the DAG, the input node is returned. As a degenerate case, if you specify the same input operands as the node already has, the input node is returned.
Definition at line 5965 of file SelectionDAG.cpp.
References assert(), llvm::SDNode::getNumOperands(), llvm::SDNode::getOperand(), and N.
Referenced by combineGatherScatter(), EltsFromConsecutiveLoads(), llvm::SITargetLowering::legalizeTargetIndependentNode(), LowerMGATHER(), lowerVectorShuffleAsBroadcast(), moveBelowOrigChain(), and UpdateNodeOperands().
Definition at line 5989 of file SelectionDAG.cpp.
References assert(), llvm::SDNode::getNumOperands(), llvm::SDNode::getOperand(), and N.
Definition at line 6018 of file SelectionDAG.cpp.
References UpdateNodeOperands().
| SDNode * SelectionDAG::UpdateNodeOperands | ( | SDNode * | N, |
| SDValue | Op1, | ||
| SDValue | Op2, | ||
| SDValue | Op3, | ||
| SDValue | Op4 | ||
| ) |
Definition at line 6024 of file SelectionDAG.cpp.
References UpdateNodeOperands().
| SDNode * SelectionDAG::UpdateNodeOperands | ( | SDNode * | N, |
| SDValue | Op1, | ||
| SDValue | Op2, | ||
| SDValue | Op3, | ||
| SDValue | Op4, | ||
| SDValue | Op5 | ||
| ) |
Definition at line 6031 of file SelectionDAG.cpp.
References UpdateNodeOperands().
Definition at line 6038 of file SelectionDAG.cpp.
References assert(), llvm::ArrayRef< T >::begin(), llvm::ArrayRef< T >::end(), llvm::lltok::equal, llvm::SDNode::getNumOperands(), i, N, llvm::SDNode::op_begin(), and llvm::ArrayRef< T >::size().
| void SelectionDAG::viewGraph | ( | const std::string & | Title | ) |
Pop up a GraphViz/gv window with the DAG rendered using 'dot'.
viewGraph - Pop up a ghostview window with the reachable parts of the DAG rendered using 'dot'.
Definition at line 153 of file SelectionDAGPrinter.cpp.
References llvm::errs(), getMachineFunction(), getName(), and llvm::ViewGraph().
| void SelectionDAG::viewGraph | ( | ) |
Definition at line 166 of file SelectionDAGPrinter.cpp.
|
friend |
DAGUpdateListener is a friend so it can manipulate the listener stack.
Definition at line 255 of file SelectionDAG.h.
| bool llvm::SelectionDAG::NewNodesMustHaveLegalTypes |
When true, additional steps are taken to ensure that getConstant() and similar functions return DAG nodes that have legal types.
This is important after type legalization since any illegally typed nodes generated after this point will not experience type legalization.
Definition at line 251 of file SelectionDAG.h.
Referenced by getConstant().
Definition at line 340 of file SelectionDAG.h.
Referenced by clearGraphAttrs(), getGraphAttrs(), setGraphAttrs(), and setGraphColor().
1.8.6