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LLVM
4.0.0
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#include "SystemZ.h"#include "llvm/MC/MCDisassembler/MCDisassembler.h"#include "llvm/MC/MCFixedLenDisassembler.h"#include "llvm/MC/MCInst.h"#include "llvm/MC/MCSubtargetInfo.h"#include "llvm/Support/TargetRegistry.h"#include "SystemZGenDisassemblerTables.inc"Go to the source code of this file.
Macros | |
| #define | DEBUG_TYPE "systemz-disassembler" |
Typedefs | |
| typedef MCDisassembler::DecodeStatus | DecodeStatus |
Functions | |
| static MCDisassembler * | createSystemZDisassembler (const Target &T, const MCSubtargetInfo &STI, MCContext &Ctx) |
| void | LLVMInitializeSystemZDisassembler () |
| static bool | tryAddingSymbolicOperand (int64_t Value, bool isBranch, uint64_t Address, uint64_t Offset, uint64_t Width, MCInst &MI, const void *Decoder) |
| tryAddingSymbolicOperand - trys to add a symbolic operand in place of the immediate Value in the MCInst. More... | |
| static DecodeStatus | decodeRegisterClass (MCInst &Inst, uint64_t RegNo, const unsigned *Regs, unsigned Size) |
| static DecodeStatus | DecodeGR32BitRegisterClass (MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeGRH32BitRegisterClass (MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeGR64BitRegisterClass (MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeGR128BitRegisterClass (MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeADDR64BitRegisterClass (MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeFP32BitRegisterClass (MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeFP64BitRegisterClass (MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeFP128BitRegisterClass (MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeVR32BitRegisterClass (MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeVR64BitRegisterClass (MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeVR128BitRegisterClass (MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) |
| static DecodeStatus | DecodeAR32BitRegisterClass (MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder) |
| template<unsigned N> | |
| static DecodeStatus | decodeUImmOperand (MCInst &Inst, uint64_t Imm) |
| template<unsigned N> | |
| static DecodeStatus | decodeSImmOperand (MCInst &Inst, uint64_t Imm) |
| static DecodeStatus | decodeU1ImmOperand (MCInst &Inst, uint64_t Imm, uint64_t Address, const void *Decoder) |
| static DecodeStatus | decodeU2ImmOperand (MCInst &Inst, uint64_t Imm, uint64_t Address, const void *Decoder) |
| static DecodeStatus | decodeU3ImmOperand (MCInst &Inst, uint64_t Imm, uint64_t Address, const void *Decoder) |
| static DecodeStatus | decodeU4ImmOperand (MCInst &Inst, uint64_t Imm, uint64_t Address, const void *Decoder) |
| static DecodeStatus | decodeU6ImmOperand (MCInst &Inst, uint64_t Imm, uint64_t Address, const void *Decoder) |
| static DecodeStatus | decodeU8ImmOperand (MCInst &Inst, uint64_t Imm, uint64_t Address, const void *Decoder) |
| static DecodeStatus | decodeU12ImmOperand (MCInst &Inst, uint64_t Imm, uint64_t Address, const void *Decoder) |
| static DecodeStatus | decodeU16ImmOperand (MCInst &Inst, uint64_t Imm, uint64_t Address, const void *Decoder) |
| static DecodeStatus | decodeU32ImmOperand (MCInst &Inst, uint64_t Imm, uint64_t Address, const void *Decoder) |
| static DecodeStatus | decodeS8ImmOperand (MCInst &Inst, uint64_t Imm, uint64_t Address, const void *Decoder) |
| static DecodeStatus | decodeS16ImmOperand (MCInst &Inst, uint64_t Imm, uint64_t Address, const void *Decoder) |
| static DecodeStatus | decodeS32ImmOperand (MCInst &Inst, uint64_t Imm, uint64_t Address, const void *Decoder) |
| template<unsigned N> | |
| static DecodeStatus | decodePCDBLOperand (MCInst &Inst, uint64_t Imm, uint64_t Address, bool isBranch, const void *Decoder) |
| static DecodeStatus | decodePC12DBLBranchOperand (MCInst &Inst, uint64_t Imm, uint64_t Address, const void *Decoder) |
| static DecodeStatus | decodePC16DBLBranchOperand (MCInst &Inst, uint64_t Imm, uint64_t Address, const void *Decoder) |
| static DecodeStatus | decodePC24DBLBranchOperand (MCInst &Inst, uint64_t Imm, uint64_t Address, const void *Decoder) |
| static DecodeStatus | decodePC32DBLBranchOperand (MCInst &Inst, uint64_t Imm, uint64_t Address, const void *Decoder) |
| static DecodeStatus | decodePC32DBLOperand (MCInst &Inst, uint64_t Imm, uint64_t Address, const void *Decoder) |
| static DecodeStatus | decodeBDAddr12Operand (MCInst &Inst, uint64_t Field, const unsigned *Regs) |
| static DecodeStatus | decodeBDAddr20Operand (MCInst &Inst, uint64_t Field, const unsigned *Regs) |
| static DecodeStatus | decodeBDXAddr12Operand (MCInst &Inst, uint64_t Field, const unsigned *Regs) |
| static DecodeStatus | decodeBDXAddr20Operand (MCInst &Inst, uint64_t Field, const unsigned *Regs) |
| static DecodeStatus | decodeBDLAddr12Len8Operand (MCInst &Inst, uint64_t Field, const unsigned *Regs) |
| static DecodeStatus | decodeBDRAddr12Operand (MCInst &Inst, uint64_t Field, const unsigned *Regs) |
| static DecodeStatus | decodeBDVAddr12Operand (MCInst &Inst, uint64_t Field, const unsigned *Regs) |
| static DecodeStatus | decodeBDAddr32Disp12Operand (MCInst &Inst, uint64_t Field, uint64_t Address, const void *Decoder) |
| static DecodeStatus | decodeBDAddr32Disp20Operand (MCInst &Inst, uint64_t Field, uint64_t Address, const void *Decoder) |
| static DecodeStatus | decodeBDAddr64Disp12Operand (MCInst &Inst, uint64_t Field, uint64_t Address, const void *Decoder) |
| static DecodeStatus | decodeBDAddr64Disp20Operand (MCInst &Inst, uint64_t Field, uint64_t Address, const void *Decoder) |
| static DecodeStatus | decodeBDXAddr64Disp12Operand (MCInst &Inst, uint64_t Field, uint64_t Address, const void *Decoder) |
| static DecodeStatus | decodeBDXAddr64Disp20Operand (MCInst &Inst, uint64_t Field, uint64_t Address, const void *Decoder) |
| static DecodeStatus | decodeBDLAddr64Disp12Len8Operand (MCInst &Inst, uint64_t Field, uint64_t Address, const void *Decoder) |
| static DecodeStatus | decodeBDRAddr64Disp12Operand (MCInst &Inst, uint64_t Field, uint64_t Address, const void *Decoder) |
| static DecodeStatus | decodeBDVAddr64Disp12Operand (MCInst &Inst, uint64_t Field, uint64_t Address, const void *Decoder) |
| #define DEBUG_TYPE "systemz-disassembler" |
Definition at line 19 of file SystemZDisassembler.cpp.
Definition at line 21 of file SystemZDisassembler.cpp.
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Definition at line 37 of file SystemZDisassembler.cpp.
Referenced by LLVMInitializeSystemZDisassembler().
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Definition at line 111 of file SystemZDisassembler.cpp.
References decodeRegisterClass(), and llvm::SystemZMC::GR64Regs.
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Definition at line 153 of file SystemZDisassembler.cpp.
References llvm::SystemZMC::AR32Regs, and decodeRegisterClass().
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Definition at line 280 of file SystemZDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), and llvm::MCDisassembler::Success.
Referenced by decodeBDAddr32Disp12Operand(), and decodeBDAddr64Disp12Operand().
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Definition at line 290 of file SystemZDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), and llvm::MCDisassembler::Success.
Referenced by decodeBDAddr32Disp20Operand(), and decodeBDAddr64Disp20Operand().
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Definition at line 360 of file SystemZDisassembler.cpp.
References decodeBDAddr12Operand(), and llvm::SystemZMC::GR32Regs.
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Definition at line 366 of file SystemZDisassembler.cpp.
References decodeBDAddr20Operand(), and llvm::SystemZMC::GR32Regs.
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Definition at line 372 of file SystemZDisassembler.cpp.
References decodeBDAddr12Operand(), and llvm::SystemZMC::GR64Regs.
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Definition at line 378 of file SystemZDisassembler.cpp.
References decodeBDAddr20Operand(), and llvm::SystemZMC::GR64Regs.
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Definition at line 324 of file SystemZDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), and llvm::MCDisassembler::Success.
Referenced by decodeBDLAddr64Disp12Len8Operand().
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Definition at line 396 of file SystemZDisassembler.cpp.
References decodeBDLAddr12Len8Operand(), and llvm::SystemZMC::GR64Regs.
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Definition at line 336 of file SystemZDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), and llvm::MCDisassembler::Success.
Referenced by decodeBDRAddr64Disp12Operand().
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Definition at line 403 of file SystemZDisassembler.cpp.
References decodeBDRAddr12Operand(), and llvm::SystemZMC::GR64Regs.
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Definition at line 348 of file SystemZDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Success, and llvm::SystemZMC::VR128Regs.
Referenced by decodeBDVAddr64Disp12Operand().
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Definition at line 410 of file SystemZDisassembler.cpp.
References decodeBDVAddr12Operand(), and llvm::SystemZMC::GR64Regs.
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Definition at line 300 of file SystemZDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), and llvm::MCDisassembler::Success.
Referenced by decodeBDXAddr64Disp12Operand().
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Definition at line 312 of file SystemZDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), llvm::MCOperand::createReg(), and llvm::MCDisassembler::Success.
Referenced by decodeBDXAddr64Disp20Operand().
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Definition at line 384 of file SystemZDisassembler.cpp.
References decodeBDXAddr12Operand(), and llvm::SystemZMC::GR64Regs.
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Definition at line 390 of file SystemZDisassembler.cpp.
References decodeBDXAddr20Operand(), and llvm::SystemZMC::GR64Regs.
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Definition at line 129 of file SystemZDisassembler.cpp.
References decodeRegisterClass(), and llvm::SystemZMC::FP128Regs.
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Definition at line 117 of file SystemZDisassembler.cpp.
References decodeRegisterClass(), and llvm::SystemZMC::FP32Regs.
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Definition at line 123 of file SystemZDisassembler.cpp.
References decodeRegisterClass(), and llvm::SystemZMC::FP64Regs.
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Definition at line 105 of file SystemZDisassembler.cpp.
References decodeRegisterClass(), and llvm::SystemZMC::GR128Regs.
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Definition at line 87 of file SystemZDisassembler.cpp.
References decodeRegisterClass(), and llvm::SystemZMC::GR32Regs.
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Definition at line 99 of file SystemZDisassembler.cpp.
References decodeRegisterClass(), and llvm::SystemZMC::GR64Regs.
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Definition at line 93 of file SystemZDisassembler.cpp.
References decodeRegisterClass(), and llvm::SystemZMC::GRH32Regs.
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Definition at line 250 of file SystemZDisassembler.cpp.
References llvm::dwarf::syntax::Address.
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Definition at line 256 of file SystemZDisassembler.cpp.
References llvm::dwarf::syntax::Address.
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Definition at line 262 of file SystemZDisassembler.cpp.
References llvm::dwarf::syntax::Address.
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Definition at line 268 of file SystemZDisassembler.cpp.
References llvm::dwarf::syntax::Address.
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Definition at line 274 of file SystemZDisassembler.cpp.
References llvm::dwarf::syntax::Address.
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Definition at line 236 of file SystemZDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), N, llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().
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Definition at line 77 of file SystemZDisassembler.cpp.
References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
Referenced by DecodeADDR64BitRegisterClass(), DecodeAR32BitRegisterClass(), DecodeFP128BitRegisterClass(), DecodeFP32BitRegisterClass(), DecodeFP64BitRegisterClass(), DecodeGR128BitRegisterClass(), DecodeGR32BitRegisterClass(), DecodeGR64BitRegisterClass(), DecodeGRH32BitRegisterClass(), DecodeVR128BitRegisterClass(), DecodeVR32BitRegisterClass(), and DecodeVR64BitRegisterClass().
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Definition at line 225 of file SystemZDisassembler.cpp.
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Definition at line 230 of file SystemZDisassembler.cpp.
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Definition at line 220 of file SystemZDisassembler.cpp.
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Definition at line 168 of file SystemZDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 205 of file SystemZDisassembler.cpp.
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Definition at line 210 of file SystemZDisassembler.cpp.
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Definition at line 175 of file SystemZDisassembler.cpp.
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Definition at line 180 of file SystemZDisassembler.cpp.
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Definition at line 215 of file SystemZDisassembler.cpp.
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Definition at line 185 of file SystemZDisassembler.cpp.
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Definition at line 190 of file SystemZDisassembler.cpp.
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Definition at line 195 of file SystemZDisassembler.cpp.
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Definition at line 200 of file SystemZDisassembler.cpp.
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Definition at line 160 of file SystemZDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.
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Definition at line 147 of file SystemZDisassembler.cpp.
References decodeRegisterClass(), and llvm::SystemZMC::VR128Regs.
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Definition at line 135 of file SystemZDisassembler.cpp.
References decodeRegisterClass(), and llvm::SystemZMC::VR32Regs.
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Definition at line 141 of file SystemZDisassembler.cpp.
References decodeRegisterClass(), and llvm::SystemZMC::VR64Regs.
| void LLVMInitializeSystemZDisassembler | ( | ) |
Definition at line 43 of file SystemZDisassembler.cpp.
References createSystemZDisassembler(), llvm::getTheSystemZTarget(), and llvm::TargetRegistry::RegisterMCDisassembler().
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tryAddingSymbolicOperand - trys to add a symbolic operand in place of the immediate Value in the MCInst.
| Value | - The immediate Value, has had any PC adjustment made by the caller. |
| isBranch | - If the instruction is a branch instruction |
| Address | - The starting address of the instruction |
| Offset | - The byte offset to this immediate in the instruction |
| Width | - The byte width of this immediate in the instruction |
If the getOpInfo() function was set when setupForSymbolicDisassembly() was called then that function is called to get any symbolic information for the immediate in the instruction using the Address, Offset and Width. If that returns non-zero then the symbolic information it returns is used to create an MCExpr and that is added as an operand to the MCInst. If getOpInfo() returns zero and isBranch is true then a symbol look up for immediate Value is done and if a symbol is found an MCExpr is created with that, else an MCExpr with the immediate Value is created. This function returns true if it adds an operand to the MCInst and false otherwise.
Definition at line 68 of file SystemZDisassembler.cpp.
References llvm::MCDisassembler::tryAddingSymbolicOperand().
Referenced by decodePCDBLOperand().
1.8.6