LLVM  4.0.0
SparcTargetMachine.cpp
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1 //===-- SparcTargetMachine.cpp - Define TargetMachine for Sparc -----------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "SparcTargetMachine.h"
14 #include "SparcTargetObjectFile.h"
15 #include "Sparc.h"
16 #include "LeonPasses.h"
17 #include "llvm/CodeGen/Passes.h"
21 using namespace llvm;
22 
23 extern "C" void LLVMInitializeSparcTarget() {
24  // Register the target.
28 }
29 
30 static std::string computeDataLayout(const Triple &T, bool is64Bit) {
31  // Sparc is typically big endian, but some are little.
32  std::string Ret = T.getArch() == Triple::sparcel ? "e" : "E";
33  Ret += "-m:e";
34 
35  // Some ABIs have 32bit pointers.
36  if (!is64Bit)
37  Ret += "-p:32:32";
38 
39  // Alignments for 64 bit integers.
40  Ret += "-i64:64";
41 
42  // On SparcV9 128 floats are aligned to 128 bits, on others only to 64.
43  // On SparcV9 registers can hold 64 or 32 bits, on others only 32.
44  if (is64Bit)
45  Ret += "-n32:64";
46  else
47  Ret += "-f128:64-n32";
48 
49  if (is64Bit)
50  Ret += "-S128";
51  else
52  Ret += "-S64";
53 
54  return Ret;
55 }
56 
58  if (!RM.hasValue())
59  return Reloc::Static;
60  return *RM;
61 }
62 
63 /// Create an ILP32 architecture model
65  StringRef CPU, StringRef FS,
66  const TargetOptions &Options,
69  CodeGenOpt::Level OL, bool is64bit)
70  : LLVMTargetMachine(T, computeDataLayout(TT, is64bit), TT, CPU, FS, Options,
71  getEffectiveRelocModel(RM), CM, OL),
73  Subtarget(TT, CPU, FS, *this, is64bit), is64Bit(is64bit) {
74  initAsmInfo();
75 }
76 
78 
79 const SparcSubtarget *
81  Attribute CPUAttr = F.getFnAttribute("target-cpu");
82  Attribute FSAttr = F.getFnAttribute("target-features");
83 
84  std::string CPU = !CPUAttr.hasAttribute(Attribute::None)
85  ? CPUAttr.getValueAsString().str()
86  : TargetCPU;
87  std::string FS = !FSAttr.hasAttribute(Attribute::None)
88  ? FSAttr.getValueAsString().str()
89  : TargetFS;
90 
91  // FIXME: This is related to the code below to reset the target options,
92  // we need to know whether or not the soft float flag is set on the
93  // function, so we can enable it as a subtarget feature.
94  bool softFloat =
95  F.hasFnAttribute("use-soft-float") &&
96  F.getFnAttribute("use-soft-float").getValueAsString() == "true";
97 
98  if (softFloat)
99  FS += FS.empty() ? "+soft-float" : ",+soft-float";
100 
101  auto &I = SubtargetMap[CPU + FS];
102  if (!I) {
103  // This needs to be done before we create a new subtarget since any
104  // creation will depend on the TM and the code generation flags on the
105  // function that reside in TargetOptions.
107  I = llvm::make_unique<SparcSubtarget>(TargetTriple, CPU, FS, *this,
108  this->is64Bit);
109  }
110  return I.get();
111 }
112 
113 namespace {
114 /// Sparc Code Generator Pass Configuration Options.
115 class SparcPassConfig : public TargetPassConfig {
116 public:
117  SparcPassConfig(SparcTargetMachine *TM, PassManagerBase &PM)
118  : TargetPassConfig(TM, PM) {}
119 
120  SparcTargetMachine &getSparcTargetMachine() const {
121  return getTM<SparcTargetMachine>();
122  }
123 
124  void addIRPasses() override;
125  bool addInstSelector() override;
126  void addPreEmitPass() override;
127 };
128 } // namespace
129 
131  return new SparcPassConfig(this, PM);
132 }
133 
134 void SparcPassConfig::addIRPasses() {
135  addPass(createAtomicExpandPass(&getSparcTargetMachine()));
136 
138 }
139 
140 bool SparcPassConfig::addInstSelector() {
141  addPass(createSparcISelDag(getSparcTargetMachine()));
142  return false;
143 }
144 
145 void SparcPassConfig::addPreEmitPass(){
146  addPass(createSparcDelaySlotFillerPass(getSparcTargetMachine()));
147 
148  if (this->getSparcTargetMachine().getSubtargetImpl()->insertNOPLoad())
149  {
150  addPass(new InsertNOPLoad(getSparcTargetMachine()));
151  }
152  if (this->getSparcTargetMachine().getSubtargetImpl()->fixFSMULD())
153  {
154  addPass(new FixFSMULD(getSparcTargetMachine()));
155  }
156  if (this->getSparcTargetMachine().getSubtargetImpl()->replaceFMULS())
157  {
158  addPass(new ReplaceFMULS(getSparcTargetMachine()));
159  }
160  if (this->getSparcTargetMachine().getSubtargetImpl()->detectRoundChange()) {
161  addPass(new DetectRoundChange(getSparcTargetMachine()));
162  }
163  if (this->getSparcTargetMachine().getSubtargetImpl()->fixAllFDIVSQRT())
164  {
165  addPass(new FixAllFDIVSQRT(getSparcTargetMachine()));
166  }
167 }
168 
169 void SparcV8TargetMachine::anchor() { }
170 
172  StringRef CPU, StringRef FS,
173  const TargetOptions &Options,
175  CodeModel::Model CM,
177  : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {}
178 
179 void SparcV9TargetMachine::anchor() { }
180 
182  StringRef CPU, StringRef FS,
183  const TargetOptions &Options,
185  CodeModel::Model CM,
187  : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {}
188 
189 void SparcelTargetMachine::anchor() {}
190 
192  StringRef CPU, StringRef FS,
193  const TargetOptions &Options,
195  CodeModel::Model CM,
197  : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {}
bool hasValue() const
Definition: Optional.h:125
virtual void addIRPasses()
Add common target configurable passes that perform LLVM IR to IR transforms following machine indepen...
Triple TargetTriple
Triple string, CPU name, and target feature strings the TargetMachine instance is created with...
Attribute getFnAttribute(Attribute::AttrKind Kind) const
Return the attribute for the given attribute kind.
Definition: Function.h:234
FunctionPass * createSparcDelaySlotFillerPass(TargetMachine &TM)
createSparcDelaySlotFillerPass - Returns a pass that fills in delay slots in Sparc MachineFunctions ...
void LLVMInitializeSparcTarget()
bool hasAttribute(AttrKind Val) const
Return true if the attribute is present.
Definition: Attributes.cpp:185
FunctionPass * createAtomicExpandPass(const TargetMachine *TM)
No attributes have been set.
Definition: Attributes.h:69
Target-Independent Code Generator Pass Configuration Options.
#define F(x, y, z)
Definition: MD5.cpp:51
Function Alias Analysis false
ArchType getArch() const
getArch - Get the parsed architecture type of this triple.
Definition: Triple.h:270
Target & getTheSparcTarget()
std::enable_if<!std::is_array< T >::value, std::unique_ptr< T > >::type make_unique(Args &&...args)
Constructs a new T() with the given args and returns a unique_ptr<T> which owns the object...
Definition: STLExtras.h:845
static Reloc::Model getEffectiveRelocModel(Optional< Reloc::Model > RM)
static bool is64Bit(const char *name)
SparcTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional< Reloc::Model > RM, CodeModel::Model CM, CodeGenOpt::Level OL, bool is64bit)
Create an ILP32 architecture model.
Target & getTheSparcelTarget()
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang","erlang-compatible garbage collector")
This class describes a target machine that is implemented with the LLVM target-independent code gener...
SparcelTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional< Reloc::Model > RM, CodeModel::Model CM, CodeGenOpt::Level OL)
FunctionPass * createSparcISelDag(SparcTargetMachine &TM)
createSparcISelDag - This pass converts a legalized DAG into a SPARC-specific DAG, ready for instruction scheduling.
LLVM_NODISCARD std::string str() const
str - Get the contents as an std::string.
Definition: StringRef.h:225
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
SparcV8TargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional< Reloc::Model > RM, CodeModel::Model CM, CodeGenOpt::Level OL)
Target - Wrapper for Target specific information.
LLVM_NODISCARD LLVM_ATTRIBUTE_ALWAYS_INLINE bool empty() const
empty - Check if the string is empty.
Definition: StringRef.h:130
Target & getTheSparcV9Target()
static std::string computeDataLayout(const Triple &T, bool is64Bit)
Basic Alias true
bool hasFnAttribute(Attribute::AttrKind Kind) const
Return true if the function has the attribute.
Definition: Function.h:226
const SparcSubtarget * getSubtargetImpl() const
#define I(x, y, z)
Definition: MD5.cpp:54
void resetTargetOptions(const Function &F) const
Reset the target options based on the function's attributes.
StringRef getValueAsString() const
Return the attribute's value as a string.
Definition: Attributes.cpp:178
TargetPassConfig * createPassConfig(PassManagerBase &PM) override
Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of ...
RegisterTargetMachine - Helper template for registering a target machine implementation, for use in the target machine initialization function.
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:47
static GCMetadataPrinterRegistry::Add< OcamlGCMetadataPrinter > Y("ocaml","ocaml 3.10-compatible collector")
SparcV9TargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional< Reloc::Model > RM, CodeModel::Model CM, CodeGenOpt::Level OL)