16 #define DEBUG_TYPE "si-i1-copies"
44 StringRef getPassName()
const override {
return "SI Lower i1 Copies"; }
55 "SI Lower i1 Copies",
false,
false)
57 char SILowerI1Copies::
ID = 0;
62 return new SILowerI1Copies();
71 std::vector<unsigned> I1Defs;
78 for (I = MBB.
begin(); I != MBB.
end(); I = Next) {
82 if (MI.
getOpcode() == AMDGPU::IMPLICIT_DEF) {
85 if (RC == &AMDGPU::VReg_1RegClass)
105 if (DstRC == &AMDGPU::VReg_1RegClass &&
107 I1Defs.push_back(Dst.
getReg());
109 if (DefInst->
getOpcode() == AMDGPU::S_MOV_B64) {
111 I1Defs.push_back(Dst.
getReg());
114 assert(Val == 0 || Val == -1);
116 BuildMI(MBB, &MI, DL, TII->
get(AMDGPU::V_MOV_B32_e32))
124 BuildMI(MBB, &MI, DL, TII->
get(AMDGPU::V_CNDMASK_B32_e64))
131 SrcRC == &AMDGPU::VReg_1RegClass) {
132 if (DefInst->
getOpcode() == AMDGPU::V_CNDMASK_B32_e64 &&
141 &AMDGPU::SGPR_64RegClass)) {
142 BuildMI(MBB, &MI, DL, TII->
get(AMDGPU::S_AND_B64))
144 .addReg(AMDGPU::EXEC)
147 BuildMI(MBB, &MI, DL, TII->
get(AMDGPU::V_CMP_NE_U32_e64))
157 for (
unsigned Reg : I1Defs)
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
AMDGPU specific subclass of TargetSubtarget.
#define DEBUG_TYPE
i1 values are usually inserted by the CFG Structurize pass and they are unique in that they can be co...
static bool isVirtualRegister(unsigned Reg)
Return true if the specified register number is in the virtual register namespace.
const SIInstrInfo * getInstrInfo() const override
static MCDisassembler::DecodeStatus addOperand(MCInst &Inst, const MCOperand &Opnd)
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
const HexagonInstrInfo * TII
bool isImm() const
isImm - Tests if this is a MO_Immediate operand.
bool isReg() const
isReg - Tests if this is a MO_Register operand.
void eraseFromParent()
Unlink 'this' from the containing basic block and delete it.
const TargetRegisterClass * getRegClass(unsigned Reg) const
Return the register class of the specified virtual register.
Reg
All possible values of the reg field in the ModR/M byte.
FunctionPass * createSILowerI1CopiesPass()
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
unsigned const MachineRegisterInfo * MRI
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
const MachineOperand & getOperand(unsigned i) const
Represent the analysis usage information of a pass.
FunctionPass class - This class is used to implement most global optimizations.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
Iterator for intrusive lists based on ilist_node.
MachineOperand class - Representation of each machine instruction operand.
void setPreservesCFG()
This function should be called by the pass, iff they do not:
MachineInstr * getUniqueVRegDef(unsigned Reg) const
getUniqueVRegDef - Return the unique machine instr that defines the specified virtual register or nul...
const DebugLoc & getDebugLoc() const
Returns the debug location id of this MachineInstr.
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
static MDTuple * get(LLVMContext &Context, ArrayRef< Metadata * > MDs)
Representation of each machine instruction.
Interface definition for SIInstrInfo.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
const TargetRegisterClass * getCommonSubClass(const TargetRegisterClass *A, const TargetRegisterClass *B, const MVT::SimpleValueType SVT=MVT::SimpleValueType::Any) const
Find the largest common subclass of A and B.
unsigned getReg() const
getReg - Returns the register number.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
void setRegClass(unsigned Reg, const TargetRegisterClass *RC)
setRegClass - Set the register class of the specified virtual register.
StringRef - Represent a constant reference to a string, i.e.
void initializeSILowerI1CopiesPass(PassRegistry &)