|
LLVM
4.0.0
|
MVT - Machine Value Type. More...
#include <MachineValueType.h>
Public Member Functions | |
| constexpr | MVT () |
| constexpr | MVT (SimpleValueType SVT) |
| bool | operator> (const MVT &S) const |
| bool | operator< (const MVT &S) const |
| bool | operator== (const MVT &S) const |
| bool | operator!= (const MVT &S) const |
| bool | operator>= (const MVT &S) const |
| bool | operator<= (const MVT &S) const |
| bool | isValid () const |
| isValid - Return true if this is a valid simple valuetype. More... | |
| bool | isFloatingPoint () const |
| isFloatingPoint - Return true if this is a FP, or a vector FP type. More... | |
| bool | isInteger () const |
| isInteger - Return true if this is an integer, or a vector integer type. More... | |
| bool | isScalarInteger () const |
| isScalarInteger - Return true if this is an integer, not including vectors. More... | |
| bool | isVector () const |
| isVector - Return true if this is a vector value type. More... | |
| bool | is16BitVector () const |
| is16BitVector - Return true if this is a 16-bit vector type. More... | |
| bool | is32BitVector () const |
| is32BitVector - Return true if this is a 32-bit vector type. More... | |
| bool | is64BitVector () const |
| is64BitVector - Return true if this is a 64-bit vector type. More... | |
| bool | is128BitVector () const |
| is128BitVector - Return true if this is a 128-bit vector type. More... | |
| bool | is256BitVector () const |
| is256BitVector - Return true if this is a 256-bit vector type. More... | |
| bool | is512BitVector () const |
| is512BitVector - Return true if this is a 512-bit vector type. More... | |
| bool | is1024BitVector () const |
| is1024BitVector - Return true if this is a 1024-bit vector type. More... | |
| bool | is2048BitVector () const |
| is2048BitVector - Return true if this is a 1024-bit vector type. More... | |
| bool | isOverloaded () const |
| isOverloaded - Return true if this is an overloaded type for TableGen. More... | |
| bool | isPow2VectorType () const |
| isPow2VectorType - Returns true if the given vector is a power of 2. More... | |
| MVT | getPow2VectorType () const |
| getPow2VectorType - Widens the length of the given vector MVT up to the nearest power of 2 and returns that type. More... | |
| MVT | getScalarType () const |
| getScalarType - If this is a vector type, return the element type, otherwise return this. More... | |
| MVT | getVectorElementType () const |
| unsigned | getVectorNumElements () const |
| unsigned | getSizeInBits () const |
| unsigned | getScalarSizeInBits () const |
| unsigned | getStoreSize () const |
| getStoreSize - Return the number of bytes overwritten by a store of the specified value type. More... | |
| unsigned | getStoreSizeInBits () const |
| getStoreSizeInBits - Return the number of bits overwritten by a store of the specified value type. More... | |
| bool | bitsGT (MVT VT) const |
| Return true if this has more bits than VT. More... | |
| bool | bitsGE (MVT VT) const |
| Return true if this has no less bits than VT. More... | |
| bool | bitsLT (MVT VT) const |
| Return true if this has less bits than VT. More... | |
| bool | bitsLE (MVT VT) const |
| Return true if this has no more bits than VT. More... | |
Static Public Member Functions | |
| static MVT | getFloatingPointVT (unsigned BitWidth) |
| static MVT | getIntegerVT (unsigned BitWidth) |
| static MVT | getVectorVT (MVT VT, unsigned NumElements) |
| static MVT | getVT (Type *Ty, bool HandleUnknown=false) |
| Return the value type corresponding to the specified type. More... | |
| static mvt_range | all_valuetypes () |
| SimpleValueType Iteration. More... | |
| static mvt_range | integer_valuetypes () |
| static mvt_range | fp_valuetypes () |
| static mvt_range | vector_valuetypes () |
| static mvt_range | integer_vector_valuetypes () |
| static mvt_range | fp_vector_valuetypes () |
Public Attributes | |
| SimpleValueType | SimpleTy |
Every type that is supported natively by some processor targeted by LLVM occurs here. This means that any legal value type can be represented by an MVT.
Definition at line 29 of file MachineValueType.h.
| enum llvm::MVT::SimpleValueType : int8_t |
Definition at line 31 of file MachineValueType.h.
|
inline |
Definition at line 181 of file MachineValueType.h.
Referenced by getVT().
|
inline |
Definition at line 182 of file MachineValueType.h.
|
inlinestatic |
SimpleValueType Iteration.
Definition at line 690 of file MachineValueType.h.
References FIRST_VALUETYPE, and LAST_VALUETYPE.
Referenced by llvm::TargetLoweringBase::initActions().
Return true if this has no less bits than VT.
Definition at line 537 of file MachineValueType.h.
References getSizeInBits().
Referenced by combineOrCmpEqZeroToCtlzSrl().
Return true if this has more bits than VT.
Definition at line 532 of file MachineValueType.h.
References getSizeInBits().
Referenced by llvm::X86TargetLowering::BuildFILD(), getMaskNode(), LowerFCOPYSIGN(), and LowerScalarVariableShift().
Return true if this has no more bits than VT.
Definition at line 547 of file MachineValueType.h.
References getSizeInBits().
Referenced by LowerScalarVariableShift().
Return true if this has less bits than VT.
Definition at line 542 of file MachineValueType.h.
References getSizeInBits().
Referenced by llvm::X86TargetLowering::BuildFILD(), LowerFCOPYSIGN(), and LowerScalarVariableShift().
|
inlinestatic |
Definition at line 697 of file MachineValueType.h.
References FIRST_FP_VALUETYPE, and LAST_FP_VALUETYPE.
Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering(), llvm::ARMTargetLowering::ARMTargetLowering(), llvm::HexagonTargetLowering::HexagonTargetLowering(), llvm::MipsTargetLowering::MipsTargetLowering(), llvm::SparcTargetLowering::SparcTargetLowering(), and llvm::SystemZTargetLowering::SystemZTargetLowering().
|
inlinestatic |
Definition at line 710 of file MachineValueType.h.
References FIRST_FP_VECTOR_VALUETYPE, and LAST_FP_VECTOR_VALUETYPE.
Referenced by llvm::MipsTargetLowering::MipsTargetLowering(), and llvm::X86TargetLowering::X86TargetLowering().
Definition at line 552 of file MachineValueType.h.
References f128, f16, f32, f64, f80, and llvm_unreachable.
Referenced by combineX86ShuffleChain(), combineX86ShufflesConstants(), EltsFromConsecutiveLoads(), llvm::EVT::getFloatingPointVT(), lower256BitVectorShuffle(), LowerVectorBroadcast(), LowerVectorFP_TO_INT(), LowerVectorINT_TO_FP(), and lowerVectorShuffle().
Definition at line 569 of file MachineValueType.h.
References i1, i128, i16, i32, i64, i8, and INVALID_SIMPLE_VALUE_TYPE.
Referenced by llvm::EVT::changeTypeToInteger(), llvm::EVT::changeVectorElementTypeToInteger(), CombineBaseUpdate(), combineX86ShuffleChain(), combineX86ShufflesConstants(), llvm::ComputeSignatureVTs(), ConvertI1VectorToInteger(), EltsFromConsecutiveLoads(), llvm::EVT::getIntegerVT(), getMaskNode(), getPermuteNode(), llvm::TargetLoweringBase::getPointerTy(), GetRegistersForValue(), llvm::TargetLoweringBase::getScalarShiftAmountTy(), getVT(), LowerEXTEND_VECTOR_INREG(), LowerExtended1BitVectorLoad(), lowerFCOPYSIGN64(), LowerSIGN_EXTEND_AVX512(), LowerTruncateVecI1(), LowerVectorBroadcast(), LowerVectorCTLZInRegLUT(), lowerVectorShuffle(), lowerVectorShuffleAsPermuteAndUnpack(), lowerVectorShuffleAsSpecificZeroOrAnyExtend(), lowerVectorShuffleToEXPAND(), lowerVectorShuffleWithPERMV(), LowerZERO_EXTEND_AVX512(), matchUnaryPermuteVectorShuffle(), matchUnaryVectorShuffle(), matchVectorShuffleAsShift(), memsetStore(), llvm::TargetLowering::ParseConstraints(), performExtendCombine(), ShrinkLoadReplaceStoreWithStore(), skipExtensionForVectorMULL(), SkipExtensionForVMULL(), llvm::SparcTargetLowering::SparcTargetLowering(), llvm::SystemZTargetLowering::SystemZTargetLowering(), tryBuildVectorReplicate(), and llvm::X86TargetLowering::X86TargetLowering().
|
inline |
getPow2VectorType - Widens the length of the given vector MVT up to the nearest power of 2 and returns that type.
Definition at line 298 of file MachineValueType.h.
References getVectorElementType(), getVectorNumElements(), getVectorVT(), isPow2VectorType(), and llvm::Log2_32_Ceil().
Referenced by llvm::TargetLoweringBase::computeRegisterProperties().
|
inline |
Definition at line 515 of file MachineValueType.h.
References getScalarType(), and getSizeInBits().
Referenced by combineX86ShuffleChain(), llvm::TargetLoweringBase::computeRegisterProperties(), createUnpackShuffleMask(), llvm::DecodeBLENDMask(), llvm::DecodeMOVDDUPMask(), llvm::DecodePALIGNRMask(), llvm::DecodeVPERMIL2PMask(), llvm::DecodeVPERMILPMask(), llvm::DecodeVPERMMask(), llvm::decodeVSHUF64x2FamilyMask(), llvm::DecodeZeroExtendMask(), getConstantVector(), getConstVector(), getFauxShuffleMask(), getPSHUFShuffleMask(), getScalarValueForVectorElement(), getTargetShuffleMask(), getTargetShuffleMaskIndices(), is128BitLaneCrossingShuffleMask(), isRepeatedShuffleMask(), isRepeatedTargetShuffleMask(), isVEXTRACTIndex(), isVINSERTIndex(), lower256BitVectorShuffle(), LowerBITREVERSE_XOP(), LowerCTTZ(), LowerEXTEND_VECTOR_INREG(), LowerExtendedLoad(), LowerFCOPYSIGN(), LowerMGATHER(), LowerMSCATTER(), LowerMSTORE(), LowerRotate(), lowerShuffleAsRepeatedMaskAndLanePermute(), LowerTruncateVecI1(), lowerV4X128VectorShuffle(), LowerVectorBroadcast(), LowerVectorCTLZ_AVX512(), LowerVectorCTLZInRegLUT(), lowerVectorShuffle(), lowerVectorShuffleAsBlend(), lowerVectorShuffleAsBroadcast(), lowerVectorShuffleAsPermuteAndUnpack(), lowerVectorShuffleAsShift(), lowerVectorShuffleAsSpecificZeroOrAnyExtend(), lowerVectorShuffleAsZeroOrAnyExtend(), lowerVectorShuffleByMerging128BitLanes(), lowerVectorShuffleWithPERMV(), lowerVectorShuffleWithPSHUFB(), lowerVectorShuffleWithSSE4A(), LowerVSETCC(), LowerZERO_EXTEND_AVX512(), matchBinaryVectorShuffle(), matchUnaryPermuteVectorShuffle(), matchUnaryVectorShuffle(), performShiftToAllZeros(), SupportedVectorShiftWithImm(), and SupportedVectorVarShift().
|
inline |
getScalarType - If this is a vector type, return the element type, otherwise return this.
Definition at line 309 of file MachineValueType.h.
References getVectorElementType(), and isVector().
Referenced by llvm::AMDGPUTargetLowering::analyzeFormalArgumentsCompute(), combineVectorSignBitsTruncation(), llvm::DecodeSubVectorBroadcast(), getFauxShuffleMask(), getScalarSizeInBits(), getTargetShuffleMask(), llvm::X86TargetLowering::isShuffleMaskLegal(), LowerExtended1BitVectorLoad(), LowerFCOPYSIGN(), LowerINTRINSIC_WO_CHAIN(), LowerMGATHER(), LowerMLOAD(), LowerMSCATTER(), LowerMSTORE(), LowerMUL_LOHI(), llvm::AMDGPUTargetLowering::LowerSIGN_EXTEND_INREG(), LowerTruncatingStore(), LowerVectorBroadcast(), lowerVectorShuffleAsBroadcast(), lowerVectorShuffleAsRotate(), matchVectorShuffleWithSHUFPD(), and tryCombineShiftImm().
|
inline |
Definition at line 429 of file MachineValueType.h.
References Any, f128, f16, f32, f64, f80, fAny, i1, i128, i16, i32, i64, i8, iAny, iPTR, iPTRAny, llvm_unreachable, Other, ppcf128, SimpleTy, token, v1024i1, v128i16, v128i8, v16f32, v16i1, v16i16, v16i32, v16i64, v16i8, v1f32, v1f64, v1i128, v1i16, v1i32, v1i64, v1i8, v256i8, v2f16, v2f32, v2f64, v2i1, v2i16, v2i32, v2i64, v2i8, v32i1, v32i16, v32i32, v32i64, v32i8, v4f16, v4f32, v4f64, v4i1, v4i16, v4i32, v4i64, v4i8, v512i1, v64i1, v64i16, v64i32, v64i8, v8f16, v8f32, v8f64, v8i1, v8i16, v8i32, v8i64, v8i8, vAny, and x86mmx.
Referenced by bitsGE(), bitsGT(), bitsLE(), bitsLT(), llvm::CC_ARM_AAPCS_Custom_Aggregate(), CC_MipsO32(), CC_Sparc64_Full(), CC_Sparc64_Half(), llvm::CC_X86_32_VectorCall(), llvm::CC_X86_64_VectorCall(), llvm::EVT::changeVectorElementTypeToInteger(), CombineBaseUpdate(), combineBitcastForMaskedOp(), combineLoopSADPattern(), combineStore(), combineVectorSignBitsTruncation(), combineVSZext(), combineX86ShuffleChain(), combineX86ShufflesConstants(), combineX86ShufflesRecursively(), llvm::TargetLoweringBase::computeRegisterProperties(), llvm::DecodeMOVDDUPMask(), llvm::DecodePALIGNRMask(), llvm::DecodePSHUFMask(), llvm::DecodePSLLDQMask(), llvm::DecodePSRLDQMask(), llvm::DecodeSHUFPMask(), llvm::DecodeSubVectorBroadcast(), llvm::DecodeUNPCKHMask(), llvm::DecodeUNPCKLMask(), llvm::DecodeVPERMIL2PMask(), llvm::DecodeVPERMILPMask(), llvm::decodeVSHUF64x2FamilyMask(), llvm::DecodeZeroExtendMask(), EltsFromConsecutiveLoads(), EmitKTEST(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::TargetLowering::expandUnalignedLoad(), llvm::TargetLowering::expandUnalignedStore(), llvm::FastISel::fastEmit_ri_(), foldMaskAndShiftToScale(), getCopyFromParts(), getCopyFromPartsVector(), llvm::RegsForValue::getCopyFromRegs(), getCopyToParts(), getCopyToPartsVector(), getExtractVEXTRACTImmediate(), getFauxShuffleMask(), getInsertVINSERTImmediate(), getMaskNode(), llvm::TargetLoweringBase::getNumRegisters(), getPromotedVectorElementType(), getPSHUFShuffleMask(), llvm::SITargetLowering::getRegForInlineAsmConstraint(), llvm::ARMTargetLowering::getRegForInlineAsmConstraint(), llvm::X86TargetLowering::getRegForInlineAsmConstraint(), GetRegistersForValue(), getRegOperandVectorVT(), getScalarSizeInBits(), getScalarValueForVectorElement(), llvm::X86TargetLowering::getSetCCResultType(), llvm::X86TTIImpl::getShuffleCost(), llvm::EVT::getSizeInBits(), getStoreSize(), getTargetShuffleMaskIndices(), getTargetVShiftByConstNode(), getTargetVShiftNode(), llvm::TargetLoweringBase::getVectorTypeBreakdown(), getVectorTypeBreakdownMVT(), getZeroVector(), llvm::CallLowering::handleAssignments(), llvm::HexagonTargetLowering::HexagonTargetLowering(), insert128BitVector(), insert1BitVector(), isHorizontalBinOp(), llvm::X86TargetLowering::isShuffleMaskLegal(), isSupportedType(), llvm::LLT::LLT(), LowerAsSplatVectorLoad(), LowerBITCAST(), LowerBITREVERSE_XOP(), llvm::TargetLowering::LowerCallTo(), LowerCONCAT_VECTORSvXi1(), LowerCTLZ(), LowerEXTEND_VECTOR_INREG(), LowerExtendedLoad(), llvm::HexagonTargetLowering::LowerEXTRACT_VECTOR(), LowerEXTRACT_VECTOR_ELT_SSE4(), LowerFABSorFNEG(), llvm::SparcTargetLowering::LowerFormalArguments_64(), LowerHorizontalByteSum(), LowerINSERT_SUBVECTOR(), LowerINTRINSIC_WO_CHAIN(), LowerMLOAD(), LowerMSTORE(), LowerMUL(), LowerSCALAR_TO_VECTOR(), LowerShift(), LowerShiftParts(), lowerShuffleAsRepeatedMaskAndLanePermute(), LowerSIGN_EXTEND_AVX512(), llvm::LanaiTargetLowering::LowerSRL_PARTS(), LowerTruncateVecI1(), LowerVectorBroadcast(), LowerVectorCTLZ_AVX512(), LowerVectorCTPOPBitmath(), LowerVectorCTPOPInRegLUT(), lowerVectorShuffle(), lowerVectorShuffleAsBitBlend(), lowerVectorShuffleAsBlend(), lowerVectorShuffleAsByteRotate(), lowerVectorShuffleAsElementInsertion(), lowerVectorShuffleAsSpecificZeroOrAnyExtend(), lowerVectorShuffleAsSplitOrBlend(), lowerVectorShuffleAsZeroOrAnyExtend(), lowerVectorShuffleByMerging128BitLanes(), lowerVectorShuffleWithPSHUFB(), LowerVSETCC(), lowerX86FPLogicOp(), matchBinaryPermuteVectorShuffle(), MatchingStackOffset(), matchUnaryPermuteVectorShuffle(), llvm::TargetLowering::ParseConstraints(), performBitcastCombine(), performFDivCombine(), performFpToIntCombine(), PerformSTORECombine(), PerformVCVTCombine(), PerformVDIVCombine(), splitAndLowerVectorShuffle(), tryCombineShiftImm(), and UnpackFromArgumentSlot().
|
inline |
getStoreSize - Return the number of bytes overwritten by a store of the specified value type.
Definition at line 521 of file MachineValueType.h.
References getSizeInBits().
Referenced by allocateKernArg(), combineStore(), llvm::SparcTargetLowering::emitEHSjLjLongJmp(), llvm::PPCTargetLowering::emitEHSjLjLongJmp(), llvm::SparcTargetLowering::emitEHSjLjSetJmp(), llvm::PPCTargetLowering::emitEHSjLjSetJmp(), llvm::BasicTTIImplBase< AMDGPUTTIImpl >::getInterleavedMemoryOpCost(), llvm::X86TTIImpl::getInterleavedMemoryOpCostAVX512(), llvm::X86TTIImpl::getShuffleCost(), getStoreSizeInBits(), llvm::SITargetLowering::LowerFormalArguments(), and llvm::SITargetLowering::LowerReturn().
|
inline |
getStoreSizeInBits - Return the number of bits overwritten by a store of the specified value type.
Definition at line 527 of file MachineValueType.h.
References getStoreSize().
Referenced by llvm::HexagonTargetLowering::LowerCall(), and llvm::HexagonTargetLowering::LowerFormalArguments().
|
inline |
Definition at line 313 of file MachineValueType.h.
References f16, f32, f64, i1, i128, i16, i32, i64, i8, llvm_unreachable, SimpleTy, v1024i1, v128i16, v128i8, v16f32, v16i1, v16i16, v16i32, v16i64, v16i8, v1f32, v1f64, v1i128, v1i16, v1i32, v1i64, v1i8, v256i8, v2f16, v2f32, v2f64, v2i1, v2i16, v2i32, v2i64, v2i8, v32i1, v32i16, v32i32, v32i64, v32i8, v4f16, v4f32, v4f64, v4i1, v4i16, v4i32, v4i64, v4i8, v512i1, v64i1, v64i16, v64i32, v64i8, v8f16, v8f32, v8f64, v8i1, v8i16, v8i32, v8i64, and v8i8.
Referenced by llvm::EVT::changeVectorElementTypeToInteger(), ChangeVSETULTtoVSETULE(), combineBitcastForMaskedOp(), combineRedundantDWordShuffle(), combineTargetShuffle(), combineVSZext(), llvm::TargetLoweringBase::computeRegisterProperties(), EmitKTEST(), ExtendToType(), getConstVector(), getCopyToPartsVector(), getExtractVEXTRACTImmediate(), getInsertVINSERTImmediate(), getPow2VectorType(), getScalarType(), getScalarValueForVectorElement(), llvm::X86TargetLowering::getSetCCResultType(), llvm::X86TTIImpl::getShuffleCost(), getShuffleScalarElt(), getTargetVShiftByConstNode(), getTargetVShiftNode(), getUnderlyingExtractedFromVec(), llvm::EVT::getVectorElementType(), getVectorTypeBreakdownMVT(), getZeroVector(), llvm::HexagonTargetLowering::HexagonTargetLowering(), llvm::LLT::LLT(), Lower256IntArith(), Lower256IntVSETCC(), Lower512IntArith(), LowerAVXCONCAT_VECTORS(), LowerAVXExtend(), LowerBITCAST(), LowerBITREVERSE_XOP(), LowerBoolVSETCC_AVX512(), LowerCONCAT_VECTORS(), LowerCONCAT_VECTORSvXi1(), LowerEXTEND_VECTOR_INREG(), LowerFABSorFNEG(), llvm::SITargetLowering::LowerFormalArguments(), LowerHorizontalByteSum(), LowerINSERT_SUBVECTOR(), LowerIntVSETCC_AVX512(), llvm::SITargetLowering::LowerReturn(), LowerSCALAR_TO_VECTOR(), LowerScalarVariableShift(), LowerShift(), LowerSIGN_EXTEND(), LowerSIGN_EXTEND_AVX512(), LowerTruncateVecI1(), lowerV2X128VectorShuffle(), lowerV4X128VectorShuffle(), lowerV8I16GeneralSingleInputVectorShuffle(), LowerVectorCTLZ_AVX512(), LowerVectorCTPOPBitmath(), LowerVectorCTPOPInRegLUT(), lowerVectorShuffle(), lowerVectorShuffleAsBitBlend(), lowerVectorShuffleAsBitMask(), lowerVectorShuffleAsElementInsertion(), lowerVectorShuffleAsTruncBroadcast(), lowerVectorShuffleWithUndefHalf(), LowerVSETCC(), LowerZERO_EXTEND(), LowerZERO_EXTEND_AVX512(), performConcatVectorsCombine(), performFDivCombine(), performFpToIntCombine(), PerformVCVTCombine(), PerformVDIVCombine(), splitAndLowerVectorShuffle(), and tryExtendDUPToExtractHigh().
|
inline |
Definition at line 371 of file MachineValueType.h.
References llvm_unreachable, SimpleTy, v1024i1, v128i16, v128i8, v16f32, v16i1, v16i16, v16i32, v16i64, v16i8, v1f32, v1f64, v1i128, v1i16, v1i32, v1i64, v1i8, v256i8, v2f16, v2f32, v2f64, v2i1, v2i16, v2i32, v2i64, v2i8, v32i1, v32i16, v32i32, v32i64, v32i8, v4f16, v4f32, v4f64, v4i1, v4i16, v4i32, v4i64, v4i8, v512i1, v64i1, v64i16, v64i32, v64i8, v8f16, v8f32, v8f64, v8i1, v8i16, v8i32, v8i64, and v8i8.
Referenced by llvm::AMDGPUTargetLowering::analyzeFormalArgumentsCompute(), ChangeVSETULTtoVSETULE(), combineBasicSADPattern(), combineTargetShuffle(), combineVSZext(), combineX86ShuffleChain(), llvm::TargetLoweringBase::computeRegisterProperties(), createUnpackShuffleMask(), llvm::DecodeBLENDMask(), llvm::DecodeInsertElementMask(), llvm::DecodeMOVDDUPMask(), llvm::DecodeMOVSHDUPMask(), llvm::DecodeMOVSLDUPMask(), llvm::DecodePALIGNRMask(), llvm::DecodePSHUFHWMask(), llvm::DecodePSHUFLWMask(), llvm::DecodePSHUFMask(), llvm::DecodePSWAPMask(), llvm::DecodeScalarMoveMask(), llvm::DecodeSHUFPMask(), llvm::DecodeSubVectorBroadcast(), llvm::DecodeUNPCKHMask(), llvm::DecodeUNPCKLMask(), llvm::DecodeVALIGNMask(), llvm::DecodeVectorBroadcast(), llvm::DecodeVPERM2X128Mask(), llvm::DecodeVPERMIL2PMask(), llvm::DecodeVPERMILPMask(), llvm::DecodeVPERMMask(), llvm::DecodeZeroExtendMask(), llvm::DecodeZeroMoveLowMask(), ExpandHorizontalBinOp(), ExtendToType(), getConstVector(), getCopyToPartsVector(), getFauxShuffleMask(), getGatherNode(), llvm::X86TTIImpl::getInterleavedMemoryOpCostAVX512(), llvm::X86TTIImpl::getMaskedMemoryOpCost(), getMOVL(), getPow2VectorType(), getPrefetchNode(), getScatterNode(), llvm::X86TargetLowering::getSetCCResultType(), llvm::X86TTIImpl::getShuffleCost(), getShuffleScalarElt(), getShuffleVectorZeroOrUndef(), getTargetShuffleMask(), getTargetShuffleMaskIndices(), llvm::X86TargetLowering::getTgtMemIntrinsic(), getUnderlyingExtractedFromVec(), getVectorMaskingNode(), llvm::EVT::getVectorNumElements(), getVectorTypeBreakdownMVT(), getZeroVector(), insert1BitVector(), isAddSub(), isHorizontalBinOp(), isPow2VectorType(), llvm::LLT::LLT(), lower1BitVectorShuffle(), lower256BitVectorShuffle(), Lower256IntArith(), Lower256IntVSETCC(), Lower512IntArith(), LowerAsSplatVectorLoad(), LowerAVXCONCAT_VECTORS(), LowerAVXExtend(), LowerBITCAST(), LowerBITREVERSE_XOP(), lowerBuildVectorToBitOp(), LowerCONCAT_VECTORSvXi1(), LowerEXTEND_VECTOR_INREG(), LowerExtended1BitVectorLoad(), LowerExtendedLoad(), llvm::SITargetLowering::LowerFormalArguments(), LowerINSERT_SUBVECTOR(), LowerINTRINSIC_W_CHAIN(), LowerINTRINSIC_WO_CHAIN(), LowerMGATHER(), LowerMSCATTER(), LowerMSTORE(), LowerMUL(), LowerMUL_LOHI(), LowerMULH(), LowerSCALAR_TO_VECTOR(), LowerScalarImmediateShift(), LowerScalarVariableShift(), lowerShuffleAsRepeatedMaskAndLanePermute(), LowerSIGN_EXTEND(), LowerSIGN_EXTEND_AVX512(), llvm::AMDGPUTargetLowering::LowerSIGN_EXTEND_INREG(), LowerToHorizontalOp(), LowerTruncateVecI1(), LowerTruncatingStore(), lowerV2X128VectorShuffle(), lowerV8I16GeneralSingleInputVectorShuffle(), LowerVectorBroadcast(), LowerVectorCTLZ(), LowerVectorCTLZ_AVX512(), LowerVectorCTLZInRegLUT(), LowerVectorCTPOP(), lowerVectorShuffle(), lowerVectorShuffleAsBlend(), lowerVectorShuffleAsBroadcast(), lowerVectorShuffleAsElementInsertion(), lowerVectorShuffleAsShift(), lowerVectorShuffleAsSpecificZeroOrAnyExtend(), lowerVectorShuffleAsZeroOrAnyExtend(), lowerVectorShuffleToEXPAND(), lowerVectorShuffleWithPERMV(), lowerVectorShuffleWithSSE4A(), lowerVectorShuffleWithUndefHalf(), lowerVSELECTtoVectorShuffle(), LowerVSETCC(), LowerZERO_EXTEND(), LowerZERO_EXTEND_AVX512(), matchBinaryPermuteVectorShuffle(), matchVectorShuffleWithSHUFPD(), performConcatVectorsCombine(), reduceVMULWidth(), setTargetShuffleZeroElements(), splitAndLowerVectorShuffle(), and tryExtendDUPToExtractHigh().
Definition at line 588 of file MachineValueType.h.
References f16, f32, f64, i1, i128, i16, i32, i64, i8, INVALID_SIMPLE_VALUE_TYPE, SimpleTy, v1024i1, v128i16, v128i8, v16f32, v16i1, v16i16, v16i32, v16i64, v16i8, v1f32, v1f64, v1i128, v1i16, v1i32, v1i64, v1i8, v256i8, v2f16, v2f32, v2f64, v2i1, v2i16, v2i32, v2i64, v2i8, v32i1, v32i16, v32i32, v32i64, v32i8, v4f16, v4f32, v4f64, v4i1, v4i16, v4i32, v4i64, v4i8, v512i1, v64i1, v64i16, v64i32, v64i8, v8f16, v8f32, v8f64, v8i1, v8i16, v8i32, v8i64, and v8i8.
Referenced by AddCombineBUILD_VECTORToVPADDL(), llvm::EVT::changeVectorElementTypeToInteger(), CombineBaseUpdate(), combineBasicSADPattern(), combineBitcastForMaskedOp(), combineLoopSADPattern(), combineTargetShuffle(), combineVSZext(), combineX86ShuffleChain(), combineX86ShufflesConstants(), createPSADBW(), EltsFromConsecutiveLoads(), getConstVector(), getGatherNode(), getMaskNode(), getOnesVector(), getPermuteNode(), getPow2VectorType(), getPrefetchNode(), getPromotedVectorElementType(), getRegOperandVectorVT(), getScatterNode(), llvm::X86TargetLowering::getSetCCResultType(), getTargetVShiftNode(), llvm::X86TargetLowering::getTgtMemIntrinsic(), getVectorMaskingNode(), getVectorTypeBreakdownMVT(), llvm::EVT::getVectorVT(), getVT(), getZeroVector(), llvm::HexagonTargetLowering::HexagonTargetLowering(), lower256BitVectorShuffle(), Lower256IntArith(), Lower256IntVSETCC(), Lower512IntArith(), LowerAVXCONCAT_VECTORS(), LowerAVXExtend(), LowerBITREVERSE(), LowerBITREVERSE_XOP(), LowerCONCAT_VECTORSvXi1(), LowerEXTEND_VECTOR_INREG(), LowerExtended1BitVectorLoad(), LowerHorizontalByteSum(), LowerINTRINSIC_W_CHAIN(), LowerINTRINSIC_WO_CHAIN(), LowerMGATHER(), LowerMLOAD(), LowerMSCATTER(), LowerMSTORE(), LowerMUL(), LowerMUL_LOHI(), LowerSCALAR_TO_VECTOR(), LowerScalarImmediateShift(), LowerSIGN_EXTEND(), LowerSIGN_EXTEND_AVX512(), LowerTruncateVecI1(), LowerTruncatingStore(), lowerV2X128VectorShuffle(), lowerV4X128VectorShuffle(), lowerV8I16GeneralSingleInputVectorShuffle(), LowerVectorBroadcast(), LowerVectorCTLZ_AVX512(), LowerVectorCTLZInRegLUT(), LowerVectorCTPOPBitmath(), LowerVectorCTPOPInRegLUT(), LowerVectorFP_TO_INT(), LowerVectorINT_TO_FP(), lowerVectorShuffle(), lowerVectorShuffleAsBitBlend(), lowerVectorShuffleAsBlend(), lowerVectorShuffleAsBroadcast(), lowerVectorShuffleAsByteRotate(), lowerVectorShuffleAsPermuteAndUnpack(), lowerVectorShuffleAsSpecificZeroOrAnyExtend(), lowerVectorShuffleByMerging128BitLanes(), lowerVectorShuffleToEXPAND(), lowerVectorShuffleWithPERMV(), lowerVectorShuffleWithPSHUFB(), lowerVectorShuffleWithUndefHalf(), lowerX86FPLogicOp(), LowerZERO_EXTEND_AVX512(), matchBinaryPermuteVectorShuffle(), matchUnaryPermuteVectorShuffle(), matchUnaryVectorShuffle(), matchVectorShuffleAsShift(), llvm::MipsTargetLowering::MipsTargetLowering(), NarrowVector(), performConcatVectorsCombine(), performExtendCombine(), reduceVMULWidth(), skipExtensionForVectorMULL(), SkipExtensionForVMULL(), splitAndLowerVectorShuffle(), tryBuildVectorReplicate(), tryExtendDUPToExtractHigh(), WidenVector(), and llvm::X86TargetLowering::X86TargetLowering().
Return the value type corresponding to the specified type.
This returns all pointers as iPTR. If HandleUnknown is true, unknown types are returned as Other, otherwise they are invalid.
This returns all pointers as MVT::iPTR. If HandleUnknown is true, unknown types are returned as Other, otherwise they are invalid.
Definition at line 281 of file ValueTypes.cpp.
References llvm::Type::DoubleTyID, f128, f16, f32, f64, f80, llvm::Type::FloatTyID, llvm::Type::FP128TyID, getBitWidth(), llvm::SequentialType::getElementType(), getIntegerVT(), llvm::SequentialType::getNumElements(), llvm::Type::getTypeID(), getVectorVT(), llvm::Type::HalfTyID, llvm::Type::IntegerTyID, iPTR, isVoid, llvm_unreachable, MVT(), Other, llvm::Type::PointerTyID, llvm::Type::PPC_FP128TyID, ppcf128, llvm::Type::VectorTyID, llvm::Type::VoidTyID, llvm::Type::X86_FP80TyID, llvm::Type::X86_MMXTyID, and x86mmx.
Referenced by llvm::EVT::getEVT(), llvm::SITargetLowering::getTgtMemIntrinsic(), llvm::AArch64TargetLowering::getTgtMemIntrinsic(), llvm::ARMTargetLowering::getTgtMemIntrinsic(), llvm::X86TargetLowering::getTgtMemIntrinsic(), llvm::CallLowering::handleAssignments(), and llvm::TargetLowering::ParseConstraints().
|
inlinestatic |
Definition at line 693 of file MachineValueType.h.
References FIRST_INTEGER_VALUETYPE, and LAST_INTEGER_VALUETYPE.
Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering(), llvm::AMDGPUTargetLowering::AMDGPUTargetLowering(), llvm::ARMTargetLowering::ARMTargetLowering(), llvm::AVRTargetLowering::AVRTargetLowering(), llvm::BPFTargetLowering::BPFTargetLowering(), combineShiftRightAlgebraic(), combineStore(), llvm::HexagonTargetLowering::HexagonTargetLowering(), llvm::LanaiTargetLowering::LanaiTargetLowering(), LowerExtendedLoad(), llvm::MipsTargetLowering::MipsTargetLowering(), llvm::MSP430TargetLowering::MSP430TargetLowering(), llvm::NVPTXTargetLowering::NVPTXTargetLowering(), PerformSTORECombine(), llvm::PPCTargetLowering::PPCTargetLowering(), llvm::R600TargetLowering::R600TargetLowering(), llvm::SparcTargetLowering::SparcTargetLowering(), llvm::SystemZTargetLowering::SystemZTargetLowering(), llvm::WebAssemblyTargetLowering::WebAssemblyTargetLowering(), llvm::X86TargetLowering::X86TargetLowering(), and llvm::XCoreTargetLowering::XCoreTargetLowering().
|
inlinestatic |
Definition at line 705 of file MachineValueType.h.
References FIRST_INTEGER_VECTOR_VALUETYPE, and LAST_INTEGER_VECTOR_VALUETYPE.
Referenced by llvm::AMDGPUTargetLowering::AMDGPUTargetLowering(), llvm::ARMTargetLowering::ARMTargetLowering(), llvm::SparcTargetLowering::SparcTargetLowering(), llvm::SystemZTargetLowering::SystemZTargetLowering(), and llvm::X86TargetLowering::X86TargetLowering().
|
inline |
is1024BitVector - Return true if this is a 1024-bit vector type.
Definition at line 271 of file MachineValueType.h.
References SimpleTy, v1024i1, v128i8, v16i64, v32i32, and v64i16.
Referenced by llvm::EVT::is1024BitVector().
|
inline |
is128BitVector - Return true if this is a 128-bit vector type.
Definition at line 248 of file MachineValueType.h.
References SimpleTy, v16i8, v1i128, v2f64, v2i64, v4f32, v4i32, v8f16, and v8i16.
Referenced by combineBitcastForMaskedOp(), combineTargetShuffle(), combineVectorSignBitsTruncation(), combineX86ShuffleChain(), getZeroVector(), llvm::EVT::is128BitVector(), isHorizontalBinOp(), LowerBITREVERSE_XOP(), LowerBuildVectorv4x32(), LowerEXTEND_VECTOR_INREG(), LowerEXTRACT_SUBVECTOR(), LowerEXTRACT_VECTOR_ELT_SSE4(), LowerINSERT_SUBVECTOR(), LowerRotate(), LowerSCALAR_TO_VECTOR(), LowerTruncateVecI1(), LowerVectorBroadcast(), LowerVectorCTLZ_AVX512(), LowerVectorCTPOP(), LowerVectorCTPOPBitmath(), lowerVectorShuffle(), lowerVectorShuffleAsBlend(), lowerVectorShuffleAsBroadcast(), lowerVectorShuffleAsByteRotate(), lowerVectorShuffleAsPermuteAndUnpack(), lowerVectorShuffleAsRotate(), lowerVectorShuffleAsSpecificZeroOrAnyExtend(), lowerVectorShuffleWithPSHUFB(), LowerVSETCC(), LowerZERO_EXTEND(), matchBinaryPermuteVectorShuffle(), matchBinaryVectorShuffle(), matchUnaryPermuteVectorShuffle(), matchUnaryVectorShuffle(), matchVectorShuffleAsInsertPS(), performAddSubLongCombine(), SupportedVectorShiftWithImm(), and SupportedVectorVarShift().
|
inline |
is16BitVector - Return true if this is a 16-bit vector type.
Definition at line 227 of file MachineValueType.h.
References SimpleTy, v16i1, v1i16, and v2i8.
Referenced by llvm::EVT::is16BitVector().
|
inline |
is2048BitVector - Return true if this is a 1024-bit vector type.
Definition at line 278 of file MachineValueType.h.
References SimpleTy, v128i16, v256i8, v32i64, and v64i32.
Referenced by llvm::EVT::is2048BitVector().
|
inline |
is256BitVector - Return true if this is a 256-bit vector type.
Definition at line 256 of file MachineValueType.h.
References SimpleTy, v16i16, v32i8, v4f64, v4i64, v8f32, and v8i32.
Referenced by llvm::CC_X86_VectorCallGetSSEs(), combineVectorSignBitsTruncation(), combineX86ShuffleChain(), llvm::DecodeVPERMMask(), ExpandHorizontalBinOp(), getZeroVector(), llvm::EVT::is256BitVector(), isHorizontalBinOp(), Lower256IntArith(), Lower256IntVSETCC(), LowerADD(), LowerAVXCONCAT_VECTORS(), LowerBITREVERSE_XOP(), LowerCONCAT_VECTORS(), LowerEXTEND_VECTOR_INREG(), LowerEXTRACT_SUBVECTOR(), LowerINSERT_SUBVECTOR(), LowerINTRINSIC_WO_CHAIN(), LowerMINMAX(), LowerMUL(), LowerMUL_LOHI(), LowerMULH(), LowerRotate(), lowerShuffleAsRepeatedMaskAndLanePermute(), LowerSUB(), LowerTruncateVecI1(), LowerVectorBroadcast(), LowerVectorCTLZ(), LowerVectorCTLZ_AVX512(), LowerVectorCTPOP(), lowerVectorShuffle(), lowerVectorShuffleAsBroadcast(), lowerVectorShuffleAsLanePermuteAndBlend(), lowerVectorShuffleAsRotate(), lowerVectorShuffleWithPSHUFB(), lowerVectorShuffleWithUndefHalf(), LowerVSETCC(), LowerZERO_EXTEND(), matchBinaryPermuteVectorShuffle(), matchBinaryVectorShuffle(), matchUnaryPermuteVectorShuffle(), matchUnaryVectorShuffle(), SupportedVectorShiftWithImm(), and SupportedVectorVarShift().
|
inline |
is32BitVector - Return true if this is a 32-bit vector type.
Definition at line 233 of file MachineValueType.h.
References SimpleTy, v1f32, v1i32, v2f16, v2i16, and v4i8.
Referenced by llvm::EVT::is32BitVector().
|
inline |
is512BitVector - Return true if this is a 512-bit vector type.
Definition at line 263 of file MachineValueType.h.
References SimpleTy, v16f32, v16i32, v32i16, v512i1, v64i8, v8f64, and v8i64.
Referenced by llvm::CC_X86_VectorCallGetSSEs(), combineX86ShuffleChain(), llvm::DecodeVPERMMask(), llvm::X86TargetLowering::getSetCCResultType(), getZeroVector(), llvm::EVT::is512BitVector(), Lower512IntArith(), LowerAVXCONCAT_VECTORS(), LowerAVXExtend(), LowerCONCAT_VECTORS(), LowerEXTEND_VECTOR_INREG(), LowerEXTRACT_SUBVECTOR(), LowerINSERT_SUBVECTOR(), LowerMGATHER(), LowerMSCATTER(), LowerMSTORE(), LowerScalarImmediateShift(), LowerSIGN_EXTEND(), LowerSIGN_EXTEND_AVX512(), lowerToAddSubOrFMAddSub(), lowerV4X128VectorShuffle(), LowerVectorBroadcast(), LowerVectorCTLZ_AVX512(), LowerVectorCTPOP(), lowerVectorShuffle(), lowerVectorShuffleAsBroadcast(), lowerVectorShuffleAsByteRotate(), lowerVectorShuffleWithPSHUFB(), LowerVSETCC(), LowerZERO_EXTEND(), LowerZERO_EXTEND_AVX512(), matchBinaryVectorShuffle(), matchUnaryPermuteVectorShuffle(), matchUnaryVectorShuffle(), SupportedVectorShiftWithImm(), and SupportedVectorVarShift().
|
inline |
is64BitVector - Return true if this is a 64-bit vector type.
Definition at line 240 of file MachineValueType.h.
References SimpleTy, v1f64, v1i64, v2f32, v2i32, v4f16, v4i16, and v8i8.
Referenced by llvm::EVT::is64BitVector(), and tryExtendDUPToExtractHigh().
|
inline |
isFloatingPoint - Return true if this is a FP, or a vector FP type.
Definition at line 198 of file MachineValueType.h.
References FIRST_FP_VALUETYPE, FIRST_FP_VECTOR_VALUETYPE, LAST_FP_VALUETYPE, LAST_FP_VECTOR_VALUETYPE, and SimpleTy.
Referenced by llvm::AMDGPUTargetLowering::analyzeFormalArgumentsCompute(), CC_MipsO32(), llvm::CC_X86_32_VectorCall(), llvm::CC_X86_64_VectorCall(), combineTargetShuffle(), combineX86ShuffleChain(), combineX86ShufflesConstants(), EltsFromConsecutiveLoads(), getConstantVector(), getCopyFromParts(), getCopyToParts(), llvm::TargetLoweringBase::getTypeToPromoteTo(), getVCmpInst(), insert128BitVector(), llvm::EVT::isFloatingPoint(), lowerVectorShuffle(), lowerVectorShuffleAsBitMask(), lowerVectorShuffleAsBroadcast(), lowerVectorShuffleAsElementInsertion(), lowerVectorShuffleAsPermuteAndUnpack(), lowerVectorShuffleByMerging128BitLanes(), and LowerVSETCC().
|
inline |
isInteger - Return true if this is an integer, or a vector integer type.
Definition at line 206 of file MachineValueType.h.
References FIRST_INTEGER_VALUETYPE, FIRST_INTEGER_VECTOR_VALUETYPE, LAST_INTEGER_VALUETYPE, LAST_INTEGER_VECTOR_VALUETYPE, and SimpleTy.
Referenced by llvm::AMDGPUTargetLowering::analyzeFormalArgumentsCompute(), combineBitcastForMaskedOp(), FindOptimalMemOpLowering(), getCopyFromParts(), llvm::RegsForValue::getCopyFromRegs(), getCopyToParts(), GetRegistersForValue(), getShuffleScalarElt(), llvm::TargetLoweringBase::getTypeToPromoteTo(), llvm::EVT::isInteger(), isValueTypeInRegForCC(), lower256BitVectorShuffle(), Lower256IntArith(), Lower512IntArith(), LowerADD(), LowerExtendedLoad(), LowerMINMAX(), LowerSETCCE(), LowerSUB(), lowerVectorShuffleAsBitBlend(), lowerVectorShuffleAsBroadcast(), lowerVectorShuffleAsTruncBroadcast(), and llvm::TargetLowering::ParseConstraints().
|
inline |
|
inline |
isPow2VectorType - Returns true if the given vector is a power of 2.
Definition at line 291 of file MachineValueType.h.
References getVectorNumElements().
Referenced by getPow2VectorType().
|
inline |
isScalarInteger - Return true if this is an integer, not including vectors.
Definition at line 215 of file MachineValueType.h.
References FIRST_INTEGER_VALUETYPE, LAST_INTEGER_VALUETYPE, and SimpleTy.
Referenced by llvm::EVT::isScalarInteger().
|
inline |
isValid - Return true if this is a valid simple valuetype.
Definition at line 192 of file MachineValueType.h.
References FIRST_VALUETYPE, LAST_VALUETYPE, and SimpleTy.
Referenced by llvm::TargetLoweringBase::getIndexedLoadAction(), llvm::TargetLoweringBase::getIndexedStoreAction(), llvm::LLT::LLT(), llvm::MipsTargetLowering::MipsTargetLowering(), llvm::TargetLoweringBase::setCondCodeAction(), llvm::TargetLoweringBase::setIndexedLoadAction(), llvm::TargetLoweringBase::setIndexedStoreAction(), llvm::TargetLoweringBase::setLoadExtAction(), and llvm::TargetLoweringBase::setTruncStoreAction().
|
inline |
isVector - Return true if this is a vector value type.
Definition at line 221 of file MachineValueType.h.
References FIRST_VECTOR_VALUETYPE, LAST_VECTOR_VALUETYPE, and SimpleTy.
Referenced by llvm::PPCTargetLowering::allowsMisalignedMemoryAccesses(), llvm::AMDGPUTargetLowering::analyzeFormalArgumentsCompute(), llvm::CC_X86_32_VectorCall(), llvm::CC_X86_64_VectorCall(), combineX86ShufflesRecursively(), convertLocVTToValVT(), convertValVTToLocVT(), EmitKTEST(), llvm::CallLowering::ValueHandler::extendRegister(), getCopyFromParts(), llvm::RegsForValue::getCopyFromRegs(), getCopyToPartsVector(), getScalarType(), getScalarValueForVectorElement(), getTargetShuffleMaskIndices(), isValueTypeInRegForCC(), llvm::EVT::isVector(), llvm::LLT::LLT(), LowerBITCAST(), LowerBITREVERSE_XOP(), LowerCTLZ(), LowerCTPOP(), LowerCTTZ(), LowerExtendedLoad(), LowerFABSorFNEG(), LowerFCOPYSIGN(), llvm::SITargetLowering::LowerFormalArguments(), llvm::SITargetLowering::LowerReturn(), LowerRotate(), LowerShift(), llvm::AMDGPUTargetLowering::LowerSIGN_EXTEND_INREG(), lowerVectorShuffleAsBroadcast(), lowerX86FPLogicOp(), performConcatVectorsCombine(), and VerifyVectorType().
Definition at line 187 of file MachineValueType.h.
References SimpleTy.
Definition at line 185 of file MachineValueType.h.
References SimpleTy.
Definition at line 189 of file MachineValueType.h.
References SimpleTy.
Definition at line 186 of file MachineValueType.h.
References SimpleTy.
Definition at line 184 of file MachineValueType.h.
References SimpleTy.
Definition at line 188 of file MachineValueType.h.
References SimpleTy.
|
inlinestatic |
Definition at line 701 of file MachineValueType.h.
References FIRST_VECTOR_VALUETYPE, and LAST_VECTOR_VALUETYPE.
Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering(), llvm::ARMTargetLowering::ARMTargetLowering(), llvm::HexagonTargetLowering::HexagonTargetLowering(), llvm::MipsSETargetLowering::MipsSETargetLowering(), llvm::NVPTXTargetLowering::NVPTXTargetLowering(), llvm::PPCTargetLowering::PPCTargetLowering(), llvm::SystemZTargetLowering::SystemZTargetLowering(), and llvm::X86TargetLowering::X86TargetLowering().
| SimpleValueType llvm::MVT::SimpleTy |
Definition at line 179 of file MachineValueType.h.
Referenced by AddCombineBUILD_VECTORToVPADDL(), llvm::TargetLoweringBase::AddPromotedToType(), llvm::TargetLoweringBase::addRegisterClass(), llvm::MipsSETargetLowering::allowsMisalignedMemoryAccesses(), llvm::HexagonTargetLowering::allowsMisalignedMemoryAccesses(), llvm::ARMTargetLowering::allowsMisalignedMemoryAccesses(), llvm::CC_ARM_AAPCS_Custom_Aggregate(), llvm::EVT::changeVectorElementTypeToInteger(), llvm::SelectionDAG::EVTToAPFloatSemantics(), FindOptimalMemOpLowering(), llvm::HexagonTargetLowering::findRepresentativeClass(), llvm::ARMTargetLowering::findRepresentativeClass(), llvm::X86TargetLowering::findRepresentativeClass(), llvm::TargetLoweringBase::findRepresentativeClass(), foldVectorXorShiftIntoCmp(), llvm::R600RegisterInfo::getCFGStructurizerRegClass(), llvm::TargetLoweringBase::getCondCodeAction(), llvm::EVT::getEVTString(), getExtensionTo64Bits(), getImplicitScaleFactor(), llvm::TargetLoweringBase::getIndexedLoadAction(), llvm::TargetLoweringBase::getIndexedStoreAction(), llvm::EVT::getIntegerVT(), llvm::TargetLoweringBase::getLoadExtAction(), llvm::TargetLoweringBase::getNumRegisters(), llvm::TargetLoweringBase::getOperationAction(), llvm::EVT::getRawBits(), llvm::TargetLoweringBase::getRegClassFor(), llvm::HexagonTargetLowering::getRegForInlineAsmConstraint(), llvm::X86TargetLowering::getRegForInlineAsmConstraint(), llvm::TargetLoweringBase::getRegisterType(), llvm::TargetLoweringBase::getRepRegClassCostFor(), llvm::TargetLoweringBase::getRepRegClassFor(), llvm::TargetLoweringBase::getSetCCResultType(), getSizeInBits(), llvm::TargetLoweringBase::getTruncStoreAction(), llvm::TargetLoweringBase::ValueTypeActionImpl::getTypeAction(), llvm::EVT::getTypeForEVT(), llvm::TargetLoweringBase::getTypeToPromoteTo(), llvm::SelectionDAG::getValueType(), getVectorElementType(), getVectorNumElements(), llvm::EVT::getVectorVT(), getVectorVT(), is1024BitVector(), is128BitVector(), is16BitVector(), is2048BitVector(), is256BitVector(), is32Bit(), is32BitVector(), is512BitVector(), is64BitVector(), isDivRemLibcallAvailable(), isFloatingPoint(), llvm::SITargetLowering::isFMAFasterThanFMulAndFAdd(), llvm::AArch64TargetLowering::isFMAFasterThanFMulAndFAdd(), llvm::SystemZTargetLowering::isFMAFasterThanFMulAndFAdd(), llvm::PPCTargetLowering::isFMAFasterThanFMulAndFAdd(), llvm::X86TargetLowering::isFMAFasterThanFMulAndFAdd(), llvm::PPCTargetLowering::isFPImmLegal(), isHvxVectorType(), isInteger(), isLegalAddressImmediate(), llvm::ARMTargetLowering::isLegalAddressingMode(), isLegalT1AddressImmediate(), isLegalT2AddressImmediate(), llvm::ARMTargetLowering::isLegalT2ScaledAddressingMode(), isOverloaded(), IsPTXVectorType(), isScalarInteger(), llvm::EVT::isSimple(), isSinCosLibcallAvailable(), llvm::TargetLoweringBase::isTypeLegal(), isValid(), isValidIndexedLoad(), isVector(), llvm::XCoreTargetLowering::isZExtFree(), llvm::ARMTargetLowering::isZExtFree(), llvm::X86TargetLowering::isZExtFree(), lower128BitVectorShuffle(), lower1BitVectorShuffle(), lower256BitVectorShuffle(), lower512BitVectorShuffle(), LowerCMP_SWAP(), llvm::SystemZTargetLowering::LowerFormalArguments(), lowerRegToMasks(), lowerVectorShuffleAsBlend(), llvm::EVT::operator!=(), operator!=(), llvm::EVT::compareRawBits::operator()(), operator<(), operator<=(), operator==(), operator>(), operator>=(), ReplaceINTRINSIC_W_CHAIN(), ReplaceLoadVector(), llvm::AVRDAGToDAGISel::selectIndexedLoad(), llvm::AVRDAGToDAGISel::selectIndexedProgMemLoad(), llvm::TargetLoweringBase::setCondCodeAction(), llvm::TargetLoweringBase::setIndexedLoadAction(), llvm::TargetLoweringBase::setIndexedStoreAction(), llvm::TargetLoweringBase::setLoadExtAction(), llvm::TargetLoweringBase::setOperationAction(), llvm::TargetLoweringBase::setTruncStoreAction(), llvm::TargetLoweringBase::ValueTypeActionImpl::setTypeAction(), llvm::X86InstrInfo::shouldScheduleLoadsNear(), llvm::WebAssembly::toValType(), llvm::WebAssembly::TypeToString(), X86ChooseCmpImmediateOpcode(), and X86ChooseCmpOpcode().
1.8.6