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LLVM
4.0.0
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#include "AArch64.h"#include "AArch64InstrInfo.h"#include "AArch64MachineFunctionInfo.h"#include "AArch64Subtarget.h"#include "MCTargetDesc/AArch64AddressingModes.h"#include "llvm/ADT/BitVector.h"#include "llvm/ADT/DenseMap.h"#include "llvm/ADT/MapVector.h"#include "llvm/ADT/SetVector.h"#include "llvm/ADT/SmallVector.h"#include "llvm/ADT/Statistic.h"#include "llvm/CodeGen/MachineBasicBlock.h"#include "llvm/CodeGen/MachineFunctionPass.h"#include "llvm/CodeGen/MachineInstr.h"#include "llvm/CodeGen/MachineInstrBuilder.h"#include "llvm/Support/Debug.h"#include "llvm/Support/ErrorHandling.h"#include "llvm/Support/raw_ostream.h"#include "llvm/Target/TargetMachine.h"#include "llvm/Target/TargetRegisterInfo.h"Go to the source code of this file.
Classes | |
| struct | LOHInfo |
| State tracked per register. More... | |
Macros | |
| #define | DEBUG_TYPE "aarch64-collect-loh" |
| #define | AARCH64_COLLECT_LOH_NAME "AArch64 Collect Linker Optimization Hint (LOH)" |
Functions | |
| STATISTIC (NumADRPSimpleCandidate,"Number of simplifiable ADRP dominate by another") | |
| STATISTIC (NumADDToSTR,"Number of simplifiable STR reachable by ADD") | |
| STATISTIC (NumLDRToSTR,"Number of simplifiable STR reachable by LDR") | |
| STATISTIC (NumADDToLDR,"Number of simplifiable LDR reachable by ADD") | |
| STATISTIC (NumLDRToLDR,"Number of simplifiable LDR reachable by LDR") | |
| STATISTIC (NumADRPToLDR,"Number of simplifiable LDR reachable by ADRP") | |
| STATISTIC (NumADRSimpleCandidate,"Number of simplifiable ADRP + ADD") | |
| INITIALIZE_PASS (AArch64CollectLOH,"aarch64-collect-loh", AARCH64_COLLECT_LOH_NAME, false, false) static bool canAddBePartOfLOH(const MachineInstr &MI) | |
| static bool | canDefBePartOfLOH (const MachineInstr &MI) |
| Answer the following question: Can Def be one of the definition involved in a part of a LOH? More... | |
| static bool | isCandidateStore (const MachineInstr &MI, const MachineOperand &MO) |
| Check whether the given instruction can the end of a LOH chain involving a store. More... | |
| static bool | isCandidateLoad (const MachineInstr &MI) |
| Check whether the given instruction can be the end of a LOH chain involving a load. More... | |
| static bool | supportLoadFromLiteral (const MachineInstr &MI) |
| Check whether the given instruction can load a litteral. More... | |
| static int | mapRegToGPRIndex (MCPhysReg Reg) |
| Map register number to index from 0-30. More... | |
| static void | handleUse (const MachineInstr &MI, const MachineOperand &MO, LOHInfo &Info) |
Update state Info given MI uses the tracked register. More... | |
| static void | handleClobber (LOHInfo &Info) |
Update state Info given the tracked register is clobbered. More... | |
| static bool | handleMiddleInst (const MachineInstr &MI, LOHInfo &DefInfo, LOHInfo &OpInfo) |
Update state Info given that MI is possibly the middle instruction of an LOH involving 3 instructions. More... | |
| static void | handleADRP (const MachineInstr &MI, AArch64FunctionInfo &AFI, LOHInfo &Info) |
| Update state when seeing and ADRP instruction. More... | |
| static void | handleRegMaskClobber (const uint32_t *RegMask, MCPhysReg Reg, LOHInfo *LOHInfos) |
| static void | handleNormalInst (const MachineInstr &MI, LOHInfo *LOHInfos) |
Variables | |
| static const unsigned | N_GPR_REGS = 31 |
| Number of GPR registers traked by mapRegToGPRIndex() More... | |
| #define AARCH64_COLLECT_LOH_NAME "AArch64 Collect Linker Optimization Hint (LOH)" |
Definition at line 134 of file AArch64CollectLOH.cpp.
| #define DEBUG_TYPE "aarch64-collect-loh" |
Definition at line 123 of file AArch64CollectLOH.cpp.
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Answer the following question: Can Def be one of the definition involved in a part of a LOH?
Definition at line 179 of file AArch64CollectLOH.cpp.
References llvm::AArch64ISD::ADRP, llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getTargetFlags(), llvm::MachineOperand::getType(), llvm::MachineOperand::MO_GlobalAddress, and llvm::AArch64II::MO_GOT.
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Update state when seeing and ADRP instruction.
Definition at line 384 of file AArch64CollectLOH.cpp.
References llvm::AArch64FunctionInfo::addLOHDirective(), llvm::dbgs(), DEBUG, handleClobber(), LOHInfo::IsCandidate, LOHInfo::LastADRP, llvm_unreachable, llvm::MCLOH_AdrpAdd, llvm::MCLOH_AdrpAddLdr, llvm::MCLOH_AdrpAddStr, llvm::MCLOH_AdrpAdrp, llvm::MCLOH_AdrpLdr, llvm::MCLOH_AdrpLdrGot, llvm::MCLOH_AdrpLdrGotLdr, llvm::MCLOH_AdrpLdrGotStr, MI, LOHInfo::MI0, LOHInfo::MI1, supportLoadFromLiteral(), and LOHInfo::Type.
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Update state Info given the tracked register is clobbered.
Definition at line 329 of file AArch64CollectLOH.cpp.
References LOHInfo::IsCandidate, LOHInfo::LastADRP, LOHInfo::MultiUsers, and LOHInfo::OneUser.
Referenced by handleADRP(), handleMiddleInst(), handleNormalInst(), and handleRegMaskClobber().
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Update state Info given that MI is possibly the middle instruction of an LOH involving 3 instructions.
Definition at line 338 of file AArch64CollectLOH.cpp.
References assert(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getTargetFlags(), handleClobber(), LOHInfo::IsCandidate, LOHInfo::LastADRP, llvm::MCLOH_AdrpAddLdr, llvm::MCLOH_AdrpAddStr, llvm::MCLOH_AdrpLdr, llvm::MCLOH_AdrpLdrGotLdr, llvm::MCLOH_AdrpLdrGotStr, MI, LOHInfo::MI1, llvm::AArch64II::MO_GOT, LOHInfo::OneUser, and LOHInfo::Type.
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Definition at line 459 of file AArch64CollectLOH.cpp.
References handleClobber(), handleRegMaskClobber(), handleUse(), mapRegToGPRIndex(), llvm::MachineInstr::operands(), and llvm::MachineInstr::uses().
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Definition at line 450 of file AArch64CollectLOH.cpp.
References llvm::MachineOperand::clobbersPhysReg(), handleClobber(), and mapRegToGPRIndex().
Referenced by handleNormalInst().
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Update state Info given MI uses the tracked register.
Definition at line 294 of file AArch64CollectLOH.cpp.
References llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getTargetFlags(), LOHInfo::IsCandidate, isCandidateLoad(), isCandidateStore(), llvm::MCLOH_AdrpAdd, llvm::MCLOH_AdrpAddStr, llvm::MCLOH_AdrpLdr, llvm::MCLOH_AdrpLdrGot, MI, LOHInfo::MI0, LOHInfo::MI1, llvm::AArch64II::MO_GOT, LOHInfo::MultiUsers, LOHInfo::OneUser, and LOHInfo::Type.
Referenced by handleNormalInst().
| INITIALIZE_PASS | ( | AArch64CollectLOH | , |
| "aarch64-collect-loh" | , | ||
| AARCH64_COLLECT_LOH_NAME | , | ||
| false | , | ||
| false | |||
| ) | const |
Definition at line 161 of file AArch64CollectLOH.cpp.
References llvm::MachineOperand::MO_BlockAddress, llvm::MachineOperand::MO_ConstantPoolIndex, llvm::MachineOperand::MO_GlobalAddress, and llvm::MachineOperand::MO_JumpTableIndex.
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Check whether the given instruction can be the end of a LOH chain involving a load.
Definition at line 225 of file AArch64CollectLOH.cpp.
References llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getTargetFlags(), and llvm::AArch64II::MO_GOT.
Referenced by handleUse().
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Check whether the given instruction can the end of a LOH chain involving a store.
Definition at line 201 of file AArch64CollectLOH.cpp.
References llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getOperandNo(), and llvm::MachineOperand::getReg().
Referenced by handleUse().
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Map register number to index from 0-30.
Definition at line 263 of file AArch64CollectLOH.cpp.
References N_GPR_REGS.
Referenced by handleNormalInst(), and handleRegMaskClobber().
| STATISTIC | ( | NumADRPSimpleCandidate | , |
| "Number of simplifiable ADRP dominate by another" | |||
| ) |
| STATISTIC | ( | NumADDToSTR | , |
| "Number of simplifiable STR reachable by ADD" | |||
| ) |
| STATISTIC | ( | NumLDRToSTR | , |
| "Number of simplifiable STR reachable by LDR" | |||
| ) |
| STATISTIC | ( | NumADDToLDR | , |
| "Number of simplifiable LDR reachable by ADD" | |||
| ) |
| STATISTIC | ( | NumLDRToLDR | , |
| "Number of simplifiable LDR reachable by LDR" | |||
| ) |
| STATISTIC | ( | NumADRPToLDR | , |
| "Number of simplifiable LDR reachable by ADRP" | |||
| ) |
| STATISTIC | ( | NumADRSimpleCandidate | , |
| "Number of simplifiable ADRP + ADD" | |||
| ) |
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Check whether the given instruction can load a litteral.
Definition at line 246 of file AArch64CollectLOH.cpp.
References llvm::MachineInstr::getOpcode().
Referenced by handleADRP().
Number of GPR registers traked by mapRegToGPRIndex()
Definition at line 261 of file AArch64CollectLOH.cpp.
Referenced by mapRegToGPRIndex().
1.8.6