LLVM  4.0.0
llvm::NVPTXTargetMachine32 Member List

This is the complete list of members for llvm::NVPTXTargetMachine32, including all inherited members.

addEarlyAsPossiblePasses(PassManagerBase &PM) overridellvm::NVPTXTargetMachinevirtual
addPassesToEmitFile(PassManagerBase &PM, raw_pwrite_stream &Out, CodeGenFileType FileType, bool DisableVerify=true, AnalysisID StartBefore=nullptr, AnalysisID StartAfter=nullptr, AnalysisID StopBefore=nullptr, AnalysisID StopAfter=nullptr, MachineFunctionInitializer *MFInitializer=nullptr) overridellvm::LLVMTargetMachinevirtual
addPassesToEmitMC(PassManagerBase &, MCContext *&, raw_pwrite_stream &, bool=true) overridellvm::NVPTXTargetMachineinlinevirtual
AsmInfollvm::TargetMachineprotected
CGFT_AssemblyFile enum valuellvm::TargetMachine
CGFT_Null enum valuellvm::TargetMachine
CGFT_ObjectFile enum valuellvm::TargetMachine
CMModelllvm::TargetMachineprotected
CodeGenFileType enum namellvm::TargetMachine
createDataLayout() const llvm::TargetMachineinline
createPassConfig(PassManagerBase &PM) overridellvm::NVPTXTargetMachinevirtual
DefaultOptionsllvm::TargetMachine
DLllvm::TargetMachineprotected
getCodeModel() const llvm::TargetMachine
getDataSections() const llvm::TargetMachineinline
getDrvInterface() const llvm::NVPTXTargetMachineinline
getFunctionSections() const llvm::TargetMachineinline
getIntrinsicInfo() const llvm::TargetMachineinlinevirtual
getManagedStrPool() const llvm::NVPTXTargetMachineinline
getMCAsmInfo() const llvm::TargetMachineinline
getMCInstrInfo() const llvm::TargetMachineinline
getMCRegisterInfo() const llvm::TargetMachineinline
getMCSubtargetInfo() const llvm::TargetMachineinline
getNameWithPrefix(SmallVectorImpl< char > &Name, const GlobalValue *GV, Mangler &Mang, bool MayAlwaysUsePrivate=false) const llvm::TargetMachine
getO0WantsFastISel()llvm::TargetMachineinline
getObjFileLowering() const overridellvm::NVPTXTargetMachineinlinevirtual
getOptLevel() const llvm::TargetMachine
getPointerSize() const llvm::TargetMachineinline
getRelocationModel() const llvm::TargetMachine
getSubtarget(const Function &F) const llvm::TargetMachineinline
getSubtargetImpl(const Function &) const overridellvm::NVPTXTargetMachineinlinevirtual
getSubtargetImpl() const llvm::NVPTXTargetMachineinline
getSymbol(const GlobalValue *GV) const llvm::TargetMachine
getTarget() const llvm::TargetMachineinline
getTargetCPU() const llvm::TargetMachineinline
getTargetFeatureString() const llvm::TargetMachineinline
getTargetIRAnalysis() overridellvm::NVPTXTargetMachinevirtual
getTargetTriple() const llvm::TargetMachineinline
getTLSModel(const GlobalValue *GV) const llvm::TargetMachine
getUniqueSectionNames() const llvm::TargetMachineinline
initAsmInfo()llvm::LLVMTargetMachineprotected
is64Bit() const llvm::NVPTXTargetMachineinline
isCompatibleDataLayout(const DataLayout &Candidate) const llvm::TargetMachineinline
isPositionIndependent() const llvm::TargetMachine
LLVMTargetMachine(const Target &T, StringRef DataLayoutString, const Triple &TargetTriple, StringRef CPU, StringRef FS, TargetOptions Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL)llvm::LLVMTargetMachineprotected
MIIllvm::TargetMachineprotected
MRIllvm::TargetMachineprotected
NVPTXTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional< Reloc::Model > RM, CodeModel::Model CM, CodeGenOpt::Level OP, bool is64bit)llvm::NVPTXTargetMachine
NVPTXTargetMachine32(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional< Reloc::Model > RM, CodeModel::Model CM, CodeGenOpt::Level OL)llvm::NVPTXTargetMachine32
O0WantsFastISelllvm::TargetMachineprotected
operator=(const TargetMachine &)=deletellvm::TargetMachine
Optionsllvm::TargetMachinemutable
OptLevelllvm::TargetMachineprotected
requiresStructuredCFG() const llvm::TargetMachineinline
RequireStructuredCFGllvm::TargetMachineprotected
resetTargetOptions(const Function &F) const llvm::TargetMachine
RMllvm::TargetMachineprotected
setFastISel(bool Enable)llvm::TargetMachineinline
setO0WantsFastISel(bool Enable)llvm::TargetMachineinline
setOptLevel(CodeGenOpt::Level Level)llvm::TargetMachine
setRequiresStructuredCFG(bool Value)llvm::TargetMachineinline
shouldAssumeDSOLocal(const Module &M, const GlobalValue *GV) const llvm::TargetMachine
shouldPrintMachineCode() const llvm::TargetMachineinline
STIllvm::TargetMachineprotected
TargetCPUllvm::TargetMachineprotected
TargetFSllvm::TargetMachineprotected
TargetMachine(const Target &T, StringRef DataLayoutString, const Triple &TargetTriple, StringRef CPU, StringRef FS, const TargetOptions &Options)llvm::TargetMachineprotected
TargetMachine(const TargetMachine &)=deletellvm::TargetMachine
targetSchedulesPostRAScheduling() const llvm::TargetMachineinlinevirtual
TargetTriplellvm::TargetMachineprotected
TheTargetllvm::TargetMachineprotected
usesPhysRegsForPEI() const llvm::TargetMachineinlinevirtual
~NVPTXTargetMachine() overridellvm::NVPTXTargetMachine
~TargetMachine()llvm::TargetMachinevirtual