33 "mips-round-section-sizes",
cl::init(
false),
66 unsigned ReturnReg) {}
110 bool SaveLocationIsRegister) {}
181 unsigned Reg2,
SMLoc IDLoc,
187 int16_t Imm,
SMLoc IDLoc,
193 unsigned TrgReg,
bool Is64Bit,
195 emitRRR(Is64Bit ? Mips::DADDu : Mips::ADDu, DstReg, SrcReg, TrgReg,
SMLoc(),
200 int16_t ShiftAmount,
SMLoc IDLoc,
202 if (ShiftAmount >= 32) {
203 emitRRI(Mips::DSLL32, DstReg, SrcReg, ShiftAmount - 32, IDLoc, STI);
207 emitRRI(Mips::DSLL, DstReg, SrcReg, ShiftAmount, IDLoc, STI);
212 if (hasShortDelaySlot)
213 emitRR(Mips::MOVE16_MM, Mips::ZERO, Mips::ZERO, IDLoc, STI);
215 emitRRI(Mips::SLL, Mips::ZERO, Mips::ZERO, 0, IDLoc, STI);
219 emitRRI(Mips::SLL, Mips::ZERO, Mips::ZERO, 0, IDLoc, STI);
231 unsigned Opcode,
unsigned SrcReg,
unsigned BaseReg, int64_t Offset,
235 emitRRI(Opcode, SrcReg, BaseReg, Offset, IDLoc, STI);
243 unsigned ATReg = GetATReg();
247 unsigned LoOffset = Offset & 0x0000ffff;
248 unsigned HiOffset = (Offset & 0xffff0000) >> 16;
252 if (LoOffset & 0x8000)
256 emitRI(Mips::LUi, ATReg, HiOffset, IDLoc, STI);
257 if (BaseReg != Mips::ZERO)
258 emitRRR(Mips::ADDu, ATReg, ATReg, BaseReg, IDLoc, STI);
260 emitRRI(Opcode, SrcReg, ATReg, LoOffset, IDLoc, STI);
266 unsigned Opcode,
unsigned SrcReg,
unsigned BaseReg,
MCOperand &HiOperand,
273 emitRX(Mips::LUi, ATReg, HiOperand, IDLoc, STI);
274 if (BaseReg != Mips::ZERO)
275 emitRRR(Mips::ADDu, ATReg, ATReg, BaseReg, IDLoc, STI);
277 emitRRX(Opcode, SrcReg, ATReg, LoOperand, IDLoc, STI);
285 unsigned BaseReg, int64_t Offset,
286 unsigned TmpReg,
SMLoc IDLoc,
289 emitRRI(Opcode, DstReg, BaseReg, Offset, IDLoc, STI);
300 unsigned LoOffset = Offset & 0x0000ffff;
301 unsigned HiOffset = (Offset & 0xffff0000) >> 16;
305 if (LoOffset & 0x8000)
309 emitRI(Mips::LUi, TmpReg, HiOffset, IDLoc, STI);
310 if (BaseReg != Mips::ZERO)
311 emitRRR(Mips::ADDu, TmpReg, TmpReg, BaseReg, IDLoc, STI);
313 emitRRI(Opcode, DstReg, TmpReg, LoOffset, IDLoc, STI);
325 unsigned TmpReg,
SMLoc IDLoc,
333 emitRX(Mips::LUi, TmpReg, HiOperand, IDLoc, STI);
334 if (BaseReg != Mips::ZERO)
335 emitRRR(Mips::ADDu, TmpReg, TmpReg, BaseReg, IDLoc, STI);
337 emitRRX(Opcode, DstReg, TmpReg, LoOperand, IDLoc, STI);
345 OS <<
"\t.set\tmicromips\n";
350 OS <<
"\t.set\tnomicromips\n";
355 OS <<
"\t.set\tmips16\n";
360 OS <<
"\t.set\tnomips16\n";
365 OS <<
"\t.set\treorder\n";
370 OS <<
"\t.set\tnoreorder\n";
375 OS <<
"\t.set\tmacro\n";
380 OS <<
"\t.set\tnomacro\n";
385 OS <<
"\t.set\tmsa\n";
390 OS <<
"\t.set\tnomsa\n";
395 OS <<
"\t.set\tat\n";
400 OS <<
"\t.set\tat=$" <<
Twine(RegNo) <<
"\n";
405 OS <<
"\t.set\tnoat\n";
410 OS <<
"\t.end\t" << Name <<
'\n';
414 OS <<
"\t.ent\t" << Symbol.
getName() <<
'\n';
422 OS <<
"\t.nan\tlegacy\n";
426 OS <<
"\t.option\tpic0\n";
430 OS <<
"\t.option\tpic2\n";
439 unsigned ReturnReg) {
447 OS <<
"\t.set arch=" << Arch <<
"\n";
452 OS <<
"\t.set\tmips0\n";
457 OS <<
"\t.set\tmips1\n";
462 OS <<
"\t.set\tmips2\n";
467 OS <<
"\t.set\tmips3\n";
472 OS <<
"\t.set\tmips4\n";
477 OS <<
"\t.set\tmips5\n";
482 OS <<
"\t.set\tmips32\n";
487 OS <<
"\t.set\tmips32r2\n";
492 OS <<
"\t.set\tmips32r3\n";
497 OS <<
"\t.set\tmips32r5\n";
502 OS <<
"\t.set\tmips32r6\n";
507 OS <<
"\t.set\tmips64\n";
512 OS <<
"\t.set\tmips64r2\n";
517 OS <<
"\t.set\tmips64r3\n";
522 OS <<
"\t.set\tmips64r5\n";
527 OS <<
"\t.set\tmips64r6\n";
532 OS <<
"\t.set\tdsp\n";
537 OS <<
"\t.set\tnodsp\n";
542 OS <<
"\t.set\tpop\n";
547 OS <<
"\t.set\tpush\n";
552 OS <<
"\t.set\tsoftfloat\n";
557 OS <<
"\t.set\thardfloat\n";
564 for (
int i = 7;
i >= 0;
i--)
565 OS.
write_hex((Value & (0xF << (
i * 4))) >> (
i * 4));
569 int CPUTopSavedRegOff) {
572 OS <<
',' << CPUTopSavedRegOff <<
'\n';
576 int FPUTopSavedRegOff) {
579 OS <<
"," << FPUTopSavedRegOff <<
'\n';
592 OS <<
"\t.cprestore\t" << Offset <<
"\n";
600 OS <<
"\t.cpsetup\t$"
616 bool SaveLocationIsRegister) {
622 OS <<
"\t.module\tfp=";
642 OS <<
"\t.set\toddspreg\n";
647 OS <<
"\t.set\tnooddspreg\n";
651 OS <<
"\t.module\tsoftfloat\n";
655 OS <<
"\t.module\thardfloat\n";
689 if (Features[Mips::FeatureMips64r6])
691 else if (Features[Mips::FeatureMips64r2] ||
692 Features[Mips::FeatureMips64r3] ||
693 Features[Mips::FeatureMips64r5])
695 else if (Features[Mips::FeatureMips64])
697 else if (Features[Mips::FeatureMips5])
699 else if (Features[Mips::FeatureMips4])
701 else if (Features[Mips::FeatureMips3])
703 else if (Features[Mips::FeatureMips32r6])
705 else if (Features[Mips::FeatureMips32r2] ||
706 Features[Mips::FeatureMips32r3] ||
707 Features[Mips::FeatureMips32r5])
709 else if (Features[Mips::FeatureMips32])
711 else if (Features[Mips::FeatureMips2])
717 if (Features[Mips::FeatureCnMips])
721 if (Features[Mips::FeatureNaN2008])
732 auto *
Symbol = cast<MCSymbolELF>(S);
759 if (RoundSectionSizes) {
789 else if (
getABI().IsN32())
792 if (Features[Mips::FeatureGP64Bit]) {
795 }
else if (Features[Mips::FeatureMips64r2] || Features[Mips::FeatureMips64])
815 auto *
Symbol = cast<MCSymbolELF>(S);
819 const auto &RhsSym = cast<MCSymbolELF>(
833 MicroMipsEnabled =
true;
838 MicroMipsEnabled =
false;
908 if (!Size->evaluateAsAbsolute(AbsSize, MCA))
970 unsigned ReturnReg_) {
981 int CPUTopSavedRegOff) {
988 int FPUTopSavedRegOff) {
1088 emitRRR(Mips::OR64, RegOrOffset, Mips::GP, Mips::ZERO,
SMLoc(), &STI);
1091 emitRRI(Mips::SD, Mips::GP, Mips::SP, RegOrOffset,
SMLoc(), &STI);
1128 emitRRR(Mips::DADDu, Mips::GP, Mips::GP, RegNo,
SMLoc(), &STI);
1132 bool SaveLocationIsRegister) {
1139 if (SaveLocationIsRegister) {
void emitDirectiveSetDsp() override
void emitDirectiveEnd(StringRef Name) override
virtual void emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff)
void emitRR(unsigned Opcode, unsigned Reg0, unsigned Reg1, SMLoc IDLoc, const MCSubtargetInfo *STI)
void emitDirectiveSetMips3() override
void emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) override
void setELFHeaderEFlags(unsigned Flags)
Instances of this class represent a uniqued identifier for a section in the current translation unit...
void emitDirectiveModuleSoftFloat() override
void emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset, const MCSymbol &Sym, bool IsReg) override
void emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) override
bool UseCodeAlign() const override
Return true if a .align directive should use "optimized nops" to fill instead of 0s.
virtual void emitDirectiveOptionPic2()
static const MCSymbolRefExpr * create(const MCSymbol *Symbol, MCContext &Ctx)
void emitDirectiveOptionPic2() override
LLVM_ATTRIBUTE_NORETURN void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
void emitDirectiveSetMips2() override
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
void emitDirectiveSetReorder() override
void emitDirectiveSetNoMicroMips() override
static MCOperand createExpr(const MCExpr *Val)
void emitAddu(unsigned DstReg, unsigned SrcReg, unsigned TrgReg, bool Is64Bit, const MCSubtargetInfo *STI)
Target specific streamer interface.
void emitDirectiveCpreturn(unsigned SaveLocation, bool SaveLocationIsRegister) override
void setAlignment(unsigned Value)
void emitDirectiveSetOddSPReg() override
void emitDirectiveNaN2008() override
An efficient, type-erasing, non-owning reference to a callable.
void emitDirectiveOptionPic0() override
virtual void emitDirectiveSetNoReorder()
void emitDirectiveModuleFP() override
virtual void emitDirectiveModuleHardFloat()
void registerSymbol(const MCSymbol &Symbol, bool *Created=nullptr)
void PushSection()
Save the current and previous section on the section stack.
MCSection * getDataSection() const
void emitDirectiveSetFp(MipsABIFlagsSection::FpABIKind Value) override
constexpr bool isInt< 16 >(int64_t x)
void emitGPRestore(int Offset, SMLoc IDLoc, const MCSubtargetInfo *STI)
Emit the $gp restore operation for .cprestore.
unsigned getELFHeaderEFlags() const
ELF e_header flags.
unsigned getAlignment() const
void emitDirectiveSetMips32R6() override
MCContext & getContext() const
virtual void EmitValueImpl(const MCExpr *Value, unsigned Size, SMLoc Loc=SMLoc())
Emit the expression Value into the output as a native integer of the given Size bytes.
MipsTargetAsmStreamer(MCStreamer &S, formatted_raw_ostream &OS)
bool emitDirectiveCpRestore(int Offset, function_ref< unsigned()> GetATReg, SMLoc IDLoc, const MCSubtargetInfo *STI) override
Emit a .cprestore directive.
virtual void EmitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI)
Emit the given Instruction into the current section.
void emitDirectiveCpLoad(unsigned RegNo) override
virtual void emitDirectiveSetMips32R3()
virtual void emitDirectiveSetMicroMips()
virtual void emitDirectiveSetMips3()
void emitDirectiveSetAt() override
void emitDirectiveSetPop() override
void emitDirectiveSetMips4() override
void emitFrame(unsigned StackReg, unsigned StackSize, unsigned ReturnReg) override
static MCOperand createReg(unsigned Reg)
struct fuzzer::@269 Flags
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
void emitLoadWithImmOffset(unsigned Opcode, unsigned DstReg, unsigned BaseReg, int64_t Offset, unsigned TmpReg, SMLoc IDLoc, const MCSubtargetInfo *STI)
Emit a load instruction with an immediate offset.
void emitDirectiveAbiCalls() override
void emitDirectiveSetMicroMips() override
virtual void emitFrame(unsigned StackReg, unsigned StackSize, unsigned ReturnReg)
virtual void emitDirectiveSetMips0()
void emitDirectiveSetNoAt() override
virtual void emitDirectiveSetSoftFloat()
virtual void emitDirectiveSetNoMacro()
void emitDirectiveSetMsa() override
Base class for the full range of assembler expressions which are needed for parsing.
virtual void emitDirectiveSetPush()
bool registerSection(MCSection &Section)
virtual void emitDirectiveEnd(StringRef Name)
Represent a reference to a symbol from inside an expression.
virtual void emitDirectiveSetMips32R6()
void emitDirectiveSetMips1() override
void createPendingLabelRelocs()
Mark labels as microMIPS, if necessary for the subtarget.
void emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) override
virtual void emitDirectiveSetMips1()
virtual void emitDirectiveModuleOddSPReg()
Context object for machine code objects.
void emitNop(SMLoc IDLoc, const MCSubtargetInfo *STI)
virtual void emitDirectiveModuleSoftFloat()
MCSection * getBSSSection() const
static const MCBinaryExpr * createSub(const MCExpr *LHS, const MCExpr *RHS, MCContext &Ctx)
void emitDirectiveSetSoftFloat() override
MipsABIFlagsSection ABIFlagsSection
raw_ostream & write_hex(unsigned long long N)
Output N in hexadecimal, without any prefix or padding.
void emitDirectiveSetMips32R2() override
Function Alias Analysis false
virtual void emitDirectiveModuleFP()
void emitDirectiveSetMips5() override
void emitDirectiveSetMips0() override
void emitLabel(MCSymbol *Symbol) override
virtual void emitDirectiveSetOddSPReg()
virtual void emitDirectiveSetMips64R2()
virtual void EmitIntValue(uint64_t Value, unsigned Size)
Special case of EmitValue that avoids the client having to pass in a MCExpr for constant integers...
virtual void emitDirectiveSetNoOddSPReg()
void emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset, const MCSymbol &Sym, bool IsReg) override
Expected< const typename ELFT::Sym * > getSymbol(typename ELFT::SymRange Symbols, uint32_t Index)
Instances of this class represent a single low-level machine instruction.
void emitRX(unsigned Opcode, unsigned Reg0, MCOperand Op1, SMLoc IDLoc, const MCSubtargetInfo *STI)
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
virtual void setUsesMicroMips()
void emitDirectiveSetMips16() override
initializer< Ty > init(const Ty &Val)
void emitDirectiveNaNLegacy() override
void emitDirectiveSetHardFloat() override
void emitDirectiveSetMips32R3() override
Streaming machine code generation interface.
void emitDirectiveSetMips64() override
MCSymbol * createTempSymbol(bool CanBeUnnamed=true)
Create and return a new assembler temporary symbol with a unique but unspecified name.
virtual void emitDirectiveSetMips4()
static const MipsMCExpr * createGpOff(MipsExprKind Kind, const MCExpr *Expr, MCContext &Ctx)
The instances of the Type class are immutable: once they are created, they are never changed...
virtual void emitDirectiveSetNoMicroMips()
virtual void emitDirectiveSetNoDsp()
StringRef getFpABIString(FpABIKind Value)
void emitDirectiveSetNoReorder() override
virtual void emitDirectiveSetMips16()
virtual void SwitchSection(MCSection *Section, const MCExpr *Subsection=nullptr)
Set the current section where code is being emitted to Section.
MCAssembler & getAssembler()
static ManagedStatic< OptionRegistry > OR
virtual void emitDirectiveSetMacro()
void emitDirectiveCpreturn(unsigned SaveLocation, bool SaveLocationIsRegister) override
virtual void emitDirectiveNaN2008()
void emitRI(unsigned Opcode, unsigned Reg0, int32_t Imm, SMLoc IDLoc, const MCSubtargetInfo *STI)
virtual void emitDirectiveCpLoad(unsigned RegNo)
virtual void EmitValueToAlignment(unsigned ByteAlignment, int64_t Value=0, unsigned ValueSize=1, unsigned MaxBytesToEmit=0)
Emit some number of copies of Value until the byte alignment ByteAlignment is reached.
void emitR(unsigned Opcode, unsigned Reg0, SMLoc IDLoc, const MCSubtargetInfo *STI)
virtual void emitDirectiveSetArch(StringRef Arch)
void emitDirectiveSetMips32() override
virtual void emitDirectiveSetDsp()
virtual void emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff)
MCSection * getTextSection() const
void emitDirectiveSetMips64R2() override
void emitDirectiveSetMacro() override
virtual void emitDirectiveSetMips32R5()
void emitDirectiveSetNoMsa() override
void emitDirectiveSetMips64R3() override
virtual void emitDirectiveSetMips32R2()
void emitLoadWithSymOffset(unsigned Opcode, unsigned DstReg, unsigned BaseReg, MCOperand &HiOperand, MCOperand &LoOperand, unsigned ATReg, SMLoc IDLoc, const MCSubtargetInfo *STI)
Emit a load instruction with an symbol offset.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
void emitDirectiveSetMips16() override
virtual void emitDirectiveSetFp(MipsABIFlagsSection::FpABIKind Value)
void emitRRR(unsigned Opcode, unsigned Reg0, unsigned Reg1, unsigned Reg2, SMLoc IDLoc, const MCSubtargetInfo *STI)
virtual void emitDirectiveAbiCalls()
void emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) override
virtual void emitDirectiveSetMips64R6()
void emitDirectiveEnt(const MCSymbol &Symbol) override
MCStreamer & getStreamer()
void emitDirectiveEnt(const MCSymbol &Symbol) override
void setOpcode(unsigned Op)
virtual void EmitLabel(MCSymbol *Symbol)
Emit a label for Symbol into the current section.
virtual void emitDirectiveOptionPic0()
void EmitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI) override
Emit the given Instruction into the current section.
void emitDSLL(unsigned DstReg, unsigned SrcReg, int16_t ShiftAmount, SMLoc IDLoc, const MCSubtargetInfo *STI)
void emitAssignment(MCSymbol *Symbol, const MCExpr *Value) override
const MipsABIInfo & getABI() const
virtual void EmitCodeAlignment(unsigned ByteAlignment, unsigned MaxBytesToEmit=0)
Emit nops until the byte alignment ByteAlignment is reached.
virtual void emitDirectiveSetPop()
void emitDirectiveSetMips32R5() override
void emitEmptyDelaySlot(bool hasShortDelaySlot, SMLoc IDLoc, const MCSubtargetInfo *STI)
void emitDirectiveInsn() override
bool isPositionIndependent() const
virtual void emitDirectiveSetAt()
virtual void emitDirectiveSetNoMips16()
void emitDirectiveSetNoOddSPReg() override
const FeatureBitset & getFeatureBits() const
getFeatureBits - Return the feature bits.
bool isMicroMipsEnabled() const
void emitDirectiveSetAtWithArg(unsigned RegNo) override
void emitDirectiveEnd(StringRef Name) override
MipsTargetELFStreamer(MCStreamer &S, const MCSubtargetInfo &STI)
virtual void emitDirectiveInsn()
void setUsesMicroMips() override
void EmitMipsOptionRecords()
Emits all the option records stored up until the point it's called.
void emitDirectiveSetNoDsp() override
virtual void emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset, const MCSymbol &Sym, bool IsReg)
static const MipsMCExpr * create(MipsExprKind Kind, const MCExpr *Expr, MCContext &Ctx)
void emitDirectiveSetMips64R5() override
void emitStoreWithImmOffset(unsigned Opcode, unsigned SrcReg, unsigned BaseReg, int64_t Offset, function_ref< unsigned()> GetATReg, SMLoc IDLoc, const MCSubtargetInfo *STI)
Emit a store instruction with an offset.
virtual void emitDirectiveSetMips64R3()
virtual void emitDirectiveSetMips64R5()
const MCRegisterInfo * getRegisterInfo() const
void emitDirectiveCpLoad(unsigned RegNo) override
virtual void emitDirectiveEnt(const MCSymbol &Symbol)
StringRef getName() const
getName - Get the symbol name.
virtual void emitDirectiveSetHardFloat()
MCSymbol * getOrCreateSymbol(const Twine &Name)
Lookup the symbol inside with the specified Name.
virtual void emitDirectiveSetMips64()
MCELFStreamer & getStreamer()
virtual bool emitDirectiveCpRestore(int Offset, function_ref< unsigned()> GetATReg, SMLoc IDLoc, const MCSubtargetInfo *STI)
virtual void emitDirectiveSetMips5()
void emitDirectiveSetNoMips16() override
void emitDirectiveOptionPic2() override
virtual void emitDirectiveSetMips2()
MCSubtargetInfo - Generic base class for all target subtargets.
This represents a section on linux, lots of unix variants and some bare metal systems.
References to labels and assigned expressions.
void emitDirectiveSetNoMacro() override
MipsTargetStreamer(MCStreamer &S)
void emitDirectiveSetNoMicroMips() override
void emitFrame(unsigned StackReg, unsigned StackSize, unsigned ReturnReg) override
void emitDirectiveSetMips64R6() override
static bool hasShortDelaySlot(unsigned Opcode)
void emitDirectiveSetArch(StringRef Arch) override
void emitDirectiveModuleOddSPReg() override
void emitDirectiveAbiCalls() override
void emitRRI(unsigned Opcode, unsigned Reg0, unsigned Reg1, int16_t Imm, SMLoc IDLoc, const MCSubtargetInfo *STI)
void emitRRX(unsigned Opcode, unsigned Reg0, unsigned Reg1, MCOperand Op2, SMLoc IDLoc, const MCSubtargetInfo *STI)
bool PopSection()
Restore the current and previous section from the section stack.
MCSectionELF * getELFSection(const Twine &Section, unsigned Type, unsigned Flags)
virtual void emitDirectiveSetReorder()
static const char * getRegisterName(unsigned RegNo)
uint16_t getEncodingValue(unsigned RegNo) const
Returns the encoding for RegNo.
LLVM Value Representation.
void forbidModuleDirective()
const MCObjectFileInfo * getObjectFileInfo() const
virtual void emitDirectiveCpreturn(unsigned SaveLocation, bool SaveLocationIsRegister)
const FeatureBitset Features
virtual void emitDirectiveNaNLegacy()
void emitII(unsigned Opcode, int16_t Imm1, int16_t Imm2, SMLoc IDLoc, const MCSubtargetInfo *STI)
void emitDirectiveSetNoReorder() override
This class implements an extremely fast bulk output stream that can only output to a stream...
virtual void emitDirectiveSetMips32()
virtual void emitDirectiveSetNoMsa()
void addOperand(const MCOperand &Op)
StringRef - Represent a constant reference to a string, i.e.
void emitDirectiveNaN2008() override
virtual void emitDirectiveSetMsa()
static void printHex32(unsigned Value, raw_ostream &OS)
virtual void emitDirectiveSetNoAt()
Represents a location in source code.
Instances of this class represent operands of the MCInst class.
bool emitDirectiveCpRestore(int Offset, function_ref< unsigned()> GetATReg, SMLoc IDLoc, const MCSubtargetInfo *STI) override
virtual void emitDirectiveSetAtWithArg(unsigned RegNo)
static MCOperand createImm(int64_t Val)
void emitDirectiveInsn() override
void emitDirectiveSetPush() override
LLVM_NODISCARD std::string lower() const
static const MCConstantExpr * create(int64_t Value, MCContext &Ctx)
void emitDirectiveModuleHardFloat() override
void emitDirectiveNaNLegacy() override
void emitStoreWithSymOffset(unsigned Opcode, unsigned SrcReg, unsigned BaseReg, MCOperand &HiOperand, MCOperand &LoOperand, unsigned ATReg, SMLoc IDLoc, const MCSubtargetInfo *STI)
Emit a store instruction with an symbol offset.
void emitDirectiveOptionPic0() override
void emitDirectiveSetMicroMips() override