15 #ifndef LLVM_CODEGEN_CALLINGCONVLOWER_H
16 #define LLVM_CODEGEN_CALLINGCONVLOWER_H
29 class TargetRegisterInfo;
65 unsigned isCustom : 1;
78 unsigned RegNo,
MVT LocVT,
92 unsigned RegNo,
MVT LocVT,
95 Ret =
getReg(ValNo, ValVT, RegNo, LocVT, HTP);
107 Ret.isCustom =
false;
118 Ret =
getMem(ValNo, ValVT, Offset, LocVT, HTP);
126 LocInfo HTP,
unsigned ExtraInfo = 0) {
127 return getReg(ValNo, ValVT, ExtraInfo, LocVT, HTP);
167 : VReg(VReg), PReg(PReg), VT(VT) {}
198 bool AnalyzingMustTailForwardedRegs =
false;
204 unsigned StackOffset;
205 unsigned MaxStackArgAlign;
239 ByValInfo(
unsigned B,
unsigned E,
bool IsWaste =
false) :
240 Begin(B),
End(E), Waste(IsWaste) {}
257 unsigned InRegsParamsProcessed;
285 return alignTo(StackOffset, MaxStackArgAlign);
291 return UsedRegs[Reg/32] & (1 << (Reg&31));
350 for (
unsigned i = 0;
i < Regs.
size(); ++
i)
369 MarkAllocated(ShadowReg);
378 if (FirstUnalloc == Regs.
size())
382 unsigned Reg = Regs[FirstUnalloc];
391 if (RegsRequired > Regs.
size())
394 for (
unsigned StartIdx = 0; StartIdx <= Regs.
size() - RegsRequired;
396 bool BlockAvailable =
true;
398 for (
unsigned BlockIdx = 0; BlockIdx < RegsRequired; ++BlockIdx) {
400 BlockAvailable =
false;
404 if (BlockAvailable) {
406 for (
unsigned BlockIdx = 0; BlockIdx < RegsRequired; ++BlockIdx) {
407 MarkAllocated(Regs[StartIdx + BlockIdx]);
409 return Regs[StartIdx];
419 if (FirstUnalloc == Regs.
size())
423 unsigned Reg = Regs[FirstUnalloc], ShadowReg = ShadowRegs[FirstUnalloc];
425 MarkAllocated(ShadowReg);
432 assert(Align && ((Align - 1) & Align) == 0);
433 StackOffset =
alignTo(StackOffset, Align);
434 unsigned Result = StackOffset;
436 MaxStackArgAlign = std::max(Align, MaxStackArgAlign);
442 if (!AnalyzingMustTailForwardedRegs)
448 MarkAllocated(ShadowReg);
456 for (
unsigned i = 0;
i < ShadowRegs.
size(); ++
i)
457 MarkAllocated(ShadowRegs[
i]);
478 unsigned& BeginReg,
unsigned& EndReg)
const {
479 assert(InRegsParamRecordIndex < ByValRegs.
size() &&
480 "Wrong ByVal parameter index");
482 const ByValInfo&
info = ByValRegs[InRegsParamRecordIndex];
483 BeginReg = info.Begin;
489 ByValRegs.
push_back(ByValInfo(RegBegin, RegEnd));
496 unsigned e = ByValRegs.
size();
497 if (InRegsParamsProcessed < e)
498 ++InRegsParamsProcessed;
499 return InRegsParamsProcessed < e;
504 InRegsParamsProcessed = 0;
510 InRegsParamsProcessed = 0;
547 unsigned NumFirstPassLocs = Locs.size();
553 for (
auto Arg : Args) {
554 Arg.Flags.setSecArgPass();
564 auto B = TmpArgLocs.
begin(),
E = TmpArgLocs.
end();
566 std::back_inserter(Locs),
574 void MarkAllocated(
unsigned Reg);
void AnalyzeCallResult(const SmallVectorImpl< ISD::InputArg > &Ins, CCAssignFn Fn)
AnalyzeCallResult - Analyze the return values of a call, incorporating info about the passed values i...
void push_back(const T &Elt)
static CCValAssign getPending(unsigned ValNo, MVT ValVT, MVT LocVT, LocInfo HTP, unsigned ExtraInfo=0)
static CCValAssign getCustomReg(unsigned ValNo, MVT ValVT, unsigned RegNo, MVT LocVT, LocInfo HTP)
LocInfo getLocInfo() const
Describes a register that needs to be forwarded from the prologue to a musttail call.
void getInRegsParamInfo(unsigned InRegsParamRecordIndex, unsigned &BeginReg, unsigned &EndReg) const
void AnalyzeFormalArguments(const SmallVectorImpl< ISD::InputArg > &Ins, CCAssignFn Fn)
AnalyzeFormalArguments - Analyze an array of argument values, incorporating info about the formals in...
void AnalyzeArgumentsSecondPass(const SmallVectorImpl< T > &Args, CCAssignFn Fn)
The function runs an additional analysis pass over function arguments.
CallingConv::ID getCallingConv() const
bool CCAssignFn(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State)
CCAssignFn - This function assigns a location for Val, updating State to reflect the change...
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
unsigned getInRegsParamsCount() const
uint64_t alignTo(uint64_t Value, uint64_t Align, uint64_t Skew=0)
Returns the next integer (mod 2**64) that is greater than or equal to Value and is a multiple of Alig...
bool CheckReturn(const SmallVectorImpl< ISD::OutputArg > &ArgsFlags, CCAssignFn Fn)
CheckReturn - Analyze the return values of a function, returning true if the return can be performed ...
unsigned getValNo() const
LLVMContext & getContext() const
void convertToMem(unsigned Offset)
unsigned AllocateReg(unsigned Reg, unsigned ShadowReg)
Version of AllocateReg with extra register to be shadowed.
bool CCCustomFn(unsigned &ValNo, MVT &ValVT, MVT &LocVT, CCValAssign::LocInfo &LocInfo, ISD::ArgFlagsTy &ArgFlags, CCState &State)
CCCustomFn - This function assigns a location for Val, possibly updating all args to reflect changes ...
struct fuzzer::@269 Flags
ParmContext getCallOrPrologue() const
unsigned AllocateReg(ArrayRef< MCPhysReg > Regs)
AllocateReg - Attempt to allocate one of the specified registers.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
void addLoc(const CCValAssign &V)
Reg
All possible values of the reg field in the ModR/M byte.
bool isUpperBitsInLoc() const
SmallVectorImpl< llvm::CCValAssign > & getPendingLocs()
MachineFunction & getMachineFunction() const
unsigned getLocReg() const
void addInRegsParamInfo(unsigned RegBegin, unsigned RegEnd)
static GCRegistry::Add< OcamlGC > B("ocaml","ocaml 3.10-compatible GC")
size_t size() const
size - Get the array size.
static GCRegistry::Add< CoreCLRGC > E("coreclr","CoreCLR-compatible GC")
static CCValAssign getReg(unsigned ValNo, MVT ValVT, unsigned RegNo, MVT LocVT, LocInfo HTP)
constexpr uint64_t MinAlign(uint64_t A, uint64_t B)
MinAlign - A and B are either alignments or offsets.
unsigned AllocateReg(ArrayRef< MCPhysReg > Regs, const MCPhysReg *ShadowRegs)
Version of AllocateReg with list of registers to be shadowed.
bool IsShadowAllocatedReg(unsigned Reg) const
A shadow allocated register is a register that was allocated but wasn't added to the location list (L...
unsigned getFirstUnallocated(ArrayRef< MCPhysReg > Regs) const
getFirstUnallocated - Return the index of the first unallocated register in the set, or Regs.size() if they are all allocated.
ForwardedRegister(unsigned VReg, MCPhysReg PReg, MVT VT)
unsigned getAlignedCallFrameSize() const
getAlignedCallFrameSize - Return the size of the call frame needed to be able to store all arguments ...
MVT - Machine Value Type.
ParmContext
ParmContext - This enum tracks whether calling convention lowering is in the context of prologue or c...
This is an important class for using LLVM in a threaded context.
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
LLVM_ATTRIBUTE_ALWAYS_INLINE iterator begin()
unsigned getInRegsParamsProcessed() const
static const unsigned End
static bool resultsCompatible(CallingConv::ID CalleeCC, CallingConv::ID CallerCC, MachineFunction &MF, LLVMContext &C, const SmallVectorImpl< ISD::InputArg > &Ins, CCAssignFn CalleeFn, CCAssignFn CallerFn)
Returns true if the results of the two calling conventions are compatible.
unsigned getNextStackOffset() const
getNextStackOffset - Return the next stack offset such that all stack slots satisfy their alignment r...
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
void HandleByVal(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, int MinSize, int MinAlign, ISD::ArgFlagsTy ArgFlags)
Allocate space on the stack large enough to pass an argument by value.
void getRemainingRegParmsForType(SmallVectorImpl< MCPhysReg > &Regs, MVT VT, CCAssignFn Fn)
Compute the remaining unused register parameters that would be used for the given value type...
unsigned getExtraInfo() const
CCState - This class holds information needed while lowering arguments and return values...
void AnalyzeArguments(const SmallVectorImpl< ISD::OutputArg > &Outs, CCAssignFn Fn)
The function will invoke AnalyzeCallOperands.
unsigned AllocateRegBlock(ArrayRef< MCPhysReg > Regs, unsigned RegsRequired)
AllocateRegBlock - Attempt to allocate a block of RegsRequired consecutive registers.
CCValAssign - Represent assignment of one arg/retval to a location.
CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &MF, SmallVectorImpl< CCValAssign > &locs, LLVMContext &C)
static GCRegistry::Add< ShadowStackGC > C("shadow-stack","Very portable GC for uncooperative code generators")
void swap(llvm::BitVector &LHS, llvm::BitVector &RHS)
Implement std::swap in terms of BitVector swap.
unsigned AllocateStack(unsigned Size, unsigned Align, unsigned ShadowReg)
Version of AllocateStack with extra register to be shadowed.
void AnalyzeCallOperands(const SmallVectorImpl< ISD::OutputArg > &Outs, CCAssignFn Fn)
AnalyzeCallOperands - Analyze the outgoing arguments to a call, incorporating info about the passed v...
void analyzeMustTailForwardedRegisters(SmallVectorImpl< ForwardedRegister > &Forwards, ArrayRef< MVT > RegParmTypes, CCAssignFn Fn)
Compute the set of registers that need to be preserved and forwarded to any musttail calls...
LLVM_ATTRIBUTE_ALWAYS_INLINE iterator end()
void ensureMaxAlignment(unsigned Align)
Make sure the function is at least Align bytes aligned.
unsigned AllocateStack(unsigned Size, unsigned Align, ArrayRef< MCPhysReg > ShadowRegs)
Version of AllocateStack with list of extra registers to be shadowed.
static CCValAssign getCustomMem(unsigned ValNo, MVT ValVT, unsigned Offset, MVT LocVT, LocInfo HTP)
void AnalyzeReturn(const SmallVectorImpl< ISD::OutputArg > &Outs, CCAssignFn Fn)
AnalyzeReturn - Analyze the returned values of a return, incorporating info about the result values i...
LLVM_ATTRIBUTE_ALWAYS_INLINE size_type size() const
bool isAllocated(unsigned Reg) const
isAllocated - Return true if the specified register (or an alias) is allocated.
ParmContext CallOrPrologue
static CCValAssign getMem(unsigned ValNo, MVT ValVT, unsigned Offset, MVT LocVT, LocInfo HTP)
void AnalyzeArguments(const SmallVectorImpl< ISD::InputArg > &Ins, CCAssignFn Fn)
The function will invoke AnalyzeFormalArguments.
void clearByValRegsInfo()
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
void rewindByValRegsInfo()
unsigned getLocMemOffset() const
unsigned AllocateReg(unsigned Reg)
AllocateReg - Attempt to allocate one register.
static GCRegistry::Add< ErlangGC > A("erlang","erlang-compatible garbage collector")
unsigned AllocateStack(unsigned Size, unsigned Align)
AllocateStack - Allocate a chunk of stack space with the specified size and alignment.
void convertToReg(unsigned RegNo)
void ensureMaxAlignment(unsigned Align)