74 #define DEBUG_TYPE "isel"
82 cl::desc(
"Generate low-precision inline sequences "
83 "for some float libcalls"),
89 cl::desc(
"Enable fast-math-flags for DAG nodes"));
94 cl::desc(
"Minimum density for building a jump table in "
95 "a normal function"));
100 cl::desc(
"Minimum density for building a jump table in "
101 "an optsize function"));
121 const SDValue *Parts,
unsigned NumParts,
130 const SDValue *Parts,
unsigned NumParts,
137 assert(NumParts > 0 &&
"No parts to assemble!");
148 unsigned RoundParts = NumParts & (NumParts - 1) ?
149 1 <<
Log2_32(NumParts) : NumParts;
150 unsigned RoundBits = PartBits * RoundParts;
151 EVT RoundVT = RoundBits == ValueBits ?
157 if (RoundParts > 2) {
161 RoundParts / 2, PartVT, HalfVT, V);
172 if (RoundParts < NumParts) {
174 unsigned OddParts = NumParts - RoundParts;
177 Parts + RoundParts, OddParts, PartVT, OddVT, V);
205 !PartVT.
isVector() &&
"Unexpected split");
216 if (PartEVT == ValueVT)
220 ValueVT.
bitsLT(PartEVT)) {
233 if (ValueVT.
bitsLT(PartEVT)) {
237 if (AssertOp.hasValue())
238 Val = DAG.
getNode(*AssertOp, DL, PartEVT, Val,
259 const Twine &ErrMsg) {
260 const Instruction *
I = dyn_cast_or_null<Instruction>(V);
264 const char *AsmError =
", possible invalid constraint for vector type";
265 if (
const CallInst *CI = dyn_cast<CallInst>(I))
266 if (isa<InlineAsm>(CI->getCalledValue()))
267 return Ctx.
emitError(I, ErrMsg + AsmError);
278 const SDValue *Parts,
unsigned NumParts,
281 assert(NumParts > 0 &&
"No parts to assemble!");
289 unsigned NumIntermediates;
292 NumIntermediates, RegisterVT);
293 assert(NumRegs == NumParts &&
"Part count doesn't match vector breakdown!");
295 assert(RegisterVT == PartVT &&
"Part type doesn't match vector breakdown!");
298 "Part type sizes don't match!");
302 if (NumIntermediates == NumParts) {
305 for (
unsigned i = 0;
i != NumParts; ++
i)
307 PartVT, IntermediateVT, V);
308 }
else if (NumParts > 0) {
311 assert(NumParts % NumIntermediates == 0 &&
312 "Must expand into a divisible number of parts!");
313 unsigned Factor = NumParts / NumIntermediates;
314 for (
unsigned i = 0;
i != NumIntermediates; ++
i)
316 PartVT, IntermediateVT, V);
329 if (PartEVT == ValueVT)
339 "Cannot narrow, it would be a lossy transformation");
350 "Cannot handle this kind of promotion");
365 "non-trivial scalar-to-vector conversion");
384 SDValue *Parts,
unsigned NumParts,
MVT PartVT,
394 unsigned OrigNumParts = NumParts;
396 "Copying to an illegal type!");
402 EVT PartEVT = PartVT;
403 if (PartEVT == ValueVT) {
404 assert(NumParts == 1 &&
"No-op copy with multiple parts!");
412 assert(NumParts == 1 &&
"Do not know what to promote to!");
423 "Unknown mismatch!");
425 Val = DAG.
getNode(ExtendKind, DL, ValueVT, Val);
431 assert(NumParts == 1 && PartEVT != ValueVT);
437 "Unknown mismatch!");
447 "Failed to tile the value with PartVT!");
450 if (PartEVT != ValueVT) {
452 "scalar-to-vector conversion failed");
461 if (NumParts & (NumParts - 1)) {
464 "Do not know what to expand to!");
465 unsigned RoundParts = 1 <<
Log2_32(NumParts);
466 unsigned RoundBits = RoundParts * PartBits;
467 unsigned OddParts = NumParts - RoundParts;
470 getCopyToParts(DAG, DL, OddVal, Parts + RoundParts, OddParts, PartVT, V);
476 NumParts = RoundParts;
488 for (
unsigned StepSize = NumParts; StepSize > 1; StepSize /= 2) {
489 for (
unsigned i = 0;
i < NumParts;
i += StepSize) {
490 unsigned ThisBits = StepSize * PartBits / 2;
493 SDValue &Part1 = Parts[
i+StepSize/2];
500 if (ThisBits == PartBits && ThisVT != PartVT) {
522 EVT PartEVT = PartVT;
523 if (PartEVT == ValueVT) {
560 "Only trivial vector-to-scalar conversions should get here!");
575 unsigned NumIntermediates;
576 unsigned NumRegs = TLI.getVectorTypeBreakdown(*DAG.
getContext(), ValueVT,
578 NumIntermediates, RegisterVT);
581 assert(NumRegs == NumParts &&
"Part count doesn't match vector breakdown!");
583 assert(RegisterVT == PartVT &&
"Part type doesn't match vector breakdown!");
587 for (
unsigned i = 0;
i != NumIntermediates; ++
i) {
588 if (IntermediateVT.isVector())
591 DAG.
getConstant(
i * (NumElements / NumIntermediates), DL,
600 if (NumParts == NumIntermediates) {
603 for (
unsigned i = 0;
i != NumParts; ++
i)
605 }
else if (NumParts > 0) {
608 assert(NumIntermediates != 0 &&
"division by zero");
609 assert(NumParts % NumIntermediates == 0 &&
610 "Must expand into a divisible number of parts!");
611 unsigned Factor = NumParts / NumIntermediates;
612 for (
unsigned i = 0;
i != NumIntermediates; ++
i)
621 : ValueVTs(1, valuevt), RegVTs(1, regvt),
Regs(regs) {}
630 for (
unsigned i = 0;
i != NumRegs; ++
i)
632 RegVTs.push_back(RegisterVT);
661 for (
unsigned i = 0;
i != NumRegs; ++
i) {
688 if (NumZeroBits == RegSize) {
700 if (NumSignBits == RegSize) {
703 }
else if (NumZeroBits >= RegSize - 1) {
706 }
else if (NumSignBits > RegSize - 8) {
709 }
else if (NumZeroBits >= RegSize - 8) {
712 }
else if (NumSignBits > RegSize - 16) {
715 }
else if (NumZeroBits >= RegSize - 16) {
718 }
else if (NumSignBits > RegSize - 32) {
721 }
else if (NumZeroBits >= RegSize - 32) {
734 NumRegs, RegisterVT, ValueVT, V);
765 &Parts[Part], NumParts, RegisterVT, V, ExtendKind);
771 for (
unsigned i = 0;
i != NumRegs; ++
i) {
783 if (NumRegs == 1 || Flag)
794 Chain = Chains[NumRegs-1];
803 unsigned MatchingIdx,
const SDLoc &dl,
805 std::vector<SDValue> &Ops)
const {
830 for (
unsigned i = 0;
i != NumRegs; ++
i) {
861 UnusedArgNodeMap.clear();
863 PendingExports.clear();
877 DanglingDebugInfoMap.clear();
911 if (PendingExports.empty())
916 unsigned i = 0, e = PendingExports.size();
917 for (; i != e; ++
i) {
918 assert(PendingExports[i].getNode()->getNumOperands() > 1);
919 if (PendingExports[i].getNode()->getOperand(0) == Root)
924 PendingExports.push_back(Root);
929 PendingExports.clear();
936 if (isa<TerminatorInst>(&I)) {
937 HandlePHINodesInSuccessorBlocks(I.
getParent());
953 void SelectionDAGBuilder::visitPHI(
const PHINode &) {
963 #define HANDLE_INST(NUM, OPCODE, CLASS) \
964 case Instruction::OPCODE: visit##OPCODE((const CLASS&)I); break;
965 #include "llvm/IR/Instruction.def"
973 DanglingDebugInfo &DDI = DanglingDebugInfoMap[V];
977 unsigned DbgSDNodeOrder = DDI.getSDNodeOrder();
981 "Expected inlined-at fields to agree");
985 if (!EmitFuncArgumentDbgValue(V, Variable, Expr, dl, Offset,
false,
987 SDV = getDbgValue(Val, Variable, Expr, Offset, dl, DbgSDNodeOrder);
991 DEBUG(
dbgs() <<
"Dropping debug info for " << *DI <<
"\n");
992 DanglingDebugInfoMap[V] = DanglingDebugInfo();
1003 unsigned InReg = It->second;
1036 return (NodeMap.find(V) != NodeMap.end()) ||
1046 if (isa<ConstantSDNode>(N) || isa<ConstantFPSDNode>(
N)) {
1068 if (
const Constant *
C = dyn_cast<Constant>(V)) {
1077 if (isa<ConstantPointerNull>(
C)) {
1083 if (
const ConstantFP *CFP = dyn_cast<ConstantFP>(
C))
1090 visit(CE->getOpcode(), *CE);
1092 assert(N1.getNode() &&
"visit didn't populate the NodeMap!");
1096 if (isa<ConstantStruct>(
C) || isa<ConstantArray>(
C)) {
1113 dyn_cast<ConstantDataSequential>(
C)) {
1115 for (
unsigned i = 0, e = CDS->getNumElements();
i != e; ++
i) {
1123 if (isa<ArrayType>(CDS->getType()))
1129 if (
C->getType()->isStructTy() ||
C->getType()->isArrayTy()) {
1130 assert((isa<ConstantAggregateZero>(
C) || isa<UndefValue>(
C)) &&
1131 "Unknown struct or array constant!");
1135 unsigned NumElts = ValueVTs.
size();
1139 for (
unsigned i = 0;
i != NumElts; ++
i) {
1140 EVT EltVT = ValueVTs[
i];
1141 if (isa<UndefValue>(
C))
1162 for (
unsigned i = 0;
i != NumElements; ++
i)
1165 assert(isa<ConstantAggregateZero>(
C) &&
"Unknown vector constant!");
1174 Ops.
assign(NumElements, Op);
1183 if (
const AllocaInst *AI = dyn_cast<AllocaInst>(V)) {
1192 if (
const Instruction *Inst = dyn_cast<Instruction>(V)) {
1203 void SelectionDAGBuilder::visitCatchPad(
const CatchPadInst &
I) {
1209 if (IsMSVCCXX || IsCoreCLR)
1238 if (isa<ConstantTokenNone>(ParentPad))
1241 SuccessorColor = cast<Instruction>(ParentPad)->
getParent();
1242 assert(SuccessorColor &&
"No parent funclet for catchret!");
1244 assert(SuccessorColorMBB &&
"No MBB for SuccessorColor!");
1253 void SelectionDAGBuilder::visitCleanupPad(
const CleanupPadInst &CPI) {
1281 if (isa<LandingPadInst>(Pad)) {
1283 UnwindDests.emplace_back(FuncInfo.
MBBMap[EHPadBB], Prob);
1285 }
else if (isa<CleanupPadInst>(Pad)) {
1288 UnwindDests.emplace_back(FuncInfo.
MBBMap[EHPadBB], Prob);
1289 UnwindDests.
back().first->setIsEHFuncletEntry();
1291 }
else if (
auto *CatchSwitch = dyn_cast<CatchSwitchInst>(Pad)) {
1293 for (
const BasicBlock *CatchPadBB : CatchSwitch->handlers()) {
1294 UnwindDests.emplace_back(FuncInfo.
MBBMap[CatchPadBB], Prob);
1296 if (IsMSVCCXX || IsCoreCLR)
1297 UnwindDests.back().first->setIsEHFuncletEntry();
1299 NewEHPadBB = CatchSwitch->getUnwindDest();
1305 if (BPI && NewEHPadBB)
1307 EHPadBB = NewEHPadBB;
1321 for (
auto &UnwindDest : UnwindDests) {
1322 UnwindDest.first->setIsEHPad();
1323 addSuccessorWithProb(
FuncInfo.
MBB, UnwindDest.first, UnwindDest.second);
1333 void SelectionDAGBuilder::visitCatchSwitch(
const CatchSwitchInst &CSI) {
1337 void SelectionDAGBuilder::visitRet(
const ReturnInst &I) {
1368 DemoteReg, PtrValueVTs[0]);
1374 unsigned NumValues = ValueVTs.size();
1382 for (
unsigned i = 0;
i != NumValues; ++
i) {
1399 unsigned NumValues = ValueVTs.
size();
1417 for (
unsigned j = 0; j != NumValues; ++j) {
1418 EVT VT = ValueVTs[j];
1428 &Parts[0], NumParts, PartVT, &I, ExtendKind);
1441 for (
unsigned i = 0; i < NumParts; ++
i) {
1477 "LowerReturn didn't return a valid chain!");
1493 assert(!V->
use_empty() &&
"Unused value assigned virtual registers!");
1503 if (!isa<Instruction>(V) && !isa<Argument>(V))
return;
1518 if (
VI->getParent() == FromBB)
1527 if (isa<Argument>(V)) {
1549 auto SuccSize = std::max<uint32_t>(
1563 Prob = getEdgeProbability(Src, Dst);
1569 if (
const Instruction *I = dyn_cast<Instruction>(V))
1590 if (
const CmpInst *BOp = dyn_cast<CmpInst>(Cond)) {
1594 if (CurBB == SwitchBB ||
1598 if (
const ICmpInst *IC = dyn_cast<ICmpInst>(Cond)) {
1603 if (
TM.Options.NoNaNsFPMath)
1607 CaseBlock CB(Condition, BOp->getOperand(0), BOp->getOperand(1),
nullptr,
1608 TBB, FBB, CurBB, TProb, FProb);
1616 nullptr, TBB, FBB, CurBB, TProb, FProb);
1631 if (!BOp || !(isa<BinaryOperator>(BOp) || isa<CmpInst>(BOp)) ||
1668 auto NewTrueProb = TProb / 2;
1669 auto NewFalseProb = TProb / 2 + FProb;
1672 NewTrueProb, NewFalseProb);
1679 Probs[0], Probs[1]);
1701 auto NewTrueProb = TProb + FProb / 2;
1702 auto NewFalseProb = FProb / 2;
1705 NewTrueProb, NewFalseProb);
1712 Probs[0], Probs[1]);
1721 if (Cases.size() != 2)
return true;
1725 if ((Cases[0].CmpLHS == Cases[1].CmpLHS &&
1726 Cases[0].CmpRHS == Cases[1].CmpRHS) ||
1727 (Cases[0].CmpRHS == Cases[1].CmpLHS &&
1728 Cases[0].CmpLHS == Cases[1].CmpRHS)) {
1734 if (Cases[0].CmpRHS == Cases[1].CmpRHS &&
1735 Cases[0].CC == Cases[1].CC &&
1736 isa<Constant>(Cases[0].CmpRHS) &&
1737 cast<Constant>(Cases[0].CmpRHS)->isNullValue()) {
1738 if (Cases[0].CC ==
ISD::SETEQ && Cases[0].TrueBB == Cases[1].ThisBB)
1740 if (Cases[0].CC ==
ISD::SETNE && Cases[0].FalseBB == Cases[1].ThisBB)
1747 void SelectionDAGBuilder::visitBr(
const BranchInst &I) {
1788 if (
const BinaryOperator *BOp = dyn_cast<BinaryOperator>(CondVal)) {
1795 getEdgeProbability(BrMBB, Succ0MBB),
1796 getEdgeProbability(BrMBB, Succ1MBB));
1804 for (
unsigned i = 1, e =
SwitchCases.size(); i != e; ++
i) {
1817 for (
unsigned i = 1, e =
SwitchCases.size(); i != e; ++
i)
1826 nullptr, Succ0MBB, Succ1MBB, BrMBB);
1857 const APInt& Low = cast<ConstantInt>(CB.CmpLHS)->
getValue();
1863 if (cast<ConstantInt>(CB.CmpLHS)->isMinValue(
true)) {
1875 addSuccessorWithProb(SwitchBB, CB.TrueBB, CB.TrueProb);
1878 if (CB.TrueBB != CB.FalseBB)
1879 addSuccessorWithProb(SwitchBB, CB.FalseBB, CB.FalseProb);
1884 if (CB.TrueBB == NextBlock(SwitchBB)) {
1906 assert(JT.Reg != -1U &&
"Should lower JT Header first!");
1920 JumpTableHeader &JTH,
1940 unsigned JumpTableReg =
1943 JumpTableReg, SwitchOp);
1944 JT.Reg = JumpTableReg;
1959 if (JT.MBB != NextBlock(SwitchBB))
1975 DAG.
getMachineNode(TargetOpcode::LOAD_STACK_GUARD, DL, PtrTy, Chain);
2021 auto *Fn = cast<Function>(GuardCheck);
2023 assert(FnTy->getNumParams() == 1 &&
"Invalid function signature");
2027 Entry.
Node = StackSlot;
2028 Entry.
Ty = FnTy->getParamType(0);
2029 if (Fn->hasAttribute(1, Attribute::AttrKind::InReg))
2031 Args.push_back(Entry);
2036 .setCallee(Fn->getCallingConv(), FnTy->getReturnType(),
2037 getValue(GuardCheck), std::move(Args));
2039 std::pair<SDValue, SDValue> Result = TLI.
LowerCallTo(CLI);
2117 bool UsePtrType =
false;
2121 for (
unsigned i = 0, e = B.Cases.size(); i != e; ++
i)
2140 addSuccessorWithProb(SwitchBB, B.Default, B.DefaultProb);
2141 addSuccessorWithProb(SwitchBB, MBB, B.Prob);
2149 if (MBB != NextBlock(SwitchBB))
2169 if (PopCount == 1) {
2176 }
else if (PopCount == BB.Range) {
2196 addSuccessorWithProb(SwitchBB, B.TargetBB, B.ExtraProb);
2198 addSuccessorWithProb(SwitchBB, NextMBB, BranchProbToNext);
2209 if (NextMBB != NextBlock(SwitchBB))
2216 void SelectionDAGBuilder::visitInvoke(
const InvokeInst &I) {
2228 "Cannot lower invokes with arbitrary operand bundles yet!");
2232 if (isa<InlineAsm>(Callee))
2234 else if (Fn && Fn->isIntrinsic()) {
2235 switch (Fn->getIntrinsicID()) {
2238 case Intrinsic::donothing:
2241 case Intrinsic::experimental_patchpoint_void:
2242 case Intrinsic::experimental_patchpoint_i64:
2243 visitPatchpoint(&I, EHPadBB);
2245 case Intrinsic::experimental_gc_statepoint:
2254 LowerCallSiteWithDeoptBundle(&I, getValue(Callee), EHPadBB);
2256 LowerCallTo(&I, getValue(Callee),
false, EHPadBB);
2264 CopyToExportRegsIfNeeded(&I);
2275 addSuccessorWithProb(InvokeMBB, Return);
2276 for (
auto &UnwindDest : UnwindDests) {
2277 UnwindDest.first->setIsEHPad();
2278 addSuccessorWithProb(InvokeMBB, UnwindDest.first, UnwindDest.second);
2283 DAG.setRoot(DAG.getNode(
ISD::BR, getCurSDLoc(),
2285 DAG.getBasicBlock(Return)));
2288 void SelectionDAGBuilder::visitResume(
const ResumeInst &RI) {
2289 llvm_unreachable(
"SelectionDAGBuilder shouldn't visit resume instructions!");
2292 void SelectionDAGBuilder::visitLandingPad(
const LandingPadInst &LP) {
2294 "Call to landingpad not in landing pad!");
2317 assert(ValueVTs.
size() == 2 &&
"Only two-valued landingpads are supported");
2343 void SelectionDAGBuilder::sortAndRangeify(CaseClusterVector &Clusters) {
2345 for (
const CaseCluster &CC : Clusters)
2346 assert(CC.Low == CC.High &&
"Input clusters must be single-case");
2349 std::sort(Clusters.begin(), Clusters.end(),
2350 [](
const CaseCluster &a,
const CaseCluster &b) {
2351 return a.Low->getValue().slt(b.Low->getValue());
2355 const unsigned N = Clusters.size();
2356 unsigned DstIndex = 0;
2357 for (
unsigned SrcIndex = 0; SrcIndex <
N; ++SrcIndex) {
2358 CaseCluster &CC = Clusters[SrcIndex];
2362 if (DstIndex != 0 && Clusters[DstIndex - 1].MBB == Succ &&
2363 (CaseVal->
getValue() - Clusters[DstIndex - 1].High->getValue()) == 1) {
2366 Clusters[DstIndex - 1].High = CaseVal;
2367 Clusters[DstIndex - 1].Prob += CC.Prob;
2369 std::memmove(&Clusters[DstIndex++], &Clusters[SrcIndex],
2370 sizeof(Clusters[SrcIndex]));
2373 Clusters.resize(DstIndex);
2379 for (
unsigned i = 0, e =
JTCases.size(); i != e; ++
i)
2380 if (
JTCases[i].first.HeaderBB == First)
2389 void SelectionDAGBuilder::visitIndirectBr(
const IndirectBrInst &I) {
2396 bool Inserted = Done.
insert(BB).second;
2401 addSuccessorWithProb(IndirectBrMBB, Succ);
2410 void SelectionDAGBuilder::visitUnreachable(
const UnreachableInst &I) {
2416 void SelectionDAGBuilder::visitFSub(
const User &I) {
2441 case Instruction::Mul:
2446 case Instruction::FAdd:
2447 case Instruction::FMul:
2448 if (
const FPMathOperator *FPOp = dyn_cast<const FPMathOperator>(Inst))
2449 if (FPOp->getFastMathFlags().unsafeAlgebra())
2457 unsigned ElemNumToReduce = ElemNum;
2480 bool ReduxExtracted =
false;
2482 while (!UsersToVisit.empty()) {
2483 auto User = UsersToVisit.back();
2484 UsersToVisit.pop_back();
2493 if (Inst->
getOpcode() == OpCode || isa<PHINode>(U)) {
2494 if (
const FPMathOperator *FPOp = dyn_cast<const FPMathOperator>(Inst))
2495 if (!isa<PHINode>(FPOp) && !FPOp->getFastMathFlags().unsafeAlgebra())
2497 UsersToVisit.push_back(U);
2499 dyn_cast<ShuffleVectorInst>(U)) {
2506 if (ResultElements < ElemNum)
2509 if (ElemNumToReduce == 1)
2511 if (!isa<UndefValue>(U->getOperand(1)))
2513 for (
unsigned i = 0; i < ElemNumToReduce / 2; ++
i)
2514 if (ShufInst->getMaskValue(i) != int(i + ElemNumToReduce / 2))
2516 for (
unsigned i = ElemNumToReduce / 2; i < ElemNum; ++
i)
2517 if (ShufInst->getMaskValue(i) != -1)
2522 if (!U->hasOneUse())
2526 if (!U2 || U2->getOpcode() != OpCode)
2530 if ((U2->getOperand(0) == U->getOperand(0) && U2->getOperand(1) == U) ||
2531 (U2->getOperand(1) == U->getOperand(0) && U2->getOperand(0) == U)) {
2532 UsersToVisit.push_back(U2);
2533 ElemNumToReduce /= 2;
2536 }
else if (isa<ExtractElementInst>(U)) {
2538 if (ElemNumToReduce != 1)
2545 ReduxExtracted =
true;
2550 return ReduxExtracted;
2553 void SelectionDAGBuilder::visitBinary(
const User &I,
unsigned OpCode) {
2560 bool vec_redux =
false;
2564 dyn_cast<const OverflowingBinaryOperator>(&I)) {
2565 nuw = OFBinOp->hasNoUnsignedWrap();
2566 nsw = OFBinOp->hasNoSignedWrap();
2569 dyn_cast<const PossiblyExactOperator>(&I))
2570 exact = ExactOp->isExact();
2571 if (
const FPMathOperator *FPOp = dyn_cast<const FPMathOperator>(&I))
2572 FMF = FPOp->getFastMathFlags();
2576 DEBUG(
dbgs() <<
"Detected a reduction operation:" << I <<
"\n");
2596 void SelectionDAGBuilder::visitShift(
const User &I,
unsigned Opcode) {
2606 unsigned Op2Size = Op2.getValueSizeInBits();
2610 if (ShiftSize > Op2Size)
2617 else if (ShiftSize >=
Log2_32_Ceil(Op2.getValueSizeInBits()))
2632 dyn_cast<const OverflowingBinaryOperator>(&I)) {
2633 nuw = OFBinOp->hasNoUnsignedWrap();
2634 nsw = OFBinOp->hasNoSignedWrap();
2637 dyn_cast<const PossiblyExactOperator>(&I))
2638 exact = ExactOp->isExact();
2649 void SelectionDAGBuilder::visitSDiv(
const User &I) {
2654 Flags.setExact(isa<PossiblyExactOperator>(&I) &&
2655 cast<PossiblyExactOperator>(&I)->isExact());
2660 void SelectionDAGBuilder::visitICmp(
const User &I) {
2662 if (
const ICmpInst *IC = dyn_cast<ICmpInst>(&I))
2663 predicate = IC->getPredicate();
2664 else if (
const ConstantExpr *IC = dyn_cast<ConstantExpr>(&I))
2675 void SelectionDAGBuilder::visitFCmp(
const User &I) {
2677 if (
const FCmpInst *
FC = dyn_cast<FCmpInst>(&I))
2678 predicate =
FC->getPredicate();
2688 if (
TM.Options.NoNaNsFPMath)
2699 return isa<SelectInst>(V);
2703 void SelectionDAGBuilder::visitSelect(
const User &I) {
2707 unsigned NumValues = ValueVTs.
size();
2708 if (NumValues == 0)
return;
2714 auto BaseOps = {Cond};
2720 EVT VT = ValueVTs[0];
2733 bool UseScalarMinMax = VT.
isVector() &&
2739 switch (SPR.Flavor) {
2745 switch (SPR.NaNBehavior) {
2754 else if (UseScalarMinMax)
2762 switch (SPR.NaNBehavior) {
2772 else if (UseScalarMinMax)
2796 for (
unsigned i = 0; i != NumValues; ++
i) {
2799 Ops.push_back(
SDValue(RHSVal.getNode(), RHSVal.getResNo() +
i));
2801 LHSVal.getNode()->getValueType(LHSVal.getResNo()+
i),
2809 void SelectionDAGBuilder::visitTrunc(
const User &I) {
2817 void SelectionDAGBuilder::visitZExt(
const User &I) {
2826 void SelectionDAGBuilder::visitSExt(
const User &I) {
2835 void SelectionDAGBuilder::visitFPTrunc(
const User &I) {
2846 void SelectionDAGBuilder::visitFPExt(
const User &I) {
2854 void SelectionDAGBuilder::visitFPToUI(
const User &I) {
2862 void SelectionDAGBuilder::visitFPToSI(
const User &I) {
2870 void SelectionDAGBuilder::visitUIToFP(
const User &I) {
2878 void SelectionDAGBuilder::visitSIToFP(
const User &I) {
2886 void SelectionDAGBuilder::visitPtrToInt(
const User &I) {
2895 void SelectionDAGBuilder::visitIntToPtr(
const User &I) {
2904 void SelectionDAGBuilder::visitBitCast(
const User &I) {
2926 void SelectionDAGBuilder::visitAddrSpaceCast(
const User &I) {
2941 void SelectionDAGBuilder::visitInsertElement(
const User &I) {
2949 InVec, InVal, InIdx));
2952 void SelectionDAGBuilder::visitExtractElement(
const User &I) {
2962 void SelectionDAGBuilder::visitShuffleVector(
const User &I) {
2969 unsigned MaskNumElts = Mask.
size();
2976 if (SrcNumElts == MaskNumElts) {
2982 if (SrcNumElts < MaskNumElts) {
2986 if (MaskNumElts % SrcNumElts == 0) {
2990 unsigned NumConcat = MaskNumElts / SrcNumElts;
2991 bool IsConcat =
true;
2993 for (
unsigned i = 0; i != MaskNumElts; ++
i) {
2999 if ((Idx % SrcNumElts != (i % SrcNumElts)) ||
3000 (ConcatSrcs[i / SrcNumElts] >= 0 &&
3001 ConcatSrcs[i / SrcNumElts] != (
int)(Idx / SrcNumElts))) {
3006 ConcatSrcs[i / SrcNumElts] = Idx / SrcNumElts;
3013 for (
auto Src : ConcatSrcs) {
3026 unsigned PaddedMaskNumElts =
alignTo(MaskNumElts, SrcNumElts);
3027 unsigned NumConcat = PaddedMaskNumElts / SrcNumElts;
3048 for (
unsigned i = 0; i != MaskNumElts; ++
i) {
3050 if (Idx >= (
int)SrcNumElts)
3051 Idx -= SrcNumElts - PaddedMaskNumElts;
3059 if (MaskNumElts != PaddedMaskNumElts)
3068 if (SrcNumElts > MaskNumElts) {
3072 int MinRange[2] = {
static_cast<int>(SrcNumElts),
3073 static_cast<int>(SrcNumElts)};
3074 int MaxRange[2] = {-1, -1};
3076 for (
unsigned i = 0; i != MaskNumElts; ++
i) {
3082 if (Idx >= (
int)SrcNumElts) {
3086 if (Idx > MaxRange[Input])
3087 MaxRange[Input] = Idx;
3088 if (Idx < MinRange[Input])
3089 MinRange[Input] = Idx;
3094 int RangeUse[2] = { -1, -1 };
3097 for (
unsigned Input = 0; Input < 2; ++Input) {
3098 if (MinRange[Input] >= (
int)SrcNumElts && MaxRange[Input] < 0) {
3099 RangeUse[Input] = 0;
3100 StartIdx[Input] = 0;
3106 StartIdx[Input] = (MinRange[Input]/MaskNumElts)*MaskNumElts;
3107 if (MaxRange[Input] - StartIdx[Input] < (
int)MaskNumElts &&
3108 StartIdx[Input] + MaskNumElts <= SrcNumElts)
3109 RangeUse[Input] = 1;
3112 if (RangeUse[0] == 0 && RangeUse[1] == 0) {
3116 if (RangeUse[0] >= 0 && RangeUse[1] >= 0) {
3118 for (
unsigned Input = 0; Input < 2; ++Input) {
3119 SDValue &Src = Input == 0 ? Src1 : Src2;
3120 if (RangeUse[Input] == 0)
3132 for (
unsigned i = 0; i != MaskNumElts; ++
i) {
3135 if (Idx < (
int)SrcNumElts)
3138 Idx -= SrcNumElts + StartIdx[1] - MaskNumElts;
3154 for (
unsigned i = 0; i != MaskNumElts; ++
i) {
3161 SDValue &Src = Idx < (int)SrcNumElts ? Src1 : Src2;
3162 if (Idx >= (
int)SrcNumElts) Idx -= SrcNumElts;
3174 void SelectionDAGBuilder::visitInsertValue(
const InsertValueInst &I) {
3179 bool IntoUndef = isa<UndefValue>(Op0);
3180 bool FromUndef = isa<UndefValue>(Op1);
3190 unsigned NumAggValues = AggValueVTs.
size();
3191 unsigned NumValValues = ValValueVTs.size();
3195 if (!NumAggValues) {
3203 for (; i != LinearIndex; ++
i)
3204 Values[i] = IntoUndef ?
DAG.
getUNDEF(AggValueVTs[i]) :
3209 for (; i != LinearIndex + NumValValues; ++
i)
3210 Values[i] = FromUndef ?
DAG.
getUNDEF(AggValueVTs[i]) :
3214 for (; i != NumAggValues; ++
i)
3215 Values[i] = IntoUndef ?
DAG.
getUNDEF(AggValueVTs[i]) :
3226 bool OutOfUndef = isa<UndefValue>(Op0);
3234 unsigned NumValValues = ValValueVTs.
size();
3237 if (!NumValValues) {
3246 for (
unsigned i = LinearIndex; i != LinearIndex + NumValValues; ++
i)
3247 Values[i - LinearIndex] =
3256 void SelectionDAGBuilder::visitGetElementPtr(
const User &I) {
3267 cast<VectorType>(I.
getType())->getVectorNumElements() : 0;
3277 const Value *Idx = GTI.getOperand();
3278 if (
StructType *StTy = GTI.getStructTypeOrNull()) {
3279 unsigned Field = cast<Constant>(Idx)->getUniqueInteger().getZExtValue();
3282 uint64_t
Offset = DL->getStructLayout(StTy)->getElementOffset(Field);
3287 if (int64_t(Offset) >= 0 && cast<GEPOperator>(I).isInBounds())
3297 APInt ElementSize(PtrSize, DL->getTypeAllocSize(GTI.getIndexedType()));
3302 if (!CI && isa<ConstantDataVector>(Idx) &&
3304 CI = cast<ConstantInt>(cast<ConstantDataVector>(Idx)->getSplatValue());
3311 SDValue OffsVal = VectorWidth ?
3339 if (ElementSize != 1) {
3340 if (ElementSize.isPowerOf2()) {
3341 unsigned Amt = ElementSize.logBase2();
3343 N.getValueType(), IdxN,
3348 N.getValueType(), IdxN, Scale);
3353 N.getValueType(),
N, IdxN);
3360 void SelectionDAGBuilder::visitAlloca(
const AllocaInst &I) {
3372 std::max((
unsigned)DL.getPrefTypeAlignment(Ty), I.
getAlignment());
3377 if (AllocSize.getValueType() != IntPtr)
3387 unsigned StackAlign =
3389 if (Align <= StackAlign)
3398 AllocSize.getValueType(), AllocSize,
3403 AllocSize.getValueType(), AllocSize,
3416 void SelectionDAGBuilder::visitLoad(
const LoadInst &I) {
3418 return visitAtomicLoad(I);
3425 if (
const Argument *Arg = dyn_cast<Argument>(SV)) {
3426 if (Arg->hasSwiftErrorAttr())
3427 return visitLoadFromSwiftError(I);
3430 if (
const AllocaInst *Alloca = dyn_cast<AllocaInst>(SV)) {
3431 if (Alloca->isSwiftError())
3432 return visitLoadFromSwiftError(I);
3453 unsigned NumValues = ValueVTs.size();
3458 bool ConstantMemory =
false;
3466 ConstantMemory =
true;
3485 unsigned ChainI = 0;
3486 for (
unsigned i = 0; i != NumValues; ++
i, ++ChainI) {
3511 if (isDereferenceable)
3516 MMOFlags, AAInfo, Ranges);
3522 if (!ConstantMemory) {
3535 void SelectionDAGBuilder::visitStoreToSwiftError(
const StoreInst &I) {
3538 "call visitStoreToSwiftError when backend supports swifterror");
3545 assert(ValueVTs.size() == 1 && Offsets[0] == 0 &&
3546 "expect a single EVT for swifterror");
3556 SDValue(Src.getNode(), Src.getResNo()));
3561 void SelectionDAGBuilder::visitLoadFromSwiftError(
const LoadInst &I) {
3563 "call visitLoadFromSwiftError when backend supports swifterror");
3568 "Support volatile, non temporal, invariant for load_from_swift_error");
3576 "load_from_swift_error should not be constant memory");
3582 assert(ValueVTs.size() == 1 && Offsets[0] == 0 &&
3583 "expect a single EVT for swifterror");
3593 void SelectionDAGBuilder::visitStore(
const StoreInst &I) {
3595 return visitAtomicStore(I);
3604 if (
const Argument *Arg = dyn_cast<Argument>(PtrV)) {
3605 if (Arg->hasSwiftErrorAttr())
3606 return visitStoreToSwiftError(I);
3609 if (
const AllocaInst *Alloca = dyn_cast<AllocaInst>(PtrV)) {
3610 if (Alloca->isSwiftError())
3611 return visitStoreToSwiftError(I);
3619 unsigned NumValues = ValueVTs.
size();
3648 unsigned ChainI = 0;
3649 for (
unsigned i = 0; i != NumValues; ++
i, ++ChainI) {
3662 Chains[ChainI] = St;
3670 void SelectionDAGBuilder::visitMaskedStore(
const CallInst &I,
3671 bool IsCompressing) {
3675 unsigned& Alignment) {
3679 Alignment = cast<ConstantInt>(I.
getArgOperand(2))->getZExtValue();
3683 unsigned& Alignment) {
3691 Value *PtrOperand, *MaskOperand, *Src0Operand;
3694 getCompressingStoreOps(PtrOperand, MaskOperand, Src0Operand, Alignment);
3696 getMaskedStoreOps(PtrOperand, MaskOperand, Src0Operand, Alignment);
3745 if (!GEP || GEP->getNumOperands() > 2)
3748 const Value *GEPPtr = GEP->getPointerOperand();
3754 Value *IndexVal = GEP->getOperand(1);
3765 if (
SExtInst* Sext = dyn_cast<SExtInst>(IndexVal)) {
3766 if (SDB->
findValue(Sext->getOperand(0))) {
3767 IndexVal = Sext->getOperand(0);
3772 unsigned GEPWidth = GEP->getType()->getVectorNumElements();
3779 void SelectionDAGBuilder::visitMaskedScatter(
const CallInst &I) {
3787 unsigned Alignment = (cast<ConstantInt>(I.
getArgOperand(2)))->getZExtValue();
3800 const Value *MemOpBasePtr = UniformBase ? BasePtr :
nullptr;
3816 void SelectionDAGBuilder::visitMaskedLoad(
const CallInst &I,
bool IsExpanding) {
3820 unsigned& Alignment) {
3823 Alignment = cast<ConstantInt>(I.
getArgOperand(1))->getZExtValue();
3828 unsigned& Alignment) {
3836 Value *PtrOperand, *MaskOperand, *Src0Operand;
3839 getExpandingLoadOps(PtrOperand, MaskOperand, Src0Operand, Alignment);
3841 getMaskedLoadOps(PtrOperand, MaskOperand, Src0Operand, Alignment);
3864 Alignment, AAInfo, Ranges);
3875 void SelectionDAGBuilder::visitMaskedGather(
const CallInst &I) {
3885 unsigned Alignment = (cast<ConstantInt>(I.
getArgOperand(1)))->getZExtValue();
3898 bool ConstantMemory =
false;
3905 ConstantMemory =
true;
3912 Alignment, AAInfo, Ranges);
3918 SDValue Ops[] = { Root, Src0,
Mask, Base, Index };
3923 if (!ConstantMemory)
3942 0, SuccessOrder, FailureOrder, Scope);
3950 void SelectionDAGBuilder::visitAtomicRMW(
const AtomicRMWInst &I) {
3987 void SelectionDAGBuilder::visitFence(
const FenceInst &I) {
3999 void SelectionDAGBuilder::visitAtomicLoad(
const LoadInst &I) {
4033 void SelectionDAGBuilder::visitAtomicStore(
const StoreInst &I) {
4061 void SelectionDAGBuilder::visitTargetIntrinsic(
const CallInst &I,
4062 unsigned Intrinsic) {
4082 TargetLowering::IntrinsicInfo Info;
4108 if (IsTgtIntrinsic) {
4111 VTs, Ops, Info.memVT,
4113 Info.align, Info.vol,
4114 Info.readMem, Info.writeMem, Info.size);
4115 }
else if (!HasChain) {
4197 SDValue TwoToFractionalPartOfX;
4314 if (LimitFloatPrecision <= 6) {
4329 }
else if (LimitFloatPrecision <= 12) {
4413 if (LimitFloatPrecision <= 6) {
4426 }
else if (LimitFloatPrecision <= 12) {
4511 if (LimitFloatPrecision <= 6) {
4526 }
else if (LimitFloatPrecision <= 12) {
4597 bool IsExp10 =
false;
4602 IsExp10 = LHSC->isExactlyValue(Ten);
4632 unsigned Val = RHSC->getSExtValue();
4633 if ((
int)Val < 0) Val = -Val;
4661 CurSquare, CurSquare);
4666 if (RHSC->getSExtValue() < 0)
4696 bool SelectionDAGBuilder::EmitFuncArgumentDbgValue(
4740 dyn_cast<FrameIndexSDNode>(LNode->getBasePtr().getNode()))
4747 "Expected inlined-at fields to agree");
4750 BuildMI(MF, DL, TII->
get(TargetOpcode::DBG_VALUE), IsIndirect,
4754 BuildMI(MF, DL, TII->
get(TargetOpcode::DBG_VALUE))
4757 .addMetadata(Variable)
4758 .addMetadata(Expr));
4768 unsigned DbgSDNodeOrder) {
4779 int FI = FISDN->getIndex();
4784 Offset, dl, DbgSDNodeOrder);
4790 #if defined(_MSC_VER) && defined(setjmp) && \
4791 !defined(setjmp_undefined_for_msvc)
4792 # pragma push_macro("setjmp")
4794 # define setjmp_undefined_for_msvc
4801 SelectionDAGBuilder::visitIntrinsicCall(
const CallInst &I,
unsigned Intrinsic) {
4807 switch (Intrinsic) {
4810 visitTargetIntrinsic(I, Intrinsic);
4812 case Intrinsic::vastart: visitVAStart(I);
return nullptr;
4813 case Intrinsic::vaend: visitVAEnd(I);
return nullptr;
4814 case Intrinsic::vacopy: visitVACopy(I);
return nullptr;
4815 case Intrinsic::returnaddress:
4820 case Intrinsic::addressofreturnaddress:
4824 case Intrinsic::frameaddress:
4829 case Intrinsic::read_register: {
4833 DAG.
getMDNode(cast<MDNode>(cast<MetadataAsValue>(Reg)->getMetadata()));
4841 case Intrinsic::write_register: {
4846 DAG.
getMDNode(cast<MDNode>(cast<MetadataAsValue>(Reg)->getMetadata()));
4851 case Intrinsic::setjmp:
4853 case Intrinsic::longjmp:
4855 case Intrinsic::memcpy: {
4859 unsigned Align = cast<ConstantInt>(I.
getArgOperand(3))->getZExtValue();
4862 bool isVol = cast<ConstantInt>(I.
getArgOperand(4))->getZExtValue();
4868 updateDAGForMaybeTailCall(MC);
4871 case Intrinsic::memset: {
4875 unsigned Align = cast<ConstantInt>(I.
getArgOperand(3))->getZExtValue();
4878 bool isVol = cast<ConstantInt>(I.
getArgOperand(4))->getZExtValue();
4882 updateDAGForMaybeTailCall(MS);
4885 case Intrinsic::memmove: {
4889 unsigned Align = cast<ConstantInt>(I.
getArgOperand(3))->getZExtValue();
4892 bool isVol = cast<ConstantInt>(I.
getArgOperand(4))->getZExtValue();
4897 updateDAGForMaybeTailCall(MM);
4900 case Intrinsic::memcpy_element_atomic: {
4911 Args.push_back(Entry);
4914 Args.push_back(Entry);
4917 Entry.
Node = NumElements;
4918 Args.push_back(Entry);
4921 Entry.
Node = ElementSize;
4922 Args.push_back(Entry);
4924 uint64_t ElementSizeConstant =
4932 CLI.setDebugLoc(sdl)
4941 std::pair<SDValue, SDValue> CallResult = TLI.
LowerCallTo(CLI);
4945 case Intrinsic::dbg_declare: {
4950 assert(Variable &&
"Missing variable");
4952 DEBUG(
dbgs() <<
"Dropping debug info for " << DI <<
"\n");
4957 if (isa<UndefValue>(Address) ||
4959 DEBUG(
dbgs() <<
"Dropping debug info for " << DI <<
"\n");
4966 N = UnusedArgNodeMap[
Address];
4969 if (
const BitCastInst *BCI = dyn_cast<BitCastInst>(Address))
4970 Address = BCI->getOperand(0);
4972 bool isParameter = Variable->isParameter() || isa<Argument>(
Address);
4974 if (isParameter && FINode) {
4977 FINode->getIndex(), 0, dl, SDNodeOrder);
4978 }
else if (isa<Argument>(Address)) {
4981 EmitFuncArgumentDbgValue(Address, Variable, Expression, dl, 0,
false,
4986 true, 0, dl, SDNodeOrder);
4992 if (!EmitFuncArgumentDbgValue(Address, Variable, Expression, dl, 0,
false,
4996 if (
const AllocaInst *AI = dyn_cast<AllocaInst>(Address)) {
4997 if (AI->getParent() != DI.
getParent()) {
5002 0, dl, SDNodeOrder);
5008 DEBUG(
dbgs() <<
"Dropping debug info for " << DI <<
"\n");
5013 case Intrinsic::dbg_value: {
5025 if (isa<ConstantInt>(V) || isa<ConstantFP>(V) || isa<UndefValue>(V)) {
5033 if (!N.
getNode() && isa<Argument>(V))
5035 N = UnusedArgNodeMap[V];
5037 if (!EmitFuncArgumentDbgValue(V, Variable, Expression, dl, Offset,
5039 SDV = getDbgValue(N, Variable, Expression, Offset, dl, SDNodeOrder);
5045 DanglingDebugInfo DDI(&DI, dl, SDNodeOrder);
5046 DanglingDebugInfoMap[V] = DDI;
5050 DEBUG(
dbgs() <<
"Dropping debug info for " << DI <<
"\n");
5055 if (
const BitCastInst *BCI = dyn_cast<BitCastInst>(V))
5056 V = BCI->getOperand(0);
5060 DEBUG(
dbgs() <<
"Dropping debug location info for:\n " << DI <<
"\n");
5061 DEBUG(
dbgs() <<
" Last seen at:\n " << *V <<
"\n");
5071 case Intrinsic::eh_typeid_for: {
5080 case Intrinsic::eh_return_i32:
5081 case Intrinsic::eh_return_i64:
5089 case Intrinsic::eh_unwind_init:
5092 case Intrinsic::eh_dwarf_cfa: {
5098 case Intrinsic::eh_sjlj_callsite: {
5101 assert(CI &&
"Non-constant call site value in eh.sjlj.callsite!");
5107 case Intrinsic::eh_sjlj_functioncontext: {
5116 case Intrinsic::eh_sjlj_setjmp: {
5126 case Intrinsic::eh_sjlj_longjmp: {
5131 case Intrinsic::eh_sjlj_setup_dispatch: {
5137 case Intrinsic::masked_gather:
5138 visitMaskedGather(I);
5140 case Intrinsic::masked_load:
5143 case Intrinsic::masked_scatter:
5144 visitMaskedScatter(I);
5146 case Intrinsic::masked_store:
5147 visitMaskedStore(I);
5149 case Intrinsic::masked_expandload:
5150 visitMaskedLoad(I,
true );
5152 case Intrinsic::masked_compressstore:
5153 visitMaskedStore(I,
true );
5155 case Intrinsic::x86_mmx_pslli_w:
5156 case Intrinsic::x86_mmx_pslli_d:
5157 case Intrinsic::x86_mmx_pslli_q:
5158 case Intrinsic::x86_mmx_psrli_w:
5159 case Intrinsic::x86_mmx_psrli_d:
5160 case Intrinsic::x86_mmx_psrli_q:
5161 case Intrinsic::x86_mmx_psrai_w:
5162 case Intrinsic::x86_mmx_psrai_d: {
5164 if (isa<ConstantSDNode>(ShAmt)) {
5165 visitTargetIntrinsic(I, Intrinsic);
5168 unsigned NewIntrinsic = 0;
5170 switch (Intrinsic) {
5171 case Intrinsic::x86_mmx_pslli_w:
5172 NewIntrinsic = Intrinsic::x86_mmx_psll_w;
5174 case Intrinsic::x86_mmx_pslli_d:
5175 NewIntrinsic = Intrinsic::x86_mmx_psll_d;
5177 case Intrinsic::x86_mmx_pslli_q:
5178 NewIntrinsic = Intrinsic::x86_mmx_psll_q;
5180 case Intrinsic::x86_mmx_psrli_w:
5181 NewIntrinsic = Intrinsic::x86_mmx_psrl_w;
5183 case Intrinsic::x86_mmx_psrli_d:
5184 NewIntrinsic = Intrinsic::x86_mmx_psrl_d;
5186 case Intrinsic::x86_mmx_psrli_q:
5187 NewIntrinsic = Intrinsic::x86_mmx_psrl_q;
5189 case Intrinsic::x86_mmx_psrai_w:
5190 NewIntrinsic = Intrinsic::x86_mmx_psra_w;
5192 case Intrinsic::x86_mmx_psrai_d:
5193 NewIntrinsic = Intrinsic::x86_mmx_psra_d;
5214 case Intrinsic::powi:
5218 case Intrinsic::log:
5221 case Intrinsic::log2:
5224 case Intrinsic::log10:
5227 case Intrinsic::exp:
5230 case Intrinsic::exp2:
5233 case Intrinsic::pow:
5237 case Intrinsic::sqrt:
5238 case Intrinsic::fabs:
5239 case Intrinsic::sin:
5240 case Intrinsic::cos:
5241 case Intrinsic::floor:
5242 case Intrinsic::ceil:
5243 case Intrinsic::trunc:
5244 case Intrinsic::rint:
5245 case Intrinsic::nearbyint:
5247 case Intrinsic::canonicalize: {
5249 switch (Intrinsic) {
5251 case Intrinsic::sqrt: Opcode =
ISD::FSQRT;
break;
5252 case Intrinsic::fabs: Opcode =
ISD::FABS;
break;
5253 case Intrinsic::sin: Opcode =
ISD::FSIN;
break;
5254 case Intrinsic::cos: Opcode =
ISD::FCOS;
break;
5255 case Intrinsic::floor: Opcode =
ISD::FFLOOR;
break;
5256 case Intrinsic::ceil: Opcode =
ISD::FCEIL;
break;
5257 case Intrinsic::trunc: Opcode =
ISD::FTRUNC;
break;
5258 case Intrinsic::rint: Opcode =
ISD::FRINT;
break;
5291 case Intrinsic::copysign:
5297 case Intrinsic::fma:
5304 case Intrinsic::fmuladd: {
5327 case Intrinsic::convert_to_fp16:
5334 case Intrinsic::convert_from_fp16:
5340 case Intrinsic::pcmarker: {
5345 case Intrinsic::readcyclecounter: {
5353 case Intrinsic::bitreverse:
5358 case Intrinsic::bswap:
5363 case Intrinsic::cttz: {
5371 case Intrinsic::ctlz: {
5379 case Intrinsic::ctpop: {
5385 case Intrinsic::stacksave: {
5394 case Intrinsic::stackrestore: {
5399 case Intrinsic::get_dynamic_area_offset: {
5414 case Intrinsic::stackguard: {
5423 unsigned Align = DL->getPrefTypeAlignment(Global->
getType());
5432 case Intrinsic::stackprotector: {
5459 case Intrinsic::objectsize: {
5463 assert(CI &&
"Non-constant type in __builtin_object_size?");
5476 case Intrinsic::annotation:
5477 case Intrinsic::ptr_annotation:
5478 case Intrinsic::invariant_group_barrier:
5482 case Intrinsic::assume:
5483 case Intrinsic::var_annotation:
5487 case Intrinsic::init_trampoline: {
5503 case Intrinsic::adjust_trampoline: {
5509 case Intrinsic::gcroot: {
5514 "only valid in functions with gc specified, enforced by Verifier");
5523 case Intrinsic::gcread:
5524 case Intrinsic::gcwrite:
5526 case Intrinsic::flt_rounds:
5530 case Intrinsic::expect: {
5536 case Intrinsic::debugtrap:
5537 case Intrinsic::trap: {
5542 if (TrapFuncName.
empty()) {
5551 CLI.setDebugLoc(sdl).setChain(
getRoot()).setCallee(
5557 std::pair<SDValue, SDValue> Result = TLI.
LowerCallTo(CLI);
5562 case Intrinsic::uadd_with_overflow:
5563 case Intrinsic::sadd_with_overflow:
5564 case Intrinsic::usub_with_overflow:
5565 case Intrinsic::ssub_with_overflow:
5566 case Intrinsic::umul_with_overflow:
5567 case Intrinsic::smul_with_overflow: {
5569 switch (Intrinsic) {
5571 case Intrinsic::uadd_with_overflow: Op =
ISD::UADDO;
break;
5572 case Intrinsic::sadd_with_overflow: Op =
ISD::SADDO;
break;
5573 case Intrinsic::usub_with_overflow: Op =
ISD::USUBO;
break;
5574 case Intrinsic::ssub_with_overflow: Op =
ISD::SSUBO;
break;
5575 case Intrinsic::umul_with_overflow: Op =
ISD::UMULO;
break;
5576 case Intrinsic::smul_with_overflow: Op =
ISD::SMULO;
break;
5587 unsigned rw = cast<ConstantInt>(I.
getArgOperand(1))->getZExtValue();
5603 case Intrinsic::lifetime_start:
5604 case Intrinsic::lifetime_end: {
5605 bool IsStart = (Intrinsic == Intrinsic::lifetime_start);
5614 E = Allocas.
end(); Object !=
E; ++Object) {
5615 AllocaInst *LifetimeObject = dyn_cast_or_null<AllocaInst>(*Object);
5618 if (!LifetimeObject)
5627 int FI = SI->second;
5640 case Intrinsic::invariant_start:
5644 case Intrinsic::invariant_end:
5647 case Intrinsic::clear_cache:
5649 case Intrinsic::donothing:
5652 case Intrinsic::experimental_stackmap: {
5656 case Intrinsic::experimental_patchpoint_void:
5657 case Intrinsic::experimental_patchpoint_i64: {
5658 visitPatchpoint(&I);
5661 case Intrinsic::experimental_gc_statepoint: {
5665 case Intrinsic::experimental_gc_result: {
5666 visitGCResult(cast<GCResultInst>(I));
5669 case Intrinsic::experimental_gc_relocate: {
5670 visitGCRelocate(cast<GCRelocateInst>(I));
5673 case Intrinsic::instrprof_increment:
5675 case Intrinsic::instrprof_value_profile:
5677 case Intrinsic::localescape: {
5685 if (isa<ConstantPointerNull>(Arg))
5689 "can only escape static allocas");
5695 TII->
get(TargetOpcode::LOCAL_ESCAPE))
5696 .addSym(FrameAllocSym)
5703 case Intrinsic::localrecover: {
5711 unsigned IdxVal =
unsigned(Idx->getLimitedValue(INT_MAX));
5731 case Intrinsic::eh_exceptionpointer:
5732 case Intrinsic::eh_exceptioncode: {
5740 if (Intrinsic == Intrinsic::eh_exceptioncode)
5746 case Intrinsic::experimental_deoptimize:
5752 std::pair<SDValue, SDValue>
5767 if (CallSiteIndex) {
5783 std::pair<SDValue, SDValue> Result = TLI.
LowerCallTo(CLI);
5786 "Non-null chain expected with non-tail call!");
5787 assert((Result.second.getNode() || !Result.first.getNode()) &&
5788 "Null value expected with tail call!");
5790 if (!Result.second.getNode()) {
5797 PendingExports.clear();
5813 BeginLabel, EndLabel);
5833 const Value *SwiftErrorVal =
nullptr;
5841 Caller->getAttributes().hasAttrSomewhere(Attribute::SwiftError))
5868 Args.push_back(Entry);
5872 if (Entry.
isSRet && isa<Instruction>(V))
5889 .
setCallee(RetTy, FTy, Callee, std::move(Args), CS)
5892 std::pair<SDValue, SDValue> Result =
lowerInvokable(CLI, EHPadBB);
5894 if (Result.first.getNode()) {
5919 if (
const ICmpInst *IC = dyn_cast<ICmpInst>(U))
5920 if (IC->isEquality())
5921 if (
const Constant *
C = dyn_cast<Constant>(IC->getOperand(1)))
5922 if (
C->isNullValue())
5936 if (
const Constant *LoadInput = dyn_cast<Constant>(PtrVal)) {
5942 const_cast<Constant *>(LoadInput), LoadTy, *Builder.
DL))
5949 bool ConstantMemory =
false;
5954 ConstantMemory =
true;
5965 if (!ConstantMemory)
5972 void SelectionDAGBuilder::processIntegerCallValue(
const Instruction &I,
5987 bool SelectionDAGBuilder::visitMemCmpCall(
const CallInst &I) {
6008 std::pair<SDValue, SDValue> Res =
6013 if (Res.first.getNode()) {
6014 processIntegerCallValue(I, Res.first,
true);
6022 bool ActuallyDoIt =
true;
6029 ActuallyDoIt =
false;
6069 ActuallyDoIt =
false;
6078 processIntegerCallValue(I, Res,
false);
6090 bool SelectionDAGBuilder::visitMemChrCall(
const CallInst &I) {
6105 std::pair<SDValue, SDValue> Res =
6109 if (Res.first.getNode()) {
6121 bool SelectionDAGBuilder::visitMemPCpyCall(
const CallInst &I) {
6133 unsigned Align =
std::min(DstAlign, SrcAlign);
6148 "** memcpy should not be lowered as TailCall in mempcpy context **");
6164 bool SelectionDAGBuilder::visitStrCpyCall(
const CallInst &I,
bool isStpcpy) {
6171 !Arg1->getType()->isPointerTy() ||
6176 std::pair<SDValue, SDValue> Res =
6181 if (Res.first.getNode()) {
6193 bool SelectionDAGBuilder::visitStrCmpCall(
const CallInst &I) {
6200 !Arg1->getType()->isPointerTy() ||
6205 std::pair<SDValue, SDValue> Res =
6210 if (Res.first.getNode()) {
6211 processIntegerCallValue(I, Res.first,
true);
6222 bool SelectionDAGBuilder::visitStrLenCall(
const CallInst &I) {
6232 std::pair<SDValue, SDValue> Res =
6235 if (Res.first.getNode()) {
6236 processIntegerCallValue(I, Res.first,
false);
6247 bool SelectionDAGBuilder::visitStrNLenCall(
const CallInst &I) {
6254 !Arg1->getType()->isIntegerTy() ||
6259 std::pair<SDValue, SDValue> Res =
6263 if (Res.first.getNode()) {
6264 processIntegerCallValue(I, Res.first,
false);
6275 bool SelectionDAGBuilder::visitUnaryFloatCall(
const CallInst &I,
6292 bool SelectionDAGBuilder::visitBinaryFloatCall(
const CallInst &I,
6309 void SelectionDAGBuilder::visitCall(
const CallInst &I) {
6319 const char *RenameFn =
nullptr;
6323 if (
unsigned IID = II->getIntrinsicID(F)) {
6324 RenameFn = visitIntrinsicCall(I, IID);
6330 RenameFn = visitIntrinsicCall(I, IID);
6345 case LibFunc::copysign:
6346 case LibFunc::copysignf:
6347 case LibFunc::copysignl:
6361 case LibFunc::fabsf:
6362 case LibFunc::fabsl:
6367 case LibFunc::fminf:
6368 case LibFunc::fminl:
6373 case LibFunc::fmaxf:
6374 case LibFunc::fmaxl:
6391 case LibFunc::sqrtf:
6392 case LibFunc::sqrtl:
6393 case LibFunc::sqrt_finite:
6394 case LibFunc::sqrtf_finite:
6395 case LibFunc::sqrtl_finite:
6399 case LibFunc::floor:
6400 case LibFunc::floorf:
6401 case LibFunc::floorl:
6405 case LibFunc::nearbyint:
6406 case LibFunc::nearbyintf:
6407 case LibFunc::nearbyintl:
6412 case LibFunc::ceilf:
6413 case LibFunc::ceill:
6418 case LibFunc::rintf:
6419 case LibFunc::rintl:
6424 case LibFunc::roundf:
6425 case LibFunc::roundl:
6429 case LibFunc::trunc:
6430 case LibFunc::truncf:
6431 case LibFunc::truncl:
6436 case LibFunc::log2f:
6437 case LibFunc::log2l:
6442 case LibFunc::exp2f:
6443 case LibFunc::exp2l:
6447 case LibFunc::memcmp:
6448 if (visitMemCmpCall(I))
6451 case LibFunc::mempcpy:
6452 if (visitMemPCpyCall(I))
6455 case LibFunc::memchr:
6456 if (visitMemChrCall(I))
6459 case LibFunc::strcpy:
6460 if (visitStrCpyCall(I,
false))
6463 case LibFunc::stpcpy:
6464 if (visitStrCpyCall(I,
true))
6468 if (visitStrCmpCall(I))
6471 case LibFunc::strlen:
6472 if (visitStrLenCall(I))
6475 case LibFunc::strnlen:
6476 if (visitStrNLenCall(I))
6495 "Cannot lower calls with arbitrary operand bundles!");
6498 LowerCallSiteWithDeoptBundle(&I, Callee,
nullptr);
6531 for (
const auto &Code : Codes)
6545 if (isa<BasicBlock>(CallOperandVal))
6548 llvm::Type *OpTy = CallOperandVal->getType();
6561 if (
StructType *STy = dyn_cast<StructType>(OpTy))
6562 if (STy->getNumElements() == 1)
6563 OpTy = STy->getElementType(0);
6594 SDISelAsmOperandInfo &MatchingOpInfo,
6596 if (OpInfo.ConstraintVT == MatchingOpInfo.ConstraintVT)
6602 std::pair<unsigned, const TargetRegisterClass *> MatchRC =
6604 OpInfo.ConstraintVT);
6605 std::pair<unsigned, const TargetRegisterClass *> InputRC =
6607 MatchingOpInfo.ConstraintVT);
6608 if ((OpInfo.ConstraintVT.isInteger() !=
6609 MatchingOpInfo.ConstraintVT.isInteger()) ||
6610 (MatchRC.second != InputRC.second)) {
6613 " with a matching output constraint of"
6614 " incompatible type!");
6616 MatchingOpInfo.ConstraintVT = OpInfo.ConstraintVT;
6623 SDISelAsmOperandInfo &OpInfo,
6636 const Value *OpVal = OpInfo.CallOperandVal;
6637 if (isa<ConstantFP>(OpVal) || isa<ConstantInt>(OpVal) ||
6638 isa<ConstantVector>(OpVal) || isa<ConstantDataVector>(OpVal)) {
6652 Chain = DAG.
getStore(Chain, Location, OpInfo.CallOperand, StackSlot,
6654 OpInfo.CallOperand = StackSlot;
6669 SDISelAsmOperandInfo &OpInfo) {
6677 std::pair<unsigned, const TargetRegisterClass *> PhysReg =
6679 OpInfo.ConstraintCode,
6680 OpInfo.ConstraintVT);
6682 unsigned NumRegs = 1;
6688 PhysReg.second && !PhysReg.second->hasType(OpInfo.ConstraintVT)) {
6692 MVT RegVT = *PhysReg.second->vt_begin();
6693 if (RegVT.
getSizeInBits() == OpInfo.CallOperand.getValueSizeInBits()) {
6695 RegVT, OpInfo.CallOperand);
6696 OpInfo.ConstraintVT = RegVT;
6697 }
else if (RegVT.
isInteger() && OpInfo.ConstraintVT.isFloatingPoint()) {
6704 RegVT, OpInfo.CallOperand);
6705 OpInfo.ConstraintVT = RegVT;
6713 EVT ValueVT = OpInfo.ConstraintVT;
6717 if (
unsigned AssignedReg = PhysReg.first) {
6733 for (; *I != AssignedReg; ++
I)
6734 assert(I != RC->
end() &&
"Didn't find reg!");
6738 for (; NumRegs; --NumRegs, ++
I) {
6739 assert(I != RC->
end() &&
"Ran out of registers to allocate!");
6744 OpInfo.AssignedRegs =
RegsForValue(Regs, RegVT, ValueVT);
6757 for (; NumRegs; --NumRegs)
6760 OpInfo.AssignedRegs =
RegsForValue(Regs, RegVT, ValueVT);
6769 const std::vector<SDValue> &AsmNodeOperands) {
6772 for (; OperandNo; --OperandNo) {
6775 cast<ConstantSDNode>(AsmNodeOperands[CurOp])->getZExtValue();
6779 "Skipped past definitions?");
6791 for (
unsigned i = 0, e = NumRegs; i != e; ++
i) {
6840 SDISelAsmOperandInfoVector ConstraintOperands;
6846 bool hasMemory =
false;
6853 for (
unsigned i = 0, e = TargetConstraints.size(); i != e; ++
i) {
6854 ConstraintOperands.push_back(SDISelAsmOperandInfo(TargetConstraints[i]));
6855 SDISelAsmOperandInfo &OpInfo = ConstraintOperands.back();
6862 OpInfo.CallOperandVal =
const_cast<Value *
>(CS.
getArgument(ArgNo++));
6866 if (
const BasicBlock *BB = dyn_cast<BasicBlock>(OpInfo.CallOperandVal)) {
6869 OpInfo.CallOperand =
getValue(OpInfo.CallOperandVal);
6884 STy->getElementType(ResNo));
6886 assert(ResNo == 0 &&
"Asm only has one result!");
6892 OpInfo.ConstraintVT = OpVT;
6895 hasMemory = OpInfo.hasMemory(TLI);
6899 auto TargetConstraint = TargetConstraints[
i];
6904 ExtraInfo.update(TargetConstraint);
6918 for (
unsigned i = 0, e = ConstraintOperands.size(); i != e; ++
i) {
6919 SDISelAsmOperandInfo &OpInfo = ConstraintOperands[
i];
6925 if (OpInfo.hasMatchingInput()) {
6926 SDISelAsmOperandInfo &Input = ConstraintOperands[OpInfo.MatchingInput];
6940 !OpInfo.isIndirect) {
6941 assert((OpInfo.isMultipleAlternative ||
6943 "Can only indirectify direct input operands!");
6949 OpInfo.CallOperandVal =
nullptr;
6952 OpInfo.isIndirect =
true;
6963 for (
unsigned i = 0, e = ConstraintOperands.size(); i != e; ++
i) {
6964 SDISelAsmOperandInfo &OpInfo = ConstraintOperands[
i];
6973 std::vector<SDValue> AsmNodeOperands;
6974 AsmNodeOperands.push_back(
SDValue());
6994 std::vector<std::pair<RegsForValue, Value*> > IndirectStoresToEmit;
6996 for (
unsigned i = 0, e = ConstraintOperands.size(); i != e; ++
i) {
6997 SDISelAsmOperandInfo &OpInfo = ConstraintOperands[
i];
6999 switch (OpInfo.Type) {
7004 assert(OpInfo.isIndirect &&
"Memory output must be indirect operand");
7006 unsigned ConstraintID =
7009 "Failed to convert memory constraint code to constraint id.");
7016 AsmNodeOperands.push_back(OpInfo.CallOperand);
7024 if (OpInfo.AssignedRegs.Regs.empty()) {
7026 CS,
"couldn't allocate output register for constraint '" +
7027 Twine(OpInfo.ConstraintCode) +
"'");
7033 if (OpInfo.isIndirect) {
7034 IndirectStoresToEmit.push_back(std::make_pair(OpInfo.AssignedRegs,
7035 OpInfo.CallOperandVal));
7040 RetValRegs.
append(OpInfo.AssignedRegs);
7046 .AddInlineAsmOperands(OpInfo.isEarlyClobber
7053 SDValue InOperandVal = OpInfo.CallOperand;
7055 if (OpInfo.isMatchingInputConstraint()) {
7061 cast<ConstantSDNode>(AsmNodeOperands[CurOp])->getZExtValue();
7065 if (OpInfo.isIndirect) {
7067 emitInlineAsmError(CS,
"inline asm not supported yet:"
7068 " don't know how to handle tied "
7069 "indirect register inputs");
7073 MVT RegVT = AsmNodeOperands[CurOp+1].getSimpleValueType();
7079 emitInlineAsmError(CS,
"inline asm error: This value type register "
7080 "class is not natively supported!");
7088 MatchedRegs.getCopyToRegs(InOperandVal,
DAG, dl,
7091 true, OpInfo.getMatchedOperand(), dl,
7092 DAG, AsmNodeOperands);
7098 "Unexpected number of operands");
7103 OpInfo.getMatchedOperand());
7106 AsmNodeOperands.push_back(AsmNodeOperands[CurOp+1]);
7116 std::vector<SDValue> Ops;
7120 emitInlineAsmError(CS,
"invalid operand for inline asm constraint '" +
7121 Twine(OpInfo.ConstraintCode) +
"'");
7126 unsigned ResOpType =
7130 AsmNodeOperands.insert(AsmNodeOperands.end(), Ops.begin(), Ops.end());
7135 assert(OpInfo.isIndirect &&
"Operand must be indirect to be a mem!");
7138 "Memory operands expect pointer values");
7140 unsigned ConstraintID =
7143 "Failed to convert memory constraint code to constraint id.");
7151 AsmNodeOperands.push_back(InOperandVal);
7157 "Unknown constraint type!");
7160 if (OpInfo.isIndirect) {
7162 CS,
"Don't know how to handle indirect register inputs yet "
7163 "for constraint '" +
7164 Twine(OpInfo.ConstraintCode) +
"'");
7169 if (OpInfo.AssignedRegs.Regs.empty()) {
7170 emitInlineAsmError(CS,
"couldn't allocate input reg for constraint '" +
7171 Twine(OpInfo.ConstraintCode) +
"'");
7177 OpInfo.AssignedRegs.getCopyToRegs(InOperandVal,
DAG, dl,
7181 dl,
DAG, AsmNodeOperands);
7187 if (!OpInfo.AssignedRegs.Regs.empty())
7198 if (Flag.
getNode()) AsmNodeOperands.push_back(Flag);
7236 if (!IA->
hasSideEffects() && !hasMemory && IndirectStoresToEmit.empty())
7240 std::vector<std::pair<SDValue, const Value *> > StoresToEmit;
7244 for (
unsigned i = 0, e = IndirectStoresToEmit.size(); i != e; ++
i) {
7246 const Value *Ptr = IndirectStoresToEmit[
i].second;
7249 StoresToEmit.push_back(std::make_pair(OutVal, Ptr));
7254 for (
unsigned i = 0, e = StoresToEmit.size(); i != e; ++
i) {
7261 if (!OutChains.
empty())
7268 const Twine &Message) {
7278 void SelectionDAGBuilder::visitVAStart(
const CallInst &I) {
7285 void SelectionDAGBuilder::visitVAArg(
const VAArgInst &I) {
7296 void SelectionDAGBuilder::visitVAEnd(
const CallInst &I) {
7303 void SelectionDAGBuilder::visitVACopy(
const CallInst &I) {
7343 for (
unsigned I = 1; I != NumVals; ++
I)
7357 unsigned ArgIdx,
unsigned NumArgs,
SDValue Callee,
Type *ReturnTy,
7358 bool IsPatchPoint) {
7360 Args.reserve(NumArgs);
7364 for (
unsigned ArgI = ArgIdx, ArgE = ArgIdx + NumArgs, AttrI = ArgIdx + 1;
7365 ArgI != ArgE; ++ArgI) {
7366 const Value *V = CS->getOperand(ArgI);
7373 Entry.setAttributes(&CS, AttrI);
7374 Args.push_back(Entry);
7380 .setDiscardResult(CS->use_empty())
7381 .setIsPatchPoint(IsPatchPoint);
7404 for (
unsigned i = StartIdx, e = CS.
arg_size(); i != e; ++
i) {
7421 void SelectionDAGBuilder::visitStackmap(
const CallInst &CI) {
7427 SDValue Chain, InFlag, Callee, NullPtr;
7450 cast<ConstantSDNode>(IDVal)->getZExtValue(),
DL,
MVT::i64));
7453 cast<ConstantSDNode>(NBytesVal)->getZExtValue(),
DL,
7470 InFlag = Chain.getValue(1);
7500 if (
auto* ConstCallee = dyn_cast<ConstantSDNode>(Callee))
7503 else if (
auto* SymbolicCallee = dyn_cast<GlobalAddressSDNode>(Callee))
7505 SDLoc(SymbolicCallee),
7506 SymbolicCallee->getValueType(0));
7510 unsigned NumArgs = cast<ConstantSDNode>(NArgVal)->getZExtValue();
7516 "Not enough arguments provided to the patchpoint intrinsic");
7519 unsigned NumCallArgs = IsAnyRegCC ? 0 : NumArgs;
7526 std::pair<SDValue, SDValue> Result =
lowerInvokable(CLI, EHPadBB);
7528 SDNode *CallEnd = Result.second.getNode();
7535 "Expected a callseq node.");
7545 cast<ConstantSDNode>(IDVal)->getZExtValue(), dl,
MVT::i64));
7548 cast<ConstantSDNode>(NBytesVal)->getZExtValue(), dl,
7557 unsigned NumCallRegArgs = Call->getNumOperands() - (HasGlue ? 4 : 3);
7558 NumCallRegArgs = IsAnyRegCC ? NumArgs : NumCallRegArgs;
7567 for (
unsigned i = NumMetaOpers, e = NumMetaOpers + NumArgs; i != e; ++
i)
7572 Ops.
append(Call->op_begin() + 2, e);
7592 if (IsAnyRegCC && HasDef) {
7597 assert(ValueVTs.
size() == 1 &&
"Expected only one return value type.");
7622 if (IsAnyRegCC && HasDef) {
7653 std::pair<SDValue, SDValue>
7671 int DemoteStackIdx = -100;
7672 if (!CanLowerReturn) {
7676 uint64_t TySize = DL.getTypeAllocSize(CLI.
RetTy);
7677 unsigned Align = DL.getPrefTypeAlignment(CLI.
RetTy);
7684 Entry.
Node = DemoteStackSlot;
7685 Entry.
Ty = StackSlotPtrType;
7703 for (
unsigned I = 0, E = RetTys.
size(); I !=
E; ++
I) {
7707 for (
unsigned i = 0; i != NumRegs; ++
i) {
7709 MyFlags.
VT = RegisterVT;
7726 for (
unsigned i = 0, e = Args.size(); i != e; ++
i) {
7727 if (Args[i].isSwiftError) {
7740 for (
unsigned i = 0, e = Args.size(); i != e; ++
i) {
7743 Type *FinalType = Args[
i].Ty;
7744 if (Args[i].isByVal)
7745 FinalType = cast<PointerType>(Args[
i].Ty)->getElementType();
7748 for (
unsigned Value = 0, NumValues = ValueVTs.
size(); Value != NumValues;
7750 EVT VT = ValueVTs[Value];
7753 Args[
i].Node.getResNo() + Value);
7755 unsigned OriginalAlignment = DL.getABITypeAlignment(ArgTy);
7761 if (Args[i].isInReg) {
7765 isa<StructType>(FinalType)) {
7768 Flags.setHvaStart();
7776 if (Args[i].isSwiftSelf)
7777 Flags.setSwiftSelf();
7778 if (Args[i].isSwiftError)
7779 Flags.setSwiftError();
7780 if (Args[i].isByVal)
7782 if (Args[i].isInAlloca) {
7783 Flags.setInAlloca();
7791 if (Args[i].isByVal || Args[i].isInAlloca) {
7794 Flags.setByValSize(DL.getTypeAllocSize(ElementTy));
7797 unsigned FrameAlign;
7798 if (Args[i].Alignment)
7799 FrameAlign = Args[
i].Alignment;
7802 Flags.setByValAlign(FrameAlign);
7807 Flags.setInConsecutiveRegs();
7808 Flags.setOrigAlign(OriginalAlignment);
7817 else if (Args[i].isZExt)
7823 "unexpected use of 'returned'");
7837 Flags.setReturned();
7843 for (
unsigned j = 0; j != NumParts; ++j) {
7847 i, j*Parts[j].getValueType().getStoreSize());
7848 if (NumParts > 1 && j == 0)
7851 MyFlags.Flags.setOrigAlign(1);
7852 if (j == NumParts - 1)
7853 MyFlags.Flags.setSplitEnd();
7857 CLI.
OutVals.push_back(Parts[j]);
7860 if (NeedsRegBlock && Value == NumValues - 1)
7861 CLI.
Outs[CLI.
Outs.
size() - 1].Flags.setInConsecutiveRegsLast();
7873 "LowerCall didn't return a valid chain!");
7875 "LowerCall emitted a return value for a tail call!");
7877 "LowerCall didn't emit the correct number of values!");
7889 for (
unsigned i = 0, e = CLI.
Ins.
size(); i != e; ++
i) {
7890 assert(InVals[i].getNode() &&
"LowerCall emitted a null value!");
7891 assert(
EVT(CLI.
Ins[i].VT) == InVals[i].getValueType() &&
7892 "LowerCall emitted a value with the wrong type!");
7897 if (!CanLowerReturn) {
7904 assert(PVTs.
size() == 1 &&
"Pointers should fit in one register");
7905 EVT PtrVT = PVTs[0];
7907 unsigned NumValues = RetTys.
size();
7908 ReturnValues.
resize(NumValues);
7916 for (
unsigned i = 0; i < NumValues; ++
i) {
7921 RetTys[i], CLI.
DL, CLI.
Chain, Add,
7923 DemoteStackIdx, Offsets[
i]),
7925 ReturnValues[
i] =
L;
7938 unsigned CurReg = 0;
7939 for (
unsigned I = 0, E = RetTys.
size(); I !=
E; ++
I) {
7945 NumRegs, RegisterVT, VT,
nullptr,
7953 if (ReturnValues.
empty())
7959 return std::make_pair(Res, CLI.
Chain);
7978 "Copy from a reg to the same reg!");
7990 RFV.getCopyToRegs(Op,
DAG,
getCurSDLoc(), Chain,
nullptr, V, ExtendType);
7991 PendingExports.push_back(Chain);
8007 if (cast<Instruction>(U)->getParent() != &Entry || isa<SwitchInst>(U))
8013 void SelectionDAGISel::LowerArguments(
const Function &F) {
8038 I !=
E; ++
I, ++Idx) {
8042 unsigned PartBase = 0;
8045 FinalType = cast<PointerType>(FinalType)->getElementType();
8048 for (
unsigned Value = 0, NumValues = ValueVTs.
size();
8049 Value != NumValues; ++Value) {
8050 EVT VT = ValueVTs[Value];
8063 isa<StructType>(I->
getType())) {
8100 unsigned FrameAlign;
8115 for (
unsigned i = 0; i != NumRegs; ++
i) {
8116 ISD::InputArg MyFlags(Flags, RegisterVT, VT, isArgValueUsed,
8118 if (NumRegs > 1 && i == 0)
8122 MyFlags.Flags.setOrigAlign(1);
8123 if (i == NumRegs - 1)
8124 MyFlags.Flags.setSplitEnd();
8128 if (NeedsRegBlock && Value == NumValues - 1)
8129 Ins[Ins.
size() - 1].Flags.setInConsecutiveRegsLast();
8141 "LowerFormalArguments didn't return a valid chain!");
8143 "LowerFormalArguments didn't emit the correct number of values!");
8145 for (
unsigned i = 0, e = Ins.
size(); i != e; ++
i) {
8146 assert(InVals[i].getNode() &&
8147 "LowerFormalArguments emitted a null value!");
8148 assert(
EVT(Ins[i].VT) == InVals[i].getValueType() &&
8149 "LowerFormalArguments emitted a value with the wrong type!");
8154 DAG.setRoot(NewRoot);
8165 MVT VT = ValueVTs[0].getSimpleVT();
8169 RegVT, VT,
nullptr, AssertOp);
8177 DAG.setRoot(NewRoot);
8189 unsigned NumValues = ValueVTs.
size();
8193 bool isSwiftErrorArg =
8196 if (I->
use_empty() && NumValues && !isSwiftErrorArg) {
8201 dyn_cast<FrameIndexSDNode>(InVals[i].getNode()))
8205 for (
unsigned Val = 0; Val != NumValues; ++Val) {
8206 EVT VT = ValueVTs[Val];
8213 if (!I->
use_empty() || isSwiftErrorArg) {
8221 NumParts, PartVT, VT,
8222 nullptr, AssertOp));
8229 if (ArgValues.
empty())
8234 dyn_cast<FrameIndexSDNode>(ArgValues[0].getNode()))
8245 dyn_cast<FrameIndexSDNode>(LNode->getBasePtr().getNode()))
8276 assert(i == InVals.
size() &&
"Argument register count mismatch!");
8290 SelectionDAGBuilder::HandlePHINodesInSuccessorBlocks(
const BasicBlock *LLVMBB) {
8299 if (!isa<PHINode>(SuccBB->
begin()))
continue;
8304 if (!SuccsHandled.
insert(SuccMBB).second)
8324 if (
const Constant *
C = dyn_cast<Constant>(PHIOp)) {
8337 assert(isa<AllocaInst>(PHIOp) &&
8339 "Didn't codegen value into a register!??");
8350 for (
unsigned vti = 0, vte = ValueVTs.
size(); vti != vte; ++vti) {
8351 EVT VT = ValueVTs[vti];
8353 for (
unsigned i = 0, e = NumRegisters; i != e; ++
i)
8355 std::make_pair(&*MBBI++, Reg + i));
8356 Reg += NumRegisters;
8361 ConstantsOut.clear();
8367 SelectionDAGBuilder::StackProtectorDescriptor::
8377 MF->
insert(++BBI, SuccMBB);
8397 void SelectionDAGBuilder::updateDAGForMaybeTailCall(
SDValue MaybeTC) {
8399 if (MaybeTC.
getNode() !=
nullptr)
8400 DAG.setRoot(MaybeTC);
8405 bool SelectionDAGBuilder::isDense(
const CaseClusterVector &Clusters,
8407 unsigned First,
unsigned Last,
8408 unsigned Density)
const {
8410 assert(TotalCases[Last] >= TotalCases[First]);
8412 const APInt &LowCase = Clusters[First].Low->getValue();
8413 const APInt &HighCase = Clusters[Last].High->getValue();
8420 uint64_t Diff = (HighCase - LowCase).getLimitedValue((UINT64_MAX - 1) / 100);
8421 uint64_t Range = Diff + 1;
8424 TotalCases[Last] - (First == 0 ? 0 : TotalCases[First - 1]);
8426 assert(NumCases < UINT64_MAX / 100);
8427 assert(Range >= NumCases);
8429 return NumCases * 100 >= Range * Density;
8442 bool SelectionDAGBuilder::buildJumpTable(
const CaseClusterVector &Clusters,
8443 unsigned First,
unsigned Last,
8446 CaseCluster &JTCluster) {
8450 unsigned NumCmps = 0;
8451 std::vector<MachineBasicBlock*> Table;
8455 for (
unsigned I = First; I <= Last; ++
I)
8458 for (
unsigned I = First; I <= Last; ++
I) {
8460 Prob += Clusters[
I].Prob;
8461 const APInt &Low = Clusters[
I].Low->getValue();
8462 const APInt &
High = Clusters[
I].High->getValue();
8463 NumCmps += (Low ==
High) ? 1 : 2;
8466 const APInt &PreviousHigh = Clusters[I - 1].High->getValue();
8468 uint64_t Gap = (Low - PreviousHigh).getLimitedValue() - 1;
8469 for (uint64_t J = 0; J < Gap; J++)
8470 Table.push_back(DefaultMBB);
8472 uint64_t ClusterSize = (High - Low).getLimitedValue() + 1;
8473 for (uint64_t J = 0; J < ClusterSize; ++J)
8474 Table.push_back(Clusters[I].MBB);
8475 JTProbs[Clusters[
I].MBB] += Clusters[
I].Prob;
8478 unsigned NumDests = JTProbs.
size();
8479 if (isSuitableForBitTests(NumDests, NumCmps,
8480 Clusters[First].Low->getValue(),
8481 Clusters[Last].High->getValue())) {
8495 if (Done.
count(Succ))
8497 addSuccessorWithProb(JumpTableMBB, Succ, JTProbs[Succ]);
8504 ->createJumpTableIndex(Table);
8508 JumpTableHeader JTH(Clusters[First].Low->getValue(),
8511 JTCases.emplace_back(std::move(JTH), std::move(
JT));
8513 JTCluster = CaseCluster::jumpTable(Clusters[First].Low, Clusters[Last].High,
8518 void SelectionDAGBuilder::findJumpTables(CaseClusterVector &Clusters,
8523 assert(!Clusters.empty());
8524 for (CaseCluster &
C : Clusters)
8526 for (
unsigned i = 1, e = Clusters.size(); i < e; ++
i)
8527 assert(Clusters[i - 1].High->getValue().
slt(Clusters[i].Low->getValue()));
8536 const int64_t N = Clusters.size();
8538 const unsigned SmallNumberOfEntries = MinJumpTableEntries / 2;
8539 const unsigned MaxJumpTableSize =
8543 if (N < 2 || N < MinJumpTableEntries)
8548 for (
unsigned i = 0; i <
N; ++
i) {
8549 const APInt &
Hi = Clusters[
i].High->getValue();
8550 const APInt &
Lo = Clusters[
i].Low->getValue();
8551 TotalCases[
i] = (Hi -
Lo).getLimitedValue() + 1;
8553 TotalCases[
i] += TotalCases[i - 1];
8556 const unsigned MinDensity =
8560 unsigned JumpTableSize = (Clusters[N - 1].High->getValue() -
8561 Clusters[0].Low->getValue())
8562 .getLimitedValue(UINT_MAX - 1) + 1;
8563 if (JumpTableSize <= MaxJumpTableSize &&
8564 isDense(Clusters, TotalCases, 0, N - 1, MinDensity)) {
8565 CaseCluster JTCluster;
8566 if (buildJumpTable(Clusters, 0, N - 1, SI, DefaultMBB, JTCluster)) {
8567 Clusters[0] = JTCluster;
8594 enum PartitionScores :
unsigned {
8602 MinPartitions[N - 1] = 1;
8603 LastElement[N - 1] = N - 1;
8604 PartitionsScore[N - 1] = PartitionScores::SingleCase;
8607 for (int64_t i = N - 2; i >= 0; i--) {
8610 MinPartitions[
i] = MinPartitions[i + 1] + 1;
8612 PartitionsScore[
i] = PartitionsScore[i + 1] + PartitionScores::SingleCase;
8615 for (int64_t j = N - 1; j >
i; j--) {
8617 JumpTableSize = (Clusters[j].High->getValue() -
8618 Clusters[
i].Low->getValue())
8619 .getLimitedValue(UINT_MAX - 1) + 1;
8620 if (JumpTableSize <= MaxJumpTableSize &&
8621 isDense(Clusters, TotalCases, i, j, MinDensity)) {
8622 unsigned NumPartitions = 1 + (j == N - 1 ? 0 : MinPartitions[j + 1]);
8623 unsigned Score = j == N - 1 ? 0 : PartitionsScore[j + 1];
8624 int64_t NumEntries = j - i + 1;
8626 if (NumEntries == 1)
8627 Score += PartitionScores::SingleCase;
8628 else if (NumEntries <= SmallNumberOfEntries)
8629 Score += PartitionScores::FewCases;
8630 else if (NumEntries >= MinJumpTableEntries)
8631 Score += PartitionScores::Table;
8635 if (NumPartitions < MinPartitions[i] ||
8636 (NumPartitions == MinPartitions[i] && Score > PartitionsScore[i])) {
8637 MinPartitions[
i] = NumPartitions;
8639 PartitionsScore[
i] = Score;
8646 unsigned DstIndex = 0;
8647 for (
unsigned First = 0, Last; First <
N; First = Last + 1) {
8648 Last = LastElement[First];
8650 assert(DstIndex <= First);
8651 unsigned NumClusters = Last - First + 1;
8653 CaseCluster JTCluster;
8654 if (NumClusters >= MinJumpTableEntries &&
8655 buildJumpTable(Clusters, First, Last, SI, DefaultMBB, JTCluster)) {
8656 Clusters[DstIndex++] = JTCluster;
8658 for (
unsigned I = First; I <= Last; ++
I)
8659 std::memmove(&Clusters[DstIndex++], &Clusters[I],
sizeof(Clusters[I]));
8662 Clusters.resize(DstIndex);
8665 bool SelectionDAGBuilder::rangeFitsInWord(
const APInt &Low,
const APInt &High) {
8667 uint64_t BW = DAG.getDataLayout().getPointerSizeInBits();
8668 uint64_t Range = (High - Low).getLimitedValue(UINT64_MAX - 1) + 1;
8672 bool SelectionDAGBuilder::isSuitableForBitTests(
unsigned NumDests,
8675 const APInt &High) {
8683 if (!rangeFitsInWord(Low, High))
8690 return (NumDests == 1 && NumCmps >= 3) ||
8691 (NumDests == 2 && NumCmps >= 5) ||
8692 (NumDests == 3 && NumCmps >= 6);
8695 bool SelectionDAGBuilder::buildBitTests(CaseClusterVector &Clusters,
8696 unsigned First,
unsigned Last,
8698 CaseCluster &BTCluster) {
8704 unsigned NumCmps = 0;
8705 for (int64_t I = First; I <= Last; ++
I) {
8707 Dests.set(Clusters[I].MBB->
getNumber());
8708 NumCmps += (Clusters[
I].Low == Clusters[
I].High) ? 1 : 2;
8710 unsigned NumDests = Dests.count();
8712 APInt Low = Clusters[First].Low->getValue();
8713 APInt High = Clusters[Last].High->getValue();
8716 if (!isSuitableForBitTests(NumDests, NumCmps, Low, High))
8722 const int BitWidth = DAG.getTargetLoweringInfo()
8723 .getPointerTy(DAG.getDataLayout())
8725 assert(rangeFitsInWord(Low, High) &&
"Case range must fit in bit mask!");
8729 bool ContiguousRange =
true;
8730 for (int64_t I = First + 1; I <= Last; ++
I) {
8731 if (Clusters[I].Low->getValue() != Clusters[I - 1].High->getValue() + 1) {
8732 ContiguousRange =
false;
8742 ContiguousRange =
false;
8745 CmpRange = High - Low;
8750 for (
unsigned i = First; i <= Last; ++
i) {
8753 for (j = 0; j < CBV.size(); ++j)
8754 if (CBV[j].BB == Clusters[i].MBB)
8756 if (j == CBV.size())
8759 CaseBits *CB = &CBV[j];
8762 uint64_t Lo = (Clusters[
i].Low->getValue() - LowBound).getZExtValue();
8763 uint64_t Hi = (Clusters[
i].High->getValue() - LowBound).getZExtValue();
8764 assert(Hi >= Lo && Hi < 64 &&
"Invalid bit case!");
8765 CB->Mask |= (-1ULL >> (63 - (Hi -
Lo))) << Lo;
8766 CB->Bits += Hi - Lo + 1;
8767 CB->ExtraProb += Clusters[
i].Prob;
8768 TotalProb += Clusters[
i].Prob;
8772 std::sort(CBV.begin(), CBV.end(), [](
const CaseBits &a,
const CaseBits &b) {
8774 if (a.ExtraProb != b.ExtraProb)
8775 return a.ExtraProb > b.ExtraProb;
8776 return a.Bits > b.Bits;
8779 for (
auto &CB : CBV) {
8782 BTI.
push_back(BitTestCase(CB.Mask, BitTestBB, CB.BB, CB.ExtraProb));
8784 BitTestCases.emplace_back(std::move(LowBound), std::move(CmpRange),
8786 ContiguousRange,
nullptr,
nullptr, std::move(BTI),
8789 BTCluster = CaseCluster::bitTests(Clusters[First].Low, Clusters[Last].High,
8794 void SelectionDAGBuilder::findBitTestClusters(CaseClusterVector &Clusters,
8801 assert(!Clusters.empty());
8802 assert(Clusters[0].
Kind == CC_Range || Clusters[0].
Kind == CC_JumpTable);
8803 for (
const CaseCluster &
C : Clusters)
8804 assert(
C.Kind == CC_Range ||
C.Kind == CC_JumpTable);
8805 for (
unsigned i = 1; i < Clusters.size(); ++
i)
8806 assert(Clusters[i-1].High->getValue().
slt(Clusters[i].Low->getValue()));
8820 const int64_t N = Clusters.size();
8830 MinPartitions[N - 1] = 1;
8831 LastElement[N - 1] = N - 1;
8834 for (int64_t i = N - 2; i >= 0; --
i) {
8837 MinPartitions[
i] = MinPartitions[i + 1] + 1;
8842 for (int64_t j =
std::min(N - 1, i + BitWidth - 1); j >
i; --j) {
8846 if (!rangeFitsInWord(Clusters[i].Low->getValue(),
8847 Clusters[j].High->getValue()))
8852 bool RangesOnly =
true;
8854 for (int64_t k = i; k <= j; k++) {
8855 if (Clusters[k].
Kind != CC_Range) {
8859 Dests.set(Clusters[k].MBB->getNumber());
8861 if (!RangesOnly || Dests.count() > 3)
8865 unsigned NumPartitions = 1 + (j == N - 1 ? 0 : MinPartitions[j + 1]);
8866 if (NumPartitions < MinPartitions[i]) {
8868 MinPartitions[
i] = NumPartitions;
8875 unsigned DstIndex = 0;
8876 for (
unsigned First = 0, Last; First <
N; First = Last + 1) {
8877 Last = LastElement[First];
8879 assert(DstIndex <= First);
8881 CaseCluster BitTestCluster;
8882 if (buildBitTests(Clusters, First, Last, SI, BitTestCluster)) {
8883 Clusters[DstIndex++] = BitTestCluster;
8885 size_t NumClusters = Last - First + 1;
8886 std::memmove(&Clusters[DstIndex], &Clusters[First],
8887 sizeof(Clusters[0]) * NumClusters);
8888 DstIndex += NumClusters;
8891 Clusters.resize(DstIndex);
8894 void SelectionDAGBuilder::lowerWorkItem(SwitchWorkListItem W, Value *Cond,
8903 unsigned Size = W.LastCluster - W.FirstCluster + 1;
8907 if (Size == 2 && W.MBB == SwitchMBB) {
8915 CaseCluster &
Small = *W.FirstCluster;
8916 CaseCluster &Big = *W.LastCluster;
8918 if (Small.Low == Small.High && Big.Low == Big.High &&
8919 Small.MBB == Big.MBB) {
8920 const APInt &SmallValue = Small.Low->getValue();
8921 const APInt &BigValue = Big.Low->getValue();
8924 APInt CommonBit = BigValue ^ SmallValue;
8931 DAG.getConstant(CommonBit, DL, VT));
8933 DL,
MVT::i1, Or, DAG.getConstant(BigValue | SmallValue, DL, VT),
8939 addSuccessorWithProb(SwitchMBB, Small.MBB, Small.Prob + Big.Prob);
8941 addSuccessorWithProb(
8942 SwitchMBB, DefaultMBB,
8946 addSuccessorWithProb(SwitchMBB, DefaultMBB);
8951 DAG.getBasicBlock(Small.MBB));
8954 DAG.getBasicBlock(DefaultMBB));
8956 DAG.setRoot(BrCond);
8964 std::sort(W.FirstCluster, W.LastCluster + 1,
8965 [](
const CaseCluster &a,
const CaseCluster &b) {
8966 return a.Prob > b.Prob;
8971 for (CaseClusterIt I = W.LastCluster; I > W.FirstCluster; ) {
8973 if (I->Prob > W.LastCluster->Prob)
8975 if (I->Kind == CC_Range && I->MBB == NextMBB) {
8985 for (CaseClusterIt I = W.FirstCluster; I <= W.LastCluster; ++I)
8986 UnhandledProbs += I->Prob;
8989 for (CaseClusterIt I = W.FirstCluster, E = W.LastCluster; I <= E; ++I) {
8991 if (I == W.LastCluster) {
8993 Fallthrough = DefaultMBB;
8996 CurMF->
insert(BBI, Fallthrough);
8998 ExportFromCurrentBlock(Cond);
9000 UnhandledProbs -= I->Prob;
9003 case CC_JumpTable: {
9005 JumpTableHeader *JTH = &JTCases[I->JTCasesIndex].first;
9010 CurMF->
insert(BBI, JumpMBB);
9012 auto JumpProb = I->Prob;
9013 auto FallthroughProb = UnhandledProbs;
9021 if (*SI == DefaultMBB) {
9022 JumpProb += DefaultProb / 2;
9023 FallthroughProb -= DefaultProb / 2;
9030 addSuccessorWithProb(CurMBB, Fallthrough, FallthroughProb);
9031 addSuccessorWithProb(CurMBB, JumpMBB, JumpProb);
9036 JTH->HeaderBB = CurMBB;
9037 JT->Default = Fallthrough;
9040 if (CurMBB == SwitchMBB) {
9041 visitJumpTableHeader(*JT, *JTH, SwitchMBB);
9042 JTH->Emitted =
true;
9048 BitTestBlock *BTB = &BitTestCases[I->BTCasesIndex];
9051 for (BitTestCase &BTC : BTB->Cases)
9052 CurMF->
insert(BBI, BTC.ThisBB);
9055 BTB->Parent = CurMBB;
9056 BTB->Default = Fallthrough;
9058 BTB->DefaultProb = UnhandledProbs;
9062 if (!BTB->ContiguousRange) {
9063 BTB->Prob += DefaultProb / 2;
9064 BTB->DefaultProb -= DefaultProb / 2;
9068 if (CurMBB == SwitchMBB) {
9069 visitBitTestHeader(*BTB, SwitchMBB);
9070 BTB->Emitted =
true;
9075 const Value *RHS, *LHS, *MHS;
9077 if (I->Low == I->High) {
9092 CaseBlock CB(CC, LHS, RHS, MHS, I->MBB, Fallthrough, CurMBB, I->Prob,
9095 if (CurMBB == SwitchMBB)
9096 visitSwitchCase(CB, SwitchMBB);
9098 SwitchCases.push_back(CB);
9103 CurMBB = Fallthrough;
9107 unsigned SelectionDAGBuilder::caseClusterRank(
const CaseCluster &CC,
9108 CaseClusterIt First,
9109 CaseClusterIt Last) {
9110 return std::count_if(First, Last + 1, [&](
const CaseCluster &
X) {
9111 if (X.Prob != CC.Prob)
9112 return X.Prob > CC.Prob;
9115 return X.Low->getValue().slt(CC.Low->getValue());
9119 void SelectionDAGBuilder::splitWorkItem(SwitchWorkList &WorkList,
9120 const SwitchWorkListItem &W,
9123 assert(W.FirstCluster->Low->getValue().slt(W.LastCluster->Low->getValue()) &&
9124 "Clusters not sorted?");
9126 assert(W.LastCluster - W.FirstCluster + 1 >= 2 &&
"Too small to split!");
9131 CaseClusterIt LastLeft = W.FirstCluster;
9132 CaseClusterIt FirstRight = W.LastCluster;
9133 auto LeftProb = LastLeft->Prob + W.DefaultProb / 2;
9134 auto RightProb = FirstRight->Prob + W.DefaultProb / 2;
9141 while (LastLeft + 1 < FirstRight) {
9142 if (LeftProb < RightProb || (LeftProb == RightProb && (I & 1)))
9143 LeftProb += (++LastLeft)->Prob;
9145 RightProb += (--FirstRight)->Prob;
9155 unsigned NumLeft = LastLeft - W.FirstCluster + 1;
9156 unsigned NumRight = W.LastCluster - FirstRight + 1;
9158 if (
std::min(NumLeft, NumRight) < 3 && std::max(NumLeft, NumRight) > 3) {
9162 if (NumLeft < NumRight) {
9164 CaseCluster &CC = *FirstRight;
9165 unsigned RightSideRank = caseClusterRank(CC, FirstRight, W.LastCluster);
9166 unsigned LeftSideRank = caseClusterRank(CC, W.FirstCluster, LastLeft);
9167 if (LeftSideRank <= RightSideRank) {
9174 assert(NumRight < NumLeft);
9176 CaseCluster &CC = *LastLeft;
9177 unsigned LeftSideRank = caseClusterRank(CC, W.FirstCluster, LastLeft);
9178 unsigned RightSideRank = caseClusterRank(CC, FirstRight, W.LastCluster);
9179 if (RightSideRank <= LeftSideRank) {
9190 assert(LastLeft + 1 == FirstRight);
9191 assert(LastLeft >= W.FirstCluster);
9192 assert(FirstRight <= W.LastCluster);
9196 CaseClusterIt PivotCluster = FirstRight;
9197 assert(PivotCluster > W.FirstCluster);
9198 assert(PivotCluster <= W.LastCluster);
9200 CaseClusterIt FirstLeft = W.FirstCluster;
9201 CaseClusterIt LastRight = W.LastCluster;
9213 if (FirstLeft == LastLeft && FirstLeft->Kind == CC_Range &&
9214 FirstLeft->Low == W.GE &&
9215 (FirstLeft->High->getValue() + 1LL) == Pivot->
getValue()) {
9216 LeftMBB = FirstLeft->MBB;
9221 {LeftMBB, FirstLeft, LastLeft, W.GE, Pivot, W.DefaultProb / 2});
9230 if (FirstRight == LastRight && FirstRight->Kind == CC_Range &&
9231 W.LT && (FirstRight->High->getValue() + 1ULL) == W.LT->getValue()) {
9232 RightMBB = FirstRight->MBB;
9237 {RightMBB, FirstRight, LastRight, Pivot, W.LT, W.DefaultProb / 2});
9243 CaseBlock CB(
ISD::SETLT, Cond, Pivot,
nullptr, LeftMBB, RightMBB, W.MBB,
9244 LeftProb, RightProb);
9246 if (W.MBB == SwitchMBB)
9252 void SelectionDAGBuilder::visitSwitch(
const SwitchInst &SI) {
9255 CaseClusterVector Clusters;
9257 for (
auto I : SI.
cases()) {
9263 Clusters.push_back(CaseCluster::range(CaseVal, CaseVal, Succ, Prob));
9271 sortAndRangeify(Clusters);
9276 bool UnreachableDefault =
9278 if (UnreachableDefault && !Clusters.empty()) {
9280 unsigned MaxPop = 0;
9282 for (
auto I : SI.
cases()) {
9284 if (++Popularity[BB] > MaxPop) {
9285 MaxPop = Popularity[BB];
9290 assert(MaxPop > 0 && MaxBB);
9295 CaseClusterVector New;
9296 New.reserve(Clusters.size());
9297 for (CaseCluster &CC : Clusters) {
9298 if (CC.MBB != DefaultMBB)
9301 Clusters = std::move(New);
9307 if (Clusters.empty()) {
9309 if (DefaultMBB != NextBlock(SwitchMBB)) {
9316 findJumpTables(Clusters, &SI, DefaultMBB);
9317 findBitTestClusters(Clusters, &SI);
9320 dbgs() <<
"Case clusters: ";
9321 for (
const CaseCluster &
C : Clusters) {
9322 if (
C.Kind == CC_JumpTable)
dbgs() <<
"JT:";
9323 if (
C.Kind == CC_BitTests)
dbgs() <<
"BT:";
9325 C.Low->getValue().print(
dbgs(),
true);
9326 if (
C.Low !=
C.High) {
9328 C.High->getValue().print(
dbgs(),
true);
9335 assert(!Clusters.empty());
9336 SwitchWorkList WorkList;
9337 CaseClusterIt First = Clusters.begin();
9338 CaseClusterIt Last = Clusters.end() - 1;
9339 auto DefaultProb = getEdgeProbability(SwitchMBB, DefaultMBB);
9340 WorkList.push_back({SwitchMBB, First, Last,
nullptr,
nullptr, DefaultProb});
9342 while (!WorkList.empty()) {
9343 SwitchWorkListItem W = WorkList.back();
9344 WorkList.pop_back();
9345 unsigned NumClusters = W.LastCluster - W.FirstCluster + 1;
9350 splitWorkItem(WorkList, W, SI.
getCondition(), SwitchMBB);
9354 lowerWorkItem(W, SI.
getCondition(), SwitchMBB, DefaultMBB);
AttributeSet getAttributes() const
Return the parameter attributes for this call.
MVT getSimpleValueType() const
Return the simple ValueType of the referenced return value.
SDValue getStore(SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr, MachinePointerInfo PtrInfo, unsigned Alignment=0, MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const AAMDNodes &AAInfo=AAMDNodes())
Helper function to build ISD::STORE nodes.
void setHasStackMap(bool s=true)
ADJUST_TRAMPOLINE - This corresponds to the adjust_trampoline intrinsic.
unsigned getStackAlignment() const
getStackAlignment - This method returns the number of bytes to which the stack pointer must be aligne...
void setAllowReciprocal(bool b)
BITCAST - This operator converts between integer, vector and FP values, as if the value was stored to...
X = FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type down to the precision of the ...
BasicBlock * getSuccessor(unsigned i) const
Return a value (possibly void), from a function.
SDValue getGlobalAddress(const GlobalValue *GV, const SDLoc &DL, EVT VT, int64_t offset=0, bool isTargetGA=false, unsigned char TargetFlags=0)
Value * getValueOperand()
const Value * getCalledValue() const
Get a pointer to the function that is invoked by this instruction.
std::vector< BitTestBlock > BitTestCases
BitTestCases - Vector of BitTestBlock structures used to communicate SwitchInst code generation infor...
static MVT getIntegerVT(unsigned BitWidth)
void setByValAlign(unsigned A)
void push_back(const T &Elt)
unsigned Log2_32_Ceil(uint32_t Value)
Log2_32_Ceil - This function returns the ceil log base 2 of the specified value, 32 if the value is z...
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
bool isEHPad() const
Returns true if the block is a landing pad.
SelectionDAGBuilder * SDB
A parsed version of the target data layout string in and methods for querying it. ...
AtomicOrdering getFailureOrdering() const
Returns the ordering constraint on this cmpxchg.
AsmDialect getDialect() const
static ConstantInt * getFalse(LLVMContext &Context)
CallingConv::ID getLibcallCallingConv(RTLIB::Libcall Call) const
Get the CallingConv that should be used for the specified libcall.
ISD::CondCode getICmpCondCode(ICmpInst::Predicate Pred)
getICmpCondCode - Return the ISD condition code corresponding to the given LLVM IR integer condition ...
FMINNUM/FMAXNUM - Perform floating-point minimum or maximum on two values.
SDValue getValue(unsigned R) const
This class is the base class for the comparison instructions.
const SelectionDAGTargetInfo & getSelectionDAGInfo() const
virtual bool isZExtFree(Type *FromTy, Type *ToTy) const
Return true if any actual instruction that defines a value of type FromTy implicitly zero-extends the...
bool findValue(const Value *V) const
static SDValue getCopyFromParts(SelectionDAG &DAG, const SDLoc &DL, const SDValue *Parts, unsigned NumParts, MVT PartVT, EVT ValueVT, const Value *V, Optional< ISD::NodeType > AssertOp=None)
getCopyFromParts - Create a value that contains the specified legal parts combined into the value the...
virtual ConstraintType getConstraintType(StringRef Constraint) const
Given a constraint, return the type of constraint it is for this target.
EXTRACT_ELEMENT - This is used to get the lower or upper (determined by a Constant, which is required to be operand #1) half of the integer or float value specified as operand #0.
*p = old <signed v ? old : v
iterator_range< CaseIt > cases()
Iteration adapter for range-for loops.
LLVMContext * getContext() const
LLVM Argument representation.
static bool areJTsAllowed(const TargetLowering &TLI, const SwitchInst *SI)
SDValue getSetCC(const SDLoc &DL, EVT VT, SDValue LHS, SDValue RHS, ISD::CondCode Cond)
Helper function to make it easier to build SetCC's if you just have an ISD::CondCode instead of an SD...
static SDValue getAddressForMemoryInput(SDValue Chain, const SDLoc &Location, SDISelAsmOperandInfo &OpInfo, SelectionDAG &DAG)
Get a direct memory input to behave well as an indirect operand.
const Instruction & back() const
SDValue getCALLSEQ_END(SDValue Chain, SDValue Op1, SDValue Op2, SDValue InGlue, const SDLoc &DL)
Return a new CALLSEQ_END node, which always must have a glue result (to ensure it's not CSE'd)...
void addStackRoot(int Num, const Constant *Metadata)
addStackRoot - Registers a root that lives on the stack.
virtual SDValue prepareVolatileOrAtomicLoad(SDValue Chain, const SDLoc &DL, SelectionDAG &DAG) const
This callback is used to prepare for a volatile or atomic load.
DELETED_NODE - This is an illegal value that is used to catch errors.
EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR (an vector value) starting with the ...
LegalizeTypeAction getTypeAction(LLVMContext &Context, EVT VT) const
Return how we should legalize values of this type, either it is already legal (return 'Legal') or we ...
LLVM_ATTRIBUTE_NORETURN void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
bool isVolatile() const
Return true if this is a store to a volatile memory location.
void ExportFromCurrentBlock(const Value *V)
ExportFromCurrentBlock - If this condition isn't known to be exported from the current basic block...
SynchronizationScope getSynchScope() const
const TargetLibraryInfo * LibInfo
ArrayRef< unsigned > getIndices() const
unsigned getNumRegisters(LLVMContext &Context, EVT VT) const
Return the number of registers that this ValueType will eventually require.
static SDValue expandExp2(const SDLoc &dl, SDValue Op, SelectionDAG &DAG, const TargetLowering &TLI)
expandExp2 - Lower an exp2 intrinsic.
SDDbgValue * getDbgValue(MDNode *Var, MDNode *Expr, SDNode *N, unsigned R, bool IsIndirect, uint64_t Off, const DebugLoc &DL, unsigned O)
Creates a SDDbgValue node.
static MVT getVectorVT(MVT VT, unsigned NumElements)
void setMemRefs(mmo_iterator NewMemRefs, mmo_iterator NewMemRefsEnd)
Assign this MachineSDNodes's memory reference descriptor list.
void setCallsUnwindInit(bool b)
bool onlyReadsMemory() const
Determine if the function does not access or only reads memory.
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
unsigned getCatchPadExceptionPointerVReg(const Value *CPI, const TargetRegisterClass *RC)
unsigned EnableFastISel
EnableFastISel - This flag enables fast-path instruction selection which trades away generated code q...
int getNumber() const
MachineBasicBlocks are uniquely numbered at the function level, unless they're not in a MachineFuncti...
A Module instance is used to store all the information related to an LLVM module. ...
void LowerDeoptimizeCall(const CallInst *CI)
AtomicOrdering getSuccessOrdering() const
Returns the ordering constraint on this cmpxchg.
An instruction for ordering other memory operations.
void CopyValueToVirtualRegister(const Value *V, unsigned Reg)
an instruction that atomically checks whether a specified value is in a memory location, and, if it is, stores a new value there.
const Value * getSplatValue(const Value *V)
Get splat value if the input is a splat vector or return nullptr.
unsigned createVirtualRegister(const TargetRegisterClass *RegClass)
createVirtualRegister - Create and return a new virtual register in the function with the specified r...
virtual std::pair< SDValue, SDValue > EmitTargetCodeForStrcmp(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Op1, SDValue Op2, MachinePointerInfo Op1PtrInfo, MachinePointerInfo Op2PtrInfo) const
Emit target-specific code that performs a strcmp, in cases where that is faster than a libcall...
static unsigned LimitFloatPrecision
LimitFloatPrecision - Generate low-precision inline sequences for some float libcalls (6...
DILocalScope * getScope() const
Get the local scope for this variable.
void addLandingPadInfo(const LandingPadInst &I, MachineBasicBlock &MBB)
Extract the exception handling information from the landingpad instruction and add them to the specif...
unsigned getNumOperands() const
SelectionDAGBuilder - This is the common target-independent lowering implementation that is parameter...
A specialization of it's base class for read only access to a gc.statepoint.
const TargetMachine & getTarget() const
unsigned getPrefTypeAlignment(Type *Ty) const
Returns the preferred stack/global alignment for the specified type.
MCSymbol * getOrCreateFrameAllocSymbol(StringRef FuncName, unsigned Idx)
Gets a symbol that will be defined to the final stack offset of a local variable after codegen...
static unsigned getFlagWord(unsigned Kind, unsigned NumOps)
SDNode * getGluedNode() const
If this node has a glue operand, return the node to which the glue operand points.
bool isNonNegative() const
Determine if this APInt Value is non-negative (>= 0)
void LowerStatepoint(ImmutableStatepoint Statepoint, const BasicBlock *EHPadBB=nullptr)
static bool isVirtualRegister(unsigned Reg)
Return true if the specified register number is in the virtual register namespace.
const TargetSubtargetInfo & getSubtarget() const
STACKRESTORE has two operands, an input chain and a pointer to restore to it returns an output chain...
This class represents a function call, abstracting a target machine's calling convention.
bool isConvergent() const
Determine if the call is convergent.
unsigned InferPtrAlignment(SDValue Ptr) const
Infer alignment of a load / store address.
MVT getSimpleValueType(const DataLayout &DL, Type *Ty, bool AllowUnknown=false) const
Return the MVT corresponding to this LLVM type. See getValueType.
bool usesUnderscoreSetJmp() const
Determine if we should use _setjmp or setjmp to implement llvm.setjmp.
size_type count(PtrType Ptr) const
count - Return 1 if the specified pointer is in the set, 0 otherwise.
Libcall
RTLIB::Libcall enum - This enum defines all of the runtime library calls the backend can emit...
const std::string & getAsmString() const
static uint64_t round(uint64_t Acc, uint64_t Input)
gep_type_iterator gep_type_end(const User *GEP)
SDValue getBasicBlock(MachineBasicBlock *MBB)
RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition.
unsigned getOpcode() const
Return the SelectionDAG opcode value for this node.
*p = old <unsigned v ? old : v
void LowerDeoptimizingReturn()
void setValue(const Value *V, SDValue NewN)
unsigned getID() const
Return the register class ID number.
void visitJumpTableHeader(JumpTable &JT, JumpTableHeader &JTH, MachineBasicBlock *SwitchBB)
visitJumpTableHeader - This function emits necessary code to produce index in the JumpTable from swit...
Function Alias Analysis Results
*p = old >unsigned v ? old : v
Type * getTypeForEVT(LLVMContext &Context) const
getTypeForEVT - This method returns an LLVM type corresponding to the specified EVT.
unsigned getSizeInBits() const
This instruction constructs a fixed permutation of two input vectors.
virtual bool functionArgumentNeedsConsecutiveRegisters(Type *Ty, CallingConv::ID CallConv, bool isVarArg) const
For some targets, an LLVM struct type must be broken down into multiple simple types, but the calling convention specifies that the entire struct must be passed in a block of consecutive registers.
bool isTokenTy() const
Return true if this is 'token'.
void addSuccessorWithoutProb(MachineBasicBlock *Succ)
Add Succ as a successor of this MachineBasicBlock.
Val, Success, OUTCHAIN = ATOMIC_CMP_SWAP_WITH_SUCCESS(INCHAIN, ptr, cmp, swap) N.b.
static SDValue expandLog2(const SDLoc &dl, SDValue Op, SelectionDAG &DAG, const TargetLowering &TLI)
expandLog2 - Lower a log2 intrinsic.
Type * getReturnType() const
Returns the type of the ret val.
bool all_of(R &&range, UnaryPredicate P)
Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly...
void setInConsecutiveRegs()
const Function * getParent() const
Return the enclosing method, or null if none.
Value * getNewValOperand()
const SDValue & getOperand(unsigned Num) const
Attribute getFnAttribute(Attribute::AttrKind Kind) const
Return the attribute for the given attribute kind.
const Function * getFunction() const
getFunction - Return the LLVM function that this machine code represents
CallLoweringInfo & setDebugLoc(const SDLoc &dl)
This class represents a sign extension of integer types.
uint64_t alignTo(uint64_t Value, uint64_t Align, uint64_t Skew=0)
Returns the next integer (mod 2**64) that is greater than or equal to Value and is a multiple of Alig...
virtual bool allowsMisalignedMemoryAccesses(EVT, unsigned AddrSpace=0, unsigned Align=1, bool *=nullptr) const
Determine if the target supports unaligned memory accesses.
An instruction for reading from memory.
static IntegerType * getInt64Ty(LLVMContext &C)
[US]{MIN/MAX} - Binary minimum or maximum or signed or unsigned integers.
an instruction that atomically reads a memory location, combines it with another value, and then stores the result back.
void GetUnderlyingObjects(Value *V, SmallVectorImpl< Value * > &Objects, const DataLayout &DL, LoopInfo *LI=nullptr, unsigned MaxLookup=6)
This method is similar to GetUnderlyingObject except that it can look through phi and select instruct...
SDValue getTargetExternalSymbol(const char *Sym, EVT VT, unsigned char TargetFlags=0)
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, ArrayRef< SDUse > Ops)
Gets or creates the specified node.
SDDbgValue * getFrameIndexDbgValue(MDNode *Var, MDNode *Expr, unsigned FI, uint64_t Off, const DebugLoc &DL, unsigned O)
FrameIndex.
bool CanLowerReturn
CanLowerReturn - true iff the function's return value can be lowered to registers.
unsigned getTypeIDFor(const GlobalValue *TI)
Return the type id for the specified typeinfo. This is function wide.
const SDValue & setRoot(SDValue N)
Set the current root tag of the SelectionDAG.
Type * getElementType() const
static IntegerType * getInt16Ty(LLVMContext &C)
bool hasAttribute(unsigned Index, Attribute::AttrKind Kind) const
Return true if the attribute exists at the given index.
virtual unsigned getExceptionPointerRegister(const Constant *PersonalityFn) const
If a physical register, this returns the register that receives the exception address on entry to an ...
const MCPhysReg * iterator
bool isNoBuiltin() const
Return true if the call should not be treated as a call to a builtin.
Maximum length of the test input libFuzzer tries to guess a good value based on the corpus and reports it always prefer smaller inputs during the corpus shuffle When libFuzzer itself reports a bug this exit code will be used If indicates the maximal total time in seconds to run the fuzzer minimizes the provided crash input Use with strcmp
GlobalValue * ExtractTypeInfo(Value *V)
ExtractTypeInfo - Returns the type info, possibly bitcast, encoded in V.
static void diagnosePossiblyInvalidConstraint(LLVMContext &Ctx, const Value *V, const Twine &ErrMsg)
void setNoSignedZeros(bool b)
void DeleteNode(SDNode *N)
Remove the specified node from the system.
SDValue getValueImpl(const Value *V)
getValueImpl - Helper function for getValue and getNonRegisterValue.
SDValue getConstantPool(const Constant *C, EVT VT, unsigned Align=0, int Offs=0, bool isT=false, unsigned char TargetFlags=0)
*p = old >signed v ? old : v
DebugLoc getCurDebugLoc() const
uint64_t getOffset() const
static unsigned getUnderlyingArgReg(const SDValue &N)
EntryToken - This is the marker used to indicate the start of a region.
bool optForSize() const
Optimize this function for size (-Os) or minimum size (-Oz).
OUTCHAIN = ATOMIC_FENCE(INCHAIN, ordering, scope) This corresponds to the fence instruction.
void setCurrentSwiftErrorVReg(const MachineBasicBlock *MBB, const Value *, unsigned)
Set the swifterror virtual register in the SwiftErrorVRegDefMap for this basic block.
void AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter)
Add a dbg_value SDNode.
NodeType
ISD::NodeType enum - This enum defines the target-independent operators for a SelectionDAG.
unsigned getResNo() const
get the index which selects a specific result in the SDNode
SDValue getMCSymbol(MCSymbol *Sym, EVT VT)
void ReplaceAllUsesOfValuesWith(const SDValue *From, const SDValue *To, unsigned Num)
Like ReplaceAllUsesOfValueWith, but for multiple values at once.
bool bitsLT(EVT VT) const
bitsLT - Return true if this has less bits than VT.
bool optForMinSize() const
Optimize this function for minimum size (-Oz).
SDValue getExternalSymbol(const char *Sym, EVT VT)
CallingConv::ID getCallingConv() const
getCallingConv()/setCallingConv(CC) - These method get and set the calling convention of this functio...
unsigned arg_size() const
void computeUsesVAFloatArgument(const CallInst &I, MachineModuleInfo &MMI)
Determine if any floating-point values are being passed to this variadic function, and set the MachineModuleInfo's usesVAFloatArgument flag if so.
RESULT,OUTCHAIN = INTRINSIC_W_CHAIN(INCHAIN, INTRINSICID, arg1, ...) This node represents a target in...
void setCurrentCallSite(unsigned Site)
Set the call site currently being processed.
StringRef getName() const
Return a constant reference to the value's name.
MachineJumpTableInfo * getOrCreateJumpTableInfo(unsigned JTEntryKind)
getOrCreateJumpTableInfo - Get the JumpTableInfo for this function, if it does already exist...
SDValue getValue(const Value *V)
getValue - Return an SDValue for the given Value.
static void getCopyToParts(SelectionDAG &DAG, const SDLoc &DL, SDValue Val, SDValue *Parts, unsigned NumParts, MVT PartVT, const Value *V, ISD::NodeType ExtendKind=ISD::ANY_EXTEND)
getCopyToParts - Create a series of nodes that contain the specified value split into legal parts...
iterator begin()
Instruction iterator methods.
bool isSingleValueType() const
Return true if the type is a valid type for a register in codegen.
static MCDisassembler::DecodeStatus addOperand(MCInst &Inst, const MCOperand &Opnd)
OUTCHAIN = EH_SJLJ_LONGJMP(INCHAIN, buffer) This corresponds to the eh.sjlj.longjmp intrinsic...
Instruction * getFirstNonPHIOrDbg()
Returns a pointer to the first instruction in this block that is not a PHINode or a debug intrinsic...
bool isVector() const
isVector - Return true if this is a vector value type.
SDValue getIntPtrConstant(uint64_t Val, const SDLoc &DL, bool isTarget=false)
void setNoSignedWrap(bool b)
void visitSPDescriptorParent(StackProtectorDescriptor &SPD, MachineBasicBlock *ParentBB)
Codegen a new tail for a stack protector check ParentMBB which has had its tail spliced into a stack ...
Value * getAddress() const
SDValue getRoot()
getRoot - Return the current virtual root of the Selection DAG, flushing any PendingLoad items...
The address of a basic block.
bool onlyReadsMemory() const
Determine if the call does not access or only reads memory.
bool hasOperandBundlesOtherThan(ArrayRef< uint32_t > IDs) const
Return true if this operand bundle user contains operand bundles with tags other than those specified...
void setAttributes(ImmutableCallSite *CS, unsigned AttrIdx)
Set CallLoweringInfo attribute flags based on a call instruction and called function attributes...
CLEANUPRET - Represents a return from a cleanup block funclet.
bool hasNoNaNs() const
Determine whether the no-NaNs flag is set.
bool isUnconditional() const
A description of a memory reference used in the backend.
unsigned DemoteRegister
DemoteRegister - if CanLowerReturn is false, DemoteRegister is a vreg allocated to hold a pointer to ...
void setHasPatchPoint(bool s=true)
static unsigned getFlagWordForRegClass(unsigned InputFlag, unsigned RC)
getFlagWordForRegClass - Augment an existing flag word returned by getFlagWord with the required regi...
void AddInlineAsmOperands(unsigned Kind, bool HasMatching, unsigned MatchingIdx, const SDLoc &dl, SelectionDAG &DAG, std::vector< SDValue > &Ops) const
AddInlineAsmOperands - Add this value to the specified inlineasm node operand list.
virtual std::pair< SDValue, SDValue > EmitTargetCodeForMemcmp(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, MachinePointerInfo Op1PtrInfo, MachinePointerInfo Op2PtrInfo) const
Emit target-specific code that performs a memcmp, in cases where that is faster than a libcall...
unsigned getNumBlockIDs() const
getNumBlockIDs - Return the number of MBB ID's allocated.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
bool hasGC() const
hasGC/getGC/setGC/clearGC - The name of the garbage collection algorithm to use during code generatio...
PCMARKER - This corresponds to the pcmarker intrinsic.
bool noSignedZeros() const
void visitSwitchCase(CaseBlock &CB, MachineBasicBlock *SwitchBB)
visitSwitchCase - Emits the necessary code to represent a single node in the binary search tree resul...
struct fuzzer::@269 Flags
void setVectorReduction(bool b)
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
const HexagonInstrInfo * TII
const APInt & getValue() const
Return the constant as an APInt value reference.
ArrayRef< T > makeArrayRef(const T &OneElt)
Construct an ArrayRef from a single element.
static MachineOperand CreateReg(unsigned Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false)
static bool hasOnlySelectUsers(const Value *Cond)
Shift and rotation operations.
X86_INTR - x86 hardware interrupt context.
std::size_t countTrailingOnes(T Value, ZeroBehavior ZB=ZB_Width)
Count the number of ones from the least significant bit to the first zero bit.
Class to represent struct types.
void EmitBranchForMergedCondition(const Value *Cond, MachineBasicBlock *TBB, MachineBasicBlock *FBB, MachineBasicBlock *CurBB, MachineBasicBlock *SwitchBB, BranchProbability TW, BranchProbability FW)
EmitBranchForMergedCondition - Helper method for FindMergedConditions.
EVT getValueType(unsigned ResNo) const
Return the type of a specified result.
A Use represents the edge between a Value definition and its users.
bool hasOptimizedCodeGen(LibFunc::Func F) const
Tests if the function is both available and a candidate for optimized code generation.
const Value * SwiftErrorArg
The swifterror argument of the current function.
MachineSDNode * getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT)
These are used for target selectors to create a new node with specified return type(s), MachineInstr opcode, and operands.
MachineFunction & getMachineFunction() const
void visitJumpTable(JumpTable &JT)
visitJumpTable - Emit JumpTable node in the current MBB
DenseMap< const Value *, unsigned > ValueMap
ValueMap - Since we emit code for the function a basic block at a time, we must remember which virtua...
ValTy * getCalledValue() const
getCalledValue - Return the pointer to function that is being called.
TargetLowering::ConstraintType ConstraintType
Information about the constraint code, e.g.
SDValue getMaskedScatter(SDVTList VTs, EVT VT, const SDLoc &dl, ArrayRef< SDValue > Ops, MachineMemOperand *MMO)
CallLoweringInfo & setChain(SDValue InChain)
BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
bool isReg() const
isReg - Tests if this is a MO_Register operand.
unsigned getNumArgOperands() const
Return the number of call arguments.
Instruction * getFirstNonPHI()
Returns a pointer to the first instruction in this block that is not a PHINode instruction.
virtual bool isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const
Returns true if a cast between SrcAS and DestAS is a noop.
const TargetRegisterClass * getRegClass(unsigned Reg) const
Return the register class of the specified virtual register.
static unsigned findMatchingInlineAsmOperand(unsigned OperandNo, const std::vector< SDValue > &AsmNodeOperands)
FLT_ROUNDS_ - Returns current rounding mode: -1 Undefined 0 Round to 0 1 Round to nearest 2 Round to ...
const Value * getCalledValue() const
Get a pointer to the function that is invoked by this instruction.
std::vector< MachineBasicBlock * >::iterator succ_iterator
SmallVector< EVT, 4 > ValueVTs
ValueVTs - The value types of the values, which may not be legal, and may need be promoted or synthes...
static void getCopyToPartsVector(SelectionDAG &DAG, const SDLoc &dl, SDValue Val, SDValue *Parts, unsigned NumParts, MVT PartVT, const Value *V)
getCopyToPartsVector - Create a series of nodes that contain the specified value split into legal par...
iterator begin() const
begin/end - Return all of the registers in this class.
Constant * getPersonalityFn() const
Get the personality function associated with this function.
Reg
All possible values of the reg field in the ModR/M byte.
TypeID
Definitions of all of the base types for the Type system.
NaN behavior not applicable.
EH_DWARF_CFA - This node represents the pointer to the DWARF Canonical Frame Address (CFA)...
The memory access is dereferenceable (i.e., doesn't trap).
EVT getScalarType() const
getScalarType - If this is a vector type, return the element type, otherwise return this...
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted...
Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amt) For double-word atomic operations: ValLo, ValHi, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amtLo, amtHi) ValLo, ValHi, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amtLo, amtHi) These correspond to the atomicrmw instruction.
static bool isRegDefEarlyClobberKind(unsigned Flag)
static unsigned convertMemFlagWordToMatchingFlagWord(unsigned InputFlag)
bool bitsGE(EVT VT) const
bitsGE - Return true if this has no less bits than VT.
void setByValSize(unsigned S)
SDVTList getVTList(EVT VT)
Return an SDVTList that represents the list of values specified.
unsigned getStoreSize() const
getStoreSize - Return the number of bytes overwritten by a store of the specified value type...
FRAMEADDR, RETURNADDR - These nodes represent llvm.frameaddress and llvm.returnaddress on the DAG...
void setFunctionContextIndex(int I)
void setIsCleanupFuncletEntry(bool V=true)
Indicates if this is the entry block of a cleanup funclet.
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
bool isInteger() const
isInteger - Return true if this is an integer, or a vector integer type.
INLINEASM - Represents an inline asm block.
OutputArg - This struct carries flags and a value for a single outgoing (actual) argument or outgoing...
This represents a list of ValueType's that has been intern'd by a SelectionDAG.
unsigned getEVTAlignment(EVT MemoryVT) const
Compute the default alignment value for the given type.
SynchronizationScope getSynchScope() const
LLVM_NODISCARD bool empty() const
SmallVector< ISD::InputArg, 32 > Ins
AtomicOrdering
Atomic ordering for LLVM's memory model.
Interval::succ_iterator succ_begin(Interval *I)
succ_begin/succ_end - define methods so that Intervals may be used just like BasicBlocks can with the...
STACKSAVE - STACKSAVE has one operand, an input chain.
uint64_t getZExtValue() const
Return the constant as a 64-bit unsigned integer value after it has been zero extended as appropriate...
SDValue getMergeValues(ArrayRef< SDValue > Ops, const SDLoc &dl)
Create a MERGE_VALUES node from the given operands.
virtual MVT getVectorIdxTy(const DataLayout &DL) const
Returns the type to be used for the index operand of: ISD::INSERT_VECTOR_ELT, ISD::EXTRACT_VECTOR_ELT...
EVT getVectorElementType() const
getVectorElementType - Given a vector type, return the type of each element.
void assign(size_type NumElts, const T &Elt)
bool hasBigEndianPartOrdering(EVT VT, const DataLayout &DL) const
When splitting a value of the specified type into parts, does the Lo or Hi part come first...
int getArgumentFrameIndex(const Argument *A)
getArgumentFrameIndex - Get frame index for the byval argument.
auto reverse(ContainerTy &&C, typename std::enable_if< has_rbegin< ContainerTy >::value >::type *=nullptr) -> decltype(make_range(C.rbegin(), C.rend()))
void emitError(unsigned LocCookie, const Twine &ErrorStr)
emitError - Emit an error message to the currently installed error handler with optional location inf...
Value * getPointerOperand()
SDValue getSExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT)
Convert Op, which must be of integer type, to the integer type VT, by either sign-extending or trunca...
This is a fast-path instruction selection class that generates poor code and doesn't support illegal ...
Class to represent function types.
A constant value that is initialized with an expression using other constant values.
AtomicOrdering getOrdering() const
Returns the ordering constraint on this RMW.
static SDValue getLoadStackGuard(SelectionDAG &DAG, const SDLoc &DL, SDValue &Chain)
Create a LOAD_STACK_GUARD node, and let it carry the target specific global variable if there exists ...
virtual EVT getTypeForExtReturn(LLVMContext &Context, EVT VT, ISD::NodeType) const
Return the type that should be used to zero or sign extend a zeroext/signext integer return value...
CallingConv::ID getCallingConv() const
getCallingConv/setCallingConv - get or set the calling convention of the call.
CATCHPAD - Represents a catchpad instruction.
[SU]INT_TO_FP - These operators convert integers (whose interpreted sign depends on the first letter)...
SDValue getMaskedGather(SDVTList VTs, EVT VT, const SDLoc &dl, ArrayRef< SDValue > Ops, MachineMemOperand *MMO)
bool usesUnderscoreLongJmp() const
Determine if we should use _longjmp or longjmp to implement llvm.longjmp.
LLVMContext & getContext() const
Return the LLVMContext in which this type was uniqued.
OUTCHAIN = EH_SJLJ_SETUP_DISPATCH(INCHAIN) The target initializes the dispatch table here...
std::pair< SDValue, SDValue > LowerCallTo(CallLoweringInfo &CLI) const
This function lowers an abstract call to a function into an actual call.
const LiveOutInfo * GetLiveOutRegInfo(unsigned Reg)
GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the register is a PHI destinat...
unsigned getNumValues() const
Return the number of values defined/returned by this operator.
static void normalizeProbabilities(ProbabilityIter Begin, ProbabilityIter End)
ConstantDataSequential - A vector or array constant whose element type is a simple 1/2/4/8-byte integ...
void GetReturnInfo(Type *ReturnType, AttributeSet attr, SmallVectorImpl< ISD::OutputArg > &Outs, const TargetLowering &TLI, const DataLayout &DL)
Given an LLVM IR type and return type attributes, compute the return value EVTs and flags...
SDValue getTargetFrameIndex(int FI, EVT VT)
virtual std::pair< SDValue, SDValue > EmitTargetCodeForStrlen(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src, MachinePointerInfo SrcPtrInfo) const
Select with a vector condition (op #0) and two vector operands (ops #1 and #2), returning a vector re...
This contains information for each constraint that we are lowering.
Simple integer binary arithmetic operators.
SDValue getNonRegisterValue(const Value *V)
getNonRegisterValue - Return an SDValue for the given Value, but don't look in FuncInfo.ValueMap for a virtual register.
This instruction compares its operands according to the predicate given to the constructor.
static void GetRegistersForValue(SelectionDAG &DAG, const TargetLowering &TLI, const SDLoc &DL, SDISelAsmOperandInfo &OpInfo)
GetRegistersForValue - Assign registers (virtual or physical) for the specified operand.
BasicBlock * getSuccessor(unsigned i) const
SmallVector< ISD::OutputArg, 32 > Outs
void setCallSiteBeginLabel(MCSymbol *BeginLabel, unsigned Site)
Map the begin label for a call site.
static void patchMatchingInput(const SDISelAsmOperandInfo &OpInfo, SDISelAsmOperandInfo &MatchingOpInfo, SelectionDAG &DAG)
Make sure that the output operand OpInfo and its corresponding input operand MatchingOpInfo have comp...
This class represents a no-op cast from one type to another.
unsigned getCurrentCallSite()
Get the call site currently being processed, if any.
virtual std::pair< SDValue, SDValue > EmitTargetCodeForStrnlen(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src, SDValue MaxLength, MachinePointerInfo SrcPtrInfo) const
unsigned getActiveBits() const
Compute the number of active bits in the value.
bool isFloatingPointTy() const
Return true if this is one of the six floating-point types.
bool ShouldEmitAsBranches(const std::vector< CaseBlock > &Cases)
If the set of cases should be emitted as a series of branches, return true.
SDValue lowerRangeToAssertZExt(SelectionDAG &DAG, const Instruction &I, SDValue Op)
static SDValue expandPow(const SDLoc &dl, SDValue LHS, SDValue RHS, SelectionDAG &DAG, const TargetLowering &TLI)
visitPow - Lower a pow intrinsic.
SDValue getUNDEF(EVT VT)
Return an UNDEF node. UNDEF does not have a useful SDLoc.
static GCRegistry::Add< OcamlGC > B("ocaml","ocaml 3.10-compatible GC")
An instruction for storing to memory.
SDValue getMaskedStore(SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr, SDValue Mask, EVT MemVT, MachineMemOperand *MMO, bool IsTruncating=false, bool IsCompressing=false)
CondCode
ISD::CondCode enum - These are ordered carefully to make the bitfields below work out...
virtual SDValue LowerCall(CallLoweringInfo &, SmallVectorImpl< SDValue > &) const
This hook must be implemented to lower calls into the specified DAG.
EVT getValueType(const DataLayout &DL, Type *Ty, bool AllowUnknown=false) const
Return the EVT corresponding to this LLVM type.
bool allowReciprocal() const
Libcall getMEMCPY_ELEMENT_ATOMIC(uint64_t ElementSize)
getMEMCPY_ELEMENT_ATOMIC - Return MEMCPY_ELEMENT_ATOMIC_* value for the given element size or UNKNOW_...
CodeGenOpt::Level getOptLevel() const
Returns the optimization level: None, Less, Default, or Aggressive.
ISD::CondCode getFCmpCondCode(FCmpInst::Predicate Pred)
getFCmpCondCode - Return the ISD condition code corresponding to the given LLVM IR floating-point con...
void populateCallLoweringInfo(TargetLowering::CallLoweringInfo &CLI, ImmutableCallSite CS, unsigned ArgIdx, unsigned NumArgs, SDValue Callee, Type *ReturnTy, bool IsPatchPoint)
Populate a CallLowerinInfo (into CLI) based on the properties of the call being lowered.
READCYCLECOUNTER - This corresponds to the readcyclecounter intrinsic.
SDValue getTargetConstant(uint64_t Val, const SDLoc &DL, EVT VT, bool isOpaque=false)
ConstraintPrefix Type
Type - The basic type of the constraint: input/output/clobber.
static bool isRegDefKind(unsigned Flag)
SDValue getSplatBuildVector(EVT VT, const SDLoc &DL, SDValue Op)
Return a splat ISD::BUILD_VECTOR node, consisting of Op splatted to all elements. ...
void setSuccProbability(succ_iterator I, BranchProbability Prob)
Set successor probability of a given iterator.
element_iterator elements_begin() const
void setStackProtectorIndex(int I)
BasicBlock * getSuccessor() const
void setOrigAlign(unsigned A)
SDValue getAtomic(unsigned Opcode, const SDLoc &dl, EVT MemVT, SDValue Chain, SDValue Ptr, SDValue Val, const Value *PtrVal, unsigned Alignment, AtomicOrdering Ordering, SynchronizationScope SynchScope)
Gets a node for an atomic op, produces result (if relevant) and chain and takes 2 operands...
Type * getScalarType() const LLVM_READONLY
If this is a vector type, return the element type, otherwise return 'this'.
static SDValue getLimitedPrecisionExp2(SDValue t0, const SDLoc &dl, SelectionDAG &DAG)
RESULT = INTRINSIC_WO_CHAIN(INTRINSICID, arg1, arg2, ...) This node represents a target intrinsic fun...
bool doesNotAccessMemory() const
Determine if the function does not access memory.
Type * getElementType() const
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *bb=nullptr)
CreateMachineBasicBlock - Allocate a new MachineBasicBlock.
const DataLayout & getDataLayout() const
bool isAtomic() const
Return true if this instruction has an AtomicOrdering of unordered or higher.
void ComputeValueVTs(const TargetLowering &TLI, const DataLayout &DL, Type *Ty, SmallVectorImpl< EVT > &ValueVTs, SmallVectorImpl< uint64_t > *Offsets=nullptr, uint64_t StartingOffset=0)
ComputeValueVTs - Given an LLVM IR type, compute a sequence of EVTs that represent all the individual...
Maximum length of the test input libFuzzer tries to guess a good value based on the corpus and reports it always prefer smaller inputs during the corpus shuffle When libFuzzer itself reports a bug this exit code will be used If indicates the maximal total time in seconds to run the fuzzer minimizes the provided crash input Use with etc Experimental Use value profile to guide fuzzing Number of simultaneous worker processes to run the jobs If min(jobs, NumberOfCpuCores()/2)\" is used.") FUZZER_FLAG_INT(reload
Class to represent pointers.
void normalizeSuccProbs()
Normalize probabilities of all successors so that the sum of them becomes one.
const BasicBlock * getBasicBlock() const
Return the LLVM basic block that this instance corresponded to originally.
void append(const RegsForValue &RHS)
append - Add the specified values to this one.
static GCRegistry::Add< CoreCLRGC > E("coreclr","CoreCLR-compatible GC")
FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.
Interval::succ_iterator succ_end(Interval *I)
virtual bool supportSwiftError() const
Return true if the target supports swifterror attribute.
SelectPatternResult matchSelectPattern(Value *V, Value *&LHS, Value *&RHS, Instruction::CastOps *CastOp=nullptr)
Pattern match integer [SU]MIN, [SU]MAX and ABS idioms, returning the kind and providing the out param...
static const fltSemantics & IEEEsingle()
Flag
These should be considered private to the implementation of the MCInstrDesc class.
BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a vector with the specified, possibly variable...
TargetInstrInfo - Interface to description of machine instruction set.
This corresponds to the llvm.lifetime.
bool unsafeAlgebra() const
static Constant * getBitCast(Constant *C, Type *Ty, bool OnlyIfReduced=false)
bool isSized(SmallPtrSetImpl< Type * > *Visited=nullptr) const
Return true if it makes sense to take the size of this type.
unsigned getNumSuccessors() const
Return the number of successors that this terminator has.
SDNode * getNode() const
get the SDNode which holds the desired result
bool pointsToConstantMemory(const MemoryLocation &Loc, bool OrLocal=false)
Checks whether the given location points to constant memory, or if OrLocal is true whether it points ...
The memory access is volatile.
an instruction for type-safe pointer arithmetic to access elements of arrays and structs ...
bool getLibFunc(StringRef funcName, LibFunc::Func &F) const
Searches for a particular function name.
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
unsigned getStoreSize() const
getStoreSize - Return the number of bytes overwritten by a store of the specified value type...
SDValue getMDNode(const MDNode *MD)
Return an MDNodeSDNode which holds an MDNode.
bool isTypeLegal(EVT VT) const
Return true if the target has native support for the specified value type.
initializer< Ty > init(const Ty &Val)
SDValue getVectorShuffle(EVT VT, const SDLoc &dl, SDValue N1, SDValue N2, ArrayRef< int > Mask)
Return an ISD::VECTOR_SHUFFLE node.
std::pair< SDValue, SDValue > lowerInvokable(TargetLowering::CallLoweringInfo &CLI, const BasicBlock *EHPadBB=nullptr)
SmallVector< SDValue, 4 > InVals
element_iterator elements_end() const
OUTCHAIN = INTRINSIC_VOID(INCHAIN, INTRINSICID, arg1, arg2, ...) This node represents a target intrin...
bool isInteger() const
isInteger - Return true if this is an integer, or a vector integer type.
The landingpad instruction holds all of the information necessary to generate correct exception handl...
Control flow instructions. These all have token chains.
MCSymbol * createTempSymbol(bool CanBeUnnamed=true)
Create and return a new assembler temporary symbol with a unique but unspecified name.
SDValue getCopyFromRegs(SelectionDAG &DAG, FunctionLoweringInfo &FuncInfo, const SDLoc &dl, SDValue &Chain, SDValue *Flag, const Value *V=nullptr) const
getCopyFromRegs - Emit a series of CopyFromReg nodes that copies from this value and returns the resu...
READ_REGISTER, WRITE_REGISTER - This node represents llvm.register on the DAG, which implements the n...
unsigned getAlignment() const
Return the alignment of the access that is being performed.
FunctionType * getFunctionType() const
Subclasses of this class are all able to terminate a basic block.
std::vector< std::pair< MachineInstr *, unsigned > > PHINodesToUpdate
PHINodesToUpdate - A list of phi instructions whose operand list will be updated after processing the...
unsigned const MachineRegisterInfo * MRI
std::size_t countTrailingZeros(T Val, ZeroBehavior ZB=ZB_Width)
Count number of 0's from the least significant bit to the most stopping at the first 1...
bool HasTailCall
HasTailCall - This is set to true if a call in the current block has been translated as a tail call...
unsigned getVectorNumElements() const
LOCAL_RECOVER - Represents the llvm.localrecover intrinsic.
bool isFullSet() const
Return true if this set contains all of the elements possible for this data-type. ...
bool hasSideEffects() const
ConstantRange getConstantRangeFromMetadata(const MDNode &RangeMD)
Parse out a conservative ConstantRange from !range metadata.
MVT - Machine Value Type.
SynchronizationScope getSynchScope() const
Returns whether this RMW is atomic between threads or only within a single thread.
LLVM Basic Block Representation.
void addInvoke(MachineBasicBlock *LandingPad, MCSymbol *BeginLabel, MCSymbol *EndLabel)
Provide the begin and end labels of an invoke style call and associate it with a try landing pad bloc...
const SDValue & getOperand(unsigned i) const
The instances of the Type class are immutable: once they are created, they are never changed...
BasicBlock * getSuccessor(unsigned idx) const
Return the specified successor.
This is an important class for using LLVM in a threaded context.
DIExpression * getExpression() const
const Function * getParent() const
Simple binary floating point operators.
Conditional or Unconditional Branch instruction.
C - The default llvm calling convention, compatible with C.
bool isVectorTy() const
True if this is an instance of VectorType.
SDValue getMemIntrinsicNode(unsigned Opcode, const SDLoc &dl, SDVTList VTList, ArrayRef< SDValue > Ops, EVT MemVT, MachinePointerInfo PtrInfo, unsigned Align=0, bool Vol=false, bool ReadMem=true, bool WriteMem=true, unsigned Size=0)
Creates a MemIntrinsicNode that may produce a result and takes a list of operands.
bool isOperationLegalOrCustom(unsigned Op, EVT VT) const
Return true if the specified operation is legal on this target or can be made legal with custom lower...
unsigned getMinimumJumpTableEntries() const
Return lower limit for number of blocks in a jump table.
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
This function has undefined behavior.
static unsigned getSizeInBits(unsigned Reg, const MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI)
Get the size in bits of Reg.
This is an important base class in LLVM.
VAEND, VASTART - VAEND and VASTART have three operands: an input chain, pointer, and a SRCVALUE...
bool isVector() const
isVector - Return true if this is a vector value type.
Resume the propagation of an exception.
LLVM_ATTRIBUTE_ALWAYS_INLINE iterator begin()
bool isWrappedSet() const
Return true if this set wraps around the top of the range.
Value * getCompareOperand()
INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element at IDX replaced with VAL...
SmallSet - This maintains a set of unique values, optimizing for the case when the set is small (less...
This file contains the declarations for the subclasses of Constant, which represent the different fla...
bool isFloatingPoint() const
isFloatingPoint - Return true if this is a FP, or a vector FP type.
Indirect Branch Instruction.
APInt Or(const APInt &LHS, const APInt &RHS)
Bitwise OR function for APInt.
bool isOperationLegal(unsigned Op, EVT VT) const
Return true if the specified operation is legal on this target.
unsigned getAlignment() const
Return the alignment of the memory that is being allocated by the instruction.
ConstantFP - Floating Point Values [float, double].
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
APInt Xor(const APInt &LHS, const APInt &RHS)
Bitwise XOR function for APInt.
SDValue getAddrSpaceCast(const SDLoc &dl, EVT VT, SDValue Ptr, unsigned SrcAS, unsigned DestAS)
Return an AddrSpaceCastSDNode.
static unsigned getNumOperandRegisters(unsigned Flag)
getNumOperandRegisters - Extract the number of registers field from the inline asm operand flag...
A udiv or sdiv instruction, which can be marked as "exact", indicating that no bits are destroyed...
EHPersonality classifyEHPersonality(const Value *Pers)
See if the given exception handling personality function is one that we understand.
virtual std::pair< unsigned, const TargetRegisterClass * > getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI, StringRef Constraint, MVT VT) const
Given a physical register constraint (e.g.
static Type * getVoidTy(LLVMContext &C)
static cl::opt< unsigned, true > LimitFPPrecision("limit-float-precision", cl::desc("Generate low-precision inline sequences ""for some float libcalls"), cl::location(LimitFloatPrecision), cl::init(0))
INIT_TRAMPOLINE - This corresponds to the init_trampoline intrinsic.
void clear()
Clear the memory usage of this object.
virtual bool isFMAFasterThanFMulAndFAdd(EVT) const
Return true if an FMA operation is faster than a pair of fmul and fadd instructions.
virtual void EmitFunctionEntryCode()
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang","erlang-compatible garbage collector")
This instruction compares its operands according to the predicate given to the constructor.
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Utility class for integer arithmetic operators which may exhibit overflow - Add, Sub, and Mul.
unsigned getBitWidth() const
Return the number of bits in the APInt.
static SDValue getMemCmpLoad(const Value *PtrVal, MVT LoadVT, Type *LoadTy, SelectionDAGBuilder &Builder)
unsigned getOpcode() const
uint64_t getNumElements() const
TRAP - Trapping instruction.
Value * getOperand(unsigned i) const
MVT getRegisterType(MVT VT) const
Return the type of registers that this ValueType will eventually require.
Value * getPointerOperand()
AssertSext, AssertZext - These nodes record if a register contains a value that has already been zero...
DEBUGTRAP - Trap intended to get the attention of a debugger.
virtual bool useLoadStackGuardNode() const
If this function returns true, SelectionDAGBuilder emits a LOAD_STACK_GUARD node when it is lowering ...
The memory access is non-temporal.
static cl::opt< unsigned > JumpTableDensity("jump-table-density", cl::init(10), cl::Hidden, cl::desc("Minimum density for building a jump table in ""a normal function"))
Minimum jump table density for normal functions.
std::pair< NoneType, bool > insert(const T &V)
insert - Insert an element into the set if it isn't already there.
Constant Vector Declarations.
SDLoc getCurSDLoc() const
Predicate getPredicate() const
Return the predicate for this instruction.
static unsigned getFlagWordForMem(unsigned InputFlag, unsigned Constraint)
Augment an existing flag word returned by getFlagWord with the constraint code for a memory constrain...
SDValue getMaskedLoad(EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr, SDValue Mask, SDValue Src0, EVT MemVT, MachineMemOperand *MMO, ISD::LoadExtType, bool IsExpanding=false)
unsigned getVectorTypeBreakdown(LLVMContext &Context, EVT VT, EVT &IntermediateVT, unsigned &NumIntermediates, MVT &RegisterVT) const
Vector types are broken down into some number of legal first class types.
Constant * ConstantFoldLoadFromConstPtr(Constant *C, Type *Ty, const DataLayout &DL)
ConstantFoldLoadFromConstPtr - Return the value that a load from C would produce if it is constant an...
Bit counting operators with an undefined result for zero inputs.
MSVC calling convention that passes vectors and vector aggregates in SSE registers.
X = FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
unsigned ExceptionPointerVirtReg
If the current MBB is a landing pad, the exception pointer and exception selector registers are copie...
Targets can subclass this to parameterize the SelectionDAG lowering and instruction selection process...
unsigned getStackPointerRegisterToSaveRestore() const
If a physical register, this specifies the register that llvm.savestack/llvm.restorestack should save...
succ_iterator succ_begin()
static SDValue ExpandPowI(const SDLoc &DL, SDValue LHS, SDValue RHS, SelectionDAG &DAG)
ExpandPowI - Expand a llvm.powi intrinsic.
void append(in_iter in_start, in_iter in_end)
Add the specified range to the end of the SmallVector.
bool isEmptySet() const
Return true if this set contains no members.
static bool isMemKind(unsigned Flag)
EVT - Extended Value Type.
virtual std::pair< SDValue, SDValue > EmitTargetCodeForStrcpy(SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dest, SDValue Src, MachinePointerInfo DestPtrInfo, MachinePointerInfo SrcPtrInfo, bool isStpcpy) const
Emit target-specific code that performs a strcpy or stpcpy, in cases where that is faster than a libc...
bool isPointerTy() const
True if this is an instance of PointerType.
Type * getType() const
getType - Return the type of the instruction that generated this call site
static bool getUniformBase(const Value *&Ptr, SDValue &Base, SDValue &Index, SelectionDAGBuilder *SDB)
virtual SDValue LowerReturn(SDValue, CallingConv::ID, bool, const SmallVectorImpl< ISD::OutputArg > &, const SmallVectorImpl< SDValue > &, const SDLoc &, SelectionDAG &) const
This hook must be implemented to lower outgoing return values, described by the Outs array...
std::vector< ArgListEntry > ArgListTy
This class represents the va_arg llvm instruction, which returns an argument of the specified type gi...
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
virtual unsigned getByValTypeAlignment(Type *Ty, const DataLayout &DL) const
Return the desired alignment for ByVal or InAlloca aggregate function arguments in the caller paramet...
LLVMContext & getContext() const
All values hold a context through their type.
This structure contains all information that is necessary for lowering calls.
static PointerType * getInt8PtrTy(LLVMContext &C, unsigned AS=0)
static EVT getVectorVT(LLVMContext &Context, EVT VT, unsigned NumElements)
getVectorVT - Returns the EVT that represents a vector NumElements in length, where each element is o...
SDDbgValue * getConstantDbgValue(MDNode *Var, MDNode *Expr, const Value *C, uint64_t Off, const DebugLoc &DL, unsigned O)
Constant.
std::pair< SDValue, SDValue > makeLibCall(SelectionDAG &DAG, RTLIB::Libcall LC, EVT RetVT, ArrayRef< SDValue > Ops, bool isSigned, const SDLoc &dl, bool doesNotReturn=false, bool isReturnValueUsed=true) const
Returns a pair of (return value, chain).
This class contains a discriminated union of information about pointers in memory operands...
bool isPowerOf2() const
Check if this APInt's value is a power of two greater than zero.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
LLVM_READONLY APFloat maxnum(const APFloat &A, const APFloat &B)
Implements IEEE maxNum semantics.
static SDValue expandExp(const SDLoc &dl, SDValue Op, SelectionDAG &DAG, const TargetLowering &TLI)
expandExp - Lower an exp intrinsic.
const SDValue & getRoot() const
Return the root tag of the SelectionDAG.
const MCInstrDesc & get(unsigned Opcode) const
Return the machine instruction descriptor that corresponds to the specified instruction opcode...
MachineBasicBlock * MBB
MBB - The current block.
bool isInTailCallPosition(ImmutableCallSite CS, const TargetMachine &TM)
Test if the given instruction is in a position to be optimized with a tail-call.
SDValue getLoad(EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr, MachinePointerInfo PtrInfo, unsigned Alignment=0, MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr)
Loads are not normal binary operators: their result type is not determined by their operands...
unsigned getNumSuccessors() const
virtual SDValue LowerFormalArguments(SDValue, CallingConv::ID, bool, const SmallVectorImpl< ISD::InputArg > &, const SDLoc &, SelectionDAG &, SmallVectorImpl< SDValue > &) const
This hook must be implemented to lower the incoming (formal) arguments, described by the Ins array...
virtual void ComputeConstraintToUse(AsmOperandInfo &OpInfo, SDValue Op, SelectionDAG *DAG=nullptr) const
Determines the constraint code and constraint type to use for the specific AsmOperandInfo, setting OpInfo.ConstraintCode and OpInfo.ConstraintType.
BasicBlock * getSuccessor(unsigned i) const
TargetIntrinsicInfo - Interface to description of machine instruction set.
The memory access writes data.
virtual Value * getSSPStackGuardCheck(const Module &M) const
If the target has a standard stack protection check function that performs validation and error handl...
BasicBlock * getUnwindDest() const
static bool isVectorReductionOp(const User *I)
Checks if the given instruction performs a vector reduction, in which case we have the freedom to alt...
bool startsWithDeref() const
Is the first element a DW_OP_deref?.
void CopyToExportRegsIfNeeded(const Value *V)
CopyToExportRegsIfNeeded - If the given value has virtual registers created for it, emit nodes to copy the value into the virtual registers.
Given one NaN input, returns the non-NaN.
Representation for a specific memory location.
IntegerType * getIntPtrType(LLVMContext &C, unsigned AddressSpace=0) const
Returns an integer type with size at least as big as that of a pointer in the given address space...
CallInst * getTerminatingDeoptimizeCall()
Returns the call instruction calling .experimental.deoptimize prior to the terminating return instruc...
virtual const TargetFrameLowering * getFrameLowering() const
std::vector< AsmOperandInfo > AsmOperandInfoVector
TokenFactor - This node takes multiple tokens as input and produces a single token result...
unsigned getABITypeAlignment(Type *Ty) const
Returns the minimum ABI-required alignment for the specified type.
void visitSPDescriptorFailure(StackProtectorDescriptor &SPD)
Codegen the failure basic block for a stack protector check.
static IntegerType * get(LLVMContext &C, unsigned NumBits)
This static method is the primary way of constructing an IntegerType.
DIExpression * getExpression() const
Iterator for intrusive lists based on ilist_node.
void setNoUnsignedWrap(bool b)
AtomicOrdering getOrdering() const
Returns the ordering effect of this store.
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements...
static SDValue GetSignificand(SelectionDAG &DAG, SDValue Op, const SDLoc &dl)
GetSignificand - Get the significand and build it into a floating-point number with exponent of 1: ...
unsigned countPopulation(T Value)
Count the number of set bits in a value.
virtual unsigned getJumpTableEncoding() const
Return the entry encoding for a jump table in the current function.
void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
static PointerType * getUnqual(Type *ElementType)
This constructs a pointer to an object of the specified type in the generic address space (address sp...
This is the shared class of boolean and integer constants.
InstrTy * getInstruction() const
Returns platform specific canonical encoding of a floating point number.
bool slt(const APInt &RHS) const
Signed less than comparison.
const char * getLibcallName(RTLIB::Libcall Call) const
Get the libcall routine name for the specified libcall.
EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR identified by the (potentially...
uint64_t getTypeAllocSize(Type *Ty) const
Returns the offset in bytes between successive objects of the specified type, including alignment pad...
const MCContext & getContext() const
ValTy * getArgument(unsigned ArgNo) const
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
virtual unsigned getInlineAsmMemConstraint(StringRef ConstraintCode) const
SDValue getZExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT)
Convert Op, which must be of integer type, to the integer type VT, by either zero-extending or trunca...
RegsForValue - This struct represents the registers (physical or virtual) that a particular set of va...
CallLoweringInfo & setCallee(CallingConv::ID CC, Type *ResultType, SDValue Target, ArgListTy &&ArgsList)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small...
SmallVector< MachineInstr *, 8 > ArgDbgValues
ArgDbgValues - A list of DBG_VALUE instructions created during isel for function arguments that are i...
Utility class for floating point operations which can have information about relaxed accuracy require...
Module.h This file contains the declarations for the Module class.
Type * getType() const
All values are typed, get the type of this value.
Provides information about what library functions are available for the current target.
virtual EVT getSetCCResultType(const DataLayout &DL, LLVMContext &Context, EVT VT) const
Return the ValueType of the result of SETCC operations.
MDNode * getMetadata(unsigned KindID) const
Get the metadata of given kind attached to this Instruction.
void clear()
clear - Clear out the current SelectionDAG and the associated state and prepare this SelectionDAGBuil...
SDValue getMemcpy(SDValue Chain, const SDLoc &dl, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, bool isVol, bool AlwaysInline, bool isTailCall, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo)
This class represents a range of values.
static SDValue getF32Constant(SelectionDAG &DAG, unsigned Flt, const SDLoc &dl)
getF32Constant - Get 32-bit floating point constant.
bool isVolatile() const
Return true if this is a load from a volatile memory location.
BRCOND - Conditional branch.
An SDNode that represents everything that will be needed to construct a MachineInstr.
A collection of metadata nodes that might be associated with a memory access used by the alias-analys...
Byte Swap and Counting operators.
void setCallsEHReturn(bool b)
void visit(const Instruction &I)
Value * getCatchSwitchParentPad() const
Get the parentPad of this catchret's catchpad's catchswitch.
SDValue getMemmove(SDValue Chain, const SDLoc &dl, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, bool isVol, bool isTailCall, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo)
static bool isOnlyUsedInEntryBlock(const Argument *A, bool FastISel)
isOnlyUsedInEntryBlock - If the specified argument is only used in the entry block, return true.
Value * stripPointerCasts()
Strip off pointer casts, all-zero GEPs, and aliases.
bool isStrictlyPositive() const
Determine if this APInt Value is positive.
Wrapper class for IR location info (IR ordering and DebugLoc) to be passed into SDNode creation funct...
Function * getCalledFunction() const
Return the function called, or null if this is an indirect function invocation.
void addIPToStateRange(const InvokeInst *II, MCSymbol *InvokeBegin, MCSymbol *InvokeEnd)
AtomicOrdering getOrdering() const
Returns the ordering effect of this fence.
bool isZero() const
This is just a convenience method to make client code smaller for a common code.
static cl::opt< unsigned > OptsizeJumpTableDensity("optsize-jump-table-density", cl::init(40), cl::Hidden, cl::desc("Minimum density for building a jump table in ""an optsize function"))
Minimum jump table density for -Os or -Oz functions.
Represents one node in the SelectionDAG.
const BasicBlock & getEntryBlock() const
static SDValue expandLog(const SDLoc &dl, SDValue Op, SelectionDAG &DAG, const TargetLowering &TLI)
expandLog - Lower a log intrinsic.
const MachineInstrBuilder & addFrameIndex(int Idx) const
void UpdateSplitBlock(MachineBasicBlock *First, MachineBasicBlock *Last)
UpdateSplitBlock - When an MBB was split during scheduling, update the references that need to refer ...
static ConstantInt * getTrue(LLVMContext &Context)
BinOp getOperation() const
ISD::CondCode getFCmpCodeWithoutNaN(ISD::CondCode CC)
getFCmpCodeWithoutNaN - Given an ISD condition code comparing floats, return the equivalent code if w...
SDValue getCopyToReg(SDValue Chain, const SDLoc &dl, unsigned Reg, SDValue N)
Intrinsic::ID getIntrinsicID() const LLVM_READONLY
getIntrinsicID - This method returns the ID number of the specified function, or Intrinsic::not_intri...
unsigned CreateRegs(Type *Ty)
CreateRegs - Allocate the appropriate number of virtual registers of the correctly promoted or expand...
static GCRegistry::Add< ShadowStackGC > C("shadow-stack","Very portable GC for uncooperative code generators")
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
unsigned Log2_32(uint32_t Value)
Log2_32 - This function returns the floor log base 2 of the specified value, -1 if the value is zero...
void swap(llvm::BitVector &LHS, llvm::BitVector &RHS)
Implement std::swap in terms of BitVector swap.
AttributeSet getAttributes() const
Return the attribute list for this Function.
GCFunctionInfo * GFI
GFI - Garbage collection metadata for the function.
SDValue getCALLSEQ_START(SDValue Chain, SDValue Op, const SDLoc &DL)
Return a new CALLSEQ_START node, which always must have a glue result (to ensure it's not CSE'd)...
SynchronizationScope getSynchScope() const
Value * getArgOperand(unsigned i) const
getArgOperand/setArgOperand - Return/set the i-th call argument.
Class to represent vector types.
virtual const char * getClearCacheBuiltinName() const
Return the builtin name for the __builtin___clear_cache intrinsic Default is to invoke the clear cach...
MachineMemOperand * getMachineMemOperand(MachinePointerInfo PtrInfo, MachineMemOperand::Flags f, uint64_t s, unsigned base_alignment, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr, SynchronizationScope SynchScope=CrossThread, AtomicOrdering Ordering=AtomicOrdering::NotAtomic, AtomicOrdering FailureOrdering=AtomicOrdering::NotAtomic)
getMachineMemOperand - Allocate a new MachineMemOperand.
static const unsigned MaxParallelChains
Class for arbitrary precision integers.
SDValue getConstantFP(double Val, const SDLoc &DL, EVT VT, bool isTarget=false)
Create a ConstantFPSDNode wrapping a constant value.
bool hasEHFunclets() const
static unsigned getReg(const void *D, unsigned RC, unsigned RegNo)
void visitBitTestCase(BitTestBlock &BB, MachineBasicBlock *NextMBB, BranchProbability BranchProbToNext, unsigned Reg, BitTestCase &B, MachineBasicBlock *SwitchBB)
visitBitTestCase - this function produces one "bit test"
BranchProbabilityInfo * BPI
Select(COND, TRUEVAL, FALSEVAL).
Value * getIncomingValueForBlock(const BasicBlock *BB) const
bool isIntegerTy() const
True if this is an instance of IntegerType.
This file defines the FastISel class.
virtual const TargetRegisterClass * getRegClassFor(MVT VT) const
Return the register class that should be used for the specified value type.
iterator_range< user_iterator > users()
ZERO_EXTEND - Used for integer types, zeroing the new bits.
unsigned getVectorNumElements() const
std::vector< JumpTableBlock > JTCases
JTCases - Vector of JumpTable structures used to communicate SwitchInst code generation information...
ANY_EXTEND - Used for integer types. The high bits are undefined.
static AttributeSet getReturnAttrs(TargetLowering::CallLoweringInfo &CLI)
Returns an AttributeSet representing the attributes applied to the return value of the given call...
static bool IsOnlyUsedInZeroEqualityComparison(const Value *V)
IsOnlyUsedInZeroEqualityComparison - Return true if it only matters that the value is equal or not-eq...
LLVM_NODISCARD LLVM_ATTRIBUTE_ALWAYS_INLINE bool empty() const
empty - Check if the string is empty.
Value * getCondition() const
FCOPYSIGN(X, Y) - Return the value of X with the sign of Y.
FMINNAN/FMAXNAN - Behave identically to FMINNUM/FMAXNUM, except that when a single input is NaN...
bool isMinValue() const
Determine if this is the smallest unsigned value.
int getStackProtectorIndex() const
Return the index for the stack protector object.
SDValue getBlockAddress(const BlockAddress *BA, EVT VT, int64_t Offset=0, bool isTarget=false, unsigned char TargetFlags=0)
virtual bool CanLowerReturn(CallingConv::ID, MachineFunction &, bool, const SmallVectorImpl< ISD::OutputArg > &, LLVMContext &) const
This hook should be implemented to check whether the return values described by the Outs array can fi...
void setIsEHFuncletEntry(bool V=true)
Indicates if this is the entry block of an EH funclet.
APInt And(const APInt &LHS, const APInt &RHS)
Bitwise AND function for APInt.
CATCHRET - Represents a return from a catch block funclet.
SmallVector< SDValue, 8 > PendingLoads
PendingLoads - Loads are not emitted to the program immediately.
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
The memory access reads data.
static cl::opt< bool > EnableFMFInDAG("enable-fmf-dag", cl::init(true), cl::Hidden, cl::desc("Enable fast-math-flags for DAG nodes"))
GET_DYNAMIC_AREA_OFFSET - get offset from native SP to the address of the most recent dynamic alloca...
static MachinePointerInfo getFixedStack(MachineFunction &MF, int FI, int64_t Offset=0)
Return a MachinePointerInfo record that refers to the specified FrameIndex.
CallLoweringInfo & setTailCall(bool Value=true)
DenseMap< const Value *, ISD::NodeType > PreferredExtendType
Record the preferred extend type (ISD::SIGN_EXTEND or ISD::ZERO_EXTEND) for a value.
static MDTuple * get(LLVMContext &Context, ArrayRef< Metadata * > MDs)
bool isDereferenceablePointer(const Value *V, const DataLayout &DL, const Instruction *CtxI=nullptr, const DominatorTree *DT=nullptr)
Return true if this is always a dereferenceable pointer.
BR_JT - Jumptable branch.
VACOPY - VACOPY has 5 operands: an input chain, a destination pointer, a source pointer, a SRCVALUE for the destination, and a SRCVALUE for the source.
static StringRef getRealLinkageName(StringRef Name)
If special LLVM prefix that is used to inform the asm printer to not emit usual symbol prefix before ...
unsigned countLeadingOnes() const
Count the number of leading one bits.
static bool isPhysicalRegister(unsigned Reg)
Return true if the specified register number is in the physical register namespace.
cl::opt< std::string > TrapFuncName("trap-func", cl::Hidden, cl::desc("Emit a call to trap function rather than a trap instruction"), cl::init(""))
These are IR-level optimization flags that may be propagated to SDNodes.
Represents a use of a SDNode.
CallLoweringInfo & setConvergent(bool Value=true)
unsigned ExceptionSelectorVirtReg
LLVM_ATTRIBUTE_ALWAYS_INLINE iterator end()
SmallVector< SDValue, 32 > OutVals
Value * getCondition() const
Analysis providing branch probability information.
BasicBlock * getDefaultDest() const
Bitwise operators - logical and, logical or, logical xor.
static SDValue GetExponent(SelectionDAG &DAG, SDValue Op, const TargetLowering &TLI, const SDLoc &dl)
GetExponent - Get the exponent:
pointer data()
Return a pointer to the vector's buffer, even if empty().
bool isAggregateType() const
Return true if the type is an aggregate type.
SDValue getCopyFromReg(SDValue Chain, const SDLoc &dl, unsigned Reg, EVT VT)
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
static IntegerType * getInt32Ty(LLVMContext &C)
AtomicOrdering getOrdering() const
Returns the ordering effect of this fence.
virtual void LowerAsmOperandForConstraint(SDValue Op, std::string &Constraint, std::vector< SDValue > &Ops, SelectionDAG &DAG) const
Lower the specified operand into the Ops vector.
bool isDeclaration() const
Return true if the primary definition of this global value is outside of the current translation unit...
This represents the llvm.dbg.value instruction.
unsigned getAlignment() const
Return the alignment of the access that is being performed.
Value * getPointerOperand()
void getAAMetadata(AAMDNodes &N, bool Merge=false) const
Fills the AAMDNodes structure with AA metadata from this instruction.
ImmutableCallSite - establish a view to a call site for examination.
unsigned getSizeInBits() const
getSizeInBits - Return the size of the specified value type in bits.
void ReplaceAllUsesWith(SDValue From, SDValue Op)
Modify anything using 'From' to use 'To' instead.
void push_back(MachineInstr *MI)
TerminatorInst * getTerminator()
Returns the terminator instruction if the block is well formed or null if the block is not well forme...
LLVM_ATTRIBUTE_ALWAYS_INLINE size_type size() const
bool hasOneUse() const
Return true if there is exactly one user of this value.
FunctionLoweringInfo - This contains information that is global to a function that is used when lower...
static void addStackMapLiveVars(ImmutableCallSite CS, unsigned StartIdx, const SDLoc &DL, SmallVectorImpl< SDValue > &Ops, SelectionDAGBuilder &Builder)
Add a stack map intrinsic call's live variable operands to a stackmap or patchpoint target node's ope...
static Constant * getZeroValueForNegation(Type *Ty)
Floating point negation must be implemented with f(x) = -0.0 - x.
bool hasAttrSomewhere(Attribute::AttrKind Kind, unsigned *Index=nullptr) const
Return true if the specified attribute is set for at least one parameter or for the return value...
The memory access always returns the same value (or traps).
iterator find(const KeyT &Val)
MachineBasicBlock::iterator InsertPt
MBB - The current insert position inside the current block.
LLVM_NODISCARD std::enable_if<!is_simple_type< Y >::value, typename cast_retty< X, const Y >::ret_type >::type dyn_cast(const Y &Val)
const WinEHFuncInfo * getWinEHFuncInfo() const
getWinEHFuncInfo - Return information about how the current function uses Windows exception handling...
unsigned CreateReg(MVT VT)
CreateReg - Allocate a single virtual register for the given type.
uint64_t getTypeStoreSize(Type *Ty) const
Returns the maximum number of bytes that may be overwritten by storing the specified type...
StatepointLoweringState StatepointLowering
State used while lowering a statepoint sequence (gc_statepoint, gc_relocate, and gc_result).
bool hasVarSizedObjects() const
This method may be called any time after instruction selection is complete to determine if the stack ...
DenseMap< const AllocaInst *, int > StaticAllocaMap
StaticAllocaMap - Keep track of frame indices for fixed sized allocas in the entry block...
RESULT, OUTCHAIN = EH_SJLJ_SETJMP(INCHAIN, buffer) This corresponds to the eh.sjlj.setjmp intrinsic.
unsigned getNumCases() const
Return the number of 'cases' in this switch instruction, excluding the default case.
CopyFromReg - This node indicates that the input value is a virtual or physical register that is defi...
int CreateStackObject(uint64_t Size, unsigned Alignment, bool isSS, const AllocaInst *Alloca=nullptr)
Create a new statically sized stack object, returning a nonnegative identifier to represent it...
SDValue getCopyFromRegs(const Value *V, Type *Ty)
getCopyFromRegs - If there was virtual register allocated for the value V emit CopyFromReg of the spe...
EVT getValueType() const
Return the ValueType of the referenced return value.
SDValue getConstant(uint64_t Val, const SDLoc &DL, EVT VT, bool isTarget=false, bool isOpaque=false)
Create a ConstantSDNode wrapping a constant value.
bool hasLocalLinkage() const
OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents 'eh_return' gcc dwarf builtin...
Attribute getAttribute(unsigned Index, Attribute::AttrKind Kind) const
Return the attribute object that exists at the given index.
void setUnsafeAlgebra(bool b)
SDValue getAtomicCmpSwap(unsigned Opcode, const SDLoc &dl, EVT MemVT, SDVTList VTs, SDValue Chain, SDValue Ptr, SDValue Cmp, SDValue Swp, MachinePointerInfo PtrInfo, unsigned Alignment, AtomicOrdering SuccessOrdering, AtomicOrdering FailureOrdering, SynchronizationScope SynchScope)
Gets a node for an atomic cmpxchg op.
bool isStatepoint(ImmutableCallSite CS)
SDValue getVAArg(EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr, SDValue SV, unsigned Align)
VAArg produces a result and token chain, and takes a pointer and a source value as input...
void LowerCallTo(ImmutableCallSite CS, SDValue Callee, bool IsTailCall, const BasicBlock *EHPadBB=nullptr)
CONCAT_VECTORS(VECTOR0, VECTOR1, ...) - Given a number of values of vector type with the same length ...
unsigned getReg() const
getReg - Returns the register number.
StringRef getValueAsString() const
Return the attribute's value as a string.
bool isFloatingPoint() const
isFloatingPoint - Return true if this is a FP, or a vector FP type.
void erase(iterator MBBI)
FunctionLoweringInfo & FuncInfo
FuncInfo - Information about the function as a whole.
SmallVector< MVT, 4 > RegVTs
RegVTs - The value types of the registers.
DILocalVariable * getVariable() const
virtual bool getTgtMemIntrinsic(IntrinsicInfo &, const CallInst &, unsigned) const
Given an intrinsic, checks if on the target the intrinsic will need to map to a MemIntrinsicNode (tou...
SDValue getJumpTable(int JTI, EVT VT, bool isTarget=false, unsigned char TargetFlags=0)
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
void insert(iterator MBBI, MachineBasicBlock *MBB)
SDValue getFrameIndex(int FI, EVT VT, bool isTarget=false)
bool isAsynchronousEHPersonality(EHPersonality Pers)
Returns true if this personality function catches asynchronous exceptions.
static bool createVirtualRegs(SmallVector< unsigned, 4 > &Regs, unsigned NumRegs, MVT RegVT, SelectionDAG &DAG)
Fill Regs with NumRegs new virtual registers of type RegVT.
Given one NaN input, returns the NaN.
const BasicBlock & front() const
void setUnusedArgValue(const Value *V, SDValue NewN)
unsigned getParamAlignment(unsigned i) const
Extract the alignment for a call or parameter (0=unknown).
bool isEmptyTy() const
Return true if this type is empty, that is, it has no elements or all of its elements are empty...
MVT getPointerTy(const DataLayout &DL, uint32_t AS=0) const
Return the pointer type for the given address space, defaults to the pointer type from the data layou...
virtual const TargetInstrInfo * getInstrInfo() const
static void findUnwindDestinations(FunctionLoweringInfo &FuncInfo, const BasicBlock *EHPadBB, BranchProbability Prob, SmallVectorImpl< std::pair< MachineBasicBlock *, BranchProbability >> &UnwindDests)
When an invoke or a cleanupret unwinds to the next EH pad, there are many places it could ultimately ...
EVT getTypeToTransformTo(LLVMContext &Context, EVT VT) const
For types supported by the target, this is an identity function.
Module * getParent()
Get the module that this global value is contained inside of...
LLVM Value Representation.
FMA - Perform a * b + c with no intermediate rounding step.
SDValue getRegister(unsigned Reg, EVT VT)
SDValue getAnyExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT)
Convert Op, which must be of integer type, to the integer type VT, by either any-extending or truncat...
APInt sextOrTrunc(unsigned width) const
Sign extend or truncate to width.
void init(GCFunctionInfo *gfi, AliasAnalysis &aa, const TargetLibraryInfo *li)
unsigned getOpcode() const
Returns a member of one of the enums like Instruction::Add.
unsigned getMaximumJumpTableSize() const
Return upper limit for number of entries in a jump table.
DILocalVariable * getVariable() const
#define LLVM_FALLTHROUGH
LLVM_FALLTHROUGH - Mark fallthrough cases in switch statements.
void setDebugLoc(DebugLoc dl)
Set source location info.
void FindMergedConditions(const Value *Cond, MachineBasicBlock *TBB, MachineBasicBlock *FBB, MachineBasicBlock *CurBB, MachineBasicBlock *SwitchBB, Instruction::BinaryOps Opc, BranchProbability TW, BranchProbability FW)
FindMergedConditions - If Cond is an expression like.
SDValue getValueType(EVT)
const Value * getArraySize() const
Get the number of elements allocated.
std::underlying_type< E >::type Mask()
Get a bitmask with 1s in all places up to the high-order bit of E's largest value.
PREFETCH - This corresponds to a prefetch intrinsic.
static const Function * getParent(const Value *V)
uint64_t getTypeSizeInBits(Type *Ty) const
Size examples:
const TargetLowering & getTargetLoweringInfo() const
static SDValue getCopyFromPartsVector(SelectionDAG &DAG, const SDLoc &DL, const SDValue *Parts, unsigned NumParts, MVT PartVT, EVT ValueVT, const Value *V)
getCopyFromPartsVector - Create a value that contains the specified legal parts combined into the val...
LLVM_NODISCARD LLVM_ATTRIBUTE_ALWAYS_INLINE const char * data() const
data - Get a pointer to the start of the string (which may not be null terminated).
BranchProbability getEdgeProbability(const BasicBlock *Src, unsigned IndexInSuccessors) const
Get an edge's probability, relative to other out-edges of the Src.
std::vector< CaseBlock > SwitchCases
SwitchCases - Vector of CaseBlock structures used to communicate SwitchInst code generation informati...
SDValue getEHLabel(const SDLoc &dl, SDValue Root, MCSymbol *Label)
bool hasOpaqueSPAdjustment() const
Returns true if the function contains opaque dynamic stack adjustments.
virtual Value * getSDagStackGuard(const Module &M) const
Return the variable that's previously inserted by insertSSPDeclarations, if any, otherwise return nul...
bool isValidLocationForIntrinsic(const DILocation *DL) const
Check that a location is valid for this variable.
SDValue getSrcValue(const Value *v)
Construct a node to track a Value* through the backend.
DenseMap< const BasicBlock *, MachineBasicBlock * > MBBMap
MBBMap - A mapping from LLVM basic blocks to their machine code entry.
SDValue getControlRoot()
getControlRoot - Similar to getRoot, but instead of flushing all the PendingLoad items, flush all the PendingExports items.
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
Convenience struct for specifying and reasoning about fast-math flags.
vt_iterator vt_begin() const
vt_begin / vt_end - Loop over all of the value types that can be represented by values in this regist...
StringRef - Represent a constant reference to a string, i.e.
Garbage collection metadata for a single function.
MachineModuleInfo & getMMI() const
void clearDanglingDebugInfo()
clearDanglingDebugInfo - Clear the dangling debug information map.
unsigned TrapUnreachable
Emit target-specific trap instruction for 'unreachable' IR instructions.
static BranchProbability getZero()
DenseMap< MachineBasicBlock *, SmallVector< unsigned, 4 > > LPadToCallSiteMap
LPadToCallSiteMap - Map a landing pad to the call site indexes.
static SDValue expandLog10(const SDLoc &dl, SDValue Op, SelectionDAG &DAG, const TargetLowering &TLI)
expandLog10 - Lower a log10 intrinsic.
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
MERGE_VALUES - This node takes multiple discrete operands and returns them all as its individual resu...
MVT getVectorElementType() const
static bool isVolatile(Instruction *Inst)
static APInt getNullValue(unsigned numBits)
Get the '0' value.
SDValue getEntryNode() const
Return the token chain corresponding to the entry of the function.
unsigned countOperandBundlesOfType(StringRef Name) const
Return the number of operand bundles with the tag Name attached to this instruction.
OUTCHAIN = ATOMIC_STORE(INCHAIN, ptr, val) This corresponds to "store atomic" instruction.
APInt getUnsignedMax() const
Return the largest unsigned value contained in the ConstantRange.
TRUNCATE - Completely drop the high bits.
EVT getShiftAmountTy(EVT LHSTy, const DataLayout &DL) const
bool isUIntN(unsigned N, uint64_t x)
isUIntN - Checks if an unsigned integer fits into the given (dynamic) bit width.
Type * getAllocatedType() const
Return the type that is being allocated by the instruction.
void setArgumentFrameIndex(const Argument *A, int FI)
setArgumentFrameIndex - Record frame index for the byval argument.
DenseMap< const Constant *, unsigned > ConstantsOut
bool isAlignStack() const
DISubprogram * getSubprogram() const
Get the subprogram for this scope.
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation...
unsigned ComputeLinearIndex(Type *Ty, const unsigned *Indices, const unsigned *IndicesEnd, unsigned CurIndex=0)
Compute the linearized index of a member in a nested aggregate/struct/array.
bool isExportableFromCurrentBlock(const Value *V, const BasicBlock *FromBB)
SynchronizationScope getSynchScope() const
Returns whether this cmpxchg is atomic between threads or only within a single thread.
SDDbgValue - Holds the information from a dbg_value node through SDISel.
unsigned getPointerAddressSpace() const
Get the address space of this pointer or pointer vector type.
This represents the llvm.dbg.declare instruction.
static GCRegistry::Add< ErlangGC > A("erlang","erlang-compatible garbage collector")
FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW, FLOG, FLOG2, FLOG10, FEXP, FEXP2, FCEIL, FTRUNC, FRINT, FNEARBYINT, FROUND, FFLOOR - Perform various unary floating point operations.
virtual unsigned getExceptionSelectorRegister(const Constant *PersonalityFn) const
If a physical register, this returns the register that receives the exception typeid on entry to a la...
static EVT getIntegerVT(LLVMContext &Context, unsigned BitWidth)
getIntegerVT - Returns the EVT that represents an integer with the given number of bits...
bool isJumpExpensive() const
Return true if Flow Control is an expensive operation that should be avoided.
SmallVector< unsigned, 4 > Regs
Regs - This list holds the registers assigned to the values.
bool isVarArg() const
isVarArg - Return true if this function takes a variable number of arguments.
Value * getPointerOperand()
virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const
This callback is invoked for operations that are unsupported by the target, which are registered to u...
MachineInstr::mmo_iterator allocateMemRefsArray(unsigned long Num)
allocateMemRefsArray - Allocate an array to hold MachineMemOperand pointers.
SDValue getMemset(SDValue Chain, const SDLoc &dl, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, bool isVol, bool isTailCall, MachinePointerInfo DstPtrInfo)
Val, OUTCHAIN = ATOMIC_LOAD(INCHAIN, ptr) This corresponds to "load atomic" instruction.
static MachineOperand CreateFI(int Idx)
void visitBitTestHeader(BitTestBlock &B, MachineBasicBlock *SwitchBB)
visitBitTestHeader - This function emits necessary code to produce value suitable for "bit tests" ...
LocationClass< Ty > location(Ty &L)
const BasicBlock * getParent() const
bool isExportedInst(const Value *V)
isExportedInst - Return true if the specified value is an instruction exported from its block...
virtual AsmOperandInfoVector ParseConstraints(const DataLayout &DL, const TargetRegisterInfo *TRI, ImmutableCallSite CS) const
Split up the constraint string from the inline assembly value into the specific constraints and their...
LLVM_READONLY APFloat minnum(const APFloat &A, const APFloat &B)
Implements IEEE minNum semantics.
static const unsigned LowestSDNodeOrder
Lowest valid SDNodeOrder.
static BranchProbability getBranchProbStackProtector(bool IsLikely)
FunctionLoweringInfo * FuncInfo
virtual void LowerOperationWrapper(SDNode *N, SmallVectorImpl< SDValue > &Results, SelectionDAG &DAG) const
This callback is invoked by the type legalizer to legalize nodes with an illegal operand type but leg...
auto count_if(R &&Range, UnaryPredicate P) -> typename std::iterator_traits< decltype(std::begin(Range))>::difference_type
Wrapper function around std::count_if to count the number of times an element satisfying a given pred...
MVT getSimpleVT() const
getSimpleVT - Return the SimpleValueType held in the specified simple EVT.
SmallVector< int, 16 > getShuffleMask() const
void resolveDanglingDebugInfo(const Value *V, SDValue Val)
virtual std::pair< SDValue, SDValue > EmitTargetCodeForMemchr(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Src, SDValue Char, SDValue Length, MachinePointerInfo SrcPtrInfo) const
Emit target-specific code that performs a memchr, in cases where that is faster than a libcall...
static unsigned getFlagWordForMatchingOp(unsigned InputFlag, unsigned MatchedOperandNo)
getFlagWordForMatchingOp - Augment an existing flag word returned by getFlagWord with information ind...
void getCopyToRegs(SDValue Val, SelectionDAG &DAG, const SDLoc &dl, SDValue &Chain, SDValue *Flag, const Value *V=nullptr, ISD::NodeType PreferredExtendType=ISD::ANY_EXTEND) const
getCopyToRegs - Emit a series of CopyToReg nodes that copies the specified value into the registers s...
bool noNaNs() const
Flag queries.
This class contains meta information specific to a module.
LLVMContext & getContext() const
Get the global data context.
This file describes how to lower LLVM code to machine code.
bool isVoidTy() const
Return true if this is 'void'.
an instruction to allocate memory on the stack
unsigned getLiveInPhysReg(unsigned VReg) const
getLiveInPhysReg - If VReg is a live-in virtual register, return the corresponding live-in physical r...
This instruction inserts a struct field of array element value into an aggregate value.
SDValue getTargetGlobalAddress(const GlobalValue *GV, const SDLoc &DL, EVT VT, int64_t offset=0, unsigned char TargetFlags=0)
unsigned InitializeRegForValue(const Value *V)
gep_type_iterator gep_type_begin(const User *GEP)
APInt getUnsignedMin() const
Return the smallest unsigned value contained in the ConstantRange.
unsigned getVectorNumElements() const
getVectorNumElements - Given a vector type, return the number of elements it contains.
static bool InBlock(const Value *V, const BasicBlock *BB)
unsigned getOrCreateSwiftErrorVReg(const MachineBasicBlock *, const Value *)
Get or create the swifterror value virtual register in SwiftErrorVRegDefMap for this basic block...
This class is used to represent ISD::LOAD nodes.
DYNAMIC_STACKALLOC - Allocate some number of bytes on the stack aligned to a specified boundary...