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llvm::MachineRegisterInfo Class Reference

MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc. More...

#include <MachineRegisterInfo.h>

Classes

class  defusechain_instr_iterator
 defusechain_iterator - This class provides iterator support for machine operands in the function that use or define a specific register. More...
 
class  defusechain_iterator
 reg_begin/reg_end - Provide iteration support to walk over all definitions and uses of a register within the MachineFunction that corresponds to this MachineRegisterInfo object. More...
 
class  Delegate
 

Public Types

typedef defusechain_iterator
< true, true, false, true,
false, false
reg_iterator
 reg_iterator/reg_begin/reg_end - Walk all defs and uses of the specified register. More...
 
typedef
defusechain_instr_iterator
< true, true, false, false,
true, false
reg_instr_iterator
 reg_instr_iterator/reg_instr_begin/reg_instr_end - Walk all defs and uses of the specified register, stepping by MachineInstr. More...
 
typedef
defusechain_instr_iterator
< true, true, false, false,
false, true
reg_bundle_iterator
 reg_bundle_iterator/reg_bundle_begin/reg_bundle_end - Walk all defs and uses of the specified register, stepping by bundle. More...
 
typedef defusechain_iterator
< true, true, true, true,
false, false
reg_nodbg_iterator
 reg_nodbg_iterator/reg_nodbg_begin/reg_nodbg_end - Walk all defs and uses of the specified register, skipping those marked as Debug. More...
 
typedef
defusechain_instr_iterator
< true, true, true, false,
true, false
reg_instr_nodbg_iterator
 reg_instr_nodbg_iterator/reg_instr_nodbg_begin/reg_instr_nodbg_end - Walk all defs and uses of the specified register, stepping by MachineInstr, skipping those marked as Debug. More...
 
typedef
defusechain_instr_iterator
< true, true, true, false,
false, true
reg_bundle_nodbg_iterator
 reg_bundle_nodbg_iterator/reg_bundle_nodbg_begin/reg_bundle_nodbg_end - Walk all defs and uses of the specified register, stepping by bundle, skipping those marked as Debug. More...
 
typedef defusechain_iterator
< false, true, false, true,
false, false
def_iterator
 def_iterator/def_begin/def_end - Walk all defs of the specified register. More...
 
typedef
defusechain_instr_iterator
< false, true, false, false,
true, false
def_instr_iterator
 def_instr_iterator/def_instr_begin/def_instr_end - Walk all defs of the specified register, stepping by MachineInst. More...
 
typedef
defusechain_instr_iterator
< false, true, false, false,
false, true
def_bundle_iterator
 def_bundle_iterator/def_bundle_begin/def_bundle_end - Walk all defs of the specified register, stepping by bundle. More...
 
typedef defusechain_iterator
< true, false, false, true,
false, false
use_iterator
 use_iterator/use_begin/use_end - Walk all uses of the specified register. More...
 
typedef
defusechain_instr_iterator
< true, false, false, false,
true, false
use_instr_iterator
 use_instr_iterator/use_instr_begin/use_instr_end - Walk all uses of the specified register, stepping by MachineInstr. More...
 
typedef
defusechain_instr_iterator
< true, false, false, false,
false, true
use_bundle_iterator
 use_bundle_iterator/use_bundle_begin/use_bundle_end - Walk all uses of the specified register, stepping by bundle. More...
 
typedef defusechain_iterator
< true, false, true, true,
false, false
use_nodbg_iterator
 use_nodbg_iterator/use_nodbg_begin/use_nodbg_end - Walk all uses of the specified register, skipping those marked as Debug. More...
 
typedef
defusechain_instr_iterator
< true, false, true, false,
true, false
use_instr_nodbg_iterator
 use_instr_nodbg_iterator/use_instr_nodbg_begin/use_instr_nodbg_end - Walk all uses of the specified register, stepping by MachineInstr, skipping those marked as Debug. More...
 
typedef
defusechain_instr_iterator
< true, false, true, false,
false, true
use_bundle_nodbg_iterator
 use_bundle_nodbg_iterator/use_bundle_nodbg_begin/use_bundle_nodbg_end - Walk all uses of the specified register, stepping by bundle, skipping those marked as Debug. More...
 
typedef std::vector< std::pair
< unsigned, unsigned >
>::const_iterator 
livein_iterator
 

Public Member Functions

 MachineRegisterInfo (MachineFunction *MF)
 
const TargetRegisterInfogetTargetRegisterInfo () const
 
void resetDelegate (Delegate *delegate)
 
void setDelegate (Delegate *delegate)
 
bool isSSA () const
 
void leaveSSA ()
 
bool tracksLiveness () const
 tracksLiveness - Returns true when tracking register liveness accurately. More...
 
void invalidateLiveness ()
 invalidateLiveness - Indicates that register liveness is no longer being tracked accurately. More...
 
bool shouldTrackSubRegLiveness (const TargetRegisterClass &RC) const
 Returns true if liveness for register class RC should be tracked at the subregister level. More...
 
bool shouldTrackSubRegLiveness (unsigned VReg) const
 
bool subRegLivenessEnabled () const
 
void addRegOperandToUseList (MachineOperand *MO)
 Add MO to the linked list of operands for its register. More...
 
void removeRegOperandFromUseList (MachineOperand *MO)
 Remove MO from its use-def list. More...
 
void moveOperands (MachineOperand *Dst, MachineOperand *Src, unsigned NumOps)
 Move NumOps operands from Src to Dst, updating use-def lists as needed. More...
 
void verifyUseList (unsigned Reg) const
 Verify the sanity of the use list for Reg. More...
 
void verifyUseLists () const
 Verify the use list of all registers. More...
 
reg_iterator reg_begin (unsigned RegNo) const
 
iterator_range< reg_iteratorreg_operands (unsigned Reg) const
 
reg_instr_iterator reg_instr_begin (unsigned RegNo) const
 
iterator_range
< reg_instr_iterator
reg_instructions (unsigned Reg) const
 
reg_bundle_iterator reg_bundle_begin (unsigned RegNo) const
 
iterator_range
< reg_bundle_iterator
reg_bundles (unsigned Reg) const
 
bool reg_empty (unsigned RegNo) const
 reg_empty - Return true if there are no instructions using or defining the specified register (it may be live-in). More...
 
reg_nodbg_iterator reg_nodbg_begin (unsigned RegNo) const
 
iterator_range
< reg_nodbg_iterator
reg_nodbg_operands (unsigned Reg) const
 
reg_instr_nodbg_iterator reg_instr_nodbg_begin (unsigned RegNo) const
 
iterator_range
< reg_instr_nodbg_iterator
reg_nodbg_instructions (unsigned Reg) const
 
reg_bundle_nodbg_iterator reg_bundle_nodbg_begin (unsigned RegNo) const
 
iterator_range
< reg_bundle_nodbg_iterator
reg_nodbg_bundles (unsigned Reg) const
 
bool reg_nodbg_empty (unsigned RegNo) const
 reg_nodbg_empty - Return true if the only instructions using or defining Reg are Debug instructions. More...
 
def_iterator def_begin (unsigned RegNo) const
 
iterator_range< def_iteratordef_operands (unsigned Reg) const
 
def_instr_iterator def_instr_begin (unsigned RegNo) const
 
iterator_range
< def_instr_iterator
def_instructions (unsigned Reg) const
 
def_bundle_iterator def_bundle_begin (unsigned RegNo) const
 
iterator_range
< def_bundle_iterator
def_bundles (unsigned Reg) const
 
bool def_empty (unsigned RegNo) const
 def_empty - Return true if there are no instructions defining the specified register (it may be live-in). More...
 
bool hasOneDef (unsigned RegNo) const
 Return true if there is exactly one operand defining the specified register. More...
 
use_iterator use_begin (unsigned RegNo) const
 
iterator_range< use_iteratoruse_operands (unsigned Reg) const
 
use_instr_iterator use_instr_begin (unsigned RegNo) const
 
iterator_range
< use_instr_iterator
use_instructions (unsigned Reg) const
 
use_bundle_iterator use_bundle_begin (unsigned RegNo) const
 
iterator_range
< use_bundle_iterator
use_bundles (unsigned Reg) const
 
bool use_empty (unsigned RegNo) const
 use_empty - Return true if there are no instructions using the specified register. More...
 
bool hasOneUse (unsigned RegNo) const
 hasOneUse - Return true if there is exactly one instruction using the specified register. More...
 
use_nodbg_iterator use_nodbg_begin (unsigned RegNo) const
 
iterator_range
< use_nodbg_iterator
use_nodbg_operands (unsigned Reg) const
 
use_instr_nodbg_iterator use_instr_nodbg_begin (unsigned RegNo) const
 
iterator_range
< use_instr_nodbg_iterator
use_nodbg_instructions (unsigned Reg) const
 
use_bundle_nodbg_iterator use_bundle_nodbg_begin (unsigned RegNo) const
 
iterator_range
< use_bundle_nodbg_iterator
use_nodbg_bundles (unsigned Reg) const
 
bool use_nodbg_empty (unsigned RegNo) const
 use_nodbg_empty - Return true if there are no non-Debug instructions using the specified register. More...
 
bool hasOneNonDBGUse (unsigned RegNo) const
 hasOneNonDBGUse - Return true if there is exactly one non-Debug instruction using the specified register. More...
 
void replaceRegWith (unsigned FromReg, unsigned ToReg)
 replaceRegWith - Replace all instances of FromReg with ToReg in the machine function. More...
 
MachineInstrgetVRegDef (unsigned Reg) const
 getVRegDef - Return the machine instr that defines the specified virtual register or null if none is found. More...
 
MachineInstrgetUniqueVRegDef (unsigned Reg) const
 getUniqueVRegDef - Return the unique machine instr that defines the specified virtual register or null if none is found. More...
 
void clearKillFlags (unsigned Reg) const
 clearKillFlags - Iterate over all the uses of the given register and clear the kill flag from the MachineOperand. More...
 
void dumpUses (unsigned RegNo) const
 
bool isConstantPhysReg (unsigned PhysReg) const
 Returns true if PhysReg is unallocatable and constant throughout the function. More...
 
PSetIterator getPressureSets (unsigned RegUnit) const
 Get an iterator over the pressure sets affected by the given physical or virtual register. More...
 
const TargetRegisterClassgetRegClass (unsigned Reg) const
 Return the register class of the specified virtual register. More...
 
const TargetRegisterClassgetRegClassOrNull (unsigned Reg) const
 Return the register class of Reg, or null if Reg has not been assigned a register class yet. More...
 
const RegisterBankgetRegBankOrNull (unsigned Reg) const
 Return the register bank of Reg, or null if Reg has not been assigned a register bank or has been assigned a register class. More...
 
const RegClassOrRegBankgetRegClassOrRegBank (unsigned Reg) const
 Return the register bank or register class of Reg. More...
 
void setRegClass (unsigned Reg, const TargetRegisterClass *RC)
 setRegClass - Set the register class of the specified virtual register. More...
 
void setRegBank (unsigned Reg, const RegisterBank &RegBank)
 Set the register bank to RegBank for Reg. More...
 
const TargetRegisterClassconstrainRegClass (unsigned Reg, const TargetRegisterClass *RC, unsigned MinNumRegs=0)
 constrainRegClass - Constrain the register class of the specified virtual register to be a common subclass of RC and the current register class, but only if the new class has at least MinNumRegs registers. More...
 
bool recomputeRegClass (unsigned Reg)
 recomputeRegClass - Try to find a legal super-class of Reg's register class that still satisfies the constraints from the instructions using Reg. More...
 
unsigned createVirtualRegister (const TargetRegisterClass *RegClass)
 createVirtualRegister - Create and return a new virtual register in the function with the specified register class. More...
 
VRegToTypeMapgetVRegToType () const
 Accessor for VRegToType. More...
 
LLT getType (unsigned VReg) const
 Get the low-level type of VReg or LLT{} if VReg is not a generic (target independent) virtual register. More...
 
void setType (unsigned VReg, LLT Ty)
 Set the low-level type of VReg to Ty. More...
 
unsigned createGenericVirtualRegister (LLT Ty)
 Create and return a new generic virtual register with low-level type Ty. More...
 
void clearVirtRegTypes ()
 Remove all types associated to virtual registers (after instruction selection and constraining of all generic virtual registers). More...
 
unsigned createIncompleteVirtualRegister ()
 Creates a new virtual register that has no register class, register bank or size assigned yet. More...
 
unsigned getNumVirtRegs () const
 getNumVirtRegs - Return the number of virtual registers created. More...
 
void clearVirtRegs ()
 clearVirtRegs - Remove all virtual registers (after physreg assignment). More...
 
void setRegAllocationHint (unsigned VReg, unsigned Type, unsigned PrefReg)
 setRegAllocationHint - Specify a register allocation hint for the specified virtual register. More...
 
void setSimpleHint (unsigned VReg, unsigned PrefReg)
 Specify the preferred register allocation hint for the specified virtual register. More...
 
std::pair< unsigned, unsignedgetRegAllocationHint (unsigned VReg) const
 getRegAllocationHint - Return the register allocation hint for the specified virtual register. More...
 
unsigned getSimpleHint (unsigned VReg) const
 getSimpleHint - Return the preferred register allocation hint, or 0 if a standard simple hint (Type == 0) is not set. More...
 
void markUsesInDebugValueAsUndef (unsigned Reg) const
 markUsesInDebugValueAsUndef - Mark every DBG_VALUE referencing the specified register as undefined which causes the DBG_VALUE to be deleted during LiveDebugVariables analysis. More...
 
bool isPhysRegModified (unsigned PhysReg, bool SkipNoReturnDef=false) const
 Return true if the specified register is modified in this function. More...
 
bool isPhysRegUsed (unsigned PhysReg) const
 Return true if the specified register is modified or read in this function. More...
 
void addPhysRegsUsedFromRegMask (const uint32_t *RegMask)
 addPhysRegsUsedFromRegMask - Mark any registers not in RegMask as used. More...
 
const BitVectorgetUsedPhysRegsMask () const
 
void setUsedPhysRegMask (BitVector &Mask)
 
void freezeReservedRegs (const MachineFunction &)
 freezeReservedRegs - Called by the register allocator to freeze the set of reserved registers before allocation begins. More...
 
bool reservedRegsFrozen () const
 reservedRegsFrozen - Returns true after freezeReservedRegs() was called to ensure the set of reserved registers stays constant. More...
 
bool canReserveReg (unsigned PhysReg) const
 canReserveReg - Returns true if PhysReg can be used as a reserved register. More...
 
const BitVectorgetReservedRegs () const
 getReservedRegs - Returns a reference to the frozen set of reserved registers. More...
 
bool isReserved (unsigned PhysReg) const
 isReserved - Returns true when PhysReg is a reserved register. More...
 
bool isAllocatable (unsigned PhysReg) const
 isAllocatable - Returns true when PhysReg belongs to an allocatable register class and it hasn't been reserved. More...
 
void addLiveIn (unsigned Reg, unsigned vreg=0)
 addLiveIn - Add the specified register as a live-in. More...
 
livein_iterator livein_begin () const
 
livein_iterator livein_end () const
 
bool livein_empty () const
 
bool isLiveIn (unsigned Reg) const
 
unsigned getLiveInPhysReg (unsigned VReg) const
 getLiveInPhysReg - If VReg is a live-in virtual register, return the corresponding live-in physical register. More...
 
unsigned getLiveInVirtReg (unsigned PReg) const
 getLiveInVirtReg - If PReg is a live-in physical register, return the corresponding live-in physical register. More...
 
void EmitLiveInCopies (MachineBasicBlock *EntryMBB, const TargetRegisterInfo &TRI, const TargetInstrInfo &TII)
 EmitLiveInCopies - Emit copies to initialize livein virtual registers into the given entry block. More...
 
LaneBitmask getMaxLaneMaskForVReg (unsigned Reg) const
 Returns a mask covering all bits that can appear in lane masks of subregisters of the virtual register Reg. More...
 

Static Public Member Functions

static reg_iterator reg_end ()
 
static reg_instr_iterator reg_instr_end ()
 
static reg_bundle_iterator reg_bundle_end ()
 
static reg_nodbg_iterator reg_nodbg_end ()
 
static reg_instr_nodbg_iterator reg_instr_nodbg_end ()
 
static reg_bundle_nodbg_iterator reg_bundle_nodbg_end ()
 
static def_iterator def_end ()
 
static def_instr_iterator def_instr_end ()
 
static def_bundle_iterator def_bundle_end ()
 
static use_iterator use_end ()
 
static use_instr_iterator use_instr_end ()
 
static use_bundle_iterator use_bundle_end ()
 
static use_nodbg_iterator use_nodbg_end ()
 
static use_instr_nodbg_iterator use_instr_nodbg_end ()
 
static use_bundle_nodbg_iterator use_bundle_nodbg_end ()
 

Friends

template<bool , bool , bool , bool , bool , bool >
class defusechain_iterator
 
template<bool , bool , bool , bool , bool , bool >
class defusechain_instr_iterator
 

Detailed Description

MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.

Definition at line 40 of file MachineRegisterInfo.h.

Member Typedef Documentation

def_bundle_iterator/def_bundle_begin/def_bundle_end - Walk all defs of the specified register, stepping by bundle.

Definition at line 367 of file MachineRegisterInfo.h.

def_instr_iterator/def_instr_begin/def_instr_end - Walk all defs of the specified register, stepping by MachineInst.

Definition at line 351 of file MachineRegisterInfo.h.

def_iterator/def_begin/def_end - Walk all defs of the specified register.

Definition at line 338 of file MachineRegisterInfo.h.

typedef std::vector<std::pair<unsigned,unsigned> >::const_iterator llvm::MachineRegisterInfo::livein_iterator

Definition at line 804 of file MachineRegisterInfo.h.

reg_bundle_iterator/reg_bundle_begin/reg_bundle_end - Walk all defs and uses of the specified register, stepping by bundle.

Definition at line 264 of file MachineRegisterInfo.h.

reg_bundle_nodbg_iterator/reg_bundle_nodbg_begin/reg_bundle_nodbg_end - Walk all defs and uses of the specified register, stepping by bundle, skipping those marked as Debug.

Definition at line 317 of file MachineRegisterInfo.h.

reg_instr_iterator/reg_instr_begin/reg_instr_end - Walk all defs and uses of the specified register, stepping by MachineInstr.

Definition at line 248 of file MachineRegisterInfo.h.

reg_instr_nodbg_iterator/reg_instr_nodbg_begin/reg_instr_nodbg_end - Walk all defs and uses of the specified register, stepping by MachineInstr, skipping those marked as Debug.

Definition at line 300 of file MachineRegisterInfo.h.

reg_iterator/reg_begin/reg_end - Walk all defs and uses of the specified register.

Definition at line 235 of file MachineRegisterInfo.h.

reg_nodbg_iterator/reg_nodbg_begin/reg_nodbg_end - Walk all defs and uses of the specified register, skipping those marked as Debug.

Definition at line 283 of file MachineRegisterInfo.h.

use_bundle_iterator/use_bundle_begin/use_bundle_end - Walk all uses of the specified register, stepping by bundle.

Definition at line 423 of file MachineRegisterInfo.h.

use_bundle_nodbg_iterator/use_bundle_nodbg_begin/use_bundle_nodbg_end - Walk all uses of the specified register, stepping by bundle, skipping those marked as Debug.

Definition at line 485 of file MachineRegisterInfo.h.

use_instr_iterator/use_instr_begin/use_instr_end - Walk all uses of the specified register, stepping by MachineInstr.

Definition at line 407 of file MachineRegisterInfo.h.

use_instr_nodbg_iterator/use_instr_nodbg_begin/use_instr_nodbg_end - Walk all uses of the specified register, stepping by MachineInstr, skipping those marked as Debug.

Definition at line 468 of file MachineRegisterInfo.h.

use_iterator/use_begin/use_end - Walk all uses of the specified register.

Definition at line 394 of file MachineRegisterInfo.h.

use_nodbg_iterator/use_nodbg_begin/use_nodbg_end - Walk all uses of the specified register, skipping those marked as Debug.

Definition at line 451 of file MachineRegisterInfo.h.

Constructor & Destructor Documentation

MachineRegisterInfo::MachineRegisterInfo ( MachineFunction MF)
explicit

Member Function Documentation

void llvm::MachineRegisterInfo::addLiveIn ( unsigned  Reg,
unsigned  vreg = 0 
)
inline
void llvm::MachineRegisterInfo::addPhysRegsUsedFromRegMask ( const uint32_t RegMask)
inline

addPhysRegsUsedFromRegMask - Mark any registers not in RegMask as used.

This corresponds to the bit mask attached to register mask operands.

Definition at line 724 of file MachineRegisterInfo.h.

References llvm::BitVector::setBitsNotInMask().

Referenced by llvm::MIRParserImpl::setupRegisterInfo().

void MachineRegisterInfo::addRegOperandToUseList ( MachineOperand MO)
bool llvm::MachineRegisterInfo::canReserveReg ( unsigned  PhysReg) const
inline

canReserveReg - Returns true if PhysReg can be used as a reserved register.

Any register can be reserved before freezeReservedRegs() is called.

Definition at line 757 of file MachineRegisterInfo.h.

References reservedRegsFrozen(), and llvm::BitVector::test().

Referenced by llvm::MipsRegisterInfo::canRealignStack(), llvm::X86RegisterInfo::canRealignStack(), and llvm::ARMBaseRegisterInfo::canRealignStack().

void MachineRegisterInfo::clearKillFlags ( unsigned  Reg) const

clearKillFlags - Iterate over all the uses of the given register and clear the kill flag from the MachineOperand.

This function is used by optimization passes which extend register lifetimes and need only preserve conservative kill flag information.

Definition at line 378 of file MachineRegisterInfo.cpp.

References use_operands().

Referenced by emitIndirectDst(), llvm::HexagonInstrInfo::expandPostRAPseudo(), insertPHI(), llvm::AArch64InstrInfo::insertSelect(), llvm::SIInstrInfo::moveToVALU(), llvm::HexagonInstrInfo::PredicateInstruction(), and llvm::SelectionDAGISel::runOnMachineFunction().

void MachineRegisterInfo::clearVirtRegs ( )

clearVirtRegs - Remove all virtual registers (after physreg assignment).

Definition at line 150 of file MachineRegisterInfo.cpp.

References getNumVirtRegs(), I, i, llvm::TargetRegisterInfo::index2VirtReg(), llvm_unreachable, and verifyUseList().

Referenced by llvm::SIInstrInfo::insertIndirectBranch().

void MachineRegisterInfo::clearVirtRegTypes ( )

Remove all types associated to virtual registers (after instruction selection and constraining of all generic virtual registers).

Definition at line 145 of file MachineRegisterInfo.cpp.

References llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::clear(), and getVRegToType().

const TargetRegisterClass * MachineRegisterInfo::constrainRegClass ( unsigned  Reg,
const TargetRegisterClass RC,
unsigned  MinNumRegs = 0 
)

constrainRegClass - Constrain the register class of the specified virtual register to be a common subclass of RC and the current register class, but only if the new class has at least MinNumRegs registers.

Return the new register class, or NULL if no such class exists. This should only be used when the constraint is known to be trivial, like GR32 -> GR32_NOSP. Beware of increasing register pressure.

Definition at line 55 of file MachineRegisterInfo.cpp.

References llvm::TargetRegisterInfo::getCommonSubClass(), llvm::TargetRegisterClass::getNumRegs(), getRegClass(), getTargetRegisterInfo(), and setRegClass().

Referenced by llvm::MachineBasicBlock::addLiveIn(), llvm::X86InstrInfo::classifyLEAReg(), llvm::RegisterBankInfo::constrainGenericRegister(), llvm::FastISel::constrainOperandRegClass(), llvm::SystemZInstrInfo::convertToThreeAddress(), llvm::X86InstrInfo::convertToThreeAddress(), llvm::FastISel::fastEmitInst_extractsubreg(), llvm::AArch64InstrInfo::foldMemoryOperandImpl(), genFusedMultiply(), genMaddR(), llvm::AArch64InstrInfo::insertSelect(), llvm::SystemZInstrInfo::insertSelect(), llvm::Thumb2InstrInfo::loadRegFromStackSlot(), llvm::SIInstrInfo::loadRegFromStackSlot(), llvm::AArch64InstrInfo::loadRegFromStackSlot(), llvm::AArch64RegisterInfo::materializeFrameBaseRegister(), llvm::PPCRegisterInfo::materializeFrameBaseRegister(), llvm::ARMBaseRegisterInfo::materializeFrameBaseRegister(), llvm::ARMBaseInstrInfo::optimizeSelect(), llvm::TargetInstrInfo::reassociateOps(), llvm::PPCRegisterInfo::resolveFrameIndex(), llvm::SelectionDAGISel::runOnMachineFunction(), llvm::Thumb2InstrInfo::storeRegToStackSlot(), llvm::SIInstrInfo::storeRegToStackSlot(), llvm::AArch64InstrInfo::storeRegToStackSlot(), llvm::TailDuplicator::tailDuplicateAndUpdate(), and UpdateOperandRegClass().

unsigned MachineRegisterInfo::createGenericVirtualRegister ( LLT  Ty)
unsigned MachineRegisterInfo::createIncompleteVirtualRegister ( )

Creates a new virtual register that has no register class, register bank or size assigned yet.

This is only allowed to be used temporarily while constructing machine instructions. Most operations are undefined on an incomplete register until one of setRegClass(), setRegBank() or setSize() has been called on it.

Definition at line 96 of file MachineRegisterInfo.cpp.

References getNumVirtRegs(), and llvm::TargetRegisterInfo::index2VirtReg().

Referenced by createGenericVirtualRegister(), createVirtualRegister(), and llvm::PerFunctionMIParsingState::getVRegInfo().

unsigned MachineRegisterInfo::createVirtualRegister ( const TargetRegisterClass RegClass)

createVirtualRegister - Create and return a new virtual register in the function with the specified register class.

Definition at line 107 of file MachineRegisterInfo.cpp.

References assert(), createIncompleteVirtualRegister(), llvm::TargetRegisterClass::isAllocatable(), and llvm::MachineRegisterInfo::Delegate::MRI_NoteNewVirtualRegister().

Referenced by llvm::MachineBasicBlock::addLiveIn(), llvm::MachineFunction::addLiveIn(), addLiveIn(), attachMEMCPYScratchRegs(), llvm::X86InstrInfo::classifyLEAReg(), llvm::constrainOperandRegClass(), llvm::LiveRangeEdit::createEmptyIntervalFrom(), llvm::LiveRangeEdit::createFrom(), llvm::AMDGPUTargetLowering::CreateLiveInRegister(), llvm::FunctionLoweringInfo::CreateReg(), llvm::FastISel::createResultReg(), createSwiftErrorEntriesInEntryBlock(), createVirtualRegs(), llvm::HexagonInstrInfo::createVR(), llvm::WebAssemblyRegisterInfo::eliminateFrameIndex(), llvm::SystemZRegisterInfo::eliminateFrameIndex(), llvm::ThumbRegisterInfo::eliminateFrameIndex(), llvm::AArch64RegisterInfo::eliminateFrameIndex(), llvm::SIRegisterInfo::eliminateFrameIndex(), llvm::PPCRegisterInfo::eliminateFrameIndex(), llvm::ARMBaseRegisterInfo::eliminateFrameIndex(), llvm::PPCTargetLowering::EmitAtomicBinary(), llvm::SparcTargetLowering::emitEHSjLjLongJmp(), llvm::PPCTargetLowering::emitEHSjLjLongJmp(), llvm::SparcTargetLowering::emitEHSjLjSetJmp(), llvm::PPCTargetLowering::emitEHSjLjSetJmp(), emitIndirectDst(), emitIndirectSrc(), llvm::SITargetLowering::EmitInstrWithCustomInserter(), llvm::ARMTargetLowering::EmitInstrWithCustomInserter(), llvm::PPCTargetLowering::EmitInstrWithCustomInserter(), llvm::X86TargetLowering::EmitInstrWithCustomInserter(), emitLoadM0FromVGPRLoop(), llvm::PPCTargetLowering::EmitPartwordAtomicBinary(), llvm::MipsSEFrameLowering::emitPrologue(), llvm::MSP430TargetLowering::EmitShiftInstr(), emitThumbRegPlusImmInReg(), llvm::ARMBaseInstrInfo::FoldImmediate(), foldVGPRCopyIntoRegSequence(), forceReg(), llvm::AArch64InstrInfo::genAlternativeCodeSequence(), llvm::FunctionLoweringInfo::getCatchPadExceptionPointerVReg(), llvm::MipsFunctionInfo::getGlobalBaseReg(), llvm::LanaiMachineFunctionInfo::getGlobalBaseReg(), llvm::SparcInstrInfo::getGlobalBaseReg(), llvm::X86InstrInfo::getGlobalBaseReg(), llvm::FunctionLoweringInfo::getOrCreateSwiftErrorVReg(), GetRegistersForValue(), llvm::AArch64TargetLowering::insertCopiesSplitCSR(), llvm::PPCTargetLowering::insertCopiesSplitCSR(), llvm::SIInstrInfo::insertIndirectBranch(), InsertNewDef(), insertPHI(), llvm::SIInstrInfo::legalizeGenericOperand(), llvm::SIInstrInfo::legalizeOperands(), llvm::SIInstrInfo::legalizeOpWithMove(), llvm::MipsSEInstrInfo::loadImmediate(), loadM0FromVGPR(), llvm::SelectionDAGBuilder::LowerCallTo(), llvm::PPCRegisterInfo::lowerCRBitRestore(), llvm::PPCRegisterInfo::lowerCRBitSpilling(), llvm::PPCRegisterInfo::lowerCRRestore(), llvm::PPCRegisterInfo::lowerCRSpilling(), llvm::PPCRegisterInfo::lowerDynamicAlloc(), llvm::HexagonTargetLowering::LowerFormalArguments(), llvm::SystemZTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::PPCRegisterInfo::lowerVRSAVERestore(), llvm::PPCRegisterInfo::lowerVRSAVESpilling(), llvm::SIRegisterInfo::materializeFrameBaseRegister(), MaybeRewriteToDrop(), MaybeRewriteToFallthrough(), MoveAndTeeForMultiUse(), MoveForSingleUse(), llvm::SIInstrInfo::moveToVALU(), propagateSwiftErrorVRegs(), llvm::SIInstrInfo::readlaneVGPRToSGPR(), llvm::TargetInstrInfo::reassociateOps(), RematerializeCheapDef(), llvm::SIRegisterInfo::restoreSGPR(), llvm::AVRDynAllocaSR::runOnMachineFunction(), llvm::AArch64InstructionSelector::select(), llvm::AVRDAGToDAGISel::SelectInlineAsmMemoryOperand(), setM0ToIndexFromSGPR(), llvm::SIRegisterInfo::spillSGPR(), llvm::LiveIntervals::splitSeparateComponents(), and writeSPToMemory().

def_iterator llvm::MachineRegisterInfo::def_begin ( unsigned  RegNo) const
inline
def_bundle_iterator llvm::MachineRegisterInfo::def_bundle_begin ( unsigned  RegNo) const
inline

Definition at line 368 of file MachineRegisterInfo.h.

Referenced by def_bundles().

static def_bundle_iterator llvm::MachineRegisterInfo::def_bundle_end ( )
inlinestatic

Definition at line 371 of file MachineRegisterInfo.h.

Referenced by def_bundles().

iterator_range<def_bundle_iterator> llvm::MachineRegisterInfo::def_bundles ( unsigned  Reg) const
inline

Definition at line 375 of file MachineRegisterInfo.h.

References def_bundle_begin(), def_bundle_end(), and llvm::make_range().

bool llvm::MachineRegisterInfo::def_empty ( unsigned  RegNo) const
inline

def_empty - Return true if there are no instructions defining the specified register (it may be live-in).

Definition at line 381 of file MachineRegisterInfo.h.

References def_begin(), and def_end().

Referenced by llvm::MIRPrinter::convert(), getUniqueVRegDef(), isConstantPhysReg(), isSSA(), and llvm::AArch64InstrInfo::optimizeCondBranch().

static def_iterator llvm::MachineRegisterInfo::def_end ( )
inlinestatic
def_instr_iterator llvm::MachineRegisterInfo::def_instr_begin ( unsigned  RegNo) const
inline
static def_instr_iterator llvm::MachineRegisterInfo::def_instr_end ( )
inlinestatic
iterator_range<def_instr_iterator> llvm::MachineRegisterInfo::def_instructions ( unsigned  Reg) const
inline
iterator_range<def_iterator> llvm::MachineRegisterInfo::def_operands ( unsigned  Reg) const
inline
void MachineRegisterInfo::dumpUses ( unsigned  RegNo) const

Definition at line 448 of file MachineRegisterInfo.cpp.

References I, and use_instructions().

void MachineRegisterInfo::EmitLiveInCopies ( MachineBasicBlock EntryMBB,
const TargetRegisterInfo TRI,
const TargetInstrInfo TII 
)

EmitLiveInCopies - Emit copies to initialize livein virtual registers into the given entry block.

Definition at line 411 of file MachineRegisterInfo.cpp.

References llvm::MachineBasicBlock::addLiveIn(), llvm::MachineBasicBlock::begin(), llvm::BuildMI(), llvm::MCInstrInfo::get(), i, and use_empty().

Referenced by llvm::SelectionDAGISel::runOnMachineFunction().

void MachineRegisterInfo::freezeReservedRegs ( const MachineFunction MF)
unsigned MachineRegisterInfo::getLiveInPhysReg ( unsigned  VReg) const

getLiveInPhysReg - If VReg is a live-in virtual register, return the corresponding live-in physical register.

Definition at line 392 of file MachineRegisterInfo.cpp.

References E, I, livein_begin(), and livein_end().

Referenced by llvm::TargetLowering::parametersInCSRMatch().

unsigned MachineRegisterInfo::getLiveInVirtReg ( unsigned  PReg) const

getLiveInVirtReg - If PReg is a live-in physical register, return the corresponding live-in physical register.

Definition at line 401 of file MachineRegisterInfo.cpp.

References E, I, livein_begin(), and livein_end().

Referenced by llvm::MachineFunction::addLiveIn(), and llvm::AMDGPUTargetLowering::CreateLiveInRegister().

LaneBitmask MachineRegisterInfo::getMaxLaneMaskForVReg ( unsigned  Reg) const

Returns a mask covering all bits that can appear in lane masks of subregisters of the virtual register Reg.

Definition at line 440 of file MachineRegisterInfo.cpp.

References assert(), llvm::TargetRegisterClass::getLaneMask(), getRegClass(), and llvm::TargetRegisterInfo::isVirtualRegister().

Referenced by llvm::LiveRangeCalc::calculate(), llvm::LiveInterval::computeSubRangeUndefs(), getLanesWithProperty(), and llvm::LiveInterval::verify().

unsigned llvm::MachineRegisterInfo::getNumVirtRegs ( ) const
inline
PSetIterator llvm::MachineRegisterInfo::getPressureSets ( unsigned  RegUnit) const
inline

Get an iterator over the pressure sets affected by the given physical or virtual register.

If RegUnit is physical, it must be a register unit (from MCRegUnitIterator).

Definition at line 1065 of file MachineRegisterInfo.h.

Referenced by llvm::PressureDiff::addPressureChange(), decreaseSetPressure(), llvm::SIScheduleDAGMI::fillVgprSgprCost(), llvm::RegPressureTracker::increaseRegPressure(), and increaseSetPressure().

std::pair<unsigned, unsigned> llvm::MachineRegisterInfo::getRegAllocationHint ( unsigned  VReg) const
inline
const RegisterBank* llvm::MachineRegisterInfo::getRegBankOrNull ( unsigned  Reg) const
inline

Return the register bank of Reg, or null if Reg has not been assigned a register bank or has been assigned a register class.

Note
It is possible to get the register bank from the register class via RegisterBankInfo::getRegBankFromRegClass.

Definition at line 589 of file MachineRegisterInfo.h.

References llvm::PointerUnion< PT1, PT2 >::dyn_cast().

Referenced by llvm::MIRPrinter::convert().

const TargetRegisterClass* llvm::MachineRegisterInfo::getRegClass ( unsigned  Reg) const
inline

Return the register class of the specified virtual register.

This shouldn't be used directly unless Reg has a register class.

See Also
getRegClassOrNull when this might happen.

Definition at line 562 of file MachineRegisterInfo.h.

References assert().

Referenced by llvm::RegsForValue::AddInlineAsmOperands(), llvm::MachineFunction::addLiveIn(), llvm::SITargetLowering::AdjustInstrPostInstrSelection(), llvm::RegAllocBase::allocatePhysRegs(), llvm::AllocationOrder::AllocationOrder(), llvm::VirtRegMap::assignVirt2StackSlot(), llvm::LiveRangeEdit::calculateRegClassAndHint(), canFoldCopy(), canFoldIntoCSel(), llvm::PPCInstrInfo::canInsertSelect(), llvm::AArch64InstrInfo::canInsertSelect(), llvm::SystemZInstrInfo::canInsertSelect(), llvm::X86InstrInfo::canInsertSelect(), constrainRegClass(), llvm::MIRPrinter::convert(), ConvertImplicitDefToConstZero(), llvm::SystemZInstrInfo::convertToThreeAddress(), copyHint(), llvm::NVPTXInstrInfo::copyPhysReg(), llvm::LiveRangeEdit::createEmptyIntervalFrom(), llvm::LiveRangeEdit::createFrom(), llvm::HexagonFrameLowering::determineCalleeSaves(), doScavengeFrameVirtualRegs(), llvm::SparcTargetLowering::emitEHSjLjSetJmp(), llvm::PPCTargetLowering::emitEHSjLjSetJmp(), emitIndirectDst(), emitIndirectSrc(), llvm::FastISel::fastEmitInst_extractsubreg(), llvm::SIInstrInfo::FoldImmediate(), llvm::ARMBaseInstrInfo::FoldImmediate(), llvm::AArch64InstrInfo::foldMemoryOperandImpl(), llvm::SystemZInstrInfo::foldMemoryOperandImpl(), foldPatchpoint(), foldVGPRCopyIntoRegSequence(), llvm::BitTracker::MachineEvaluator::getCell(), getCopyRegClasses(), GetCostForDef(), llvm::ScheduleDAGInstrs::getLaneMaskForMO(), getMaxLaneMaskForVReg(), llvm::PPCInstrInfo::getOperandLatency(), llvm::SIInstrInfo::getOpRegClass(), llvm::BitTracker::MachineEvaluator::getRegBitWidth(), llvm::SIRegisterInfo::getRegClassForReg(), getRegTy(), hasVGPROperands(), llvm::MachineSSAUpdater::Initialize(), insertPHI(), llvm::SystemZInstrInfo::insertSelect(), llvm::X86InstrInfo::insertSelect(), isCrossCopy(), isFPR64(), llvm::SIInstrInfo::isLegalRegOperand(), isNonFoldablePartialRegisterLoad(), llvm::SIRegisterInfo::isSGPRReg(), isVGPR(), llvm::SIInstrInfo::legalizeOperands(), llvm::SIInstrInfo::legalizeOperandsSMRD(), llvm::SIInstrInfo::legalizeOperandsVOP3(), llvm::HexagonEvaluator::mask(), MaybeRewriteToDrop(), MaybeRewriteToFallthrough(), MoveAndTeeForMultiUse(), MoveForSingleUse(), optimizeCall(), llvm::X86InstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeSelect(), phiHasVGPROperands(), llvm::VirtRegMap::print(), PrintNodeInfo(), llvm::PSetIterator::PSetIterator(), llvm::SIInstrInfo::readlaneVGPRToSGPR(), recomputeRegClass(), RematerializeCheapDef(), llvm::SelectionDAGISel::runOnMachineFunction(), llvm::AVRDAGToDAGISel::SelectInlineAsmMemoryOperand(), setM0ToIndexFromSGPR(), llvm::CoalescerPair::setRegisters(), llvm::SIInstrInfo::shouldClusterMemOps(), shouldTrackSubRegLiveness(), llvm::LiveIntervals::splitSeparateComponents(), llvm::TailDuplicator::tailDuplicateAndUpdate(), UpdateOperandRegClass(), and llvm::SIInstrInfo::usesConstantBus().

const TargetRegisterClass* llvm::MachineRegisterInfo::getRegClassOrNull ( unsigned  Reg) const
inline

Return the register class of Reg, or null if Reg has not been assigned a register class yet.

Note
A null register class can only happen when these two conditions are met:
  1. Generic virtual registers are created.
  2. The machine function has not completely been through the instruction selection process. None of this condition is possible without GlobalISel for now. In other words, if GlobalISel is not used or if the query happens after the select pass, using getRegClass is safe.

Definition at line 579 of file MachineRegisterInfo.h.

References llvm::PointerUnion< PT1, PT2 >::dyn_cast().

Referenced by llvm::MIRPrinter::convert(), and llvm::InstructionSelect::runOnMachineFunction().

const RegClassOrRegBank& llvm::MachineRegisterInfo::getRegClassOrRegBank ( unsigned  Reg) const
inline

Return the register bank or register class of Reg.

Note
Before the register bank gets assigned (i.e., before the RegBankSelect pass) Reg may not have either.

Definition at line 598 of file MachineRegisterInfo.h.

Referenced by llvm::RegisterBankInfo::constrainGenericRegister(), llvm::RegisterBankInfo::getRegBank(), llvm::MachineInstr::print(), llvm::AArch64InstructionSelector::select(), and setType().

const BitVector& llvm::MachineRegisterInfo::getReservedRegs ( ) const
inline

getReservedRegs - Returns a reference to the frozen set of reserved registers.

This method should always be preferred to calling TRI::getReservedRegs() when possible.

Definition at line 764 of file MachineRegisterInfo.h.

References assert(), and reservedRegsFrozen().

Referenced by isReserved(), and llvm::RegisterClassInfo::runOnMachineFunction().

unsigned llvm::MachineRegisterInfo::getSimpleHint ( unsigned  VReg) const
inline

getSimpleHint - Return the preferred register allocation hint, or 0 if a standard simple hint (Type == 0) is not set.

Definition at line 697 of file MachineRegisterInfo.h.

References assert(), getRegAllocationHint(), and llvm::TargetRegisterInfo::isVirtualRegister().

Referenced by llvm::MIRPrinter::convert(), and llvm::VirtRegMap::hasPreferredPhys().

const TargetRegisterInfo* llvm::MachineRegisterInfo::getTargetRegisterInfo ( ) const
inline
LLT MachineRegisterInfo::getType ( unsigned  VReg) const
MachineInstr * MachineRegisterInfo::getUniqueVRegDef ( unsigned  Reg) const
const BitVector& llvm::MachineRegisterInfo::getUsedPhysRegsMask ( ) const
inline
MachineInstr * MachineRegisterInfo::getVRegDef ( unsigned  Reg) const
VRegToTypeMap& llvm::MachineRegisterInfo::getVRegToType ( ) const
inline

Accessor for VRegToType.

This accessor should only be used by global-isel related work.

Definition at line 638 of file MachineRegisterInfo.h.

Referenced by clearVirtRegTypes(), createGenericVirtualRegister(), getType(), llvm::InstructionSelect::runOnMachineFunction(), and setType().

bool llvm::MachineRegisterInfo::hasOneDef ( unsigned  RegNo) const
inline

Return true if there is exactly one operand defining the specified register.

Definition at line 385 of file MachineRegisterInfo.h.

References def_begin(), and def_end().

Referenced by llvm::ScheduleDAGInstrs::addVRegDefDeps(), IsSafeToMove(), isSSA(), MoveForSingleUse(), and llvm::AArch64InstrInfo::optimizeCondBranch().

bool MachineRegisterInfo::hasOneNonDBGUse ( unsigned  RegNo) const
bool llvm::MachineRegisterInfo::hasOneUse ( unsigned  RegNo) const
inline

hasOneUse - Return true if there is exactly one instruction using the specified register.

Definition at line 441 of file MachineRegisterInfo.h.

References use_begin(), and use_end().

Referenced by foldImmediates(), foldVGPRCopyIntoRegSequence(), HasOneUse(), isKilled(), MoveForSingleUse(), OneUseDominatesOtherUses(), and llvm::FastISel::tryToFoldLoad().

void llvm::MachineRegisterInfo::invalidateLiveness ( )
inline

invalidateLiveness - Indicates that register liveness is no longer being tracked accurately.

This should be called by late passes that invalidate the liveness information.

Definition at line 177 of file MachineRegisterInfo.h.

References llvm::MachineFunction::getProperties(), llvm::MachineFunctionProperties::reset(), and llvm::MachineFunctionProperties::TracksLiveness.

Referenced by llvm::BranchFolder::OptimizeFunction(), and llvm::MIRParserImpl::parseRegisterInfo().

bool llvm::MachineRegisterInfo::isAllocatable ( unsigned  PhysReg) const
inline

isAllocatable - Returns true when PhysReg belongs to an allocatable register class and it hasn't been reserved.

Allocatable registers may show up in the allocation order of some virtual register, so a register allocator needs to track its liveness and availability.

Definition at line 786 of file MachineRegisterInfo.h.

References getTargetRegisterInfo(), llvm::TargetRegisterInfo::isInAllocatableClass(), and isReserved().

Referenced by llvm::CriticalAntiDepBreaker::BreakAntiDependencies(), llvm::VirtRegAuxInfo::calculateSpillWeightAndHint(), computeLiveOuts(), llvm::SIRegisterInfo::findUnusedRegister(), llvm::PPCRegisterInfo::getCalleeSavedRegs(), and isConstantPhysReg().

bool MachineRegisterInfo::isConstantPhysReg ( unsigned  PhysReg) const

Returns true if PhysReg is unallocatable and constant throughout the function.

Writing to a constant register has no effect.

Definition at line 460 of file MachineRegisterInfo.cpp.

References assert(), def_empty(), getTargetRegisterInfo(), isAllocatable(), llvm::TargetRegisterInfo::isConstantPhysReg(), llvm::TargetRegisterInfo::isPhysicalRegister(), and llvm::MCRegAliasIterator::isValid().

Referenced by llvm::ScheduleDAGInstrs::addPhysRegDeps().

bool MachineRegisterInfo::isLiveIn ( unsigned  Reg) const
bool MachineRegisterInfo::isPhysRegModified ( unsigned  PhysReg,
bool  SkipNoReturnDef = false 
) const

Return true if the specified register is modified in this function.

This checks that no defining machine operands exist for the register or any of its aliases. Definitions found on functions marked noreturn are ignored, to consider them pass 'true' for optional parameter SkipNoReturnDef. The register is also considered modified when it is set in the UsedPhysRegMask.

Definition at line 520 of file MachineRegisterInfo.cpp.

References def_begin(), def_end(), getTargetRegisterInfo(), isNoReturnDef(), llvm::MCRegAliasIterator::isValid(), llvm::make_range(), and llvm::BitVector::test().

Referenced by llvm::XCoreFrameLowering::determineCalleeSaves(), llvm::TargetFrameLowering::determineCalleeSaves(), HandleVRSaveUpdate(), and IsSafeToMove().

bool MachineRegisterInfo::isPhysRegUsed ( unsigned  PhysReg) const

Return true if the specified register is modified or read in this function.

This checks that no machine operands exist for the register or any of its aliases. The register is also considered used when it is set in the UsedPhysRegMask.

Definition at line 535 of file MachineRegisterInfo.cpp.

References getTargetRegisterInfo(), llvm::MCRegAliasIterator::isValid(), reg_nodbg_empty(), and llvm::BitVector::test().

Referenced by llvm::SIRegisterInfo::findUnusedRegister(), llvm::LEONMachineFunctionPass::getUnusedFPRegister(), and needToReserveScavengingSpillSlots().

bool llvm::MachineRegisterInfo::isReserved ( unsigned  PhysReg) const
inline

isReserved - Returns true when PhysReg is a reserved register.

Reserved registers may belong to an allocatable register class, but the target has explicitly requested that they are not used.

Definition at line 776 of file MachineRegisterInfo.h.

References getReservedRegs(), and llvm::BitVector::test().

Referenced by llvm::LivePhysRegs::available(), llvm::ARMFrameLowering::determineCalleeSaves(), llvm::ARMBaseRegisterInfo::getRegAllocationHints(), llvm::TargetRegisterInfo::getRegAllocationHints(), isAllocatable(), and isImplicitlyDef().

bool llvm::MachineRegisterInfo::isSSA ( ) const
inline
void llvm::MachineRegisterInfo::leaveSSA ( )
inline
livein_iterator llvm::MachineRegisterInfo::livein_begin ( ) const
inline
bool llvm::MachineRegisterInfo::livein_empty ( ) const
inline
livein_iterator llvm::MachineRegisterInfo::livein_end ( ) const
inline
void MachineRegisterInfo::markUsesInDebugValueAsUndef ( unsigned  Reg) const

markUsesInDebugValueAsUndef - Mark every DBG_VALUE referencing the specified register as undefined which causes the DBG_VALUE to be deleted during LiveDebugVariables analysis.

Definition at line 479 of file MachineRegisterInfo.cpp.

References E, llvm::MachineInstr::getOperand(), I, llvm::MachineInstr::isDebugValue(), llvm::MachineOperand::setReg(), use_instr_begin(), use_instr_end(), and UseMI.

Referenced by llvm::MachineInstr::eraseFromParentAndMarkDBGValuesForRemoval().

void MachineRegisterInfo::moveOperands ( MachineOperand Dst,
MachineOperand Src,
unsigned  NumOps 
)

Move NumOps operands from Src to Dst, updating use-def lists as needed.

The Dst range is assumed to be uninitialized memory. (Or it may contain operands that won't be destroyed, which is OK because the MO destructor is trivial anyway).

The Src and Dst ranges may overlap.

Definition at line 281 of file MachineRegisterInfo.cpp.

References assert(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isReg(), and llvm::MachineOperand::Reg.

bool MachineRegisterInfo::recomputeRegClass ( unsigned  Reg)

recomputeRegClass - Try to find a legal super-class of Reg's register class that still satisfies the constraints from the instructions using Reg.

Returns true if Reg was upgraded.

This method can be used after constraints have been removed from a virtual register, for example after removing instructions or splitting the live range.

Definition at line 72 of file MachineRegisterInfo.cpp.

References llvm::TargetSubtargetInfo::getInstrInfo(), llvm::TargetRegisterInfo::getLargestLegalSuperClass(), llvm::MachineInstr::getOperand(), getRegClass(), llvm::MachineInstr::getRegClassConstraintEffect(), llvm::MachineFunction::getSubtarget(), getTargetRegisterInfo(), MI, reg_nodbg_operands(), setRegClass(), and TII.

Referenced by llvm::LiveRangeEdit::calculateRegClassAndHint().

reg_iterator llvm::MachineRegisterInfo::reg_begin ( unsigned  RegNo) const
inline
reg_bundle_iterator llvm::MachineRegisterInfo::reg_bundle_begin ( unsigned  RegNo) const
inline

Definition at line 265 of file MachineRegisterInfo.h.

Referenced by reg_bundles().

static reg_bundle_iterator llvm::MachineRegisterInfo::reg_bundle_end ( )
inlinestatic

Definition at line 268 of file MachineRegisterInfo.h.

Referenced by reg_bundles().

reg_bundle_nodbg_iterator llvm::MachineRegisterInfo::reg_bundle_nodbg_begin ( unsigned  RegNo) const
inline

Definition at line 318 of file MachineRegisterInfo.h.

Referenced by reg_nodbg_bundles().

static reg_bundle_nodbg_iterator llvm::MachineRegisterInfo::reg_bundle_nodbg_end ( )
inlinestatic

Definition at line 321 of file MachineRegisterInfo.h.

Referenced by reg_nodbg_bundles().

iterator_range<reg_bundle_iterator> llvm::MachineRegisterInfo::reg_bundles ( unsigned  Reg) const
inline

Definition at line 272 of file MachineRegisterInfo.h.

References llvm::make_range(), reg_bundle_begin(), and reg_bundle_end().

bool llvm::MachineRegisterInfo::reg_empty ( unsigned  RegNo) const
inline

reg_empty - Return true if there are no instructions using or defining the specified register (it may be live-in).

Definition at line 278 of file MachineRegisterInfo.h.

References reg_begin(), and reg_end().

static reg_iterator llvm::MachineRegisterInfo::reg_end ( )
inlinestatic
reg_instr_iterator llvm::MachineRegisterInfo::reg_instr_begin ( unsigned  RegNo) const
inline
static reg_instr_iterator llvm::MachineRegisterInfo::reg_instr_end ( )
inlinestatic
reg_instr_nodbg_iterator llvm::MachineRegisterInfo::reg_instr_nodbg_begin ( unsigned  RegNo) const
inline

Definition at line 301 of file MachineRegisterInfo.h.

Referenced by reg_nodbg_instructions().

static reg_instr_nodbg_iterator llvm::MachineRegisterInfo::reg_instr_nodbg_end ( )
inlinestatic

Definition at line 304 of file MachineRegisterInfo.h.

Referenced by reg_nodbg_instructions().

iterator_range<reg_instr_iterator> llvm::MachineRegisterInfo::reg_instructions ( unsigned  Reg) const
inline
reg_nodbg_iterator llvm::MachineRegisterInfo::reg_nodbg_begin ( unsigned  RegNo) const
inline

Definition at line 284 of file MachineRegisterInfo.h.

Referenced by reg_nodbg_empty(), and reg_nodbg_operands().

iterator_range<reg_bundle_nodbg_iterator> llvm::MachineRegisterInfo::reg_nodbg_bundles ( unsigned  Reg) const
inline
bool llvm::MachineRegisterInfo::reg_nodbg_empty ( unsigned  RegNo) const
inline

reg_nodbg_empty - Return true if the only instructions using or defining Reg are Debug instructions.

Definition at line 332 of file MachineRegisterInfo.h.

References reg_nodbg_begin(), and reg_nodbg_end().

Referenced by llvm::LiveIntervals::addKillFlags(), llvm::RegAllocBase::allocatePhysRegs(), isPhysRegUsed(), and verifyLeafProcRegUse().

static reg_nodbg_iterator llvm::MachineRegisterInfo::reg_nodbg_end ( )
inlinestatic

Definition at line 287 of file MachineRegisterInfo.h.

Referenced by reg_nodbg_empty(), and reg_nodbg_operands().

iterator_range<reg_instr_nodbg_iterator> llvm::MachineRegisterInfo::reg_nodbg_instructions ( unsigned  Reg) const
inline

Definition at line 309 of file MachineRegisterInfo.h.

References llvm::make_range(), reg_instr_nodbg_begin(), and reg_instr_nodbg_end().

Referenced by isTerminalReg().

iterator_range<reg_nodbg_iterator> llvm::MachineRegisterInfo::reg_nodbg_operands ( unsigned  Reg) const
inline
iterator_range<reg_iterator> llvm::MachineRegisterInfo::reg_operands ( unsigned  Reg) const
inline

Definition at line 241 of file MachineRegisterInfo.h.

References llvm::make_range(), reg_begin(), and reg_end().

Referenced by verifyUseList().

void MachineRegisterInfo::removeRegOperandFromUseList ( MachineOperand MO)
void MachineRegisterInfo::replaceRegWith ( unsigned  FromReg,
unsigned  ToReg 
)

replaceRegWith - Replace all instances of FromReg with ToReg in the machine function.

This is like llvm-level X->replaceAllUsesWith(Y), except that it also changes any definitions of the register as well.

Note that it is usually necessary to first constrain ToReg's register class to match the FromReg constraints using:

constrainRegClass(ToReg, getRegClass(FromReg))

That function will return NULL if the virtual registers have incompatible constraints.

Note that if ToReg is a physical register the function will replace and apply sub registers to ToReg in order to obtain a final/proper physical register.

This is like llvm-level X->replaceAllUsesWith(Y), except that it also changes any definitions of the register as well. If ToReg is a physical register we apply the sub register to obtain the final/proper physical register.

Definition at line 328 of file MachineRegisterInfo.cpp.

References assert(), E, getTargetRegisterInfo(), I, llvm::TargetRegisterInfo::isPhysicalRegister(), reg_begin(), reg_end(), llvm::MachineOperand::setReg(), and llvm::MachineOperand::substPhysReg().

Referenced by doScavengeFrameVirtualRegs(), llvm::SIInstrInfo::insertIndirectBranch(), llvm::SIInstrInfo::moveToVALU(), llvm::SelectionDAGISel::runOnMachineFunction(), and llvm::TailDuplicator::tailDuplicateAndUpdate().

bool llvm::MachineRegisterInfo::reservedRegsFrozen ( ) const
inline

reservedRegsFrozen - Returns true after freezeReservedRegs() was called to ensure the set of reserved registers stays constant.

Definition at line 750 of file MachineRegisterInfo.h.

References llvm::BitVector::empty().

Referenced by canReserveReg(), and getReservedRegs().

void llvm::MachineRegisterInfo::resetDelegate ( Delegate delegate)
inline

Definition at line 127 of file MachineRegisterInfo.h.

References assert().

Referenced by llvm::LiveRangeEdit::~LiveRangeEdit().

void llvm::MachineRegisterInfo::setDelegate ( Delegate delegate)
inline

Definition at line 136 of file MachineRegisterInfo.h.

References assert().

Referenced by llvm::LiveRangeEdit::LiveRangeEdit().

void llvm::MachineRegisterInfo::setRegAllocationHint ( unsigned  VReg,
unsigned  Type,
unsigned  PrefReg 
)
inline

setRegAllocationHint - Specify a register allocation hint for the specified virtual register.

Definition at line 675 of file MachineRegisterInfo.h.

References assert(), and llvm::TargetRegisterInfo::isVirtualRegister().

Referenced by llvm::VirtRegAuxInfo::calculateSpillWeightAndHint(), setSimpleHint(), and llvm::ARMBaseRegisterInfo::updateRegAllocHint().

void MachineRegisterInfo::setRegBank ( unsigned  Reg,
const RegisterBank RegBank 
)

Set the register bank to RegBank for Reg.

Definition at line 49 of file MachineRegisterInfo.cpp.

Referenced by llvm::RegisterBankInfo::OperandsMapper::createVRegs(), and llvm::MIRParserImpl::setupRegisterInfo().

void MachineRegisterInfo::setRegClass ( unsigned  Reg,
const TargetRegisterClass RC 
)
void llvm::MachineRegisterInfo::setSimpleHint ( unsigned  VReg,
unsigned  PrefReg 
)
inline

Specify the preferred register allocation hint for the specified virtual register.

Definition at line 683 of file MachineRegisterInfo.h.

References setRegAllocationHint().

Referenced by emitLoadM0FromVGPRLoop(), and llvm::MIRParserImpl::setupRegisterInfo().

void MachineRegisterInfo::setType ( unsigned  VReg,
LLT  Ty 
)

Set the low-level type of VReg to Ty.

Definition at line 125 of file MachineRegisterInfo.cpp.

References assert(), getRegClassOrRegBank(), getVRegToType(), and llvm::yaml::isNull().

void llvm::MachineRegisterInfo::setUsedPhysRegMask ( BitVector Mask)
inline
bool llvm::MachineRegisterInfo::shouldTrackSubRegLiveness ( const TargetRegisterClass RC) const
inline

Returns true if liveness for register class RC should be tracked at the subregister level.

Definition at line 184 of file MachineRegisterInfo.h.

References llvm::TargetRegisterClass::HasDisjunctSubRegs, and subRegLivenessEnabled().

Referenced by shouldTrackSubRegLiveness().

bool llvm::MachineRegisterInfo::shouldTrackSubRegLiveness ( unsigned  VReg) const
inline
bool llvm::MachineRegisterInfo::subRegLivenessEnabled ( ) const
inline
bool llvm::MachineRegisterInfo::tracksLiveness ( ) const
inline

tracksLiveness - Returns true when tracking register liveness accurately.

(see MachineFUnctionProperties::Property description for details)

Definition at line 167 of file MachineRegisterInfo.h.

References llvm::MachineFunction::getProperties(), llvm::MachineFunctionProperties::hasProperty(), and llvm::MachineFunctionProperties::TracksLiveness.

Referenced by llvm::MIRPrinter::convert(), llvm::BranchFolder::OptimizeFunction(), llvm::MIRParserImpl::parseRegisterInfo(), and llvm::MIPrinter::print().

use_iterator llvm::MachineRegisterInfo::use_begin ( unsigned  RegNo) const
inline
use_bundle_iterator llvm::MachineRegisterInfo::use_bundle_begin ( unsigned  RegNo) const
inline

Definition at line 424 of file MachineRegisterInfo.h.

Referenced by use_bundles().

static use_bundle_iterator llvm::MachineRegisterInfo::use_bundle_end ( )
inlinestatic

Definition at line 427 of file MachineRegisterInfo.h.

Referenced by use_bundles().

use_bundle_nodbg_iterator llvm::MachineRegisterInfo::use_bundle_nodbg_begin ( unsigned  RegNo) const
inline

Definition at line 486 of file MachineRegisterInfo.h.

Referenced by use_nodbg_bundles().

static use_bundle_nodbg_iterator llvm::MachineRegisterInfo::use_bundle_nodbg_end ( )
inlinestatic

Definition at line 489 of file MachineRegisterInfo.h.

Referenced by use_nodbg_bundles().

iterator_range<use_bundle_iterator> llvm::MachineRegisterInfo::use_bundles ( unsigned  Reg) const
inline

Definition at line 431 of file MachineRegisterInfo.h.

References llvm::make_range(), use_bundle_begin(), and use_bundle_end().

bool llvm::MachineRegisterInfo::use_empty ( unsigned  RegNo) const
inline
static use_iterator llvm::MachineRegisterInfo::use_end ( )
inlinestatic
use_instr_iterator llvm::MachineRegisterInfo::use_instr_begin ( unsigned  RegNo) const
inline
static use_instr_iterator llvm::MachineRegisterInfo::use_instr_end ( )
inlinestatic
use_instr_nodbg_iterator llvm::MachineRegisterInfo::use_instr_nodbg_begin ( unsigned  RegNo) const
inline

Definition at line 469 of file MachineRegisterInfo.h.

Referenced by findOnlyInterestingUse(), and use_nodbg_instructions().

static use_instr_nodbg_iterator llvm::MachineRegisterInfo::use_instr_nodbg_end ( )
inlinestatic

Definition at line 472 of file MachineRegisterInfo.h.

Referenced by use_nodbg_instructions().

iterator_range<use_instr_iterator> llvm::MachineRegisterInfo::use_instructions ( unsigned  Reg) const
inline

Definition at line 416 of file MachineRegisterInfo.h.

References llvm::make_range(), use_instr_begin(), and use_instr_end().

Referenced by dumpUses(), and llvm::isDefLiveOut().

use_nodbg_iterator llvm::MachineRegisterInfo::use_nodbg_begin ( unsigned  RegNo) const
inline
iterator_range<use_bundle_nodbg_iterator> llvm::MachineRegisterInfo::use_nodbg_bundles ( unsigned  Reg) const
inline
bool llvm::MachineRegisterInfo::use_nodbg_empty ( unsigned  RegNo) const
inline

use_nodbg_empty - Return true if there are no non-Debug instructions using the specified register.

Definition at line 500 of file MachineRegisterInfo.h.

References use_nodbg_begin(), and use_nodbg_end().

Referenced by eraseIfDead(), llvm::AArch64InstrInfo::optimizeCompareInstr(), and llvm::X86InstrInfo::optimizeCompareInstr().

static use_nodbg_iterator llvm::MachineRegisterInfo::use_nodbg_end ( )
inlinestatic
iterator_range<use_instr_nodbg_iterator> llvm::MachineRegisterInfo::use_nodbg_instructions ( unsigned  Reg) const
inline
iterator_range<use_nodbg_iterator> llvm::MachineRegisterInfo::use_nodbg_operands ( unsigned  Reg) const
inline
iterator_range<use_iterator> llvm::MachineRegisterInfo::use_operands ( unsigned  Reg) const
inline
void MachineRegisterInfo::verifyUseList ( unsigned  Reg) const
void MachineRegisterInfo::verifyUseLists ( ) const

Verify the use list of all registers.

Definition at line 203 of file MachineRegisterInfo.cpp.

References getNumVirtRegs(), getTargetRegisterInfo(), i, llvm::TargetRegisterInfo::index2VirtReg(), and verifyUseList().

Friends And Related Function Documentation

template<bool , bool , bool , bool , bool , bool >
friend class defusechain_instr_iterator
friend

Definition at line 228 of file MachineRegisterInfo.h.

template<bool , bool , bool , bool , bool , bool >
friend class defusechain_iterator
friend

Definition at line 222 of file MachineRegisterInfo.h.


The documentation for this class was generated from the following files: