26 #define DEBUG_TYPE "phi-opt"
28 STATISTIC(NumPHICycles,
"Number of PHI cycles replaced");
29 STATISTIC(NumDeadPHICycles,
"Number of dead PHI cycles");
53 bool IsSingleValuePHICycle(
MachineInstr *
MI,
unsigned &SingleValReg,
54 InstrSet &PHIsInCycle);
63 "Optimize machine instruction PHIs",
false,
false)
66 if (skipFunction(*Fn.getFunction()))
69 MRI = &Fn.getRegInfo();
70 TII = Fn.getSubtarget().getInstrInfo();
78 Changed |= OptimizeBB(*
I);
89 unsigned &SingleValReg,
90 InstrSet &PHIsInCycle) {
91 assert(MI->
isPHI() &&
"IsSingleValuePHICycle expects a PHI instruction");
95 if (!PHIsInCycle.insert(MI).second)
99 if (PHIsInCycle.size() == 16)
105 if (SrcReg == DstReg)
110 if (SrcMI && SrcMI->
isCopy() &&
118 if (SrcMI->
isPHI()) {
119 if (!IsSingleValuePHICycle(SrcMI, SingleValReg, PHIsInCycle))
123 if (SingleValReg != 0)
125 SingleValReg = SrcReg;
133 bool OptimizePHIs::IsDeadPHICycle(
MachineInstr *MI, InstrSet &PHIsInCycle) {
134 assert(MI->
isPHI() &&
"IsDeadPHICycle expects a PHI instruction");
137 "PHI destination is not a virtual register");
140 if (!PHIsInCycle.insert(MI).second)
144 if (PHIsInCycle.size() == 16)
148 if (!
UseMI.isPHI() || !IsDeadPHICycle(&
UseMI, PHIsInCycle))
158 bool Changed =
false;
160 MII = MBB.
begin(),
E = MBB.
end(); MII !=
E; ) {
166 unsigned SingleValReg = 0;
167 InstrSet PHIsInCycle;
168 if (IsSingleValuePHICycle(MI, SingleValReg, PHIsInCycle) &&
171 if (!
MRI->constrainRegClass(SingleValReg,
MRI->getRegClass(OldReg)))
174 MRI->replaceRegWith(OldReg, SingleValReg);
183 if (IsDeadPHICycle(MI, PHIsInCycle)) {
184 for (InstrSetIterator PI = PHIsInCycle.begin(), PE = PHIsInCycle.end();
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
STATISTIC(NumFunctions,"Total number of functions")
static bool isVirtualRegister(unsigned Reg)
Return true if the specified register number is in the virtual register namespace.
void initializeOptimizePHIsPass(PassRegistry &)
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
const HexagonInstrInfo * TII
void eraseFromParent()
Unlink 'this' from the containing basic block and delete it.
unsigned getNumOperands() const
Access to explicit operands of the instruction.
static GCRegistry::Add< CoreCLRGC > E("coreclr","CoreCLR-compatible GC")
TargetInstrInfo - Interface to description of machine instruction set.
unsigned const MachineRegisterInfo * MRI
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
MachineInstrBuilder & UseMI
const MachineOperand & getOperand(unsigned i) const
Represent the analysis usage information of a pass.
unsigned getSubReg() const
SmallPtrSetIterator - This implements a const_iterator for SmallPtrSet.
Iterator for intrusive lists based on ilist_node.
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements...
void setPreservesCFG()
This function should be called by the pass, iff they do not:
char & OptimizePHIsID
OptimizePHIs - This pass optimizes machine instruction PHIs to take advantage of opportunities create...
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
Representation of each machine instruction.
INITIALIZE_PASS(OptimizePHIs,"opt-phis","Optimize machine instruction PHIs", false, false) bool OptimizePHIs
unsigned getReg() const
getReg - Returns the register number.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())