LLVM  4.0.0
MCTargetAsmParser.h
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1 //===-- llvm/MC/MCTargetAsmParser.h - Target Assembly Parser ----*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 
10 #ifndef LLVM_MC_MCPARSER_MCTARGETASMPARSER_H
11 #define LLVM_MC_MCPARSER_MCTARGETASMPARSER_H
12 
13 #include "llvm/MC/MCExpr.h"
16 #include <memory>
17 
18 namespace llvm {
19 class AsmToken;
20 class MCInst;
21 class MCParsedAsmOperand;
22 class MCStreamer;
23 class MCSubtargetInfo;
24 class SMLoc;
25 class StringRef;
26 template <typename T> class SmallVectorImpl;
27 
29 
31  AOK_Delete = 0, // Rewrite should be ignored.
32  AOK_Align, // Rewrite align as .align.
33  AOK_EVEN, // Rewrite even as .even.
34  AOK_DotOperator, // Rewrite a dot operator expression as an immediate.
35  // E.g., [eax].foo.bar -> [eax].8
36  AOK_Emit, // Rewrite _emit as .byte.
37  AOK_Imm, // Rewrite as $$N.
38  AOK_ImmPrefix, // Add $$ before a parsed Imm.
39  AOK_Input, // Rewrite in terms of $N.
40  AOK_Output, // Rewrite in terms of $N.
41  AOK_SizeDirective, // Add a sizing directive (e.g., dword ptr).
42  AOK_Label, // Rewrite local labels.
43  AOK_EndOfStatement, // Add EndOfStatement (e.g., "\n\t").
44  AOK_Skip // Skip emission (e.g., offset/type operators).
45 };
46 
47 const char AsmRewritePrecedence [] = {
48  0, // AOK_Delete
49  2, // AOK_Align
50  2, // AOK_EVEN
51  2, // AOK_DotOperator
52  2, // AOK_Emit
53  4, // AOK_Imm
54  4, // AOK_ImmPrefix
55  3, // AOK_Input
56  3, // AOK_Output
57  5, // AOK_SizeDirective
58  1, // AOK_Label
59  5, // AOK_EndOfStatement
60  2 // AOK_Skip
61 };
62 
63 struct AsmRewrite {
66  unsigned Len;
67  unsigned Val;
69 public:
70  AsmRewrite(AsmRewriteKind kind, SMLoc loc, unsigned len = 0, unsigned val = 0)
71  : Kind(kind), Loc(loc), Len(len), Val(val) {}
72  AsmRewrite(AsmRewriteKind kind, SMLoc loc, unsigned len, StringRef label)
73  : Kind(kind), Loc(loc), Len(len), Val(0), Label(label) {}
74 };
75 
77 
79 
82  : AsmRewrites(rewrites) {}
83 };
84 
86  MatchOperand_Success, // operand matched successfully
87  MatchOperand_NoMatch, // operand did not match
88  MatchOperand_ParseFail // operand matched but had errors
89 };
90 
91 /// MCTargetAsmParser - Generic interface to target specific assembly parsers.
93 public:
100  };
101 
102 private:
103  MCTargetAsmParser(const MCTargetAsmParser &) = delete;
104  void operator=(const MCTargetAsmParser &) = delete;
105 protected: // Can only create subclasses.
107 
108  /// Create a copy of STI and return a non-const reference to it.
110 
111  /// AvailableFeatures - The current set of available features.
113 
114  /// ParsingInlineAsm - Are we parsing ms-style inline assembly?
116 
117  /// SemaCallback - The Sema callback implementation. Must be set when parsing
118  /// ms-style inline assembly.
120 
121  /// Set of options which affects instrumentation of inline assembly.
123 
124  /// Current STI.
126 
127 public:
128  ~MCTargetAsmParser() override;
129 
130  const MCSubtargetInfo &getSTI() const;
131 
132  uint64_t getAvailableFeatures() const { return AvailableFeatures; }
133  void setAvailableFeatures(uint64_t Value) { AvailableFeatures = Value; }
134 
136  void setParsingInlineAsm (bool Value) { ParsingInlineAsm = Value; }
137 
139 
141  SemaCallback = Callback;
142  }
143 
144  virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc,
145  SMLoc &EndLoc) = 0;
146 
147  /// Sets frame register corresponding to the current MachineFunction.
148  virtual void SetFrameRegister(unsigned RegNo) {}
149 
150  /// ParseInstruction - Parse one assembly instruction.
151  ///
152  /// The parser is positioned following the instruction name. The target
153  /// specific instruction parser should parse the entire instruction and
154  /// construct the appropriate MCInst, or emit an error. On success, the entire
155  /// line should be parsed up to and including the end-of-statement token. On
156  /// failure, the parser is not required to read to the end of the line.
157  //
158  /// \param Name - The instruction name.
159  /// \param NameLoc - The source location of the name.
160  /// \param Operands [out] - The list of parsed operands, this returns
161  /// ownership of them to the caller.
162  /// \return True on failure.
164  SMLoc NameLoc, OperandVector &Operands) = 0;
166  AsmToken Token, OperandVector &Operands) {
167  return ParseInstruction(Info, Name, Token.getLoc(), Operands);
168  }
169 
170  /// ParseDirective - Parse a target specific assembler directive
171  ///
172  /// The parser is positioned following the directive name. The target
173  /// specific directive parser should parse the entire directive doing or
174  /// recording any target specific work, or return true and do nothing if the
175  /// directive is not target specific. If the directive is specific for
176  /// the target, the entire line is parsed up to and including the
177  /// end-of-statement token and false is returned.
178  ///
179  /// \param DirectiveID - the identifier token of the directive.
180  virtual bool ParseDirective(AsmToken DirectiveID) = 0;
181 
182  /// MatchAndEmitInstruction - Recognize a series of operands of a parsed
183  /// instruction as an actual MCInst and emit it to the specified MCStreamer.
184  /// This returns false on success and returns true on failure to match.
185  ///
186  /// On failure, the target parser is responsible for emitting a diagnostic
187  /// explaining the match failure.
188  virtual bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
189  OperandVector &Operands, MCStreamer &Out,
190  uint64_t &ErrorInfo,
191  bool MatchingInlineAsm) = 0;
192 
193  /// Allows targets to let registers opt out of clobber lists.
194  virtual bool OmitRegisterFromClobberLists(unsigned RegNo) { return false; }
195 
196  /// Allow a target to add special case operand matching for things that
197  /// tblgen doesn't/can't handle effectively. For example, literal
198  /// immediates on ARM. TableGen expects a token operand, but the parser
199  /// will recognize them as immediates.
201  unsigned Kind) {
202  return Match_InvalidOperand;
203  }
204 
205  /// Validate the instruction match against any complex target predicates
206  /// before rendering any operands to it.
207  virtual unsigned
209  return Match_Success;
210  }
211 
212  /// checkTargetMatchPredicate - Validate the instruction match against
213  /// any complex target predicates not expressible via match classes.
214  virtual unsigned checkTargetMatchPredicate(MCInst &Inst) {
215  return Match_Success;
216  }
217 
218  virtual void convertToMapAndConstraints(unsigned Kind,
219  const OperandVector &Operands) = 0;
220 
221  // Return whether this parser uses assignment statements with equals tokens
222  virtual bool equalIsAsmAssignment() { return true; };
223  // Return whether this start of statement identifier is a label
224  virtual bool isLabel(AsmToken &Token) { return true; };
225 
226  virtual const MCExpr *applyModifierToExpr(const MCExpr *E,
228  MCContext &Ctx) {
229  return nullptr;
230  }
231 
232  virtual void onLabelParsed(MCSymbol *Symbol) { }
233 
234  /// Ensure that all previously parsed instructions have been emitted to the
235  /// output streamer, if the target does not emit them immediately.
236  virtual void flushPendingInstructions(MCStreamer &Out) { }
237 
238  virtual const MCExpr *createTargetUnaryExpr(const MCExpr *E,
239  AsmToken::TokenKind OperatorToken,
240  MCContext &Ctx) {
241  return nullptr;
242  }
243 };
244 
245 } // End llvm namespace
246 
247 #endif
virtual bool isLabel(AsmToken &Token)
uint64_t Token
MCAsmParserSemaCallback * SemaCallback
SemaCallback - The Sema callback implementation.
SmallVectorImpl< AsmRewrite > * AsmRewrites
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:39
virtual unsigned checkEarlyTargetMatchPredicate(MCInst &Inst, const OperandVector &Operands)
Validate the instruction match against any complex target predicates before rendering any operands to...
MCTargetAsmParser - Generic interface to target specific assembly parsers.
const MCSubtargetInfo * STI
Current STI.
ParseInstructionInfo(SmallVectorImpl< AsmRewrite > *rewrites)
OperandMatchResultTy
virtual void onLabelParsed(MCSymbol *Symbol)
AsmRewrite(AsmRewriteKind kind, SMLoc loc, unsigned len, StringRef label)
MCTargetOptions MCOptions
Set of options which affects instrumentation of inline assembly.
virtual unsigned validateTargetOperandClass(MCParsedAsmOperand &Op, unsigned Kind)
Allow a target to add special case operand matching for things that tblgen doesn't/can't handle effec...
virtual void convertToMapAndConstraints(unsigned Kind, const OperandVector &Operands)=0
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:32
Base class for the full range of assembler expressions which are needed for parsing.
Definition: MCExpr.h:34
virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc)=0
Target independent representation for an assembler token.
Definition: MCAsmLexer.h:25
MCParsedAsmOperand - This abstract class represents a source-level assembly instruction operand...
Context object for machine code objects.
Definition: MCContext.h:51
uint64_t getAvailableFeatures() const
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:150
virtual void SetFrameRegister(unsigned RegNo)
Sets frame register corresponding to the current MachineFunction.
static GCRegistry::Add< CoreCLRGC > E("coreclr","CoreCLR-compatible GC")
const MCSubtargetInfo & getSTI() const
Streaming machine code generation interface.
Definition: MCStreamer.h:161
virtual bool OmitRegisterFromClobberLists(unsigned RegNo)
Allows targets to let registers opt out of clobber lists.
uint64_t AvailableFeatures
AvailableFeatures - The current set of available features.
SMLoc getLoc() const
Definition: MCAsmLexer.cpp:28
void setSemaCallback(MCAsmParserSemaCallback *Callback)
virtual unsigned checkTargetMatchPredicate(MCInst &Inst)
checkTargetMatchPredicate - Validate the instruction match against any complex target predicates not ...
void setParsingInlineAsm(bool Value)
Generic Sema callback for assembly parser.
Definition: MCAsmParser.h:51
virtual bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name, AsmToken Token, OperandVector &Operands)
virtual bool equalIsAsmAssignment()
virtual const MCExpr * createTargetUnaryExpr(const MCExpr *E, AsmToken::TokenKind OperatorToken, MCContext &Ctx)
Base class for user error types.
void setAvailableFeatures(uint64_t Value)
virtual bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name, SMLoc NameLoc, OperandVector &Operands)=0
ParseInstruction - Parse one assembly instruction.
AsmRewrite(AsmRewriteKind kind, SMLoc loc, unsigned len=0, unsigned val=0)
bool ParsingInlineAsm
ParsingInlineAsm - Are we parsing ms-style inline assembly?
virtual bool ParseDirective(AsmToken DirectiveID)=0
ParseDirective - Parse a target specific assembler directive.
MCSubtargetInfo - Generic base class for all target subtargets.
virtual const MCExpr * applyModifierToExpr(const MCExpr *E, MCSymbolRefExpr::VariantKind, MCContext &Ctx)
const unsigned Kind
MCTargetOptions getTargetOptions() const
SmallVectorImpl< std::unique_ptr< MCParsedAsmOperand > > OperandVector
MCSubtargetInfo & copySTI()
Create a copy of STI and return a non-const reference to it.
virtual void flushPendingInstructions(MCStreamer &Out)
Ensure that all previously parsed instructions have been emitted to the output streamer, if the target does not emit them immediately.
Generic interface for extending the MCAsmParser, which is implemented by target and object file assem...
const char AsmRewritePrecedence[]
LLVM Value Representation.
Definition: Value.h:71
AsmRewriteKind Kind
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:47
Represents a location in source code.
Definition: SMLoc.h:24
virtual bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, OperandVector &Operands, MCStreamer &Out, uint64_t &ErrorInfo, bool MatchingInlineAsm)=0
MatchAndEmitInstruction - Recognize a series of operands of a parsed instruction as an actual MCInst ...