| AMDGPUSubtarget(const Triple &TT, StringRef GPU, StringRef FS, const TargetMachine &TM) | llvm::AMDGPUSubtarget | |
| CaymanISA | llvm::AMDGPUSubtarget | protected |
| CFALUBug | llvm::AMDGPUSubtarget | protected |
| CIInsts | llvm::AMDGPUSubtarget | protected |
| debuggerEmitPrologue() const | llvm::SISubtarget | inline |
| DebuggerEmitPrologue | llvm::AMDGPUSubtarget | protected |
| debuggerInsertNops() const | llvm::SISubtarget | inline |
| DebuggerInsertNops | llvm::AMDGPUSubtarget | protected |
| debuggerReserveRegs() const | llvm::SISubtarget | inline |
| DebuggerReserveRegs | llvm::AMDGPUSubtarget | protected |
| debuggerSupported() const | llvm::SISubtarget | inline |
| DumpCode | llvm::AMDGPUSubtarget | protected |
| dumpCode() const | llvm::AMDGPUSubtarget | inline |
| enableIEEEBit(const MachineFunction &MF) const | llvm::AMDGPUSubtarget | inline |
| EnableLoadStoreOpt | llvm::AMDGPUSubtarget | protected |
| enableMachineScheduler() const override | llvm::AMDGPUSubtarget | inline |
| EnablePromoteAlloca | llvm::AMDGPUSubtarget | protected |
| enableSIScheduler() const | llvm::SISubtarget | inline |
| EnableSIScheduler | llvm::AMDGPUSubtarget | protected |
| enableSubRegLiveness() const override | llvm::AMDGPUSubtarget | inline |
| EnableUnsafeDSOffsetFolding | llvm::AMDGPUSubtarget | protected |
| EnableVGPRSpilling | llvm::AMDGPUSubtarget | protected |
| EnableXNACK | llvm::AMDGPUSubtarget | protected |
| EVERGREEN enum value | llvm::AMDGPUSubtarget | |
| FastFMAF32 | llvm::AMDGPUSubtarget | protected |
| FeatureDisable | llvm::AMDGPUSubtarget | protected |
| FIXED_SGPR_COUNT_FOR_INIT_BUG enum value | llvm::SISubtarget | |
| FlatAddressSpace | llvm::AMDGPUSubtarget | protected |
| FlatForGlobal | llvm::AMDGPUSubtarget | protected |
| FP16Denormals | llvm::AMDGPUSubtarget | protected |
| FP32Denormals | llvm::AMDGPUSubtarget | protected |
| FP64 | llvm::AMDGPUSubtarget | protected |
| FP64Denormals | llvm::AMDGPUSubtarget | protected |
| FPExceptions | llvm::AMDGPUSubtarget | protected |
| GCN1Encoding | llvm::AMDGPUSubtarget | protected |
| GCN3Encoding | llvm::AMDGPUSubtarget | protected |
| Gen | llvm::AMDGPUSubtarget | protected |
| Generation enum name | llvm::AMDGPUSubtarget | |
| getAlignmentForImplicitArgPtr() const | llvm::AMDGPUSubtarget | inline |
| getCallLowering() const override | llvm::SISubtarget | inline |
| getEUsPerCU() const | llvm::AMDGPUSubtarget | inline |
| getExplicitKernelArgOffset(const MachineFunction &MF) const | llvm::AMDGPUSubtarget | inline |
| getFlatWorkGroupSizes(const Function &F) const | llvm::AMDGPUSubtarget | |
| getFrameLowering() const override | llvm::SISubtarget | inlinevirtual |
| getGeneration() const | llvm::AMDGPUSubtarget | inline |
| getImplicitArgNumBytes(const MachineFunction &MF) const | llvm::AMDGPUSubtarget | inline |
| getInstrInfo() const override | llvm::SISubtarget | inlinevirtual |
| getInstrItineraryData() const override | llvm::AMDGPUSubtarget | inline |
| getKernArgSegmentSize(const MachineFunction &MF, unsigned ExplictArgBytes) const | llvm::SISubtarget | |
| getLDSBankCount() const | llvm::AMDGPUSubtarget | inline |
| getLocalMemorySize() const | llvm::AMDGPUSubtarget | inline |
| getMaxFlatWorkGroupSize() const | llvm::AMDGPUSubtarget | inline |
| getMaxLocalMemSizeWithWaveCount(unsigned WaveCount) const | llvm::AMDGPUSubtarget | |
| getMaxNumSGPRs() const | llvm::SISubtarget | |
| getMaxNumUserSGPRs() const | llvm::SISubtarget | inline |
| getMaxPrivateElementSize() const | llvm::AMDGPUSubtarget | inline |
| getMaxWavesPerCU() const | llvm::AMDGPUSubtarget | inline |
| getMaxWavesPerCU(unsigned FlatWorkGroupSize) const | llvm::AMDGPUSubtarget | inline |
| getMaxWavesPerEU() const | llvm::AMDGPUSubtarget | inline |
| getMaxWavesPerEU(unsigned FlatWorkGroupSize) const | llvm::AMDGPUSubtarget | inline |
| getMaxWorkGroupsPerCU(unsigned FlatWorkGroupSize) const | llvm::AMDGPUSubtarget | inline |
| getMinFlatWorkGroupSize() const | llvm::AMDGPUSubtarget | inline |
| getMinWavesPerEU() const | llvm::AMDGPUSubtarget | inline |
| getOccupancyWithLocalMemSize(uint32_t Bytes) const | llvm::AMDGPUSubtarget | |
| getOccupancyWithNumSGPRs(unsigned SGPRs) const | llvm::SISubtarget | |
| getOccupancyWithNumVGPRs(unsigned VGPRs) const | llvm::SISubtarget | |
| getRegisterInfo() const override | llvm::SISubtarget | inlinevirtual |
| getScalarizeGlobalBehavior() const | llvm::AMDGPUSubtarget | inline |
| getSelectionDAGInfo() const override | llvm::AMDGPUSubtarget | inline |
| getStackAlignment() const | llvm::AMDGPUSubtarget | inline |
| getTargetLowering() const override | llvm::SISubtarget | inlinevirtual |
| getWavefrontSize() const | llvm::AMDGPUSubtarget | inline |
| getWavesPerEU(const Function &F) const | llvm::AMDGPUSubtarget | |
| getWavesPerWorkGroup(unsigned FlatWorkGroupSize) const | llvm::AMDGPUSubtarget | inline |
| HalfRate64Ops | llvm::AMDGPUSubtarget | protected |
| has12DWordStoreHazard() const | llvm::SISubtarget | inline |
| Has16BitInsts | llvm::AMDGPUSubtarget | protected |
| has16BitInsts() const | llvm::AMDGPUSubtarget | inline |
| hasAddr64() const | llvm::AMDGPUSubtarget | inline |
| hasBCNT(unsigned Size) const | llvm::AMDGPUSubtarget | inline |
| hasBFE() const | llvm::AMDGPUSubtarget | inline |
| hasBFI() const | llvm::AMDGPUSubtarget | inline |
| hasBFM() const | llvm::AMDGPUSubtarget | inline |
| hasBORROW() const | llvm::AMDGPUSubtarget | inline |
| hasCARRY() const | llvm::AMDGPUSubtarget | inline |
| hasCaymanISA() const | llvm::AMDGPUSubtarget | inline |
| hasFastFMAF32() const | llvm::AMDGPUSubtarget | inline |
| hasFFBH() const | llvm::AMDGPUSubtarget | inline |
| hasFFBL() const | llvm::AMDGPUSubtarget | inline |
| hasFlatAddressSpace() const | llvm::SISubtarget | inline |
| hasFP16Denormals() const | llvm::AMDGPUSubtarget | inline |
| hasFP32Denormals() const | llvm::AMDGPUSubtarget | inline |
| hasFP64Denormals() const | llvm::AMDGPUSubtarget | inline |
| hasFPExceptions() const | llvm::AMDGPUSubtarget | inline |
| hasHalfRate64Ops() const | llvm::AMDGPUSubtarget | inline |
| hasHWFP64() const | llvm::AMDGPUSubtarget | inline |
| hasInv2PiInlineImm() const | llvm::SISubtarget | inline |
| HasInv2PiInlineImm | llvm::AMDGPUSubtarget | protected |
| HasMovrel | llvm::AMDGPUSubtarget | protected |
| hasMovrel() const | llvm::SISubtarget | inline |
| hasMulI24() const | llvm::AMDGPUSubtarget | inline |
| hasMulU24() const | llvm::AMDGPUSubtarget | inline |
| hasScalarCompareEq64() const | llvm::SISubtarget | inline |
| hasScalarStores() const | llvm::SISubtarget | inline |
| HasScalarStores | llvm::AMDGPUSubtarget | protected |
| hasSGPRInitBug() const | llvm::SISubtarget | inline |
| hasSMemRealTime() const | llvm::SISubtarget | inline |
| HasSMemRealTime | llvm::AMDGPUSubtarget | protected |
| hasUnalignedBufferAccess() const | llvm::AMDGPUSubtarget | inline |
| hasUnalignedScratchAccess() const | llvm::AMDGPUSubtarget | inline |
| HasVertexCache | llvm::AMDGPUSubtarget | protected |
| HasVGPRIndexMode | llvm::AMDGPUSubtarget | protected |
| hasVGPRIndexMode() const | llvm::SISubtarget | inline |
| initializeSubtargetDependencies(const Triple &TT, StringRef GPU, StringRef FS) | llvm::AMDGPUSubtarget | |
| InstrItins | llvm::AMDGPUSubtarget | protected |
| isAmdCodeObjectV2(const MachineFunction &MF) const | llvm::AMDGPUSubtarget | inline |
| isAmdHsaOS() const | llvm::AMDGPUSubtarget | inline |
| IsaVersion | llvm::AMDGPUSubtarget | protected |
| ISAVersion0_0_0 enum value | llvm::AMDGPUSubtarget | |
| ISAVersion7_0_0 enum value | llvm::AMDGPUSubtarget | |
| ISAVersion7_0_1 enum value | llvm::AMDGPUSubtarget | |
| ISAVersion7_0_2 enum value | llvm::AMDGPUSubtarget | |
| ISAVersion8_0_0 enum value | llvm::AMDGPUSubtarget | |
| ISAVersion8_0_1 enum value | llvm::AMDGPUSubtarget | |
| ISAVersion8_0_2 enum value | llvm::AMDGPUSubtarget | |
| ISAVersion8_0_3 enum value | llvm::AMDGPUSubtarget | |
| ISAVersion8_0_4 enum value | llvm::AMDGPUSubtarget | |
| ISAVersion8_1_0 enum value | llvm::AMDGPUSubtarget | |
| IsGCN | llvm::AMDGPUSubtarget | protected |
| isMesa3DOS() const | llvm::AMDGPUSubtarget | inline |
| isMesaGfxShader(const MachineFunction &MF) const | llvm::AMDGPUSubtarget | inline |
| isMesaKernel(const MachineFunction &MF) const | llvm::AMDGPUSubtarget | inline |
| isOpenCLEnv() const | llvm::AMDGPUSubtarget | inline |
| isPromoteAllocaEnabled() const | llvm::AMDGPUSubtarget | inline |
| isVGPRSpillingEnabled(const Function &F) const | llvm::SISubtarget | |
| isXNACKEnabled() const | llvm::AMDGPUSubtarget | inline |
| LDSBankCount | llvm::AMDGPUSubtarget | protected |
| loadStoreOptEnabled() const | llvm::SISubtarget | inline |
| LocalMemorySize | llvm::AMDGPUSubtarget | protected |
| MaxPrivateElementSize | llvm::AMDGPUSubtarget | protected |
| needWaitcntBeforeBarrier() const | llvm::SISubtarget | inline |
| NORTHERN_ISLANDS enum value | llvm::AMDGPUSubtarget | |
| overrideSchedPolicy(MachineSchedPolicy &Policy, unsigned NumRegionInstrs) const override | llvm::SISubtarget | |
| ParseSubtargetFeatures(StringRef CPU, StringRef FS) | llvm::AMDGPUSubtarget | |
| R600 enum value | llvm::AMDGPUSubtarget | |
| R600ALUInst | llvm::AMDGPUSubtarget | protected |
| R700 enum value | llvm::AMDGPUSubtarget | |
| ScalarizeGlobal | llvm::AMDGPUSubtarget | protected |
| SEA_ISLANDS enum value | llvm::AMDGPUSubtarget | |
| setGISelAccessor(GISelAccessor &GISel) | llvm::SISubtarget | inline |
| setScalarizeGlobalBehavior(bool b) | llvm::AMDGPUSubtarget | inline |
| SGPRInitBug | llvm::AMDGPUSubtarget | protected |
| SISubtarget(const Triple &TT, StringRef CPU, StringRef FS, const TargetMachine &TM) | llvm::SISubtarget | |
| SOUTHERN_ISLANDS enum value | llvm::AMDGPUSubtarget | |
| TargetTriple | llvm::AMDGPUSubtarget | protected |
| TexVTXClauseSize | llvm::AMDGPUSubtarget | protected |
| TSInfo | llvm::AMDGPUSubtarget | protected |
| UnalignedBufferAccess | llvm::AMDGPUSubtarget | protected |
| UnalignedScratchAccess | llvm::AMDGPUSubtarget | protected |
| unsafeDSOffsetFoldingEnabled() const | llvm::AMDGPUSubtarget | inline |
| useFlatForGlobal() const | llvm::AMDGPUSubtarget | inline |
| VOLCANIC_ISLANDS enum value | llvm::AMDGPUSubtarget | |
| WavefrontSize | llvm::AMDGPUSubtarget | protected |
| ~AMDGPUSubtarget() override | llvm::AMDGPUSubtarget | |