55 #define DEBUG_TYPE "lanai-lower"
69 cl::desc(
"Maximum number of instruction to generate when lowering constant "
70 "multiplication instead of calling library function [default=14]"),
223 .
Case(
"sp", Lanai::SP)
224 .
Case(
"fp", Lanai::FP)
225 .
Case(
"rr1", Lanai::RR1)
226 .
Case(
"r10", Lanai::R10)
227 .
Case(
"rr2", Lanai::RR2)
228 .
Case(
"r11", Lanai::R11)
229 .
Case(
"rca", Lanai::RCA)
237 std::pair<unsigned, const TargetRegisterClass *>
241 if (Constraint.
size() == 1)
243 switch (Constraint[0]) {
245 return std::make_pair(0U, &Lanai::GPRRegClass);
263 if (CallOperandVal ==
nullptr)
266 switch (*Constraint) {
274 if (isa<ConstantInt>(CallOperandVal))
287 SDValue Op, std::string &Constraint, std::vector<SDValue> &Ops,
292 if (Constraint.length() > 1)
295 char ConstraintLetter = Constraint[0];
296 switch (ConstraintLetter) {
310 if (
C->getZExtValue() == 0) {
327 if (
C->getZExtValue() <= 31) {
336 int64_t Val =
C->getSExtValue();
337 if ((
isInt<32>(Val)) && ((Val & 0xffff) == 0)) {
345 int64_t Val =
C->getSExtValue();
346 if ((Val >= -33554432) && (Val <= 33554431)) {
357 Ops.push_back(Result);
368 #include "LanaiGenCallingConv.inc"
378 return CC_Lanai32(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State);
386 else if (ArgFlags.
isZExt())
398 SDValue LanaiTargetLowering::LowerFormalArguments(
405 return LowerCCCArguments(Chain, CallConv, IsVarArg, Ins, DL, DAG, InVals);
430 return LowerCCCCallTo(Chain, Callee, CallConv, IsVarArg, IsTailCall, Outs,
431 OutVals, Ins, DL, DAG, InVals);
439 SDValue LanaiTargetLowering::LowerCCCArguments(
455 CCInfo.AnalyzeFormalArguments(Ins, CC_Lanai32);
458 for (
unsigned i = 0, e = ArgLocs.size();
i != e; ++
i) {
486 DEBUG(
dbgs() <<
"LowerFormalArguments Unhandled argument type: "
497 errs() <<
"LowerFormalArguments Unhandled argument type: "
555 for (
unsigned i = 0;
i != RVLocs.
size(); ++
i) {
575 "SRetReturnReg should have been set in LowerFormalArguments().");
579 Chain = DAG.
getCopyToReg(Chain, DL, Lanai::RV, Val, Flag);
589 RetOps.push_back(Flag);
598 SDValue LanaiTargetLowering::LowerCCCCallTo(
621 CCInfo.AnalyzeCallOperands(Outs, CC_Lanai32_Fast);
623 CCInfo.AnalyzeCallOperands(Outs, CC_Lanai32);
627 unsigned NumBytes = CCInfo.getNextStackOffset();
631 for (
unsigned I = 0,
E = Outs.
size();
I !=
E; ++
I) {
640 int FI = MFI.CreateStackObject(Size, Align,
false);
644 Chain = DAG.
getMemcpy(Chain, DL, FIPtr, Arg, SizeNode, Align,
662 for (
unsigned I = 0, J = 0,
E = ArgLocs.
size();
I !=
E; ++
I) {
686 Arg = ByValArgs[J++];
695 if (StackPtr.
getNode() ==
nullptr)
710 if (!MemOpChains.
empty())
719 for (
unsigned I = 0,
E = RegsToPass.
size();
I !=
E; ++
I) {
721 RegsToPass[
I].second, InFlag);
747 assert(Mask &&
"Missing call preserved mask for calling convention");
752 for (
unsigned I = 0,
E = RegsToPass.
size();
I !=
E; ++
I)
754 RegsToPass[I].second.getValueType()));
773 return LowerCallResult(Chain, InFlag, CallConv, IsVarArg, Ins, DL, DAG,
779 SDValue LanaiTargetLowering::LowerCallResult(
791 for (
unsigned I = 0; I != RVLocs.
size(); ++
I) {
793 RVLocs[I].getValVT(), InFlag)
814 switch (SetCCOpcode) {
819 if (RHSC->getZExtValue() == 0xFFFFFFFF) {
829 if (RHSC->getZExtValue() == 0)
837 if (RHSC->getZExtValue() == 0xFFFFFFFF) {
847 if (RHSC->getZExtValue() == 0)
898 int32_t HighestOne = -1;
900 int SignedDigit[32] = {0};
912 int S = (MulAmt < 0 ? -1 : 1);
921 SignedDigit[
I] = S * ZI;
922 if (SignedDigit[I] == 1)
933 int32_t InstrRequired = 2 * NonzeroEntries - 1;
948 if (HighestOne == -1)
953 SignedDigit[HighestOne] = 0;
958 for (
unsigned int I = 0; I <
sizeof(SignedDigit) /
sizeof(SignedDigit[0]);
960 if (SignedDigit[I] == 0)
966 if (SignedDigit[I] == 1)
968 else if (SignedDigit[I] == -1)
1066 SDValue Ops[2] = {ArgAdjust, CopyChain};
1078 unsigned Depth = cast<ConstantSDNode>(Op.
getOperand(0))->getZExtValue();
1081 const unsigned Offset = -4;
1101 unsigned Depth = cast<ConstantSDNode>(Op.
getOperand(0))->getZExtValue();
1103 const unsigned Offset = -8;
1115 return "LanaiISD::ADJDYNALLOC";
1117 return "LanaiISD::RET_FLAG";
1119 return "LanaiISD::CALL";
1121 return "LanaiISD::SELECT_CC";
1123 return "LanaiISD::SETCC";
1125 return "LanaiISD::SUBBF";
1127 return "LanaiISD::SET_FLAG";
1129 return "LanaiISD::BR_CC";
1131 return "LanaiISD::Wrapper";
1133 return "LanaiISD::HI";
1135 return "LanaiISD::LO";
1137 return "LanaiISD::SMALL";
1179 const GlobalValue *GV = cast<GlobalAddressSDNode>(
Op)->getGlobal();
1213 const BlockAddress *BA = cast<BlockAddressSDNode>(
Op)->getBlockAddress();
1366 bool &Invert,
SDValue &OtherOp,
1445 NonConstantVal, DAG))
MVT getSimpleValueType() const
Return the simple ValueType of the referenced return value.
SDValue getStore(SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr, MachinePointerInfo PtrInfo, unsigned Alignment=0, MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const AAMDNodes &AAInfo=AAMDNodes())
Helper function to build ISD::STORE nodes.
SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const
void setFrameAddressIsTaken(bool T)
void AnalyzeCallResult(const SmallVectorImpl< ISD::InputArg > &Ins, CCAssignFn Fn)
AnalyzeCallResult - Analyze the return values of a call, incorporating info about the passed values i...
void push_back(const T &Elt)
SDValue getValue(unsigned R) const
void setVarArgsFrameIndex(int Index)
void setLoadExtAction(unsigned ExtType, MVT ValVT, MVT MemVT, LegalizeAction Action)
Indicate that the specified load with extension does not work with the specified type and indicate wh...
raw_ostream & errs()
This returns a reference to a raw_ostream for standard error.
static APInt getAllOnesValue(unsigned numBits)
Get the all-ones value.
LLVMContext * getContext() const
SDValue getSetCC(const SDLoc &DL, EVT VT, SDValue LHS, SDValue RHS, ISD::CondCode Cond)
Helper function to make it easier to build SetCC's if you just have an ISD::CondCode instead of an SD...
void setMinimumJumpTableEntries(unsigned Val)
Indicate the minimum number of blocks to generate jump tables.
SDValue getCALLSEQ_END(SDValue Chain, SDValue Op1, SDValue Op2, SDValue InGlue, const SDLoc &DL)
Return a new CALLSEQ_END node, which always must have a glue result (to ensure it's not CSE'd)...
SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const
const char * getTargetNodeName(unsigned Opcode) const override
This method returns the name of a target specific DAG node.
LLVM_ATTRIBUTE_NORETURN void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
BR_CC - Conditional branch.
LocInfo getLocInfo() const
bool hasOneUse() const
Return true if there is exactly one use of this node.
unsigned getNumParams() const
Return the number of fixed parameters this function type requires.
const TargetMachine & getTargetMachine() const
unsigned createVirtualRegister(const TargetRegisterClass *RegClass)
createVirtualRegister - Create and return a new virtual register in the function with the specified r...
void addLiveIn(unsigned Reg, unsigned vreg=0)
addLiveIn - Add the specified register as a live-in.
unsigned addLiveIn(unsigned PReg, const TargetRegisterClass *RC)
addLiveIn - Add the specified physical register as a live-in value and create a corresponding virtual...
void AnalyzeFormalArguments(const SmallVectorImpl< ISD::InputArg > &Ins, CCAssignFn Fn)
AnalyzeFormalArguments - Analyze an array of argument values, incorporating info about the formals in...
const uint32_t * getCallPreservedMask(const MachineFunction &MF, CallingConv::ID) const override
SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override
This method will be invoked for all target nodes and for any target-independent nodes that the target...
STACKRESTORE has two operands, an input chain and a pointer to restore to it returns an output chain...
unsigned getOpcode() const
Return the SelectionDAG opcode value for this node.
unsigned getSizeInBits() const
unsigned getByValSize() const
SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG) const
unsigned getNumOperands() const
constexpr bool isInt< 16 >(int64_t x)
const SDValue & getOperand(unsigned Num) const
const Function * getFunction() const
getFunction - Return the LLVM function that this machine code represents
SDValue getSelect(const SDLoc &DL, EVT VT, SDValue Cond, SDValue LHS, SDValue RHS)
Helper function to make it easier to build Select's if you just have operands and don't want to check...
SDValue getTargetExternalSymbol(const char *Sym, EVT VT, unsigned char TargetFlags=0)
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, ArrayRef< SDUse > Ops)
Gets or creates the specified node.
Value * CallOperandVal
If this is the result output operand or a clobber, this is null, otherwise it is the incoming operand...
static SDValue PerformSUBCombine(SDNode *N, TargetLowering::DAGCombinerInfo &DCI)
SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG) const
Select with condition operator - This selects between a true value and a false value (ops #2 and #3) ...
SDIVREM/UDIVREM - Divide two integers and produce both a quotient and remainder result.
SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded integer shift operations...
SDValue getIntPtrConstant(uint64_t Val, const SDLoc &DL, bool isTarget=false)
The address of a basic block.
std::string getEVTString() const
getEVTString - This function returns value type as a string, e.g.
struct fuzzer::@269 Flags
Shift and rotation operations.
static SDValue combineSelectAndUseCommutative(SDNode *N, TargetLowering::DAGCombinerInfo &DCI, bool AllOnes)
EVT getValueType(unsigned ResNo) const
Return the type of a specified result.
MachineFunction & getMachineFunction() const
virtual TargetLoweringObjectFile * getObjFileLowering() const
void addLoc(const CCValAssign &V)
LLVM_ATTRIBUTE_ALWAYS_INLINE R Default(const T &Value) const
Reg
All possible values of the reg field in the ModR/M byte.
ConstraintWeight getSingleConstraintMatchWeight(AsmOperandInfo &Info, const char *Constraint) const override
Examine constraint string and operand type and determine a weight value.
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted...
void setOperationAction(unsigned Op, MVT VT, LegalizeAction Action)
Indicate that the specified operation does not work with the specified type and indicate what to do a...
SDVTList getVTList(EVT VT)
Return an SDVTList that represents the list of values specified.
FRAMEADDR, RETURNADDR - These nodes represent llvm.frameaddress and llvm.returnaddress on the DAG...
void setJumpIsExpensive(bool isExpensive=true)
Tells the code generator not to expand logic operations on comparison predicates into separate sequen...
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
This file implements a class to represent arbitrary precision integral constant values and operations...
This represents a list of ValueType's that has been intern'd by a SelectionDAG.
LLVM_NODISCARD bool empty() const
SmallVector< ISD::InputArg, 32 > Ins
STACKSAVE - STACKSAVE has one operand, an input chain.
SDValue getMergeValues(ArrayRef< SDValue > Ops, const SDLoc &dl)
Create a MERGE_VALUES node from the given operands.
LLVM_ATTRIBUTE_ALWAYS_INLINE StringSwitch & Case(const char(&S)[N], const T &Value)
unsigned getLocReg() const
void computeRegisterProperties(const TargetRegisterInfo *TRI)
Once all of the register classes are added, this allows us to compute derived properties we expose...
SDValue getRegisterMask(const uint32_t *RegMask)
bool hasStructRetAttr() const
Determine if the function returns a structure through first pointer argument.
unsigned getRARegister() const
LanaiTargetLowering(const TargetMachine &TM, const LanaiSubtarget &STI)
This contains information for each constraint that we are lowering.
Simple integer binary arithmetic operators.
SmallVector< ISD::OutputArg, 32 > Outs
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory)...
static bool isConditionalZeroOrAllOnes(SDNode *N, bool AllOnes, SDValue &CC, bool &Invert, SDValue &OtherOp, SelectionDAG &DAG)
SDValue LowerSETCCE(SDValue Op, SelectionDAG &DAG) const
CondCode
ISD::CondCode enum - These are ordered carefully to make the bitfields below work out...
static Error getOffset(const SymbolRef &Sym, SectionRef Sec, uint64_t &Result)
int getVarArgsFrameIndex() const
SDValue getTargetConstant(uint64_t Val, const SDLoc &DL, EVT VT, bool isOpaque=false)
SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override
This callback is invoked for operations that are unsupported by the target, which are registered to u...
LLVM_NODISCARD LLVM_ATTRIBUTE_ALWAYS_INLINE size_t size() const
size - Get the string size.
const DataLayout & getDataLayout() const
static GCRegistry::Add< CoreCLRGC > E("coreclr","CoreCLR-compatible GC")
Flag
These should be considered private to the implementation of the MCInstrDesc class.
SDNode * getNode() const
get the SDNode which holds the desired result
A switch()-like statement whose cases are string literals.
initializer< Ty > init(const Ty &Val)
CodeModel::Model getCodeModel() const
Returns the code model.
MVT - Machine Value Type.
const SDValue & getOperand(unsigned i) const
void addRegisterClass(MVT VT, const TargetRegisterClass *RC)
Add the specified register class as an available regclass for the specified value type...
void setTargetDAGCombine(ISD::NodeType NT)
Targets should invoke this method for each target independent node that they want to provide a custom...
C - The default llvm calling convention, compatible with C.
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
This is an important base class in LLVM.
VAEND, VASTART - VAEND and VASTART have three operands: an input chain, pointer, and a SRCVALUE...
const Constant * getConstVal() const
void setBooleanContents(BooleanContent Ty)
Specify how the target extends the result of integer and floating point boolean values from i1 to a w...
void LowerAsmOperandForConstraint(SDValue Op, std::string &Constraint, std::vector< SDValue > &Ops, SelectionDAG &DAG) const override
Lower the specified operand into the Ops vector.
SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const
virtual std::pair< unsigned, const TargetRegisterClass * > getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI, StringRef Constraint, MVT VT) const
Given a physical register constraint (e.g.
unsigned getSRetReturnReg() const
static bool isZeroOrAllOnes(SDValue N, bool AllOnes)
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
unsigned getOpcode() const
AssertSext, AssertZext - These nodes record if a register contains a value that has already been zero...
void setPrefFunctionAlignment(unsigned Align)
Set the target's preferred function alignment.
int CreateFixedObject(uint64_t Size, int64_t SPOffset, bool Immutable, bool isAliased=false)
Create a new object at a fixed location on the stack.
VAARG - VAARG has four operands: an input chain, a pointer, a SRCVALUE, and the alignment.
unsigned MaxStoresPerMemmove
Specify maximum bytes of store instructions per memmove call.
static LPCC::CondCode IntCondCCodeToICC(SDValue CC, const SDLoc &DL, SDValue &RHS, SelectionDAG &DAG)
unsigned getStackPointerRegisterToSaveRestore() const
If a physical register, this specifies the register that llvm.savestack/llvm.restorestack should save...
static unsigned NumFixedArgs
EVT - Extended Value Type.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG) const
This structure contains all information that is necessary for lowering calls.
SDValue LowerMUL(SDValue Op, SelectionDAG &DAG) const
This class contains a discriminated union of information about pointers in memory operands...
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
void setLibcallCallingConv(RTLIB::Libcall Call, CallingConv::ID CC)
Set the CallingConv that should be used for the specified libcall.
SDValue getLoad(EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr, MachinePointerInfo PtrInfo, unsigned Alignment=0, MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr)
Loads are not normal binary operators: their result type is not determined by their operands...
static cl::opt< int > LanaiLowerConstantMulThreshold("lanai-constant-mul-threshold", cl::Hidden, cl::desc("Maximum number of instruction to generate when lowering constant ""multiplication instead of calling library function [default=14]"), cl::init(14))
unsigned getByValAlign() const
SDValue getTargetConstantPool(const Constant *C, EVT VT, unsigned Align=0, int Offset=0, unsigned char TargetFlags=0)
SDValue getTargetJumpTable(int JTI, EVT VT, unsigned char TargetFlags=0)
TokenFactor - This node takes multiple tokens as input and produces a single token result...
CCState - This class holds information needed while lowering arguments and return values...
SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const
constexpr bool isInt< 32 >(int64_t x)
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
SDValue LowerSRL_PARTS(SDValue Op, SelectionDAG &DAG) const
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small...
CCValAssign - Represent assignment of one arg/retval to a location.
SDValue LowerSHL_PARTS(SDValue Op, SelectionDAG &DAG) const
SDValue getMemcpy(SDValue Chain, const SDLoc &dl, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, bool isVol, bool AlwaysInline, bool isTailCall, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo)
BRCOND - Conditional branch.
Byte Swap and Counting operators.
bool isConstantInSmallSection(const DataLayout &DL, const Constant *CN) const
Return true if this constant should be placed into small data section.
Wrapper class for IR location info (IR ordering and DebugLoc) to be passed into SDNode creation funct...
Represents one node in the SelectionDAG.
SDValue getCopyToReg(SDValue Chain, const SDLoc &dl, unsigned Reg, SDValue N)
static GCRegistry::Add< ShadowStackGC > C("shadow-stack","Very portable GC for uncooperative code generators")
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
static mvt_range integer_valuetypes()
void swap(llvm::BitVector &LHS, llvm::BitVector &RHS)
Implement std::swap in terms of BitVector swap.
SDValue getCALLSEQ_START(SDValue Chain, SDValue Op, const SDLoc &DL)
Return a new CALLSEQ_START node, which always must have a glue result (to ensure it's not CSE'd)...
Select(COND, TRUEVAL, FALSEVAL).
void setMinFunctionAlignment(unsigned Align)
Set the target's minimum function alignment (in log2(bytes))
int64_t getSExtValue() const
virtual const TargetRegisterClass * getRegClassFor(MVT VT) const
Return the register class that should be used for the specified value type.
static bool CC_Lanai32_VarArg(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State)
ZERO_EXTEND - Used for integer types, zeroing the new bits.
const GlobalObject * getBaseObject() const
ANY_EXTEND - Used for integer types. The high bits are undefined.
SDValue getBlockAddress(const BlockAddress *BA, EVT VT, int64_t Offset=0, bool isTarget=false, unsigned char TargetFlags=0)
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
static MachinePointerInfo getFixedStack(MachineFunction &MF, int FI, int64_t Offset=0)
Return a MachinePointerInfo record that refers to the specified FrameIndex.
SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const
BR_JT - Jumptable branch.
VACOPY - VACOPY has 5 operands: an input chain, a destination pointer, a source pointer, a SRCVALUE for the destination, and a SRCVALUE for the source.
SmallVector< SDValue, 32 > OutVals
Bitwise operators - logical and, logical or, logical xor.
SDValue getCopyFromReg(SDValue Chain, const SDLoc &dl, unsigned Reg, EVT VT)
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
virtual void LowerAsmOperandForConstraint(SDValue Op, std::string &Constraint, std::vector< SDValue > &Ops, SelectionDAG &DAG) const
Lower the specified operand into the Ops vector.
SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing a signed/unsigned value of type i[2...
SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to sign extend a small value in ...
std::pair< unsigned, const TargetRegisterClass * > getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI, StringRef Constraint, MVT VT) const override
Given a physical register constraint (e.g.
unsigned getSizeInBits() const
getSizeInBits - Return the size of the specified value type in bits.
void AnalyzeReturn(const SmallVectorImpl< ISD::OutputArg > &Outs, CCAssignFn Fn)
AnalyzeReturn - Analyze the returned values of a return, incorporating info about the result values i...
LLVM_ATTRIBUTE_ALWAYS_INLINE size_type size() const
FunctionType * getFunctionType() const
Returns the FunctionType for me.
APFloat abs(APFloat X)
Returns the absolute value of the argument.
unsigned MaxStoresPerMemmoveOptSize
Maximum number of store instructions that may be substituted for a call to memmove, used for functions with OptSize attribute.
unsigned MaxStoresPerMemcpyOptSize
Maximum number of store operations that may be substituted for a call to memcpy, used for functions w...
void setStackPointerRegisterToSaveRestore(unsigned R)
If set to a physical register, this specifies the register that llvm.savestack/llvm.restorestack should save and restore.
SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const
LLVM_NODISCARD std::enable_if<!is_simple_type< Y >::value, typename cast_retty< X, const Y >::ret_type >::type dyn_cast(const Y &Val)
static CCValAssign getMem(unsigned ValNo, MVT ValVT, unsigned Offset, MVT LocVT, LocInfo HTP)
unsigned MaxStoresPerMemcpy
Specify maximum bytes of store instructions per memcpy call.
constexpr bool isUInt< 16 >(uint64_t x)
EVT getValueType() const
Return the ValueType of the referenced return value.
SDValue getConstant(uint64_t Val, const SDLoc &DL, EVT VT, bool isTarget=false, bool isOpaque=false)
Create a ConstantSDNode wrapping a constant value.
Like SetCC, ops #0 and #1 are the LHS and RHS operands to compare, but op #2 is a carry value...
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
bool isAllOnesConstant(SDValue V)
Returns true if V is an integer constant with all bits set.
SDValue getFrameIndex(int FI, EVT VT, bool isTarget=false)
void setReturnAddressIsTaken(bool s)
unsigned getAlignment() const
MVT getPointerTy(const DataLayout &DL, uint32_t AS=0) const
Return the pointer type for the given address space, defaults to the pointer type from the data layou...
LLVM Value Representation.
static SDValue combineSelectAndUse(SDNode *N, SDValue Slct, SDValue OtherOp, TargetLowering::DAGCombinerInfo &DCI, bool AllOnes)
SDValue getRegister(unsigned Reg, EVT VT)
void setSRetReturnReg(unsigned Reg)
bool isNullConstant(SDValue V)
Returns true if V is a constant integer zero.
SDValue getValueType(EVT)
std::underlying_type< E >::type Mask()
Get a bitmask with 1s in all places up to the high-order bit of E's largest value.
Primary interface to the complete machine description for the target machine.
SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const
StringRef - Represent a constant reference to a string, i.e.
SetCC operator - This evaluates to a true value iff the condition is true.
unsigned MaxStoresPerMemset
Specify maximum number of store instructions per memset call.
unsigned MaxStoresPerMemsetOptSize
Maximum number of stores operations that may be substituted for the call to memset, used for functions with OptSize attribute.
unsigned getLocMemOffset() const
SDValue getEntryNode() const
Return the token chain corresponding to the entry of the function.
TRUNCATE - Completely drop the high bits.
virtual ConstraintWeight getSingleConstraintMatchWeight(AsmOperandInfo &info, const char *constraint) const
Examine constraint string and operand type and determine a weight value.
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation...
const LanaiRegisterInfo * getRegisterInfo() const override
unsigned AllocateStack(unsigned Size, unsigned Align)
AllocateStack - Allocate a chunk of stack space with the specified size and alignment.
Fast - This calling convention attempts to make calls as fast as possible (e.g.
SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const
MVT getSimpleVT() const
getSimpleVT - Return the SimpleValueType held in the specified simple EVT.
unsigned getRegisterByName(const char *RegName, EVT VT, SelectionDAG &DAG) const override
Return the register ID of the name passed in.
SDValue getTargetGlobalAddress(const GlobalValue *GV, const SDLoc &DL, EVT VT, int64_t offset=0, unsigned char TargetFlags=0)
MULHU/MULHS - Multiply high - Multiply two integers of type iN, producing an unsigned/signed value of...
DYNAMIC_STACKALLOC - Allocate some number of bytes on the stack aligned to a specified boundary...