LLVM  4.0.0
Macros | Enumerations | Functions | Variables
ARMISelDAGToDAG.cpp File Reference
#include "ARM.h"
#include "ARMBaseInstrInfo.h"
#include "ARMTargetMachine.h"
#include "MCTargetDesc/ARMAddressingModes.h"
#include "llvm/ADT/StringSwitch.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/CodeGen/SelectionDAGISel.h"
#include "llvm/IR/CallingConv.h"
#include "llvm/IR/Constants.h"
#include "llvm/IR/DerivedTypes.h"
#include "llvm/IR/Function.h"
#include "llvm/IR/Intrinsics.h"
#include "llvm/IR/LLVMContext.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Target/TargetLowering.h"
#include "llvm/Target/TargetOptions.h"
#include "ARMGenDAGISel.inc"
Include dependency graph for ARMISelDAGToDAG.cpp:

Go to the source code of this file.

Macros

#define DEBUG_TYPE   "arm-isel"
 

Enumerations

enum  AddrMode2Type
 

Functions

static bool isInt32Immediate (SDNode *N, unsigned &Imm)
 isInt32Immediate - This method tests to see if the node is a 32-bit constant operand. More...
 
static bool isInt32Immediate (SDValue N, unsigned &Imm)
 
static bool isOpcWithIntImmediate (SDNode *N, unsigned Opc, unsigned &Imm)
 
static bool isScaledConstantInRange (SDValue Node, int Scale, int RangeMin, int RangeMax, int &ScaledConstant)
 Check whether a particular node is a constant value representable as (N * Scale) where (N in [RangeMin, RangeMax). More...
 
static SDValue getAL (SelectionDAG *CurDAG, const SDLoc &dl)
 getAL - Returns a ARMCC::AL immediate node. More...
 
static bool isVLDfixed (unsigned Opc)
 
static bool isVSTfixed (unsigned Opc)
 
static unsigned getVLDSTRegisterUpdateOpcode (unsigned Opc)
 
static bool SearchSignedMulShort (SDValue SignExt, unsigned *Opc, SDValue &Src1, bool Accumulate)
 
static bool SearchSignedMulLong (SDValue OR, unsigned *Opc, SDValue &Src0, SDValue &Src1, bool Accumulate)
 
static Optional< std::pair
< unsigned, unsigned > > 
getContiguousRangeOfSetBits (const APInt &A)
 
static void getIntOperandsFromRegisterString (StringRef RegString, SelectionDAG *CurDAG, const SDLoc &DL, std::vector< SDValue > &Ops)
 
static int getBankedRegisterMask (StringRef RegString)
 
static int getMClassRegisterSYSmValueMask (StringRef RegString)
 
static int getMClassFlagsMask (StringRef Flags, bool hasDSP)
 
static int getMClassRegisterMask (StringRef Reg, StringRef Flags, bool IsRead, const ARMSubtarget *Subtarget)
 
static int getARClassRegisterMask (StringRef Reg, StringRef Flags)
 

Variables

static cl::opt< boolDisableShifterOp ("disable-shifter-op", cl::Hidden, cl::desc("Disable isel of shifter-op"), cl::init(false))
 

Macro Definition Documentation

#define DEBUG_TYPE   "arm-isel"

Definition at line 39 of file ARMISelDAGToDAG.cpp.

Enumeration Type Documentation

Definition at line 52 of file ARMISelDAGToDAG.cpp.

Function Documentation

static SDValue getAL ( SelectionDAG CurDAG,
const SDLoc dl 
)
inlinestatic

getAL - Returns a ARMCC::AL immediate node.

Definition at line 1473 of file ARMISelDAGToDAG.cpp.

References llvm::ARMCC::AL, llvm::SelectionDAG::getTargetConstant(), and llvm::MVT::i32.

static int getARClassRegisterMask ( StringRef  Reg,
StringRef  Flags 
)
static
static int getBankedRegisterMask ( StringRef  RegString)
inlinestatic
static Optional<std::pair<unsigned, unsigned> > getContiguousRangeOfSetBits ( const APInt A)
static
static void getIntOperandsFromRegisterString ( StringRef  RegString,
SelectionDAG CurDAG,
const SDLoc DL,
std::vector< SDValue > &  Ops 
)
static
static int getMClassFlagsMask ( StringRef  Flags,
bool  hasDSP 
)
inlinestatic
static int getMClassRegisterMask ( StringRef  Reg,
StringRef  Flags,
bool  IsRead,
const ARMSubtarget Subtarget 
)
static
static int getMClassRegisterSYSmValueMask ( StringRef  RegString)
inlinestatic
static unsigned getVLDSTRegisterUpdateOpcode ( unsigned  Opc)
static

Definition at line 1809 of file ARMISelDAGToDAG.cpp.

References assert(), isVLDfixed(), and isVSTfixed().

static bool isInt32Immediate ( SDNode N,
unsigned Imm 
)
static

isInt32Immediate - This method tests to see if the node is a 32-bit constant operand.

If so Imm will receive the 32-bit value.

Definition at line 294 of file ARMISelDAGToDAG.cpp.

References llvm::ISD::Constant, llvm::SDNode::getOpcode(), llvm::SDNode::getValueType(), llvm::MVT::i32, and N.

Referenced by isInt32Immediate(), and isOpcWithIntImmediate().

static bool isInt32Immediate ( SDValue  N,
unsigned Imm 
)
static

Definition at line 304 of file ARMISelDAGToDAG.cpp.

References llvm::SDValue::getNode(), and isInt32Immediate().

static bool isOpcWithIntImmediate ( SDNode N,
unsigned  Opc,
unsigned Imm 
)
static
static bool isScaledConstantInRange ( SDValue  Node,
int  Scale,
int  RangeMin,
int  RangeMax,
int &  ScaledConstant 
)
static

Check whether a particular node is a constant value representable as (N * Scale) where (N in [RangeMin, RangeMax).

Parameters
ScaledConstant[out] - On success, the pre-scaled constant value.

Definition at line 320 of file ARMISelDAGToDAG.cpp.

References assert(), C, llvm::dyn_cast(), and llvm::ConstantSDNode::getZExtValue().

static bool isVLDfixed ( unsigned  Opc)
static

Definition at line 1751 of file ARMISelDAGToDAG.cpp.

Referenced by getVLDSTRegisterUpdateOpcode().

static bool isVSTfixed ( unsigned  Opc)
static

Definition at line 1784 of file ARMISelDAGToDAG.cpp.

Referenced by getVLDSTRegisterUpdateOpcode().

static bool SearchSignedMulLong ( SDValue  OR,
unsigned Opc,
SDValue Src0,
SDValue Src1,
bool  Accumulate 
)
static
static bool SearchSignedMulShort ( SDValue  SignExt,
unsigned Opc,
SDValue Src1,
bool  Accumulate 
)
static

Variable Documentation

cl::opt<bool> DisableShifterOp("disable-shifter-op", cl::Hidden, cl::desc("Disable isel of shifter-op"), cl::init(false))
static