10 #ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONBITTRACKER_H
11 #define LLVM_LIB_TARGET_HEXAGON_HEXAGONBITTRACKER_H
19 class HexagonInstrInfo;
20 class HexagonRegisterInfo;
48 unsigned getNextPhysReg(
unsigned PReg,
unsigned Width)
const;
49 unsigned getVirtRegFor(
unsigned PReg)
const;
56 ExtType(
char t, uint16_t w) :
Type(t), Width(w) {}
62 typedef DenseMap<unsigned, ExtType> RegExtMap;
68 #endif // LLVM_LIB_TARGET_HEXAGON_HEXAGONBITTRACKER_H
std::map< unsigned, RegisterCell > CellMapType
BitTracker::BitMask mask(unsigned Reg, unsigned Sub) const override
const HexagonInstrInfo & TII
HexagonEvaluator(const HexagonRegisterInfo &tri, MachineRegisterInfo &mri, const HexagonInstrInfo &tii, MachineFunction &mf)
bool evaluate(const MachineInstr &MI, const CellMapType &Inputs, CellMapType &Outputs) const override
Reg
All possible values of the reg field in the ModR/M byte.
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted...
The instances of the Type class are immutable: once they are created, they are never changed...
BitTracker::BranchTargetList BranchTargetList
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
Representation of each machine instruction.
BitTracker::RegisterRef RegisterRef
BitTracker::CellMapType CellMapType
A vector that has set insertion semantics.
BitTracker::RegisterCell RegisterCell