LLVM  4.0.0
ARMTargetMachine.h
Go to the documentation of this file.
1 //===-- ARMTargetMachine.h - Define TargetMachine for ARM -------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file declares the ARM specific subclass of TargetMachine.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_ARM_ARMTARGETMACHINE_H
15 #define LLVM_LIB_TARGET_ARM_ARMTARGETMACHINE_H
16 
17 #include "ARMInstrInfo.h"
18 #include "ARMSubtarget.h"
19 #include "llvm/IR/DataLayout.h"
21 
22 namespace llvm {
23 
25 public:
26  enum ARMABI {
29  ARM_ABI_AAPCS, // ARM EABI
31  } TargetABI;
32 
33 protected:
34  std::unique_ptr<TargetLoweringObjectFile> TLOF;
36  bool isLittle;
38 
39 public:
40  ARMBaseTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
41  StringRef FS, const TargetOptions &Options,
43  CodeGenOpt::Level OL, bool isLittle);
44  ~ARMBaseTargetMachine() override;
45 
46  const ARMSubtarget *getSubtargetImpl() const { return &Subtarget; }
47  const ARMSubtarget *getSubtargetImpl(const Function &F) const override;
48  bool isLittleEndian() const { return isLittle; }
49 
50  /// \brief Get the TargetIRAnalysis for this target.
52 
53  // Pass Pipeline Configuration
54  TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
55 
57  return TLOF.get();
58  }
59 };
60 
61 /// ARM target machine.
62 ///
64  virtual void anchor();
65  public:
66  ARMTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
67  StringRef FS, const TargetOptions &Options,
69  CodeGenOpt::Level OL, bool isLittle);
70 };
71 
72 /// ARM little endian target machine.
73 ///
75  void anchor() override;
76 public:
77  ARMLETargetMachine(const Target &T, const Triple &TT, StringRef CPU,
78  StringRef FS, const TargetOptions &Options,
81 };
82 
83 /// ARM big endian target machine.
84 ///
86  void anchor() override;
87 public:
88  ARMBETargetMachine(const Target &T, const Triple &TT, StringRef CPU,
89  StringRef FS, const TargetOptions &Options,
92 };
93 
94 /// Thumb target machine.
95 /// Due to the way architectures are handled, this represents both
96 /// Thumb-1 and Thumb-2.
97 ///
99  virtual void anchor();
100 public:
101  ThumbTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
102  StringRef FS, const TargetOptions &Options,
104  CodeGenOpt::Level OL, bool isLittle);
105 };
106 
107 /// Thumb little endian target machine.
108 ///
110  void anchor() override;
111 public:
112  ThumbLETargetMachine(const Target &T, const Triple &TT, StringRef CPU,
113  StringRef FS, const TargetOptions &Options,
115  CodeGenOpt::Level OL);
116 };
117 
118 /// Thumb big endian target machine.
119 ///
121  void anchor() override;
122 public:
123  ThumbBETargetMachine(const Target &T, const Triple &TT, StringRef CPU,
124  StringRef FS, const TargetOptions &Options,
126  CodeGenOpt::Level OL);
127 };
128 
129 } // end namespace llvm
130 
131 #endif
Thumb target machine.
TargetIRAnalysis getTargetIRAnalysis() override
Get the TargetIRAnalysis for this target.
Analysis pass providing the TargetTransformInfo.
enum llvm::ARMBaseTargetMachine::ARMABI TargetABI
ARMBaseTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional< Reloc::Model > RM, CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle)
Create an ARM architecture model.
TargetLoweringObjectFile * getObjFileLowering() const override
ThumbBETargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional< Reloc::Model > RM, CodeModel::Model CM, CodeGenOpt::Level OL)
Target-Independent Code Generator Pass Configuration Options.
ThumbLETargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional< Reloc::Model > RM, CodeModel::Model CM, CodeGenOpt::Level OL)
ARM big endian target machine.
ARMBETargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional< Reloc::Model > RM, CodeModel::Model CM, CodeGenOpt::Level OL)
std::unique_ptr< TargetLoweringObjectFile > TLOF
#define F(x, y, z)
Definition: MD5.cpp:51
StringMap< std::unique_ptr< ARMSubtarget > > SubtargetMap
ARM little endian target machine.
const ARMSubtarget * getSubtargetImpl() const
ARMTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional< Reloc::Model > RM, CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle)
This class describes a target machine that is implemented with the LLVM target-independent code gener...
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
ARM target machine.
ThumbTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional< Reloc::Model > RM, CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle)
TargetPassConfig * createPassConfig(PassManagerBase &PM) override
Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of ...
StringMap - This is an unconventional map that is specialized for handling keys that are "strings"...
Definition: StringMap.h:223
Target - Wrapper for Target specific information.
ARMLETargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional< Reloc::Model > RM, CodeModel::Model CM, CodeGenOpt::Level OL)
Thumb big endian target machine.
Thumb little endian target machine.
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:47