14 #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64REGISTERBANKINFO_H
15 #define LLVM_LIB_TARGET_AARCH64_AARCH64REGISTERBANKINFO_H
21 class TargetRegisterInfo;
39 void applyMappingImpl(
const OperandsMapper &OpdMapper)
const override;
55 unsigned Size)
const override;
AArch64RegisterBankInfo(const TargetRegisterInfo &TRI)
Helper class that represents how the value of an instruction may be mapped and what is the related co...
Helper class used to get/create the virtual registers that will be used to replace the MachineOperand...
Holds all the information related to register banks.
static GCRegistry::Add< OcamlGC > B("ocaml","ocaml 3.10-compatible GC")
InstructionMapping getInstrMapping(const MachineInstr &MI) const override
Get the mapping of the different operands of MI on the register bank.
Conditional register: NZCV.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small...
InstructionMappings getInstrAlternativeMappings(const MachineInstr &MI) const override
Get the alternative mappings for MI.
unsigned copyCost(const RegisterBank &A, const RegisterBank &B, unsigned Size) const override
Get the cost of a copy from B to A, or put differently, get the cost of A = COPY B.
This class implements the register bank concept.
Representation of each machine instruction.
This class provides the information for the target register banks.
Floating Point/Vector Registers: B, H, S, D, Q.
General Purpose Registers: W, X.
const RegisterBank & getRegBankFromRegClass(const TargetRegisterClass &RC) const override
Get a register bank that covers RC.
static GCRegistry::Add< ErlangGC > A("erlang","erlang-compatible garbage collector")