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llvm
AArch64Subtarget
llvm::AArch64Subtarget Member List
This is the complete list of members for
llvm::AArch64Subtarget
, including all inherited members.
AArch64Subtarget
(const Triple &TT, const std::string &CPU, const std::string &FS, const TargetMachine &TM, bool LittleEndian)
llvm::AArch64Subtarget
ARMProcFamily
llvm::AArch64Subtarget
protected
ARMProcFamilyEnum
enum name
llvm::AArch64Subtarget
BalanceFPOps
llvm::AArch64Subtarget
protected
balanceFPOps
() const
llvm::AArch64Subtarget
inline
CacheLineSize
llvm::AArch64Subtarget
protected
ClassifyGlobalReference
(const GlobalValue *GV, const TargetMachine &TM) const
llvm::AArch64Subtarget
CortexA35
enum value
llvm::AArch64Subtarget
CortexA53
enum value
llvm::AArch64Subtarget
CortexA57
enum value
llvm::AArch64Subtarget
CortexA72
enum value
llvm::AArch64Subtarget
CortexA73
enum value
llvm::AArch64Subtarget
CustomAsCheapAsMove
llvm::AArch64Subtarget
protected
Cyclone
enum value
llvm::AArch64Subtarget
DisableLatencySchedHeuristic
llvm::AArch64Subtarget
protected
enableEarlyIfConversion
() const override
llvm::AArch64Subtarget
enableMachineScheduler
() const override
llvm::AArch64Subtarget
inline
enablePostRAScheduler
() const override
llvm::AArch64Subtarget
inline
ExynosM1
enum value
llvm::AArch64Subtarget
Falkor
enum value
llvm::AArch64Subtarget
FrameLowering
llvm::AArch64Subtarget
protected
getBZeroEntry
() const
llvm::AArch64Subtarget
getCacheLineSize
() const
llvm::AArch64Subtarget
inline
getCallLowering
() const override
llvm::AArch64Subtarget
getCustomPBQPConstraints
() const override
llvm::AArch64Subtarget
getFrameLowering
() const override
llvm::AArch64Subtarget
inline
getInstrInfo
() const override
llvm::AArch64Subtarget
inline
getInstructionSelector
() const override
llvm::AArch64Subtarget
getLegalizerInfo
() const override
llvm::AArch64Subtarget
getMaximumJumpTableSize
() const
llvm::AArch64Subtarget
inline
getMaxInlineSizeThreshold
() const
llvm::AArch64Subtarget
inline
getMaxInterleaveFactor
() const
llvm::AArch64Subtarget
inline
getMaxPrefetchIterationsAhead
() const
llvm::AArch64Subtarget
inline
getMinPrefetchStride
() const
llvm::AArch64Subtarget
inline
getPrefetchDistance
() const
llvm::AArch64Subtarget
inline
getPrefFunctionAlignment
() const
llvm::AArch64Subtarget
inline
getPrefLoopAlignment
() const
llvm::AArch64Subtarget
inline
getProcFamily
() const
llvm::AArch64Subtarget
inline
getRegBankInfo
() const override
llvm::AArch64Subtarget
getRegisterInfo
() const override
llvm::AArch64Subtarget
inline
getSelectionDAGInfo
() const override
llvm::AArch64Subtarget
inline
getTargetLowering
() const override
llvm::AArch64Subtarget
inline
getTargetTriple
() const
llvm::AArch64Subtarget
inline
getVectorInsertExtractBaseCost
() const
llvm::AArch64Subtarget
inline
GISel
llvm::AArch64Subtarget
protected
hasArithmeticBccFusion
() const
llvm::AArch64Subtarget
inline
HasArithmeticBccFusion
llvm::AArch64Subtarget
protected
hasArithmeticCbzFusion
() const
llvm::AArch64Subtarget
inline
HasArithmeticCbzFusion
llvm::AArch64Subtarget
protected
HasCRC
llvm::AArch64Subtarget
protected
hasCRC
() const
llvm::AArch64Subtarget
inline
hasCrypto
() const
llvm::AArch64Subtarget
inline
HasCrypto
llvm::AArch64Subtarget
protected
hasCustomCheapAsMoveHandling
() const
llvm::AArch64Subtarget
inline
hasFPARMv8
() const
llvm::AArch64Subtarget
inline
HasFPARMv8
llvm::AArch64Subtarget
protected
HasFullFP16
llvm::AArch64Subtarget
protected
hasFullFP16
() const
llvm::AArch64Subtarget
inline
HasLSE
llvm::AArch64Subtarget
protected
hasLSE
() const
llvm::AArch64Subtarget
inline
hasNEON
() const
llvm::AArch64Subtarget
inline
HasNEON
llvm::AArch64Subtarget
protected
hasPerfMon
() const
llvm::AArch64Subtarget
inline
HasPerfMon
llvm::AArch64Subtarget
protected
hasRAS
() const
llvm::AArch64Subtarget
inline
HasRAS
llvm::AArch64Subtarget
protected
HasSPE
llvm::AArch64Subtarget
protected
hasSPE
() const
llvm::AArch64Subtarget
inline
hasV8_1aOps
() const
llvm::AArch64Subtarget
inline
HasV8_1aOps
llvm::AArch64Subtarget
protected
HasV8_2aOps
llvm::AArch64Subtarget
protected
hasV8_2aOps
() const
llvm::AArch64Subtarget
inline
hasZeroCycleRegMove
() const
llvm::AArch64Subtarget
inline
HasZeroCycleRegMove
llvm::AArch64Subtarget
protected
HasZeroCycleZeroing
llvm::AArch64Subtarget
protected
hasZeroCycleZeroing
() const
llvm::AArch64Subtarget
inline
InstrInfo
llvm::AArch64Subtarget
protected
IsLittle
llvm::AArch64Subtarget
protected
isLittleEndian
() const
llvm::AArch64Subtarget
inline
isMisaligned128StoreSlow
() const
llvm::AArch64Subtarget
inline
isPaired128Slow
() const
llvm::AArch64Subtarget
inline
isTargetAndroid
() const
llvm::AArch64Subtarget
inline
isTargetCOFF
() const
llvm::AArch64Subtarget
inline
isTargetDarwin
() const
llvm::AArch64Subtarget
inline
isTargetELF
() const
llvm::AArch64Subtarget
inline
isTargetIOS
() const
llvm::AArch64Subtarget
inline
isTargetLinux
() const
llvm::AArch64Subtarget
inline
isTargetMachO
() const
llvm::AArch64Subtarget
inline
isTargetWindows
() const
llvm::AArch64Subtarget
inline
isX18Reserved
() const
llvm::AArch64Subtarget
inline
isXRaySupported
() const override
llvm::AArch64Subtarget
inline
Kryo
enum value
llvm::AArch64Subtarget
MaxInterleaveFactor
llvm::AArch64Subtarget
protected
MaxJumpTableSize
llvm::AArch64Subtarget
protected
MaxPrefetchIterationsAhead
llvm::AArch64Subtarget
protected
MinPrefetchStride
llvm::AArch64Subtarget
protected
Misaligned128StoreIsSlow
llvm::AArch64Subtarget
protected
Others
enum value
llvm::AArch64Subtarget
overrideSchedPolicy
(MachineSchedPolicy &Policy, unsigned NumRegionInstrs) const override
llvm::AArch64Subtarget
Paired128IsSlow
llvm::AArch64Subtarget
protected
ParseSubtargetFeatures
(StringRef CPU, StringRef FS)
llvm::AArch64Subtarget
predictableSelectIsExpensive
() const
llvm::AArch64Subtarget
inline
PredictableSelectIsExpensive
llvm::AArch64Subtarget
protected
PrefetchDistance
llvm::AArch64Subtarget
protected
PrefFunctionAlignment
llvm::AArch64Subtarget
protected
PrefLoopAlignment
llvm::AArch64Subtarget
protected
requiresStrictAlign
() const
llvm::AArch64Subtarget
inline
ReserveX18
llvm::AArch64Subtarget
protected
setGISelAccessor
(GISelAccessor &GISel)
llvm::AArch64Subtarget
inline
StrictAlign
llvm::AArch64Subtarget
protected
supportsAddressTopByteIgnored
() const
llvm::AArch64Subtarget
TargetTriple
llvm::AArch64Subtarget
protected
TLInfo
llvm::AArch64Subtarget
protected
TSInfo
llvm::AArch64Subtarget
protected
useAA
() const override
llvm::AArch64Subtarget
inline
UseAA
llvm::AArch64Subtarget
protected
useAlternateSExtLoadCVTF32Pattern
() const
llvm::AArch64Subtarget
inline
UseAlternateSExtLoadCVTF32Pattern
llvm::AArch64Subtarget
protected
UsePostRAScheduler
llvm::AArch64Subtarget
protected
useRSqrt
() const
llvm::AArch64Subtarget
inline
UseRSqrt
llvm::AArch64Subtarget
protected
VectorInsertExtractBaseCost
llvm::AArch64Subtarget
protected
Vulcan
enum value
llvm::AArch64Subtarget
Generated on Wed Mar 8 2017 17:51:03 for LLVM by
1.8.6