LLVM  4.0.0
WebAssemblyReplacePhysRegs.cpp
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1 //===-- WebAssemblyReplacePhysRegs.cpp - Replace phys regs with virt regs -===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 ///
10 /// \file
11 /// \brief This file implements a pass that replaces physical registers with
12 /// virtual registers.
13 ///
14 /// LLVM expects certain physical registers, such as a stack pointer. However,
15 /// WebAssembly doesn't actually have such physical registers. This pass is run
16 /// once LLVM no longer needs these registers, and replaces them with virtual
17 /// registers, so they can participate in register stackifying and coloring in
18 /// the normal way.
19 ///
20 //===----------------------------------------------------------------------===//
21 
22 #include "WebAssembly.h"
25 #include "WebAssemblySubtarget.h"
28 #include "llvm/CodeGen/Passes.h"
29 #include "llvm/Support/Debug.h"
31 using namespace llvm;
32 
33 #define DEBUG_TYPE "wasm-replace-phys-regs"
34 
35 namespace {
36 class WebAssemblyReplacePhysRegs final : public MachineFunctionPass {
37 public:
38  static char ID; // Pass identification, replacement for typeid
39  WebAssemblyReplacePhysRegs() : MachineFunctionPass(ID) {}
40 
41 private:
42  StringRef getPassName() const override {
43  return "WebAssembly Replace Physical Registers";
44  }
45 
46  void getAnalysisUsage(AnalysisUsage &AU) const override {
47  AU.setPreservesCFG();
49  }
50 
51  bool runOnMachineFunction(MachineFunction &MF) override;
52 };
53 } // end anonymous namespace
54 
57  return new WebAssemblyReplacePhysRegs();
58 }
59 
60 bool WebAssemblyReplacePhysRegs::runOnMachineFunction(MachineFunction &MF) {
61  DEBUG({
62  dbgs() << "********** Replace Physical Registers **********\n"
63  << "********** Function: " << MF.getName() << '\n';
64  });
65 
67  const auto &TRI = *MF.getSubtarget<WebAssemblySubtarget>().getRegisterInfo();
68  bool Changed = false;
69 
70  assert(!mustPreserveAnalysisID(LiveIntervalsID) &&
71  "LiveIntervals shouldn't be active yet!");
72  // We don't preserve SSA or liveness.
73  MRI.leaveSSA();
74  MRI.invalidateLiveness();
75 
76  for (unsigned PReg = WebAssembly::NoRegister + 1;
77  PReg < WebAssembly::NUM_TARGET_REGS; ++PReg) {
78  // Skip fake registers that are never used explicitly.
79  if (PReg == WebAssembly::VALUE_STACK || PReg == WebAssembly::ARGUMENTS)
80  continue;
81 
82  // Replace explicit uses of the physical register with a virtual register.
83  const TargetRegisterClass *RC = TRI.getMinimalPhysRegClass(PReg);
84  unsigned VReg = WebAssembly::NoRegister;
85  for (auto I = MRI.reg_begin(PReg), E = MRI.reg_end(); I != E; ) {
86  MachineOperand &MO = *I++;
87  if (!MO.isImplicit()) {
88  if (VReg == WebAssembly::NoRegister)
89  VReg = MRI.createVirtualRegister(RC);
90  MO.setReg(VReg);
91  if (MO.getParent()->isDebugValue())
92  MO.setIsDebug();
93  Changed = true;
94  }
95  }
96  }
97 
98  return Changed;
99 }
bool isImplicit() const
MachineInstr * getParent()
getParent - Return the instruction that this operand belongs to.
This file contains the entry points for global functions defined in the LLVM WebAssembly back-end...
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
char & LiveIntervalsID
LiveIntervals - This analysis keeps track of the live ranges of virtual and physical registers...
static GCRegistry::Add< CoreCLRGC > E("coreclr","CoreCLR-compatible GC")
bool isDebugValue() const
Definition: MachineInstr.h:777
unsigned const MachineRegisterInfo * MRI
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
This file provides WebAssembly-specific target descriptions.
Represent the analysis usage information of a pass.
FunctionPass class - This class is used to implement most global optimizations.
Definition: Pass.h:298
This file declares the WebAssembly-specific subclass of TargetSubtarget.
MachineOperand class - Representation of each machine instruction operand.
void setPreservesCFG()
This function should be called by the pass, iff they do not:
Definition: Pass.cpp:276
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:132
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
void setReg(unsigned Reg)
Change the register this operand corresponds to.
FunctionPass * createWebAssemblyReplacePhysRegs()
#define I(x, y, z)
Definition: MD5.cpp:54
This file declares WebAssembly-specific per-machine-function information.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
#define DEBUG(X)
Definition: Debug.h:100
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:47
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
void setIsDebug(bool Val=true)