LLVM  4.0.0
MCSubtargetInfo.cpp
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1 //===-- MCSubtargetInfo.cpp - Subtarget Information -----------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 
11 #include "llvm/ADT/StringRef.h"
12 #include "llvm/ADT/Triple.h"
16 #include <algorithm>
17 
18 using namespace llvm;
19 
22  ArrayRef<SubtargetFeatureKV> ProcFeatures) {
24  return Features.getFeatureBits(CPU, ProcDesc, ProcFeatures);
25 }
26 
28  FeatureBits = getFeatures(CPU, FS, ProcDesc, ProcFeatures);
29  if (!CPU.empty())
30  CPUSchedModel = &getSchedModelForCPU(CPU);
31  else
32  CPUSchedModel = &MCSchedModel::GetDefaultSchedModel();
33 }
34 
36  FeatureBits = getFeatures(CPU, FS, ProcDesc, ProcFeatures);
37 }
38 
39 MCSubtargetInfo::MCSubtargetInfo(
40  const Triple &TT, StringRef C, StringRef FS,
42  const SubtargetInfoKV *ProcSched, const MCWriteProcResEntry *WPR,
43  const MCWriteLatencyEntry *WL, const MCReadAdvanceEntry *RA,
44  const InstrStage *IS, const unsigned *OC, const unsigned *FP)
45  : TargetTriple(TT), CPU(C), ProcFeatures(PF), ProcDesc(PD),
46  ProcSchedModels(ProcSched), WriteProcResTable(WPR), WriteLatencyTable(WL),
47  ReadAdvanceTable(RA), Stages(IS), OperandCycles(OC), ForwardingPaths(FP) {
48  InitMCProcessorInfo(CPU, FS);
49 }
50 
51 /// ToggleFeature - Toggle a feature and returns the re-computed feature
52 /// bits. This version does not change the implied bits.
54  FeatureBits.flip(FB);
55  return FeatureBits;
56 }
57 
59  FeatureBits ^= FB;
60  return FeatureBits;
61 }
62 
63 /// ToggleFeature - Toggle a feature and returns the re-computed feature
64 /// bits. This version will also change all implied bits.
66  SubtargetFeatures::ToggleFeature(FeatureBits, FS, ProcFeatures);
67  return FeatureBits;
68 }
69 
71  SubtargetFeatures::ApplyFeatureFlag(FeatureBits, FS, ProcFeatures);
72  return FeatureBits;
73 }
74 
76  assert(ProcSchedModels && "Processor machine model not available!");
77 
78  ArrayRef<SubtargetInfoKV> SchedModels(ProcSchedModels, ProcDesc.size());
79 
80  assert(std::is_sorted(SchedModels.begin(), SchedModels.end(),
81  [](const SubtargetInfoKV &LHS, const SubtargetInfoKV &RHS) {
82  return strcmp(LHS.Key, RHS.Key) < 0;
83  }) &&
84  "Processor machine model table is not sorted");
85 
86  // Find entry
87  auto Found =
88  std::lower_bound(SchedModels.begin(), SchedModels.end(), CPU);
89  if (Found == SchedModels.end() || StringRef(Found->Key) != CPU) {
90  if (CPU != "help") // Don't error if the user asked for help.
91  errs() << "'" << CPU
92  << "' is not a recognized processor for this target"
93  << " (ignoring processor)\n";
95  }
96  assert(Found->Value && "Missing processor SchedModel value");
97  return *(const MCSchedModel *)Found->Value;
98 }
99 
102  const MCSchedModel SchedModel = getSchedModelForCPU(CPU);
103  return InstrItineraryData(SchedModel, Stages, OperandCycles, ForwardingPaths);
104 }
105 
106 /// Initialize an InstrItineraryData instance.
108  InstrItins = InstrItineraryData(getSchedModel(), Stages, OperandCycles,
109  ForwardingPaths);
110 }
raw_ostream & errs()
This returns a reference to a raw_ostream for standard error.
InstrItineraryData getInstrItineraryForCPU(StringRef CPU) const
getInstrItineraryForCPU - Get scheduling itinerary of a CPU.
Maximum length of the test input libFuzzer tries to guess a good value based on the corpus and reports it always prefer smaller inputs during the corpus shuffle When libFuzzer itself reports a bug this exit code will be used If indicates the maximal total time in seconds to run the fuzzer minimizes the provided crash input Use with strcmp
SubtargetInfoKV - Used to provide key value pairs for CPU and arbitrary pointers. ...
void initInstrItins(InstrItineraryData &InstrItins) const
Initialize an InstrItineraryData instance.
const MCSchedModel & getSchedModelForCPU(StringRef CPU) const
getSchedModelForCPU - Get the machine model of a CPU.
const MCSchedModel & getSchedModel() const
Get the machine model for this subtarget's CPU.
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory)...
Definition: APInt.h:33
Itinerary data supplied by a subtarget to be used by a target.
void InitMCProcessorInfo(StringRef CPU, StringRef FS)
Initialize the scheduling model and feature bits.
static const MCSchedModel & GetDefaultSchedModel()
Returns the default initialized model.
Definition: MCSchedule.h:227
FeatureBitset ToggleFeature(uint64_t FB)
ToggleFeature - Toggle a feature and returns the re-computed feature bits.
Identify one of the processor resource kinds consumed by a particular scheduling class for the specif...
Definition: MCSchedule.h:55
FeatureBitset ApplyFeatureFlag(StringRef FS)
Apply a feature flag and return the re-computed feature bits, including all feature bits implied by t...
static void ToggleFeature(FeatureBitset &Bits, StringRef String, ArrayRef< SubtargetFeatureKV > FeatureTable)
ToggleFeature - Toggle a feature and update the feature bits.
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
Specify the latency in cpu cycles for a particular scheduling class and def index.
Definition: MCSchedule.h:69
static GCRegistry::Add< ShadowStackGC > C("shadow-stack","Very portable GC for uncooperative code generators")
SubtargetFeatures - Manages the enabling and disabling of subtarget specific features.
LLVM_NODISCARD LLVM_ATTRIBUTE_ALWAYS_INLINE bool empty() const
empty - Check if the string is empty.
Definition: StringRef.h:130
Specify the number of cycles allowed after instruction issue before a particular use operand reads it...
Definition: MCSchedule.h:86
These values represent a non-pipelined step in the execution of an instruction.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
static void ApplyFeatureFlag(FeatureBitset &Bits, StringRef Feature, ArrayRef< SubtargetFeatureKV > FeatureTable)
Apply the feature flag and update the feature bits.
const FeatureBitset Features
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:47
static FeatureBitset getFeatures(StringRef CPU, StringRef FS, ArrayRef< SubtargetFeatureKV > ProcDesc, ArrayRef< SubtargetFeatureKV > ProcFeatures)
FeatureBitset getFeatureBits(StringRef CPU, ArrayRef< SubtargetFeatureKV > CPUTable, ArrayRef< SubtargetFeatureKV > FeatureTable)
Get feature bits of a CPU.
Machine model for scheduling, bundling, and heuristics.
Definition: MCSchedule.h:136
void setDefaultFeatures(StringRef CPU, StringRef FS)
Set the features to the default for the given CPU with an appended feature string.