16 #ifndef LLVM_CODEGEN_MACHINEINSTR_H
17 #define LLVM_CODEGEN_MACHINEINSTR_H
35 template <
typename T>
class ArrayRef;
36 template <
typename T>
class SmallVectorImpl;
37 class DILocalVariable;
39 class TargetInstrInfo;
40 class TargetRegisterClass;
41 class TargetRegisterInfo;
42 class MachineFunction;
43 class MachineMemOperand;
54 ilist_sentinel_tracking<true>> {
83 OperandCapacity CapOperands;
89 uint8_t AsmPrinterFlags;
142 return AsmPrinterFlags &
Flag;
147 AsmPrinterFlags |=
Flag;
152 AsmPrinterFlags &= ~Flag;
167 Flags |= (uint8_t)Flag;
178 Flags &= ~((uint8_t)Flag);
374 return NumMemRefs == 1;
397 return hasPropertyInBundle(1ULL << MCFlag,
Type);
771 return getOpcode() == TargetOpcode::CFI_INSTRUCTION;
796 return getOpcode() == TargetOpcode::INSERT_SUBREG;
799 return getOpcode() == TargetOpcode::SUBREG_TO_REG;
802 return getOpcode() == TargetOpcode::REG_SEQUENCE;
805 return getOpcode() == TargetOpcode::BUNDLE;
808 return getOpcode() == TargetOpcode::COPY;
814 return getOpcode() == TargetOpcode::EXTRACT_SUBREG;
835 default:
return false;
837 case TargetOpcode::PHI:
838 case TargetOpcode::COPY:
839 case TargetOpcode::INSERT_SUBREG:
840 case TargetOpcode::SUBREG_TO_REG:
841 case TargetOpcode::REG_SEQUENCE:
843 case TargetOpcode::IMPLICIT_DEF:
845 case TargetOpcode::CFI_INSTRUCTION:
847 case TargetOpcode::GC_LABEL:
848 case TargetOpcode::DBG_VALUE:
930 return (Idx == -1) ?
nullptr : &
getOperand(Idx);
947 bool isDead =
false,
bool Overlap =
false,
955 return (Idx == -1) ?
nullptr : &
getOperand(Idx);
1002 bool ExploreBundle =
false)
const;
1024 void tieOperands(
unsigned DefIdx,
unsigned UseIdx);
1036 unsigned *UseOpIdx =
nullptr)
const {
1049 unsigned *DefOpIdx =
nullptr)
const {
1072 bool AddIfNotFound =
false);
1083 bool AddIfNotFound =
false);
1187 debugLoc = std::move(dl);
1203 setMemRefs(std::make_pair(NewMemRefs, NewMemRefsEnd-NewMemRefs));
1211 MemRefs = NewMemRefs.first;
1212 NumMemRefs = uint8_t(NewMemRefs.second);
1213 assert(NumMemRefs == NewMemRefs.second &&
1214 "Too many memrefs - must drop memory operands");
bool isInsideBundle() const
Return true if MI is in a bundle (but not the first MI in a bundle).
static bool Check(DecodeStatus &Out, DecodeStatus In)
void bundleWithPred()
Bundle this instruction with its predecessor.
void print(raw_ostream &OS, bool SkipOpers=false, const TargetInstrInfo *TII=nullptr) const
const_iterator end(StringRef path)
Get end iterator over path.
mop_iterator operands_end()
bool hasPostISelHook(QueryType Type=IgnoreBundle) const
Return true if this instruction requires adjustment after instruction selection by calling a target h...
bool isLoadFoldBarrier() const
Returns true if it is illegal to fold a load across this instruction.
bool isBranch(QueryType Type=AnyInBundle) const
Returns true if this is a conditional, unconditional, or indirect branch.
iterator_range< mop_iterator > uses()
Returns a range that includes all operands that are register uses.
MachineOperand * findRegisterDefOperand(unsigned Reg, bool isDead=false, const TargetRegisterInfo *TRI=nullptr)
Wrapper for findRegisterDefOperandIdx, it returns a pointer to the MachineOperand rather than an inde...
iterator_range< mmo_iterator > memoperands() const
iterator_range< const_mop_iterator > operands() const
bool isConvertibleTo3Addr(QueryType Type=IgnoreBundle) const
Return true if this is a 2-address instruction which can be changed into a 3-address instruction if n...
iterator_range< mop_iterator > explicit_operands()
void setRegisterDefReadUndef(unsigned Reg, bool IsUndef=true)
Mark all subregister defs of register Reg with the undef flag.
bool addRegisterDead(unsigned Reg, const TargetRegisterInfo *RegInfo, bool AddIfNotFound=false)
We have determined MI defined a register without a use.
iterator_range< const_mop_iterator > defs() const
Returns a range over all explicit operands that are register definitions.
bool isPseudo(QueryType Type=IgnoreBundle) const
Return true if this is a pseudo instruction that doesn't correspond to a real machine instruction...
This provides a very simple, boring adaptor for a begin and end iterator into a range type...
Describe properties that are true of each instruction in the target description file.
bool mayStore(QueryType Type=AnyInBundle) const
Return true if this instruction could possibly modify memory.
bool hasRegisterImplicitUseOperand(unsigned Reg) const
Returns true if the MachineInstr has an implicit-use operand of exactly the given register (not consi...
MachineOperand * findRegisterUseOperand(unsigned Reg, bool isKill=false, const TargetRegisterInfo *TRI=nullptr)
Wrapper for findRegisterUseOperandIdx, it returns a pointer to the MachineOperand rather than an inde...
unsigned getOperandNo(const_mop_iterator I) const
Returns the number of the operand iterator I points to.
static bool isEqual(const MachineInstr *const &LHS, const MachineInstr *const &RHS)
bool isPredicable(QueryType Type=AllInBundle) const
Return true if this instruction has a predicate operand that controls execution.
bool readsVirtualRegister(unsigned Reg) const
Return true if the MachineInstr reads the specified virtual register.
bool hasOrderedMemoryRef() const
Return true if this instruction may have an ordered or volatile memory reference, or if the informati...
Template traits for intrusive list.
void clearAsmPrinterFlag(CommentFlag Flag)
Clear specific AsmPrinter flags.
Recycle small arrays allocated from a BumpPtrAllocator.
const MCInstrDesc & getDesc() const
Returns the target instruction descriptor of this MachineInstr.
bool isCFIInstruction() const
Manage lifetime of a slot tracker for printing IR.
iterator_range< mmo_iterator > memoperands()
MachineOperand & getOperand(unsigned i)
bool canFoldAsLoad(QueryType Type=IgnoreBundle) const
Return true for instructions that can be folded as memory operands in other instructions.
bool isConditionalBranch(QueryType Type=AnyInBundle) const
Return true if this is a branch which may fall through to the next instruction or may transfer contro...
iterator_range< mop_iterator > operands()
bool isExtractSubreg() const
void setPhysRegsDeadExcept(ArrayRef< unsigned > UsedRegs, const TargetRegisterInfo &TRI)
Mark every physreg used by this instruction as dead except those in the UsedRegs list.
bool isSelect(QueryType Type=IgnoreBundle) const
Return true if this instruction is a select instruction.
bool isTerminator(QueryType Type=AnyInBundle) const
Returns true if this instruction part of the terminator for a basic block.
const_mop_iterator operands_end() const
Special DenseMapInfo traits to compare MachineInstr* by value of the instruction rather than by point...
bool allDefsAreDead() const
Return true if all the defs of this instruction are dead.
const TargetRegisterClass * getRegClassConstraintEffect(unsigned OpIdx, const TargetRegisterClass *CurRC, const TargetInstrInfo *TII, const TargetRegisterInfo *TRI) const
Applies the constraints (def/use) implied by the OpIdx operand to the given CurRC.
bool isDereferenceableInvariantLoad(AliasAnalysis *AA) const
Return true if this load instruction never traps and points to a memory location whose value doesn't ...
void clearKillInfo()
Clears kill flags on all operands.
unsigned getBundleSize() const
Return the number of instructions inside the MI bundle, excluding the bundle header.
A description of a memory reference used in the backend.
bool getAsmPrinterFlag(CommentFlag Flag) const
Return whether an AsmPrinter flag is set.
iterator_range< const_mop_iterator > implicit_operands() const
struct fuzzer::@269 Flags
const HexagonInstrInfo * TII
bool isImm() const
isImm - Tests if this is a MO_Immediate operand.
std::pair< bool, bool > readsWritesVirtualRegister(unsigned Reg, SmallVectorImpl< unsigned > *Ops=nullptr) const
Return a pair of bools (reads, writes) indicating if this instruction reads or writes Reg...
bool isReg() const
isReg - Tests if this is a MO_Register operand.
void eraseFromParent()
Unlink 'this' from the containing basic block and delete it.
bool mayLoad(QueryType Type=AnyInBundle) const
Return true if this instruction could possibly read memory.
Reg
All possible values of the reg field in the ModR/M byte.
MachineMemOperand ** mmo_iterator
void bundleWithSucc()
Bundle this instruction with its successor.
INLINEASM - Represents an inline asm block.
void eraseFromParentAndMarkDBGValuesForRemoval()
Unlink 'this' from the containing basic block and delete it.
unsigned getNumOperands() const
Access to explicit operands of the instruction.
bool isBundledWithSucc() const
Return true if this instruction is part of a bundle, and it is not the last instruction in the bundle...
void unbundleFromPred()
Break bundle above this instruction.
bool hasTrivialDestructor() const
Check whether this has a trivial destructor.
void RemoveOperand(unsigned i)
Erase an operand from an instruction, leaving it with one fewer operand than it started with...
void copyImplicitOps(MachineFunction &MF, const MachineInstr &MI)
Copy implicit register operands from specified instruction to this instruction.
bool hasDelaySlot(QueryType Type=AnyInBundle) const
Returns true if the specified instruction has a delay slot which must be filled by the code generator...
uint8_t getAsmPrinterFlags() const
Return the asm printer flags bitvector.
bool isBundled() const
Return true if this instruction part of a bundle.
bool hasExtraSrcRegAllocReq(QueryType Type=AnyInBundle) const
Returns true if this instruction source operands have special register allocation requirements that a...
bool isBitcast(QueryType Type=IgnoreBundle) const
Return true if this instruction is a bitcast instruction.
static MachineInstr * getEmptyKey()
bool isCopyLike() const
Return true if the instruction behaves like a copy.
MachineBasicBlock * getParent()
void untieRegOperand(unsigned OpIdx)
Break any tie involving OpIdx.
void addMemOperand(MachineFunction &MF, MachineMemOperand *MO)
Add a MachineMemOperand to the machine instruction.
iterator_range< const_mop_iterator > uses() const
Returns a range that includes all operands that are register uses.
bool isConvergent(QueryType Type=AnyInBundle) const
Return true if this instruction is convergent.
void clearRegisterKills(unsigned Reg, const TargetRegisterInfo *RegInfo)
Clear all kill flags affecting Reg.
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
Flag
These should be considered private to the implementation of the MCInstrDesc class.
const MachineBasicBlock * getParent() const
TargetInstrInfo - Interface to description of machine instruction set.
bool isDebugValue() const
bool isImplicitDef() const
mmo_iterator memoperands_end() const
bool isInsertSubreg() const
unsigned findTiedOperandIdx(unsigned OpIdx) const
Given the index of a tied register operand, find the operand it is tied to.
static MachineInstr * getTombstoneKey()
An ilist node that can access its parent list.
bool isReturn(QueryType Type=AnyInBundle) const
The instances of the Type class are immutable: once they are created, they are never changed...
const MachineOperand * findRegisterUseOperand(unsigned Reg, bool isKill=false, const TargetRegisterInfo *TRI=nullptr) const
void clearRegisterDeads(unsigned Reg)
Clear all dead flags on operands defining register Reg.
int findRegisterDefOperandIdx(unsigned Reg, bool isDead=false, bool Overlap=false, const TargetRegisterInfo *TRI=nullptr) const
Returns the operand index that is a def of the specified register or -1 if it is not found...
bool isAsCheapAsAMove(QueryType Type=AllInBundle) const
Returns true if this instruction has the same cost (or less) than a move instruction.
bool isIndirectDebugValue() const
A DBG_VALUE is indirect iff the first operand is a register and the second operand is an immediate...
const MachineOperand & getOperand(unsigned i) const
bool isRegTiedToUseOperand(unsigned DefOpIdx, unsigned *UseOpIdx=nullptr) const
Given the index of a register def operand, check if the register def is tied to a source operand...
bool isIndirectBranch(QueryType Type=AnyInBundle) const
Return true if this is an indirect branch, such as a branch through a register.
void setFlag(MIFlag Flag)
Set a MI flag.
void clearFlag(MIFlag Flag)
clearFlag - Clear a MI flag.
int findInlineAsmFlagIdx(unsigned OpIdx, unsigned *GroupNo=nullptr) const
Find the index of the flag word operand that corresponds to operand OpIdx on an inline asm instructio...
unsigned getNumExplicitOperands() const
Returns the number of non-implicit operands.
bool isIdenticalTo(const MachineInstr &Other, MICheckType Check=CheckDefs) const
Return true if this instruction is identical to Other.
bool isVariadic(QueryType Type=IgnoreBundle) const
Return true if this instruction can have a variable number of operands.
iterator_range< mop_iterator > defs()
Returns a range over all explicit operands that are register definitions.
bool getFlag(MIFlag Flag) const
Return whether an MI flag is set.
bool hasOneMemOperand() const
Return true if this instruction has exactly one MachineMemOperand.
bool hasUnmodeledSideEffects() const
Return true if this instruction has side effects that are not modeled by mayLoad / mayStore...
bool registerDefIsDead(unsigned Reg, const TargetRegisterInfo *TRI=nullptr) const
Returns true if the register is dead in this machine instruction.
bool isBundledWithPred() const
Return true if this instruction is part of a bundle, and it is not the first instruction in the bundl...
bool isLabel() const
Returns true if the MachineInstr represents a label.
const DIExpression * getDebugExpression() const
Return the complex address expression referenced by this DBG_VALUE instruction.
unsigned getSubReg() const
static unsigned getHashValue(const MachineInstr *const &MI)
bool isNotDuplicable(QueryType Type=AnyInBundle) const
Return true if this instruction cannot be safely duplicated.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
void emitError(StringRef Msg) const
Emit an error referring to the source location of this instruction.
bool definesRegister(unsigned Reg, const TargetRegisterInfo *TRI=nullptr) const
Return true if the MachineInstr fully defines the specified register.
EH_LABEL - Represents a label in mid basic block used to track locations needed for debug and excepti...
void eraseFromBundle()
Unlink 'this' form its basic block and delete it.
iterator_range< mop_iterator > explicit_uses()
bool isInsertSubregLike(QueryType Type=IgnoreBundle) const
Return true if this instruction behaves the same way as the generic INSERT_SUBREG instructions...
bool isSafeToMove(AliasAnalysis *AA, bool &SawStore) const
Return true if it is safe to move this instruction.
const_mop_iterator operands_begin() const
iterator_range< T > make_range(T x, T y)
Convenience function for iterating over sub-ranges.
bool readsRegister(unsigned Reg, const TargetRegisterInfo *TRI=nullptr) const
Return true if the MachineInstr reads the specified register.
int findRegisterUseOperandIdx(unsigned Reg, bool isKill=false, const TargetRegisterInfo *TRI=nullptr) const
Returns the operand index that is a use of the specific register or -1 if it is not found...
MachineInstr * removeFromBundle()
Unlink this instruction from its basic block and return it without deleting it.
bool memoperands_empty() const
Return true if we don't have any memory operands which described the the memory access done by this i...
void setDesc(const MCInstrDesc &tid)
Replace the instruction descriptor (thus opcode) of the current instruction with a new one...
void substituteRegister(unsigned FromReg, unsigned ToReg, unsigned SubIdx, const TargetRegisterInfo &RegInfo)
Replace all occurrences of FromReg with ToReg:SubIdx, properly composing subreg indices where necessa...
void addOperand(MachineFunction &MF, const MachineOperand &Op)
Add the specified operand to the instruction.
bool isMSInlineAsm() const
void dropMemRefs()
Clear this MachineInstr's memory reference descriptor list.
void setFlags(unsigned flags)
MachineOperand class - Representation of each machine instruction operand.
bool hasExtraDefRegAllocReq(QueryType Type=AnyInBundle) const
Returns true if this instruction def operands have special register allocation requirements that are ...
MachineOperand * mop_iterator
iterator/begin/end - Iterate over all operands of a machine instruction.
bool isIdentityCopy() const
Return true is the instruction is an identity copy.
void dump(const TargetInstrInfo *TII=nullptr) const
bool isTransient() const
Return true if this is a transient instruction that is either very likely to be eliminated during reg...
bool isCompare(QueryType Type=IgnoreBundle) const
Return true if this instruction is a comparison.
void addRegisterDefined(unsigned Reg, const TargetRegisterInfo *RegInfo=nullptr)
We have determined MI defines a register.
A range adaptor for a pair of iterators.
const TargetRegisterClass * getRegClassConstraint(unsigned OpIdx, const TargetInstrInfo *TII, const TargetRegisterInfo *TRI) const
Compute the static register class constraint for operand OpIdx.
void setDebugLoc(DebugLoc dl)
Replace current source information with new such.
bool isSubregToReg() const
iterator_range< mop_iterator > implicit_operands()
void addImplicitDefUseOperands(MachineFunction &MF)
Add all implicit def and use operands to this instruction.
int findFirstPredOperandIdx() const
Find the index of the first operand in the operand list that is used to represent the predicate...
bool isExtractSubregLike(QueryType Type=IgnoreBundle) const
Return true if this instruction behaves the same way as the generic EXTRACT_SUBREG instructions...
const DebugLoc & getDebugLoc() const
Returns the debug location id of this MachineInstr.
QueryType
API for querying MachineInstr properties.
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
bool hasProperty(unsigned MCFlag, QueryType Type=AnyInBundle) const
Return true if the instruction (or in the case of a bundle, the instructions inside the bundle) has t...
Representation of each machine instruction.
uint64_t getFlags() const
Return flags of this instruction.
bool mayLoadOrStore(QueryType Type=AnyInBundle) const
Return true if this instruction could possibly read or modify memory.
std::pair< mmo_iterator, unsigned > mergeMemRefsWith(const MachineInstr &Other)
Return a set of memrefs (begin iterator, size) which conservatively describe the memory behavior of b...
bool isCall(QueryType Type=AnyInBundle) const
bool usesCustomInsertionHook(QueryType Type=IgnoreBundle) const
Return true if this instruction requires custom insertion support when the DAG scheduler is inserting...
uint8_t getFlags() const
Return the MI flags bitvector.
const TargetRegisterClass * getRegClassConstraintEffectForVReg(unsigned Reg, const TargetRegisterClass *CurRC, const TargetInstrInfo *TII, const TargetRegisterInfo *TRI, bool ExploreBundle=false) const
Applies the constraints (def/use) implied by this MI on Reg to the given CurRC.
raw_ostream & operator<<(raw_ostream &OS, const APInt &I)
MachineInstr * removeFromParent()
Unlink 'this' from the containing basic block, and return it without deleting it. ...
const DILocalVariable * getDebugVariable() const
Return the debug variable referenced by this DBG_VALUE instruction.
iterator_range< const_mop_iterator > explicit_operands() const
unsigned getReg() const
getReg - Returns the register number.
bool isCommutable(QueryType Type=IgnoreBundle) const
Return true if this may be a 2- or 3-address instruction (of the form "X = op Y, Z, ..."), which produces the same result if Y and Z are exchanged.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
bool killsRegister(unsigned Reg, const TargetRegisterInfo *TRI=nullptr) const
Return true if the MachineInstr kills the specified register.
void clearAsmPrinterFlags()
Clear the AsmPrinter bitvector.
void unbundleFromSucc()
Break bundle below this instruction.
unsigned isConstantValuePHI() const
If the specified instruction is a PHI that always merges together the same virtual register...
bool isRematerializable(QueryType Type=AllInBundle) const
Returns true if this instruction is a candidate for remat.
mop_iterator operands_begin()
std::underlying_type< E >::type Mask()
Get a bitmask with 1s in all places up to the high-order bit of E's largest value.
This class implements an extremely fast bulk output stream that can only output to a stream...
Callbacks do nothing by default in iplist and ilist.
bool isRegTiedToDefOperand(unsigned UseOpIdx, unsigned *DefOpIdx=nullptr) const
Return true if the use operand of the specified index is tied to a def operand.
bool addRegisterKilled(unsigned IncomingReg, const TargetRegisterInfo *RegInfo, bool AddIfNotFound=false)
We have determined MI kills a register.
StringRef - Represent a constant reference to a string, i.e.
iterator_range< const_mop_iterator > explicit_uses() const
void setMemRefs(std::pair< mmo_iterator, unsigned > NewMemRefs)
Assign this MachineInstr's memory reference descriptor list.
void setAsmPrinterFlag(uint8_t Flag)
Set a flag for the AsmPrinter.
CommentFlag
Flags to specify different kinds of comments to output in assembly code.
bool hasOptionalDef(QueryType Type=IgnoreBundle) const
Set if this instruction has an optional definition, e.g.
bool isStackAligningInlineAsm() const
bool isRegSequence() const
bool isMoveImmediate(QueryType Type=IgnoreBundle) const
Return true if this instruction is a move immediate (including conditional moves) instruction...
bool isRegSequenceLike(QueryType Type=IgnoreBundle) const
Return true if this instruction behaves the same way as the generic REG_SEQUENCE instructions.
InlineAsm::AsmDialect getInlineAsmDialect() const
void setMemRefs(mmo_iterator NewMemRefs, mmo_iterator NewMemRefsEnd)
Assign this MachineInstr's memory reference descriptor list.
const MachineOperand * const_mop_iterator
bool modifiesRegister(unsigned Reg, const TargetRegisterInfo *TRI) const
Return true if the MachineInstr modifies (fully define or partially define) the specified register...
bool isBarrier(QueryType Type=AnyInBundle) const
Returns true if the specified instruction stops control flow from executing the instruction immediate...
bool isUnconditionalBranch(QueryType Type=AnyInBundle) const
Return true if this is a branch which always transfers control flow to some other block...
mmo_iterator memoperands_begin() const
Access to memory operands of the instruction.
void tieOperands(unsigned DefIdx, unsigned UseIdx)
Add a tie between the register operands at DefIdx and UseIdx.