LLVM  4.0.0
Public Member Functions | Protected Member Functions | List of all members
llvm::InstructionSelector Class Referenceabstract

Provides the logic to select generic machine instructions. More...

#include <InstructionSelector.h>

Inheritance diagram for llvm::InstructionSelector:
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Public Member Functions

virtual ~InstructionSelector ()
 
virtual bool select (MachineInstr &I) const =0
 Select the (possibly generic) instruction I to only use target-specific opcodes. More...
 

Protected Member Functions

 InstructionSelector ()
 
bool constrainSelectedInstRegOperands (MachineInstr &I, const TargetInstrInfo &TII, const TargetRegisterInfo &TRI, const RegisterBankInfo &RBI) const
 Mutate the newly-selected instruction I to constrain its (possibly generic) virtual register operands to the instruction's register class. More...
 

Detailed Description

Provides the logic to select generic machine instructions.

Definition at line 26 of file InstructionSelector.h.

Constructor & Destructor Documentation

virtual llvm::InstructionSelector::~InstructionSelector ( )
inlinevirtual

Definition at line 28 of file InstructionSelector.h.

InstructionSelector::InstructionSelector ( )
protected

Definition at line 24 of file InstructionSelector.cpp.

Member Function Documentation

bool InstructionSelector::constrainSelectedInstRegOperands ( MachineInstr I,
const TargetInstrInfo TII,
const TargetRegisterInfo TRI,
const RegisterBankInfo RBI 
) const
protected

Mutate the newly-selected instruction I to constrain its (possibly generic) virtual register operands to the instruction's register class.

This could involve inserting COPYs before (for uses) or after (for defs). This requires the number of operands to match the instruction description.

Returns
whether operand regclass constraining succeeded.

Definition at line 26 of file InstructionSelector.cpp.

References assert(), llvm::constrainOperandRegClass(), llvm::dbgs(), DEBUG, llvm::MachineInstr::getDesc(), llvm::MachineInstr::getNumExplicitOperands(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getRegInfo(), llvm::TargetRegisterInfo::isPhysicalRegister(), llvm::MachineOperand::isReg(), MBB, MRI, and llvm::MachineOperand::setReg().

Referenced by llvm::ARMInstructionSelector::select(), and llvm::AArch64InstructionSelector::select().

virtual bool llvm::InstructionSelector::select ( MachineInstr I) const
pure virtual

Select the (possibly generic) instruction I to only use target-specific opcodes.

It is OK to insert multiple instructions, but they cannot be generic pre-isel instructions.

Returns
whether selection succeeded.
Precondition
I.getParent() && I.getParent()->getParent()
Postcondition
if returns true: for I in all mutated/inserted instructions: !isPreISelGenericOpcode(I.getOpcode())

Implemented in llvm::AArch64InstructionSelector, and llvm::ARMInstructionSelector.


The documentation for this class was generated from the following files: