LLVM  4.0.0
AntiDepBreaker.h
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1 //=- llvm/CodeGen/AntiDepBreaker.h - Anti-Dependence Breaking -*- C++ -*-=//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the AntiDepBreaker class, which implements
11 // anti-dependence breaking heuristics for post-register-allocation scheduling.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #ifndef LLVM_LIB_CODEGEN_ANTIDEPBREAKER_H
16 #define LLVM_LIB_CODEGEN_ANTIDEPBREAKER_H
17 
24 #include <vector>
25 
26 namespace llvm {
27 
28 /// This class works in conjunction with the post-RA scheduler to rename
29 /// registers to break register anti-dependencies (WAR hazards).
31 public:
32  typedef std::vector<std::pair<MachineInstr *, MachineInstr *> >
34 
35  virtual ~AntiDepBreaker();
36 
37  /// Initialize anti-dep breaking for a new basic block.
38  virtual void StartBlock(MachineBasicBlock *BB) =0;
39 
40  /// Identifiy anti-dependencies within a basic-block region and break them by
41  /// renaming registers. Return the number of anti-dependencies broken.
42  virtual unsigned BreakAntiDependencies(const std::vector<SUnit>& SUnits,
45  unsigned InsertPosIndex,
46  DbgValueVector &DbgValues) = 0;
47 
48  /// Update liveness information to account for the current
49  /// instruction, which will not be scheduled.
50  virtual void Observe(MachineInstr &MI, unsigned Count,
51  unsigned InsertPosIndex) = 0;
52 
53  /// Finish anti-dep breaking for a basic block.
54  virtual void FinishBlock() =0;
55 
56  /// Update DBG_VALUE if dependency breaker is updating
57  /// other machine instruction to use NewReg.
58  void UpdateDbgValue(MachineInstr &MI, unsigned OldReg, unsigned NewReg) {
59  assert(MI.isDebugValue() && "MI is not DBG_VALUE!");
60  if (MI.getOperand(0).isReg() && MI.getOperand(0).getReg() == OldReg)
61  MI.getOperand(0).setReg(NewReg);
62  }
63 };
64 
65 }
66 
67 #endif
This class works in conjunction with the post-RA scheduler to rename registers to break register anti...
bool isReg() const
isReg - Tests if this is a MO_Register operand.
bool isDebugValue() const
Definition: MachineInstr.h:777
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:279
static const unsigned End
#define LLVM_LIBRARY_VISIBILITY
LLVM_LIBRARY_VISIBILITY - If a class marked with this attribute is linked into a shared library...
Definition: Compiler.h:105
void UpdateDbgValue(MachineInstr &MI, unsigned OldReg, unsigned NewReg)
Update DBG_VALUE if dependency breaker is updating other machine instruction to use NewReg...
Representation of each machine instruction.
Definition: MachineInstr.h:52
void setReg(unsigned Reg)
Change the register this operand corresponds to.
unsigned getReg() const
getReg - Returns the register number.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
std::vector< std::pair< MachineInstr *, MachineInstr * > > DbgValueVector
IRTranslator LLVM IR MI