73 #define DEBUG_TYPE "isel"
75 STATISTIC(NumFastIselSuccessIndependent,
"Number of insts selected by "
76 "target-independent selector");
77 STATISTIC(NumFastIselSuccessTarget,
"Number of insts selected by "
78 "target-specific selector");
79 STATISTIC(NumFastIselDead,
"Number of dead insts removed on failure");
130 void FastISel::flushLocalValueMap() {
144 if (
const auto *Cast = dyn_cast<CastInst>(I))
157 if (
const auto *
GEP = dyn_cast<GetElementPtrInst>(I))
164 !(I->
getOpcode() == Instruction::BitCast ||
165 I->
getOpcode() == Instruction::PtrToInt ||
166 I->
getOpcode() == Instruction::IntToPtr) &&
195 if (isa<Instruction>(V) &&
196 (!isa<AllocaInst>(V) ||
204 Reg = materializeRegForValue(V, VT);
211 unsigned FastISel::materializeConstant(
const Value *V,
MVT VT) {
213 if (
const auto *CI = dyn_cast<ConstantInt>(V)) {
214 if (CI->getValue().getActiveBits() <= 64)
216 }
else if (isa<AllocaInst>(V))
218 else if (isa<ConstantPointerNull>(V))
223 else if (
const auto *CF = dyn_cast<ConstantFP>(V)) {
224 if (CF->isNullValue())
232 const APFloat &Flt = CF->getValueAPF();
243 unsigned IntegerReg =
250 }
else if (
const auto *
Op = dyn_cast<Operator>(V)) {
252 if (!isa<Instruction>(
Op) ||
256 }
else if (isa<UndefValue>(V)) {
259 TII.
get(TargetOpcode::IMPLICIT_DEF),
Reg);
267 unsigned FastISel::materializeRegForValue(
const Value *V,
MVT VT) {
270 if (isa<Constant>(V))
276 Reg = materializeConstant(V, VT);
299 if (!isa<Instruction>(I)) {
305 if (AssignedReg == 0)
308 else if (Reg != AssignedReg) {
310 for (
unsigned i = 0;
i < NumRegs;
i++)
321 return std::pair<unsigned, bool>(0,
false);
328 if (IdxVT.
bitsLT(PtrVT)) {
332 }
else if (IdxVT.
bitsGT(PtrVT)) {
337 return std::pair<unsigned, bool>(IdxN, IdxNIsKill);
357 "Invalid iterator!");
407 if (
const auto *CI = dyn_cast<ConstantInt>(I->
getOperand(0)))
408 if (isa<Instruction>(I) && cast<Instruction>(
I)->isCommutative()) {
431 if (
const auto *CI = dyn_cast<ConstantInt>(I->
getOperand(1))) {
432 uint64_t Imm = CI->getSExtValue();
435 if (ISDOpcode ==
ISD::SDIV && isa<BinaryOperator>(I) &&
442 if (ISDOpcode ==
ISD::UREM && isa<BinaryOperator>(I) &&
465 ISDOpcode, Op0, Op0IsKill, Op1, Op1IsKill);
484 uint64_t TotalOffs = 0;
486 uint64_t MaxOffs = 2048;
490 const Value *Idx = GTI.getOperand();
491 if (
StructType *StTy = GTI.getStructTypeOrNull()) {
492 uint64_t
Field = cast<ConstantInt>(Idx)->getZExtValue();
496 if (TotalOffs >= MaxOffs) {
505 Type *Ty = GTI.getIndexedType();
508 if (
const auto *CI = dyn_cast<ConstantInt>(Idx)) {
512 uint64_t IdxN = CI->getValue().sextOrTrunc(64).getSExtValue();
514 if (TotalOffs >= MaxOffs) {
534 unsigned IdxN = Pair.first;
535 bool IdxNIsKill = Pair.second;
539 if (ElementSize != 1) {
562 const CallInst *CI,
unsigned StartIdx) {
566 if (
const auto *
C = dyn_cast<ConstantInt>(Val)) {
569 }
else if (isa<ConstantPointerNull>(Val)) {
572 }
else if (
auto *AI = dyn_cast<AllocaInst>(Val)) {
595 "Stackmap cannot return a value.");
611 "Expected a constant integer.");
616 "Expected a constant integer.");
617 const auto *NumBytes =
623 if (!addStackMapLiveVars(Ops, I, 2))
632 for (
unsigned i = 0; ScratchRegs[
i]; ++
i)
634 ScratchRegs[
i],
true,
true,
false,
635 false,
false,
true));
641 const MCInstrDesc &MCID = Builder.getInstr()->getDesc();
642 for (
unsigned I = 0,
E = MCID.getNumOperands(); I <
E; ++
I)
647 TII.
get(TargetOpcode::STACKMAP));
648 for (
auto const &MO : Ops)
668 bool FastISel::lowerCallOperands(
const CallInst *CI,
unsigned ArgIdx,
669 unsigned NumArgs,
const Value *Callee,
670 bool ForceRetVoidTy, CallLoweringInfo &CLI) {
672 Args.reserve(NumArgs);
677 for (
unsigned ArgI = ArgIdx, ArgE = ArgIdx + NumArgs, AttrI = ArgIdx + 1;
678 ArgI != ArgE; ++ArgI) {
686 Entry.setAttributes(&CS, AttrI);
687 Args.push_back(Entry);
692 CLI.setCallee(CI->
getCallingConv(), RetTy, Callee, std::move(Args), NumArgs);
703 return setCallee(CC, ResultTy, Sym, std::move(ArgsList), FixedArgs);
720 "Expected a constant integer.");
721 const auto *NumArgsVal =
723 unsigned NumArgs = NumArgsVal->getZExtValue();
729 "Not enough arguments provided to the patchpoint intrinsic");
732 unsigned NumCallArgs = IsAnyRegCC ? 0 : NumArgs;
735 if (!lowerCallOperands(I, NumMetaOpers, NumCallArgs, Callee, IsAnyRegCC, CLI))
738 assert(CLI.
Call &&
"No call instruction specified.");
743 if (IsAnyRegCC && HasDef) {
752 "Expected a constant integer.");
757 "Expected a constant integer.");
758 const auto *NumBytes =
763 if (
const auto *
C = dyn_cast<IntToPtrInst>(Callee)) {
764 uint64_t CalleeConstAddr =
765 cast<ConstantInt>(
C->getOperand(0))->getZExtValue();
767 }
else if (
const auto *
C = dyn_cast<ConstantExpr>(Callee)) {
768 if (
C->getOpcode() == Instruction::IntToPtr) {
769 uint64_t CalleeConstAddr =
770 cast<ConstantInt>(
C->getOperand(0))->getZExtValue();
774 }
else if (
const auto *GV = dyn_cast<GlobalValue>(Callee)) {
776 }
else if (isa<ConstantPointerNull>(Callee))
783 unsigned NumCallRegArgs = IsAnyRegCC ? NumArgs : CLI.
OutRegs.
size();
792 for (
unsigned i = NumMetaOpers, e = NumMetaOpers + NumArgs;
i != e; ++
i) {
805 if (!addStackMapLiveVars(Ops, I, NumMetaOpers + NumArgs))
814 for (
unsigned i = 0; ScratchRegs[
i]; ++
i)
816 ScratchRegs[
i],
true,
true,
false,
817 false,
false,
true));
820 for (
auto Reg : CLI.
InRegs)
826 TII.
get(TargetOpcode::PATCHPOINT));
876 Args.reserve(NumArgs);
880 for (
unsigned ArgI = 0; ArgI != NumArgs; ++ArgI) {
888 Entry.setAttributes(&CS, ArgI + 1);
889 Args.push_back(Entry);
893 CLI.
setCallee(RetTy, FTy, Symbol, std::move(Args), CS, NumArgs);
914 for (
unsigned I = 0,
E = RetTys.
size();
I !=
E; ++
I) {
918 for (
unsigned i = 0;
i != NumRegs; ++
i) {
920 MyFlags.
VT = RegisterVT;
935 for (
auto &Arg : CLI.
getArgs()) {
936 Type *FinalType = Arg.Ty;
938 FinalType = cast<PointerType>(Arg.Ty)->getElementType();
953 if (Arg.IsSwiftError)
957 if (Arg.IsInAlloca) {
966 if (Arg.IsByVal || Arg.IsInAlloca) {
972 unsigned FrameAlign = Arg.Alignment;
985 CLI.
OutVals.push_back(Arg.Val);
993 assert(CLI.
Call &&
"No call instruction specified.");
1025 Args.push_back(Entry);
1036 .setTailCall(IsTailCall);
1048 if (IA->hasSideEffects())
1049 flushLocalValueMap();
1052 if (!IA->getConstraintString().empty())
1055 unsigned ExtraInfo = 0;
1056 if (IA->hasSideEffects())
1058 if (IA->isAlignStack())
1063 .addExternalSymbol(IA->getAsmString().c_str())
1072 if (
const auto *II = dyn_cast<IntrinsicInst>(Call))
1082 flushLocalValueMap();
1092 case Intrinsic::lifetime_start:
1093 case Intrinsic::lifetime_end:
1095 case Intrinsic::donothing:
1097 case Intrinsic::assume:
1099 case Intrinsic::dbg_declare: {
1103 DEBUG(
dbgs() <<
"Dropping debug info for " << *DI <<
"\n");
1108 if (!Address || isa<UndefValue>(Address)) {
1109 DEBUG(
dbgs() <<
"Dropping debug info for " << *DI <<
"\n");
1115 if (
const auto *Arg = dyn_cast<Argument>(Address))
1136 (!isa<AllocaInst>(Address) ||
1143 "Expected inlined-at fields to agree");
1147 TII.
get(TargetOpcode::DBG_VALUE),
false, Op->
getReg(), 0,
1151 TII.
get(TargetOpcode::DBG_VALUE))
1159 DEBUG(
dbgs() <<
"Dropping debug info for " << *DI <<
"\n");
1163 case Intrinsic::dbg_value: {
1169 "Expected inlined-at fields to agree");
1178 }
else if (
const auto *CI = dyn_cast<ConstantInt>(V)) {
1179 if (CI->getBitWidth() > 64)
1187 .
addImm(CI->getZExtValue())
1191 }
else if (
const auto *CF = dyn_cast<ConstantFP>(V)) {
1205 DEBUG(
dbgs() <<
"Dropping debug info for " << *DI <<
"\n");
1209 case Intrinsic::objectsize: {
1211 unsigned long long Res = CI->
isZero() ? -1ULL : 0;
1219 case Intrinsic::invariant_group_barrier:
1220 case Intrinsic::expect: {
1227 case Intrinsic::experimental_stackmap:
1229 case Intrinsic::experimental_patchpoint_void:
1230 case Intrinsic::experimental_patchpoint_i64:
1262 Opcode, InputReg, InputRegIsKill);
1296 unsigned ResultReg = 0;
1297 if (SrcVT == DstVT) {
1301 if (SrcClass == DstClass) {
1304 TII.
get(TargetOpcode::COPY), ResultReg).addReg(Op0);
1321 void FastISel::removeDeadLocalValueCode(
MachineInstr *SavedLastLocalValue)
1324 if (CurLastLocalValue != SavedLastLocalValue) {
1329 if (SavedLastLocalValue)
1342 if (isa<TerminatorInst>(I)) {
1343 if (!handlePHINodesInSuccessorBlocks(I->
getParent())) {
1348 removeDeadLocalValueCode(SavedLastLocalValue);
1355 for (
unsigned i = 0, e = CS.getNumOperandBundles();
i != e; ++
i)
1363 if (
const auto *
Call = dyn_cast<CallInst>(I)) {
1376 Call->hasFnAttr(
"trap-func-name"))
1383 ++NumFastIselSuccessIndependent;
1395 ++NumFastIselSuccessTarget;
1406 if (isa<TerminatorInst>(I)) {
1409 removeDeadLocalValueCode(SavedLastLocalValue);
1443 if (TrueMBB != FalseMBB) {
1465 OpReg, OpRegIsKill);
1491 IntResultReg,
true);
1520 ResultReg = I->second;
1521 else if (isa<Instruction>(Op0))
1532 for (
unsigned i = 0;
i < VTIndex;
i++)
1543 case Instruction::FAdd:
1545 case Instruction::Sub:
1547 case Instruction::FSub:
1552 case Instruction::Mul:
1554 case Instruction::FMul:
1556 case Instruction::SDiv:
1558 case Instruction::UDiv:
1560 case Instruction::FDiv:
1562 case Instruction::SRem:
1564 case Instruction::URem:
1566 case Instruction::FRem:
1568 case Instruction::Shl:
1570 case Instruction::LShr:
1572 case Instruction::AShr:
1581 case Instruction::GetElementPtr:
1584 case Instruction::Br: {
1599 case Instruction::Unreachable:
1605 case Instruction::Alloca:
1616 case Instruction::BitCast:
1619 case Instruction::FPToSI:
1621 case Instruction::ZExt:
1623 case Instruction::SExt:
1625 case Instruction::Trunc:
1627 case Instruction::SIToFP:
1630 case Instruction::IntToPtr:
1631 case Instruction::PtrToInt: {
1645 case Instruction::ExtractValue:
1648 case Instruction::PHI:
1660 : FuncInfo(FuncInfo),
MF(FuncInfo.
MF),
MRI(FuncInfo.
MF->getRegInfo()),
1661 MFI(FuncInfo.
MF->getFrameInfo()),
MCP(*FuncInfo.
MF->getConstantPool()),
1662 TM(FuncInfo.
MF->getTarget()),
DL(
MF->getDataLayout()),
1663 TII(*
MF->getSubtarget().getInstrInfo()),
1664 TLI(*
MF->getSubtarget().getTargetLowering()),
1665 TRI(*
MF->getSubtarget().getRegisterInfo()), LibInfo(LibInfo),
1666 SkipTargetIndependentISel(SkipTargetIndependentISel) {}
1710 bool Op0IsKill, uint64_t Imm,
MVT ImmType) {
1728 unsigned ResultReg =
fastEmit_ri(VT, VT, Opcode, Op0, Op0IsKill, Imm);
1732 bool IsImmKill =
true;
1749 return fastEmit_rr(VT, VT, Opcode, Op0, Op0IsKill, MaterialReg, IsImmKill);
1766 TII.
get(TargetOpcode::COPY), NewOp).addReg(Op);
1805 bool Op0IsKill,
unsigned Op1,
1829 bool Op0IsKill,
unsigned Op1,
1830 bool Op1IsKill,
unsigned Op2,
1857 bool Op0IsKill, uint64_t Imm) {
1879 bool Op0IsKill, uint64_t Imm1,
1923 bool Op0IsKill,
unsigned Op1,
1924 bool Op1IsKill, uint64_t Imm) {
1967 "Cannot yet extract from physregs");
1987 bool FastISel::handlePHINodesInSuccessorBlocks(
const BasicBlock *LLVMBB) {
1997 if (!isa<PHINode>(SuccBB->
begin()))
2003 if (!SuccsHandled.
insert(SuccMBB).second)
2015 if (PN->use_empty())
2033 const Value *PHIOp = PN->getIncomingValueForBlock(LLVMBB);
2037 DbgLoc = PN->getDebugLoc();
2038 if (
const auto *Inst = dyn_cast<Instruction>(PHIOp))
2039 DbgLoc = Inst->getDebugLoc();
2056 "tryToFoldLoad expected a LoadInst with a single use");
2060 unsigned MaxUsers = 6;
2063 while (TheUser != FoldInst &&
2076 if (TheUser != FoldInst)
2112 if (!isa<AddOperator>(Add))
2119 if (isa<Instruction>(Add) &&
2123 return isa<ConstantInt>(cast<AddOperator>(
Add)->getOperand(1));
2134 if (
const auto *LI = dyn_cast<LoadInst>(I)) {
2135 Alignment = LI->getAlignment();
2136 IsVolatile = LI->isVolatile();
2138 Ptr = LI->getPointerOperand();
2139 ValTy = LI->getType();
2140 }
else if (
const auto *
SI = dyn_cast<StoreInst>(I)) {
2141 Alignment =
SI->getAlignment();
2142 IsVolatile =
SI->isVolatile();
2144 Ptr =
SI->getPointerOperand();
2145 ValTy =
SI->getValueOperand()->getType();
2151 bool IsDereferenceable =
2167 if (IsDereferenceable)
2173 Alignment, AAInfo, Ranges);
2182 switch (Predicate) {
void setHasStackMap(bool s=true)
BITCAST - This operator converts between integer, vector and FP values, as if the value was stored to...
unsigned fastEmitInst_rrr(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, unsigned Op2, bool Op2IsKill)
Emit a MachineInstr with three register operands and a result register in the given register class...
const Value * getCalledValue() const
Get a pointer to the function that is invoked by this instruction.
void setByValAlign(unsigned A)
void push_back(const T &Elt)
A parsed version of the target data layout string in and methods for querying it. ...
This class is the base class for the comparison instructions.
std::vector< ArgListEntry > ArgListTy
unsigned fastEmitZExtFromI1(MVT VT, unsigned Op0, bool Op0IsKill)
Emit MachineInstrs to compute the value of Op with all but the least significant bit set to zero...
MachineInstr * getParent()
getParent - Return the instruction that this operand belongs to.
LLVMContext & getContext() const
getContext - Return a reference to the LLVMContext associated with this function. ...
MachineConstantPool & MCP
bool lowerCall(const CallInst *I)
static const Value * getFNegArgument(const Value *BinOp)
STATISTIC(NumFunctions,"Total number of functions")
unsigned OrigNumPHINodesToUpdate
virtual unsigned fastMaterializeConstant(const Constant *C)
Emit a constant in a register using target-specific logic, such as constant pool loads.
unsigned getNumRegisters(LLVMContext &Context, EVT VT) const
Return the number of registers that this ValueType will eventually require.
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Intrinsic::ID getIntrinsicID() const
Return the intrinsic ID of this intrinsic.
CmpInst::Predicate optimizeCmpPredicate(const CmpInst *CI) const
unsigned getNumDefs() const
Return the number of MachineOperands that are register definitions.
unsigned createVirtualRegister(const TargetRegisterClass *RegClass)
createVirtualRegister - Create and return a new virtual register in the function with the specified r...
bool selectGetElementPtr(const User *I)
void leaveLocalValueArea(SavePoint Old)
Reset InsertPt to the given old insert position.
Describe properties that are true of each instruction in the target description file.
static bool isVirtualRegister(unsigned Reg)
Return true if the specified register number is in the virtual register namespace.
bool selectStackmap(const CallInst *I)
This class represents a function call, abstracting a target machine's calling convention.
virtual bool tryToFoldLoadIntoMI(MachineInstr *, unsigned, const LoadInst *)
The specified machine instr operand is a vreg, and that vreg is being provided by the specified load ...
void setAttributes(ImmutableCallSite *CS, unsigned AttrIdx)
Set CallLoweringInfo attribute flags based on a call instruction and called function attributes...
gep_type_iterator gep_type_end(const User *GEP)
0 1 0 0 True if ordered and less than
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
MachineMemOperand * createMachineMemOperandFor(const Instruction *I) const
Create a machine mem operand from the given instruction.
unsigned getSizeInBits() const
virtual bool functionArgumentNeedsConsecutiveRegisters(Type *Ty, CallingConv::ID CallConv, bool isVarArg) const
For some targets, an LLVM struct type must be broken down into multiple simple types, but the calling convention specifies that the entire struct must be passed in a block of consecutive registers.
1 1 1 0 True if unordered or not equal
void addSuccessorWithoutProb(MachineBasicBlock *Succ)
Add Succ as a successor of this MachineBasicBlock.
virtual unsigned fastEmit_(MVT VT, MVT RetVT, unsigned Opcode)
This method is called by target-independent code to request that an instruction with the given type a...
Type * getReturnType() const
Returns the type of the ret val.
void setInConsecutiveRegs()
SmallVector< unsigned, 4 > InRegs
An instruction for reading from memory.
bool CanLowerReturn
CanLowerReturn - true iff the function's return value can be lowered to registers.
Type * getElementType() const
virtual unsigned fastEmit_i(MVT VT, MVT RetVT, unsigned Opcode, uint64_t Imm)
This method is called by target-independent code to request that an instruction with the given type...
virtual unsigned fastMaterializeFloatZero(const ConstantFP *CF)
Emit the floating-point constant +0.0 in a register using target- specific logic. ...
void setPhysRegsDeadExcept(ArrayRef< unsigned > UsedRegs, const TargetRegisterInfo &TRI)
Mark every physreg used by this instruction as dead except those in the UsedRegs list.
uint64_t getOffset() const
bool bitsLT(EVT VT) const
bitsLT - Return true if this has less bits than VT.
unsigned arg_size() const
void computeUsesVAFloatArgument(const CallInst &I, MachineModuleInfo &MMI)
Determine if any floating-point values are being passed to this variadic function, and set the MachineModuleInfo's usesVAFloatArgument flag if so.
virtual bool fastLowerCall(CallLoweringInfo &CLI)
This method is called by target-independent code to do target- specific call lowering.
static Constant * getNullValue(Type *Ty)
Constructor to create a '0' constant of arbitrary type.
StringRef getName() const
Return a constant reference to the value's name.
iterator begin()
Instruction iterator methods.
bool selectInstruction(const Instruction *I)
Do "fast" instruction selection for the given LLVM IR instruction and append the generated machine in...
static MCDisassembler::DecodeStatus addOperand(MCInst &Inst, const MCOperand &Opnd)
unsigned fastEmitInst_rii(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, uint64_t Imm1, uint64_t Imm2)
Emit a MachineInstr with one register operand and two immediate operands.
1 0 0 1 True if unordered or equal
Value * getAddress() const
DenseMap< const Value *, unsigned > LocalValueMap
unsigned fastEmitInst_ri(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, uint64_t Imm)
Emit a MachineInstr with a register operand, an immediate, and a result register in the given registe...
void setLastLocalValue(MachineInstr *I)
Update the position of the last instruction emitted for materializing constants for use in the curren...
1 0 0 0 True if unordered: isnan(X) | isnan(Y)
unsigned fastEmitInst_rri(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, uint64_t Imm)
Emit a MachineInstr with two register operands, an immediate, and a result register in the given regi...
bool isUnconditional() const
A description of a memory reference used in the backend.
unsigned getCallFrameDestroyOpcode() const
void setHasPatchPoint(bool s=true)
struct fuzzer::@269 Flags
const StructLayout * getStructLayout(StructType *Ty) const
Returns a StructLayout object, indicating the alignment of the struct, its size, and the offsets of i...
static MachineOperand CreateReg(unsigned Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false)
Shift and rotation operations.
Class to represent struct types.
A Use represents the edge between a Value definition and its users.
bool hasOptimizedCodeGen(LibFunc::Func F) const
Tests if the function is both available and a candidate for optimized code generation.
unsigned fastEmitInst_i(unsigned MachineInstrOpcode, const TargetRegisterClass *RC, uint64_t Imm)
Emit a MachineInstr with a single immediate operand, and a result register in the given register clas...
bool canFoldAddIntoGEP(const User *GEP, const Value *Add)
Check if Add is an add that can be safely folded into GEP.
DenseMap< const Value *, unsigned > ValueMap
ValueMap - Since we emit code for the function a basic block at a time, we must remember which virtua...
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
bool isReg() const
isReg - Tests if this is a MO_Register operand.
unsigned getNumArgOperands() const
Return the number of call arguments.
void eraseFromParent()
Unlink 'this' from the containing basic block and delete it.
unsigned fastEmitInst_r(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill)
Emit a MachineInstr with one register operand and a result register in the given register class...
MachineInstr * EmitStartPt
The top most instruction in the current block that is allowed for emitting local variables.
const TargetRegisterClass * getRegClass(unsigned Reg) const
Return the register class of the specified virtual register.
Reg
All possible values of the reg field in the ModR/M byte.
0 1 0 1 True if ordered and less than or equal
The memory access is dereferenceable (i.e., doesn't trap).
static MachineOperand CreateRegMask(const uint32_t *Mask)
CreateRegMask - Creates a register mask operand referencing Mask.
bool hasDebugInfo() const
Returns true if valid debug info is present.
void setByValSize(unsigned S)
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
INLINEASM - Represents an inline asm block.
bool selectIntrinsicCall(const IntrinsicInst *II)
bool selectCast(const User *I, unsigned Opcode)
Context object for machine code objects.
int getArgumentFrameIndex(const Argument *A)
getArgumentFrameIndex - Get frame index for the byval argument.
virtual unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const
Insert branch code into the end of the specified MachineBasicBlock.
Class to represent function types.
SmallVector< ISD::InputArg, 4 > Ins
unsigned constrainOperandRegClass(const MCInstrDesc &II, unsigned Op, unsigned OpNum)
Try to constrain Op so that it is usable by argument OpNum of the provided MCInstrDesc.
[SU]INT_TO_FP - These operators convert integers (whose interpreted sign depends on the first letter)...
bool selectOperator(const User *I, unsigned Opcode)
Do "fast" instruction selection for the given LLVM IR operator (Instruction or ConstantExpr), and append generated machine instructions to the current block.
LLVMContext & getContext() const
Return the LLVMContext in which this type was uniqued.
void GetReturnInfo(Type *ReturnType, AttributeSet attr, SmallVectorImpl< ISD::OutputArg > &Outs, const TargetLowering &TLI, const DataLayout &DL)
Given an LLVM IR type and return type attributes, compute the return value EVTs and flags...
unsigned getCallFrameSetupOpcode() const
These methods return the opcode of the frame setup/destroy instructions if they exist (-1 otherwise)...
unsigned getRegForValue(const Value *V)
Create a virtual register and arrange for it to be assigned the value for the given LLVM value...
Simple integer binary arithmetic operators.
BasicBlock * getSuccessor(unsigned i) const
unsigned fastEmitInst_(unsigned MachineInstOpcode, const TargetRegisterClass *RC)
Emit a MachineInstr with no operands and a result register in the given register class.
EVT getValueType(const DataLayout &DL, Type *Ty, bool AllowUnknown=false) const
Return the EVT corresponding to this LLVM type.
bool hasTrivialKill(const Value *V)
Test whether the given value has exactly one use.
MCContext & getContext() const
void setOrigAlign(unsigned A)
virtual const MCPhysReg * getScratchRegisters(CallingConv::ID CC) const
Returns a 0 terminated array of registers that can be safely used as scratch registers.
MachineInstr * getLastLocalValue()
Return the position of the last instruction emitted for materializing constants for use in the curren...
void ComputeValueVTs(const TargetLowering &TLI, const DataLayout &DL, Type *Ty, SmallVectorImpl< EVT > &ValueVTs, SmallVectorImpl< uint64_t > *Offsets=nullptr, uint64_t StartingOffset=0)
ComputeValueVTs - Given an LLVM IR type, compute a sequence of EVTs that represent all the individual...
const TargetRegisterClass * constrainRegClass(unsigned Reg, const TargetRegisterClass *RC, unsigned MinNumRegs=0)
constrainRegClass - Constrain the register class of the specified virtual register to be a common sub...
Class to represent pointers.
unsigned getKillRegState(bool B)
const BasicBlock * getBasicBlock() const
Return the LLVM basic block that this instance corresponded to originally.
static GCRegistry::Add< CoreCLRGC > E("coreclr","CoreCLR-compatible GC")
FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.
unsigned lookUpRegForValue(const Value *V)
Look up the value to see if its value is already cached in a register.
const MachineBasicBlock * getParent() const
uint64_t getElementOffset(unsigned Idx) const
unsigned getNumSuccessors() const
Return the number of successors that this terminator has.
The memory access is volatile.
bool getLibFunc(StringRef funcName, LibFunc::Func &F) const
Searches for a particular function name.
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
bool isTypeLegal(EVT VT) const
Return true if the target has native support for the specified value type.
FunctionType * getFunctionType() const
Subclasses of this class are all able to terminate a basic block.
* if(!EatIfPresent(lltok::kw_thread_local)) return false
ParseOptionalThreadLocal := /*empty.
std::vector< std::pair< MachineInstr *, unsigned > > PHINodesToUpdate
PHINodesToUpdate - A list of phi instructions whose operand list will be updated after processing the...
CallLoweringInfo & setCallee(Type *ResultTy, FunctionType *FuncTy, const Value *Target, ArgListTy &&ArgsList, ImmutableCallSite &Call)
MVT - Machine Value Type.
LLVM Basic Block Representation.
The instances of the Type class are immutable: once they are created, they are never changed...
BasicBlock * getSuccessor(unsigned idx) const
Return the specified successor.
DIExpression * getExpression() const
Simple binary floating point operators.
Conditional or Unconditional Branch instruction.
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
This is an important base class in LLVM.
void removeDeadCode(MachineBasicBlock::iterator I, MachineBasicBlock::iterator E)
Remove all dead instructions between the I and E.
SmallVector< ISD::ArgFlagsTy, 16 > OutFlags
APInt Or(const APInt &LHS, const APInt &RHS)
Bitwise OR function for APInt.
ConstantFP - Floating Point Values [float, double].
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
APInt Xor(const APInt &LHS, const APInt &RHS)
Bitwise XOR function for APInt.
const MCPhysReg * ImplicitDefs
unsigned getOperandNo() const
getOperandNo - Return the operand # of this MachineOperand in its MachineInstr.
virtual unsigned fastEmit_r(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, bool Op0IsKill)
This method is called by target-independent code to request that an instruction with the given type...
const DebugLoc & getDebugLoc() const
Return the debug location for this node as a DebugLoc.
bool SkipTargetIndependentISel
constexpr bool isPowerOf2_64(uint64_t Value)
isPowerOf2_64 - This function returns true if the argument is a power of two 0 (64 bit edition...
static Type * getVoidTy(LLVMContext &C)
bool tryToFoldLoad(const LoadInst *LI, const Instruction *FoldInst)
We're checking to see if we can fold LI into FoldInst.
uint16_t getParamAlignment(uint16_t i) const
Extract the alignment for a call or parameter (0=unknown).
bool lowerArguments()
Do "fast" instruction selection for function arguments and append the machine instructions to the cur...
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset, unsigned char TargetFlags=0)
TRAP - Trapping instruction.
Value * getOperand(unsigned i) const
MVT getRegisterType(MVT VT) const
Return the type of registers that this ValueType will eventually require.
0 1 1 1 True if ordered (no nans)
The memory access is non-temporal.
Class to represent integer types.
Predicate getPredicate() const
Return the predicate for this instruction.
opStatus convertToInteger(integerPart *Input, unsigned int Width, bool IsSigned, roundingMode RM, bool *IsExact) const
const TargetRegisterInfo & TRI
1 1 1 1 Always true (always folded)
static AttributeSet getReturnAttrs(FastISel::CallLoweringInfo &CLI)
Returns an AttributeSet representing the attributes applied to the return value of the given call...
EVT - Extended Value Type.
Type * getType() const
getType - Return the type of the instruction that generated this call site
virtual unsigned getByValTypeAlignment(Type *Ty, const DataLayout &DL) const
Return the desired alignment for ByVal or InAlloca aggregate function arguments in the caller paramet...
LLVMContext & getContext() const
All values hold a context through their type.
bool selectFNeg(const User *I)
Emit an FNeg operation.
This class contains a discriminated union of information about pointers in memory operands...
1 1 0 1 True if unordered, less than, or equal
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
SmallVector< Value *, 16 > OutVals
const MCInstrDesc & get(unsigned Opcode) const
Return the machine instruction descriptor that corresponds to the specified instruction opcode...
const TargetInstrInfo & TII
MachineBasicBlock * MBB
MBB - The current block.
bool isInTailCallPosition(ImmutableCallSite CS, const TargetMachine &TM)
Test if the given instruction is in a position to be optimized with a tail-call.
MachineInstr * LastLocalValue
The position of the last instruction for materializing constants for use in the current block...
EH_LABEL - Represents a label in mid basic block used to track locations needed for debug and excepti...
void recomputeInsertPt()
Reset InsertPt to prepare for inserting instructions into the current block.
The memory access writes data.
bool bitsGT(EVT VT) const
bitsGT - Return true if this has more bits than VT.
IntegerType * getIntPtrType(LLVMContext &C, unsigned AddressSpace=0) const
Returns an integer type with size at least as big as that of a pointer in the given address space...
0 0 1 0 True if ordered and greater than
unsigned getABITypeAlignment(Type *Ty) const
Returns the minimum ABI-required alignment for the specified type.
static IntegerType * get(LLVMContext &C, unsigned NumBits)
This static method is the primary way of constructing an IntegerType.
DIExpression * getExpression() const
virtual unsigned fastEmit_rr(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill)
This method is called by target-independent code to request that an instruction with the given type...
Iterator for intrusive lists based on ilist_node.
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements...
void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
This is the shared class of boolean and integer constants.
InstrTy * getInstruction() const
uint64_t getTypeAllocSize(Type *Ty) const
Returns the offset in bytes between successive objects of the specified type, including alignment pad...
virtual unsigned fastEmit_ri(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, bool Op0IsKill, uint64_t Imm)
This method is called by target-independent code to request that an instruction with the given type...
DenseMap< unsigned, unsigned > RegFixups
RegFixups - Registers which need to be replaced after isel is done.
1 1 0 0 True if unordered or less than
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small...
Type * getType() const
All values are typed, get the type of this value.
Instruction * user_back()
Specialize the methods defined in Value, as we know that an instruction can only be used by other ins...
Provides information about what library functions are available for the current target.
MDNode * getMetadata(unsigned KindID) const
Get the metadata of given kind attached to this Instruction.
const MachineInstrBuilder & addCImm(const ConstantInt *Val) const
Predicate
Predicate - These are "(BI << 5) | BO" for various predicates.
void finishCondBranch(const BasicBlock *BranchBB, MachineBasicBlock *TrueMBB, MachineBasicBlock *FalseMBB)
Emit an unconditional branch to FalseMBB, obtains the branch weight and adds TrueMBB and FalseMBB to ...
bool isVolatile() const
Return true if this is a load from a volatile memory location.
const TargetLibraryInfo * LibInfo
A collection of metadata nodes that might be associated with a memory access used by the alias-analys...
bool hasOneUse(unsigned RegNo) const
hasOneUse - Return true if there is exactly one instruction using the specified register.
Value * stripPointerCasts()
Strip off pointer casts, all-zero GEPs, and aliases.
unsigned fastEmitInst_rr(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill)
Emit a MachineInstr with two register operands and a result register in the given register class...
static Constant * get(Type *Ty, uint64_t V, bool isSigned=false)
If Ty is a vector type, return a Constant with a splat of the given value.
Function * getCalledFunction() const
Return the function called, or null if this is an indirect function invocation.
void updateValueMap(const Value *I, unsigned Reg, unsigned NumRegs=1)
Update the value map to include the new mapping for this instruction, or insert an extra copy to get ...
bool isZero() const
This is just a convenience method to make client code smaller for a common code.
Intrinsic::ID getIntrinsicID() const LLVM_READONLY
getIntrinsicID - This method returns the ID number of the specified function, or Intrinsic::not_intri...
static GCRegistry::Add< ShadowStackGC > C("shadow-stack","Very portable GC for uncooperative code generators")
void startNewBlock()
Set the current block to which generated machine instructions will be appended, and clear the local C...
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Value * getArgOperand(unsigned i) const
getArgOperand/setArgOperand - Return/set the i-th call argument.
bool selectBitCast(const User *I)
MachineMemOperand * getMachineMemOperand(MachinePointerInfo PtrInfo, MachineMemOperand::Flags f, uint64_t s, unsigned base_alignment, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr, SynchronizationScope SynchScope=CrossThread, AtomicOrdering Ordering=AtomicOrdering::NotAtomic, AtomicOrdering FailureOrdering=AtomicOrdering::NotAtomic)
getMachineMemOperand - Allocate a new MachineMemOperand.
Target - Wrapper for Target specific information.
Class for arbitrary precision integers.
virtual unsigned fastEmit_f(MVT VT, MVT RetVT, unsigned Opcode, const ConstantFP *FPImm)
This method is called by target-independent code to request that an instruction with the given type...
SmallVector< unsigned, 16 > OutRegs
bool selectBinaryOp(const User *I, unsigned ISDOpcode)
Select and emit code for a binary operator instruction, which has an opcode which directly correspond...
virtual const uint32_t * getCallPreservedMask(const MachineFunction &MF, CallingConv::ID) const
Return a mask of call-preserved registers for the given calling convention on the current function...
BranchProbabilityInfo * BPI
This file defines the FastISel class.
virtual const TargetRegisterClass * getRegClassFor(MVT VT) const
Return the register class that should be used for the specified value type.
ZERO_EXTEND - Used for integer types, zeroing the new bits.
virtual bool CanLowerReturn(CallingConv::ID, MachineFunction &, bool, const SmallVectorImpl< ISD::OutputArg > &, LLVMContext &) const
This hook should be implemented to check whether the return values described by the Outs array can fi...
bool selectCall(const User *Call)
APInt And(const APInt &LHS, const APInt &RHS)
Bitwise AND function for APInt.
Flags
Flags values. These may be or'd together.
The memory access reads data.
SavePoint enterLocalValueArea()
Prepare InsertPt to begin inserting instructions into the local value area and return the old insert ...
Representation of each machine instruction.
virtual bool fastLowerIntrinsicCall(const IntrinsicInst *II)
This method is called by target-independent code to do target- specific intrinsic lowering...
bool selectPatchpoint(const CallInst *I)
bool selectExtractValue(const User *I)
Bitwise operators - logical and, logical or, logical xor.
MachineRegisterInfo & MRI
MCSymbol * getOrCreateSymbol(const Twine &Name)
Lookup the symbol inside with the specified Name.
void getNameWithPrefix(raw_ostream &OS, const GlobalValue *GV, bool CannotUsePrivateLabel) const
Print the appropriate prefix and the specified global variable's name.
unsigned greater or equal
This represents the llvm.dbg.value instruction.
bool lowerCallTo(const CallInst *CI, MCSymbol *Symbol, unsigned NumArgs)
static bool isFNeg(const Value *V, bool IgnoreZeroSign=false)
void getAAMetadata(AAMDNodes &N, bool Merge=false) const
Fills the AAMDNodes structure with AA metadata from this instruction.
ImmutableCallSite - establish a view to a call site for examination.
unsigned getSizeInBits() const
getSizeInBits - Return the size of the specified value type in bits.
static MachineOperand CreateImm(int64_t Val)
TerminatorInst * getTerminator()
Returns the terminator instruction if the block is well formed or null if the block is not well forme...
LLVM_ATTRIBUTE_ALWAYS_INLINE size_type size() const
bool hasOneUse() const
Return true if there is exactly one user of this value.
FunctionLoweringInfo - This contains information that is global to a function that is used when lower...
bool paramHasAttr(unsigned i, Attribute::AttrKind Kind) const
Return true if the call or the callee has the given attribute.
The memory access always returns the same value (or traps).
virtual unsigned fastMaterializeAlloca(const AllocaInst *C)
Emit an alloca address in a register using target-specific logic.
0 1 1 0 True if ordered and operands are unequal
iterator find(const KeyT &Val)
MachineBasicBlock::iterator InsertPt
MBB - The current insert position inside the current block.
LLVM_NODISCARD std::enable_if<!is_simple_type< Y >::value, typename cast_retty< X, const Y >::ret_type >::type dyn_cast(const Y &Val)
iterator getFirstNonPHI()
Returns a pointer to the first instruction in this block that is not a PHINode instruction.
uint64_t getTypeStoreSize(Type *Ty) const
Returns the maximum number of bytes that may be overwritten by storing the specified type...
DenseMap< const AllocaInst *, int > StaticAllocaMap
StaticAllocaMap - Keep track of frame indices for fixed sized allocas in the entry block...
1 0 1 0 True if unordered or greater than
static EVT getEVT(Type *Ty, bool HandleUnknown=false)
getEVT - Return the value type corresponding to the specified type.
const TargetLowering & TLI
unsigned createResultReg(const TargetRegisterClass *RC)
MachineInstr * getVRegDef(unsigned Reg) const
getVRegDef - Return the machine instr that defines the specified virtual register or null if none is ...
bool hasLocalLinkage() const
CallLoweringInfo & setIsPatchPoint(bool Value=true)
unsigned fastEmit_ri_(MVT VT, unsigned Opcode, unsigned Op0, bool Op0IsKill, uint64_t Imm, MVT ImmType)
This method is a wrapper of fastEmit_ri.
unsigned getReg() const
getReg - Returns the register number.
const MachineInstrBuilder & addFPImm(const ConstantFP *Val) const
unsigned fastEmitInst_extractsubreg(MVT RetVT, unsigned Op0, bool Op0IsKill, uint32_t Idx)
Emit a MachineInstr for an extract_subreg from a specified index of a superregister to a specified ty...
MachineBasicBlock::iterator InsertPt
DILocalVariable * getVariable() const
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
user_iterator user_begin()
FastISel(FunctionLoweringInfo &FuncInfo, const TargetLibraryInfo *LibInfo, bool SkipTargetIndependentISel=false)
bool isSimple() const
isSimple - Test if the given EVT is simple (as opposed to being extended).
bool isEmptyTy() const
Return true if this type is empty, that is, it has no elements or all of its elements are empty...
virtual bool fastLowerArguments()
This method is called by target-independent code to do target- specific argument lowering.
MVT getPointerTy(const DataLayout &DL, uint32_t AS=0) const
Return the pointer type for the given address space, defaults to the pointer type from the data layou...
virtual const TargetRegisterClass * getSubClassWithSubReg(const TargetRegisterClass *RC, unsigned Idx) const
Returns the largest legal sub-class of RC that supports the sub-register index Idx.
0 0 0 1 True if ordered and equal
EVT getTypeToTransformTo(LLVMContext &Context, EVT VT) const
For types supported by the target, this is an identity function.
LLVM Value Representation.
1 0 1 1 True if unordered, greater than, or equal
unsigned getOpcode() const
Returns a member of one of the enums like Instruction::Add.
DILocalVariable * getVariable() const
static const Function * getParent(const Value *V)
const MachineInstrBuilder & addOperand(const MachineOperand &MO) const
uint64_t getTypeSizeInBits(Type *Ty) const
Size examples:
BranchProbability getEdgeProbability(const BasicBlock *Src, unsigned IndexInSuccessors) const
Get an edge's probability, relative to other out-edges of the Src.
bool isValidLocationForIntrinsic(const DILocation *DL) const
Check that a location is valid for this variable.
DenseMap< const BasicBlock *, MachineBasicBlock * > MBBMap
MBBMap - A mapping from LLVM basic blocks to their machine code entry.
StringRef - Represent a constant reference to a string, i.e.
MachineModuleInfo & getMMI() const
const TargetRegisterClass * getRegClass(const MCInstrDesc &TID, unsigned OpNum, const TargetRegisterInfo *TRI, const MachineFunction &MF) const
Given a machine instruction descriptor, returns the register class constraint for OpNum...
reg_iterator reg_begin(unsigned RegNo) const
unsigned TrapUnreachable
Emit target-specific trap instruction for 'unreachable' IR instructions.
virtual bool fastSelectInstruction(const Instruction *I)=0
This method is called by target-independent code when the normal FastISel process fails to select an ...
CallingConv::ID getCallingConv() const
getCallingConv/setCallingConv - Get or set the calling convention of this function call...
unsigned fastEmitInst_f(unsigned MachineInstOpcode, const TargetRegisterClass *RC, const ConstantFP *FPImm)
Emit a MachineInstr with a floating point immediate, and a result register in the given register clas...
bool isValid() const
Check for null.
FunctionLoweringInfo & FuncInfo
void setIsDebug(bool Val=true)
TRUNCATE - Completely drop the high bits.
bool isLayoutSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB will be emitted immediately after this block, such that if this bloc...
0 0 1 1 True if ordered and greater than or equal
unsigned ComputeLinearIndex(Type *Ty, const unsigned *Indices, const unsigned *IndicesEnd, unsigned CurIndex=0)
Compute the linearized index of a member in a nested aggregate/struct/array.
void fastEmitBranch(MachineBasicBlock *MBB, const DebugLoc &DL)
Emit an unconditional branch to the given block, unless it is the immediate (fall-through) successor...
const MachineInstrBuilder & addReg(unsigned RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
reg_begin/reg_end - Provide iteration support to walk over all definitions and uses of a register wit...
This represents the llvm.dbg.declare instruction.
FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW, FLOG, FLOG2, FLOG10, FEXP, FEXP2, FCEIL, FTRUNC, FRINT, FNEARBYINT, FROUND, FFLOOR - Perform various unary floating point operations.
static EVT getIntegerVT(LLVMContext &Context, unsigned BitWidth)
getIntegerVT - Returns the EVT that represents an integer with the given number of bits...
static MachineOperand CreateFI(int Idx)
unsigned Log2_64(uint64_t Value)
Log2_64 - This function returns the floor log base 2 of the specified value, -1 if the value is zero...
const BasicBlock * getParent() const
MVT getSimpleVT() const
getSimpleVT - Return the SimpleValueType held in the specified simple EVT.
0 0 0 0 Always false (always folded)
A wrapper class for inspecting calls to intrinsic functions.
This class contains meta information specific to a module.
This file describes how to lower LLVM code to machine code.
bool isVoidTy() const
Return true if this is 'void'.
bool use_empty(unsigned RegNo) const
use_empty - Return true if there are no instructions using the specified register.
unsigned InitializeRegForValue(const Value *V)
gep_type_iterator gep_type_begin(const User *GEP)
std::pair< unsigned, bool > getRegForGEPIndex(const Value *V)
This is a wrapper around getRegForValue that also takes care of truncating or sign-extending the give...