63 #define DEBUG_TYPE "asm-printer"
67 cl::desc(
"Insert falign after call instruction for Hexagon target"));
80 std::unique_ptr<MCStreamer> Streamer)
81 :
AsmPrinter(TM, std::move(Streamer)), Subtarget(nullptr) {}
129 const char *ExtraCode,
132 if (ExtraCode && ExtraCode[0]) {
133 if (ExtraCode[1] != 0)
136 switch (ExtraCode[0]) {
151 unsigned RegNumber = MO.
getReg();
153 if (Hexagon::DoubleRegsRegClass.
contains(RegNumber))
154 RegNumber = TRI->
getSubReg(RegNumber, ExtraCode[0] ==
'L' ?
174 unsigned OpNo,
unsigned AsmVariant,
175 const char *ExtraCode,
177 if (ExtraCode && ExtraCode[0])
188 if (Offset.
isImm()) {
190 O <<
" + #" << Offset.
getImm();
203 if (Imm.
getExpr()->evaluateAsAbsolute(Value)) {
205 std::string ImmString;
207 if (AlignSize == 8) {
208 Name =
".CONST_0000000000000000";
209 sectionPrefix =
".gnu.linkonce.l8";
212 Name =
".CONST_00000000";
213 sectionPrefix =
".gnu.linkonce.l4";
214 ImmString =
utohexstr(static_cast<uint32_t>(Value));
217 std::string symbolName =
218 Name.
drop_back(ImmString.size()).str() + ImmString;
219 std::string sectionName = sectionPrefix.
str() + symbolName;
233 assert(Imm.
isExpr() &&
"Expected expression and found none");
235 assert(MO.isGlobal() || MO.isCPI() || MO.isJTI());
246 StringRef SymbolName = MOSymbol->getName();
247 std::string LitaName =
".CONST_" + SymbolName.
str();
272 case Hexagon::A2_iconst: {
286 case Hexagon::CONST64:
293 OutStreamer->SwitchSection(Current.first, Current.second);
300 MappedInst = TmpInst;
309 OutStreamer->SwitchSection(Current.first, Current.second);
316 MappedInst = TmpInst;
323 case Hexagon::C2_pxfer_map: {
333 case Hexagon::M2_vrcmpys_acc_s1: {
335 assert (Rt.
isReg() &&
"Expected register and none was found");
336 unsigned Reg = RI->getEncodingValue(Rt.
getReg());
338 MappedInst.
setOpcode(Hexagon::M2_vrcmpys_acc_s1_h);
340 MappedInst.
setOpcode(Hexagon::M2_vrcmpys_acc_s1_l);
344 case Hexagon::M2_vrcmpys_s1: {
346 assert (Rt.
isReg() &&
"Expected register and none was found");
347 unsigned Reg = RI->getEncodingValue(Rt.
getReg());
349 MappedInst.
setOpcode(Hexagon::M2_vrcmpys_s1_h);
351 MappedInst.
setOpcode(Hexagon::M2_vrcmpys_s1_l);
356 case Hexagon::M2_vrcmpys_s1rp: {
358 assert (Rt.
isReg() &&
"Expected register and none was found");
359 unsigned Reg = RI->getEncodingValue(Rt.
getReg());
361 MappedInst.
setOpcode(Hexagon::M2_vrcmpys_s1rp_h);
363 MappedInst.
setOpcode(Hexagon::M2_vrcmpys_s1rp_l);
368 case Hexagon::A4_boundscheck: {
370 assert (Rs.
isReg() &&
"Expected register and none was found");
371 unsigned Reg = RI->getEncodingValue(Rs.
getReg());
373 MappedInst.
setOpcode(Hexagon::A4_boundscheck_hi);
375 MappedInst.
setOpcode(Hexagon::A4_boundscheck_lo);
379 case Hexagon::S5_asrhub_rnd_sat_goodsyntax: {
383 bool Success = Expr->evaluateAsAbsolute(Imm);
384 assert (Success &&
"Expected immediate and none was found");
391 MappedInst = TmpInst;
394 TmpInst.
setOpcode(Hexagon::S5_asrhub_rnd_sat);
401 MappedInst = TmpInst;
404 case Hexagon::S5_vasrhrnd_goodsyntax:
405 case Hexagon::S2_asr_i_p_rnd_goodsyntax: {
409 bool Success = Expr->evaluateAsAbsolute(Imm);
410 assert (Success &&
"Expected immediate and none was found");
417 unsigned High = RI->getSubReg(MO1.
getReg(), Hexagon::isub_hi);
418 unsigned Low = RI->getSubReg(MO1.
getReg(), Hexagon::isub_lo);
422 MappedInst = TmpInst;
426 if (Inst.
getOpcode() == Hexagon::S2_asr_i_p_rnd_goodsyntax)
427 TmpInst.
setOpcode(Hexagon::S2_asr_i_p_rnd);
436 MappedInst = TmpInst;
440 case Hexagon::S2_asr_i_r_rnd_goodsyntax: {
444 bool Success = Expr->evaluateAsAbsolute(Imm);
445 assert (Success &&
"Expected immediate and none was found");
452 MappedInst = TmpInst;
455 TmpInst.
setOpcode(Hexagon::S2_asr_i_r_rnd);
462 MappedInst = TmpInst;
467 case Hexagon::A2_tfrpi: {
472 TmpInst.
setOpcode(Hexagon::A2_combineii);
476 if (Success && Imm < 0) {
484 MappedInst = TmpInst;
488 case Hexagon::A2_tfrp: {
490 unsigned High = RI->getSubReg(MO.
getReg(), Hexagon::isub_hi);
491 unsigned Low = RI->getSubReg(MO.
getReg(), Hexagon::isub_lo);
495 MappedInst.
setOpcode(Hexagon::A2_combinew);
499 case Hexagon::A2_tfrpt:
500 case Hexagon::A2_tfrpf: {
502 unsigned High = RI->getSubReg(MO.
getReg(), Hexagon::isub_hi);
503 unsigned Low = RI->getSubReg(MO.
getReg(), Hexagon::isub_lo);
508 ? Hexagon::C2_ccombinewt
509 : Hexagon::C2_ccombinewf);
512 case Hexagon::A2_tfrptnew:
513 case Hexagon::A2_tfrpfnew: {
515 unsigned High = RI->getSubReg(MO.
getReg(), Hexagon::isub_hi);
516 unsigned Low = RI->getSubReg(MO.
getReg(), Hexagon::isub_lo);
521 ? Hexagon::C2_ccombinewnewt
522 : Hexagon::C2_ccombinewnewf);
526 case Hexagon::M2_mpysmi: {
530 bool Success = Expr->evaluateAsAbsolute(Value);
534 MappedInst.
setOpcode(Hexagon::M2_mpysin);
538 MappedInst.
setOpcode(Hexagon::M2_mpysip);
542 case Hexagon::A2_addsp: {
544 assert (Rt.
isReg() &&
"Expected register and none was found");
545 unsigned Reg = RI->getEncodingValue(Rt.
getReg());
547 MappedInst.
setOpcode(Hexagon::A2_addsph);
549 MappedInst.
setOpcode(Hexagon::A2_addspl);
553 case Hexagon::V6_vd0:
554 case Hexagon::V6_vd0_128B: {
557 "Expected register and none was found");
563 MappedInst = TmpInst;
581 unsigned IgnoreCount = 0;
583 for (++MII; MII != MBB->
instr_end() && MII->isInsideBundle(); ++MII)
584 if (MII->getOpcode() == TargetOpcode::DBG_VALUE ||
585 MII->getOpcode() == TargetOpcode::IMPLICIT_DEF)
594 MCII, *Subtarget,
OutStreamer->getContext(), MCB,
nullptr);
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
static const MCUnaryExpr * createMinus(const MCExpr *Expr, MCContext &Ctx)
const GlobalValue * getGlobal() const
instr_iterator instr_end()
std::unique_ptr< MCStreamer > OutStreamer
This is the MCStreamer object for the file we are generating.
static const MCSymbolRefExpr * create(const MCSymbol *Symbol, MCContext &Ctx)
MCSymbol * getSymbol(const GlobalValue *GV) const
void print(raw_ostream &OS, const MCAsmInfo *MAI) const
print - Print the value to the stream OS.
MachineBasicBlock * getMBB() const
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
MCContext & OutContext
This is the context for the output file that we are streaming.
static MCOperand createExpr(const MCExpr *Val)
static cl::opt< bool > AlignCalls("hexagon-align-calls", cl::Hidden, cl::init(true), cl::desc("Insert falign after call instruction for Hexagon target"))
const MachineFunction * MF
The current machine function.
MachineBasicBlock reference.
static MCSymbol * smallData(AsmPrinter &AP, const MachineInstr &MI, MCStreamer &OutStreamer, const MCOperand &Imm, int AlignSize)
const MCSubtargetInfo & getSubtargetInfo() const
Return information about subtarget.
return AArch64::GPR64RegClass contains(Reg)
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
static MCOperand createReg(unsigned Reg)
MCSuperRegIterator enumerates all super-registers of Reg.
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
bool isImm() const
isImm - Tests if this is a MO_Immediate operand.
bool isReg() const
isReg - Tests if this is a MO_Register operand.
Base class for the full range of assembler expressions which are needed for parsing.
Reg
All possible values of the reg field in the ModR/M byte.
MCSymbol * GetJTISymbol(unsigned JTID, bool isLinkerPrivate=false) const
Return the symbol for the specified jump table entry.
MCContext & getContext() const
void setS23_2_reloc(MCExpr const &Expr, bool Val=true)
static const MCBinaryExpr * createSub(const MCExpr *LHS, const MCExpr *RHS, MCContext &Ctx)
unsigned getReg() const
Returns the register number.
bool canonicalizePacket(MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCContext &Context, MCInst &MCB, HexagonMCChecker *Checker)
std::pair< MCSection *, const MCExpr * > MCSectionSubPair
HexagonAsmPrinter(TargetMachine &TM, std::unique_ptr< MCStreamer > Streamer)
virtual void EmitIntValue(uint64_t Value, unsigned Size)
Special case of EmitValue that avoids the client having to pass in a MCExpr for constant integers...
void EmitInstruction(const MachineInstr *MI) override
printMachineInstruction – Print out a single Hexagon MI in Darwin syntax to the current output stream...
void EmitValue(const MCExpr *Value, unsigned Size, SMLoc Loc=SMLoc())
Instances of this class represent a single low-level machine instruction.
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
const MachineBasicBlock * getParent() const
static unsigned getHexagonRegisterPair(unsigned Reg, const MCRegisterInfo *RI)
const MCExpr * getExpr() const
void HexagonLowerToMC(const MCInstrInfo &MCII, const MachineInstr *MI, MCInst &MCB, HexagonAsmPrinter &AP)
void HexagonProcessInstruction(MCInst &Inst, const MachineInstr &MBB)
Address of a global value.
initializer< Ty > init(const Ty &Val)
Streaming machine code generation interface.
static HexagonMCExpr * create(MCExpr const *Expr, MCContext &Ctx)
const MCAsmInfo * MAI
Target Asm Printer information.
virtual void SwitchSection(MCSection *Section, const MCExpr *Subsection=nullptr)
Set the current section where code is being emitted to Section.
This file contains the declarations for the subclasses of Constant, which represent the different fla...
const MachineOperand & getOperand(unsigned i) const
virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, unsigned AsmVariant, const char *ExtraCode, raw_ostream &OS)
Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant...
unsigned getSubReg(unsigned Reg, unsigned Idx) const
Returns the physical register number of sub-register "Index" for physical register RegNo...
Interface to description of machine instruction set.
This class is intended to be used as a driving class for all asm writers.
virtual bool EmitSymbolAttribute(MCSymbol *Symbol, MCSymbolAttr Attribute)=0
Add the given Attribute to Symbol.
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang","erlang-compatible garbage collector")
void printOffset(int64_t Offset, raw_ostream &OS) const
This is just convenient handler for printing offsets.
bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, unsigned AsmVariant, const char *ExtraCode, raw_ostream &OS) override
Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant as...
int64_t getOffset() const
Return the offset from the symbol in this operand.
virtual bool isBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB) const
Return true if the basic block has exactly one predecessor and the control transfer mechanism between...
self_iterator getIterator()
LLVM_NODISCARD std::string str() const
str - Get the contents as an std::string.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
MCSymbol * getSymbol() const
Return the MCSymbol for this basic block.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
void LLVMInitializeHexagonAsmPrinter()
void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O)
Iterator for intrusive lists based on ilist_node.
void setOpcode(unsigned Op)
bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, unsigned AsmVariant, const char *ExtraCode, raw_ostream &OS) override
PrintAsmOperand - Print out an operand for an inline asm expression.
virtual void EmitLabel(MCSymbol *Symbol)
Emit a label for Symbol into the current section.
MachineOperand class - Representation of each machine instruction operand.
Module.h This file contains the declarations for the Module class.
virtual void EmitCodeAlignment(unsigned ByteAlignment, unsigned MaxBytesToEmit=0)
Emit nops until the byte alignment ByteAlignment is reached.
unsigned getOpcode() const
Representation of each machine instruction.
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.
bool hasAddressTaken() const
Test whether this block is potentially the target of an indirect branch.
MCSymbol * getOrCreateSymbol(const Twine &Name)
Lookup the symbol inside with the specified Name.
This represents a section on linux, lots of unix variants and some bare metal systems.
void setMustNotExtend(MCExpr const &Expr, bool Val=true)
size_t bundleSize(MCInst const &MCI)
static std::string utohexstr(uint64_t X, bool LowerCase=false)
virtual MCSymbol * GetCPISymbol(unsigned CPID) const
Return the symbol for the specified constant pool entry.
void setReg(unsigned Reg)
Set the register number.
unsigned getReg() const
getReg - Returns the register number.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
MCSectionELF * getELFSection(const Twine &Section, unsigned Type, unsigned Flags)
LLVM Value Representation.
static char const * getRegisterName(unsigned RegNo)
const HexagonInstrInfo * getInstrInfo() const override
RegisterAsmPrinter - Helper template for registering a target specific assembly printer, for use in the target machine initialization function.
This class implements an extremely fast bulk output stream that can only output to a stream...
Primary interface to the complete machine description for the target machine.
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
void addOperand(const MCOperand &Op)
virtual void print(raw_ostream &O, const Module *M) const
print - Print out the internal state of the pass.
StringRef - Represent a constant reference to a string, i.e.
bool isBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB) const override
Return true if the basic block has exactly one predecessor and the control transfer mechanism between...
LLVM_NODISCARD LLVM_ATTRIBUTE_ALWAYS_INLINE StringRef drop_back(size_t N=1) const
Return a StringRef equal to 'this' but with the last N elements dropped.
Address of indexed Constant in Constant Pool.
Instances of this class represent operands of the MCInst class.
static const MCConstantExpr * create(int64_t Value, MCContext &Ctx)
const MCOperand & getOperand(unsigned i) const
Target & getTheHexagonTarget()
bool isUndefined(bool SetUsed=true) const
isUndefined - Check if this symbol undefined (i.e., implicitly defined).
void setExpr(const MCExpr *Val)