32 #define DEBUG_TYPE "wasm-explicit-locals"
37 return "WebAssembly Explicit Locals";
56 return new WebAssemblyExplicitLocals();
62 unsigned &CurLocal,
unsigned Reg) {
63 return Reg2Local.
insert(std::make_pair(Reg, CurLocal++)).first->second;
68 if (RC == &WebAssembly::I32RegClass)
69 return WebAssembly::GET_LOCAL_I32;
70 if (RC == &WebAssembly::I64RegClass)
71 return WebAssembly::GET_LOCAL_I64;
72 if (RC == &WebAssembly::F32RegClass)
73 return WebAssembly::GET_LOCAL_F32;
74 if (RC == &WebAssembly::F64RegClass)
75 return WebAssembly::GET_LOCAL_F64;
76 if (RC == &WebAssembly::V128RegClass)
77 return WebAssembly::GET_LOCAL_V128;
83 if (RC == &WebAssembly::I32RegClass)
84 return WebAssembly::SET_LOCAL_I32;
85 if (RC == &WebAssembly::I64RegClass)
86 return WebAssembly::SET_LOCAL_I64;
87 if (RC == &WebAssembly::F32RegClass)
88 return WebAssembly::SET_LOCAL_F32;
89 if (RC == &WebAssembly::F64RegClass)
90 return WebAssembly::SET_LOCAL_F64;
91 if (RC == &WebAssembly::V128RegClass)
92 return WebAssembly::SET_LOCAL_V128;
98 if (RC == &WebAssembly::I32RegClass)
99 return WebAssembly::TEE_LOCAL_I32;
100 if (RC == &WebAssembly::I64RegClass)
101 return WebAssembly::TEE_LOCAL_I64;
102 if (RC == &WebAssembly::F32RegClass)
103 return WebAssembly::TEE_LOCAL_F32;
104 if (RC == &WebAssembly::F64RegClass)
105 return WebAssembly::TEE_LOCAL_F64;
106 if (RC == &WebAssembly::V128RegClass)
107 return WebAssembly::TEE_LOCAL_V128;
113 if (RC == &WebAssembly::I32RegClass)
115 if (RC == &WebAssembly::I64RegClass)
117 if (RC == &WebAssembly::F32RegClass)
119 if (RC == &WebAssembly::F64RegClass)
144 bool WebAssemblyExplicitLocals::runOnMachineFunction(
MachineFunction &MF) {
145 DEBUG(
dbgs() <<
"********** Make Locals Explicit **********\n"
146 "********** Function: "
154 bool Changed =
false;
177 unsigned CurLocal = MFI.
getParams().size();
199 unsigned LocalId =
getLocalId(Reg2Local, CurLocal, OldReg);
228 unsigned LocalId =
getLocalId(Reg2Local, CurLocal, OldReg);
248 unsigned OldReg = MO.getReg();
258 unsigned LocalId =
getLocalId(Reg2Local, CurLocal, OldReg);
283 auto I = Reg2Local.find(Reg);
284 if (
I == Reg2Local.end() ||
I->second < MFI.
getParams().size())
299 (!MO.isReg() || MRI.
use_empty(MO.getReg()) ||
301 "WebAssemblyExplicitLocals failed to stackify a register operand");
static unsigned getLocalId(DenseMap< unsigned, unsigned > &Reg2Local, unsigned &CurLocal, unsigned Reg)
Return a local id number for the given register, assigning it a new one if it doesn't yet have one...
const Triple & getTargetTriple() const
AnalysisUsage & addPreserved()
Add the specified Pass class to the set of analyses preserved by this pass.
iterator_range< mop_iterator > explicit_operands()
static unsigned index2VirtReg(unsigned Index)
Convert a 0-based index to a virtual register number.
unsigned getNumDefs() const
Return the number of MachineOperands that are register definitions.
unsigned createVirtualRegister(const TargetRegisterClass *RegClass)
createVirtualRegister - Create and return a new virtual register in the function with the specified r...
MachineBlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate machine basic b...
const MCInstrDesc & getDesc() const
Returns the target instruction descriptor of this MachineInstr.
bool isVRegStackified(unsigned VReg) const
static unsigned getSetLocalOpcode(const TargetRegisterClass *RC)
Get the appropriate set_local opcode for the given register class.
This file contains the entry points for global functions defined in the LLVM WebAssembly back-end...
std::pair< iterator, bool > insert(const std::pair< KeyT, ValueT > &KV)
unsigned getNumVirtRegs() const
getNumVirtRegs - Return the number of virtual registers created.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
const HexagonInstrInfo * TII
void eraseFromParent()
Unlink 'this' from the containing basic block and delete it.
const TargetRegisterClass * getRegClass(unsigned Reg) const
Return the register class of the specified virtual register.
Reg
All possible values of the reg field in the ModR/M byte.
auto reverse(ContainerTy &&C, typename std::enable_if< has_rbegin< ContainerTy >::value >::type *=nullptr) -> decltype(make_range(C.rbegin(), C.rend()))
static MachineInstr * FindStartOfTree(MachineOperand &MO, MachineRegisterInfo &MRI, WebAssemblyFunctionInfo &MFI)
Given a MachineOperand of a stackified vreg, return the instruction at the start of the expression tr...
bool isCopy(const MachineInstr &MI)
static GCRegistry::Add< CoreCLRGC > E("coreclr","CoreCLR-compatible GC")
bool isDebugValue() const
This file contains the declaration of the WebAssembly-specific utility functions. ...
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
unsigned const MachineRegisterInfo * MRI
MVT - Machine Value Type.
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
const MachineOperand & getOperand(unsigned i) const
This file provides WebAssembly-specific target descriptions.
Represent the analysis usage information of a pass.
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
static unsigned getGetLocalOpcode(const TargetRegisterClass *RC)
Get the appropriate get_local opcode for the given register class.
FunctionPass class - This class is used to implement most global optimizations.
void stackifyVReg(unsigned VReg)
bool isLabel() const
Returns true if the MachineInstr represents a label.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
iterator_range< mop_iterator > explicit_uses()
This file declares the WebAssembly-specific subclass of TargetSubtarget.
bool isTee(const MachineInstr &MI)
bool isArgument(const MachineInstr &MI)
MachineOperand class - Representation of each machine instruction operand.
FunctionPass * createWebAssemblyExplicitLocals()
void setPreservesCFG()
This function should be called by the pass, iff they do not:
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
static unsigned getTeeLocalOpcode(const TargetRegisterClass *RC)
Get the appropriate tee_local opcode for the given register class.
const DebugLoc & getDebugLoc() const
Returns the debug location id of this MachineInstr.
void replaceRegWith(unsigned FromReg, unsigned ToReg)
replaceRegWith - Replace all instances of FromReg with ToReg in the machine function.
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
const std::vector< MVT > & getParams() const
Representation of each machine instruction.
This class is derived from MachineFunctionInfo and contains private WebAssembly-specific information ...
bool isOSBinFormatELF() const
Tests whether the OS uses the ELF binary format.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
void setReg(unsigned Reg)
Change the register this operand corresponds to.
This file declares WebAssembly-specific per-machine-function information.
MachineInstr * getVRegDef(unsigned Reg) const
getVRegDef - Return the machine instr that defines the specified virtual register or null if none is ...
unsigned getReg() const
getReg - Returns the register number.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
static MVT typeForRegClass(const TargetRegisterClass *RC)
Get the type associated with the given register class.
StringRef - Represent a constant reference to a string, i.e.
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
const MachineInstrBuilder & addReg(unsigned RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
bool use_empty(unsigned RegNo) const
use_empty - Return true if there are no instructions using the specified register.