LLVM  4.0.0
FastISel.h
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1 //===-- FastISel.h - Definition of the FastISel class ---*- C++ -*---------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 ///
10 /// \file
11 /// This file defines the FastISel class.
12 ///
13 //===----------------------------------------------------------------------===//
14 
15 #ifndef LLVM_CODEGEN_FASTISEL_H
16 #define LLVM_CODEGEN_FASTISEL_H
17 
18 #include "llvm/ADT/DenseMap.h"
20 #include "llvm/IR/CallingConv.h"
21 #include "llvm/IR/IntrinsicInst.h"
23 
24 namespace llvm {
25 
26 class MachineConstantPool;
27 
28 /// \brief This is a fast-path instruction selection class that generates poor
29 /// code and doesn't support illegal types or non-trivial lowering, but runs
30 /// quickly.
31 class FastISel {
32 public:
33  struct ArgListEntry {
35  Type *Ty;
36  bool IsSExt : 1;
37  bool IsZExt : 1;
38  bool IsInReg : 1;
39  bool IsSRet : 1;
40  bool IsNest : 1;
41  bool IsByVal : 1;
42  bool IsInAlloca : 1;
43  bool IsReturned : 1;
44  bool IsSwiftSelf : 1;
45  bool IsSwiftError : 1;
46  uint16_t Alignment;
47 
49  : Val(nullptr), Ty(nullptr), IsSExt(false), IsZExt(false),
53 
54  /// \brief Set CallLoweringInfo attribute flags based on a call instruction
55  /// and called function attributes.
56  void setAttributes(ImmutableCallSite *CS, unsigned AttrIdx);
57  };
58  typedef std::vector<ArgListEntry> ArgListTy;
59 
62  bool RetSExt : 1;
63  bool RetZExt : 1;
64  bool IsVarArg : 1;
65  bool IsInReg : 1;
66  bool DoesNotReturn : 1;
68 
69  // \brief IsTailCall Should be modified by implementations of FastLowerCall
70  // that perform tail call conversions.
71  bool IsTailCall;
72 
73  unsigned NumFixedArgs;
75  const Value *Callee;
80  unsigned ResultReg;
81  unsigned NumResultRegs;
82 
84 
90 
92  : RetTy(nullptr), RetSExt(false), RetZExt(false), IsVarArg(false),
94  IsTailCall(false), NumFixedArgs(-1), CallConv(CallingConv::C),
95  Callee(nullptr), Symbol(nullptr), CS(nullptr), Call(nullptr),
97 
99  const Value *Target, ArgListTy &&ArgsList,
101  RetTy = ResultTy;
102  Callee = Target;
103 
104  IsInReg = Call.paramHasAttr(0, Attribute::InReg);
105  DoesNotReturn = Call.doesNotReturn();
106  IsVarArg = FuncTy->isVarArg();
108  RetSExt = Call.paramHasAttr(0, Attribute::SExt);
109  RetZExt = Call.paramHasAttr(0, Attribute::ZExt);
110 
111  CallConv = Call.getCallingConv();
112  Args = std::move(ArgsList);
113  NumFixedArgs = FuncTy->getNumParams();
114 
115  CS = &Call;
116 
117  return *this;
118  }
119 
121  MCSymbol *Target, ArgListTy &&ArgsList,
123  unsigned FixedArgs = ~0U) {
124  RetTy = ResultTy;
125  Callee = Call.getCalledValue();
126  Symbol = Target;
127 
128  IsInReg = Call.paramHasAttr(0, Attribute::InReg);
129  DoesNotReturn = Call.doesNotReturn();
130  IsVarArg = FuncTy->isVarArg();
132  RetSExt = Call.paramHasAttr(0, Attribute::SExt);
133  RetZExt = Call.paramHasAttr(0, Attribute::ZExt);
134 
135  CallConv = Call.getCallingConv();
136  Args = std::move(ArgsList);
137  NumFixedArgs = (FixedArgs == ~0U) ? FuncTy->getNumParams() : FixedArgs;
138 
139  CS = &Call;
140 
141  return *this;
142  }
143 
145  const Value *Target, ArgListTy &&ArgsList,
146  unsigned FixedArgs = ~0U) {
147  RetTy = ResultTy;
148  Callee = Target;
149  CallConv = CC;
150  Args = std::move(ArgsList);
151  NumFixedArgs = (FixedArgs == ~0U) ? Args.size() : FixedArgs;
152  return *this;
153  }
154 
156  CallingConv::ID CC, Type *ResultTy,
157  StringRef Target, ArgListTy &&ArgsList,
158  unsigned FixedArgs = ~0U);
159 
161  MCSymbol *Target, ArgListTy &&ArgsList,
162  unsigned FixedArgs = ~0U) {
163  RetTy = ResultTy;
164  Symbol = Target;
165  CallConv = CC;
166  Args = std::move(ArgsList);
167  NumFixedArgs = (FixedArgs == ~0U) ? Args.size() : FixedArgs;
168  return *this;
169  }
170 
172  IsTailCall = Value;
173  return *this;
174  }
175 
178  return *this;
179  }
180 
181  ArgListTy &getArgs() { return Args; }
182 
183  void clearOuts() {
184  OutVals.clear();
185  OutFlags.clear();
186  OutRegs.clear();
187  }
188 
189  void clearIns() {
190  Ins.clear();
191  InRegs.clear();
192  }
193  };
194 
195 protected:
204  const DataLayout &DL;
210 
211  /// \brief The position of the last instruction for materializing constants
212  /// for use in the current block. It resets to EmitStartPt when it makes sense
213  /// (for example, it's usually profitable to avoid function calls between the
214  /// definition and the use)
216 
217  /// \brief The top most instruction in the current block that is allowed for
218  /// emitting local variables. LastLocalValue resets to EmitStartPt when it
219  /// makes sense (for example, on function calls)
221 
222 public:
223  /// \brief Return the position of the last instruction emitted for
224  /// materializing constants for use in the current block.
226 
227  /// \brief Update the position of the last instruction emitted for
228  /// materializing constants for use in the current block.
230  EmitStartPt = I;
231  LastLocalValue = I;
232  }
233 
234  /// \brief Set the current block to which generated machine instructions will
235  /// be appended, and clear the local CSE map.
236  void startNewBlock();
237 
238  /// \brief Return current debug location information.
239  DebugLoc getCurDebugLoc() const { return DbgLoc; }
240 
241  /// \brief Do "fast" instruction selection for function arguments and append
242  /// the machine instructions to the current block. Returns true when
243  /// successful.
244  bool lowerArguments();
245 
246  /// \brief Do "fast" instruction selection for the given LLVM IR instruction
247  /// and append the generated machine instructions to the current block.
248  /// Returns true if selection was successful.
249  bool selectInstruction(const Instruction *I);
250 
251  /// \brief Do "fast" instruction selection for the given LLVM IR operator
252  /// (Instruction or ConstantExpr), and append generated machine instructions
253  /// to the current block. Return true if selection was successful.
254  bool selectOperator(const User *I, unsigned Opcode);
255 
256  /// \brief Create a virtual register and arrange for it to be assigned the
257  /// value for the given LLVM value.
258  unsigned getRegForValue(const Value *V);
259 
260  /// \brief Look up the value to see if its value is already cached in a
261  /// register. It may be defined by instructions across blocks or defined
262  /// locally.
263  unsigned lookUpRegForValue(const Value *V);
264 
265  /// \brief This is a wrapper around getRegForValue that also takes care of
266  /// truncating or sign-extending the given getelementptr index value.
267  std::pair<unsigned, bool> getRegForGEPIndex(const Value *V);
268 
269  /// \brief We're checking to see if we can fold \p LI into \p FoldInst. Note
270  /// that we could have a sequence where multiple LLVM IR instructions are
271  /// folded into the same machineinstr. For example we could have:
272  ///
273  /// A: x = load i32 *P
274  /// B: y = icmp A, 42
275  /// C: br y, ...
276  ///
277  /// In this scenario, \p LI is "A", and \p FoldInst is "C". We know about "B"
278  /// (and any other folded instructions) because it is between A and C.
279  ///
280  /// If we succeed folding, return true.
281  bool tryToFoldLoad(const LoadInst *LI, const Instruction *FoldInst);
282 
283  /// \brief The specified machine instr operand is a vreg, and that vreg is
284  /// being provided by the specified load instruction. If possible, try to
285  /// fold the load as an operand to the instruction, returning true if
286  /// possible.
287  ///
288  /// This method should be implemented by targets.
289  virtual bool tryToFoldLoadIntoMI(MachineInstr * /*MI*/, unsigned /*OpNo*/,
290  const LoadInst * /*LI*/) {
291  return false;
292  }
293 
294  /// \brief Reset InsertPt to prepare for inserting instructions into the
295  /// current block.
296  void recomputeInsertPt();
297 
298  /// \brief Remove all dead instructions between the I and E.
301 
302  struct SavePoint {
305  };
306 
307  /// \brief Prepare InsertPt to begin inserting instructions into the local
308  /// value area and return the old insert position.
310 
311  /// \brief Reset InsertPt to the given old insert position.
312  void leaveLocalValueArea(SavePoint Old);
313 
314  virtual ~FastISel();
315 
316 protected:
318  const TargetLibraryInfo *LibInfo,
319  bool SkipTargetIndependentISel = false);
320 
321  /// \brief This method is called by target-independent code when the normal
322  /// FastISel process fails to select an instruction. This gives targets a
323  /// chance to emit code for anything that doesn't fit into FastISel's
324  /// framework. It returns true if it was successful.
325  virtual bool fastSelectInstruction(const Instruction *I) = 0;
326 
327  /// \brief This method is called by target-independent code to do target-
328  /// specific argument lowering. It returns true if it was successful.
329  virtual bool fastLowerArguments();
330 
331  /// \brief This method is called by target-independent code to do target-
332  /// specific call lowering. It returns true if it was successful.
333  virtual bool fastLowerCall(CallLoweringInfo &CLI);
334 
335  /// \brief This method is called by target-independent code to do target-
336  /// specific intrinsic lowering. It returns true if it was successful.
337  virtual bool fastLowerIntrinsicCall(const IntrinsicInst *II);
338 
339  /// \brief This method is called by target-independent code to request that an
340  /// instruction with the given type and opcode be emitted.
341  virtual unsigned fastEmit_(MVT VT, MVT RetVT, unsigned Opcode);
342 
343  /// \brief This method is called by target-independent code to request that an
344  /// instruction with the given type, opcode, and register operand be emitted.
345  virtual unsigned fastEmit_r(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0,
346  bool Op0IsKill);
347 
348  /// \brief This method is called by target-independent code to request that an
349  /// instruction with the given type, opcode, and register operands be emitted.
350  virtual unsigned fastEmit_rr(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0,
351  bool Op0IsKill, unsigned Op1, bool Op1IsKill);
352 
353  /// \brief This method is called by target-independent code to request that an
354  /// instruction with the given type, opcode, and register and immediate
355  // operands be emitted.
356  virtual unsigned fastEmit_ri(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0,
357  bool Op0IsKill, uint64_t Imm);
358 
359  /// \brief This method is a wrapper of fastEmit_ri.
360  ///
361  /// It first tries to emit an instruction with an immediate operand using
362  /// fastEmit_ri. If that fails, it materializes the immediate into a register
363  /// and try fastEmit_rr instead.
364  unsigned fastEmit_ri_(MVT VT, unsigned Opcode, unsigned Op0, bool Op0IsKill,
365  uint64_t Imm, MVT ImmType);
366 
367  /// \brief This method is called by target-independent code to request that an
368  /// instruction with the given type, opcode, and immediate operand be emitted.
369  virtual unsigned fastEmit_i(MVT VT, MVT RetVT, unsigned Opcode, uint64_t Imm);
370 
371  /// \brief This method is called by target-independent code to request that an
372  /// instruction with the given type, opcode, and floating-point immediate
373  /// operand be emitted.
374  virtual unsigned fastEmit_f(MVT VT, MVT RetVT, unsigned Opcode,
375  const ConstantFP *FPImm);
376 
377  /// \brief Emit a MachineInstr with no operands and a result register in the
378  /// given register class.
379  unsigned fastEmitInst_(unsigned MachineInstOpcode,
380  const TargetRegisterClass *RC);
381 
382  /// \brief Emit a MachineInstr with one register operand and a result register
383  /// in the given register class.
384  unsigned fastEmitInst_r(unsigned MachineInstOpcode,
385  const TargetRegisterClass *RC, unsigned Op0,
386  bool Op0IsKill);
387 
388  /// \brief Emit a MachineInstr with two register operands and a result
389  /// register in the given register class.
390  unsigned fastEmitInst_rr(unsigned MachineInstOpcode,
391  const TargetRegisterClass *RC, unsigned Op0,
392  bool Op0IsKill, unsigned Op1, bool Op1IsKill);
393 
394  /// \brief Emit a MachineInstr with three register operands and a result
395  /// register in the given register class.
396  unsigned fastEmitInst_rrr(unsigned MachineInstOpcode,
397  const TargetRegisterClass *RC, unsigned Op0,
398  bool Op0IsKill, unsigned Op1, bool Op1IsKill,
399  unsigned Op2, bool Op2IsKill);
400 
401  /// \brief Emit a MachineInstr with a register operand, an immediate, and a
402  /// result register in the given register class.
403  unsigned fastEmitInst_ri(unsigned MachineInstOpcode,
404  const TargetRegisterClass *RC, unsigned Op0,
405  bool Op0IsKill, uint64_t Imm);
406 
407  /// \brief Emit a MachineInstr with one register operand and two immediate
408  /// operands.
409  unsigned fastEmitInst_rii(unsigned MachineInstOpcode,
410  const TargetRegisterClass *RC, unsigned Op0,
411  bool Op0IsKill, uint64_t Imm1, uint64_t Imm2);
412 
413  /// \brief Emit a MachineInstr with a floating point immediate, and a result
414  /// register in the given register class.
415  unsigned fastEmitInst_f(unsigned MachineInstOpcode,
416  const TargetRegisterClass *RC,
417  const ConstantFP *FPImm);
418 
419  /// \brief Emit a MachineInstr with two register operands, an immediate, and a
420  /// result register in the given register class.
421  unsigned fastEmitInst_rri(unsigned MachineInstOpcode,
422  const TargetRegisterClass *RC, unsigned Op0,
423  bool Op0IsKill, unsigned Op1, bool Op1IsKill,
424  uint64_t Imm);
425 
426  /// \brief Emit a MachineInstr with a single immediate operand, and a result
427  /// register in the given register class.
428  unsigned fastEmitInst_i(unsigned MachineInstrOpcode,
429  const TargetRegisterClass *RC, uint64_t Imm);
430 
431  /// \brief Emit a MachineInstr for an extract_subreg from a specified index of
432  /// a superregister to a specified type.
433  unsigned fastEmitInst_extractsubreg(MVT RetVT, unsigned Op0, bool Op0IsKill,
434  uint32_t Idx);
435 
436  /// \brief Emit MachineInstrs to compute the value of Op with all but the
437  /// least significant bit set to zero.
438  unsigned fastEmitZExtFromI1(MVT VT, unsigned Op0, bool Op0IsKill);
439 
440  /// \brief Emit an unconditional branch to the given block, unless it is the
441  /// immediate (fall-through) successor, and update the CFG.
443 
444  /// Emit an unconditional branch to \p FalseMBB, obtains the branch weight
445  /// and adds TrueMBB and FalseMBB to the successor list.
446  void finishCondBranch(const BasicBlock *BranchBB, MachineBasicBlock *TrueMBB,
447  MachineBasicBlock *FalseMBB);
448 
449  /// \brief Update the value map to include the new mapping for this
450  /// instruction, or insert an extra copy to get the result in a previous
451  /// determined register.
452  ///
453  /// NOTE: This is only necessary because we might select a block that uses a
454  /// value before we select the block that defines the value. It might be
455  /// possible to fix this by selecting blocks in reverse postorder.
456  void updateValueMap(const Value *I, unsigned Reg, unsigned NumRegs = 1);
457 
458  unsigned createResultReg(const TargetRegisterClass *RC);
459 
460  /// \brief Try to constrain Op so that it is usable by argument OpNum of the
461  /// provided MCInstrDesc. If this fails, create a new virtual register in the
462  /// correct class and COPY the value there.
463  unsigned constrainOperandRegClass(const MCInstrDesc &II, unsigned Op,
464  unsigned OpNum);
465 
466  /// \brief Emit a constant in a register using target-specific logic, such as
467  /// constant pool loads.
468  virtual unsigned fastMaterializeConstant(const Constant *C) { return 0; }
469 
470  /// \brief Emit an alloca address in a register using target-specific logic.
471  virtual unsigned fastMaterializeAlloca(const AllocaInst *C) { return 0; }
472 
473  /// \brief Emit the floating-point constant +0.0 in a register using target-
474  /// specific logic.
475  virtual unsigned fastMaterializeFloatZero(const ConstantFP *CF) {
476  return 0;
477  }
478 
479  /// \brief Check if \c Add is an add that can be safely folded into \c GEP.
480  ///
481  /// \c Add can be folded into \c GEP if:
482  /// - \c Add is an add,
483  /// - \c Add's size matches \c GEP's,
484  /// - \c Add is in the same basic block as \c GEP, and
485  /// - \c Add has a constant operand.
486  bool canFoldAddIntoGEP(const User *GEP, const Value *Add);
487 
488  /// \brief Test whether the given value has exactly one use.
489  bool hasTrivialKill(const Value *V);
490 
491  /// \brief Create a machine mem operand from the given instruction.
493 
495 
496  bool lowerCallTo(const CallInst *CI, MCSymbol *Symbol, unsigned NumArgs);
497  bool lowerCallTo(const CallInst *CI, const char *SymbolName,
498  unsigned NumArgs);
499  bool lowerCallTo(CallLoweringInfo &CLI);
500 
502  switch (II->getIntrinsicID()) {
503  case Intrinsic::sadd_with_overflow:
504  case Intrinsic::uadd_with_overflow:
505  case Intrinsic::smul_with_overflow:
506  case Intrinsic::umul_with_overflow:
507  return true;
508  default:
509  return false;
510  }
511  }
512 
513 
514  bool lowerCall(const CallInst *I);
515  /// \brief Select and emit code for a binary operator instruction, which has
516  /// an opcode which directly corresponds to the given ISD opcode.
517  bool selectBinaryOp(const User *I, unsigned ISDOpcode);
518  bool selectFNeg(const User *I);
519  bool selectGetElementPtr(const User *I);
520  bool selectStackmap(const CallInst *I);
521  bool selectPatchpoint(const CallInst *I);
522  bool selectCall(const User *Call);
523  bool selectIntrinsicCall(const IntrinsicInst *II);
524  bool selectBitCast(const User *I);
525  bool selectCast(const User *I, unsigned Opcode);
526  bool selectExtractValue(const User *I);
527  bool selectInsertValue(const User *I);
528 
529 private:
530  /// \brief Handle PHI nodes in successor blocks.
531  ///
532  /// Emit code to ensure constants are copied into registers when needed.
533  /// Remember the virtual registers that need to be added to the Machine PHI
534  /// nodes as input. We cannot just directly add them, because expansion might
535  /// result in multiple MBB's for one BB. As such, the start of the BB might
536  /// correspond to a different MBB than the end.
537  bool handlePHINodesInSuccessorBlocks(const BasicBlock *LLVMBB);
538 
539  /// \brief Helper for materializeRegForValue to materialize a constant in a
540  /// target-independent way.
541  unsigned materializeConstant(const Value *V, MVT VT);
542 
543  /// \brief Helper for getRegForVale. This function is called when the value
544  /// isn't already available in a register and must be materialized with new
545  /// instructions.
546  unsigned materializeRegForValue(const Value *V, MVT VT);
547 
548  /// \brief Clears LocalValueMap and moves the area for the new local variables
549  /// to the beginning of the block. It helps to avoid spilling cached variables
550  /// across heavy instructions like calls.
551  void flushLocalValueMap();
552 
553  /// \brief Removes dead local value instructions after SavedLastLocalvalue.
554  void removeDeadLocalValueCode(MachineInstr *SavedLastLocalValue);
555 
556  /// \brief Insertion point before trying to select the current instruction.
557  MachineBasicBlock::iterator SavedInsertPt;
558 
559  /// \brief Add a stackmap or patchpoint intrinsic call's live variable
560  /// operands to a stackmap or patchpoint machine instruction.
561  bool addStackMapLiveVars(SmallVectorImpl<MachineOperand> &Ops,
562  const CallInst *CI, unsigned StartIdx);
563  bool lowerCallOperands(const CallInst *CI, unsigned ArgIdx, unsigned NumArgs,
564  const Value *Callee, bool ForceRetVoidTy,
565  CallLoweringInfo &CLI);
566 };
567 
568 } // end namespace llvm
569 
570 #endif
unsigned fastEmitInst_rrr(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, unsigned Op2, bool Op2IsKill)
Emit a MachineInstr with three register operands and a result register in the given register class...
Definition: FastISel.cpp:1827
A parsed version of the target data layout string in and methods for querying it. ...
Definition: DataLayout.h:102
The MachineConstantPool class keeps track of constants referenced by a function which must be spilled...
This class is the base class for the comparison instructions.
Definition: InstrTypes.h:870
std::vector< ArgListEntry > ArgListTy
Definition: FastISel.h:58
unsigned fastEmitZExtFromI1(MVT VT, unsigned Op0, bool Op0IsKill)
Emit MachineInstrs to compute the value of Op with all but the least significant bit set to zero...
Definition: FastISel.cpp:1977
MachineConstantPool & MCP
Definition: FastISel.h:201
bool lowerCall(const CallInst *I)
Definition: FastISel.cpp:1002
virtual unsigned fastMaterializeConstant(const Constant *C)
Emit a constant in a register using target-specific logic, such as constant pool loads.
Definition: FastISel.h:468
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:39
unsigned getNumParams() const
Return the number of fixed parameters this function type requires.
Definition: DerivedTypes.h:137
Intrinsic::ID getIntrinsicID() const
Return the intrinsic ID of this intrinsic.
Definition: IntrinsicInst.h:51
CmpInst::Predicate optimizeCmpPredicate(const CmpInst *CI) const
Definition: FastISel.cpp:2176
ImmutableCallSite * CS
Definition: FastISel.h:78
bool selectGetElementPtr(const User *I)
Definition: FastISel.cpp:476
void leaveLocalValueArea(SavePoint Old)
Reset InsertPt to the given old insert position.
Definition: FastISel.cpp:376
Describe properties that are true of each instruction in the target description file.
Definition: MCInstrDesc.h:163
bool selectStackmap(const CallInst *I)
Definition: FastISel.cpp:591
This class represents a function call, abstracting a target machine's calling convention.
virtual bool tryToFoldLoadIntoMI(MachineInstr *, unsigned, const LoadInst *)
The specified machine instr operand is a vreg, and that vreg is being provided by the specified load ...
Definition: FastISel.h:289
void setAttributes(ImmutableCallSite *CS, unsigned AttrIdx)
Set CallLoweringInfo attribute flags based on a call instruction and called function attributes...
Definition: FastISel.cpp:81
MachineMemOperand * createMachineMemOperandFor(const Instruction *I) const
Create a machine mem operand from the given instruction.
Definition: FastISel.cpp:2127
virtual unsigned fastEmit_(MVT VT, MVT RetVT, unsigned Opcode)
This method is called by target-independent code to request that an instruction with the given type a...
Definition: FastISel.cpp:1678
A debug info location.
Definition: DebugLoc.h:34
SmallVector< unsigned, 4 > InRegs
Definition: FastISel.h:89
An instruction for reading from memory.
Definition: Instructions.h:164
DebugLoc getCurDebugLoc() const
Return current debug location information.
Definition: FastISel.h:239
Hexagon Common GEP
virtual unsigned fastEmit_i(MVT VT, MVT RetVT, unsigned Opcode, uint64_t Imm)
This method is called by target-independent code to request that an instruction with the given type...
Definition: FastISel.cpp:1691
virtual unsigned fastMaterializeFloatZero(const ConstantFP *CF)
Emit the floating-point constant +0.0 in a register using target- specific logic. ...
Definition: FastISel.h:475
virtual bool fastLowerCall(CallLoweringInfo &CLI)
This method is called by target-independent code to do target- specific call lowering.
Definition: FastISel.cpp:1672
bool doesNotReturn() const
Determine if the call cannot return.
Definition: CallSite.h:454
bool selectInstruction(const Instruction *I)
Do "fast" instruction selection for the given LLVM IR instruction and append the generated machine in...
Definition: FastISel.cpp:1338
unsigned fastEmitInst_rii(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, uint64_t Imm1, uint64_t Imm2)
Emit a MachineInstr with one register operand and two immediate operands.
Definition: FastISel.cpp:1877
MachineFunction * MF
Definition: FastISel.h:198
DenseMap< const Value *, unsigned > LocalValueMap
Definition: FastISel.h:196
unsigned fastEmitInst_ri(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, uint64_t Imm)
Emit a MachineInstr with a register operand, an immediate, and a result register in the given registe...
Definition: FastISel.cpp:1855
void setLastLocalValue(MachineInstr *I)
Update the position of the last instruction emitted for materializing constants for use in the curren...
Definition: FastISel.h:229
unsigned fastEmitInst_rri(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, uint64_t Imm)
Emit a MachineInstr with two register operands, an immediate, and a result register in the given regi...
Definition: FastISel.cpp:1921
A description of a memory reference used in the backend.
CallLoweringInfo & setCallee(CallingConv::ID CC, Type *ResultTy, const Value *Target, ArgListTy &&ArgsList, unsigned FixedArgs=~0U)
Definition: FastISel.h:144
unsigned fastEmitInst_i(unsigned MachineInstrOpcode, const TargetRegisterClass *RC, uint64_t Imm)
Emit a MachineInstr with a single immediate operand, and a result register in the given register clas...
Definition: FastISel.cpp:1947
bool canFoldAddIntoGEP(const User *GEP, const Value *Add)
Check if Add is an add that can be safely folded into GEP.
Definition: FastISel.cpp:2110
ValTy * getCalledValue() const
getCalledValue - Return the pointer to function that is being called.
Definition: CallSite.h:102
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:32
unsigned fastEmitInst_r(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill)
Emit a MachineInstr with one register operand and a result register in the given register class...
Definition: FastISel.cpp:1782
MachineInstr * EmitStartPt
The top most instruction in the current block that is allowed for emitting local variables.
Definition: FastISel.h:220
Reg
All possible values of the reg field in the ModR/M byte.
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted...
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
const TargetMachine & TM
Definition: FastISel.h:203
bool selectIntrinsicCall(const IntrinsicInst *II)
Definition: FastISel.cpp:1087
bool selectCast(const User *I, unsigned Opcode)
Definition: FastISel.cpp:1237
Context object for machine code objects.
Definition: MCContext.h:51
This is a fast-path instruction selection class that generates poor code and doesn't support illegal ...
Definition: FastISel.h:31
Class to represent function types.
Definition: DerivedTypes.h:102
SmallVector< ISD::InputArg, 4 > Ins
Definition: FastISel.h:88
unsigned constrainOperandRegClass(const MCInstrDesc &II, unsigned Op, unsigned OpNum)
Try to constrain Op so that it is usable by argument OpNum of the provided MCInstrDesc.
Definition: FastISel.cpp:1756
CallingConv::ID getCallingConv() const
getCallingConv/setCallingConv - get or set the calling convention of the call.
Definition: CallSite.h:308
bool selectOperator(const User *I, unsigned Opcode)
Do "fast" instruction selection for the given LLVM IR operator (Instruction or ConstantExpr), and append generated machine instructions to the current block.
Definition: FastISel.cpp:1539
MachineBasicBlock * MBB
unsigned getRegForValue(const Value *V)
Create a virtual register and arrange for it to be assigned the value for the given LLVM value...
Definition: FastISel.cpp:170
Function Alias Analysis false
unsigned fastEmitInst_(unsigned MachineInstOpcode, const TargetRegisterClass *RC)
Emit a MachineInstr with no operands and a result register in the given register class.
Definition: FastISel.cpp:1773
bool hasTrivialKill(const Value *V)
Test whether the given value has exactly one use.
Definition: FastISel.cpp:137
MachineInstr * getLastLocalValue()
Return the position of the last instruction emitted for materializing constants for use in the curren...
Definition: FastISel.h:225
static GCRegistry::Add< CoreCLRGC > E("coreclr","CoreCLR-compatible GC")
unsigned lookUpRegForValue(const Value *V)
Look up the value to see if its value is already cached in a register.
Definition: FastISel.cpp:287
TargetInstrInfo - Interface to description of machine instruction set.
bool selectInsertValue(const User *I)
virtual ~FastISel()
Definition: FastISel.cpp:1668
CallLoweringInfo & setCallee(Type *ResultTy, FunctionType *FuncTy, const Value *Target, ArgListTy &&ArgsList, ImmutableCallSite &Call)
Definition: FastISel.h:98
MVT - Machine Value Type.
LLVM Basic Block Representation.
Definition: BasicBlock.h:51
CallLoweringInfo & setCallee(CallingConv::ID CC, Type *ResultTy, MCSymbol *Target, ArgListTy &&ArgsList, unsigned FixedArgs=~0U)
Definition: FastISel.h:160
The instances of the Type class are immutable: once they are created, they are never changed...
Definition: Type.h:45
This is an important base class in LLVM.
Definition: Constant.h:42
void removeDeadCode(MachineBasicBlock::iterator I, MachineBasicBlock::iterator E)
Remove all dead instructions between the I and E.
Definition: FastISel.cpp:354
SmallVector< ISD::ArgFlagsTy, 16 > OutFlags
Definition: FastISel.h:86
ConstantFP - Floating Point Values [float, double].
Definition: Constants.h:269
MachineFrameInfo & MFI
Definition: FastISel.h:200
virtual unsigned fastEmit_r(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, bool Op0IsKill)
This method is called by target-independent code to request that an instruction with the given type...
Definition: FastISel.cpp:1680
bool SkipTargetIndependentISel
Definition: FastISel.h:209
bool tryToFoldLoad(const LoadInst *LI, const Instruction *FoldInst)
We're checking to see if we can fold LI into FoldInst.
Definition: FastISel.cpp:2054
bool lowerArguments()
Do "fast" instruction selection for function arguments and append the machine instructions to the cur...
Definition: FastISel.cpp:110
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Definition: InstrTypes.h:880
const TargetRegisterInfo & TRI
Definition: FastISel.h:207
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
bool selectFNeg(const User *I)
Emit an FNeg operation.
Definition: FastISel.cpp:1456
CallLoweringInfo & setTailCall(bool Value=true)
Definition: FastISel.h:171
SmallVector< Value *, 16 > OutVals
Definition: FastISel.h:85
const TargetInstrInfo & TII
Definition: FastISel.h:205
MachineInstr * LastLocalValue
The position of the last instruction for materializing constants for use in the current block...
Definition: FastISel.h:215
void recomputeInsertPt()
Reset InsertPt to prepare for inserting instructions into the current block.
Definition: FastISel.cpp:340
virtual unsigned fastEmit_rr(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill)
This method is called by target-independent code to request that an instruction with the given type...
Definition: FastISel.cpp:1685
InstrTy * getInstruction() const
Definition: CallSite.h:93
bool isCommutativeIntrinsic(IntrinsicInst const *II)
Definition: FastISel.h:501
virtual unsigned fastEmit_ri(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, bool Op0IsKill, uint64_t Imm)
This method is called by target-independent code to request that an instruction with the given type...
Definition: FastISel.cpp:1700
CallLoweringInfo & setCallee(Type *ResultTy, FunctionType *FuncTy, MCSymbol *Target, ArgListTy &&ArgsList, ImmutableCallSite &Call, unsigned FixedArgs=~0U)
Definition: FastISel.h:120
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:843
Provides information about what library functions are available for the current target.
void finishCondBranch(const BasicBlock *BranchBB, MachineBasicBlock *TrueMBB, MachineBasicBlock *FalseMBB)
Emit an unconditional branch to FalseMBB, obtains the branch weight and adds TrueMBB and FalseMBB to ...
Definition: FastISel.cpp:1437
const TargetLibraryInfo * LibInfo
Definition: FastISel.h:208
static const char * Target
unsigned fastEmitInst_rr(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill)
Emit a MachineInstr with two register operands and a result register in the given register class...
Definition: FastISel.cpp:1803
void updateValueMap(const Value *I, unsigned Reg, unsigned NumRegs=1)
Update the value map to include the new mapping for this instruction, or insert an extra copy to get ...
Definition: FastISel.cpp:298
static GCRegistry::Add< ShadowStackGC > C("shadow-stack","Very portable GC for uncooperative code generators")
void startNewBlock()
Set the current block to which generated machine instructions will be appended, and clear the local C...
Definition: FastISel.cpp:98
bool selectBitCast(const User *I)
Definition: FastISel.cpp:1270
Target - Wrapper for Target specific information.
virtual unsigned fastEmit_f(MVT VT, MVT RetVT, unsigned Opcode, const ConstantFP *FPImm)
This method is called by target-independent code to request that an instruction with the given type...
Definition: FastISel.cpp:1695
SmallVector< unsigned, 16 > OutRegs
Definition: FastISel.h:87
const DataLayout & DL
Definition: FastISel.h:204
bool selectBinaryOp(const User *I, unsigned ISDOpcode)
Select and emit code for a binary operator instruction, which has an opcode which directly correspond...
Definition: FastISel.cpp:385
DebugLoc DbgLoc
Definition: FastISel.h:202
bool selectCall(const User *Call)
Definition: FastISel.cpp:1041
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
SavePoint enterLocalValueArea()
Prepare InsertPt to begin inserting instructions into the local value area and return the old insert ...
Definition: FastISel.cpp:367
Representation of each machine instruction.
Definition: MachineInstr.h:52
Basic Alias true
virtual bool fastLowerIntrinsicCall(const IntrinsicInst *II)
This method is called by target-independent code to do target- specific intrinsic lowering...
Definition: FastISel.cpp:1674
bool selectPatchpoint(const CallInst *I)
Definition: FastISel.cpp:706
bool selectExtractValue(const User *I)
Definition: FastISel.cpp:1499
MachineRegisterInfo & MRI
Definition: FastISel.h:199
bool lowerCallTo(const CallInst *CI, MCSymbol *Symbol, unsigned NumArgs)
Definition: FastISel.cpp:868
ImmutableCallSite - establish a view to a call site for examination.
Definition: CallSite.h:665
#define I(x, y, z)
Definition: MD5.cpp:54
FunctionLoweringInfo - This contains information that is global to a function that is used when lower...
bool paramHasAttr(unsigned i, Attribute::AttrKind Kind) const
Return true if the call or the callee has the given attribute.
Definition: CallSite.h:359
virtual unsigned fastMaterializeAlloca(const AllocaInst *C)
Emit an alloca address in a register using target-specific logic.
Definition: FastISel.h:471
const TargetLowering & TLI
Definition: FastISel.h:206
unsigned createResultReg(const TargetRegisterClass *RC)
Definition: FastISel.cpp:1752
CallLoweringInfo & setIsPatchPoint(bool Value=true)
Definition: FastISel.h:176
unsigned fastEmit_ri_(MVT VT, unsigned Opcode, unsigned Op0, bool Op0IsKill, uint64_t Imm, MVT ImmType)
This method is a wrapper of fastEmit_ri.
Definition: FastISel.cpp:1709
bool isVarArg() const
Definition: DerivedTypes.h:122
bool use_empty() const
Definition: Value.h:299
unsigned fastEmitInst_extractsubreg(MVT RetVT, unsigned Op0, bool Op0IsKill, uint32_t Idx)
Emit a MachineInstr for an extract_subreg from a specified index of a superregister to a specified ty...
Definition: FastISel.cpp:1963
MachineBasicBlock::iterator InsertPt
Definition: FastISel.h:303
FastISel(FunctionLoweringInfo &FuncInfo, const TargetLibraryInfo *LibInfo, bool SkipTargetIndependentISel=false)
Definition: FastISel.cpp:1657
virtual bool fastLowerArguments()
This method is called by target-independent code to do target- specific argument lowering.
Definition: FastISel.cpp:1670
LLVM Value Representation.
Definition: Value.h:71
Primary interface to the complete machine description for the target machine.
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:47
virtual bool fastSelectInstruction(const Instruction *I)=0
This method is called by target-independent code when the normal FastISel process fails to select an ...
unsigned fastEmitInst_f(unsigned MachineInstOpcode, const TargetRegisterClass *RC, const ConstantFP *FPImm)
Emit a MachineInstr with a floating point immediate, and a result register in the given register clas...
Definition: FastISel.cpp:1902
FunctionLoweringInfo & FuncInfo
Definition: FastISel.h:197
void fastEmitBranch(MachineBasicBlock *MBB, const DebugLoc &DL)
Emit an unconditional branch to the given block, unless it is the immediate (fall-through) successor...
Definition: FastISel.cpp:1417
A wrapper class for inspecting calls to intrinsic functions.
Definition: IntrinsicInst.h:44
This file describes how to lower LLVM code to machine code.
an instruction to allocate memory on the stack
Definition: Instructions.h:60
std::pair< unsigned, bool > getRegForGEPIndex(const Value *V)
This is a wrapper around getRegForValue that also takes care of truncating or sign-extending the give...
Definition: FastISel.cpp:317