LLVM  4.0.0
MipsISelDAGToDAG.cpp
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1 //===-- MipsISelDAGToDAG.cpp - A Dag to Dag Inst Selector for Mips --------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file defines an instruction selector for the MIPS target.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "MipsISelDAGToDAG.h"
16 #include "Mips.h"
17 #include "Mips16ISelDAGToDAG.h"
18 #include "MipsMachineFunction.h"
19 #include "MipsRegisterInfo.h"
20 #include "MipsSEISelDAGToDAG.h"
27 #include "llvm/IR/CFG.h"
28 #include "llvm/IR/GlobalValue.h"
29 #include "llvm/IR/Instructions.h"
30 #include "llvm/IR/Intrinsics.h"
31 #include "llvm/IR/Type.h"
32 #include "llvm/Support/Debug.h"
36 using namespace llvm;
37 
38 #define DEBUG_TYPE "mips-isel"
39 
40 //===----------------------------------------------------------------------===//
41 // Instruction Selector Implementation
42 //===----------------------------------------------------------------------===//
43 
44 //===----------------------------------------------------------------------===//
45 // MipsDAGToDAGISel - MIPS specific code to select MIPS machine
46 // instructions for SelectionDAG operations.
47 //===----------------------------------------------------------------------===//
48 
50  Subtarget = &static_cast<const MipsSubtarget &>(MF.getSubtarget());
52 
53  processFunctionAfterISel(MF);
54 
55  return Ret;
56 }
57 
58 /// getGlobalBaseReg - Output the instructions required to put the
59 /// GOT address into a register.
62  return CurDAG->getRegister(GlobalBaseReg, getTargetLowering()->getPointerTy(
64  .getNode();
65 }
66 
67 /// ComplexPattern used on MipsInstrInfo
68 /// Used on Mips Load/Store instructions
69 bool MipsDAGToDAGISel::selectAddrRegImm(SDValue Addr, SDValue &Base,
70  SDValue &Offset) const {
71  llvm_unreachable("Unimplemented function.");
72  return false;
73 }
74 
75 bool MipsDAGToDAGISel::selectAddrDefault(SDValue Addr, SDValue &Base,
76  SDValue &Offset) const {
77  llvm_unreachable("Unimplemented function.");
78  return false;
79 }
80 
81 bool MipsDAGToDAGISel::selectIntAddr(SDValue Addr, SDValue &Base,
82  SDValue &Offset) const {
83  llvm_unreachable("Unimplemented function.");
84  return false;
85 }
86 
87 bool MipsDAGToDAGISel::selectIntAddr11MM(SDValue Addr, SDValue &Base,
88  SDValue &Offset) const {
89  llvm_unreachable("Unimplemented function.");
90  return false;
91 }
92 
93 bool MipsDAGToDAGISel::selectIntAddr12MM(SDValue Addr, SDValue &Base,
94  SDValue &Offset) const {
95  llvm_unreachable("Unimplemented function.");
96  return false;
97 }
98 
99 bool MipsDAGToDAGISel::selectIntAddr16MM(SDValue Addr, SDValue &Base,
100  SDValue &Offset) const {
101  llvm_unreachable("Unimplemented function.");
102  return false;
103 }
104 
105 bool MipsDAGToDAGISel::selectIntAddrLSL2MM(SDValue Addr, SDValue &Base,
106  SDValue &Offset) const {
107  llvm_unreachable("Unimplemented function.");
108  return false;
109 }
110 
111 bool MipsDAGToDAGISel::selectIntAddrSImm10(SDValue Addr, SDValue &Base,
112  SDValue &Offset) const {
113  llvm_unreachable("Unimplemented function.");
114  return false;
115 }
116 
117 bool MipsDAGToDAGISel::selectIntAddrSImm10Lsl1(SDValue Addr, SDValue &Base,
118  SDValue &Offset) const {
119  llvm_unreachable("Unimplemented function.");
120  return false;
121 }
122 
123 bool MipsDAGToDAGISel::selectIntAddrSImm10Lsl2(SDValue Addr, SDValue &Base,
124  SDValue &Offset) const {
125  llvm_unreachable("Unimplemented function.");
126  return false;
127 }
128 
129 bool MipsDAGToDAGISel::selectIntAddrSImm10Lsl3(SDValue Addr, SDValue &Base,
130  SDValue &Offset) const {
131  llvm_unreachable("Unimplemented function.");
132  return false;
133 }
134 
135 bool MipsDAGToDAGISel::selectAddr16(SDValue Addr, SDValue &Base,
136  SDValue &Offset) {
137  llvm_unreachable("Unimplemented function.");
138  return false;
139 }
140 
141 bool MipsDAGToDAGISel::selectAddr16SP(SDValue Addr, SDValue &Base,
142  SDValue &Offset) {
143  llvm_unreachable("Unimplemented function.");
144  return false;
145 }
146 
147 bool MipsDAGToDAGISel::selectVSplat(SDNode *N, APInt &Imm,
148  unsigned MinSizeInBits) const {
149  llvm_unreachable("Unimplemented function.");
150  return false;
151 }
152 
153 bool MipsDAGToDAGISel::selectVSplatUimm1(SDValue N, SDValue &Imm) const {
154  llvm_unreachable("Unimplemented function.");
155  return false;
156 }
157 
158 bool MipsDAGToDAGISel::selectVSplatUimm2(SDValue N, SDValue &Imm) const {
159  llvm_unreachable("Unimplemented function.");
160  return false;
161 }
162 
163 bool MipsDAGToDAGISel::selectVSplatUimm3(SDValue N, SDValue &Imm) const {
164  llvm_unreachable("Unimplemented function.");
165  return false;
166 }
167 
168 bool MipsDAGToDAGISel::selectVSplatUimm4(SDValue N, SDValue &Imm) const {
169  llvm_unreachable("Unimplemented function.");
170  return false;
171 }
172 
173 bool MipsDAGToDAGISel::selectVSplatUimm5(SDValue N, SDValue &Imm) const {
174  llvm_unreachable("Unimplemented function.");
175  return false;
176 }
177 
178 bool MipsDAGToDAGISel::selectVSplatUimm6(SDValue N, SDValue &Imm) const {
179  llvm_unreachable("Unimplemented function.");
180  return false;
181 }
182 
183 bool MipsDAGToDAGISel::selectVSplatUimm8(SDValue N, SDValue &Imm) const {
184  llvm_unreachable("Unimplemented function.");
185  return false;
186 }
187 
188 bool MipsDAGToDAGISel::selectVSplatSimm5(SDValue N, SDValue &Imm) const {
189  llvm_unreachable("Unimplemented function.");
190  return false;
191 }
192 
193 bool MipsDAGToDAGISel::selectVSplatUimmPow2(SDValue N, SDValue &Imm) const {
194  llvm_unreachable("Unimplemented function.");
195  return false;
196 }
197 
198 bool MipsDAGToDAGISel::selectVSplatUimmInvPow2(SDValue N, SDValue &Imm) const {
199  llvm_unreachable("Unimplemented function.");
200  return false;
201 }
202 
203 bool MipsDAGToDAGISel::selectVSplatMaskL(SDValue N, SDValue &Imm) const {
204  llvm_unreachable("Unimplemented function.");
205  return false;
206 }
207 
208 bool MipsDAGToDAGISel::selectVSplatMaskR(SDValue N, SDValue &Imm) const {
209  llvm_unreachable("Unimplemented function.");
210  return false;
211 }
212 
213 /// Select instructions not customized! Used for
214 /// expanded, promoted and normal instructions
215 void MipsDAGToDAGISel::Select(SDNode *Node) {
216  unsigned Opcode = Node->getOpcode();
217 
218  // Dump information about the Node being selected
219  DEBUG(errs() << "Selecting: "; Node->dump(CurDAG); errs() << "\n");
220 
221  // If we have a custom node, we already have selected!
222  if (Node->isMachineOpcode()) {
223  DEBUG(errs() << "== "; Node->dump(CurDAG); errs() << "\n");
224  Node->setNodeId(-1);
225  return;
226  }
227 
228  // See if subclasses can handle this node.
229  if (trySelect(Node))
230  return;
231 
232  switch(Opcode) {
233  default: break;
234 
235  // Get target GOT address.
237  ReplaceNode(Node, getGlobalBaseReg());
238  return;
239 
240 #ifndef NDEBUG
241  case ISD::LOAD:
242  case ISD::STORE:
244  cast<MemSDNode>(Node)->getMemoryVT().getSizeInBits() / 8 <=
245  cast<MemSDNode>(Node)->getAlignment()) &&
246  "Unexpected unaligned loads/stores.");
247  break;
248 #endif
249  }
250 
251  // Select the default instruction
252  SelectCode(Node);
253 }
254 
255 bool MipsDAGToDAGISel::
256 SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
257  std::vector<SDValue> &OutOps) {
258  // All memory constraints can at least accept raw pointers.
259  switch(ConstraintID) {
260  default:
261  llvm_unreachable("Unexpected asm memory constraint");
266  OutOps.push_back(Op);
267  return false;
268  }
269  return true;
270 }
raw_ostream & errs()
This returns a reference to a raw_ostream for standard error.
unsigned getOpcode() const
Return the SelectionDAG opcode value for this node.
void setNodeId(int Id)
Set unique node id.
The address of the GOT.
Definition: ISDOpcodes.h:66
MachineFunction * MF
GlobalBaseReg - On Darwin, this node represents the result of the mflr at function entry...
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
This file declares the MachineConstantPool class which is an abstract constant pool to keep track of ...
bool systemSupportsUnalignedAccess() const
Does the system support unaligned memory access.
const TargetLowering * getTargetLowering() const
bool runOnMachineFunction(MachineFunction &MF) override
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
static unsigned getAlignment(GlobalVariable *GV)
const DataLayout & getDataLayout() const
Definition: SelectionDAG.h:328
SDNode * getNode() const
get the SDNode which holds the desired result
const MipsSubtarget * Subtarget
Keep a pointer to the MipsSubtarget around so that we can make the right decision when generating cod...
uint32_t Offset
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
void dump() const
Dump this node, for debugging.
Represents one node in the SelectionDAG.
Class for arbitrary precision integers.
Definition: APInt.h:77
SDNode * getGlobalBaseReg()
getGlobalBaseReg - Output the instructions required to put the GOT address into a register...
LOAD and STORE have token chains as their first operand, then the same operands as an LLVM load/store...
Definition: ISDOpcodes.h:536
#define N
MipsFunctionInfo - This class is derived from MachineFunction private Mips target-specific informatio...
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
SDValue getRegister(unsigned Reg, EVT VT)
#define DEBUG(X)
Definition: Debug.h:100
void ReplaceNode(SDNode *F, SDNode *T)
Replace all uses of F with T, then remove F from the DAG.
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation...
bool runOnMachineFunction(MachineFunction &MF) override
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
bool isMachineOpcode() const
Test if this node has a post-isel opcode, directly corresponding to a MachineInstr opcode...