LLVM  4.0.0
PPCAsmPrinter.cpp
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1 //===-- PPCAsmPrinter.cpp - Print machine instrs to PowerPC assembly ------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains a printer that converts from our internal representation
11 // of machine-dependent LLVM code to PowerPC assembly language. This printer is
12 // the output mechanism used by `llc'.
13 //
14 // Documentation at http://developer.apple.com/documentation/DeveloperTools/
15 // Reference/Assembler/ASMIntroduction/chapter_1_section_1.html
16 //
17 //===----------------------------------------------------------------------===//
18 
19 #include "PPC.h"
20 #include "PPCInstrInfo.h"
22 #include "MCTargetDesc/PPCMCExpr.h"
24 #include "PPCMachineFunctionInfo.h"
25 #include "PPCSubtarget.h"
26 #include "PPCTargetMachine.h"
27 #include "PPCTargetStreamer.h"
28 #include "llvm/ADT/MapVector.h"
29 #include "llvm/ADT/StringRef.h"
30 #include "llvm/ADT/Triple.h"
31 #include "llvm/ADT/Twine.h"
39 #include "llvm/CodeGen/StackMaps.h"
41 #include "llvm/IR/DataLayout.h"
42 #include "llvm/IR/GlobalValue.h"
43 #include "llvm/IR/Module.h"
44 #include "llvm/MC/MCAsmInfo.h"
45 #include "llvm/MC/MCContext.h"
46 #include "llvm/MC/MCExpr.h"
47 #include "llvm/MC/MCInst.h"
48 #include "llvm/MC/MCInstBuilder.h"
49 #include "llvm/MC/MCSectionELF.h"
50 #include "llvm/MC/MCSectionMachO.h"
51 #include "llvm/MC/MCStreamer.h"
52 #include "llvm/MC/MCSymbol.h"
53 #include "llvm/MC/MCSymbolELF.h"
54 #include "llvm/MC/SectionKind.h"
55 #include "llvm/Support/Casting.h"
56 #include "llvm/Support/CodeGen.h"
57 #include "llvm/Support/Debug.h"
58 #include "llvm/Support/ELF.h"
60 #include "llvm/Support/MachO.h"
64 #include <algorithm>
65 #include <cassert>
66 #include <cstdint>
67 #include <memory>
68 #include <new>
69 
70 using namespace llvm;
71 
72 #define DEBUG_TYPE "asmprinter"
73 
74 namespace {
75 
76 class PPCAsmPrinter : public AsmPrinter {
77 protected:
79  const PPCSubtarget *Subtarget;
80  StackMaps SM;
81 
82 public:
83  explicit PPCAsmPrinter(TargetMachine &TM,
84  std::unique_ptr<MCStreamer> Streamer)
85  : AsmPrinter(TM, std::move(Streamer)), SM(*this) {}
86 
87  StringRef getPassName() const override { return "PowerPC Assembly Printer"; }
88 
89  MCSymbol *lookUpOrCreateTOCEntry(MCSymbol *Sym);
90 
91  bool doInitialization(Module &M) override {
92  if (!TOC.empty())
93  TOC.clear();
95  }
96 
97  void EmitInstruction(const MachineInstr *MI) override;
98 
99  void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O);
100 
101  bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
102  unsigned AsmVariant, const char *ExtraCode,
103  raw_ostream &O) override;
104  bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
105  unsigned AsmVariant, const char *ExtraCode,
106  raw_ostream &O) override;
107 
108  void EmitEndOfAsmFile(Module &M) override;
109 
110  void LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI);
111  void LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI);
112  void EmitTlsCall(const MachineInstr *MI, MCSymbolRefExpr::VariantKind VK);
113  bool runOnMachineFunction(MachineFunction &MF) override {
114  Subtarget = &MF.getSubtarget<PPCSubtarget>();
116  }
117  };
118 
119  /// PPCLinuxAsmPrinter - PowerPC assembly printer, customized for Linux
120  class PPCLinuxAsmPrinter : public PPCAsmPrinter {
121  public:
122  explicit PPCLinuxAsmPrinter(TargetMachine &TM,
123  std::unique_ptr<MCStreamer> Streamer)
124  : PPCAsmPrinter(TM, std::move(Streamer)) {}
125 
126  StringRef getPassName() const override {
127  return "Linux PPC Assembly Printer";
128  }
129 
130  bool doFinalization(Module &M) override;
131  void EmitStartOfAsmFile(Module &M) override;
132 
133  void EmitFunctionEntryLabel() override;
134 
135  void EmitFunctionBodyStart() override;
136  void EmitFunctionBodyEnd() override;
137  };
138 
139  /// PPCDarwinAsmPrinter - PowerPC assembly printer, customized for Darwin/Mac
140  /// OS X
141  class PPCDarwinAsmPrinter : public PPCAsmPrinter {
142  public:
143  explicit PPCDarwinAsmPrinter(TargetMachine &TM,
144  std::unique_ptr<MCStreamer> Streamer)
145  : PPCAsmPrinter(TM, std::move(Streamer)) {}
146 
147  StringRef getPassName() const override {
148  return "Darwin PPC Assembly Printer";
149  }
150 
151  bool doFinalization(Module &M) override;
152  void EmitStartOfAsmFile(Module &M) override;
153  };
154 
155 } // end anonymous namespace
156 
157 /// stripRegisterPrefix - This method strips the character prefix from a
158 /// register name so that only the number is left. Used by for linux asm.
159 static const char *stripRegisterPrefix(const char *RegName) {
160  switch (RegName[0]) {
161  case 'r':
162  case 'f':
163  case 'q': // for QPX
164  case 'v':
165  if (RegName[1] == 's')
166  return RegName + 2;
167  return RegName + 1;
168  case 'c': if (RegName[1] == 'r') return RegName + 2;
169  }
170 
171  return RegName;
172 }
173 
174 void PPCAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo,
175  raw_ostream &O) {
176  const DataLayout &DL = getDataLayout();
177  const MachineOperand &MO = MI->getOperand(OpNo);
178 
179  switch (MO.getType()) {
181  unsigned Reg = MO.getReg();
182 
183  // There are VSX instructions that use VSX register numbering (vs0 - vs63)
184  // as well as those that use VMX register numbering (v0 - v31 which
185  // correspond to vs32 - vs63). If we have an instruction that uses VSX
186  // numbering, we need to convert the VMX registers to VSX registers.
187  // Namely, we print 32-63 when the instruction operates on one of the
188  // VMX registers.
189  // (Please synchronize with PPCInstPrinter::printOperand)
190  if (MI->getDesc().TSFlags & PPCII::UseVSXReg) {
192  Reg = PPC::VSX32 + (Reg - PPC::V0);
193  else if (PPCInstrInfo::isVFRegister(Reg))
194  Reg = PPC::VSX32 + (Reg - PPC::VF0);
195  }
196  const char *RegName = PPCInstPrinter::getRegisterName(Reg);
197 
198  // Linux assembler (Others?) does not take register mnemonics.
199  // FIXME - What about special registers used in mfspr/mtspr?
200  if (!Subtarget->isDarwin())
201  RegName = stripRegisterPrefix(RegName);
202  O << RegName;
203  return;
204  }
206  O << MO.getImm();
207  return;
208 
210  MO.getMBB()->getSymbol()->print(O, MAI);
211  return;
213  O << DL.getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << '_'
214  << MO.getIndex();
215  return;
217  GetBlockAddressSymbol(MO.getBlockAddress())->print(O, MAI);
218  return;
220  // Computing the address of a global symbol, not calling it.
221  const GlobalValue *GV = MO.getGlobal();
222  MCSymbol *SymToPrint;
223 
224  // External or weakly linked global variables need non-lazily-resolved stubs
225  if (Subtarget->hasLazyResolverStub(GV)) {
226  SymToPrint = getSymbolWithGlobalValueBase(GV, "$non_lazy_ptr");
228  MMI->getObjFileInfo<MachineModuleInfoMachO>().getGVStubEntry(
229  SymToPrint);
230  if (!StubSym.getPointer())
232  !GV->hasInternalLinkage());
233  } else {
234  SymToPrint = getSymbol(GV);
235  }
236 
237  SymToPrint->print(O, MAI);
238 
239  printOffset(MO.getOffset(), O);
240  return;
241  }
242 
243  default:
244  O << "<unknown operand type: " << (unsigned)MO.getType() << ">";
245  return;
246  }
247 }
248 
249 /// PrintAsmOperand - Print out an operand for an inline asm expression.
250 ///
251 bool PPCAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
252  unsigned AsmVariant,
253  const char *ExtraCode, raw_ostream &O) {
254  // Does this asm operand have a single letter operand modifier?
255  if (ExtraCode && ExtraCode[0]) {
256  if (ExtraCode[1] != 0) return true; // Unknown modifier.
257 
258  switch (ExtraCode[0]) {
259  default:
260  // See if this is a generic print operand
261  return AsmPrinter::PrintAsmOperand(MI, OpNo, AsmVariant, ExtraCode, O);
262  case 'c': // Don't print "$" before a global var name or constant.
263  break; // PPC never has a prefix.
264  case 'L': // Write second word of DImode reference.
265  // Verify that this operand has two consecutive registers.
266  if (!MI->getOperand(OpNo).isReg() ||
267  OpNo+1 == MI->getNumOperands() ||
268  !MI->getOperand(OpNo+1).isReg())
269  return true;
270  ++OpNo; // Return the high-part.
271  break;
272  case 'I':
273  // Write 'i' if an integer constant, otherwise nothing. Used to print
274  // addi vs add, etc.
275  if (MI->getOperand(OpNo).isImm())
276  O << "i";
277  return false;
278  }
279  }
280 
281  printOperand(MI, OpNo, O);
282  return false;
283 }
284 
285 // At the moment, all inline asm memory operands are a single register.
286 // In any case, the output of this routine should always be just one
287 // assembler operand.
288 
289 bool PPCAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
290  unsigned AsmVariant,
291  const char *ExtraCode,
292  raw_ostream &O) {
293  if (ExtraCode && ExtraCode[0]) {
294  if (ExtraCode[1] != 0) return true; // Unknown modifier.
295 
296  switch (ExtraCode[0]) {
297  default: return true; // Unknown modifier.
298  case 'y': // A memory reference for an X-form instruction
299  {
300  const char *RegName = "r0";
301  if (!Subtarget->isDarwin())
302  RegName = stripRegisterPrefix(RegName);
303  O << RegName << ", ";
304  printOperand(MI, OpNo, O);
305  return false;
306  }
307  case 'U': // Print 'u' for update form.
308  case 'X': // Print 'x' for indexed form.
309  {
310  // FIXME: Currently for PowerPC memory operands are always loaded
311  // into a register, so we never get an update or indexed form.
312  // This is bad even for offset forms, since even if we know we
313  // have a value in -16(r1), we will generate a load into r<n>
314  // and then load from 0(r<n>). Until that issue is fixed,
315  // tolerate 'U' and 'X' but don't output anything.
316  assert(MI->getOperand(OpNo).isReg());
317  return false;
318  }
319  }
320  }
321 
322  assert(MI->getOperand(OpNo).isReg());
323  O << "0(";
324  printOperand(MI, OpNo, O);
325  O << ")";
326  return false;
327 }
328 
329 /// lookUpOrCreateTOCEntry -- Given a symbol, look up whether a TOC entry
330 /// exists for it. If not, create one. Then return a symbol that references
331 /// the TOC entry.
332 MCSymbol *PPCAsmPrinter::lookUpOrCreateTOCEntry(MCSymbol *Sym) {
333  MCSymbol *&TOCEntry = TOC[Sym];
334  if (!TOCEntry)
335  TOCEntry = createTempSymbol("C");
336  return TOCEntry;
337 }
338 
339 void PPCAsmPrinter::EmitEndOfAsmFile(Module &M) {
340  SM.serializeToStackMapSection();
341 }
342 
343 void PPCAsmPrinter::LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI) {
344  unsigned NumNOPBytes = MI.getOperand(1).getImm();
345 
346  SM.recordStackMap(MI);
347  assert(NumNOPBytes % 4 == 0 && "Invalid number of NOP bytes requested!");
348 
349  // Scan ahead to trim the shadow.
350  const MachineBasicBlock &MBB = *MI.getParent();
352  ++MII;
353  while (NumNOPBytes > 0) {
354  if (MII == MBB.end() || MII->isCall() ||
355  MII->getOpcode() == PPC::DBG_VALUE ||
356  MII->getOpcode() == TargetOpcode::PATCHPOINT ||
357  MII->getOpcode() == TargetOpcode::STACKMAP)
358  break;
359  ++MII;
360  NumNOPBytes -= 4;
361  }
362 
363  // Emit nops.
364  for (unsigned i = 0; i < NumNOPBytes; i += 4)
365  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP));
366 }
367 
368 // Lower a patchpoint of the form:
369 // [<def>], <id>, <numBytes>, <target>, <numArgs>
370 void PPCAsmPrinter::LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI) {
371  SM.recordPatchPoint(MI);
372  PatchPointOpers Opers(&MI);
373 
374  unsigned EncodedBytes = 0;
375  const MachineOperand &CalleeMO = Opers.getCallTarget();
376 
377  if (CalleeMO.isImm()) {
378  int64_t CallTarget = CalleeMO.getImm();
379  if (CallTarget) {
380  assert((CallTarget & 0xFFFFFFFFFFFF) == CallTarget &&
381  "High 16 bits of call target should be zero.");
382  unsigned ScratchReg = MI.getOperand(Opers.getNextScratchIdx()).getReg();
383  EncodedBytes = 0;
384  // Materialize the jump address:
385  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI8)
386  .addReg(ScratchReg)
387  .addImm((CallTarget >> 32) & 0xFFFF));
388  ++EncodedBytes;
389  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::RLDIC)
390  .addReg(ScratchReg)
391  .addReg(ScratchReg)
392  .addImm(32).addImm(16));
393  ++EncodedBytes;
394  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORIS8)
395  .addReg(ScratchReg)
396  .addReg(ScratchReg)
397  .addImm((CallTarget >> 16) & 0xFFFF));
398  ++EncodedBytes;
399  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORI8)
400  .addReg(ScratchReg)
401  .addReg(ScratchReg)
402  .addImm(CallTarget & 0xFFFF));
403 
404  // Save the current TOC pointer before the remote call.
405  int TOCSaveOffset = Subtarget->isELFv2ABI() ? 24 : 40;
406  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::STD)
407  .addReg(PPC::X2)
408  .addImm(TOCSaveOffset)
409  .addReg(PPC::X1));
410  ++EncodedBytes;
411 
412  // If we're on ELFv1, then we need to load the actual function pointer
413  // from the function descriptor.
414  if (!Subtarget->isELFv2ABI()) {
415  // Load the new TOC pointer and the function address, but not r11
416  // (needing this is rare, and loading it here would prevent passing it
417  // via a 'nest' parameter.
418  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD)
419  .addReg(PPC::X2)
420  .addImm(8)
421  .addReg(ScratchReg));
422  ++EncodedBytes;
423  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD)
424  .addReg(ScratchReg)
425  .addImm(0)
426  .addReg(ScratchReg));
427  ++EncodedBytes;
428  }
429 
430  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTCTR8)
431  .addReg(ScratchReg));
432  ++EncodedBytes;
433  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BCTRL8));
434  ++EncodedBytes;
435 
436  // Restore the TOC pointer after the call.
437  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD)
438  .addReg(PPC::X2)
439  .addImm(TOCSaveOffset)
440  .addReg(PPC::X1));
441  ++EncodedBytes;
442  }
443  } else if (CalleeMO.isGlobal()) {
444  const GlobalValue *GValue = CalleeMO.getGlobal();
445  MCSymbol *MOSymbol = getSymbol(GValue);
446  const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, OutContext);
447 
448  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL8_NOP)
449  .addExpr(SymVar));
450  EncodedBytes += 2;
451  }
452 
453  // Each instruction is 4 bytes.
454  EncodedBytes *= 4;
455 
456  // Emit padding.
457  unsigned NumBytes = Opers.getNumPatchBytes();
458  assert(NumBytes >= EncodedBytes &&
459  "Patchpoint can't request size less than the length of a call.");
460  assert((NumBytes - EncodedBytes) % 4 == 0 &&
461  "Invalid number of NOP bytes requested!");
462  for (unsigned i = EncodedBytes; i < NumBytes; i += 4)
463  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP));
464 }
465 
466 /// EmitTlsCall -- Given a GETtls[ld]ADDR[32] instruction, print a
467 /// call to __tls_get_addr to the current output stream.
468 void PPCAsmPrinter::EmitTlsCall(const MachineInstr *MI,
470  StringRef Name = "__tls_get_addr";
471  MCSymbol *TlsGetAddr = OutContext.getOrCreateSymbol(Name);
473 
474  assert(MI->getOperand(0).isReg() &&
475  ((Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::X3) ||
476  (!Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::R3)) &&
477  "GETtls[ld]ADDR[32] must define GPR3");
478  assert(MI->getOperand(1).isReg() &&
479  ((Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::X3) ||
480  (!Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::R3)) &&
481  "GETtls[ld]ADDR[32] must read GPR3");
482 
483  if (!Subtarget->isPPC64() && !Subtarget->isDarwin() &&
484  isPositionIndependent())
486  const MCSymbolRefExpr *TlsRef =
487  MCSymbolRefExpr::create(TlsGetAddr, Kind, OutContext);
488  const MachineOperand &MO = MI->getOperand(2);
489  const GlobalValue *GValue = MO.getGlobal();
490  MCSymbol *MOSymbol = getSymbol(GValue);
491  const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, VK, OutContext);
492  EmitToStreamer(*OutStreamer,
493  MCInstBuilder(Subtarget->isPPC64() ?
494  PPC::BL8_NOP_TLS : PPC::BL_TLS)
495  .addExpr(TlsRef)
496  .addExpr(SymVar));
497 }
498 
499 /// EmitInstruction -- Print out a single PowerPC MI in Darwin syntax to
500 /// the current output stream.
501 ///
502 void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
503  MCInst TmpInst;
504  bool isPPC64 = Subtarget->isPPC64();
505  bool isDarwin = TM.getTargetTriple().isOSDarwin();
506  const Module *M = MF->getFunction()->getParent();
508 
509  // Lower multi-instruction pseudo operations.
510  switch (MI->getOpcode()) {
511  default: break;
512  case TargetOpcode::DBG_VALUE:
513  llvm_unreachable("Should be handled target independently");
514  case TargetOpcode::STACKMAP:
515  return LowerSTACKMAP(SM, *MI);
516  case TargetOpcode::PATCHPOINT:
517  return LowerPATCHPOINT(SM, *MI);
518 
519  case PPC::MoveGOTtoLR: {
520  // Transform %LR = MoveGOTtoLR
521  // Into this: bl _GLOBAL_OFFSET_TABLE_@local-4
522  // _GLOBAL_OFFSET_TABLE_@local-4 (instruction preceding
523  // _GLOBAL_OFFSET_TABLE_) has exactly one instruction:
524  // blrl
525  // This will return the pointer to _GLOBAL_OFFSET_TABLE_@local
526  MCSymbol *GOTSymbol =
527  OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_"));
528  const MCExpr *OffsExpr =
531  OutContext),
532  MCConstantExpr::create(4, OutContext),
533  OutContext);
534 
535  // Emit the 'bl'.
536  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL).addExpr(OffsExpr));
537  return;
538  }
539  case PPC::MovePCtoLR:
540  case PPC::MovePCtoLR8: {
541  // Transform %LR = MovePCtoLR
542  // Into this, where the label is the PIC base:
543  // bl L1$pb
544  // L1$pb:
545  MCSymbol *PICBase = MF->getPICBaseSymbol();
546 
547  // Emit the 'bl'.
548  EmitToStreamer(*OutStreamer,
549  MCInstBuilder(PPC::BL)
550  // FIXME: We would like an efficient form for this, so we
551  // don't have to do a lot of extra uniquing.
552  .addExpr(MCSymbolRefExpr::create(PICBase, OutContext)));
553 
554  // Emit the label.
555  OutStreamer->EmitLabel(PICBase);
556  return;
557  }
558  case PPC::UpdateGBR: {
559  // Transform %Rd = UpdateGBR(%Rt, %Ri)
560  // Into: lwz %Rt, .L0$poff - .L0$pb(%Ri)
561  // add %Rd, %Rt, %Ri
562  // Get the offset from the GOT Base Register to the GOT
563  LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin);
564  MCSymbol *PICOffset =
565  MF->getInfo<PPCFunctionInfo>()->getPICOffsetSymbol();
566  TmpInst.setOpcode(PPC::LWZ);
567  const MCExpr *Exp =
568  MCSymbolRefExpr::create(PICOffset, MCSymbolRefExpr::VK_None, OutContext);
569  const MCExpr *PB =
570  MCSymbolRefExpr::create(MF->getPICBaseSymbol(),
572  OutContext);
573  const MCOperand TR = TmpInst.getOperand(1);
574  const MCOperand PICR = TmpInst.getOperand(0);
575 
576  // Step 1: lwz %Rt, .L$poff - .L$pb(%Ri)
577  TmpInst.getOperand(1) =
578  MCOperand::createExpr(MCBinaryExpr::createSub(Exp, PB, OutContext));
579  TmpInst.getOperand(0) = TR;
580  TmpInst.getOperand(2) = PICR;
581  EmitToStreamer(*OutStreamer, TmpInst);
582 
583  TmpInst.setOpcode(PPC::ADD4);
584  TmpInst.getOperand(0) = PICR;
585  TmpInst.getOperand(1) = TR;
586  TmpInst.getOperand(2) = PICR;
587  EmitToStreamer(*OutStreamer, TmpInst);
588  return;
589  }
590  case PPC::LWZtoc: {
591  // Transform %R3 = LWZtoc <ga:@min1>, %R2
592  LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin);
593 
594  // Change the opcode to LWZ, and the global address operand to be a
595  // reference to the GOT entry we will synthesize later.
596  TmpInst.setOpcode(PPC::LWZ);
597  const MachineOperand &MO = MI->getOperand(1);
598 
599  // Map symbol -> label of TOC entry
600  assert(MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress());
601  MCSymbol *MOSymbol = nullptr;
602  if (MO.isGlobal())
603  MOSymbol = getSymbol(MO.getGlobal());
604  else if (MO.isCPI())
605  MOSymbol = GetCPISymbol(MO.getIndex());
606  else if (MO.isJTI())
607  MOSymbol = GetJTISymbol(MO.getIndex());
608  else if (MO.isBlockAddress())
609  MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress());
610 
611  if (PL == PICLevel::SmallPIC) {
612  const MCExpr *Exp =
614  OutContext);
615  TmpInst.getOperand(1) = MCOperand::createExpr(Exp);
616  } else {
617  MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol);
618 
619  const MCExpr *Exp =
621  OutContext);
622  const MCExpr *PB =
623  MCSymbolRefExpr::create(OutContext.getOrCreateSymbol(Twine(".LTOC")),
624  OutContext);
625  Exp = MCBinaryExpr::createSub(Exp, PB, OutContext);
626  TmpInst.getOperand(1) = MCOperand::createExpr(Exp);
627  }
628  EmitToStreamer(*OutStreamer, TmpInst);
629  return;
630  }
631  case PPC::LDtocJTI:
632  case PPC::LDtocCPT:
633  case PPC::LDtocBA:
634  case PPC::LDtoc: {
635  // Transform %X3 = LDtoc <ga:@min1>, %X2
636  LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin);
637 
638  // Change the opcode to LD, and the global address operand to be a
639  // reference to the TOC entry we will synthesize later.
640  TmpInst.setOpcode(PPC::LD);
641  const MachineOperand &MO = MI->getOperand(1);
642 
643  // Map symbol -> label of TOC entry
644  assert(MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress());
645  MCSymbol *MOSymbol = nullptr;
646  if (MO.isGlobal())
647  MOSymbol = getSymbol(MO.getGlobal());
648  else if (MO.isCPI())
649  MOSymbol = GetCPISymbol(MO.getIndex());
650  else if (MO.isJTI())
651  MOSymbol = GetJTISymbol(MO.getIndex());
652  else if (MO.isBlockAddress())
653  MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress());
654 
655  MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol);
656 
657  const MCExpr *Exp =
659  OutContext);
660  TmpInst.getOperand(1) = MCOperand::createExpr(Exp);
661  EmitToStreamer(*OutStreamer, TmpInst);
662  return;
663  }
664 
665  case PPC::ADDIStocHA: {
666  // Transform %Xd = ADDIStocHA %X2, <ga:@sym>
667  LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin);
668 
669  // Change the opcode to ADDIS8. If the global address is external, has
670  // common linkage, is a non-local function address, or is a jump table
671  // address, then generate a TOC entry and reference that. Otherwise
672  // reference the symbol directly.
673  TmpInst.setOpcode(PPC::ADDIS8);
674  const MachineOperand &MO = MI->getOperand(2);
675  assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() ||
676  MO.isBlockAddress()) &&
677  "Invalid operand for ADDIStocHA!");
678  MCSymbol *MOSymbol = nullptr;
679  bool GlobalToc = false;
680 
681  if (MO.isGlobal()) {
682  const GlobalValue *GV = MO.getGlobal();
683  MOSymbol = getSymbol(GV);
684  unsigned char GVFlags = Subtarget->classifyGlobalReference(GV);
685  GlobalToc = (GVFlags & PPCII::MO_NLP_FLAG);
686  } else if (MO.isCPI()) {
687  MOSymbol = GetCPISymbol(MO.getIndex());
688  } else if (MO.isJTI()) {
689  MOSymbol = GetJTISymbol(MO.getIndex());
690  } else if (MO.isBlockAddress()) {
691  MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress());
692  }
693 
694  if (GlobalToc || MO.isJTI() || MO.isBlockAddress() ||
695  TM.getCodeModel() == CodeModel::Large)
696  MOSymbol = lookUpOrCreateTOCEntry(MOSymbol);
697 
698  const MCExpr *Exp =
700  OutContext);
701 
702  if (!MO.isJTI() && MO.getOffset())
703  Exp = MCBinaryExpr::createAdd(Exp,
705  OutContext),
706  OutContext);
707 
708  TmpInst.getOperand(2) = MCOperand::createExpr(Exp);
709  EmitToStreamer(*OutStreamer, TmpInst);
710  return;
711  }
712  case PPC::LDtocL: {
713  // Transform %Xd = LDtocL <ga:@sym>, %Xs
714  LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin);
715 
716  // Change the opcode to LD. If the global address is external, has
717  // common linkage, or is a jump table address, then reference the
718  // associated TOC entry. Otherwise reference the symbol directly.
719  TmpInst.setOpcode(PPC::LD);
720  const MachineOperand &MO = MI->getOperand(1);
721  assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() ||
722  MO.isBlockAddress()) &&
723  "Invalid operand for LDtocL!");
724  MCSymbol *MOSymbol = nullptr;
725 
726  if (MO.isJTI())
727  MOSymbol = lookUpOrCreateTOCEntry(GetJTISymbol(MO.getIndex()));
728  else if (MO.isBlockAddress()) {
729  MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress());
730  MOSymbol = lookUpOrCreateTOCEntry(MOSymbol);
731  }
732  else if (MO.isCPI()) {
733  MOSymbol = GetCPISymbol(MO.getIndex());
734  if (TM.getCodeModel() == CodeModel::Large)
735  MOSymbol = lookUpOrCreateTOCEntry(MOSymbol);
736  }
737  else if (MO.isGlobal()) {
738  const GlobalValue *GV = MO.getGlobal();
739  MOSymbol = getSymbol(GV);
740  DEBUG(
741  unsigned char GVFlags = Subtarget->classifyGlobalReference(GV);
742  assert((GVFlags & PPCII::MO_NLP_FLAG) &&
743  "LDtocL used on symbol that could be accessed directly is "
744  "invalid. Must match ADDIStocHA."));
745  MOSymbol = lookUpOrCreateTOCEntry(MOSymbol);
746  }
747 
748  const MCExpr *Exp =
750  OutContext);
751  TmpInst.getOperand(1) = MCOperand::createExpr(Exp);
752  EmitToStreamer(*OutStreamer, TmpInst);
753  return;
754  }
755  case PPC::ADDItocL: {
756  // Transform %Xd = ADDItocL %Xs, <ga:@sym>
757  LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin);
758 
759  // Change the opcode to ADDI8. If the global address is external, then
760  // generate a TOC entry and reference that. Otherwise reference the
761  // symbol directly.
762  TmpInst.setOpcode(PPC::ADDI8);
763  const MachineOperand &MO = MI->getOperand(2);
764  assert((MO.isGlobal() || MO.isCPI()) && "Invalid operand for ADDItocL");
765  MCSymbol *MOSymbol = nullptr;
766 
767  if (MO.isGlobal()) {
768  const GlobalValue *GV = MO.getGlobal();
769  DEBUG(
770  unsigned char GVFlags = Subtarget->classifyGlobalReference(GV);
771  assert (
772  !(GVFlags & PPCII::MO_NLP_FLAG) &&
773  "Interposable definitions must use indirect access."));
774  MOSymbol = getSymbol(GV);
775  } else if (MO.isCPI()) {
776  MOSymbol = GetCPISymbol(MO.getIndex());
777  }
778 
779  const MCExpr *Exp =
781  OutContext);
782  TmpInst.getOperand(2) = MCOperand::createExpr(Exp);
783  EmitToStreamer(*OutStreamer, TmpInst);
784  return;
785  }
786  case PPC::ADDISgotTprelHA: {
787  // Transform: %Xd = ADDISgotTprelHA %X2, <ga:@sym>
788  // Into: %Xd = ADDIS8 %X2, sym@got@tlsgd@ha
789  assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC");
790  const MachineOperand &MO = MI->getOperand(2);
791  const GlobalValue *GValue = MO.getGlobal();
792  MCSymbol *MOSymbol = getSymbol(GValue);
793  const MCExpr *SymGotTprel =
795  OutContext);
796  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8)
797  .addReg(MI->getOperand(0).getReg())
798  .addReg(MI->getOperand(1).getReg())
799  .addExpr(SymGotTprel));
800  return;
801  }
802  case PPC::LDgotTprelL:
803  case PPC::LDgotTprelL32: {
804  // Transform %Xd = LDgotTprelL <ga:@sym>, %Xs
805  LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin);
806 
807  // Change the opcode to LD.
808  TmpInst.setOpcode(isPPC64 ? PPC::LD : PPC::LWZ);
809  const MachineOperand &MO = MI->getOperand(1);
810  const GlobalValue *GValue = MO.getGlobal();
811  MCSymbol *MOSymbol = getSymbol(GValue);
812  const MCExpr *Exp =
814  OutContext);
815  TmpInst.getOperand(1) = MCOperand::createExpr(Exp);
816  EmitToStreamer(*OutStreamer, TmpInst);
817  return;
818  }
819 
820  case PPC::PPC32PICGOT: {
821  MCSymbol *GOTSymbol = OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_"));
822  MCSymbol *GOTRef = OutContext.createTempSymbol();
823  MCSymbol *NextInstr = OutContext.createTempSymbol();
824 
825  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL)
826  // FIXME: We would like an efficient form for this, so we don't have to do
827  // a lot of extra uniquing.
828  .addExpr(MCSymbolRefExpr::create(NextInstr, OutContext)));
829  const MCExpr *OffsExpr =
830  MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, OutContext),
831  MCSymbolRefExpr::create(GOTRef, OutContext),
832  OutContext);
833  OutStreamer->EmitLabel(GOTRef);
834  OutStreamer->EmitValue(OffsExpr, 4);
835  OutStreamer->EmitLabel(NextInstr);
836  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR)
837  .addReg(MI->getOperand(0).getReg()));
838  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LWZ)
839  .addReg(MI->getOperand(1).getReg())
840  .addImm(0)
841  .addReg(MI->getOperand(0).getReg()));
842  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD4)
843  .addReg(MI->getOperand(0).getReg())
844  .addReg(MI->getOperand(1).getReg())
845  .addReg(MI->getOperand(0).getReg()));
846  return;
847  }
848  case PPC::PPC32GOT: {
849  MCSymbol *GOTSymbol =
850  OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_"));
851  const MCExpr *SymGotTlsL = MCSymbolRefExpr::create(
852  GOTSymbol, MCSymbolRefExpr::VK_PPC_LO, OutContext);
853  const MCExpr *SymGotTlsHA = MCSymbolRefExpr::create(
854  GOTSymbol, MCSymbolRefExpr::VK_PPC_HA, OutContext);
855  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI)
856  .addReg(MI->getOperand(0).getReg())
857  .addExpr(SymGotTlsL));
858  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS)
859  .addReg(MI->getOperand(0).getReg())
860  .addReg(MI->getOperand(0).getReg())
861  .addExpr(SymGotTlsHA));
862  return;
863  }
864  case PPC::ADDIStlsgdHA: {
865  // Transform: %Xd = ADDIStlsgdHA %X2, <ga:@sym>
866  // Into: %Xd = ADDIS8 %X2, sym@got@tlsgd@ha
867  assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC");
868  const MachineOperand &MO = MI->getOperand(2);
869  const GlobalValue *GValue = MO.getGlobal();
870  MCSymbol *MOSymbol = getSymbol(GValue);
871  const MCExpr *SymGotTlsGD =
873  OutContext);
874  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8)
875  .addReg(MI->getOperand(0).getReg())
876  .addReg(MI->getOperand(1).getReg())
877  .addExpr(SymGotTlsGD));
878  return;
879  }
880  case PPC::ADDItlsgdL:
881  // Transform: %Xd = ADDItlsgdL %Xs, <ga:@sym>
882  // Into: %Xd = ADDI8 %Xs, sym@got@tlsgd@l
883  case PPC::ADDItlsgdL32: {
884  // Transform: %Rd = ADDItlsgdL32 %Rs, <ga:@sym>
885  // Into: %Rd = ADDI %Rs, sym@got@tlsgd
886  const MachineOperand &MO = MI->getOperand(2);
887  const GlobalValue *GValue = MO.getGlobal();
888  MCSymbol *MOSymbol = getSymbol(GValue);
889  const MCExpr *SymGotTlsGD = MCSymbolRefExpr::create(
890  MOSymbol, Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TLSGD_LO
892  OutContext);
893  EmitToStreamer(*OutStreamer,
894  MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI)
895  .addReg(MI->getOperand(0).getReg())
896  .addReg(MI->getOperand(1).getReg())
897  .addExpr(SymGotTlsGD));
898  return;
899  }
900  case PPC::GETtlsADDR:
901  // Transform: %X3 = GETtlsADDR %X3, <ga:@sym>
902  // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsgd)
903  case PPC::GETtlsADDR32: {
904  // Transform: %R3 = GETtlsADDR32 %R3, <ga:@sym>
905  // Into: BL_TLS __tls_get_addr(sym at tlsgd)@PLT
906  EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSGD);
907  return;
908  }
909  case PPC::ADDIStlsldHA: {
910  // Transform: %Xd = ADDIStlsldHA %X2, <ga:@sym>
911  // Into: %Xd = ADDIS8 %X2, sym@got@tlsld@ha
912  assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC");
913  const MachineOperand &MO = MI->getOperand(2);
914  const GlobalValue *GValue = MO.getGlobal();
915  MCSymbol *MOSymbol = getSymbol(GValue);
916  const MCExpr *SymGotTlsLD =
918  OutContext);
919  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8)
920  .addReg(MI->getOperand(0).getReg())
921  .addReg(MI->getOperand(1).getReg())
922  .addExpr(SymGotTlsLD));
923  return;
924  }
925  case PPC::ADDItlsldL:
926  // Transform: %Xd = ADDItlsldL %Xs, <ga:@sym>
927  // Into: %Xd = ADDI8 %Xs, sym@got@tlsld@l
928  case PPC::ADDItlsldL32: {
929  // Transform: %Rd = ADDItlsldL32 %Rs, <ga:@sym>
930  // Into: %Rd = ADDI %Rs, sym@got@tlsld
931  const MachineOperand &MO = MI->getOperand(2);
932  const GlobalValue *GValue = MO.getGlobal();
933  MCSymbol *MOSymbol = getSymbol(GValue);
934  const MCExpr *SymGotTlsLD = MCSymbolRefExpr::create(
935  MOSymbol, Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TLSLD_LO
937  OutContext);
938  EmitToStreamer(*OutStreamer,
939  MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI)
940  .addReg(MI->getOperand(0).getReg())
941  .addReg(MI->getOperand(1).getReg())
942  .addExpr(SymGotTlsLD));
943  return;
944  }
945  case PPC::GETtlsldADDR:
946  // Transform: %X3 = GETtlsldADDR %X3, <ga:@sym>
947  // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsld)
948  case PPC::GETtlsldADDR32: {
949  // Transform: %R3 = GETtlsldADDR32 %R3, <ga:@sym>
950  // Into: BL_TLS __tls_get_addr(sym at tlsld)@PLT
951  EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSLD);
952  return;
953  }
954  case PPC::ADDISdtprelHA:
955  // Transform: %Xd = ADDISdtprelHA %Xs, <ga:@sym>
956  // Into: %Xd = ADDIS8 %Xs, sym@dtprel@ha
957  case PPC::ADDISdtprelHA32: {
958  // Transform: %Rd = ADDISdtprelHA32 %Rs, <ga:@sym>
959  // Into: %Rd = ADDIS %Rs, sym@dtprel@ha
960  const MachineOperand &MO = MI->getOperand(2);
961  const GlobalValue *GValue = MO.getGlobal();
962  MCSymbol *MOSymbol = getSymbol(GValue);
963  const MCExpr *SymDtprel =
965  OutContext);
966  EmitToStreamer(
967  *OutStreamer,
968  MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDIS8 : PPC::ADDIS)
969  .addReg(MI->getOperand(0).getReg())
970  .addReg(MI->getOperand(1).getReg())
971  .addExpr(SymDtprel));
972  return;
973  }
974  case PPC::ADDIdtprelL:
975  // Transform: %Xd = ADDIdtprelL %Xs, <ga:@sym>
976  // Into: %Xd = ADDI8 %Xs, sym@dtprel@l
977  case PPC::ADDIdtprelL32: {
978  // Transform: %Rd = ADDIdtprelL32 %Rs, <ga:@sym>
979  // Into: %Rd = ADDI %Rs, sym@dtprel@l
980  const MachineOperand &MO = MI->getOperand(2);
981  const GlobalValue *GValue = MO.getGlobal();
982  MCSymbol *MOSymbol = getSymbol(GValue);
983  const MCExpr *SymDtprel =
985  OutContext);
986  EmitToStreamer(*OutStreamer,
987  MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI)
988  .addReg(MI->getOperand(0).getReg())
989  .addReg(MI->getOperand(1).getReg())
990  .addExpr(SymDtprel));
991  return;
992  }
993  case PPC::MFOCRF:
994  case PPC::MFOCRF8:
995  if (!Subtarget->hasMFOCRF()) {
996  // Transform: %R3 = MFOCRF %CR7
997  // Into: %R3 = MFCR ;; cr7
998  unsigned NewOpcode =
999  MI->getOpcode() == PPC::MFOCRF ? PPC::MFCR : PPC::MFCR8;
1000  OutStreamer->AddComment(PPCInstPrinter::
1001  getRegisterName(MI->getOperand(1).getReg()));
1002  EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode)
1003  .addReg(MI->getOperand(0).getReg()));
1004  return;
1005  }
1006  break;
1007  case PPC::MTOCRF:
1008  case PPC::MTOCRF8:
1009  if (!Subtarget->hasMFOCRF()) {
1010  // Transform: %CR7 = MTOCRF %R3
1011  // Into: MTCRF mask, %R3 ;; cr7
1012  unsigned NewOpcode =
1013  MI->getOpcode() == PPC::MTOCRF ? PPC::MTCRF : PPC::MTCRF8;
1014  unsigned Mask = 0x80 >> OutContext.getRegisterInfo()
1015  ->getEncodingValue(MI->getOperand(0).getReg());
1016  OutStreamer->AddComment(PPCInstPrinter::
1017  getRegisterName(MI->getOperand(0).getReg()));
1018  EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode)
1019  .addImm(Mask)
1020  .addReg(MI->getOperand(1).getReg()));
1021  return;
1022  }
1023  break;
1024  case PPC::LD:
1025  case PPC::STD:
1026  case PPC::LWA_32:
1027  case PPC::LWA: {
1028  // Verify alignment is legal, so we don't create relocations
1029  // that can't be supported.
1030  // FIXME: This test is currently disabled for Darwin. The test
1031  // suite shows a handful of test cases that fail this check for
1032  // Darwin. Those need to be investigated before this sanity test
1033  // can be enabled for those subtargets.
1034  if (!Subtarget->isDarwin()) {
1035  unsigned OpNum = (MI->getOpcode() == PPC::STD) ? 2 : 1;
1036  const MachineOperand &MO = MI->getOperand(OpNum);
1037  if (MO.isGlobal() && MO.getGlobal()->getAlignment() < 4)
1038  llvm_unreachable("Global must be word-aligned for LD, STD, LWA!");
1039  }
1040  // Now process the instruction normally.
1041  break;
1042  }
1043  }
1044 
1045  LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin);
1046  EmitToStreamer(*OutStreamer, TmpInst);
1047 }
1048 
1049 void PPCLinuxAsmPrinter::EmitStartOfAsmFile(Module &M) {
1050  if (static_cast<const PPCTargetMachine &>(TM).isELFv2ABI()) {
1052  static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());
1053 
1054  if (TS)
1055  TS->emitAbiVersion(2);
1056  }
1057 
1058  if (static_cast<const PPCTargetMachine &>(TM).isPPC64() ||
1059  !isPositionIndependent())
1061 
1062  if (M.getPICLevel() == PICLevel::SmallPIC)
1064 
1065  OutStreamer->SwitchSection(OutContext.getELFSection(
1067 
1068  MCSymbol *TOCSym = OutContext.getOrCreateSymbol(Twine(".LTOC"));
1069  MCSymbol *CurrentPos = OutContext.createTempSymbol();
1070 
1071  OutStreamer->EmitLabel(CurrentPos);
1072 
1073  // The GOT pointer points to the middle of the GOT, in order to reference the
1074  // entire 64kB range. 0x8000 is the midpoint.
1075  const MCExpr *tocExpr =
1076  MCBinaryExpr::createAdd(MCSymbolRefExpr::create(CurrentPos, OutContext),
1077  MCConstantExpr::create(0x8000, OutContext),
1078  OutContext);
1079 
1080  OutStreamer->EmitAssignment(TOCSym, tocExpr);
1081 
1082  OutStreamer->SwitchSection(getObjFileLowering().getTextSection());
1083 }
1084 
1085 void PPCLinuxAsmPrinter::EmitFunctionEntryLabel() {
1086  // linux/ppc32 - Normal entry label.
1087  if (!Subtarget->isPPC64() &&
1088  (!isPositionIndependent() ||
1089  MF->getFunction()->getParent()->getPICLevel() == PICLevel::SmallPIC))
1091 
1092  if (!Subtarget->isPPC64()) {
1093  const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>();
1094  if (PPCFI->usesPICBase()) {
1095  MCSymbol *RelocSymbol = PPCFI->getPICOffsetSymbol();
1096  MCSymbol *PICBase = MF->getPICBaseSymbol();
1097  OutStreamer->EmitLabel(RelocSymbol);
1098 
1099  const MCExpr *OffsExpr =
1101  MCSymbolRefExpr::create(OutContext.getOrCreateSymbol(Twine(".LTOC")),
1102  OutContext),
1103  MCSymbolRefExpr::create(PICBase, OutContext),
1104  OutContext);
1105  OutStreamer->EmitValue(OffsExpr, 4);
1106  OutStreamer->EmitLabel(CurrentFnSym);
1107  return;
1108  } else
1110  }
1111 
1112  // ELFv2 ABI - Normal entry label.
1113  if (Subtarget->isELFv2ABI()) {
1114  // In the Large code model, we allow arbitrary displacements between
1115  // the text section and its associated TOC section. We place the
1116  // full 8-byte offset to the TOC in memory immediatedly preceding
1117  // the function global entry point.
1118  if (TM.getCodeModel() == CodeModel::Large
1119  && !MF->getRegInfo().use_empty(PPC::X2)) {
1120  const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>();
1121 
1122  MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC."));
1123  MCSymbol *GlobalEPSymbol = PPCFI->getGlobalEPSymbol();
1124  const MCExpr *TOCDeltaExpr =
1125  MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext),
1126  MCSymbolRefExpr::create(GlobalEPSymbol,
1127  OutContext),
1128  OutContext);
1129 
1130  OutStreamer->EmitLabel(PPCFI->getTOCOffsetSymbol());
1131  OutStreamer->EmitValue(TOCDeltaExpr, 8);
1132  }
1134  }
1135 
1136  // Emit an official procedure descriptor.
1137  MCSectionSubPair Current = OutStreamer->getCurrentSection();
1138  MCSectionELF *Section = OutStreamer->getContext().getELFSection(
1140  OutStreamer->SwitchSection(Section);
1141  OutStreamer->EmitLabel(CurrentFnSym);
1142  OutStreamer->EmitValueToAlignment(8);
1143  MCSymbol *Symbol1 = CurrentFnSymForSize;
1144  // Generates a R_PPC64_ADDR64 (from FK_DATA_8) relocation for the function
1145  // entry point.
1146  OutStreamer->EmitValue(MCSymbolRefExpr::create(Symbol1, OutContext),
1147  8 /*size*/);
1148  MCSymbol *Symbol2 = OutContext.getOrCreateSymbol(StringRef(".TOC."));
1149  // Generates a R_PPC64_TOC relocation for TOC base insertion.
1150  OutStreamer->EmitValue(
1152  8/*size*/);
1153  // Emit a null environment pointer.
1154  OutStreamer->EmitIntValue(0, 8 /* size */);
1155  OutStreamer->SwitchSection(Current.first, Current.second);
1156 }
1157 
1158 bool PPCLinuxAsmPrinter::doFinalization(Module &M) {
1159  const DataLayout &DL = getDataLayout();
1160 
1161  bool isPPC64 = DL.getPointerSizeInBits() == 64;
1162 
1163  PPCTargetStreamer &TS =
1164  static_cast<PPCTargetStreamer &>(*OutStreamer->getTargetStreamer());
1165 
1166  if (!TOC.empty()) {
1168 
1169  if (isPPC64)
1170  Section = OutStreamer->getContext().getELFSection(
1172  else
1173  Section = OutStreamer->getContext().getELFSection(
1175  OutStreamer->SwitchSection(Section);
1176 
1177  for (MapVector<MCSymbol*, MCSymbol*>::iterator I = TOC.begin(),
1178  E = TOC.end(); I != E; ++I) {
1179  OutStreamer->EmitLabel(I->second);
1180  MCSymbol *S = I->first;
1181  if (isPPC64) {
1182  TS.emitTCEntry(*S);
1183  } else {
1184  OutStreamer->EmitValueToAlignment(4);
1185  OutStreamer->EmitSymbolValue(S, 4);
1186  }
1187  }
1188  }
1189 
1190  return AsmPrinter::doFinalization(M);
1191 }
1192 
1193 /// EmitFunctionBodyStart - Emit a global entry point prefix for ELFv2.
1194 void PPCLinuxAsmPrinter::EmitFunctionBodyStart() {
1195  // In the ELFv2 ABI, in functions that use the TOC register, we need to
1196  // provide two entry points. The ABI guarantees that when calling the
1197  // local entry point, r2 is set up by the caller to contain the TOC base
1198  // for this function, and when calling the global entry point, r12 is set
1199  // up by the caller to hold the address of the global entry point. We
1200  // thus emit a prefix sequence along the following lines:
1201  //
1202  // func:
1203  // .Lfunc_gepNN:
1204  // # global entry point
1205  // addis r2,r12,(.TOC.-.Lfunc_gepNN)@ha
1206  // addi r2,r2,(.TOC.-.Lfunc_gepNN)@l
1207  // .Lfunc_lepNN:
1208  // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN
1209  // # local entry point, followed by function body
1210  //
1211  // For the Large code model, we create
1212  //
1213  // .Lfunc_tocNN:
1214  // .quad .TOC.-.Lfunc_gepNN # done by EmitFunctionEntryLabel
1215  // func:
1216  // .Lfunc_gepNN:
1217  // # global entry point
1218  // ld r2,.Lfunc_tocNN-.Lfunc_gepNN(r12)
1219  // add r2,r2,r12
1220  // .Lfunc_lepNN:
1221  // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN
1222  // # local entry point, followed by function body
1223  //
1224  // This ensures we have r2 set up correctly while executing the function
1225  // body, no matter which entry point is called.
1226  if (Subtarget->isELFv2ABI()
1227  // Only do all that if the function uses r2 in the first place.
1228  && !MF->getRegInfo().use_empty(PPC::X2)) {
1229  // Note: The logic here must be synchronized with the code in the
1230  // branch-selection pass which sets the offset of the first block in the
1231  // function. This matters because it affects the alignment.
1232  const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>();
1233 
1234  MCSymbol *GlobalEntryLabel = PPCFI->getGlobalEPSymbol();
1235  OutStreamer->EmitLabel(GlobalEntryLabel);
1236  const MCSymbolRefExpr *GlobalEntryLabelExp =
1237  MCSymbolRefExpr::create(GlobalEntryLabel, OutContext);
1238 
1239  if (TM.getCodeModel() != CodeModel::Large) {
1240  MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC."));
1241  const MCExpr *TOCDeltaExpr =
1242  MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext),
1243  GlobalEntryLabelExp, OutContext);
1244 
1245  const MCExpr *TOCDeltaHi =
1246  PPCMCExpr::createHa(TOCDeltaExpr, false, OutContext);
1247  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS)
1248  .addReg(PPC::X2)
1249  .addReg(PPC::X12)
1250  .addExpr(TOCDeltaHi));
1251 
1252  const MCExpr *TOCDeltaLo =
1253  PPCMCExpr::createLo(TOCDeltaExpr, false, OutContext);
1254  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDI)
1255  .addReg(PPC::X2)
1256  .addReg(PPC::X2)
1257  .addExpr(TOCDeltaLo));
1258  } else {
1259  MCSymbol *TOCOffset = PPCFI->getTOCOffsetSymbol();
1260  const MCExpr *TOCOffsetDeltaExpr =
1261  MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCOffset, OutContext),
1262  GlobalEntryLabelExp, OutContext);
1263 
1264  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD)
1265  .addReg(PPC::X2)
1266  .addExpr(TOCOffsetDeltaExpr)
1267  .addReg(PPC::X12));
1268  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD8)
1269  .addReg(PPC::X2)
1270  .addReg(PPC::X2)
1271  .addReg(PPC::X12));
1272  }
1273 
1274  MCSymbol *LocalEntryLabel = PPCFI->getLocalEPSymbol();
1275  OutStreamer->EmitLabel(LocalEntryLabel);
1276  const MCSymbolRefExpr *LocalEntryLabelExp =
1277  MCSymbolRefExpr::create(LocalEntryLabel, OutContext);
1278  const MCExpr *LocalOffsetExp =
1279  MCBinaryExpr::createSub(LocalEntryLabelExp,
1280  GlobalEntryLabelExp, OutContext);
1281 
1282  PPCTargetStreamer *TS =
1283  static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());
1284 
1285  if (TS)
1286  TS->emitLocalEntry(cast<MCSymbolELF>(CurrentFnSym), LocalOffsetExp);
1287  }
1288 }
1289 
1290 /// EmitFunctionBodyEnd - Print the traceback table before the .size
1291 /// directive.
1292 ///
1293 void PPCLinuxAsmPrinter::EmitFunctionBodyEnd() {
1294  // Only the 64-bit target requires a traceback table. For now,
1295  // we only emit the word of zeroes that GDB requires to find
1296  // the end of the function, and zeroes for the eight-byte
1297  // mandatory fields.
1298  // FIXME: We should fill in the eight-byte mandatory fields as described in
1299  // the PPC64 ELF ABI (this is a low-priority item because GDB does not
1300  // currently make use of these fields).
1301  if (Subtarget->isPPC64()) {
1302  OutStreamer->EmitIntValue(0, 4/*size*/);
1303  OutStreamer->EmitIntValue(0, 8/*size*/);
1304  }
1305 }
1306 
1307 void PPCDarwinAsmPrinter::EmitStartOfAsmFile(Module &M) {
1308  static const char *const CPUDirectives[] = {
1309  "",
1310  "ppc",
1311  "ppc440",
1312  "ppc601",
1313  "ppc602",
1314  "ppc603",
1315  "ppc7400",
1316  "ppc750",
1317  "ppc970",
1318  "ppcA2",
1319  "ppce500mc",
1320  "ppce5500",
1321  "power3",
1322  "power4",
1323  "power5",
1324  "power5x",
1325  "power6",
1326  "power6x",
1327  "power7",
1328  // FIXME: why is power8 missing here?
1329  "ppc64",
1330  "ppc64le",
1331  "power9"
1332  };
1333 
1334  // Get the numerically largest directive.
1335  // FIXME: How should we merge darwin directives?
1336  unsigned Directive = PPC::DIR_NONE;
1337  for (const Function &F : M) {
1338  const PPCSubtarget &STI = TM.getSubtarget<PPCSubtarget>(F);
1339  unsigned FDir = STI.getDarwinDirective();
1340  Directive = Directive > FDir ? FDir : STI.getDarwinDirective();
1341  if (STI.hasMFOCRF() && Directive < PPC::DIR_970)
1342  Directive = PPC::DIR_970;
1343  if (STI.hasAltivec() && Directive < PPC::DIR_7400)
1344  Directive = PPC::DIR_7400;
1345  if (STI.isPPC64() && Directive < PPC::DIR_64)
1346  Directive = PPC::DIR_64;
1347  }
1348 
1349  assert(Directive <= PPC::DIR_64 && "Directive out of range.");
1350 
1351  assert(Directive < array_lengthof(CPUDirectives) &&
1352  "CPUDirectives[] might not be up-to-date!");
1353  PPCTargetStreamer &TStreamer =
1354  *static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());
1355  TStreamer.emitMachine(CPUDirectives[Directive]);
1356 
1357  // Prime text sections so they are adjacent. This reduces the likelihood a
1358  // large data or debug section causes a branch to exceed 16M limit.
1359  const TargetLoweringObjectFileMachO &TLOFMacho =
1360  static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering());
1361  OutStreamer->SwitchSection(TLOFMacho.getTextCoalSection());
1362  if (TM.getRelocationModel() == Reloc::PIC_) {
1363  OutStreamer->SwitchSection(
1364  OutContext.getMachOSection("__TEXT", "__picsymbolstub1",
1367  32, SectionKind::getText()));
1368  } else if (TM.getRelocationModel() == Reloc::DynamicNoPIC) {
1369  OutStreamer->SwitchSection(
1370  OutContext.getMachOSection("__TEXT","__symbol_stub1",
1373  16, SectionKind::getText()));
1374  }
1375  OutStreamer->SwitchSection(getObjFileLowering().getTextSection());
1376 }
1377 
1378 bool PPCDarwinAsmPrinter::doFinalization(Module &M) {
1379  bool isPPC64 = getDataLayout().getPointerSizeInBits() == 64;
1380 
1381  // Darwin/PPC always uses mach-o.
1382  const TargetLoweringObjectFileMachO &TLOFMacho =
1383  static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering());
1384  if (MMI) {
1385  MachineModuleInfoMachO &MMIMacho =
1386  MMI->getObjFileInfo<MachineModuleInfoMachO>();
1387 
1388  if (MAI->doesSupportExceptionHandling()) {
1389  // Add the (possibly multiple) personalities to the set of global values.
1390  // Only referenced functions get into the Personalities list.
1391  for (const Function *Personality : MMI->getPersonalities()) {
1392  if (Personality) {
1393  MCSymbol *NLPSym =
1394  getSymbolWithGlobalValueBase(Personality, "$non_lazy_ptr");
1396  MMIMacho.getGVStubEntry(NLPSym);
1397  StubSym =
1398  MachineModuleInfoImpl::StubValueTy(getSymbol(Personality), true);
1399  }
1400  }
1401  }
1402 
1403  // Output stubs for dynamically-linked functions.
1405 
1406  // Output macho stubs for external and common global variables.
1407  if (!Stubs.empty()) {
1408  // Switch with ".non_lazy_symbol_pointer" directive.
1409  OutStreamer->SwitchSection(TLOFMacho.getNonLazySymbolPointerSection());
1410  EmitAlignment(isPPC64 ? 3 : 2);
1411 
1412  for (unsigned i = 0, e = Stubs.size(); i != e; ++i) {
1413  // L_foo$stub:
1414  OutStreamer->EmitLabel(Stubs[i].first);
1415  // .indirect_symbol _foo
1416  MachineModuleInfoImpl::StubValueTy &MCSym = Stubs[i].second;
1417  OutStreamer->EmitSymbolAttribute(MCSym.getPointer(),
1419 
1420  if (MCSym.getInt())
1421  // External to current translation unit.
1422  OutStreamer->EmitIntValue(0, isPPC64 ? 8 : 4 /*size*/);
1423  else
1424  // Internal to current translation unit.
1425  //
1426  // When we place the LSDA into the TEXT section, the type info
1427  // pointers
1428  // need to be indirect and pc-rel. We accomplish this by using NLPs.
1429  // However, sometimes the types are local to the file. So we need to
1430  // fill in the value for the NLP in those cases.
1431  OutStreamer->EmitValue(
1432  MCSymbolRefExpr::create(MCSym.getPointer(), OutContext),
1433  isPPC64 ? 8 : 4 /*size*/);
1434  }
1435 
1436  Stubs.clear();
1437  OutStreamer->AddBlankLine();
1438  }
1439  }
1440 
1441  // Funny Darwin hack: This flag tells the linker that no global symbols
1442  // contain code that falls through to other global symbols (e.g. the obvious
1443  // implementation of multiple entry points). If this doesn't occur, the
1444  // linker can safely perform dead code stripping. Since LLVM never generates
1445  // code that does this, it is always safe to set.
1446  OutStreamer->EmitAssemblerFlag(MCAF_SubsectionsViaSymbols);
1447 
1448  return AsmPrinter::doFinalization(M);
1449 }
1450 
1451 /// createPPCAsmPrinterPass - Returns a pass that prints the PPC assembly code
1452 /// for a MachineFunction to the given output stream, in a format that the
1453 /// Darwin assembler can deal with.
1454 ///
1455 static AsmPrinter *
1457  std::unique_ptr<MCStreamer> &&Streamer) {
1458  if (tm.getTargetTriple().isMacOSX())
1459  return new PPCDarwinAsmPrinter(tm, std::move(Streamer));
1460  return new PPCLinuxAsmPrinter(tm, std::move(Streamer));
1461 }
1462 
1463 // Force static initialization.
1471 }
MCSection * getNonLazySymbolPointerSection() const
VectorType::iterator iterator
Definition: MapVector.h:40
PointerIntPair< MCSymbol *, 1, bool > StubValueTy
virtual void EmitStartOfAsmFile(Module &)
This virtual method can be overridden by targets that want to emit something at the start of their fi...
Definition: AsmPrinter.h:330
A parsed version of the target data layout string in and methods for querying it. ...
Definition: DataLayout.h:102
SymbolListTy GetGVStubList()
Accessor methods to return the set of stubs in sorted order.
StringRef getPrivateGlobalPrefix() const
Definition: DataLayout.h:284
S_SYMBOL_STUBS - Section with symbol stubs, byte size of stub in the Reserved2 field.
const GlobalValue * getGlobal() const
static const MCSymbolRefExpr * create(const MCSymbol *Symbol, MCContext &Ctx)
Definition: MCExpr.h:298
void print(raw_ostream &OS, const MCAsmInfo *MAI) const
print - Print the value to the stream OS.
Definition: MCSymbol.cpp:53
bool hasMFOCRF() const
Definition: PPCSubtarget.h:248
size_t i
MachineBasicBlock * getMBB() const
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:39
A Module instance is used to store all the information related to an LLVM module. ...
Definition: Module.h:52
bool doFinalization(Module &M) override
Shut down the asmprinter.
static MCOperand createExpr(const MCExpr *Val)
Definition: MCInst.h:129
Target & getThePPC32Target()
bool isBlockAddress() const
isBlockAddress - Tests if this is a MO_BlockAddress operand.
const MCInstrDesc & getDesc() const
Returns the target instruction descriptor of this MachineInstr.
Definition: MachineInstr.h:270
This class implements a map that also provides access to all stored values in a deterministic order...
Definition: MapVector.h:32
MachineBasicBlock reference.
std::vector< std::pair< MCSymbol *, StubValueTy > > SymbolListTy
MCSymbol * getGlobalEPSymbol() const
bool hasAltivec() const
Definition: PPCSubtarget.h:239
const Triple & getTargetTriple() const
static bool isVRRegister(unsigned Reg)
Definition: PPCInstrInfo.h:289
bool isMacOSX() const
isMacOSX - Is this a Mac OS X triple.
Definition: Triple.h:427
bool isJTI() const
isJTI - Tests if this is a MO_JumpTableIndex operand.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
PPCFunctionInfo - This class is derived from MachineFunction private PowerPC target-specific informat...
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:81
bool isImm() const
isImm - Tests if this is a MO_Immediate operand.
bool hasInternalLinkage() const
Definition: GlobalValue.h:413
bool isReg() const
isReg - Tests if this is a MO_Register operand.
Base class for the full range of assembler expressions which are needed for parsing.
Definition: MCExpr.h:34
Reg
All possible values of the reg field in the ModR/M byte.
MCSymbol * getTOCOffsetSymbol() const
Represent a reference to a symbol from inside an expression.
Definition: MCExpr.h:161
unsigned getNumOperands() const
Access to explicit operands of the instruction.
Definition: MachineInstr.h:277
bool isCPI() const
isCPI - Tests if this is a MO_ConstantPoolIndex operand.
bool isGlobal() const
isGlobal - Tests if this is a MO_GlobalAddress operand.
static std::string getRegisterName(const TargetRegisterInfo *TRI, unsigned Reg)
Definition: MIParser.cpp:785
#define F(x, y, z)
Definition: MD5.cpp:51
bool runOnMachineFunction(MachineFunction &MF) override
Emit the specified function out to the OutStreamer.
Definition: AsmPrinter.h:244
static const MCBinaryExpr * createSub(const MCExpr *LHS, const MCExpr *RHS, MCContext &Ctx)
Definition: MCExpr.h:497
PointerTy getPointer() const
MachineBasicBlock * MBB
R32 = MFOCRF(CRREG, INFLAG) - Represents the MFOCRF instruction.
virtual void emitLocalEntry(MCSymbolELF *S, const MCExpr *LocalOffset)=0
std::pair< MCSection *, const MCExpr * > MCSectionSubPair
Definition: MCStreamer.h:44
IntType getInt() const
int64_t getImm() const
static const MCBinaryExpr * createAdd(const MCExpr *LHS, const MCExpr *RHS, MCContext &Ctx)
Definition: MCExpr.h:429
Target & getThePPC64Target()
Expected< const typename ELFT::Sym * > getSymbol(typename ELFT::SymRange Symbols, uint32_t Index)
Definition: Object/ELF.h:236
MCInstBuilder & addExpr(const MCExpr *Val)
Add a new MCExpr operand.
Definition: MCInstBuilder.h:50
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:150
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
Definition: MachineInstr.h:273
static GCRegistry::Add< CoreCLRGC > E("coreclr","CoreCLR-compatible GC")
const MachineBasicBlock * getParent() const
Definition: MachineInstr.h:131
Function * getFunction(StringRef Name) const
Look up the specified function in the module symbol table.
Definition: Module.cpp:196
S_ATTR_PURE_INSTRUCTIONS - Section contains only true machine instructions.
Address of a global value.
MCInstBuilder & addReg(unsigned Reg)
Add a new register operand.
Definition: MCInstBuilder.h:32
PointerIntPair - This class implements a pair of a pointer and small integer.
The VSX instruction that uses VSX register (vs0-vs63), instead of VMX register (v0-v31).
Definition: PPCInstrInfo.h:71
MO_NLP_FLAG - If this bit is set, the symbol reference is actually to the non_lazy_ptr for the global...
Definition: PPC.h:74
void LLVMInitializePowerPCAsmPrinter()
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:279
virtual void emitAbiVersion(int AbiVersion)=0
virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, unsigned AsmVariant, const char *ExtraCode, raw_ostream &OS)
Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant...
This class is intended to be used as a driving class for all asm writers.
Definition: AsmPrinter.h:67
static const char * getRegisterName(unsigned RegNo)
Address of a basic block.
.subsections_via_symbols (MachO)
Definition: MCDirectives.h:50
int64_t getOffset() const
Return the offset from the symbol in this operand.
MI-level patchpoint operands.
Definition: StackMaps.h:70
static const PPCMCExpr * createLo(const MCExpr *Expr, bool isDarwin, MCContext &Ctx)
Definition: PPCMCExpr.h:49
MCSection * getTextCoalSection() const
MCSymbol * getLocalEPSymbol() const
MCSymbol * getSymbol() const
Return the MCSymbol for this basic block.
StubValueTy & getGVStubEntry(MCSymbol *Sym)
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
void recordPatchPoint(const MachineInstr &MI)
Generate a stackmap record for a patchpoint instruction.
Definition: StackMaps.cpp:361
static AsmPrinter * createPPCAsmPrinterPass(TargetMachine &tm, std::unique_ptr< MCStreamer > &&Streamer)
createPPCAsmPrinterPass - Returns a pass that prints the PPC assembly code for a MachineFunction to t...
void setOpcode(unsigned Op)
Definition: MCInst.h:158
PICLevel::Level getPICLevel() const
Returns the PIC level (small or large model)
Definition: Module.cpp:488
MachineOperand class - Representation of each machine instruction operand.
Module.h This file contains the declarations for the Module class.
.indirect_symbol (MachO)
Definition: MCDirectives.h:32
constexpr size_t array_lengthof(T(&)[N])
Find the length of an array.
Definition: STLExtras.h:649
static bool isVFRegister(unsigned Reg)
Definition: PPCInstrInfo.h:286
Target & getThePPC64LETarget()
void recordStackMap(const MachineInstr &MI)
Generate a stackmap record for a stackmap instruction.
Definition: StackMaps.cpp:352
static unsigned getReg(const void *D, unsigned RC, unsigned RegNo)
Representation of each machine instruction.
Definition: MachineInstr.h:52
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.
static bool printOperand(raw_ostream &OS, const SelectionDAG *G, const SDValue Value)
bool doInitialization(Module &M) override
Set up the AsmPrinter when we are working on a new module.
Definition: AsmPrinter.cpp:179
#define I(x, y, z)
Definition: MD5.cpp:54
unsigned getPointerSizeInBits(unsigned AS=0) const
Layout pointer size, in bits FIXME: The defaults need to be removed once all of the backends/clients ...
Definition: DataLayout.h:349
This represents a section on linux, lots of unix variants and some bare metal systems.
Definition: MCSectionELF.h:30
virtual void EmitFunctionEntryLabel()
EmitFunctionEntryLabel - Emit the label that is the entrypoint for the function.
Definition: AsmPrinter.cpp:647
MachineModuleInfoMachO - This is a MachineModuleInfoImpl implementation for MachO targets...
const unsigned Kind
bool isPPC64() const
isPPC64 - Return true if we are generating code for 64-bit pointer mode.
unsigned getReg() const
getReg - Returns the register number.
unsigned getAlignment() const
Definition: Globals.cpp:72
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:537
virtual void emitTCEntry(const MCSymbol &S)=0
std::underlying_type< E >::type Mask()
Get a bitmask with 1s in all places up to the high-order bit of E's largest value.
Definition: BitmaskEnum.h:81
static const PPCMCExpr * createHa(const MCExpr *Expr, bool isDarwin, MCContext &Ctx)
Definition: PPCMCExpr.h:59
unsigned getDarwinDirective() const
getDarwinDirective - Returns the -m directive specified for the cpu.
Definition: PPCSubtarget.h:168
This class implements an extremely fast bulk output stream that can only output to a stream...
Definition: raw_ostream.h:44
static TraceState * TS
#define DEBUG(X)
Definition: Debug.h:100
Primary interface to the complete machine description for the target machine.
void LowerPPCMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI, AsmPrinter &AP, bool isDarwin)
static void RegisterAsmPrinter(Target &T, Target::AsmPrinterCtorTy Fn)
RegisterAsmPrinter - Register an AsmPrinter implementation for the given target.
IRTranslator LLVM IR MI
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:47
const BlockAddress * getBlockAddress() const
Address of indexed Constant in Constant Pool.
virtual void emitMachine(StringRef CPU)=0
Instances of this class represent operands of the MCInst class.
Definition: MCInst.h:33
MCSymbol * getPICOffsetSymbol() const
static const MCConstantExpr * create(int64_t Value, MCContext &Ctx)
Definition: MCExpr.cpp:149
const MCOperand & getOperand(unsigned i) const
Definition: MCInst.h:164
static const char * stripRegisterPrefix(const char *RegName)
stripRegisterPrefix - This method strips the character prefix from a register name so that only the n...
static SectionKind getText()
Definition: SectionKind.h:180