14 #ifndef LLVM_LIB_TARGET_AMDGPUHAZARDRECOGNIZERS_H
15 #define LLVM_LIB_TARGET_AMDGPUHAZARDRECOGNIZERS_H
23 class MachineFunction;
34 std::list<MachineInstr*> EmittedInstrs;
39 int getWaitStatesSinceDef(
unsigned Reg,
71 #endif //LLVM_LIB_TARGET_AMDGPUHAZARDRECOGNIZERS_H
An efficient, type-erasing, non-owning reference to a callable.
void EmitNoop() override
EmitNoop - This callback is invoked when a noop was added to the instruction stream.
Reg
All possible values of the reg field in the ModR/M byte.
unsigned PreEmitNoops(SUnit *SU) override
PreEmitNoops - This callback is invoked prior to emitting an instruction.
void RecedeCycle() override
RecedeCycle - This callback is invoked whenever the next bottom-up instruction to be scheduled cannot...
void EmitInstruction(SUnit *SU) override
EmitInstruction - This callback is invoked when an instruction is emitted, to advance the hazard stat...
HazardRecognizer - This determines whether or not an instruction can be issued this cycle...
HazardType getHazardType(SUnit *SU, int Stalls) override
getHazardType - Return the hazard type of emitting this node.
GCNHazardRecognizer(const MachineFunction &MF)
void AdvanceCycle() override
AdvanceCycle - This callback is invoked whenever the next top-down instruction to be scheduled cannot...
Representation of each machine instruction.
bool atIssueLimit() const override
atIssueLimit - Return true if no more instructions may be issued in this cycle.
SUnit - Scheduling unit. This is a node in the scheduling DAG.