43 case AMDGPU::INTERP_PAIR_XY:
44 case AMDGPU::INTERP_PAIR_ZW:
45 case AMDGPU::INTERP_VEC_LOAD:
63 unsigned NumLiteral = 0;
68 if (MO.
isReg() && MO.
getReg() == AMDGPU::ALU_LITERAL_X)
71 return 1 + NumLiteral;
81 case AMDGPU::INTERP_PAIR_XY:
82 case AMDGPU::INTERP_PAIR_ZW:
83 case AMDGPU::INTERP_VEC_LOAD:
96 case AMDGPU::IMPLICIT_DEF:
103 std::pair<unsigned, unsigned> getAccessedBankLine(
unsigned Sel)
const {
107 return std::pair<unsigned, unsigned>(
108 ((Sel >> 2) - 512) >> 12,
114 ((((Sel >> 2) - 512) & 4095) >> 5) << 1);
119 std::vector<std::pair<unsigned, unsigned>> &CachedConsts,
120 bool UpdateInstr =
true)
const {
121 std::vector<std::pair<unsigned, unsigned> > UsedKCache;
130 "Can't assign Const");
131 for (
unsigned i = 0, n = Consts.
size();
i < n; ++
i) {
132 if (Consts[
i].first->getReg() != AMDGPU::ALU_CONST)
134 unsigned Sel = Consts[
i].second;
135 unsigned Chan = Sel & 3, Index = ((Sel >> 2) - 512) & 31;
136 unsigned KCacheIndex = Index * 4 + Chan;
137 const std::pair<unsigned, unsigned> &BankLine = getAccessedBankLine(Sel);
138 if (CachedConsts.empty()) {
139 CachedConsts.push_back(BankLine);
140 UsedKCache.push_back(std::pair<unsigned, unsigned>(0, KCacheIndex));
143 if (CachedConsts[0] == BankLine) {
144 UsedKCache.push_back(std::pair<unsigned, unsigned>(0, KCacheIndex));
147 if (CachedConsts.size() == 1) {
148 CachedConsts.push_back(BankLine);
149 UsedKCache.push_back(std::pair<unsigned, unsigned>(1, KCacheIndex));
152 if (CachedConsts[1] == BankLine) {
153 UsedKCache.push_back(std::pair<unsigned, unsigned>(1, KCacheIndex));
162 for (
unsigned i = 0, j = 0, n = Consts.
size();
i < n; ++
i) {
163 if (Consts[
i].first->getReg() != AMDGPU::ALU_CONST)
165 switch(UsedKCache[j].first) {
167 Consts[
i].first->setReg(
168 AMDGPU::R600_KC0RegClass.getRegister(UsedKCache[j].second));
171 Consts[
i].first->setReg(
172 AMDGPU::R600_KC1RegClass.getRegister(UsedKCache[j].second));
182 bool canClauseLocalKillFitInClause(
183 unsigned AluInstCount,
184 std::vector<std::pair<unsigned, unsigned> > KCacheBanks,
189 MOI = Def->operands_begin(),
190 MOE = Def->operands_end(); MOI != MOE; ++MOI) {
191 if (!MOI->isReg() || !MOI->isDef() ||
197 unsigned LastUseCount = 0;
199 AluInstCount += OccupiedDwords(*UseI);
201 if (!SubstituteKCacheBank(*UseI, KCacheBanks,
false))
207 if (AluInstCount >=
TII->getMaxAlusPerClause())
215 if (UseI->findRegisterUseOperandIdx(MOI->getReg()))
216 LastUseCount = AluInstCount;
218 if (UseI != Def && UseI->findRegisterDefOperandIdx(MOI->getReg()) != -1)
222 return LastUseCount <=
TII->getMaxAlusPerClause();
231 std::vector<std::pair<unsigned, unsigned> > KCacheBanks;
232 bool PushBeforeModifier =
false;
233 unsigned AluInstCount = 0;
235 if (IsTrivialInst(*I))
239 if (AluInstCount >
TII->getMaxAlusPerClause())
241 if (I->getOpcode() == AMDGPU::PRED_X) {
248 if (AluInstCount > 0)
251 PushBeforeModifier =
true;
262 if (
TII->mustBeLastInClause(I->getOpcode())) {
269 if (!canClauseLocalKillFitInClause(AluInstCount, KCacheBanks, I,
E))
272 if (!SubstituteKCacheBank(*I, KCacheBanks))
274 AluInstCount += OccupiedDwords(*I);
276 unsigned Opcode = PushBeforeModifier ?
277 AMDGPU::CF_ALU_PUSH_BEFORE : AMDGPU::CF_ALU;
284 .
addImm(KCacheBanks.empty()?0:KCacheBanks[0].first)
285 .addImm((KCacheBanks.size() < 2)?0:KCacheBanks[1].first)
286 .
addImm(KCacheBanks.empty()?0:2)
287 .addImm((KCacheBanks.size() < 2)?0:2)
288 .
addImm(KCacheBanks.empty()?0:KCacheBanks[0].second)
289 .addImm((KCacheBanks.size() < 2)?0:KCacheBanks[1].second)
310 if (I != MBB.
end() && I->getOpcode() == AMDGPU::CF_ALU)
314 I = MakeALUClause(MBB, I);
323 return "R600 Emit Clause Markers Pass";
332 "R600 Emit Clause Markters",
false,
false)
337 return new R600EmitClauseMarkers();
mop_iterator operands_end()
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
AMDGPU specific subclass of TargetSubtarget.
Interface definition for R600InstrInfo.
void initializeR600EmitClauseMarkersPass(PassRegistry &)
Interface definition for R600RegisterInfo.
R600 Emit Clause Markters
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
const HexagonInstrInfo * TII
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
bool isReg() const
isReg - Tests if this is a MO_Register operand.
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
const HexagonRegisterInfo & getRegisterInfo() const
HexagonInstrInfo specifics.
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
static GCRegistry::Add< CoreCLRGC > E("coreclr","CoreCLR-compatible GC")
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
INITIALIZE_PASS_BEGIN(R600EmitClauseMarkers,"emitclausemarkers","R600 Emit Clause Markters", false, false) INITIALIZE_PASS_END(R600EmitClauseMarkers
const R600InstrInfo * getInstrInfo() const override
INITIALIZE_PASS_END(RegBankSelect, DEBUG_TYPE,"Assign register bank of generic virtual registers", false, false) RegBankSelect
FunctionPass class - This class is used to implement most global optimizations.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
DebugLoc findDebugLoc(instr_iterator MBBI)
Find the next valid DebugLoc starting at MBBI, skipping any DBG_VALUE instructions.
Iterator for intrusive lists based on ilist_node.
MachineOperand class - Representation of each machine instruction operand.
bool isPhysRegLiveAcrossClauses(unsigned Reg) const
Representation of each machine instruction.
LLVM_ATTRIBUTE_ALWAYS_INLINE size_type size() const
FunctionPass * createR600EmitClauseMarkers()
unsigned getReg() const
getReg - Returns the register number.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
mop_iterator operands_begin()
StringRef - Represent a constant reference to a string, i.e.
PassRegistry - This class manages the registration and intitialization of the pass subsystem as appli...