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LLVM
4.0.0
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#include "X86AsmPrinter.h"#include "X86RegisterInfo.h"#include "X86ShuffleDecodeConstantPool.h"#include "InstPrinter/X86ATTInstPrinter.h"#include "InstPrinter/X86InstComments.h"#include "MCTargetDesc/X86BaseInfo.h"#include "Utils/X86ShuffleDecode.h"#include "llvm/ADT/Optional.h"#include "llvm/ADT/SmallString.h"#include "llvm/ADT/iterator_range.h"#include "llvm/CodeGen/MachineFunction.h"#include "llvm/CodeGen/MachineConstantPool.h"#include "llvm/CodeGen/MachineOperand.h"#include "llvm/CodeGen/MachineModuleInfoImpls.h"#include "llvm/CodeGen/StackMaps.h"#include "llvm/IR/DataLayout.h"#include "llvm/IR/GlobalValue.h"#include "llvm/IR/Mangler.h"#include "llvm/MC/MCAsmInfo.h"#include "llvm/MC/MCCodeEmitter.h"#include "llvm/MC/MCContext.h"#include "llvm/MC/MCExpr.h"#include "llvm/MC/MCFixup.h"#include "llvm/MC/MCInst.h"#include "llvm/MC/MCInstBuilder.h"#include "llvm/MC/MCSection.h"#include "llvm/MC/MCStreamer.h"#include "llvm/MC/MCSymbol.h"#include "llvm/MC/MCSymbolELF.h"#include "llvm/MC/MCSectionELF.h"#include "llvm/MC/MCSectionMachO.h"#include "llvm/Support/TargetRegistry.h"#include "llvm/Support/ELF.h"#include "llvm/Target/TargetLoweringObjectFile.h"Go to the source code of this file.
Macros | |
| #define | MOV_CASE(Prefix, Suffix) |
| #define | MOV_AVX512_CASE(Suffix) |
| #define | CASE_ALL_MOV_RM() |
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| static void | EmitNops (MCStreamer &OS, unsigned NumBytes, bool Is64Bit, const MCSubtargetInfo &STI) |
| Emit the optimal amount of multi-byte nops on X86. More... | |
| static void | SimplifyShortImmForm (MCInst &Inst, unsigned Opcode) |
| Simplify FOO $imm, %{al,ax,eax,rax} to FOO $imm, for instruction with a short fixed-register form. More... | |
| static void | SimplifyMOVSX (MCInst &Inst) |
| If a movsx instruction has a shorter encoding for the used register simplify the instruction to use it instead. More... | |
| static void | SimplifyShortMoveForm (X86AsmPrinter &Printer, MCInst &Inst, unsigned Opcode) |
| Simplify things like MOV32rm to MOV32o32a. More... | |
| static unsigned | getRetOpcode (const X86Subtarget &Subtarget) |
| static unsigned | EmitNop (MCStreamer &OS, unsigned NumBytes, bool Is64Bit, const MCSubtargetInfo &STI) |
Emit the largest nop instruction smaller than or equal to NumBytes bytes. More... | |
| static MachineBasicBlock::const_iterator | PrevCrossBBInst (MachineBasicBlock::const_iterator MBBI) |
| static const Constant * | getConstantFromPool (const MachineInstr &MI, const MachineOperand &Op) |
| static std::string | getShuffleComment (const MachineInstr *MI, unsigned SrcOp1Idx, unsigned SrcOp2Idx, ArrayRef< int > Mask) |
| #define CASE_ALL_MOV_RM | ( | ) |
Referenced by llvm::X86AsmPrinter::EmitInstruction().
| #define MOV_AVX512_CASE | ( | Suffix | ) |
| #define MOV_CASE | ( | Prefix, | |
| Suffix | |||
| ) |
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Emit the largest nop instruction smaller than or equal to NumBytes bytes.
Return the size of nop emitted.
Definition at line 767 of file X86MCInstLower.cpp.
References assert(), llvm::MCStreamer::EmitBytes(), llvm::MCStreamer::EmitInstruction(), i, llvm_unreachable, and fuzzer::min().
Referenced by EmitNops().
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Emit the optimal amount of multi-byte nops on X86.
Definition at line 828 of file X86MCInstLower.cpp.
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Definition at line 1127 of file X86MCInstLower.cpp.
References assert(), C, llvm::MachineConstantPoolEntry::ConstVal, llvm::dyn_cast(), llvm::MachineFunction::getConstantPool(), llvm::MachineConstantPool::getConstants(), llvm::MachineOperand::getIndex(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineConstantPoolEntry::getType(), llvm::MachineOperand::isCPI(), llvm::MachineConstantPoolEntry::isMachineConstantPoolEntry(), and llvm::MachineConstantPoolEntry::Val.
Referenced by llvm::X86AsmPrinter::EmitInstruction().
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Definition at line 351 of file X86MCInstLower.cpp.
References llvm::X86Subtarget::is64Bit().
Referenced by llvm::X86AsmPrinter::EmitInstruction().
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Definition at line 1148 of file X86MCInstLower.cpp.
References assert(), llvm::ArrayRef< T >::begin(), llvm::ArrayRef< T >::end(), llvm::raw_ostream::flush(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::X86ATTInstPrinter::getRegisterName(), i, llvm::MachineOperand::isReg(), llvm::SM_SentinelUndef, and llvm::SM_SentinelZero.
Referenced by llvm::X86AsmPrinter::EmitInstruction().
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Definition at line 1116 of file X86MCInstLower.cpp.
References llvm::MachineBasicBlock::begin(), llvm::MachineBasicBlock::end(), llvm::MachineFunction::front(), llvm::MachineBasicBlock::getParent(), llvm::ilist_node_with_parent< NodeTy, ParentTy, Options >::getPrevNode(), and MBB.
Referenced by llvm::X86AsmPrinter::EmitInstruction().
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If a movsx instruction has a shorter encoding for the used register simplify the instruction to use it instead.
Definition at line 273 of file X86MCInstLower.cpp.
References llvm::AArch64CC::AL, llvm::N86::EAX, llvm::MCInst::getOpcode(), llvm::MCInst::getOperand(), llvm::MCOperand::getReg(), llvm_unreachable, and llvm::MCInst::setOpcode().
Simplify FOO $imm, %{al,ax,eax,rax} to FOO $imm, for instruction with a short fixed-register form.
Definition at line 251 of file X86MCInstLower.cpp.
References llvm::MCInst::addOperand(), llvm::AArch64CC::AL, assert(), llvm::N86::EAX, llvm::MCInst::getNumOperands(), llvm::MCInst::getOperand(), llvm::MCOperand::getReg(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), llvm::MCOperand::isReg(), and llvm::MCInst::setOpcode().
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Simplify things like MOV32rm to MOV32o32a.
Definition at line 300 of file X86MCInstLower.cpp.
References llvm::HexagonII::Absolute, llvm::MCInst::addOperand(), llvm::X86::AddrBaseReg, llvm::X86::AddrIndexReg, llvm::X86::AddrScaleAmt, llvm::X86::AddrSegmentReg, llvm::AArch64CC::AL, assert(), llvm::N86::EAX, llvm::MCOperand::getExpr(), llvm::MCOperand::getImm(), llvm::MCInst::getNumOperands(), llvm::MCInst::getOperand(), llvm::MCOperand::getReg(), llvm::X86AsmPrinter::getSubtarget(), llvm::X86Subtarget::is64Bit(), llvm::MCOperand::isExpr(), llvm::MCOperand::isImm(), llvm::MCOperand::isReg(), and llvm::MCInst::setOpcode().
1.8.6