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LLVM
4.0.0
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MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc objects that represent all of the machine registers that the target has. More...
#include <MCRegisterInfo.h>
Classes | |
| class | DiffListIterator |
| DiffListIterator - Base iterator class that can traverse the differentially encoded register and regunit lists in DiffLists. More... | |
| struct | DwarfLLVMRegPair |
| DwarfLLVMRegPair - Emitted by tablegen so Dwarf<->LLVM reg mappings can be performed with a binary search. More... | |
| struct | SubRegCoveredBits |
| SubRegCoveredBits - Emitted by tablegen: bit range covered by a subreg index, -1 in any being invalid. More... | |
Public Types | |
| typedef const MCRegisterClass * | regclass_iterator |
Public Member Functions | |
| void | InitMCRegisterInfo (const MCRegisterDesc *D, unsigned NR, unsigned RA, unsigned PC, const MCRegisterClass *C, unsigned NC, const MCPhysReg(*RURoots)[2], unsigned NRU, const MCPhysReg *DL, const LaneBitmask *RUMS, const char *Strings, const char *ClassStrings, const uint16_t *SubIndices, unsigned NumIndices, const SubRegCoveredBits *SubIdxRanges, const uint16_t *RET) |
| Initialize MCRegisterInfo, called by TableGen auto-generated routines. More... | |
| void | mapLLVMRegsToDwarfRegs (const DwarfLLVMRegPair *Map, unsigned Size, bool isEH) |
| Used to initialize LLVM register to Dwarf register number mapping. More... | |
| void | mapDwarfRegsToLLVMRegs (const DwarfLLVMRegPair *Map, unsigned Size, bool isEH) |
| Used to initialize Dwarf register to LLVM register number mapping. More... | |
| void | mapLLVMRegToSEHReg (unsigned LLVMReg, int SEHReg) |
| mapLLVMRegToSEHReg - Used to initialize LLVM register to SEH register number mapping. More... | |
| void | mapLLVMRegToCVReg (unsigned LLVMReg, int CVReg) |
| unsigned | getRARegister () const |
| This method should return the register where the return address can be found. More... | |
| unsigned | getProgramCounter () const |
| Return the register which is the program counter. More... | |
| const MCRegisterDesc & | operator[] (unsigned RegNo) const |
| const MCRegisterDesc & | get (unsigned RegNo) const |
| Provide a get method, equivalent to [], but more useful with a pointer to this object. More... | |
| unsigned | getSubReg (unsigned Reg, unsigned Idx) const |
| Returns the physical register number of sub-register "Index" for physical register RegNo. More... | |
| unsigned | getMatchingSuperReg (unsigned Reg, unsigned SubIdx, const MCRegisterClass *RC) const |
| Return a super-register of the specified register Reg so its sub-register of index SubIdx is Reg. More... | |
| unsigned | getSubRegIndex (unsigned RegNo, unsigned SubRegNo) const |
| For a given register pair, return the sub-register index if the second register is a sub-register of the first. More... | |
| unsigned | getSubRegIdxSize (unsigned Idx) const |
| Get the size of the bit range covered by a sub-register index. More... | |
| unsigned | getSubRegIdxOffset (unsigned Idx) const |
| Get the offset of the bit range covered by a sub-register index. More... | |
| const char * | getName (unsigned RegNo) const |
| Return the human-readable symbolic target-specific name for the specified physical register. More... | |
| unsigned | getNumRegs () const |
| Return the number of registers this target has (useful for sizing arrays holding per register information) More... | |
| unsigned | getNumSubRegIndices () const |
| Return the number of sub-register indices understood by the target. More... | |
| unsigned | getNumRegUnits () const |
| Return the number of (native) register units in the target. More... | |
| int | getDwarfRegNum (unsigned RegNum, bool isEH) const |
| Map a target register to an equivalent dwarf register number. More... | |
| int | getLLVMRegNum (unsigned RegNum, bool isEH) const |
| Map a dwarf register back to a target register. More... | |
| int | getSEHRegNum (unsigned RegNum) const |
| Map a target register to an equivalent SEH register number. More... | |
| int | getCodeViewRegNum (unsigned RegNum) const |
| Map a target register to an equivalent CodeView register number. More... | |
| regclass_iterator | regclass_begin () const |
| regclass_iterator | regclass_end () const |
| unsigned | getNumRegClasses () const |
| const MCRegisterClass & | getRegClass (unsigned i) const |
| Returns the register class associated with the enumeration value. More... | |
| const char * | getRegClassName (const MCRegisterClass *Class) const |
| uint16_t | getEncodingValue (unsigned RegNo) const |
| Returns the encoding for RegNo. More... | |
| bool | isSubRegister (unsigned RegA, unsigned RegB) const |
| Returns true if RegB is a sub-register of RegA. More... | |
| bool | isSuperRegister (unsigned RegA, unsigned RegB) const |
| Returns true if RegB is a super-register of RegA. More... | |
| bool | isSubRegisterEq (unsigned RegA, unsigned RegB) const |
| Returns true if RegB is a sub-register of RegA or if RegB == RegA. More... | |
| bool | isSuperRegisterEq (unsigned RegA, unsigned RegB) const |
| Returns true if RegB is a super-register of RegA or if RegB == RegA. More... | |
| bool | isSuperOrSubRegisterEq (unsigned RegA, unsigned RegB) const |
| Returns true if RegB is a super-register or sub-register of RegA or if RegB == RegA. More... | |
Friends | |
| class | MCSubRegIterator |
| class | MCSubRegIndexIterator |
| class | MCSuperRegIterator |
| class | MCRegUnitIterator |
| class | MCRegUnitMaskIterator |
| class | MCRegUnitRootIterator |
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc objects that represent all of the machine registers that the target has.
As such, we simply have to track a pointer to this array so that we can turn register number into a register descriptor.
Note this class is designed to be a base class of TargetRegisterInfo, which is the interface used by codegen. However, specific targets should never specialize this class. MCRegisterInfo should only contain getters to access TableGen generated physical register data. It must not be extended with virtual methods.
Definition at line 136 of file MCRegisterInfo.h.
Definition at line 138 of file MCRegisterInfo.h.
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Provide a get method, equivalent to [], but more useful with a pointer to this object.
Definition at line 347 of file MCRegisterInfo.h.
References operator[]().
Referenced by llvm::MCRegUnitIterator::MCRegUnitIterator(), llvm::MCRegUnitMaskIterator::MCRegUnitMaskIterator(), llvm::MCSubRegIndexIterator::MCSubRegIndexIterator(), llvm::MCSubRegIterator::MCSubRegIterator(), and llvm::MCSuperRegIterator::MCSuperRegIterator().
| int MCRegisterInfo::getCodeViewRegNum | ( | unsigned | RegNum | ) | const |
Map a target register to an equivalent CodeView register number.
Definition at line 94 of file MCRegisterInfo.cpp.
References llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::empty(), llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::end(), llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::find(), I, and llvm::report_fatal_error().
Map a target register to an equivalent dwarf register number.
Returns -1 if there is no equivalent value. The second parameter allows targets to use different numberings for EH info and debugging info.
Definition at line 63 of file MCRegisterInfo.cpp.
References llvm::MCRegisterInfo::DwarfLLVMRegPair::FromReg, I, and llvm::MCRegisterInfo::DwarfLLVMRegPair::ToReg.
Referenced by llvm::DwarfExpression::AddMachineReg(), llvm::DwarfExpression::AddMachineRegIndirect(), llvm::ARMFrameLowering::adjustForSegmentedStacks(), createAArch64MCAsmInfo(), createARMMCAsmInfo(), createMipsMCAsmInfo(), createPPCMCAsmInfo(), createSparcMCAsmInfo(), createSparcV9MCAsmInfo(), createSystemZMCAsmInfo(), createX86MCAsmInfo(), llvm::AArch64FrameLowering::emitCalleeSavedFrameMoves(), llvm::X86FrameLowering::emitCalleeSavedFrameMoves(), llvm::Mips16FrameLowering::emitPrologue(), llvm::MipsSEFrameLowering::emitPrologue(), llvm::Thumb1FrameLowering::emitPrologue(), llvm::XCoreFrameLowering::emitPrologue(), llvm::ARMFrameLowering::emitPrologue(), llvm::SystemZFrameLowering::emitPrologue(), llvm::PPCFrameLowering::emitPrologue(), and getDwarfRegNum().
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Returns the encoding for RegNo.
Definition at line 438 of file MCRegisterInfo.h.
References assert().
Referenced by llvm::PPCInstrInfo::copyPhysReg(), llvm::MipsTargetELFStreamer::emitFrame(), llvm::HexagonMCCodeEmitter::EncodeSingleInstruction(), expandNOVLXLoad(), expandNOVLXStore(), llvm::HexagonMCCodeEmitter::getMachineOpValue(), HandleVRSaveUpdate(), llvm::X86_MC::initLLVMToSEHAndCVRegMapping(), llvm::ARMInstPrinter::printRegisterList(), llvm::AMDGPUInstPrinter::printRegOperand(), llvm::MipsAsmPrinter::printSavedRegsBitmask(), llvm::MipsRegInfoRecord::SetPhysRegUsed(), llvm::AArch64ExternalSymbolizer::tryAddingSymbolicOperand(), and llvm::tryFoldSPUpdateIntoPushPop().
Map a dwarf register back to a target register.
Definition at line 76 of file MCRegisterInfo.cpp.
References assert(), llvm::MCRegisterInfo::DwarfLLVMRegPair::FromReg, I, and llvm::MCRegisterInfo::DwarfLLVMRegPair::ToReg.
Referenced by llvm::ARMAsmBackendDarwin::generateCompactUnwindEncoding(), llvm::X86AsmInstrumentation::GetFrameRegGeneric(), and printCFIRegister().
| unsigned MCRegisterInfo::getMatchingSuperReg | ( | unsigned | Reg, |
| unsigned | SubIdx, | ||
| const MCRegisterClass * | RC | ||
| ) | const |
Return a super-register of the specified register Reg so its sub-register of index SubIdx is Reg.
Definition at line 20 of file MCRegisterInfo.cpp.
References llvm::MCRegisterClass::contains(), getSubReg(), and llvm::MCRegisterInfo::DiffListIterator::isValid().
Referenced by llvm::TargetRegisterInfo::getMatchingSuperReg(), llvm::ARMInstPrinter::printInst(), and llvm::AArch64InstPrinter::printVectorList().
Return the human-readable symbolic target-specific name for the specified physical register.
Definition at line 378 of file MCRegisterInfo.h.
Referenced by llvm::AggressiveAntiDepBreaker::AggressiveAntiDepBreaker(), llvm::RegScavenger::FindUnusedReg(), llvm::ARMAsmBackendDarwin::generateCompactUnwindEncoding(), llvm::TargetRegisterInfo::getRegAsmName(), getRegisterName(), llvm::AggressiveAntiDepBreaker::Observe(), llvm::PhysicalRegisterUsageInfo::print(), printReg(), llvm::PrintReg(), llvm::PrintRegUnit(), llvm::AArch64FrameLowering::restoreCalleeSavedRegisters(), llvm::RegScavenger::scavengeRegister(), and llvm::AArch64FrameLowering::spillCalleeSavedRegisters().
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Definition at line 422 of file MCRegisterInfo.h.
References regclass_begin(), and regclass_end().
Referenced by getRegClass().
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Return the number of registers this target has (useful for sizing arrays holding per register information)
Definition at line 384 of file MCRegisterInfo.h.
Referenced by llvm::ScheduleDAGInstrs::buildSchedGraph(), llvm::calculateDbgValueHistory(), llvm::CCState::CCState(), llvm::TargetRegisterInfo::checkAllSuperRegsMarked(), llvm::LiveIntervals::checkRegMaskInterference(), llvm::HexagonBlockRanges::computeDeadMap(), llvm::TargetFrameLowering::determineCalleeSaves(), llvm::MachineRegisterInfo::freezeReservedRegs(), llvm::TargetRegisterInfo::getAllocatableSet(), llvm::MachineFrameInfo::getPristineRegs(), llvm::RegScavenger::getRegsAvailable(), getSubRegIndex(), llvm::LivePhysRegs::init(), llvm::LiveRegSet::init(), llvm::LivePhysRegs::LivePhysRegs(), llvm::MachineRegisterInfo::MachineRegisterInfo(), llvm::CriticalAntiDepBreaker::Observe(), llvm::AggressiveAntiDepBreaker::Observe(), llvm::PhysicalRegisterUsageInfo::print(), llvm::MIPrinter::print(), llvm::TargetRegisterInfo::regmaskSubsetEqual(), llvm::InterferenceCache::reinitPhysRegEntries(), llvm::rdf::Liveness::resetKills(), llvm::RegisterClassInfo::runOnMachineFunction(), llvm::LiveVariables::runOnMachineFunction(), llvm::CriticalAntiDepBreaker::StartBlock(), llvm::AggressiveAntiDepBreaker::StartBlock(), and UpdatePredRedefs().
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Return the number of (native) register units in the target.
Register units are numbered from 0 to getNumRegUnits() - 1. They can be accessed through MCRegUnitIterator defined below.
Definition at line 398 of file MCRegisterInfo.h.
Referenced by llvm::RegScavenger::backward(), llvm::PrintRegUnit(), and llvm::LiveIntervals::runOnMachineFunction().
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Return the number of sub-register indices understood by the target.
Index 0 is reserved for the no-op sub-register, while 1 to getNumSubRegIndices() - 1 represent real sub-registers.
Definition at line 391 of file MCRegisterInfo.h.
Referenced by llvm::AVRInstPrinter::getPrettyRegisterName(), getSubReg(), getSubRegIdxOffset(), getSubRegIdxSize(), llvm::TargetRegisterInfo::getSubRegIndexLaneMask(), and llvm::TargetRegisterInfo::getSubRegIndexName().
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Return the register which is the program counter.
Definition at line 335 of file MCRegisterInfo.h.
Referenced by llvm::MCInstrDesc::mayAffectControlFlow().
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This method should return the register where the return address can be found.
Definition at line 330 of file MCRegisterInfo.h.
Referenced by llvm::MipsAsmPrinter::emitFrameDirective().
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Returns the register class associated with the enumeration value.
See class MCOperandInfo.
Definition at line 428 of file MCRegisterInfo.h.
References assert(), getNumRegClasses(), and i.
Referenced by getReg(), llvm::AMDGPU::getRegOperandSize(), llvm::MipsRegInfoRecord::MipsRegInfoRecord(), llvm::ARMInstPrinter::printInst(), llvm::AMDGPUInstPrinter::printRegOperand(), and llvm::AArch64InstPrinter::printVectorList().
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Definition at line 433 of file MCRegisterInfo.h.
References llvm::MCRegisterClass::NameIdx.
Referenced by llvm::TargetRegisterInfo::getRegClassName().
| int MCRegisterInfo::getSEHRegNum | ( | unsigned | RegNum | ) | const |
Map a target register to an equivalent SEH register number.
Returns LLVM register number if there is no equivalent value.
Definition at line 88 of file MCRegisterInfo.cpp.
References llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::end(), llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::find(), and I.
Returns the physical register number of sub-register "Index" for physical register RegNo.
Return zero if the sub-register does not exist.
Definition at line 28 of file MCRegisterInfo.cpp.
References assert(), getNumSubRegIndices(), and llvm::MCRegisterInfo::DiffListIterator::isValid().
Referenced by llvm::ARMBaseInstrInfo::AddDReg(), addExclusiveRegPair(), addSavedGPR(), AddSubReg(), llvm::X86InstrInfo::breakPartialRegDependency(), llvm::SparcInstrInfo::copyPhysReg(), llvm::ARMBaseInstrInfo::copyPhysReg(), GetDSubRegs(), getImplicitSPRUseForDPRUse(), getMatchingSuperReg(), getPairedGPR(), llvm::AVRInstPrinter::getPrettyRegisterName(), llvm::BitTracker::MachineEvaluator::getRegBitWidth(), INITIALIZE_PASS(), llvm::CoalescerPair::isCoalescable(), llvm::rdf::DataFlowGraph::makeRegRef(), llvm::HexagonAsmPrinter::PrintAsmOperand(), llvm::ARMAsmPrinter::PrintAsmOperand(), llvm::ARMInstPrinter::printGPRPairOperand(), llvm::AArch64InstPrinter::printGPRSeqPairsClassOperand(), llvm::ARMAsmPrinter::printOperand(), llvm::AArch64InstPrinter::printVectorList(), llvm::ARMInstPrinter::printVectorListTwo(), llvm::ARMInstPrinter::printVectorListTwoAllLanes(), llvm::ARMInstPrinter::printVectorListTwoSpaced(), llvm::ARMInstPrinter::printVectorListTwoSpacedAllLanes(), llvm::CoalescerPair::setRegisters(), llvm::MachineInstr::substituteRegister(), and llvm::MachineOperand::substPhysReg().
Get the offset of the bit range covered by a sub-register index.
If an Offset doesn't make sense (the index isn't continuous, or is used to access sub-registers at different offsets), return -1.
Definition at line 57 of file MCRegisterInfo.cpp.
References assert(), getNumSubRegIndices(), and llvm::MCRegisterInfo::SubRegCoveredBits::Offset.
Referenced by llvm::DwarfExpression::AddMachineReg(), and llvm::TargetInstrInfo::getStackSlotRange().
Get the size of the bit range covered by a sub-register index.
If the index isn't continuous, return the sum of the sizes of its parts. If the index is used to access subregisters of different sizes, return -1.
Definition at line 51 of file MCRegisterInfo.cpp.
References assert(), getNumSubRegIndices(), and llvm::MCRegisterInfo::SubRegCoveredBits::Size.
Referenced by llvm::DwarfExpression::AddMachineReg(), llvm::TargetInstrInfo::foldMemoryOperand(), and llvm::TargetInstrInfo::getStackSlotRange().
For a given register pair, return the sub-register index if the second register is a sub-register of the first.
Return zero otherwise.
Definition at line 40 of file MCRegisterInfo.cpp.
References assert(), getNumRegs(), and llvm::MCRegisterInfo::DiffListIterator::isValid().
Referenced by llvm::DwarfExpression::AddMachineReg(), llvm::rdf::DataFlowGraph::alias(), llvm::rdf::RegisterAggr::normalize(), and llvm::rdf::DataFlowGraph::normalizeRef().
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Initialize MCRegisterInfo, called by TableGen auto-generated routines.
DO NOT USE.
Definition at line 246 of file MCRegisterInfo.h.
Returns true if RegB is a sub-register of RegA.
Definition at line 445 of file MCRegisterInfo.h.
References isSuperRegister().
Referenced by llvm::MachineInstr::addRegisterDead(), llvm::MachineInstr::addRegisterKilled(), llvm::MachineInstr::findRegisterDefOperandIdx(), llvm::MachineInstr::findRegisterUseOperandIdx(), and llvm::MCInstrDesc::hasImplicitDefOfPhysReg().
Returns true if RegB is a sub-register of RegA or if RegB == RegA.
Definition at line 453 of file MCRegisterInfo.h.
References isSuperRegisterEq().
Referenced by isSuperOrSubRegisterEq(), and llvm::MCInstrDesc::mayAffectControlFlow().
Returns true if RegB is a super-register or sub-register of RegA or if RegB == RegA.
Definition at line 465 of file MCRegisterInfo.h.
References isSubRegisterEq(), and isSuperRegister().
Returns true if RegB is a super-register of RegA.
Definition at line 538 of file MCRegisterInfo.h.
References I.
Referenced by llvm::MachineInstr::addRegisterDead(), llvm::MachineInstr::addRegisterKilled(), llvm::ARMBaseInstrInfo::breakPartialRegDependency(), isSubRegister(), isSuperOrSubRegisterEq(), and isSuperRegisterEq().
Returns true if RegB is a super-register of RegA or if RegB == RegA.
Definition at line 459 of file MCRegisterInfo.h.
References isSuperRegister().
Referenced by llvm::MachineOperandIteratorBase::analyzePhysReg(), and isSubRegisterEq().
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Used to initialize Dwarf register to LLVM register number mapping.
Called by TableGen auto-generated routines. DO NOT USE.
Definition at line 304 of file MCRegisterInfo.h.
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Used to initialize LLVM register to Dwarf register number mapping.
Called by TableGen auto-generated routines. DO NOT USE.
Definition at line 290 of file MCRegisterInfo.h.
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Definition at line 324 of file MCRegisterInfo.h.
Referenced by llvm::X86_MC::initLLVMToSEHAndCVRegMapping().
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mapLLVMRegToSEHReg - Used to initialize LLVM register to SEH register number mapping.
By default the SEH register number is just the same as the LLVM register number. FIXME: TableGen these numbers. Currently this requires target specific initialization code.
Definition at line 320 of file MCRegisterInfo.h.
Referenced by llvm::X86_MC::initLLVMToSEHAndCVRegMapping().
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Definition at line 339 of file MCRegisterInfo.h.
References assert(), and Desc.
Referenced by get().
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Definition at line 419 of file MCRegisterInfo.h.
Referenced by getNumRegClasses().
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Definition at line 420 of file MCRegisterInfo.h.
Referenced by getNumRegClasses().
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Definition at line 240 of file MCRegisterInfo.h.
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Definition at line 241 of file MCRegisterInfo.h.
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Definition at line 242 of file MCRegisterInfo.h.
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Definition at line 238 of file MCRegisterInfo.h.
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Definition at line 237 of file MCRegisterInfo.h.
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Definition at line 239 of file MCRegisterInfo.h.
1.8.6