LLVM  4.0.0
CallingConvLower.cpp
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1 //===-- CallingConvLower.cpp - Calling Conventions ------------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the CCState class, used for lowering and implementing
11 // calling conventions.
12 //
13 //===----------------------------------------------------------------------===//
14 
18 #include "llvm/IR/DataLayout.h"
19 #include "llvm/Support/Debug.h"
26 #include <algorithm>
27 
28 using namespace llvm;
29 
32  : CallingConv(CC), IsVarArg(isVarArg), MF(mf),
33  TRI(*MF.getSubtarget().getRegisterInfo()), Locs(locs), Context(C),
34  CallOrPrologue(Unknown) {
35  // No stack is used.
36  StackOffset = 0;
37  MaxStackArgAlign = 1;
38 
40  UsedRegs.resize((TRI.getNumRegs()+31)/32);
41 }
42 
43 /// Allocate space on the stack large enough to pass an argument by value.
44 /// The size and alignment information of the argument is encoded in
45 /// its parameter attribute.
46 void CCState::HandleByVal(unsigned ValNo, MVT ValVT,
47  MVT LocVT, CCValAssign::LocInfo LocInfo,
48  int MinSize, int MinAlign,
49  ISD::ArgFlagsTy ArgFlags) {
50  unsigned Align = ArgFlags.getByValAlign();
51  unsigned Size = ArgFlags.getByValSize();
52  if (MinSize > (int)Size)
53  Size = MinSize;
54  if (MinAlign > (int)Align)
55  Align = MinAlign;
56  ensureMaxAlignment(Align);
57  MF.getSubtarget().getTargetLowering()->HandleByVal(this, Size, Align);
58  Size = unsigned(alignTo(Size, MinAlign));
59  unsigned Offset = AllocateStack(Size, Align);
60  addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo));
61 }
62 
63 /// Mark a register and all of its aliases as allocated.
64 void CCState::MarkAllocated(unsigned Reg) {
65  for (MCRegAliasIterator AI(Reg, &TRI, true); AI.isValid(); ++AI)
66  UsedRegs[*AI/32] |= 1 << (*AI&31);
67 }
68 
69 bool CCState::IsShadowAllocatedReg(unsigned Reg) const {
70  if (!isAllocated(Reg))
71  return false;
72 
73  for (auto const &ValAssign : Locs) {
74  if (ValAssign.isRegLoc()) {
75  for (MCRegAliasIterator AI(ValAssign.getLocReg(), &TRI, true);
76  AI.isValid(); ++AI) {
77  if (*AI == Reg)
78  return false;
79  }
80  }
81  }
82  return true;
83 }
84 
85 /// Analyze an array of argument values,
86 /// incorporating info about the formals into this state.
87 void
89  CCAssignFn Fn) {
90  unsigned NumArgs = Ins.size();
91 
92  for (unsigned i = 0; i != NumArgs; ++i) {
93  MVT ArgVT = Ins[i].VT;
94  ISD::ArgFlagsTy ArgFlags = Ins[i].Flags;
95  if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) {
96 #ifndef NDEBUG
97  dbgs() << "Formal argument #" << i << " has unhandled type "
98  << EVT(ArgVT).getEVTString() << '\n';
99 #endif
100  llvm_unreachable(nullptr);
101  }
102  }
103 }
104 
105 /// Analyze the return values of a function, returning true if the return can
106 /// be performed without sret-demotion and false otherwise.
108  CCAssignFn Fn) {
109  // Determine which register each value should be copied into.
110  for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
111  MVT VT = Outs[i].VT;
112  ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
113  if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this))
114  return false;
115  }
116  return true;
117 }
118 
119 /// Analyze the returned values of a return,
120 /// incorporating info about the result values into this state.
122  CCAssignFn Fn) {
123  // Determine which register each value should be copied into.
124  for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
125  MVT VT = Outs[i].VT;
126  ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
127  if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this)) {
128 #ifndef NDEBUG
129  dbgs() << "Return operand #" << i << " has unhandled type "
130  << EVT(VT).getEVTString() << '\n';
131 #endif
132  llvm_unreachable(nullptr);
133  }
134  }
135 }
136 
137 /// Analyze the outgoing arguments to a call,
138 /// incorporating info about the passed values into this state.
140  CCAssignFn Fn) {
141  unsigned NumOps = Outs.size();
142  for (unsigned i = 0; i != NumOps; ++i) {
143  MVT ArgVT = Outs[i].VT;
144  ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
145  if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) {
146 #ifndef NDEBUG
147  dbgs() << "Call operand #" << i << " has unhandled type "
148  << EVT(ArgVT).getEVTString() << '\n';
149 #endif
150  llvm_unreachable(nullptr);
151  }
152  }
153 }
154 
155 /// Same as above except it takes vectors of types and argument flags.
158  CCAssignFn Fn) {
159  unsigned NumOps = ArgVTs.size();
160  for (unsigned i = 0; i != NumOps; ++i) {
161  MVT ArgVT = ArgVTs[i];
162  ISD::ArgFlagsTy ArgFlags = Flags[i];
163  if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) {
164 #ifndef NDEBUG
165  dbgs() << "Call operand #" << i << " has unhandled type "
166  << EVT(ArgVT).getEVTString() << '\n';
167 #endif
168  llvm_unreachable(nullptr);
169  }
170  }
171 }
172 
173 /// Analyze the return values of a call, incorporating info about the passed
174 /// values into this state.
176  CCAssignFn Fn) {
177  for (unsigned i = 0, e = Ins.size(); i != e; ++i) {
178  MVT VT = Ins[i].VT;
179  ISD::ArgFlagsTy Flags = Ins[i].Flags;
180  if (Fn(i, VT, VT, CCValAssign::Full, Flags, *this)) {
181 #ifndef NDEBUG
182  dbgs() << "Call result #" << i << " has unhandled type "
183  << EVT(VT).getEVTString() << '\n';
184 #endif
185  llvm_unreachable(nullptr);
186  }
187  }
188 }
189 
190 /// Same as above except it's specialized for calls that produce a single value.
192  if (Fn(0, VT, VT, CCValAssign::Full, ISD::ArgFlagsTy(), *this)) {
193 #ifndef NDEBUG
194  dbgs() << "Call result has unhandled type "
195  << EVT(VT).getEVTString() << '\n';
196 #endif
197  llvm_unreachable(nullptr);
198  }
199 }
200 
202  if (VT.isVector())
203  return true; // Assume -msse-regparm might be in effect.
204  if (!VT.isInteger())
205  return false;
207  return true;
208  return false;
209 }
210 
212  MVT VT, CCAssignFn Fn) {
213  unsigned SavedStackOffset = StackOffset;
214  unsigned SavedMaxStackArgAlign = MaxStackArgAlign;
215  unsigned NumLocs = Locs.size();
216 
217  // Set the 'inreg' flag if it is used for this calling convention.
219  if (isValueTypeInRegForCC(CallingConv, VT))
220  Flags.setInReg();
221 
222  // Allocate something of this value type repeatedly until we get assigned a
223  // location in memory.
224  bool HaveRegParm = true;
225  while (HaveRegParm) {
226  if (Fn(0, VT, VT, CCValAssign::Full, Flags, *this)) {
227 #ifndef NDEBUG
228  dbgs() << "Call has unhandled type " << EVT(VT).getEVTString()
229  << " while computing remaining regparms\n";
230 #endif
231  llvm_unreachable(nullptr);
232  }
233  HaveRegParm = Locs.back().isRegLoc();
234  }
235 
236  // Copy all the registers from the value locations we added.
237  assert(NumLocs < Locs.size() && "CC assignment failed to add location");
238  for (unsigned I = NumLocs, E = Locs.size(); I != E; ++I)
239  if (Locs[I].isRegLoc())
240  Regs.push_back(MCPhysReg(Locs[I].getLocReg()));
241 
242  // Clear the assigned values and stack memory. We leave the registers marked
243  // as allocated so that future queries don't return the same registers, i.e.
244  // when i64 and f64 are both passed in GPRs.
245  StackOffset = SavedStackOffset;
246  MaxStackArgAlign = SavedMaxStackArgAlign;
247  Locs.resize(NumLocs);
248 }
249 
251  SmallVectorImpl<ForwardedRegister> &Forwards, ArrayRef<MVT> RegParmTypes,
252  CCAssignFn Fn) {
253  // Oftentimes calling conventions will not user register parameters for
254  // variadic functions, so we need to assume we're not variadic so that we get
255  // all the registers that might be used in a non-variadic call.
256  SaveAndRestore<bool> SavedVarArg(IsVarArg, false);
257  SaveAndRestore<bool> SavedMustTail(AnalyzingMustTailForwardedRegs, true);
258 
259  for (MVT RegVT : RegParmTypes) {
260  SmallVector<MCPhysReg, 8> RemainingRegs;
261  getRemainingRegParmsForType(RemainingRegs, RegVT, Fn);
262  const TargetLowering *TL = MF.getSubtarget().getTargetLowering();
263  const TargetRegisterClass *RC = TL->getRegClassFor(RegVT);
264  for (MCPhysReg PReg : RemainingRegs) {
265  unsigned VReg = MF.addLiveIn(PReg, RC);
266  Forwards.push_back(ForwardedRegister(VReg, PReg, RegVT));
267  }
268  }
269 }
270 
272  CallingConv::ID CallerCC, MachineFunction &MF,
273  LLVMContext &C,
275  CCAssignFn CalleeFn, CCAssignFn CallerFn) {
276  if (CalleeCC == CallerCC)
277  return true;
279  CCState CCInfo1(CalleeCC, false, MF, RVLocs1, C);
280  CCInfo1.AnalyzeCallResult(Ins, CalleeFn);
281 
283  CCState CCInfo2(CallerCC, false, MF, RVLocs2, C);
284  CCInfo2.AnalyzeCallResult(Ins, CallerFn);
285 
286  if (RVLocs1.size() != RVLocs2.size())
287  return false;
288  for (unsigned I = 0, E = RVLocs1.size(); I != E; ++I) {
289  const CCValAssign &Loc1 = RVLocs1[I];
290  const CCValAssign &Loc2 = RVLocs2[I];
291  if (Loc1.getLocInfo() != Loc2.getLocInfo())
292  return false;
293  bool RegLoc1 = Loc1.isRegLoc();
294  if (RegLoc1 != Loc2.isRegLoc())
295  return false;
296  if (RegLoc1) {
297  if (Loc1.getLocReg() != Loc2.getLocReg())
298  return false;
299  } else {
300  if (Loc1.getLocMemOffset() != Loc2.getLocMemOffset())
301  return false;
302  }
303  }
304  return true;
305 }
void AnalyzeCallResult(const SmallVectorImpl< ISD::InputArg > &Ins, CCAssignFn Fn)
AnalyzeCallResult - Analyze the return values of a call, incorporating info about the passed values i...
void push_back(const T &Elt)
Definition: SmallVector.h:211
LLVMContext & Context
size_t i
LocInfo getLocInfo() const
Describes a register that needs to be forwarded from the prologue to a musttail call.
unsigned addLiveIn(unsigned PReg, const TargetRegisterClass *RC)
addLiveIn - Add the specified physical register as a live-in value and create a corresponding virtual...
void AnalyzeFormalArguments(const SmallVectorImpl< ISD::InputArg > &Ins, CCAssignFn Fn)
AnalyzeFormalArguments - Analyze an array of argument values, incorporating info about the formals in...
bool CCAssignFn(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State)
CCAssignFn - This function assigns a location for Val, updating State to reflect the change...
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
unsigned getByValSize() const
uint64_t alignTo(uint64_t Value, uint64_t Align, uint64_t Skew=0)
Returns the next integer (mod 2**64) that is greater than or equal to Value and is a multiple of Alig...
Definition: MathExtras.h:664
bool CheckReturn(const SmallVectorImpl< ISD::OutputArg > &ArgsFlags, CCAssignFn Fn)
CheckReturn - Analyze the return values of a function, returning true if the return can be performed ...
virtual void HandleByVal(CCState *, unsigned &, unsigned) const
Target-specific cleanup for formal ByVal parameters.
bool isRegLoc() const
std::string getEVTString() const
getEVTString - This function returns value type as a string, e.g.
Definition: ValueTypes.cpp:120
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
struct fuzzer::@269 Flags
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:32
void addLoc(const CCValAssign &V)
Reg
All possible values of the reg field in the ModR/M byte.
static bool isValueTypeInRegForCC(CallingConv::ID CC, MVT VT)
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
unsigned getLocReg() const
unsigned getNumRegs() const
Return the number of registers this target has (useful for sizing arrays holding per register informa...
const RegList & Regs
X86_FastCall - 'fast' analog of X86_StdCall.
Definition: CallingConv.h:91
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory)...
Definition: APInt.h:33
static GCRegistry::Add< CoreCLRGC > E("coreclr","CoreCLR-compatible GC")
constexpr uint64_t MinAlign(uint64_t A, uint64_t B)
MinAlign - A and B are either alignments or offsets.
Definition: MathExtras.h:589
bool IsShadowAllocatedReg(unsigned Reg) const
A shadow allocated register is a register that was allocated but wasn't added to the location list (L...
bool isInteger() const
isInteger - Return true if this is an integer, or a vector integer type.
MVT - Machine Value Type.
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:48
bool isVector() const
isVector - Return true if this is a vector value type.
MCRegAliasIterator enumerates all registers aliasing Reg.
uint32_t Offset
static bool resultsCompatible(CallingConv::ID CalleeCC, CallingConv::ID CallerCC, MachineFunction &MF, LLVMContext &C, const SmallVectorImpl< ISD::InputArg > &Ins, CCAssignFn CalleeFn, CCAssignFn CallerFn)
Returns true if the results of the two calling conventions are compatible.
MSVC calling convention that passes vectors and vector aggregates in SSE registers.
Definition: CallingConv.h:153
EVT - Extended Value Type.
Definition: ValueTypes.h:31
void HandleByVal(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, int MinSize, int MinAlign, ISD::ArgFlagsTy ArgFlags)
Allocate space on the stack large enough to pass an argument by value.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
void getRemainingRegParmsForType(SmallVectorImpl< MCPhysReg > &Regs, MVT VT, CCAssignFn Fn)
Compute the remaining unused register parameters that would be used for the given value type...
unsigned getByValAlign() const
CCState - This class holds information needed while lowering arguments and return values...
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:843
virtual const TargetLowering * getTargetLowering() const
CCValAssign - Represent assignment of one arg/retval to a location.
CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &MF, SmallVectorImpl< CCValAssign > &locs, LLVMContext &C)
static GCRegistry::Add< ShadowStackGC > C("shadow-stack","Very portable GC for uncooperative code generators")
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:132
virtual const TargetRegisterClass * getRegClassFor(MVT VT) const
Return the register class that should be used for the specified value type.
void AnalyzeCallOperands(const SmallVectorImpl< ISD::OutputArg > &Outs, CCAssignFn Fn)
AnalyzeCallOperands - Analyze the outgoing arguments to a call, incorporating info about the passed v...
A utility class that uses RAII to save and restore the value of a variable.
void analyzeMustTailForwardedRegisters(SmallVectorImpl< ForwardedRegister > &Forwards, ArrayRef< MVT > RegParmTypes, CCAssignFn Fn)
Compute the set of registers that need to be preserved and forwarded to any musttail calls...
#define I(x, y, z)
Definition: MD5.cpp:54
void AnalyzeReturn(const SmallVectorImpl< ISD::OutputArg > &Outs, CCAssignFn Fn)
AnalyzeReturn - Analyze the returned values of a return, incorporating info about the result values i...
LLVM_ATTRIBUTE_ALWAYS_INLINE size_type size() const
Definition: SmallVector.h:135
bool isAllocated(unsigned Reg) const
isAllocated - Return true if the specified register (or an alias) is allocated.
static CCValAssign getMem(unsigned ValNo, MVT ValVT, unsigned Offset, MVT LocVT, LocInfo HTP)
void clearByValRegsInfo()
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This file provides utility classes that use RAII to save and restore values.
unsigned getLocMemOffset() const
unsigned AllocateStack(unsigned Size, unsigned Align)
AllocateStack - Allocate a chunk of stack space with the specified size and alignment.
This file describes how to lower LLVM code to machine code.
void ensureMaxAlignment(unsigned Align)
void resize(size_type N)
Definition: SmallVector.h:352