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LLVM
4.0.0
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MachineOperand class - Representation of each machine instruction operand. More...
#include <MachineOperand.h>
Public Types | |
| enum | MachineOperandType : unsigned char { MO_Register, MO_Immediate, MO_CImmediate, MO_FPImmediate, MO_MachineBasicBlock, MO_FrameIndex, MO_ConstantPoolIndex, MO_TargetIndex, MO_JumpTableIndex, MO_ExternalSymbol, MO_GlobalAddress, MO_BlockAddress, MO_RegisterMask, MO_RegisterLiveOut, MO_Metadata, MO_MCSymbol, MO_CFIIndex, MO_IntrinsicID, MO_Predicate } |
Public Member Functions | |
| MachineOperandType | getType () const |
| getType - Returns the MachineOperandType for this operand. More... | |
| unsigned | getTargetFlags () const |
| void | setTargetFlags (unsigned F) |
| void | addTargetFlag (unsigned F) |
| MachineInstr * | getParent () |
| getParent - Return the instruction that this operand belongs to. More... | |
| const MachineInstr * | getParent () const |
| void | clearParent () |
| clearParent - Reset the parent pointer. More... | |
| void | print (raw_ostream &os, const TargetRegisterInfo *TRI=nullptr, const TargetIntrinsicInfo *IntrinsicInfo=nullptr) const |
| void | print (raw_ostream &os, ModuleSlotTracker &MST, const TargetRegisterInfo *TRI=nullptr, const TargetIntrinsicInfo *IntrinsicInfo=nullptr) const |
| LLVM_DUMP_METHOD void | dump () const |
| bool | isReg () const |
| isReg - Tests if this is a MO_Register operand. More... | |
| bool | isImm () const |
| isImm - Tests if this is a MO_Immediate operand. More... | |
| bool | isCImm () const |
| isCImm - Test if this is a MO_CImmediate operand. More... | |
| bool | isFPImm () const |
| isFPImm - Tests if this is a MO_FPImmediate operand. More... | |
| bool | isMBB () const |
| isMBB - Tests if this is a MO_MachineBasicBlock operand. More... | |
| bool | isFI () const |
| isFI - Tests if this is a MO_FrameIndex operand. More... | |
| bool | isCPI () const |
| isCPI - Tests if this is a MO_ConstantPoolIndex operand. More... | |
| bool | isTargetIndex () const |
| isTargetIndex - Tests if this is a MO_TargetIndex operand. More... | |
| bool | isJTI () const |
| isJTI - Tests if this is a MO_JumpTableIndex operand. More... | |
| bool | isGlobal () const |
| isGlobal - Tests if this is a MO_GlobalAddress operand. More... | |
| bool | isSymbol () const |
| isSymbol - Tests if this is a MO_ExternalSymbol operand. More... | |
| bool | isBlockAddress () const |
| isBlockAddress - Tests if this is a MO_BlockAddress operand. More... | |
| bool | isRegMask () const |
| isRegMask - Tests if this is a MO_RegisterMask operand. More... | |
| bool | isRegLiveOut () const |
| isRegLiveOut - Tests if this is a MO_RegisterLiveOut operand. More... | |
| bool | isMetadata () const |
| isMetadata - Tests if this is a MO_Metadata operand. More... | |
| bool | isMCSymbol () const |
| bool | isCFIIndex () const |
| bool | isIntrinsicID () const |
| bool | isPredicate () const |
| unsigned | getReg () const |
| getReg - Returns the register number. More... | |
| unsigned | getSubReg () const |
| bool | isUse () const |
| bool | isDef () const |
| bool | isImplicit () const |
| bool | isDead () const |
| bool | isKill () const |
| bool | isUndef () const |
| bool | isInternalRead () const |
| bool | isEarlyClobber () const |
| bool | isTied () const |
| bool | isDebug () const |
| bool | readsReg () const |
| readsReg - Returns true if this operand reads the previous value of its register. More... | |
| void | setReg (unsigned Reg) |
| Change the register this operand corresponds to. More... | |
| void | setSubReg (unsigned subReg) |
| void | substVirtReg (unsigned Reg, unsigned SubIdx, const TargetRegisterInfo &) |
| substVirtReg - Substitute the current register with the virtual subregister Reg:SubReg. More... | |
| void | substPhysReg (unsigned Reg, const TargetRegisterInfo &) |
| substPhysReg - Substitute the current register with the physical register Reg, taking any existing SubReg into account. More... | |
| void | setIsUse (bool Val=true) |
| void | setIsDef (bool Val=true) |
| Change a def to a use, or a use to a def. More... | |
| void | setImplicit (bool Val=true) |
| void | setIsKill (bool Val=true) |
| void | setIsDead (bool Val=true) |
| void | setIsUndef (bool Val=true) |
| void | setIsInternalRead (bool Val=true) |
| void | setIsEarlyClobber (bool Val=true) |
| void | setIsDebug (bool Val=true) |
| int64_t | getImm () const |
| const ConstantInt * | getCImm () const |
| const ConstantFP * | getFPImm () const |
| MachineBasicBlock * | getMBB () const |
| int | getIndex () const |
| const GlobalValue * | getGlobal () const |
| const BlockAddress * | getBlockAddress () const |
| MCSymbol * | getMCSymbol () const |
| unsigned | getCFIIndex () const |
| Intrinsic::ID | getIntrinsicID () const |
| unsigned | getPredicate () const |
| int64_t | getOffset () const |
| Return the offset from the symbol in this operand. More... | |
| const char * | getSymbolName () const |
| bool | clobbersPhysReg (unsigned PhysReg) const |
| clobbersPhysReg - Returns true if this RegMask operand clobbers PhysReg. More... | |
| const uint32_t * | getRegMask () const |
| getRegMask - Returns a bit mask of registers preserved by this RegMask operand. More... | |
| const uint32_t * | getRegLiveOut () const |
| getRegLiveOut - Returns a bit mask of live-out registers. More... | |
| const MDNode * | getMetadata () const |
| void | setImm (int64_t immVal) |
| void | setFPImm (const ConstantFP *CFP) |
| void | setOffset (int64_t Offset) |
| void | setIndex (int Idx) |
| void | setMBB (MachineBasicBlock *MBB) |
| void | setRegMask (const uint32_t *RegMaskPtr) |
| Sets value of register mask operand referencing Mask. More... | |
| bool | isIdenticalTo (const MachineOperand &Other) const |
| Returns true if this operand is identical to the specified operand except for liveness related flags (isKill, isUndef and isDead). More... | |
| void | ChangeToImmediate (int64_t ImmVal) |
| ChangeToImmediate - Replace this operand with a new immediate operand of the specified value. More... | |
| void | ChangeToFPImmediate (const ConstantFP *FPImm) |
| ChangeToFPImmediate - Replace this operand with a new FP immediate operand of the specified value. More... | |
| void | ChangeToES (const char *SymName, unsigned char TargetFlags=0) |
| ChangeToES - Replace this operand with a new external symbol operand. More... | |
| void | ChangeToMCSymbol (MCSymbol *Sym) |
| ChangeToMCSymbol - Replace this operand with a new MC symbol operand. More... | |
| void | ChangeToFrameIndex (int Idx) |
| Replace this operand with a frame index. More... | |
| void | ChangeToRegister (unsigned Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isDebug=false) |
| ChangeToRegister - Replace this operand with a new register operand of the specified value. More... | |
Friends | |
| class | MachineInstr |
| class | MachineRegisterInfo |
| hash_code | hash_value (const MachineOperand &MO) |
| MachineOperand hash_value overload. More... | |
MachineOperand class - Representation of each machine instruction operand.
This class isn't a POD type because it has a private constructor, but its destructor must be trivial. Functions like MachineInstr::addOperand(), MachineRegisterInfo::moveOperands(), and MF::DeleteMachineInstr() depend on not having to call the MachineOperand destructor.
Definition at line 46 of file MachineOperand.h.
| enum llvm::MachineOperand::MachineOperandType : unsigned char |
| Enumerator | |
|---|---|
| MO_Register |
Register operand. |
| MO_Immediate |
Immediate operand. |
| MO_CImmediate |
Immediate >64bit operand. |
| MO_FPImmediate |
Floating-point immediate operand. |
| MO_MachineBasicBlock |
MachineBasicBlock reference. |
| MO_FrameIndex |
Abstract Stack Frame Index. |
| MO_ConstantPoolIndex | |
| MO_TargetIndex |
Target-dependent index+offset operand. |
| MO_JumpTableIndex |
Address of indexed Jump Table for switch. |
| MO_ExternalSymbol |
Name of external global symbol. |
| MO_GlobalAddress |
Address of a global value. |
| MO_BlockAddress |
Address of a basic block. |
| MO_RegisterMask |
Mask of preserved registers. |
| MO_RegisterLiveOut |
Mask of live-out registers. |
| MO_Metadata |
Metadata reference (for debug info) |
| MO_MCSymbol |
MCSymbol reference (for debug/eh info) |
| MO_CFIIndex |
MCCFIInstruction index. |
| MO_IntrinsicID |
Intrinsic ID for ISel. |
| MO_Predicate |
Generic predicate for ISel. |
Definition at line 48 of file MachineOperand.h.
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Definition at line 205 of file MachineOperand.h.
References assert(), F, and isReg().
Referenced by llvm::HexagonInstrInfo::immediateExtend().
ChangeToES - Replace this operand with a new external symbol operand.
Definition at line 156 of file MachineInstr.cpp.
References assert(), isReg(), isTied(), MO_ExternalSymbol, setOffset(), and setTargetFlags().
| void MachineOperand::ChangeToFPImmediate | ( | const ConstantFP * | FPImm | ) |
ChangeToFPImmediate - Replace this operand with a new FP immediate operand of the specified value.
If an operand is known to be an FP immediate already, the setFPImm method should be used.
Definition at line 147 of file MachineInstr.cpp.
References assert(), isReg(), isTied(), and MO_FPImmediate.
| void MachineOperand::ChangeToFrameIndex | ( | int | Idx | ) |
Replace this operand with a frame index.
Definition at line 178 of file MachineInstr.cpp.
References assert(), isReg(), isTied(), MO_FrameIndex, and setIndex().
Referenced by swapRegAndNonRegOperand(), and updateOperand().
| void MachineOperand::ChangeToImmediate | ( | int64_t | ImmVal | ) |
ChangeToImmediate - Replace this operand with a new immediate operand of the specified value.
If an operand is known to be an immediate already, the setImm method should be used.
Definition at line 138 of file MachineInstr.cpp.
References assert(), ImmVal, isReg(), isTied(), and MO_Immediate.
Referenced by llvm::BPFRegisterInfo::eliminateFrameIndex(), llvm::MSP430RegisterInfo::eliminateFrameIndex(), llvm::LanaiRegisterInfo::eliminateFrameIndex(), llvm::AVRRegisterInfo::eliminateFrameIndex(), llvm::HexagonRegisterInfo::eliminateFrameIndex(), llvm::NVPTXRegisterInfo::eliminateFrameIndex(), llvm::XCoreRegisterInfo::eliminateFrameIndex(), llvm::ThumbRegisterInfo::eliminateFrameIndex(), llvm::AArch64RegisterInfo::eliminateFrameIndex(), llvm::SIRegisterInfo::eliminateFrameIndex(), llvm::PPCRegisterInfo::eliminateFrameIndex(), llvm::X86RegisterInfo::eliminateFrameIndex(), llvm::SystemZInstrInfo::FoldImmediate(), llvm::SIInstrInfo::FoldImmediate(), llvm::ARMBaseInstrInfo::FoldImmediate(), foldImmediates(), llvm::X86InstrInfo::foldMemoryOperandImpl(), llvm::SIInstrInfo::legalizeOperandsVOP2(), replaceFI(), llvm::PPCRegisterInfo::resolveFrameIndex(), llvm::rewriteAArch64FrameIndex(), llvm::rewriteARMFrameIndex(), llvm::ThumbRegisterInfo::rewriteFrameIndex(), llvm::rewriteT2FrameIndex(), llvm::AArch64InstructionSelector::select(), swapRegAndNonRegOperand(), tryConstantFoldOp(), and updateOperand().
| void MachineOperand::ChangeToMCSymbol | ( | MCSymbol * | Sym | ) |
ChangeToMCSymbol - Replace this operand with a new MC symbol operand.
Definition at line 168 of file MachineInstr.cpp.
References assert(), isReg(), isTied(), MO_MCSymbol, and Sym.
| void MachineOperand::ChangeToRegister | ( | unsigned | Reg, |
| bool | isDef, | ||
| bool | isImp = false, |
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| bool | isKill = false, |
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| bool | isDead = false, |
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| bool | isUndef = false, |
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| bool | isDebug = false |
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ChangeToRegister - Replace this operand with a new register operand of the specified value.
If an operand is known to be an register already, the setReg method should be used.
Definition at line 191 of file MachineInstr.cpp.
References llvm::MachineRegisterInfo::addRegOperandToUseList(), llvm::MachineBasicBlock::getParent(), getParent(), isDead(), isDebug(), isDef(), isKill(), isReg(), isUndef(), MBB, MI, MO_Register, Reg, and llvm::MachineRegisterInfo::removeRegOperandFromUseList().
Referenced by llvm::BPFRegisterInfo::eliminateFrameIndex(), llvm::MSP430RegisterInfo::eliminateFrameIndex(), llvm::WebAssemblyRegisterInfo::eliminateFrameIndex(), llvm::LanaiRegisterInfo::eliminateFrameIndex(), llvm::AVRRegisterInfo::eliminateFrameIndex(), llvm::NVPTXRegisterInfo::eliminateFrameIndex(), llvm::XCoreRegisterInfo::eliminateFrameIndex(), llvm::HexagonRegisterInfo::eliminateFrameIndex(), llvm::ThumbRegisterInfo::eliminateFrameIndex(), llvm::AArch64RegisterInfo::eliminateFrameIndex(), llvm::SIRegisterInfo::eliminateFrameIndex(), llvm::PPCRegisterInfo::eliminateFrameIndex(), llvm::X86RegisterInfo::eliminateFrameIndex(), llvm::ARMBaseRegisterInfo::eliminateFrameIndex(), llvm::SIInstrInfo::legalizeOperandsVOP2(), llvm::SIInstrInfo::legalizeOpWithMove(), replaceFI(), llvm::SIRegisterInfo::resolveFrameIndex(), llvm::PPCRegisterInfo::resolveFrameIndex(), llvm::rewriteAArch64FrameIndex(), llvm::rewriteARMFrameIndex(), llvm::ThumbRegisterInfo::rewriteFrameIndex(), llvm::rewriteT2FrameIndex(), swapRegAndNonRegOperand(), and llvm::X86InstrInfo::unfoldMemoryOperand().
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clearParent - Reset the parent pointer.
The MachineOperand copy constructor also copies ParentMI, expecting the original to be deleted. If a MachineOperand is ever stored outside a MachineInstr, the parent pointer must be cleared.
Never call clearParent() on an operand in a MachineInstr.
Definition at line 225 of file MachineOperand.h.
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clobbersPhysReg - Returns true if this RegMask clobbers PhysReg.
It is sometimes necessary to detach the register mask pointer from its machine operand. This static method can be used for such detached bit mask pointers.
Definition at line 495 of file MachineOperand.h.
References assert().
Referenced by llvm::MachineOperandIteratorBase::analyzePhysReg(), canClobberPhysRegDefs(), canClobberReachingPhysRegUse(), CheckForLiveRegDefMasked(), clobbersAllYmmRegs(), clobbersCTR(), clobbersPhysReg(), llvm::ARMBaseInstrInfo::DefinesPredicate(), llvm::PPCInstrInfo::DefinesPredicate(), llvm::MachineInstr::findRegisterDefOperandIdx(), llvm::X86RegisterInfo::getReservedRegs(), handleRegMaskClobber(), llvm::X86InstrInfo::isSafeToClobberEFLAGS(), llvm::LanaiInstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), llvm::TargetLowering::parametersInCSRMatch(), llvm::PhysicalRegisterUsageInfo::print(), llvm::LivePhysRegs::removeRegsInMask(), and llvm::ThumbRegisterInfo::saveScavengerRegister().
clobbersPhysReg - Returns true if this RegMask operand clobbers PhysReg.
Definition at line 502 of file MachineOperand.h.
References clobbersPhysReg(), and getRegMask().
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Definition at line 705 of file MachineOperand.h.
References BA, MO_BlockAddress, OffsetedInfo, setOffset(), and setTargetFlags().
Referenced by llvm::MachineInstrBuilder::addBlockAddress().
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Definition at line 752 of file MachineOperand.h.
References CFIIndex, and MO_CFIIndex.
Referenced by llvm::MachineInstrBuilder::addCFIIndex().
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Definition at line 617 of file MachineOperand.h.
References CI, and MO_CImmediate.
Referenced by llvm::MachineInstrBuilder::addCImm().
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Definition at line 666 of file MachineOperand.h.
References MO_ConstantPoolIndex, setIndex(), setOffset(), and setTargetFlags().
Referenced by llvm::MachineInstrBuilder::addConstantPoolIndex(), and llvm::X86InstrInfo::foldMemoryOperandImpl().
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Definition at line 697 of file MachineOperand.h.
References MO_ExternalSymbol, OffsetedInfo, setOffset(), and setTargetFlags().
Referenced by llvm::MachineInstrBuilder::addExternalSymbol(), and llvm::LegalizerHelper::libcall().
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Definition at line 661 of file MachineOperand.h.
References MO_FrameIndex, and setIndex().
Referenced by llvm::MachineInstrBuilder::addFrameIndex(), llvm::X86InstrInfo::foldMemoryOperandImpl(), llvm::X86AddressMode::getFullAddress(), and llvm::FastISel::selectIntrinsicCall().
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Definition at line 623 of file MachineOperand.h.
References CFP, and MO_FPImmediate.
Referenced by llvm::MachineInstrBuilder::addFPImm(), and ConvertImplicitDefToConstZero().
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Definition at line 689 of file MachineOperand.h.
References GV, MO_GlobalAddress, OffsetedInfo, setOffset(), and setTargetFlags().
Referenced by llvm::MachineInstrBuilder::addGlobalAddress(), llvm::X86AddressMode::getFullAddress(), llvm::CallLowering::lowerCall(), and llvm::FastISel::selectPatchpoint().
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Definition at line 611 of file MachineOperand.h.
References MO_Immediate, and setImm().
Referenced by llvm::MachineInstrBuilder::addImm(), llvm::WebAssemblyInstrInfo::analyzeBranch(), llvm::XCoreInstrInfo::analyzeBranch(), llvm::MSP430InstrInfo::analyzeBranch(), llvm::LanaiInstrInfo::analyzeBranch(), llvm::HexagonInstrInfo::analyzeBranch(), llvm::AVRInstrInfo::analyzeBranch(), llvm::PPCInstrInfo::analyzeBranch(), llvm::SystemZInstrInfo::analyzeBranch(), llvm::SIInstrInfo::analyzeBranchImpl(), llvm::X86InstrInfo::analyzeBranchPredicate(), llvm::X86InstrInfo::commuteInstructionImpl(), ConvertImplicitDefToConstZero(), llvm::PPCTargetLowering::EmitInstrWithCustomInserter(), llvm::X86InstrInfo::foldMemoryOperandImpl(), llvm::X86AddressMode::getFullAddress(), llvm::CallLowering::lowerCall(), llvm::SIInstrInfo::moveToVALU(), parseCondBranch(), PlaceMarkers(), llvm::HexagonInstrInfo::reduceLoopCount(), llvm::WebAssemblyInstrInfo::reverseBranchCondition(), llvm::AArch64InstructionSelector::select(), llvm::FastISel::selectPatchpoint(), and llvm::FastISel::selectStackmap().
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Definition at line 758 of file MachineOperand.h.
References IntrinsicID, and MO_IntrinsicID.
Referenced by llvm::MachineInstrBuilder::addIntrinsicID().
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Definition at line 682 of file MachineOperand.h.
References MO_JumpTableIndex, setIndex(), and setTargetFlags().
Referenced by llvm::MachineInstrBuilder::addJumpTableIndex().
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Definition at line 654 of file MachineOperand.h.
References MO_MachineBasicBlock, setMBB(), and setTargetFlags().
Referenced by llvm::MachineInstrBuilder::addMBB().
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Definition at line 743 of file MachineOperand.h.
References MO_MCSymbol, setOffset(), setTargetFlags(), and Sym.
Referenced by llvm::MachineInstrBuilder::addSym().
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Definition at line 737 of file MachineOperand.h.
References MD, and MO_Metadata.
Referenced by llvm::MachineInstrBuilder::addMetadata().
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Definition at line 764 of file MachineOperand.h.
References MO_Predicate, and Pred.
Referenced by llvm::MachineInstrBuilder::addPredicate().
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Definition at line 629 of file MachineOperand.h.
References assert(), isDead(), isDebug(), isDef(), isEarlyClobber(), isInternalRead(), isKill(), isUndef(), MO_Register, Reg, RegNo, setSubReg(), and SubReg.
Referenced by llvm::MachineInstrBuilder::addReg(), llvm::MachineInstr::addRegisterDead(), llvm::MachineInstr::addRegisterDefined(), llvm::MachineInstr::addRegisterKilled(), llvm::HexagonPacketizerList::addToPacket(), llvm::ARMTargetLowering::AdjustInstrPostInstrSelection(), llvm::R600InstrInfo::analyzeBranch(), llvm::PPCInstrInfo::analyzeBranch(), llvm::X86InstrInfo::convertToThreeAddress(), llvm::PPCTargetLowering::EmitInstrWithCustomInserter(), llvm::HexagonFrameLowering::emitPrologue(), llvm::X86InstrInfo::foldMemoryOperandImpl(), llvm::X86AddressMode::getFullAddress(), ImposeStackOrdering(), INITIALIZE_PASS(), llvm::CallLowering::lowerCall(), llvm::PPCInstrInfo::optimizeCompareInstr(), llvm::rewriteT2FrameIndex(), llvm::AArch64InstructionSelector::select(), llvm::FastISel::selectIntrinsicCall(), llvm::FastISel::selectPatchpoint(), llvm::FastISel::selectStackmap(), and llvm::tryFoldSPUpdateIntoPushPop().
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Definition at line 731 of file MachineOperand.h.
References assert(), llvm::BitmaskEnumDetail::Mask(), MO_RegisterLiveOut, and RegMask.
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CreateRegMask - Creates a register mask operand referencing Mask.
The operand does not take ownership of the memory referenced by Mask, it must remain valid for the lifetime of the operand.
A RegMask operand represents a set of non-clobbered physical registers on an instruction that clobbers many registers, typically a call. The bit mask has a bit set for each physreg that is preserved by this instruction, as described in the documentation for TargetRegisterInfo::getCallPreservedMask().
Any physreg with a 0 bit in the mask is clobbered by the instruction.
Definition at line 725 of file MachineOperand.h.
References assert(), llvm::BitmaskEnumDetail::Mask(), MO_RegisterMask, and RegMask.
Referenced by llvm::MachineInstrBuilder::addRegMask(), and llvm::FastISel::selectPatchpoint().
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Definition at line 674 of file MachineOperand.h.
References MO_TargetIndex, setIndex(), setOffset(), and setTargetFlags().
Referenced by llvm::MachineInstrBuilder::addTargetIndex().
| LLVM_DUMP_METHOD void MachineOperand::dump | ( | ) | const |
Definition at line 501 of file MachineInstr.cpp.
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Definition at line 451 of file MachineOperand.h.
References assert(), and isBlockAddress().
Referenced by llvm::LanaiMCInstLower::GetBlockAddressSymbol(), llvm::MSP430MCInstLower::GetBlockAddressSymbol(), llvm::SystemZMCInstLower::getExpr(), llvm::hash_value(), llvm::HexagonLowerToMC(), isIdenticalTo(), isSimilarDispOp(), llvm::AArch64MCInstLower::lowerOperand(), llvm::ARMAsmPrinter::lowerOperand(), llvm::LowerPPCMachineInstrToMCInst(), LowerSymbolOperand(), llvm::MIPrinter::print(), and llvm::MipsAsmPrinter::printOperand().
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Definition at line 461 of file MachineOperand.h.
References assert(), and isCFIIndex().
Referenced by llvm::AsmPrinter::emitCFIInstruction(), llvm::hash_value(), isIdenticalTo(), and llvm::MIPrinter::print().
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Definition at line 425 of file MachineOperand.h.
References assert(), and isCImm().
Referenced by emitDebugValueComment(), getDebugLocValue(), llvm::hash_value(), isIdenticalTo(), llvm::MIPrinter::print(), llvm::AArch64InstructionSelector::select(), and llvm::LegalizerHelper::widenScalar().
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Definition at line 430 of file MachineOperand.h.
References assert(), and isFPImm().
Referenced by llvm::DwarfUnit::addConstantFPValue(), emitDebugValueComment(), llvm::R600TargetLowering::EmitInstrWithCustomInserter(), getDebugLocValue(), llvm::hash_value(), llvm::HexagonLowerToMC(), isIdenticalTo(), llvm::WebAssemblyMCInstLower::Lower(), llvm::ARMAsmPrinter::lowerOperand(), llvm::MIPrinter::print(), llvm::AArch64InstructionSelector::select(), and llvm::LegalizerHelper::widenScalar().
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Definition at line 446 of file MachineOperand.h.
References assert(), and isGlobal().
Referenced by llvm::MachineInstrBuilder::addDisp(), llvm::X86FrameLowering::adjustForHiPEPrologue(), llvm::EHStreamer::callToNoUnwindFunction(), llvm::ARMAsmPrinter::EmitInstruction(), llvm::getAddressFromInstr(), llvm::SystemZMCInstLower::getExpr(), llvm::MSP430MCInstLower::GetGlobalAddressSymbol(), llvm::BPFMCInstLower::GetGlobalAddressSymbol(), llvm::LanaiMCInstLower::GetGlobalAddressSymbol(), llvm::AArch64MCInstLower::GetGlobalAddressSymbol(), GetSymbolFromOperand(), llvm::hash_value(), llvm::HexagonLowerToMC(), isIdenticalTo(), isSimilarDispOp(), llvm::WebAssemblyMCInstLower::Lower(), llvm::AMDGPUMCInstLower::lowerOperand(), llvm::ARMAsmPrinter::lowerOperand(), LowerSymbolOperand(), llvm::AArch64MCInstLower::lowerSymbolOperandELF(), llvm::rdf::operator<<(), llvm::MIPrinter::print(), llvm::AVRAsmPrinter::printOperand(), llvm::HexagonAsmPrinter::printOperand(), llvm::ARMAsmPrinter::printOperand(), llvm::MipsAsmPrinter::printOperand(), printSymbolOperand(), llvm::ARMBaseInstrInfo::produceSameValue(), QueryCallee(), llvm::DetectRoundChange::runOnMachineFunction(), and llvm::AArch64InstructionSelector::select().
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Definition at line 420 of file MachineOperand.h.
References assert(), and isImm().
Referenced by llvm::DwarfUnit::addConstantValue(), llvm::MachineInstrBuilder::addDisp(), llvm::R600InstrInfo::addFlag(), adjustDefLatency(), llvm::SITargetLowering::AdjustInstrPostInstrSelection(), llvm::LanaiInstrInfo::analyzeCompare(), llvm::SystemZInstrInfo::analyzeCompare(), llvm::AArch64InstrInfo::analyzeCompare(), llvm::ARMBaseInstrInfo::analyzeCompare(), llvm::PPCInstrInfo::analyzeCompare(), llvm::HexagonInstrInfo::analyzeCompare(), llvm::X86InstrInfo::analyzeCompare(), attachMEMCPYScratchRegs(), llvm::R600InstrInfo::buildSlotOfVectorInstruction(), canBeExpandedToORR(), canCompareBeNewValueJump(), canFoldIntoCSel(), canShrink(), llvm::R600InstrInfo::clearFlag(), llvm::Legalizer::combineExtracts(), llvm::PPCInstrInfo::commuteInstructionImpl(), llvm::X86InstrInfo::commuteInstructionImpl(), compareMachineOp(), llvm::ARMBaseInstrInfo::convertToThreeAddress(), llvm::SystemZInstrInfo::convertToThreeAddress(), llvm::SparcFrameLowering::eliminateCallFramePseudoInstr(), llvm::MSP430FrameLowering::eliminateCallFramePseudoInstr(), llvm::Thumb1FrameLowering::eliminateCallFramePseudoInstr(), llvm::XCoreFrameLowering::eliminateCallFramePseudoInstr(), llvm::BPFRegisterInfo::eliminateFrameIndex(), llvm::MSP430RegisterInfo::eliminateFrameIndex(), llvm::SparcRegisterInfo::eliminateFrameIndex(), llvm::WebAssemblyRegisterInfo::eliminateFrameIndex(), llvm::LanaiRegisterInfo::eliminateFrameIndex(), llvm::AVRRegisterInfo::eliminateFrameIndex(), llvm::NVPTXRegisterInfo::eliminateFrameIndex(), llvm::HexagonRegisterInfo::eliminateFrameIndex(), llvm::XCoreRegisterInfo::eliminateFrameIndex(), llvm::AArch64RegisterInfo::eliminateFrameIndex(), llvm::PPCRegisterInfo::eliminateFrameIndex(), llvm::X86RegisterInfo::eliminateFrameIndex(), llvm::ARMBaseRegisterInfo::eliminateFrameIndex(), emitDebugValueComment(), llvm::AArch64FrameLowering::emitEpilogue(), llvm::PPCFrameLowering::emitEpilogue(), llvm::AArch64TargetLowering::EmitF128CSEL(), llvm::AsmPrinter::emitFrameAlloc(), EmitGCCInlineAsmStr(), emitIndirectDst(), emitIndirectSrc(), llvm::SystemZAsmPrinter::EmitInstruction(), llvm::ARMAsmPrinter::EmitInstruction(), llvm::X86AsmPrinter::EmitInstruction(), llvm::MipsAsmPrinter::EmitInstruction(), llvm::R600TargetLowering::EmitInstrWithCustomInserter(), llvm::BPFTargetLowering::EmitInstrWithCustomInserter(), llvm::AVRTargetLowering::EmitInstrWithCustomInserter(), llvm::MSP430TargetLowering::EmitInstrWithCustomInserter(), llvm::ARMTargetLowering::EmitInstrWithCustomInserter(), llvm::PPCTargetLowering::EmitInstrWithCustomInserter(), llvm::ARMAsmPrinter::EmitJumpTableTBInst(), EmitMSInlineAsmStr(), llvm::HexagonEvaluator::evaluate(), llvm::BitTracker::MachineEvaluator::evaluate(), ExpandMOVImmSExti8(), llvm::SIInstrInfo::expandPostRAPseudo(), llvm::HexagonInstrInfo::expandPostRAPseudo(), llvm::R600InstrInfo::expandPostRAPseudo(), llvm::SystemZInstrInfo::expandPostRAPseudo(), llvm::SparcTargetLowering::expandSelectCC(), llvm::X86InstrInfo::findCommutedOpIndices(), findCondCodeUsedByInstr(), llvm::MachineInstr::findInlineAsmFlagIdx(), llvm::MachineInstr::findTiedOperandIdx(), llvm::foldFrameOffset(), llvm::SystemZInstrInfo::FoldImmediate(), llvm::SIInstrInfo::FoldImmediate(), llvm::PPCInstrInfo::FoldImmediate(), llvm::ARMBaseInstrInfo::FoldImmediate(), foldImmediates(), llvm::SystemZInstrInfo::foldMemoryOperandImpl(), llvm::AArch64InstrInfo::genAlternativeCodeSequence(), genFusedMultiply(), llvm::getAddressFromInstr(), llvm::HexagonInstrInfo::getBaseAndOffset(), llvm::SystemZInstrInfo::getBranchInfo(), llvm::PatchPointOpers::getCallingConv(), llvm::HexagonInstrInfo::getCompoundCandidateGroup(), getDebugLocValue(), llvm::HexagonInstrInfo::getDuplexCandidateGroup(), llvm::TargetInstrInfo::getExtractSubregInputs(), llvm::ARMBaseRegisterInfo::getFrameIndexInstrOffset(), llvm::SystemZInstrInfo::getFusedCompare(), getHWReg(), llvm::StackMapOpers::getID(), llvm::PatchPointOpers::getID(), llvm::StatepointOpers::getID(), llvm::HexagonInstrInfo::getIncrementValue(), llvm::TargetInstrInfo::getInsertSubregInputs(), llvm::ARMBaseInstrInfo::getInsertSubregLikeInputs(), llvm::getInstrPredicate(), llvm::MipsInstrInfo::getInstSizeInBytes(), llvm::ARMBaseInstrInfo::getInstSizeInBytes(), llvm::NVPTXInstrInfo::getLdStCodeAddrSpace(), getLoadStoreOffsetSizeInBits(), llvm::SIInstrInfo::getMemOpBaseRegImmOfs(), llvm::X86InstrInfo::getMemOpBaseRegImmOfs(), llvm::LanaiInstrInfo::getMemOpBaseRegImmOfsWidth(), llvm::AArch64InstrInfo::getMemOpBaseRegImmOfsWidth(), getMemoryOpOffset(), llvm::SIRegisterInfo::getMUBUFInstrOffset(), llvm::SIInstrInfo::getNamedImmOperand(), llvm::PatchPointOpers::getNumCallArgs(), getNumMicroOpsSwiftLdSt(), llvm::StackMapOpers::getNumPatchBytes(), llvm::PatchPointOpers::getNumPatchBytes(), llvm::StatepointOpers::getNumPatchBytes(), llvm::SIInstrInfo::getNumWaitStates(), llvm::ARMBaseInstrInfo::getPredicate(), llvm::TargetInstrInfo::getRegSequenceInputs(), llvm::TargetInstrInfo::getSPAdjust(), llvm::X86InstrInfo::getSPAdjust(), getSrcFromCopy(), llvm::R600InstrInfo::getSrcs(), getStoreOffset(), getTruncatedShiftCount(), llvm::StatepointOpers::getVarIdx(), getWinAllocaAmount(), llvm::AArch64InstrInfo::hasExtendedReg(), llvm::hash_value(), HashMachineInstr(), llvm::SIInstrInfo::hasModifiersSet(), llvm::AArch64InstrInfo::hasShiftedReg(), llvm::HexagonLowerToMC(), INITIALIZE_PASS(), llvm::isAArch64FrameOffsetLegal(), llvm::AArch64InstrInfo::isAsCheapAsAMove(), llvm::AArch64InstrInfo::isCoalescableExtInstr(), isCompareZero(), llvm::HexagonInstrInfo::isConstExtended(), llvm::MachineInstr::isConvergent(), isCrossCopy(), llvm::PPCRegisterInfo::isFrameOffsetLegal(), llvm::AArch64InstrInfo::isGPRCopy(), llvm::AArch64InstrInfo::isGPRZero(), isGreaterThanNBitTFRI(), isIdenticalTo(), isIncrementOrDecrement(), llvm::SIInstrInfo::isInlineConstant(), isKImmOperand(), isKImmOrKUImmOperand(), isKUImmOperand(), isLdOffsetInRangeOfSt(), isLEASimpleIncOrDec(), llvm::LanaiInstrInfo::isLoadFromStackSlot(), llvm::HexagonInstrInfo::isLoadFromStackSlot(), llvm::AArch64InstrInfo::isLoadFromStackSlot(), llvm::SparcInstrInfo::isLoadFromStackSlot(), llvm::AVRInstrInfo::isLoadFromStackSlot(), llvm::PPCInstrInfo::isLoadFromStackSlot(), llvm::ARMBaseInstrInfo::isLoadFromStackSlot(), llvm::R600InstrInfo::isPredicable(), llvm::ARMBaseInstrInfo::isPredicated(), isRedundantFlagInstr(), isReverseInlineImm(), isSafeToFoldImmIntoCopy(), llvm::isScale(), llvm::AArch64InstrInfo::isScaledAddr(), isShift(), isSimpleBD12Move(), isSimpleMove(), llvm::SystemZInstrInfo::isStackSlotCopy(), llvm::LanaiInstrInfo::isStoreToStackSlot(), llvm::AArch64InstrInfo::isStoreToStackSlot(), llvm::HexagonInstrInfo::isStoreToStackSlot(), llvm::SparcInstrInfo::isStoreToStackSlot(), llvm::AVRInstrInfo::isStoreToStackSlot(), llvm::PPCInstrInfo::isStoreToStackSlot(), llvm::ARMBaseInstrInfo::isStoreToStackSlot(), isSuitableForMask(), llvm::ARMBaseInstrInfo::isSwiftFastImmShift(), isZeroImm(), llvm::MipsInstrInfo::isZeroImm(), llvm::SIInstrInfo::legalizeOperandsVOP2(), llvm::MSP430MCInstLower::Lower(), llvm::BPFMCInstLower::Lower(), llvm::LanaiMCInstLower::Lower(), llvm::WebAssemblyMCInstLower::Lower(), llvm::XCoreMCInstLower::LowerOperand(), llvm::MipsMCInstLower::LowerOperand(), llvm::SystemZMCInstLower::lowerOperand(), llvm::AMDGPUMCInstLower::lowerOperand(), llvm::AArch64MCInstLower::lowerOperand(), LowerOperand(), llvm::ARMAsmPrinter::lowerOperand(), llvm::LowerPPCMachineInstrToMCInst(), lowerRIEfLow(), lowerRIHigh(), lowerRILow(), lowerSubvectorLoad(), lowerSubvectorStore(), llvm::MachineInstr::mayLoad(), llvm::MachineInstr::mayStore(), llvm::SIInstrInfo::moveToVALU(), llvm::PPCRegisterInfo::needsFrameBaseReg(), llvm::LanaiInstrInfo::optimizeCompareInstr(), llvm::PPCInstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), llvm::AArch64InstrInfo::optimizeCondBranch(), llvm::LanaiInstrInfo::optimizeSelect(), llvm::ARMBaseInstrInfo::optimizeSelect(), parseCondBranch(), llvm::MIPrinter::print(), llvm::MachineInstr::print(), llvm::SystemZAsmPrinter::PrintAsmMemoryOperand(), llvm::AVRAsmPrinter::PrintAsmMemoryOperand(), llvm::HexagonAsmPrinter::PrintAsmMemoryOperand(), llvm::MipsAsmPrinter::PrintAsmMemoryOperand(), llvm::SystemZAsmPrinter::PrintAsmOperand(), llvm::AVRAsmPrinter::PrintAsmOperand(), llvm::ARMAsmPrinter::PrintAsmOperand(), llvm::X86AsmPrinter::PrintAsmOperand(), llvm::MipsAsmPrinter::PrintAsmOperand(), llvm::AsmPrinter::PrintAsmOperand(), llvm::MipsAsmPrinter::printFCCOperand(), printIntelMemReference(), printLeaMemReference(), llvm::AVRAsmPrinter::printOperand(), llvm::HexagonAsmPrinter::printOperand(), llvm::ARMAsmPrinter::printOperand(), llvm::MipsAsmPrinter::printOperand(), printOperand(), printPCRelImm(), llvm::StackMaps::recordStackMap(), llvm::HexagonInstrInfo::reduceLoopCount(), llvm::SIRegisterInfo::resolveFrameIndex(), llvm::PPCRegisterInfo::resolveFrameIndex(), llvm::WebAssemblyInstrInfo::reverseBranchCondition(), llvm::R600InstrInfo::reverseBranchCondition(), llvm::rewriteAArch64FrameIndex(), llvm::rewriteARMFrameIndex(), llvm::ThumbRegisterInfo::rewriteFrameIndex(), RewriteP2Align(), llvm::rewriteT2FrameIndex(), llvm::SelectionDAGISel::runOnMachineFunction(), llvm::AArch64InstrInfo::shouldClusterMemOps(), swapRegAndNonRegOperand(), llvm::SIInstrInfo::swapSourceModifiers(), switch(), tryConstantFoldOp(), tryOptimizeLEAtoMOV(), llvm::X86InstrInfo::unfoldMemoryOperand(), llvm::HexagonPacketizerList::useCalleesSP(), llvm::HexagonPacketizerList::useCallersSP(), and llvm::SIInstrInfo::verifyInstruction().
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Definition at line 440 of file MachineOperand.h.
References assert(), isCPI(), isFI(), isJTI(), and isTargetIndex().
Referenced by llvm::MachineInstrBuilder::addDisp(), llvm::ARMBaseInstrInfo::duplicate(), llvm::BPFRegisterInfo::eliminateFrameIndex(), llvm::MSP430RegisterInfo::eliminateFrameIndex(), llvm::SparcRegisterInfo::eliminateFrameIndex(), llvm::WebAssemblyRegisterInfo::eliminateFrameIndex(), llvm::LanaiRegisterInfo::eliminateFrameIndex(), llvm::AVRRegisterInfo::eliminateFrameIndex(), llvm::XCoreRegisterInfo::eliminateFrameIndex(), llvm::NVPTXRegisterInfo::eliminateFrameIndex(), llvm::HexagonRegisterInfo::eliminateFrameIndex(), llvm::ThumbRegisterInfo::eliminateFrameIndex(), llvm::MipsRegisterInfo::eliminateFrameIndex(), llvm::AArch64RegisterInfo::eliminateFrameIndex(), llvm::PPCRegisterInfo::eliminateFrameIndex(), llvm::X86RegisterInfo::eliminateFrameIndex(), llvm::ARMBaseRegisterInfo::eliminateFrameIndex(), emitDebugValueComment(), llvm::ARMAsmPrinter::EmitInstruction(), llvm::MipsAsmPrinter::EmitInstruction(), llvm::ARMAsmPrinter::EmitJumpTableAddrs(), llvm::ARMAsmPrinter::EmitJumpTableInsts(), llvm::ARMAsmPrinter::EmitJumpTableTBInst(), llvm::TargetLoweringBase::emitPatchPoint(), llvm::getAddressFromInstr(), getConstantFromPool(), llvm::MSP430MCInstLower::GetConstantPoolIndexSymbol(), llvm::LanaiMCInstLower::GetConstantPoolIndexSymbol(), llvm::SystemZMCInstLower::getExpr(), llvm::MSP430MCInstLower::GetJumpTableSymbol(), llvm::LanaiMCInstLower::GetJumpTableSymbol(), getStartOrEndSlot(), llvm::hash_value(), HashMachineInstr(), llvm::HexagonLowerToMC(), isIdenticalTo(), llvm::MipsSEInstrInfo::isLoadFromStackSlot(), llvm::LanaiInstrInfo::isLoadFromStackSlot(), llvm::XCoreInstrInfo::isLoadFromStackSlot(), llvm::HexagonInstrInfo::isLoadFromStackSlot(), llvm::AArch64InstrInfo::isLoadFromStackSlot(), llvm::SparcInstrInfo::isLoadFromStackSlot(), llvm::AVRInstrInfo::isLoadFromStackSlot(), llvm::PPCInstrInfo::isLoadFromStackSlot(), llvm::ARMBaseInstrInfo::isLoadFromStackSlot(), llvm::SIInstrInfo::isSGPRStackAccess(), isSimilarDispOp(), isSimpleMove(), llvm::SIInstrInfo::isStackAccess(), llvm::SystemZInstrInfo::isStackSlotCopy(), llvm::MipsSEInstrInfo::isStoreToStackSlot(), llvm::LanaiInstrInfo::isStoreToStackSlot(), llvm::XCoreInstrInfo::isStoreToStackSlot(), llvm::AArch64InstrInfo::isStoreToStackSlot(), llvm::HexagonInstrInfo::isStoreToStackSlot(), llvm::SparcInstrInfo::isStoreToStackSlot(), llvm::AVRInstrInfo::isStoreToStackSlot(), llvm::PPCInstrInfo::isStoreToStackSlot(), llvm::ARMBaseInstrInfo::isStoreToStackSlot(), llvm::AArch64MCInstLower::lowerOperand(), llvm::ARMAsmPrinter::lowerOperand(), llvm::LowerPPCMachineInstrToMCInst(), LowerSymbolOperand(), MatchingStackOffset(), llvm::MIPrinter::print(), llvm::HexagonAsmPrinter::printOperand(), llvm::ARMAsmPrinter::printOperand(), llvm::MipsAsmPrinter::printOperand(), printSymbolOperand(), llvm::ARMBaseInstrInfo::produceSameValue(), llvm::ARMBaseInstrInfo::reMaterialize(), and swapRegAndNonRegOperand().
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Definition at line 466 of file MachineOperand.h.
References assert(), and isIntrinsicID().
Referenced by llvm::hash_value(), isIdenticalTo(), and llvm::MIPrinter::print().
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Definition at line 435 of file MachineOperand.h.
References assert(), and isMBB().
Referenced by llvm::XCoreInstrInfo::analyzeBranch(), llvm::NVPTXInstrInfo::analyzeBranch(), llvm::SparcInstrInfo::analyzeBranch(), llvm::MipsInstrInfo::analyzeBranch(), llvm::HexagonInstrInfo::analyzeBranch(), llvm::R600InstrInfo::analyzeBranch(), llvm::PPCInstrInfo::analyzeBranch(), llvm::AArch64InstrInfo::analyzeBranch(), llvm::SystemZInstrInfo::analyzeBranch(), BBIsJumpedOver(), EmitGCCInlineAsmStr(), llvm::AMDGPUAsmPrinter::EmitInstruction(), llvm::ARMTargetLowering::EmitInstrWithCustomInserter(), llvm::HexagonEvaluator::evaluate(), findCorrespondingPred(), llvm::SIInstrInfo::getBranchDestBlock(), llvm::AArch64InstrInfo::getBranchDestBlock(), llvm::HexagonInstrInfo::getDotNewPredJumpOp(), llvm::SystemZMCInstLower::getExpr(), getInitPhiReg(), getLoopPhiReg(), getPHIDeps(), getPhiRegs(), llvm::getPHISrcRegOpIdx(), getTargetMBB(), llvm::hash_value(), HashMachineInstr(), llvm::HexagonLowerToMC(), INITIALIZE_PASS(), insertPHI(), isIdenticalTo(), isSimilarDispOp(), llvm::SIInstrInfo::legalizeOperands(), llvm::MSP430MCInstLower::Lower(), llvm::LanaiMCInstLower::Lower(), llvm::BPFMCInstLower::Lower(), llvm::AMDGPUMCInstLower::lowerOperand(), llvm::AArch64MCInstLower::lowerOperand(), llvm::ARMAsmPrinter::lowerOperand(), llvm::LowerPPCMachineInstrToMCInst(), LowerSymbolOperand(), llvm::rdf::operator<<(), llvm::AArch64InstrInfo::optimizeCondBranch(), parseCondBranch(), llvm::PPCInstrInfo::PredicateInstruction(), llvm::MIPrinter::print(), llvm::AVRAsmPrinter::printOperand(), llvm::HexagonAsmPrinter::printOperand(), llvm::ARMAsmPrinter::printOperand(), llvm::MipsAsmPrinter::printOperand(), llvm::HexagonInstrInfo::reduceLoopCount(), removePhis(), llvm::RegBankSelect::RepairingPlacement::RepairingPlacement(), llvm::AArch64InstructionSelector::select(), llvm::MachineBasicBlock::transferSuccessorsAndUpdatePHIs(), and llvm::LegalizerHelper::widenScalar().
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Definition at line 456 of file MachineOperand.h.
References assert(), and isMCSymbol().
Referenced by llvm::AsmPrinter::emitFrameAlloc(), llvm::hash_value(), isIdenticalTo(), isSimilarDispOp(), llvm::AArch64MCInstLower::lowerOperand(), and llvm::MIPrinter::print().
Definition at line 519 of file MachineOperand.h.
References assert(), and isMetadata().
Referenced by llvm::MachineInstr::emitError(), llvm::hash_value(), isIdenticalTo(), llvm::MIPrinter::print(), and llvm::MachineInstr::print().
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Return the offset from the symbol in this operand.
This always returns 0 for ExternalSymbol operands.
Definition at line 478 of file MachineOperand.h.
References assert(), isBlockAddress(), isCPI(), isGlobal(), isMCSymbol(), isSymbol(), and isTargetIndex().
Referenced by llvm::MachineInstrBuilder::addDisp(), llvm::X86RegisterInfo::eliminateFrameIndex(), llvm::HexagonInstrInfo::getDuplexCandidateGroup(), llvm::SystemZMCInstLower::getExpr(), GetSymbolRef(), llvm::hash_value(), HashMachineInstr(), isIdenticalTo(), llvm::WebAssemblyMCInstLower::Lower(), llvm::AMDGPUMCInstLower::lowerOperand(), llvm::AVRMCInstLower::lowerSymbolOperand(), llvm::MSP430MCInstLower::LowerSymbolOperand(), llvm::BPFMCInstLower::LowerSymbolOperand(), llvm::LanaiMCInstLower::LowerSymbolOperand(), llvm::AArch64MCInstLower::lowerSymbolOperandDarwin(), llvm::AArch64MCInstLower::lowerSymbolOperandELF(), llvm::MIPrinter::print(), llvm::HexagonAsmPrinter::printOperand(), llvm::ARMAsmPrinter::printOperand(), llvm::MipsAsmPrinter::printOperand(), printSymbolOperand(), llvm::ARMBaseInstrInfo::produceSameValue(), and llvm::AArch64InstructionSelector::select().
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getParent - Return the instruction that this operand belongs to.
Definition at line 214 of file MachineOperand.h.
Referenced by llvm::MachineOperandIteratorBase::analyzeVirtReg(), ChangeToRegister(), createDeadDef(), llvm::MachineInstr::emitError(), llvm::MachineInstr::eraseFromBundle(), llvm::MachineInstr::eraseFromParent(), llvm::MachineInstr::eraseFromParentAndMarkDBGValuesForRemoval(), findUseBetween(), getLoadStoreOffsetSizeInBits(), llvm::MachineInstr::getRegClassConstraint(), GetSymbolRef(), llvm::MachineInstr::isDereferenceableInvariantLoad(), llvm::SIInstrInfo::isInlineConstant(), isKilled(), isKImmOperand(), isKUImmOperand(), isNoReturnDef(), llvm::AMDGPUMCInstLower::lowerOperand(), llvm::MachineInstr::mergeMemRefsWith(), MoveForSingleUse(), OneUseDominatesOtherUses(), llvm::MIPrinter::print(), llvm::MachineInstr::print(), llvm::MIPrinter::printTargetFlags(), RematerializeCheapDef(), llvm::MachineInstr::removeFromBundle(), llvm::MachineInstr::removeFromParent(), ReplaceDominatedUses(), replaceRegUsesAfterLoop(), llvm::MachineSSAUpdater::RewriteUse(), setIsDef(), setReg(), llvm::TailDuplicator::tailDuplicateAndUpdate(), llvm::FastISel::tryToFoldLoad(), UpdatePredRedefs(), and llvm::MachineRegisterInfo::verifyUseList().
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Definition at line 215 of file MachineOperand.h.
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Definition at line 471 of file MachineOperand.h.
References assert(), and isPredicate().
Referenced by llvm::hash_value(), isIdenticalTo(), llvm::MIPrinter::print(), llvm::AArch64InstructionSelector::select(), and llvm::LegalizerHelper::widenScalar().
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getReg - Returns the register number.
Definition at line 277 of file MachineOperand.h.
References assert(), and isReg().
Referenced by addExclusiveRegPair(), addLiveInRegs(), llvm::ScheduleDAGInstrs::addPhysRegDataDeps(), llvm::ScheduleDAGInstrs::addPhysRegDeps(), llvm::MachineInstr::addRegisterDead(), llvm::MachineInstr::addRegisterDefined(), llvm::MachineInstr::addRegisterKilled(), llvm::MachineRegisterInfo::addRegOperandToUseList(), llvm::HexagonPacketizerList::addToPacket(), llvm::ScheduleDAGInstrs::addVRegDefDeps(), llvm::ScheduleDAGInstrs::addVRegUseDeps(), llvm::SITargetLowering::AdjustInstrPostInstrSelection(), llvm::ARMTargetLowering::AdjustInstrPostInstrSelection(), llvm::HexagonSubtarget::adjustSchedDependency(), llvm::LanaiInstrInfo::analyzeCompare(), llvm::SystemZInstrInfo::analyzeCompare(), llvm::AArch64InstrInfo::analyzeCompare(), llvm::ARMBaseInstrInfo::analyzeCompare(), llvm::PPCInstrInfo::analyzeCompare(), llvm::HexagonInstrInfo::analyzeCompare(), llvm::X86InstrInfo::analyzeCompare(), llvm::MachineOperandIteratorBase::analyzePhysReg(), llvm::MachineOperandIteratorBase::analyzeVirtReg(), llvm::RegisterBankInfo::applyDefaultMapping(), biasPhysRegCopy(), llvm::CriticalAntiDepBreaker::BreakAntiDependencies(), llvm::ARMBaseInstrInfo::breakPartialRegDependency(), llvm::X86InstrInfo::breakPartialRegDependency(), buildMUBUFOffsetLoadStore(), llvm::ScheduleDAGInstrs::buildSchedGraph(), llvm::R600InstrInfo::buildSlotOfVectorInstruction(), canCombine(), canCompareBeNewValueJump(), llvm::HexagonInstrInfo::canExecuteInBundle(), canFoldCopy(), canFoldIntoCSel(), canFoldIntoMOVCC(), canFoldIntoSelect(), llvm::HexagonPacketizerList::canPromoteToDotCur(), llvm::HexagonPacketizerList::canPromoteToNewValueStore(), llvm::X86InstrInfo::classifyLEAReg(), llvm::HexagonPacketizerList::cleanUpDotCur(), llvm::MachineInstr::clearRegisterDeads(), llvm::MachineInstr::clearRegisterKills(), clobbersCTR(), collectDebugValues(), CombineCVTAToLocal(), llvm::Legalizer::combineExtracts(), llvm::WebAssemblyInstrInfo::commuteInstructionImpl(), llvm::PPCInstrInfo::commuteInstructionImpl(), llvm::TargetInstrInfo::commuteInstructionImpl(), llvm::X86InstrInfo::commuteInstructionImpl(), compareMachineOp(), llvm::TargetSchedModel::computeOutputLatency(), llvm::InstructionSelector::constrainSelectedInstRegOperands(), ConvertImplicitDefToConstZero(), llvm::ARMBaseInstrInfo::convertToThreeAddress(), llvm::SystemZInstrInfo::convertToThreeAddress(), llvm::X86InstrInfo::convertToThreeAddress(), copyHint(), llvm::SSAUpdaterTraits< MachineSSAUpdater >::CreateEmptyPHI(), llvm::ARMBaseInstrInfo::DefinesPredicate(), llvm::HexagonInstrInfo::DefinesPredicate(), llvm::PPCInstrInfo::DefinesPredicate(), llvm::BPFRegisterInfo::eliminateFrameIndex(), llvm::MSP430RegisterInfo::eliminateFrameIndex(), llvm::SparcRegisterInfo::eliminateFrameIndex(), llvm::WebAssemblyRegisterInfo::eliminateFrameIndex(), llvm::LanaiRegisterInfo::eliminateFrameIndex(), llvm::AVRRegisterInfo::eliminateFrameIndex(), llvm::XCoreRegisterInfo::eliminateFrameIndex(), llvm::ThumbRegisterInfo::eliminateFrameIndex(), llvm::SIRegisterInfo::eliminateFrameIndex(), llvm::PPCRegisterInfo::eliminateFrameIndex(), llvm::ARMBaseRegisterInfo::eliminateFrameIndex(), llvm::PPCTargetLowering::EmitAtomicBinary(), emitDebugValueComment(), llvm::SparcTargetLowering::emitEHSjLjLongJmp(), llvm::PPCTargetLowering::emitEHSjLjLongJmp(), llvm::SparcTargetLowering::emitEHSjLjSetJmp(), llvm::PPCTargetLowering::emitEHSjLjSetJmp(), llvm::AArch64TargetLowering::EmitF128CSEL(), llvm::AsmPrinter::emitImplicitDef(), emitIndirectDst(), emitIndirectSrc(), llvm::SystemZAsmPrinter::EmitInstruction(), llvm::ARMAsmPrinter::EmitInstruction(), llvm::X86AsmPrinter::EmitInstruction(), llvm::R600TargetLowering::EmitInstrWithCustomInserter(), llvm::BPFTargetLowering::EmitInstrWithCustomInserter(), llvm::AVRTargetLowering::EmitInstrWithCustomInserter(), llvm::XCoreTargetLowering::EmitInstrWithCustomInserter(), llvm::MSP430TargetLowering::EmitInstrWithCustomInserter(), llvm::SITargetLowering::EmitInstrWithCustomInserter(), llvm::ARMTargetLowering::EmitInstrWithCustomInserter(), llvm::PPCTargetLowering::EmitInstrWithCustomInserter(), llvm::X86TargetLowering::EmitInstrWithCustomInserter(), emitKill(), emitLoadM0FromVGPRLoop(), emitMonitor(), llvm::PPCTargetLowering::EmitPartwordAtomicBinary(), emitPCMPSTRI(), emitPCMPSTRM(), emitRDPKRU(), llvm::MSP430TargetLowering::EmitShiftInstr(), emitWRPKRU(), emitXBegin(), eraseGPOpnd(), eraseIfDead(), Expand2AddrUndef(), expandLoadStackGuard(), expandMOV32r1(), ExpandMOVImmSExti8(), expandNOVLXLoad(), expandNOVLXStore(), llvm::SIInstrInfo::expandPostRAPseudo(), llvm::ARMBaseInstrInfo::expandPostRAPseudo(), llvm::HexagonInstrInfo::expandPostRAPseudo(), llvm::R600InstrInfo::expandPostRAPseudo(), llvm::AArch64InstrInfo::expandPostRAPseudo(), llvm::SystemZInstrInfo::expandPostRAPseudo(), llvm::PPCInstrInfo::expandPostRAPseudo(), llvm::X86InstrInfo::expandPostRAPseudo(), llvm::SparcTargetLowering::expandSelectCC(), llvm::LegalizerHelper::fewerElementsVector(), findDeadCallerSavedReg(), llvm::MachineInstr::findRegisterDefOperandIdx(), llvm::MachineInstr::findRegisterUseOperandIdx(), FindStartOfTree(), finishConvertToThreeAddress(), llvm::fixStackStores(), fixupCalleeSaveRestoreStackOffset(), llvm::ScheduleDAGInstrs::fixupKills(), llvm::foldFrameOffset(), llvm::SystemZInstrInfo::FoldImmediate(), llvm::SIInstrInfo::FoldImmediate(), llvm::PPCInstrInfo::FoldImmediate(), llvm::ARMBaseInstrInfo::FoldImmediate(), foldImmediates(), llvm::TargetInstrInfo::foldMemoryOperand(), llvm::AArch64InstrInfo::foldMemoryOperandImpl(), llvm::SystemZInstrInfo::foldMemoryOperandImpl(), llvm::X86InstrInfo::foldMemoryOperandImpl(), foldPatchpoint(), foldVGPRCopyIntoRegSequence(), for(), forceReg(), llvm::TargetInstrInfo::genAlternativeCodeSequence(), genFusedMultiply(), genMaddR(), llvm::LegalizerInfo::getAction(), llvm::getAddressFromInstr(), getBaseAddressRegister(), llvm::HexagonInstrInfo::getBaseAndOffset(), getCallTargetRegOpnd(), getCompareSourceReg(), llvm::HexagonInstrInfo::getCompoundCandidateGroup(), llvm::HexagonInstrInfo::getCompoundOpcode(), getCopyRegClasses(), getDataDeps(), getDebugLocValue(), llvm::HexagonInstrInfo::getDuplexCandidateGroup(), llvm::TargetInstrInfo::getExtractSubregInputs(), llvm::ARMBaseInstrInfo::getExtractSubregLikeInputs(), getFPReg(), llvm::SystemZInstrInfo::getFusedCompare(), llvm::MachineInstrExpressionTrait::getHashValue(), llvm::HexagonHazardRecognizer::getHazardType(), getImmOrMaterializedImm(), getInitPhiReg(), llvm::TargetInstrInfo::getInsertSubregInputs(), llvm::ARMBaseInstrInfo::getInsertSubregLikeInputs(), llvm::AArch64RegisterBankInfo::getInstrAlternativeMappings(), llvm::AArch64RegisterBankInfo::getInstrMapping(), llvm::RegisterBankInfo::getInstrMappingImpl(), llvm::getInstrPredicate(), getInstrVecReg(), llvm::ScheduleDAGInstrs::getLaneMaskForMO(), getLoopPhiReg(), llvm::SIInstrInfo::getMemOpBaseRegImmOfs(), llvm::X86InstrInfo::getMemOpBaseRegImmOfs(), llvm::LanaiInstrInfo::getMemOpBaseRegImmOfsWidth(), llvm::AArch64InstrInfo::getMemOpBaseRegImmOfsWidth(), getNumMicroOpsSwiftLdSt(), llvm::PPCInstrInfo::getOperandLatency(), llvm::ARMBaseInstrInfo::getOperandLatency(), llvm::SIInstrInfo::getOpRegClass(), llvm::ARMBaseInstrInfo::getPartialRegUpdateClearance(), llvm::X86InstrInfo::getPartialRegUpdateClearance(), getPHIDeps(), getPhiRegs(), llvm::SSAUpdaterTraits< MachineSSAUpdater >::GetPHIValue(), llvm::LEONMachineFunctionPass::GetRegIndexForOperand(), llvm::rdf::RefNode::getRegRef(), llvm::TargetInstrInfo::getRegSequenceInputs(), llvm::ARMBaseInstrInfo::getRegSequenceLikeInputs(), getShuffleComment(), getSrcFromCopy(), llvm::R600InstrInfo::getSrcs(), getTypeToPrint(), llvm::X86InstrInfo::getUndefRegClearance(), llvm::SSAUpdaterTraits< MachineSSAUpdater >::GetUndefVal(), llvm::MachineSSAUpdater::GetValueInMiddleOfBlock(), getWinAllocaAmount(), HandleVRSaveUpdate(), llvm::hash_value(), HashMachineInstr(), llvm::X86InstrInfo::hasLiveCondCodeDef(), hasRAWHazard(), llvm::X86InstrInfo::hasReassociableOperands(), llvm::TargetInstrInfo::hasReassociableOperands(), llvm::TargetInstrInfo::hasReassociableSibling(), llvm::MachineInstr::hasRegisterImplicitUseOperand(), hasVGPROperands(), llvm::HexagonLowerToMC(), INITIALIZE_PASS(), llvm::HexagonInstrInfo::insertBranch(), insertDivByZeroTrap(), llvm::rdf::CopyPropagation::interpretAsCopy(), llvm::AArch64InstrInfo::isAsCheapAsAMove(), llvm::HexagonPacketizerList::isCallDependent(), isCandidateStore(), llvm::AArch64InstrInfo::isCandidateToMergeOrPair(), llvm::WebAssembly::isChild(), llvm::AArch64InstrInfo::isCoalescableExtInstr(), llvm::PPCInstrInfo::isCoalescableExtInstr(), llvm::X86InstrInfo::isCoalescableExtInstr(), llvm::MachineInstr::isConstantValuePHI(), isCopyFromExec(), isCopyToExec(), isCopyToReg(), llvm::IsCPSRDead< MachineInstr >(), isCrossCopy(), isCSRestore(), isDependent(), isDescribedByReg(), llvm::rdf::TargetOperandInfo::isFixedReg(), llvm::AArch64InstrInfo::isFPRCopy(), isFullCopyOf(), llvm::AArch64InstrInfo::isGPRCopy(), llvm::AArch64InstrInfo::isGPRZero(), isIdenticalOp(), isIdenticalTo(), llvm::MachineInstr::isIdenticalTo(), llvm::MachineInstr::isIdentityCopy(), isIncrementOrDecrement(), isLEASimpleIncOrDec(), llvm::SIInstrInfo::isLegalRegOperand(), llvm::HexagonPacketizerList::isLegalToPacketizeTogether(), llvm::MipsSEInstrInfo::isLoadFromStackSlot(), llvm::LanaiInstrInfo::isLoadFromStackSlot(), llvm::XCoreInstrInfo::isLoadFromStackSlot(), llvm::HexagonInstrInfo::isLoadFromStackSlot(), llvm::AArch64InstrInfo::isLoadFromStackSlot(), llvm::SparcInstrInfo::isLoadFromStackSlot(), llvm::AVRInstrInfo::isLoadFromStackSlot(), llvm::PPCInstrInfo::isLoadFromStackSlot(), llvm::ARMBaseInstrInfo::isLoadFromStackSlot(), llvm::X86InstrInfo::isLoadFromStackSlot(), isLocalCopy(), llvm::NVPTXInstrInfo::isMoveInstr(), isNonFoldablePartialRegisterLoad(), isOperandKill(), llvm::SIInstrInfo::isOperandLegal(), isPhysicalRegCopy(), llvm::R600InstrInfo::isPredicated(), isPromotableZeroStoreInst(), llvm::X86InstrInfo::isReallyTriviallyReMaterializable(), isRedundantFlagInstr(), isRematerializable(), IsSafeAndProfitableToMove(), llvm::X86InstrInfo::isSafeToClobberEFLAGS(), isSecondInstructionInSequence(), llvm::SIInstrInfo::isSGPRStackAccess(), isShift(), isSimpleBD12Move(), isSimpleIndexCalc(), isSimpleMove(), isSourceDefinedByImplicitDef(), llvm::SIInstrInfo::isStackAccess(), llvm::MipsSEInstrInfo::isStoreToStackSlot(), llvm::LanaiInstrInfo::isStoreToStackSlot(), llvm::XCoreInstrInfo::isStoreToStackSlot(), llvm::AArch64InstrInfo::isStoreToStackSlot(), llvm::HexagonInstrInfo::isStoreToStackSlot(), llvm::SparcInstrInfo::isStoreToStackSlot(), llvm::AVRInstrInfo::isStoreToStackSlot(), llvm::PPCInstrInfo::isStoreToStackSlot(), llvm::ARMBaseInstrInfo::isStoreToStackSlot(), llvm::X86InstrInfo::isStoreToStackSlot(), isSubRegOf(), isSuitableForMask(), llvm::HexagonInstrInfo::isToBeScheduledASAP(), isTwoAddrUse(), isVGPR(), llvm::SIInstrInfo::isVGPRCopy(), llvm::SIInstrInfo::legalizeGenericOperand(), llvm::SIInstrInfo::legalizeOperands(), llvm::SIInstrInfo::legalizeOperandsSMRD(), llvm::SIInstrInfo::legalizeOperandsVOP2(), llvm::SIInstrInfo::legalizeOperandsVOP3(), llvm::LegalizerHelper::libcall(), llvm::Mips16InstrInfo::loadImmediate(), loadM0FromVGPR(), llvm::MSP430MCInstLower::Lower(), llvm::BPFMCInstLower::Lower(), llvm::LanaiMCInstLower::Lower(), llvm::WebAssemblyMCInstLower::Lower(), llvm::LegalizerHelper::lower(), llvm::AArch64CallLowering::lowerCall(), llvm::PPCRegisterInfo::lowerCRBitRestore(), llvm::PPCRegisterInfo::lowerCRBitSpilling(), llvm::PPCRegisterInfo::lowerCRRestore(), llvm::PPCRegisterInfo::lowerCRSpilling(), llvm::PPCRegisterInfo::lowerDynamicAlloc(), llvm::PPCRegisterInfo::lowerDynamicAreaOffset(), llvm::XCoreMCInstLower::LowerOperand(), llvm::MipsMCInstLower::LowerOperand(), llvm::SystemZMCInstLower::lowerOperand(), llvm::AMDGPUMCInstLower::lowerOperand(), llvm::AArch64MCInstLower::lowerOperand(), LowerOperand(), llvm::ARMAsmPrinter::lowerOperand(), llvm::LowerPPCMachineInstrToMCInst(), lowerRIEfLow(), lowerRIHigh(), lowerRILow(), lowerSubvectorLoad(), lowerSubvectorStore(), llvm::PPCRegisterInfo::lowerVRSAVERestore(), llvm::PPCRegisterInfo::lowerVRSAVESpilling(), MaybeRewriteToFallthrough(), MIIsInTerminatorSequence(), llvm::MachineRegisterInfo::moveOperands(), llvm::SIInstrInfo::moveToVALU(), llvm::LegalizerHelper::narrowScalar(), OneUseDominatesOtherUses(), optimizeCall(), llvm::LanaiInstrInfo::optimizeCompareInstr(), llvm::AArch64InstrInfo::optimizeCompareInstr(), llvm::PPCInstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), llvm::X86InstrInfo::optimizeCompareInstr(), llvm::AArch64InstrInfo::optimizeCondBranch(), llvm::X86InstrInfo::optimizeLoadInstr(), llvm::LanaiInstrInfo::optimizeSelect(), llvm::ARMBaseInstrInfo::optimizeSelect(), parseOperands(), phiHasBreakDef(), phiHasVGPROperands(), llvm::HexagonInstrInfo::predCanBeUsedAsDotNew(), llvm::MIPrinter::print(), print(), llvm::MachineInstr::print(), llvm::SystemZAsmPrinter::PrintAsmMemoryOperand(), llvm::AVRAsmPrinter::PrintAsmMemoryOperand(), llvm::ARMAsmPrinter::PrintAsmMemoryOperand(), printAsmMRegister(), llvm::AVRAsmPrinter::PrintAsmOperand(), llvm::HexagonAsmPrinter::PrintAsmOperand(), llvm::ARMAsmPrinter::PrintAsmOperand(), llvm::MipsAsmPrinter::PrintAsmOperand(), llvm::AMDGPUAsmPrinter::PrintAsmOperand(), printIntelMemReference(), printLeaMemReference(), printMemReference(), llvm::AVRAsmPrinter::printOperand(), llvm::HexagonAsmPrinter::printOperand(), llvm::ARMAsmPrinter::printOperand(), llvm::MipsAsmPrinter::printOperand(), printOperand(), llvm::ARMBaseInstrInfo::produceSameValue(), llvm::MachineInstr::readsWritesVirtualRegister(), llvm::TargetInstrInfo::reassociateOps(), llvm::HexagonInstrInfo::reduceLoopCount(), llvm::ARMBaseInstrInfo::reMaterialize(), llvm::X86InstrInfo::reMaterialize(), llvm::TargetInstrInfo::reMaterialize(), removeCopies(), removeIPMBasedCompare(), removeKillInfo(), llvm::MachineRegisterInfo::removeRegOperandFromUseList(), llvm::LiveVariables::removeVirtualRegisterDead(), llvm::LiveVariables::removeVirtualRegisterKilled(), llvm::LiveVariables::removeVirtualRegistersKilled(), llvm::RegBankSelect::RepairingPlacement::RepairingPlacement(), llvm::PPCFrameLowering::replaceFPWithRealFP(), resultTests(), llvm::R600InstrInfo::reverseBranchCondition(), llvm::rewriteAArch64FrameIndex(), llvm::ThumbRegisterInfo::rewriteFrameIndex(), llvm::rewriteT2FrameIndex(), llvm::FixFSMULD::runOnMachineFunction(), llvm::SelectionDAGISel::runOnMachineFunction(), llvm::ReplaceFMULS::runOnMachineFunction(), llvm::ThumbRegisterInfo::saveScavengerRegister(), llvm::R600SchedStrategy::schedNode(), llvm::AArch64InstructionSelector::select(), selectCopy(), llvm::FastISel::selectIntrinsicCall(), llvm::ARMBaseInstrInfo::setExecutionDomain(), setM0ToIndexFromSGPR(), llvm::MachineInstr::setPhysRegsDeadExcept(), setReg(), llvm::MachineInstr::setRegisterDefReadUndef(), llvm::X86InstrInfo::setSpecialOperandAttr(), llvm::SIInstrInfo::shouldClusterMemOps(), llvm::MachineBasicBlock::SplitCriticalEdge(), llvm::MachineInstr::substituteRegister(), swapRegAndNonRegOperand(), switch(), llvm::TailDuplicator::tailDuplicateAndUpdate(), llvm::ScheduleDAGInstrs::toggleKillFlag(), TrackDefUses(), tryConstantFoldOp(), llvm::tryFoldSPUpdateIntoPushPop(), tryOptimizeLEAtoMOV(), tryOrrMovk(), trySequenceOfOnes(), tryToreplicateChunks(), llvm::X86InstrInfo::unfoldMemoryOperand(), unsupportedBinOp(), UpdateCPSRDef(), UpdateCPSRUse(), llvm::AntiDepBreaker::UpdateDbgValue(), updateOperand(), UpdateOperandRegClass(), updatePhysDepsDownwards(), updatePhysDepsUpwards(), UpdatePredRedefs(), UseReg(), llvm::SIInstrInfo::usesConstantBus(), llvm::RegisterBankInfo::InstructionMapping::verify(), llvm::SIInstrInfo::verifyInstruction(), VerifyLowRegs(), llvm::MachineRegisterInfo::verifyUseList(), and llvm::LegalizerHelper::widenScalar().
getRegLiveOut - Returns a bit mask of live-out registers.
Definition at line 514 of file MachineOperand.h.
References assert(), and isRegLiveOut().
Referenced by llvm::MIPrinter::print().
getRegMask - Returns a bit mask of registers preserved by this RegMask operand.
Definition at line 508 of file MachineOperand.h.
References assert(), and isRegMask().
Referenced by clobbersPhysReg(), llvm::ScheduleDAGInstrs::fixupKills(), llvm::hash_value(), isIdenticalTo(), llvm::SystemZInstrInfo::PredicateInstruction(), and llvm::MIPrinter::print().
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Definition at line 282 of file MachineOperand.h.
References assert(), and isReg().
Referenced by llvm::MachineInstr::addRegisterDefined(), llvm::ScheduleDAGInstrs::addVRegDefDeps(), canFoldCopy(), llvm::PPCInstrInfo::commuteInstructionImpl(), llvm::TargetInstrInfo::commuteInstructionImpl(), llvm::SystemZInstrInfo::convertToThreeAddress(), copyHint(), emitLoadM0FromVGPRLoop(), llvm::HexagonEvaluator::evaluate(), findUseBetween(), llvm::SIInstrInfo::FoldImmediate(), llvm::TargetInstrInfo::foldMemoryOperand(), llvm::AArch64InstrInfo::foldMemoryOperandImpl(), llvm::X86InstrInfo::foldMemoryOperandImpl(), foldPatchpoint(), foldVGPRCopyIntoRegSequence(), llvm::TargetInstrInfo::getExtractSubregInputs(), llvm::ARMBaseInstrInfo::getExtractSubregLikeInputs(), getImmOrMaterializedImm(), llvm::TargetInstrInfo::getInsertSubregInputs(), llvm::ARMBaseInstrInfo::getInsertSubregLikeInputs(), llvm::ScheduleDAGInstrs::getLaneMaskForMO(), llvm::ARMBaseInstrInfo::getPartialRegUpdateClearance(), llvm::MachineInstr::getRegClassConstraintEffect(), llvm::rdf::RefNode::getRegRef(), llvm::TargetInstrInfo::getRegSequenceInputs(), llvm::ARMBaseInstrInfo::getRegSequenceLikeInputs(), getSrcFromCopy(), llvm::hash_value(), INITIALIZE_PASS(), llvm::rdf::CopyPropagation::interpretAsCopy(), llvm::X86InstrInfo::isCoalescableExtInstr(), isCrossCopy(), llvm::rdf::TargetOperandInfo::isFixedReg(), llvm::MachineInstr::isFullCopy(), isIdenticalTo(), llvm::MachineInstr::isIdentityCopy(), llvm::SIInstrInfo::isLegalRegOperand(), llvm::AArch64InstrInfo::isLoadFromStackSlot(), llvm::ARMBaseInstrInfo::isLoadFromStackSlot(), llvm::X86InstrInfo::isLoadFromStackSlot(), llvm::SIInstrInfo::isOperandLegal(), isSafeToFoldImmIntoCopy(), llvm::AArch64InstrInfo::isStoreToStackSlot(), llvm::ARMBaseInstrInfo::isStoreToStackSlot(), llvm::X86InstrInfo::isStoreToStackSlot(), isSubRegOf(), llvm::SIInstrInfo::legalizeGenericOperand(), llvm::SIInstrInfo::legalizeOperandsVOP2(), llvm::ARMAsmPrinter::lowerOperand(), llvm::LowerPPCMachineInstrToMCInst(), llvm::PPCInstrInfo::optimizeCompareInstr(), llvm::X86InstrInfo::optimizeLoadInstr(), llvm::MIPrinter::print(), print(), llvm::ARMAsmPrinter::printOperand(), readsReg(), llvm::MachineInstr::readsWritesVirtualRegister(), llvm::MachineInstr::setRegisterDefReadUndef(), llvm::TailDuplicator::shouldTailDuplicate(), substPhysReg(), substVirtReg(), swapRegAndNonRegOperand(), and updateOperand().
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Definition at line 486 of file MachineOperand.h.
References assert(), and isSymbol().
Referenced by llvm::SystemZMCInstLower::getExpr(), llvm::MSP430MCInstLower::GetExternalSymbolSymbol(), llvm::LanaiMCInstLower::GetExternalSymbolSymbol(), llvm::AArch64MCInstLower::GetExternalSymbolSymbol(), llvm::AArch64InstrInfo::getInstSizeInBytes(), llvm::MSP430InstrInfo::getInstSizeInBytes(), llvm::AVRInstrInfo::getInstSizeInBytes(), llvm::MipsInstrInfo::getInstSizeInBytes(), llvm::ARMBaseInstrInfo::getInstSizeInBytes(), llvm::SystemZInstrInfo::getInstSizeInBytes(), llvm::PPCInstrInfo::getInstSizeInBytes(), llvm::SIInstrInfo::getInstSizeInBytes(), llvm::HexagonInstrInfo::getSize(), GetSymbolFromOperand(), llvm::hash_value(), llvm::HexagonLowerToMC(), isIdenticalTo(), isSimilarDispOp(), llvm::AMDGPUMCInstLower::lowerOperand(), llvm::ARMAsmPrinter::lowerOperand(), LowerSymbolOperand(), llvm::AArch64MCInstLower::lowerSymbolOperandELF(), llvm::rdf::operator<<(), optimizeCall(), llvm::MIPrinter::print(), and llvm::AVRAsmPrinter::printOperand().
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Definition at line 197 of file MachineOperand.h.
References isReg().
Referenced by llvm::MachineInstrBuilder::addDisp(), canDefBePartOfLOH(), llvm::ARMAsmPrinter::EmitInstruction(), llvm::X86AsmPrinter::EmitInstruction(), llvm::SIInstrInfo::expandPostRAPseudo(), llvm::X86InstrInfo::foldMemoryOperandImpl(), llvm::MSP430MCInstLower::GetBlockAddressSymbol(), llvm::MSP430MCInstLower::GetConstantPoolIndexSymbol(), llvm::MSP430MCInstLower::GetExternalSymbolSymbol(), llvm::MSP430MCInstLower::GetGlobalAddressSymbol(), llvm::MSP430MCInstLower::GetJumpTableSymbol(), GetSymbolFromOperand(), GetSymbolRef(), handleMiddleInst(), handleUse(), llvm::hash_value(), llvm::HexagonLowerToMC(), isCandidateLoad(), llvm::HexagonInstrInfo::isConstExtended(), isIdenticalTo(), llvm::WebAssemblyMCInstLower::Lower(), llvm::SystemZMCInstLower::lowerOperand(), llvm::AMDGPUMCInstLower::lowerOperand(), llvm::ARMAsmPrinter::lowerOperand(), LowerSymbolOperand(), llvm::AVRMCInstLower::lowerSymbolOperand(), llvm::MSP430MCInstLower::LowerSymbolOperand(), llvm::LanaiMCInstLower::LowerSymbolOperand(), llvm::AArch64MCInstLower::lowerSymbolOperandDarwin(), llvm::AArch64MCInstLower::lowerSymbolOperandELF(), llvm::ARMAsmPrinter::printOperand(), llvm::MipsAsmPrinter::printOperand(), printSymbolOperand(), llvm::MIPrinter::printTargetFlags(), and switch().
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getType - Returns the MachineOperandType for this operand.
Definition at line 195 of file MachineOperand.h.
Referenced by llvm::MachineInstrBuilder::addDisp(), canDefBePartOfLOH(), compareMachineOp(), llvm::SystemZMCInstLower::getExpr(), llvm::hash_value(), HashMachineInstr(), llvm::HexagonLowerToMC(), INITIALIZE_PASS(), IsAnAddressOperand(), isIdenticalTo(), llvm::SIInstrInfo::isLiteralConstantLike(), llvm::MSP430MCInstLower::Lower(), llvm::BPFMCInstLower::Lower(), llvm::LanaiMCInstLower::Lower(), llvm::WebAssemblyMCInstLower::Lower(), llvm::XCoreMCInstLower::LowerOperand(), llvm::MipsMCInstLower::LowerOperand(), llvm::SystemZMCInstLower::lowerOperand(), llvm::AMDGPUMCInstLower::lowerOperand(), llvm::AArch64MCInstLower::lowerOperand(), LowerOperand(), llvm::ARMAsmPrinter::lowerOperand(), llvm::LowerPPCMachineInstrToMCInst(), LowerSymbolOperand(), llvm::MIPrinter::print(), print(), llvm::X86AsmPrinter::PrintAsmOperand(), llvm::MipsAsmPrinter::PrintAsmOperand(), llvm::AsmPrinter::PrintAsmOperand(), printLeaMemReference(), llvm::AVRAsmPrinter::printOperand(), llvm::HexagonAsmPrinter::printOperand(), llvm::ARMAsmPrinter::printOperand(), llvm::MipsAsmPrinter::printOperand(), printOperand(), printPCRelImm(), and printSymbolOperand().
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isBlockAddress - Tests if this is a MO_BlockAddress operand.
Definition at line 261 of file MachineOperand.h.
References MO_BlockAddress.
Referenced by llvm::HexagonEvaluator::evaluate(), getBlockAddress(), getOffset(), llvm::HexagonInstrInfo::isConstExtended(), isSimilarDispOp(), isValidDispOp(), and setOffset().
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Definition at line 269 of file MachineOperand.h.
References MO_CFIIndex.
Referenced by getCFIIndex().
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isCImm - Test if this is a MO_CImmediate operand.
Definition at line 243 of file MachineOperand.h.
References MO_CImmediate.
Referenced by emitDebugValueComment(), getCImm(), and getDebugLocValue().
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isCPI - Tests if this is a MO_ConstantPoolIndex operand.
Definition at line 251 of file MachineOperand.h.
References MO_ConstantPoolIndex.
Referenced by canFoldIntoMOVCC(), canFoldIntoSelect(), llvm::HexagonEvaluator::evaluate(), getConstantFromPool(), getIndex(), getOffset(), llvm::HexagonInstrInfo::isConstExtended(), llvm::isLeaMem(), isSimilarDispOp(), isValidDispOp(), setIndex(), and setOffset().
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Definition at line 302 of file MachineOperand.h.
References assert(), and isReg().
Referenced by addExclusiveRegPair(), llvm::ScheduleDAGInstrs::addPhysRegDeps(), llvm::MachineInstr::addRegisterDead(), llvm::ScheduleDAGInstrs::addVRegDefDeps(), llvm::ARMTargetLowering::AdjustInstrPostInstrSelection(), llvm::MachineInstr::allDefsAreDead(), llvm::MachineOperandIteratorBase::analyzePhysReg(), canFoldIntoMOVCC(), canFoldIntoSelect(), ChangeToRegister(), llvm::PPCInstrInfo::commuteInstructionImpl(), llvm::ARMBaseInstrInfo::convertToThreeAddress(), llvm::X86InstrInfo::convertToThreeAddress(), CreateReg(), llvm::ARMBaseInstrInfo::expandPostRAPseudo(), llvm::MachineInstr::findRegisterDefOperandIdx(), llvm::ARMBaseInstrInfo::FoldImmediate(), llvm::getRegState(), llvm::X86InstrInfo::hasLiveCondCodeDef(), llvm::X86InstrInfo::hasReassociableOperands(), llvm::IsCPSRDead< MachineInstr >(), llvm::MachineInstr::isIdenticalTo(), isLoadAndTestAsCmp(), llvm::X86InstrInfo::isSafeToClobberEFLAGS(), MoveAndTeeForMultiUse(), llvm::MIPrinter::print(), print(), llvm::X86InstrInfo::setSpecialOperandAttr(), swapRegAndNonRegOperand(), tryOrrMovk(), trySequenceOfOnes(), tryToreplicateChunks(), UpdateCPSRDef(), updatePhysDepsDownwards(), and UpdatePredRedefs().
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Definition at line 332 of file MachineOperand.h.
References assert(), and isReg().
Referenced by llvm::MachineInstr::addRegisterKilled(), ChangeToRegister(), CreateReg(), llvm::getRegState(), llvm::MIPrinter::print(), setIsDef(), setIsKill(), and swapRegAndNonRegOperand().
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Definition at line 292 of file MachineOperand.h.
References assert(), and isReg().
Referenced by addLiveInRegs(), llvm::ScheduleDAGInstrs::addPhysRegDataDeps(), llvm::ScheduleDAGInstrs::addPhysRegDeps(), llvm::MachineInstr::addRegisterDead(), llvm::MachineInstr::addRegisterDefined(), llvm::MachineRegisterInfo::addRegOperandToUseList(), llvm::ARMTargetLowering::AdjustInstrPostInstrSelection(), llvm::MachineOperandIteratorBase::analyzePhysReg(), llvm::MachineOperandIteratorBase::analyzeVirtReg(), llvm::CriticalAntiDepBreaker::BreakAntiDependencies(), llvm::ScheduleDAGInstrs::buildSchedGraph(), llvm::HexagonInstrInfo::canExecuteInBundle(), canFoldIntoMOVCC(), canFoldIntoSelect(), ChangeToRegister(), llvm::MachineInstr::clearRegisterDeads(), clobbersCTR(), llvm::Legalizer::combineExtracts(), llvm::ARMBaseInstrInfo::convertToThreeAddress(), CreateReg(), llvm::ARMBaseInstrInfo::DefinesPredicate(), llvm::HexagonInstrInfo::DefinesPredicate(), llvm::PPCInstrInfo::DefinesPredicate(), emitKill(), llvm::HexagonEvaluator::evaluate(), findDeadCallerSavedReg(), findDefIdx(), llvm::MachineInstr::findRegisterDefOperandIdx(), findUseIdx(), llvm::ScheduleDAGInstrs::fixupKills(), llvm::TargetInstrInfo::foldMemoryOperand(), llvm::X86InstrInfo::foldMemoryOperandImpl(), for(), llvm::MachineInstrExpressionTrait::getHashValue(), llvm::PPCInstrInfo::getInstrLatency(), getInstrVecReg(), llvm::getRegState(), llvm::HexagonInstrInfo::getSize(), llvm::hash_value(), llvm::X86InstrInfo::hasLiveCondCodeDef(), llvm::WebAssembly::isChild(), llvm::rdf::TargetOperandInfo::isFixedReg(), isIdenticalTo(), llvm::MachineInstr::isIdenticalTo(), llvm::MachineInstr::isRegTiedToUseOperand(), IsSafeAndProfitableToMove(), llvm::X86InstrInfo::isSafeToClobberEFLAGS(), llvm::Mips16InstrInfo::loadImmediate(), MIIsInTerminatorSequence(), llvm::SIInstrInfo::moveToVALU(), llvm::LanaiInstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), llvm::X86InstrInfo::optimizeCompareInstr(), llvm::X86InstrInfo::optimizeLoadInstr(), parseOperands(), llvm::PatchPointOpers::PatchPointOpers(), llvm::HexagonInstrInfo::predCanBeUsedAsDotNew(), llvm::HexagonInstrInfo::PredicateInstruction(), llvm::MIPrinter::print(), print(), llvm::MachineInstr::print(), printImplicitRegisterFlag(), llvm::LiveVariables::removeVirtualRegisterDead(), llvm::RegBankSelect::RepairingPlacement::RepairingPlacement(), resultTests(), llvm::MachineInstr::setPhysRegsDeadExcept(), llvm::MachineInstr::setRegisterDefReadUndef(), substPhysReg(), llvm::MachineInstr::tieOperands(), UpdateCPSRUse(), updatePhysDepsDownwards(), and updatePhysDepsUpwards().
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Definition at line 322 of file MachineOperand.h.
References assert(), and isReg().
Referenced by createDeadDef(), CreateReg(), dumpMachineInstrRangeWithSlotIndex(), llvm::MIPrinter::print(), and print().
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isFI - Tests if this is a MO_FrameIndex operand.
Definition at line 249 of file MachineOperand.h.
References MO_FrameIndex.
Referenced by canFoldIntoMOVCC(), canFoldIntoSelect(), llvm::BPFRegisterInfo::eliminateFrameIndex(), emitDebugValueComment(), llvm::TargetLoweringBase::emitPatchPoint(), getFrameIndexOperandNum(), getIndex(), isCSRestore(), llvm::PPCRegisterInfo::isFrameOffsetLegal(), llvm::ARMBaseRegisterInfo::isFrameOffsetLegal(), llvm::SIInstrInfo::isImmOperandLegal(), llvm::isLeaMem(), llvm::SIInstrInfo::isLegalVSrcOperand(), llvm::MipsSEInstrInfo::isLoadFromStackSlot(), llvm::LanaiInstrInfo::isLoadFromStackSlot(), llvm::XCoreInstrInfo::isLoadFromStackSlot(), llvm::HexagonInstrInfo::isLoadFromStackSlot(), llvm::AArch64InstrInfo::isLoadFromStackSlot(), llvm::SparcInstrInfo::isLoadFromStackSlot(), llvm::AVRInstrInfo::isLoadFromStackSlot(), llvm::PPCInstrInfo::isLoadFromStackSlot(), llvm::ARMBaseInstrInfo::isLoadFromStackSlot(), llvm::isMem(), llvm::SIInstrInfo::isOperandLegal(), llvm::SIInstrInfo::isSGPRStackAccess(), isSimpleMove(), llvm::SIInstrInfo::isStackAccess(), llvm::SystemZInstrInfo::isStackSlotCopy(), llvm::MipsSEInstrInfo::isStoreToStackSlot(), llvm::LanaiInstrInfo::isStoreToStackSlot(), llvm::XCoreInstrInfo::isStoreToStackSlot(), llvm::AArch64InstrInfo::isStoreToStackSlot(), llvm::HexagonInstrInfo::isStoreToStackSlot(), llvm::SparcInstrInfo::isStoreToStackSlot(), llvm::AVRInstrInfo::isStoreToStackSlot(), llvm::PPCInstrInfo::isStoreToStackSlot(), llvm::ARMBaseInstrInfo::isStoreToStackSlot(), MatchingStackOffset(), llvm::AArch64RegisterInfo::needsFrameBaseReg(), llvm::ARMBaseRegisterInfo::needsFrameBaseReg(), llvm::ThumbRegisterInfo::resolveFrameIndex(), llvm::SIRegisterInfo::resolveFrameIndex(), llvm::AArch64RegisterInfo::resolveFrameIndex(), llvm::PPCRegisterInfo::resolveFrameIndex(), llvm::ARMBaseRegisterInfo::resolveFrameIndex(), llvm::SelectionDAGISel::runOnMachineFunction(), setIndex(), swapRegAndNonRegOperand(), UpdateOperandRegClass(), and llvm::SIInstrInfo::verifyInstruction().
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isFPImm - Tests if this is a MO_FPImmediate operand.
Definition at line 245 of file MachineOperand.h.
References MO_FPImmediate.
Referenced by llvm::DwarfUnit::addConstantFPValue(), emitDebugValueComment(), llvm::SIInstrInfo::expandPostRAPseudo(), getDebugLocValue(), getFPImm(), llvm::HexagonInstrInfo::isConstExtended(), setFPImm(), and llvm::SIInstrInfo::verifyInstruction().
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isGlobal - Tests if this is a MO_GlobalAddress operand.
Definition at line 257 of file MachineOperand.h.
References MO_GlobalAddress.
Referenced by llvm::X86FrameLowering::adjustForHiPEPrologue(), llvm::EHStreamer::callToNoUnwindFunction(), llvm::HexagonEvaluator::evaluate(), llvm::getAddressFromInstr(), llvm::HexagonInstrInfo::getDuplexCandidateGroup(), getGlobal(), getOffset(), llvm::R600InstrInfo::getSrcs(), GetSymbolFromOperand(), llvm::HexagonInstrInfo::isConstExtended(), llvm::isLeaMem(), llvm::X86InstrInfo::isReallyTriviallyReMaterializable(), isSimilarDispOp(), isValidDispOp(), llvm::AArch64MCInstLower::lowerSymbolOperandELF(), llvm::rdf::operator<<(), QueryCallee(), llvm::DetectRoundChange::runOnMachineFunction(), and setOffset().
| bool MachineOperand::isIdenticalTo | ( | const MachineOperand & | Other | ) | const |
Returns true if this operand is identical to the specified operand except for liveness related flags (isKill, isUndef and isDead).
isIdenticalTo - Return true if this operand is identical to the specified operand.
Note that this should stay in sync with the hash_value overload below.
Definition at line 232 of file MachineInstr.cpp.
References getBlockAddress(), getCFIIndex(), getCImm(), getFPImm(), getGlobal(), getImm(), getIndex(), getIntrinsicID(), getMBB(), getMCSymbol(), getMetadata(), getOffset(), getPredicate(), getReg(), getRegMask(), getSubReg(), getSymbolName(), getTargetFlags(), getType(), isDef(), llvm_unreachable, MO_BlockAddress, MO_CFIIndex, MO_CImmediate, MO_ConstantPoolIndex, MO_ExternalSymbol, MO_FPImmediate, MO_FrameIndex, MO_GlobalAddress, MO_Immediate, MO_IntrinsicID, MO_JumpTableIndex, MO_MachineBasicBlock, MO_MCSymbol, MO_Metadata, MO_Predicate, MO_Register, MO_RegisterLiveOut, MO_RegisterMask, MO_TargetIndex, and fuzzer::strcmp.
Referenced by isIdenticalOp(), llvm::MachineInstr::isIdenticalTo(), isImplicitOperandIn(), and llvm::ARMBaseInstrInfo::produceSameValue().
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isImm - Tests if this is a MO_Immediate operand.
Definition at line 241 of file MachineOperand.h.
References MO_Immediate.
Referenced by llvm::DwarfUnit::addConstantValue(), llvm::SystemZInstrInfo::analyzeCompare(), llvm::X86InstrInfo::analyzeCompare(), areCombinableOperations(), llvm::R600InstrInfo::buildSlotOfVectorInstruction(), canFoldIntoCSel(), llvm::X86RegisterInfo::eliminateFrameIndex(), emitDebugValueComment(), llvm::PPCFrameLowering::emitEpilogue(), llvm::HexagonEvaluator::evaluate(), llvm::SIInstrInfo::expandPostRAPseudo(), llvm::MachineInstr::findInlineAsmFlagIdx(), llvm::MachineInstr::findTiedOperandIdx(), llvm::SIInstrInfo::FoldImmediate(), llvm::PPCInstrInfo::FoldImmediate(), llvm::ARMBaseInstrInfo::FoldImmediate(), foldImmediates(), llvm::AArch64InstrInfo::genAlternativeCodeSequence(), llvm::HexagonInstrInfo::getBaseAndOffsetPosition(), llvm::HexagonInstrInfo::getCompoundCandidateGroup(), getDebugLocValue(), llvm::HexagonInstrInfo::getDuplexCandidateGroup(), llvm::TargetInstrInfo::getExtractSubregInputs(), llvm::R600InstrInfo::getFlagOp(), getImm(), getImmOrMaterializedImm(), llvm::TargetInstrInfo::getInsertSubregInputs(), llvm::X86InstrInfo::getMemOpBaseRegImmOfs(), llvm::LanaiInstrInfo::getMemOpBaseRegImmOfsWidth(), llvm::AArch64InstrInfo::getMemOpBaseRegImmOfsWidth(), llvm::TargetInstrInfo::getRegSequenceInputs(), llvm::R600InstrInfo::getSrcs(), getStoreOffset(), getWinAllocaAmount(), llvm::AArch64InstrInfo::hasExtendedReg(), llvm::AArch64InstrInfo::hasShiftedReg(), llvm::HexagonInstrInfo::immediateExtend(), INITIALIZE_PASS(), llvm::AArch64InstrInfo::isCandidateToMergeOrPair(), isCompareZero(), llvm::HexagonInstrInfo::isConstExtended(), llvm::AArch64InstrInfo::isGPRZero(), isGreaterThanNBitTFRI(), llvm::SIInstrInfo::isImmOperandLegal(), llvm::MachineInstr::isIndirectDebugValue(), llvm::SIInstrInfo::isInlineConstant(), llvm::isLeaMem(), isLEASimpleIncOrDec(), llvm::SIInstrInfo::isLegalVSrcOperand(), llvm::SIInstrInfo::isLiteralConstant(), llvm::MipsSEInstrInfo::isLoadFromStackSlot(), llvm::LanaiInstrInfo::isLoadFromStackSlot(), llvm::XCoreInstrInfo::isLoadFromStackSlot(), llvm::HexagonInstrInfo::isLoadFromStackSlot(), llvm::AArch64InstrInfo::isLoadFromStackSlot(), llvm::SparcInstrInfo::isLoadFromStackSlot(), llvm::AVRInstrInfo::isLoadFromStackSlot(), llvm::PPCInstrInfo::isLoadFromStackSlot(), llvm::ARMBaseInstrInfo::isLoadFromStackSlot(), llvm::SIInstrInfo::isOperandLegal(), llvm::X86InstrInfo::isReallyTriviallyReMaterializable(), isSafeToFoldImmIntoCopy(), llvm::isScale(), isSimilarDispOp(), llvm::MipsSEInstrInfo::isStoreToStackSlot(), llvm::LanaiInstrInfo::isStoreToStackSlot(), llvm::XCoreInstrInfo::isStoreToStackSlot(), llvm::AArch64InstrInfo::isStoreToStackSlot(), llvm::HexagonInstrInfo::isStoreToStackSlot(), llvm::SparcInstrInfo::isStoreToStackSlot(), llvm::AVRInstrInfo::isStoreToStackSlot(), llvm::PPCInstrInfo::isStoreToStackSlot(), llvm::ARMBaseInstrInfo::isStoreToStackSlot(), isValidDispOp(), isZeroImm(), llvm::MipsInstrInfo::isZeroImm(), llvm::SIInstrInfo::legalizeOperandsVOP2(), llvm::SIInstrInfo::moveToVALU(), llvm::TargetInstrInfo::PredicateInstruction(), llvm::MachineInstr::print(), llvm::HexagonAsmPrinter::PrintAsmMemoryOperand(), llvm::MipsAsmPrinter::PrintAsmMemoryOperand(), llvm::SystemZAsmPrinter::PrintAsmOperand(), llvm::HexagonAsmPrinter::PrintAsmOperand(), llvm::ARMAsmPrinter::PrintAsmOperand(), llvm::X86AsmPrinter::PrintAsmOperand(), llvm::MipsAsmPrinter::PrintAsmOperand(), printIntelMemReference(), setImm(), llvm::R600InstrInfo::setImmOperand(), shrinkScalarCompare(), swapRegAndNonRegOperand(), switch(), tryAddToFoldList(), tryConstantFoldOp(), llvm::SIInstrInfo::usesConstantBus(), and llvm::SIInstrInfo::verifyInstruction().
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Definition at line 297 of file MachineOperand.h.
References assert(), and isReg().
Referenced by llvm::MachineInstr::addRegisterDead(), llvm::MachineInstr::addRegisterKilled(), llvm::AggressiveAntiDepBreaker::BreakAntiDependencies(), llvm::TargetSchedModel::computeOperandLatency(), copyExtraImplicitOps(), llvm::MachineInstr::copyImplicitOps(), emitPCMPSTRI(), emitPCMPSTRM(), llvm::PPCInstrInfo::getInstrLatency(), llvm::MachineInstr::getNumExplicitOperands(), llvm::getRegState(), llvm::MachineInstr::hasRegisterImplicitUseOperand(), llvm::HexagonLowerToMC(), llvm::WebAssembly::isChild(), llvm::rdf::TargetOperandInfo::isClobbering(), llvm::SystemZMCInstLower::lower(), llvm::MSP430MCInstLower::Lower(), llvm::LanaiMCInstLower::Lower(), llvm::BPFMCInstLower::Lower(), llvm::WebAssemblyMCInstLower::Lower(), llvm::XCoreMCInstLower::LowerOperand(), llvm::MipsMCInstLower::LowerOperand(), llvm::AArch64MCInstLower::lowerOperand(), LowerOperand(), llvm::ARMAsmPrinter::lowerOperand(), llvm::PatchPointOpers::PatchPointOpers(), llvm::HexagonInstrInfo::predCanBeUsedAsDotNew(), llvm::HexagonInstrInfo::PredicateInstruction(), llvm::MIPrinter::print(), print(), llvm::MachineInstr::print(), printImplicitRegisterFlag(), llvm::X86InstrInfo::unfoldMemoryOperand(), llvm::SIInstrInfo::usesConstantBus(), and VerifyLowRegs().
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Definition at line 317 of file MachineOperand.h.
References assert(), and isReg().
Referenced by llvm::TargetInstrInfo::commuteInstructionImpl(), CreateReg(), llvm::getRegState(), INITIALIZE_PASS(), llvm::MIPrinter::print(), print(), and readsReg().
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Definition at line 270 of file MachineOperand.h.
References MO_IntrinsicID.
Referenced by getIntrinsicID().
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isJTI - Tests if this is a MO_JumpTableIndex operand.
Definition at line 255 of file MachineOperand.h.
References MO_JumpTableIndex.
Referenced by canFoldIntoMOVCC(), canFoldIntoSelect(), llvm::HexagonEvaluator::evaluate(), getIndex(), GetSymbolRef(), llvm::HexagonInstrInfo::isConstExtended(), llvm::isLeaMem(), isSimilarDispOp(), isValidDispOp(), llvm::AVRMCInstLower::lowerSymbolOperand(), llvm::MSP430MCInstLower::LowerSymbolOperand(), llvm::LanaiMCInstLower::LowerSymbolOperand(), llvm::BPFMCInstLower::LowerSymbolOperand(), llvm::AArch64MCInstLower::lowerSymbolOperandDarwin(), llvm::AArch64MCInstLower::lowerSymbolOperandELF(), and setIndex().
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Definition at line 307 of file MachineOperand.h.
References assert(), and isReg().
Referenced by llvm::MachineInstr::addRegisterKilled(), llvm::MachineOperandIteratorBase::analyzePhysReg(), ChangeToRegister(), llvm::X86InstrInfo::classifyLEAReg(), llvm::MachineInstr::clearRegisterKills(), llvm::PPCInstrInfo::commuteInstructionImpl(), llvm::TargetInstrInfo::commuteInstructionImpl(), llvm::ARMBaseInstrInfo::convertToThreeAddress(), llvm::SystemZInstrInfo::convertToThreeAddress(), llvm::X86InstrInfo::convertToThreeAddress(), copyFlagsToImplicitVCC(), CreateReg(), llvm::SIRegisterInfo::eliminateFrameIndex(), llvm::AArch64TargetLowering::EmitF128CSEL(), llvm::ARMAsmPrinter::EmitInstruction(), llvm::ARMTargetLowering::EmitInstrWithCustomInserter(), llvm::HexagonInstrInfo::expandPostRAPseudo(), llvm::ARMBaseInstrInfo::expandPostRAPseudo(), llvm::MachineInstr::findRegisterUseOperandIdx(), finishConvertToThreeAddress(), llvm::fixStackStores(), llvm::ScheduleDAGInstrs::fixupKills(), llvm::SIInstrInfo::FoldImmediate(), llvm::ARMBaseInstrInfo::FoldImmediate(), llvm::TargetInstrInfo::foldMemoryOperand(), llvm::AArch64InstrInfo::foldMemoryOperandImpl(), genFusedMultiply(), genMaddR(), llvm::getRegState(), insertDivByZeroTrap(), InsertFPConstInst(), InsertFPImmInst(), InsertSPConstInst(), InsertSPImmInst(), llvm::MachineInstr::isIdenticalTo(), isOperandKill(), llvm::X86InstrInfo::isSafeToClobberEFLAGS(), llvm::SIInstrInfo::legalizeOperandsVOP2(), llvm::PPCRegisterInfo::lowerCRBitSpilling(), llvm::PPCRegisterInfo::lowerCRSpilling(), llvm::PPCRegisterInfo::lowerDynamicAlloc(), llvm::PPCRegisterInfo::lowerVRSAVESpilling(), llvm::MIPrinter::print(), print(), llvm::TargetInstrInfo::reassociateOps(), removeKillInfo(), llvm::LiveVariables::removeVirtualRegisterKilled(), llvm::LiveVariables::removeVirtualRegistersKilled(), swapRegAndNonRegOperand(), llvm::ScheduleDAGInstrs::toggleKillFlag(), tryOptimizeLEAtoMOV(), UpdateCPSRUse(), and updatePhysDepsDownwards().
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isMBB - Tests if this is a MO_MachineBasicBlock operand.
Definition at line 247 of file MachineOperand.h.
References MO_MachineBasicBlock.
Referenced by llvm::HexagonInstrInfo::analyzeBranch(), llvm::PPCInstrInfo::analyzeBranch(), llvm::SystemZInstrInfo::analyzeBranch(), getMBB(), getTargetMBB(), llvm::HexagonInstrInfo::immediateExtend(), llvm::HexagonInstrInfo::invertAndChangeJumpTarget(), llvm::HexagonInstrInfo::isConstExtended(), isSimilarDispOp(), isValidDispOp(), llvm::rdf::operator<<(), llvm::TargetInstrInfo::PredicateInstruction(), llvm::SystemZInstrInfo::removeBranch(), and setMBB().
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Definition at line 268 of file MachineOperand.h.
References MO_MCSymbol.
Referenced by getMCSymbol(), getOffset(), isSimilarDispOp(), isValidDispOp(), and setOffset().
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isMetadata - Tests if this is a MO_Metadata operand.
Definition at line 267 of file MachineOperand.h.
References MO_Metadata.
Referenced by llvm::MachineInstr::emitError(), EmitGCCInlineAsmStr(), EmitMSInlineAsmStr(), getMetadata(), and llvm::MachineInstr::print().
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Definition at line 271 of file MachineOperand.h.
References MO_Predicate.
Referenced by getPredicate().
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isReg - Tests if this is a MO_Register operand.
Definition at line 239 of file MachineOperand.h.
References MO_Register.
Referenced by addLiveInRegs(), llvm::MachineInstr::addRegisterDead(), llvm::MachineInstr::addRegisterDefined(), llvm::MachineInstr::addRegisterKilled(), addTargetFlag(), llvm::ARMTargetLowering::AdjustInstrPostInstrSelection(), llvm::HexagonSubtarget::adjustSchedDependency(), llvm::MachineInstr::allDefsAreDead(), llvm::SystemZInstrInfo::analyzeCompare(), llvm::MachineOperandIteratorBase::analyzePhysReg(), llvm::MachineOperandIteratorBase::analyzeVirtReg(), llvm::RegisterBankInfo::applyDefaultMapping(), llvm::CriticalAntiDepBreaker::BreakAntiDependencies(), llvm::ScheduleDAGInstrs::buildSchedGraph(), canCombine(), llvm::HexagonInstrInfo::canExecuteInBundle(), canFoldIntoMOVCC(), canFoldIntoSelect(), llvm::HexagonPacketizerList::canPromoteToNewValueStore(), ChangeToES(), ChangeToFPImmediate(), ChangeToFrameIndex(), ChangeToImmediate(), ChangeToMCSymbol(), ChangeToRegister(), llvm::MachineInstr::clearKillInfo(), llvm::MachineInstr::clearRegisterDeads(), llvm::MachineInstr::clearRegisterKills(), clobbersCTR(), collectDebugValues(), llvm::Legalizer::combineExtracts(), llvm::SIInstrInfo::commuteInstructionImpl(), llvm::TargetInstrInfo::commuteInstructionImpl(), llvm::InstructionSelector::constrainSelectedInstRegOperands(), llvm::ARMBaseInstrInfo::convertToThreeAddress(), copyExtraImplicitOps(), llvm::MachineInstr::copyImplicitOps(), llvm::ARMBaseInstrInfo::DefinesPredicate(), llvm::HexagonInstrInfo::DefinesPredicate(), llvm::PPCInstrInfo::DefinesPredicate(), earlyUseOperand(), llvm::WebAssemblyRegisterInfo::eliminateFrameIndex(), emitDebugValueComment(), emitIndirectDst(), emitKill(), emitPCMPSTRI(), emitPCMPSTRM(), eraseGPOpnd(), llvm::HexagonEvaluator::evaluate(), llvm::SIInstrInfo::expandPostRAPseudo(), llvm::X86InstrInfo::findCommutedOpIndices(), llvm::TargetInstrInfo::findCommutedOpIndices(), findDeadCallerSavedReg(), findDefIdx(), llvm::MachineInstr::findRegisterDefOperandIdx(), llvm::MachineInstr::findRegisterUseOperandIdx(), llvm::MachineInstr::findTiedOperandIdx(), findUseIdx(), finishConvertToThreeAddress(), llvm::ScheduleDAGInstrs::fixupKills(), llvm::SIInstrInfo::FoldImmediate(), llvm::PPCInstrInfo::FoldImmediate(), foldImmediates(), llvm::X86InstrInfo::foldMemoryOperandImpl(), for(), forceReg(), FuseInst(), llvm::getAddressFromInstr(), getBaseAddressRegister(), llvm::HexagonInstrInfo::getBaseAndOffsetPosition(), getCallTargetRegOpnd(), getDataDeps(), getDebugLocValue(), getFMAPatterns(), getFPReg(), llvm::MachineInstrExpressionTrait::getHashValue(), llvm::HexagonHazardRecognizer::getHazardType(), getImmOrMaterializedImm(), llvm::PPCInstrInfo::getInstrLatency(), llvm::AArch64RegisterBankInfo::getInstrMapping(), llvm::RegisterBankInfo::getInstrMappingImpl(), getInstrVecReg(), getMaddPatterns(), llvm::SIInstrInfo::getMemOpBaseRegImmOfs(), llvm::X86InstrInfo::getMemOpBaseRegImmOfs(), llvm::LanaiInstrInfo::getMemOpBaseRegImmOfsWidth(), llvm::AArch64InstrInfo::getMemOpBaseRegImmOfsWidth(), llvm::MachineInstr::getNumExplicitOperands(), getPostIncrementOperand(), getReg(), llvm::MachineInstr::getRegClassConstraint(), llvm::MachineInstr::getRegClassConstraintEffect(), llvm::LEONMachineFunctionPass::GetRegIndexForOperand(), llvm::getRegState(), getShuffleComment(), llvm::HexagonInstrInfo::getSize(), getSubReg(), getTargetFlags(), getTypeToPrint(), llvm::SIInstrInfo::getVALUOp(), getWinAllocaAmount(), HandleVRSaveUpdate(), llvm::X86InstrInfo::hasLiveCondCodeDef(), llvm::X86InstrInfo::hasReassociableOperands(), llvm::TargetInstrInfo::hasReassociableOperands(), llvm::MachineInstr::hasRegisterImplicitUseOperand(), hasVGPROperands(), INITIALIZE_PASS(), llvm::HexagonPacketizerList::isCallDependent(), llvm::AArch64InstrInfo::isCandidateToMergeOrPair(), llvm::WebAssembly::isChild(), isCopyFromExec(), isCopyToExec(), llvm::IsCPSRDead< MachineInstr >(), isDead(), isDebug(), isDef(), isDependent(), isDescribedByReg(), isEarlyClobber(), llvm::AArch64InstrInfo::isFPRCopy(), isIdenticalOp(), llvm::MachineInstr::isIdenticalTo(), isImplicit(), llvm::MachineInstr::isIndirectDebugValue(), isInternalRead(), isKill(), llvm::isLeaMem(), llvm::SIInstrInfo::isLegalRegOperand(), llvm::HexagonPacketizerList::isLegalToPacketizeTogether(), llvm::SIInstrInfo::isLegalVSrcOperand(), llvm::ARMBaseInstrInfo::isLoadFromStackSlot(), llvm::isMem(), isMemoryOp(), llvm::NVPTXInstrInfo::isMoveInstr(), llvm::SIInstrInfo::isOperandLegal(), llvm::X86InstrInfo::isReallyTriviallyReMaterializable(), llvm::MachineInstr::isRegTiedToDefOperand(), llvm::MachineInstr::isRegTiedToUseOperand(), IsSafeAndProfitableToMove(), llvm::X86InstrInfo::isSafeToClobberEFLAGS(), llvm::ARMBaseInstrInfo::isStoreToStackSlot(), isTied(), llvm::HexagonInstrInfo::isToBeScheduledASAP(), isTwoAddrUse(), isUndef(), isUse(), isVGPR(), llvm::SIInstrInfo::legalizeOperands(), llvm::SIInstrInfo::legalizeOperandsVOP2(), llvm::SIInstrInfo::legalizeOperandsVOP3(), llvm::SIInstrInfo::legalizeOpWithMove(), llvm::Mips16InstrInfo::loadImmediate(), llvm::SystemZMCInstLower::lower(), llvm::AArch64CallLowering::lowerCall(), mergeOperations(), MIIsInTerminatorSequence(), llvm::MachineRegisterInfo::moveOperands(), llvm::SIInstrInfo::moveToVALU(), OneUseDominatesOtherUses(), llvm::LanaiInstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), llvm::X86InstrInfo::optimizeCompareInstr(), llvm::X86InstrInfo::optimizeLoadInstr(), parseOperands(), llvm::HexagonInstrInfo::predCanBeUsedAsDotNew(), llvm::HexagonInstrInfo::PredicateInstruction(), llvm::TargetInstrInfo::PredicateInstruction(), llvm::MIPrinter::print(), llvm::MachineInstr::print(), llvm::AVRAsmPrinter::PrintAsmMemoryOperand(), llvm::HexagonAsmPrinter::PrintAsmMemoryOperand(), llvm::ARMAsmPrinter::PrintAsmMemoryOperand(), llvm::AVRAsmPrinter::PrintAsmOperand(), llvm::HexagonAsmPrinter::PrintAsmOperand(), llvm::ARMAsmPrinter::PrintAsmOperand(), llvm::X86AsmPrinter::PrintAsmOperand(), llvm::MipsAsmPrinter::PrintAsmOperand(), readsReg(), llvm::MachineInstr::readsWritesVirtualRegister(), removeKillInfo(), llvm::MachineInstr::RemoveOperand(), llvm::LiveVariables::removeVirtualRegisterDead(), llvm::LiveVariables::removeVirtualRegisterKilled(), llvm::LiveVariables::removeVirtualRegistersKilled(), llvm::RegBankSelect::RepairingPlacement::RepairingPlacement(), llvm::PPCFrameLowering::replaceFPWithRealFP(), resultTests(), llvm::ThumbRegisterInfo::saveScavengerRegister(), llvm::R600SchedStrategy::schedNode(), llvm::AArch64InstructionSelector::select(), llvm::FastISel::selectIntrinsicCall(), setImplicit(), setIsDead(), setIsDebug(), setIsDef(), setIsEarlyClobber(), setIsInternalRead(), setIsKill(), setIsUndef(), llvm::MachineInstr::setPhysRegsDeadExcept(), llvm::MachineInstr::setRegisterDefReadUndef(), llvm::X86InstrInfo::setSpecialOperandAttr(), setSubReg(), setTargetFlags(), shrinkScalarCompare(), llvm::MachineInstr::substituteRegister(), switch(), TrackDefUses(), tryAddToFoldList(), llvm::tryFoldSPUpdateIntoPushPop(), llvm::X86InstrInfo::unfoldMemoryOperand(), llvm::MachineInstr::untieRegOperand(), UpdateCPSRDef(), UpdateCPSRUse(), llvm::AntiDepBreaker::UpdateDbgValue(), updateOperand(), UpdateOperandRegClass(), updatePhysDepsDownwards(), updatePhysDepsUpwards(), UpdatePredRedefs(), UseReg(), llvm::SIInstrInfo::usesConstantBus(), llvm::RegisterBankInfo::InstructionMapping::verify(), llvm::SIInstrInfo::verifyInstruction(), VerifyLowRegs(), and llvm::MachineRegisterInfo::verifyUseList().
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isRegLiveOut - Tests if this is a MO_RegisterLiveOut operand.
Definition at line 265 of file MachineOperand.h.
References MO_RegisterLiveOut.
Referenced by getRegLiveOut().
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isRegMask - Tests if this is a MO_RegisterMask operand.
Definition at line 263 of file MachineOperand.h.
References MO_RegisterMask.
Referenced by llvm::MachineOperandIteratorBase::analyzePhysReg(), clobbersCTR(), copyExtraImplicitOps(), llvm::MachineInstr::copyImplicitOps(), llvm::ARMBaseInstrInfo::DefinesPredicate(), llvm::PPCInstrInfo::DefinesPredicate(), llvm::MachineInstr::findRegisterDefOperandIdx(), llvm::ScheduleDAGInstrs::fixupKills(), getRegMask(), llvm::X86InstrInfo::isSafeToClobberEFLAGS(), llvm::LanaiInstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), llvm::ThumbRegisterInfo::saveScavengerRegister(), llvm::MachineInstr::setPhysRegsDeadExcept(), setRegMask(), and UpdatePredRedefs().
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isSymbol - Tests if this is a MO_ExternalSymbol operand.
Definition at line 259 of file MachineOperand.h.
References MO_ExternalSymbol.
Referenced by llvm::HexagonEvaluator::evaluate(), getOffset(), llvm::HexagonInstrInfo::getSize(), GetSymbolFromOperand(), getSymbolName(), llvm::HexagonInstrInfo::isConstExtended(), isSimilarDispOp(), isValidDispOp(), llvm::AArch64MCInstLower::lowerSymbolOperandELF(), llvm::rdf::operator<<(), optimizeCall(), and setOffset().
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isTargetIndex - Tests if this is a MO_TargetIndex operand.
Definition at line 253 of file MachineOperand.h.
References MO_TargetIndex.
Referenced by getIndex(), getOffset(), llvm::SIInstrInfo::isImmOperandLegal(), llvm::SIInstrInfo::isLegalVSrcOperand(), llvm::SIInstrInfo::isOperandLegal(), setIndex(), and setOffset().
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Definition at line 327 of file MachineOperand.h.
References assert(), and isReg().
Referenced by canFoldIntoMOVCC(), canFoldIntoSelect(), ChangeToES(), ChangeToFPImmediate(), ChangeToFrameIndex(), ChangeToImmediate(), ChangeToMCSymbol(), llvm::MachineInstr::findTiedOperandIdx(), llvm::MachineInstr::isRegTiedToDefOperand(), llvm::MachineInstr::isRegTiedToUseOperand(), llvm::MIPrinter::print(), print(), llvm::MachineInstr::RemoveOperand(), llvm::rdf::CopyPropagation::run(), llvm::MachineInstr::tieOperands(), tieOpsIfNeeded(), and llvm::MachineInstr::untieRegOperand().
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Definition at line 312 of file MachineOperand.h.
References assert(), and isReg().
Referenced by llvm::MachineInstr::addRegisterKilled(), llvm::ScheduleDAGInstrs::addVRegDefDeps(), ChangeToRegister(), llvm::X86InstrInfo::classifyLEAReg(), llvm::TargetInstrInfo::commuteInstructionImpl(), llvm::X86InstrInfo::convertToThreeAddress(), copyFlagsToImplicitVCC(), CreateReg(), emitLoadM0FromVGPRLoop(), llvm::SIInstrInfo::expandPostRAPseudo(), llvm::HexagonInstrInfo::expandPostRAPseudo(), findUseBetween(), llvm::ScheduleDAGInstrs::fixupKills(), llvm::AArch64InstrInfo::foldMemoryOperandImpl(), llvm::getRegState(), llvm::X86InstrInfo::getUndefRegClearance(), llvm::HexagonInstrInfo::insertBranch(), llvm::IsCPSRDead< MachineInstr >(), isLocalCopy(), isMemoryOp(), isUseSafeToFold(), mergeOperations(), llvm::MIPrinter::print(), print(), readsReg(), readsVCCZ(), llvm::MachineInstr::readsWritesVirtualRegister(), ReplaceDominatedUses(), llvm::ThumbRegisterInfo::saveScavengerRegister(), llvm::MachineBasicBlock::SplitCriticalEdge(), swapRegAndNonRegOperand(), UpdateCPSRDef(), and UpdateCPSRUse().
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Definition at line 287 of file MachineOperand.h.
References assert(), and isReg().
Referenced by llvm::ScheduleDAGInstrs::addPhysRegDeps(), llvm::MachineInstr::addRegisterKilled(), llvm::MachineInstr::allDefsAreDead(), llvm::CriticalAntiDepBreaker::BreakAntiDependencies(), llvm::ScheduleDAGInstrs::buildSchedGraph(), llvm::MachineInstr::clearKillInfo(), llvm::MachineInstr::clearRegisterKills(), llvm::ARMBaseInstrInfo::convertToThreeAddress(), llvm::MachineInstr::findRegisterUseOperandIdx(), llvm::MachineInstr::findTiedOperandIdx(), llvm::ScheduleDAGInstrs::fixupKills(), llvm::TargetInstrInfo::foldMemoryOperand(), for(), getCallTargetRegOpnd(), llvm::MachineInstr::getRegClassConstraint(), llvm::MachineInstr::hasRegisterImplicitUseOperand(), llvm::HexagonPacketizerList::isCallDependent(), llvm::IsCPSRDead< MachineInstr >(), llvm::MachineInstr::isRegTiedToDefOperand(), llvm::X86InstrInfo::isSafeToClobberEFLAGS(), isTwoAddrUse(), parseOperands(), print(), readsReg(), llvm::MachineInstr::readsWritesVirtualRegister(), llvm::MachineInstr::tieOperands(), TrackDefUses(), UpdateCPSRDef(), llvm::SIInstrInfo::usesConstantBus(), and llvm::SIInstrInfo::verifyInstruction().
| void MachineOperand::print | ( | raw_ostream & | os, |
| const TargetRegisterInfo * | TRI = nullptr, |
||
| const TargetIntrinsicInfo * | IntrinsicInfo = nullptr |
||
| ) | const |
Definition at line 329 of file MachineInstr.cpp.
Referenced by llvm::MachineInstr::dump(), llvm::operator<<(), and llvm::MachineInstr::print().
| void MachineOperand::print | ( | raw_ostream & | os, |
| ModuleSlotTracker & | MST, | ||
| const TargetRegisterInfo * | TRI = nullptr, |
||
| const TargetIntrinsicInfo * | IntrinsicInfo = nullptr |
||
| ) | const |
Definition at line 335 of file MachineInstr.cpp.
References getReg(), getSubReg(), getType(), isDead(), isDef(), isEarlyClobber(), isImplicit(), isInternalRead(), isKill(), isTied(), isUndef(), isUse(), MO_Register, and llvm::PrintReg().
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readsReg - Returns true if this operand reads the previous value of its register.
A use operand with the <undef> flag set doesn't read its register. A sub-register def implicitly reads the other parts of the register being redefined unless the <undef> flag is set.
This refers to reading the register value from before the current instruction or bundle. Internal bundle reads are not included.
Definition at line 344 of file MachineOperand.h.
References assert(), getSubReg(), isInternalRead(), isReg(), isUndef(), and isUse().
Referenced by llvm::MachineOperandIteratorBase::analyzePhysReg(), llvm::MachineOperandIteratorBase::analyzeVirtReg(), llvm::ScheduleDAGInstrs::buildSchedGraph(), llvm::ConnectedVNInfoEqClasses::Distribute(), findUseIdx(), getDataDeps(), llvm::ARMBaseInstrInfo::getPartialRegUpdateClearance(), llvm::X86InstrInfo::getPartialRegUpdateClearance(), updatePhysDepsDownwards(), and updatePhysDepsUpwards().
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Definition at line 533 of file MachineOperand.h.
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Definition at line 528 of file MachineOperand.h.
References assert(), and isImm().
Referenced by llvm::R600InstrInfo::addFlag(), llvm::R600InstrInfo::buildSlotOfVectorInstruction(), llvm::R600InstrInfo::clearFlag(), llvm::PPCInstrInfo::commuteInstructionImpl(), CreateImm(), llvm::ARMBaseInstrInfo::duplicate(), llvm::WebAssemblyRegisterInfo::eliminateFrameIndex(), llvm::LanaiRegisterInfo::eliminateFrameIndex(), llvm::SystemZInstrInfo::expandPostRAPseudo(), llvm::R600InstrInfo::insertBranch(), llvm::ARMBaseInstrInfo::PredicateInstruction(), llvm::R600InstrInfo::PredicateInstruction(), llvm::TargetInstrInfo::PredicateInstruction(), llvm::HexagonInstrInfo::reduceLoopCount(), llvm::R600InstrInfo::reverseBranchCondition(), RewriteP2Align(), llvm::setDirectAddressInInstr(), llvm::R600InstrInfo::setImmOperand(), llvm::SIInstrInfo::swapSourceModifiers(), llvm::HexagonPacketizerList::useCalleesSP(), and llvm::HexagonPacketizerList::useCallersSP().
Definition at line 380 of file MachineOperand.h.
References assert(), isReg(), and Val.
Referenced by llvm::X86InstrInfo::classifyLEAReg(), llvm::LanaiInstrInfo::optimizeSelect(), and llvm::ARMBaseInstrInfo::optimizeSelect().
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Definition at line 546 of file MachineOperand.h.
References assert(), isCPI(), isFI(), isJTI(), and isTargetIndex().
Referenced by ChangeToFrameIndex(), CreateCPI(), CreateFI(), CreateJTI(), CreateTargetIndex(), and llvm::ARMBaseInstrInfo::duplicate().
Definition at line 391 of file MachineOperand.h.
References assert(), isReg(), and Val.
Referenced by llvm::MachineInstr::addRegisterDead(), attachMEMCPYScratchRegs(), llvm::MachineInstr::clearRegisterDeads(), llvm::ARMBaseInstrInfo::convertToThreeAddress(), llvm::MSP430FrameLowering::eliminateCallFramePseudoInstr(), llvm::AVRFrameLowering::eliminateCallFramePseudoInstr(), llvm::AVRRegisterInfo::eliminateFrameIndex(), llvm::AVRFrameLowering::emitEpilogue(), llvm::MSP430FrameLowering::emitEpilogue(), emitIncrement(), llvm::AVRFrameLowering::emitPrologue(), llvm::MSP430FrameLowering::emitPrologue(), llvm::X86FrameLowering::emitSPUpdate(), llvm::SystemZInstrInfo::foldMemoryOperandImpl(), MaybeRewriteToDrop(), llvm::X86InstrInfo::optimizeCompareInstr(), llvm::LiveVariables::removeVirtualRegisterDead(), ReplaceDominatedUses(), llvm::X86FrameLowering::restoreWin32EHStackPointers(), llvm::MachineInstr::setPhysRegsDeadExcept(), llvm::X86InstrInfo::setSpecialOperandAttr(), transferDeadCC(), and UpdatePredRedefs().
Definition at line 411 of file MachineOperand.h.
References assert(), isReg(), and Val.
Referenced by llvm::FastISel::selectIntrinsicCall().
Change a def to a use, or a use to a def.
Definition at line 103 of file MachineInstr.cpp.
References llvm::MachineRegisterInfo::addRegOperandToUseList(), assert(), llvm::MachineBasicBlock::getParent(), getParent(), isDebug(), isReg(), MBB, MI, MRI, llvm::MachineRegisterInfo::removeRegOperandFromUseList(), and Val.
Referenced by llvm::ARMTargetLowering::AdjustInstrPostInstrSelection(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), and setIsUse().
Definition at line 406 of file MachineOperand.h.
Definition at line 401 of file MachineOperand.h.
References assert(), isReg(), and Val.
Referenced by llvm::TargetInstrInfo::commuteInstructionImpl(), and INITIALIZE_PASS().
Definition at line 385 of file MachineOperand.h.
References assert(), isDebug(), isReg(), and Val.
Referenced by llvm::ScheduleDAGInstrs::addPhysRegDeps(), llvm::MachineInstr::addRegisterKilled(), llvm::MachineInstr::clearKillInfo(), llvm::MachineInstr::clearRegisterKills(), llvm::PPCInstrInfo::commuteInstructionImpl(), llvm::TargetInstrInfo::commuteInstructionImpl(), llvm::R600InstrInfo::copyPhysReg(), earlyUseOperand(), llvm::ARMBaseInstrInfo::expandPostRAPseudo(), llvm::HexagonInstrInfo::expandPostRAPseudo(), llvm::SIInstrInfo::FoldImmediate(), llvm::ARMBaseInstrInfo::FoldImmediate(), llvm::SIInstrInfo::insertBranch(), insertDivByZeroTrap(), llvm::SIInstrInfo::legalizeOperands(), llvm::AArch64InstrInfo::optimizeCondBranch(), removeKillInfo(), llvm::LiveVariables::removeVirtualRegisterKilled(), llvm::LiveVariables::removeVirtualRegistersKilled(), llvm::ScheduleDAGInstrs::toggleKillFlag(), and llvm::X86InstrInfo::unfoldMemoryOperand().
Definition at line 396 of file MachineOperand.h.
References assert(), isReg(), and Val.
Referenced by llvm::ScheduleDAGInstrs::addVRegDefDeps(), llvm::TargetInstrInfo::commuteInstructionImpl(), emitIndirectDst(), emitIndirectSrc(), llvm::SITargetLowering::EmitInstrWithCustomInserter(), llvm::X86TargetLowering::EmitInstrWithCustomInserter(), emitLoadM0FromVGPRLoop(), llvm::ARMBaseInstrInfo::expandPostRAPseudo(), llvm::AArch64InstrInfo::foldMemoryOperandImpl(), llvm::SIInstrInfo::insertBranch(), mergeOperations(), setM0ToIndexFromSGPR(), llvm::MachineInstr::setRegisterDefReadUndef(), and substPhysReg().
Definition at line 376 of file MachineOperand.h.
References setIsDef(), and Val.
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Definition at line 552 of file MachineOperand.h.
References assert(), isMBB(), and MBB.
Referenced by CreateMBB(), llvm::HexagonInstrInfo::insertBranch(), llvm::HexagonInstrInfo::invertAndChangeJumpTarget(), llvm::TargetInstrInfo::PredicateInstruction(), and llvm::MachineBasicBlock::transferSuccessorsAndUpdatePHIs().
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Definition at line 538 of file MachineOperand.h.
References assert(), isBlockAddress(), isCPI(), isGlobal(), isMCSymbol(), isSymbol(), and isTargetIndex().
Referenced by ChangeToES(), CreateBA(), CreateCPI(), CreateES(), CreateGA(), CreateMCSymbol(), CreateTargetIndex(), and llvm::X86RegisterInfo::eliminateFrameIndex().
| void MachineOperand::setReg | ( | unsigned | Reg | ) |
Change the register this operand corresponds to.
Definition at line 59 of file MachineInstr.cpp.
References llvm::MachineRegisterInfo::addRegOperandToUseList(), llvm::MachineBasicBlock::getParent(), getParent(), getReg(), MBB, MI, MRI, Reg, and llvm::MachineRegisterInfo::removeRegOperandFromUseList().
Referenced by llvm::ARMTargetLowering::AdjustInstrPostInstrSelection(), llvm::RegisterBankInfo::applyDefaultMapping(), llvm::R600InstrInfo::buildSlotOfVectorInstruction(), llvm::PPCInstrInfo::commuteInstructionImpl(), llvm::TargetInstrInfo::commuteInstructionImpl(), llvm::InstructionSelector::constrainSelectedInstRegOperands(), llvm::ConnectedVNInfoEqClasses::Distribute(), llvm::SparcRegisterInfo::eliminateFrameIndex(), ExpandMOVImmSExti8(), expandNOVLXLoad(), expandNOVLXStore(), llvm::ARMBaseInstrInfo::expandPostRAPseudo(), llvm::fixStackStores(), llvm::SIInstrInfo::FoldImmediate(), llvm::PPCInstrInfo::FoldImmediate(), llvm::ARMBaseInstrInfo::FoldImmediate(), llvm::X86InstrInfo::foldMemoryOperandImpl(), foldVGPRCopyIntoRegSequence(), llvm::SIInstrInfo::legalizeGenericOperand(), llvm::SIInstrInfo::legalizeOperands(), llvm::SIInstrInfo::legalizeOperandsSMRD(), llvm::AArch64CallLowering::lowerCall(), llvm::MachineRegisterInfo::markUsesInDebugValueAsUndef(), MaybeRewriteToDrop(), MaybeRewriteToFallthrough(), MoveAndTeeForMultiUse(), MoveForSingleUse(), llvm::SIInstrInfo::moveToVALU(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::PredicateInstruction(), llvm::R600InstrInfo::PredicateInstruction(), llvm::TargetInstrInfo::PredicateInstruction(), RematerializeCheapDef(), ReplaceDominatedUses(), llvm::PPCFrameLowering::replaceFPWithRealFP(), replaceRegUsesAfterLoop(), llvm::MachineRegisterInfo::replaceRegWith(), llvm::R600InstrInfo::reverseBranchCondition(), llvm::MachineSSAUpdater::RewriteUse(), llvm::rdf::CopyPropagation::run(), llvm::AArch64InstructionSelector::select(), llvm::setDirectAddressInInstr(), substPhysReg(), substVirtReg(), llvm::AntiDepBreaker::UpdateDbgValue(), and llvm::LegalizerHelper::widenScalar().
Sets value of register mask operand referencing Mask.
The operand does not take ownership of the memory referenced by Mask, it must remain valid for the lifetime of the operand. See CreateRegMask(). Any physreg with a 0 bit in the mask is clobbered by the instruction.
Definition at line 561 of file MachineOperand.h.
References assert(), and isRegMask().
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Definition at line 357 of file MachineOperand.h.
References assert(), and isReg().
Referenced by llvm::PPCInstrInfo::commuteInstructionImpl(), llvm::TargetInstrInfo::commuteInstructionImpl(), CreateReg(), llvm::SIInstrInfo::FoldImmediate(), llvm::AArch64InstrInfo::foldMemoryOperandImpl(), llvm::X86InstrInfo::foldMemoryOperandImpl(), insertDivByZeroTrap(), llvm::SIInstrInfo::legalizeGenericOperand(), llvm::SIInstrInfo::legalizeOperandsVOP2(), llvm::AArch64InstrInfo::optimizeCondBranch(), llvm::rdf::CopyPropagation::run(), llvm::AArch64InstructionSelector::select(), substPhysReg(), substVirtReg(), and swapRegAndNonRegOperand().
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Definition at line 200 of file MachineOperand.h.
References assert(), F, and isReg().
Referenced by ChangeToES(), CreateBA(), CreateCPI(), CreateES(), CreateGA(), CreateJTI(), CreateMBB(), CreateMCSymbol(), CreateTargetIndex(), and llvm::AArch64InstructionSelector::select().
| void MachineOperand::substPhysReg | ( | unsigned | Reg, |
| const TargetRegisterInfo & | TRI | ||
| ) |
substPhysReg - Substitute the current register with the physical register Reg, taking any existing SubReg into account.
For instance, substPhysReg(EAX) will change reg1024:sub_8bit to AL.
Definition at line 89 of file MachineInstr.cpp.
References assert(), getSubReg(), llvm::MCRegisterInfo::getSubReg(), isDef(), llvm::TargetRegisterInfo::isPhysicalRegister(), setIsUndef(), setReg(), and setSubReg().
Referenced by llvm::MachineRegisterInfo::replaceRegWith(), and llvm::MachineInstr::substituteRegister().
| void MachineOperand::substVirtReg | ( | unsigned | Reg, |
| unsigned | SubIdx, | ||
| const TargetRegisterInfo & | TRI | ||
| ) |
substVirtReg - Substitute the current register with the virtual subregister Reg:SubReg.
Take any existing SubReg index into account, using TargetRegisterInfo to compose the subreg indices if necessary. Reg must be a virtual register, SubIdx can be 0.
Definition at line 79 of file MachineInstr.cpp.
References assert(), llvm::TargetRegisterInfo::composeSubRegIndices(), getSubReg(), llvm::TargetRegisterInfo::isVirtualRegister(), setReg(), and setSubReg().
Referenced by llvm::MachineInstr::substituteRegister(), and updateOperand().
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MachineOperand hash_value overload.
Note that this includes the same information in the hash that isIdenticalTo uses for comparison. It is thus suited for use in hash tables which use that function for equality comparisons only.
Referenced by llvm::MachineInstrExpressionTrait::getHashValue().
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Definition at line 770 of file MachineOperand.h.
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Definition at line 771 of file MachineOperand.h.
| const BlockAddress* llvm::MachineOperand::BA |
Definition at line 183 of file MachineOperand.h.
Referenced by CreateBA().
| unsigned llvm::MachineOperand::CFIIndex |
Definition at line 166 of file MachineOperand.h.
Referenced by CreateCFIIndex().
| const ConstantFP* llvm::MachineOperand::CFP |
Definition at line 160 of file MachineOperand.h.
Referenced by CreateFPImm(), and setFPImm().
| const ConstantInt* llvm::MachineOperand::CI |
Definition at line 161 of file MachineOperand.h.
Referenced by CreateCImm(), and llvm::MachineInstr::emitError().
| const GlobalValue* llvm::MachineOperand::GV |
Definition at line 182 of file MachineOperand.h.
Referenced by CreateGA().
| int64_t llvm::MachineOperand::ImmVal |
Definition at line 162 of file MachineOperand.h.
Referenced by ChangeToImmediate().
| int llvm::MachineOperand::Index |
Definition at line 180 of file MachineOperand.h.
| Intrinsic::ID llvm::MachineOperand::IntrinsicID |
Definition at line 167 of file MachineOperand.h.
Referenced by CreateIntrinsicID().
| MachineBasicBlock* llvm::MachineOperand::MBB |
Definition at line 159 of file MachineOperand.h.
Referenced by ChangeToRegister(), llvm::MachineInstr::emitError(), llvm::MachineInstr::eraseFromParentAndMarkDBGValuesForRemoval(), llvm::MachineInstr::print(), setIsDef(), setMBB(), and setReg().
Definition at line 164 of file MachineOperand.h.
Referenced by CreateMetadata().
| MachineOperand* llvm::MachineOperand::Next |
Definition at line 173 of file MachineOperand.h.
| struct { ... } llvm::MachineOperand::OffsetedInfo |
OffsetedInfo - This struct contains the offset and an object identifier.
this represent the object as with an optional offset from it.
Referenced by CreateBA(), CreateES(), and CreateGA().
| int llvm::MachineOperand::OffsetHi |
Definition at line 186 of file MachineOperand.h.
| unsigned llvm::MachineOperand::OffsetLo |
Definition at line 150 of file MachineOperand.h.
| unsigned llvm::MachineOperand::Pred |
Definition at line 168 of file MachineOperand.h.
Referenced by llvm::MachineInstr::bundleWithPred(), CreatePredicate(), and llvm::MachineInstr::unbundleFromPred().
| MachineOperand* llvm::MachineOperand::Prev |
Definition at line 172 of file MachineOperand.h.
| struct { ... } llvm::MachineOperand::Reg |
Referenced by llvm::MachineRegisterInfo::addRegOperandToUseList(), ChangeToRegister(), llvm::MachineInstr::clearRegisterDeads(), CreateReg(), llvm::MachineInstr::eraseFromParentAndMarkDBGValuesForRemoval(), llvm::MachineInstr::findRegisterDefOperandIdx(), llvm::ARMBaseInstrInfo::getExtractSubregLikeInputs(), llvm::ARMBaseInstrInfo::getInsertSubregLikeInputs(), llvm::MachineInstr::getRegClassConstraintEffectForVReg(), llvm::MachineInstr::hasRegisterImplicitUseOperand(), llvm::MachineInstr::isConstantValuePHI(), llvm::MachineRegisterInfo::moveOperands(), llvm::MachineInstr::readsWritesVirtualRegister(), llvm::MachineRegisterInfo::removeRegOperandFromUseList(), and setReg().
Definition at line 163 of file MachineOperand.h.
Referenced by CreateRegLiveOut(), and CreateRegMask().
| unsigned llvm::MachineOperand::RegNo |
Definition at line 149 of file MachineOperand.h.
Referenced by CreateReg().
| MCSymbol* llvm::MachineOperand::Sym |
Definition at line 165 of file MachineOperand.h.
Referenced by ChangeToMCSymbol(), and CreateMCSymbol().
| const char* llvm::MachineOperand::SymbolName |
Definition at line 181 of file MachineOperand.h.
| union { ... } llvm::MachineOperand::Val |
Referenced by setImplicit(), setIsDead(), setIsDebug(), setIsDef(), setIsEarlyClobber(), setIsInternalRead(), setIsKill(), setIsUndef(), and setIsUse().
1.8.6