26 #define DEBUG_TYPE "asm-printer"
28 #define PRINT_ALIAS_INSTR
29 #include "MipsGenAsmWriter.inc"
86 O <<
"\t.set\tpush\n";
87 O <<
"\t.set\tmips32r2\n";
91 printSaveRestore(MI, O);
92 O <<
" # 16 bit inst\n";
96 printSaveRestore(MI, O);
101 printSaveRestore(MI, O);
102 O <<
" # 16 bit inst\n";
104 case Mips::RestoreX16:
106 printSaveRestore(MI, O);
121 O <<
"\n\t.set\tpop";
125 void MipsInstPrinter::printOperand(
const MCInst *
MI,
unsigned OpNo,
138 assert(Op.
isExpr() &&
"unknown operand kind in printOperand");
142 template <
unsigned Bits,
unsigned Offset>
146 uint64_t Imm = MO.
getImm();
148 Imm &= (1 <<
Bits) - 1;
154 printOperand(MI, opNum, O);
157 void MipsInstPrinter::
171 case Mips::SWM16_MMR6:
173 case Mips::LWM16_MMR6:
178 printOperand(MI, opNum+1, O);
180 printOperand(MI, opNum, O);
184 void MipsInstPrinter::
188 printOperand(MI, opNum, O);
190 printOperand(MI, opNum+1, O);
194 void MipsInstPrinter::
200 void MipsInstPrinter::
205 void MipsInstPrinter::
210 bool MipsInstPrinter::printAlias(
const char *Str,
const MCInst &MI,
212 OS <<
"\t" << Str <<
"\t";
213 printOperand(&MI, OpNo, OS);
217 bool MipsInstPrinter::printAlias(
const char *Str,
const MCInst &MI,
218 unsigned OpNo0,
unsigned OpNo1,
220 printAlias(Str, MI, OpNo0, OS);
222 printOperand(&MI, OpNo1, OS);
232 return (isReg<Mips::ZERO>(MI, 0) && isReg<Mips::ZERO>(
MI, 1) &&
233 printAlias(
"b", MI, 2, OS)) ||
234 (isReg<Mips::ZERO>(MI, 1) && printAlias(
"beqz", MI, 0, 2, OS));
237 return isReg<Mips::ZERO_64>(
MI, 1) && printAlias(
"beqz", MI, 0, 2, OS);
241 return isReg<Mips::ZERO>(
MI, 1) && printAlias(
"bnez", MI, 0, 2, OS);
244 return isReg<Mips::ZERO_64>(
MI, 1) && printAlias(
"bnez", MI, 0, 2, OS);
247 return isReg<Mips::ZERO>(
MI, 0) && printAlias(
"bal", MI, 1, OS);
250 return isReg<Mips::FCC0>(
MI, 0) && printAlias(
"bc1t", MI, 1, OS);
253 return isReg<Mips::FCC0>(
MI, 0) && printAlias(
"bc1f", MI, 1, OS);
256 return isReg<Mips::RA>(
MI, 0) && printAlias(
"jalr", MI, 1, OS);
259 return isReg<Mips::RA_64>(
MI, 0) && printAlias(
"jalr", MI, 1, OS);
264 return isReg<Mips::ZERO>(
MI, 2) && printAlias(
"not", MI, 0, 1, OS);
267 return isReg<Mips::ZERO_64>(
MI, 2) && printAlias(
"not", MI, 0, 1, OS);
270 return isReg<Mips::ZERO>(
MI, 2) && printAlias(
"move", MI, 0, 1, OS);
271 default:
return false;
277 if (
i != 0) O <<
", ";
281 printUImm<16>(
MI,
i, O);
285 void MipsInstPrinter::
static bool isReg(const MCInst &MI, unsigned OpNo)
bool printAliasInstr(const MCInst *MI, raw_ostream &OS)
void printRegName(raw_ostream &OS, unsigned RegNo) const override
Print the assembler register name.
unsigned getReg() const
Returns the register number.
Instances of this class represent a single low-level machine instruction.
const MCExpr * getExpr() const
static ManagedStatic< OptionRegistry > OR
void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot, const MCSubtargetInfo &STI) override
Print the specified MCInst to the specified raw_ostream.
format_object< int64_t > formatImm(int64_t Value) const
Utility function to print immediates in decimal or hex.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
unsigned getOpcode() const
const char * MipsFCCToString(Mips::CondCode CC)
unsigned getNumOperands() const
MCSubtargetInfo - Generic base class for all target subtargets.
void print(raw_ostream &OS, const MCAsmInfo *MAI, bool InParens=false) const
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
static const char * getRegisterName(unsigned RegNo)
void printAnnotation(raw_ostream &OS, StringRef Annot)
Utility function for printing annotations.
void printInstruction(const MCInst *MI, raw_ostream &O)
This class implements an extremely fast bulk output stream that can only output to a stream...
StringRef - Represent a constant reference to a string, i.e.
Instances of this class represent operands of the MCInst class.
LLVM_NODISCARD std::string lower() const
const MCOperand & getOperand(unsigned i) const