LLVM  4.0.0
ARMMCTargetDesc.h
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1 //===-- ARMMCTargetDesc.h - ARM Target Descriptions -------------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file provides ARM specific target descriptions.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_ARM_MCTARGETDESC_ARMMCTARGETDESC_H
15 #define LLVM_LIB_TARGET_ARM_MCTARGETDESC_ARMMCTARGETDESC_H
16 
17 #include "llvm/Support/DataTypes.h"
18 #include <string>
19 
20 namespace llvm {
21 class formatted_raw_ostream;
22 class MCAsmBackend;
23 class MCCodeEmitter;
24 class MCContext;
25 class MCInstrInfo;
26 class MCInstPrinter;
27 class MCObjectWriter;
28 class MCRegisterInfo;
29 class MCSubtargetInfo;
30 class MCStreamer;
31 class MCTargetOptions;
32 class MCRelocationInfo;
33 class MCTargetStreamer;
34 class StringRef;
35 class Target;
36 class Triple;
37 class raw_ostream;
38 class raw_pwrite_stream;
39 
44 
45 namespace ARM_MC {
46 std::string ParseARMTriple(const Triple &TT, StringRef CPU);
47 
48 /// Create a ARM MCSubtargetInfo instance. This is exposed so Asm parser, etc.
49 /// do not need to go through TargetRegistry.
51  StringRef FS);
52 }
53 
57  MCInstPrinter *InstPrint,
58  bool isVerboseAsm);
60  const MCSubtargetInfo &STI);
61 
63  const MCRegisterInfo &MRI,
64  MCContext &Ctx);
65 
67  const MCRegisterInfo &MRI,
68  MCContext &Ctx);
69 
71  const Triple &TT, StringRef CPU,
72  const MCTargetOptions &Options,
73  bool IsLittleEndian);
74 
76  const Triple &TT, StringRef CPU,
77  const MCTargetOptions &Options);
78 
80  const Triple &TT, StringRef CPU,
81  const MCTargetOptions &Options);
82 
84  const MCRegisterInfo &MRI,
85  const Triple &TT, StringRef CPU,
86  const MCTargetOptions &Options);
87 
89  const MCRegisterInfo &MRI,
90  const Triple &TT, StringRef CPU,
91  const MCTargetOptions &Options);
92 
93 // Construct a PE/COFF machine code streamer which will generate a PE/COFF
94 // object file.
97  MCCodeEmitter *Emitter, bool RelaxAll,
99 
100 /// Construct an ELF Mach-O object writer.
102  bool IsLittleEndian);
103 
104 /// Construct an ARM Mach-O object writer.
107  uint32_t CPUSubtype);
108 
109 /// Construct an ARM PE/COFF object writer.
111  bool Is64Bit);
112 
113 /// Construct ARM Mach-O relocation info.
115 } // End llvm namespace
116 
117 // Defines symbolic names for ARM registers. This defines a mapping from
118 // register name to register number.
119 //
120 #define GET_REGINFO_ENUM
121 #include "ARMGenRegisterInfo.inc"
122 
123 // Defines symbolic names for the ARM instructions.
124 //
125 #define GET_INSTRINFO_ENUM
126 #include "ARMGenInstrInfo.inc"
127 
128 #define GET_SUBTARGETINFO_ENUM
129 #include "ARMGenSubtargetInfo.inc"
130 
131 #endif
MCObjectWriter * createARMWinCOFFObjectWriter(raw_pwrite_stream &OS, bool Is64Bit)
Construct an ARM PE/COFF object writer.
LLVMContext & Context
formatted_raw_ostream - A raw_ostream that wraps another one and keeps track of line and column posit...
MCAsmBackend * createARMAsmBackend(const Target &T, const MCRegisterInfo &MRI, const Triple &TT, StringRef CPU, const MCTargetOptions &Options, bool IsLittleEndian)
MCAsmBackend * createThumbLEAsmBackend(const Target &T, const MCRegisterInfo &MRI, const Triple &TT, StringRef CPU, const MCTargetOptions &Options)
Target specific streamer interface.
Definition: MCStreamer.h:73
MCRelocationInfo * createARMMachORelocationInfo(MCContext &Ctx)
Construct ARM Mach-O relocation info.
MCObjectWriter * createARMMachObjectWriter(raw_pwrite_stream &OS, bool Is64Bit, uint32_t CPUType, uint32_t CPUSubtype)
Construct an ARM Mach-O object writer.
Target & getTheThumbLETarget()
Defines the object file and target independent interfaces used by the assembler backend to write nati...
MCStreamer * createARMWinCOFFStreamer(MCContext &Context, MCAsmBackend &MAB, raw_pwrite_stream &OS, MCCodeEmitter *Emitter, bool RelaxAll, bool IncrementalLinkerCompatible)
Target & getTheARMBETarget()
Context object for machine code objects.
Definition: MCContext.h:51
Target & getTheThumbBETarget()
MCObjectWriter * createARMELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI, bool IsLittleEndian)
Construct an ELF Mach-O object writer.
MCTargetStreamer * createARMTargetAsmStreamer(MCStreamer &S, formatted_raw_ostream &OS, MCInstPrinter *InstPrint, bool isVerboseAsm)
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
MCTargetStreamer * createARMObjectTargetStreamer(MCStreamer &S, const MCSubtargetInfo &STI)
Streaming machine code generation interface.
Definition: MCStreamer.h:161
unsigned const MachineRegisterInfo * MRI
MCAsmBackend * createARMBEAsmBackend(const Target &T, const MCRegisterInfo &MRI, const Triple &TT, StringRef CPU, const MCTargetOptions &Options)
MCCodeEmitter - Generic instruction encoding interface.
Definition: MCCodeEmitter.h:23
Interface to description of machine instruction set.
Definition: MCInstrInfo.h:24
Create MCExprs from relocations found in an object file.
MCSubtargetInfo * createARMMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS)
Create a ARM MCSubtargetInfo instance.
MCAsmBackend * createARMLEAsmBackend(const Target &T, const MCRegisterInfo &MRI, const Triple &TT, StringRef CPU, const MCTargetOptions &Options)
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
cl::opt< bool > IncrementalLinkerCompatible("incremental-linker-compatible", cl::desc("When used with filetype=obj, ""emit an object file which can be used with an incremental linker"))
CPUType
These values correspond to the CV_CPU_TYPE_e enumeration, and are documented here: https://msdn...
Definition: CodeView.h:73
static const char * Target
MCAsmBackend * createThumbBEAsmBackend(const Target &T, const MCRegisterInfo &MRI, const Triple &TT, StringRef CPU, const MCTargetOptions &Options)
Target - Wrapper for Target specific information.
MCCodeEmitter * createARMLEMCCodeEmitter(const MCInstrInfo &MCII, const MCRegisterInfo &MRI, MCContext &Ctx)
This is an instance of a target assembly language printer that converts an MCInst to valid target ass...
Definition: MCInstPrinter.h:41
MCSubtargetInfo - Generic base class for all target subtargets.
An abstract base class for streams implementations that also support a pwrite operation.
Definition: raw_ostream.h:333
MCTargetStreamer * createARMNullTargetStreamer(MCStreamer &S)
cl::opt< bool > RelaxAll("mc-relax-all", cl::desc("When used with filetype=obj, ""relax all fixups in the emitted object file"))
Generic interface to target specific assembler backends.
Definition: MCAsmBackend.h:36
std::string ParseARMTriple(const Triple &TT, StringRef CPU)
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:47
Target & getTheARMLETarget()
MCCodeEmitter * createARMBEMCCodeEmitter(const MCInstrInfo &MCII, const MCRegisterInfo &MRI, MCContext &Ctx)