15 #ifndef LLVM_LIB_TARGET_MSP430_MSP430ISELLOWERING_H
16 #define LLVM_LIB_TARGET_MSP430_MSP430ISELLOWERING_H
69 class MSP430Subtarget;
102 std::pair<unsigned, const TargetRegisterClass *>
BUILTIN_OP_END - This must be the last enum value in this list.
A parsed version of the target data layout string in and methods for querying it. ...
Return with a flag operand. Operand 0 is the chain operand.
SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG) const
MSP430 conditional branches.
SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const
SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG) const
Y = RRC X, rotate right via carry.
SELECT_CC - Operand 0 and operand 1 are selection variable, operand 3 is condition code and operand 4...
SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
Same as RET_FLAG, but used for returning from ISRs.
bool isTruncateFree(Type *Ty1, Type *Ty2) const override
isTruncateFree - Return true if it's free to truncate a value of type Ty1 to type Ty2...
SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override
LowerOperation - Provide custom lowering hooks for some operations.
SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const
SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const
MVT - Machine Value Type.
The instances of the Type class are immutable: once they are created, they are never changed...
SDValue LowerExternalSymbol(SDValue Op, SelectionDAG &DAG) const
SetCC - Operand 0 is condition code, and operand 1 is the flag operand produced by a CMP instruction...
EVT - Extended Value Type.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
This structure contains all information that is necessary for lowering calls.
SDValue LowerShifts(SDValue Op, SelectionDAG &DAG) const
MVT getScalarShiftAmountTy(const DataLayout &, EVT) const override
EVT is not used in-tree, but is used by out-of-tree target.
SDValue getReturnAddressFrameIndex(SelectionDAG &DAG) const
CMP - Compare instruction.
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
std::pair< unsigned, const TargetRegisterClass * > getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI, StringRef Constraint, MVT VT) const override
Given a physical register constraint (e.g.
Wrapper class for IR location info (IR ordering and DebugLoc) to be passed into SDNode creation funct...
Represents one node in the SelectionDAG.
const char * getTargetNodeName(unsigned Opcode) const override
getTargetNodeName - This method returns the name of a target specific DAG node.
TargetLowering::ConstraintType getConstraintType(StringRef Constraint) const override
getConstraintType - Given a constraint letter, return the type of constraint it is for this target...
MachineBasicBlock * EmitShiftInstr(MachineInstr &MI, MachineBasicBlock *BB) const
Representation of each machine instruction.
SDValue LowerSIGN_EXTEND(SDValue Op, SelectionDAG &DAG) const
SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const
Wrapper - A wrapper node for TargetConstantPool, TargetExternalSymbol, and TargetGlobalAddress.
bool isZExtFree(Type *Ty1, Type *Ty2) const override
isZExtFree - Return true if any actual instruction that defines a value of type Ty1 implicit zero-ext...
Y = R{R,L}A X, rotate right (left) arithmetically.
MachineBasicBlock * EmitInstrWithCustomInserter(MachineInstr &MI, MachineBasicBlock *BB) const override
This method should be implemented by targets that mark instructions with the 'usesCustomInserter' fla...
CALL - These operations represent an abstract call instruction, which includes a bunch of information...
Primary interface to the complete machine description for the target machine.
SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const
StringRef - Represent a constant reference to a string, i.e.
SHL, SRA, SRL - Non-constant shifts.
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation...
MSP430TargetLowering(const TargetMachine &TM, const MSP430Subtarget &STI)
This file describes how to lower LLVM code to machine code.
MemIndexedMode
MemIndexedMode enum - This enum defines the load / store indexed addressing modes.
SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const