LLVM  4.0.0
MipsOptionRecord.cpp
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1 //===-- MipsOptionRecord.cpp - Abstraction for storing information --------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 
10 #include "MipsOptionRecord.h"
11 #include "MipsELFStreamer.h"
12 #include "MipsTargetStreamer.h"
13 #include "llvm/MC/MCSectionELF.h"
14 
15 using namespace llvm;
16 
18  MCAssembler &MCA = Streamer->getAssembler();
19  MipsTargetStreamer *MTS =
20  static_cast<MipsTargetStreamer *>(Streamer->getTargetStreamer());
21 
22  Streamer->PushSection();
23 
24  // We need to distinguish between N64 and the rest because at the moment
25  // we don't emit .Mips.options for other ELFs other than N64.
26  // Since .reginfo has the same information as .Mips.options (ODK_REGINFO),
27  // we can use the same abstraction (MipsRegInfoRecord class) to handle both.
28  if (MTS->getABI().IsN64()) {
29  // The EntrySize value of 1 seems strange since the records are neither
30  // 1-byte long nor fixed length but it matches the value GAS emits.
31  MCSectionELF *Sec =
32  Context.getELFSection(".MIPS.options", ELF::SHT_MIPS_OPTIONS,
34  MCA.registerSection(*Sec);
35  Sec->setAlignment(8);
36  Streamer->SwitchSection(Sec);
37 
38  Streamer->EmitIntValue(ELF::ODK_REGINFO, 1); // kind
39  Streamer->EmitIntValue(40, 1); // size
40  Streamer->EmitIntValue(0, 2); // section
41  Streamer->EmitIntValue(0, 4); // info
42  Streamer->EmitIntValue(ri_gprmask, 4);
43  Streamer->EmitIntValue(0, 4); // pad
44  Streamer->EmitIntValue(ri_cprmask[0], 4);
45  Streamer->EmitIntValue(ri_cprmask[1], 4);
46  Streamer->EmitIntValue(ri_cprmask[2], 4);
47  Streamer->EmitIntValue(ri_cprmask[3], 4);
48  Streamer->EmitIntValue(ri_gp_value, 8);
49  } else {
50  MCSectionELF *Sec = Context.getELFSection(".reginfo", ELF::SHT_MIPS_REGINFO,
51  ELF::SHF_ALLOC, 24, "");
52  MCA.registerSection(*Sec);
53  Sec->setAlignment(MTS->getABI().IsN32() ? 8 : 4);
54  Streamer->SwitchSection(Sec);
55 
56  Streamer->EmitIntValue(ri_gprmask, 4);
57  Streamer->EmitIntValue(ri_cprmask[0], 4);
58  Streamer->EmitIntValue(ri_cprmask[1], 4);
59  Streamer->EmitIntValue(ri_cprmask[2], 4);
60  Streamer->EmitIntValue(ri_cprmask[3], 4);
61  assert((ri_gp_value & 0xffffffff) == ri_gp_value);
62  Streamer->EmitIntValue(ri_gp_value, 4);
63  }
64 
65  Streamer->PopSection();
66 }
67 
69  const MCRegisterInfo *MCRegInfo) {
70  unsigned Value = 0;
71 
72  for (MCSubRegIterator SubRegIt(Reg, MCRegInfo, true); SubRegIt.isValid();
73  ++SubRegIt) {
74  unsigned CurrentSubReg = *SubRegIt;
75 
76  unsigned EncVal = MCRegInfo->getEncodingValue(CurrentSubReg);
77  Value |= 1 << EncVal;
78 
79  if (GPR32RegClass->contains(CurrentSubReg) ||
80  GPR64RegClass->contains(CurrentSubReg))
81  ri_gprmask |= Value;
82  else if (COP0RegClass->contains(CurrentSubReg))
83  ri_cprmask[0] |= Value;
84  // MIPS COP1 is the FPU.
85  else if (FGR32RegClass->contains(CurrentSubReg) ||
86  FGR64RegClass->contains(CurrentSubReg) ||
87  AFGR64RegClass->contains(CurrentSubReg) ||
88  MSA128BRegClass->contains(CurrentSubReg))
89  ri_cprmask[1] |= Value;
90  else if (COP2RegClass->contains(CurrentSubReg))
91  ri_cprmask[2] |= Value;
92  else if (COP3RegClass->contains(CurrentSubReg))
93  ri_cprmask[3] |= Value;
94  }
95 }
bool isValid() const
isValid - returns true if this iterator is not yet at the end.
void setAlignment(unsigned Value)
Definition: MCSection.h:118
void PushSection()
Save the current and previous section on the section stack.
Definition: MCStreamer.h:324
bool registerSection(MCSection &Section)
Reg
All possible values of the reg field in the ModR/M byte.
void EmitMipsOptionRecord() override
void SetPhysRegUsed(unsigned Reg, const MCRegisterInfo *MCRegInfo)
virtual void EmitIntValue(uint64_t Value, unsigned Size)
Special case of EmitValue that avoids the client having to pass in a MCExpr for constant integers...
Definition: MCStreamer.cpp:85
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
MCTargetStreamer * getTargetStreamer()
Definition: MCStreamer.h:223
bool IsN32() const
Definition: MipsABIInfo.h:43
MCAssembler & getAssembler()
bool IsN64() const
Definition: MipsABIInfo.h:44
void SwitchSection(MCSection *Section, const MCExpr *Subsection=nullptr) override
Overriding this function allows us to dismiss all labels that are candidates for marking as microMIPS...
MCSubRegIterator enumerates all sub-registers of Reg.
bool contains(unsigned Reg) const
contains - Return true if the specified register is included in this register class.
const MipsABIInfo & getABI() const
This represents a section on linux, lots of unix variants and some bare metal systems.
Definition: MCSectionELF.h:30
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
bool PopSection()
Restore the current and previous section from the section stack.
Definition: MCStreamer.h:333
MCSectionELF * getELFSection(const Twine &Section, unsigned Type, unsigned Flags)
Definition: MCContext.h:341
uint16_t getEncodingValue(unsigned RegNo) const
Returns the encoding for RegNo.
LLVM Value Representation.
Definition: Value.h:71