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LLVM
4.0.0
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#include <AMDGPUDisassembler.h>
Public Types | |
| enum | OpWidthTy { OPW32, OPW64, OPW128, OPW16, OPW_LAST_, OPW_FIRST_ = OPW32 } |
Public Types inherited from llvm::MCDisassembler | |
| enum | DecodeStatus { Fail = 0, SoftFail = 1, Success = 3 } |
| Ternary decode status. More... | |
Static Public Member Functions | |
| static MCOperand | decodeIntImmed (unsigned Imm) |
| static MCOperand | decodeFPImmed (OpWidthTy Width, unsigned Imm) |
Additional Inherited Members | |
Public Attributes inherited from llvm::MCDisassembler | |
| raw_ostream * | CommentStream |
Protected Attributes inherited from llvm::MCDisassembler | |
| const MCSubtargetInfo & | STI |
| std::unique_ptr< MCSymbolizer > | Symbolizer |
Definition at line 39 of file AMDGPUDisassembler.h.
| Enumerator | |
|---|---|
| OPW32 | |
| OPW64 | |
| OPW128 | |
| OPW16 | |
| OPW_LAST_ | |
| OPW_FIRST_ | |
Definition at line 83 of file AMDGPUDisassembler.h.
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inline |
Definition at line 44 of file AMDGPUDisassembler.h.
Referenced by createAMDGPUDisassembler().
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overridedefault |
Definition at line 202 of file AMDGPUDisassembler.cpp.
References llvm::MCOperand::createReg().
Referenced by createRegOperand(), createSRegOperand(), decodeOperand_VGPR_32(), decodeOperand_VReg_128(), decodeOperand_VReg_64(), decodeOperand_VReg_96(), decodeSpecialReg32(), decodeSpecialReg64(), and decodeSrcOp().
Definition at line 207 of file AMDGPUDisassembler.cpp.
References createRegOperand(), errOperand(), and getRegClassName().
Definition at line 217 of file AMDGPUDisassembler.cpp.
References llvm::MCDisassembler::CommentStream, createRegOperand(), getRegClassName(), and llvm_unreachable.
Referenced by decodeOperand_SReg_256(), decodeOperand_SReg_512(), and decodeSrcOp().
Definition at line 415 of file AMDGPUDisassembler.cpp.
References assert(), llvm::MCOperand::createImm(), getInlineImmVal16(), getInlineImmVal32(), getInlineImmVal64(), llvm::AMDGPU::EncValues::INLINE_FLOATING_C_MAX, llvm::AMDGPU::EncValues::INLINE_FLOATING_C_MIN, llvm_unreachable, OPW16, OPW32, and OPW64.
Referenced by decodeSrcOp().
Definition at line 331 of file AMDGPUDisassembler.cpp.
References assert(), llvm::MCOperand::createImm(), llvm::AMDGPU::EncValues::INLINE_INTEGER_C_MAX, llvm::AMDGPU::EncValues::INLINE_INTEGER_C_MIN, and llvm::AMDGPU::EncValues::INLINE_INTEGER_C_POSITIVE_MAX.
Referenced by decodeSrcOp().
| MCOperand AMDGPUDisassembler::decodeLiteralConstant | ( | ) | const |
Definition at line 321 of file AMDGPUDisassembler.cpp.
References llvm::MCOperand::createImm(), errOperand(), and llvm::ArrayRef< T >::size().
Referenced by decodeSrcOp().
Definition at line 308 of file AMDGPUDisassembler.cpp.
References decodeSrcOp(), and OPW128.
Definition at line 312 of file AMDGPUDisassembler.cpp.
References createSRegOperand().
Definition at line 287 of file AMDGPUDisassembler.cpp.
References decodeSrcOp(), and OPW32.
Referenced by decodeOperand_SReg_32_XM0_XEXEC().
Definition at line 294 of file AMDGPUDisassembler.cpp.
References decodeOperand_SReg_32().
Definition at line 316 of file AMDGPUDisassembler.cpp.
References createSRegOperand().
Definition at line 300 of file AMDGPUDisassembler.cpp.
References decodeSrcOp(), and OPW64.
Definition at line 304 of file AMDGPUDisassembler.cpp.
References decodeSrcOp(), and OPW64.
Definition at line 266 of file AMDGPUDisassembler.cpp.
References createRegOperand().
Definition at line 283 of file AMDGPUDisassembler.cpp.
References createRegOperand().
Definition at line 275 of file AMDGPUDisassembler.cpp.
References createRegOperand().
Definition at line 279 of file AMDGPUDisassembler.cpp.
References createRegOperand().
Definition at line 254 of file AMDGPUDisassembler.cpp.
References decodeSrcOp(), and OPW32.
Definition at line 258 of file AMDGPUDisassembler.cpp.
References decodeSrcOp(), and OPW64.
Definition at line 262 of file AMDGPUDisassembler.cpp.
References decodeSrcOp(), and OPW16.
Definition at line 508 of file AMDGPUDisassembler.cpp.
References createRegOperand(), errOperand(), llvm::AMDGPU::getMCReg(), and llvm::MCDisassembler::STI.
Referenced by decodeSrcOp().
Definition at line 535 of file AMDGPUDisassembler.cpp.
References createRegOperand(), errOperand(), llvm::AMDGPU::getMCReg(), and llvm::MCDisassembler::STI.
Referenced by decodeSrcOp().
Definition at line 471 of file AMDGPUDisassembler.cpp.
References assert(), createRegOperand(), createSRegOperand(), decodeFPImmed(), decodeIntImmed(), decodeLiteralConstant(), decodeSpecialReg32(), decodeSpecialReg64(), getSgprClassId(), getTtmpClassId(), getVgprClassId(), llvm::AMDGPU::EncValues::INLINE_FLOATING_C_MAX, llvm::AMDGPU::EncValues::INLINE_FLOATING_C_MIN, llvm::AMDGPU::EncValues::INLINE_INTEGER_C_MAX, llvm::AMDGPU::EncValues::INLINE_INTEGER_C_MIN, llvm::AMDGPU::EncValues::LITERAL_CONST, llvm_unreachable, OPW16, OPW32, OPW64, llvm::AMDGPU::EncValues::SGPR_MAX, llvm::AMDGPU::EncValues::SGPR_MIN, llvm::AMDGPU::EncValues::TTMP_MAX, llvm::AMDGPU::EncValues::TTMP_MIN, llvm::AMDGPU::EncValues::VGPR_MAX, and llvm::AMDGPU::EncValues::VGPR_MIN.
Referenced by decodeOperand_SReg_128(), decodeOperand_SReg_32(), decodeOperand_SReg_64(), decodeOperand_SReg_64_XEXEC(), decodeOperand_VS_32(), decodeOperand_VS_64(), and decodeOperand_VSrc16().
Definition at line 192 of file AMDGPUDisassembler.cpp.
References llvm::MCDisassembler::CommentStream.
Referenced by createRegOperand(), decodeLiteralConstant(), decodeSpecialReg32(), and decodeSpecialReg64().
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overridevirtual |
Returns the disassembly of a single instruction.
| Instr | - An MCInst to populate with the contents of the instruction. |
| Size | - A value to populate with the size of the instruction, or the number of bytes consumed while attempting to decode an invalid instruction. |
| Address | - The address, in the memory space of region, of the first byte of the instruction. |
| VStream | - The stream to print warnings and diagnostic messages on. |
| CStream | - The stream to print comments and annotations on. |
Implements llvm::MCDisassembler.
Definition at line 133 of file AMDGPUDisassembler.cpp.
References assert(), llvm::MCDisassembler::CommentStream, llvm::MCDisassembler::Fail, llvm::AMDGPU::isVI(), fuzzer::min(), llvm::ArrayRef< T >::size(), llvm::ArrayRef< T >::slice(), llvm::MCDisassembler::STI, and tryDecodeInst().
Definition at line 186 of file AMDGPUDisassembler.cpp.
References llvm::MCDisassembler::getContext(), and llvm::MCContext::getRegisterInfo().
Referenced by createRegOperand(), and createSRegOperand().
Definition at line 445 of file AMDGPUDisassembler.cpp.
References assert(), OPW128, OPW16, OPW32, OPW64, OPW_FIRST_, and OPW_LAST_.
Referenced by decodeSrcOp().
Definition at line 458 of file AMDGPUDisassembler.cpp.
References assert(), OPW128, OPW16, OPW32, OPW64, OPW_FIRST_, and OPW_LAST_.
Referenced by decodeSrcOp().
Definition at line 432 of file AMDGPUDisassembler.cpp.
References assert(), OPW128, OPW16, OPW32, OPW64, OPW_FIRST_, and OPW_LAST_.
Referenced by decodeSrcOp().
| DecodeStatus AMDGPUDisassembler::tryDecodeInst | ( | const uint8_t * | Table, |
| MCInst & | MI, | ||
| uint64_t | Inst, | ||
| uint64_t | Address | ||
| ) | const |
Definition at line 117 of file AMDGPUDisassembler.cpp.
References assert(), llvm::X86Disassembler::decodeInstruction(), llvm::MCDisassembler::Fail, llvm::MCInst::getNumOperands(), llvm::MCInst::getOpcode(), llvm::MCDisassembler::STI, and llvm::MCDisassembler::Success.
Referenced by getInstruction().
1.8.6