14 #ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONSUBTARGET_H
15 #define LLVM_LIB_TARGET_HEXAGON_HEXAGONSUBTARGET_H
25 #define GET_SUBTARGETINFO_HEADER
26 #include "HexagonGenSubtargetInfo.inc"
28 #define Hexagon_SMALL_DATA_THRESHOLD 8
29 #define Hexagon_SLOTS 4
34 virtual void anchor();
36 bool UseMemOps, UseHVXOps, UseHVXDblOps;
56 std::string CPUString;
62 void initializeEnvironment();
81 return &FrameLowering;
130 std::vector<std::unique_ptr<ScheduleDAGMutation>> &Mutations)
134 std::vector<std::unique_ptr<ScheduleDAGMutation>> &Mutations)
const HexagonArchEnum & getHexagonArchVersion() const
AntiDepBreakMode getAntiDepBreakMode() const override
Mutate the DAG as a postpass after normal DAG building.
void getSMSMutations(std::vector< std::unique_ptr< ScheduleDAGMutation >> &Mutations) const override
const HexagonFrameLowering * getFrameLowering() const override
const InstrItineraryData * getInstrItineraryData() const override
getInstrItins - Return the instruction itineraries based on subtarget selection.
unsigned getSmallDataThreshold() const
HexagonSubtarget & initializeSubtargetDependencies(StringRef CPU, StringRef FS)
bool enablePostRAScheduler() const override
bool useHVXDblOps() const
const HexagonInstrInfo * TII
unsigned getL1CacheLineSize() const
const HexagonRegisterInfo * getRegisterInfo() const override
const HexagonRegisterInfo & getRegisterInfo() const
HexagonInstrInfo specifics.
const HexagonTargetLowering * getTargetLowering() const override
HexagonSubtarget(const Triple &TT, StringRef CPU, StringRef FS, const TargetMachine &TM)
bool useHVXSglOps() const
Itinerary data supplied by a subtarget to be used by a target.
bool hasV60TOpsOnly() const
SDep - Scheduling dependency.
HexagonArchEnum HexagonArchVersion
#define Hexagon_SMALL_DATA_THRESHOLD
bool useLongCalls() const
unsigned getL1PrefetchDistance() const
Triple - Helper class for working with autoconf configuration names.
void apply(ScheduleDAGInstrs *DAG) override
bool useBSBScheduling() const
bool enableMachineScheduler() const override
void getPostRAMutations(std::vector< std::unique_ptr< ScheduleDAGMutation >> &Mutations) const override
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small...
bool UseBSBScheduling
True if the target should use Back-Skip-Back scheduling.
bool enableSubRegLiveness() const override
void adjustSchedDependency(SUnit *def, SUnit *use, SDep &dep) const override
Perform target specific adjustments to the latency of a schedule dependency.
const std::string & getCPUString() const
ScheduleDAGInstrs - A ScheduleDAG subclass for scheduling lists of MachineInstrs. ...
Representation of each machine instruction.
bool enableMachineSchedDefaultSched() const override
void ParseSubtargetFeatures(StringRef CPU, StringRef FS)
ParseSubtargetFeatures - Parses features string setting specified subtarget options.
bool modeIEEERndNear() const
const HexagonInstrInfo * getInstrInfo() const override
const HexagonSelectionDAGInfo * getSelectionDAGInfo() const override
bool hasV55TOpsOnly() const
Primary interface to the complete machine description for the target machine.
StringRef - Represent a constant reference to a string, i.e.
bool hasV5TOpsOnly() const
SUnit - Scheduling unit. This is a node in the scheduling DAG.