31 SmallVectorImpl<std::pair<unsigned, const MachineOperand*>> *Clobbers) {
33 while (LRI != LiveRegs.
end()) {
36 Clobbers->push_back(std::make_pair(*LRI, &MO));
37 LRI = LiveRegs.
erase(LRI);
51 unsigned Reg = O->getReg();
55 }
else if (O->isRegMask())
61 if (!O->isReg() || !O->readsReg())
63 unsigned Reg = O->getReg();
75 SmallVectorImpl<std::pair<unsigned, const MachineOperand*>> &Clobbers) {
79 unsigned Reg = O->getReg();
85 Clobbers.push_back(std::make_pair(Reg, &*O));
92 }
else if (O->isRegMask())
97 for (
auto Reg : Clobbers) {
99 if (
Reg.second->isReg() &&
Reg.second->isDead())
107 OS <<
"Live Registers:";
109 OS <<
" (uninitialized)\n";
125 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
126 dbgs() <<
" " << *
this;
131 unsigned Reg)
const {
132 if (LiveRegs.
count(Reg))
137 if (LiveRegs.
count(*R))
145 for (
const auto &LI : MBB.
liveins()) {
147 if (LI.LaneMask.all() || (LI.LaneMask.any() && !S.isValid())) {
151 for (; S.isValid(); ++S) {
152 unsigned SI = S.getSubRegIndex();
173 addBlockLiveIns(*Succ);
198 addBlockLiveIns(MBB);
209 for (
unsigned Reg : LiveRegs) {
211 bool ContainsSuperReg =
false;
213 if (LiveRegs.contains(*SReg)) {
214 ContainsSuperReg =
true;
218 if (ContainsSuperReg)
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
iterator_range< livein_iterator > liveins() const
#define LLVM_DUMP_METHOD
Mark debug helper function definitions like dump() that should not be stripped from debug builds...
bool isValid() const
isValid - returns true if this iterator is not yet at the end.
size_type count(const KeyT &Key) const
count - Returns 1 if this set contains an element identified by Key, 0 otherwise. ...
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
void computeLiveIns(LivePhysRegs &LiveRegs, const TargetRegisterInfo &TRI, MachineBasicBlock &MBB)
Compute the live-in list for MBB assuming all of its successors live-in lists are up-to-date...
LaneBitmask getSubRegIndexLaneMask(unsigned SubIdx) const
Return a bitmask representing the parts of a register that are covered by SubIdx. ...
SparseSet< unsigned >::const_iterator const_iterator
iterator_range< succ_iterator > successors()
const std::vector< CalleeSavedInfo > & getCalleeSavedInfo() const
Returns a reference to call saved info vector for the current function.
MCSuperRegIterator enumerates all super-registers of Reg.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
const_iterator end() const
Reg
All possible values of the reg field in the ModR/M byte.
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted...
void print(raw_ostream &OS) const
Prints the currently live registers to OS.
bool livein_empty() const
Printable PrintReg(unsigned Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubRegIdx=0)
Prints virtual and physical registers with or without a TRI instance.
void stepForward(const MachineInstr &MI, SmallVectorImpl< std::pair< unsigned, const MachineOperand * >> &Clobbers)
Simulates liveness when stepping forward over an instruction(bundle): Remove killed-uses, add defs.
virtual const MCPhysReg * getCalleeSavedRegs(const MachineFunction *MF) const =0
Return a null-terminated list of all of the callee-saved registers on this target.
reverse_iterator rbegin()
static GCRegistry::Add< CoreCLRGC > E("coreclr","CoreCLR-compatible GC")
iterator erase(iterator I)
erase - Erases an existing element identified by a valid iterator.
void addLiveIn(MCPhysReg PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
unsigned const MachineRegisterInfo * MRI
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
Iterator that enumerates the sub-registers of a Reg and the associated sub-register indices...
bool isReserved(unsigned PhysReg) const
isReserved - Returns true when PhysReg is a reserved register.
void addLiveOuts(const MachineBasicBlock &MBB)
Adds all live-out registers of basic block MBB.
void addLiveIns(const MachineBasicBlock &MBB)
Adds all live-in registers of basic block MBB.
void init(const TargetRegisterInfo &TRI)
Clear and initialize the LivePhysRegs set.
MCRegAliasIterator enumerates all registers aliasing Reg.
void stepBackward(const MachineInstr &MI)
Simulates liveness when stepping backwards over an instruction(bundle): Remove Defs, add uses.
bool isCalleeSavedInfoValid() const
Has the callee saved info been calculated yet?
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
void addLiveOutsNoPristines(const MachineBasicBlock &MBB)
Like addLiveOuts() but does not add pristine registers/callee saved registers.
const_iterator begin() const
bool isReturnBlock() const
Convenience function that returns true if the block ends in a return instruction. ...
iterator_range< T > make_range(T x, T y)
Convenience function for iterating over sub-ranges.
void removeRegsInMask(const MachineOperand &MO, SmallVectorImpl< std::pair< unsigned, const MachineOperand * >> *Clobbers)
Removes physical registers clobbered by the regmask operand MO.
ConstMIBundleOperands - Iterate over all operands in a const bundle of machine instructions.
bool empty() const
Returns true if the set is empty.
MachineOperand class - Representation of each machine instruction operand.
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
The CalleeSavedInfo class tracks the information need to locate where a callee saved register is in t...
static bool clobbersPhysReg(const uint32_t *RegMask, unsigned PhysReg)
clobbersPhysReg - Returns true if this RegMask clobbers PhysReg.
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
Representation of each machine instruction.
static bool isPhysicalRegister(unsigned Reg)
Return true if the specified register number is in the physical register namespace.
void removeReg(unsigned Reg)
Removes a physical register, all its sub-registers, and all its super-registers from the set...
SparseSet - Fast set implmentation for objects that can be identified by small unsigned keys...
A set of live physical registers with functions to track liveness when walking backward/forward throu...
bool isValid() const
isValid - Returns true until all the operands have been visited.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
void dump() const
Dumps the currently live registers to the debug output.
bool available(const MachineRegisterInfo &MRI, unsigned Reg) const
Returns true if register Reg and no aliasing register is in the set.
This class implements an extremely fast bulk output stream that can only output to a stream...
static void addPristines(LivePhysRegs &LiveRegs, const MachineFunction &MF, const MachineFrameInfo &MFI, const TargetRegisterInfo &TRI)
Add pristine registers to the given LiveRegs.
const_iterator end() const
const_iterator begin() const
void addReg(unsigned Reg)
Adds a physical register and all its sub-registers to the set.