33 #define EVEX2VEX_DESC "Compressing EVEX instrs to VEX encoding when possible"
34 #define EVEX2VEX_NAME "x86-evex-to-vex-compress"
36 #define DEBUG_TYPE EVEX2VEX_NAME
44 EvexToVexTableType EvexToVex128Table;
45 EvexToVexTableType EvexToVex256Table;
53 void AddTableEntry(EvexToVexTableType &EvexToVexTable, uint16_t EvexOp,
66 AddTableEntry(EvexToVex128Table, Entry.EvexOpcode, Entry.VexOpcode);
71 AddTableEntry(EvexToVex256Table, Entry.EvexOpcode, Entry.VexOpcode);
96 return new EvexToVexInstPass();
106 bool Changed =
false;
114 Changed |= CompressEvexToVexImpl(
MI);
120 void EvexToVexInstPass::AddTableEntry(EvexToVexTableType &EvexToVexTable,
121 uint16_t EvexOp, uint16_t VexOp) {
122 EvexToVexTable[EvexOp] = VexOp;
127 bool EvexToVexInstPass::CompressEvexToVexImpl(
MachineInstr &
MI)
const {
167 auto It = EvexToVex256Table.find(MI.
getOpcode());
168 if (It != EvexToVex256Table.end())
173 else if (IsEVEX_V128) {
175 auto It = EvexToVex128Table.find(MI.
getOpcode());
176 if (It != EvexToVex128Table.end())
183 auto isHiRegIdx = [](
unsigned Reg) {
185 if (
Reg >= X86::XMM16 &&
Reg <= X86::XMM31)
189 if (
Reg >= X86::YMM16 &&
Reg <= X86::YMM31)
201 unsigned Reg = MO.getReg();
203 assert (!(Reg >= X86::ZMM0 && Reg <= X86::ZMM31));
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
iterator_range< mop_iterator > explicit_operands()
Describe properties that are true of each instruction in the target description file.
MachineInstrBuilder MachineInstrBuilder &DefMI const MCInstrDesc & Desc
const MCInstrDesc & getDesc() const
Returns the target instruction descriptor of this MachineInstr.
FunctionPass * createX86EvexToVexInsts()
This pass replaces EVEX ecnoded of AVX-512 instructiosn by VEX encoding when possible in order to red...
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
const HexagonInstrInfo * TII
Reg
All possible values of the reg field in the ModR/M byte.
void initializeEvexToVexInstPassPass(PassRegistry &)
static const X86EvexToVexCompressTableEntry X86EvexToVex128CompressTable[]
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
static const X86EvexToVexCompressTableEntry X86EvexToVex256CompressTable[]
FunctionPass class - This class is used to implement most global optimizations.
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
void setDesc(const MCInstrDesc &tid)
Replace the instruction descriptor (thus opcode) of the current instruction with a new one...
MachineOperand class - Representation of each machine instruction operand.
MachineFunctionProperties & set(Property P)
Representation of each machine instruction.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
StringRef - Represent a constant reference to a string, i.e.
void setAsmPrinterFlag(uint8_t Flag)
Set a flag for the AsmPrinter.
Properties which a MachineFunction may have at a given point in time.