26 #define DEBUG_TYPE "aarch64-stp-suppress"
28 #define STPSUPPRESS_PASS_NAME "AArch64 Store Pair Suppression"
68 return new AArch64StorePairSuppress();
86 unsigned SCIdx =
TII->get(AArch64::STPDi).getSchedClass();
88 SchedModel.getMCSchedModel()->getSchedClassDesc(SCIdx);
93 if (ResLenWithSTP > ResLength) {
95 <<
" resources " << ResLength <<
" -> " << ResLenWithSTP
110 bool AArch64StorePairSuppress::isNarrowFPStore(
const MachineInstr &
MI) {
114 case AArch64::STRSui:
115 case AArch64::STRDui:
116 case AArch64::STURSi:
117 case AArch64::STURDi:
122 bool AArch64StorePairSuppress::runOnMachineFunction(
MachineFunction &MF) {
131 Traces = &getAnalysis<MachineTraceMetrics>();
136 if (!SchedModel.hasInstrSchedModel()) {
137 DEBUG(
dbgs() <<
" Skipping pass: no machine model present.\n");
145 for (
auto &
MBB : MF) {
146 bool SuppressSTP =
false;
147 unsigned PrevBaseReg = 0;
148 for (
auto &MI :
MBB) {
149 if (!isNarrowFPStore(MI))
154 if (PrevBaseReg == BaseReg) {
156 if (!SuppressSTP && shouldAddSTPToBlock(MI.
getParent()))
159 DEBUG(
dbgs() <<
"Unpairing store " << MI <<
"\n");
161 TII->suppressLdStPair(MI);
163 PrevBaseReg = BaseReg;
AnalysisUsage & addPreserved()
Add the specified Pass class to the set of analyses preserved by this pass.
INITIALIZE_PASS(AArch64StorePairSuppress,"aarch64-stp-suppress", STPSUPPRESS_PASS_NAME, false, false) FunctionPass *llvm
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
int getNumber() const
MachineBasicBlocks are uniquely numbered at the function level, unless they're not in a MachineFuncti...
A trace ensemble is a collection of traces selected using the same strategy, for example 'minimum res...
const Function * getFunction() const
getFunction - Return the LLVM function that this machine code represents
AnalysisUsage & addRequired()
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
Provide an instruction scheduling machine model to CodeGen passes.
const HexagonInstrInfo * TII
const MCSchedModel & getSchedModel() const
Get the machine model for this subtarget's CPU.
Select the trace through a block that has the fewest instructions.
INITIALIZE_PASS(AArch64VectorByElementOpt,"aarch64-vectorbyelement-opt", AARCH64_VECTOR_BY_ELEMENT_OPT_NAME, false, false) bool AArch64VectorByElementOpt unsigned SCIdx
Based only on latency of instructions, determine if it is cost efficient to replace the instruction I...
#define STPSUPPRESS_PASS_NAME
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
const MachineBasicBlock * getParent() const
unsigned const MachineRegisterInfo * MRI
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
Summarize the scheduling resources required for an instruction of a particular scheduling class...
unsigned getResourceLength(ArrayRef< const MachineBasicBlock * > Extrablocks=None, ArrayRef< const MCSchedClassDesc * > ExtraInstrs=None, ArrayRef< const MCSchedClassDesc * > RemoveInstrs=None) const
Return the resource length of the trace.
Represent the analysis usage information of a pass.
FunctionPass class - This class is used to implement most global optimizations.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
A trace represents a plausible sequence of executed basic blocks that passes through the current basi...
void setPreservesCFG()
This function should be called by the pass, iff they do not:
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
TargetSubtargetInfo - Generic base class for all target subtargets.
Representation of each machine instruction.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
FunctionPass * createAArch64StorePairSuppressPass()
virtual const TargetInstrInfo * getInstrInfo() const
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
StringRef - Represent a constant reference to a string, i.e.
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
bool getMemOpBaseRegImmOfs(MachineInstr &LdSt, unsigned &BaseReg, int64_t &Offset, const TargetRegisterInfo *TRI) const override
Get the base register and byte offset of a load/store instr.
const MCSchedClassDesc * SCDesc
void initializeAArch64StorePairSuppressPass(PassRegistry &)