16 #ifndef LLVM_CODEGEN_GLOBALISEL_INSTRUCTIONSELECTOR_H
17 #define LLVM_CODEGEN_GLOBALISEL_INSTRUCTIONSELECTOR_H
22 class TargetInstrInfo;
23 class TargetRegisterInfo;
bool constrainSelectedInstRegOperands(MachineInstr &I, const TargetInstrInfo &TII, const TargetRegisterInfo &TRI, const RegisterBankInfo &RBI) const
Mutate the newly-selected instruction I to constrain its (possibly generic) virtual register operands...
Holds all the information related to register banks.
const HexagonInstrInfo * TII
TargetInstrInfo - Interface to description of machine instruction set.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
virtual bool select(MachineInstr &I) const =0
Select the (possibly generic) instruction I to only use target-specific opcodes.
RegisterBankInfo(RegisterBank **RegBanks, unsigned NumRegBanks)
Create a RegisterBankInfo that can accomodate up to NumRegBanks RegisterBank instances.
virtual ~InstructionSelector()
Provides the logic to select generic machine instructions.
Representation of each machine instruction.