28 #define DEBUG_TYPE "machine-trace-metrics"
34 "machine-trace-metrics",
"Machine Trace Metrics",
false,
true)
40 MachineTraceMetrics::MachineTraceMetrics()
59 Loops = &getAnalysis<MachineLoopInfo>();
72 Ensembles[
i] =
nullptr;
86 assert(MBB &&
"No basic block");
99 for (
const auto &
MI : *MBB) {
100 if (
MI.isTransient())
116 assert(PI->ProcResourceIdx < PRKinds &&
"Bad processor resource kind");
117 PRCycles[PI->ProcResourceIdx] += PI->Cycles;
123 unsigned PROffset = MBB->getNumber() * PRKinds;
124 for (
unsigned K = 0; K != PRKinds; ++K)
125 ProcResourceCycles[PROffset + K] =
133 assert(BlockInfo[MBBNum].hasResources() &&
134 "getResources() must be called before getProcResourceCycles()");
136 assert((MBBNum+1) * PRKinds <= ProcResourceCycles.
size());
147 BlockInfo.resize(
MTM.BlockInfo.size());
149 ProcResourceDepths.
resize(
MTM.BlockInfo.size() * PRKinds);
150 ProcResourceHeights.
resize(
MTM.BlockInfo.size() * PRKinds);
158 return MTM.Loops->getLoopFor(MBB);
163 void MachineTraceMetrics::Ensemble::
166 unsigned PRKinds = MTM.SchedModel.getNumProcResourceKinds();
167 unsigned PROffset = MBB->
getNumber() * PRKinds;
173 std::fill(ProcResourceDepths.begin() + PROffset,
174 ProcResourceDepths.begin() + PROffset + PRKinds, 0);
181 TraceBlockInfo *PredTBI = &BlockInfo[PredNum];
182 assert(PredTBI->hasValidDepth() &&
"Trace above has not been computed yet");
183 const FixedBlockInfo *PredFBI = MTM.getResources(TBI->
Pred);
184 TBI->
InstrDepth = PredTBI->InstrDepth + PredFBI->InstrCount;
185 TBI->
Head = PredTBI->Head;
190 for (
unsigned K = 0; K != PRKinds; ++K)
191 ProcResourceDepths[PROffset + K] = PredPRDepths[K] + PredPRCycles[K];
196 void MachineTraceMetrics::Ensemble::
198 TraceBlockInfo *TBI = &BlockInfo[MBB->
getNumber()];
199 unsigned PRKinds = MTM.SchedModel.getNumProcResourceKinds();
200 unsigned PROffset = MBB->
getNumber() * PRKinds;
203 TBI->InstrHeight = MTM.getResources(MBB)->InstrCount;
209 std::copy(PRCycles.
begin(), PRCycles.
end(),
210 ProcResourceHeights.begin() + PROffset);
216 unsigned SuccNum = TBI->Succ->getNumber();
217 TraceBlockInfo *SuccTBI = &BlockInfo[SuccNum];
218 assert(SuccTBI->hasValidHeight() &&
"Trace below has not been computed yet");
219 TBI->InstrHeight += SuccTBI->InstrHeight;
220 TBI->Tail = SuccTBI->Tail;
224 for (
unsigned K = 0; K != PRKinds; ++K)
225 ProcResourceHeights[PROffset + K] = SuccPRHeights[K] + PRCycles[K];
255 unsigned PRKinds = MTM.SchedModel.getNumProcResourceKinds();
256 assert((MBBNum+1) * PRKinds <= ProcResourceDepths.size());
257 return makeArrayRef(ProcResourceDepths.data() + MBBNum * PRKinds, PRKinds);
268 unsigned PRKinds = MTM.SchedModel.getNumProcResourceKinds();
269 assert((MBBNum+1) * PRKinds <= ProcResourceHeights.size());
270 return makeArrayRef(ProcResourceHeights.data() + MBBNum * PRKinds, PRKinds);
301 const char *
getName()
const override {
return "MinInstr"; }
318 if (CurLoop && MBB == CurLoop->
getHeader())
320 unsigned CurCount = MTM.getResources(MBB)->InstrCount;
322 unsigned BestDepth = 0;
325 getDepthResources(Pred);
331 if (!Best || Depth < BestDepth) {
346 unsigned BestHeight = 0;
349 if (CurLoop && Succ == CurLoop->
getHeader())
355 getHeightResources(Succ);
361 if (!Best || Height < BestHeight) {
386 BlockInfo[MBB->
getNumber()].invalidate();
419 : Blocks(blocks),
Loops(loops), Downward(
false) {}
441 if (
const MachineLoop *FromLoop = LB.Loops->getLoopFor(*From)) {
443 if ((LB.Downward ? To : *From) == FromLoop->getHeader())
452 return LB.Visited.insert(To).second;
462 LoopBounds Bounds(BlockInfo, MTM.Loops);
465 Bounds.Downward =
false;
466 Bounds.Visited.clear();
468 DEBUG(
dbgs() <<
" pred for BB#" <<
I->getNumber() <<
": ");
469 TraceBlockInfo &TBI = BlockInfo[
I->getNumber()];
471 TBI.Pred = pickTracePred(
I);
474 dbgs() <<
"BB#" << TBI.Pred->getNumber() <<
'\n';
479 computeDepthResources(
I);
483 Bounds.Downward =
true;
484 Bounds.Visited.clear();
486 DEBUG(
dbgs() <<
" succ for BB#" <<
I->getNumber() <<
": ");
487 TraceBlockInfo &TBI = BlockInfo[
I->getNumber()];
489 TBI.Succ = pickTraceSucc(
I);
492 dbgs() <<
"BB#" << TBI.Succ->getNumber() <<
'\n';
497 computeHeightResources(
I);
521 if (TBI.
Succ == MBB) {
529 }
while (!WorkList.
empty());
546 if (TBI.
Pred == MBB) {
554 }
while (!WorkList.
empty());
562 for (
const auto &
I : *BadMBB)
568 assert(BlockInfo.size() == MTM.MF->getNumBlockIDs() &&
569 "Outdated BlockInfo size");
570 for (
unsigned Num = 0, e = BlockInfo.size(); Num != e; ++Num) {
576 "Trace is broken, depth should have been invalidated.");
578 assert(!(Loop && MBB == Loop->getHeader()) &&
"Trace contains backedge");
584 "Trace is broken, height should have been invalidated.");
587 assert(!(Loop && Loop == SuccLoop && TBI.
Succ == Loop->getHeader()) &&
588 "Trace contains backedge");
611 DataDep(
const MachineInstr *DefMI,
unsigned DefOp,
unsigned UseOp)
612 : DefMI(DefMI), DefOp(DefOp), UseOp(UseOp) {}
622 assert((++DefI).atEnd() &&
"Register has multiple defs");
636 bool HasPhysRegs =
false;
687 unsigned getSparseSetIndex()
const {
return RegUnit; }
689 LiveRegUnit(
unsigned RU) : RegUnit(RU), Cycle(0),
MI(nullptr),
Op(0) {}
723 if (I == RegUnits.
end())
732 for (
unsigned Kill : Kills)
734 RegUnits.
erase(*Units);
737 for (
unsigned DefOp : LiveDefOps) {
740 LiveRegUnit &LRU = RegUnits[*Units];
758 unsigned MachineTraceMetrics::Ensemble::
759 computeCrossBlockCriticalPath(
const TraceBlockInfo &TBI) {
760 assert(TBI.HasValidInstrDepths &&
"Missing depth info");
761 assert(TBI.HasValidInstrHeights &&
"Missing height info");
763 for (
const LiveInReg &LIR : TBI.LiveIns) {
766 const MachineInstr *DefMI = MTM.MRI->getVRegDef(LIR.Reg);
769 if (!DefTBI.isUsefulDominator(TBI))
771 unsigned Len = LIR.Height + Cycles[DefMI].Depth;
772 MaxLen = std::max(MaxLen, Len);
779 void MachineTraceMetrics::Ensemble::
786 TraceBlockInfo &TBI = BlockInfo[MBB->
getNumber()];
787 assert(TBI.hasValidDepth() &&
"Incomplete trace");
788 if (TBI.HasValidInstrDepths)
803 while (!Stack.
empty()) {
806 TraceBlockInfo &TBI = BlockInfo[MBB->
getNumber()];
807 TBI.HasValidInstrDepths =
true;
808 TBI.CriticalPath = 0;
812 dbgs() <<
format(
"%7u Instructions\n", TBI.InstrDepth);
814 for (
unsigned K = 0; K != PRDepths.
size(); ++K)
816 unsigned Factor = MTM.SchedModel.getResourceFactor(K);
817 dbgs() <<
format(
"%6uc @ ", MTM.getCycles(PRDepths[K]))
818 << MTM.SchedModel.getProcResource(K)->Name <<
" ("
819 << PRDepths[K]/Factor <<
" ops x" << Factor <<
")\n";
824 if (TBI.HasValidInstrHeights)
825 TBI.CriticalPath = computeCrossBlockCriticalPath(TBI);
827 for (
const auto &
UseMI : *MBB) {
837 for (
const DataDep &Dep : Deps) {
838 const TraceBlockInfo&DepTBI =
839 BlockInfo[Dep.DefMI->getParent()->getNumber()];
841 if (!DepTBI.isUsefulDominator(TBI))
843 assert(DepTBI.HasValidInstrDepths &&
"Inconsistent dependency");
844 unsigned DepCycle = Cycles.lookup(Dep.DefMI).Depth;
846 if (!Dep.DefMI->isTransient())
847 DepCycle += MTM.SchedModel
848 .computeOperandLatency(Dep.DefMI, Dep.DefOp, &
UseMI, Dep.UseOp);
849 Cycle = std::max(Cycle, DepCycle);
852 InstrCycles &MICycles = Cycles[&
UseMI];
853 MICycles.Depth = Cycle;
855 if (!TBI.HasValidInstrHeights) {
860 TBI.CriticalPath = std::max(TBI.CriticalPath, Cycle + MICycles.Height);
861 DEBUG(
dbgs() << TBI.CriticalPath <<
'\t' << Cycle <<
'\t' <<
UseMI);
893 if (I == RegUnits.
end())
895 unsigned DepHeight = I->Cycle;
902 Height = std::max(Height, DepHeight);
909 for (
unsigned i = 0, e = ReadOps.
size();
i != e; ++
i) {
912 LiveRegUnit &LRU = RegUnits[*Units];
914 if (LRU.Cycle <= Height && LRU.MI != &MI) {
935 if (!Dep.DefMI->isTransient())
942 std::tie(I, New) = Heights.
insert(std::make_pair(Dep.DefMI, UseHeight));
947 if (I->second < UseHeight)
948 I->second = UseHeight;
955 void MachineTraceMetrics::Ensemble::
958 assert(!Trace.
empty() &&
"Trace should contain at least one block");
964 for (
unsigned i = Trace.
size();
i; --
i) {
968 TraceBlockInfo &TBI = BlockInfo[MBB->
getNumber()];
970 TBI.LiveIns.push_back(Reg);
977 void MachineTraceMetrics::Ensemble::
983 TraceBlockInfo &TBI = BlockInfo[MBB->
getNumber()];
984 assert(TBI.hasValidHeight() &&
"Incomplete trace");
985 if (TBI.HasValidInstrHeights)
1005 TraceBlockInfo &TBI = BlockInfo[MBB->
getNumber()];
1006 for (LiveInReg &LI : TBI.LiveIns) {
1009 unsigned &Height = Heights[MTM.MRI->getVRegDef(LI.Reg)];
1010 if (Height < LI.Height)
1015 RegUnits[LI.Reg].Cycle = LI.Height;
1025 TraceBlockInfo &TBI = BlockInfo[MBB->
getNumber()];
1026 TBI.HasValidInstrHeights =
true;
1027 TBI.CriticalPath = 0;
1030 dbgs() <<
format(
"%7u Instructions\n", TBI.InstrHeight);
1032 for (
unsigned K = 0; K != PRHeights.
size(); ++K)
1034 unsigned Factor = MTM.SchedModel.getResourceFactor(K);
1035 dbgs() <<
format(
"%6uc @ ", MTM.getCycles(PRHeights[K]))
1036 << MTM.SchedModel.getProcResource(K)->Name <<
" ("
1037 << PRHeights[K]/Factor <<
" ops x" << Factor <<
")\n";
1052 for (
const auto &PHI : *Succ) {
1057 if (!Deps.
empty()) {
1059 unsigned Height = TBI.Succ ? Cycles.lookup(&PHI).Height : 0;
1060 DEBUG(
dbgs() <<
"pred\t" << Height <<
'\t' << PHI);
1063 addLiveIns(Deps.
front().DefMI, Deps.
front().DefOp, Stack);
1077 if (HeightI != Heights.
end()) {
1078 Cycle = HeightI->second;
1080 Heights.
erase(HeightI);
1094 for (
const DataDep &Dep : Deps)
1095 if (
pushDepHeight(Dep, MI, Cycle, Heights, MTM.SchedModel, MTM.TII))
1096 addLiveIns(Dep.DefMI, Dep.DefOp, Stack);
1098 InstrCycles &MICycles = Cycles[&
MI];
1099 MICycles.Height = Cycle;
1100 if (!TBI.HasValidInstrDepths) {
1105 TBI.CriticalPath = std::max(TBI.CriticalPath, Cycle + MICycles.Depth);
1106 DEBUG(
dbgs() << TBI.CriticalPath <<
'\t' << Cycle <<
'\t' << MI);
1112 for (LiveInReg &LIR : TBI.LiveIns) {
1113 const MachineInstr *DefMI = MTM.MRI->getVRegDef(LIR.Reg);
1114 LIR.Height = Heights.
lookup(DefMI);
1120 RI = RegUnits.
begin(), RE = RegUnits.
end(); RI != RE; ++RI) {
1121 TBI.LiveIns.push_back(LiveInReg(RI->RegUnit, RI->Cycle));
1123 <<
'@' << RI->Cycle);
1127 if (!TBI.HasValidInstrDepths)
1130 TBI.CriticalPath = std::max(TBI.CriticalPath,
1131 computeCrossBlockCriticalPath(TBI));
1132 DEBUG(
dbgs() <<
"Critical path: " << TBI.CriticalPath <<
'\n');
1143 computeInstrDepths(MBB);
1145 computeInstrHeights(MBB);
1147 return Trace(*
this, TBI);
1153 "MI must be in the trace center block");
1155 return getCriticalPath() - (Cyc.
Depth + Cyc.
Height);
1163 assert(Deps.
size() == 1 &&
"PHI doesn't have MBB as a predecessor");
1164 DataDep &Dep = Deps.
front();
1165 unsigned DepCycle = getInstrCycles(*Dep.DefMI).Depth;
1167 if (!Dep.DefMI->isTransient())
1168 DepCycle += TE.MTM.SchedModel.computeOperandLatency(Dep.DefMI, Dep.DefOp,
1181 for (
unsigned K = 0; K != PRDepths.
size(); ++K)
1182 PRMax = std::max(PRMax, PRDepths[K] + PRCycles[K]);
1184 for (
unsigned K = 0; K != PRDepths.
size(); ++K)
1185 PRMax = std::max(PRMax, PRDepths[K]);
1188 PRMax = TE.MTM.getCycles(PRMax);
1191 unsigned Instrs = TBI.InstrDepth;
1194 Instrs += TE.MTM.BlockInfo[getBlockNum()].InstrCount;
1195 if (
unsigned IW = TE.MTM.SchedModel.getIssueWidth())
1198 return std::max(Instrs, PRMax);
1212 unsigned ResourceIdx)
1214 unsigned Cycles = 0;
1219 PI = TE.MTM.SchedModel.getWriteProcResBegin(
SC),
1220 PE = TE.MTM.SchedModel.getWriteProcResEnd(
SC);
1222 if (PI->ProcResourceIdx != ResourceIdx)
1225 (PI->Cycles * TE.MTM.SchedModel.getResourceFactor(ResourceIdx));
1231 for (
unsigned K = 0; K != PRDepths.
size(); ++K) {
1232 unsigned PRCycles = PRDepths[K] + PRHeights[K];
1234 PRCycles += TE.MTM.getProcResourceCycles(MBB->
getNumber())[K];
1235 PRCycles += extraCycles(ExtraInstrs, K);
1236 PRCycles -= extraCycles(RemoveInstrs, K);
1237 PRMax = std::max(PRMax, PRCycles);
1240 PRMax = TE.MTM.getCycles(PRMax);
1243 unsigned Instrs = TBI.InstrDepth + TBI.InstrHeight;
1246 Instrs += TE.MTM.getResources(MBB)->InstrCount;
1247 Instrs += ExtraInstrs.
size();
1248 Instrs -= RemoveInstrs.
size();
1249 if (
unsigned IW = TE.MTM.SchedModel.getIssueWidth())
1252 return std::max(Instrs, PRMax);
1267 OS <<
getName() <<
" ensemble:\n";
1268 for (
unsigned i = 0, e = BlockInfo.size();
i != e; ++
i) {
1269 OS <<
" BB#" <<
i <<
'\t';
1270 BlockInfo[
i].print(OS);
1276 if (hasValidDepth()) {
1277 OS <<
"depth=" << InstrDepth;
1279 OS <<
" pred=BB#" << Pred->getNumber();
1282 OS <<
" head=BB#" << Head;
1283 if (HasValidInstrDepths)
1286 OS <<
"depth invalid";
1288 if (hasValidHeight()) {
1289 OS <<
"height=" << InstrHeight;
1291 OS <<
" succ=BB#" << Succ->getNumber();
1294 OS <<
" tail=BB#" << Tail;
1295 if (HasValidInstrHeights)
1298 OS <<
"height invalid";
1299 if (HasValidInstrDepths && HasValidInstrHeights)
1300 OS <<
", crit=" << CriticalPath;
1304 unsigned MBBNum = &TBI - &TE.BlockInfo[0];
1306 OS << TE.getName() <<
" trace BB#" << TBI.Head <<
" --> BB#" << MBBNum
1307 <<
" --> BB#" << TBI.Tail <<
':';
1308 if (TBI.hasValidHeight() && TBI.hasValidDepth())
1309 OS <<
' ' << getInstrCount() <<
" instrs.";
1310 if (TBI.HasValidInstrDepths && TBI.HasValidInstrHeights)
1311 OS <<
' ' << TBI.CriticalPath <<
" cycles.";
1314 OS <<
"\nBB#" << MBBNum;
1317 OS <<
" <- BB#" << Num;
1318 Block = &TE.BlockInfo[Num];
1325 OS <<
" -> BB#" << Num;
1326 Block = &TE.BlockInfo[Num];
void print(raw_ostream &) const
void push_back(const T &Elt)
bool HasValidInstrDepths
Instruction depths have been computed. This implies hasValidDepth().
const_iterator end(StringRef path)
Get end iterator over path.
mop_iterator operands_end()
const MCSchedClassDesc * resolveSchedClass(const MachineInstr *MI) const
Return the MCSchedClassDesc for this instruction.
MachineInstr * getParent()
getParent - Return the instruction that this operand belongs to.
ArrayRef< unsigned > getProcResourceDepths(unsigned MBBNum) const
Get an array of processor resource depths for MBB.
void print(raw_ostream &) const
void print(raw_ostream &) const
ValueT lookup(const KeyT &Val) const
lookup - Return the entry for the specified key, or a default constructed value if no such entry exis...
bool isValid() const
isValid - returns true if this iterator is not yet at the end.
MachineBasicBlock * getMBB() const
bool atEnd() const
atEnd - return true if this iterator is equal to reg_end() on the value.
int getNumber() const
MachineBasicBlocks are uniquely numbered at the function level, unless they're not in a MachineFuncti...
const MachineBasicBlock * Pred
Trace predecessor, or NULL for the first block in the trace.
unsigned Depth
Earliest issue cycle as determined by data dependencies and instruction latencies from the beginning ...
static bool isVirtualRegister(unsigned Reg)
Return true if the specified register number is in the virtual register namespace.
bool HasCalls
True when the block contains calls.
unsigned getOperandNo(const_mop_iterator I) const
Returns the number of the operand iterator I points to.
void init(const MCSchedModel &sm, const TargetSubtargetInfo *sti, const TargetInstrInfo *tii)
Initialize the machine model for instruction scheduling.
void invalidateHeight()
Invalidate height resources when a block below this one has changed.
const_iterator begin(StringRef path)
Get begin iterator over path.
A trace ensemble is a collection of traces selected using the same strategy, for example 'minimum res...
unsigned getResourceFactor(unsigned ResIdx) const
Multiply the number of units consumed for a resource by this factor to normalize it relative to other...
static unsigned InstrCount
machine trace Machine Trace false
po_iterator_storage(LoopBounds &lb)
BlockT * getHeader() const
unsigned InstrCount
The number of non-trivial instructions in the block.
iterator_range< succ_iterator > successors()
std::pair< iterator, bool > insert(const std::pair< KeyT, ValueT > &KV)
AnalysisUsage & addRequired()
#define INITIALIZE_PASS_DEPENDENCY(depName)
unsigned getNumBlockIDs() const
getNumBlockIDs - Return the number of MBB ID's allocated.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
Provide an instruction scheduling machine model to CodeGen passes.
const HexagonInstrInfo * TII
ArrayRef< T > makeArrayRef(const T &OneElt)
Construct an ArrayRef from a single element.
const MachineLoop * getLoopFor(const MachineBasicBlock *) const
Strategy
Strategies for selecting traces.
bool isUsefulDominator(const TraceBlockInfo &TBI) const
Assuming that this is a dominator of TBI, determine if it contains useful instruction depths...
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
bool isReg() const
isReg - Tests if this is a MO_Register operand.
const_iterator end() const
Reg
All possible values of the reg field in the ModR/M byte.
static StringRef getName(Value *V)
void verifyAnalysis() const override
verifyAnalysis() - This member can be implemented by a analysis pass to check state of analysis infor...
const MCSchedModel & getSchedModel() const
Get the machine model for this subtarget's CPU.
LLVM_NODISCARD bool empty() const
unsigned getNumOperands() const
Access to explicit operands of the instruction.
Select the trace through a block that has the fewest instructions.
const TraceBlockInfo * getHeightResources(const MachineBasicBlock *) const
COFF::MachineTypes Machine
void finishPostorder(const MachineBasicBlock *)
Printable PrintReg(unsigned Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubRegIdx=0)
Prints virtual and physical registers with or without a TRI instance.
size_t size() const
size - Get the array size.
static GCRegistry::Add< CoreCLRGC > E("coreclr","CoreCLR-compatible GC")
iterator erase(iterator I)
erase - Erases an existing element identified by a valid iterator.
const MachineBasicBlock * getParent() const
format_object< Ts...> format(const char *Fmt, const Ts &...Vals)
These are helper functions used to produce formatted output.
TargetInstrInfo - Interface to description of machine instruction set.
bool isDebugValue() const
void invalidateDepth()
Invalidate depth resources when some block above this one has changed.
INITIALIZE_PASS_BEGIN(MachineTraceMetrics,"machine-trace-metrics","Machine Trace Metrics", false, true) INITIALIZE_PASS_END(MachineTraceMetrics
void invalidate(const MachineBasicBlock *MBB)
Invalidate traces through BadMBB.
bool erase(const KeyT &Val)
* if(!EatIfPresent(lltok::kw_thread_local)) return false
ParseOptionalThreadLocal := /*empty.
unsigned const MachineRegisterInfo * MRI
MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...
bool HasValidInstrHeights
Instruction heights have been computed. This implies hasValidHeight().
bool insertEdge(Optional< const MachineBasicBlock * > From, const MachineBasicBlock *To)
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
unsigned InstrHeight
Accumulated number of instructions in the trace below this block.
Ensemble * getEnsemble(Strategy)
Get the trace ensemble representing the given trace selection strategy.
Identify one of the processor resource kinds consumed by a particular scheduling class for the specif...
void releaseMemory() override
releaseMemory() - This member can be implemented by a pass if it wants to be able to release its memo...
MachineInstrBuilder & UseMI
Ensemble(MachineTraceMetrics *)
MachineTraceMetrics & MTM
const MachineOperand & getOperand(unsigned i) const
Summarize the scheduling resources required for an instruction of a particular scheduling class...
unsigned getOperandNo() const
getOperandNo - Return the operand # of this MachineOperand in its MachineInstr.
Per-basic block information that doesn't depend on the trace through the block.
unsigned getResourceLength(ArrayRef< const MachineBasicBlock * > Extrablocks=None, ArrayRef< const MCSchedClassDesc * > ExtraInstrs=None, ArrayRef< const MCSchedClassDesc * > RemoveInstrs=None) const
Return the resource length of the trace.
Represent the analysis usage information of a pass.
const MachineBasicBlock * Succ
Trace successor, or NULL for the last block in the trace.
bool contains(const LoopT *L) const
Return true if the specified loop is contained within in this loop.
Default po_iterator_storage implementation with an internal set object.
INITIALIZE_PASS_END(RegBankSelect, DEBUG_TYPE,"Assign register bank of generic virtual registers", false, false) RegBankSelect
const FixedBlockInfo * getResources(const MachineBasicBlock *)
Get the fixed resource information about MBB. Compute it on demand.
void setUniverse(unsigned U)
setUniverse - Set the universe size which determines the largest key the set can hold.
iterator_range< pred_iterator > predecessors()
bool empty() const
empty - Check if the array is empty.
unsigned getNumProcResourceKinds() const
Get the number of kinds of resources for this target.
const TraceBlockInfo * getDepthResources(const MachineBasicBlock *) const
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
A trace represents a plausible sequence of executed basic blocks that passes through the current basi...
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
const_iterator begin() const
ProcResIter getWriteProcResEnd(const MCSchedClassDesc *SC) const
static void updatePhysDepsDownwards(const MachineInstr *UseMI, SmallVectorImpl< DataDep > &Deps, SparseSet< LiveRegUnit > &RegUnits, const TargetRegisterInfo *TRI)
ArrayRef< unsigned > getProcResourceHeights(unsigned MBBNum) const
Get an array of processor resource heights for MBB.
bool hasInstrSchedModel() const
Return true if this machine model includes an instruction-level scheduling model. ...
machine trace Machine Trace Metrics
Printable PrintRegUnit(unsigned Unit, const TargetRegisterInfo *TRI)
Create Printable object to print register units on a raw_ostream.
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements...
MachineOperand class - Representation of each machine instruction operand.
unsigned Height
Minimum number of cycles from this instruction is issued to the of the trace, as determined by data d...
unsigned getPHIDepth(const MachineInstr &PHI) const
Return the Depth of a PHI instruction in a trace center block successor.
bool hasValidDepth() const
Returns true if the depth resources have been computed from the trace above this block.
bool isSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB is a successor of this block.
LLVM_NODISCARD T pop_back_val()
CHAIN = SC CHAIN, Imm128 - System call.
iterator_range< po_ext_iterator< T, SetType > > post_order_ext(const T &G, SetType &S)
char & MachineTraceMetricsID
MachineTraceMetrics - This pass computes critical path and CPU resource usage in an ensemble of trace...
bool isTransient() const
Return true if this is a transient instruction that is either very likely to be eliminated during reg...
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Per-basic block information that relates to a specific trace through the block.
void setPreservesAll()
Set by analyses that do not transform their input at all.
void invalidate(const MachineBasicBlock *MBB)
Invalidate cached information about MBB.
unsigned Head
The block number of the head of the trace. (When hasValidDepth()).
def_iterator def_begin(unsigned RegNo) const
static bool pushDepHeight(const DataDep &Dep, const MachineInstr &UseMI, unsigned UseHeight, MIHeightMap &Heights, const TargetSchedModel &SchedModel, const TargetInstrInfo *TII)
bool hasResources() const
Returns true when resource information for this block has been computed.
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
TargetSubtargetInfo - Generic base class for all target subtargets.
iterator_range< ipo_ext_iterator< T, SetType > > inverse_post_order_ext(const T &G, SetType &S)
static void getPHIDeps(const MachineInstr &UseMI, SmallVectorImpl< DataDep > &Deps, const MachineBasicBlock *Pred, const MachineRegisterInfo *MRI)
unsigned getInstrSlack(const MachineInstr &MI) const
Return the slack of MI.
Representation of each machine instruction.
static bool isPhysicalRegister(unsigned Reg)
Return true if the specified register number is in the physical register namespace.
pointer data()
Return a pointer to the vector's buffer, even if empty().
SparseSet - Fast set implmentation for objects that can be identified by small unsigned keys...
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Represents a single loop in the control flow graph.
iterator find(const KeyT &Key)
find - Find an element by its key.
InstrCycles represents the cycle height and depth of an instruction in a trace.
LLVM_ATTRIBUTE_ALWAYS_INLINE size_type size() const
static bool isExitingLoop(const MachineLoop *From, const MachineLoop *To)
bool runOnMachineFunction(MachineFunction &) override
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
iterator find(const KeyT &Val)
bool hasValidHeight() const
Returns true if the height resources have been computed from the trace below this block...
unsigned computeOperandLatency(const MachineInstr *DefMI, unsigned DefOperIdx, const MachineInstr *UseMI, unsigned UseOperIdx) const
Compute operand latency based on the available machine model.
unsigned getReg() const
getReg - Returns the register number.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
virtual const TargetInstrInfo * getInstrInfo() const
mop_iterator operands_begin()
unsigned getResourceDepth(bool Bottom) const
Return the resource depth of the top/bottom of the trace center block.
unsigned InstrDepth
Accumulated number of instructions in the trace above this block.
bool isDepInTrace(const MachineInstr &DefMI, const MachineInstr &UseMI) const
A dependence is useful if the basic block of the defining instruction is part of the trace of the use...
This class implements an extremely fast bulk output stream that can only output to a stream...
bool isPredecessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB is a predecessor of this block.
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
ArrayRef< unsigned > getProcResourceCycles(unsigned MBBNum) const
Get the scaled number of cycles used per processor resource in MBB.
bool readsReg() const
readsReg - Returns true if this operand reads the previous value of its register. ...
ProcResIter getWriteProcResBegin(const MCSchedClassDesc *SC) const
reg_begin/reg_end - Provide iteration support to walk over all definitions and uses of a register wit...
static bool getDataDeps(const MachineInstr &UseMI, SmallVectorImpl< DataDep > &Deps, const MachineRegisterInfo *MRI)
DenseMap< const MachineInstr *, unsigned > MIHeightMap
static unsigned updatePhysDepsUpwards(const MachineInstr &MI, unsigned Height, SparseSet< LiveRegUnit > &RegUnits, const TargetSchedModel &SchedModel, const TargetInstrInfo *TII, const TargetRegisterInfo *TRI)
Trace getTrace(const MachineBasicBlock *MBB)
Get the trace that passes through MBB.
void getAnalysisUsage(AnalysisUsage &) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.