40 #define GET_INSTRINFO_MC_DESC
41 #include "HexagonGenInstrInfo.inc"
43 #define GET_SUBTARGETINFO_MC_DESC
44 #include "HexagonGenSubtargetInfo.inc"
46 #define GET_REGINFO_MC_DESC
47 #include "HexagonGenRegisterInfo.inc"
51 cl::desc(
"Disable looking for compound instructions for Hexagon"));
55 cl::desc(
"Disable looking for duplex instructions for Hexagon"));
100 InitHexagonMCInstrInfo(X);
106 InitHexagonMCRegisterInfo(X, Hexagon::R31);
113 return createHexagonMCSubtargetInfoImpl(TT, CPU, FS);
132 InstPrinter.
printInst(&Inst, TempStream,
"", STI);
135 auto PacketBundle = Contents.rsplit(
'\n');
136 auto HeadTail = PacketBundle.first.split(
'\n');
140 while (!HeadTail.first.empty()) {
142 auto Duplex = HeadTail.first.
split(
'\v');
143 if (!Duplex.second.empty()) {
144 OS << Indent << Duplex.first <<
Separator;
145 InstTxt = Duplex.second;
146 }
else if (!HeadTail.first.trim().startswith(
"immext")) {
147 InstTxt = Duplex.first;
149 if (!InstTxt.
empty())
150 OS << Indent << InstTxt << Separator;
151 HeadTail = HeadTail.second.
split(
'\n');
153 OS <<
"\t}" << PacketBundle.second;
163 if (
Bits[Hexagon::ArchV60])
165 else if (
Bits[Hexagon::ArchV55])
167 else if (
Bits[Hexagon::ArchV5])
169 else if (
Bits[Hexagon::ArchV4])
171 getStreamer().getAssembler().setELFHeaderEFlags(Flags);
180 unsigned AccessSize)
override {
187 void EmitLocalCommonSymbolSorted(
MCSymbol *Symbol, uint64_t Size,
188 unsigned ByteAlignment,
189 unsigned AccessSize)
override {
193 Symbol, Size, ByteAlignment, AccessSize);
212 unsigned SyntaxVariant,
216 if (SyntaxVariant == 0)
226 return new HexagonTargetAsmStreamer(S, OS, IsVerboseAsm, *InstPrint);
237 return new HexagonTargetELFStreamer(S, STI);
static cl::opt< bool > HexagonV55ArchVariant("mv55", cl::Hidden, cl::init(false), cl::desc("Build for Hexagon V55"))
static cl::opt< bool > HexagonV5ArchVariant("mv5", cl::Hidden, cl::init(false), cl::desc("Build for Hexagon V5"))
LLVM_ATTRIBUTE_NORETURN void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
virtual void printInst(const MCInst *MI, raw_ostream &OS, StringRef Annot, const MCSubtargetInfo &STI)=0
Print the specified MCInst to the specified raw_ostream.
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
static MCTargetStreamer * createMCAsmTargetStreamer(MCStreamer &S, formatted_raw_ostream &OS, MCInstPrinter *InstPrint, bool IsVerboseAsm)
static MCRegisterInfo * createHexagonMCRegisterInfo(const Triple &TT)
Target specific streamer interface.
StringRef selectHexagonCPU(const Triple &TT, StringRef CPU)
bool isBundle(MCInst const &MCI)
static void RegisterMCInstPrinter(Target &T, Target::MCInstPrinterCtorTy Fn)
RegisterMCInstPrinter - Register a MCInstPrinter implementation for the given target.
void LLVMInitializeHexagonTargetMC()
static void RegisterAsmTargetStreamer(Target &T, Target::AsmTargetStreamerCtorTy Fn)
MCCodeEmitter * createHexagonMCCodeEmitter(const MCInstrInfo &MCII, const MCRegisterInfo &MRI, MCContext &MCT)
static MCTargetStreamer * createHexagonObjectTargetStreamer(MCStreamer &S, MCSubtargetInfo const &STI)
struct fuzzer::@269 Flags
#define HEXAGON_PACKET_SIZE
static cl::opt< bool > HexagonV4ArchVariant("mv4", cl::Hidden, cl::init(false), cl::desc("Build for Hexagon V4"))
Context object for machine code objects.
static StringRef DefaultArch
void addInitialFrameState(const MCCFIInstruction &Inst)
MCInstrInfo * createHexagonMCInstrInfo()
Instances of this class represent a single low-level machine instruction.
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
This class is intended to be used as a base class for asm properties and features specific to the tar...
static void RegisterMCAsmBackend(Target &T, Target::MCAsmBackendCtorTy Fn)
RegisterMCAsmBackend - Register a MCAsmBackend implementation for the given target.
initializer< Ty > init(const Ty &Val)
Streaming machine code generation interface.
unsigned const MachineRegisterInfo * MRI
static MCCFIInstruction createDefCfa(MCSymbol *L, unsigned Register, int Offset)
.cfi_def_cfa defines a rule for computing CFA as: take address from Register and add Offset to it...
static MCInstPrinter * createHexagonMCInstPrinter(const Triple &T, unsigned SyntaxVariant, const MCAsmInfo &MAI, const MCInstrInfo &MII, const MCRegisterInfo &MRI)
MCCodeEmitter - Generic instruction encoding interface.
Interface to description of machine instruction set.
cl::opt< bool > HexagonDisableCompound
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang","erlang-compatible garbage collector")
static void RegisterMCSubtargetInfo(Target &T, Target::MCSubtargetInfoCtorFnTy Fn)
RegisterMCSubtargetInfo - Register a MCSubtargetInfo implementation for the given target...
static void RegisterObjectTargetStreamer(Target &T, Target::ObjectTargetStreamerCtorTy Fn)
Triple - Helper class for working with autoconf configuration names.
Prints bundles as a newline separated list of individual instructions Duplexes are separated by a ver...
static cl::opt< bool > HexagonV60ArchVariant("mv60", cl::Hidden, cl::init(false), cl::desc("Build for Hexagon V60"))
void HexagonMCEmitLocalCommonSymbol(MCSymbol *Symbol, uint64_t Size, unsigned ByteAlignment, unsigned AccessSize)
static const char * Separator
static void RegisterMCCodeEmitter(Target &T, Target::MCCodeEmitterCtorTy Fn)
RegisterMCCodeEmitter - Register a MCCodeEmitter implementation for the given target.
const FeatureBitset & getFeatureBits() const
getFeatureBits - Return the feature bits.
static void RegisterMCRegInfo(Target &T, Target::MCRegInfoCtorFnTy Fn)
RegisterMCRegInfo - Register a MCRegisterInfo implementation for the given target.
LLVM_NODISCARD std::pair< StringRef, StringRef > split(char Separator) const
Split into two substrings around the first occurrence of a separator character.
MCStreamer * createHexagonELFStreamer(MCContext &Context, MCAsmBackend &MAB, raw_pwrite_stream &OS, MCCodeEmitter *CE)
LLVM_NODISCARD LLVM_ATTRIBUTE_ALWAYS_INLINE bool empty() const
empty - Check if the string is empty.
RegisterMCAsmInfoFn - Helper template for registering a target assembly info implementation.
static StringRef HexagonGetArchVariant()
This is an instance of a target assembly language printer that converts an MCInst to valid target ass...
static MCSubtargetInfo * createHexagonMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS)
static void RegisterMCInstrInfo(Target &T, Target::MCInstrInfoCtorFnTy Fn)
RegisterMCInstrInfo - Register a MCInstrInfo implementation for the given target. ...
MCSubtargetInfo - Generic base class for all target subtargets.
size_t bundleSize(MCInst const &MCI)
static void RegisterELFStreamer(Target &T, Target::ELFStreamerCtorTy Fn)
An abstract base class for streams implementations that also support a pwrite operation.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
cl::opt< bool > RelaxAll("mc-relax-all", cl::desc("When used with filetype=obj, ""relax all fixups in the emitted object file"))
A raw_ostream that writes to an std::string.
Generic interface to target specific assembler backends.
static MCAsmInfo * createHexagonMCAsmInfo(const MCRegisterInfo &MRI, const Triple &TT)
This class implements an extremely fast bulk output stream that can only output to a stream...
MCAsmBackend * createHexagonAsmBackend(Target const &T, MCRegisterInfo const &, const Triple &TT, StringRef CPU, const MCTargetOptions &Options)
StringRef - Represent a constant reference to a string, i.e.
static MCStreamer * createMCStreamer(Triple const &T, MCContext &Context, MCAsmBackend &MAB, raw_pwrite_stream &OS, MCCodeEmitter *Emitter, bool RelaxAll)
Target & getTheHexagonTarget()
cl::opt< bool > HexagonDisableDuplex
void HexagonMCEmitCommonSymbol(MCSymbol *Symbol, uint64_t Size, unsigned ByteAlignment, unsigned AccessSize)