LLVM  4.0.0
Macros | Functions
AArch64InstructionSelector.cpp File Reference

This file implements the targeting of the InstructionSelector class for AArch64. More...

#include "AArch64InstructionSelector.h"
#include "AArch64InstrInfo.h"
#include "AArch64RegisterBankInfo.h"
#include "AArch64RegisterInfo.h"
#include "AArch64Subtarget.h"
#include "AArch64TargetMachine.h"
#include "MCTargetDesc/AArch64AddressingModes.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/IR/Type.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
#include "AArch64GenGlobalISel.inc"
Include dependency graph for AArch64InstructionSelector.cpp:

Go to the source code of this file.

Macros

#define DEBUG_TYPE   "aarch64-isel"
 

Functions

static const TargetRegisterClassgetRegClassForTypeOnBank (LLT Ty, const RegisterBank &RB, const RegisterBankInfo &RBI)
 
static bool unsupportedBinOp (const MachineInstr &I, const AArch64RegisterBankInfo &RBI, const MachineRegisterInfo &MRI, const AArch64RegisterInfo &TRI)
 Check whether I is a currently unsupported binary operation: More...
 
static unsigned selectBinaryOp (unsigned GenericOpc, unsigned RegBankID, unsigned OpSize)
 Select the AArch64 opcode for the basic binary operation GenericOpc (such as G_OR or G_ADD), appropriate for the register bank RegBankID and of size OpSize. More...
 
static unsigned selectLoadStoreUIOp (unsigned GenericOpc, unsigned RegBankID, unsigned OpSize)
 Select the AArch64 opcode for the G_LOAD or G_STORE operation GenericOpc, appropriate for the (value) register bank RegBankID and of memory access size OpSize. More...
 
static bool selectCopy (MachineInstr &I, const TargetInstrInfo &TII, MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI, const RegisterBankInfo &RBI)
 
static unsigned selectFPConvOpc (unsigned GenericOpc, LLT DstTy, LLT SrcTy)
 
static AArch64CC::CondCode changeICMPPredToAArch64CC (CmpInst::Predicate P)
 
static void changeFCMPPredToAArch64CC (CmpInst::Predicate P, AArch64CC::CondCode &CondCode, AArch64CC::CondCode &CondCode2)
 

Detailed Description

This file implements the targeting of the InstructionSelector class for AArch64.

Todo:
This should be generated by TableGen.

Definition in file AArch64InstructionSelector.cpp.

Macro Definition Documentation

#define DEBUG_TYPE   "aarch64-isel"

Definition at line 31 of file AArch64InstructionSelector.cpp.

Function Documentation

static void changeFCMPPredToAArch64CC ( CmpInst::Predicate  P,
AArch64CC::CondCode CondCode,
AArch64CC::CondCode CondCode2 
)
static
static AArch64CC::CondCode changeICMPPredToAArch64CC ( CmpInst::Predicate  P)
static
static const TargetRegisterClass* getRegClassForTypeOnBank ( LLT  Ty,
const RegisterBank RB,
const RegisterBankInfo RBI 
)
static
static unsigned selectBinaryOp ( unsigned  GenericOpc,
unsigned  RegBankID,
unsigned  OpSize 
)
static

Select the AArch64 opcode for the basic binary operation GenericOpc (such as G_OR or G_ADD), appropriate for the register bank RegBankID and of size OpSize.

Returns
GenericOpc if the combination is unsupported.

Definition at line 125 of file AArch64InstructionSelector.cpp.

References assert(), llvm::AArch64::FPRRegBankID, and llvm::AArch64::GPRRegBankID.

Referenced by llvm::AArch64InstructionSelector::select().

static bool selectCopy ( MachineInstr I,
const TargetInstrInfo TII,
MachineRegisterInfo MRI,
const TargetRegisterInfo TRI,
const RegisterBankInfo RBI 
)
static
static unsigned selectFPConvOpc ( unsigned  GenericOpc,
LLT  DstTy,
LLT  SrcTy 
)
static
static unsigned selectLoadStoreUIOp ( unsigned  GenericOpc,
unsigned  RegBankID,
unsigned  OpSize 
)
static

Select the AArch64 opcode for the G_LOAD or G_STORE operation GenericOpc, appropriate for the (value) register bank RegBankID and of memory access size OpSize.

This returns the variant with the base+unsigned-immediate addressing mode (e.g., LDRXui).

Returns
GenericOpc if the combination is unsupported.

Definition at line 227 of file AArch64InstructionSelector.cpp.

References llvm::AArch64::FPRRegBankID, and llvm::AArch64::GPRRegBankID.

Referenced by llvm::AArch64InstructionSelector::select().

static bool unsupportedBinOp ( const MachineInstr I,
const AArch64RegisterBankInfo RBI,
const MachineRegisterInfo MRI,
const AArch64RegisterInfo TRI 
)
static

Check whether I is a currently unsupported binary operation:

  • it has an unsized type
  • an operand is not a vreg
  • all operands are not in the same bank These are checks that should someday live in the verifier, but right now, these are mostly limitations of the aarch64 selector.

Definition at line 79 of file AArch64InstructionSelector.cpp.

References llvm::dbgs(), DEBUG, llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::RegisterBankInfo::getRegBank(), llvm::MachineRegisterInfo::getType(), llvm::LLT::isValid(), llvm::TargetRegisterInfo::isVirtualRegister(), MRI, and llvm::MachineInstr::operands().

Referenced by llvm::AArch64InstructionSelector::select().