LLVM  4.0.0
WebAssemblyOptimizeLiveIntervals.cpp
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1 //===--- WebAssemblyOptimizeLiveIntervals.cpp - LiveInterval processing ---===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 ///
10 /// \file
11 /// \brief Optimize LiveIntervals for use in a post-RA context.
12 //
13 /// LiveIntervals normally runs before register allocation when the code is
14 /// only recently lowered out of SSA form, so it's uncommon for registers to
15 /// have multiple defs, and then they do, the defs are usually closely related.
16 /// Later, after coalescing, tail duplication, and other optimizations, it's
17 /// more common to see registers with multiple unrelated defs. This pass
18 /// updates LiveIntervalAnalysis to distribute the value numbers across separate
19 /// LiveIntervals.
20 ///
21 //===----------------------------------------------------------------------===//
22 
23 #include "WebAssembly.h"
24 #include "WebAssemblySubtarget.h"
28 #include "llvm/CodeGen/Passes.h"
29 #include "llvm/Support/Debug.h"
31 using namespace llvm;
32 
33 #define DEBUG_TYPE "wasm-optimize-live-intervals"
34 
35 namespace {
36 class WebAssemblyOptimizeLiveIntervals final : public MachineFunctionPass {
37  StringRef getPassName() const override {
38  return "WebAssembly Optimize Live Intervals";
39  }
40 
41  void getAnalysisUsage(AnalysisUsage &AU) const override {
42  AU.setPreservesCFG();
50  }
51 
52  bool runOnMachineFunction(MachineFunction &MF) override;
53 
54 public:
55  static char ID; // Pass identification, replacement for typeid
56  WebAssemblyOptimizeLiveIntervals() : MachineFunctionPass(ID) {}
57 };
58 } // end anonymous namespace
59 
62  return new WebAssemblyOptimizeLiveIntervals();
63 }
64 
65 bool WebAssemblyOptimizeLiveIntervals::runOnMachineFunction(MachineFunction &MF) {
66  DEBUG(dbgs() << "********** Optimize LiveIntervals **********\n"
67  "********** Function: "
68  << MF.getName() << '\n');
69 
71  LiveIntervals &LIS = getAnalysis<LiveIntervals>();
72 
73  // We don't preserve SSA form.
74  MRI.leaveSSA();
75 
76  assert(MRI.tracksLiveness() &&
77  "OptimizeLiveIntervals expects liveness");
78 
79  // Split multiple-VN LiveIntervals into multiple LiveIntervals.
81  for (unsigned i = 0, e = MRI.getNumVirtRegs(); i < e; ++i) {
83  if (MRI.reg_nodbg_empty(Reg))
84  continue;
85 
86  LIS.splitSeparateComponents(LIS.getInterval(Reg), SplitLIs);
87  SplitLIs.clear();
88  }
89 
90  // In PrepareForLiveIntervals, we conservatively inserted IMPLICIT_DEF
91  // instructions to satisfy LiveIntervals' requirement that all uses be
92  // dominated by defs. Now that LiveIntervals has computed which of these
93  // defs are actually needed and which are dead, remove the dead ones.
94  for (auto MII = MF.begin()->begin(), MIE = MF.begin()->end(); MII != MIE; ) {
95  MachineInstr *MI = &*MII++;
96  if (MI->isImplicitDef() && MI->getOperand(0).isDead()) {
97  LiveInterval &LI = LIS.getInterval(MI->getOperand(0).getReg());
100  MI->eraseFromParent();
101  }
102  }
103 
104  return false;
105 }
AnalysisUsage & addPreserved()
Add the specified Pass class to the set of analyses preserved by this pass.
void RemoveMachineInstrFromMaps(MachineInstr &MI)
size_t i
static unsigned index2VirtReg(unsigned Index)
Convert a 0-based index to a virtual register number.
char & MachineDominatorsID
MachineDominators - This pass is a machine dominators analysis pass.
LiveInterval - This class represents the liveness of a register, or stack slot.
Definition: LiveInterval.h:625
bool isDead() const
MachineBlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate machine basic b...
FunctionPass * createWebAssemblyOptimizeLiveIntervals()
SlotIndex getInstructionIndex(const MachineInstr &Instr) const
Returns the base index of the given instruction.
void splitSeparateComponents(LiveInterval &LI, SmallVectorImpl< LiveInterval * > &SplitLIs)
Split separate components in LiveInterval LI into separate intervals.
This file contains the entry points for global functions defined in the LLVM WebAssembly back-end...
AnalysisUsage & addRequired()
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
void eraseFromParent()
Unlink 'this' from the containing basic block and delete it.
Reg
All possible values of the reg field in the ModR/M byte.
SlotIndexes pass.
Definition: SlotIndexes.h:323
AnalysisUsage & addPreservedID(const void *ID)
bool isImplicitDef() const
Definition: MachineInstr.h:788
char & LiveVariablesID
LiveVariables pass - This pass computes the set of blocks in which each variable is life and sets mac...
unsigned const MachineRegisterInfo * MRI
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:279
Represent the analysis usage information of a pass.
FunctionPass class - This class is used to implement most global optimizations.
Definition: Pass.h:298
This file declares the WebAssembly-specific subclass of TargetSubtarget.
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:843
void setPreservesCFG()
This function should be called by the pass, iff they do not:
Definition: Pass.cpp:276
LiveInterval & getInterval(unsigned Reg)
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:132
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
Representation of each machine instruction.
Definition: MachineInstr.h:52
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
SlotIndex getRegSlot(bool EC=false) const
Returns the register use/def slot in the current instruction for a normal or early-clobber def...
Definition: SlotIndexes.h:247
unsigned getReg() const
getReg - Returns the register number.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
#define DEBUG(X)
Definition: Debug.h:100
IRTranslator LLVM IR MI
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:47
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
void removeVRegDefAt(LiveInterval &LI, SlotIndex Pos)
Remove value number and related live segments of LI and its subranges that start at position Pos...