LLVM  4.0.0
X86FrameLowering.cpp
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1 //===-- X86FrameLowering.cpp - X86 Frame Information ----------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains the X86 implementation of TargetFrameLowering class.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "X86FrameLowering.h"
15 #include "X86InstrBuilder.h"
16 #include "X86InstrInfo.h"
17 #include "X86MachineFunctionInfo.h"
18 #include "X86Subtarget.h"
19 #include "X86TargetMachine.h"
20 #include "llvm/ADT/SmallSet.h"
28 #include "llvm/IR/DataLayout.h"
29 #include "llvm/IR/Function.h"
30 #include "llvm/MC/MCAsmInfo.h"
31 #include "llvm/MC/MCSymbol.h"
33 #include "llvm/Support/Debug.h"
34 #include <cstdlib>
35 
36 using namespace llvm;
37 
39  unsigned StackAlignOverride)
40  : TargetFrameLowering(StackGrowsDown, StackAlignOverride,
41  STI.is64Bit() ? -8 : -4),
42  STI(STI), TII(*STI.getInstrInfo()), TRI(STI.getRegisterInfo()) {
43  // Cache a bunch of frame-related predicates for this subtarget.
45  Is64Bit = STI.is64Bit();
46  IsLP64 = STI.isTarget64BitLP64();
47  // standard x86_64 and NaCl use 64-bit frame/stack pointers, x32 - 32-bit.
50 }
51 
53  return !MF.getFrameInfo().hasVarSizedObjects() &&
54  !MF.getInfo<X86MachineFunctionInfo>()->getHasPushSequences();
55 }
56 
57 /// canSimplifyCallFramePseudos - If there is a reserved call frame, the
58 /// call frame pseudos can be simplified. Having a FP, as in the default
59 /// implementation, is not sufficient here since we can't always use it.
60 /// Use a more nuanced condition.
61 bool
63  return hasReservedCallFrame(MF) ||
64  (hasFP(MF) && !TRI->needsStackRealignment(MF)) ||
65  TRI->hasBasePointer(MF);
66 }
67 
68 // needsFrameIndexResolution - Do we need to perform FI resolution for
69 // this function. Normally, this is required only when the function
70 // has any stack objects. However, FI resolution actually has another job,
71 // not apparent from the title - it resolves callframesetup/destroy
72 // that were not simplified earlier.
73 // So, this is required for x86 functions that have push sequences even
74 // when there are no stack objects.
75 bool
77  return MF.getFrameInfo().hasStackObjects() ||
78  MF.getInfo<X86MachineFunctionInfo>()->getHasPushSequences();
79 }
80 
81 /// hasFP - Return true if the specified function should have a dedicated frame
82 /// pointer register. This is true if the function has variable sized allocas
83 /// or if frame pointer elimination is disabled.
85  const MachineFrameInfo &MFI = MF.getFrameInfo();
86  return (MF.getTarget().Options.DisableFramePointerElim(MF) ||
87  TRI->needsStackRealignment(MF) ||
88  MFI.hasVarSizedObjects() ||
90  MF.getInfo<X86MachineFunctionInfo>()->getForceFramePointer() ||
91  MF.callsUnwindInit() || MF.hasEHFunclets() || MF.callsEHReturn() ||
92  MFI.hasStackMap() || MFI.hasPatchPoint() ||
94 }
95 
96 static unsigned getSUBriOpcode(unsigned IsLP64, int64_t Imm) {
97  if (IsLP64) {
98  if (isInt<8>(Imm))
99  return X86::SUB64ri8;
100  return X86::SUB64ri32;
101  } else {
102  if (isInt<8>(Imm))
103  return X86::SUB32ri8;
104  return X86::SUB32ri;
105  }
106 }
107 
108 static unsigned getADDriOpcode(unsigned IsLP64, int64_t Imm) {
109  if (IsLP64) {
110  if (isInt<8>(Imm))
111  return X86::ADD64ri8;
112  return X86::ADD64ri32;
113  } else {
114  if (isInt<8>(Imm))
115  return X86::ADD32ri8;
116  return X86::ADD32ri;
117  }
118 }
119 
120 static unsigned getSUBrrOpcode(unsigned isLP64) {
121  return isLP64 ? X86::SUB64rr : X86::SUB32rr;
122 }
123 
124 static unsigned getADDrrOpcode(unsigned isLP64) {
125  return isLP64 ? X86::ADD64rr : X86::ADD32rr;
126 }
127 
128 static unsigned getANDriOpcode(bool IsLP64, int64_t Imm) {
129  if (IsLP64) {
130  if (isInt<8>(Imm))
131  return X86::AND64ri8;
132  return X86::AND64ri32;
133  }
134  if (isInt<8>(Imm))
135  return X86::AND32ri8;
136  return X86::AND32ri;
137 }
138 
139 static unsigned getLEArOpcode(unsigned IsLP64) {
140  return IsLP64 ? X86::LEA64r : X86::LEA32r;
141 }
142 
143 /// findDeadCallerSavedReg - Return a caller-saved register that isn't live
144 /// when it reaches the "return" instruction. We can then pop a stack object
145 /// to this register without worry about clobbering it.
148  const X86RegisterInfo *TRI,
149  bool Is64Bit) {
150  const MachineFunction *MF = MBB.getParent();
151  const Function *F = MF->getFunction();
152  if (!F || MF->callsEHReturn())
153  return 0;
154 
155  const TargetRegisterClass &AvailableRegs = *TRI->getGPRsForTailCall(*MF);
156 
157  if (MBBI == MBB.end())
158  return 0;
159 
160  switch (MBBI->getOpcode()) {
161  default: return 0;
162  case TargetOpcode::PATCHABLE_RET:
163  case X86::RET:
164  case X86::RETL:
165  case X86::RETQ:
166  case X86::RETIL:
167  case X86::RETIQ:
168  case X86::TCRETURNdi:
169  case X86::TCRETURNri:
170  case X86::TCRETURNmi:
171  case X86::TCRETURNdi64:
172  case X86::TCRETURNri64:
173  case X86::TCRETURNmi64:
174  case X86::EH_RETURN:
175  case X86::EH_RETURN64: {
177  for (unsigned i = 0, e = MBBI->getNumOperands(); i != e; ++i) {
178  MachineOperand &MO = MBBI->getOperand(i);
179  if (!MO.isReg() || MO.isDef())
180  continue;
181  unsigned Reg = MO.getReg();
182  if (!Reg)
183  continue;
184  for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
185  Uses.insert(*AI);
186  }
187 
188  for (auto CS : AvailableRegs)
189  if (!Uses.count(CS) && CS != X86::RIP)
190  return CS;
191  }
192  }
193 
194  return 0;
195 }
196 
198  for (MachineBasicBlock::RegisterMaskPair RegMask : MBB.liveins()) {
199  unsigned Reg = RegMask.PhysReg;
200 
201  if (Reg == X86::RAX || Reg == X86::EAX || Reg == X86::AX ||
202  Reg == X86::AH || Reg == X86::AL)
203  return true;
204  }
205 
206  return false;
207 }
208 
209 /// Check if the flags need to be preserved before the terminators.
210 /// This would be the case, if the eflags is live-in of the region
211 /// composed by the terminators or live-out of that region, without
212 /// being defined by a terminator.
213 static bool
215  for (const MachineInstr &MI : MBB.terminators()) {
216  bool BreakNext = false;
217  for (const MachineOperand &MO : MI.operands()) {
218  if (!MO.isReg())
219  continue;
220  unsigned Reg = MO.getReg();
221  if (Reg != X86::EFLAGS)
222  continue;
223 
224  // This terminator needs an eflags that is not defined
225  // by a previous another terminator:
226  // EFLAGS is live-in of the region composed by the terminators.
227  if (!MO.isDef())
228  return true;
229  // This terminator defines the eflags, i.e., we don't need to preserve it.
230  // However, we still need to check this specific terminator does not
231  // read a live-in value.
232  BreakNext = true;
233  }
234  // We found a definition of the eflags, no need to preserve them.
235  if (BreakNext)
236  return false;
237  }
238 
239  // None of the terminators use or define the eflags.
240  // Check if they are live-out, that would imply we need to preserve them.
241  for (const MachineBasicBlock *Succ : MBB.successors())
242  if (Succ->isLiveIn(X86::EFLAGS))
243  return true;
244 
245  return false;
246 }
247 
248 /// emitSPUpdate - Emit a series of instructions to increment / decrement the
249 /// stack pointer by a constant value.
252  int64_t NumBytes, bool InEpilogue) const {
253  bool isSub = NumBytes < 0;
254  uint64_t Offset = isSub ? -NumBytes : NumBytes;
255 
256  uint64_t Chunk = (1LL << 31) - 1;
257  DebugLoc DL = MBB.findDebugLoc(MBBI);
258 
259  while (Offset) {
260  if (Offset > Chunk) {
261  // Rather than emit a long series of instructions for large offsets,
262  // load the offset into a register and do one sub/add
263  unsigned Reg = 0;
264 
265  if (isSub && !isEAXLiveIn(MBB))
266  Reg = (unsigned)(Is64Bit ? X86::RAX : X86::EAX);
267  else
268  Reg = findDeadCallerSavedReg(MBB, MBBI, TRI, Is64Bit);
269 
270  if (Reg) {
271  unsigned Opc = Is64Bit ? X86::MOV64ri : X86::MOV32ri;
272  BuildMI(MBB, MBBI, DL, TII.get(Opc), Reg)
273  .addImm(Offset);
274  Opc = isSub
277  MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr)
278  .addReg(StackPtr)
279  .addReg(Reg);
280  MI->getOperand(3).setIsDead(); // The EFLAGS implicit def is dead.
281  Offset = 0;
282  continue;
283  }
284  }
285 
286  uint64_t ThisVal = std::min(Offset, Chunk);
287  if (ThisVal == (Is64Bit ? 8 : 4)) {
288  // Use push / pop instead.
289  unsigned Reg = isSub
290  ? (unsigned)(Is64Bit ? X86::RAX : X86::EAX)
291  : findDeadCallerSavedReg(MBB, MBBI, TRI, Is64Bit);
292  if (Reg) {
293  unsigned Opc = isSub
294  ? (Is64Bit ? X86::PUSH64r : X86::PUSH32r)
295  : (Is64Bit ? X86::POP64r : X86::POP32r);
296  MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opc))
297  .addReg(Reg, getDefRegState(!isSub) | getUndefRegState(isSub));
298  if (isSub)
300  else
302  Offset -= ThisVal;
303  continue;
304  }
305  }
306 
307  MachineInstrBuilder MI = BuildStackAdjustment(
308  MBB, MBBI, DL, isSub ? -ThisVal : ThisVal, InEpilogue);
309  if (isSub)
311  else
313 
314  Offset -= ThisVal;
315  }
316 }
317 
318 MachineInstrBuilder X86FrameLowering::BuildStackAdjustment(
320  const DebugLoc &DL, int64_t Offset, bool InEpilogue) const {
321  assert(Offset != 0 && "zero offset stack adjustment requested");
322 
323  // On Atom, using LEA to adjust SP is preferred, but using it in the epilogue
324  // is tricky.
325  bool UseLEA;
326  if (!InEpilogue) {
327  // Check if inserting the prologue at the beginning
328  // of MBB would require to use LEA operations.
329  // We need to use LEA operations if EFLAGS is live in, because
330  // it means an instruction will read it before it gets defined.
331  UseLEA = STI.useLeaForSP() || MBB.isLiveIn(X86::EFLAGS);
332  } else {
333  // If we can use LEA for SP but we shouldn't, check that none
334  // of the terminators uses the eflags. Otherwise we will insert
335  // a ADD that will redefine the eflags and break the condition.
336  // Alternatively, we could move the ADD, but this may not be possible
337  // and is an optimization anyway.
338  UseLEA = canUseLEAForSPInEpilogue(*MBB.getParent());
339  if (UseLEA && !STI.useLeaForSP())
341  // If that assert breaks, that means we do not do the right thing
342  // in canUseAsEpilogue.
344  "We shouldn't have allowed this insertion point");
345  }
346 
348  if (UseLEA) {
349  MI = addRegOffset(BuildMI(MBB, MBBI, DL,
351  StackPtr),
352  StackPtr, false, Offset);
353  } else {
354  bool IsSub = Offset < 0;
355  uint64_t AbsOffset = IsSub ? -Offset : Offset;
356  unsigned Opc = IsSub ? getSUBriOpcode(Uses64BitFramePtr, AbsOffset)
357  : getADDriOpcode(Uses64BitFramePtr, AbsOffset);
358  MI = BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr)
359  .addReg(StackPtr)
360  .addImm(AbsOffset);
361  MI->getOperand(3).setIsDead(); // The EFLAGS implicit def is dead.
362  }
363  return MI;
364 }
365 
368  bool doMergeWithPrevious) const {
369  if ((doMergeWithPrevious && MBBI == MBB.begin()) ||
370  (!doMergeWithPrevious && MBBI == MBB.end()))
371  return 0;
372 
373  MachineBasicBlock::iterator PI = doMergeWithPrevious ? std::prev(MBBI) : MBBI;
374  MachineBasicBlock::iterator NI = doMergeWithPrevious ? nullptr
375  : std::next(MBBI);
376  PI = skipDebugInstructionsBackward(PI, MBB.begin());
377  if (NI != nullptr)
378  NI = skipDebugInstructionsForward(NI, MBB.end());
379 
380  unsigned Opc = PI->getOpcode();
381  int Offset = 0;
382 
383  if (!doMergeWithPrevious && NI != MBB.end() &&
384  NI->getOpcode() == TargetOpcode::CFI_INSTRUCTION) {
385  // Don't merge with the next instruction if it has CFI.
386  return Offset;
387  }
388 
389  if ((Opc == X86::ADD64ri32 || Opc == X86::ADD64ri8 ||
390  Opc == X86::ADD32ri || Opc == X86::ADD32ri8) &&
391  PI->getOperand(0).getReg() == StackPtr){
392  assert(PI->getOperand(1).getReg() == StackPtr);
393  Offset += PI->getOperand(2).getImm();
394  MBB.erase(PI);
395  if (!doMergeWithPrevious) MBBI = NI;
396  } else if ((Opc == X86::LEA32r || Opc == X86::LEA64_32r) &&
397  PI->getOperand(0).getReg() == StackPtr &&
398  PI->getOperand(1).getReg() == StackPtr &&
399  PI->getOperand(2).getImm() == 1 &&
400  PI->getOperand(3).getReg() == X86::NoRegister &&
401  PI->getOperand(5).getReg() == X86::NoRegister) {
402  // For LEAs we have: def = lea SP, FI, noreg, Offset, noreg.
403  Offset += PI->getOperand(4).getImm();
404  MBB.erase(PI);
405  if (!doMergeWithPrevious) MBBI = NI;
406  } else if ((Opc == X86::SUB64ri32 || Opc == X86::SUB64ri8 ||
407  Opc == X86::SUB32ri || Opc == X86::SUB32ri8) &&
408  PI->getOperand(0).getReg() == StackPtr) {
409  assert(PI->getOperand(1).getReg() == StackPtr);
410  Offset -= PI->getOperand(2).getImm();
411  MBB.erase(PI);
412  if (!doMergeWithPrevious) MBBI = NI;
413  }
414 
415  return Offset;
416 }
417 
420  const DebugLoc &DL,
421  const MCCFIInstruction &CFIInst) const {
422  MachineFunction &MF = *MBB.getParent();
423  unsigned CFIIndex = MF.addFrameInst(CFIInst);
424  BuildMI(MBB, MBBI, DL, TII.get(TargetOpcode::CFI_INSTRUCTION))
425  .addCFIIndex(CFIIndex);
426 }
427 
430  const DebugLoc &DL) const {
431  MachineFunction &MF = *MBB.getParent();
432  MachineFrameInfo &MFI = MF.getFrameInfo();
433  MachineModuleInfo &MMI = MF.getMMI();
434  const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
435 
436  // Add callee saved registers to move list.
437  const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
438  if (CSI.empty()) return;
439 
440  // Calculate offsets.
441  for (std::vector<CalleeSavedInfo>::const_iterator
442  I = CSI.begin(), E = CSI.end(); I != E; ++I) {
443  int64_t Offset = MFI.getObjectOffset(I->getFrameIdx());
444  unsigned Reg = I->getReg();
445 
446  unsigned DwarfReg = MRI->getDwarfRegNum(Reg, true);
447  BuildCFI(MBB, MBBI, DL,
448  MCCFIInstruction::createOffset(nullptr, DwarfReg, Offset));
449  }
450 }
451 
453  MachineBasicBlock &MBB,
455  const DebugLoc &DL, bool InProlog) const {
456  const X86Subtarget &STI = MF.getSubtarget<X86Subtarget>();
457  if (STI.isTargetWindowsCoreCLR()) {
458  if (InProlog) {
459  emitStackProbeInlineStub(MF, MBB, MBBI, DL, true);
460  } else {
461  emitStackProbeInline(MF, MBB, MBBI, DL, false);
462  }
463  } else {
464  emitStackProbeCall(MF, MBB, MBBI, DL, InProlog);
465  }
466 }
467 
469  MachineBasicBlock &PrologMBB) const {
470  const StringRef ChkStkStubSymbol = "__chkstk_stub";
471  MachineInstr *ChkStkStub = nullptr;
472 
473  for (MachineInstr &MI : PrologMBB) {
474  if (MI.isCall() && MI.getOperand(0).isSymbol() &&
475  ChkStkStubSymbol == MI.getOperand(0).getSymbolName()) {
476  ChkStkStub = &MI;
477  break;
478  }
479  }
480 
481  if (ChkStkStub != nullptr) {
482  assert(!ChkStkStub->isBundled() &&
483  "Not expecting bundled instructions here");
484  MachineBasicBlock::iterator MBBI = std::next(ChkStkStub->getIterator());
485  assert(std::prev(MBBI) == ChkStkStub &&
486  "MBBI expected after __chkstk_stub.");
487  DebugLoc DL = PrologMBB.findDebugLoc(MBBI);
488  emitStackProbeInline(MF, PrologMBB, MBBI, DL, true);
489  ChkStkStub->eraseFromParent();
490  }
491 }
492 
493 void X86FrameLowering::emitStackProbeInline(MachineFunction &MF,
494  MachineBasicBlock &MBB,
496  const DebugLoc &DL,
497  bool InProlog) const {
498  const X86Subtarget &STI = MF.getSubtarget<X86Subtarget>();
499  assert(STI.is64Bit() && "different expansion needed for 32 bit");
500  assert(STI.isTargetWindowsCoreCLR() && "custom expansion expects CoreCLR");
501  const TargetInstrInfo &TII = *STI.getInstrInfo();
502  const BasicBlock *LLVM_BB = MBB.getBasicBlock();
503 
504  // RAX contains the number of bytes of desired stack adjustment.
505  // The handling here assumes this value has already been updated so as to
506  // maintain stack alignment.
507  //
508  // We need to exit with RSP modified by this amount and execute suitable
509  // page touches to notify the OS that we're growing the stack responsibly.
510  // All stack probing must be done without modifying RSP.
511  //
512  // MBB:
513  // SizeReg = RAX;
514  // ZeroReg = 0
515  // CopyReg = RSP
516  // Flags, TestReg = CopyReg - SizeReg
517  // FinalReg = !Flags.Ovf ? TestReg : ZeroReg
518  // LimitReg = gs magic thread env access
519  // if FinalReg >= LimitReg goto ContinueMBB
520  // RoundBB:
521  // RoundReg = page address of FinalReg
522  // LoopMBB:
523  // LoopReg = PHI(LimitReg,ProbeReg)
524  // ProbeReg = LoopReg - PageSize
525  // [ProbeReg] = 0
526  // if (ProbeReg > RoundReg) goto LoopMBB
527  // ContinueMBB:
528  // RSP = RSP - RAX
529  // [rest of original MBB]
530 
531  // Set up the new basic blocks
532  MachineBasicBlock *RoundMBB = MF.CreateMachineBasicBlock(LLVM_BB);
533  MachineBasicBlock *LoopMBB = MF.CreateMachineBasicBlock(LLVM_BB);
534  MachineBasicBlock *ContinueMBB = MF.CreateMachineBasicBlock(LLVM_BB);
535 
536  MachineFunction::iterator MBBIter = std::next(MBB.getIterator());
537  MF.insert(MBBIter, RoundMBB);
538  MF.insert(MBBIter, LoopMBB);
539  MF.insert(MBBIter, ContinueMBB);
540 
541  // Split MBB and move the tail portion down to ContinueMBB.
542  MachineBasicBlock::iterator BeforeMBBI = std::prev(MBBI);
543  ContinueMBB->splice(ContinueMBB->begin(), &MBB, MBBI, MBB.end());
544  ContinueMBB->transferSuccessorsAndUpdatePHIs(&MBB);
545 
546  // Some useful constants
547  const int64_t ThreadEnvironmentStackLimit = 0x10;
548  const int64_t PageSize = 0x1000;
549  const int64_t PageMask = ~(PageSize - 1);
550 
551  // Registers we need. For the normal case we use virtual
552  // registers. For the prolog expansion we use RAX, RCX and RDX.
554  const TargetRegisterClass *RegClass = &X86::GR64RegClass;
555  const unsigned SizeReg = InProlog ? (unsigned)X86::RAX
556  : MRI.createVirtualRegister(RegClass),
557  ZeroReg = InProlog ? (unsigned)X86::RCX
558  : MRI.createVirtualRegister(RegClass),
559  CopyReg = InProlog ? (unsigned)X86::RDX
560  : MRI.createVirtualRegister(RegClass),
561  TestReg = InProlog ? (unsigned)X86::RDX
562  : MRI.createVirtualRegister(RegClass),
563  FinalReg = InProlog ? (unsigned)X86::RDX
564  : MRI.createVirtualRegister(RegClass),
565  RoundedReg = InProlog ? (unsigned)X86::RDX
566  : MRI.createVirtualRegister(RegClass),
567  LimitReg = InProlog ? (unsigned)X86::RCX
568  : MRI.createVirtualRegister(RegClass),
569  JoinReg = InProlog ? (unsigned)X86::RCX
570  : MRI.createVirtualRegister(RegClass),
571  ProbeReg = InProlog ? (unsigned)X86::RCX
572  : MRI.createVirtualRegister(RegClass);
573 
574  // SP-relative offsets where we can save RCX and RDX.
575  int64_t RCXShadowSlot = 0;
576  int64_t RDXShadowSlot = 0;
577 
578  // If inlining in the prolog, save RCX and RDX.
579  // Future optimization: don't save or restore if not live in.
580  if (InProlog) {
581  // Compute the offsets. We need to account for things already
582  // pushed onto the stack at this point: return address, frame
583  // pointer (if used), and callee saves.
585  const int64_t CalleeSaveSize = X86FI->getCalleeSavedFrameSize();
586  const bool HasFP = hasFP(MF);
587  RCXShadowSlot = 8 + CalleeSaveSize + (HasFP ? 8 : 0);
588  RDXShadowSlot = RCXShadowSlot + 8;
589  // Emit the saves.
590  addRegOffset(BuildMI(&MBB, DL, TII.get(X86::MOV64mr)), X86::RSP, false,
591  RCXShadowSlot)
592  .addReg(X86::RCX);
593  addRegOffset(BuildMI(&MBB, DL, TII.get(X86::MOV64mr)), X86::RSP, false,
594  RDXShadowSlot)
595  .addReg(X86::RDX);
596  } else {
597  // Not in the prolog. Copy RAX to a virtual reg.
598  BuildMI(&MBB, DL, TII.get(X86::MOV64rr), SizeReg).addReg(X86::RAX);
599  }
600 
601  // Add code to MBB to check for overflow and set the new target stack pointer
602  // to zero if so.
603  BuildMI(&MBB, DL, TII.get(X86::XOR64rr), ZeroReg)
604  .addReg(ZeroReg, RegState::Undef)
605  .addReg(ZeroReg, RegState::Undef);
606  BuildMI(&MBB, DL, TII.get(X86::MOV64rr), CopyReg).addReg(X86::RSP);
607  BuildMI(&MBB, DL, TII.get(X86::SUB64rr), TestReg)
608  .addReg(CopyReg)
609  .addReg(SizeReg);
610  BuildMI(&MBB, DL, TII.get(X86::CMOVB64rr), FinalReg)
611  .addReg(TestReg)
612  .addReg(ZeroReg);
613 
614  // FinalReg now holds final stack pointer value, or zero if
615  // allocation would overflow. Compare against the current stack
616  // limit from the thread environment block. Note this limit is the
617  // lowest touched page on the stack, not the point at which the OS
618  // will cause an overflow exception, so this is just an optimization
619  // to avoid unnecessarily touching pages that are below the current
620  // SP but already committed to the stack by the OS.
621  BuildMI(&MBB, DL, TII.get(X86::MOV64rm), LimitReg)
622  .addReg(0)
623  .addImm(1)
624  .addReg(0)
625  .addImm(ThreadEnvironmentStackLimit)
626  .addReg(X86::GS);
627  BuildMI(&MBB, DL, TII.get(X86::CMP64rr)).addReg(FinalReg).addReg(LimitReg);
628  // Jump if the desired stack pointer is at or above the stack limit.
629  BuildMI(&MBB, DL, TII.get(X86::JAE_1)).addMBB(ContinueMBB);
630 
631  // Add code to roundMBB to round the final stack pointer to a page boundary.
632  BuildMI(RoundMBB, DL, TII.get(X86::AND64ri32), RoundedReg)
633  .addReg(FinalReg)
634  .addImm(PageMask);
635  BuildMI(RoundMBB, DL, TII.get(X86::JMP_1)).addMBB(LoopMBB);
636 
637  // LimitReg now holds the current stack limit, RoundedReg page-rounded
638  // final RSP value. Add code to loopMBB to decrement LimitReg page-by-page
639  // and probe until we reach RoundedReg.
640  if (!InProlog) {
641  BuildMI(LoopMBB, DL, TII.get(X86::PHI), JoinReg)
642  .addReg(LimitReg)
643  .addMBB(RoundMBB)
644  .addReg(ProbeReg)
645  .addMBB(LoopMBB);
646  }
647 
648  addRegOffset(BuildMI(LoopMBB, DL, TII.get(X86::LEA64r), ProbeReg), JoinReg,
649  false, -PageSize);
650 
651  // Probe by storing a byte onto the stack.
652  BuildMI(LoopMBB, DL, TII.get(X86::MOV8mi))
653  .addReg(ProbeReg)
654  .addImm(1)
655  .addReg(0)
656  .addImm(0)
657  .addReg(0)
658  .addImm(0);
659  BuildMI(LoopMBB, DL, TII.get(X86::CMP64rr))
660  .addReg(RoundedReg)
661  .addReg(ProbeReg);
662  BuildMI(LoopMBB, DL, TII.get(X86::JNE_1)).addMBB(LoopMBB);
663 
664  MachineBasicBlock::iterator ContinueMBBI = ContinueMBB->getFirstNonPHI();
665 
666  // If in prolog, restore RDX and RCX.
667  if (InProlog) {
668  addRegOffset(BuildMI(*ContinueMBB, ContinueMBBI, DL, TII.get(X86::MOV64rm),
669  X86::RCX),
670  X86::RSP, false, RCXShadowSlot);
671  addRegOffset(BuildMI(*ContinueMBB, ContinueMBBI, DL, TII.get(X86::MOV64rm),
672  X86::RDX),
673  X86::RSP, false, RDXShadowSlot);
674  }
675 
676  // Now that the probing is done, add code to continueMBB to update
677  // the stack pointer for real.
678  BuildMI(*ContinueMBB, ContinueMBBI, DL, TII.get(X86::SUB64rr), X86::RSP)
679  .addReg(X86::RSP)
680  .addReg(SizeReg);
681 
682  // Add the control flow edges we need.
683  MBB.addSuccessor(ContinueMBB);
684  MBB.addSuccessor(RoundMBB);
685  RoundMBB->addSuccessor(LoopMBB);
686  LoopMBB->addSuccessor(ContinueMBB);
687  LoopMBB->addSuccessor(LoopMBB);
688 
689  // Mark all the instructions added to the prolog as frame setup.
690  if (InProlog) {
691  for (++BeforeMBBI; BeforeMBBI != MBB.end(); ++BeforeMBBI) {
692  BeforeMBBI->setFlag(MachineInstr::FrameSetup);
693  }
694  for (MachineInstr &MI : *RoundMBB) {
695  MI.setFlag(MachineInstr::FrameSetup);
696  }
697  for (MachineInstr &MI : *LoopMBB) {
698  MI.setFlag(MachineInstr::FrameSetup);
699  }
700  for (MachineBasicBlock::iterator CMBBI = ContinueMBB->begin();
701  CMBBI != ContinueMBBI; ++CMBBI) {
703  }
704  }
705 
706  // Possible TODO: physreg liveness for InProlog case.
707 }
708 
709 void X86FrameLowering::emitStackProbeCall(MachineFunction &MF,
710  MachineBasicBlock &MBB,
712  const DebugLoc &DL,
713  bool InProlog) const {
714  bool IsLargeCodeModel = MF.getTarget().getCodeModel() == CodeModel::Large;
715 
716  unsigned CallOp;
717  if (Is64Bit)
718  CallOp = IsLargeCodeModel ? X86::CALL64r : X86::CALL64pcrel32;
719  else
720  CallOp = X86::CALLpcrel32;
721 
722  const char *Symbol;
723  if (Is64Bit) {
724  if (STI.isTargetCygMing()) {
725  Symbol = "___chkstk_ms";
726  } else {
727  Symbol = "__chkstk";
728  }
729  } else if (STI.isTargetCygMing())
730  Symbol = "_alloca";
731  else
732  Symbol = "_chkstk";
733 
735  MachineBasicBlock::iterator ExpansionMBBI = std::prev(MBBI);
736 
737  // All current stack probes take AX and SP as input, clobber flags, and
738  // preserve all registers. x86_64 probes leave RSP unmodified.
739  if (Is64Bit && MF.getTarget().getCodeModel() == CodeModel::Large) {
740  // For the large code model, we have to call through a register. Use R11,
741  // as it is scratch in all supported calling conventions.
742  BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64ri), X86::R11)
743  .addExternalSymbol(Symbol);
744  CI = BuildMI(MBB, MBBI, DL, TII.get(CallOp)).addReg(X86::R11);
745  } else {
746  CI = BuildMI(MBB, MBBI, DL, TII.get(CallOp)).addExternalSymbol(Symbol);
747  }
748 
749  unsigned AX = Is64Bit ? X86::RAX : X86::EAX;
750  unsigned SP = Is64Bit ? X86::RSP : X86::ESP;
751  CI.addReg(AX, RegState::Implicit)
755  .addReg(X86::EFLAGS, RegState::Define | RegState::Implicit);
756 
757  if (Is64Bit) {
758  // MSVC x64's __chkstk and cygwin/mingw's ___chkstk_ms do not adjust %rsp
759  // themselves. It also does not clobber %rax so we can reuse it when
760  // adjusting %rsp.
761  BuildMI(MBB, MBBI, DL, TII.get(X86::SUB64rr), X86::RSP)
762  .addReg(X86::RSP)
763  .addReg(X86::RAX);
764  }
765 
766  if (InProlog) {
767  // Apply the frame setup flag to all inserted instrs.
768  for (++ExpansionMBBI; ExpansionMBBI != MBBI; ++ExpansionMBBI)
769  ExpansionMBBI->setFlag(MachineInstr::FrameSetup);
770  }
771 }
772 
773 void X86FrameLowering::emitStackProbeInlineStub(
775  MachineBasicBlock::iterator MBBI, const DebugLoc &DL, bool InProlog) const {
776 
777  assert(InProlog && "ChkStkStub called outside prolog!");
778 
779  BuildMI(MBB, MBBI, DL, TII.get(X86::CALLpcrel32))
780  .addExternalSymbol("__chkstk_stub");
781 }
782 
783 static unsigned calculateSetFPREG(uint64_t SPAdjust) {
784  // Win64 ABI has a less restrictive limitation of 240; 128 works equally well
785  // and might require smaller successive adjustments.
786  const uint64_t Win64MaxSEHOffset = 128;
787  uint64_t SEHFrameOffset = std::min(SPAdjust, Win64MaxSEHOffset);
788  // Win64 ABI requires 16-byte alignment for the UWOP_SET_FPREG opcode.
789  return SEHFrameOffset & -16;
790 }
791 
792 // If we're forcing a stack realignment we can't rely on just the frame
793 // info, we need to know the ABI stack alignment as well in case we
794 // have a call out. Otherwise just make sure we have some alignment - we'll
795 // go with the minimum SlotSize.
796 uint64_t X86FrameLowering::calculateMaxStackAlign(const MachineFunction &MF) const {
797  const MachineFrameInfo &MFI = MF.getFrameInfo();
798  uint64_t MaxAlign = MFI.getMaxAlignment(); // Desired stack alignment.
799  unsigned StackAlign = getStackAlignment();
800  if (MF.getFunction()->hasFnAttribute("stackrealign")) {
801  if (MFI.hasCalls())
802  MaxAlign = (StackAlign > MaxAlign) ? StackAlign : MaxAlign;
803  else if (MaxAlign < SlotSize)
804  MaxAlign = SlotSize;
805  }
806  return MaxAlign;
807 }
808 
809 void X86FrameLowering::BuildStackAlignAND(MachineBasicBlock &MBB,
811  const DebugLoc &DL, unsigned Reg,
812  uint64_t MaxAlign) const {
813  uint64_t Val = -MaxAlign;
814  unsigned AndOp = getANDriOpcode(Uses64BitFramePtr, Val);
815  MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(AndOp), Reg)
816  .addReg(Reg)
817  .addImm(Val)
819 
820  // The EFLAGS implicit def is dead.
821  MI->getOperand(3).setIsDead();
822 }
823 
824 /// emitPrologue - Push callee-saved registers onto the stack, which
825 /// automatically adjust the stack pointer. Adjust the stack pointer to allocate
826 /// space for local variables. Also emit labels used by the exception handler to
827 /// generate the exception handling frames.
828 
829 /*
830  Here's a gist of what gets emitted:
831 
832  ; Establish frame pointer, if needed
833  [if needs FP]
834  push %rbp
835  .cfi_def_cfa_offset 16
836  .cfi_offset %rbp, -16
837  .seh_pushreg %rpb
838  mov %rsp, %rbp
839  .cfi_def_cfa_register %rbp
840 
841  ; Spill general-purpose registers
842  [for all callee-saved GPRs]
843  pushq %<reg>
844  [if not needs FP]
845  .cfi_def_cfa_offset (offset from RETADDR)
846  .seh_pushreg %<reg>
847 
848  ; If the required stack alignment > default stack alignment
849  ; rsp needs to be re-aligned. This creates a "re-alignment gap"
850  ; of unknown size in the stack frame.
851  [if stack needs re-alignment]
852  and $MASK, %rsp
853 
854  ; Allocate space for locals
855  [if target is Windows and allocated space > 4096 bytes]
856  ; Windows needs special care for allocations larger
857  ; than one page.
858  mov $NNN, %rax
859  call ___chkstk_ms/___chkstk
860  sub %rax, %rsp
861  [else]
862  sub $NNN, %rsp
863 
864  [if needs FP]
865  .seh_stackalloc (size of XMM spill slots)
866  .seh_setframe %rbp, SEHFrameOffset ; = size of all spill slots
867  [else]
868  .seh_stackalloc NNN
869 
870  ; Spill XMMs
871  ; Note, that while only Windows 64 ABI specifies XMMs as callee-preserved,
872  ; they may get spilled on any platform, if the current function
873  ; calls @llvm.eh.unwind.init
874  [if needs FP]
875  [for all callee-saved XMM registers]
876  movaps %<xmm reg>, -MMM(%rbp)
877  [for all callee-saved XMM registers]
878  .seh_savexmm %<xmm reg>, (-MMM + SEHFrameOffset)
879  ; i.e. the offset relative to (%rbp - SEHFrameOffset)
880  [else]
881  [for all callee-saved XMM registers]
882  movaps %<xmm reg>, KKK(%rsp)
883  [for all callee-saved XMM registers]
884  .seh_savexmm %<xmm reg>, KKK
885 
886  .seh_endprologue
887 
888  [if needs base pointer]
889  mov %rsp, %rbx
890  [if needs to restore base pointer]
891  mov %rsp, -MMM(%rbp)
892 
893  ; Emit CFI info
894  [if needs FP]
895  [for all callee-saved registers]
896  .cfi_offset %<reg>, (offset from %rbp)
897  [else]
898  .cfi_def_cfa_offset (offset from RETADDR)
899  [for all callee-saved registers]
900  .cfi_offset %<reg>, (offset from %rsp)
901 
902  Notes:
903  - .seh directives are emitted only for Windows 64 ABI
904  - .cfi directives are emitted for all other ABIs
905  - for 32-bit code, substitute %e?? registers for %r??
906 */
907 
909  MachineBasicBlock &MBB) const {
910  assert(&STI == &MF.getSubtarget<X86Subtarget>() &&
911  "MF used frame lowering for wrong subtarget");
912  MachineBasicBlock::iterator MBBI = MBB.begin();
913  MachineFrameInfo &MFI = MF.getFrameInfo();
914  const Function *Fn = MF.getFunction();
915  MachineModuleInfo &MMI = MF.getMMI();
917  uint64_t MaxAlign = calculateMaxStackAlign(MF); // Desired stack alignment.
918  uint64_t StackSize = MFI.getStackSize(); // Number of bytes to allocate.
919  bool IsFunclet = MBB.isEHFuncletEntry();
921  if (Fn->hasPersonalityFn())
922  Personality = classifyEHPersonality(Fn->getPersonalityFn());
923  bool FnHasClrFunclet =
924  MF.hasEHFunclets() && Personality == EHPersonality::CoreCLR;
925  bool IsClrFunclet = IsFunclet && FnHasClrFunclet;
926  bool HasFP = hasFP(MF);
927  bool IsWin64CC = STI.isCallingConvWin64(Fn->getCallingConv());
928  bool IsWin64Prologue = MF.getTarget().getMCAsmInfo()->usesWindowsCFI();
929  bool NeedsWinCFI = IsWin64Prologue && Fn->needsUnwindTableEntry();
930  bool NeedsDwarfCFI =
931  !IsWin64Prologue && (MMI.hasDebugInfo() || Fn->needsUnwindTableEntry());
932  unsigned FramePtr = TRI->getFrameRegister(MF);
933  const unsigned MachineFramePtr =
934  STI.isTarget64BitILP32()
935  ? getX86SubSuperRegister(FramePtr, 64) : FramePtr;
936  unsigned BasePtr = TRI->getBaseRegister();
937  bool HasWinCFI = false;
938 
939  // Debug location must be unknown since the first debug location is used
940  // to determine the end of the prologue.
941  DebugLoc DL;
942 
943  // Add RETADDR move area to callee saved frame size.
944  int TailCallReturnAddrDelta = X86FI->getTCReturnAddrDelta();
945  if (TailCallReturnAddrDelta && IsWin64Prologue)
946  report_fatal_error("Can't handle guaranteed tail call under win64 yet");
947 
948  if (TailCallReturnAddrDelta < 0)
950  X86FI->getCalleeSavedFrameSize() - TailCallReturnAddrDelta);
951 
952  bool UseStackProbe = (STI.isOSWindows() && !STI.isTargetMachO());
953 
954  // The default stack probe size is 4096 if the function has no stackprobesize
955  // attribute.
956  unsigned StackProbeSize = 4096;
957  if (Fn->hasFnAttribute("stack-probe-size"))
958  Fn->getFnAttribute("stack-probe-size")
960  .getAsInteger(0, StackProbeSize);
961 
962  // If this is x86-64 and the Red Zone is not disabled, if we are a leaf
963  // function, and use up to 128 bytes of stack space, don't have a frame
964  // pointer, calls, or dynamic alloca then we do not need to adjust the
965  // stack pointer (we fit in the Red Zone). We also check that we don't
966  // push and pop from the stack.
967  if (Is64Bit && !Fn->hasFnAttribute(Attribute::NoRedZone) &&
968  !TRI->needsStackRealignment(MF) &&
969  !MFI.hasVarSizedObjects() && // No dynamic alloca.
970  !MFI.adjustsStack() && // No calls.
971  !IsWin64CC && // Win64 has no Red Zone
972  !MFI.hasCopyImplyingStackAdjustment() && // Don't push and pop.
973  !MF.shouldSplitStack()) { // Regular stack
974  uint64_t MinSize = X86FI->getCalleeSavedFrameSize();
975  if (HasFP) MinSize += SlotSize;
976  X86FI->setUsesRedZone(MinSize > 0 || StackSize > 0);
977  StackSize = std::max(MinSize, StackSize > 128 ? StackSize - 128 : 0);
978  MFI.setStackSize(StackSize);
979  }
980 
981  // Insert stack pointer adjustment for later moving of return addr. Only
982  // applies to tail call optimized functions where the callee argument stack
983  // size is bigger than the callers.
984  if (TailCallReturnAddrDelta < 0) {
985  BuildStackAdjustment(MBB, MBBI, DL, TailCallReturnAddrDelta,
986  /*InEpilogue=*/false)
988  }
989 
990  // Mapping for machine moves:
991  //
992  // DST: VirtualFP AND
993  // SRC: VirtualFP => DW_CFA_def_cfa_offset
994  // ELSE => DW_CFA_def_cfa
995  //
996  // SRC: VirtualFP AND
997  // DST: Register => DW_CFA_def_cfa_register
998  //
999  // ELSE
1000  // OFFSET < 0 => DW_CFA_offset_extended_sf
1001  // REG < 64 => DW_CFA_offset + Reg
1002  // ELSE => DW_CFA_offset_extended
1003 
1004  uint64_t NumBytes = 0;
1005  int stackGrowth = -SlotSize;
1006 
1007  // Find the funclet establisher parameter
1008  unsigned Establisher = X86::NoRegister;
1009  if (IsClrFunclet)
1010  Establisher = Uses64BitFramePtr ? X86::RCX : X86::ECX;
1011  else if (IsFunclet)
1012  Establisher = Uses64BitFramePtr ? X86::RDX : X86::EDX;
1013 
1014  if (IsWin64Prologue && IsFunclet && !IsClrFunclet) {
1015  // Immediately spill establisher into the home slot.
1016  // The runtime cares about this.
1017  // MOV64mr %rdx, 16(%rsp)
1018  unsigned MOVmr = Uses64BitFramePtr ? X86::MOV64mr : X86::MOV32mr;
1019  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(MOVmr)), StackPtr, true, 16)
1020  .addReg(Establisher)
1022  MBB.addLiveIn(Establisher);
1023  }
1024 
1025  if (HasFP) {
1026  // Calculate required stack adjustment.
1027  uint64_t FrameSize = StackSize - SlotSize;
1028  // If required, include space for extra hidden slot for stashing base pointer.
1029  if (X86FI->getRestoreBasePointer())
1030  FrameSize += SlotSize;
1031 
1032  NumBytes = FrameSize - X86FI->getCalleeSavedFrameSize();
1033 
1034  // Callee-saved registers are pushed on stack before the stack is realigned.
1035  if (TRI->needsStackRealignment(MF) && !IsWin64Prologue)
1036  NumBytes = alignTo(NumBytes, MaxAlign);
1037 
1038  // Get the offset of the stack slot for the EBP register, which is
1039  // guaranteed to be the last slot by processFunctionBeforeFrameFinalized.
1040  // Update the frame offset adjustment.
1041  if (!IsFunclet)
1042  MFI.setOffsetAdjustment(-NumBytes);
1043  else
1044  assert(MFI.getOffsetAdjustment() == -(int)NumBytes &&
1045  "should calculate same local variable offset for funclets");
1046 
1047  // Save EBP/RBP into the appropriate stack slot.
1048  BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::PUSH64r : X86::PUSH32r))
1049  .addReg(MachineFramePtr, RegState::Kill)
1051 
1052  if (NeedsDwarfCFI) {
1053  // Mark the place where EBP/RBP was saved.
1054  // Define the current CFA rule to use the provided offset.
1055  assert(StackSize);
1056  BuildCFI(MBB, MBBI, DL,
1057  MCCFIInstruction::createDefCfaOffset(nullptr, 2 * stackGrowth));
1058 
1059  // Change the rule for the FramePtr to be an "offset" rule.
1060  unsigned DwarfFramePtr = TRI->getDwarfRegNum(MachineFramePtr, true);
1062  nullptr, DwarfFramePtr, 2 * stackGrowth));
1063  }
1064 
1065  if (NeedsWinCFI) {
1066  HasWinCFI = true;
1067  BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_PushReg))
1068  .addImm(FramePtr)
1070  }
1071 
1072  if (!IsWin64Prologue && !IsFunclet) {
1073  // Update EBP with the new base value.
1074  BuildMI(MBB, MBBI, DL,
1075  TII.get(Uses64BitFramePtr ? X86::MOV64rr : X86::MOV32rr),
1076  FramePtr)
1077  .addReg(StackPtr)
1079 
1080  if (NeedsDwarfCFI) {
1081  // Mark effective beginning of when frame pointer becomes valid.
1082  // Define the current CFA to use the EBP/RBP register.
1083  unsigned DwarfFramePtr = TRI->getDwarfRegNum(MachineFramePtr, true);
1085  nullptr, DwarfFramePtr));
1086  }
1087  }
1088 
1089  // Mark the FramePtr as live-in in every block. Don't do this again for
1090  // funclet prologues.
1091  if (!IsFunclet) {
1092  for (MachineBasicBlock &EveryMBB : MF)
1093  EveryMBB.addLiveIn(MachineFramePtr);
1094  }
1095  } else {
1096  assert(!IsFunclet && "funclets without FPs not yet implemented");
1097  NumBytes = StackSize - X86FI->getCalleeSavedFrameSize();
1098  }
1099 
1100  // For EH funclets, only allocate enough space for outgoing calls. Save the
1101  // NumBytes value that we would've used for the parent frame.
1102  unsigned ParentFrameNumBytes = NumBytes;
1103  if (IsFunclet)
1104  NumBytes = getWinEHFuncletFrameSize(MF);
1105 
1106  // Skip the callee-saved push instructions.
1107  bool PushedRegs = false;
1108  int StackOffset = 2 * stackGrowth;
1109 
1110  while (MBBI != MBB.end() &&
1111  MBBI->getFlag(MachineInstr::FrameSetup) &&
1112  (MBBI->getOpcode() == X86::PUSH32r ||
1113  MBBI->getOpcode() == X86::PUSH64r)) {
1114  PushedRegs = true;
1115  unsigned Reg = MBBI->getOperand(0).getReg();
1116  ++MBBI;
1117 
1118  if (!HasFP && NeedsDwarfCFI) {
1119  // Mark callee-saved push instruction.
1120  // Define the current CFA rule to use the provided offset.
1121  assert(StackSize);
1122  BuildCFI(MBB, MBBI, DL,
1123  MCCFIInstruction::createDefCfaOffset(nullptr, StackOffset));
1124  StackOffset += stackGrowth;
1125  }
1126 
1127  if (NeedsWinCFI) {
1128  HasWinCFI = true;
1129  BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_PushReg)).addImm(Reg).setMIFlag(
1131  }
1132  }
1133 
1134  // Realign stack after we pushed callee-saved registers (so that we'll be
1135  // able to calculate their offsets from the frame pointer).
1136  // Don't do this for Win64, it needs to realign the stack after the prologue.
1137  if (!IsWin64Prologue && !IsFunclet && TRI->needsStackRealignment(MF)) {
1138  assert(HasFP && "There should be a frame pointer if stack is realigned.");
1139  BuildStackAlignAND(MBB, MBBI, DL, StackPtr, MaxAlign);
1140  }
1141 
1142  // If there is an SUB32ri of ESP immediately before this instruction, merge
1143  // the two. This can be the case when tail call elimination is enabled and
1144  // the callee has more arguments then the caller.
1145  NumBytes -= mergeSPUpdates(MBB, MBBI, true);
1146 
1147  // Adjust stack pointer: ESP -= numbytes.
1148 
1149  // Windows and cygwin/mingw require a prologue helper routine when allocating
1150  // more than 4K bytes on the stack. Windows uses __chkstk and cygwin/mingw
1151  // uses __alloca. __alloca and the 32-bit version of __chkstk will probe the
1152  // stack and adjust the stack pointer in one go. The 64-bit version of
1153  // __chkstk is only responsible for probing the stack. The 64-bit prologue is
1154  // responsible for adjusting the stack pointer. Touching the stack at 4K
1155  // increments is necessary to ensure that the guard pages used by the OS
1156  // virtual memory manager are allocated in correct sequence.
1157  uint64_t AlignedNumBytes = NumBytes;
1158  if (IsWin64Prologue && !IsFunclet && TRI->needsStackRealignment(MF))
1159  AlignedNumBytes = alignTo(AlignedNumBytes, MaxAlign);
1160  if (AlignedNumBytes >= StackProbeSize && UseStackProbe) {
1161  // Check whether EAX is livein for this block.
1162  bool isEAXAlive = isEAXLiveIn(MBB);
1163 
1164  if (isEAXAlive) {
1165  // Sanity check that EAX is not livein for this function.
1166  // It should not be, so throw an assert.
1167  assert(!Is64Bit && "EAX is livein in x64 case!");
1168 
1169  // Save EAX
1170  BuildMI(MBB, MBBI, DL, TII.get(X86::PUSH32r))
1171  .addReg(X86::EAX, RegState::Kill)
1173  }
1174 
1175  if (Is64Bit) {
1176  // Handle the 64-bit Windows ABI case where we need to call __chkstk.
1177  // Function prologue is responsible for adjusting the stack pointer.
1178  if (isUInt<32>(NumBytes)) {
1179  BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32ri), X86::EAX)
1180  .addImm(NumBytes)
1182  } else if (isInt<32>(NumBytes)) {
1183  BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64ri32), X86::RAX)
1184  .addImm(NumBytes)
1186  } else {
1187  BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64ri), X86::RAX)
1188  .addImm(NumBytes)
1190  }
1191  } else {
1192  // Allocate NumBytes-4 bytes on stack in case of isEAXAlive.
1193  // We'll also use 4 already allocated bytes for EAX.
1194  BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32ri), X86::EAX)
1195  .addImm(isEAXAlive ? NumBytes - 4 : NumBytes)
1197  }
1198 
1199  // Call __chkstk, __chkstk_ms, or __alloca.
1200  emitStackProbe(MF, MBB, MBBI, DL, true);
1201 
1202  if (isEAXAlive) {
1203  // Restore EAX
1204  MachineInstr *MI =
1205  addRegOffset(BuildMI(MF, DL, TII.get(X86::MOV32rm), X86::EAX),
1206  StackPtr, false, NumBytes - 4);
1208  MBB.insert(MBBI, MI);
1209  }
1210  } else if (NumBytes) {
1211  emitSPUpdate(MBB, MBBI, -(int64_t)NumBytes, /*InEpilogue=*/false);
1212  }
1213 
1214  if (NeedsWinCFI && NumBytes) {
1215  HasWinCFI = true;
1216  BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_StackAlloc))
1217  .addImm(NumBytes)
1219  }
1220 
1221  int SEHFrameOffset = 0;
1222  unsigned SPOrEstablisher;
1223  if (IsFunclet) {
1224  if (IsClrFunclet) {
1225  // The establisher parameter passed to a CLR funclet is actually a pointer
1226  // to the (mostly empty) frame of its nearest enclosing funclet; we have
1227  // to find the root function establisher frame by loading the PSPSym from
1228  // the intermediate frame.
1229  unsigned PSPSlotOffset = getPSPSlotOffsetFromSP(MF);
1230  MachinePointerInfo NoInfo;
1231  MBB.addLiveIn(Establisher);
1232  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rm), Establisher),
1233  Establisher, false, PSPSlotOffset)
1236  ;
1237  // Save the root establisher back into the current funclet's (mostly
1238  // empty) frame, in case a sub-funclet or the GC needs it.
1239  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64mr)), StackPtr,
1240  false, PSPSlotOffset)
1241  .addReg(Establisher)
1242  .addMemOperand(
1245  SlotSize, SlotSize));
1246  }
1247  SPOrEstablisher = Establisher;
1248  } else {
1249  SPOrEstablisher = StackPtr;
1250  }
1251 
1252  if (IsWin64Prologue && HasFP) {
1253  // Set RBP to a small fixed offset from RSP. In the funclet case, we base
1254  // this calculation on the incoming establisher, which holds the value of
1255  // RSP from the parent frame at the end of the prologue.
1256  SEHFrameOffset = calculateSetFPREG(ParentFrameNumBytes);
1257  if (SEHFrameOffset)
1258  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::LEA64r), FramePtr),
1259  SPOrEstablisher, false, SEHFrameOffset);
1260  else
1261  BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rr), FramePtr)
1262  .addReg(SPOrEstablisher);
1263 
1264  // If this is not a funclet, emit the CFI describing our frame pointer.
1265  if (NeedsWinCFI && !IsFunclet) {
1266  HasWinCFI = true;
1267  BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_SetFrame))
1268  .addImm(FramePtr)
1269  .addImm(SEHFrameOffset)
1271  if (isAsynchronousEHPersonality(Personality))
1272  MF.getWinEHFuncInfo()->SEHSetFrameOffset = SEHFrameOffset;
1273  }
1274  } else if (IsFunclet && STI.is32Bit()) {
1275  // Reset EBP / ESI to something good for funclets.
1276  MBBI = restoreWin32EHStackPointers(MBB, MBBI, DL);
1277  // If we're a catch funclet, we can be returned to via catchret. Save ESP
1278  // into the registration node so that the runtime will restore it for us.
1279  if (!MBB.isCleanupFuncletEntry()) {
1280  assert(Personality == EHPersonality::MSVC_CXX);
1281  unsigned FrameReg;
1282  int FI = MF.getWinEHFuncInfo()->EHRegNodeFrameIndex;
1283  int64_t EHRegOffset = getFrameIndexReference(MF, FI, FrameReg);
1284  // ESP is the first field, so no extra displacement is needed.
1285  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32mr)), FrameReg,
1286  false, EHRegOffset)
1287  .addReg(X86::ESP);
1288  }
1289  }
1290 
1291  while (MBBI != MBB.end() && MBBI->getFlag(MachineInstr::FrameSetup)) {
1292  const MachineInstr &FrameInstr = *MBBI;
1293  ++MBBI;
1294 
1295  if (NeedsWinCFI) {
1296  int FI;
1297  if (unsigned Reg = TII.isStoreToStackSlot(FrameInstr, FI)) {
1298  if (X86::FR64RegClass.contains(Reg)) {
1299  unsigned IgnoredFrameReg;
1300  int Offset = getFrameIndexReference(MF, FI, IgnoredFrameReg);
1301  Offset += SEHFrameOffset;
1302 
1303  HasWinCFI = true;
1304  BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_SaveXMM))
1305  .addImm(Reg)
1306  .addImm(Offset)
1308  }
1309  }
1310  }
1311  }
1312 
1313  if (NeedsWinCFI && HasWinCFI)
1314  BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_EndPrologue))
1315  .setMIFlag(MachineInstr::FrameSetup);
1316 
1317  if (FnHasClrFunclet && !IsFunclet) {
1318  // Save the so-called Initial-SP (i.e. the value of the stack pointer
1319  // immediately after the prolog) into the PSPSlot so that funclets
1320  // and the GC can recover it.
1321  unsigned PSPSlotOffset = getPSPSlotOffsetFromSP(MF);
1322  auto PSPInfo = MachinePointerInfo::getFixedStack(
1323  MF, MF.getWinEHFuncInfo()->PSPSymFrameIdx);
1324  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64mr)), StackPtr, false,
1325  PSPSlotOffset)
1326  .addReg(StackPtr)
1329  SlotSize, SlotSize));
1330  }
1331 
1332  // Realign stack after we spilled callee-saved registers (so that we'll be
1333  // able to calculate their offsets from the frame pointer).
1334  // Win64 requires aligning the stack after the prologue.
1335  if (IsWin64Prologue && TRI->needsStackRealignment(MF)) {
1336  assert(HasFP && "There should be a frame pointer if stack is realigned.");
1337  BuildStackAlignAND(MBB, MBBI, DL, SPOrEstablisher, MaxAlign);
1338  }
1339 
1340  // We already dealt with stack realignment and funclets above.
1341  if (IsFunclet && STI.is32Bit())
1342  return;
1343 
1344  // If we need a base pointer, set it up here. It's whatever the value
1345  // of the stack pointer is at this point. Any variable size objects
1346  // will be allocated after this, so we can still use the base pointer
1347  // to reference locals.
1348  if (TRI->hasBasePointer(MF)) {
1349  // Update the base pointer with the current stack pointer.
1350  unsigned Opc = Uses64BitFramePtr ? X86::MOV64rr : X86::MOV32rr;
1351  BuildMI(MBB, MBBI, DL, TII.get(Opc), BasePtr)
1352  .addReg(SPOrEstablisher)
1354  if (X86FI->getRestoreBasePointer()) {
1355  // Stash value of base pointer. Saving RSP instead of EBP shortens
1356  // dependence chain. Used by SjLj EH.
1357  unsigned Opm = Uses64BitFramePtr ? X86::MOV64mr : X86::MOV32mr;
1358  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(Opm)),
1359  FramePtr, true, X86FI->getRestoreBasePointerOffset())
1360  .addReg(SPOrEstablisher)
1362  }
1363 
1364  if (X86FI->getHasSEHFramePtrSave() && !IsFunclet) {
1365  // Stash the value of the frame pointer relative to the base pointer for
1366  // Win32 EH. This supports Win32 EH, which does the inverse of the above:
1367  // it recovers the frame pointer from the base pointer rather than the
1368  // other way around.
1369  unsigned Opm = Uses64BitFramePtr ? X86::MOV64mr : X86::MOV32mr;
1370  unsigned UsedReg;
1371  int Offset =
1372  getFrameIndexReference(MF, X86FI->getSEHFramePtrSaveIndex(), UsedReg);
1373  assert(UsedReg == BasePtr);
1374  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(Opm)), UsedReg, true, Offset)
1375  .addReg(FramePtr)
1377  }
1378  }
1379 
1380  if (((!HasFP && NumBytes) || PushedRegs) && NeedsDwarfCFI) {
1381  // Mark end of stack pointer adjustment.
1382  if (!HasFP && NumBytes) {
1383  // Define the current CFA rule to use the provided offset.
1384  assert(StackSize);
1386  nullptr, -StackSize + stackGrowth));
1387  }
1388 
1389  // Emit DWARF info specifying the offsets of the callee-saved registers.
1390  if (PushedRegs)
1391  emitCalleeSavedFrameMoves(MBB, MBBI, DL);
1392  }
1393 
1394  // X86 Interrupt handling function cannot assume anything about the direction
1395  // flag (DF in EFLAGS register). Clear this flag by creating "cld" instruction
1396  // in each prologue of interrupt handler function.
1397  //
1398  // FIXME: Create "cld" instruction only in these cases:
1399  // 1. The interrupt handling function uses any of the "rep" instructions.
1400  // 2. Interrupt handling function calls another function.
1401  //
1403  BuildMI(MBB, MBBI, DL, TII.get(X86::CLD))
1404  .setMIFlag(MachineInstr::FrameSetup);
1405 
1406  // At this point we know if the function has WinCFI or not.
1407  MF.setHasWinCFI(HasWinCFI);
1408 }
1409 
1411  const MachineFunction &MF) const {
1412  // We can't use LEA instructions for adjusting the stack pointer if we don't
1413  // have a frame pointer in the Win64 ABI. Only ADD instructions may be used
1414  // to deallocate the stack.
1415  // This means that we can use LEA for SP in two situations:
1416  // 1. We *aren't* using the Win64 ABI which means we are free to use LEA.
1417  // 2. We *have* a frame pointer which means we are permitted to use LEA.
1418  return !MF.getTarget().getMCAsmInfo()->usesWindowsCFI() || hasFP(MF);
1419 }
1420 
1422  switch (MI.getOpcode()) {
1423  case X86::CATCHRET:
1424  case X86::CLEANUPRET:
1425  return true;
1426  default:
1427  return false;
1428  }
1429  llvm_unreachable("impossible");
1430 }
1431 
1432 // CLR funclets use a special "Previous Stack Pointer Symbol" slot on the
1433 // stack. It holds a pointer to the bottom of the root function frame. The
1434 // establisher frame pointer passed to a nested funclet may point to the
1435 // (mostly empty) frame of its parent funclet, but it will need to find
1436 // the frame of the root function to access locals. To facilitate this,
1437 // every funclet copies the pointer to the bottom of the root function
1438 // frame into a PSPSym slot in its own (mostly empty) stack frame. Using the
1439 // same offset for the PSPSym in the root function frame that's used in the
1440 // funclets' frames allows each funclet to dynamically accept any ancestor
1441 // frame as its establisher argument (the runtime doesn't guarantee the
1442 // immediate parent for some reason lost to history), and also allows the GC,
1443 // which uses the PSPSym for some bookkeeping, to find it in any funclet's
1444 // frame with only a single offset reported for the entire method.
1445 unsigned
1446 X86FrameLowering::getPSPSlotOffsetFromSP(const MachineFunction &MF) const {
1447  const WinEHFuncInfo &Info = *MF.getWinEHFuncInfo();
1448  unsigned SPReg;
1449  int Offset = getFrameIndexReferencePreferSP(MF, Info.PSPSymFrameIdx, SPReg,
1450  /*IgnoreSPUpdates*/ true);
1451  assert(Offset >= 0 && SPReg == TRI->getStackRegister());
1452  return static_cast<unsigned>(Offset);
1453 }
1454 
1455 unsigned
1456 X86FrameLowering::getWinEHFuncletFrameSize(const MachineFunction &MF) const {
1457  // This is the size of the pushed CSRs.
1458  unsigned CSSize =
1459  MF.getInfo<X86MachineFunctionInfo>()->getCalleeSavedFrameSize();
1460  // This is the amount of stack a funclet needs to allocate.
1461  unsigned UsedSize;
1462  EHPersonality Personality =
1464  if (Personality == EHPersonality::CoreCLR) {
1465  // CLR funclets need to hold enough space to include the PSPSym, at the
1466  // same offset from the stack pointer (immediately after the prolog) as it
1467  // resides at in the main function.
1468  UsedSize = getPSPSlotOffsetFromSP(MF) + SlotSize;
1469  } else {
1470  // Other funclets just need enough stack for outgoing call arguments.
1471  UsedSize = MF.getFrameInfo().getMaxCallFrameSize();
1472  }
1473  // RBP is not included in the callee saved register block. After pushing RBP,
1474  // everything is 16 byte aligned. Everything we allocate before an outgoing
1475  // call must also be 16 byte aligned.
1476  unsigned FrameSizeMinusRBP = alignTo(CSSize + UsedSize, getStackAlignment());
1477  // Subtract out the size of the callee saved registers. This is how much stack
1478  // each funclet will allocate.
1479  return FrameSizeMinusRBP - CSSize;
1480 }
1481 
1482 static bool isTailCallOpcode(unsigned Opc) {
1483  return Opc == X86::TCRETURNri || Opc == X86::TCRETURNdi ||
1484  Opc == X86::TCRETURNmi ||
1485  Opc == X86::TCRETURNri64 || Opc == X86::TCRETURNdi64 ||
1486  Opc == X86::TCRETURNmi64;
1487 }
1488 
1490  MachineBasicBlock &MBB) const {
1491  const MachineFrameInfo &MFI = MF.getFrameInfo();
1494  Optional<unsigned> RetOpcode;
1495  if (MBBI != MBB.end())
1496  RetOpcode = MBBI->getOpcode();
1497  DebugLoc DL;
1498  if (MBBI != MBB.end())
1499  DL = MBBI->getDebugLoc();
1500  // standard x86_64 and NaCl use 64-bit frame/stack pointers, x32 - 32-bit.
1501  const bool Is64BitILP32 = STI.isTarget64BitILP32();
1502  unsigned FramePtr = TRI->getFrameRegister(MF);
1503  unsigned MachineFramePtr =
1504  Is64BitILP32 ? getX86SubSuperRegister(FramePtr, 64) : FramePtr;
1505 
1506  bool IsWin64Prologue = MF.getTarget().getMCAsmInfo()->usesWindowsCFI();
1507  bool NeedsWinCFI =
1508  IsWin64Prologue && MF.getFunction()->needsUnwindTableEntry();
1509  bool IsFunclet = MBBI == MBB.end() ? false : isFuncletReturnInstr(*MBBI);
1510  MachineBasicBlock *TargetMBB = nullptr;
1511 
1512  // Get the number of bytes to allocate from the FrameInfo.
1513  uint64_t StackSize = MFI.getStackSize();
1514  uint64_t MaxAlign = calculateMaxStackAlign(MF);
1515  unsigned CSSize = X86FI->getCalleeSavedFrameSize();
1516  uint64_t NumBytes = 0;
1517 
1518  if (RetOpcode && *RetOpcode == X86::CATCHRET) {
1519  // SEH shouldn't use catchret.
1522  "SEH should not use CATCHRET");
1523 
1524  NumBytes = getWinEHFuncletFrameSize(MF);
1525  assert(hasFP(MF) && "EH funclets without FP not yet implemented");
1526  TargetMBB = MBBI->getOperand(0).getMBB();
1527 
1528  // Pop EBP.
1529  BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::POP64r : X86::POP32r),
1530  MachineFramePtr)
1531  .setMIFlag(MachineInstr::FrameDestroy);
1532  } else if (RetOpcode && *RetOpcode == X86::CLEANUPRET) {
1533  NumBytes = getWinEHFuncletFrameSize(MF);
1534  assert(hasFP(MF) && "EH funclets without FP not yet implemented");
1535  BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::POP64r : X86::POP32r),
1536  MachineFramePtr)
1537  .setMIFlag(MachineInstr::FrameDestroy);
1538  } else if (hasFP(MF)) {
1539  // Calculate required stack adjustment.
1540  uint64_t FrameSize = StackSize - SlotSize;
1541  NumBytes = FrameSize - CSSize;
1542 
1543  // Callee-saved registers were pushed on stack before the stack was
1544  // realigned.
1545  if (TRI->needsStackRealignment(MF) && !IsWin64Prologue)
1546  NumBytes = alignTo(FrameSize, MaxAlign);
1547 
1548  // Pop EBP.
1549  BuildMI(MBB, MBBI, DL,
1550  TII.get(Is64Bit ? X86::POP64r : X86::POP32r), MachineFramePtr)
1551  .setMIFlag(MachineInstr::FrameDestroy);
1552  } else {
1553  NumBytes = StackSize - CSSize;
1554  }
1555  uint64_t SEHStackAllocAmt = NumBytes;
1556 
1557  MachineBasicBlock::iterator FirstCSPop = MBBI;
1558  // Skip the callee-saved pop instructions.
1559  while (MBBI != MBB.begin()) {
1560  MachineBasicBlock::iterator PI = std::prev(MBBI);
1561  unsigned Opc = PI->getOpcode();
1562 
1563  if (Opc != X86::DBG_VALUE && !PI->isTerminator()) {
1564  if ((Opc != X86::POP32r || !PI->getFlag(MachineInstr::FrameDestroy)) &&
1565  (Opc != X86::POP64r || !PI->getFlag(MachineInstr::FrameDestroy)))
1566  break;
1567  FirstCSPop = PI;
1568  }
1569 
1570  --MBBI;
1571  }
1572  MBBI = FirstCSPop;
1573 
1574  if (TargetMBB) {
1575  // Fill EAX/RAX with the address of the target block.
1576  unsigned ReturnReg = STI.is64Bit() ? X86::RAX : X86::EAX;
1577  if (STI.is64Bit()) {
1578  // LEA64r TargetMBB(%rip), %rax
1579  BuildMI(MBB, FirstCSPop, DL, TII.get(X86::LEA64r), ReturnReg)
1580  .addReg(X86::RIP)
1581  .addImm(0)
1582  .addReg(0)
1583  .addMBB(TargetMBB)
1584  .addReg(0);
1585  } else {
1586  // MOV32ri $TargetMBB, %eax
1587  BuildMI(MBB, FirstCSPop, DL, TII.get(X86::MOV32ri), ReturnReg)
1588  .addMBB(TargetMBB);
1589  }
1590  // Record that we've taken the address of TargetMBB and no longer just
1591  // reference it in a terminator.
1592  TargetMBB->setHasAddressTaken();
1593  }
1594 
1595  if (MBBI != MBB.end())
1596  DL = MBBI->getDebugLoc();
1597 
1598  // If there is an ADD32ri or SUB32ri of ESP immediately before this
1599  // instruction, merge the two instructions.
1600  if (NumBytes || MFI.hasVarSizedObjects())
1601  NumBytes += mergeSPUpdates(MBB, MBBI, true);
1602 
1603  // If dynamic alloca is used, then reset esp to point to the last callee-saved
1604  // slot before popping them off! Same applies for the case, when stack was
1605  // realigned. Don't do this if this was a funclet epilogue, since the funclets
1606  // will not do realignment or dynamic stack allocation.
1607  if ((TRI->needsStackRealignment(MF) || MFI.hasVarSizedObjects()) &&
1608  !IsFunclet) {
1609  if (TRI->needsStackRealignment(MF))
1610  MBBI = FirstCSPop;
1611  unsigned SEHFrameOffset = calculateSetFPREG(SEHStackAllocAmt);
1612  uint64_t LEAAmount =
1613  IsWin64Prologue ? SEHStackAllocAmt - SEHFrameOffset : -CSSize;
1614 
1615  // There are only two legal forms of epilogue:
1616  // - add SEHAllocationSize, %rsp
1617  // - lea SEHAllocationSize(%FramePtr), %rsp
1618  //
1619  // 'mov %FramePtr, %rsp' will not be recognized as an epilogue sequence.
1620  // However, we may use this sequence if we have a frame pointer because the
1621  // effects of the prologue can safely be undone.
1622  if (LEAAmount != 0) {
1623  unsigned Opc = getLEArOpcode(Uses64BitFramePtr);
1624  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr),
1625  FramePtr, false, LEAAmount);
1626  --MBBI;
1627  } else {
1628  unsigned Opc = (Uses64BitFramePtr ? X86::MOV64rr : X86::MOV32rr);
1629  BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr)
1630  .addReg(FramePtr);
1631  --MBBI;
1632  }
1633  } else if (NumBytes) {
1634  // Adjust stack pointer back: ESP += numbytes.
1635  emitSPUpdate(MBB, MBBI, NumBytes, /*InEpilogue=*/true);
1636  --MBBI;
1637  }
1638 
1639  // Windows unwinder will not invoke function's exception handler if IP is
1640  // either in prologue or in epilogue. This behavior causes a problem when a
1641  // call immediately precedes an epilogue, because the return address points
1642  // into the epilogue. To cope with that, we insert an epilogue marker here,
1643  // then replace it with a 'nop' if it ends up immediately after a CALL in the
1644  // final emitted code.
1645  if (NeedsWinCFI && MF.hasWinCFI())
1646  BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_Epilogue));
1647 
1648  if (!RetOpcode || !isTailCallOpcode(*RetOpcode)) {
1649  // Add the return addr area delta back since we are not tail calling.
1650  int Offset = -1 * X86FI->getTCReturnAddrDelta();
1651  assert(Offset >= 0 && "TCDelta should never be positive");
1652  if (Offset) {
1653  MBBI = MBB.getFirstTerminator();
1654 
1655  // Check for possible merge with preceding ADD instruction.
1656  Offset += mergeSPUpdates(MBB, MBBI, true);
1657  emitSPUpdate(MBB, MBBI, Offset, /*InEpilogue=*/true);
1658  }
1659  }
1660 }
1661 
1662 // NOTE: this only has a subset of the full frame index logic. In
1663 // particular, the FI < 0 and AfterFPPop logic is handled in
1664 // X86RegisterInfo::eliminateFrameIndex, but not here. Possibly
1665 // (probably?) it should be moved into here.
1667  unsigned &FrameReg) const {
1668  const MachineFrameInfo &MFI = MF.getFrameInfo();
1669 
1670  // We can't calculate offset from frame pointer if the stack is realigned,
1671  // so enforce usage of stack/base pointer. The base pointer is used when we
1672  // have dynamic allocas in addition to dynamic realignment.
1673  if (TRI->hasBasePointer(MF))
1674  FrameReg = TRI->getBaseRegister();
1675  else if (TRI->needsStackRealignment(MF))
1676  FrameReg = TRI->getStackRegister();
1677  else
1678  FrameReg = TRI->getFrameRegister(MF);
1679 
1680  // Offset will hold the offset from the stack pointer at function entry to the
1681  // object.
1682  // We need to factor in additional offsets applied during the prologue to the
1683  // frame, base, and stack pointer depending on which is used.
1684  int Offset = MFI.getObjectOffset(FI) - getOffsetOfLocalArea();
1686  unsigned CSSize = X86FI->getCalleeSavedFrameSize();
1687  uint64_t StackSize = MFI.getStackSize();
1688  bool HasFP = hasFP(MF);
1689  bool IsWin64Prologue = MF.getTarget().getMCAsmInfo()->usesWindowsCFI();
1690  int64_t FPDelta = 0;
1691 
1692  if (IsWin64Prologue) {
1693  assert(!MFI.hasCalls() || (StackSize % 16) == 8);
1694 
1695  // Calculate required stack adjustment.
1696  uint64_t FrameSize = StackSize - SlotSize;
1697  // If required, include space for extra hidden slot for stashing base pointer.
1698  if (X86FI->getRestoreBasePointer())
1699  FrameSize += SlotSize;
1700  uint64_t NumBytes = FrameSize - CSSize;
1701 
1702  uint64_t SEHFrameOffset = calculateSetFPREG(NumBytes);
1703  if (FI && FI == X86FI->getFAIndex())
1704  return -SEHFrameOffset;
1705 
1706  // FPDelta is the offset from the "traditional" FP location of the old base
1707  // pointer followed by return address and the location required by the
1708  // restricted Win64 prologue.
1709  // Add FPDelta to all offsets below that go through the frame pointer.
1710  FPDelta = FrameSize - SEHFrameOffset;
1711  assert((!MFI.hasCalls() || (FPDelta % 16) == 0) &&
1712  "FPDelta isn't aligned per the Win64 ABI!");
1713  }
1714 
1715 
1716  if (TRI->hasBasePointer(MF)) {
1717  assert(HasFP && "VLAs and dynamic stack realign, but no FP?!");
1718  if (FI < 0) {
1719  // Skip the saved EBP.
1720  return Offset + SlotSize + FPDelta;
1721  } else {
1722  assert((-(Offset + StackSize)) % MFI.getObjectAlignment(FI) == 0);
1723  return Offset + StackSize;
1724  }
1725  } else if (TRI->needsStackRealignment(MF)) {
1726  if (FI < 0) {
1727  // Skip the saved EBP.
1728  return Offset + SlotSize + FPDelta;
1729  } else {
1730  assert((-(Offset + StackSize)) % MFI.getObjectAlignment(FI) == 0);
1731  return Offset + StackSize;
1732  }
1733  // FIXME: Support tail calls
1734  } else {
1735  if (!HasFP)
1736  return Offset + StackSize;
1737 
1738  // Skip the saved EBP.
1739  Offset += SlotSize;
1740 
1741  // Skip the RETADDR move area
1742  int TailCallReturnAddrDelta = X86FI->getTCReturnAddrDelta();
1743  if (TailCallReturnAddrDelta < 0)
1744  Offset -= TailCallReturnAddrDelta;
1745  }
1746 
1747  return Offset + FPDelta;
1748 }
1749 
1750 int
1752  int FI, unsigned &FrameReg,
1753  bool IgnoreSPUpdates) const {
1754 
1755  const MachineFrameInfo &MFI = MF.getFrameInfo();
1756  // Does not include any dynamic realign.
1757  const uint64_t StackSize = MFI.getStackSize();
1758  // LLVM arranges the stack as follows:
1759  // ...
1760  // ARG2
1761  // ARG1
1762  // RETADDR
1763  // PUSH RBP <-- RBP points here
1764  // PUSH CSRs
1765  // ~~~~~~~ <-- possible stack realignment (non-win64)
1766  // ...
1767  // STACK OBJECTS
1768  // ... <-- RSP after prologue points here
1769  // ~~~~~~~ <-- possible stack realignment (win64)
1770  //
1771  // if (hasVarSizedObjects()):
1772  // ... <-- "base pointer" (ESI/RBX) points here
1773  // DYNAMIC ALLOCAS
1774  // ... <-- RSP points here
1775  //
1776  // Case 1: In the simple case of no stack realignment and no dynamic
1777  // allocas, both "fixed" stack objects (arguments and CSRs) are addressable
1778  // with fixed offsets from RSP.
1779  //
1780  // Case 2: In the case of stack realignment with no dynamic allocas, fixed
1781  // stack objects are addressed with RBP and regular stack objects with RSP.
1782  //
1783  // Case 3: In the case of dynamic allocas and stack realignment, RSP is used
1784  // to address stack arguments for outgoing calls and nothing else. The "base
1785  // pointer" points to local variables, and RBP points to fixed objects.
1786  //
1787  // In cases 2 and 3, we can only answer for non-fixed stack objects, and the
1788  // answer we give is relative to the SP after the prologue, and not the
1789  // SP in the middle of the function.
1790 
1791  if (MFI.isFixedObjectIndex(FI) && TRI->needsStackRealignment(MF) &&
1792  !STI.isTargetWin64())
1793  return getFrameIndexReference(MF, FI, FrameReg);
1794 
1795  // If !hasReservedCallFrame the function might have SP adjustement in the
1796  // body. So, even though the offset is statically known, it depends on where
1797  // we are in the function.
1799  if (!IgnoreSPUpdates && !TFI->hasReservedCallFrame(MF))
1800  return getFrameIndexReference(MF, FI, FrameReg);
1801 
1802  // We don't handle tail calls, and shouldn't be seeing them either.
1804  "we don't handle this case!");
1805 
1806  // Fill in FrameReg output argument.
1807  FrameReg = TRI->getStackRegister();
1808 
1809  // This is how the math works out:
1810  //
1811  // %rsp grows (i.e. gets lower) left to right. Each box below is
1812  // one word (eight bytes). Obj0 is the stack slot we're trying to
1813  // get to.
1814  //
1815  // ----------------------------------
1816  // | BP | Obj0 | Obj1 | ... | ObjN |
1817  // ----------------------------------
1818  // ^ ^ ^ ^
1819  // A B C E
1820  //
1821  // A is the incoming stack pointer.
1822  // (B - A) is the local area offset (-8 for x86-64) [1]
1823  // (C - A) is the Offset returned by MFI.getObjectOffset for Obj0 [2]
1824  //
1825  // |(E - B)| is the StackSize (absolute value, positive). For a
1826  // stack that grown down, this works out to be (B - E). [3]
1827  //
1828  // E is also the value of %rsp after stack has been set up, and we
1829  // want (C - E) -- the value we can add to %rsp to get to Obj0. Now
1830  // (C - E) == (C - A) - (B - A) + (B - E)
1831  // { Using [1], [2] and [3] above }
1832  // == getObjectOffset - LocalAreaOffset + StackSize
1833  //
1834 
1835  // Get the Offset from the StackPointer
1836  int Offset = MFI.getObjectOffset(FI) - getOffsetOfLocalArea();
1837 
1838  return Offset + StackSize;
1839 }
1840 
1842  MachineFunction &MF, const TargetRegisterInfo *TRI,
1843  std::vector<CalleeSavedInfo> &CSI) const {
1844  MachineFrameInfo &MFI = MF.getFrameInfo();
1846 
1847  unsigned CalleeSavedFrameSize = 0;
1848  int SpillSlotOffset = getOffsetOfLocalArea() + X86FI->getTCReturnAddrDelta();
1849 
1850  if (hasFP(MF)) {
1851  // emitPrologue always spills frame register the first thing.
1852  SpillSlotOffset -= SlotSize;
1853  MFI.CreateFixedSpillStackObject(SlotSize, SpillSlotOffset);
1854 
1855  // Since emitPrologue and emitEpilogue will handle spilling and restoring of
1856  // the frame register, we can delete it from CSI list and not have to worry
1857  // about avoiding it later.
1858  unsigned FPReg = TRI->getFrameRegister(MF);
1859  for (unsigned i = 0; i < CSI.size(); ++i) {
1860  if (TRI->regsOverlap(CSI[i].getReg(),FPReg)) {
1861  CSI.erase(CSI.begin() + i);
1862  break;
1863  }
1864  }
1865  }
1866 
1867  // Assign slots for GPRs. It increases frame size.
1868  for (unsigned i = CSI.size(); i != 0; --i) {
1869  unsigned Reg = CSI[i - 1].getReg();
1870 
1871  if (!X86::GR64RegClass.contains(Reg) && !X86::GR32RegClass.contains(Reg))
1872  continue;
1873 
1874  SpillSlotOffset -= SlotSize;
1875  CalleeSavedFrameSize += SlotSize;
1876 
1877  int SlotIndex = MFI.CreateFixedSpillStackObject(SlotSize, SpillSlotOffset);
1878  CSI[i - 1].setFrameIdx(SlotIndex);
1879  }
1880 
1881  X86FI->setCalleeSavedFrameSize(CalleeSavedFrameSize);
1882 
1883  // Assign slots for XMMs.
1884  for (unsigned i = CSI.size(); i != 0; --i) {
1885  unsigned Reg = CSI[i - 1].getReg();
1886  if (X86::GR64RegClass.contains(Reg) || X86::GR32RegClass.contains(Reg))
1887  continue;
1888 
1889  const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
1890  // ensure alignment
1891  SpillSlotOffset -= std::abs(SpillSlotOffset) % RC->getAlignment();
1892  // spill into slot
1893  SpillSlotOffset -= RC->getSize();
1894  int SlotIndex =
1895  MFI.CreateFixedSpillStackObject(RC->getSize(), SpillSlotOffset);
1896  CSI[i - 1].setFrameIdx(SlotIndex);
1897  MFI.ensureMaxAlignment(RC->getAlignment());
1898  }
1899 
1900  return true;
1901 }
1902 
1905  const std::vector<CalleeSavedInfo> &CSI,
1906  const TargetRegisterInfo *TRI) const {
1907  DebugLoc DL = MBB.findDebugLoc(MI);
1908 
1909  // Don't save CSRs in 32-bit EH funclets. The caller saves EBX, EBP, ESI, EDI
1910  // for us, and there are no XMM CSRs on Win32.
1911  if (MBB.isEHFuncletEntry() && STI.is32Bit() && STI.isOSWindows())
1912  return true;
1913 
1914  // Push GPRs. It increases frame size.
1915  const MachineFunction &MF = *MBB.getParent();
1916  unsigned Opc = STI.is64Bit() ? X86::PUSH64r : X86::PUSH32r;
1917  for (unsigned i = CSI.size(); i != 0; --i) {
1918  unsigned Reg = CSI[i - 1].getReg();
1919 
1920  if (!X86::GR64RegClass.contains(Reg) && !X86::GR32RegClass.contains(Reg))
1921  continue;
1922 
1923  const MachineRegisterInfo &MRI = MF.getRegInfo();
1924  bool isLiveIn = MRI.isLiveIn(Reg);
1925  if (!isLiveIn)
1926  MBB.addLiveIn(Reg);
1927 
1928  // Decide whether we can add a kill flag to the use.
1929  bool CanKill = !isLiveIn;
1930  // Check if any subregister is live-in
1931  if (CanKill) {
1932  for (MCRegAliasIterator AReg(Reg, TRI, false); AReg.isValid(); ++AReg) {
1933  if (MRI.isLiveIn(*AReg)) {
1934  CanKill = false;
1935  break;
1936  }
1937  }
1938  }
1939 
1940  // Do not set a kill flag on values that are also marked as live-in. This
1941  // happens with the @llvm-returnaddress intrinsic and with arguments
1942  // passed in callee saved registers.
1943  // Omitting the kill flags is conservatively correct even if the live-in
1944  // is not used after all.
1945  BuildMI(MBB, MI, DL, TII.get(Opc)).addReg(Reg, getKillRegState(CanKill))
1946  .setMIFlag(MachineInstr::FrameSetup);
1947  }
1948 
1949  // Make XMM regs spilled. X86 does not have ability of push/pop XMM.
1950  // It can be done by spilling XMMs to stack frame.
1951  for (unsigned i = CSI.size(); i != 0; --i) {
1952  unsigned Reg = CSI[i-1].getReg();
1953  if (X86::GR64RegClass.contains(Reg) || X86::GR32RegClass.contains(Reg))
1954  continue;
1955  // Add the callee-saved register as live-in. It's killed at the spill.
1956  MBB.addLiveIn(Reg);
1957  const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
1958 
1959  TII.storeRegToStackSlot(MBB, MI, Reg, true, CSI[i - 1].getFrameIdx(), RC,
1960  TRI);
1961  --MI;
1962  MI->setFlag(MachineInstr::FrameSetup);
1963  ++MI;
1964  }
1965 
1966  return true;
1967 }
1968 
1971  const std::vector<CalleeSavedInfo> &CSI,
1972  const TargetRegisterInfo *TRI) const {
1973  if (CSI.empty())
1974  return false;
1975 
1976  if (MI != MBB.end() && isFuncletReturnInstr(*MI) && STI.isOSWindows()) {
1977  // Don't restore CSRs in 32-bit EH funclets. Matches
1978  // spillCalleeSavedRegisters.
1979  if (STI.is32Bit())
1980  return true;
1981  // Don't restore CSRs before an SEH catchret. SEH except blocks do not form
1982  // funclets. emitEpilogue transforms these to normal jumps.
1983  if (MI->getOpcode() == X86::CATCHRET) {
1984  const Function *Func = MBB.getParent()->getFunction();
1985  bool IsSEH = isAsynchronousEHPersonality(
1987  if (IsSEH)
1988  return true;
1989  }
1990  }
1991 
1992  DebugLoc DL = MBB.findDebugLoc(MI);
1993 
1994  // Reload XMMs from stack frame.
1995  for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
1996  unsigned Reg = CSI[i].getReg();
1997  if (X86::GR64RegClass.contains(Reg) ||
1998  X86::GR32RegClass.contains(Reg))
1999  continue;
2000 
2001  const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
2002  TII.loadRegFromStackSlot(MBB, MI, Reg, CSI[i].getFrameIdx(), RC, TRI);
2003  }
2004 
2005  // POP GPRs.
2006  unsigned Opc = STI.is64Bit() ? X86::POP64r : X86::POP32r;
2007  for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
2008  unsigned Reg = CSI[i].getReg();
2009  if (!X86::GR64RegClass.contains(Reg) &&
2010  !X86::GR32RegClass.contains(Reg))
2011  continue;
2012 
2013  BuildMI(MBB, MI, DL, TII.get(Opc), Reg)
2014  .setMIFlag(MachineInstr::FrameDestroy);
2015  }
2016  return true;
2017 }
2018 
2020  BitVector &SavedRegs,
2021  RegScavenger *RS) const {
2022  TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS);
2023 
2024  MachineFrameInfo &MFI = MF.getFrameInfo();
2025 
2027  int64_t TailCallReturnAddrDelta = X86FI->getTCReturnAddrDelta();
2028 
2029  if (TailCallReturnAddrDelta < 0) {
2030  // create RETURNADDR area
2031  // arg
2032  // arg
2033  // RETADDR
2034  // { ...
2035  // RETADDR area
2036  // ...
2037  // }
2038  // [EBP]
2039  MFI.CreateFixedObject(-TailCallReturnAddrDelta,
2040  TailCallReturnAddrDelta - SlotSize, true);
2041  }
2042 
2043  // Spill the BasePtr if it's used.
2044  if (TRI->hasBasePointer(MF)) {
2045  SavedRegs.set(TRI->getBaseRegister());
2046 
2047  // Allocate a spill slot for EBP if we have a base pointer and EH funclets.
2048  if (MF.hasEHFunclets()) {
2049  int FI = MFI.CreateSpillStackObject(SlotSize, SlotSize);
2050  X86FI->setHasSEHFramePtrSave(true);
2051  X86FI->setSEHFramePtrSaveIndex(FI);
2052  }
2053  }
2054 }
2055 
2056 static bool
2058  const Function *F = MF->getFunction();
2059  for (Function::const_arg_iterator I = F->arg_begin(), E = F->arg_end();
2060  I != E; I++) {
2061  if (I->hasNestAttr())
2062  return true;
2063  }
2064  return false;
2065 }
2066 
2067 /// GetScratchRegister - Get a temp register for performing work in the
2068 /// segmented stack and the Erlang/HiPE stack prologue. Depending on platform
2069 /// and the properties of the function either one or two registers will be
2070 /// needed. Set primary to true for the first register, false for the second.
2071 static unsigned
2072 GetScratchRegister(bool Is64Bit, bool IsLP64, const MachineFunction &MF, bool Primary) {
2074 
2075  // Erlang stuff.
2076  if (CallingConvention == CallingConv::HiPE) {
2077  if (Is64Bit)
2078  return Primary ? X86::R14 : X86::R13;
2079  else
2080  return Primary ? X86::EBX : X86::EDI;
2081  }
2082 
2083  if (Is64Bit) {
2084  if (IsLP64)
2085  return Primary ? X86::R11 : X86::R12;
2086  else
2087  return Primary ? X86::R11D : X86::R12D;
2088  }
2089 
2090  bool IsNested = HasNestArgument(&MF);
2091 
2092  if (CallingConvention == CallingConv::X86_FastCall ||
2093  CallingConvention == CallingConv::Fast) {
2094  if (IsNested)
2095  report_fatal_error("Segmented stacks does not support fastcall with "
2096  "nested function.");
2097  return Primary ? X86::EAX : X86::ECX;
2098  }
2099  if (IsNested)
2100  return Primary ? X86::EDX : X86::EAX;
2101  return Primary ? X86::ECX : X86::EAX;
2102 }
2103 
2104 // The stack limit in the TCB is set to this many bytes above the actual stack
2105 // limit.
2106 static const uint64_t kSplitStackAvailable = 256;
2107 
2109  MachineFunction &MF, MachineBasicBlock &PrologueMBB) const {
2110  MachineFrameInfo &MFI = MF.getFrameInfo();
2111  uint64_t StackSize;
2112  unsigned TlsReg, TlsOffset;
2113  DebugLoc DL;
2114 
2115  // To support shrink-wrapping we would need to insert the new blocks
2116  // at the right place and update the branches to PrologueMBB.
2117  assert(&(*MF.begin()) == &PrologueMBB && "Shrink-wrapping not supported yet");
2118 
2119  unsigned ScratchReg = GetScratchRegister(Is64Bit, IsLP64, MF, true);
2120  assert(!MF.getRegInfo().isLiveIn(ScratchReg) &&
2121  "Scratch register is live-in");
2122 
2123  if (MF.getFunction()->isVarArg())
2124  report_fatal_error("Segmented stacks do not support vararg functions.");
2125  if (!STI.isTargetLinux() && !STI.isTargetDarwin() && !STI.isTargetWin32() &&
2126  !STI.isTargetWin64() && !STI.isTargetFreeBSD() &&
2127  !STI.isTargetDragonFly())
2128  report_fatal_error("Segmented stacks not supported on this platform.");
2129 
2130  // Eventually StackSize will be calculated by a link-time pass; which will
2131  // also decide whether checking code needs to be injected into this particular
2132  // prologue.
2133  StackSize = MFI.getStackSize();
2134 
2135  // Do not generate a prologue for functions with a stack of size zero
2136  if (StackSize == 0)
2137  return;
2138 
2139  MachineBasicBlock *allocMBB = MF.CreateMachineBasicBlock();
2140  MachineBasicBlock *checkMBB = MF.CreateMachineBasicBlock();
2142  bool IsNested = false;
2143 
2144  // We need to know if the function has a nest argument only in 64 bit mode.
2145  if (Is64Bit)
2146  IsNested = HasNestArgument(&MF);
2147 
2148  // The MOV R10, RAX needs to be in a different block, since the RET we emit in
2149  // allocMBB needs to be last (terminating) instruction.
2150 
2151  for (const auto &LI : PrologueMBB.liveins()) {
2152  allocMBB->addLiveIn(LI);
2153  checkMBB->addLiveIn(LI);
2154  }
2155 
2156  if (IsNested)
2157  allocMBB->addLiveIn(IsLP64 ? X86::R10 : X86::R10D);
2158 
2159  MF.push_front(allocMBB);
2160  MF.push_front(checkMBB);
2161 
2162  // When the frame size is less than 256 we just compare the stack
2163  // boundary directly to the value of the stack pointer, per gcc.
2164  bool CompareStackPointer = StackSize < kSplitStackAvailable;
2165 
2166  // Read the limit off the current stacklet off the stack_guard location.
2167  if (Is64Bit) {
2168  if (STI.isTargetLinux()) {
2169  TlsReg = X86::FS;
2170  TlsOffset = IsLP64 ? 0x70 : 0x40;
2171  } else if (STI.isTargetDarwin()) {
2172  TlsReg = X86::GS;
2173  TlsOffset = 0x60 + 90*8; // See pthread_machdep.h. Steal TLS slot 90.
2174  } else if (STI.isTargetWin64()) {
2175  TlsReg = X86::GS;
2176  TlsOffset = 0x28; // pvArbitrary, reserved for application use
2177  } else if (STI.isTargetFreeBSD()) {
2178  TlsReg = X86::FS;
2179  TlsOffset = 0x18;
2180  } else if (STI.isTargetDragonFly()) {
2181  TlsReg = X86::FS;
2182  TlsOffset = 0x20; // use tls_tcb.tcb_segstack
2183  } else {
2184  report_fatal_error("Segmented stacks not supported on this platform.");
2185  }
2186 
2187  if (CompareStackPointer)
2188  ScratchReg = IsLP64 ? X86::RSP : X86::ESP;
2189  else
2190  BuildMI(checkMBB, DL, TII.get(IsLP64 ? X86::LEA64r : X86::LEA64_32r), ScratchReg).addReg(X86::RSP)
2191  .addImm(1).addReg(0).addImm(-StackSize).addReg(0);
2192 
2193  BuildMI(checkMBB, DL, TII.get(IsLP64 ? X86::CMP64rm : X86::CMP32rm)).addReg(ScratchReg)
2194  .addReg(0).addImm(1).addReg(0).addImm(TlsOffset).addReg(TlsReg);
2195  } else {
2196  if (STI.isTargetLinux()) {
2197  TlsReg = X86::GS;
2198  TlsOffset = 0x30;
2199  } else if (STI.isTargetDarwin()) {
2200  TlsReg = X86::GS;
2201  TlsOffset = 0x48 + 90*4;
2202  } else if (STI.isTargetWin32()) {
2203  TlsReg = X86::FS;
2204  TlsOffset = 0x14; // pvArbitrary, reserved for application use
2205  } else if (STI.isTargetDragonFly()) {
2206  TlsReg = X86::FS;
2207  TlsOffset = 0x10; // use tls_tcb.tcb_segstack
2208  } else if (STI.isTargetFreeBSD()) {
2209  report_fatal_error("Segmented stacks not supported on FreeBSD i386.");
2210  } else {
2211  report_fatal_error("Segmented stacks not supported on this platform.");
2212  }
2213 
2214  if (CompareStackPointer)
2215  ScratchReg = X86::ESP;
2216  else
2217  BuildMI(checkMBB, DL, TII.get(X86::LEA32r), ScratchReg).addReg(X86::ESP)
2218  .addImm(1).addReg(0).addImm(-StackSize).addReg(0);
2219 
2220  if (STI.isTargetLinux() || STI.isTargetWin32() || STI.isTargetWin64() ||
2221  STI.isTargetDragonFly()) {
2222  BuildMI(checkMBB, DL, TII.get(X86::CMP32rm)).addReg(ScratchReg)
2223  .addReg(0).addImm(0).addReg(0).addImm(TlsOffset).addReg(TlsReg);
2224  } else if (STI.isTargetDarwin()) {
2225 
2226  // TlsOffset doesn't fit into a mod r/m byte so we need an extra register.
2227  unsigned ScratchReg2;
2228  bool SaveScratch2;
2229  if (CompareStackPointer) {
2230  // The primary scratch register is available for holding the TLS offset.
2231  ScratchReg2 = GetScratchRegister(Is64Bit, IsLP64, MF, true);
2232  SaveScratch2 = false;
2233  } else {
2234  // Need to use a second register to hold the TLS offset
2235  ScratchReg2 = GetScratchRegister(Is64Bit, IsLP64, MF, false);
2236 
2237  // Unfortunately, with fastcc the second scratch register may hold an
2238  // argument.
2239  SaveScratch2 = MF.getRegInfo().isLiveIn(ScratchReg2);
2240  }
2241 
2242  // If Scratch2 is live-in then it needs to be saved.
2243  assert((!MF.getRegInfo().isLiveIn(ScratchReg2) || SaveScratch2) &&
2244  "Scratch register is live-in and not saved");
2245 
2246  if (SaveScratch2)
2247  BuildMI(checkMBB, DL, TII.get(X86::PUSH32r))
2248  .addReg(ScratchReg2, RegState::Kill);
2249 
2250  BuildMI(checkMBB, DL, TII.get(X86::MOV32ri), ScratchReg2)
2251  .addImm(TlsOffset);
2252  BuildMI(checkMBB, DL, TII.get(X86::CMP32rm))
2253  .addReg(ScratchReg)
2254  .addReg(ScratchReg2).addImm(1).addReg(0)
2255  .addImm(0)
2256  .addReg(TlsReg);
2257 
2258  if (SaveScratch2)
2259  BuildMI(checkMBB, DL, TII.get(X86::POP32r), ScratchReg2);
2260  }
2261  }
2262 
2263  // This jump is taken if SP >= (Stacklet Limit + Stack Space required).
2264  // It jumps to normal execution of the function body.
2265  BuildMI(checkMBB, DL, TII.get(X86::JA_1)).addMBB(&PrologueMBB);
2266 
2267  // On 32 bit we first push the arguments size and then the frame size. On 64
2268  // bit, we pass the stack frame size in r10 and the argument size in r11.
2269  if (Is64Bit) {
2270  // Functions with nested arguments use R10, so it needs to be saved across
2271  // the call to _morestack
2272 
2273  const unsigned RegAX = IsLP64 ? X86::RAX : X86::EAX;
2274  const unsigned Reg10 = IsLP64 ? X86::R10 : X86::R10D;
2275  const unsigned Reg11 = IsLP64 ? X86::R11 : X86::R11D;
2276  const unsigned MOVrr = IsLP64 ? X86::MOV64rr : X86::MOV32rr;
2277  const unsigned MOVri = IsLP64 ? X86::MOV64ri : X86::MOV32ri;
2278 
2279  if (IsNested)
2280  BuildMI(allocMBB, DL, TII.get(MOVrr), RegAX).addReg(Reg10);
2281 
2282  BuildMI(allocMBB, DL, TII.get(MOVri), Reg10)
2283  .addImm(StackSize);
2284  BuildMI(allocMBB, DL, TII.get(MOVri), Reg11)
2285  .addImm(X86FI->getArgumentStackSize());
2286  } else {
2287  BuildMI(allocMBB, DL, TII.get(X86::PUSHi32))
2288  .addImm(X86FI->getArgumentStackSize());
2289  BuildMI(allocMBB, DL, TII.get(X86::PUSHi32))
2290  .addImm(StackSize);
2291  }
2292 
2293  // __morestack is in libgcc
2294  if (Is64Bit && MF.getTarget().getCodeModel() == CodeModel::Large) {
2295  // Under the large code model, we cannot assume that __morestack lives
2296  // within 2^31 bytes of the call site, so we cannot use pc-relative
2297  // addressing. We cannot perform the call via a temporary register,
2298  // as the rax register may be used to store the static chain, and all
2299  // other suitable registers may be either callee-save or used for
2300  // parameter passing. We cannot use the stack at this point either
2301  // because __morestack manipulates the stack directly.
2302  //
2303  // To avoid these issues, perform an indirect call via a read-only memory
2304  // location containing the address.
2305  //
2306  // This solution is not perfect, as it assumes that the .rodata section
2307  // is laid out within 2^31 bytes of each function body, but this seems
2308  // to be sufficient for JIT.
2309  BuildMI(allocMBB, DL, TII.get(X86::CALL64m))
2310  .addReg(X86::RIP)
2311  .addImm(0)
2312  .addReg(0)
2313  .addExternalSymbol("__morestack_addr")
2314  .addReg(0);
2315  MF.getMMI().setUsesMorestackAddr(true);
2316  } else {
2317  if (Is64Bit)
2318  BuildMI(allocMBB, DL, TII.get(X86::CALL64pcrel32))
2319  .addExternalSymbol("__morestack");
2320  else
2321  BuildMI(allocMBB, DL, TII.get(X86::CALLpcrel32))
2322  .addExternalSymbol("__morestack");
2323  }
2324 
2325  if (IsNested)
2326  BuildMI(allocMBB, DL, TII.get(X86::MORESTACK_RET_RESTORE_R10));
2327  else
2328  BuildMI(allocMBB, DL, TII.get(X86::MORESTACK_RET));
2329 
2330  allocMBB->addSuccessor(&PrologueMBB);
2331 
2332  checkMBB->addSuccessor(allocMBB);
2333  checkMBB->addSuccessor(&PrologueMBB);
2334 
2335 #ifdef EXPENSIVE_CHECKS
2336  MF.verify();
2337 #endif
2338 }
2339 
2340 /// Lookup an ERTS parameter in the !hipe.literals named metadata node.
2341 /// HiPE provides Erlang Runtime System-internal parameters, such as PCB offsets
2342 /// to fields it needs, through a named metadata node "hipe.literals" containing
2343 /// name-value pairs.
2344 static unsigned getHiPELiteral(
2345  NamedMDNode *HiPELiteralsMD, const StringRef LiteralName) {
2346  for (int i = 0, e = HiPELiteralsMD->getNumOperands(); i != e; ++i) {
2347  MDNode *Node = HiPELiteralsMD->getOperand(i);
2348  if (Node->getNumOperands() != 2) continue;
2349  MDString *NodeName = dyn_cast<MDString>(Node->getOperand(0));
2350  ValueAsMetadata *NodeVal = dyn_cast<ValueAsMetadata>(Node->getOperand(1));
2351  if (!NodeName || !NodeVal) continue;
2352  ConstantInt *ValConst = dyn_cast_or_null<ConstantInt>(NodeVal->getValue());
2353  if (ValConst && NodeName->getString() == LiteralName) {
2354  return ValConst->getZExtValue();
2355  }
2356  }
2357 
2358  report_fatal_error("HiPE literal " + LiteralName
2359  + " required but not provided");
2360 }
2361 
2362 /// Erlang programs may need a special prologue to handle the stack size they
2363 /// might need at runtime. That is because Erlang/OTP does not implement a C
2364 /// stack but uses a custom implementation of hybrid stack/heap architecture.
2365 /// (for more information see Eric Stenman's Ph.D. thesis:
2366 /// http://publications.uu.se/uu/fulltext/nbn_se_uu_diva-2688.pdf)
2367 ///
2368 /// CheckStack:
2369 /// temp0 = sp - MaxStack
2370 /// if( temp0 < SP_LIMIT(P) ) goto IncStack else goto OldStart
2371 /// OldStart:
2372 /// ...
2373 /// IncStack:
2374 /// call inc_stack # doubles the stack space
2375 /// temp0 = sp - MaxStack
2376 /// if( temp0 < SP_LIMIT(P) ) goto IncStack else goto OldStart
2378  MachineFunction &MF, MachineBasicBlock &PrologueMBB) const {
2379  MachineFrameInfo &MFI = MF.getFrameInfo();
2380  DebugLoc DL;
2381 
2382  // To support shrink-wrapping we would need to insert the new blocks
2383  // at the right place and update the branches to PrologueMBB.
2384  assert(&(*MF.begin()) == &PrologueMBB && "Shrink-wrapping not supported yet");
2385 
2386  // HiPE-specific values
2387  NamedMDNode *HiPELiteralsMD = MF.getMMI().getModule()
2388  ->getNamedMetadata("hipe.literals");
2389  if (!HiPELiteralsMD)
2391  "Can't generate HiPE prologue without runtime parameters");
2392  const unsigned HipeLeafWords
2393  = getHiPELiteral(HiPELiteralsMD,
2394  Is64Bit ? "AMD64_LEAF_WORDS" : "X86_LEAF_WORDS");
2395  const unsigned CCRegisteredArgs = Is64Bit ? 6 : 5;
2396  const unsigned Guaranteed = HipeLeafWords * SlotSize;
2397  unsigned CallerStkArity = MF.getFunction()->arg_size() > CCRegisteredArgs ?
2398  MF.getFunction()->arg_size() - CCRegisteredArgs : 0;
2399  unsigned MaxStack = MFI.getStackSize() + CallerStkArity*SlotSize + SlotSize;
2400 
2401  assert(STI.isTargetLinux() &&
2402  "HiPE prologue is only supported on Linux operating systems.");
2403 
2404  // Compute the largest caller's frame that is needed to fit the callees'
2405  // frames. This 'MaxStack' is computed from:
2406  //
2407  // a) the fixed frame size, which is the space needed for all spilled temps,
2408  // b) outgoing on-stack parameter areas, and
2409  // c) the minimum stack space this function needs to make available for the
2410  // functions it calls (a tunable ABI property).
2411  if (MFI.hasCalls()) {
2412  unsigned MoreStackForCalls = 0;
2413 
2414  for (auto &MBB : MF) {
2415  for (auto &MI : MBB) {
2416  if (!MI.isCall())
2417  continue;
2418 
2419  // Get callee operand.
2420  const MachineOperand &MO = MI.getOperand(0);
2421 
2422  // Only take account of global function calls (no closures etc.).
2423  if (!MO.isGlobal())
2424  continue;
2425 
2426  const Function *F = dyn_cast<Function>(MO.getGlobal());
2427  if (!F)
2428  continue;
2429 
2430  // Do not update 'MaxStack' for primitive and built-in functions
2431  // (encoded with names either starting with "erlang."/"bif_" or not
2432  // having a ".", such as a simple <Module>.<Function>.<Arity>, or an
2433  // "_", such as the BIF "suspend_0") as they are executed on another
2434  // stack.
2435  if (F->getName().find("erlang.") != StringRef::npos ||
2436  F->getName().find("bif_") != StringRef::npos ||
2437  F->getName().find_first_of("._") == StringRef::npos)
2438  continue;
2439 
2440  unsigned CalleeStkArity =
2441  F->arg_size() > CCRegisteredArgs ? F->arg_size()-CCRegisteredArgs : 0;
2442  if (HipeLeafWords - 1 > CalleeStkArity)
2443  MoreStackForCalls = std::max(MoreStackForCalls,
2444  (HipeLeafWords - 1 - CalleeStkArity) * SlotSize);
2445  }
2446  }
2447  MaxStack += MoreStackForCalls;
2448  }
2449 
2450  // If the stack frame needed is larger than the guaranteed then runtime checks
2451  // and calls to "inc_stack_0" BIF should be inserted in the assembly prologue.
2452  if (MaxStack > Guaranteed) {
2453  MachineBasicBlock *stackCheckMBB = MF.CreateMachineBasicBlock();
2454  MachineBasicBlock *incStackMBB = MF.CreateMachineBasicBlock();
2455 
2456  for (const auto &LI : PrologueMBB.liveins()) {
2457  stackCheckMBB->addLiveIn(LI);
2458  incStackMBB->addLiveIn(LI);
2459  }
2460 
2461  MF.push_front(incStackMBB);
2462  MF.push_front(stackCheckMBB);
2463 
2464  unsigned ScratchReg, SPReg, PReg, SPLimitOffset;
2465  unsigned LEAop, CMPop, CALLop;
2466  SPLimitOffset = getHiPELiteral(HiPELiteralsMD, "P_NSP_LIMIT");
2467  if (Is64Bit) {
2468  SPReg = X86::RSP;
2469  PReg = X86::RBP;
2470  LEAop = X86::LEA64r;
2471  CMPop = X86::CMP64rm;
2472  CALLop = X86::CALL64pcrel32;
2473  } else {
2474  SPReg = X86::ESP;
2475  PReg = X86::EBP;
2476  LEAop = X86::LEA32r;
2477  CMPop = X86::CMP32rm;
2478  CALLop = X86::CALLpcrel32;
2479  }
2480 
2481  ScratchReg = GetScratchRegister(Is64Bit, IsLP64, MF, true);
2482  assert(!MF.getRegInfo().isLiveIn(ScratchReg) &&
2483  "HiPE prologue scratch register is live-in");
2484 
2485  // Create new MBB for StackCheck:
2486  addRegOffset(BuildMI(stackCheckMBB, DL, TII.get(LEAop), ScratchReg),
2487  SPReg, false, -MaxStack);
2488  // SPLimitOffset is in a fixed heap location (pointed by BP).
2489  addRegOffset(BuildMI(stackCheckMBB, DL, TII.get(CMPop))
2490  .addReg(ScratchReg), PReg, false, SPLimitOffset);
2491  BuildMI(stackCheckMBB, DL, TII.get(X86::JAE_1)).addMBB(&PrologueMBB);
2492 
2493  // Create new MBB for IncStack:
2494  BuildMI(incStackMBB, DL, TII.get(CALLop)).
2495  addExternalSymbol("inc_stack_0");
2496  addRegOffset(BuildMI(incStackMBB, DL, TII.get(LEAop), ScratchReg),
2497  SPReg, false, -MaxStack);
2498  addRegOffset(BuildMI(incStackMBB, DL, TII.get(CMPop))
2499  .addReg(ScratchReg), PReg, false, SPLimitOffset);
2500  BuildMI(incStackMBB, DL, TII.get(X86::JLE_1)).addMBB(incStackMBB);
2501 
2502  stackCheckMBB->addSuccessor(&PrologueMBB, {99, 100});
2503  stackCheckMBB->addSuccessor(incStackMBB, {1, 100});
2504  incStackMBB->addSuccessor(&PrologueMBB, {99, 100});
2505  incStackMBB->addSuccessor(incStackMBB, {1, 100});
2506  }
2507 #ifdef EXPENSIVE_CHECKS
2508  MF.verify();
2509 #endif
2510 }
2511 
2512 bool X86FrameLowering::adjustStackWithPops(MachineBasicBlock &MBB,
2514  const DebugLoc &DL,
2515  int Offset) const {
2516 
2517  if (Offset <= 0)
2518  return false;
2519 
2520  if (Offset % SlotSize)
2521  return false;
2522 
2523  int NumPops = Offset / SlotSize;
2524  // This is only worth it if we have at most 2 pops.
2525  if (NumPops != 1 && NumPops != 2)
2526  return false;
2527 
2528  // Handle only the trivial case where the adjustment directly follows
2529  // a call. This is the most common one, anyway.
2530  if (MBBI == MBB.begin())
2531  return false;
2532  MachineBasicBlock::iterator Prev = std::prev(MBBI);
2533  if (!Prev->isCall() || !Prev->getOperand(1).isRegMask())
2534  return false;
2535 
2536  unsigned Regs[2];
2537  unsigned FoundRegs = 0;
2538 
2539  auto RegMask = Prev->getOperand(1);
2540 
2541  auto &RegClass =
2542  Is64Bit ? X86::GR64_NOREX_NOSPRegClass : X86::GR32_NOREX_NOSPRegClass;
2543  // Try to find up to NumPops free registers.
2544  for (auto Candidate : RegClass) {
2545 
2546  // Poor man's liveness:
2547  // Since we're immediately after a call, any register that is clobbered
2548  // by the call and not defined by it can be considered dead.
2549  if (!RegMask.clobbersPhysReg(Candidate))
2550  continue;
2551 
2552  bool IsDef = false;
2553  for (const MachineOperand &MO : Prev->implicit_operands()) {
2554  if (MO.isReg() && MO.isDef() &&
2555  TRI->isSuperOrSubRegisterEq(MO.getReg(), Candidate)) {
2556  IsDef = true;
2557  break;
2558  }
2559  }
2560 
2561  if (IsDef)
2562  continue;
2563 
2564  Regs[FoundRegs++] = Candidate;
2565  if (FoundRegs == (unsigned)NumPops)
2566  break;
2567  }
2568 
2569  if (FoundRegs == 0)
2570  return false;
2571 
2572  // If we found only one free register, but need two, reuse the same one twice.
2573  while (FoundRegs < (unsigned)NumPops)
2574  Regs[FoundRegs++] = Regs[0];
2575 
2576  for (int i = 0; i < NumPops; ++i)
2577  BuildMI(MBB, MBBI, DL,
2578  TII.get(STI.is64Bit() ? X86::POP64r : X86::POP32r), Regs[i]);
2579 
2580  return true;
2581 }
2582 
2586  bool reserveCallFrame = hasReservedCallFrame(MF);
2587  unsigned Opcode = I->getOpcode();
2588  bool isDestroy = Opcode == TII.getCallFrameDestroyOpcode();
2589  DebugLoc DL = I->getDebugLoc();
2590  uint64_t Amount = !reserveCallFrame ? I->getOperand(0).getImm() : 0;
2591  uint64_t InternalAmt = (isDestroy || Amount) ? I->getOperand(1).getImm() : 0;
2592  I = MBB.erase(I);
2593  auto InsertPos = skipDebugInstructionsForward(I, MBB.end());
2594 
2595  if (!reserveCallFrame) {
2596  // If the stack pointer can be changed after prologue, turn the
2597  // adjcallstackup instruction into a 'sub ESP, <amt>' and the
2598  // adjcallstackdown instruction into 'add ESP, <amt>'
2599 
2600  // We need to keep the stack aligned properly. To do this, we round the
2601  // amount of space needed for the outgoing arguments up to the next
2602  // alignment boundary.
2603  unsigned StackAlign = getStackAlignment();
2604  Amount = alignTo(Amount, StackAlign);
2605 
2606  MachineModuleInfo &MMI = MF.getMMI();
2607  const Function *Fn = MF.getFunction();
2608  bool WindowsCFI = MF.getTarget().getMCAsmInfo()->usesWindowsCFI();
2609  bool DwarfCFI = !WindowsCFI &&
2610  (MMI.hasDebugInfo() || Fn->needsUnwindTableEntry());
2611 
2612  // If we have any exception handlers in this function, and we adjust
2613  // the SP before calls, we may need to indicate this to the unwinder
2614  // using GNU_ARGS_SIZE. Note that this may be necessary even when
2615  // Amount == 0, because the preceding function may have set a non-0
2616  // GNU_ARGS_SIZE.
2617  // TODO: We don't need to reset this between subsequent functions,
2618  // if it didn't change.
2619  bool HasDwarfEHHandlers = !WindowsCFI && !MF.getLandingPads().empty();
2620 
2621  if (HasDwarfEHHandlers && !isDestroy &&
2623  BuildCFI(MBB, InsertPos, DL,
2624  MCCFIInstruction::createGnuArgsSize(nullptr, Amount));
2625 
2626  if (Amount == 0)
2627  return I;
2628 
2629  // Factor out the amount that gets handled inside the sequence
2630  // (Pushes of argument for frame setup, callee pops for frame destroy)
2631  Amount -= InternalAmt;
2632 
2633  // TODO: This is needed only if we require precise CFA.
2634  // If this is a callee-pop calling convention, emit a CFA adjust for
2635  // the amount the callee popped.
2636  if (isDestroy && InternalAmt && DwarfCFI && !hasFP(MF))
2637  BuildCFI(MBB, InsertPos, DL,
2638  MCCFIInstruction::createAdjustCfaOffset(nullptr, -InternalAmt));
2639 
2640  // Add Amount to SP to destroy a frame, or subtract to setup.
2641  int64_t StackAdjustment = isDestroy ? Amount : -Amount;
2642  int64_t CfaAdjustment = -StackAdjustment;
2643 
2644  if (StackAdjustment) {
2645  // Merge with any previous or following adjustment instruction. Note: the
2646  // instructions merged with here do not have CFI, so their stack
2647  // adjustments do not feed into CfaAdjustment.
2648  StackAdjustment += mergeSPUpdates(MBB, InsertPos, true);
2649  StackAdjustment += mergeSPUpdates(MBB, InsertPos, false);
2650 
2651  if (StackAdjustment) {
2652  if (!(Fn->optForMinSize() &&
2653  adjustStackWithPops(MBB, InsertPos, DL, StackAdjustment)))
2654  BuildStackAdjustment(MBB, InsertPos, DL, StackAdjustment,
2655  /*InEpilogue=*/false);
2656  }
2657  }
2658 
2659  if (DwarfCFI && !hasFP(MF)) {
2660  // If we don't have FP, but need to generate unwind information,
2661  // we need to set the correct CFA offset after the stack adjustment.
2662  // How much we adjust the CFA offset depends on whether we're emitting
2663  // CFI only for EH purposes or for debugging. EH only requires the CFA
2664  // offset to be correct at each call site, while for debugging we want
2665  // it to be more precise.
2666 
2667  // TODO: When not using precise CFA, we also need to adjust for the
2668  // InternalAmt here.
2669  if (CfaAdjustment) {
2670  BuildCFI(MBB, InsertPos, DL,
2672  CfaAdjustment));
2673  }
2674  }
2675 
2676  return I;
2677  }
2678 
2679  if (isDestroy && InternalAmt) {
2680  // If we are performing frame pointer elimination and if the callee pops
2681  // something off the stack pointer, add it back. We do this until we have
2682  // more advanced stack pointer tracking ability.
2683  // We are not tracking the stack pointer adjustment by the callee, so make
2684  // sure we restore the stack pointer immediately after the call, there may
2685  // be spill code inserted between the CALL and ADJCALLSTACKUP instructions.
2688  while (CI != B && !std::prev(CI)->isCall())
2689  --CI;
2690  BuildStackAdjustment(MBB, CI, DL, -InternalAmt, /*InEpilogue=*/false);
2691  }
2692 
2693  return I;
2694 }
2695 
2697  assert(MBB.getParent() && "Block is not attached to a function!");
2698  const MachineFunction &MF = *MBB.getParent();
2699  return !TRI->needsStackRealignment(MF) || !MBB.isLiveIn(X86::EFLAGS);
2700 }
2701 
2703  assert(MBB.getParent() && "Block is not attached to a function!");
2704 
2705  // Win64 has strict requirements in terms of epilogue and we are
2706  // not taking a chance at messing with them.
2707  // I.e., unless this block is already an exit block, we can't use
2708  // it as an epilogue.
2709  if (STI.isTargetWin64() && !MBB.succ_empty() && !MBB.isReturnBlock())
2710  return false;
2711 
2712  if (canUseLEAForSPInEpilogue(*MBB.getParent()))
2713  return true;
2714 
2715  // If we cannot use LEA to adjust SP, we may need to use ADD, which
2716  // clobbers the EFLAGS. Check that we do not need to preserve it,
2717  // otherwise, conservatively assume this is not
2718  // safe to insert the epilogue here.
2720 }
2721 
2723  // If we may need to emit frameless compact unwind information, give
2724  // up as this is currently broken: PR25614.
2725  return (MF.getFunction()->hasFnAttribute(Attribute::NoUnwind) || hasFP(MF)) &&
2726  // The lowering of segmented stack and HiPE only support entry blocks
2727  // as prologue blocks: PR26107.
2728  // This limitation may be lifted if we fix:
2729  // - adjustForSegmentedStacks
2730  // - adjustForHiPEPrologue
2732  !MF.shouldSplitStack();
2733 }
2734 
2737  const DebugLoc &DL, bool RestoreSP) const {
2738  assert(STI.isTargetWindowsMSVC() && "funclets only supported in MSVC env");
2739  assert(STI.isTargetWin32() && "EBP/ESI restoration only required on win32");
2740  assert(STI.is32Bit() && !Uses64BitFramePtr &&
2741  "restoring EBP/ESI on non-32-bit target");
2742 
2743  MachineFunction &MF = *MBB.getParent();
2744  unsigned FramePtr = TRI->getFrameRegister(MF);
2745  unsigned BasePtr = TRI->getBaseRegister();
2746  WinEHFuncInfo &FuncInfo = *MF.getWinEHFuncInfo();
2747  X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
2748  MachineFrameInfo &MFI = MF.getFrameInfo();
2749 
2750  // FIXME: Don't set FrameSetup flag in catchret case.
2751 
2752  int FI = FuncInfo.EHRegNodeFrameIndex;
2753  int EHRegSize = MFI.getObjectSize(FI);
2754 
2755  if (RestoreSP) {
2756  // MOV32rm -EHRegSize(%ebp), %esp
2757  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32rm), X86::ESP),
2758  X86::EBP, true, -EHRegSize)
2760  }
2761 
2762  unsigned UsedReg;
2763  int EHRegOffset = getFrameIndexReference(MF, FI, UsedReg);
2764  int EndOffset = -EHRegOffset - EHRegSize;
2765  FuncInfo.EHRegNodeEndOffset = EndOffset;
2766 
2767  if (UsedReg == FramePtr) {
2768  // ADD $offset, %ebp
2769  unsigned ADDri = getADDriOpcode(false, EndOffset);
2770  BuildMI(MBB, MBBI, DL, TII.get(ADDri), FramePtr)
2771  .addReg(FramePtr)
2772  .addImm(EndOffset)
2774  ->getOperand(3)
2775  .setIsDead();
2776  assert(EndOffset >= 0 &&
2777  "end of registration object above normal EBP position!");
2778  } else if (UsedReg == BasePtr) {
2779  // LEA offset(%ebp), %esi
2780  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::LEA32r), BasePtr),
2781  FramePtr, false, EndOffset)
2783  // MOV32rm SavedEBPOffset(%esi), %ebp
2784  assert(X86FI->getHasSEHFramePtrSave());
2785  int Offset =
2786  getFrameIndexReference(MF, X86FI->getSEHFramePtrSaveIndex(), UsedReg);
2787  assert(UsedReg == BasePtr);
2788  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32rm), FramePtr),
2789  UsedReg, true, Offset)
2791  } else {
2792  llvm_unreachable("32-bit frames with WinEH must use FramePtr or BasePtr");
2793  }
2794  return MBBI;
2795 }
2796 
2797 namespace {
2798 // Struct used by orderFrameObjects to help sort the stack objects.
2799 struct X86FrameSortingObject {
2800  bool IsValid = false; // true if we care about this Object.
2801  unsigned ObjectIndex = 0; // Index of Object into MFI list.
2802  unsigned ObjectSize = 0; // Size of Object in bytes.
2803  unsigned ObjectAlignment = 1; // Alignment of Object in bytes.
2804  unsigned ObjectNumUses = 0; // Object static number of uses.
2805 };
2806 
2807 // The comparison function we use for std::sort to order our local
2808 // stack symbols. The current algorithm is to use an estimated
2809 // "density". This takes into consideration the size and number of
2810 // uses each object has in order to roughly minimize code size.
2811 // So, for example, an object of size 16B that is referenced 5 times
2812 // will get higher priority than 4 4B objects referenced 1 time each.
2813 // It's not perfect and we may be able to squeeze a few more bytes out of
2814 // it (for example : 0(esp) requires fewer bytes, symbols allocated at the
2815 // fringe end can have special consideration, given their size is less
2816 // important, etc.), but the algorithmic complexity grows too much to be
2817 // worth the extra gains we get. This gets us pretty close.
2818 // The final order leaves us with objects with highest priority going
2819 // at the end of our list.
2820 struct X86FrameSortingComparator {
2821  inline bool operator()(const X86FrameSortingObject &A,
2822  const X86FrameSortingObject &B) {
2823  uint64_t DensityAScaled, DensityBScaled;
2824 
2825  // For consistency in our comparison, all invalid objects are placed
2826  // at the end. This also allows us to stop walking when we hit the
2827  // first invalid item after it's all sorted.
2828  if (!A.IsValid)
2829  return false;
2830  if (!B.IsValid)
2831  return true;
2832 
2833  // The density is calculated by doing :
2834  // (double)DensityA = A.ObjectNumUses / A.ObjectSize
2835  // (double)DensityB = B.ObjectNumUses / B.ObjectSize
2836  // Since this approach may cause inconsistencies in
2837  // the floating point <, >, == comparisons, depending on the floating
2838  // point model with which the compiler was built, we're going
2839  // to scale both sides by multiplying with
2840  // A.ObjectSize * B.ObjectSize. This ends up factoring away
2841  // the division and, with it, the need for any floating point
2842  // arithmetic.
2843  DensityAScaled = static_cast<uint64_t>(A.ObjectNumUses) *
2844  static_cast<uint64_t>(B.ObjectSize);
2845  DensityBScaled = static_cast<uint64_t>(B.ObjectNumUses) *
2846  static_cast<uint64_t>(A.ObjectSize);
2847 
2848  // If the two densities are equal, prioritize highest alignment
2849  // objects. This allows for similar alignment objects
2850  // to be packed together (given the same density).
2851  // There's room for improvement here, also, since we can pack
2852  // similar alignment (different density) objects next to each
2853  // other to save padding. This will also require further
2854  // complexity/iterations, and the overall gain isn't worth it,
2855  // in general. Something to keep in mind, though.
2856  if (DensityAScaled == DensityBScaled)
2857  return A.ObjectAlignment < B.ObjectAlignment;
2858 
2859  return DensityAScaled < DensityBScaled;
2860  }
2861 };
2862 } // namespace
2863 
2864 // Order the symbols in the local stack.
2865 // We want to place the local stack objects in some sort of sensible order.
2866 // The heuristic we use is to try and pack them according to static number
2867 // of uses and size of object in order to minimize code size.
2869  const MachineFunction &MF, SmallVectorImpl<int> &ObjectsToAllocate) const {
2870  const MachineFrameInfo &MFI = MF.getFrameInfo();
2871 
2872  // Don't waste time if there's nothing to do.
2873  if (ObjectsToAllocate.empty())
2874  return;
2875 
2876  // Create an array of all MFI objects. We won't need all of these
2877  // objects, but we're going to create a full array of them to make
2878  // it easier to index into when we're counting "uses" down below.
2879  // We want to be able to easily/cheaply access an object by simply
2880  // indexing into it, instead of having to search for it every time.
2881  std::vector<X86FrameSortingObject> SortingObjects(MFI.getObjectIndexEnd());
2882 
2883  // Walk the objects we care about and mark them as such in our working
2884  // struct.
2885  for (auto &Obj : ObjectsToAllocate) {
2886  SortingObjects[Obj].IsValid = true;
2887  SortingObjects[Obj].ObjectIndex = Obj;
2888  SortingObjects[Obj].ObjectAlignment = MFI.getObjectAlignment(Obj);
2889  // Set the size.
2890  int ObjectSize = MFI.getObjectSize(Obj);
2891  if (ObjectSize == 0)
2892  // Variable size. Just use 4.
2893  SortingObjects[Obj].ObjectSize = 4;
2894  else
2895  SortingObjects[Obj].ObjectSize = ObjectSize;
2896  }
2897 
2898  // Count the number of uses for each object.
2899  for (auto &MBB : MF) {
2900  for (auto &MI : MBB) {
2901  if (MI.isDebugValue())
2902  continue;
2903  for (const MachineOperand &MO : MI.operands()) {
2904  // Check to see if it's a local stack symbol.
2905  if (!MO.isFI())
2906  continue;
2907  int Index = MO.getIndex();
2908  // Check to see if it falls within our range, and is tagged
2909  // to require ordering.
2910  if (Index >= 0 && Index < MFI.getObjectIndexEnd() &&
2911  SortingObjects[Index].IsValid)
2912  SortingObjects[Index].ObjectNumUses++;
2913  }
2914  }
2915  }
2916 
2917  // Sort the objects using X86FrameSortingAlgorithm (see its comment for
2918  // info).
2919  std::stable_sort(SortingObjects.begin(), SortingObjects.end(),
2920  X86FrameSortingComparator());
2921 
2922  // Now modify the original list to represent the final order that
2923  // we want. The order will depend on whether we're going to access them
2924  // from the stack pointer or the frame pointer. For SP, the list should
2925  // end up with the END containing objects that we want with smaller offsets.
2926  // For FP, it should be flipped.
2927  int i = 0;
2928  for (auto &Obj : SortingObjects) {
2929  // All invalid items are sorted at the end, so it's safe to stop.
2930  if (!Obj.IsValid)
2931  break;
2932  ObjectsToAllocate[i++] = Obj.ObjectIndex;
2933  }
2934 
2935  // Flip it if we're accessing off of the FP.
2936  if (!TRI->needsStackRealignment(MF) && hasFP(MF))
2937  std::reverse(ObjectsToAllocate.begin(), ObjectsToAllocate.end());
2938 }
2939 
2940 
2942  // RDX, the parent frame pointer, is homed into 16(%rsp) in the prologue.
2943  unsigned Offset = 16;
2944  // RBP is immediately pushed.
2945  Offset += SlotSize;
2946  // All callee-saved registers are then pushed.
2947  Offset += MF.getInfo<X86MachineFunctionInfo>()->getCalleeSavedFrameSize();
2948  // Every funclet allocates enough stack space for the largest outgoing call.
2949  Offset += getWinEHFuncletFrameSize(MF);
2950  return Offset;
2951 }
2952 
2954  MachineFunction &MF, RegScavenger *RS) const {
2955  // If this function isn't doing Win64-style C++ EH, we don't need to do
2956  // anything.
2957  const Function *Fn = MF.getFunction();
2958  if (!STI.is64Bit() || !MF.hasEHFunclets() ||
2960  return;
2961 
2962  // Win64 C++ EH needs to allocate the UnwindHelp object at some fixed offset
2963  // relative to RSP after the prologue. Find the offset of the last fixed
2964  // object, so that we can allocate a slot immediately following it. If there
2965  // were no fixed objects, use offset -SlotSize, which is immediately after the
2966  // return address. Fixed objects have negative frame indices.
2967  MachineFrameInfo &MFI = MF.getFrameInfo();
2968  WinEHFuncInfo &EHInfo = *MF.getWinEHFuncInfo();
2969  int64_t MinFixedObjOffset = -SlotSize;
2970  for (int I = MFI.getObjectIndexBegin(); I < 0; ++I)
2971  MinFixedObjOffset = std::min(MinFixedObjOffset, MFI.getObjectOffset(I));
2972 
2973  for (WinEHTryBlockMapEntry &TBME : EHInfo.TryBlockMap) {
2974  for (WinEHHandlerType &H : TBME.HandlerArray) {
2975  int FrameIndex = H.CatchObj.FrameIndex;
2976  if (FrameIndex != INT_MAX) {
2977  // Ensure alignment.
2978  unsigned Align = MFI.getObjectAlignment(FrameIndex);
2979  MinFixedObjOffset -= std::abs(MinFixedObjOffset) % Align;
2980  MinFixedObjOffset -= MFI.getObjectSize(FrameIndex);
2981  MFI.setObjectOffset(FrameIndex, MinFixedObjOffset);
2982  }
2983  }
2984  }
2985 
2986  // Ensure alignment.
2987  MinFixedObjOffset -= std::abs(MinFixedObjOffset) % 8;
2988  int64_t UnwindHelpOffset = MinFixedObjOffset - SlotSize;
2989  int UnwindHelpFI =
2990  MFI.CreateFixedObject(SlotSize, UnwindHelpOffset, /*Immutable=*/false);
2991  EHInfo.UnwindHelpFrameIdx = UnwindHelpFI;
2992 
2993  // Store -2 into UnwindHelp on function entry. We have to scan forwards past
2994  // other frame setup instructions.
2995  MachineBasicBlock &MBB = MF.front();
2996  auto MBBI = MBB.begin();
2997  while (MBBI != MBB.end() && MBBI->getFlag(MachineInstr::FrameSetup))
2998  ++MBBI;
2999 
3000  DebugLoc DL = MBB.findDebugLoc(MBBI);
3001  addFrameReference(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64mi32)),
3002  UnwindHelpFI)
3003  .addImm(-2);
3004 }
void push_front(MachineBasicBlock *MBB)
MachineBasicBlock::iterator restoreWin32EHStackPointers(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, bool RestoreSP=false) const
Sets up EBP and optionally ESI based on the incoming EBP value.
unsigned getStackAlignment() const
getStackAlignment - This method returns the number of bytes to which the stack pointer must be aligne...
std::enable_if< std::numeric_limits< T >::is_signed, bool >::type getAsInteger(unsigned Radix, T &Result) const
Parse the current string as an integer of the specified radix.
Definition: StringRef.h:494
constexpr bool isUInt< 32 >(uint64_t x)
Definition: MathExtras.h:315
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
static bool flagsNeedToBePreservedBeforeTheTerminators(const MachineBasicBlock &MBB)
Check if the flags need to be preserved before the terminators.
BitVector & set()
Definition: BitVector.h:219
instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
int getDwarfRegNum(unsigned RegNum, bool isEH) const
Map a target register to an equivalent dwarf register number.
bool verify(Pass *p=nullptr, const char *Banner=nullptr, bool AbortOnError=true) const
Run the current MachineFunction through the machine code verifier, useful for debugger use...
SmallVector< WinEHHandlerType, 1 > HandlerArray
Definition: WinEHFuncInfo.h:79
const GlobalValue * getGlobal() const
iterator_range< livein_iterator > liveins() const
LLVM_ATTRIBUTE_NORETURN void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
size_t i
bool isTargetCygMing() const
Definition: X86Subtarget.h:541
bool hasCopyImplyingStackAdjustment() const
Returns true if the function contains operations which will lower down to instructions which manipula...
unsigned createVirtualRegister(const TargetRegisterClass *RegClass)
createVirtualRegister - Create and return a new virtual register in the function with the specified r...
const X86InstrInfo * getInstrInfo() const override
Definition: X86Subtarget.h:344
bool isTargetMachO() const
Definition: X86Subtarget.h:506
bool hasBasePointer(const MachineFunction &MF) const
unsigned getNumOperands() const
Return number of MDNode operands.
Definition: Metadata.h:1040
bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const std::vector< CalleeSavedInfo > &CSI, const TargetRegisterInfo *TRI) const override
restoreCalleeSavedRegisters - Issues instruction(s) to restore all callee saved registers and returns...
iterator getFirstTerminator()
Returns an iterator to the first terminator instruction of this basic block.
static unsigned getLEArOpcode(unsigned IsLP64)
bool callsEHReturn() const
static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register, int Offset)
.cfi_offset Previous value of Register is saved at offset Offset from CFA.
Definition: MCDwarf.h:396
void transferSuccessorsAndUpdatePHIs(MachineBasicBlock *FromMBB)
Transfers all the successors, as in transferSuccessors, and update PHI operands in the successor bloc...
bool isCleanupFuncletEntry() const
Returns true if this is the entry block of a cleanup funclet.
const std::vector< LandingPadInfo > & getLandingPads() const
Return a reference to the landing pad info for the current function.
bool adjustsStack() const
Return true if this function adjusts the stack – e.g., when calling another function.
constexpr bool isInt< 8 >(int64_t x)
Definition: MathExtras.h:268
void setCalleeSavedFrameSize(unsigned bytes)
arg_iterator arg_end()
Definition: Function.h:559
bool isTargetWindowsCoreCLR() const
Definition: X86Subtarget.h:525
A debug info location.
Definition: DebugLoc.h:34
Metadata node.
Definition: Metadata.h:830
void setIsDead(bool Val=true)
Attribute getFnAttribute(Attribute::AttrKind Kind) const
Return the attribute for the given attribute kind.
Definition: Function.h:234
const Function * getFunction() const
getFunction - Return the LLVM function that this machine code represents
uint64_t alignTo(uint64_t Value, uint64_t Align, uint64_t Skew=0)
Returns the next integer (mod 2**64) that is greater than or equal to Value and is a multiple of Alig...
Definition: MathExtras.h:664
iterator_range< mop_iterator > operands()
Definition: MachineInstr.h:301
static MCCFIInstruction createDefCfaOffset(MCSymbol *L, int Offset)
.cfi_def_cfa_offset modifies a rule for computing CFA.
Definition: MCDwarf.h:383
static MCCFIInstruction createAdjustCfaOffset(MCSymbol *L, int Adjustment)
.cfi_adjust_cfa_offset Same as .cfi_def_cfa_offset, but Offset is a relative value that is added/subt...
Definition: MCDwarf.h:390
X86FrameLowering(const X86Subtarget &STI, unsigned StackAlignOverride)
bool optForMinSize() const
Optimize this function for minimum size (-Oz).
Definition: Function.h:461
return AArch64::GPR64RegClass contains(Reg)
CallingConv::ID getCallingConv() const
getCallingConv()/setCallingConv(CC) - These method get and set the calling convention of this functio...
Definition: Function.h:165
iterator_range< succ_iterator > successors()
size_t arg_size() const
Definition: Function.cpp:327
StringRef getName() const
Return a constant reference to the value's name.
Definition: Value.cpp:191
X86MachineFunctionInfo - This class is derived from MachineFunction and contains private X86 target-s...
unsigned getMaxAlignment() const
Return the alignment in bytes that this function must be aligned to, which is greater than the defaul...
const std::vector< CalleeSavedInfo > & getCalleeSavedInfo() const
Returns a reference to call saved info vector for the current function.
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects...
bool Uses64BitFramePtr
True if the 64-bit frame or stack pointer should be used.
unsigned getSize() const
Return the size of the register in bytes, which is also the size of a stack slot allocated to hold a ...
bool isTargetNaCl64() const
Definition: X86Subtarget.h:514
CLEANUPRET - Represents a return from a cleanup block funclet.
Definition: ISDOpcodes.h:606
A tuple of MDNodes.
Definition: Metadata.h:1282
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
DILocation * get() const
Get the underlying DILocation.
Definition: DebugLoc.cpp:21
const HexagonInstrInfo * TII
bool isTargetDarwin() const
Definition: X86Subtarget.h:498
const MCAsmInfo * getMCAsmInfo() const
Return target specific asm information.
X86_INTR - x86 hardware interrupt context.
Definition: CallingConv.h:169
bool DisableFramePointerElim(const MachineFunction &MF) const
DisableFramePointerElim - This returns true if frame pointer elimination optimization should be disab...
bool isReg() const
isReg - Tests if this is a MO_Register operand.
void eraseFromParent()
Unlink 'this' from the containing basic block and delete it.
const Module * getModule() const
Constant * getPersonalityFn() const
Get the personality function associated with this function.
Definition: Function.cpp:1218
Reg
All possible values of the reg field in the ModR/M byte.
iterator_range< iterator > terminators()
void BuildCFI(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, const MCCFIInstruction &CFIInst) const
Wraps up getting a CFI index and building a MachineInstr for it.
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted...
bool isFrameAddressTaken() const
This method may be called any time after instruction selection is complete to determine if there is a...
void adjustForHiPEPrologue(MachineFunction &MF, MachineBasicBlock &PrologueMBB) const override
Erlang programs may need a special prologue to handle the stack size they might need at runtime...
bool isFixedObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a fixed stack object.
static const uint64_t kSplitStackAvailable
bool hasDebugInfo() const
Returns true if valid debug info is present.
virtual unsigned getFrameRegister(const MachineFunction &MF) const =0
Debug information queries.
LLVM_NODISCARD unsigned addFrameInst(const MCCFIInstruction &Inst)
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
int CreateFixedSpillStackObject(uint64_t Size, int64_t SPOffset, bool Immutable=false)
Create a spill slot at a fixed location on the stack.
void processFunctionBeforeFrameFinalized(MachineFunction &MF, RegScavenger *RS) const override
processFunctionBeforeFrameFinalized - This method is called immediately before the specified function...
LLVM_NODISCARD bool empty() const
Definition: SmallVector.h:60
uint64_t getZExtValue() const
Return the constant as a 64-bit unsigned integer value after it has been zero extended as appropriate...
Definition: Constants.h:154
bool isGlobal() const
isGlobal - Tests if this is a MO_GlobalAddress operand.
auto reverse(ContainerTy &&C, typename std::enable_if< has_rbegin< ContainerTy >::value >::type *=nullptr) -> decltype(make_range(C.rbegin(), C.rend()))
Definition: STLExtras.h:241
unsigned getWinEHParentFrameOffset(const MachineFunction &MF) const override
uint16_t StackAdjustment(const RuntimeFunction &RF)
StackAdjustment - calculated stack adjustment in words.
Definition: ARMWinEH.h:197
const MachineBasicBlock & front() const
bool hasFP(const MachineFunction &MF) const override
hasFP - Return true if the specified function should have a dedicated frame pointer register...
#define F(x, y, z)
Definition: MD5.cpp:51
int getObjectIndexBegin() const
Return the minimum frame object index.
bool needsFrameIndexResolution(const MachineFunction &MF) const override
MachineBasicBlock::iterator eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const override
This method is called during prolog/epilog code insertion to eliminate call frame setup and destroy p...
bool hasStackObjects() const
Return true if there are any stack objects in this function.
bool isLiveIn(unsigned Reg) const
int getOffsetAdjustment() const
Return the correction for frame offsets.
void inlineStackProbe(MachineFunction &MF, MachineBasicBlock &PrologMBB) const override
Replace a StackProbe inline-stub with the actual probe code inline.
MachineBasicBlock * MBB
static unsigned getANDriOpcode(bool IsLP64, int64_t Imm)
bool isBundled() const
Return true if this instruction part of a bundle.
Definition: MachineInstr.h:223
const RegList & Regs
bool is64Bit() const
Is this x86_64? (disregarding specific ABI / programming model)
Definition: X86Subtarget.h:381
X86_FastCall - 'fast' analog of X86_StdCall.
Definition: CallingConv.h:91
static unsigned getHiPELiteral(NamedMDNode *HiPELiteralsMD, const StringRef LiteralName)
Lookup an ERTS parameter in the !hipe.literals named metadata node.
static cl::opt< int > PageSize("imp-null-check-page-size", cl::desc("The page size of the target in bytes"), cl::init(4096))
static GCRegistry::Add< OcamlGC > B("ocaml","ocaml 3.10-compatible GC")
Value wrapper in the Metadata hierarchy.
Definition: Metadata.h:325
static unsigned calculateSetFPREG(uint64_t SPAdjust)
bool Is64Bit
Is64Bit implies that x86_64 instructions are available.
unsigned getUndefRegState(bool B)
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *bb=nullptr)
CreateMachineBasicBlock - Allocate a new MachineBasicBlock.
Maximum length of the test input libFuzzer tries to guess a good value based on the corpus and reports it always prefer smaller inputs during the corpus shuffle When libFuzzer itself reports a bug this exit code will be used If indicates the maximal total time in seconds to run the fuzzer minimizes the provided crash input Use with etc Experimental Use value profile to guide fuzzing Number of simultaneous worker processes to run the jobs If min(jobs, NumberOfCpuCores()/2)\" is used.") FUZZER_FLAG_INT(reload
unsigned getKillRegState(bool B)
const BasicBlock * getBasicBlock() const
Return the LLVM basic block that this instance corresponded to originally.
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
Definition: MachineInstr.h:273
static GCRegistry::Add< CoreCLRGC > E("coreclr","CoreCLR-compatible GC")
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
TargetInstrInfo - Interface to description of machine instruction set.
bool isDebugValue() const
Definition: MachineInstr.h:777
unsigned getDefRegState(bool B)
The memory access is volatile.
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
bool hasStackMap() const
This method may be called any time after instruction selection is complete to determine if there is a...
void addLiveIn(MCPhysReg PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
bool canUseAsPrologue(const MachineBasicBlock &MBB) const override
Check whether or not the given MBB can be used as a prologue for the target.
bool regsOverlap(unsigned regA, unsigned regB) const
Returns true if the two registers are equal or alias each other.
unsigned const MachineRegisterInfo * MRI
bool isCallingConvWin64(CallingConv::ID CC) const
Definition: X86Subtarget.h:562
LLVM_NODISCARD LLVM_ATTRIBUTE_ALWAYS_INLINE size_t find(char C, size_t From=0) const
Search for the first character C in the string.
Definition: StringRef.h:295
CodeModel::Model getCodeModel() const
Returns the code model.
LLVM Basic Block Representation.
Definition: BasicBlock.h:51
void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const override
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
unsigned getAlignment() const
Return the minimum required alignment for a register of this class.
static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register)
.cfi_def_cfa_register modifies a rule for computing CFA.
Definition: MCDwarf.h:376
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
void setStackSize(uint64_t Size)
Set the size of the stack.
bool useLeaForSP() const
Definition: X86Subtarget.h:464
static bool is64Bit(const char *name)
void emitCalleeSavedFrameMoves(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL) const
SmallSet - This maintains a set of unique values, optimizing for the case when the set is small (less...
Definition: SmallSet.h:36
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:279
bool isTargetWin32() const
Definition: X86Subtarget.h:549
#define H(x, y, z)
Definition: MD5.cpp:53
static MCCFIInstruction createGnuArgsSize(MCSymbol *L, int Size)
A special wrapper for .cfi_escape that indicates GNU_ARGS_SIZE.
Definition: MCDwarf.h:457
bool hasPersonalityFn() const
Check whether this function has a personality function.
Definition: Function.h:581
bool canUseAsEpilogue(const MachineBasicBlock &MBB) const override
Check whether or not the given MBB can be used as a epilogue for the target.
EHPersonality classifyEHPersonality(const Value *Pers)
See if the given exception handling personality function is one that we understand.
void setFlag(MIFlag Flag)
Set a MI flag.
Definition: MachineInstr.h:166
MCRegAliasIterator enumerates all registers aliasing Reg.
static const MachineInstrBuilder & addRegOffset(const MachineInstrBuilder &MIB, unsigned Reg, bool isKill, int Offset)
addRegOffset - This function is used to add a memory reference of the form [Reg + Offset]...
bool shouldSplitStack() const
Should we be emitting segmented stack stuff for the function.
uint32_t Offset
bool isEHFuncletEntry() const
Returns true if this is the entry block of an EH funclet.
MDNode * getOperand(unsigned i) const
Definition: Metadata.cpp:1042
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
const TargetRegisterClass * getGPRsForTailCall(const MachineFunction &MF) const
getGPRsForTailCall - Returns a register class with registers that can be used in forming tail calls...
arg_iterator arg_begin()
Definition: Function.h:550
self_iterator getIterator()
Definition: ilist_node.h:81
int mergeSPUpdates(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, bool doMergeWithPrevious) const
Check the instruction before/after the passed instruction.
std::pair< NoneType, bool > insert(const T &V)
insert - Insert an element into the set if it isn't already there.
Definition: SmallSet.h:80
int CreateFixedObject(uint64_t Size, int64_t SPOffset, bool Immutable, bool isAliased=false)
Create a new object at a fixed location on the stack.
bool isOSWindows() const
Definition: X86Subtarget.h:543
int CreateSpillStackObject(uint64_t Size, unsigned Alignment)
Create a new statically sized stack object that represents a spill slot, returning a nonnegative iden...
bool enableShrinkWrapping(const MachineFunction &MF) const override
Returns true if the target will correctly handle shrink wrapping.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
This class contains a discriminated union of information about pointers in memory operands...
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
unsigned getBaseRegister() const
const MCInstrDesc & get(unsigned Opcode) const
Return the machine instruction descriptor that corresponds to the specified instruction opcode...
Definition: MCInstrInfo.h:45
unsigned getStackRegister() const
static unsigned getSUBriOpcode(unsigned IsLP64, int64_t Imm)
bool isReturnBlock() const
Convenience function that returns true if the block ends in a return instruction. ...
virtual bool hasReservedCallFrame(const MachineFunction &MF) const
hasReservedCallFrame - Under normal circumstances, when a frame pointer is not required, we reserve argument space for call sites in the function immediately on entry to the current function.
static bool isFuncletReturnInstr(MachineInstr &MI)
int64_t getObjectOffset(int ObjectIdx) const
Return the assigned stack offset of the specified object from the incoming stack pointer.
virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
static unsigned getADDriOpcode(unsigned IsLP64, int64_t Imm)
static const MachineInstrBuilder & addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset=0, bool mem=true)
addFrameReference - This function is used to add a reference to the base of an abstract object on the...
DebugLoc findDebugLoc(instr_iterator MBBI)
Find the next valid DebugLoc starting at MBBI, skipping any DBG_VALUE instructions.
The memory access writes data.
size_type count(const T &V) const
count - Return 1 if the element is in the set, 0 otherwise.
Definition: SmallSet.h:64
bool hasCalls() const
Return true if the current function has any function calls.
virtual const TargetFrameLowering * getFrameLowering() const
StringRef getString() const
Definition: Metadata.cpp:424
const MDOperand & getOperand(unsigned I) const
Definition: Metadata.h:1034
bool isTargetWindowsMSVC() const
Definition: X86Subtarget.h:517
const X86Subtarget & STI
Iterator for intrusive lists based on ilist_node.
void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
This is the shared class of boolean and integer constants.
Definition: Constants.h:88
constexpr bool isInt< 32 >(int64_t x)
Definition: MathExtras.h:274
bool hasReservedCallFrame(const MachineFunction &MF) const override
hasReservedCallFrame - Under normal circumstances, when a frame pointer is not required, we reserve argument space for call sites in the function immediately on entry to the current function.
const MCContext & getContext() const
bool isTarget64BitILP32() const
Is this x86_64 with the ILP32 programming model (x32 ABI)?
Definition: X86Subtarget.h:394
MachineOperand class - Representation of each machine instruction operand.
unsigned getObjectAlignment(int ObjectIdx) const
Return the alignment of the specified stack object.
int getOffsetOfLocalArea() const
getOffsetOfLocalArea - This method returns the offset of the local area from the stack pointer on ent...
void emitStackProbe(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, bool InProlog) const
Emit target stack probe code.
unsigned getMaxCallFrameSize() const
Return the maximum size of a call frame that must be allocated for an outgoing function call...
Information about stack frame layout on the target.
bool isTargetLinux() const
Definition: X86Subtarget.h:508
bool needsUnwindTableEntry() const
True if this function needs an unwind table.
Definition: Function.h:415
int getFrameIndexReferencePreferSP(const MachineFunction &MF, int FI, unsigned &FrameReg, bool IgnoreSPUpdates) const override
Same as getFrameIndexReference, except that the stack pointer (as opposed to the frame pointer) will ...
void setOffsetAdjustment(int Adj)
Set the correction for frame offsets.
bool canSimplifyCallFramePseudos(const MachineFunction &MF) const override
canSimplifyCallFramePseudos - If there is a reserved call frame, the call frame pseudos can be simpli...
IterT skipDebugInstructionsBackward(IterT It, IterT Begin)
Decrement It until it points to a non-debug instruction or to Begin and return the resulting iterator...
unsigned getX86SubSuperRegister(unsigned, unsigned, bool High=false)
Returns the sub or super register of a specific X86 register.
static bool isTailCallOpcode(unsigned Opc)
SmallVector< WinEHTryBlockMapEntry, 4 > TryBlockMap
Definition: WinEHFuncInfo.h:99
const TargetInstrInfo & TII
MachineMemOperand * getMachineMemOperand(MachinePointerInfo PtrInfo, MachineMemOperand::Flags f, uint64_t s, unsigned base_alignment, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr, SynchronizationScope SynchScope=CrossThread, AtomicOrdering Ordering=AtomicOrdering::NotAtomic, AtomicOrdering FailureOrdering=AtomicOrdering::NotAtomic)
getMachineMemOperand - Allocate a new MachineMemOperand.
bool hasEHFunclets() const
const TargetRegisterClass * getMinimalPhysRegClass(unsigned Reg, MVT VT=MVT::Other) const
Returns the Register Class of a physical register of the given type, picking the most sub register cl...
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override
void setHasAddressTaken()
Set this block to reflect that it potentially is the target of an indirect branch.
IterT skipDebugInstructionsForward(IterT It, IterT End)
Increment It until it points to a non-debug instruction or to End and return the resulting iterator...
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override
emitProlog/emitEpilog - These methods insert prolog and epilog code into the function.
bool canUseLEAForSPInEpilogue(const MachineFunction &MF) const
Check that LEA can be used on SP in an epilogue sequence for MF.
bool isTargetDragonFly() const
Definition: X86Subtarget.h:500
CATCHRET - Represents a return from a catch block funclet.
Definition: ISDOpcodes.h:602
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
const MCRegisterInfo * getRegisterInfo() const
Definition: MCContext.h:245
The memory access reads data.
static MachinePointerInfo getFixedStack(MachineFunction &MF, int FI, int64_t Offset=0)
Return a MachinePointerInfo record that refers to the specified FrameIndex.
Representation of each machine instruction.
Definition: MachineInstr.h:52
bool is32Bit() const
Definition: X86Subtarget.h:385
bool assignCalleeSavedSpillSlots(MachineFunction &MF, const TargetRegisterInfo *TRI, std::vector< CalleeSavedInfo > &CSI) const override
assignCalleeSavedSpillSlots - Allows target to override spill slot assignment logic.
NamedMDNode * getNamedMetadata(const Twine &Name) const
Return the first NamedMDNode in the module with the specified name.
Definition: Module.cpp:265
void adjustForSegmentedStacks(MachineFunction &MF, MachineBasicBlock &PrologueMBB) const override
Adjust the prologue to have the function use segmented stacks.
bool hasPatchPoint() const
This method may be called any time after instruction selection is complete to determine if there is a...
void ensureMaxAlignment(unsigned Align)
Make sure the function is at least Align bytes aligned.
bool hasFnAttribute(Attribute::AttrKind Kind) const
Return true if the function has the attribute.
Definition: Function.h:226
static const size_t npos
Definition: StringRef.h:51
void splice(iterator Where, MachineBasicBlock *Other, iterator From)
Take an instruction from MBB 'Other' at the position From, and insert it into this MBB right before '...
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
const MachineInstrBuilder & addExternalSymbol(const char *FnName, unsigned char TargetFlags=0) const
bool isTarget64BitLP64() const
Is this x86_64 with the LP64 programming model (standard AMD64, no x32)?
Definition: X86Subtarget.h:400
const MachineInstrBuilder & addMemOperand(MachineMemOperand *MMO) const
#define I(x, y, z)
Definition: MD5.cpp:54
bool isCall(QueryType Type=AnyInBundle) const
Definition: MachineInstr.h:424
APFloat abs(APFloat X)
Returns the absolute value of the argument.
Definition: APFloat.h:1099
Pair of physical register and lane mask.
bool callsUnwindInit() const
const TargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
LLVM_NODISCARD std::enable_if<!is_simple_type< Y >::value, typename cast_retty< X, const Y >::ret_type >::type dyn_cast(const Y &Val)
Definition: Casting.h:287
unsigned getSlotSize() const
instr_iterator insert(instr_iterator I, MachineInstr *M)
Insert MI into the instruction list before I, possibly inside a bundle.
static unsigned getSUBrrOpcode(unsigned isLP64)
const WinEHFuncInfo * getWinEHFuncInfo() const
getWinEHFuncInfo - Return information about how the current function uses Windows exception handling...
iterator getFirstNonPHI()
Returns a pointer to the first instruction in this block that is not a PHINode instruction.
union llvm::WinEHHandlerType::@61 CatchObj
The CatchObj starts out life as an LLVM alloca and is eventually turned frame index.
bool hasVarSizedObjects() const
This method may be called any time after instruction selection is complete to determine if the stack ...
const X86RegisterInfo * TRI
bool isLiveIn(MCPhysReg Reg, LaneBitmask LaneMask=LaneBitmask::getAll()) const
Return true if the specified register is in the live in set.
OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents 'eh_return' gcc dwarf builtin...
Definition: ISDOpcodes.h:102
unsigned getReg() const
getReg - Returns the register number.
StringRef getValueAsString() const
Return the attribute's value as a string.
Definition: Attributes.cpp:178
CallingConvention
Definition: Dwarf.h:181
LLVM_NODISCARD size_t find_first_of(char C, size_t From=0) const
Find the first character in the string that is C, or npos if not found.
Definition: StringRef.h:392
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
static bool isEAXLiveIn(MachineBasicBlock &MBB)
static unsigned getADDrrOpcode(unsigned isLP64)
void insert(iterator MBBI, MachineBasicBlock *MBB)
bool isAsynchronousEHPersonality(EHPersonality Pers)
Returns true if this personality function catches asynchronous exceptions.
bool isTargetWin64() const
Definition: X86Subtarget.h:545
static unsigned GetScratchRegister(bool Is64Bit, bool IsLP64, const MachineFunction &MF, bool Primary)
GetScratchRegister - Get a temp register for performing work in the segmented stack and the Erlang/Hi...
void emitSPUpdate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, int64_t NumBytes, bool InEpilogue) const
Emit a series of instructions to increment / decrement the stack pointer by a constant value...
const MachineInstrBuilder & addMBB(MachineBasicBlock *MBB, unsigned char TargetFlags=0) const
static unsigned findDeadCallerSavedReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, const X86RegisterInfo *TRI, bool Is64Bit)
findDeadCallerSavedReg - Return a caller-saved register that isn't live when it reaches the "return" ...
bool isTargetFreeBSD() const
Definition: X86Subtarget.h:499
static const unsigned FramePtr
unsigned getNumOperands() const
Definition: Metadata.cpp:1038
int getFrameIndexReference(const MachineFunction &MF, int FI, unsigned &FrameReg) const override
getFrameIndexReference - This method should return the base register and offset used to reference a f...
bool hasOpaqueSPAdjustment() const
Returns true if the function contains opaque dynamic stack adjustments.
void setObjectOffset(int ObjectIdx, int64_t SPOffset)
Set the stack frame offset of the specified object.
IRTranslator LLVM IR MI
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:47
MachineModuleInfo & getMMI() const
A single uniqued string.
Definition: Metadata.h:586
unsigned getFrameRegister(const MachineFunction &MF) const override
bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const std::vector< CalleeSavedInfo > &CSI, const TargetRegisterInfo *TRI) const override
spillCalleeSavedRegisters - Issues instruction(s) to spill all callee saved registers and returns tru...
No exception support.
const MachineInstrBuilder & setMIFlag(MachineInstr::MIFlag Flag) const
int getObjectIndexEnd() const
Return one past the maximum frame object index.
void orderFrameObjects(const MachineFunction &MF, SmallVectorImpl< int > &ObjectsToAllocate) const override
Order the symbols in the local stack.
static bool HasNestArgument(const MachineFunction *MF)
const MachineInstrBuilder & addReg(unsigned RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
SlotIndex - An opaque wrapper around machine indexes.
Definition: SlotIndexes.h:76
static GCRegistry::Add< ErlangGC > A("erlang","erlang-compatible garbage collector")
bool isVarArg() const
isVarArg - Return true if this function takes a variable number of arguments.
Definition: Function.cpp:234
Fast - This calling convention attempts to make calls as fast as possible (e.g.
Definition: CallingConv.h:42
int64_t getObjectSize(int ObjectIdx) const
Return the size of the specified object.
This class contains meta information specific to a module.
bool usesWindowsCFI() const
Definition: MCAsmInfo.h:552