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LLVM
4.0.0
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#include "llvm/CodeGen/MachineScheduler.h"#include "llvm/ADT/PriorityQueue.h"#include "llvm/Analysis/AliasAnalysis.h"#include "llvm/CodeGen/LiveIntervalAnalysis.h"#include "llvm/CodeGen/MachineDominators.h"#include "llvm/CodeGen/MachineLoopInfo.h"#include "llvm/CodeGen/MachineRegisterInfo.h"#include "llvm/CodeGen/Passes.h"#include "llvm/CodeGen/RegisterClassInfo.h"#include "llvm/CodeGen/ScheduleDFS.h"#include "llvm/CodeGen/ScheduleHazardRecognizer.h"#include "llvm/CodeGen/TargetPassConfig.h"#include "llvm/Support/CommandLine.h"#include "llvm/Support/Debug.h"#include "llvm/Support/ErrorHandling.h"#include "llvm/Support/GraphWriter.h"#include "llvm/Support/raw_ostream.h"#include "llvm/Target/TargetInstrInfo.h"Go to the source code of this file.
Classes | |
| struct | llvm::GraphTraits< ScheduleDAGMI * > |
| struct | llvm::DOTGraphTraits< ScheduleDAGMI * > |
Namespaces | |
| llvm | |
| Compute iterated dominance frontiers using a linear time algorithm. | |
Macros | |
| #define | DEBUG_TYPE "misched" |
Variables | |
| cl::opt< bool > | llvm::DumpCriticalPathLength ("misched-dcpl", cl::Hidden, cl::desc("Print critical path length to stdout")) |
| static cl::opt< bool > | ViewMISchedDAGs ("view-misched-dags", cl::Hidden, cl::desc("Pop up a window to show MISched dags after they are processed")) |
| static cl::opt< unsigned > | ViewMISchedCutoff ("view-misched-cutoff", cl::Hidden, cl::desc("Hide nodes with more predecessor/successor than cutoff")) |
| In some situations a few uninteresting nodes depend on nearly all other nodes in the graph, provide a cutoff to hide them. More... | |
| static cl::opt< unsigned > | MISchedCutoff ("misched-cutoff", cl::Hidden, cl::desc("Stop scheduling after N instructions"), cl::init(~0U)) |
| static cl::opt< std::string > | SchedOnlyFunc ("misched-only-func", cl::Hidden, cl::desc("Only schedule this function")) |
| static cl::opt< unsigned > | SchedOnlyBlock ("misched-only-block", cl::Hidden, cl::desc("Only schedule this MBB#")) |
| static cl::opt< unsigned > | ReadyListLimit ("misched-limit", cl::Hidden, cl::desc("Limit ready list to N instructions"), cl::init(256)) |
| Avoid quadratic complexity in unusually large basic blocks by limiting the size of the ready lists. More... | |
| static cl::opt< bool > | EnableRegPressure ("misched-regpressure", cl::Hidden, cl::desc("Enable register pressure scheduling."), cl::init(true)) |
| static cl::opt< bool > | EnableCyclicPath ("misched-cyclicpath", cl::Hidden, cl::desc("Enable cyclic critical path analysis."), cl::init(true)) |
| static cl::opt< bool > | EnableMemOpCluster ("misched-cluster", cl::Hidden, cl::desc("Enable memop clustering."), cl::init(true)) |
| static cl::opt< bool > | EnableMacroFusion ("misched-fusion", cl::Hidden, cl::desc("Enable scheduling for macro fusion."), cl::init(true)) |
| static cl::opt< bool > | VerifyScheduling ("verify-misched", cl::Hidden, cl::desc("Verify machine instrs before and after machine scheduling")) |
| static const unsigned | MinSubtreeSize = 8 |
| machine | scheduler |
| machine Machine Instruction | Scheduler |
| machine Machine Instruction | false |
| static cl::opt < MachineSchedRegistry::ScheduleDAGCtor, false, RegisterPassParser < MachineSchedRegistry > > | MachineSchedOpt ("misched", cl::init(&useDefaultMachineSched), cl::Hidden, cl::desc("Machine instruction scheduler to use")) |
| MachineSchedOpt allows command line selection of the scheduler. More... | |
| static MachineSchedRegistry | DefaultSchedRegistry ("default","Use the target's default scheduler choice.", useDefaultMachineSched) |
| static cl::opt< bool > | EnableMachineSched ("enable-misched", cl::desc("Enable the machine instruction scheduling pass."), cl::init(true), cl::Hidden) |
| static cl::opt< bool > | EnablePostRAMachineSched ("enable-post-misched", cl::desc("Enable the post-ra machine instruction scheduling pass."), cl::init(true), cl::Hidden) |
| static const unsigned | InvalidCycle = ~0U |
| static MachineSchedRegistry | GenericSchedRegistry ("converge","Standard converging scheduler.", createConveringSched) |
| static MachineSchedRegistry | ILPMaxRegistry ("ilpmax","Schedule bottom-up for max ILP", createILPMaxScheduler) |
| static MachineSchedRegistry | ILPMinRegistry ("ilpmin","Schedule bottom-up for min ILP", createILPMinScheduler) |
| static MachineSchedRegistry | ShufflerRegistry ("shuffle","Shuffle machine instructions alternating directions", createInstructionShuffler) |
| #define DEBUG_TYPE "misched" |
Definition at line 36 of file MachineScheduler.cpp.
Minimize physical register live ranges.
Regalloc wants them adjacent to their physreg def/use.
FIXME: This is an unnecessary check on the critical path. Most are root/leaf copies which can be prescheduled. The rest (e.g. x86 MUL) could be bundled with the operation that produces or consumes the physreg. We'll do this when regalloc has support for parallel copies.
Definition at line 2783 of file MachineScheduler.cpp.
References llvm::SUnit::getInstr(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineInstr::isCopy(), llvm::TargetRegisterInfo::isPhysicalRegister(), llvm::SUnit::NumPredsLeft, and llvm::SUnit::NumSuccsLeft.
Referenced by llvm::GenericScheduler::tryCandidate().
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Definition at line 3167 of file MachineScheduler.cpp.
References llvm::createGenericSchedLive().
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Definition at line 3410 of file MachineScheduler.cpp.
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Definition at line 3413 of file MachineScheduler.cpp.
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Definition at line 3497 of file MachineScheduler.cpp.
References assert(), llvm::ForceBottomUp, and llvm::ForceTopDown.
Definition at line 2772 of file MachineScheduler.cpp.
References llvm::SUnit::WeakPredsLeft, and llvm::SUnit::WeakSuccsLeft.
Referenced by llvm::GenericScheduler::tryCandidate().
| INITIALIZE_PASS | ( | PostMachineScheduler | , |
| "postmisched" | , | ||
| "PostRA Machine Instruction Scheduler" | , | ||
| false | , | ||
| false | |||
| ) |
Definition at line 188 of file MachineScheduler.cpp.
References llvm::PassRegistry::getPassRegistry(), and llvm::initializePostMachineSchedulerPass().
| INITIALIZE_PASS_BEGIN | ( | MachineScheduler | , |
| "machine-scheduler" | , | ||
| "Machine Instruction Scheduler" | , | ||
| false | , | ||
| false | |||
| ) |
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Return true of the given instruction should not be included in a scheduling region.
MachineScheduler does not currently support scheduling across calls. To handle calls, the DAG builder needs to be modified to create register anti/output dependencies on the registers clobbered by the call's regmask operand. In PreRA scheduling, the stack pointer adjustment already prevents scheduling across calls. In PostRA scheduling, we need the isCall to enforce the boundary, but there would be no benefit to postRA scheduling across calls this late anyway.
Definition at line 396 of file MachineScheduler.cpp.
References llvm::TargetInstrInfo::isSchedulingBoundary().
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If this iterator is a debug value, increment until reaching the End or a non-debug instruction.
Definition at line 256 of file MachineScheduler.cpp.
References llvm::WebAssembly::End, and I.
Referenced by llvm::ScheduleDAGMI::initQueues(), nextIfDebug(), llvm::ScheduleDAGMI::schedule(), llvm::ScheduleDAGMILive::scheduleMI(), and llvm::ScheduleDAGMILive::updatePressureDiffs().
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Non-const version.
Definition at line 267 of file MachineScheduler.cpp.
References llvm::MachineInstrBundleIterator< Ty, IsReverse >::getNonConstIterator(), and nextIfDebug().
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Decrement this iterator until reaching the top or a non-debug instr.
Definition at line 235 of file MachineScheduler.cpp.
Referenced by priorNonDebug(), llvm::ScheduleDAGMI::schedule(), and llvm::ScheduleDAGMILive::scheduleMI().
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Non-const version.
Definition at line 247 of file MachineScheduler.cpp.
References llvm::MachineInstrBundleIterator< Ty, IsReverse >::getNonConstIterator(), and priorNonDebug().
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Definition at line 2582 of file MachineScheduler.cpp.
References llvm::dbgs(), DEBUG, and llvm::GenericSchedulerBase::getReasonStr().
Referenced by llvm::GenericScheduler::pickNode(), llvm::PostGenericScheduler::pickNode(), llvm::GenericScheduler::pickNodeBidirectional(), and tracePick().
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Definition at line 2587 of file MachineScheduler.cpp.
References llvm::GenericSchedulerBase::SchedCandidate::AtTop, llvm::GenericSchedulerBase::SchedCandidate::Reason, and tracePick().
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Definition at line 2541 of file MachineScheduler.cpp.
References llvm::GenericSchedulerBase::SchedCandidate::Reason.
Referenced by llvm::GenericScheduler::tryCandidate(), llvm::PostGenericScheduler::tryCandidate(), tryLatency(), and tryPressure().
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Definition at line 2557 of file MachineScheduler.cpp.
References llvm::GenericSchedulerBase::BotHeightReduce, llvm::GenericSchedulerBase::BotPathReduce, llvm::SUnit::getDepth(), llvm::SUnit::getHeight(), llvm::SchedBoundary::getScheduledLatency(), llvm::SchedBoundary::isTop(), llvm::GenericSchedulerBase::SchedCandidate::SU, llvm::GenericSchedulerBase::TopDepthReduce, llvm::GenericSchedulerBase::TopPathReduce, tryGreater(), and tryLess().
Referenced by llvm::GenericScheduler::tryCandidate(), and llvm::PostGenericScheduler::tryCandidate().
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Return true if this heuristic determines order.
Definition at line 2525 of file MachineScheduler.cpp.
References llvm::GenericSchedulerBase::SchedCandidate::Reason.
Referenced by llvm::GenericScheduler::tryCandidate(), llvm::PostGenericScheduler::tryCandidate(), tryLatency(), and tryPressure().
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Definition at line 2733 of file MachineScheduler.cpp.
References llvm::GenericSchedulerBase::SchedCandidate::AtTop, llvm::PressureChange::getPSetOrMax(), llvm::TargetRegisterInfo::getRegPressureSetScore(), llvm::PressureChange::getUnitInc(), llvm::PressureChange::isValid(), std::swap(), tryGreater(), and tryLess().
Referenced by llvm::GenericScheduler::tryCandidate().
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A dummy default scheduler factory indicates whether the scheduler is overridden on the command line.
Definition at line 208 of file MachineScheduler.cpp.
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Referenced by llvm::GenericScheduler::registerRoots().
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Referenced by llvm::createMacroFusionDAGMutation().
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Referenced by llvm::createLoadClusterDAGMutation(), and llvm::createStoreClusterDAGMutation().
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Referenced by llvm::GenericScheduler::initPolicy().
| machine Machine Instruction false |
Definition at line 163 of file MachineScheduler.cpp.
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Definition at line 1822 of file MachineScheduler.cpp.
Referenced by llvm::SchedBoundary::getNextResourceCycle(), and llvm::SchedBoundary::init().
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MachineSchedOpt allows command line selection of the scheduler.
Definition at line 91 of file MachineScheduler.cpp.
Referenced by llvm::ScheduleDAGMILive::computeDFSResult().
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Referenced by llvm::ScheduleDAGMI::checkSchedLimit().
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Avoid quadratic complexity in unusually large basic blocks by limiting the size of the ready lists.
Referenced by llvm::SchedBoundary::releaseNode(), and llvm::SchedBoundary::releasePending().
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| machine scheduler |
Definition at line 163 of file MachineScheduler.cpp.
| machine Machine Instruction Scheduler |
Definition at line 163 of file MachineScheduler.cpp.
Referenced by llvm::SIScheduleDAGMI::schedule(), and llvm::SIScheduler::scheduleVariant().
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In some situations a few uninteresting nodes depend on nearly all other nodes in the graph, provide a cutoff to hide them.
Referenced by llvm::DOTGraphTraits< ScheduleDAGMI * >::isNodeHidden().
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Referenced by llvm::ScheduleDAGMI::schedule(), and llvm::ScheduleDAGMILive::schedule().
1.8.6