26 assert(DwarfReg >= 0 &&
"invalid negative dwarf register number");
28 EmitOp(dwarf::DW_OP_reg0 + DwarfReg, Comment);
30 EmitOp(dwarf::DW_OP_regx, Comment);
36 assert(DwarfReg >= 0 &&
"invalid negative dwarf register number");
38 EmitOp(dwarf::DW_OP_breg0 + DwarfReg);
40 EmitOp(dwarf::DW_OP_bregx);
45 EmitOp(dwarf::DW_OP_deref);
52 const unsigned SizeOfByte = 8;
53 if (OffsetInBits > 0 || SizeInBits % SizeOfByte) {
54 EmitOp(dwarf::DW_OP_bit_piece);
58 EmitOp(dwarf::DW_OP_piece);
59 unsigned ByteSize = SizeInBits / SizeOfByte;
62 this->OffsetInBits += SizeInBits;
66 EmitOp(dwarf::DW_OP_constu);
72 unsigned MachineReg,
int Offset) {
75 EmitOp(dwarf::DW_OP_fbreg);
89 unsigned MachineReg,
unsigned MaxSize) {
109 AddReg(Reg,
"super-register");
133 Intersection.
set(Offset, Offset + Size);
134 Intersection ^= Coverage;
138 if (Reg >= 0 && Intersection.
any()) {
139 AddReg(Reg,
"sub-register");
140 if (Offset >= MaxSize)
145 AddOpPiece(std::min<unsigned>(Size, MaxSize - Offset));
146 CurPos = Offset + Size;
149 Coverage.
set(Offset, Offset + Size);
158 EmitOp(dwarf::DW_OP_stack_value);
162 EmitOp(dwarf::DW_OP_consts);
168 EmitOp(dwarf::DW_OP_constu);
180 while (Offset < Size) {
182 if (Offset == 0 && Size <= 64)
192 unsigned FragmentOffsetInBits) {
198 bool ValidReg =
false;
199 auto Op = ExprCursor.
peek();
200 switch (
Op->getOp()) {
204 Fragment ? Fragment->SizeInBits : ~1U);
207 case dwarf::DW_OP_plus:
208 case dwarf::DW_OP_minus: {
212 if (
N &&
N->getOp() == dwarf::DW_OP_deref) {
215 TRI, MachineReg,
Op->getOp() == dwarf::DW_OP_plus ? Offset : -
Offset);
221 case dwarf::DW_OP_deref:
232 unsigned FragmentOffsetInBits) {
234 auto Op = ExprCursor.take();
235 switch (
Op->getOp()) {
237 unsigned SizeInBits =
Op->getArg(1);
238 unsigned FragmentOffset =
Op->getArg(0);
258 case dwarf::DW_OP_plus:
259 EmitOp(dwarf::DW_OP_plus_uconst);
262 case dwarf::DW_OP_minus:
264 EmitOp(dwarf::DW_OP_constu);
266 EmitOp(dwarf::DW_OP_minus);
268 case dwarf::DW_OP_deref:
269 EmitOp(dwarf::DW_OP_deref);
271 case dwarf::DW_OP_constu:
272 EmitOp(dwarf::DW_OP_constu);
275 case dwarf::DW_OP_stack_value:
295 "overlapping or duplicate fragments");
int getDwarfRegNum(unsigned RegNum, bool isEH) const
Map a target register to an equivalent dwarf register number.
This is a 'bitvector' (really, a variable-sized bit array), optimized for the case when the array is ...
bool isValid() const
isValid - returns true if this iterator is not yet at the end.
Optional< DIExpression::ExprOperand > peek() const
Return the current operation.
void AddExpression(DIExpressionCursor &&Expr, unsigned FragmentOffsetInBits=0)
Emit all remaining operations in the DIExpressionCursor.
bool AddMachineRegIndirect(const TargetRegisterInfo &TRI, unsigned MachineReg, int Offset=0)
Emit an indirect dwarf register operation for the given machine register.
void AddShr(unsigned ShiftBy)
Emit a shift-right dwarf expression.
void AddOpPiece(unsigned SizeInBits, unsigned OffsetInBits=0)
Emit a DW_OP_piece or DW_OP_bit_piece operation for a variable fragment.
virtual void EmitOp(uint8_t Op, const char *Comment=nullptr)=0
Output a dwarf operand and an optional assembler comment.
unsigned getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const
For a given register pair, return the sub-register index if the second register is a sub-register of ...
unsigned getSize() const
Return the size of the register in bytes, which is also the size of a stack slot allocated to hold a ...
MCSuperRegIterator enumerates all super-registers of Reg.
Reg
All possible values of the reg field in the ModR/M byte.
Only used in LLVM metadata.
Holds a DIExpression and keeps track of how many operands have been consumed so far.
void setSubRegisterPiece(unsigned SizeInBits, unsigned OffsetInBits)
Push a DW_OP_piece / DW_OP_bit_piece for emitting later, if one is needed to represent a subregister...
static Optional< FragmentInfo > getFragmentInfo(expr_op_iterator Start, expr_op_iterator End)
Retrieve the details of this fragment expression.
bool isFragment() const
Return whether this is a piece of an aggregate variable.
Maximum length of the test input libFuzzer tries to guess a good value based on the corpus and reports it always prefer smaller inputs during the corpus shuffle When libFuzzer itself reports a bug this exit code will be used If indicates the maximal total time in seconds to run the fuzzer minimizes the provided crash input Use with etc Experimental Use value profile to guide fuzzing Number of simultaneous worker processes to run the jobs If min(jobs, NumberOfCpuCores()/2)\" is used.") FUZZER_FLAG_INT(reload
Optional< DIExpression::ExprOperand > take()
Consume one operation.
Optional< DIExpression::FragmentInfo > getFragmentInfo() const
Retrieve the fragment information, if any.
Optional< DIExpression::ExprOperand > peekNext() const
Return the next operation.
uint64_t OffsetInBits
Current Fragment Offset in Bits.
void AddRegIndirect(int DwarfReg, int Offset, bool Deref=false)
Emit an (double-)indirect dwarf register operation.
unsigned getBitWidth() const
Return the number of bits in the APInt.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
MCSubRegIterator enumerates all sub-registers of Reg.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
virtual void EmitUnsigned(uint64_t Value)=0
Emit a raw unsigned value.
unsigned SubRegisterOffsetInBits
void AddUnsignedConstant(uint64_t Value)
Emit an unsigned constant.
Class for arbitrary precision integers.
const TargetRegisterClass * getMinimalPhysRegClass(unsigned Reg, MVT VT=MVT::Other) const
Returns the Register Class of a physical register of the given type, picking the most sub register cl...
bool AddMachineReg(const TargetRegisterInfo &TRI, unsigned MachineReg, unsigned MaxSize=~1U)
Emit a partial DWARF register operation.
static bool isPhysicalRegister(unsigned Reg)
Return true if the specified register number is in the physical register namespace.
unsigned SubRegisterSizeInBits
Sometimes we need to add a DW_OP_bit_piece to describe a subregister.
void consume(unsigned N)
Consume N operations.
void AddSignedConstant(int64_t Value)
Emit a signed constant.
const uint64_t * getRawData() const
This function returns a pointer to the internal storage of the APInt.
void finalize()
This needs to be called last to commit any pending changes.
unsigned getSubRegIdxOffset(unsigned Idx) const
Get the offset of the bit range covered by a sub-register index.
void addFragmentOffset(const DIExpression *Expr)
If applicable, emit an empty DW_OP_piece / DW_OP_bit_piece to advance to the fragment described by Ex...
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
bool AddMachineRegExpression(const TargetRegisterInfo &TRI, DIExpressionCursor &Expr, unsigned MachineReg, unsigned FragmentOffsetInBits=0)
Emit a machine register location.
LLVM Value Representation.
bool any() const
Returns true if any bit is set.
virtual void EmitSigned(int64_t Value)=0
Emit a raw signed value.
void AddStackValue()
Emit a DW_OP_stack_value, if supported.
unsigned getSubRegIdxSize(unsigned Idx) const
Get the size of the bit range covered by a sub-register index.
void AddReg(int DwarfReg, const char *Comment=nullptr)
Emit a dwarf register operation.
virtual bool isFrameRegister(const TargetRegisterInfo &TRI, unsigned MachineReg)=0
Return whether the given machine register is the frame register in the current function.