LLVM  4.0.0
HexagonBitTracker.h
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1 //===--- HexagonBitTracker.h ------------------------------------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 
10 #ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONBITTRACKER_H
11 #define LLVM_LIB_TARGET_HEXAGON_HEXAGONBITTRACKER_H
12 
13 #include "BitTracker.h"
14 #include "llvm/ADT/DenseMap.h"
15 #include <cstdint>
16 
17 namespace llvm {
18 
19 class HexagonInstrInfo;
20 class HexagonRegisterInfo;
21 
27 
29  const HexagonInstrInfo &tii, MachineFunction &mf);
30 
31  bool evaluate(const MachineInstr &MI, const CellMapType &Inputs,
32  CellMapType &Outputs) const override;
33  bool evaluate(const MachineInstr &BI, const CellMapType &Inputs,
34  BranchTargetList &Targets, bool &FallsThru) const override;
35 
36  BitTracker::BitMask mask(unsigned Reg, unsigned Sub) const override;
37 
41 
42 private:
43  bool evaluateLoad(const MachineInstr &MI, const CellMapType &Inputs,
44  CellMapType &Outputs) const;
45  bool evaluateFormalCopy(const MachineInstr &MI, const CellMapType &Inputs,
46  CellMapType &Outputs) const;
47 
48  unsigned getNextPhysReg(unsigned PReg, unsigned Width) const;
49  unsigned getVirtRegFor(unsigned PReg) const;
50 
51  // Type of formal parameter extension.
52  struct ExtType {
53  enum { SExt, ZExt };
54 
55  ExtType() = default;
56  ExtType(char t, uint16_t w) : Type(t), Width(w) {}
57 
58  char Type = 0;
59  uint16_t Width = 0;
60  };
61  // Map VR -> extension type.
62  typedef DenseMap<unsigned, ExtType> RegExtMap;
63  RegExtMap VRX;
64 };
65 
66 } // end namespace llvm
67 
68 #endif // LLVM_LIB_TARGET_HEXAGON_HEXAGONBITTRACKER_H
std::map< unsigned, RegisterCell > CellMapType
Definition: BitTracker.h:42
BitTracker::BitMask mask(unsigned Reg, unsigned Sub) const override
MachineFrameInfo & MFI
const HexagonInstrInfo & TII
HexagonEvaluator(const HexagonRegisterInfo &tri, MachineRegisterInfo &mri, const HexagonInstrInfo &tii, MachineFunction &mf)
bool evaluate(const MachineInstr &MI, const CellMapType &Inputs, CellMapType &Outputs) const override
static F t[256]
Reg
All possible values of the reg field in the ModR/M byte.
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted...
The instances of the Type class are immutable: once they are created, they are never changed...
Definition: Type.h:45
MachineFunction & MF
BitTracker::BranchTargetList BranchTargetList
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
Representation of each machine instruction.
Definition: MachineInstr.h:52
BitTracker::RegisterRef RegisterRef
BitTracker::CellMapType CellMapType
A vector that has set insertion semantics.
Definition: SetVector.h:41
IRTranslator LLVM IR MI
BitTracker::RegisterCell RegisterCell