14 #ifndef LLVM_LIB_TARGET_ARM_MCTARGETDESC_ARMADDRESSINGMODES_H
15 #define LLVM_LIB_TARGET_ARM_MCTARGETDESC_ARMADDRESSINGMODES_H
42 return Op ==
sub ?
"-" :
"";
86 static inline unsigned rotr32(
unsigned Val,
unsigned Amt) {
87 assert(Amt < 32 &&
"Invalid rotate amount");
88 return (Val >> Amt) | (Val << ((32-Amt)&31));
93 static inline unsigned rotl32(
unsigned Val,
unsigned Amt) {
94 assert(Amt < 32 &&
"Invalid rotate amount");
95 return (Val << Amt) | (Val >> ((32-Amt)&31));
113 return ShOp | (Imm << 3);
130 return (Imm >> 8) * 2;
140 if ((Imm & ~255U) == 0)
return 0;
147 unsigned RotAmt = TZ & ~1;
150 if ((
rotr32(Imm, RotAmt) & ~255U) == 0)
151 return (32-RotAmt)&31;
157 unsigned RotAmt2 = TZ2 & ~1;
158 if ((
rotr32(Imm, RotAmt2) & ~255U) == 0)
159 return (32-RotAmt2)&31;
165 return (32-RotAmt)&31;
174 if ((Arg & ~255U) == 0)
return Arg;
179 if (
rotr32(~255U, RotAmt) & Arg)
183 return rotl32(Arg, RotAmt) | ((RotAmt>>1) << 8);
221 if ((Imm & ~255U) == 0)
return 0;
240 if ((Imm & ~65535U) == 0)
return 0;
273 if ((V & 0xffffff00) == 0)
277 Vs = ((V & 0xff) == 0) ? V >> 8 : V;
281 u = Imm | (Imm << 16);
285 return (((Vs == V) ? 1 : 2) << 8) | Imm;
288 if (Vs == (u | (u << 8)))
289 return (3 << 8) | Imm;
304 if ((
rotr32(0xff000000U, RotAmt) & V) == V)
305 return (
rotr32(V, 24 - RotAmt) & 0x7f) | ((RotAmt + 8) << 7);
329 if ((V & ~255U) == 0)
return 0;
332 return (32 - RotAmt) & 31;
364 "Immedate cannot be encoded as two part immediate!");
372 return Imm & 0xff00ff00U;
376 return Imm & 0x00ff00ffU;
384 "Unable to encode second part of T2 two part SO immediate");
408 unsigned IdxMode = 0) {
409 assert(Imm12 < (1 << 12) &&
"Imm too large!");
410 bool isSub = Opc ==
sub;
411 return Imm12 | ((int)isSub << 12) | (SO << 13) | (IdxMode << 16) ;
414 return AM2Opc & ((1 << 12)-1);
417 return ((AM2Opc >> 12) & 1) ?
sub :
add;
420 return (
ShiftOpc)((AM2Opc >> 13) & 7);
423 return (AM2Opc >> 16);
443 unsigned IdxMode = 0) {
444 bool isSub = Opc ==
sub;
445 return ((
int)isSub << 8) | Offset | (IdxMode << 9);
448 return AM3Opc & 0xFF;
451 return ((AM3Opc >> 8) & 1) ?
sub :
add;
454 return (AM3Opc >> 9);
493 bool isSub = Opc ==
sub;
494 return ((
int)isSub << 8) |
Offset;
497 return AM5Opc & 0xFF;
500 return ((AM5Opc >> 8) & 1) ?
sub :
add;
516 bool isSub = Opc ==
sub;
517 return ((
int)isSub << 8) |
Offset;
520 return AM5Opc & 0xFF;
523 return ((AM5Opc >> 8) & 1) ?
sub :
add;
552 return (OpCmode << 8) | Val;
555 return (ModImm >> 8) & 0x1f;
558 return ModImm & 0xff;
569 if (OpCmode == 0xe) {
573 }
else if ((OpCmode & 0xc) == 0x8) {
575 unsigned ByteNum = (OpCmode & 0x6) >> 1;
576 Val = Imm8 << (8 * ByteNum);
578 }
else if ((OpCmode & 0x8) == 0) {
580 unsigned ByteNum = (OpCmode & 0x6) >> 1;
581 Val = Imm8 << (8 * ByteNum);
583 }
else if ((OpCmode & 0xe) == 0xc) {
585 unsigned ByteNum = 1 + (OpCmode & 0x1);
586 Val = (Imm8 << (8 * ByteNum)) | (0xffff >> (8 * (2 - ByteNum)));
588 }
else if (OpCmode == 0x1e) {
590 for (
unsigned ByteNum = 0; ByteNum < 8; ++ByteNum) {
591 if ((ModImm >> ByteNum) & 1)
592 Val |= (uint64_t)0xff << (8 * ByteNum);
603 assert(Size >= 1 && Size <= 4 &&
"Invalid size");
605 for (
unsigned i = 0;
i < Size; ++
i) {
606 if (Value & 0xff) count++;
624 Value = (Value >> 8) | 0xa00;
639 if (Value >= 0x100 && Value <= 0xff00)
640 Value = (Value >> 8) | 0x200;
641 else if (Value > 0xffff && Value <= 0xff0000)
642 Value = (Value >> 16) | 0x400;
643 else if (Value > 0xffffff)
644 Value = (Value >> 24) | 0x600;
658 uint8_t Sign = (Imm >> 7) & 0x1;
659 uint8_t Exp = (Imm >> 4) & 0x7;
660 uint8_t Mantissa = Imm & 0xf;
668 FPUnion.I |= Sign << 31;
669 FPUnion.I |= ((Exp & 0x4) != 0 ? 0 : 1) << 30;
670 FPUnion.I |= ((Exp & 0x4) != 0 ? 0x1f : 0) << 25;
671 FPUnion.I |= (Exp & 0x3) << 23;
672 FPUnion.I |= Mantissa << 19;
691 if (Exp < -3 || Exp > 4)
693 Exp = ((Exp+3) & 0x7) ^ 4;
695 return ((
int)Sign << 7) | (Exp << 4) | Mantissa;
712 if (Mantissa & 0x7ffff)
715 if ((Mantissa & 0xf) != Mantissa)
719 if (Exp < -3 || Exp > 4)
721 Exp = ((Exp+3) & 0x7) ^ 4;
723 return ((
int)Sign << 7) | (Exp << 4) | Mantissa;
736 uint64_t Mantissa = Imm.
getZExtValue() & 0xfffffffffffffULL;
740 if (Mantissa & 0xffffffffffffULL)
743 if ((Mantissa & 0xf) != Mantissa)
747 if (Exp < -3 || Exp > 4)
749 Exp = ((Exp+3) & 0x7) ^ 4;
751 return ((
int)Sign << 7) | (Exp << 4) | Mantissa;
static bool isNEONi16splat(unsigned Value)
Checks if Value is a correct immediate for instructions like VBIC/VORR.
uint64_t getZExtValue() const
Get zero extended value.
static unsigned char getAM3Offset(unsigned AM3Opc)
static unsigned getSORegOpc(ShiftOpc ShOp, unsigned Imm)
static unsigned getNEONModImmOpCmode(unsigned ModImm)
static unsigned getAM5Opc(AddrOpc Opc, unsigned char Offset)
getAM5Opc - This function encodes the addrmode5 opc field.
static const char * getShiftOpcStr(ShiftOpc Op)
static unsigned getThumbImmNonShiftedVal(unsigned V)
getThumbImmNonShiftedVal - If V is a value that satisfies isThumbImmShiftedVal, return the non-shiftd...
std::size_t countLeadingZeros(T Val, ZeroBehavior ZB=ZB_Width)
Count number of 0's from the most significant bit to the least stopping at the first 1...
static unsigned getT2SOImmValRotate(unsigned V)
static unsigned rotl32(unsigned Val, unsigned Amt)
rotl32 - Rotate a 32-bit unsigned value left by a specified # bits.
static unsigned getSOImmValRotate(unsigned Imm)
getSOImmValRotate - Try to handle Imm with an immediate shifter operand, computing the rotate amount ...
static unsigned rotr32(unsigned Val, unsigned Amt)
rotr32 - Rotate a 32-bit unsigned value right by a specified # bits.
static unsigned getAM3IdxMode(unsigned AM3Opc)
static int getT2SOImmValSplatVal(unsigned V)
getT2SOImmValSplat - Return the 12-bit encoded representation if the specified value can be obtained ...
APInt lshr(unsigned shiftAmt) const
Logical right-shift function.
static AMSubMode getAM4SubMode(unsigned Mode)
APInt bitcastToAPInt() const
This file implements a class to represent arbitrary precision integral constant values and operations...
static unsigned getT2SOImmTwoPartFirst(unsigned Imm)
static bool isNEONi32splat(unsigned Value)
Checks if Value is a correct immediate for instructions like VBIC/VORR.
static unsigned createNEONModImm(unsigned OpCmode, unsigned Val)
static AddrOpc getAM5FP16Op(unsigned AM5Opc)
static int getT2SOImmVal(unsigned Arg)
getT2SOImmVal - Given a 32-bit immediate, if it is something that can fit into a Thumb-2 shifter_oper...
static unsigned getAM4ModeImm(AMSubMode SubMode)
auto count(R &&Range, const E &Element) -> typename std::iterator_traits< decltype(std::begin(Range))>::difference_type
Wrapper function around std::count to count the number of times an element Element occurs in the give...
static int getFP32Imm(const APInt &Imm)
getFP32Imm - Return an 8-bit floating-point version of the 32-bit floating-point value.
static bool isThumbImmShiftedVal(unsigned V)
isThumbImmShiftedVal - Return true if the specified value can be obtained by left shifting a 8-bit im...
static unsigned getAM2IdxMode(unsigned AM2Opc)
static unsigned getSOImmValRot(unsigned Imm)
getSOImmValRot - Given an encoded imm field for the reg/imm form, return the rotate amount...
static unsigned getAM2Opc(AddrOpc Opc, unsigned Imm12, ShiftOpc SO, unsigned IdxMode=0)
std::size_t countTrailingZeros(T Val, ZeroBehavior ZB=ZB_Width)
Count number of 0's from the least significant bit to the most stopping at the first 1...
static unsigned char getAM5Offset(unsigned AM5Opc)
static unsigned getSOImmTwoPartSecond(unsigned V)
getSOImmTwoPartSecond - If V is a value that satisfies isSOImmTwoPartVal, return the second chunk of ...
int64_t getSExtValue() const
Get sign extended value.
static unsigned getSOImmValImm(unsigned Imm)
getSOImmValImm - Given an encoded imm field for the reg/imm form, return the 8-bit imm value...
static unsigned getT2SOImmTwoPartSecond(unsigned Imm)
This file declares a class to represent arbitrary precision floating point values and provide a varie...
static int getT2SOImmValRotateVal(unsigned V)
getT2SOImmValRotateVal - Return the 12-bit encoded representation if the specified value is a rotated...
static const char * getAddrOpcStr(AddrOpc Op)
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
static AddrOpc getAM2Op(unsigned AM2Opc)
static int getFP64Imm(const APInt &Imm)
getFP64Imm - Return an 8-bit floating-point version of the 64-bit floating-point value.
static unsigned getThumbImm16ValShift(unsigned Imm)
getThumbImm16ValShift - Try to handle Imm with a 16-bit immediate followed by a left shift...
static unsigned getAM2Offset(unsigned AM2Opc)
static unsigned getNEONModImmVal(unsigned ModImm)
static unsigned getShiftOpcEncoding(ShiftOpc Op)
static bool isSOImmTwoPartVal(unsigned V)
isSOImmTwoPartVal - Return true if the specified value can be obtained by or'ing together two SOImmVa...
Class for arbitrary precision integers.
static unsigned getAM5FP16Opc(AddrOpc Opc, unsigned char Offset)
getAM5FP16Opc - This function encodes the addrmode5fp16 opc field.
static bool isThumbImm16ShiftedVal(unsigned V)
isThumbImm16ShiftedVal - Return true if the specified value can be obtained by left shifting a 16-bit...
static AddrOpc getAM3Op(unsigned AM3Opc)
static unsigned getAM3Opc(AddrOpc Opc, unsigned char Offset, unsigned IdxMode=0)
getAM3Opc - This function encodes the addrmode3 opc field.
static int getSOImmVal(unsigned Arg)
getSOImmVal - Given a 32-bit immediate, if it is something that can fit into an shifter_operand immed...
static const char * getAMSubModeStr(AMSubMode Mode)
static unsigned encodeNEONi16splat(unsigned Value)
static unsigned encodeNEONi32splat(unsigned Value)
Encode NEON 32 bits Splat immediate for instructions like VBIC/VORR.
static bool isNEONBytesplat(unsigned Value, unsigned Size)
static AddrOpc getAM5Op(unsigned AM5Opc)
static unsigned char getAM5FP16Offset(unsigned AM5Opc)
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
static ShiftOpc getAM2ShiftOpc(unsigned AM2Opc)
static int getFP16Imm(const APInt &Imm)
getFP16Imm - Return an 8-bit floating-point version of the 16-bit floating-point value.
LLVM Value Representation.
static unsigned getSORegOffset(unsigned Op)
static unsigned getThumbImmValShift(unsigned Imm)
getThumbImmValShift - Try to handle Imm with a 8-bit immediate followed by a left shift...
static bool isT2SOImmTwoPartVal(unsigned Imm)
static unsigned getSOImmTwoPartFirst(unsigned V)
getSOImmTwoPartFirst - If V is a value that satisfies isSOImmTwoPartVal, return the first chunk of it...
static float getFPImmFloat(unsigned Imm)
static ShiftOpc getSORegShOp(unsigned Op)
static uint64_t decodeNEONModImm(unsigned ModImm, unsigned &EltBits)
decodeNEONModImm - Decode a NEON modified immediate value into the element value and the element size...