43 #define DEBUG_TYPE "spillplacement"
47 "Spill Code Placement Analysis",
true,
true)
55 void SpillPlacement::getAnalysisUsage(
AnalysisUsage &AU)
const {
121 if (
I->second == b) {
153 if (nodes[
I->second].
Value == -1)
155 else if (nodes[
I->second].
Value == 1)
168 if (SumN >= SumP + Threshold)
170 else if (SumP >= SumN + Threshold)
178 const Node nodes[])
const {
179 for (
const auto &Elt :
Links) {
180 unsigned n = Elt.second;
191 bundles = &getAnalysis<EdgeBundles>();
192 loops = &getAnalysis<MachineLoopInfo>();
194 assert(!nodes &&
"Leaking node array");
201 MBFI = &getAnalysis<MachineBlockFrequencyInfo>();
204 unsigned Num =
I.getNumber();
212 void SpillPlacement::releaseMemory() {
219 void SpillPlacement::activate(
unsigned n) {
221 if (ActiveNodes->
test(n))
224 nodes[n].
clear(Threshold);
250 uint64_t Scaled = (Freq >> 13) +
bool(Freq & (1 << 12));
251 Threshold = std::max(UINT64_C(1), Scaled);
258 E = LiveBlocks.
end();
I !=
E; ++
I) {
270 unsigned ob = bundles->
getBundle(
I->Number, 1);
298 unsigned ob = bundles->
getBundle(Number, 1);
312 RecentPositive.
clear();
317 if (nodes[n].mustSpill())
319 if (nodes[n].preferReg())
322 return !RecentPositive.
empty();
325 bool SpillPlacement::update(
unsigned n) {
326 if (!nodes[n].update(nodes, Threshold))
337 RecentPositive.
clear();
344 while(Limit-- > 0 && !TodoList.
empty()) {
348 if (nodes[n].preferReg())
354 RecentPositive.
clear();
357 ActiveNodes = &RegBundles;
358 ActiveNodes->
clear();
364 assert(ActiveNodes &&
"Call prepare() first");
369 if (!nodes[n].preferReg()) {
370 ActiveNodes->
reset(n);
373 ActiveNodes =
nullptr;
void resize(unsigned N, bool t=false)
resize - Grow or shrink the bitvector.
int Value
Value - Output value of this node computed from the Bias and links.
void push_back(const T &Elt)
spill code Spill Code Placement true
int find_first() const
find_first - Returns the index of the first set bit, -1 if none of the bits are set.
INITIALIZE_PASS_BEGIN(SpillPlacement,"spill-code-placement","Spill Code Placement Analysis", true, true) INITIALIZE_PASS_END(SpillPlacement
std::pair< iterator, bool > insert(const ValueT &Val)
insert - Attempts to insert a new element.
A register is impossible, variable must be spilled.
int find_next(unsigned Prev) const
find_next - Returns the index of the next set bit following the "Prev" bit.
MachineBlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate machine basic b...
BlockFrequency BiasP
BiasP - Sum of blocks that prefer a register.
uint64_t getFrequency() const
Returns the frequency as a fixpoint number scaled by the entry frequency.
BlockFrequency getBlockFreq(const MachineBasicBlock *MBB) const
getblockFreq - Return block frequency.
bool empty() const
empty - Returns true if the set is empty.
#define INITIALIZE_PASS_DEPENDENCY(depName)
uint64_t getEntryFreq() const
void clear()
clear - Clear all bits.
unsigned getNumBlockIDs() const
getNumBlockIDs - Return the number of MBB ID's allocated.
void addPrefSpill(ArrayRef< unsigned > Blocks, bool Strong)
addPrefSpill - Add PrefSpill constraints to all blocks listed.
bool scanActiveBundles()
scanActiveBundles - Perform an initial scan of all bundles activated by addConstraints and addLinks...
void getDissentingNeighbors(SparseSet< unsigned > &List, const Node nodes[]) const
LinkVector Links
Links - (Weight, BundleNo) for all transparent blocks connecting to other bundles.
void iterate()
iterate - Update the network iteratively until convergence, or new bundles are found.
unsigned getNumBundles() const
getNumBundles - Return the total number of bundles in the CFG.
LLVM_NODISCARD bool empty() const
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory)...
size_t size() const
size - Get the array size.
BlockFrequency SumLinkWeights
SumLinkWeights - Cached sum of the weights of all links + ThresHold.
static GCRegistry::Add< CoreCLRGC > E("coreclr","CoreCLR-compatible GC")
void addBias(BlockFrequency freq, BorderConstraint direction)
addBias - Bias this node.
void addLinks(ArrayRef< unsigned > Links)
addLinks - Add transparent blocks with the given numbers.
Block doesn't care / variable not live.
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
LLVM_ATTRIBUTE_ALWAYS_INLINE iterator begin()
spill code Spill Code Placement Analysis
void clear(const BlockFrequency &Threshold)
clear - Reset per-query data, but preserve frequencies that only depend on
Represent the analysis usage information of a pass.
INITIALIZE_PASS_END(RegBankSelect, DEBUG_TYPE,"Assign register bank of generic virtual registers", false, false) RegBankSelect
void setUniverse(unsigned U)
setUniverse - Set the universe size which determines the largest key the set can hold.
bool update(const Node nodes[], const BlockFrequency &Threshold)
update - Recompute Value from Bias and Links.
bool finish()
finish - Compute the optimal spill code placement given the constraints.
Block entry/exit prefers a register.
void addConstraints(ArrayRef< BlockConstraint > LiveBlocks)
addConstraints - Add constraints and biases.
block Branch Probability Basic Block Placement
Block entry/exit prefers a stack slot.
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small...
bool test(unsigned Idx) const
void prepare(BitVector &RegBundles)
prepare - Reset state and prepare for a new spill placement computation.
ArrayRef< unsigned > getBlocks(unsigned Bundle) const
getBlocks - Return an array of blocks that are connected to Bundle.
void addLink(unsigned b, BlockFrequency w)
addLink - Add a link to bundle b with weight w.
Node - Each edge bundle corresponds to a Hopfield node.
LLVM_ATTRIBUTE_ALWAYS_INLINE iterator end()
static uint64_t getMaxFrequency()
Returns the maximum possible frequency, the saturation value.
BorderConstraint
BorderConstraint - A basic block has separate constraints for entry and exit.
char & SpillPlacementID
SpillPlacement analysis.
SmallVector< std::pair< BlockFrequency, unsigned >, 4 > LinkVector
unsigned getBundle(unsigned N, bool Out) const
getBundle - Return the ingoing (Out = false) or outgoing (Out = true) bundle number for basic block N...
void clear()
clear - Clears the set.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
LLVM Value Representation.
bool mustSpill() const
mustSpill - Return True if this node is so biased that it must spill.
BlockFrequency BiasN
BiasN - Sum of blocks that prefer a spill.
bool preferReg() const
preferReg - Return true when this node prefers to be in a register.