26 #define DEBUG_TYPE "asm-printer"
28 #define GET_INSTRUCTION_NAME
29 #include "HexagonGenAsmWriter.inc"
49 void HexagonInstPrinter::setExtender(
MCInst const &MCI) {
60 MCInst const &MCI = *
I.getInst();
98 if (MO.
getExpr()->evaluateAsAbsolute(Value))
132 Imm = SignExtend64<9>(Imm);
133 assert(Success); (void)Success;
134 assert(((Imm & 0x3f) == 0) &&
"Lower 6 bits must be ZERO.");
142 Imm = SignExtend64<10>(Imm);
143 assert(Success); (void)Success;
144 assert(((Imm & 0x7f) == 0) &&
"Lower 7 bits must be ZERO.");
152 Imm = SignExtend64<10>(Imm);
153 assert(Success); (void)Success;
154 assert(((Imm & 0x3f) == 0) &&
"Lower 6 bits must be ZERO.");
162 Imm = SignExtend64<11>(Imm);
163 assert(Success); (void)Success;
164 assert(((Imm & 0x7f) == 0) &&
"Lower 7 bits must be ZERO.");
207 O <<
'#' << (hi ?
"HI" :
"LO") <<
'(';
219 if (Expr.evaluateAsAbsolute(Value))
220 O <<
format(
"0x%" PRIx64, Value);
bool isDuplex(MCInstrInfo const &MCII, MCInst const &MCI)
void printRegName(raw_ostream &O, unsigned RegNo) const override
Print the assembler register name.
void printSymbol(MCInst const *MI, unsigned OpNo, raw_ostream &O, bool hi) const
bool isBundle(MCInst const &MCI)
void printBrtarget(MCInst const *MI, unsigned OpNo, raw_ostream &O) const
bool isOuterLoop(MCInst const &MCI)
void printInst(MCInst const *MI, raw_ostream &O, StringRef Annot, const MCSubtargetInfo &STI) override
Print the specified MCInst to the specified raw_ostream.
bool isImmext(MCInst const &MCI)
void prints3_6ImmOperand(MCInst const *MI, unsigned OpNo, raw_ostream &O) const
#define HEXAGON_PACKET_SIZE
StringRef getName(unsigned Opcode) const
Returns the name for the instructions with the given opcode.
Base class for the full range of assembler expressions which are needed for parsing.
void printConstantPool(MCInst const *MI, unsigned OpNo, raw_ostream &O) const
void printExtOperand(MCInst const *MI, unsigned OpNo, raw_ostream &O) const
unsigned getReg() const
Returns the register number.
Function Alias Analysis false
void prints3_7ImmOperand(MCInst const *MI, unsigned OpNo, raw_ostream &O) const
Instances of this class represent a single low-level machine instruction.
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
format_object< Ts...> format(const char *Fmt, const Ts &...Vals)
These are helper functions used to produce formatted output.
void prints4_7ImmOperand(MCInst const *MI, unsigned OpNo, raw_ostream &O) const
This class is intended to be used as a base class for asm properties and features specific to the tar...
void prints4_6ImmOperand(MCInst const *MI, unsigned OpNo, raw_ostream &O) const
const MCExpr * getExpr() const
unsigned const MachineRegisterInfo * MRI
Interface to description of machine instruction set.
void printPredicateOperand(MCInst const *MI, unsigned OpNo, raw_ostream &O) const
void printBranchOperand(MCInst const *MI, unsigned OpNo, raw_ostream &O) const
void printGlobalOperand(MCInst const *MI, unsigned OpNo, raw_ostream &O) const
void printAbsAddrOperand(MCInst const *MI, unsigned OpNo, raw_ostream &O) const
iterator_range< MCInst::const_iterator > bundleInstructions(MCInst const &MCI)
void printOperand(MCInst const *MI, unsigned OpNo, raw_ostream &O) const
format_object< int64_t > formatImm(int64_t Value) const
Utility function to print immediates in decimal or hex.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
unsigned short getExtendableOp(MCInstrInfo const &MCII, MCInst const &MCI)
StringRef getRegName(unsigned RegNo) const
void setOpcode(unsigned Op)
static const char * Separator
void printInstruction(MCInst const *MI, raw_ostream &O)
void printUnsignedImmOperand(MCInst const *MI, unsigned OpNo, raw_ostream &O) const
This is an instance of a target assembly language printer that converts an MCInst to valid target ass...
void printNOneImmOperand(MCInst const *MI, unsigned OpNo, raw_ostream &O) const
HexagonInstPrinter(MCAsmInfo const &MAI, MCInstrInfo const &MII, MCRegisterInfo const &MRI)
MCSubtargetInfo - Generic base class for all target subtargets.
const MCInst * getInst() const
void printNegImmOperand(MCInst const *MI, unsigned OpNo, raw_ostream &O) const
size_t bundleSize(MCInst const &MCI)
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
virtual StringRef getOpcodeName(unsigned Opcode) const
bool isInnerLoop(MCInst const &MCI)
LLVM Value Representation.
static char const * getRegisterName(unsigned RegNo)
This class implements an extremely fast bulk output stream that can only output to a stream...
bool isConstExtended(MCInstrInfo const &MCII, MCInst const &MCI)
StringRef - Represent a constant reference to a string, i.e.
void printJumpTable(MCInst const *MI, unsigned OpNo, raw_ostream &O) const
Instances of this class represent operands of the MCInst class.
void printCallOperand(MCInst const *MI, unsigned OpNo, raw_ostream &O) const
const MCOperand & getOperand(unsigned i) const