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LLVM
4.0.0
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#include "ARM.h"#include "ARMBaseInstrInfo.h"#include "ARMTargetMachine.h"#include "MCTargetDesc/ARMAddressingModes.h"#include "llvm/ADT/StringSwitch.h"#include "llvm/CodeGen/MachineFrameInfo.h"#include "llvm/CodeGen/MachineFunction.h"#include "llvm/CodeGen/MachineInstrBuilder.h"#include "llvm/CodeGen/MachineRegisterInfo.h"#include "llvm/CodeGen/SelectionDAG.h"#include "llvm/CodeGen/SelectionDAGISel.h"#include "llvm/IR/CallingConv.h"#include "llvm/IR/Constants.h"#include "llvm/IR/DerivedTypes.h"#include "llvm/IR/Function.h"#include "llvm/IR/Intrinsics.h"#include "llvm/IR/LLVMContext.h"#include "llvm/Support/CommandLine.h"#include "llvm/Support/Debug.h"#include "llvm/Support/ErrorHandling.h"#include "llvm/Target/TargetLowering.h"#include "llvm/Target/TargetOptions.h"#include "ARMGenDAGISel.inc"Go to the source code of this file.
Macros | |
| #define | DEBUG_TYPE "arm-isel" |
Enumerations | |
| enum | AddrMode2Type |
Functions | |
| static bool | isInt32Immediate (SDNode *N, unsigned &Imm) |
| isInt32Immediate - This method tests to see if the node is a 32-bit constant operand. More... | |
| static bool | isInt32Immediate (SDValue N, unsigned &Imm) |
| static bool | isOpcWithIntImmediate (SDNode *N, unsigned Opc, unsigned &Imm) |
| static bool | isScaledConstantInRange (SDValue Node, int Scale, int RangeMin, int RangeMax, int &ScaledConstant) |
Check whether a particular node is a constant value representable as (N * Scale) where (N in [RangeMin, RangeMax). More... | |
| static SDValue | getAL (SelectionDAG *CurDAG, const SDLoc &dl) |
| getAL - Returns a ARMCC::AL immediate node. More... | |
| static bool | isVLDfixed (unsigned Opc) |
| static bool | isVSTfixed (unsigned Opc) |
| static unsigned | getVLDSTRegisterUpdateOpcode (unsigned Opc) |
| static bool | SearchSignedMulShort (SDValue SignExt, unsigned *Opc, SDValue &Src1, bool Accumulate) |
| static bool | SearchSignedMulLong (SDValue OR, unsigned *Opc, SDValue &Src0, SDValue &Src1, bool Accumulate) |
| static Optional< std::pair < unsigned, unsigned > > | getContiguousRangeOfSetBits (const APInt &A) |
| static void | getIntOperandsFromRegisterString (StringRef RegString, SelectionDAG *CurDAG, const SDLoc &DL, std::vector< SDValue > &Ops) |
| static int | getBankedRegisterMask (StringRef RegString) |
| static int | getMClassRegisterSYSmValueMask (StringRef RegString) |
| static int | getMClassFlagsMask (StringRef Flags, bool hasDSP) |
| static int | getMClassRegisterMask (StringRef Reg, StringRef Flags, bool IsRead, const ARMSubtarget *Subtarget) |
| static int | getARClassRegisterMask (StringRef Reg, StringRef Flags) |
Variables | |
| static cl::opt< bool > | DisableShifterOp ("disable-shifter-op", cl::Hidden, cl::desc("Disable isel of shifter-op"), cl::init(false)) |
| #define DEBUG_TYPE "arm-isel" |
Definition at line 39 of file ARMISelDAGToDAG.cpp.
| enum AddrMode2Type |
Definition at line 52 of file ARMISelDAGToDAG.cpp.
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inlinestatic |
getAL - Returns a ARMCC::AL immediate node.
Definition at line 1473 of file ARMISelDAGToDAG.cpp.
References llvm::ARMCC::AL, llvm::SelectionDAG::getTargetConstant(), and llvm::MVT::i32.
Definition at line 4194 of file ARMISelDAGToDAG.cpp.
References llvm::StringRef::empty(), getMClassFlagsMask(), and llvm::BitmaskEnumDetail::Mask().
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inlinestatic |
Definition at line 4060 of file ARMISelDAGToDAG.cpp.
References llvm::StringSwitch< T, R >::Case(), llvm::StringSwitch< T, R >::Default(), and llvm::StringRef::lower().
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Definition at line 2735 of file ARMISelDAGToDAG.cpp.
References llvm::APInt::countLeadingZeros(), llvm::APInt::countPopulation(), llvm::APInt::countTrailingZeros(), and llvm::APInt::getBitWidth().
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Definition at line 4033 of file ARMISelDAGToDAG.cpp.
References assert(), llvm::tgtok::Field, llvm::SelectionDAG::getTargetConstant(), llvm::MVT::i32, llvm::SmallVectorTemplateCommon< T >::size(), and llvm::StringRef::split().
Definition at line 4126 of file ARMISelDAGToDAG.cpp.
References llvm::StringSwitch< T, R >::Case(), llvm::StringSwitch< T, R >::Default(), llvm::StringRef::empty(), and fuzzer::Flags.
Referenced by getARClassRegisterMask(), and getMClassRegisterMask().
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Definition at line 4137 of file ARMISelDAGToDAG.cpp.
References llvm::StringRef::empty(), getMClassFlagsMask(), getMClassRegisterSYSmValueMask(), llvm::ARMSubtarget::has8MSecExt(), llvm::ARMSubtarget::hasDSP(), llvm::ARMSubtarget::hasV7Ops(), llvm::ARMSubtarget::hasV8MMainlineOps(), llvm::StringRef::lower(), and llvm::BitmaskEnumDetail::Mask().
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inlinestatic |
Definition at line 4101 of file ARMISelDAGToDAG.cpp.
References llvm::StringSwitch< T, R >::Case(), llvm::StringSwitch< T, R >::Default(), and llvm::StringRef::lower().
Referenced by getMClassRegisterMask().
Definition at line 1809 of file ARMISelDAGToDAG.cpp.
References assert(), isVLDfixed(), and isVSTfixed().
isInt32Immediate - This method tests to see if the node is a 32-bit constant operand.
If so Imm will receive the 32-bit value.
Definition at line 294 of file ARMISelDAGToDAG.cpp.
References llvm::ISD::Constant, llvm::SDNode::getOpcode(), llvm::SDNode::getValueType(), llvm::MVT::i32, and N.
Referenced by isInt32Immediate(), and isOpcWithIntImmediate().
Definition at line 304 of file ARMISelDAGToDAG.cpp.
References llvm::SDValue::getNode(), and isInt32Immediate().
Definition at line 311 of file ARMISelDAGToDAG.cpp.
References llvm::SDValue::getNode(), llvm::SDNode::getOpcode(), llvm::SDNode::getOperand(), and isInt32Immediate().
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Check whether a particular node is a constant value representable as (N * Scale) where (N in [RangeMin, RangeMax).
| ScaledConstant | [out] - On success, the pre-scaled constant value. |
Definition at line 320 of file ARMISelDAGToDAG.cpp.
References assert(), C, llvm::dyn_cast(), and llvm::ConstantSDNode::getZExtValue().
Definition at line 1751 of file ARMISelDAGToDAG.cpp.
Referenced by getVLDSTRegisterUpdateOpcode().
Definition at line 1784 of file ARMISelDAGToDAG.cpp.
Referenced by getVLDSTRegisterUpdateOpcode().
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Definition at line 2602 of file ARMISelDAGToDAG.cpp.
References llvm::dyn_cast(), llvm::SDValue::getNode(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::SDNode::getOperand(), llvm::ConstantSDNode::getZExtValue(), llvm::ISD::OR, SearchSignedMulShort(), llvm::ISD::SHL, llvm::ISD::SMUL_LOHI, and llvm::ISD::SRL.
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Definition at line 2562 of file ARMISelDAGToDAG.cpp.
References llvm::ISD::AssertSext, llvm::dyn_cast(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::SDValue::getValueType(), llvm::ConstantSDNode::getZExtValue(), llvm::MVT::i32, llvm::ISD::SHL, llvm::ISD::SIGN_EXTEND, llvm::ISD::SIGN_EXTEND_INREG, and llvm::ISD::SRA.
Referenced by SearchSignedMulLong().
1.8.6