36 assert(&MF.
front() == &MBB &&
"Shrink-wrapping not yet supported");
46 uint64_t StackSize = MFI.getStackSize();
49 if (StackSize == 0 && !MFI.adjustsStack())
return;
56 TII.
makeFrame(Mips::SP, StackSize, MBB, MBBI);
61 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
62 .addCFIIndex(CFIIndex);
64 const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
67 const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
69 for (std::vector<CalleeSavedInfo>::const_iterator
I = CSI.begin(),
70 E = CSI.end();
I !=
E; ++
I) {
71 int64_t
Offset = MFI.getObjectOffset(
I->getFrameIdx());
72 unsigned Reg =
I->getReg();
76 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
77 .addCFIIndex(CFIIndex);
81 BuildMI(MBB, MBBI, dl, TII.get(Mips::MoveR3216), Mips::S0)
99 BuildMI(MBB, MBBI, dl, TII.get(Mips::Move32R16), Mips::SP)
110 const std::vector<CalleeSavedInfo> &CSI,
120 for (
unsigned i = 0, e = CSI.size();
i != e; ++
i) {
126 unsigned Reg = CSI[
i].getReg();
127 bool IsRAAndRetAddrIsTaken = (Reg == Mips::RA)
129 if (!IsRAAndRetAddrIsTaken)
138 const std::vector<CalleeSavedInfo> &CSI,
166 bool SaveS2 = Reserved[Mips::S2];
168 SavedRegs.
set(Mips::S2);
170 SavedRegs.
set(Mips::S0);
Mips16FrameLowering(const MipsSubtarget &STI)
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
int getDwarfRegNum(unsigned RegNum, bool isEH) const
Map a target register to an equivalent dwarf register number.
const MipsFrameLowering * createMips16FrameLowering(const MipsSubtarget &ST)
Create MipsFrameLowering objects.
const MipsSubtarget & STI
void makeFrame(unsigned SP, int64_t FrameSize, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const
static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register, int Offset)
.cfi_offset Previous value of Register is saved at offset Offset from CFA.
const MipsInstrInfo * getInstrInfo() const override
bool isReturnAddressTaken() const
This method may be called any time after instruction selection is complete to determine if there is a...
static MCCFIInstruction createDefCfaOffset(MCSymbol *L, int Offset)
.cfi_def_cfa_offset modifies a rule for computing CFA.
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects...
const HexagonInstrInfo * TII
Reg
All possible values of the reg field in the ModR/M byte.
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted...
LLVM_NODISCARD unsigned addFrameInst(const MCCFIInstruction &Inst)
void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS) const override
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
bool hasFP(const MachineFunction &MF) const override
hasFP - Return true if the specified function should have a dedicated frame pointer register...
const MachineBasicBlock & front() const
bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const std::vector< CalleeSavedInfo > &CSI, const TargetRegisterInfo *TRI) const override
spillCalleeSavedRegisters - Issues instruction(s) to spill all callee saved registers and returns tru...
BitVector getReservedRegs(const MachineFunction &MF) const override
iterator getLastNonDebugInstr()
Returns an iterator to the last non-debug instruction in the basic block, or end().
bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const std::vector< CalleeSavedInfo > &CSI, const TargetRegisterInfo *TRI) const override
restoreCalleeSavedRegisters - Issues instruction(s) to restore all callee saved registers and returns...
void restoreFrame(unsigned SP, int64_t FrameSize, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const
static GCRegistry::Add< CoreCLRGC > E("coreclr","CoreCLR-compatible GC")
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override
void addLiveIn(MCPhysReg PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
unsigned const MachineRegisterInfo * MRI
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override
emitProlog/emitEpilog - These methods insert prolog and epilog code into the function.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
const MipsRegisterInfo & getRegisterInfo() const override
getRegisterInfo - TargetInstrInfo is a superset of MRegister info.
virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
const MCContext & getContext() const
unsigned getMaxCallFrameSize() const
Return the maximum size of a call frame that must be allocated for an outgoing function call...
const MCRegisterInfo * getRegisterInfo() const
bool hasReservedCallFrame(const MachineFunction &MF) const override
hasReservedCallFrame - Under normal circumstances, when a frame pointer is not required, we reserve argument space for call sites in the function immediately on entry to the current function.
bool hasVarSizedObjects() const
This method may be called any time after instruction selection is complete to determine if the stack ...
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
MachineModuleInfo & getMMI() const
const MachineInstrBuilder & setMIFlag(MachineInstr::MIFlag Flag) const
This class contains meta information specific to a module.