LLVM  4.0.0
ARMSelectionDAGInfo.h
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1 //===-- ARMSelectionDAGInfo.h - ARM SelectionDAG Info -----------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file defines the ARM subclass for SelectionDAGTargetInfo.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_ARM_ARMSELECTIONDAGINFO_H
15 #define LLVM_LIB_TARGET_ARM_ARMSELECTIONDAGINFO_H
16 
20 
21 namespace llvm {
22 
23 namespace ARM_AM {
24  static inline ShiftOpc getShiftOpcForNode(unsigned Opcode) {
25  switch (Opcode) {
26  default: return ARM_AM::no_shift;
27  case ISD::SHL: return ARM_AM::lsl;
28  case ISD::SRL: return ARM_AM::lsr;
29  case ISD::SRA: return ARM_AM::asr;
30  case ISD::ROTR: return ARM_AM::ror;
31  //case ISD::ROTL: // Only if imm -> turn into ROTR.
32  // Can't handle RRX here, because it would require folding a flag into
33  // the addressing mode. :( This causes us to miss certain things.
34  //case ARMISD::RRX: return ARM_AM::rrx;
35  }
36  }
37 } // end namespace ARM_AM
38 
40 public:
42  SDValue Chain, SDValue Dst, SDValue Src,
43  SDValue Size, unsigned Align, bool isVolatile,
44  bool AlwaysInline,
45  MachinePointerInfo DstPtrInfo,
46  MachinePointerInfo SrcPtrInfo) const override;
47 
48  SDValue
49  EmitTargetCodeForMemmove(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain,
50  SDValue Dst, SDValue Src, SDValue Size,
51  unsigned Align, bool isVolatile,
52  MachinePointerInfo DstPtrInfo,
53  MachinePointerInfo SrcPtrInfo) const override;
54 
55  // Adjust parameters for memset, see RTABI section 4.3.4
57  SDValue Chain, SDValue Op1, SDValue Op2,
58  SDValue Op3, unsigned Align, bool isVolatile,
59  MachinePointerInfo DstPtrInfo) const override;
60 
62  SDValue Chain, SDValue Dst, SDValue Src,
63  SDValue Size, unsigned Align,
64  RTLIB::Libcall LC) const;
65 };
66 
67 }
68 
69 #endif
Libcall
RTLIB::Libcall enum - This enum defines all of the runtime library calls the backend can emit...
SDValue EmitTargetCodeForMemmove(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, bool isVolatile, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const override
Emit target-specific code that performs a memmove.
SDValue EmitSpecializedLibcall(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, RTLIB::Libcall LC) const
Shift and rotation operations.
Definition: ISDOpcodes.h:344
static ShiftOpc getShiftOpcForNode(unsigned Opcode)
Targets can subclass this to parameterize the SelectionDAG lowering and instruction selection process...
This class contains a discriminated union of information about pointers in memory operands...
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
Definition: SelectionDAG.h:166
Wrapper class for IR location info (IR ordering and DebugLoc) to be passed into SDNode creation funct...
SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, bool isVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const override
Emit target-specific code that performs a memcpy.
static bool isVolatile(Instruction *Inst)
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation...
SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, unsigned Align, bool isVolatile, MachinePointerInfo DstPtrInfo) const override
Emit target-specific code that performs a memset.