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LLVM
4.0.0
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#include <MipsSEInstrInfo.h>
Public Member Functions | |
| MipsSEInstrInfo (const MipsSubtarget &STI) | |
| const MipsRegisterInfo & | getRegisterInfo () const override |
| getRegisterInfo - TargetInstrInfo is a superset of MRegister info. More... | |
| unsigned | isLoadFromStackSlot (const MachineInstr &MI, int &FrameIndex) const override |
| isLoadFromStackSlot - If the specified machine instruction is a direct load from a stack slot, return the virtual or physical register number of the destination along with the FrameIndex of the loaded stack slot. More... | |
| unsigned | isStoreToStackSlot (const MachineInstr &MI, int &FrameIndex) const override |
| isStoreToStackSlot - If the specified machine instruction is a direct store to a stack slot, return the virtual or physical register number of the source reg along with the FrameIndex of the loaded stack slot. More... | |
| void | copyPhysReg (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const DebugLoc &DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const override |
| void | storeRegToStack (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, int64_t Offset) const override |
| void | loadRegFromStack (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, int64_t Offset) const override |
| bool | expandPostRAPseudo (MachineInstr &MI) const override |
| unsigned | getOppositeBranchOpc (unsigned Opc) const override |
| getOppositeBranchOpc - Return the inverse of the specified opcode, e.g. More... | |
| void | adjustStackPtr (unsigned SP, int64_t Amount, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const override |
| Adjust SP by Amount bytes. More... | |
| unsigned | loadImmediate (int64_t Imm, MachineBasicBlock &MBB, MachineBasicBlock::iterator II, const DebugLoc &DL, unsigned *NewImm) const |
| Emit a series of instructions to load an immediate. More... | |
Public Member Functions inherited from llvm::MipsInstrInfo | |
| MipsInstrInfo (const MipsSubtarget &STI, unsigned UncondBrOpc) | |
| bool | analyzeBranch (MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const override |
| Branch Analysis. More... | |
| unsigned | removeBranch (MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const override |
| unsigned | insertBranch (MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const override |
| bool | reverseBranchCondition (SmallVectorImpl< MachineOperand > &Cond) const override |
| reverseBranchCondition - Return the inverse opcode of the specified Branch instruction. More... | |
| BranchType | analyzeBranch (MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify, SmallVectorImpl< MachineInstr * > &BranchInstrs) const |
| unsigned | getEquivalentCompactForm (const MachineBasicBlock::iterator I) const |
| Determine the opcode of a non-delay slot form for a branch if one exists. More... | |
| bool | SafeInForbiddenSlot (const MachineInstr &MI) const |
| Predicate to determine if an instruction can go in a forbidden slot. More... | |
| bool | HasForbiddenSlot (const MachineInstr &MI) const |
| Predicate to determine if an instruction has a forbidden slot. More... | |
| void | insertNoop (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const override |
| Insert nop instruction when hazard condition is found. More... | |
| unsigned | getInstSizeInBytes (const MachineInstr &MI) const override |
| Return the number of bytes of code the specified instruction may be. More... | |
| void | storeRegToStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override |
| void | loadRegFromStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override |
| MachineInstrBuilder | genInstrWithNewOpc (unsigned NewOpc, MachineBasicBlock::iterator I) const |
| Create an instruction which has the same operands and memory operands as MI but has a new opcode. More... | |
Additional Inherited Members | |
Public Types inherited from llvm::MipsInstrInfo | |
| enum | BranchType { BT_None, BT_NoBranch, BT_Uncond, BT_Cond, BT_CondUncond, BT_Indirect } |
Static Public Member Functions inherited from llvm::MipsInstrInfo | |
| static const MipsInstrInfo * | create (MipsSubtarget &STI) |
Protected Member Functions inherited from llvm::MipsInstrInfo | |
| bool | isZeroImm (const MachineOperand &op) const |
| MachineMemOperand * | GetMemOperand (MachineBasicBlock &MBB, int FI, MachineMemOperand::Flags Flags) const |
Protected Attributes inherited from llvm::MipsInstrInfo | |
| const MipsSubtarget & | Subtarget |
| unsigned | UncondBrOpc |
Definition at line 22 of file MipsSEInstrInfo.h.
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explicit |
Definition at line 28 of file MipsSEInstrInfo.cpp.
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overridevirtual |
Adjust SP by Amount bytes.
Implements llvm::MipsInstrInfo.
Definition at line 452 of file MipsSEInstrInfo.cpp.
References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::MipsSubtarget::getABI(), llvm::MipsABIInfo::GetPtrAddiuOp(), llvm::MipsABIInfo::GetPtrAdduOp(), llvm::MipsABIInfo::GetPtrSubuOp(), llvm::isInt< 16 >(), llvm::RegState::Kill, loadImmediate(), and llvm::MipsInstrInfo::Subtarget.
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override |
Definition at line 79 of file MipsSEInstrInfo.cpp.
References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::BuildMI(), contains(), llvm::RegState::Define, llvm::getKillRegState(), llvm::RegState::Implicit, llvm::RegState::ImplicitDefine, llvm::MipsSubtarget::inMicroMipsMode(), llvm::MipsISD::MFHI, llvm::MipsISD::MFLO, OR, and llvm::MipsInstrInfo::Subtarget.
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override |
Definition at line 331 of file MipsSEInstrInfo.cpp.
References llvm::MipsISD::BuildPairF64, llvm::MachineBasicBlock::erase(), llvm::MipsISD::ERet, llvm::MipsISD::ExtractElementF64, llvm::MachineInstr::getDesc(), llvm::MCInstrDesc::getOpcode(), llvm::MachineInstr::getParent(), llvm::MipsSubtarget::inMicroMipsMode(), MBB, llvm::MipsISD::MFHI, llvm::MipsISD::MFLO, and llvm::MipsInstrInfo::Subtarget.
getOppositeBranchOpc - Return the inverse of the specified opcode, e.g.
turning BEQ to BNE.
Implements llvm::MipsInstrInfo.
Definition at line 407 of file MipsSEInstrInfo.cpp.
References llvm_unreachable.
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overridevirtual |
getRegisterInfo - TargetInstrInfo is a superset of MRegister info.
As such, whenever a client has an instance of instruction info, it should always be able to get register info as well (through this method).
Implements llvm::MipsInstrInfo.
Definition at line 32 of file MipsSEInstrInfo.cpp.
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override |
isLoadFromStackSlot - If the specified machine instruction is a direct load from a stack slot, return the virtual or physical register number of the destination along with the FrameIndex of the loaded stack slot.
If not, return 0. This predicate must return 0 if the instruction has any side effects other than loading from the stack slot.
Definition at line 41 of file MipsSEInstrInfo.cpp.
References llvm::MachineOperand::getIndex(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isFI(), llvm::MachineOperand::isImm(), llvm::MipsInstrInfo::isZeroImm(), and llvm::ARM_MB::LD.
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override |
isStoreToStackSlot - If the specified machine instruction is a direct store to a stack slot, return the virtual or physical register number of the source reg along with the FrameIndex of the loaded stack slot.
If not, return 0. This predicate must return 0 if the instruction has any side effects other than storing to the stack slot.
Definition at line 63 of file MipsSEInstrInfo.cpp.
References llvm::MachineOperand::getIndex(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isFI(), llvm::MachineOperand::isImm(), and llvm::MipsInstrInfo::isZeroImm().
| unsigned MipsSEInstrInfo::loadImmediate | ( | int64_t | Imm, |
| MachineBasicBlock & | MBB, | ||
| MachineBasicBlock::iterator | II, | ||
| const DebugLoc & | DL, | ||
| unsigned * | NewImm | ||
| ) | const |
Emit a series of instructions to load an immediate.
This function generates the sequence of instructions needed to get the result of adding register REG and immediate IMM.
If NewImm is a non-NULL parameter, the last instruction is not emitted, but instead its immediate operand is returned in NewImm.
Definition at line 480 of file MipsSEInstrInfo.cpp.
References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::MipsAnalyzeImmediate::Analyze(), assert(), llvm::SmallVectorTemplateCommon< T, typename >::begin(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::SmallVectorTemplateCommon< T, typename >::end(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getRegInfo(), llvm::MipsSubtarget::isABI_N64(), llvm::RegState::Kill, llvm::SmallVectorTemplateCommon< T, typename >::size(), and llvm::MipsInstrInfo::Subtarget.
Referenced by adjustStackPtr().
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overridevirtual |
Implements llvm::MipsInstrInfo.
Definition at line 252 of file MipsSEInstrInfo.cpp.
References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMemOperand(), llvm::MachineInstrBuilder::addReg(), llvm::MipsABIInfo::ArePtrs64bit(), assert(), llvm::BuildMI(), llvm::MachineBasicBlock::end(), llvm::MipsSubtarget::getABI(), llvm::MachineFunction::getFunction(), llvm::MipsInstrInfo::GetMemOperand(), llvm::MachineBasicBlock::getParent(), llvm::Function::hasFnAttribute(), llvm::TargetRegisterClass::hasType(), llvm::ARM_MB::LD, llvm::MachineMemOperand::MOLoad, llvm::MipsInstrInfo::Subtarget, llvm::MVT::v16i8, llvm::MVT::v2f64, llvm::MVT::v2i64, llvm::MVT::v4f32, llvm::MVT::v4i32, llvm::MVT::v8f16, and llvm::MVT::v8i16.
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overridevirtual |
Implements llvm::MipsInstrInfo.
Definition at line 183 of file MipsSEInstrInfo.cpp.
References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMemOperand(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::BuildMI(), llvm::MachineFunction::getFunction(), llvm::getKillRegState(), llvm::MipsInstrInfo::GetMemOperand(), llvm::MachineBasicBlock::getParent(), llvm::Function::hasFnAttribute(), llvm::TargetRegisterClass::hasType(), llvm::MipsISD::MFHI, llvm::MipsISD::MFLO, llvm::MachineMemOperand::MOStore, llvm::MVT::v16i8, llvm::MVT::v2f64, llvm::MVT::v2i64, llvm::MVT::v4f32, llvm::MVT::v4i32, llvm::MVT::v8f16, and llvm::MVT::v8i16.
1.8.6