|
LLVM
4.0.0
|
#include "Hexagon.h"#include "HexagonISelLowering.h"#include "HexagonMachineFunctionInfo.h"#include "HexagonTargetMachine.h"#include "llvm/CodeGen/FunctionLoweringInfo.h"#include "llvm/CodeGen/MachineInstrBuilder.h"#include "llvm/CodeGen/SelectionDAGISel.h"#include "llvm/IR/Intrinsics.h"#include "llvm/Support/CommandLine.h"#include "llvm/Support/Debug.h"#include "HexagonGenDAGISel.inc"Go to the source code of this file.
Namespaces | |
| llvm | |
| Compute iterated dominance frontiers using a linear time algorithm. | |
Macros | |
| #define | DEBUG_TYPE "hexagon-isel" |
Functions | |
| FunctionPass * | llvm::createHexagonISelDag (HexagonTargetMachine &TM, CodeGenOpt::Level OptLevel) |
| static bool | doesIntrinsicReturnPredicate (unsigned ID) |
| static bool | isOpcodeHandled (const SDNode *N) |
| static unsigned | getPowerOf2Factor (SDValue Val) |
| static bool | willShiftRightEliminate (SDValue V, unsigned Amount) |
| static bool | isTargetConstant (const SDValue &V) |
Variables | |
| static cl::opt< bool > | EnableAddressRebalancing ("isel-rebalance-addr", cl::Hidden, cl::init(true), cl::desc("Rebalance address calculation trees to improve ""instruction selection")) |
| static cl::opt< bool > | RebalanceOnlyForOptimizations ("rebalance-only-opt", cl::Hidden, cl::init(false), cl::desc("Rebalance address tree only if this allows optimizations")) |
| static cl::opt< bool > | RebalanceOnlyImbalancedTrees ("rebalance-only-imbal", cl::Hidden, cl::init(false), cl::desc("Rebalance address tree only if it is imbalanced")) |
| #define DEBUG_TYPE "hexagon-isel" |
Definition at line 26 of file HexagonISelDAGToDAG.cpp.
Definition at line 151 of file HexagonISelDAGToDAG.cpp.
Definition at line 1492 of file HexagonISelDAGToDAG.cpp.
References llvm::APInt::countTrailingZeros(), llvm::dyn_cast(), llvm::ConstantSDNode::getAPIntValue(), llvm::APInt::getBoolValue(), llvm::SDValue::getConstantOperandVal(), llvm::SDValue::getNode(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), i, llvm::ISD::MUL, and llvm::ISD::SHL.
Definition at line 1306 of file HexagonISelDAGToDAG.cpp.
References llvm::ISD::ADD, llvm::SDValue::getNode(), llvm::SDNode::getOpcode(), llvm::SDNode::getOperand(), llvm::ISD::MUL, and llvm::ISD::SHL.
Definition at line 1556 of file HexagonISelDAGToDAG.cpp.
References llvm::HexagonISD::CONST32, llvm::HexagonISD::CONST32_GP, and llvm::SDValue::getOpcode().
Definition at line 1515 of file HexagonISelDAGToDAG.cpp.
References llvm::SDValue::getConstantOperandVal(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), i, llvm::ISD::MUL, and llvm::ISD::SHL.
|
static |
|
static |
1.8.6