LLVM  4.0.0
MipsHazardSchedule.cpp
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1 //===-- MipsHazardSchedule.cpp - Workaround pipeline hazards --------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 /// \file
10 /// This pass is used to workaround certain pipeline hazards. For now, this
11 /// covers compact branch hazards. In future this pass can be extended to other
12 /// pipeline hazards, such as various MIPS1 hazards, processor errata that
13 /// require instruction reorganization, etc.
14 ///
15 /// This pass has to run after the delay slot filler as that pass can introduce
16 /// pipeline hazards, hence the existing hazard recognizer is not suitable.
17 ///
18 /// Hazards handled: forbidden slots for MIPSR6.
19 ///
20 /// A forbidden slot hazard occurs when a compact branch instruction is executed
21 /// and the adjacent instruction in memory is a control transfer instruction
22 /// such as a branch or jump, ERET, ERETNC, DERET, WAIT and PAUSE.
23 ///
24 /// For example:
25 ///
26 /// 0x8004 bnec a1,v0,<P+0x18>
27 /// 0x8008 beqc a1,a2,<P+0x54>
28 ///
29 /// In such cases, the processor is required to signal a Reserved Instruction
30 /// exception.
31 ///
32 /// Here, if the instruction at 0x8004 is executed, the processor will raise an
33 /// exception as there is a control transfer instruction at 0x8008.
34 ///
35 /// There are two sources of forbidden slot hazards:
36 ///
37 /// A) A previous pass has created a compact branch directly.
38 /// B) Transforming a delay slot branch into compact branch. This case can be
39 /// difficult to process as lookahead for hazards is insufficent, as
40 /// backwards delay slot fillling can also produce hazards in previously
41 /// processed instuctions.
42 ///
43 //===----------------------------------------------------------------------===//
44 
45 #include "Mips.h"
46 #include "MipsInstrInfo.h"
47 #include "MipsSEInstrInfo.h"
48 #include "MipsTargetMachine.h"
49 #include "llvm/ADT/Statistic.h"
52 #include "llvm/IR/Function.h"
56 
57 using namespace llvm;
58 
59 #define DEBUG_TYPE "mips-hazard-schedule"
60 
61 STATISTIC(NumInsertedNops, "Number of nops inserted");
62 
63 namespace {
64 
65 typedef MachineBasicBlock::iterator Iter;
66 typedef MachineBasicBlock::reverse_iterator ReverseIter;
67 
68 class MipsHazardSchedule : public MachineFunctionPass {
69 
70 public:
71  MipsHazardSchedule() : MachineFunctionPass(ID) {}
72 
73  StringRef getPassName() const override { return "Mips Hazard Schedule"; }
74 
75  bool runOnMachineFunction(MachineFunction &F) override;
76 
77  MachineFunctionProperties getRequiredProperties() const override {
80  }
81 
82 private:
83  static char ID;
84 };
85 
86 char MipsHazardSchedule::ID = 0;
87 } // end of anonymous namespace
88 
89 /// Returns a pass that clears pipeline hazards.
91  return new MipsHazardSchedule();
92 }
93 
94 // Find the next real instruction from the current position in current basic
95 // block.
96 static Iter getNextMachineInstrInBB(Iter Position) {
97  Iter I = Position, E = Position->getParent()->end();
98  I = std::find_if_not(I, E,
99  [](const Iter &Insn) { return Insn->isTransient(); });
100 
101  return I;
102 }
103 
104 // Find the next real instruction from the current position, looking through
105 // basic block boundaries.
106 static Iter getNextMachineInstr(Iter Position, MachineBasicBlock *Parent) {
107  if (Position == Parent->end()) {
108  MachineBasicBlock *Succ = Parent->getNextNode();
109  if (Succ != nullptr && Parent->isSuccessor(Succ)) {
110  Position = Succ->begin();
111  Parent = Succ;
112  } else {
114  "Should have identified the end of the function earlier!");
115  }
116  }
117 
118  Iter Instr = getNextMachineInstrInBB(Position);
119  if (Instr == Parent->end()) {
120  return getNextMachineInstr(Instr, Parent);
121  }
122  return Instr;
123 }
124 
125 bool MipsHazardSchedule::runOnMachineFunction(MachineFunction &MF) {
126 
127  const MipsSubtarget *STI =
128  &static_cast<const MipsSubtarget &>(MF.getSubtarget());
129 
130  // Forbidden slot hazards are only defined for MIPSR6 but not microMIPSR6.
131  if (!STI->hasMips32r6() || STI->inMicroMipsMode())
132  return false;
133 
134  bool Changed = false;
135  const MipsInstrInfo *TII = STI->getInstrInfo();
136 
137  for (MachineFunction::iterator FI = MF.begin(); FI != MF.end(); ++FI) {
138  for (Iter I = FI->begin(); I != FI->end(); ++I) {
139 
140  // Forbidden slot hazard handling. Use lookahead over state.
141  if (!TII->HasForbiddenSlot(*I))
142  continue;
143 
144  Iter Inst;
145  bool LastInstInFunction =
146  std::next(I) == FI->end() && std::next(FI) == MF.end();
147  if (!LastInstInFunction) {
148  Inst = getNextMachineInstr(std::next(I), &*FI);
149  }
150 
151  if (LastInstInFunction || !TII->SafeInForbiddenSlot(*Inst)) {
152  Changed = true;
153  MIBundleBuilder(&*I)
154  .append(BuildMI(MF, I->getDebugLoc(), TII->get(Mips::NOP)));
155  NumInsertedNops++;
156  }
157  }
158  }
159  return Changed;
160 }
bool HasForbiddenSlot(const MachineInstr &MI) const
Predicate to determine if an instruction has a forbidden slot.
NodeTy * getNextNode()
Get the next node, or nullptr for the list tail.
Definition: ilist_node.h:274
STATISTIC(NumFunctions,"Total number of functions")
static Iter getNextMachineInstrInBB(Iter Position)
const MipsInstrInfo * getInstrInfo() const override
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
const HexagonInstrInfo * TII
auto find_if_not(R &&Range, UnaryPredicate P) -> decltype(std::begin(Range))
Definition: STLExtras.h:769
#define F(x, y, z)
Definition: MD5.cpp:51
static GCRegistry::Add< CoreCLRGC > E("coreclr","CoreCLR-compatible GC")
FunctionPass * createMipsHazardSchedule()
Returns a pass that clears pipeline hazards.
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
bool SafeInForbiddenSlot(const MachineInstr &MI) const
Predicate to determine if an instruction can go in a forbidden slot.
FunctionPass class - This class is used to implement most global optimizations.
Definition: Pass.h:298
bool inMicroMipsMode() const
bool hasMips32r6() const
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
static Iter getNextMachineInstr(Iter Position, MachineBasicBlock *Parent)
Iterator for intrusive lists based on ilist_node.
bool isSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB is a successor of this block.
MachineFunctionProperties & set(Property P)
#define I(x, y, z)
Definition: MD5.cpp:54
MIBundleBuilder & append(MachineInstr *MI)
Insert MI into MBB by appending it to the instructions in the bundle.
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:47
Properties which a MachineFunction may have at a given point in time.
Helper class for constructing bundles of MachineInstrs.