52 void applyFixup(
const MCFixup &Fixup,
char *Data,
unsigned DataSize,
53 uint64_t
Value,
bool IsPCRel)
const override;
58 bool fixupNeedsRelaxation(
const MCFixup & , uint64_t ,
66 unsigned getNumFixupKinds()
const override {
70 bool mayNeedRelaxation(
const MCInst & )
const override {
74 void relaxInstruction(
const MCInst & ,
76 MCInst & )
const override {}
78 bool writeNopData(uint64_t Count,
MCObjectWriter *OW)
const override;
81 bool LanaiAsmBackend::writeNopData(uint64_t Count,
MCObjectWriter *OW)
const {
85 for (uint64_t
i = 0;
i < Count;
i += 4)
91 void LanaiAsmBackend::applyFixup(
const MCFixup &Fixup,
char *Data,
92 unsigned , uint64_t
Value,
103 unsigned NumBytes = (getFixupKindInfo(Kind).TargetSize + 7) / 8;
104 unsigned FullSize = 4;
110 for (
unsigned i = 0;
i != NumBytes; ++
i) {
111 unsigned Idx = (FullSize - 1 -
i);
112 CurVal |=
static_cast<uint64_t
>(
static_cast<uint8_t
>(Data[Offset + Idx]))
117 (
static_cast<uint64_t
>(-1) >> (64 - getFixupKindInfo(Kind).TargetSize));
118 CurVal |= Value &
Mask;
121 for (
unsigned i = 0;
i != NumBytes; ++
i) {
122 unsigned Idx = (FullSize - 1 -
i);
123 Data[Offset + Idx] =
static_cast<uint8_t
>((CurVal >> (
i * 8)) & 0xff);
134 LanaiAsmBackend::getFixupKindInfo(
MCFixupKind Kind)
const {
146 {
"FIXUP_LANAI_NONE", 0, 32, 0},
147 {
"FIXUP_LANAI_21", 16, 16 , 0},
148 {
"FIXUP_LANAI_21_F", 16, 16 , 0},
149 {
"FIXUP_LANAI_25", 7, 25, 0},
150 {
"FIXUP_LANAI_32", 0, 32, 0},
151 {
"FIXUP_LANAI_HI16", 16, 16, 0},
152 {
"FIXUP_LANAI_LO16", 16, 16, 0}};
171 return new LanaiAsmBackend(T, TT.
getOS());
OSType getOS() const
getOS - Get the parsed operating system type of this triple.
Defines the object file and target independent interfaces used by the assembler backend to write nati...
Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...
Encapsulates the layout of an assembly file at a particular point in time.
MCObjectWriter * createLanaiELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI)
uint32_t getOffset() const
Instances of this class represent a single low-level machine instruction.
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
A relaxable fragment holds on to its MCInst, since it may need to be relaxed during the assembler lay...
void write32(uint32_t Value)
MCFixupKind
Extensible enumeration to represent the type of a fixup.
MCAsmBackend * createLanaiAsmBackend(const Target &T, const MCRegisterInfo &MRI, const Triple &TheTriple, StringRef CPU, const MCTargetOptions &Options)
MCFixupKind getKind() const
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Triple - Helper class for working with autoconf configuration names.
static unsigned adjustFixupValue(unsigned Kind, uint64_t Value)
Target - Wrapper for Target specific information.
bool isOSBinFormatELF() const
Tests whether the OS uses the ELF binary format.
MCSubtargetInfo - Generic base class for all target subtargets.
Target independent information on a fixup kind.
An abstract base class for streams implementations that also support a pwrite operation.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
LLVM Value Representation.
Generic interface to target specific assembler backends.
std::underlying_type< E >::type Mask()
Get a bitmask with 1s in all places up to the high-order bit of E's largest value.
StringRef - Represent a constant reference to a string, i.e.
virtual const MCFixupKindInfo & getFixupKindInfo(MCFixupKind Kind) const
Get information on a fixup kind.