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LLVM
4.0.0
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This file implements a register stacking pass. More...
#include "WebAssembly.h"#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"#include "WebAssemblyMachineFunctionInfo.h"#include "WebAssemblySubtarget.h"#include "WebAssemblyUtilities.h"#include "llvm/Analysis/AliasAnalysis.h"#include "llvm/CodeGen/LiveIntervalAnalysis.h"#include "llvm/CodeGen/MachineBlockFrequencyInfo.h"#include "llvm/CodeGen/MachineDominators.h"#include "llvm/CodeGen/MachineInstrBuilder.h"#include "llvm/CodeGen/MachineRegisterInfo.h"#include "llvm/CodeGen/Passes.h"#include "llvm/Support/Debug.h"#include "llvm/Support/raw_ostream.h"Go to the source code of this file.
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| #define | DEBUG_TYPE "wasm-reg-stackify" |
This file implements a register stacking pass.
This pass reorders instructions to put register uses and defs in an order such that they form single-use expression trees. Registers fitting this form are then marked as "stackified", meaning references to them are replaced by "push" and "pop" from the value stack.
This is primarily a code size optimization, since temporary values on the value stack don't need to be named.
Definition in file WebAssemblyRegStackify.cpp.
| #define DEBUG_TYPE "wasm-reg-stackify" |
Definition at line 39 of file WebAssemblyRegStackify.cpp.
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Definition at line 92 of file WebAssemblyRegStackify.cpp.
References llvm::MachineInstr::addOperand(), assert(), llvm::MachineOperand::CreateFPImm(), llvm::MachineOperand::CreateImm(), llvm::MCInstrInfo::get(), llvm::Function::getContext(), llvm::Type::getDoubleTy(), llvm::Type::getFloatTy(), llvm::MachineFunction::getFunction(), llvm::Constant::getNullValue(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineRegisterInfo::getRegClass(), llvm_unreachable, and llvm::MachineInstr::setDesc().
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Get the appropriate tee opcode for the given register class.
Definition at line 440 of file WebAssemblyRegStackify.cpp.
References llvm_unreachable.
Referenced by MoveAndTeeForMultiUse().
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Definition at line 259 of file WebAssemblyRegStackify.cpp.
References llvm::tgtok::Def, llvm::LiveIntervals::getInstructionFromIndex(), llvm::LiveIntervals::getInstructionIndex(), llvm::LiveIntervals::getInterval(), llvm::MachineRegisterInfo::getUniqueVRegDef(), and llvm::LiveRange::getVNInfoBefore().
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Definition at line 278 of file WebAssemblyRegStackify.cpp.
References assert(), llvm::LiveIntervals::getInstructionIndex(), llvm::LiveIntervals::getInterval(), llvm::SlotIndex::getRegSlot(), llvm::LiveRange::getVNInfoAt(), llvm::MachineRegisterInfo::hasOneUse(), I, llvm::LiveRange::Query(), and llvm::MachineRegisterInfo::use_nodbg_operands().
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Definition at line 76 of file WebAssemblyRegStackify.cpp.
References llvm::MachineInstr::addOperand(), llvm::MachineOperand::CreateReg(), llvm::MachineInstr::definesRegister(), and llvm::MachineInstr::readsRegister().
Referenced by MoveAndTeeForMultiUse(), MoveForSingleUse(), and RematerializeCheapDef().
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Definition at line 308 of file WebAssemblyRegStackify.cpp.
References assert(), D, llvm::MachineInstr::definesRegister(), llvm::MachineInstr::getParent(), llvm::MachineRegisterInfo::hasOneDef(), I, llvm::TargetRegisterInfo::isPhysicalRegister(), llvm::MachineRegisterInfo::isPhysRegModified(), llvm::MachineInstr::operands(), Query(), and llvm::MachineInstr::readsRegister().
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A multiple-use def in the same block with no intervening memory or register dependencies; move the def down, nest it with the current instruction, and insert a tee to satisfy the rest of the uses.
As an illustration, rewrite this:
Reg = INST ... // Def INST ..., Reg, ... // Insert INST ..., Reg, ... INST ..., Reg, ...
to this:
DefReg = INST ... // Def (to become the new Insert) TeeReg, Reg = TEE_... DefReg INST ..., TeeReg, ... // Insert INST ..., Reg, ... INST ..., Reg, ...
with DefReg and TeeReg stackified. This eliminates a get_local from the resulting code.
Definition at line 566 of file WebAssemblyRegStackify.cpp.
References llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::LiveIntervals::createAndComputeVirtRegInterval(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::dbgs(), DEBUG, llvm::tgtok::Def, llvm::VNInfo::def, llvm::RegState::Define, llvm::MachineInstr::dump(), llvm::LiveRange::FindSegmentContaining(), llvm::MachineInstr::getDebugLoc(), llvm::LiveIntervals::getInstructionIndex(), llvm::LiveIntervals::getInterval(), llvm::MachineInstr::getOperand(), llvm::MachineRegisterInfo::getRegClass(), llvm::SlotIndex::getRegSlot(), GetTeeOpcode(), llvm::getUndefRegState(), llvm::LiveRange::getVNInfoAt(), llvm::LiveIntervals::handleMove(), I, ImposeStackOrdering(), llvm::LiveIntervals::InsertMachineInstrInMaps(), llvm::MachineOperand::isDead(), llvm::MachineOperand::setReg(), ShrinkToUses(), llvm::MachineBasicBlock::splice(), and llvm::WebAssemblyFunctionInfo::stackifyVReg().
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A single-use def in the same block with no intervening memory or register dependencies; move the def down and nest it with the current instruction.
Definition at line 464 of file WebAssemblyRegStackify.cpp.
References llvm::LiveIntervals::createAndComputeVirtRegInterval(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::dbgs(), DEBUG, llvm::tgtok::Def, llvm::MachineInstr::dump(), llvm::LiveIntervals::getInstructionIndex(), llvm::LiveIntervals::getInterval(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getParent(), llvm::MachineRegisterInfo::getRegClass(), llvm::SlotIndex::getRegSlot(), llvm::LiveIntervals::handleMove(), llvm::MachineRegisterInfo::hasOneDef(), llvm::MachineRegisterInfo::hasOneUse(), ImposeStackOrdering(), llvm::LiveRange::removeSegment(), llvm::MachineOperand::setReg(), llvm::MachineBasicBlock::splice(), and llvm::WebAssemblyFunctionInfo::stackifyVReg().
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Test whether OneUse, a use of Reg, dominates all of Reg's other uses.
Definition at line 380 of file WebAssemblyRegStackify.cpp.
References assert(), llvm::MachineDominatorTree::dominates(), llvm::MachineInstr::getDesc(), llvm::LiveIntervals::getInstructionIndex(), llvm::LiveIntervals::getInterval(), llvm::MCInstrDesc::getNumDefs(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineOperand::getParent(), llvm::MachineOperand::getReg(), llvm::LiveRange::getVNInfoBefore(), llvm::MachineRegisterInfo::hasOneUse(), llvm::MachineOperand::isReg(), llvm::TargetRegisterInfo::isVirtualRegister(), llvm::WebAssemblyFunctionInfo::isVRegStackified(), llvm::MachineRegisterInfo::use_begin(), and llvm::MachineRegisterInfo::use_nodbg_operands().
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Definition at line 156 of file WebAssemblyRegStackify.cpp.
References assert(), llvm::PointerUnion< PT1, PT2 >::get(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::hasOrderedMemoryRef(), llvm::MachineInstr::hasUnmodeledSideEffects(), llvm::PointerUnion< PT1, PT2 >::is(), llvm::MachineInstr::isCall(), llvm::MachineInstr::isDebugValue(), llvm::MachineInstr::isDereferenceableInvariantLoad(), llvm::MachineInstr::isPosition(), llvm::MachineInstr::isTerminator(), llvm_unreachable, llvm::MachineInstr::mayLoad(), llvm::MachineInstr::mayStore(), llvm::MachineInstr::memoperands(), QueryCallee(), and llvm::MachinePointerInfo::V.
Referenced by llvm::computeKnownBits(), computeKnownBitsFromAssume(), llvm::ComputeNumSignBits(), llvm::ComputeSignBit(), llvm::isKnownNonEqual(), llvm::isKnownNonZero(), llvm::isKnownToBeAPowerOfTwo(), IsSafeToMove(), llvm::MaskedValueIsZero(), llvm::SimplifyAddInst(), llvm::SimplifyAndInst(), llvm::SimplifyAShrInst(), llvm::SimplifyBinOp(), llvm::SimplifyCall(), llvm::SimplifyCastInst(), llvm::SimplifyCmpInst(), llvm::SimplifyExtractElementInst(), llvm::SimplifyExtractValueInst(), llvm::SimplifyFAddInst(), llvm::SimplifyFCmpInst(), llvm::SimplifyFDivInst(), llvm::SimplifyFMulInst(), llvm::SimplifyFPBinOp(), llvm::SimplifyFRemInst(), llvm::SimplifyFSubInst(), llvm::SimplifyGEPInst(), llvm::SimplifyICmpInst(), llvm::SimplifyInsertValueInst(), llvm::SimplifyInstruction(), llvm::SimplifyLShrInst(), llvm::SimplifyMulInst(), llvm::SimplifyOrInst(), llvm::SimplifySDivInst(), llvm::SimplifySelectInst(), llvm::SimplifyShlInst(), llvm::SimplifySRemInst(), llvm::SimplifySubInst(), llvm::SimplifyUDivInst(), llvm::SimplifyURemInst(), and llvm::SimplifyXorInst().
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Definition at line 124 of file WebAssemblyRegStackify.cpp.
References F, llvm::MachineOperand::getGlobal(), llvm::MachineInstr::getOperand(), and llvm::MachineOperand::isGlobal().
Referenced by Query().
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A trivially cloneable instruction; clone it and nest the new copy with the current instruction.
Definition at line 506 of file WebAssemblyRegStackify.cpp.
References llvm::LiveIntervals::createAndComputeVirtRegInterval(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::dbgs(), DEBUG, llvm::MachineInstr::dump(), llvm::MachineInstr::eraseFromParent(), llvm::SlotIndex::getDeadSlot(), llvm::LiveIntervals::getInstructionIndex(), llvm::LiveIntervals::getInterval(), llvm::MachineOperand::getParent(), llvm::MachineRegisterInfo::getRegClass(), llvm::SlotIndex::getRegSlot(), ImposeStackOrdering(), llvm::LiveIntervals::InsertMachineInstrInMaps(), llvm::LiveRange::liveAt(), llvm::LiveIntervals::removeInterval(), llvm::LiveIntervals::RemoveMachineInstrFromMaps(), llvm::LiveIntervals::removePhysRegDefAt(), llvm::MachineOperand::setReg(), ShrinkToUses(), llvm::WebAssemblyFunctionInfo::stackifyVReg(), and llvm::MachineRegisterInfo::use_empty().
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Definition at line 251 of file WebAssemblyRegStackify.cpp.
References llvm::MachineInstr::isAsCheapAsAMove().
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Definition at line 455 of file WebAssemblyRegStackify.cpp.
References llvm::LiveIntervals::shrinkToUses(), and llvm::LiveIntervals::splitSeparateComponents().
Referenced by MoveAndTeeForMultiUse(), and RematerializeCheapDef().
1.8.6