29 #include "llvm/Support/DataTypes.h"
39 #define DEBUG_TYPE "codegen"
42 : BB(B),
Number(-1), xParent(&MF) {
46 MachineBasicBlock::~MachineBasicBlock() {
51 if (!CachedMCSymbol) {
61 return CachedMCSymbol;
86 I->AddRegOperandsToUseLists(RegInfo);
98 assert(!N->
getParent() &&
"machine instruction already in a basic block");
104 N->AddRegOperandsToUseLists(MF->
getRegInfo());
114 N->RemoveRegOperandsFromUseLists(MF->
getRegInfo());
116 N->setParent(
nullptr);
122 instr_iterator First,
123 instr_iterator Last) {
124 assert(Parent->getParent() == FromList.Parent->getParent() &&
125 "MachineInstr parent mismatch!");
126 assert(
this != &FromList &&
"Called without a real transfer...");
127 assert(Parent != FromList.Parent &&
"Two lists have the same parent?");
131 for (; First != Last; ++First)
132 First->setParent(Parent);
137 Parent->getParent()->DeleteMachineInstr(MI);
142 while (I !=
E && I->isPHI())
144 assert((I ==
E || !I->isInsideBundle()) &&
145 "First non-phi MI cannot be inside a bundle!");
152 while (I != E && (I->isPHI() || I->isPosition()))
156 assert((I == E || !I->isInsideBundle()) &&
157 "First non-phi / non-label instruction is inside a bundle!");
164 while (I != E && (I->isPHI() || I->isPosition() || I->isDebugValue()))
168 assert((I == E || !I->isInsideBundle()) &&
169 "First non-phi / non-label / non-debug "
170 "instruction is inside a bundle!");
176 while (
I != B && ((--
I)->isTerminator() ||
I->isDebugValue()))
178 while (
I !=
E && !
I->isTerminator())
185 while (
I != B && ((--
I)->isTerminator() ||
I->isDebugValue()))
187 while (
I !=
E && !
I->isTerminator())
203 if (
I->isDebugValue() ||
I->isInsideBundle())
218 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
226 return LBB->getName();
247 OS <<
"Can't print out MachineBasicBlock because parent MachineFunction"
254 print(OS, MST, Indexes);
261 OS <<
"Can't print out MachineBasicBlock because parent MachineFunction"
271 const char *Comma =
"";
273 OS << Comma <<
"derived from LLVM BB ";
274 LBB->printAsOperand(OS,
false, MST);
277 if (
isEHPad()) { OS << Comma <<
"EH LANDING PAD"; Comma =
", "; }
278 if (
hasAddressTaken()) { OS << Comma <<
"ADDRESS TAKEN"; Comma =
", "; }
280 OS << Comma <<
"Align " << Alignment <<
" (" << (1u << Alignment)
287 if (Indexes) OS <<
'\t';
289 for (
const auto &LI : LiveIns) {
290 OS <<
' ' <<
PrintReg(LI.PhysReg, TRI);
291 if (!LI.LaneMask.all())
298 if (Indexes) OS <<
'\t';
299 OS <<
" Predecessors according to CFG:";
301 OS <<
" BB#" << (*PI)->getNumber();
312 if (
I.isInsideBundle())
319 if (Indexes) OS <<
'\t';
320 OS <<
" Successors according to CFG:";
322 OS <<
" BB#" << (*SI)->getNumber();
324 OS <<
'(' << *getProbabilityIterator(
SI) <<
')';
338 if (I == LiveIns.end())
341 I->LaneMask &= ~LaneMask;
342 if (I->LaneMask.none())
349 return I !=
livein_end() && (I->LaneMask & LaneMask).any();
353 std::sort(LiveIns.begin(), LiveIns.end(),
355 return LI0.
PhysReg < LI1.PhysReg;
358 LiveInVector::const_iterator
I = LiveIns.begin();
359 LiveInVector::const_iterator J;
360 LiveInVector::iterator Out = LiveIns.begin();
361 for (; I != LiveIns.end(); ++Out, I = J) {
362 unsigned PhysReg = I->PhysReg;
364 for (J = std::next(I); J != LiveIns.end() && J->PhysReg == PhysReg; ++J)
365 LaneMask |= J->LaneMask;
366 Out->PhysReg = PhysReg;
367 Out->LaneMask = LaneMask;
369 LiveIns.erase(Out, LiveIns.end());
376 assert(RC &&
"Register class is required");
378 "Only the entry block and landing pads can have physreg live ins");
387 for (;I !=
E && I->isCopy(); ++
I)
388 if (I->getOperand(1).getReg() == PhysReg) {
389 unsigned VirtReg = I->getOperand(0).getReg();
423 assert(!B &&
"UpdateTerminators requires analyzable predecessors!");
435 if ((*SI)->isEHPad())
437 assert(!TBB &&
"Found more than one non-landing-pad successor!");
475 if ((*SI)->isEHPad() || *
SI == TBB)
477 assert(!FallthroughBB &&
"Found more than one fallthrough successor.");
481 if (!FallthroughBB) {
510 TII->
insertBranch(*
this, FallthroughBB,
nullptr, Cond, DL);
514 TII->
insertBranch(*
this, FallthroughBB,
nullptr, Cond, DL);
524 for (
auto Prob : Probs)
525 Sum += Prob.getNumerator();
531 "The sum of successors's probabilities exceeds one.");
539 if (!(Probs.empty() && !Successors.empty()))
540 Probs.push_back(Prob);
541 Successors.push_back(Succ);
542 Succ->addPredecessor(
this);
550 Successors.push_back(Succ);
551 Succ->addPredecessor(
this);
555 bool NormalizeSuccProbs) {
562 assert(I != Successors.end() &&
"Not a current successor!");
566 if (!Probs.empty()) {
567 probability_iterator WI = getProbabilityIterator(I);
569 if (NormalizeSuccProbs)
573 (*I)->removePredecessor(
this);
574 return Successors.erase(I);
597 assert(OldI != E &&
"Old is not a successor of this block");
601 Old->removePredecessor(
this);
602 New->addPredecessor(
this);
609 if (!Probs.empty()) {
610 auto ProbIter = getProbabilityIterator(NewI);
611 if (!ProbIter->isUnknown())
612 *ProbIter += *getProbabilityIterator(OldI);
618 Predecessors.push_back(Pred);
623 assert(I != Predecessors.end() &&
"Pred is not a predecessor of this block!");
624 Predecessors.erase(I);
635 if (!FromMBB->Probs.empty()) {
636 auto Prob = *FromMBB->Probs.begin();
652 if (!FromMBB->Probs.empty()) {
653 auto Prob = *FromMBB->Probs.begin();
664 if (MO.
getMBB() == FromMBB)
709 if (!TBB)
return true;
719 if (Cond.
empty())
return false;
723 return FBB ==
nullptr;
736 DEBUG(
dbgs() <<
"Splitting critical edge:"
739 <<
" -- BB#" << Succ->
getNumber() <<
'\n');
746 Indexes->insertMBBInMaps(NMBB);
761 if (!OI->isReg() || OI->getReg() == 0 ||
762 !OI->isUse() || !OI->isKill() || OI->isUndef())
764 unsigned Reg = OI->getReg();
767 KilledRegs.push_back(Reg);
768 DEBUG(
dbgs() <<
"Removing terminator kill: " << *MI);
769 OI->setIsKill(
false);
782 if (!OI->isReg() || OI->getReg() == 0)
785 unsigned Reg = OI->getReg();
812 E = Terminators.
end(); I !=
E; ++
I) {
814 Indexes->removeMachineInstrFromMaps(**I);
829 if (Indexes->hasIndex(MI))
830 Indexes->removeMachineInstrFromMaps(MI);
831 Indexes->insertMachineInstrInMaps(MI);
839 i != e &&
i->isPHI(); ++
i)
840 for (
unsigned ni = 1, ne =
i->getNumOperands(); ni != ne; ni += 2)
841 if (
i->getOperand(ni+1).getMBB() ==
this)
842 i->getOperand(ni+1).setMBB(NMBB);
845 for (
const auto &LI : Succ->
liveins())
852 while (!KilledRegs.empty()) {
853 unsigned Reg = KilledRegs.pop_back_val();
855 if (!(--I)->addRegisterKilled(Reg, TRI,
false))
859 DEBUG(
dbgs() <<
"Restored terminator kill: " << *I);
878 SlotIndex StartIndex = Indexes->getMBBEndIdx(
this);
880 SlotIndex EndIndex = Indexes->getMBBEndIdx(NMBB);
886 I !=
E && I->isPHI(); ++
I) {
887 for (
unsigned ni = 1, ne = I->getNumOperands(); ni != ne; ni += 2) {
888 if (I->getOperand(ni+1).getMBB() == NMBB) {
898 "PHI sources should be live out of their predecessors.");
907 if (PHISrcRegs.
count(Reg) || !LIS->hasInterval(Reg))
911 if (!LI.
liveAt(PrevIndex))
915 if (isLiveOut && isLastMBB) {
917 assert(VNI &&
"LiveInterval should have VNInfo where it is live.");
919 }
else if (!isLiveOut && !isLastMBB) {
931 MDT->recordSplitCriticalEdge(
this, Succ, NMBB);
937 if (
MachineLoop *DestLoop = MLI->getLoopFor(Succ)) {
938 if (TIL == DestLoop) {
940 DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase());
941 }
else if (TIL->contains(DestLoop)) {
943 TIL->addBasicBlockToLoop(NMBB, MLI->getBase());
944 }
else if (DestLoop->contains(TIL)) {
946 DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase());
952 assert(DestLoop->getHeader() == Succ &&
953 "Should not create irreducible loops!");
955 P->addBasicBlockToLoop(NMBB, MLI->getBase());
983 if (TII->
analyzeBranch(*const_cast<MachineBasicBlock *>(
this), TBB, FBB, Cond,
991 if (TBB && TBB == FBB) {
992 DEBUG(
dbgs() <<
"Won't split critical edge after degenerate BB#"
1015 return Insts.
erase(I);
1028 "Cannot insert instruction with bundle flags");
1030 if (I !=
instr_end() && I->isBundledWithPred()) {
1034 return Insts.
insert(I, MI);
1055 assert(Old != New &&
"Cannot replace self with self!");
1060 if (!I->isTerminator())
break;
1064 for (
unsigned i = 0, e = I->getNumOperands();
i != e; ++
i)
1065 if (I->getOperand(
i).isMBB() &&
1066 I->getOperand(
i).getMBB() == Old)
1067 I->getOperand(
i).setMBB(New);
1098 bool Changed =
false;
1102 if (!DestA && !DestB) {
1106 }
else if (DestA && !DestB) {
1111 assert(DestA && DestB && IsCond &&
1112 "CFG in a bad state. Cannot correct CFG edges");
1121 if (!SeenMBBs.
insert(MBB).second ||
1122 (MBB != DestA && MBB != DestB && !MBB->
isEHPad())) {
1143 return MBBI->getDebugLoc();
1149 MachineBasicBlock::getSuccProbability(const_succ_iterator Succ)
const {
1153 const auto &Prob = *getProbabilityIterator(Succ);
1154 if (Prob.isUnknown()) {
1157 unsigned KnownProbNum = 0;
1159 for (
auto &
P : Probs) {
1160 if (!
P.isUnknown()) {
1165 return Sum.getCompl() / (Probs.size() - KnownProbNum);
1176 *getProbabilityIterator(I) = Prob;
1180 MachineBasicBlock::const_probability_iterator
1181 MachineBasicBlock::getProbabilityIterator(
1183 assert(Probs.size() == Successors.size() &&
"Async probability list!");
1184 const size_t index = std::distance(Successors.begin(),
I);
1185 assert(index < Probs.size() &&
"Not a current successor!");
1186 return Probs.begin() + index;
1190 MachineBasicBlock::probability_iterator
1192 assert(Probs.size() == Successors.size() &&
"Async probability list!");
1193 const size_t index = std::distance(Successors.begin(),
I);
1194 assert(index < Probs.size() &&
"Not a current successor!");
1195 return Probs.begin() + index;
1207 unsigned Neighborhood)
const {
1208 unsigned N = Neighborhood;
1241 }
while (I !=
begin() && --N > 0);
1261 for (++I; I !=
end() && N > 0; ++
I, --
N) {
1299 "Liveness information is accurate");
1300 return LiveIns.begin();
Pass interface - Implemented by all 'passes'.
unsigned succ_size() const
void push_back(const T &Elt)
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
bool isEHPad() const
Returns true if the block is a landing pad.
mop_iterator operands_end()
instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
const MCAsmInfo * getAsmInfo() const
instr_iterator instr_begin()
SlotIndex getInstructionIndex(const MachineInstr &MI) const
Returns the base index for the given instruction.
iterator_range< livein_iterator > liveins() const
instr_iterator instr_end()
MachineBasicBlock * getNextNode()
Get the next node, or nullptr for the list tail.
iterator erase(iterator where)
#define LLVM_DUMP_METHOD
Mark debug helper function definitions like dump() that should not be stripped from debug builds...
void addNodeToList(NodeTy *)
When an MBB is added to an MF, we need to update the parent pointer of the MBB, the MBB numbering...
MachineBasicBlock * getMBB() const
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
static unsigned index2VirtReg(unsigned Index)
Convert a 0-based index to a virtual register number.
A Module instance is used to store all the information related to an LLVM module. ...
int getNumber() const
MachineBasicBlocks are uniquely numbered at the function level, unless they're not in a MachineFuncti...
unsigned createVirtualRegister(const TargetRegisterClass *RegClass)
createVirtualRegister - Create and return a new virtual register in the function with the specified r...
instr_iterator getFirstInstrTerminator()
Same getFirstTerminator but it ignores bundles and return an instr_iterator instead.
iterator getFirstNonDebugInstr()
Returns an iterator to the first non-debug instruction in the basic block, or end().
LiveInterval - This class represents the liveness of a register, or stack slot.
iterator getFirstTerminator()
Returns an iterator to the first terminator instruction of this basic block.
static bool isVirtualRegister(unsigned Reg)
Return true if the specified register number is in the virtual register namespace.
void print(raw_ostream &OS, const SlotIndexes *=nullptr) const
void transferSuccessorsAndUpdatePHIs(MachineBasicBlock *FromMBB)
Transfers all the successors, as in transferSuccessors, and update PHI operands in the successor bloc...
void transferSuccessors(MachineBasicBlock *FromMBB)
Transfers all the successors from MBB to this machine basic block (i.e., copies all the successors Fr...
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
Template traits for intrusive list.
virtual bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify=false) const
Analyze the branching code at the end of MBB, returning true if it cannot be understood (e...
void addSuccessorWithoutProb(MachineBasicBlock *Succ)
Add Succ as a successor of this MachineBasicBlock.
This represents a simple continuous liveness interval for a value.
void moveAfter(MachineBasicBlock *NewBefore)
const Function * getFunction() const
getFunction - Return the LLVM function that this machine code represents
Manage lifetime of a slot tracker for printing IR.
unsigned getFunctionNumber() const
getFunctionNumber - Return a unique ID for the current function.
VNInfo - Value Number Information.
Instructions::iterator instr_iterator
MachineBasicBlock * removeFromParent()
This method unlinks 'this' from the containing function, and returns it, but does not delete it...
VNInfo * getVNInfoAt(SlotIndex Idx) const
getVNInfoAt - Return the VNInfo that is live at Idx, or NULL.
void removeLiveIn(MCPhysReg Reg, LaneBitmask LaneMask=LaneBitmask::getAll())
Remove the specified register from the live in set.
iterator_range< succ_iterator > successors()
StringRef getName() const
Return a constant reference to the value's name.
bool removeKill(MachineInstr &MI)
removeKill - Delete a kill corresponding to the specified machine instruction.
unsigned getNumVirtRegs() const
getNumVirtRegs - Return the number of virtual registers created.
void ReplaceUsesOfBlockWith(MachineBasicBlock *Old, MachineBasicBlock *New)
Given a machine basic block that branched to 'Old', change the code and CFG so that it branches to 'N...
virtual const uint32_t * getNoPreservedMask() const
Return a register mask that clobbers everything.
void eraseFromParent()
This method unlinks 'this' from the containing function and deletes it.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
const HexagonInstrInfo * TII
AnalysisType * getAnalysisIfAvailable() const
getAnalysisIfAvailable<AnalysisType>() - Subclasses use this function to get analysis information tha...
bool hasIndex(const MachineInstr &instr) const
Returns true if the given machine instr is mapped to an index, otherwise returns false.
std::vector< MachineBasicBlock * >::iterator succ_iterator
Reg
All possible values of the reg field in the ModR/M byte.
static void unbundleSingleMI(MachineInstr *MI)
Prepare MI to be removed from its bundle.
MachineInstr * remove_instr(MachineInstr *I)
Remove the possibly bundled instruction from the instruction list without deleting it...
PhysRegInfo analyzePhysReg(unsigned Reg, const TargetRegisterInfo *TRI)
analyzePhysReg - Analyze how the current instruction or bundle uses a physical register.
LLVM_NODISCARD bool empty() const
unsigned getNumOperands() const
Access to explicit operands of the instruction.
Context object for machine code objects.
bool isBundledWithSucc() const
Return true if this instruction is part of a bundle, and it is not the last instruction in the bundle...
void unbundleFromPred()
Break bundle above this instruction.
virtual unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const
Insert branch code into the end of the specified MachineBasicBlock.
iterator addSegment(Segment S)
Add the specified Segment to this range, merging segments as appropriate.
bool canFallThrough()
Return true if the block can implicitly transfer control to the block after it by falling off the end...
bool livein_empty() const
const uint32_t * getBeginClobberMask(const TargetRegisterInfo *TRI) const
Get the clobber mask for the start of this basic block.
iterator getLastNonDebugInstr()
Returns an iterator to the last non-debug instruction in the basic block, or end().
static GCRegistry::Add< OcamlGC > B("ocaml","ocaml 3.10-compatible GC")
void printAsOperand(raw_ostream &OS, bool PrintType=true) const
void setSuccProbability(succ_iterator I, BranchProbability Prob)
Set successor probability of a given iterator.
MCContext & getContext() const
Printable PrintReg(unsigned Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubRegIdx=0)
Prints virtual and physical registers with or without a TRI instance.
LivenessQueryResult computeRegisterLiveness(const TargetRegisterInfo *TRI, unsigned Reg, const_iterator Before, unsigned Neighborhood=10) const
Return whether (physical) register Reg has been <def>ined and not <kill>ed as of just before Before...
bool PartialDeadDef
Reg is Defined and all defs of reg or an overlapping register are dead.
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *bb=nullptr)
CreateMachineBasicBlock - Allocate a new MachineBasicBlock.
const TargetRegisterClass * constrainRegClass(unsigned Reg, const TargetRegisterClass *RC, unsigned MinNumRegs=0)
constrainRegClass - Constrain the register class of the specified virtual register to be a common sub...
void normalizeSuccProbs()
Normalize probabilities of all successors so that the sum of them becomes one.
const BasicBlock * getBasicBlock() const
Return the LLVM basic block that this instance corresponded to originally.
static GCRegistry::Add< CoreCLRGC > E("coreclr","CoreCLR-compatible GC")
SlotIndex getPrevSlot() const
Returns the previous slot in the index list.
const MachineBasicBlock * getParent() const
TargetInstrInfo - Interface to description of machine instruction set.
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
void addLiveIn(MCPhysReg PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
iterator SkipPHIsAndLabels(iterator I)
Return the first instruction in MBB after I that is not a PHI or a label.
livein_iterator livein_begin() const
unsigned const MachineRegisterInfo * MRI
void insertMBBInMaps(MachineBasicBlock *mbb)
Add the given MachineBasicBlock into the maps.
LLVM Basic Block Representation.
virtual unsigned removeBranch(MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const
Remove the branching code at the end of the specific MBB.
LLVM_ATTRIBUTE_ALWAYS_INLINE iterator begin()
livein_iterator livein_end() const
bool Read
Reg or one of its aliases is read.
const MachineOperand & getOperand(unsigned i) const
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
bool Clobbered
There is a regmask operand indicating Reg is clobbered.
void setMBB(MachineBasicBlock *MBB)
virtual bool reverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const
Reverses the branch condition of the specified condition list, returning false on success and true if...
Register is known to be fully dead.
void setFlag(MIFlag Flag)
Set a MI flag.
MCRegAliasIterator enumerates all registers aliasing Reg.
void clearFlag(MIFlag Flag)
clearFlag - Clear a MI flag.
void clearLiveIns()
Clear live in list.
bool isEHFuncletEntry() const
Returns true if this is the entry block of an EH funclet.
bool Killed
There is a use operand of reg or a super-register with kill flag set.
void remove(iterator MBBI)
self_iterator getIterator()
bool isBundledWithPred() const
Return true if this instruction is part of a bundle, and it is not the first instruction in the bundl...
std::pair< NoneType, bool > insert(const T &V)
insert - Insert an element into the set if it isn't already there.
iterator_range< pred_iterator > predecessors()
LivenessQueryResult
Possible outcome of a register liveness query to computeRegisterLiveness()
Register is known to be (at least partially) live.
succ_iterator succ_begin()
void moveBefore(MachineBasicBlock *NewAfter)
Move 'this' block before or after the specified block.
VarInfo & getVarInfo(unsigned RegIdx)
getVarInfo - Return the VarInfo structure for the specified VIRTUAL register.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
pred_iterator pred_begin()
bool liveAt(SlotIndex index) const
MCSymbol * getSymbol() const
Return the MCSymbol for this basic block.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
const MCInstrDesc & get(unsigned Opcode) const
Return the machine instruction descriptor that corresponds to the specified instruction opcode...
bool isReturnBlock() const
Convenience function that returns true if the block ends in a return instruction. ...
std::vector< MachineBasicBlock * >::const_iterator const_pred_iterator
DebugLoc findDebugLoc(instr_iterator MBBI)
Find the next valid DebugLoc starting at MBBI, skipping any DBG_VALUE instructions.
bool canSplitCriticalEdge(const MachineBasicBlock *Succ) const
Check if the edge between this block and the given successor Succ, can be split.
StringRef getPrivateLabelPrefix() const
size_type count(const T &V) const
count - Return 1 if the element is in the set, 0 otherwise.
void addNewBlock(MachineBasicBlock *BB, MachineBasicBlock *DomBB, MachineBasicBlock *SuccBB)
addNewBlock - Add a new basic block BB between DomBB and SuccBB.
std::string getFullName() const
Return a formatted string to identify this block and its parent function.
std::vector< MachineInstr * > Kills
Kills - List of MachineInstruction's which are the last use of this virtual register (kill it) in the...
void removeSegment(SlotIndex Start, SlotIndex End, bool RemoveDeadValNo=false)
Remove the specified segment from this range.
bool hasEHPadSuccessor() const
Iterator for intrusive lists based on ilist_node.
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements...
void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
static uint32_t getDenominator()
auto find(R &&Range, const T &Val) -> decltype(std::begin(Range))
Provide wrappers to std::find which take ranges instead of having to pass begin/end explicitly...
BasicBlockListType::const_iterator const_iterator
void splice(iterator InsertPt, iterator MBBI)
void removeNodeFromList(NodeTy *)
MachineOperand class - Representation of each machine instruction operand.
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small...
void updateTerminator()
Update the terminator instructions in block to account for changes to the layout. ...
bool isSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB is a successor of this block.
void validateSuccProbs() const
Validate successors' probabilities and check if the sum of them is approximate one.
bool FullyDefined
Reg or a super-register is defined.
static void deleteNode(NodeTy *V)
void sortUniqueLiveIns()
Sorts and uniques the LiveIns vector.
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
StringRef getName() const
Return the name of the corresponding LLVM basic block, or "(null)".
ConstMIOperands - Iterate over operands of a single const instruction.
void replaceSuccessor(MachineBasicBlock *Old, MachineBasicBlock *New)
Replace successor OLD with NEW and update probability info.
IterT skipDebugInstructionsForward(IterT It, IterT End)
Increment It until it points to a non-debug instruction or to End and return the resulting iterator...
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
Representation of each machine instruction.
pointer remove(iterator &IT)
static bool isPhysicalRegister(unsigned Reg)
Return true if the specified register number is in the physical register namespace.
bool hasAddressTaken() const
Test whether this block is potentially the target of an indirect branch.
LLVM_ATTRIBUTE_ALWAYS_INLINE iterator end()
iterator insert(iterator where, pointer New)
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
MCSymbol * getOrCreateSymbol(const Twine &Name)
Lookup the symbol inside with the specified Name.
Register liveness not decidable from local neighborhood.
virtual bool isPredicated(const MachineInstr &MI) const
Returns true if the instruction is already predicated.
APFloat abs(APFloat X)
Returns the absolute value of the argument.
Pair of physical register and lane mask.
const uint32_t * getEndClobberMask(const TargetRegisterInfo *TRI) const
Get the clobber mask for the end of the basic block.
const TargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
instr_iterator insert(instr_iterator I, MachineInstr *M)
Insert MI into the instruction list before I, possibly inside a bundle.
iterator getFirstNonPHI()
Returns a pointer to the first instruction in this block that is not a PHINode instruction.
Information about how a physical register Reg is used by a set of operands.
void removeFromMBBNumbering(unsigned N)
removeFromMBBNumbering - Remove the specific machine basic block from our tracker, this is only really to be used by the MachineBasicBlock implementation.
SlotIndex getMBBStartIdx(unsigned Num) const
Returns the first index in the given basic block number.
raw_ostream & operator<<(raw_ostream &OS, const APInt &I)
void removeSuccessor(MachineBasicBlock *Succ, bool NormalizeSuccProbs=false)
Remove successor from the successors list of this MachineBasicBlock.
bool isLiveIn(MCPhysReg Reg, LaneBitmask LaneMask=LaneBitmask::getAll()) const
Return true if the specified register is in the live in set.
unsigned getReg() const
getReg - Returns the register number.
bool Defined
Reg or one of its aliases is defined.
void erase(iterator MBBI)
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
void insert(iterator MBBI, MachineBasicBlock *MBB)
MachineBasicBlock * SplitCriticalEdge(MachineBasicBlock *Succ, Pass &P)
Split the critical edge from this block to the given successor block, and return the newly created bl...
void unbundleFromSucc()
Break bundle below this instruction.
std::vector< MachineBasicBlock * >::const_iterator const_succ_iterator
virtual const TargetInstrInfo * getInstrInfo() const
unsigned addToMBBNumbering(MachineBasicBlock *MBB)
Adds the MBB to the internal numbering.
Module * getParent()
Get the module that this global value is contained inside of...
mop_iterator operands_begin()
static LLVM_ATTRIBUTE_UNUSED Printable PrintLaneMask(LaneBitmask LaneMask)
Create Printable object to print LaneBitmasks on a raw_ostream.
LiveInVector::const_iterator livein_iterator
MachineInstrBundleIterator< const MachineInstr > const_iterator
This class implements an extremely fast bulk output stream that can only output to a stream...
static bool isLiveOut(const MachineBasicBlock &MBB, unsigned Reg)
iterator SkipPHIsLabelsAndDebug(iterator I)
Return the first instruction in MBB after I that is not a PHI, label or debug.
bool isPredecessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB is a predecessor of this block.
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
StringRef - Represent a constant reference to a string, i.e.
static BranchProbability getZero()
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
auto find_if(R &&Range, UnaryPredicate P) -> decltype(std::begin(Range))
Provide wrappers to std::find_if which take ranges instead of having to pass begin/end explicitly...
bool isLayoutSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB will be emitted immediately after this block, such that if this bloc...
SlotIndex - An opaque wrapper around machine indexes.
bool requiresStructuredCFG() const
DominatorTree Class - Concrete subclass of DominatorTreeBase that is used to compute a normal dominat...
bool isBarrier(QueryType Type=AnyInBundle) const
Returns true if the specified instruction stops control flow from executing the instruction immediate...
bool CorrectExtraCFGEdges(MachineBasicBlock *DestA, MachineBasicBlock *DestB, bool IsCond)
Various pieces of code can cause excess edges in the CFG to be inserted.
void transferNodesFromList(ilist_callback_traits &OldList, Iterator, Iterator)
Callback before transferring nodes to this list.
bool is_contained(R &&Range, const E &Element)
Wrapper function around std::find to detect if an element exists in a container.