LLVM  4.0.0
llvm::TargetLoweringBase Member List

This is the complete list of members for llvm::TargetLoweringBase, including all inherited members.

addBypassSlowDiv(unsigned int SlowBitWidth, unsigned int FastBitWidth)llvm::TargetLoweringBaseinlineprotected
AddPromotedToType(unsigned Opc, MVT OrigVT, MVT DestVT)llvm::TargetLoweringBaseinlineprotected
addRegisterClass(MVT VT, const TargetRegisterClass *RC)llvm::TargetLoweringBaseinlineprotected
aggressivelyPreferBuildVectorSources(EVT VecVT) const llvm::TargetLoweringBaseinlinevirtual
allowsMemoryAccess(LLVMContext &Context, const DataLayout &DL, EVT VT, unsigned AddrSpace=0, unsigned Alignment=1, bool *Fast=nullptr) const llvm::TargetLoweringBase
allowsMisalignedMemoryAccesses(EVT, unsigned AddrSpace=0, unsigned Align=1, bool *=nullptr) const llvm::TargetLoweringBaseinlinevirtual
allowTruncateForTailCall(Type *FromTy, Type *ToTy) const llvm::TargetLoweringBaseinlinevirtual
AtomicExpansionKind enum namellvm::TargetLoweringBase
BooleanContent enum namellvm::TargetLoweringBase
canCombineStoreAndExtract(Type *VectorTy, Value *Idx, unsigned &Cost) const llvm::TargetLoweringBaseinlinevirtual
canOpTrap(unsigned Op, EVT VT) const llvm::TargetLoweringBasevirtual
computeRegisterProperties(const TargetRegisterInfo *TRI)llvm::TargetLoweringBaseprotected
Custom enum valuellvm::TargetLoweringBase
Disabled enum valuellvm::TargetLoweringBase
emitAtomicCmpXchgNoStoreLLBalance(IRBuilder<> &Builder) const llvm::TargetLoweringBaseinlinevirtual
emitLeadingFence(IRBuilder<> &Builder, AtomicOrdering Ord, bool IsStore, bool IsLoad) const llvm::TargetLoweringBaseinlinevirtual
emitLoadLinked(IRBuilder<> &Builder, Value *Addr, AtomicOrdering Ord) const llvm::TargetLoweringBaseinlinevirtual
emitPatchPoint(MachineInstr &MI, MachineBasicBlock *MBB) const llvm::TargetLoweringBaseprotected
emitStoreConditional(IRBuilder<> &Builder, Value *Val, Value *Addr, AtomicOrdering Ord) const llvm::TargetLoweringBaseinlinevirtual
emitTrailingFence(IRBuilder<> &Builder, AtomicOrdering Ord, bool IsStore, bool IsLoad) const llvm::TargetLoweringBaseinlinevirtual
enableAggressiveFMAFusion(EVT VT) const llvm::TargetLoweringBaseinlinevirtual
Enabled enum valuellvm::TargetLoweringBase
enableExtLdPromotion() const llvm::TargetLoweringBaseinline
EnableExtLdPromotionllvm::TargetLoweringBaseprotected
Expand enum valuellvm::TargetLoweringBase
findRepresentativeClass(const TargetRegisterInfo *TRI, MVT VT) const llvm::TargetLoweringBaseprotectedvirtual
GatherAllAliasesMaxDepthllvm::TargetLoweringBaseprotected
GetAddrModeArguments(IntrinsicInst *, SmallVectorImpl< Value * > &, Type *&, unsigned AddrSpace=0) const llvm::TargetLoweringBaseinlinevirtual
getBooleanContents(bool isVec, bool isFloat) const llvm::TargetLoweringBaseinline
getBooleanContents(EVT Type) const llvm::TargetLoweringBaseinline
getBypassSlowDivWidths() const llvm::TargetLoweringBaseinline
getByValTypeAlignment(Type *Ty, const DataLayout &DL) const llvm::TargetLoweringBasevirtual
getCmpLibcallCC(RTLIB::Libcall Call) const llvm::TargetLoweringBaseinline
getCmpLibcallReturnType() const llvm::TargetLoweringBasevirtual
getCondCodeAction(ISD::CondCode CC, MVT VT) const llvm::TargetLoweringBaseinline
getDefaultSafeStackPointerLocation(IRBuilder<> &IRB, bool UseTLS) const llvm::TargetLoweringBaseprotected
getDivRefinementSteps(EVT VT, MachineFunction &MF) const llvm::TargetLoweringBase
getExceptionPointerRegister(const Constant *PersonalityFn) const llvm::TargetLoweringBaseinlinevirtual
getExceptionSelectorRegister(const Constant *PersonalityFn) const llvm::TargetLoweringBaseinlinevirtual
getExtendForAtomicOps() const llvm::TargetLoweringBaseinlinevirtual
getExtendForContent(BooleanContent Content)llvm::TargetLoweringBaseinlinestatic
getGatherAllAliasesMaxDepth() const llvm::TargetLoweringBaseinline
getIndexedLoadAction(unsigned IdxMode, MVT VT) const llvm::TargetLoweringBaseinline
getIndexedStoreAction(unsigned IdxMode, MVT VT) const llvm::TargetLoweringBaseinline
getIRStackGuard(IRBuilder<> &IRB) const llvm::TargetLoweringBasevirtual
getJumpBufAlignment() const llvm::TargetLoweringBaseinline
getJumpBufSize() const llvm::TargetLoweringBaseinline
getLibcallCallingConv(RTLIB::Libcall Call) const llvm::TargetLoweringBaseinline
getLibcallName(RTLIB::Libcall Call) const llvm::TargetLoweringBaseinline
getLoadExtAction(unsigned ExtType, EVT ValVT, EVT MemVT) const llvm::TargetLoweringBaseinline
getMaxAtomicSizeInBitsSupported() const llvm::TargetLoweringBaseinline
getMaximumJumpTableSize() const llvm::TargetLoweringBase
getMaxStoresPerMemcpy(bool OptSize) const llvm::TargetLoweringBaseinline
getMaxStoresPerMemmove(bool OptSize) const llvm::TargetLoweringBaseinline
getMaxStoresPerMemset(bool OptSize) const llvm::TargetLoweringBaseinline
getMaxSupportedInterleaveFactor() const llvm::TargetLoweringBaseinlinevirtual
getMinCmpXchgSizeInBits() const llvm::TargetLoweringBaseinline
getMinFunctionAlignment() const llvm::TargetLoweringBaseinline
getMinimumJumpTableEntries() const llvm::TargetLoweringBase
getMinStackArgumentAlignment() const llvm::TargetLoweringBaseinline
getNumRegisters(LLVMContext &Context, EVT VT) const llvm::TargetLoweringBaseinline
getOperationAction(unsigned Op, EVT VT) const llvm::TargetLoweringBaseinline
getOptimalMemOpType(uint64_t, unsigned, unsigned, bool, bool, bool, MachineFunction &) const llvm::TargetLoweringBaseinlinevirtual
getPointerTy(const DataLayout &DL, uint32_t AS=0) const llvm::TargetLoweringBaseinline
getPredictableBranchThreshold() const llvm::TargetLoweringBasevirtual
getPreferredVectorAction(EVT VT) const llvm::TargetLoweringBaseinlinevirtual
getPrefFunctionAlignment() const llvm::TargetLoweringBaseinline
getPrefLoopAlignment(MachineLoop *ML=nullptr) const llvm::TargetLoweringBaseinlinevirtual
getRecipEstimateDivEnabled(EVT VT, MachineFunction &MF) const llvm::TargetLoweringBase
getRecipEstimateSqrtEnabled(EVT VT, MachineFunction &MF) const llvm::TargetLoweringBase
getRegClassFor(MVT VT) const llvm::TargetLoweringBaseinlinevirtual
getRegisterType(MVT VT) const llvm::TargetLoweringBaseinline
getRegisterType(LLVMContext &Context, EVT VT) const llvm::TargetLoweringBaseinline
getRepRegClassCostFor(MVT VT) const llvm::TargetLoweringBaseinlinevirtual
getRepRegClassFor(MVT VT) const llvm::TargetLoweringBaseinlinevirtual
getSafeStackPointerLocation(IRBuilder<> &IRB) const llvm::TargetLoweringBasevirtual
getScalarShiftAmountTy(const DataLayout &, EVT) const llvm::TargetLoweringBasevirtual
getScalingFactorCost(const DataLayout &DL, const AddrMode &AM, Type *Ty, unsigned AS=0) const llvm::TargetLoweringBaseinlinevirtual
getSchedulingPreference() const llvm::TargetLoweringBaseinline
getSchedulingPreference(SDNode *) const llvm::TargetLoweringBaseinlinevirtual
getSDagStackGuard(const Module &M) const llvm::TargetLoweringBasevirtual
getSetCCResultType(const DataLayout &DL, LLVMContext &Context, EVT VT) const llvm::TargetLoweringBasevirtual
getShiftAmountTy(EVT LHSTy, const DataLayout &DL) const llvm::TargetLoweringBase
getSimpleValueType(const DataLayout &DL, Type *Ty, bool AllowUnknown=false) const llvm::TargetLoweringBaseinline
getSqrtRefinementSteps(EVT VT, MachineFunction &MF) const llvm::TargetLoweringBase
getSSPStackGuardCheck(const Module &M) const llvm::TargetLoweringBasevirtual
getStackPointerRegisterToSaveRestore() const llvm::TargetLoweringBaseinline
getTargetMachine() const llvm::TargetLoweringBaseinline
getTgtMemIntrinsic(IntrinsicInfo &, const CallInst &, unsigned) const llvm::TargetLoweringBaseinlinevirtual
getTruncStoreAction(EVT ValVT, EVT MemVT) const llvm::TargetLoweringBaseinline
getTypeAction(LLVMContext &Context, EVT VT) const llvm::TargetLoweringBaseinline
getTypeAction(MVT VT) const llvm::TargetLoweringBaseinline
getTypeLegalizationCost(const DataLayout &DL, Type *Ty) const llvm::TargetLoweringBase
getTypeToExpandTo(LLVMContext &Context, EVT VT) const llvm::TargetLoweringBaseinline
getTypeToPromoteTo(unsigned Op, MVT VT) const llvm::TargetLoweringBaseinline
getTypeToTransformTo(LLVMContext &Context, EVT VT) const llvm::TargetLoweringBaseinline
getValueType(const DataLayout &DL, Type *Ty, bool AllowUnknown=false) const llvm::TargetLoweringBaseinline
getValueTypeActions() const llvm::TargetLoweringBaseinline
getVectorIdxTy(const DataLayout &DL) const llvm::TargetLoweringBaseinlinevirtual
getVectorTypeBreakdown(LLVMContext &Context, EVT VT, EVT &IntermediateVT, unsigned &NumIntermediates, MVT &RegisterVT) const llvm::TargetLoweringBase
hasAndNot(SDValue X) const llvm::TargetLoweringBaseinlinevirtual
hasAndNotCompare(SDValue Y) const llvm::TargetLoweringBaseinlinevirtual
hasBigEndianPartOrdering(EVT VT, const DataLayout &DL) const llvm::TargetLoweringBaseinline
hasBitPreservingFPLogic(EVT VT) const llvm::TargetLoweringBaseinlinevirtual
hasExtractBitsInsn() const llvm::TargetLoweringBaseinline
hasFloatingPointExceptions() const llvm::TargetLoweringBaseinline
hasMultipleConditionRegisters() const llvm::TargetLoweringBaseinline
hasPairedLoad(EVT, unsigned &) const llvm::TargetLoweringBaseinlinevirtual
hasStandaloneRem(EVT VT) const llvm::TargetLoweringBaseinlinevirtual
hasTargetDAGCombine(ISD::NodeType NT) const llvm::TargetLoweringBaseinline
initActions()llvm::TargetLoweringBaseprotected
insertSSPDeclarations(Module &M) const llvm::TargetLoweringBasevirtual
InstructionOpcodeToISD(unsigned Opcode) const llvm::TargetLoweringBase
isCheapAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const llvm::TargetLoweringBaseinlinevirtual
isCheapToSpeculateCtlz() const llvm::TargetLoweringBaseinlinevirtual
isCheapToSpeculateCttz() const llvm::TargetLoweringBaseinlinevirtual
isCondCodeLegal(ISD::CondCode CC, MVT VT) const llvm::TargetLoweringBaseinline
isCtlzFast() const llvm::TargetLoweringBaseinlinevirtual
isExtFree(const Instruction *I) const llvm::TargetLoweringBaseinline
isExtFreeImpl(const Instruction *I) const llvm::TargetLoweringBaseinlineprotectedvirtual
isExtractSubvectorCheap(EVT ResVT, unsigned Index) const llvm::TargetLoweringBaseinlinevirtual
isFAbsFree(EVT VT) const llvm::TargetLoweringBaseinlinevirtual
isFMAFasterThanFMulAndFAdd(EVT) const llvm::TargetLoweringBaseinlinevirtual
isFNegFree(EVT VT) const llvm::TargetLoweringBaseinlinevirtual
isFoldableMemAccessOffset(Instruction *I, int64_t Offset) const llvm::TargetLoweringBaseinlinevirtual
isFPExtFree(EVT VT) const llvm::TargetLoweringBaseinlinevirtual
isFPImmLegal(const APFloat &, EVT) const llvm::TargetLoweringBaseinlinevirtual
isFsqrtCheap(SDValue X, SelectionDAG &DAG) const llvm::TargetLoweringBaseinlinevirtual
isIndexedLoadLegal(unsigned IdxMode, EVT VT) const llvm::TargetLoweringBaseinline
isIndexedStoreLegal(unsigned IdxMode, EVT VT) const llvm::TargetLoweringBaseinline
isIntDivCheap(EVT VT, AttributeSet Attr) const llvm::TargetLoweringBaseinlinevirtual
isJumpExpensive() const llvm::TargetLoweringBaseinline
isJumpTableRelative() const llvm::TargetLoweringBaseinlinevirtual
isLegalAddImmediate(int64_t) const llvm::TargetLoweringBaseinlinevirtual
isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty, unsigned AddrSpace) const llvm::TargetLoweringBasevirtual
isLegalICmpImmediate(int64_t) const llvm::TargetLoweringBaseinlinevirtual
isLegalRC(const TargetRegisterClass *RC) const llvm::TargetLoweringBaseprotected
isLoadBitCastBeneficial(EVT LoadVT, EVT BitcastVT) const llvm::TargetLoweringBaseinlinevirtual
isLoadExtLegal(unsigned ExtType, EVT ValVT, EVT MemVT) const llvm::TargetLoweringBaseinline
isLoadExtLegalOrCustom(unsigned ExtType, EVT ValVT, EVT MemVT) const llvm::TargetLoweringBaseinline
isMaskAndBranchFoldingLegal() const llvm::TargetLoweringBaseinline
isMultiStoresCheaperThanBitsMerge(EVT LTy, EVT HTy) const llvm::TargetLoweringBaseinlinevirtual
isNarrowingProfitable(EVT, EVT) const llvm::TargetLoweringBaseinlinevirtual
isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const llvm::TargetLoweringBaseinlinevirtual
isOperationCustom(unsigned Op, EVT VT) const llvm::TargetLoweringBaseinline
isOperationExpand(unsigned Op, EVT VT) const llvm::TargetLoweringBaseinline
isOperationLegal(unsigned Op, EVT VT) const llvm::TargetLoweringBaseinline
isOperationLegalOrCustom(unsigned Op, EVT VT) const llvm::TargetLoweringBaseinline
isOperationLegalOrCustomOrPromote(unsigned Op, EVT VT) const llvm::TargetLoweringBaseinline
isOperationLegalOrPromote(unsigned Op, EVT VT) const llvm::TargetLoweringBaseinline
isPredictableSelectExpensive() const llvm::TargetLoweringBaseinline
isProfitableToHoist(Instruction *I) const llvm::TargetLoweringBaseinlinevirtual
isSafeMemOpType(MVT) const llvm::TargetLoweringBaseinlinevirtual
isSelectSupported(SelectSupportKind) const llvm::TargetLoweringBaseinlinevirtual
isShuffleMaskLegal(const SmallVectorImpl< int > &, EVT) const llvm::TargetLoweringBaseinlinevirtual
isSlowDivBypassed() const llvm::TargetLoweringBaseinline
isStoreBitCastBeneficial(EVT StoreVT, EVT BitcastVT) const llvm::TargetLoweringBaseinlinevirtual
isTruncateFree(Type *FromTy, Type *ToTy) const llvm::TargetLoweringBaseinlinevirtual
isTruncateFree(EVT FromVT, EVT ToVT) const llvm::TargetLoweringBaseinlinevirtual
isTruncStoreLegal(EVT ValVT, EVT MemVT) const llvm::TargetLoweringBaseinline
isTruncStoreLegalOrCustom(EVT ValVT, EVT MemVT) const llvm::TargetLoweringBaseinline
isTypeLegal(EVT VT) const llvm::TargetLoweringBaseinline
isVectorClearMaskLegal(const SmallVectorImpl< int > &, EVT) const llvm::TargetLoweringBaseinlinevirtual
isVectorLoadExtDesirable(SDValue ExtVal) const llvm::TargetLoweringBaseinlinevirtual
isVectorShiftByScalarCheap(Type *Ty) const llvm::TargetLoweringBaseinlinevirtual
isZExtFree(Type *FromTy, Type *ToTy) const llvm::TargetLoweringBaseinlinevirtual
isZExtFree(EVT FromTy, EVT ToTy) const llvm::TargetLoweringBaseinlinevirtual
isZExtFree(SDValue Val, EVT VT2) const llvm::TargetLoweringBaseinlinevirtual
Legal enum valuellvm::TargetLoweringBase
LegalizeAction enum namellvm::TargetLoweringBase
LegalizeKind typedefllvm::TargetLoweringBase
LegalizeTypeAction enum namellvm::TargetLoweringBase
LibCall enum valuellvm::TargetLoweringBase
lowerIdempotentRMWIntoFencedLoad(AtomicRMWInst *RMWI) const llvm::TargetLoweringBaseinlinevirtual
lowerInterleavedLoad(LoadInst *LI, ArrayRef< ShuffleVectorInst * > Shuffles, ArrayRef< unsigned > Indices, unsigned Factor) const llvm::TargetLoweringBaseinlinevirtual
lowerInterleavedStore(StoreInst *SI, ShuffleVectorInst *SVI, unsigned Factor) const llvm::TargetLoweringBaseinlinevirtual
MaskAndBranchFoldingIsLegalllvm::TargetLoweringBaseprotected
MaxStoresPerMemcpyllvm::TargetLoweringBaseprotected
MaxStoresPerMemcpyOptSizellvm::TargetLoweringBaseprotected
MaxStoresPerMemmovellvm::TargetLoweringBaseprotected
MaxStoresPerMemmoveOptSizellvm::TargetLoweringBaseprotected
MaxStoresPerMemsetllvm::TargetLoweringBaseprotected
MaxStoresPerMemsetOptSizellvm::TargetLoweringBaseprotected
MulExpansionKind enum namellvm::TargetLoweringBase
needsFixedCatchObjects() const llvm::TargetLoweringBaseinlinevirtual
operator=(const TargetLoweringBase &)=deletellvm::TargetLoweringBase
PredictableSelectIsExpensivellvm::TargetLoweringBaseprotected
Promote enum valuellvm::TargetLoweringBase
ReciprocalEstimate enum namellvm::TargetLoweringBase
ScalarCondVectorVal enum valuellvm::TargetLoweringBase
ScalarValSelect enum valuellvm::TargetLoweringBase
SelectSupportKind enum namellvm::TargetLoweringBase
setBooleanContents(BooleanContent Ty)llvm::TargetLoweringBaseinlineprotected
setBooleanContents(BooleanContent IntTy, BooleanContent FloatTy)llvm::TargetLoweringBaseinlineprotected
setBooleanVectorContents(BooleanContent Ty)llvm::TargetLoweringBaseinlineprotected
setCmpLibcallCC(RTLIB::Libcall Call, ISD::CondCode CC)llvm::TargetLoweringBaseinline
setCondCodeAction(ISD::CondCode CC, MVT VT, LegalizeAction Action)llvm::TargetLoweringBaseinlineprotected
setHasExtractBitsInsn(bool hasExtractInsn=true)llvm::TargetLoweringBaseinlineprotected
setHasFloatingPointExceptions(bool FPExceptions=true)llvm::TargetLoweringBaseinlineprotected
setHasMultipleConditionRegisters(bool hasManyRegs=true)llvm::TargetLoweringBaseinlineprotected
setIndexedLoadAction(unsigned IdxMode, MVT VT, LegalizeAction Action)llvm::TargetLoweringBaseinlineprotected
setIndexedStoreAction(unsigned IdxMode, MVT VT, LegalizeAction Action)llvm::TargetLoweringBaseinlineprotected
setJumpBufAlignment(unsigned Align)llvm::TargetLoweringBaseinlineprotected
setJumpBufSize(unsigned Size)llvm::TargetLoweringBaseinlineprotected
setJumpIsExpensive(bool isExpensive=true)llvm::TargetLoweringBaseprotected
setLibcallCallingConv(RTLIB::Libcall Call, CallingConv::ID CC)llvm::TargetLoweringBaseinline
setLibcallName(RTLIB::Libcall Call, const char *Name)llvm::TargetLoweringBaseinline
setLoadExtAction(unsigned ExtType, MVT ValVT, MVT MemVT, LegalizeAction Action)llvm::TargetLoweringBaseinlineprotected
setMaxAtomicSizeInBitsSupported(unsigned SizeInBits)llvm::TargetLoweringBaseinlineprotected
setMaximumJumpTableSize(unsigned)llvm::TargetLoweringBaseprotected
setMinCmpXchgSizeInBits(unsigned SizeInBits)llvm::TargetLoweringBaseinlineprotected
setMinFunctionAlignment(unsigned Align)llvm::TargetLoweringBaseinlineprotected
setMinimumJumpTableEntries(unsigned Val)llvm::TargetLoweringBaseprotected
setMinStackArgumentAlignment(unsigned Align)llvm::TargetLoweringBaseinlineprotected
setOperationAction(unsigned Op, MVT VT, LegalizeAction Action)llvm::TargetLoweringBaseinlineprotected
setOperationPromotedToType(unsigned Opc, MVT OrigVT, MVT DestVT)llvm::TargetLoweringBaseinlineprotected
setPrefFunctionAlignment(unsigned Align)llvm::TargetLoweringBaseinlineprotected
setPrefLoopAlignment(unsigned Align)llvm::TargetLoweringBaseinlineprotected
setSchedulingPreference(Sched::Preference Pref)llvm::TargetLoweringBaseinlineprotected
setStackPointerRegisterToSaveRestore(unsigned R)llvm::TargetLoweringBaseinlineprotected
setTargetDAGCombine(ISD::NodeType NT)llvm::TargetLoweringBaseinlineprotected
setTruncStoreAction(MVT ValVT, MVT MemVT, LegalizeAction Action)llvm::TargetLoweringBaseinlineprotected
setUseUnderscoreLongJmp(bool Val)llvm::TargetLoweringBaseinlineprotected
setUseUnderscoreSetJmp(bool Val)llvm::TargetLoweringBaseinlineprotected
shouldAlignPointerArgs(CallInst *, unsigned &, unsigned &) const llvm::TargetLoweringBaseinlinevirtual
shouldConvertConstantLoadToIntImm(const APInt &Imm, Type *Ty) const llvm::TargetLoweringBaseinlinevirtual
shouldExpandAtomicCmpXchgInIR(AtomicCmpXchgInst *AI) const llvm::TargetLoweringBaseinlinevirtual
shouldExpandAtomicLoadInIR(LoadInst *LI) const llvm::TargetLoweringBaseinlinevirtual
shouldExpandAtomicRMWInIR(AtomicRMWInst *) const llvm::TargetLoweringBaseinlinevirtual
shouldExpandAtomicStoreInIR(StoreInst *SI) const llvm::TargetLoweringBaseinlinevirtual
shouldExpandBuildVectorWithShuffles(EVT, unsigned DefinedValues) const llvm::TargetLoweringBaseinlinevirtual
shouldInsertFencesForAtomic(const Instruction *I) const llvm::TargetLoweringBaseinlinevirtual
shouldNormalizeToSelectSequence(LLVMContext &Context, EVT VT) const llvm::TargetLoweringBaseinlinevirtual
shouldReduceLoadWidth(SDNode *Load, ISD::LoadExtType ExtTy, EVT NewVT) const llvm::TargetLoweringBaseinlinevirtual
ShouldShrinkFPConstant(EVT) const llvm::TargetLoweringBaseinlinevirtual
shouldSignExtendTypeInLibCall(EVT Type, bool IsSigned) const llvm::TargetLoweringBaseinlinevirtual
storeOfVectorConstantIsCheap(EVT MemVT, unsigned NumElem, unsigned AddrSpace) const llvm::TargetLoweringBaseinlinevirtual
TargetLoweringBase(const TargetMachine &TM)llvm::TargetLoweringBaseexplicit
TargetLoweringBase(const TargetLoweringBase &)=deletellvm::TargetLoweringBase
TypeExpandFloat enum valuellvm::TargetLoweringBase
TypeExpandInteger enum valuellvm::TargetLoweringBase
TypeLegal enum valuellvm::TargetLoweringBase
TypePromoteFloat enum valuellvm::TargetLoweringBase
TypePromoteInteger enum valuellvm::TargetLoweringBase
TypeScalarizeVector enum valuellvm::TargetLoweringBase
TypeSoftenFloat enum valuellvm::TargetLoweringBase
TypeSplitVector enum valuellvm::TargetLoweringBase
TypeWidenVector enum valuellvm::TargetLoweringBase
UndefinedBooleanContent enum valuellvm::TargetLoweringBase
Unspecified enum valuellvm::TargetLoweringBase
useSoftFloat() const llvm::TargetLoweringBaseinlinevirtual
usesUnderscoreLongJmp() const llvm::TargetLoweringBaseinline
usesUnderscoreSetJmp() const llvm::TargetLoweringBaseinline
ValueTypeActionsllvm::TargetLoweringBaseprotected
VectorMaskSelect enum valuellvm::TargetLoweringBase
ZeroOrNegativeOneBooleanContent enum valuellvm::TargetLoweringBase
ZeroOrOneBooleanContent enum valuellvm::TargetLoweringBase
~TargetLoweringBase()=defaultllvm::TargetLoweringBasevirtual