14 #ifndef LLVM_LIB_TARGET_LANAI_LANAIINSTRINFO_H
15 #define LLVM_LIB_TARGET_LANAI_LANAIINSTRINFO_H
20 #define GET_INSTRINFO_HEADER
21 #include "LanaiGenInstrInfo.inc"
51 const DebugLoc &DL,
unsigned DestinationRegister,
52 unsigned SourceRegister,
bool KillSource)
const override;
57 unsigned SourceRegister,
bool IsKill,
int FrameIndex,
75 int64_t &
Offset,
unsigned &Width,
78 std::pair<unsigned, unsigned>
87 bool AllowModify)
const override;
90 int *BytesRemoved =
nullptr)
const override;
96 unsigned &SrcReg2,
int &CmpMask,
97 int &CmpValue)
const override;
103 unsigned SrcReg2,
int CmpMask,
int CmpValue,
118 unsigned &FalseOp,
bool &Optimizable)
const override;
131 bool PreferFalse)
const override;
140 int *BytesAdded =
nullptr)
const override;
186 #endif // LLVM_LIB_TARGET_LANAI_LANAIINSTRINFO_H
void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator Position, unsigned SourceRegister, bool IsKill, int FrameIndex, const TargetRegisterClass *RegisterClass, const TargetRegisterInfo *RegisterInfo) const override
static bool isRRMOpcode(unsigned Opcode)
bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TrueBlock, MachineBasicBlock *&FalseBlock, SmallVectorImpl< MachineOperand > &Condition, bool AllowModify) const override
bool getMemOpBaseRegImmOfsWidth(MachineInstr &LdSt, unsigned &BaseReg, int64_t &Offset, unsigned &Width, const TargetRegisterInfo *TRI) const
unsigned removeBranch(MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const override
unsigned isStoreToStackSlot(const MachineInstr &MI, int &FrameIndex) const override
A templated base class for SmallPtrSet which provides the typesafe interface that is common across al...
bool getMemOpBaseRegImmOfs(MachineInstr &LdSt, unsigned &BaseReg, int64_t &Offset, const TargetRegisterInfo *TRI) const override
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
bool expandPostRAPseudo(MachineInstr &MI) const override
unsigned isLoadFromStackSlot(const MachineInstr &MI, int &FrameIndex) const override
bool reverseBranchCondition(SmallVectorImpl< MachineOperand > &Condition) const override
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory)...
MachineInstr * optimizeSelect(MachineInstr &MI, SmallPtrSetImpl< MachineInstr * > &SeenMIs, bool PreferFalse) const override
virtual const LanaiRegisterInfo & getRegisterInfo() const
unsigned const MachineRegisterInfo * MRI
bool analyzeSelect(const MachineInstr &MI, SmallVectorImpl< MachineOperand > &Cond, unsigned &TrueOp, unsigned &FalseOp, bool &Optimizable) const override
ArrayRef< std::pair< unsigned, const char * > > getSerializableDirectMachineOperandTargetFlags() const override
std::pair< unsigned, unsigned > decomposeMachineOperandsTargetFlags(unsigned TF) const override
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator Position, unsigned DestinationRegister, int FrameIndex, const TargetRegisterClass *RegisterClass, const TargetRegisterInfo *RegisterInfo) const override
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TrueBlock, MachineBasicBlock *FalseBlock, ArrayRef< MachineOperand > Condition, const DebugLoc &DL, int *BytesAdded=nullptr) const override
unsigned isLoadFromStackSlotPostFE(const MachineInstr &MI, int &FrameIndex) const override
bool optimizeCompareInstr(MachineInstr &CmpInstr, unsigned SrcReg, unsigned SrcReg2, int CmpMask, int CmpValue, const MachineRegisterInfo *MRI) const override
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
Representation of each machine instruction.
static bool isRMOpcode(unsigned Opcode)
bool areMemAccessesTriviallyDisjoint(MachineInstr &MIa, MachineInstr &MIb, AliasAnalysis *AA) const override
bool analyzeCompare(const MachineInstr &MI, unsigned &SrcReg, unsigned &SrcReg2, int &CmpMask, int &CmpValue) const override
void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator Position, const DebugLoc &DL, unsigned DestinationRegister, unsigned SourceRegister, bool KillSource) const override
static bool isSPLSOpcode(unsigned Opcode)