29 #define DEBUG_TYPE "x86-pseudo"
58 return "X86 pseudo instruction expansion pass";
82 case X86::TCRETURNdi64:
83 case X86::TCRETURNri64:
84 case X86::TCRETURNmi64: {
85 bool isMem = Opcode == X86::TCRETURNmi || Opcode == X86::TCRETURNmi64;
88 assert(StackAdjust.
isImm() &&
"Expecting immediate value.");
91 int StackAdj = StackAdjust.
getImm();
92 int MaxTCDelta = X86FI->getTCReturnAddrDelta();
94 assert(MaxTCDelta <= 0 &&
"MaxTCDelta should never be positive");
97 Offset = StackAdj - MaxTCDelta;
98 assert(Offset >= 0 &&
"Offset should never be negative");
102 Offset += X86FL->mergeSPUpdates(MBB, MBBI,
true);
103 X86FL->emitSPUpdate(MBB, MBBI, Offset,
true);
107 bool IsWin64 = STI->isTargetWin64();
108 if (Opcode == X86::TCRETURNdi || Opcode == X86::TCRETURNdi64) {
111 case X86::TCRETURNdi:
117 Op = X86::TAILJMPd64;
129 }
else if (Opcode == X86::TCRETURNmi || Opcode == X86::TCRETURNmi64) {
130 unsigned Op = (Opcode == X86::TCRETURNmi)
132 : (IsWin64 ? X86::TAILJMPm64_REX : X86::TAILJMPm64);
134 for (
unsigned i = 0;
i != 5; ++
i)
136 }
else if (Opcode == X86::TCRETURNri64) {
138 TII->get(IsWin64 ? X86::TAILJMPr64_REX : X86::TAILJMPr64))
141 BuildMI(MBB, MBBI, DL,
TII->get(X86::TAILJMPr))
154 case X86::EH_RETURN64: {
156 assert(DestAddr.
isReg() &&
"Offset should be in register!");
157 const bool Uses64BitFramePtr =
158 STI->isTarget64BitLP64() || STI->isTargetNaCl64();
159 unsigned StackPtr = TRI->getStackRegister();
161 TII->get(Uses64BitFramePtr ? X86::MOV64rr : X86::MOV32rr), StackPtr)
162 .addReg(DestAddr.
getReg());
168 int64_t StackAdj = MBBI->getOperand(0).getImm();
169 X86FL->emitSPUpdate(MBB, MBBI, StackAdj,
true);
172 TII->get(STI->is64Bit() ? X86::IRET64 : X86::IRET32));
178 int64_t StackAdj = MBBI->getOperand(0).getImm();
182 TII->get(STI->is64Bit() ? X86::RETQ : X86::RETL));
185 TII->get(STI->is64Bit() ? X86::RETIQ : X86::RETIL))
189 "shouldn't need to do this for x86_64 targets!");
193 X86FL->emitSPUpdate(MBB, MBBI, StackAdj,
true);
194 BuildMI(MBB, MBBI, DL,
TII->get(X86::PUSH32r)).addReg(X86::ECX);
195 MIB =
BuildMI(MBB, MBBI, DL,
TII->get(X86::RETL));
197 for (
unsigned I = 1,
E = MBBI->getNumOperands();
I !=
E; ++
I)
202 case X86::EH_RESTORE: {
206 X86FL->restoreWin32EHStackPointers(MBB, MBBI, DL, IsSEH);
207 MBBI->eraseFromParent();
210 case X86::LCMPXCHG8B_SAVE_EBX:
211 case X86::LCMPXCHG16B_SAVE_RBX: {
219 unsigned SaveRbx = MBBI->getOperand(7).getReg();
221 unsigned ActualInArg =
222 Opcode == X86::LCMPXCHG8B_SAVE_EBX ? X86::EBX : X86::RBX;
229 Opcode == X86::LCMPXCHG8B_SAVE_EBX ? X86::LCMPXCHG8B : X86::LCMPXCHG16B;
232 for (
unsigned Idx = 1; Idx < 6; ++Idx)
239 MBBI->eraseFromParent();
249 bool Modified =
false;
255 Modified |= ExpandMI(MBB, MBBI);
264 TII = STI->getInstrInfo();
267 X86FL = STI->getFrameLowering();
269 bool Modified =
false;
271 Modified |= ExpandMBB(MBB);
277 return new X86ExpandPseudo();
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
const GlobalValue * getGlobal() const
char & MachineDominatorsID
MachineDominators - This pass is a machine dominators analysis pass.
const char * getSymbolName() const
const Function * getFunction() const
getFunction - Return the LLVM function that this machine code represents
X86MachineFunctionInfo - This class is derived from MachineFunction and contains private X86 target-s...
char & MachineLoopInfoID
MachineLoopInfo - This pass is a loop analysis pass.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
const HexagonInstrInfo * TII
bool isImm() const
isImm - Tests if this is a MO_Immediate operand.
bool isReg() const
isReg - Tests if this is a MO_Register operand.
Constant * getPersonalityFn() const
Get the personality function associated with this function.
static bool isMem(const MachineInstr &MI, unsigned Op)
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
bool isGlobal() const
isGlobal - Tests if this is a MO_GlobalAddress operand.
const HexagonRegisterInfo & getRegisterInfo() const
HexagonInstrInfo specifics.
void copyImplicitOps(MachineFunction &MF, const MachineInstr &MI)
Copy implicit register operands from specified instruction to this instruction.
Return from interrupt. Operand 0 is the number of bytes to pop.
AnalysisUsage & addPreservedID(const void *ID)
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
static GCRegistry::Add< CoreCLRGC > E("coreclr","CoreCLR-compatible GC")
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
unsigned getTargetFlags() const
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
FunctionPass * createX86ExpandPseudoPass()
Return a Machine IR pass that expands X86-specific pseudo instructions into a sequence of actual inst...
EHPersonality classifyEHPersonality(const Value *Pers)
See if the given exception handling personality function is one that we understand.
Represent the analysis usage information of a pass.
bool isSymbol() const
isSymbol - Tests if this is a MO_ExternalSymbol operand.
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
FunctionPass class - This class is used to implement most global optimizations.
int64_t getOffset() const
Return the offset from the symbol in this operand.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
void addOperand(MachineFunction &MF, const MachineOperand &Op)
Add the specified operand to the instruction.
MachineOperand class - Representation of each machine instruction operand.
void setPreservesCFG()
This function should be called by the pass, iff they do not:
const MachineInstrBuilder & addGlobalAddress(const GlobalValue *GV, int64_t Offset=0, unsigned char TargetFlags=0) const
void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, const DebugLoc &DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const override
Emit instructions to copy a pair of physical registers.
MachineFunctionProperties & set(Property P)
Representation of each machine instruction.
const MachineInstrBuilder & addExternalSymbol(const char *FnName, unsigned char TargetFlags=0) const
constexpr bool isUInt< 16 >(uint64_t x)
OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents 'eh_return' gcc dwarf builtin...
unsigned getReg() const
getReg - Returns the register number.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
bool isAsynchronousEHPersonality(EHPersonality Pers)
Returns true if this personality function catches asynchronous exceptions.
const MachineInstrBuilder & addOperand(const MachineOperand &MO) const
StringRef - Represent a constant reference to a string, i.e.
Properties which a MachineFunction may have at a given point in time.