14 #ifndef LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64MCTARGETDESC_H
15 #define LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64MCTARGETDESC_H
17 #include "llvm/Support/DataTypes.h"
20 class formatted_raw_ostream;
29 class MCSubtargetInfo;
30 class MCTargetOptions;
31 class MCTargetStreamer;
36 class raw_pwrite_stream;
43 const MCRegisterInfo &
MRI,
46 const MCRegisterInfo &
MRI,
47 const Triple &TT, StringRef CPU,
48 const MCTargetOptions &Options);
50 const MCRegisterInfo &
MRI,
51 const Triple &TT, StringRef CPU,
52 const MCTargetOptions &Options);
64 formatted_raw_ostream &OS,
65 MCInstPrinter *InstPrint,
69 const MCSubtargetInfo &STI);
76 #define GET_REGINFO_ENUM
77 #include "AArch64GenRegisterInfo.inc"
81 #define GET_INSTRINFO_ENUM
82 #include "AArch64GenInstrInfo.inc"
84 #define GET_SUBTARGETINFO_ENUM
85 #include "AArch64GenSubtargetInfo.inc"
Target & getTheAArch64beTarget()
Target & getTheAArch64leTarget()
Target & getTheARM64Target()
unsigned const MachineRegisterInfo * MRI
MCObjectWriter * createAArch64MachObjectWriter(raw_pwrite_stream &OS, uint32_t CPUType, uint32_t CPUSubtype)
MCObjectWriter * createAArch64ELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI, bool IsLittleEndian, bool IsILP32)
MCTargetStreamer * createAArch64ObjectTargetStreamer(MCStreamer &S, const MCSubtargetInfo &STI)
MCCodeEmitter * createAArch64MCCodeEmitter(const MCInstrInfo &MCII, const MCRegisterInfo &MRI, MCContext &Ctx)
CPUType
These values correspond to the CV_CPU_TYPE_e enumeration, and are documented here: https://msdn...
static const char * Target
MCTargetStreamer * createAArch64AsmTargetStreamer(MCStreamer &S, formatted_raw_ostream &OS, MCInstPrinter *InstPrint, bool isVerboseAsm)
MCAsmBackend * createAArch64leAsmBackend(const Target &T, const MCRegisterInfo &MRI, const Triple &TT, StringRef CPU, const MCTargetOptions &Options)
MCAsmBackend * createAArch64beAsmBackend(const Target &T, const MCRegisterInfo &MRI, const Triple &TT, StringRef CPU, const MCTargetOptions &Options)