LLVM  4.0.0
BranchRelaxation.cpp
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1 //===-- BranchRelaxation.cpp ----------------------------------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 
10 #include "llvm/CodeGen/Passes.h"
11 #include "llvm/ADT/SmallVector.h"
12 #include "llvm/ADT/Statistic.h"
18 #include "llvm/Support/Debug.h"
19 #include "llvm/Support/Format.h"
21 
22 using namespace llvm;
23 
24 #define DEBUG_TYPE "branch-relaxation"
25 
26 STATISTIC(NumSplit, "Number of basic blocks split");
27 STATISTIC(NumConditionalRelaxed, "Number of conditional branches relaxed");
28 STATISTIC(NumUnconditionalRelaxed, "Number of unconditional branches relaxed");
29 
30 #define BRANCH_RELAX_NAME "Branch relaxation pass"
31 
32 namespace {
34  /// BasicBlockInfo - Information about the offset and size of a single
35  /// basic block.
36  struct BasicBlockInfo {
37  /// Offset - Distance from the beginning of the function to the beginning
38  /// of this basic block.
39  ///
40  /// The offset is always aligned as required by the basic block.
41  unsigned Offset;
42 
43  /// Size - Size of the basic block in bytes. If the block contains
44  /// inline assembly, this is a worst case estimate.
45  ///
46  /// The size does not include any alignment padding whether from the
47  /// beginning of the block, or from an aligned jump table at the end.
48  unsigned Size;
49 
50  BasicBlockInfo() : Offset(0), Size(0) {}
51 
52  /// Compute the offset immediately following this block. \p MBB is the next
53  /// block.
54  unsigned postOffset(const MachineBasicBlock &MBB) const {
55  unsigned PO = Offset + Size;
56  unsigned Align = MBB.getAlignment();
57  if (Align == 0)
58  return PO;
59 
60  unsigned AlignAmt = 1 << Align;
61  unsigned ParentAlign = MBB.getParent()->getAlignment();
62  if (Align <= ParentAlign)
63  return PO + OffsetToAlignment(PO, AlignAmt);
64 
65  // The alignment of this MBB is larger than the function's alignment, so we
66  // can't tell whether or not it will insert nops. Assume that it will.
67  return PO + AlignAmt + OffsetToAlignment(PO, AlignAmt);
68  }
69  };
70 
72  std::unique_ptr<RegScavenger> RS;
73  LivePhysRegs LiveRegs;
74 
75  MachineFunction *MF;
76  const TargetRegisterInfo *TRI;
77  const TargetInstrInfo *TII;
78 
79  bool relaxBranchInstructions();
80  void scanFunction();
81 
82  MachineBasicBlock *createNewBlockAfter(MachineBasicBlock &BB);
83 
84  MachineBasicBlock *splitBlockBeforeInstr(MachineInstr &MI,
85  MachineBasicBlock *DestBB);
86  void adjustBlockOffsets(MachineBasicBlock &MBB);
87  bool isBlockInRange(const MachineInstr &MI, const MachineBasicBlock &BB) const;
88 
89  bool fixupConditionalBranch(MachineInstr &MI);
90  bool fixupUnconditionalBranch(MachineInstr &MI);
91  uint64_t computeBlockSize(const MachineBasicBlock &MBB) const;
92  unsigned getInstrOffset(const MachineInstr &MI) const;
93  void dumpBBs();
94  void verify();
95 
96 public:
97  static char ID;
99 
100  bool runOnMachineFunction(MachineFunction &MF) override;
101 
102  StringRef getPassName() const override {
103  return BRANCH_RELAX_NAME;
104  }
105 };
106 
107 }
108 
109 char BranchRelaxation::ID = 0;
111 
113 
114 /// verify - check BBOffsets, BBSizes, alignment of islands
115 void BranchRelaxation::verify() {
116 #ifndef NDEBUG
117  unsigned PrevNum = MF->begin()->getNumber();
118  for (MachineBasicBlock &MBB : *MF) {
119  unsigned Align = MBB.getAlignment();
120  unsigned Num = MBB.getNumber();
121  assert(BlockInfo[Num].Offset % (1u << Align) == 0);
122  assert(!Num || BlockInfo[PrevNum].postOffset(MBB) <= BlockInfo[Num].Offset);
123  assert(BlockInfo[Num].Size == computeBlockSize(MBB));
124  PrevNum = Num;
125  }
126 #endif
127 }
128 
129 /// print block size and offset information - debugging
130 void BranchRelaxation::dumpBBs() {
131  for (auto &MBB : *MF) {
132  const BasicBlockInfo &BBI = BlockInfo[MBB.getNumber()];
133  dbgs() << format("BB#%u\toffset=%08x\t", MBB.getNumber(), BBI.Offset)
134  << format("size=%#x\n", BBI.Size);
135  }
136 }
137 
138 /// scanFunction - Do the initial scan of the function, building up
139 /// information about each block.
140 void BranchRelaxation::scanFunction() {
141  BlockInfo.clear();
142  BlockInfo.resize(MF->getNumBlockIDs());
143 
144  // First thing, compute the size of all basic blocks, and see if the function
145  // has any inline assembly in it. If so, we have to be conservative about
146  // alignment assumptions, as we don't know for sure the size of any
147  // instructions in the inline assembly.
148  for (MachineBasicBlock &MBB : *MF)
149  BlockInfo[MBB.getNumber()].Size = computeBlockSize(MBB);
150 
151  // Compute block offsets and known bits.
152  adjustBlockOffsets(*MF->begin());
153 }
154 
155 /// computeBlockSize - Compute the size for MBB.
157  uint64_t Size = 0;
158  for (const MachineInstr &MI : MBB)
159  Size += TII->getInstSizeInBytes(MI);
160  return Size;
161 }
162 
163 /// getInstrOffset - Return the current offset of the specified machine
164 /// instruction from the start of the function. This offset changes as stuff is
165 /// moved around inside the function.
166 unsigned BranchRelaxation::getInstrOffset(const MachineInstr &MI) const {
167  const MachineBasicBlock *MBB = MI.getParent();
168 
169  // The offset is composed of two things: the sum of the sizes of all MBB's
170  // before this instruction's block, and the offset from the start of the block
171  // it is in.
172  unsigned Offset = BlockInfo[MBB->getNumber()].Offset;
173 
174  // Sum instructions before MI in MBB.
175  for (MachineBasicBlock::const_iterator I = MBB->begin(); &*I != &MI; ++I) {
176  assert(I != MBB->end() && "Didn't find MI in its own basic block?");
177  Offset += TII->getInstSizeInBytes(*I);
178  }
179 
180  return Offset;
181 }
182 
183 void BranchRelaxation::adjustBlockOffsets(MachineBasicBlock &Start) {
184  unsigned PrevNum = Start.getNumber();
185  for (auto &MBB : make_range(MachineFunction::iterator(Start), MF->end())) {
186  unsigned Num = MBB.getNumber();
187  if (!Num) // block zero is never changed from offset zero.
188  continue;
189  // Get the offset and known bits at the end of the layout predecessor.
190  // Include the alignment of the current block.
191  BlockInfo[Num].Offset = BlockInfo[PrevNum].postOffset(MBB);
192 
193  PrevNum = Num;
194  }
195 }
196 
197  /// Insert a new empty basic block and insert it after \BB
198 MachineBasicBlock *BranchRelaxation::createNewBlockAfter(MachineBasicBlock &BB) {
199  // Create a new MBB for the code after the OrigBB.
200  MachineBasicBlock *NewBB =
201  MF->CreateMachineBasicBlock(BB.getBasicBlock());
202  MF->insert(++BB.getIterator(), NewBB);
203 
204  // Insert an entry into BlockInfo to align it properly with the block numbers.
205  BlockInfo.insert(BlockInfo.begin() + NewBB->getNumber(), BasicBlockInfo());
206 
207  return NewBB;
208 }
209 
210 /// Split the basic block containing MI into two blocks, which are joined by
211 /// an unconditional branch. Update data structures and renumber blocks to
212 /// account for this change and returns the newly created block.
213 MachineBasicBlock *BranchRelaxation::splitBlockBeforeInstr(MachineInstr &MI,
214  MachineBasicBlock *DestBB) {
215  MachineBasicBlock *OrigBB = MI.getParent();
216 
217  // Create a new MBB for the code after the OrigBB.
218  MachineBasicBlock *NewBB =
219  MF->CreateMachineBasicBlock(OrigBB->getBasicBlock());
220  MF->insert(++OrigBB->getIterator(), NewBB);
221 
222  // Splice the instructions starting with MI over to NewBB.
223  NewBB->splice(NewBB->end(), OrigBB, MI.getIterator(), OrigBB->end());
224 
225  // Add an unconditional branch from OrigBB to NewBB.
226  // Note the new unconditional branch is not being recorded.
227  // There doesn't seem to be meaningful DebugInfo available; this doesn't
228  // correspond to anything in the source.
229  TII->insertUnconditionalBranch(*OrigBB, NewBB, DebugLoc());
230 
231  // Insert an entry into BlockInfo to align it properly with the block numbers.
232  BlockInfo.insert(BlockInfo.begin() + NewBB->getNumber(), BasicBlockInfo());
233 
234 
235  NewBB->transferSuccessors(OrigBB);
236  OrigBB->addSuccessor(NewBB);
237  OrigBB->addSuccessor(DestBB);
238 
239  // Cleanup potential unconditional branch to successor block.
240  // Note that updateTerminator may change the size of the blocks.
241  NewBB->updateTerminator();
242  OrigBB->updateTerminator();
243 
244  // Figure out how large the OrigBB is. As the first half of the original
245  // block, it cannot contain a tablejump. The size includes
246  // the new jump we added. (It should be possible to do this without
247  // recounting everything, but it's very confusing, and this is rarely
248  // executed.)
249  BlockInfo[OrigBB->getNumber()].Size = computeBlockSize(*OrigBB);
250 
251  // Figure out how large the NewMBB is. As the second half of the original
252  // block, it may contain a tablejump.
253  BlockInfo[NewBB->getNumber()].Size = computeBlockSize(*NewBB);
254 
255  // All BBOffsets following these blocks must be modified.
256  adjustBlockOffsets(*OrigBB);
257 
258  // Need to fix live-in lists if we track liveness.
259  if (TRI->trackLivenessAfterRegAlloc(*MF))
260  computeLiveIns(LiveRegs, *TRI, *NewBB);
261 
262  ++NumSplit;
263 
264  return NewBB;
265 }
266 
267 /// isBlockInRange - Returns true if the distance between specific MI and
268 /// specific BB can fit in MI's displacement field.
269 bool BranchRelaxation::isBlockInRange(
270  const MachineInstr &MI, const MachineBasicBlock &DestBB) const {
271  int64_t BrOffset = getInstrOffset(MI);
272  int64_t DestOffset = BlockInfo[DestBB.getNumber()].Offset;
273 
274  if (TII->isBranchOffsetInRange(MI.getOpcode(), DestOffset - BrOffset))
275  return true;
276 
277  DEBUG(
278  dbgs() << "Out of range branch to destination BB#" << DestBB.getNumber()
279  << " from BB#" << MI.getParent()->getNumber()
280  << " to " << DestOffset
281  << " offset " << DestOffset - BrOffset
282  << '\t' << MI
283  );
284 
285  return false;
286 }
287 
288 /// fixupConditionalBranch - Fix up a conditional branch whose destination is
289 /// too far away to fit in its displacement field. It is converted to an inverse
290 /// conditional branch + an unconditional branch to the destination.
291 bool BranchRelaxation::fixupConditionalBranch(MachineInstr &MI) {
292  DebugLoc DL = MI.getDebugLoc();
293  MachineBasicBlock *MBB = MI.getParent();
294  MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
296 
297  bool Fail = TII->analyzeBranch(*MBB, TBB, FBB, Cond);
298  assert(!Fail && "branches to be relaxed must be analyzable");
299  (void)Fail;
300 
301  // Add an unconditional branch to the destination and invert the branch
302  // condition to jump over it:
303  // tbz L1
304  // =>
305  // tbnz L2
306  // b L1
307  // L2:
308 
309  if (FBB && isBlockInRange(MI, *FBB)) {
310  // Last MI in the BB is an unconditional branch. We can simply invert the
311  // condition and swap destinations:
312  // beq L1
313  // b L2
314  // =>
315  // bne L2
316  // b L1
317  DEBUG(dbgs() << " Invert condition and swap "
318  "its destination with " << MBB->back());
319 
321  int OldSize = 0, NewSize = 0;
322  TII->removeBranch(*MBB, &OldSize);
323  TII->insertBranch(*MBB, FBB, TBB, Cond, DL, &NewSize);
324 
325  BlockInfo[MBB->getNumber()].Size += (NewSize - OldSize);
326  return true;
327  } else if (FBB) {
328  // We need to split the basic block here to obtain two long-range
329  // unconditional branches.
330  auto &NewBB = *MF->CreateMachineBasicBlock(MBB->getBasicBlock());
331  MF->insert(++MBB->getIterator(), &NewBB);
332 
333  // Insert an entry into BlockInfo to align it properly with the block
334  // numbers.
335  BlockInfo.insert(BlockInfo.begin() + NewBB.getNumber(), BasicBlockInfo());
336 
337  unsigned &NewBBSize = BlockInfo[NewBB.getNumber()].Size;
338  int NewBrSize;
339  TII->insertUnconditionalBranch(NewBB, FBB, DL, &NewBrSize);
340  NewBBSize += NewBrSize;
341 
342  // Update the successor lists according to the transformation to follow.
343  // Do it here since if there's no split, no update is needed.
344  MBB->replaceSuccessor(FBB, &NewBB);
345  NewBB.addSuccessor(FBB);
346  }
347 
348  // We now have an appropriate fall-through block in place (either naturally or
349  // just created), so we can invert the condition.
350  MachineBasicBlock &NextBB = *std::next(MachineFunction::iterator(MBB));
351 
352  DEBUG(dbgs() << " Insert B to BB#" << TBB->getNumber()
353  << ", invert condition and change dest. to BB#"
354  << NextBB.getNumber() << '\n');
355 
356  unsigned &MBBSize = BlockInfo[MBB->getNumber()].Size;
357 
358  // Insert a new conditional branch and a new unconditional branch.
359  int RemovedSize = 0;
361  TII->removeBranch(*MBB, &RemovedSize);
362  MBBSize -= RemovedSize;
363 
364  int AddedSize = 0;
365  TII->insertBranch(*MBB, &NextBB, TBB, Cond, DL, &AddedSize);
366  MBBSize += AddedSize;
367 
368  // Finally, keep the block offsets up to date.
369  adjustBlockOffsets(*MBB);
370  return true;
371 }
372 
373 bool BranchRelaxation::fixupUnconditionalBranch(MachineInstr &MI) {
374  MachineBasicBlock *MBB = MI.getParent();
375 
376  unsigned OldBrSize = TII->getInstSizeInBytes(MI);
377  MachineBasicBlock *DestBB = TII->getBranchDestBlock(MI);
378 
379  int64_t DestOffset = BlockInfo[DestBB->getNumber()].Offset;
380  int64_t SrcOffset = getInstrOffset(MI);
381 
382  assert(!TII->isBranchOffsetInRange(MI.getOpcode(), DestOffset - SrcOffset));
383 
384  BlockInfo[MBB->getNumber()].Size -= OldBrSize;
385 
386  MachineBasicBlock *BranchBB = MBB;
387 
388  // If this was an expanded conditional branch, there is already a single
389  // unconditional branch in a block.
390  if (!MBB->empty()) {
391  BranchBB = createNewBlockAfter(*MBB);
392 
393  // Add live outs.
394  for (const MachineBasicBlock *Succ : MBB->successors()) {
395  for (const MachineBasicBlock::RegisterMaskPair &LiveIn : Succ->liveins())
396  BranchBB->addLiveIn(LiveIn);
397  }
398 
399  BranchBB->sortUniqueLiveIns();
400  BranchBB->addSuccessor(DestBB);
401  MBB->replaceSuccessor(DestBB, BranchBB);
402  }
403 
404  DebugLoc DL = MI.getDebugLoc();
405  MI.eraseFromParent();
406  BlockInfo[BranchBB->getNumber()].Size += TII->insertIndirectBranch(
407  *BranchBB, *DestBB, DL, DestOffset - SrcOffset, RS.get());
408 
409  adjustBlockOffsets(*MBB);
410  return true;
411 }
412 
413 bool BranchRelaxation::relaxBranchInstructions() {
414  bool Changed = false;
415 
416  // Relaxing branches involves creating new basic blocks, so re-eval
417  // end() for termination.
418  for (MachineFunction::iterator I = MF->begin(); I != MF->end(); ++I) {
419  MachineBasicBlock &MBB = *I;
420 
421  // Empty block?
423  if (Last == MBB.end())
424  continue;
425 
426  // Expand the unconditional branch first if necessary. If there is a
427  // conditional branch, this will end up changing the branch destination of
428  // it to be over the newly inserted indirect branch block, which may avoid
429  // the need to try expanding the conditional branch first, saving an extra
430  // jump.
431  if (Last->isUnconditionalBranch()) {
432  // Unconditional branch destination might be unanalyzable, assume these
433  // are OK.
434  if (MachineBasicBlock *DestBB = TII->getBranchDestBlock(*Last)) {
435  if (!isBlockInRange(*Last, *DestBB)) {
436  fixupUnconditionalBranch(*Last);
437  ++NumUnconditionalRelaxed;
438  Changed = true;
439  }
440  }
441  }
442 
443  // Loop over the conditional branches.
446  J != MBB.end(); J = Next) {
447  Next = std::next(J);
448  MachineInstr &MI = *J;
449 
450  if (MI.isConditionalBranch()) {
451  MachineBasicBlock *DestBB = TII->getBranchDestBlock(MI);
452  if (!isBlockInRange(MI, *DestBB)) {
453  if (Next != MBB.end() && Next->isConditionalBranch()) {
454  // If there are multiple conditional branches, this isn't an
455  // analyzable block. Split later terminators into a new block so
456  // each one will be analyzable.
457 
458  splitBlockBeforeInstr(*Next, DestBB);
459  } else {
460  fixupConditionalBranch(MI);
461  ++NumConditionalRelaxed;
462  }
463 
464  Changed = true;
465 
466  // This may have modified all of the terminators, so start over.
467  Next = MBB.getFirstTerminator();
468  }
469  }
470  }
471  }
472 
473  return Changed;
474 }
475 
476 bool BranchRelaxation::runOnMachineFunction(MachineFunction &mf) {
477  MF = &mf;
478 
479  DEBUG(dbgs() << "***** BranchRelaxation *****\n");
480 
481  const TargetSubtargetInfo &ST = MF->getSubtarget();
482  TII = ST.getInstrInfo();
483 
484  TRI = ST.getRegisterInfo();
485  if (TRI->trackLivenessAfterRegAlloc(*MF))
486  RS.reset(new RegScavenger());
487 
488  // Renumber all of the machine basic blocks in the function, guaranteeing that
489  // the numbers agree with the position of the block in the function.
490  MF->RenumberBlocks();
491 
492  // Do the initial scan of the function, building up information about the
493  // sizes of each block.
494  scanFunction();
495 
496  DEBUG(dbgs() << " Basic blocks before relaxation\n"; dumpBBs(););
497 
498  bool MadeChange = false;
499  while (relaxBranchInstructions())
500  MadeChange = true;
501 
502  // After a while, this might be made debug-only, but it is not expensive.
503  verify();
504 
505  DEBUG(dbgs() << " Basic blocks after relaxation\n\n"; dumpBBs());
506 
507  BlockInfo.clear();
508 
509  return MadeChange;
510 }
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
unsigned getAlignment() const
getAlignment - Return the alignment (log2, not bytes) of the function.
STATISTIC(NumFunctions,"Total number of functions")
int getNumber() const
MachineBasicBlocks are uniquely numbered at the function level, unless they're not in a MachineFuncti...
iterator getFirstTerminator()
Returns an iterator to the first terminator instruction of this basic block.
void transferSuccessors(MachineBasicBlock *FromMBB)
Transfers all the successors from MBB to this machine basic block (i.e., copies all the successors Fr...
bool reverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const override
Reverses the branch condition of the specified condition list, returning false on success and true if...
unsigned Offset
Offset - Distance from the beginning of the function to the beginning of this basic block...
void computeLiveIns(LivePhysRegs &LiveRegs, const TargetRegisterInfo &TRI, MachineBasicBlock &MBB)
Compute the live-in list for MBB assuming all of its successors live-in lists are up-to-date...
char & BranchRelaxationPassID
BranchRelaxation - This pass replaces branches that need to jump further than is supported by a branc...
A debug info location.
Definition: DebugLoc.h:34
bool isConditionalBranch(QueryType Type=AnyInBundle) const
Return true if this is a branch which may fall through to the next instruction or may transfer contro...
Definition: MachineInstr.h:462
void computeBlockSize(MachineFunction *MF, MachineBasicBlock *MBB, BasicBlockInfo &BBI)
BasicBlockInfo - Information about the offset and size of a single basic block.
iterator_range< succ_iterator > successors()
bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const override
Analyze the branching code at the end of MBB, returning true if it cannot be understood (e...
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
DILocation * get() const
Get the underlying DILocation.
Definition: DebugLoc.cpp:21
const HexagonInstrInfo * TII
#define Fail
void eraseFromParent()
Unlink 'this' from the containing basic block and delete it.
MachineBasicBlock * MBB
iterator getLastNonDebugInstr()
Returns an iterator to the last non-debug instruction in the basic block, or end().
const BasicBlock * getBasicBlock() const
Return the LLVM basic block that this instance corresponded to originally.
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
Definition: MachineInstr.h:273
const MachineBasicBlock * getParent() const
Definition: MachineInstr.h:131
format_object< Ts...> format(const char *Fmt, const Ts &...Vals)
These are helper functions used to produce formatted output.
Definition: Format.h:124
TargetInstrInfo - Interface to description of machine instruction set.
bool verify(const TargetRegisterInfo &TRI) const
Check that information hold by this instance make sense for the given TRI.
void addLiveIn(MCPhysReg PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
This file declares the machine register scavenger class.
uint32_t Offset
self_iterator getIterator()
Definition: ilist_node.h:81
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
Definition: PassSupport.h:36
iterator_range< T > make_range(T x, T y)
Convenience function for iterating over sub-ranges.
Iterator for intrusive lists based on ilist_node.
void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:843
void updateTerminator()
Update the terminator instructions in block to account for changes to the layout. ...
unsigned Size
Size - Size of the basic block in bytes.
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const override
Insert branch code into the end of the specified MachineBasicBlock.
void sortUniqueLiveIns()
Sorts and uniques the LiveIns vector.
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:132
void replaceSuccessor(MachineBasicBlock *Old, MachineBasicBlock *New)
Replace successor OLD with NEW and update probability info.
unsigned removeBranch(MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const override
Remove the branching code at the end of the specific MBB.
const DebugLoc & getDebugLoc() const
Returns the debug location id of this MachineInstr.
Definition: MachineInstr.h:250
TargetSubtargetInfo - Generic base class for all target subtargets.
Representation of each machine instruction.
Definition: MachineInstr.h:52
void splice(iterator Where, MachineBasicBlock *Other, iterator From)
Take an instruction from MBB 'Other' at the position From, and insert it into this MBB right before '...
A set of live physical registers with functions to track liveness when walking backward/forward throu...
Definition: LivePhysRegs.h:45
#define I(x, y, z)
Definition: MD5.cpp:54
Pair of physical register and lane mask.
instr_iterator insert(instr_iterator I, MachineInstr *M)
Insert MI into the instruction list before I, possibly inside a bundle.
#define DEBUG_TYPE
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
virtual const TargetInstrInfo * getInstrInfo() const
#define BRANCH_RELAX_NAME
uint64_t OffsetToAlignment(uint64_t Value, uint64_t Align)
Returns the offset to the next integer (mod 2**64) that is greater than or equal to Value and is a mu...
Definition: MathExtras.h:701
#define DEBUG(X)
Definition: Debug.h:100
IRTranslator LLVM IR MI
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:47
static cl::opt< bool > BranchRelaxation("aarch64-enable-branch-relax", cl::Hidden, cl::init(true), cl::desc("Relax out of range conditional branches"))
unsigned getAlignment() const
Return alignment of the basic block.