LLVM  4.0.0
MipsMCTargetDesc.cpp
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1 //===-- MipsMCTargetDesc.cpp - Mips Target Descriptions -------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file provides Mips specific target descriptions.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "MipsMCTargetDesc.h"
16 #include "MipsELFStreamer.h"
17 #include "MipsMCAsmInfo.h"
18 #include "MipsMCNaCl.h"
19 #include "MipsTargetStreamer.h"
20 #include "llvm/ADT/Triple.h"
21 #include "llvm/MC/MCELFStreamer.h"
23 #include "llvm/MC/MCInstrInfo.h"
24 #include "llvm/MC/MCRegisterInfo.h"
26 #include "llvm/MC/MCSymbol.h"
31 
32 using namespace llvm;
33 
34 #define GET_INSTRINFO_MC_DESC
35 #include "MipsGenInstrInfo.inc"
36 
37 #define GET_SUBTARGETINFO_MC_DESC
38 #include "MipsGenSubtargetInfo.inc"
39 
40 #define GET_REGINFO_MC_DESC
41 #include "MipsGenRegisterInfo.inc"
42 
43 /// Select the Mips CPU for the given triple and cpu name.
44 /// FIXME: Merge with the copy in MipsSubtarget.cpp
46  if (CPU.empty() || CPU == "generic") {
47  if (TT.getArch() == Triple::mips || TT.getArch() == Triple::mipsel)
48  CPU = "mips32";
49  else
50  CPU = "mips64";
51  }
52  return CPU;
53 }
54 
56  MCInstrInfo *X = new MCInstrInfo();
57  InitMipsMCInstrInfo(X);
58  return X;
59 }
60 
63  InitMipsMCRegisterInfo(X, Mips::RA);
64  return X;
65 }
66 
68  StringRef CPU, StringRef FS) {
69  CPU = MIPS_MC::selectMipsCPU(TT, CPU);
70  return createMipsMCSubtargetInfoImpl(TT, CPU, FS);
71 }
72 
74  const Triple &TT) {
75  MCAsmInfo *MAI = new MipsMCAsmInfo(TT);
76 
77  unsigned SP = MRI.getDwarfRegNum(Mips::SP, true);
78  MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, SP, 0);
79  MAI->addInitialFrameState(Inst);
80 
81  return MAI;
82 }
83 
85  unsigned SyntaxVariant,
86  const MCAsmInfo &MAI,
87  const MCInstrInfo &MII,
88  const MCRegisterInfo &MRI) {
89  return new MipsInstPrinter(MAI, MII, MRI);
90 }
91 
94  MCCodeEmitter *Emitter, bool RelaxAll) {
95  MCStreamer *S;
96  if (!T.isOSNaCl())
97  S = createMipsELFStreamer(Context, MAB, OS, Emitter, RelaxAll);
98  else
99  S = createMipsNaClELFStreamer(Context, MAB, OS, Emitter, RelaxAll);
100  return S;
101 }
102 
105  MCInstPrinter *InstPrint,
106  bool isVerboseAsm) {
107  return new MipsTargetAsmStreamer(S, OS);
108 }
109 
111  return new MipsTargetStreamer(S);
112 }
113 
114 static MCTargetStreamer *
116  return new MipsTargetELFStreamer(S, STI);
117 }
118 
119 namespace {
120 
121 class MipsMCInstrAnalysis : public MCInstrAnalysis {
122 public:
123  MipsMCInstrAnalysis(const MCInstrInfo *Info) : MCInstrAnalysis(Info) {}
124 
125  bool evaluateBranch(const MCInst &Inst, uint64_t Addr, uint64_t Size,
126  uint64_t &Target) const override {
127  unsigned NumOps = Inst.getNumOperands();
128  if (NumOps == 0)
129  return false;
130  switch (Info->get(Inst.getOpcode()).OpInfo[NumOps - 1].OperandType) {
133  // jal, bal ...
134  Target = Inst.getOperand(NumOps - 1).getImm();
135  return true;
136  case MCOI::OPERAND_PCREL:
137  // b, j, beq ...
138  Target = Addr + Inst.getOperand(NumOps - 1).getImm();
139  return true;
140  default:
141  return false;
142  }
143  }
144 };
145 }
146 
148  return new MipsMCInstrAnalysis(Info);
149 }
150 
151 extern "C" void LLVMInitializeMipsTargetMC() {
152  for (Target *T : {&getTheMipsTarget(), &getTheMipselTarget(),
154  // Register the MC asm info.
156 
157  // Register the MC instruction info.
159 
160  // Register the MC register info.
162 
163  // Register the elf streamer.
165 
166  // Register the asm target streamer.
168 
171 
172  // Register the MC subtarget info.
174 
175  // Register the MC instruction analyzer.
177 
178  // Register the MCInstPrinter.
180 
183  }
184 
185  // Register the MC Code Emitter
186  for (Target *T : {&getTheMipsTarget(), &getTheMips64Target()})
188 
189  for (Target *T : {&getTheMipselTarget(), &getTheMips64elTarget()})
191 
192  // Register the asm backend.
201 }
static MCInstPrinter * createMipsMCInstPrinter(const Triple &T, unsigned SyntaxVariant, const MCAsmInfo &MAI, const MCInstrInfo &MII, const MCRegisterInfo &MRI)
int getDwarfRegNum(unsigned RegNum, bool isEH) const
Map a target register to an equivalent dwarf register number.
LLVMContext & Context
formatted_raw_ostream - A raw_ostream that wraps another one and keeps track of line and column posit...
static void RegisterMCInstrAnalysis(Target &T, Target::MCInstrAnalysisCtorFnTy Fn)
RegisterMCInstrAnalysis - Register a MCInstrAnalysis implementation for the given target...
static MCTargetStreamer * createMipsNullTargetStreamer(MCStreamer &S)
Target specific streamer interface.
Definition: MCStreamer.h:73
MCAsmBackend * createMipsAsmBackendEL64(const Target &T, const MCRegisterInfo &MRI, const Triple &TT, StringRef CPU, const MCTargetOptions &Options)
Target & getTheMipselTarget()
static MCRegisterInfo * createMipsMCRegisterInfo(const Triple &TT)
static MCAsmInfo * createMipsMCAsmInfo(const MCRegisterInfo &MRI, const Triple &TT)
static void RegisterMCInstPrinter(Target &T, Target::MCInstPrinterCtorTy Fn)
RegisterMCInstPrinter - Register a MCInstPrinter implementation for the given target.
static void RegisterAsmTargetStreamer(Target &T, Target::AsmTargetStreamerCtorTy Fn)
MCAsmBackend * createMipsAsmBackendEB32(const Target &T, const MCRegisterInfo &MRI, const Triple &TT, StringRef CPU, const MCTargetOptions &Options)
static MCTargetStreamer * createMipsAsmTargetStreamer(MCStreamer &S, formatted_raw_ostream &OS, MCInstPrinter *InstPrint, bool isVerboseAsm)
void LLVMInitializeMipsTargetMC()
static MCSubtargetInfo * createMipsMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS)
Context object for machine code objects.
Definition: MCContext.h:51
bool isOSNaCl() const
Tests whether the OS is NaCl (Native Client)
Definition: Triple.h:545
void addInitialFrameState(const MCCFIInstruction &Inst)
Definition: MCAsmInfo.h:565
Target & getTheMips64Target()
ArchType getArch() const
getArch - Get the parsed architecture type of this triple.
Definition: Triple.h:270
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:150
MCCodeEmitter * createMipsMCCodeEmitterEL(const MCInstrInfo &MCII, const MCRegisterInfo &MRI, MCContext &Ctx)
MCAsmBackend * createMipsAsmBackendEL32(const Target &T, const MCRegisterInfo &MRI, const Triple &TT, StringRef CPU, const MCTargetOptions &Options)
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
This class is intended to be used as a base class for asm properties and features specific to the tar...
Definition: MCAsmInfo.h:57
static MCTargetStreamer * createMipsObjectTargetStreamer(MCStreamer &S, const MCSubtargetInfo &STI)
static void RegisterMCAsmBackend(Target &T, Target::MCAsmBackendCtorTy Fn)
RegisterMCAsmBackend - Register a MCAsmBackend implementation for the given target.
Streaming machine code generation interface.
Definition: MCStreamer.h:161
static MCInstrInfo * createMipsMCInstrInfo()
Target & getTheMips64elTarget()
unsigned const MachineRegisterInfo * MRI
static MCCFIInstruction createDefCfa(MCSymbol *L, unsigned Register, int Offset)
.cfi_def_cfa defines a rule for computing CFA as: take address from Register and add Offset to it...
Definition: MCDwarf.h:369
static MCStreamer * createMCStreamer(const Triple &T, MCContext &Context, MCAsmBackend &MAB, raw_pwrite_stream &OS, MCCodeEmitter *Emitter, bool RelaxAll)
static MCInstrAnalysis * createMipsMCInstrAnalysis(const MCInstrInfo *Info)
MCCodeEmitter - Generic instruction encoding interface.
Definition: MCCodeEmitter.h:23
Interface to description of machine instruction set.
Definition: MCInstrInfo.h:24
MCELFStreamer * createMipsNaClELFStreamer(MCContext &Context, MCAsmBackend &TAB, raw_pwrite_stream &OS, MCCodeEmitter *Emitter, bool RelaxAll)
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang","erlang-compatible garbage collector")
StringRef selectMipsCPU(const Triple &TT, StringRef CPU)
Select the Mips CPU for the given triple and cpu name.
MCELFStreamer * createMipsELFStreamer(MCContext &Context, MCAsmBackend &MAB, raw_pwrite_stream &OS, MCCodeEmitter *Emitter, bool RelaxAll)
static void RegisterMCSubtargetInfo(Target &T, Target::MCSubtargetInfoCtorFnTy Fn)
RegisterMCSubtargetInfo - Register a MCSubtargetInfo implementation for the given target...
static void RegisterObjectTargetStreamer(Target &T, Target::ObjectTargetStreamerCtorTy Fn)
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
static void RegisterMCCodeEmitter(Target &T, Target::MCCodeEmitterCtorTy Fn)
RegisterMCCodeEmitter - Register a MCCodeEmitter implementation for the given target.
static void RegisterMCRegInfo(Target &T, Target::MCRegInfoCtorFnTy Fn)
RegisterMCRegInfo - Register a MCRegisterInfo implementation for the given target.
unsigned getOpcode() const
Definition: MCInst.h:159
Target - Wrapper for Target specific information.
MCCodeEmitter * createMipsMCCodeEmitterEB(const MCInstrInfo &MCII, const MCRegisterInfo &MRI, MCContext &Ctx)
int64_t getImm() const
Definition: MCInst.h:74
LLVM_NODISCARD LLVM_ATTRIBUTE_ALWAYS_INLINE bool empty() const
empty - Check if the string is empty.
Definition: StringRef.h:130
Target & getTheMipsTarget()
RegisterMCAsmInfoFn - Helper template for registering a target assembly info implementation.
This is an instance of a target assembly language printer that converts an MCInst to valid target ass...
Definition: MCInstPrinter.h:41
OperandType
Types of operands to CF instructions.
unsigned getNumOperands() const
Definition: MCInst.h:166
static void RegisterMCInstrInfo(Target &T, Target::MCInstrInfoCtorFnTy Fn)
RegisterMCInstrInfo - Register a MCInstrInfo implementation for the given target. ...
MCSubtargetInfo - Generic base class for all target subtargets.
MCAsmBackend * createMipsAsmBackendEB64(const Target &T, const MCRegisterInfo &MRI, const Triple &TT, StringRef CPU, const MCTargetOptions &Options)
static void RegisterELFStreamer(Target &T, Target::ELFStreamerCtorTy Fn)
An abstract base class for streams implementations that also support a pwrite operation.
Definition: raw_ostream.h:333
cl::opt< bool > RelaxAll("mc-relax-all", cl::desc("When used with filetype=obj, ""relax all fixups in the emitted object file"))
static void RegisterNullTargetStreamer(Target &T, Target::NullTargetStreamerCtorTy Fn)
Generic interface to target specific assembler backends.
Definition: MCAsmBackend.h:36
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:47
const MCOperand & getOperand(unsigned i) const
Definition: MCInst.h:164