LLVM  4.0.0
HexagonMCTargetDesc.h
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1 //===-- HexagonMCTargetDesc.h - Hexagon Target Descriptions -----*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file provides Hexagon specific target descriptions.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCTARGETDESC_H
15 #define LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCTARGETDESC_H
16 
18 #include <cstdint>
19 
20 namespace llvm {
21 
22 struct InstrItinerary;
23 struct InstrStage;
24 class MCAsmBackend;
25 class MCCodeEmitter;
26 class MCContext;
27 class MCInstrInfo;
28 class MCObjectWriter;
29 class MCRegisterInfo;
30 class MCSubtargetInfo;
31 class MCTargetOptions;
32 class Target;
33 class Triple;
34 class StringRef;
35 class raw_ostream;
36 class raw_pwrite_stream;
37 
39 extern cl::opt<bool> HexagonDisableCompound;
40 extern cl::opt<bool> HexagonDisableDuplex;
41 extern const InstrStage HexagonStages[];
42 
43 MCInstrInfo *createHexagonMCInstrInfo();
44 
45 MCCodeEmitter *createHexagonMCCodeEmitter(const MCInstrInfo &MCII,
46  const MCRegisterInfo &MRI,
47  MCContext &MCT);
48 
49 MCAsmBackend *createHexagonAsmBackend(const Target &T,
50  const MCRegisterInfo &MRI,
51  const Triple &TT, StringRef CPU,
52  const MCTargetOptions &Options);
53 
54 MCObjectWriter *createHexagonELFObjectWriter(raw_pwrite_stream &OS,
55  uint8_t OSABI, StringRef CPU);
56 
57 namespace Hexagon_MC {
58 
60 
61 } // end namespace Hexagon_MC
62 
63 } // end namespace llvm
64 
65 // Define symbolic names for Hexagon registers. This defines a mapping from
66 // register name to register number.
67 //
68 #define GET_REGINFO_ENUM
69 #include "HexagonGenRegisterInfo.inc"
70 
71 // Defines symbolic names for the Hexagon instructions.
72 //
73 #define GET_INSTRINFO_ENUM
74 #include "HexagonGenInstrInfo.inc"
75 
76 #define GET_SUBTARGETINFO_ENUM
77 #include "HexagonGenSubtargetInfo.inc"
78 
79 #endif // LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCTARGETDESC_H
StringRef selectHexagonCPU(const Triple &TT, StringRef CPU)
MCCodeEmitter * createHexagonMCCodeEmitter(const MCInstrInfo &MCII, const MCRegisterInfo &MRI, MCContext &MCT)
MCInstrInfo * createHexagonMCInstrInfo()
MCObjectWriter * createHexagonELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI, StringRef CPU)
unsigned const MachineRegisterInfo * MRI
cl::opt< bool > HexagonDisableCompound
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
static const char * Target
const InstrStage HexagonStages[]
MCAsmBackend * createHexagonAsmBackend(Target const &T, MCRegisterInfo const &, const Triple &TT, StringRef CPU, const MCTargetOptions &Options)
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:47
Target & getTheHexagonTarget()
cl::opt< bool > HexagonDisableDuplex