27 #define DEBUG_TYPE "asm-printer"
29 #include "X86GenAsmWriter1.inc"
39 uint64_t TSFlags = Desc.
TSFlags;
59 case 0: O <<
"eq";
break;
60 case 1: O <<
"lt";
break;
61 case 2: O <<
"le";
break;
62 case 3: O <<
"unord";
break;
63 case 4: O <<
"neq";
break;
64 case 5: O <<
"nlt";
break;
65 case 6: O <<
"nle";
break;
66 case 7: O <<
"ord";
break;
67 case 8: O <<
"eq_uq";
break;
68 case 9: O <<
"nge";
break;
69 case 0xa: O <<
"ngt";
break;
70 case 0xb: O <<
"false";
break;
71 case 0xc: O <<
"neq_oq";
break;
72 case 0xd: O <<
"ge";
break;
73 case 0xe: O <<
"gt";
break;
74 case 0xf: O <<
"true";
break;
75 case 0x10: O <<
"eq_os";
break;
76 case 0x11: O <<
"lt_oq";
break;
77 case 0x12: O <<
"le_oq";
break;
78 case 0x13: O <<
"unord_s";
break;
79 case 0x14: O <<
"neq_us";
break;
80 case 0x15: O <<
"nlt_uq";
break;
81 case 0x16: O <<
"nle_uq";
break;
82 case 0x17: O <<
"ord_s";
break;
83 case 0x18: O <<
"eq_us";
break;
84 case 0x19: O <<
"nge_uq";
break;
85 case 0x1a: O <<
"ngt_uq";
break;
86 case 0x1b: O <<
"false_os";
break;
87 case 0x1c: O <<
"neq_os";
break;
88 case 0x1d: O <<
"ge_oq";
break;
89 case 0x1e: O <<
"gt_oq";
break;
90 case 0x1f: O <<
"true_us";
break;
99 case 0: O <<
"lt";
break;
100 case 1: O <<
"le";
break;
101 case 2: O <<
"gt";
break;
102 case 3: O <<
"ge";
break;
103 case 4: O <<
"eq";
break;
104 case 5: O <<
"neq";
break;
105 case 6: O <<
"false";
break;
106 case 7: O <<
"true";
break;
114 case 0: O <<
"{rn-sae}";
break;
115 case 1: O <<
"{rd-sae}";
break;
116 case 2: O <<
"{ru-sae}";
break;
117 case 3: O <<
"{rz-sae}";
break;
129 assert(Op.
isExpr() &&
"unknown pcrel immediate operand");
134 if (BranchTarget && BranchTarget->evaluateAsAbsolute(Address)) {
149 }
else if (Op.
isImm()) {
152 assert(Op.
isExpr() &&
"unknown operand kind in printOperand");
173 bool NeedPlus =
false;
180 if (NeedPlus) O <<
" + ";
182 O << ScaleVal <<
'*';
187 if (!DispSpec.
isImm()) {
188 if (NeedPlus) O <<
" + ";
189 assert(DispSpec.
isExpr() &&
"non-immediate displacement for LEA?");
192 int64_t DispVal = DispSpec.
getImm();
193 if (DispVal || (!IndexReg.
getReg() && !BaseReg.
getReg())) {
244 if (DispSpec.
isImm()) {
247 assert(DispSpec.
isExpr() &&
"non-immediate displacement?");
void printInst(const MCInst *MI, raw_ostream &OS, StringRef Annot, const MCSubtargetInfo &STI) override
Print the specified MCInst to the specified raw_ostream.
void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O)
void printSrcIdx(const MCInst *MI, unsigned OpNo, raw_ostream &O)
void printMemOffset(const MCInst *MI, unsigned OpNo, raw_ostream &O)
format_object< int64_t > formatHex(int64_t Value) const
Describe properties that are true of each instruction in the target description file.
MachineInstrBuilder MachineInstrBuilder &DefMI const MCInstrDesc & Desc
void printSSEAVXCC(const MCInst *MI, unsigned Op, raw_ostream &O)
void printInstruction(const MCInst *MI, raw_ostream &O)
AddrSegmentReg - The operand # of the segment in the memory operand.
void printRegName(raw_ostream &OS, unsigned RegNo) const override
Print the assembler register name.
void printRoundingControl(const MCInst *MI, unsigned Op, raw_ostream &OS)
unsigned getReg() const
Returns the register number.
void printXOPCC(const MCInst *MI, unsigned Op, raw_ostream &O)
Instances of this class represent a single low-level machine instruction.
const MCExpr * getExpr() const
static const char * getRegisterName(unsigned RegNo)
format_object< int64_t > formatImm(int64_t Value) const
Utility function to print immediates in decimal or hex.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
const MCInstrDesc & get(unsigned Opcode) const
Return the machine instruction descriptor that corresponds to the specified instruction opcode...
void printU8Imm(const MCInst *MI, unsigned Op, raw_ostream &O)
raw_ostream * CommentStream
A stream that comments can be emitted to if desired.
unsigned getOpcode() const
void printMemReference(const MCInst *MI, unsigned Op, raw_ostream &O)
MCSubtargetInfo - Generic base class for all target subtargets.
LLVM_NODISCARD std::enable_if<!is_simple_type< Y >::value, typename cast_retty< X, const Y >::ret_type >::type dyn_cast(const Y &Val)
void print(raw_ostream &OS, const MCAsmInfo *MAI, bool InParens=false) const
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
void printDstIdx(const MCInst *MI, unsigned OpNo, raw_ostream &O)
void printAnnotation(raw_ostream &OS, StringRef Annot)
Utility function for printing annotations.
void printPCRelImm(const MCInst *MI, unsigned OpNo, raw_ostream &O)
printPCRelImm - This is used to print an immediate value that ends up being encoded as a pc-relative ...
This class implements an extremely fast bulk output stream that can only output to a stream...
StringRef - Represent a constant reference to a string, i.e.
Instances of this class represent operands of the MCInst class.
const MCOperand & getOperand(unsigned i) const
bool EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS, const char *(*getRegName)(unsigned))
EmitAnyX86InstComments - This function decodes x86 instructions and prints newline terminated strings...