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LLVM
4.0.0
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#include <ARMTargetTransformInfo.h>
Additional Inherited Members | |
Protected Types inherited from llvm::TargetTransformInfoImplBase | |
| typedef TargetTransformInfo | TTI |
Protected Member Functions inherited from llvm::BasicTTIImplBase< ARMTTIImpl > | |
| BasicTTIImplBase (const TargetMachine *TM, const DataLayout &DL) | |
Protected Member Functions inherited from llvm::TargetTransformInfoImplCRTPBase< ARMTTIImpl > | |
| TargetTransformInfoImplCRTPBase (const DataLayout &DL) | |
Protected Member Functions inherited from llvm::TargetTransformInfoImplBase | |
| TargetTransformInfoImplBase (const DataLayout &DL) | |
| unsigned | minRequiredElementSize (const Value *Val, bool &isSigned) |
| bool | isStridedAccess (const SCEV *Ptr) |
| const SCEVConstant * | getConstantStrideStep (ScalarEvolution *SE, const SCEV *Ptr) |
| bool | isConstantStridedAccessLessThan (ScalarEvolution *SE, const SCEV *Ptr, int64_t MergeDistance) |
Protected Attributes inherited from llvm::TargetTransformInfoImplBase | |
| const DataLayout & | DL |
Definition at line 28 of file ARMTargetTransformInfo.h.
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inlineexplicit |
Definition at line 44 of file ARMTargetTransformInfo.h.
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inline |
Definition at line 48 of file ARMTargetTransformInfo.h.
| int ARMTTIImpl::getAddressComputationCost | ( | Type * | Val, |
| ScalarEvolution * | SE, | ||
| const SCEV * | Ptr | ||
| ) |
Definition at line 341 of file ARMTargetTransformInfo.cpp.
References llvm::TargetTransformInfoImplBase::isConstantStridedAccessLessThan(), and llvm::Type::isVectorTy().
| int ARMTTIImpl::getArithmeticInstrCost | ( | unsigned | Opcode, |
| Type * | Ty, | ||
| TTI::OperandValueKind | Op1Info = TTI::OK_AnyValue, |
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| TTI::OperandValueKind | Op2Info = TTI::OK_AnyValue, |
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| TTI::OperandValueProperties | Opd1PropInfo = TTI::OP_None, |
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| TTI::OperandValueProperties | Opd2PropInfo = TTI::OP_None, |
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| ArrayRef< const Value * > | Args = ArrayRef<const Value *>() |
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| ) |
Definition at line 433 of file ARMTargetTransformInfo.cpp.
References llvm::CostTableLookup(), llvm::TargetTransformInfoImplBase::DL, llvm::BasicTTIImplBase< ARMTTIImpl >::getArithmeticInstrCost(), llvm::TargetLoweringBase::getTypeLegalizationCost(), llvm::ARMSubtarget::hasNEON(), llvm::TargetLoweringBase::InstructionOpcodeToISD(), llvm::AArch64CC::LT, llvm::TargetTransformInfo::OK_UniformConstantValue, llvm::ISD::SDIV, llvm::ISD::SREM, llvm::ISD::UDIV, llvm::ISD::UREM, llvm::MVT::v16i8, llvm::MVT::v1i64, llvm::MVT::v2i32, llvm::MVT::v2i64, llvm::MVT::v4i16, llvm::MVT::v4i32, llvm::MVT::v8i16, and llvm::MVT::v8i8.
Definition at line 95 of file ARMTargetTransformInfo.cpp.
References assert(), llvm::ConvertCostTableLookup(), llvm::CostTableLookup(), llvm::TargetTransformInfoImplBase::DL, llvm::MVT::f32, llvm::MVT::f64, llvm::ISD::FP_EXTEND, llvm::ISD::FP_ROUND, llvm::ISD::FP_TO_SINT, llvm::ISD::FP_TO_UINT, llvm::BasicTTIImplBase< ARMTTIImpl >::getCastInstrCost(), llvm::EVT::getSimpleVT(), llvm::TargetLoweringBase::getTypeLegalizationCost(), llvm::TargetLoweringBase::getValueType(), llvm::ARMSubtarget::hasNEON(), llvm::MVT::i1, llvm::MVT::i16, llvm::MVT::i32, llvm::MVT::i64, llvm::MVT::i8, llvm::TargetLoweringBase::InstructionOpcodeToISD(), llvm::EVT::isFloatingPoint(), llvm::EVT::isInteger(), llvm::EVT::isSimple(), llvm::EVT::isVector(), llvm::Type::isVectorTy(), llvm::AArch64CC::LT, llvm::ISD::SIGN_EXTEND, llvm::ISD::SINT_TO_FP, llvm::ISD::TRUNCATE, llvm::ISD::UINT_TO_FP, llvm::MVT::v16f32, llvm::MVT::v16i16, llvm::MVT::v16i32, llvm::MVT::v16i8, llvm::MVT::v2f32, llvm::MVT::v2f64, llvm::MVT::v2i16, llvm::MVT::v2i32, llvm::MVT::v2i64, llvm::MVT::v2i8, llvm::MVT::v4f32, llvm::MVT::v4i1, llvm::MVT::v4i16, llvm::MVT::v4i32, llvm::MVT::v4i64, llvm::MVT::v4i8, llvm::MVT::v8f32, llvm::MVT::v8i16, llvm::MVT::v8i32, llvm::MVT::v8i64, llvm::MVT::v8i8, and llvm::ISD::ZERO_EXTEND.
Definition at line 313 of file ARMTargetTransformInfo.cpp.
References llvm::ConvertCostTableLookup(), llvm::TargetTransformInfoImplBase::DL, llvm::BasicTTIImplBase< ARMTTIImpl >::getCmpSelInstrCost(), llvm::EVT::getSimpleVT(), llvm::TargetLoweringBase::getTypeLegalizationCost(), llvm::TargetLoweringBase::getValueType(), llvm::ARMSubtarget::hasNEON(), llvm::TargetLoweringBase::InstructionOpcodeToISD(), llvm::EVT::isSimple(), llvm::Type::isVectorTy(), llvm::AArch64CC::LT, llvm::ISD::SELECT, llvm::MVT::v16i1, llvm::MVT::v16i64, llvm::MVT::v4i1, llvm::MVT::v4i64, llvm::MVT::v8i1, and llvm::MVT::v8i64.
| int ARMTTIImpl::getFPOpCost | ( | Type * | Ty | ) |
Definition at line 359 of file ARMTargetTransformInfo.cpp.
References llvm::ARMSubtarget::hasVFP2(), llvm::Type::isDoubleTy(), llvm::Type::isFloatTy(), llvm::ARMSubtarget::isFPOnlySP(), llvm::ARMSubtarget::isThumb1Only(), llvm::TargetTransformInfo::TCC_Basic, and llvm::TargetTransformInfo::TCC_Expensive.
| int ARMTTIImpl::getInterleavedMemoryOpCost | ( | unsigned | Opcode, |
| Type * | VecTy, | ||
| unsigned | Factor, | ||
| ArrayRef< unsigned > | Indices, | ||
| unsigned | Alignment, | ||
| unsigned | AddressSpace | ||
| ) |
Definition at line 519 of file ARMTargetTransformInfo.cpp.
References assert(), llvm::TargetTransformInfoImplBase::DL, llvm::VectorType::get(), llvm::BasicTTIImplBase< ARMTTIImpl >::getInterleavedMemoryOpCost(), llvm::Type::getScalarType(), llvm::DataLayout::getTypeSizeInBits(), and llvm::Type::getVectorNumElements().
| int ARMTTIImpl::getIntImmCodeSizeCost | ( | unsigned | Opcode, |
| unsigned | Idx, | ||
| const APInt & | Imm, | ||
| Type * | Ty | ||
| ) |
Definition at line 53 of file ARMTargetTransformInfo.cpp.
References llvm::APInt::getLimitedValue(), and llvm::APInt::isNonNegative().
Definition at line 18 of file ARMTargetTransformInfo.cpp.
References assert(), llvm::tgtok::Bits, llvm::APInt::getActiveBits(), llvm::Type::getPrimitiveSizeInBits(), llvm::APInt::getSExtValue(), llvm::ARM_AM::getSOImmVal(), llvm::ARM_AM::getT2SOImmVal(), llvm::APInt::getZExtValue(), llvm::ARMSubtarget::hasV6T2Ops(), llvm::Type::isIntegerTy(), llvm::ARMSubtarget::isThumb(), llvm::ARMSubtarget::isThumb2(), and llvm::ARM_AM::isThumbImmShiftedVal().
Referenced by getIntImmCost().
Definition at line 61 of file ARMTargetTransformInfo.cpp.
References llvm::MCID::Add, llvm::APIntOps::And(), llvm::Type::getIntegerBitWidth(), getIntImmCost(), llvm::APInt::getSExtValue(), llvm::APInt::isNegative(), llvm::ARMSubtarget::isThumb(), llvm::ARMSubtarget::isThumb2(), and fuzzer::min().
Definition at line 95 of file ARMTargetTransformInfo.h.
References llvm::ARMSubtarget::getMaxInterleaveFactor().
| int ARMTTIImpl::getMemoryOpCost | ( | unsigned | Opcode, |
| Type * | Src, | ||
| unsigned | Alignment, | ||
| unsigned | AddressSpace | ||
| ) |
Definition at line 506 of file ARMTargetTransformInfo.cpp.
References llvm::TargetTransformInfoImplBase::DL, llvm::TargetLoweringBase::getTypeLegalizationCost(), llvm::Type::getVectorElementType(), llvm::Type::isDoubleTy(), llvm::Type::isVectorTy(), and llvm::AArch64CC::LT.
Definition at line 73 of file ARMTargetTransformInfo.h.
References llvm::ARMSubtarget::hasNEON(), and llvm::ARMSubtarget::isThumb1Only().
Definition at line 85 of file ARMTargetTransformInfo.h.
References llvm::ARMSubtarget::hasNEON().
| int ARMTTIImpl::getShuffleCost | ( | TTI::ShuffleKind | Kind, |
| Type * | Tp, | ||
| int | Index, | ||
| Type * | SubTp | ||
| ) |
Definition at line 378 of file ARMTargetTransformInfo.cpp.
References llvm::CostTableLookup(), llvm::TargetTransformInfoImplBase::DL, llvm::BasicTTIImplBase< ARMTTIImpl >::getShuffleCost(), llvm::TargetLoweringBase::getTypeLegalizationCost(), llvm::AArch64CC::LT, llvm::TargetTransformInfo::SK_Alternate, llvm::TargetTransformInfo::SK_Reverse, llvm::MVT::v16i8, llvm::MVT::v2f32, llvm::MVT::v2f64, llvm::MVT::v2i32, llvm::MVT::v2i64, llvm::MVT::v4f32, llvm::MVT::v4i16, llvm::MVT::v4i32, llvm::MVT::v8i16, and llvm::ISD::VECTOR_SHUFFLE.
Definition at line 288 of file ARMTargetTransformInfo.cpp.
References llvm::Type::getScalarSizeInBits(), llvm::Type::getVectorElementType(), llvm::BasicTTIImplBase< ARMTTIImpl >::getVectorInstrCost(), llvm::ARMSubtarget::hasSlowLoadDSubregister(), llvm::Type::isIntegerTy(), and llvm::Type::isVectorTy().
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inline |
Floating-point computation using ARMv8 AArch32 Advanced SIMD instructions remains unchanged from ARMv7.
Only AArch64 SIMD is IEEE-754 compliant, but it's not covered in this target.
Definition at line 53 of file ARMTargetTransformInfo.h.
References llvm::ARMSubtarget::isTargetDarwin().
Definition at line 127 of file ARMTargetTransformInfo.h.
References llvm::ARMSubtarget::isROPI(), llvm::ARMSubtarget::isRWPI(), and llvm::Constant::needsRelocation().
1.8.6