LLVM  4.0.0
CodeGen/Passes.h
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1 //===-- Passes.h - Target independent code generation passes ----*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file defines interfaces to access the target independent code generation
11 // passes provided by the LLVM backend.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #ifndef LLVM_CODEGEN_PASSES_H
16 #define LLVM_CODEGEN_PASSES_H
17 
18 #include <functional>
19 #include <string>
20 
21 namespace llvm {
22 
23 class FunctionPass;
24 class MachineFunction;
25 class MachineFunctionPass;
26 class ModulePass;
27 class Pass;
28 class TargetMachine;
29 class TargetRegisterClass;
30 class raw_ostream;
31 
32 } // End llvm namespace
33 
34 /// List of target independent CodeGen pass IDs.
35 namespace llvm {
36  FunctionPass *createAtomicExpandPass(const TargetMachine *TM);
37 
38  /// createUnreachableBlockEliminationPass - The LLVM code generator does not
39  /// work well with unreachable basic blocks (what live ranges make sense for a
40  /// block that cannot be reached?). As such, a code generator should either
41  /// not instruction select unreachable blocks, or run this pass as its
42  /// last LLVM modifying pass to clean up blocks that are not reachable from
43  /// the entry block.
45 
46  /// Insert mcount-like function calls.
47  FunctionPass *createCountingFunctionInserterPass();
48 
49  /// MachineFunctionPrinter pass - This pass prints out the machine function to
50  /// the given stream as a debugging tool.
51  MachineFunctionPass *
52  createMachineFunctionPrinterPass(raw_ostream &OS,
53  const std::string &Banner ="");
54 
55  /// MIRPrinting pass - this pass prints out the LLVM IR into the given stream
56  /// using the MIR serialization format.
57  MachineFunctionPass *createPrintMIRPass(raw_ostream &OS);
58 
59  /// This pass resets a MachineFunction when it has the FailedISel property
60  /// as if it was just created.
61  /// If EmitFallbackDiag is true, the pass will emit a
62  /// DiagnosticInfoISelFallback for every MachineFunction it resets.
63  MachineFunctionPass *createResetMachineFunctionPass(bool EmitFallbackDiag);
64 
65  /// createCodeGenPreparePass - Transform the code to expose more pattern
66  /// matching during instruction selection.
67  FunctionPass *createCodeGenPreparePass(const TargetMachine *TM = nullptr);
68 
69  /// AtomicExpandID -- Lowers atomic operations in terms of either cmpxchg
70  /// load-linked/store-conditional loops.
71  extern char &AtomicExpandID;
72 
73  /// MachineLoopInfo - This pass is a loop analysis pass.
74  extern char &MachineLoopInfoID;
75 
76  /// MachineDominators - This pass is a machine dominators analysis pass.
77  extern char &MachineDominatorsID;
78 
79 /// MachineDominanaceFrontier - This pass is a machine dominators analysis pass.
80  extern char &MachineDominanceFrontierID;
81 
82  /// EdgeBundles analysis - Bundle machine CFG edges.
83  extern char &EdgeBundlesID;
84 
85  /// LiveVariables pass - This pass computes the set of blocks in which each
86  /// variable is life and sets machine operand kill flags.
87  extern char &LiveVariablesID;
88 
89  /// PHIElimination - This pass eliminates machine instruction PHI nodes
90  /// by inserting copy instructions. This destroys SSA information, but is the
91  /// desired input for some register allocators. This pass is "required" by
92  /// these register allocator like this: AU.addRequiredID(PHIEliminationID);
93  extern char &PHIEliminationID;
94 
95  /// LiveIntervals - This analysis keeps track of the live ranges of virtual
96  /// and physical registers.
97  extern char &LiveIntervalsID;
98 
99  /// LiveStacks pass. An analysis keeping track of the liveness of stack slots.
100  extern char &LiveStacksID;
101 
102  /// TwoAddressInstruction - This pass reduces two-address instructions to
103  /// use two operands. This destroys SSA information but it is desired by
104  /// register allocators.
105  extern char &TwoAddressInstructionPassID;
106 
107  /// ProcessImpicitDefs pass - This pass removes IMPLICIT_DEFs.
108  extern char &ProcessImplicitDefsID;
109 
110  /// RegisterCoalescer - This pass merges live ranges to eliminate copies.
111  extern char &RegisterCoalescerID;
112 
113  /// MachineScheduler - This pass schedules machine instructions.
114  extern char &MachineSchedulerID;
115 
116  /// PostMachineScheduler - This pass schedules machine instructions postRA.
117  extern char &PostMachineSchedulerID;
118 
119  /// SpillPlacement analysis. Suggest optimal placement of spill code between
120  /// basic blocks.
121  extern char &SpillPlacementID;
122 
123  /// ShrinkWrap pass. Look for the best place to insert save and restore
124  // instruction and update the MachineFunctionInfo with that information.
125  extern char &ShrinkWrapID;
126 
127  /// Greedy register allocator.
128  extern char &RAGreedyID;
129 
130  /// VirtRegRewriter pass. Rewrite virtual registers to physical registers as
131  /// assigned in VirtRegMap.
132  extern char &VirtRegRewriterID;
133 
134  /// UnreachableMachineBlockElimination - This pass removes unreachable
135  /// machine basic blocks.
136  extern char &UnreachableMachineBlockElimID;
137 
138  /// DeadMachineInstructionElim - This pass removes dead machine instructions.
139  extern char &DeadMachineInstructionElimID;
140 
141  /// This pass adds dead/undef flags after analyzing subregister lanes.
142  extern char &DetectDeadLanesID;
143 
144  /// FastRegisterAllocation Pass - This pass register allocates as fast as
145  /// possible. It is best suited for debug code where live ranges are short.
146  ///
147  FunctionPass *createFastRegisterAllocator();
148 
149  /// BasicRegisterAllocation Pass - This pass implements a degenerate global
150  /// register allocator using the basic regalloc framework.
151  ///
152  FunctionPass *createBasicRegisterAllocator();
153 
154  /// Greedy register allocation pass - This pass implements a global register
155  /// allocator for optimized builds.
156  ///
157  FunctionPass *createGreedyRegisterAllocator();
158 
159  /// PBQPRegisterAllocation Pass - This pass implements the Partitioned Boolean
160  /// Quadratic Prograaming (PBQP) based register allocator.
161  ///
162  FunctionPass *createDefaultPBQPRegisterAllocator();
163 
164  /// PrologEpilogCodeInserter - This pass inserts prolog and epilog code,
165  /// and eliminates abstract frame references.
166  extern char &PrologEpilogCodeInserterID;
167  MachineFunctionPass *createPrologEpilogInserterPass(const TargetMachine *TM);
168 
169  /// ExpandPostRAPseudos - This pass expands pseudo instructions after
170  /// register allocation.
171  extern char &ExpandPostRAPseudosID;
172 
173  /// createPostRAHazardRecognizer - This pass runs the post-ra hazard
174  /// recognizer.
175  extern char &PostRAHazardRecognizerID;
176 
177  /// createPostRAScheduler - This pass performs post register allocation
178  /// scheduling.
179  extern char &PostRASchedulerID;
180 
181  /// BranchFolding - This pass performs machine code CFG based
182  /// optimizations to delete branches to branches, eliminate branches to
183  /// successor blocks (creating fall throughs), and eliminating branches over
184  /// branches.
185  extern char &BranchFolderPassID;
186 
187  /// BranchRelaxation - This pass replaces branches that need to jump further
188  /// than is supported by a branch instruction.
189  extern char &BranchRelaxationPassID;
190 
191  /// MachineFunctionPrinterPass - This pass prints out MachineInstr's.
192  extern char &MachineFunctionPrinterPassID;
193 
194  /// MIRPrintingPass - this pass prints out the LLVM IR using the MIR
195  /// serialization format.
196  extern char &MIRPrintingPassID;
197 
198  /// TailDuplicate - Duplicate blocks with unconditional branches
199  /// into tails of their predecessors.
200  extern char &TailDuplicateID;
201 
202  /// MachineTraceMetrics - This pass computes critical path and CPU resource
203  /// usage in an ensemble of traces.
204  extern char &MachineTraceMetricsID;
205 
206  /// EarlyIfConverter - This pass performs if-conversion on SSA form by
207  /// inserting cmov instructions.
208  extern char &EarlyIfConverterID;
209 
210  /// This pass performs instruction combining using trace metrics to estimate
211  /// critical-path and resource depth.
212  extern char &MachineCombinerID;
213 
214  /// StackSlotColoring - This pass performs stack coloring and merging.
215  /// It merges disjoint allocas to reduce the stack size.
216  extern char &StackColoringID;
217 
218  /// IfConverter - This pass performs machine code if conversion.
219  extern char &IfConverterID;
220 
221  FunctionPass *createIfConverter(
222  std::function<bool(const MachineFunction &)> Ftor);
223 
224  /// MachineBlockPlacement - This pass places basic blocks based on branch
225  /// probabilities.
226  extern char &MachineBlockPlacementID;
227 
228  /// MachineBlockPlacementStats - This pass collects statistics about the
229  /// basic block placement using branch probabilities and block frequency
230  /// information.
231  extern char &MachineBlockPlacementStatsID;
232 
233  /// GCLowering Pass - Used by gc.root to perform its default lowering
234  /// operations.
235  FunctionPass *createGCLoweringPass();
236 
237  /// ShadowStackGCLowering - Implements the custom lowering mechanism
238  /// used by the shadow stack GC. Only runs on functions which opt in to
239  /// the shadow stack collector.
240  FunctionPass *createShadowStackGCLoweringPass();
241 
242  /// GCMachineCodeAnalysis - Target-independent pass to mark safe points
243  /// in machine code. Must be added very late during code generation, just
244  /// prior to output, and importantly after all CFG transformations (such as
245  /// branch folding).
246  extern char &GCMachineCodeAnalysisID;
247 
248  /// Creates a pass to print GC metadata.
249  ///
250  FunctionPass *createGCInfoPrinter(raw_ostream &OS);
251 
252  /// MachineCSE - This pass performs global CSE on machine instructions.
253  extern char &MachineCSEID;
254 
255  /// ImplicitNullChecks - This pass folds null pointer checks into nearby
256  /// memory operations.
257  extern char &ImplicitNullChecksID;
258 
259  /// MachineLICM - This pass performs LICM on machine instructions.
260  extern char &MachineLICMID;
261 
262  /// MachineSinking - This pass performs sinking on machine instructions.
263  extern char &MachineSinkingID;
264 
265  /// MachineCopyPropagation - This pass performs copy propagation on
266  /// machine instructions.
267  extern char &MachineCopyPropagationID;
268 
269  /// PeepholeOptimizer - This pass performs peephole optimizations -
270  /// like extension and comparison eliminations.
271  extern char &PeepholeOptimizerID;
272 
273  /// OptimizePHIs - This pass optimizes machine instruction PHIs
274  /// to take advantage of opportunities created during DAG legalization.
275  extern char &OptimizePHIsID;
276 
277  /// StackSlotColoring - This pass performs stack slot coloring.
278  extern char &StackSlotColoringID;
279 
280  /// \brief This pass lays out funclets contiguously.
281  extern char &FuncletLayoutID;
282 
283  /// This pass inserts the XRay instrumentation sleds if they are supported by
284  /// the target platform.
285  extern char &XRayInstrumentationID;
286 
287  /// \brief This pass implements the "patchable-function" attribute.
288  extern char &PatchableFunctionID;
289 
290  /// createStackProtectorPass - This pass adds stack protectors to functions.
291  ///
292  FunctionPass *createStackProtectorPass(const TargetMachine *TM);
293 
294  /// createMachineVerifierPass - This pass verifies cenerated machine code
295  /// instructions for correctness.
296  ///
297  FunctionPass *createMachineVerifierPass(const std::string& Banner);
298 
299  /// createDwarfEHPass - This pass mulches exception handling code into a form
300  /// adapted to code generation. Required if using dwarf exception handling.
301  FunctionPass *createDwarfEHPass(const TargetMachine *TM);
302 
303  /// createWinEHPass - Prepares personality functions used by MSVC on Windows,
304  /// in addition to the Itanium LSDA based personalities.
305  FunctionPass *createWinEHPass(const TargetMachine *TM);
306 
307  /// createSjLjEHPreparePass - This pass adapts exception handling code to use
308  /// the GCC-style builtin setjmp/longjmp (sjlj) to handling EH control flow.
309  ///
310  FunctionPass *createSjLjEHPreparePass();
311 
312  /// LocalStackSlotAllocation - This pass assigns local frame indices to stack
313  /// slots relative to one another and allocates base registers to access them
314  /// when it is estimated by the target to be out of range of normal frame
315  /// pointer or stack pointer index addressing.
316  extern char &LocalStackSlotAllocationID;
317 
318  /// ExpandISelPseudos - This pass expands pseudo-instructions.
319  extern char &ExpandISelPseudosID;
320 
321  /// createExecutionDependencyFixPass - This pass fixes execution time
322  /// problems with dependent instructions, such as switching execution
323  /// domains to match.
324  ///
325  /// The pass will examine instructions using and defining registers in RC.
326  ///
327  FunctionPass *createExecutionDependencyFixPass(const TargetRegisterClass *RC);
328 
329  /// UnpackMachineBundles - This pass unpack machine instruction bundles.
330  extern char &UnpackMachineBundlesID;
331 
332  FunctionPass *
333  createUnpackMachineBundles(std::function<bool(const MachineFunction &)> Ftor);
334 
335  /// FinalizeMachineBundles - This pass finalize machine instruction
336  /// bundles (created earlier, e.g. during pre-RA scheduling).
337  extern char &FinalizeMachineBundlesID;
338 
339  /// StackMapLiveness - This pass analyses the register live-out set of
340  /// stackmap/patchpoint intrinsics and attaches the calculated information to
341  /// the intrinsic for later emission to the StackMap.
342  extern char &StackMapLivenessID;
343 
344  /// LiveDebugValues pass
345  extern char &LiveDebugValuesID;
346 
347  /// createJumpInstrTables - This pass creates jump-instruction tables.
348  ModulePass *createJumpInstrTablesPass();
349 
350  /// createForwardControlFlowIntegrityPass - This pass adds control-flow
351  /// integrity.
353 
354  /// InterleavedAccess Pass - This pass identifies and matches interleaved
355  /// memory accesses to target specific intrinsics.
356  ///
357  FunctionPass *createInterleavedAccessPass(const TargetMachine *TM);
358 
359  /// LowerEmuTLS - This pass generates __emutls_[vt].xyz variables for all
360  /// TLS variables for the emulated TLS model.
361  ///
362  ModulePass *createLowerEmuTLSPass(const TargetMachine *TM);
363 
364  /// This pass lowers the @llvm.load.relative intrinsic to instructions.
365  /// This is unsafe to do earlier because a pass may combine the constant
366  /// initializer into the load, which may result in an overflowing evaluation.
368 
369  /// GlobalMerge - This pass merges internal (by default) globals into structs
370  /// to enable reuse of a base pointer by indexed addressing modes.
371  /// It can also be configured to focus on size optimizations only.
372  ///
373  Pass *createGlobalMergePass(const TargetMachine *TM, unsigned MaximalOffset,
374  bool OnlyOptimizeForSize = false,
375  bool MergeExternalByDefault = false);
376 
377  /// This pass splits the stack into a safe stack and an unsafe stack to
378  /// protect against stack-based overflow vulnerabilities.
379  FunctionPass *createSafeStackPass(const TargetMachine *TM = nullptr);
380 
381  /// This pass detects subregister lanes in a virtual register that are used
382  /// independently of other lanes and splits them into separate virtual
383  /// registers.
384  extern char &RenameIndependentSubregsID;
385 
386  /// This pass is executed POST-RA to collect which physical registers are
387  /// preserved by given machine function.
388  FunctionPass *createRegUsageInfoCollector();
389 
390  /// Return a MachineFunction pass that identifies call sites
391  /// and propagates register usage information of callee to caller
392  /// if available with PysicalRegisterUsageInfo pass.
393  FunctionPass *createRegUsageInfoPropPass();
394 
395  /// This pass performs software pipelining on machine instructions.
396  extern char &MachinePipelinerID;
397 
398  /// This pass frees the memory occupied by the MachineFunction.
399  FunctionPass *createFreeMachineFunctionPass();
400 } // End llvm namespace
401 
402 /// Target machine pass initializer for passes with dependencies. Use with
403 /// INITIALIZE_TM_PASS_END.
404 #define INITIALIZE_TM_PASS_BEGIN INITIALIZE_PASS_BEGIN
405 
406 /// Target machine pass initializer for passes with dependencies. Use with
407 /// INITIALIZE_TM_PASS_BEGIN.
408 #define INITIALIZE_TM_PASS_END(passName, arg, name, cfg, analysis) \
409  PassInfo *PI = new PassInfo( \
410  name, arg, &passName::ID, \
411  PassInfo::NormalCtor_t(callDefaultCtor<passName>), cfg, analysis, \
412  PassInfo::TargetMachineCtor_t(callTargetMachineCtor<passName>)); \
413  Registry.registerPass(*PI, true); \
414  return PI; \
415  } \
416  LLVM_DEFINE_ONCE_FLAG(Initialize##passName##PassFlag); \
417  void llvm::initialize##passName##Pass(PassRegistry &Registry) { \
418  llvm::call_once(Initialize##passName##PassFlag, \
419  initialize##passName##PassOnce, std::ref(Registry)); \
420  }
421 
422 /// This initializer registers TargetMachine constructor, so the pass being
423 /// initialized can use target dependent interfaces. Please do not move this
424 /// macro to be together with INITIALIZE_PASS, which is a complete target
425 /// independent initializer, and we don't want to make libScalarOpts depend
426 /// on libCodeGen.
427 #define INITIALIZE_TM_PASS(passName, arg, name, cfg, analysis) \
428  INITIALIZE_TM_PASS_BEGIN(passName, arg, name, cfg, analysis) \
429  INITIALIZE_TM_PASS_END(passName, arg, name, cfg, analysis)
430 
431 #endif
char & MachineCombinerID
This pass performs instruction combining using trace metrics to estimate critical-path and resource d...
FunctionPass * createCodeGenPreparePass(const TargetMachine *TM=nullptr)
createCodeGenPreparePass - Transform the code to expose more pattern matching during instruction sele...
char & RenameIndependentSubregsID
This pass detects subregister lanes in a virtual register that are used independently of other lanes ...
aarch64 AArch64 CCMP Pass
char & MachineLICMID
MachineLICM - This pass performs LICM on machine instructions.
char & MachineDominatorsID
MachineDominators - This pass is a machine dominators analysis pass.
char & FuncletLayoutID
This pass lays out funclets contiguously.
char & RegisterCoalescerID
RegisterCoalescer - This pass merges live ranges to eliminate copies.
char & EarlyIfConverterID
EarlyIfConverter - This pass performs if-conversion on SSA form by inserting cmov instructions...
FunctionPass * createIfConverter(std::function< bool(const MachineFunction &)> Ftor)
FunctionPass * createWinEHPass(const TargetMachine *TM)
createWinEHPass - Prepares personality functions used by MSVC on Windows, in addition to the Itanium ...
Pass * createGlobalMergePass(const TargetMachine *TM, unsigned MaximalOffset, bool OnlyOptimizeForSize=false, bool MergeExternalByDefault=false)
GlobalMerge - This pass merges internal (by default) globals into structs to enable reuse of a base p...
char & BranchRelaxationPassID
BranchRelaxation - This pass replaces branches that need to jump further than is supported by a branc...
char & MachineSchedulerID
MachineScheduler - This pass schedules machine instructions.
char & AtomicExpandID
AtomicExpandID – Lowers atomic operations in terms of either cmpxchg load-linked/store-conditional lo...
char & RAGreedyID
Greedy register allocator.
char & ProcessImplicitDefsID
ProcessImpicitDefs pass - This pass removes IMPLICIT_DEFs.
char & DetectDeadLanesID
This pass adds dead/undef flags after analyzing subregister lanes.
char & MachineBlockPlacementStatsID
MachineBlockPlacementStats - This pass collects statistics about the basic block placement using bran...
FunctionPass * createShadowStackGCLoweringPass()
ShadowStackGCLowering - Implements the custom lowering mechanism used by the shadow stack GC...
char & MachineFunctionPrinterPassID
MachineFunctionPrinterPass - This pass prints out MachineInstr's.
FunctionPass * createMachineVerifierPass(const std::string &Banner)
createMachineVerifierPass - This pass verifies cenerated machine code instructions for correctness...
MachineFunctionPass * createResetMachineFunctionPass(bool EmitFallbackDiag)
This pass resets a MachineFunction when it has the FailedISel property as if it was just created...
char & MachineLoopInfoID
MachineLoopInfo - This pass is a loop analysis pass.
FunctionPass * createGCLoweringPass()
GCLowering Pass - Used by gc.root to perform its default lowering operations.
char & StackColoringID
StackSlotColoring - This pass performs stack coloring and merging.
FunctionPass * createAtomicExpandPass(const TargetMachine *TM)
FunctionPass * createRegUsageInfoCollector()
This pass is executed POST-RA to collect which physical registers are preserved by given machine func...
FunctionPass * createCountingFunctionInserterPass()
Insert mcount-like function calls.
char & FinalizeMachineBundlesID
FinalizeMachineBundles - This pass finalize machine instruction bundles (created earlier, e.g.
char & XRayInstrumentationID
This pass inserts the XRay instrumentation sleds if they are supported by the target platform...
char & UnreachableMachineBlockElimID
UnreachableMachineBlockElimination - This pass removes unreachable machine basic blocks.
char & MachineCSEID
MachineCSE - This pass performs global CSE on machine instructions.
Definition: MachineCSE.cpp:110
char & StackSlotColoringID
StackSlotColoring - This pass performs stack slot coloring.
char & ExpandPostRAPseudosID
ExpandPostRAPseudos - This pass expands pseudo instructions after register allocation.
char & ExpandISelPseudosID
ExpandISelPseudos - This pass expands pseudo-instructions.
char & DeadMachineInstructionElimID
DeadMachineInstructionElim - This pass removes dead machine instructions.
FunctionPass * createUnreachableBlockEliminationPass()
createUnreachableBlockEliminationPass - The LLVM code generator does not work well with unreachable b...
char & LiveIntervalsID
LiveIntervals - This analysis keeps track of the live ranges of virtual and physical registers...
FunctionPass * createInterleavedAccessPass(const TargetMachine *TM)
InterleavedAccess Pass - This pass identifies and matches interleaved memory accesses to target speci...
FunctionPass * createGCInfoPrinter(raw_ostream &OS)
Creates a pass to print GC metadata.
Definition: GCMetadata.cpp:86
char & PHIEliminationID
PHIElimination - This pass eliminates machine instruction PHI nodes by inserting copy instructions...
char & LiveVariablesID
LiveVariables pass - This pass computes the set of blocks in which each variable is life and sets mac...
ModulePass * createForwardControlFlowIntegrityPass()
createForwardControlFlowIntegrityPass - This pass adds control-flow integrity.
FunctionPass * createRegUsageInfoPropPass()
Return a MachineFunction pass that identifies call sites and propagates register usage information of...
char & LiveStacksID
LiveStacks pass. An analysis keeping track of the liveness of stack slots.
FunctionPass * createFreeMachineFunctionPass()
This pass frees the memory occupied by the MachineFunction.
FunctionPass * createDefaultPBQPRegisterAllocator()
PBQPRegisterAllocation Pass - This pass implements the Partitioned Boolean Quadratic Prograaming (PBQ...
char & LiveDebugValuesID
LiveDebugValues pass.
FunctionPass * createSafeStackPass(const TargetMachine *TM=nullptr)
This pass splits the stack into a safe stack and an unsafe stack to protect against stack-based overf...
Definition: SafeStack.cpp:799
char & MIRPrintingPassID
MIRPrintingPass - this pass prints out the LLVM IR using the MIR serialization format.
char & UnpackMachineBundlesID
UnpackMachineBundles - This pass unpack machine instruction bundles.
char & MachineCopyPropagationID
MachineCopyPropagation - This pass performs copy propagation on machine instructions.
MachineFunctionPass * createPrologEpilogInserterPass(const TargetMachine *TM)
char & ImplicitNullChecksID
ImplicitNullChecks - This pass folds null pointer checks into nearby memory operations.
char & PostRASchedulerID
createPostRAScheduler - This pass performs post register allocation scheduling.
FunctionPass * createStackProtectorPass(const TargetMachine *TM)
createStackProtectorPass - This pass adds stack protectors to functions.
char & StackMapLivenessID
StackMapLiveness - This pass analyses the register live-out set of stackmap/patchpoint intrinsics and...
FunctionPass * createExecutionDependencyFixPass(const TargetRegisterClass *RC)
createExecutionDependencyFixPass - This pass fixes execution time problems with dependent instruction...
char & TailDuplicateID
TailDuplicate - Duplicate blocks with unconditional branches into tails of their predecessors.
char & MachineSinkingID
MachineSinking - This pass performs sinking on machine instructions.
FunctionPass * createBasicRegisterAllocator()
BasicRegisterAllocation Pass - This pass implements a degenerate global register allocator using the ...
char & MachinePipelinerID
This pass performs software pipelining on machine instructions.
MachineFunctionPass * createMachineFunctionPrinterPass(raw_ostream &OS, const std::string &Banner="")
MachineFunctionPrinter pass - This pass prints out the machine function to the given stream as a debu...
char & MachineTraceMetricsID
MachineTraceMetrics - This pass computes critical path and CPU resource usage in an ensemble of trace...
FunctionPass * createUnpackMachineBundles(std::function< bool(const MachineFunction &)> Ftor)
char & OptimizePHIsID
OptimizePHIs - This pass optimizes machine instruction PHIs to take advantage of opportunities create...
char & MachineDominanceFrontierID
MachineDominanaceFrontier - This pass is a machine dominators analysis pass.
char & PeepholeOptimizerID
PeepholeOptimizer - This pass performs peephole optimizations - like extension and comparison elimina...
char & PrologEpilogCodeInserterID
PrologEpilogCodeInserter - This pass inserts prolog and epilog code, and eliminates abstract frame re...
char & PatchableFunctionID
This pass implements the "patchable-function" attribute.
char & GCMachineCodeAnalysisID
GCMachineCodeAnalysis - Target-independent pass to mark safe points in machine code.
char & PostMachineSchedulerID
PostMachineScheduler - This pass schedules machine instructions postRA.
FunctionPass * createDwarfEHPass(const TargetMachine *TM)
createDwarfEHPass - This pass mulches exception handling code into a form adapted to code generation...
char & IfConverterID
IfConverter - This pass performs machine code if conversion.
FunctionPass * createGreedyRegisterAllocator()
Greedy register allocation pass - This pass implements a global register allocator for optimized buil...
char & MachineBlockPlacementID
MachineBlockPlacement - This pass places basic blocks based on branch probabilities.
char & SpillPlacementID
SpillPlacement analysis.
ModulePass * createLowerEmuTLSPass(const TargetMachine *TM)
LowerEmuTLS - This pass generates __emutls_[vt].xyz variables for all TLS variables for the emulated ...
char & EdgeBundlesID
EdgeBundles analysis - Bundle machine CFG edges.
char & TwoAddressInstructionPassID
TwoAddressInstruction - This pass reduces two-address instructions to use two operands.
FunctionPass * createSjLjEHPreparePass()
createSjLjEHPreparePass - This pass adapts exception handling code to use the GCC-style builtin setjm...
FunctionPass * createFastRegisterAllocator()
FastRegisterAllocation Pass - This pass register allocates as fast as possible.
char & PostRAHazardRecognizerID
createPostRAHazardRecognizer - This pass runs the post-ra hazard recognizer.
ModulePass * createPreISelIntrinsicLoweringPass()
This pass lowers the .load.relative intrinsic to instructions.
char & VirtRegRewriterID
VirtRegRewriter pass.
Definition: VirtRegMap.cpp:185
char & BranchFolderPassID
BranchFolding - This pass performs machine code CFG based optimizations to delete branches to branche...
print Print MemDeps of function
char & ShrinkWrapID
ShrinkWrap pass. Look for the best place to insert save and restore.
Definition: ShrinkWrap.cpp:211
char & LocalStackSlotAllocationID
LocalStackSlotAllocation - This pass assigns local frame indices to stack slots relative to one anoth...
MachineFunctionPass * createPrintMIRPass(raw_ostream &OS)
MIRPrinting pass - this pass prints out the LLVM IR into the given stream using the MIR serialization...
ModulePass * createJumpInstrTablesPass()
createJumpInstrTables - This pass creates jump-instruction tables.