LLVM  4.0.0
Classes | Public Types | Public Member Functions | Static Public Member Functions | Public Attributes | List of all members
llvm::MVT Class Reference

MVT - Machine Value Type. More...

#include <MachineValueType.h>

Collaboration diagram for llvm::MVT:
[legend]

Public Types

enum  SimpleValueType : int8_t {
  INVALID_SIMPLE_VALUE_TYPE = -1, Other = 0, i1 = 1, i8 = 2,
  i16 = 3, i32 = 4, i64 = 5, i128 = 6,
  FIRST_INTEGER_VALUETYPE = i1, LAST_INTEGER_VALUETYPE = i128, f16 = 7, f32 = 8,
  f64 = 9, f80 = 10, f128 = 11, ppcf128 = 12,
  FIRST_FP_VALUETYPE = f16, LAST_FP_VALUETYPE = ppcf128, v2i1 = 13, v4i1 = 14,
  v8i1 = 15, v16i1 = 16, v32i1 = 17, v64i1 = 18,
  v512i1 = 19, v1024i1 = 20, v1i8 = 21, v2i8 = 22,
  v4i8 = 23, v8i8 = 24, v16i8 = 25, v32i8 = 26,
  v64i8 = 27, v128i8 = 28, v256i8 = 29, v1i16 = 30,
  v2i16 = 31, v4i16 = 32, v8i16 = 33, v16i16 = 34,
  v32i16 = 35, v64i16 = 36, v128i16 = 37, v1i32 = 38,
  v2i32 = 39, v4i32 = 40, v8i32 = 41, v16i32 = 42,
  v32i32 = 43, v64i32 = 44, v1i64 = 45, v2i64 = 46,
  v4i64 = 47, v8i64 = 48, v16i64 = 49, v32i64 = 50,
  v1i128 = 51, FIRST_INTEGER_VECTOR_VALUETYPE = v2i1, LAST_INTEGER_VECTOR_VALUETYPE = v1i128, v2f16 = 52,
  v4f16 = 53, v8f16 = 54, v1f32 = 55, v2f32 = 56,
  v4f32 = 57, v8f32 = 58, v16f32 = 59, v1f64 = 60,
  v2f64 = 61, v4f64 = 62, v8f64 = 63, FIRST_FP_VECTOR_VALUETYPE = v2f16,
  LAST_FP_VECTOR_VALUETYPE = v8f64, FIRST_VECTOR_VALUETYPE = v2i1, LAST_VECTOR_VALUETYPE = v8f64, x86mmx = 64,
  Glue = 65, isVoid = 66, Untyped = 67, FIRST_VALUETYPE = 0,
  LAST_VALUETYPE = 68, MAX_ALLOWED_VALUETYPE = 96, token = 120, Metadata = 121,
  iPTRAny = 122, vAny = 123, fAny = 124, iAny = 125,
  iPTR = 126, Any = 127
}
 

Public Member Functions

constexpr MVT ()
 
constexpr MVT (SimpleValueType SVT)
 
bool operator> (const MVT &S) const
 
bool operator< (const MVT &S) const
 
bool operator== (const MVT &S) const
 
bool operator!= (const MVT &S) const
 
bool operator>= (const MVT &S) const
 
bool operator<= (const MVT &S) const
 
bool isValid () const
 isValid - Return true if this is a valid simple valuetype. More...
 
bool isFloatingPoint () const
 isFloatingPoint - Return true if this is a FP, or a vector FP type. More...
 
bool isInteger () const
 isInteger - Return true if this is an integer, or a vector integer type. More...
 
bool isScalarInteger () const
 isScalarInteger - Return true if this is an integer, not including vectors. More...
 
bool isVector () const
 isVector - Return true if this is a vector value type. More...
 
bool is16BitVector () const
 is16BitVector - Return true if this is a 16-bit vector type. More...
 
bool is32BitVector () const
 is32BitVector - Return true if this is a 32-bit vector type. More...
 
bool is64BitVector () const
 is64BitVector - Return true if this is a 64-bit vector type. More...
 
bool is128BitVector () const
 is128BitVector - Return true if this is a 128-bit vector type. More...
 
bool is256BitVector () const
 is256BitVector - Return true if this is a 256-bit vector type. More...
 
bool is512BitVector () const
 is512BitVector - Return true if this is a 512-bit vector type. More...
 
bool is1024BitVector () const
 is1024BitVector - Return true if this is a 1024-bit vector type. More...
 
bool is2048BitVector () const
 is2048BitVector - Return true if this is a 1024-bit vector type. More...
 
bool isOverloaded () const
 isOverloaded - Return true if this is an overloaded type for TableGen. More...
 
bool isPow2VectorType () const
 isPow2VectorType - Returns true if the given vector is a power of 2. More...
 
MVT getPow2VectorType () const
 getPow2VectorType - Widens the length of the given vector MVT up to the nearest power of 2 and returns that type. More...
 
MVT getScalarType () const
 getScalarType - If this is a vector type, return the element type, otherwise return this. More...
 
MVT getVectorElementType () const
 
unsigned getVectorNumElements () const
 
unsigned getSizeInBits () const
 
unsigned getScalarSizeInBits () const
 
unsigned getStoreSize () const
 getStoreSize - Return the number of bytes overwritten by a store of the specified value type. More...
 
unsigned getStoreSizeInBits () const
 getStoreSizeInBits - Return the number of bits overwritten by a store of the specified value type. More...
 
bool bitsGT (MVT VT) const
 Return true if this has more bits than VT. More...
 
bool bitsGE (MVT VT) const
 Return true if this has no less bits than VT. More...
 
bool bitsLT (MVT VT) const
 Return true if this has less bits than VT. More...
 
bool bitsLE (MVT VT) const
 Return true if this has no more bits than VT. More...
 

Static Public Member Functions

static MVT getFloatingPointVT (unsigned BitWidth)
 
static MVT getIntegerVT (unsigned BitWidth)
 
static MVT getVectorVT (MVT VT, unsigned NumElements)
 
static MVT getVT (Type *Ty, bool HandleUnknown=false)
 Return the value type corresponding to the specified type. More...
 
static mvt_range all_valuetypes ()
 SimpleValueType Iteration. More...
 
static mvt_range integer_valuetypes ()
 
static mvt_range fp_valuetypes ()
 
static mvt_range vector_valuetypes ()
 
static mvt_range integer_vector_valuetypes ()
 
static mvt_range fp_vector_valuetypes ()
 

Public Attributes

SimpleValueType SimpleTy
 

Detailed Description

MVT - Machine Value Type.

Every type that is supported natively by some processor targeted by LLVM occurs here. This means that any legal value type can be represented by an MVT.

Definition at line 29 of file MachineValueType.h.

Member Enumeration Documentation

Enumerator
INVALID_SIMPLE_VALUE_TYPE 
Other 
i1 
i8 
i16 
i32 
i64 
i128 
FIRST_INTEGER_VALUETYPE 
LAST_INTEGER_VALUETYPE 
f16 
f32 
f64 
f80 
f128 
ppcf128 
FIRST_FP_VALUETYPE 
LAST_FP_VALUETYPE 
v2i1 
v4i1 
v8i1 
v16i1 
v32i1 
v64i1 
v512i1 
v1024i1 
v1i8 
v2i8 
v4i8 
v8i8 
v16i8 
v32i8 
v64i8 
v128i8 
v256i8 
v1i16 
v2i16 
v4i16 
v8i16 
v16i16 
v32i16 
v64i16 
v128i16 
v1i32 
v2i32 
v4i32 
v8i32 
v16i32 
v32i32 
v64i32 
v1i64 
v2i64 
v4i64 
v8i64 
v16i64 
v32i64 
v1i128 
FIRST_INTEGER_VECTOR_VALUETYPE 
LAST_INTEGER_VECTOR_VALUETYPE 
v2f16 
v4f16 
v8f16 
v1f32 
v2f32 
v4f32 
v8f32 
v16f32 
v1f64 
v2f64 
v4f64 
v8f64 
FIRST_FP_VECTOR_VALUETYPE 
LAST_FP_VECTOR_VALUETYPE 
FIRST_VECTOR_VALUETYPE 
LAST_VECTOR_VALUETYPE 
x86mmx 
Glue 
isVoid 
Untyped 
FIRST_VALUETYPE 
LAST_VALUETYPE 
MAX_ALLOWED_VALUETYPE 
token 
Metadata 
iPTRAny 
vAny 
fAny 
iAny 
iPTR 
Any 

Definition at line 31 of file MachineValueType.h.

Constructor & Destructor Documentation

constexpr llvm::MVT::MVT ( )
inline

Definition at line 181 of file MachineValueType.h.

Referenced by getVT().

constexpr llvm::MVT::MVT ( SimpleValueType  SVT)
inline

Definition at line 182 of file MachineValueType.h.

Member Function Documentation

static mvt_range llvm::MVT::all_valuetypes ( )
inlinestatic

SimpleValueType Iteration.

Definition at line 690 of file MachineValueType.h.

References FIRST_VALUETYPE, and LAST_VALUETYPE.

Referenced by llvm::TargetLoweringBase::initActions().

bool llvm::MVT::bitsGE ( MVT  VT) const
inline

Return true if this has no less bits than VT.

Definition at line 537 of file MachineValueType.h.

References getSizeInBits().

Referenced by combineOrCmpEqZeroToCtlzSrl().

bool llvm::MVT::bitsGT ( MVT  VT) const
inline

Return true if this has more bits than VT.

Definition at line 532 of file MachineValueType.h.

References getSizeInBits().

Referenced by llvm::X86TargetLowering::BuildFILD(), getMaskNode(), LowerFCOPYSIGN(), and LowerScalarVariableShift().

bool llvm::MVT::bitsLE ( MVT  VT) const
inline

Return true if this has no more bits than VT.

Definition at line 547 of file MachineValueType.h.

References getSizeInBits().

Referenced by LowerScalarVariableShift().

bool llvm::MVT::bitsLT ( MVT  VT) const
inline

Return true if this has less bits than VT.

Definition at line 542 of file MachineValueType.h.

References getSizeInBits().

Referenced by llvm::X86TargetLowering::BuildFILD(), LowerFCOPYSIGN(), and LowerScalarVariableShift().

static mvt_range llvm::MVT::fp_valuetypes ( )
inlinestatic
static mvt_range llvm::MVT::fp_vector_valuetypes ( )
inlinestatic
static MVT llvm::MVT::getFloatingPointVT ( unsigned  BitWidth)
inlinestatic
static MVT llvm::MVT::getIntegerVT ( unsigned  BitWidth)
inlinestatic
MVT llvm::MVT::getPow2VectorType ( ) const
inline

getPow2VectorType - Widens the length of the given vector MVT up to the nearest power of 2 and returns that type.

Definition at line 298 of file MachineValueType.h.

References getVectorElementType(), getVectorNumElements(), getVectorVT(), isPow2VectorType(), and llvm::Log2_32_Ceil().

Referenced by llvm::TargetLoweringBase::computeRegisterProperties().

unsigned llvm::MVT::getScalarSizeInBits ( ) const
inline

Definition at line 515 of file MachineValueType.h.

References getScalarType(), and getSizeInBits().

Referenced by combineX86ShuffleChain(), llvm::TargetLoweringBase::computeRegisterProperties(), createUnpackShuffleMask(), llvm::DecodeBLENDMask(), llvm::DecodeMOVDDUPMask(), llvm::DecodePALIGNRMask(), llvm::DecodeVPERMIL2PMask(), llvm::DecodeVPERMILPMask(), llvm::DecodeVPERMMask(), llvm::decodeVSHUF64x2FamilyMask(), llvm::DecodeZeroExtendMask(), getConstantVector(), getConstVector(), getFauxShuffleMask(), getPSHUFShuffleMask(), getScalarValueForVectorElement(), getTargetShuffleMask(), getTargetShuffleMaskIndices(), is128BitLaneCrossingShuffleMask(), isRepeatedShuffleMask(), isRepeatedTargetShuffleMask(), isVEXTRACTIndex(), isVINSERTIndex(), lower256BitVectorShuffle(), LowerBITREVERSE_XOP(), LowerCTTZ(), LowerEXTEND_VECTOR_INREG(), LowerExtendedLoad(), LowerFCOPYSIGN(), LowerMGATHER(), LowerMSCATTER(), LowerMSTORE(), LowerRotate(), lowerShuffleAsRepeatedMaskAndLanePermute(), LowerTruncateVecI1(), lowerV4X128VectorShuffle(), LowerVectorBroadcast(), LowerVectorCTLZ_AVX512(), LowerVectorCTLZInRegLUT(), lowerVectorShuffle(), lowerVectorShuffleAsBlend(), lowerVectorShuffleAsBroadcast(), lowerVectorShuffleAsPermuteAndUnpack(), lowerVectorShuffleAsShift(), lowerVectorShuffleAsSpecificZeroOrAnyExtend(), lowerVectorShuffleAsZeroOrAnyExtend(), lowerVectorShuffleByMerging128BitLanes(), lowerVectorShuffleWithPERMV(), lowerVectorShuffleWithPSHUFB(), lowerVectorShuffleWithSSE4A(), LowerVSETCC(), LowerZERO_EXTEND_AVX512(), matchBinaryVectorShuffle(), matchUnaryPermuteVectorShuffle(), matchUnaryVectorShuffle(), performShiftToAllZeros(), SupportedVectorShiftWithImm(), and SupportedVectorVarShift().

MVT llvm::MVT::getScalarType ( ) const
inline
unsigned llvm::MVT::getSizeInBits ( ) const
inline

Definition at line 429 of file MachineValueType.h.

References Any, f128, f16, f32, f64, f80, fAny, i1, i128, i16, i32, i64, i8, iAny, iPTR, iPTRAny, llvm_unreachable, Other, ppcf128, SimpleTy, token, v1024i1, v128i16, v128i8, v16f32, v16i1, v16i16, v16i32, v16i64, v16i8, v1f32, v1f64, v1i128, v1i16, v1i32, v1i64, v1i8, v256i8, v2f16, v2f32, v2f64, v2i1, v2i16, v2i32, v2i64, v2i8, v32i1, v32i16, v32i32, v32i64, v32i8, v4f16, v4f32, v4f64, v4i1, v4i16, v4i32, v4i64, v4i8, v512i1, v64i1, v64i16, v64i32, v64i8, v8f16, v8f32, v8f64, v8i1, v8i16, v8i32, v8i64, v8i8, vAny, and x86mmx.

Referenced by bitsGE(), bitsGT(), bitsLE(), bitsLT(), llvm::CC_ARM_AAPCS_Custom_Aggregate(), CC_MipsO32(), CC_Sparc64_Full(), CC_Sparc64_Half(), llvm::CC_X86_32_VectorCall(), llvm::CC_X86_64_VectorCall(), llvm::EVT::changeVectorElementTypeToInteger(), CombineBaseUpdate(), combineBitcastForMaskedOp(), combineLoopSADPattern(), combineStore(), combineVectorSignBitsTruncation(), combineVSZext(), combineX86ShuffleChain(), combineX86ShufflesConstants(), combineX86ShufflesRecursively(), llvm::TargetLoweringBase::computeRegisterProperties(), llvm::DecodeMOVDDUPMask(), llvm::DecodePALIGNRMask(), llvm::DecodePSHUFMask(), llvm::DecodePSLLDQMask(), llvm::DecodePSRLDQMask(), llvm::DecodeSHUFPMask(), llvm::DecodeSubVectorBroadcast(), llvm::DecodeUNPCKHMask(), llvm::DecodeUNPCKLMask(), llvm::DecodeVPERMIL2PMask(), llvm::DecodeVPERMILPMask(), llvm::decodeVSHUF64x2FamilyMask(), llvm::DecodeZeroExtendMask(), EltsFromConsecutiveLoads(), EmitKTEST(), llvm::X86SelectionDAGInfo::EmitTargetCodeForMemcpy(), llvm::TargetLowering::expandUnalignedLoad(), llvm::TargetLowering::expandUnalignedStore(), llvm::FastISel::fastEmit_ri_(), foldMaskAndShiftToScale(), getCopyFromParts(), getCopyFromPartsVector(), llvm::RegsForValue::getCopyFromRegs(), getCopyToParts(), getCopyToPartsVector(), getExtractVEXTRACTImmediate(), getFauxShuffleMask(), getInsertVINSERTImmediate(), getMaskNode(), llvm::TargetLoweringBase::getNumRegisters(), getPromotedVectorElementType(), getPSHUFShuffleMask(), llvm::SITargetLowering::getRegForInlineAsmConstraint(), llvm::ARMTargetLowering::getRegForInlineAsmConstraint(), llvm::X86TargetLowering::getRegForInlineAsmConstraint(), GetRegistersForValue(), getRegOperandVectorVT(), getScalarSizeInBits(), getScalarValueForVectorElement(), llvm::X86TargetLowering::getSetCCResultType(), llvm::X86TTIImpl::getShuffleCost(), llvm::EVT::getSizeInBits(), getStoreSize(), getTargetShuffleMaskIndices(), getTargetVShiftByConstNode(), getTargetVShiftNode(), llvm::TargetLoweringBase::getVectorTypeBreakdown(), getVectorTypeBreakdownMVT(), getZeroVector(), llvm::CallLowering::handleAssignments(), llvm::HexagonTargetLowering::HexagonTargetLowering(), insert128BitVector(), insert1BitVector(), isHorizontalBinOp(), llvm::X86TargetLowering::isShuffleMaskLegal(), isSupportedType(), llvm::LLT::LLT(), LowerAsSplatVectorLoad(), LowerBITCAST(), LowerBITREVERSE_XOP(), llvm::TargetLowering::LowerCallTo(), LowerCONCAT_VECTORSvXi1(), LowerCTLZ(), LowerEXTEND_VECTOR_INREG(), LowerExtendedLoad(), llvm::HexagonTargetLowering::LowerEXTRACT_VECTOR(), LowerEXTRACT_VECTOR_ELT_SSE4(), LowerFABSorFNEG(), llvm::SparcTargetLowering::LowerFormalArguments_64(), LowerHorizontalByteSum(), LowerINSERT_SUBVECTOR(), LowerINTRINSIC_WO_CHAIN(), LowerMLOAD(), LowerMSTORE(), LowerMUL(), LowerSCALAR_TO_VECTOR(), LowerShift(), LowerShiftParts(), lowerShuffleAsRepeatedMaskAndLanePermute(), LowerSIGN_EXTEND_AVX512(), llvm::LanaiTargetLowering::LowerSRL_PARTS(), LowerTruncateVecI1(), LowerVectorBroadcast(), LowerVectorCTLZ_AVX512(), LowerVectorCTPOPBitmath(), LowerVectorCTPOPInRegLUT(), lowerVectorShuffle(), lowerVectorShuffleAsBitBlend(), lowerVectorShuffleAsBlend(), lowerVectorShuffleAsByteRotate(), lowerVectorShuffleAsElementInsertion(), lowerVectorShuffleAsSpecificZeroOrAnyExtend(), lowerVectorShuffleAsSplitOrBlend(), lowerVectorShuffleAsZeroOrAnyExtend(), lowerVectorShuffleByMerging128BitLanes(), lowerVectorShuffleWithPSHUFB(), LowerVSETCC(), lowerX86FPLogicOp(), matchBinaryPermuteVectorShuffle(), MatchingStackOffset(), matchUnaryPermuteVectorShuffle(), llvm::TargetLowering::ParseConstraints(), performBitcastCombine(), performFDivCombine(), performFpToIntCombine(), PerformSTORECombine(), PerformVCVTCombine(), PerformVDIVCombine(), splitAndLowerVectorShuffle(), tryCombineShiftImm(), and UnpackFromArgumentSlot().

unsigned llvm::MVT::getStoreSize ( ) const
inline
unsigned llvm::MVT::getStoreSizeInBits ( ) const
inline

getStoreSizeInBits - Return the number of bits overwritten by a store of the specified value type.

Definition at line 527 of file MachineValueType.h.

References getStoreSize().

Referenced by llvm::HexagonTargetLowering::LowerCall(), and llvm::HexagonTargetLowering::LowerFormalArguments().

MVT llvm::MVT::getVectorElementType ( ) const
inline

Definition at line 313 of file MachineValueType.h.

References f16, f32, f64, i1, i128, i16, i32, i64, i8, llvm_unreachable, SimpleTy, v1024i1, v128i16, v128i8, v16f32, v16i1, v16i16, v16i32, v16i64, v16i8, v1f32, v1f64, v1i128, v1i16, v1i32, v1i64, v1i8, v256i8, v2f16, v2f32, v2f64, v2i1, v2i16, v2i32, v2i64, v2i8, v32i1, v32i16, v32i32, v32i64, v32i8, v4f16, v4f32, v4f64, v4i1, v4i16, v4i32, v4i64, v4i8, v512i1, v64i1, v64i16, v64i32, v64i8, v8f16, v8f32, v8f64, v8i1, v8i16, v8i32, v8i64, and v8i8.

Referenced by llvm::EVT::changeVectorElementTypeToInteger(), ChangeVSETULTtoVSETULE(), combineBitcastForMaskedOp(), combineRedundantDWordShuffle(), combineTargetShuffle(), combineVSZext(), llvm::TargetLoweringBase::computeRegisterProperties(), EmitKTEST(), ExtendToType(), getConstVector(), getCopyToPartsVector(), getExtractVEXTRACTImmediate(), getInsertVINSERTImmediate(), getPow2VectorType(), getScalarType(), getScalarValueForVectorElement(), llvm::X86TargetLowering::getSetCCResultType(), llvm::X86TTIImpl::getShuffleCost(), getShuffleScalarElt(), getTargetVShiftByConstNode(), getTargetVShiftNode(), getUnderlyingExtractedFromVec(), llvm::EVT::getVectorElementType(), getVectorTypeBreakdownMVT(), getZeroVector(), llvm::HexagonTargetLowering::HexagonTargetLowering(), llvm::LLT::LLT(), Lower256IntArith(), Lower256IntVSETCC(), Lower512IntArith(), LowerAVXCONCAT_VECTORS(), LowerAVXExtend(), LowerBITCAST(), LowerBITREVERSE_XOP(), LowerBoolVSETCC_AVX512(), LowerCONCAT_VECTORS(), LowerCONCAT_VECTORSvXi1(), LowerEXTEND_VECTOR_INREG(), LowerFABSorFNEG(), llvm::SITargetLowering::LowerFormalArguments(), LowerHorizontalByteSum(), LowerINSERT_SUBVECTOR(), LowerIntVSETCC_AVX512(), llvm::SITargetLowering::LowerReturn(), LowerSCALAR_TO_VECTOR(), LowerScalarVariableShift(), LowerShift(), LowerSIGN_EXTEND(), LowerSIGN_EXTEND_AVX512(), LowerTruncateVecI1(), lowerV2X128VectorShuffle(), lowerV4X128VectorShuffle(), lowerV8I16GeneralSingleInputVectorShuffle(), LowerVectorCTLZ_AVX512(), LowerVectorCTPOPBitmath(), LowerVectorCTPOPInRegLUT(), lowerVectorShuffle(), lowerVectorShuffleAsBitBlend(), lowerVectorShuffleAsBitMask(), lowerVectorShuffleAsElementInsertion(), lowerVectorShuffleAsTruncBroadcast(), lowerVectorShuffleWithUndefHalf(), LowerVSETCC(), LowerZERO_EXTEND(), LowerZERO_EXTEND_AVX512(), performConcatVectorsCombine(), performFDivCombine(), performFpToIntCombine(), PerformVCVTCombine(), PerformVDIVCombine(), splitAndLowerVectorShuffle(), and tryExtendDUPToExtractHigh().

unsigned llvm::MVT::getVectorNumElements ( ) const
inline

Definition at line 371 of file MachineValueType.h.

References llvm_unreachable, SimpleTy, v1024i1, v128i16, v128i8, v16f32, v16i1, v16i16, v16i32, v16i64, v16i8, v1f32, v1f64, v1i128, v1i16, v1i32, v1i64, v1i8, v256i8, v2f16, v2f32, v2f64, v2i1, v2i16, v2i32, v2i64, v2i8, v32i1, v32i16, v32i32, v32i64, v32i8, v4f16, v4f32, v4f64, v4i1, v4i16, v4i32, v4i64, v4i8, v512i1, v64i1, v64i16, v64i32, v64i8, v8f16, v8f32, v8f64, v8i1, v8i16, v8i32, v8i64, and v8i8.

Referenced by llvm::AMDGPUTargetLowering::analyzeFormalArgumentsCompute(), ChangeVSETULTtoVSETULE(), combineBasicSADPattern(), combineTargetShuffle(), combineVSZext(), combineX86ShuffleChain(), llvm::TargetLoweringBase::computeRegisterProperties(), createUnpackShuffleMask(), llvm::DecodeBLENDMask(), llvm::DecodeInsertElementMask(), llvm::DecodeMOVDDUPMask(), llvm::DecodeMOVSHDUPMask(), llvm::DecodeMOVSLDUPMask(), llvm::DecodePALIGNRMask(), llvm::DecodePSHUFHWMask(), llvm::DecodePSHUFLWMask(), llvm::DecodePSHUFMask(), llvm::DecodePSWAPMask(), llvm::DecodeScalarMoveMask(), llvm::DecodeSHUFPMask(), llvm::DecodeSubVectorBroadcast(), llvm::DecodeUNPCKHMask(), llvm::DecodeUNPCKLMask(), llvm::DecodeVALIGNMask(), llvm::DecodeVectorBroadcast(), llvm::DecodeVPERM2X128Mask(), llvm::DecodeVPERMIL2PMask(), llvm::DecodeVPERMILPMask(), llvm::DecodeVPERMMask(), llvm::DecodeZeroExtendMask(), llvm::DecodeZeroMoveLowMask(), ExpandHorizontalBinOp(), ExtendToType(), getConstVector(), getCopyToPartsVector(), getFauxShuffleMask(), getGatherNode(), llvm::X86TTIImpl::getInterleavedMemoryOpCostAVX512(), llvm::X86TTIImpl::getMaskedMemoryOpCost(), getMOVL(), getPow2VectorType(), getPrefetchNode(), getScatterNode(), llvm::X86TargetLowering::getSetCCResultType(), llvm::X86TTIImpl::getShuffleCost(), getShuffleScalarElt(), getShuffleVectorZeroOrUndef(), getTargetShuffleMask(), getTargetShuffleMaskIndices(), llvm::X86TargetLowering::getTgtMemIntrinsic(), getUnderlyingExtractedFromVec(), getVectorMaskingNode(), llvm::EVT::getVectorNumElements(), getVectorTypeBreakdownMVT(), getZeroVector(), insert1BitVector(), isAddSub(), isHorizontalBinOp(), isPow2VectorType(), llvm::LLT::LLT(), lower1BitVectorShuffle(), lower256BitVectorShuffle(), Lower256IntArith(), Lower256IntVSETCC(), Lower512IntArith(), LowerAsSplatVectorLoad(), LowerAVXCONCAT_VECTORS(), LowerAVXExtend(), LowerBITCAST(), LowerBITREVERSE_XOP(), lowerBuildVectorToBitOp(), LowerCONCAT_VECTORSvXi1(), LowerEXTEND_VECTOR_INREG(), LowerExtended1BitVectorLoad(), LowerExtendedLoad(), llvm::SITargetLowering::LowerFormalArguments(), LowerINSERT_SUBVECTOR(), LowerINTRINSIC_W_CHAIN(), LowerINTRINSIC_WO_CHAIN(), LowerMGATHER(), LowerMSCATTER(), LowerMSTORE(), LowerMUL(), LowerMUL_LOHI(), LowerMULH(), LowerSCALAR_TO_VECTOR(), LowerScalarImmediateShift(), LowerScalarVariableShift(), lowerShuffleAsRepeatedMaskAndLanePermute(), LowerSIGN_EXTEND(), LowerSIGN_EXTEND_AVX512(), llvm::AMDGPUTargetLowering::LowerSIGN_EXTEND_INREG(), LowerToHorizontalOp(), LowerTruncateVecI1(), LowerTruncatingStore(), lowerV2X128VectorShuffle(), lowerV8I16GeneralSingleInputVectorShuffle(), LowerVectorBroadcast(), LowerVectorCTLZ(), LowerVectorCTLZ_AVX512(), LowerVectorCTLZInRegLUT(), LowerVectorCTPOP(), lowerVectorShuffle(), lowerVectorShuffleAsBlend(), lowerVectorShuffleAsBroadcast(), lowerVectorShuffleAsElementInsertion(), lowerVectorShuffleAsShift(), lowerVectorShuffleAsSpecificZeroOrAnyExtend(), lowerVectorShuffleAsZeroOrAnyExtend(), lowerVectorShuffleToEXPAND(), lowerVectorShuffleWithPERMV(), lowerVectorShuffleWithSSE4A(), lowerVectorShuffleWithUndefHalf(), lowerVSELECTtoVectorShuffle(), LowerVSETCC(), LowerZERO_EXTEND(), LowerZERO_EXTEND_AVX512(), matchBinaryPermuteVectorShuffle(), matchVectorShuffleWithSHUFPD(), performConcatVectorsCombine(), reduceVMULWidth(), setTargetShuffleZeroElements(), splitAndLowerVectorShuffle(), and tryExtendDUPToExtractHigh().

static MVT llvm::MVT::getVectorVT ( MVT  VT,
unsigned  NumElements 
)
inlinestatic

Definition at line 588 of file MachineValueType.h.

References f16, f32, f64, i1, i128, i16, i32, i64, i8, INVALID_SIMPLE_VALUE_TYPE, SimpleTy, v1024i1, v128i16, v128i8, v16f32, v16i1, v16i16, v16i32, v16i64, v16i8, v1f32, v1f64, v1i128, v1i16, v1i32, v1i64, v1i8, v256i8, v2f16, v2f32, v2f64, v2i1, v2i16, v2i32, v2i64, v2i8, v32i1, v32i16, v32i32, v32i64, v32i8, v4f16, v4f32, v4f64, v4i1, v4i16, v4i32, v4i64, v4i8, v512i1, v64i1, v64i16, v64i32, v64i8, v8f16, v8f32, v8f64, v8i1, v8i16, v8i32, v8i64, and v8i8.

Referenced by AddCombineBUILD_VECTORToVPADDL(), llvm::EVT::changeVectorElementTypeToInteger(), CombineBaseUpdate(), combineBasicSADPattern(), combineBitcastForMaskedOp(), combineLoopSADPattern(), combineTargetShuffle(), combineVSZext(), combineX86ShuffleChain(), combineX86ShufflesConstants(), createPSADBW(), EltsFromConsecutiveLoads(), getConstVector(), getGatherNode(), getMaskNode(), getOnesVector(), getPermuteNode(), getPow2VectorType(), getPrefetchNode(), getPromotedVectorElementType(), getRegOperandVectorVT(), getScatterNode(), llvm::X86TargetLowering::getSetCCResultType(), getTargetVShiftNode(), llvm::X86TargetLowering::getTgtMemIntrinsic(), getVectorMaskingNode(), getVectorTypeBreakdownMVT(), llvm::EVT::getVectorVT(), getVT(), getZeroVector(), llvm::HexagonTargetLowering::HexagonTargetLowering(), lower256BitVectorShuffle(), Lower256IntArith(), Lower256IntVSETCC(), Lower512IntArith(), LowerAVXCONCAT_VECTORS(), LowerAVXExtend(), LowerBITREVERSE(), LowerBITREVERSE_XOP(), LowerCONCAT_VECTORSvXi1(), LowerEXTEND_VECTOR_INREG(), LowerExtended1BitVectorLoad(), LowerHorizontalByteSum(), LowerINTRINSIC_W_CHAIN(), LowerINTRINSIC_WO_CHAIN(), LowerMGATHER(), LowerMLOAD(), LowerMSCATTER(), LowerMSTORE(), LowerMUL(), LowerMUL_LOHI(), LowerSCALAR_TO_VECTOR(), LowerScalarImmediateShift(), LowerSIGN_EXTEND(), LowerSIGN_EXTEND_AVX512(), LowerTruncateVecI1(), LowerTruncatingStore(), lowerV2X128VectorShuffle(), lowerV4X128VectorShuffle(), lowerV8I16GeneralSingleInputVectorShuffle(), LowerVectorBroadcast(), LowerVectorCTLZ_AVX512(), LowerVectorCTLZInRegLUT(), LowerVectorCTPOPBitmath(), LowerVectorCTPOPInRegLUT(), LowerVectorFP_TO_INT(), LowerVectorINT_TO_FP(), lowerVectorShuffle(), lowerVectorShuffleAsBitBlend(), lowerVectorShuffleAsBlend(), lowerVectorShuffleAsBroadcast(), lowerVectorShuffleAsByteRotate(), lowerVectorShuffleAsPermuteAndUnpack(), lowerVectorShuffleAsSpecificZeroOrAnyExtend(), lowerVectorShuffleByMerging128BitLanes(), lowerVectorShuffleToEXPAND(), lowerVectorShuffleWithPERMV(), lowerVectorShuffleWithPSHUFB(), lowerVectorShuffleWithUndefHalf(), lowerX86FPLogicOp(), LowerZERO_EXTEND_AVX512(), matchBinaryPermuteVectorShuffle(), matchUnaryPermuteVectorShuffle(), matchUnaryVectorShuffle(), matchVectorShuffleAsShift(), llvm::MipsTargetLowering::MipsTargetLowering(), NarrowVector(), performConcatVectorsCombine(), performExtendCombine(), reduceVMULWidth(), skipExtensionForVectorMULL(), SkipExtensionForVMULL(), splitAndLowerVectorShuffle(), tryBuildVectorReplicate(), tryExtendDUPToExtractHigh(), WidenVector(), and llvm::X86TargetLowering::X86TargetLowering().

MVT MVT::getVT ( Type Ty,
bool  HandleUnknown = false 
)
static
static mvt_range llvm::MVT::integer_valuetypes ( )
inlinestatic
static mvt_range llvm::MVT::integer_vector_valuetypes ( )
inlinestatic
bool llvm::MVT::is1024BitVector ( ) const
inline

is1024BitVector - Return true if this is a 1024-bit vector type.

Definition at line 271 of file MachineValueType.h.

References SimpleTy, v1024i1, v128i8, v16i64, v32i32, and v64i16.

Referenced by llvm::EVT::is1024BitVector().

bool llvm::MVT::is128BitVector ( ) const
inline
bool llvm::MVT::is16BitVector ( ) const
inline

is16BitVector - Return true if this is a 16-bit vector type.

Definition at line 227 of file MachineValueType.h.

References SimpleTy, v16i1, v1i16, and v2i8.

Referenced by llvm::EVT::is16BitVector().

bool llvm::MVT::is2048BitVector ( ) const
inline

is2048BitVector - Return true if this is a 1024-bit vector type.

Definition at line 278 of file MachineValueType.h.

References SimpleTy, v128i16, v256i8, v32i64, and v64i32.

Referenced by llvm::EVT::is2048BitVector().

bool llvm::MVT::is256BitVector ( ) const
inline
bool llvm::MVT::is32BitVector ( ) const
inline

is32BitVector - Return true if this is a 32-bit vector type.

Definition at line 233 of file MachineValueType.h.

References SimpleTy, v1f32, v1i32, v2f16, v2i16, and v4i8.

Referenced by llvm::EVT::is32BitVector().

bool llvm::MVT::is512BitVector ( ) const
inline
bool llvm::MVT::is64BitVector ( ) const
inline

is64BitVector - Return true if this is a 64-bit vector type.

Definition at line 240 of file MachineValueType.h.

References SimpleTy, v1f64, v1i64, v2f32, v2i32, v4f16, v4i16, and v8i8.

Referenced by llvm::EVT::is64BitVector(), and tryExtendDUPToExtractHigh().

bool llvm::MVT::isFloatingPoint ( ) const
inline
bool llvm::MVT::isInteger ( ) const
inline
bool llvm::MVT::isOverloaded ( ) const
inline

isOverloaded - Return true if this is an overloaded type for TableGen.

Definition at line 284 of file MachineValueType.h.

References Any, fAny, iAny, iPTRAny, SimpleTy, and vAny.

bool llvm::MVT::isPow2VectorType ( ) const
inline

isPow2VectorType - Returns true if the given vector is a power of 2.

Definition at line 291 of file MachineValueType.h.

References getVectorNumElements().

Referenced by getPow2VectorType().

bool llvm::MVT::isScalarInteger ( ) const
inline

isScalarInteger - Return true if this is an integer, not including vectors.

Definition at line 215 of file MachineValueType.h.

References FIRST_INTEGER_VALUETYPE, LAST_INTEGER_VALUETYPE, and SimpleTy.

Referenced by llvm::EVT::isScalarInteger().

bool llvm::MVT::isValid ( ) const
inline
bool llvm::MVT::isVector ( ) const
inline
bool llvm::MVT::operator!= ( const MVT S) const
inline

Definition at line 187 of file MachineValueType.h.

References SimpleTy.

bool llvm::MVT::operator< ( const MVT S) const
inline

Definition at line 185 of file MachineValueType.h.

References SimpleTy.

bool llvm::MVT::operator<= ( const MVT S) const
inline

Definition at line 189 of file MachineValueType.h.

References SimpleTy.

bool llvm::MVT::operator== ( const MVT S) const
inline

Definition at line 186 of file MachineValueType.h.

References SimpleTy.

bool llvm::MVT::operator> ( const MVT S) const
inline

Definition at line 184 of file MachineValueType.h.

References SimpleTy.

bool llvm::MVT::operator>= ( const MVT S) const
inline

Definition at line 188 of file MachineValueType.h.

References SimpleTy.

static mvt_range llvm::MVT::vector_valuetypes ( )
inlinestatic

Member Data Documentation

SimpleValueType llvm::MVT::SimpleTy

Definition at line 179 of file MachineValueType.h.

Referenced by AddCombineBUILD_VECTORToVPADDL(), llvm::TargetLoweringBase::AddPromotedToType(), llvm::TargetLoweringBase::addRegisterClass(), llvm::MipsSETargetLowering::allowsMisalignedMemoryAccesses(), llvm::HexagonTargetLowering::allowsMisalignedMemoryAccesses(), llvm::ARMTargetLowering::allowsMisalignedMemoryAccesses(), llvm::CC_ARM_AAPCS_Custom_Aggregate(), llvm::EVT::changeVectorElementTypeToInteger(), llvm::SelectionDAG::EVTToAPFloatSemantics(), FindOptimalMemOpLowering(), llvm::HexagonTargetLowering::findRepresentativeClass(), llvm::ARMTargetLowering::findRepresentativeClass(), llvm::X86TargetLowering::findRepresentativeClass(), llvm::TargetLoweringBase::findRepresentativeClass(), foldVectorXorShiftIntoCmp(), llvm::R600RegisterInfo::getCFGStructurizerRegClass(), llvm::TargetLoweringBase::getCondCodeAction(), llvm::EVT::getEVTString(), getExtensionTo64Bits(), getImplicitScaleFactor(), llvm::TargetLoweringBase::getIndexedLoadAction(), llvm::TargetLoweringBase::getIndexedStoreAction(), llvm::EVT::getIntegerVT(), llvm::TargetLoweringBase::getLoadExtAction(), llvm::TargetLoweringBase::getNumRegisters(), llvm::TargetLoweringBase::getOperationAction(), llvm::EVT::getRawBits(), llvm::TargetLoweringBase::getRegClassFor(), llvm::HexagonTargetLowering::getRegForInlineAsmConstraint(), llvm::X86TargetLowering::getRegForInlineAsmConstraint(), llvm::TargetLoweringBase::getRegisterType(), llvm::TargetLoweringBase::getRepRegClassCostFor(), llvm::TargetLoweringBase::getRepRegClassFor(), llvm::TargetLoweringBase::getSetCCResultType(), getSizeInBits(), llvm::TargetLoweringBase::getTruncStoreAction(), llvm::TargetLoweringBase::ValueTypeActionImpl::getTypeAction(), llvm::EVT::getTypeForEVT(), llvm::TargetLoweringBase::getTypeToPromoteTo(), llvm::SelectionDAG::getValueType(), getVectorElementType(), getVectorNumElements(), llvm::EVT::getVectorVT(), getVectorVT(), is1024BitVector(), is128BitVector(), is16BitVector(), is2048BitVector(), is256BitVector(), is32Bit(), is32BitVector(), is512BitVector(), is64BitVector(), isDivRemLibcallAvailable(), isFloatingPoint(), llvm::SITargetLowering::isFMAFasterThanFMulAndFAdd(), llvm::AArch64TargetLowering::isFMAFasterThanFMulAndFAdd(), llvm::SystemZTargetLowering::isFMAFasterThanFMulAndFAdd(), llvm::PPCTargetLowering::isFMAFasterThanFMulAndFAdd(), llvm::X86TargetLowering::isFMAFasterThanFMulAndFAdd(), llvm::PPCTargetLowering::isFPImmLegal(), isHvxVectorType(), isInteger(), isLegalAddressImmediate(), llvm::ARMTargetLowering::isLegalAddressingMode(), isLegalT1AddressImmediate(), isLegalT2AddressImmediate(), llvm::ARMTargetLowering::isLegalT2ScaledAddressingMode(), isOverloaded(), IsPTXVectorType(), isScalarInteger(), llvm::EVT::isSimple(), isSinCosLibcallAvailable(), llvm::TargetLoweringBase::isTypeLegal(), isValid(), isValidIndexedLoad(), isVector(), llvm::XCoreTargetLowering::isZExtFree(), llvm::ARMTargetLowering::isZExtFree(), llvm::X86TargetLowering::isZExtFree(), lower128BitVectorShuffle(), lower1BitVectorShuffle(), lower256BitVectorShuffle(), lower512BitVectorShuffle(), LowerCMP_SWAP(), llvm::SystemZTargetLowering::LowerFormalArguments(), lowerRegToMasks(), lowerVectorShuffleAsBlend(), llvm::EVT::operator!=(), operator!=(), llvm::EVT::compareRawBits::operator()(), operator<(), operator<=(), operator==(), operator>(), operator>=(), ReplaceINTRINSIC_W_CHAIN(), ReplaceLoadVector(), llvm::AVRDAGToDAGISel::selectIndexedLoad(), llvm::AVRDAGToDAGISel::selectIndexedProgMemLoad(), llvm::TargetLoweringBase::setCondCodeAction(), llvm::TargetLoweringBase::setIndexedLoadAction(), llvm::TargetLoweringBase::setIndexedStoreAction(), llvm::TargetLoweringBase::setLoadExtAction(), llvm::TargetLoweringBase::setOperationAction(), llvm::TargetLoweringBase::setTruncStoreAction(), llvm::TargetLoweringBase::ValueTypeActionImpl::setTypeAction(), llvm::X86InstrInfo::shouldScheduleLoadsNear(), llvm::WebAssembly::toValType(), llvm::WebAssembly::TypeToString(), X86ChooseCmpImmediateOpcode(), and X86ChooseCmpOpcode().


The documentation for this class was generated from the following files: