28 #define GET_REGINFO_TARGET_DESC
29 #include "AVRGenRegisterInfo.inc"
40 ? CSR_Interrupts_SaveList
41 : CSR_Normal_SaveList);
48 ? CSR_Interrupts_RegMask
49 : CSR_Normal_RegMask);
59 Reserved.
set(AVR::R0);
60 Reserved.
set(AVR::R1);
61 Reserved.
set(AVR::R1R0);
64 Reserved.
set(AVR::SPL);
65 Reserved.
set(AVR::SPH);
66 Reserved.
set(AVR::SP);
70 Reserved.
set(AVR::R28);
71 Reserved.
set(AVR::R29);
72 Reserved.
set(AVR::R29R28);
82 return &AVR::DREGSRegClass;
86 return &AVR::GPR8RegClass;
97 if ((Opcode != AVR::SUBIWRdK) && (Opcode != AVR::ADIWRdK)) {
122 int SPAdj,
unsigned FIOperandNum,
124 assert(SPAdj == 0 &&
"Unexpected SPAdj value");
149 assert(Offset > 0 &&
"Invalid offset");
154 assert(DstReg != AVR::R29R28 &&
"Dest reg cannot be the frame pointer");
171 if (isUInt<6>(Offset)) {
172 Opcode = AVR::ADIWRdK;
179 Opcode = AVR::SUBIWRdK;
197 unsigned AddOpc = AVR::ADIWRdK, SubOpc = AVR::SBIWRdK;
198 int AddOffset = Offset - 63 + 1;
201 if ((Offset - 63 + 1) > 63) {
202 AddOpc = AVR::SUBIWRdK;
203 SubOpc = AVR::SUBIWRdK;
204 AddOffset = -AddOffset;
211 BuildMI(MBB, II, dl, TII.
get(AVR::INRdA), AVR::R0).addImm(0x3f);
219 BuildMI(MBB, std::next(II), dl, TII.
get(AVR::OUTARr))
225 New =
BuildMI(MBB, std::next(II), dl, TII.
get(SubOpc), AVR::R29R28)
233 assert(isUInt<6>(Offset) &&
"Offset is out of range");
239 if (TFI->
hasFP(MF)) {
249 unsigned Kind)
const {
253 return &AVR::PTRDISPREGSRegClass;
258 unsigned &HiReg)
const {
259 assert(AVR::DREGSRegClass.
contains(Reg) &&
"can only split 16-bit registers");
261 LoReg = getSubReg(Reg, AVR::sub_lo);
262 HiReg = getSubReg(Reg, AVR::sub_hi);
bool hasType(MVT vt) const
Return true if this TargetRegisterClass has the ValueType vt.
static void foldFrameOffset(MachineInstr &MI, int &Offset, unsigned DstReg)
Fold a frame offset shared between two add instructions into a single one.
const AVRInstrInfo * getInstrInfo() const override
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
const TargetRegisterClass * getPointerRegClass(const MachineFunction &MF, unsigned Kind=0) const override
void ChangeToRegister(unsigned Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isDebug=false)
ChangeToRegister - Replace this operand with a new register operand of the specified value...
const AVRSubtarget * getSubtargetImpl() const
BitVector getReservedRegs(const MachineFunction &MF) const override
void setIsDead(bool Val=true)
const Function * getFunction() const
getFunction - Return the LLVM function that this machine code represents
return AArch64::GPR64RegClass contains(Reg)
CallingConv::ID getCallingConv() const
getCallingConv()/setCallingConv(CC) - These method get and set the calling convention of this functio...
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects...
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
const HexagonInstrInfo * TII
const TargetRegisterClass * getLargestLegalSuperClass(const TargetRegisterClass *RC, const MachineFunction &MF) const override
virtual bool hasFP(const MachineFunction &MF) const =0
hasFP - Return true if the specified function should have a dedicated frame pointer register...
void eraseFromParent()
Unlink 'this' from the containing basic block and delete it.
Reg
All possible values of the reg field in the ModR/M byte.
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted...
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
A generic AVR implementation.
const uint16_t * getCalleeSavedRegs(const MachineFunction *MF=0) const override
const uint32_t * getCallPreservedMask(const MachineFunction &MF, CallingConv::ID CC) const override
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
void ChangeToImmediate(int64_t ImmVal)
ChangeToImmediate - Replace this operand with a new immediate operand of the specified value...
void eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=NULL) const override
Stack Frame Processing Methods.
const MachineBasicBlock * getParent() const
TargetInstrInfo - Interface to description of machine instruction set.
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
const MachineOperand & getOperand(unsigned i) const
Used for AVR interrupt routines.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
const MCInstrDesc & get(unsigned Opcode) const
Return the machine instruction descriptor that corresponds to the specified instruction opcode...
int64_t getObjectOffset(int ObjectIdx) const
Return the assigned stack offset of the specified object from the incoming stack pointer.
virtual const TargetFrameLowering * getFrameLowering() const
void setDesc(const MCInstrDesc &tid)
Replace the instruction descriptor (thus opcode) of the current instruction with a new one...
int getOffsetOfLocalArea() const
getOffsetOfLocalArea - This method returns the offset of the local area from the stack pointer on ent...
Information about stack frame layout on the target.
const DebugLoc & getDebugLoc() const
Returns the debug location id of this MachineInstr.
Representation of each machine instruction.
const TargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
void splitReg(unsigned Reg, unsigned &LoReg, unsigned &HiReg) const
Splits a 16-bit DREGS register into the lo/hi register pair.
unsigned getReg() const
getReg - Returns the register number.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
unsigned getFrameRegister(const MachineFunction &MF) const override
#define LLVM_FALLTHROUGH
LLVM_FALLTHROUGH - Mark fallthrough cases in switch statements.
const TargetFrameLowering * getFrameLowering() const override
Calling convention used for AVR signal routines.
const MachineInstrBuilder & addReg(unsigned RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.