40 if (!
isIntN(Width, Value)) {
41 std::string Diagnostic =
"out of range " + Description;
46 Diagnostic +=
" (expected an integer in the range " +
std::to_string(Min) +
50 Ctx->reportFatalError(Fixup.
getLoc(), Diagnostic);
60 std::string Diagnostic =
"out of range " + Description;
64 Diagnostic +=
" (expected an integer in the range 0 to " +
68 Ctx->reportFatalError(Fixup.
getLoc(), Diagnostic);
80 unsigned_width(Size + 1, Value, std::string(
"branch target"), Fixup, Ctx);
91 signed_width(Size + 1, Value, std::string(
"branch target"), Fixup, Ctx);
109 auto top = Value & (0xf00000 << 6);
110 auto middle = Value & (0x1ffff << 5);
111 auto bottom = Value & 0x1f;
113 Value = (top << 6) | (middle << 3) | (bottom << 0);
152 Value = ((Value & 0x30) << 2) | (Value & 0x0f);
176 Value = ((Value & 0x30) << 5) | (Value & 0x0f);
195 uint64_t upper = Value & 0xf0;
196 uint64_t lower = Value & 0x0f;
198 Value = (upper << 4) | lower;
211 Value = (Value & 0xff00) >> 8;
217 Value = (Value & 0xff0000) >> 16;
223 Value = (Value & 0xff000000) >> 24;
337 unsigned DataSize, uint64_t
Value,
338 bool IsPCRel)
const {
346 auto NumBytes = (NumBits / 8) + ((NumBits % 8) == 0 ? 0 : 1);
352 assert(Offset + NumBytes <= DataSize &&
"Invalid fixup offset!");
356 for (
unsigned i = 0;
i < NumBytes; ++
i) {
357 uint8_t mask = (((Value >> (
i * 8)) & 0xff));
358 Data[Offset +
i] |= mask;
370 {
"fixup_32", 0, 32, 0},
375 {
"fixup_16", 0, 16, 0},
376 {
"fixup_16_pm", 0, 16, 0},
378 {
"fixup_ldi", 0, 8, 0},
380 {
"fixup_lo8_ldi", 0, 8, 0},
381 {
"fixup_hi8_ldi", 0, 8, 0},
382 {
"fixup_hh8_ldi", 0, 8, 0},
383 {
"fixup_ms8_ldi", 0, 8, 0},
385 {
"fixup_lo8_ldi_neg", 0, 8, 0},
386 {
"fixup_hi8_ldi_neg", 0, 8, 0},
387 {
"fixup_hh8_ldi_neg", 0, 8, 0},
388 {
"fixup_ms8_ldi_neg", 0, 8, 0},
390 {
"fixup_lo8_ldi_pm", 0, 8, 0},
391 {
"fixup_hi8_ldi_pm", 0, 8, 0},
392 {
"fixup_hh8_ldi_pm", 0, 8, 0},
394 {
"fixup_lo8_ldi_pm_neg", 0, 8, 0},
395 {
"fixup_hi8_ldi_pm_neg", 0, 8, 0},
396 {
"fixup_hh8_ldi_pm_neg", 0, 8, 0},
398 {
"fixup_call", 0, 22, 0},
400 {
"fixup_6", 0, 16, 0},
401 {
"fixup_6_adiw", 0, 6, 0},
403 {
"fixup_lo8_ldi_gs", 0, 8, 0},
404 {
"fixup_hi8_ldi_gs", 0, 8, 0},
406 {
"fixup_8", 0, 8, 0},
407 {
"fixup_8_lo8", 0, 8, 0},
408 {
"fixup_8_hi8", 0, 8, 0},
409 {
"fixup_8_hlo8", 0, 8, 0},
411 {
"fixup_sym_diff", 0, 32, 0},
412 {
"fixup_16_ldst", 0, 16, 0},
414 {
"fixup_lds_sts_16", 0, 16, 0},
416 {
"fixup_port6", 0, 16, 0},
417 {
"fixup_port5", 3, 5, 0},
433 assert((Count % 2) == 0 &&
"NOP instructions must be 2 bytes");
445 switch ((
unsigned) Fixup.
getKind()) {
OSType getOS() const
getOS - Get the parsed operating system type of this triple.
const MCFixupKindInfo & getFixupKindInfo(MCFixupKind Kind) const override
Get information on a fixup kind.
unsigned getNumFixupKinds() const override
Get the number of target specific fixup kinds.
void WriteZeros(unsigned N)
const MCSymbol & getSymbol() const
Replaces the immediate operand of a 16-bit Rd, K instruction with the upper 8 bits of a negated 16-bi...
This represents an "assembler immediate".
Replaces the immediate operand of a 16-bit Rd, K instruction with the lower 8 bits of a 16-bit progra...
Replaces the immediate operand of a 16-bit Rd, K instruction with the upper 8 bits of a negated 16-bi...
MCObjectWriter * createObjectWriter(raw_pwrite_stream &OS) const override
Create a new MCObjectWriter instance for use by the assembler backend to emit the final object file...
void processFixupValue(const MCAssembler &Asm, const MCAsmLayout &Layout, const MCFixup &Fixup, const MCFragment *DF, const MCValue &Target, uint64_t &Value, bool &IsResolved) override
Target hook to adjust the literal value of a fixup if necessary.
void unsigned_width(unsigned Width, uint64_t Value, std::string Description, const MCFixup &Fixup, MCContext *Ctx=nullptr)
MCContext & getContext() const
Defines the object file and target independent interfaces used by the assembler backend to write nati...
void hh8(unsigned Size, const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx=nullptr)
Replaces the immediate operand of a 16-bit Rd, K instruction with the lower 8 bits of a negated 16-bi...
unsigned TargetOffset
The bit offset to write the relocation into.
Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...
Is this fixup kind PCrelative? This is used by the assembler backend to evaluate fixup values in a ta...
Encapsulates the layout of an assembly file at a particular point in time.
Replaces the immediate operand of a 16-bit Rd, K instruction with the upper 8 bits of a negated negat...
Replaces the immediate operand of a 16-bit Rd, K instruction with the lower 8 bits of a 16-bit value ...
void adjustRelativeBranch(unsigned Size, const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx=nullptr)
Adjusts the value of a relative branch target before fixup application.
A 12-bit PC-relative fixup for the family of branches which take 12-bit targets (RJMP,RCALL,etc).
Context object for machine code objects.
A 7-bit PC-relative fixup for the family of conditional branches which take 7-bit targets (BRNE...
int64_t maxIntN(int64_t N)
Gets the maximum value for a N-bit signed integer.
bool isIntN(unsigned N, const APInt &APIVal)
Check if the specified APInt has a N-bits unsigned integer value.
A four-byte gp relative fixup.
void signed_width(unsigned Width, uint64_t Value, std::string Description, const MCFixup &Fixup, MCContext *Ctx=nullptr)
Utilities for manipulating generated AVR machine code.
Replaces the immediate operand of a 16-bit Rd, K instruction with the upper 8 bits of a negated negat...
int64_t minIntN(int64_t N)
Gets the minimum value for a N-bit signed integer.
uint32_t getOffset() const
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize, uint64_t Value, bool IsPCRel) const override
Apply the Value for given Fixup into the provided data fragment, at the offset specified by the fixup...
void fixup_port5(const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx=nullptr)
5-bit port number fixup on the SBIC family of instructions.
unsigned const MachineRegisterInfo * MRI
A symbol+addr fixup for the `LDD <x>+<n>, <r>" family of instructions.
MCFixupKind
Extensible enumeration to represent the type of a fixup.
void adjustBranch(unsigned Size, const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx=nullptr)
Adjusts the value of a branch target before fixup application.
void neg(uint64_t &Value)
void fixup_7_pcrel(unsigned Size, const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx=nullptr)
7-bit PC-relative fixup.
void adjustFixupValue(const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx=nullptr) const
Replaces the immediate operand of a 16-bit Rd, K instruction with the upper 8 bits of a 16-bit progra...
void pm(uint64_t &Value)
Adjusts a program memory address.
MCFixupKind getKind() const
void ms8(unsigned Size, const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx=nullptr)
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Triple - Helper class for working with autoconf configuration names.
void hi8(unsigned Size, const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx=nullptr)
Replaces the immediate operand of a 16-bit Rd, K instruction with the upper 8 bits of a negated 24-bi...
const MCSymbolRefExpr * getSymA() const
void fixup(unsigned Size, const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx=nullptr)
Adjusts a value to fix up the immediate of an LDI Rd, K instruction.
void fixup_6_adiw(const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx=nullptr)
6-bit fixup for the immediate operand of the ADIW family of instructions.
Replaces the immediate operand of a 16-bit Rd, K instruction with the upper 8 bits of a 16-bit value ...
void adjustBranchTarget(T &val)
Adjusts the value of a branch target.
bool writeNopData(uint64_t Count, MCObjectWriter *OW) const override
Write an (optimal) nop sequence of Count bytes to the given output.
unsigned TargetSize
The number of bits written by this fixup.
MCObjectWriter * createAVRELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI)
Creates an ELF object writer for AVR.
Target - Wrapper for Target specific information.
void fixup_13_pcrel(unsigned Size, const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx=nullptr)
12-bit PC-relative fixup.
bool isTemporary() const
isTemporary - Check if this is an assembler temporary symbol.
uint64_t maxUIntN(uint64_t N)
Gets the maximum value for a N-bit unsigned integer.
Replaces the immediate operand of a 16-bit Rd, K instruction with the lower 8 bits of a negated 16-bi...
Replaces the immediate operand of a 16-bit Rd, K instruction with the upper 8 bits of a 32-bit value ...
Target independent information on a fixup kind.
const std::string to_string(const T &Value)
An abstract base class for streams implementations that also support a pwrite operation.
void fixup_call(unsigned Size, const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx=nullptr)
22-bit absolute fixup.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
LLVM Value Representation.
Generic interface to target specific assembler backends.
A 22-bit fixup for the target of a CALL k or JMP k instruction.
MCAsmBackend * createAVRAsmBackend(const Target &T, const MCRegisterInfo &MRI, const Triple &TT, StringRef CPU, const llvm::MCTargetOptions &TO)
Creates an assembly backend for AVR.
Replaces the immediate operand of a 16-bit Rd, K instruction with the upper 8 bits of a 24-bit progra...
void lo8(unsigned Size, const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx=nullptr)
StringRef - Represent a constant reference to a string, i.e.
bool isUIntN(unsigned N, uint64_t x)
isUIntN - Checks if an unsigned integer fits into the given (dynamic) bit width.
Replaces the immediate operand of a 16-bit Rd, K instruction with the upper 8 bits of a 24-bit value ...
Replaces the 8-bit immediate with another value.
virtual const MCFixupKindInfo & getFixupKindInfo(MCFixupKind Kind) const
Get information on a fixup kind.
void fixup_port6(const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx=nullptr)
6-bit port number fixup on the IN family of instructions.