LLVM  4.0.0
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HexagonTargetMachine.cpp File Reference
#include "HexagonTargetMachine.h"
#include "Hexagon.h"
#include "HexagonISelLowering.h"
#include "HexagonMachineScheduler.h"
#include "HexagonTargetObjectFile.h"
#include "HexagonTargetTransformInfo.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/TargetPassConfig.h"
#include "llvm/IR/LegacyPassManager.h"
#include "llvm/IR/Module.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/TargetRegistry.h"
#include "llvm/Transforms/Scalar.h"
Include dependency graph for HexagonTargetMachine.cpp:

Go to the source code of this file.

Namespaces

 llvm
 Compute iterated dominance frontiers using a linear time algorithm.
 

Functions

void LLVMInitializeHexagonTarget ()
 
static ScheduleDAGInstrscreateVLIWMachineSched (MachineSchedContext *C)
 
void llvm::initializeHexagonExpandCondsetsPass (PassRegistry &)
 
FunctionPassllvm::createHexagonBitSimplify ()
 
FunctionPassllvm::createHexagonBranchRelaxation ()
 
FunctionPassllvm::createHexagonCallFrameInformation ()
 
FunctionPassllvm::createHexagonCFGOptimizer ()
 
FunctionPassllvm::createHexagonCommonGEP ()
 
FunctionPassllvm::createHexagonConstPropagationPass ()
 
FunctionPassllvm::createHexagonCopyToCombine ()
 
FunctionPassllvm::createHexagonEarlyIfConversion ()
 
FunctionPassllvm::createHexagonFixupHwLoops ()
 
FunctionPassllvm::createHexagonGenExtract ()
 
FunctionPassllvm::createHexagonGenInsert ()
 
FunctionPassllvm::createHexagonGenMux ()
 
FunctionPassllvm::createHexagonGenPredicate ()
 
FunctionPassllvm::createHexagonHardwareLoops ()
 
FunctionPassllvm::createHexagonISelDag (HexagonTargetMachine &TM, CodeGenOpt::Level OptLevel)
 
FunctionPassllvm::createHexagonLoopRescheduling ()
 
FunctionPassllvm::createHexagonNewValueJump ()
 
FunctionPassllvm::createHexagonOptimizeSZextends ()
 
FunctionPassllvm::createHexagonOptAddrMode ()
 
FunctionPassllvm::createHexagonPacketizer ()
 
FunctionPassllvm::createHexagonPeephole ()
 
FunctionPassllvm::createHexagonRDFOpt ()
 
FunctionPassllvm::createHexagonSplitConst32AndConst64 ()
 
FunctionPassllvm::createHexagonSplitDoubleRegs ()
 
FunctionPassllvm::createHexagonStoreWidening ()
 
FunctionPassllvm::createHexagonVectorPrint ()
 
static Reloc::Model getEffectiveRelocModel (Optional< Reloc::Model > RM)
 

Variables

static cl::opt< boolEnableRDFOpt ("rdf-opt", cl::Hidden, cl::ZeroOrMore, cl::init(true), cl::desc("Enable RDF-based optimizations"))
 
static cl::opt< boolDisableHardwareLoops ("disable-hexagon-hwloops", cl::Hidden, cl::desc("Disable Hardware Loops for Hexagon target"))
 
static cl::opt< boolDisableAModeOpt ("disable-hexagon-amodeopt", cl::Hidden, cl::ZeroOrMore, cl::init(false), cl::desc("Disable Hexagon Addressing Mode Optimization"))
 
static cl::opt< boolDisableHexagonCFGOpt ("disable-hexagon-cfgopt", cl::Hidden, cl::ZeroOrMore, cl::init(false), cl::desc("Disable Hexagon CFG Optimization"))
 
static cl::opt< boolDisableHCP ("disable-hcp", cl::init(false), cl::Hidden, cl::ZeroOrMore, cl::desc("Disable Hexagon constant propagation"))
 
static cl::opt< boolDisableStoreWidening ("disable-store-widen", cl::Hidden, cl::init(false), cl::desc("Disable store widening"))
 
static cl::opt< boolEnableExpandCondsets ("hexagon-expand-condsets", cl::init(true), cl::Hidden, cl::ZeroOrMore, cl::desc("Early expansion of MUX"))
 
static cl::opt< boolEnableEarlyIf ("hexagon-eif", cl::init(true), cl::Hidden, cl::ZeroOrMore, cl::desc("Enable early if-conversion"))
 
static cl::opt< boolEnableGenInsert ("hexagon-insert", cl::init(true), cl::Hidden, cl::desc("Generate \"insert\" instructions"))
 
static cl::opt< boolEnableCommGEP ("hexagon-commgep", cl::init(true), cl::Hidden, cl::ZeroOrMore, cl::desc("Enable commoning of GEP instructions"))
 
static cl::opt< boolEnableGenExtract ("hexagon-extract", cl::init(true), cl::Hidden, cl::desc("Generate \"extract\" instructions"))
 
static cl::opt< boolEnableGenMux ("hexagon-mux", cl::init(true), cl::Hidden, cl::desc("Enable converting conditional transfers into MUX instructions"))
 
static cl::opt< boolEnableGenPred ("hexagon-gen-pred", cl::init(true), cl::Hidden, cl::desc("Enable conversion of arithmetic operations to ""predicate instructions"))
 
static cl::opt< boolEnableLoopPrefetch ("hexagon-loop-prefetch", cl::init(false), cl::Hidden, cl::ZeroOrMore, cl::desc("Enable loop data prefetch on Hexagon"))
 
static cl::opt< boolDisableHSDR ("disable-hsdr", cl::init(false), cl::Hidden, cl::desc("Disable splitting double registers"))
 
static cl::opt< boolEnableBitSimplify ("hexagon-bit", cl::init(true), cl::Hidden, cl::desc("Bit simplification"))
 
static cl::opt< boolEnableLoopResched ("hexagon-loop-resched", cl::init(true), cl::Hidden, cl::desc("Loop rescheduling"))
 
static cl::opt< boolHexagonNoOpt ("hexagon-noopt", cl::init(false), cl::Hidden, cl::desc("Disable backend optimizations"))
 
static cl::opt< boolEnableVectorPrint ("enable-hexagon-vector-print", cl::Hidden, cl::ZeroOrMore, cl::init(false), cl::desc("Enable Hexagon Vector print instr pass"))
 
int HexagonTargetMachineModule = 0
 HexagonTargetMachineModule - Note that this is used on hosts that cannot link in a library unless there are references into the library. More...
 
static MachineSchedRegistry SchedCustomRegistry ("hexagon","Run Hexagon's custom scheduler", createVLIWMachineSched)
 

Function Documentation

static ScheduleDAGInstrs* createVLIWMachineSched ( MachineSchedContext C)
static

Definition at line 106 of file HexagonTargetMachine.cpp.

static Reloc::Model getEffectiveRelocModel ( Optional< Reloc::Model RM)
static
void LLVMInitializeHexagonTarget ( )

Definition at line 101 of file HexagonTargetMachine.cpp.

References llvm::getTheHexagonTarget(), and X.

Variable Documentation

cl::opt<bool> DisableAModeOpt("disable-hexagon-amodeopt", cl::Hidden, cl::ZeroOrMore, cl::init(false), cl::desc("Disable Hexagon Addressing Mode Optimization"))
static
cl::opt<bool> DisableHardwareLoops("disable-hexagon-hwloops", cl::Hidden, cl::desc("Disable Hardware Loops for Hexagon target"))
static
cl::opt<bool> DisableHCP("disable-hcp", cl::init(false), cl::Hidden, cl::ZeroOrMore, cl::desc("Disable Hexagon constant propagation"))
static
cl::opt<bool> DisableHexagonCFGOpt("disable-hexagon-cfgopt", cl::Hidden, cl::ZeroOrMore, cl::init(false), cl::desc("Disable Hexagon CFG Optimization"))
static
cl::opt<bool> DisableHSDR("disable-hsdr", cl::init(false), cl::Hidden, cl::desc("Disable splitting double registers"))
static
cl::opt<bool> DisableStoreWidening("disable-store-widen", cl::Hidden, cl::init(false), cl::desc("Disable store widening"))
static
cl::opt<bool> EnableBitSimplify("hexagon-bit", cl::init(true), cl::Hidden, cl::desc("Bit simplification"))
static
cl::opt<bool> EnableCommGEP("hexagon-commgep", cl::init(true), cl::Hidden, cl::ZeroOrMore, cl::desc("Enable commoning of GEP instructions"))
static
cl::opt<bool> EnableEarlyIf("hexagon-eif", cl::init(true), cl::Hidden, cl::ZeroOrMore, cl::desc("Enable early if-conversion"))
static
cl::opt<bool> EnableExpandCondsets("hexagon-expand-condsets", cl::init(true), cl::Hidden, cl::ZeroOrMore, cl::desc("Early expansion of MUX"))
static
cl::opt<bool> EnableGenExtract("hexagon-extract", cl::init(true), cl::Hidden, cl::desc("Generate \"extract\" instructions"))
static
cl::opt<bool> EnableGenInsert("hexagon-insert", cl::init(true), cl::Hidden, cl::desc("Generate \"insert\" instructions"))
static
cl::opt<bool> EnableGenMux("hexagon-mux", cl::init(true), cl::Hidden, cl::desc("Enable converting conditional transfers into MUX instructions"))
static
cl::opt<bool> EnableGenPred("hexagon-gen-pred", cl::init(true), cl::Hidden, cl::desc("Enable conversion of arithmetic operations to ""predicate instructions"))
static
cl::opt<bool> EnableLoopPrefetch("hexagon-loop-prefetch", cl::init(false), cl::Hidden, cl::ZeroOrMore, cl::desc("Enable loop data prefetch on Hexagon"))
static
cl::opt<bool> EnableLoopResched("hexagon-loop-resched", cl::init(true), cl::Hidden, cl::desc("Loop rescheduling"))
static
cl::opt<bool> EnableRDFOpt("rdf-opt", cl::Hidden, cl::ZeroOrMore, cl::init(true), cl::desc("Enable RDF-based optimizations"))
static
cl::opt<bool> EnableVectorPrint("enable-hexagon-vector-print", cl::Hidden, cl::ZeroOrMore, cl::init(false), cl::desc("Enable Hexagon Vector print instr pass"))
static
cl::opt<bool> HexagonNoOpt("hexagon-noopt", cl::init(false), cl::Hidden, cl::desc("Disable backend optimizations"))
static
int HexagonTargetMachineModule = 0

HexagonTargetMachineModule - Note that this is used on hosts that cannot link in a library unless there are references into the library.

In particular, it seems that it is not possible to get things to work on Win32 without this. Though it is unused, do not remove it.

Definition at line 98 of file HexagonTargetMachine.cpp.

MachineSchedRegistry SchedCustomRegistry("hexagon","Run Hexagon's custom scheduler", createVLIWMachineSched)
static