14 #ifndef LLVM_LIB_TARGET_ARM_ARMREGISTERBANKINFO_H
15 #define LLVM_LIB_TARGET_ARM_ARMREGISTERBANKINFO_H
21 class TargetRegisterInfo;
Helper class that represents how the value of an instruction may be mapped and what is the related co...
Holds all the information related to register banks.
This class provides the information for the target register banks.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
ARMRegisterBankInfo(const TargetRegisterInfo &TRI)
This class implements the register bank concept.
Representation of each machine instruction.
const RegisterBank & getRegBankFromRegClass(const TargetRegisterClass &RC) const override
Get a register bank that covers RC.
InstructionMapping getInstrMapping(const MachineInstr &MI) const override
Get the mapping of the different operands of MI on the register bank.