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LLVM
4.0.0
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#include <SIRegisterInfo.h>
Public Types | |
| enum | PreloadedValue { PRIVATE_SEGMENT_BUFFER = 0, DISPATCH_PTR = 1, QUEUE_PTR = 2, KERNARG_SEGMENT_PTR = 3, DISPATCH_ID = 4, FLAT_SCRATCH_INIT = 5, WORKGROUP_ID_X = 10, WORKGROUP_ID_Y = 11, WORKGROUP_ID_Z = 12, PRIVATE_SEGMENT_WAVE_BYTE_OFFSET = 14, FIRST_VGPR_VALUE = 15, WORKITEM_ID_X = FIRST_VGPR_VALUE, WORKITEM_ID_Y = 16, WORKITEM_ID_Z = 17 } |
Definition at line 28 of file SIRegisterInfo.h.
Definition at line 156 of file SIRegisterInfo.h.
| SIRegisterInfo::SIRegisterInfo | ( | ) |
Definition at line 52 of file SIRegisterInfo.cpp.
References assert(), i, isSGPRPressureSet(), and isVGPRPressureSet().
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Definition at line 825 of file SIRegisterInfo.cpp.
References llvm::SIMachineFunctionInfo::addToSpilledVGPRs(), assert(), llvm::BuildMI(), buildMUBUFOffsetLoadStore(), llvm::MachineOperand::ChangeToImmediate(), llvm::MachineOperand::ChangeToRegister(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getInfo(), llvm::SISubtarget::getInstrInfo(), llvm::AMDGPU::getNamedOperandIdx(), getNumSubRegsForSpillOp(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), llvm::MachineOperand::isKill(), MRI, Offset, restoreSGPR(), and spillSGPR().
| unsigned SIRegisterInfo::findUnusedRegister | ( | const MachineRegisterInfo & | MRI, |
| const TargetRegisterClass * | RC, | ||
| const MachineFunction & | MF | ||
| ) | const |
Returns a register that is not used at any point in the function.
If all registers are used, then this function will return
Definition at line 1149 of file SIRegisterInfo.cpp.
References llvm::MachineRegisterInfo::isAllocatable(), and llvm::MachineRegisterInfo::isPhysRegUsed().
Referenced by llvm::SIInstrInfo::calculateLDSSpillAddress().
| const TargetRegisterClass * SIRegisterInfo::getEquivalentSGPRClass | ( | const TargetRegisterClass * | VRC | ) | const |
SRC Definition at line 1006 of file SIRegisterInfo.cpp.
References llvm::TargetRegisterClass::getSize(), and llvm_unreachable.
Referenced by llvm::SIInstrInfo::readlaneVGPRToSGPR().
| const TargetRegisterClass * SIRegisterInfo::getEquivalentVGPRClass | ( | const TargetRegisterClass * | SRC | ) | const |
SRC Definition at line 986 of file SIRegisterInfo.cpp.
References llvm::TargetRegisterClass::getSize(), and llvm_unreachable.
Referenced by foldVGPRCopyIntoRegSequence(), llvm::SIInstrInfo::legalizeOperands(), and llvm::SIInstrInfo::legalizeOpWithMove().
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Definition at line 214 of file SIRegisterInfo.cpp.
References assert(), getMUBUFInstrOffset(), llvm::AMDGPU::getNamedOperandIdx(), llvm::MachineInstr::getOpcode(), and llvm::SIInstrInfo::isMUBUF().
Definition at line 91 of file SIRegisterInfo.h.
Referenced by llvm::SIInstrInfo::copyPhysReg().
| unsigned SIRegisterInfo::getMaxNumSGPRs | ( | const SISubtarget & | ST, |
| unsigned | WavesPerEU, | ||
| bool | Addressable | ||
| ) | const |
Definition at line 1211 of file SIRegisterInfo.cpp.
References llvm::AMDGPUSubtarget::getGeneration(), getNumAddressableSGPRs(), and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.
Referenced by getAllSGPR128(), getAllSGPRs(), getMaxNumSGPRs(), getReservedRegs(), reservedPrivateSegmentBufferReg(), and reservedPrivateSegmentWaveByteOffsetReg().
| unsigned SIRegisterInfo::getMaxNumSGPRs | ( | const MachineFunction & | MF | ) | const |
MF, or number of SGPRs explicitly requested using "amdgpu-num-sgpr" attribute attached to function MF.Definition at line 1236 of file SIRegisterInfo.cpp.
References F, llvm::SISubtarget::FIXED_SGPR_COUNT_FOR_INIT_BUG, llvm::MachineFunction::getFunction(), llvm::MachineFunction::getInfo(), llvm::AMDGPU::getIntegerAttribute(), getMaxNumSGPRs(), getMinNumSGPRs(), getNumReservedSGPRs(), llvm::MachineFunction::getSubtarget(), llvm::SIMachineFunctionInfo::getWavesPerEU(), llvm::Function::hasFnAttribute(), llvm::SISubtarget::hasSGPRInitBug(), and fuzzer::min().
Definition at line 1311 of file SIRegisterInfo.cpp.
References getTotalNumVGPRs().
Referenced by getMaxNumVGPRs(), and getReservedRegs().
| unsigned SIRegisterInfo::getMaxNumVGPRs | ( | const MachineFunction & | MF | ) | const |
MF, or number of VGPRs explicitly requested using "amdgpu-num-vgpr" attribute attached to function MF.Definition at line 1327 of file SIRegisterInfo.cpp.
References F, llvm::MachineFunction::getFunction(), llvm::MachineFunction::getInfo(), llvm::AMDGPU::getIntegerAttribute(), getMaxNumVGPRs(), getMinNumVGPRs(), getNumDebuggerReservedVGPRs(), llvm::MachineFunction::getSubtarget(), llvm::SIMachineFunctionInfo::getWavesPerEU(), and llvm::Function::hasFnAttribute().
| unsigned SIRegisterInfo::getMinNumSGPRs | ( | const SISubtarget & | ST, |
| unsigned | WavesPerEU | ||
| ) | const |
Definition at line 1187 of file SIRegisterInfo.cpp.
References llvm::AMDGPUSubtarget::getGeneration(), and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.
Referenced by getMaxNumSGPRs().
Definition at line 1295 of file SIRegisterInfo.cpp.
Referenced by getMaxNumVGPRs().
| int64_t SIRegisterInfo::getMUBUFInstrOffset | ( | const MachineInstr * | MI | ) | const |
Definition at line 206 of file SIRegisterInfo.cpp.
References assert(), llvm::MachineOperand::getImm(), llvm::AMDGPU::getNamedOperandIdx(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), and llvm::SIInstrInfo::isMUBUF().
Referenced by getFrameIndexInstrOffset(), isFrameOffsetLegal(), and needsFrameBaseReg().
| unsigned SIRegisterInfo::getNumAddressableSGPRs | ( | const SISubtarget & | ST | ) | const |
Definition at line 1165 of file SIRegisterInfo.cpp.
References llvm::AMDGPUSubtarget::getGeneration(), and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.
Referenced by getMaxNumSGPRs().
| unsigned SIRegisterInfo::getNumDebuggerReservedVGPRs | ( | const SISubtarget & | ST | ) | const |
Definition at line 1288 of file SIRegisterInfo.cpp.
References llvm::SISubtarget::debuggerReserveRegs().
Referenced by getMaxNumVGPRs().
| unsigned SIRegisterInfo::getNumReservedSGPRs | ( | const SISubtarget & | ST, |
| const SIMachineFunctionInfo & | MFI | ||
| ) | const |
Definition at line 1171 of file SIRegisterInfo.cpp.
References llvm::AMDGPUSubtarget::getGeneration(), llvm::SIMachineFunctionInfo::hasFlatScratchInit(), llvm::AMDGPUSubtarget::isXNACKEnabled(), llvm::AMDGPUSubtarget::SEA_ISLANDS, and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.
Referenced by getMaxNumSGPRs().
| const TargetRegisterClass * SIRegisterInfo::getPhysRegClass | ( | unsigned | Reg | ) | const |
Return the 'base' register class for this register.
e.g. SGPR0 => SReg_32, VGPR => VGPR_32 SGPR0_SGPR1 -> SReg_32, etc.
Definition at line 937 of file SIRegisterInfo.cpp.
References assert(), and llvm::TargetRegisterInfo::isVirtualRegister().
Referenced by llvm::SIInstrInfo::copyPhysReg(), getCopyRegClasses(), llvm::SIInstrInfo::getOpRegClass(), getRegClassForReg(), llvm::SIInstrInfo::isLegalRegOperand(), isSGPRReg(), isVGPR(), restoreSGPR(), and spillSGPR().
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Definition at line 317 of file SIRegisterInfo.cpp.
| unsigned SIRegisterInfo::getPreloadedValue | ( | const MachineFunction & | MF, |
| enum PreloadedValue | Value | ||
| ) | const |
Returns the physical register that Value is stored in.
Definition at line 1092 of file SIRegisterInfo.cpp.
References assert(), DISPATCH_ID, DISPATCH_PTR, FLAT_SCRATCH_INIT, llvm::MachineFunction::getInfo(), llvm::MachineFunction::getSubtarget(), llvm::SIMachineFunctionInfo::hasDispatchID(), llvm::SIMachineFunctionInfo::hasDispatchPtr(), llvm::SIMachineFunctionInfo::hasFlatScratchInit(), llvm::SIMachineFunctionInfo::hasKernargSegmentPtr(), llvm::SIMachineFunctionInfo::hasPrivateMemoryInputPtr(), llvm::SIMachineFunctionInfo::hasPrivateSegmentBuffer(), llvm::SIMachineFunctionInfo::hasQueuePtr(), llvm::SIMachineFunctionInfo::hasWorkGroupIDX(), llvm::SIMachineFunctionInfo::hasWorkGroupIDY(), llvm::SIMachineFunctionInfo::hasWorkGroupIDZ(), llvm::SIMachineFunctionInfo::hasWorkItemIDX(), llvm::SIMachineFunctionInfo::hasWorkItemIDY(), llvm::SIMachineFunctionInfo::hasWorkItemIDZ(), KERNARG_SEGMENT_PTR, llvm_unreachable, PRIVATE_SEGMENT_BUFFER, PRIVATE_SEGMENT_WAVE_BYTE_OFFSET, QUEUE_PTR, WORKGROUP_ID_X, WORKGROUP_ID_Y, WORKGROUP_ID_Z, WORKITEM_ID_X, WORKITEM_ID_Y, and WORKITEM_ID_Z.
Referenced by llvm::SIFrameLowering::emitPrologue(), and llvm::SITargetLowering::LowerFormalArguments().
| const TargetRegisterClass * SIRegisterInfo::getRegClassForReg | ( | const MachineRegisterInfo & | MRI, |
| unsigned | Reg | ||
| ) | const |
Definition at line 1467 of file SIRegisterInfo.cpp.
References getPhysRegClass(), llvm::MachineRegisterInfo::getRegClass(), and llvm::TargetRegisterInfo::isVirtualRegister().
Referenced by isVGPR(), llvm::SIInstrInfo::legalizeGenericOperand(), and llvm::SIInstrInfo::moveToVALU().
| ArrayRef< int16_t > SIRegisterInfo::getRegSplitParts | ( | const TargetRegisterClass * | RC, |
| unsigned | EltSize | ||
| ) | const |
Definition at line 1363 of file SIRegisterInfo.cpp.
References assert(), llvm::AMDGPU::getRegBitWidth(), llvm_unreachable, llvm::makeArrayRef(), and llvm::TargetRegisterClass::MC.
Referenced by llvm::SIInstrInfo::copyPhysReg(), restoreSGPR(), and spillSGPR().
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Definition at line 123 of file SIRegisterInfo.cpp.
References assert(), llvm::MachineFunction::getInfo(), getMaxNumSGPRs(), getMaxNumVGPRs(), llvm::SIMachineFunctionInfo::getScratchRSrcReg(), llvm::SIMachineFunctionInfo::getScratchWaveOffsetReg(), i, and llvm::BitVector::set().
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Definition at line 199 of file SIRegisterInfo.h.
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Definition at line 184 of file SIRegisterInfo.h.
Referenced by llvm::SIScheduleDAGMI::SIScheduleDAGMI().
| const TargetRegisterClass * SIRegisterInfo::getSubRegClass | ( | const TargetRegisterClass * | RC, |
| unsigned | SubIdx | ||
| ) | const |
RC for the given SubIdx. If SubIdx equals NoSubRegister, RC will be returned. Definition at line 1024 of file SIRegisterInfo.cpp.
References llvm::countPopulation(), isSGPRClass(), llvm_unreachable, and llvm::BitmaskEnumDetail::Mask().
Referenced by foldVGPRCopyIntoRegSequence(), and llvm::SIInstrInfo::isLegalRegOperand().
| unsigned SIRegisterInfo::getTotalNumSGPRs | ( | const SISubtarget & | ST | ) | const |
Definition at line 1159 of file SIRegisterInfo.cpp.
References llvm::AMDGPUSubtarget::getGeneration(), and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.
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Definition at line 238 of file SIRegisterInfo.h.
Referenced by getMaxNumVGPRs().
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Definition at line 233 of file SIRegisterInfo.h.
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Definition at line 185 of file SIRegisterInfo.h.
Referenced by llvm::SIScheduleDAGMI::SIScheduleDAGMI().
| bool SIRegisterInfo::hasVGPRs | ( | const TargetRegisterClass * | RC | ) | const |
Definition at line 965 of file SIRegisterInfo.cpp.
References llvm::TargetRegisterClass::getSize(), and llvm_unreachable.
Referenced by llvm::SIInstrInfo::canReadVGPR(), hasVGPROperands(), isSGPRClass(), isSGPRToVGPRCopy(), isVGPR(), isVGPR(), isVGPRToSGPRCopy(), llvm::SIInstrInfo::legalizeOperands(), llvm::SIInstrInfo::loadRegFromStackSlot(), phiHasVGPROperands(), and llvm::SIInstrInfo::storeRegToStackSlot().
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Definition at line 306 of file SIRegisterInfo.cpp.
References getMUBUFInstrOffset(), and llvm::SIInstrInfo::isMUBUF().
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Definition at line 100 of file SIRegisterInfo.h.
References hasVGPRs().
Referenced by llvm::SIInstrInfo::copyPhysReg(), llvm::SIInstrInfo::FoldImmediate(), foldVGPRCopyIntoRegSequence(), llvm::SIInstrInfo::getMovOpcode(), getSubRegClass(), isSGPRClassID(), isSGPRReg(), isSGPRToVGPRCopy(), isVGPRToSGPRCopy(), llvm::SIInstrInfo::legalizeOperands(), llvm::SIInstrInfo::legalizeOperandsSMRD(), llvm::SIInstrInfo::legalizeOperandsVOP3(), llvm::SIInstrInfo::legalizeOpWithMove(), llvm::SIInstrInfo::loadRegFromStackSlot(), restoreSGPR(), setM0ToIndexFromSGPR(), spillSGPR(), llvm::SIInstrInfo::storeRegToStackSlot(), and llvm::SIInstrInfo::usesConstantBus().
Definition at line 105 of file SIRegisterInfo.h.
References getRegClass(), and isSGPRClass().
Definition at line 191 of file SIRegisterInfo.h.
References llvm::BitVector::test().
Referenced by SIRegisterInfo().
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Definition at line 109 of file SIRegisterInfo.h.
References getPhysRegClass(), llvm::MachineRegisterInfo::getRegClass(), isSGPRClass(), and llvm::TargetRegisterInfo::isVirtualRegister().
Referenced by llvm::SIInstrInfo::isVGPRCopy(), llvm::SIInstrInfo::legalizeOperandsVOP2(), and tryConstantFoldOp().
| bool SIRegisterInfo::isVGPR | ( | const MachineRegisterInfo & | MRI, |
| unsigned | Reg | ||
| ) | const |
Definition at line 1475 of file SIRegisterInfo.cpp.
References getRegClassForReg(), and hasVGPRs().
Referenced by llvm::SIInstrInfo::FoldImmediate().
Definition at line 194 of file SIRegisterInfo.h.
References llvm::BitVector::test().
Referenced by SIRegisterInfo().
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Definition at line 235 of file SIRegisterInfo.cpp.
References llvm::MachineInstrBuilder::addReg(), llvm::MachineBasicBlock::begin(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::RegState::Dead, llvm::RegState::Define, llvm::MachineBasicBlock::end(), llvm::MDNode::get(), llvm::SISubtarget::getInstrInfo(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), llvm::MipsISD::Ins, llvm::RegState::Kill, MRI, and TII.
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Definition at line 226 of file SIRegisterInfo.cpp.
References getMUBUFInstrOffset(), and llvm::MachineInstr::mayLoadOrStore().
Definition at line 151 of file SIRegisterInfo.h.
References llvm::AMDGPU::OPERAND_SRC_FIRST, and llvm::AMDGPU::OPERAND_SRC_LAST.
Referenced by llvm::SIInstrInfo::isImmOperandLegal().
Definition at line 142 of file SIRegisterInfo.h.
References llvm::AMDGPU::OPERAND_REG_IMM_FIRST, and llvm::AMDGPU::OPERAND_REG_IMM_LAST.
Referenced by llvm::SIInstrInfo::isImmOperandLegal().
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Definition at line 185 of file SIRegisterInfo.cpp.
References llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getInfo(), llvm::MachineFunction::getSubtarget(), and llvm::MachineFrameInfo::hasStackObjects().
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Definition at line 181 of file SIRegisterInfo.cpp.
References llvm::MachineFunction::getFrameInfo(), and llvm::MachineFrameInfo::hasStackObjects().
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Definition at line 176 of file SIRegisterInfo.cpp.
References llvm::MachineFunction::getFrameInfo(), and llvm::MachineFrameInfo::hasStackObjects().
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Definition at line 195 of file SIRegisterInfo.cpp.
| unsigned SIRegisterInfo::reservedPrivateSegmentBufferReg | ( | const MachineFunction & | MF | ) | const |
Return the end register initially reserved for the scratch buffer in case spilling is needed.
Definition at line 98 of file SIRegisterInfo.cpp.
References llvm::alignDown(), and getMaxNumSGPRs().
Referenced by llvm::SITargetLowering::LowerFormalArguments().
| unsigned SIRegisterInfo::reservedPrivateSegmentWaveByteOffsetReg | ( | const MachineFunction & | MF | ) | const |
Return the end register initially reserved for the scratch wave offset in case spilling is needed.
Definition at line 105 of file SIRegisterInfo.cpp.
References getMaxNumSGPRs().
Referenced by llvm::SITargetLowering::LowerFormalArguments().
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Definition at line 272 of file SIRegisterInfo.cpp.
References assert(), llvm::MachineOperand::ChangeToRegister(), llvm::MachineOperand::getImm(), llvm::SISubtarget::getInstrInfo(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getSubtarget(), llvm::MachineOperand::isFI(), llvm_unreachable, MBB, Offset, llvm::MachineInstr::operands(), and TII.
| void SIRegisterInfo::restoreSGPR | ( | MachineBasicBlock::iterator | MI, |
| int | FI, | ||
| RegScavenger * | RS | ||
| ) | const |
Definition at line 695 of file SIRegisterInfo.cpp.
References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMemOperand(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::ArrayRef< T >::empty(), EnableSpillSGPRToSMEM, llvm::MDNode::get(), llvm::MachinePointerInfo::getFixedStack(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getInfo(), llvm::SISubtarget::getInstrInfo(), llvm::MachineFunction::getMachineMemOperand(), getPhysRegClass(), llvm::MachineFunction::getRegInfo(), getRegSplitParts(), llvm::SIMachineFunctionInfo::getScratchRSrcReg(), llvm::SIMachineFunctionInfo::getScratchWaveOffsetReg(), llvm::TargetRegisterClass::getSize(), llvm::SIMachineFunctionInfo::getSpilledReg(), getSpillEltSize(), llvm::MachineFunction::getSubtarget(), llvm::AMDGPUSubtarget::getWavefrontSize(), llvm::SIMachineFunctionInfo::SpilledReg::hasReg(), llvm::SISubtarget::hasScalarStores(), i, llvm::RegState::ImplicitDefine, llvm::RegScavenger::isRegUsed(), isSGPRClass(), llvm::RegState::Kill, llvm::SIMachineFunctionInfo::SpilledReg::Lane, llvm::MinAlign(), llvm::MachineMemOperand::MOLoad, MRI, llvm::ArrayRef< T >::size(), SubReg, and llvm::SIMachineFunctionInfo::SpilledReg::VGPR.
Referenced by eliminateFrameIndex().
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Definition at line 1065 of file SIRegisterInfo.cpp.
| void SIRegisterInfo::spillSGPR | ( | MachineBasicBlock::iterator | MI, |
| int | FI, | ||
| RegScavenger * | RS | ||
| ) | const |
Definition at line 548 of file SIRegisterInfo.cpp.
References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMemOperand(), llvm::MachineInstrBuilder::addReg(), llvm::SIMachineFunctionInfo::addToSpilledSGPRs(), assert(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::ArrayRef< T >::empty(), EnableSpillSGPRToSMEM, llvm::MDNode::get(), llvm::MachinePointerInfo::getFixedStack(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getInfo(), llvm::SISubtarget::getInstrInfo(), llvm::getKillRegState(), llvm::MachineFunction::getMachineMemOperand(), llvm::MachineBasicBlock::getParent(), getPhysRegClass(), llvm::MachineFunction::getRegInfo(), getRegSplitParts(), llvm::SIMachineFunctionInfo::getScratchRSrcReg(), llvm::SIMachineFunctionInfo::getScratchWaveOffsetReg(), llvm::TargetRegisterClass::getSize(), llvm::SIMachineFunctionInfo::getSpilledReg(), getSpillEltSize(), llvm::MachineFunction::getSubtarget(), llvm::AMDGPUSubtarget::getWavefrontSize(), llvm::SIMachineFunctionInfo::SpilledReg::hasReg(), llvm::SISubtarget::hasScalarStores(), i, llvm::RegState::Implicit, llvm::RegScavenger::isRegUsed(), isSGPRClass(), llvm::RegState::Kill, llvm::SIMachineFunctionInfo::SpilledReg::Lane, llvm::MinAlign(), llvm::MachineMemOperand::MOStore, MRI, llvm::ArrayRef< T >::size(), and llvm::SIMachineFunctionInfo::SpilledReg::VGPR.
Referenced by eliminateFrameIndex().
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Definition at line 201 of file SIRegisterInfo.cpp.
1.8.6