14 #ifndef LLVM_LIB_TARGET_X86_MCTARGETDESC_X86MCTARGETDESC_H
15 #define LLVM_LIB_TARGET_X86_MCTARGETDESC_X86MCTARGETDESC_H
18 #include "llvm/Support/DataTypes.h"
28 class MCSubtargetInfo;
29 class MCRelocationInfo;
30 class MCTargetOptions;
35 class raw_pwrite_stream;
42 namespace DWARFFlavour {
95 uint8_t OSABI, uint16_t EMachine);
116 #define GET_REGINFO_ENUM
117 #include "X86GenRegisterInfo.inc"
121 #define GET_INSTRINFO_ENUM
122 #include "X86GenInstrInfo.inc"
124 #define GET_SUBTARGETINFO_ENUM
125 #include "X86GenSubtargetInfo.inc"
MCStreamer * createX86WinCOFFStreamer(MCContext &C, MCAsmBackend &AB, raw_pwrite_stream &OS, MCCodeEmitter *CE, bool RelaxAll, bool IncrementalLinkerCompatible)
Construct an X86 Windows COFF machine code streamer which will generate PE/COFF format object files...
unsigned getDwarfRegFlavour(const Triple &TT, bool isEH)
Defines the object file and target independent interfaces used by the assembler backend to write nati...
std::string ParseX86Triple(const Triple &TT)
MCObjectWriter * createX86WinCOFFObjectWriter(raw_pwrite_stream &OS, bool Is64Bit)
Construct an X86 Win COFF object writer.
MCCodeEmitter * createX86MCCodeEmitter(const MCInstrInfo &MCII, const MCRegisterInfo &MRI, MCContext &Ctx)
Context object for machine code objects.
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
Streaming machine code generation interface.
unsigned const MachineRegisterInfo * MRI
MCObjectWriter * createX86MachObjectWriter(raw_pwrite_stream &OS, bool Is64Bit, uint32_t CPUType, uint32_t CPUSubtype)
Construct an X86 Mach-O object writer.
MCCodeEmitter - Generic instruction encoding interface.
Interface to description of machine instruction set.
Triple - Helper class for working with autoconf configuration names.
MCSubtargetInfo * createX86MCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS)
Create a X86 MCSubtargetInfo instance.
unsigned getX86SubSuperRegisterOrZero(unsigned, unsigned, bool High=false)
Returns the sub or super register of a specific X86 register.
cl::opt< bool > IncrementalLinkerCompatible("incremental-linker-compatible", cl::desc("When used with filetype=obj, ""emit an object file which can be used with an incremental linker"))
MCAsmBackend * createX86_64AsmBackend(const Target &T, const MCRegisterInfo &MRI, const Triple &TT, StringRef CPU, const MCTargetOptions &Options)
void initLLVMToSEHAndCVRegMapping(MCRegisterInfo *MRI)
CPUType
These values correspond to the CV_CPU_TYPE_e enumeration, and are documented here: https://msdn...
static const char * Target
static GCRegistry::Add< ShadowStackGC > C("shadow-stack","Very portable GC for uncooperative code generators")
unsigned getX86SubSuperRegister(unsigned, unsigned, bool High=false)
Returns the sub or super register of a specific X86 register.
MCObjectWriter * createX86ELFObjectWriter(raw_pwrite_stream &OS, bool IsELF64, uint8_t OSABI, uint16_t EMachine)
Construct an X86 ELF object writer.
Target - Wrapper for Target specific information.
MCSubtargetInfo - Generic base class for all target subtargets.
Target & getTheX86_32Target()
MCAsmBackend * createX86_32AsmBackend(const Target &T, const MCRegisterInfo &MRI, const Triple &TT, StringRef CPU, const MCTargetOptions &Options)
An abstract base class for streams implementations that also support a pwrite operation.
cl::opt< bool > RelaxAll("mc-relax-all", cl::desc("When used with filetype=obj, ""relax all fixups in the emitted object file"))
Generic interface to target specific assembler backends.
StringRef - Represent a constant reference to a string, i.e.
Target & getTheX86_64Target()