76 return getValueAPF().bitwiseIsEqual(V);
102 unsigned SplatBitSize;
105 return BV->isConstantSplat(SplatVal, SplatUndef, SplatBitSize, HasUndefs) &&
126 if (i == e)
return false;
139 if (CN->getAPIntValue().countTrailingOnes() < EltSize)
142 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingOnes() < EltSize)
150 for (++i; i != e; ++
i)
163 bool IsAllUndef =
true;
178 if (CN->getAPIntValue().countTrailingZeros() < EltSize)
181 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingZeros() < EltSize)
200 if (!isa<ConstantSDNode>(
Op))
213 if (!isa<ConstantFPSDNode>(
Op))
251 unsigned OldL = (Operation >> 2) & 1;
252 unsigned OldG = (Operation >> 1) & 1;
259 unsigned Operation =
Op;
297 unsigned Op = Op1 | Op2;
355 for (
auto&
Op : Ops) {
365 for (
auto&
Op : Ops) {
395 ID.
AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
415 ID.
AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask());
418 ID.
AddPointer(cast<SrcValueSDNode>(N)->getValue());
422 ID.
AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
426 ID.
AddInteger(cast<JumpTableSDNode>(N)->getIndex());
427 ID.
AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
507 ID.
AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace());
558 if (Node.use_empty())
573 while (!DeadNodes.
empty()) {
577 DUL->NodeDeleted(N,
nullptr);
580 RemoveNodeFromCSEMaps(N);
611 RemoveNodeFromCSEMaps(N);
615 DeleteNodeNotInCSEMaps(N);
618 void SelectionDAG::DeleteNodeNotInCSEMaps(
SDNode *
N) {
620 "Cannot delete the entry node!");
631 if (I == DbgValMap.end())
633 for (
auto &Val: I->second)
634 Val->setIsInvalidated();
638 void SelectionDAG::DeallocateNode(
SDNode *N) {
663 "Wrong return type!");
666 "Mismatched operand types!");
668 "Wrong operand type!");
670 "Wrong return type size");
677 "Wrong number of operands!");
680 assert((
I->getValueType() == EltVT ||
681 (EltVT.isInteger() &&
I->getValueType().isInteger() &&
682 EltVT.bitsLE(
I->getValueType()))) &&
683 "Wrong operand type!");
685 "Operands must all have the same type");
697 void SelectionDAG::InsertNode(
SDNode *N) {
698 AllNodes.push_back(N);
709 bool SelectionDAG::RemoveNodeFromCSEMaps(
SDNode *N) {
714 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->
get()] &&
715 "Cond code doesn't exist!");
716 Erased = CondCodeNodes[cast<CondCodeSDNode>(
N)->
get()] !=
nullptr;
717 CondCodeNodes[cast<CondCodeSDNode>(
N)->
get()] =
nullptr;
720 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->
getSymbol());
724 Erased = TargetExternalSymbols.erase(
725 std::pair<std::string,unsigned char>(ESN->
getSymbol(),
730 auto *MCSN = cast<MCSymbolSDNode>(
N);
731 Erased = MCSymbols.erase(MCSN->getMCSymbol());
735 EVT VT = cast<VTSDNode>(
N)->getVT();
737 Erased = ExtendedValueTypeNodes.erase(VT);
748 Erased = CSEMap.RemoveNode(N);
771 SelectionDAG::AddModifiedNodeToCSEMaps(
SDNode *N) {
775 SDNode *Existing = CSEMap.GetOrInsertNode(N);
784 DUL->NodeDeleted(N, Existing);
785 DeleteNodeNotInCSEMaps(N);
808 SDNode *Node = FindNodeOrInsertPos(ID,
SDLoc(N), InsertPos);
829 SDNode *Node = FindNodeOrInsertPos(ID,
SDLoc(N), InsertPos);
849 SDNode *Node = FindNodeOrInsertPos(ID,
SDLoc(N), InsertPos);
866 : TM(tm), TSI(nullptr), TLI(nullptr), OptLevel(OL),
869 UpdateListeners(nullptr) {
870 InsertNode(&EntryNode);
882 assert(!UpdateListeners &&
"Dangling registered DAGUpdateListeners");
884 OperandRecycler.clear(OperandAllocator);
888 void SelectionDAG::allnodes_clear() {
889 assert(&*AllNodes.begin() == &EntryNode);
890 AllNodes.remove(AllNodes.begin());
891 while (!AllNodes.empty())
892 DeallocateNode(&AllNodes.front());
894 NextPersistentId = 0;
898 SDNode *SelectionDAG::GetBinarySDNode(
unsigned Opcode,
const SDLoc &DL,
906 if (Flags ==
nullptr)
909 auto *FN = newSDNode<BinaryWithFlagsSDNode>(Opcode, DL.
getIROrder(),
911 createOperands(FN, Ops);
917 createOperands(N, Ops);
923 SDNode *N = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
930 "debug location. Use another overload.");
937 const SDLoc &DL,
void *&InsertPos) {
938 SDNode *N = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
963 OperandRecycler.clear(OperandAllocator);
964 OperandAllocator.
Reset();
967 ExtendedValueTypeNodes.clear();
968 ExternalSymbols.clear();
969 TargetExternalSymbols.clear();
971 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
973 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
974 static_cast<SDNode*
>(
nullptr));
976 EntryNode.UseList =
nullptr;
977 InsertNode(&EntryNode);
1011 "getZeroExtendInReg should use the vector element type instead of "
1012 "the vector type!");
1023 assert(VT.
isVector() &&
"This DAG node is restricted to vector types.");
1025 "The sizes of the input and result must match in order to perform the "
1026 "extend in-register.");
1028 "The destination vector type must have fewer lanes than the input.");
1034 assert(VT.
isVector() &&
"This DAG node is restricted to vector types.");
1036 "The sizes of the input and result must match in order to perform the "
1037 "extend in-register.");
1039 "The destination vector type must have fewer lanes than the input.");
1045 assert(VT.
isVector() &&
"This DAG node is restricted to vector types.");
1047 "The sizes of the input and result must match in order to perform the "
1048 "extend in-register.");
1050 "The destination vector type must have fewer lanes than the input.");
1080 bool isT,
bool isO) {
1083 (uint64_t)((int64_t)Val >> EltVT.
getSizeInBits()) + 1 < 2) &&
1084 "getConstant with a uint64_t value that doesn't fit in the type!");
1089 bool isT,
bool isO) {
1094 EVT VT,
bool isT,
bool isO) {
1122 unsigned ViaVecNumElts = VT.
getSizeInBits() / ViaEltSizeInBits;
1134 ViaEltVT, isT, isO));
1151 Ops.
insert(Ops.
end(), EltParts.begin(), EltParts.end());
1156 "APInt size does not match type size!");
1164 if ((N = FindNodeOrInsertPos(ID, DL, IP)))
1169 N = newSDNode<ConstantSDNode>(isT, isO, Elt, DL.
getDebugLoc(), EltVT);
1170 CSEMap.InsertNode(N, IP);
1191 EVT VT,
bool isTarget) {
1205 if ((N = FindNodeOrInsertPos(ID, DL, IP)))
1210 N = newSDNode<ConstantFPSDNode>(isTarget, &V, DL.
getDebugLoc(), EltVT);
1211 CSEMap.InsertNode(N, IP);
1240 EVT VT, int64_t
Offset,
bool isTargetGA,
1242 assert((TargetFlags == 0 || isTargetGA) &&
1243 "Cannot set target flags on target-independent globals");
1262 if (
SDNode *
E = FindNodeOrInsertPos(ID, DL, IP))
1265 auto *N = newSDNode<GlobalAddressSDNode>(
1267 CSEMap.InsertNode(N, IP);
1278 if (
SDNode *
E = FindNodeOrInsertPos(ID, IP))
1281 auto *N = newSDNode<FrameIndexSDNode>(FI, VT, isTarget);
1282 CSEMap.InsertNode(N, IP);
1289 assert((TargetFlags == 0 || isTarget) &&
1290 "Cannot set target flags on target-independent jump tables");
1297 if (
SDNode *
E = FindNodeOrInsertPos(ID, IP))
1300 auto *N = newSDNode<JumpTableSDNode>(JTI, VT, isTarget,
TargetFlags);
1301 CSEMap.InsertNode(N, IP);
1307 unsigned Alignment,
int Offset,
1310 assert((TargetFlags == 0 || isTarget) &&
1311 "Cannot set target flags on target-independent globals");
1324 if (
SDNode *
E = FindNodeOrInsertPos(ID, IP))
1327 auto *N = newSDNode<ConstantPoolSDNode>(isTarget,
C, VT,
Offset, Alignment,
1329 CSEMap.InsertNode(N, IP);
1336 unsigned Alignment,
int Offset,
1339 assert((TargetFlags == 0 || isTarget) &&
1340 "Cannot set target flags on target-independent globals");
1351 if (
SDNode *
E = FindNodeOrInsertPos(ID, IP))
1354 auto *N = newSDNode<ConstantPoolSDNode>(isTarget,
C, VT,
Offset, Alignment,
1356 CSEMap.InsertNode(N, IP);
1369 if (
SDNode *
E = FindNodeOrInsertPos(ID, IP))
1373 CSEMap.InsertNode(N, IP);
1383 if (
SDNode *
E = FindNodeOrInsertPos(ID, IP))
1386 auto *N = newSDNode<BasicBlockSDNode>(
MBB);
1387 CSEMap.InsertNode(N, IP);
1394 ValueTypeNodes.size())
1401 N = newSDNode<VTSDNode>(VT);
1407 SDNode *&N = ExternalSymbols[Sym];
1409 N = newSDNode<ExternalSymbolSDNode>(
false, Sym, 0, VT);
1415 SDNode *&N = MCSymbols[Sym];
1418 N = newSDNode<MCSymbolSDNode>(Sym, VT);
1426 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1429 N = newSDNode<ExternalSymbolSDNode>(
true, Sym,
TargetFlags, VT);
1435 if ((
unsigned)Cond >= CondCodeNodes.size())
1436 CondCodeNodes.resize(Cond+1);
1438 if (!CondCodeNodes[Cond]) {
1439 auto *N = newSDNode<CondCodeSDNode>(Cond);
1440 CondCodeNodes[Cond] =
N;
1444 return SDValue(CondCodeNodes[Cond], 0);
1457 "Must have the same number of vector elements as mask elements!");
1459 "Invalid VECTOR_SHUFFLE");
1467 int NElts = Mask.
size();
1468 assert(
all_of(Mask, [&](
int M) {
return M < (NElts * 2); }) &&
1469 "Index out of range");
1477 for (
int i = 0;
i != NElts; ++
i)
1478 if (MaskVec[
i] >= NElts) MaskVec[
i] -= NElts;
1493 for (
int i = 0;
i < NElts; ++
i) {
1498 if (UndefElements[MaskVec[
i] -
Offset]) {
1504 if (!UndefElements[
i])
1508 if (
auto *N1BV = dyn_cast<BuildVectorSDNode>(N1))
1509 BlendSplat(N1BV, 0);
1510 if (
auto *N2BV = dyn_cast<BuildVectorSDNode>(N2))
1511 BlendSplat(N2BV, NElts);
1515 bool AllLHS =
true, AllRHS =
true;
1517 for (
int i = 0;
i != NElts; ++
i) {
1518 if (MaskVec[
i] >= NElts) {
1523 }
else if (MaskVec[
i] >= 0) {
1527 if (AllLHS && AllRHS)
1529 if (AllLHS && !N2Undef)
1542 bool Identity =
true, AllSame =
true;
1543 for (
int i = 0;
i != NElts; ++
i) {
1544 if (MaskVec[
i] >= 0 && MaskVec[
i] !=
i) Identity =
false;
1545 if (MaskVec[
i] != MaskVec[0]) AllSame =
false;
1547 if (Identity && NElts)
1560 if (
auto *BV = dyn_cast<BuildVectorSDNode>(V)) {
1572 if (Splat && UndefElements.
none()) {
1577 if (
auto *
C = dyn_cast<ConstantSDNode>(Splat))
1578 if (
C->isNullValue())
1583 if (AllSame && SameNumElts) {
1600 for (
int i = 0;
i != NElts; ++
i)
1604 if (
SDNode *
E = FindNodeOrInsertPos(ID, dl, IP))
1610 int *MaskAlloc = OperandAllocator.
Allocate<
int>(NElts);
1611 std::copy(MaskVec.begin(), MaskVec.end(), MaskAlloc);
1613 auto *N = newSDNode<ShuffleVectorSDNode>(VT, dl.
getIROrder(),
1615 createOperands(N, Ops);
1617 CSEMap.InsertNode(N, IP);
1637 if (
SDNode *
E = FindNodeOrInsertPos(ID, IP))
1640 auto *N = newSDNode<RegisterSDNode>(RegNo, VT);
1641 CSEMap.InsertNode(N, IP);
1651 if (
SDNode *
E = FindNodeOrInsertPos(ID, IP))
1654 auto *N = newSDNode<RegisterMaskSDNode>(RegMask);
1655 CSEMap.InsertNode(N, IP);
1667 if (
SDNode *
E = FindNodeOrInsertPos(ID, IP))
1671 createOperands(N, Ops);
1673 CSEMap.InsertNode(N, IP);
1690 if (
SDNode *
E = FindNodeOrInsertPos(ID, IP))
1694 CSEMap.InsertNode(N, IP);
1701 "SrcValue is not a pointer?");
1708 if (
SDNode *
E = FindNodeOrInsertPos(ID, IP))
1711 auto *N = newSDNode<SrcValueSDNode>(V);
1712 CSEMap.InsertNode(N, IP);
1723 if (
SDNode *
E = FindNodeOrInsertPos(ID, IP))
1726 auto *N = newSDNode<MDNodeSDNode>(MD);
1727 CSEMap.InsertNode(N, IP);
1740 unsigned SrcAS,
unsigned DestAS) {
1748 if (
SDNode *
E = FindNodeOrInsertPos(ID, dl, IP))
1753 createOperands(N, Ops);
1755 CSEMap.InsertNode(N, IP);
1765 if (OpTy == ShTy || OpTy.
isVector())
return Op;
1773 const Value *V = cast<SrcValueSDNode>(Node->
getOperand(2))->getValue();
1784 assert(((Align & (Align-1)) == 0) &&
"Expected Align to be a power of 2");
1787 getConstant(Align - 1, dl, VAList.getValueType()));
1790 getConstant(-(int64_t)Align, dl, VAList.getValueType()));
1797 dl, VAList.getValueType()));
1810 const Value *VD = cast<SrcValueSDNode>(Node->
getOperand(3))->getValue();
1823 unsigned StackAlign =
1824 std::max((
unsigned)
getDataLayout().getPrefTypeAlignment(Ty), minAlign);
1874 const APInt &C2 = N2C->getAPIntValue();
1876 const APInt &C1 = N1C->getAPIntValue();
1944 return getSetCC(dl, VT, N2, N1, SwappedCond);
1963 unsigned Depth)
const {
1964 APInt KnownZero, KnownOne;
1966 return (KnownZero & Mask) ==
Mask;
1974 const APInt &ShAmt = SA->getAPIntValue();
2001 unsigned Depth)
const {
2004 KnownZero = KnownOne =
APInt(BitWidth, 0);
2008 APInt KnownZero2, KnownOne2;
2018 KnownOne = cast<ConstantSDNode>(
Op)->getAPIntValue();
2019 KnownZero = ~KnownOne;
2024 "Unexpected vector size");
2027 if (!DemandedElts[
i])
2036 "Expected BUILD_VECTOR implicit truncation");
2037 KnownOne2 = KnownOne2.
trunc(BitWidth);
2038 KnownZero2 = KnownZero2.
trunc(BitWidth);
2042 KnownOne &= KnownOne2;
2043 KnownZero &= KnownZero2;
2046 if (!KnownOne && !KnownZero)
2053 APInt DemandedLHS(NumElts, 0), DemandedRHS(NumElts, 0);
2056 assert(NumElts == SVN->
getMask().size() &&
"Unexpected vector size");
2057 for (
unsigned i = 0;
i != NumElts; ++
i) {
2058 if (!DemandedElts[
i])
2066 KnownZero.clearAllBits();
2067 DemandedLHS.clearAllBits();
2072 if ((
unsigned)M < NumElts)
2073 DemandedLHS.setBit((
unsigned)M % NumElts);
2075 DemandedRHS.
setBit((
unsigned)M % NumElts);
2078 if (!!DemandedLHS) {
2081 KnownOne &= KnownOne2;
2082 KnownZero &= KnownZero2;
2085 if (!KnownOne && !KnownZero)
2087 if (!!DemandedRHS) {
2090 KnownOne &= KnownOne2;
2091 KnownZero &= KnownZero2;
2101 for (
unsigned i = 0;
i != NumSubVectors; ++
i) {
2102 APInt DemandedSub = DemandedElts.
lshr(
i * NumSubVectorElts);
2103 DemandedSub = DemandedSub.
trunc(NumSubVectorElts);
2104 if (!!DemandedSub) {
2107 KnownOne &= KnownOne2;
2108 KnownZero &= KnownZero2;
2111 if (!KnownOne && !KnownZero)
2125 APInt DemandedSrc = DemandedElts.
zext(NumSrcElts).
shl(Idx);
2141 if (BitWidth == SubBitWidth) {
2152 if ((BitWidth % SubBitWidth) == 0) {
2159 unsigned SubScale = BitWidth / SubBitWidth;
2160 APInt SubDemandedElts(NumElts * SubScale, 0);
2161 for (
unsigned i = 0;
i != NumElts; ++
i)
2162 if (DemandedElts[
i])
2163 SubDemandedElts.
setBit(i * SubScale);
2165 for (
unsigned i = 0; i != SubScale; ++
i) {
2168 KnownOne |= KnownOne2.
zext(BitWidth).
shl(SubBitWidth * i);
2169 KnownZero |= KnownZero2.
zext(BitWidth).
shl(SubBitWidth * i);
2174 if ((SubBitWidth % BitWidth) == 0) {
2180 unsigned SubScale = SubBitWidth / BitWidth;
2181 APInt SubDemandedElts(NumElts / SubScale, 0);
2182 for (
unsigned i = 0;
i != NumElts; ++
i)
2183 if (DemandedElts[
i])
2184 SubDemandedElts.
setBit(i / SubScale);
2189 for (
unsigned i = 0; i != NumElts; ++
i)
2190 if (DemandedElts[i]) {
2191 unsigned Offset = (i % SubScale) * BitWidth;
2192 KnownOne &= KnownOne2.
lshr(Offset).
trunc(BitWidth);
2193 KnownZero &= KnownZero2.
lshr(Offset).
trunc(BitWidth);
2195 if (!KnownOne && !KnownZero)
2209 KnownOne &= KnownOne2;
2211 KnownZero |= KnownZero2;
2220 KnownZero &= KnownZero2;
2222 KnownOne |= KnownOne2;
2231 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
2233 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
2234 KnownZero = KnownZeroOut;
2247 KnownOne.clearAllBits();
2248 unsigned TrailZ = KnownZero.countTrailingOnes() +
2250 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
2252 BitWidth) - BitWidth;
2254 TrailZ =
std::min(TrailZ, BitWidth);
2270 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
2271 if (RHSUnknownLeadingOnes != BitWidth)
2273 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
2281 if (!KnownOne && !KnownZero)
2286 KnownOne &= KnownOne2;
2287 KnownZero &= KnownZero2;
2292 if (!KnownOne && !KnownZero)
2297 KnownOne &= KnownOne2;
2298 KnownZero &= KnownZero2;
2328 KnownZero = KnownZero << *ShAmt;
2329 KnownOne = KnownOne << *ShAmt;
2338 KnownZero = KnownZero.lshr(*ShAmt);
2339 KnownOne = KnownOne.lshr(*ShAmt);
2342 KnownZero |= HighBits;
2349 KnownZero = KnownZero.lshr(*ShAmt);
2350 KnownOne = KnownOne.lshr(*ShAmt);
2355 SignBit = SignBit.lshr(*ShAmt);
2356 if (KnownZero.intersects(SignBit)) {
2357 KnownZero |= HighBits;
2358 }
else if (KnownOne.intersects(SignBit)) {
2359 KnownOne |= HighBits;
2376 InSignBit = InSignBit.
zext(BitWidth);
2378 InputDemandedBits |= InSignBit;
2382 KnownOne &= InputDemandedBits;
2383 KnownZero &= InputDemandedBits;
2387 if (KnownZero.intersects(InSignBit)) {
2388 KnownZero |= NewBits;
2389 KnownOne &= ~NewBits;
2390 }
else if (KnownOne.intersects(InSignBit)) {
2391 KnownOne |= NewBits;
2392 KnownZero &= ~NewBits;
2394 KnownZero &= ~NewBits;
2395 KnownOne &= ~NewBits;
2404 unsigned LowBits =
Log2_32(BitWidth)+1;
2406 KnownOne.clearAllBits();
2426 KnownZero = KnownZero.trunc(InBits);
2427 KnownOne = KnownOne.trunc(InBits);
2430 KnownZero = KnownZero.zext(BitWidth);
2431 KnownOne = KnownOne.zext(BitWidth);
2432 KnownZero |= NewBits;
2439 KnownZero = KnownZero.trunc(InBits);
2440 KnownOne = KnownOne.trunc(InBits);
2446 KnownZero = KnownZero.sext(BitWidth);
2447 KnownOne = KnownOne.sext(BitWidth);
2453 KnownZero = KnownZero.trunc(InBits);
2454 KnownOne = KnownOne.trunc(InBits);
2456 KnownZero = KnownZero.zext(BitWidth);
2457 KnownOne = KnownOne.zext(BitWidth);
2463 KnownZero = KnownZero.zext(InBits);
2464 KnownOne = KnownOne.zext(InBits);
2467 KnownZero = KnownZero.trunc(BitWidth);
2468 KnownOne = KnownOne.trunc(BitWidth);
2475 KnownZero |= (~InMask);
2476 KnownOne &= (~KnownZero);
2489 if (CLHS->getAPIntValue().isNonNegative()) {
2499 if ((KnownZero2 & MaskV) == MaskV) {
2500 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
2524 KnownZeroHigh =
std::min(KnownZeroHigh,
2526 KnownZeroLow =
std::min(KnownZeroLow,
2531 if (KnownZeroHigh > 1)
2540 if (KnownZeroLow >= 2)
2546 const APInt &RA = Rem->getAPIntValue().
abs();
2548 APInt LowBits = RA - 1;
2553 KnownZero = KnownZero2 & LowBits;
2554 KnownOne = KnownOne2 & LowBits;
2558 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
2559 KnownZero |= ~LowBits;
2563 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
2564 KnownOne |= ~LowBits;
2565 assert((KnownZero & KnownOne) == 0&&
"Bits known to be one AND zero?");
2571 const APInt &RA = Rem->getAPIntValue();
2573 APInt LowBits = (RA - 1);
2578 KnownZero = KnownZero2 | ~LowBits;
2579 KnownOne = KnownOne2 & LowBits;
2591 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
2593 KnownOne.clearAllBits();
2603 KnownZero = KnownZero.getHiBits(KnownZero.getBitWidth() - Index * BitWidth);
2604 KnownOne = KnownOne.getHiBits(KnownOne.getBitWidth() - Index * BitWidth);
2607 KnownZero = KnownZero.trunc(BitWidth);
2608 KnownOne = KnownOne.trunc(BitWidth);
2620 if (BitWidth > EltBitWidth) {
2621 KnownZero = KnownZero.trunc(EltBitWidth);
2622 KnownOne = KnownOne.trunc(EltBitWidth);
2634 if (BitWidth > EltBitWidth) {
2635 KnownZero = KnownZero.zext(BitWidth);
2636 KnownOne = KnownOne.zext(BitWidth);
2653 if (DemandedElts[EltIdx]) {
2655 KnownOne &= KnownOne2.zextOrTrunc(KnownOne.getBitWidth());
2656 KnownZero &= KnownZero2.
zextOrTrunc(KnownZero.getBitWidth());;
2664 KnownOne &= KnownOne2;
2665 KnownZero &= KnownZero2;
2671 KnownOne &= KnownOne2.zextOrTrunc(KnownOne.getBitWidth());
2672 KnownZero &= KnownZero2.
zextOrTrunc(KnownZero.getBitWidth());;
2690 if (!KnownOne && !KnownZero)
2694 KnownZero &= KnownZero2;
2695 KnownOne &= KnownOne2;
2719 assert((KnownZero & KnownOne) == 0 &&
"Bits known to be one AND zero?");
2728 return Const->getAPIntValue().zextOrTrunc(BitWidth).isPowerOf2();
2734 if (
C &&
C->getAPIntValue() == 1)
2742 if (
C &&
C->getAPIntValue().isSignBit())
2750 return C->getAPIntValue().zextOrTrunc(BitWidth).isPowerOf2();
2759 APInt KnownZero, KnownOne;
2770 unsigned FirstAnswer = 1;
2778 Tmp = cast<VTSDNode>(Op.
getOperand(1))->getVT().getSizeInBits();
2779 return VTBits-Tmp+1;
2781 Tmp = cast<VTSDNode>(Op.
getOperand(1))->getVT().getSizeInBits();
2785 const APInt &Val = cast<ConstantSDNode>(
Op)->getAPIntValue();
2795 Tmp = cast<VTSDNode>(Op.
getOperand(1))->getVT().getScalarSizeInBits();
2799 return std::max(Tmp, Tmp2);
2805 APInt ShiftVal =
C->getAPIntValue();
2814 if (
C->getAPIntValue().uge(VTBits) ||
2815 C->getAPIntValue().uge(Tmp))
break;
2816 return Tmp -
C->getZExtValue();
2835 if (Tmp == 1)
return 1;
2840 if (Tmp == 1)
return 1;
2877 unsigned RotAmt =
C->getZExtValue() & (VTBits-1);
2881 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2886 if (Tmp > RotAmt+1)
return Tmp-RotAmt;
2893 if (Tmp == 1)
return 1;
2897 if (CRHS->isAllOnesValue()) {
2898 APInt KnownZero, KnownOne;
2903 if ((KnownZero |
APInt(VTBits, 1)).isAllOnesValue())
2913 if (Tmp2 == 1)
return 1;
2918 if (Tmp2 == 1)
return 1;
2922 if (CLHS->isNullValue()) {
2923 APInt KnownZero, KnownOne;
2927 if ((KnownZero |
APInt(VTBits, 1)).isAllOnesValue())
2941 if (Tmp == 1)
return 1;
2947 if (NumSrcSignBits > (NumSrcBits - VTBits))
2948 return NumSrcSignBits - (NumSrcBits - VTBits);
2962 return std::max(std::min(KnownSign - rIndex * BitWidth, BitWidth), 0);
2974 if (BitWidth == EltBitWidth)
2993 unsigned ExtType =
LD->getExtensionType();
2997 Tmp =
LD->getMemoryVT().getScalarSizeInBits();
2998 return VTBits-Tmp+1;
3000 Tmp =
LD->getMemoryVT().getScalarSizeInBits();
3012 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
3017 APInt KnownZero, KnownOne;
3046 cast<ConstantSDNode>(Op.
getOperand(1))->getAPIntValue()))
3059 return !
C->getValueAPF().isNaN();
3069 return !
C->isZero();
3076 return !
C->isNullValue();
3085 if (A == B)
return true;
3090 if (CA->isZero() && CB->isZero())
return true;
3098 "Values must have the same type");
3103 return (AZero | BZero).isAllOnesValue();
3109 assert(!Ops.
empty() &&
"Can't concatenate an empty list of vectors!");
3114 "Concatenation of vectors with inconsistent value types!");
3115 assert((Ops.
size() * Ops[0].getValueType().getVectorNumElements()) ==
3117 "Incorrect element count in vector concatenation!");
3119 if (Ops.
size() == 1)
3160 if (
SDNode *
E = FindNodeOrInsertPos(ID, DL, IP))
3165 CSEMap.InsertNode(N, IP);
3179 const APInt &Val =
C->getAPIntValue();
3184 C->isTargetOpcode(),
C->isOpaque());
3189 C->isTargetOpcode(),
C->isOpaque());
3289 if (BV->isConstant()) {
3334 "Vector element count mismatch!");
3336 "Invalid fpext node, dst < src!");
3342 "Invalid SIGN_EXTEND!");
3347 "Vector element count mismatch!");
3349 "Invalid sext node, dst < src!");
3358 "Invalid ZERO_EXTEND!");
3363 "Vector element count mismatch!");
3365 "Invalid zext node, dst < src!");
3375 "Invalid ANY_EXTEND!");
3380 "Vector element count mismatch!");
3382 "Invalid anyext node, dst < src!");
3400 "Invalid TRUNCATE!");
3405 "Vector element count mismatch!");
3407 "Invalid truncate node, src < dst!");
3427 "BSWAP types must be a multiple of 16 bits!");
3433 "Invalid BITREVERSE!");
3440 "Cannot BITCAST between types of different sizes!");
3453 "Illegal SCALAR_TO_VECTOR node!");
3458 isa<ConstantSDNode>(Operand.
getOperand(1)) &&
3469 &cast<BinaryWithFlagsSDNode>(Operand.
getNode())->Flags);
3486 if (
SDNode *
E = FindNodeOrInsertPos(ID, DL, IP))
3490 createOperands(N, Ops);
3491 CSEMap.InsertNode(N, IP);
3494 createOperands(N, Ops);
3504 case ISD::ADD:
return std::make_pair(C1 + C2,
true);
3505 case ISD::SUB:
return std::make_pair(C1 - C2,
true);
3506 case ISD::MUL:
return std::make_pair(C1 * C2,
true);
3507 case ISD::AND:
return std::make_pair(C1 & C2,
true);
3508 case ISD::OR:
return std::make_pair(C1 | C2,
true);
3509 case ISD::XOR:
return std::make_pair(C1 ^ C2,
true);
3510 case ISD::SHL:
return std::make_pair(C1 << C2,
true);
3511 case ISD::SRL:
return std::make_pair(C1.
lshr(C2),
true);
3512 case ISD::SRA:
return std::make_pair(C1.
ashr(C2),
true);
3515 case ISD::SMIN:
return std::make_pair(C1.
sle(C2) ? C1 : C2,
true);
3516 case ISD::SMAX:
return std::make_pair(C1.
sge(C2) ? C1 : C2,
true);
3517 case ISD::UMIN:
return std::make_pair(C1.
ule(C2) ? C1 : C2,
true);
3518 case ISD::UMAX:
return std::make_pair(C1.
uge(C2) ? C1 : C2,
true);
3520 if (!C2.getBoolValue())
3522 return std::make_pair(C1.
udiv(C2),
true);
3524 if (!C2.getBoolValue())
3526 return std::make_pair(C1.
urem(C2),
true);
3528 if (!C2.getBoolValue())
3530 return std::make_pair(C1.
sdiv(C2),
true);
3532 if (!C2.getBoolValue())
3534 return std::make_pair(C1.
srem(C2),
true);
3536 return std::make_pair(
APInt(1, 0),
false);
3565 case ISD::SUB: Offset = -uint64_t(Offset);
break;
3582 if (
const ConstantSDNode *Scalar1 = dyn_cast<ConstantSDNode>(Cst1)) {
3583 if (
const ConstantSDNode *Scalar2 = dyn_cast<ConstantSDNode>(Cst2)) {
3586 "Can't fold vectors ops with scalar operands");
3629 "Vector size mismatch!");
3654 auto IsScalarOrSameVectorSize = [&](
const SDValue &
Op) {
3659 auto IsConstantBuildVectorOrUndef = [&](
const SDValue &
Op) {
3668 if (!
all_of(Ops, IsConstantBuildVectorOrUndef) ||
3669 !
all_of(Ops, IsScalarOrSameVectorSize))
3687 for (
unsigned i = 0;
i != NumElts;
i++) {
3713 SDValue ScalarResult =
getNode(Opcode, DL, SVT, ScalarOps, Flags);
3716 if (LegalSVT != SVT)
3742 }
else if (N1CFP && !N2CFP) {
3756 if (N1 == N2)
return N1;
3766 assert(VT.
isInteger() &&
"This operator does not apply to FP types!");
3768 N1.
getValueType() == VT &&
"Binary operator types must match!");
3771 if (N2C && N2C->isNullValue())
3773 if (N2C && N2C->isAllOnesValue())
3780 assert(VT.
isInteger() &&
"This operator does not apply to FP types!");
3782 N1.
getValueType() == VT &&
"Binary operator types must match!");
3785 if (N2C && N2C->isNullValue())
3799 assert(VT.
isInteger() &&
"This operator does not apply to FP types!");
3801 N1.
getValueType() == VT &&
"Binary operator types must match!");
3811 if (N2CFP && N2CFP->getValueAPF().isZero())
3815 if (N2CFP && N2CFP->getValueAPF().isZero())
3819 if (N2CFP && N2CFP->isZero())
3822 if (N2CFP && N2CFP->isExactlyValue(1.0))
3828 N1.
getValueType() == VT &&
"Binary operator types must match!");
3834 "Invalid FCOPYSIGN!");
3842 "Shift operators return type must be the same as their first arg");
3844 "Shifts only work on integers");
3846 "Vector shift amounts must be in the same as their first arg");
3852 "Invalid use of small shift amount with oversized value!");
3859 if (N2C && N2C->isNullValue())
3863 EVT EVT = cast<VTSDNode>(N2)->getVT();
3866 "Cannot FP_ROUND_INREG integer types");
3868 "FP_ROUND_INREG type should be vector iff the operand "
3872 "Vector element counts must match in FP_ROUND_INREG");
3875 if (cast<VTSDNode>(N2)->getVT() == VT)
return N1;
3882 N2C && (N2C->getZExtValue() == 0 || N2C->getZExtValue() == 1) &&
3883 "Invalid FP_ROUND!");
3888 EVT EVT = cast<VTSDNode>(N2)->getVT();
3891 "Cannot *_EXTEND_INREG FP types");
3893 "AssertSExt/AssertZExt type should be the vector element type "
3894 "rather than the vector type!");
3896 if (VT == EVT)
return N1;
3900 EVT EVT = cast<VTSDNode>(N2)->getVT();
3903 "Cannot *_EXTEND_INREG FP types");
3905 "SIGN_EXTEND_INREG type should be vector iff the operand "
3909 "Vector element counts must match in SIGN_EXTEND_INREG");
3911 if (EVT == VT)
return N1;
3913 auto SignExtendInReg = [&](
APInt Val) {
3915 Val <<= Val.getBitWidth() - FromBits;
3916 Val = Val.ashr(Val.getBitWidth() - FromBits);
3922 return SignExtendInReg(Val);
3933 APInt Val =
C->getAPIntValue();
3990 if (N1Op2C && N2C) {
4003 assert(N2C && (
unsigned)N2C->getZExtValue() < 2 &&
"Bad EXTRACT_ELEMENT!");
4007 "Wrong types for EXTRACT_ELEMENT!");
4018 unsigned Shift = ElementSize * N2C->getZExtValue();
4026 "Extract subvector VTs must be a vectors!");
4029 "Extract subvector VTs must have the same element type!");
4031 "Extract subvector must be from larger vector to smaller vector!");
4036 &&
"Extract subvector overflow!");
4061 APFloat V1 = N1CFP->getValueAPF(),
V2 = N2CFP->getValueAPF();
4101 APFloat V = N1CFP->getValueAPF();
4194 if (
SDNode *
E = FindNodeOrInsertPos(ID, DL, IP)) {
4196 E->intersectFlagsWith(Flags);
4200 N = GetBinarySDNode(Opcode, DL, VTs, N1, N2, Flags);
4201 CSEMap.InsertNode(N, IP);
4203 N = GetBinarySDNode(Opcode, DL, VTs, N1, N2, Flags);
4218 if (N1CFP && N2CFP && N3CFP) {
4220 const APFloat &
V2 = N2CFP->getValueAPF();
4221 const APFloat &V3 = N3CFP->getValueAPF();
4238 if (
SDValue V =
FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->
get(), DL))
4248 if (N1C->getZExtValue())
4253 if (N2 == N3)
return N2;
4270 "Insert subvector VTs must be a vectors");
4272 "Dest and insert subvector source types must match!");
4274 "Insert subvector must be from smaller vector to larger vector!");
4275 if (isa<ConstantSDNode>(Index)) {
4277 cast<ConstantSDNode>(Index)->getZExtValue()
4279 &&
"Insert subvector overflow!");
4303 if (
SDNode *
E = FindNodeOrInsertPos(ID, DL, IP))
4307 createOperands(N, Ops);
4308 CSEMap.InsertNode(N, IP);
4311 createOperands(N, Ops);
4320 SDValue Ops[] = { N1, N2, N3, N4 };
4321 return getNode(Opcode, DL, VT, Ops);
4327 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4328 return getNode(Opcode, DL, VT, Ops);
4346 if (FI->getIndex() < 0)
4361 assert(
C->getAPIntValue().getBitWidth() == 8);
4371 if (!IntVT.isInteger())
4415 unsigned NumVTBytes = NumVTBits / 8;
4416 unsigned NumBytes =
std::min(NumVTBytes,
unsigned(Str.
size()));
4418 APInt Val(NumVTBits, 0);
4420 for (
unsigned i = 0;
i != NumBytes; ++
i)
4421 Val |= (uint64_t)(
unsigned char)Str[
i] <<
i*8;
4423 for (
unsigned i = 0;
i != NumBytes; ++
i)
4424 Val |= (uint64_t)(
unsigned char)Str[
i] << (NumVTBytes-
i-1)*8;
4444 uint64_t SrcDelta = 0;
4447 G = cast<GlobalAddressSDNode>(Src);
4451 G = cast<GlobalAddressSDNode>(Src.
getOperand(0));
4452 SrcDelta = cast<ConstantSDNode>(Src.
getOperand(1))->getZExtValue();
4466 unsigned Limit, uint64_t Size,
4467 unsigned DstAlign,
unsigned SrcAlign,
4472 unsigned DstAS,
unsigned SrcAS,
4475 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
4476 "Expecting memcpy / memset source to meet alignment requirement!");
4485 IsMemset, ZeroMemset, MemcpyStrSrc,
4493 switch (DstAlign & 7) {
4510 unsigned NumMemOps = 0;
4513 while (VTSize > Size) {
4547 if (NumMemOps && AllowOverlap &&
4548 VTSize >= 8 && NewVTSize < Size &&
4557 if (++NumMemOps > Limit)
4560 MemOps.push_back(VT);
4577 uint64_t Size,
unsigned Align,
4578 bool isVol,
bool AlwaysInline,
4590 std::vector<EVT> MemOps;
4591 bool DstAlignCanChange =
false;
4597 DstAlignCanChange =
true;
4599 if (Align > SrcAlign)
4603 bool isZeroStr = CopyFromStr && Str.
empty();
4607 (DstAlignCanChange ? 0 : Align),
4608 (isZeroStr ? 0 : SrcAlign),
4609 false,
false, CopyFromStr,
true,
4615 if (DstAlignCanChange) {
4623 while (NewAlign > Align &&
4627 if (NewAlign > Align) {
4638 unsigned NumMemOps = MemOps.
size();
4639 uint64_t SrcOff = 0, DstOff = 0;
4640 for (
unsigned i = 0;
i != NumMemOps; ++
i) {
4645 if (VTSize > Size) {
4648 assert(
i == NumMemOps-1 &&
i != 0);
4649 SrcOff -= VTSize - Size;
4650 DstOff -= VTSize - Size;
4662 Store = DAG.
getStore(Chain, dl, Value,
4678 MinAlign(SrcAlign, SrcOff), MMOFlags);
4695 uint64_t Size,
unsigned Align,
4696 bool isVol,
bool AlwaysInline,
4706 std::vector<EVT> MemOps;
4707 bool DstAlignCanChange =
false;
4713 DstAlignCanChange =
true;
4715 if (Align > SrcAlign)
4720 (DstAlignCanChange ? 0 : Align), SrcAlign,
4721 false,
false,
false,
false,
4727 if (DstAlignCanChange) {
4730 if (NewAlign > Align) {
4740 uint64_t SrcOff = 0, DstOff = 0;
4744 unsigned NumMemOps = MemOps.
size();
4745 for (
unsigned i = 0;
i < NumMemOps;
i++) {
4759 for (
unsigned i = 0;
i < NumMemOps;
i++) {
4764 Store = DAG.
getStore(Chain, dl, LoadValues[
i],
4794 uint64_t Size,
unsigned Align,
bool isVol,
4803 std::vector<EVT> MemOps;
4804 bool DstAlignCanChange =
false;
4810 DstAlignCanChange =
true;
4812 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
4814 Size, (DstAlignCanChange ? 0 : Align), 0,
4815 true, IsZeroVal,
false,
true,
4820 if (DstAlignCanChange) {
4821 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
4822 unsigned NewAlign = (
unsigned)DAG.getDataLayout().getABITypeAlignment(Ty);
4823 if (NewAlign > Align) {
4832 uint64_t DstOff = 0;
4833 unsigned NumMemOps = MemOps.
size();
4836 EVT LargestVT = MemOps[0];
4837 for (
unsigned i = 1;
i < NumMemOps;
i++)
4838 if (MemOps[
i].bitsGT(LargestVT))
4839 LargestVT = MemOps[
i];
4842 for (
unsigned i = 0;
i < NumMemOps;
i++) {
4845 if (VTSize > Size) {
4848 assert(
i == NumMemOps-1 &&
i != 0);
4849 DstOff -= VTSize - Size;
4855 if (VT.
bitsLT(LargestVT)) {
4864 Chain, dl, Value, DAG.getMemBasePlusOffset(Dst, DstOff, dl),
4887 bool isVol,
bool AlwaysInline,
bool isTailCall,
4890 assert(Align &&
"The SDAG layer expects explicit alignment and reserves 0");
4902 isVol,
false, DstPtrInfo, SrcPtrInfo);
4911 *
this, dl, Chain, Dst, Src, Size, Align, isVol, AlwaysInline,
4912 DstPtrInfo, SrcPtrInfo);
4920 assert(ConstantSize &&
"AlwaysInline requires a constant size!");
4923 true, DstPtrInfo, SrcPtrInfo);
4939 Entry.
Node = Dst; Args.push_back(Entry);
4940 Entry.
Node = Src; Args.push_back(Entry);
4941 Entry.
Node = Size; Args.push_back(Entry);
4954 std::pair<SDValue,SDValue> CallResult = TLI->
LowerCallTo(CLI);
4955 return CallResult.second;
4960 bool isVol,
bool isTailCall,
4963 assert(Align &&
"The SDAG layer expects explicit alignment and reserves 0");
4976 false, DstPtrInfo, SrcPtrInfo);
4985 *
this, dl, Chain, Dst, Src, Size, Align, isVol, DstPtrInfo, SrcPtrInfo);
5000 Entry.
Node = Dst; Args.push_back(Entry);
5001 Entry.
Node = Src; Args.push_back(Entry);
5002 Entry.
Node = Size; Args.push_back(Entry);
5015 std::pair<SDValue,SDValue> CallResult = TLI->
LowerCallTo(CLI);
5016 return CallResult.second;
5021 bool isVol,
bool isTailCall,
5023 assert(Align &&
"The SDAG layer expects explicit alignment and reserves 0");
5035 Align, isVol, DstPtrInfo);
5045 *
this, dl, Chain, Dst, Src, Size, Align, isVol, DstPtrInfo);
5056 Entry.
Node = Dst; Entry.
Ty = IntPtrTy;
5057 Args.push_back(Entry);
5060 Args.push_back(Entry);
5062 Entry.
Ty = IntPtrTy;
5063 Args.push_back(Entry);
5077 std::pair<SDValue,SDValue> CallResult = TLI->
LowerCallTo(CLI);
5078 return CallResult.second;
5089 if (
SDNode *
E = FindNodeOrInsertPos(ID, dl, IP)) {
5090 cast<AtomicSDNode>(
E)->refineAlignment(MMO);
5095 VTList, MemVT, MMO);
5096 createOperands(N, Ops);
5098 CSEMap.InsertNode(N, IP);
5123 AAMDNodes(),
nullptr, SynchScope, SuccessOrdering,
5126 return getAtomicCmpSwap(Opcode, dl, MemVT, VTs, Chain, Ptr, Cmp, Swp, MMO);
5138 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO);
5143 const Value *PtrVal,
unsigned Alignment,
5165 nullptr, SynchScope, Ordering);
5167 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO);
5185 "Invalid Atomic Op");
5192 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO);
5202 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO);
5207 if (Ops.
size() == 1)
5212 for (
unsigned i = 0;
i < Ops.
size(); ++
i)
5220 bool ReadMem,
bool WriteMem,
unsigned Size) {
5249 (Opcode <= INT_MAX &&
5251 "Opcode is not a memory-accessing opcode!");
5260 if (
SDNode *
E = FindNodeOrInsertPos(ID, dl, IP)) {
5261 cast<MemIntrinsicSDNode>(
E)->refineAlignment(MMO);
5266 VTList, MemVT, MMO);
5267 createOperands(N, Ops);
5269 CSEMap.InsertNode(N, IP);
5272 VTList, MemVT, MMO);
5273 createOperands(N, Ops);
5296 int FI = cast<FrameIndexSDNode>(Ptr.
getOperand(0))->getIndex();
5309 if (
ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
5324 "Invalid chain type");
5337 PtrInfo, MMOFlags, MemVT.
getStoreSize(), Alignment, AAInfo, Ranges);
5338 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
5348 assert(VT == MemVT &&
"Non-extending load from different memory type!");
5352 "Should only be an extending load, not truncating!");
5354 "Cannot convert from FP to Int or Int -> FP!");
5356 "Cannot use an ext load to convert to or from a vector!");
5359 "Cannot use an ext load to change the number of vector elements!");
5363 assert((Indexed || Offset.
isUndef()) &&
"Unindexed load with an offset!");
5371 ID.
AddInteger(getSyntheticNodeSubclassData<LoadSDNode>(
5372 dl.
getIROrder(), VTs, AM, ExtType, MemVT, MMO));
5375 if (
SDNode *
E = FindNodeOrInsertPos(ID, dl, IP)) {
5376 cast<LoadSDNode>(
E)->refineAlignment(MMO);
5380 ExtType, MemVT, MMO);
5381 createOperands(N, Ops);
5383 CSEMap.InsertNode(N, IP);
5395 PtrInfo, VT, Alignment, MMOFlags, AAInfo, Ranges);
5413 MemVT, Alignment, MMOFlags, AAInfo);
5457 return getStore(Chain, dl, Val, Ptr, MMO);
5463 "Invalid chain type");
5471 ID.
AddInteger(getSyntheticNodeSubclassData<StoreSDNode>(
5475 if (
SDNode *
E = FindNodeOrInsertPos(ID, dl, IP)) {
5476 cast<StoreSDNode>(
E)->refineAlignment(MMO);
5481 createOperands(N, Ops);
5483 CSEMap.InsertNode(N, IP);
5490 EVT SVT,
unsigned Alignment,
5494 "Invalid chain type");
5506 PtrInfo, MMOFlags, SVT.
getStoreSize(), Alignment, AAInfo);
5516 "Invalid chain type");
5518 return getStore(Chain, dl, Val, Ptr, MMO);
5521 "Should only be a truncating store, not extending!");
5523 "Can't do FP-INT conversion!");
5525 "Cannot use trunc store to convert to or from a vector!");
5528 "Cannot use trunc store to change the number of vector elements!");
5536 ID.
AddInteger(getSyntheticNodeSubclassData<StoreSDNode>(
5540 if (
SDNode *
E = FindNodeOrInsertPos(ID, dl, IP)) {
5541 cast<StoreSDNode>(
E)->refineAlignment(MMO);
5546 createOperands(N, Ops);
5548 CSEMap.InsertNode(N, IP);
5566 if (
SDNode *
E = FindNodeOrInsertPos(ID, dl, IP))
5572 createOperands(N, Ops);
5574 CSEMap.InsertNode(N, IP);
5589 ID.
AddInteger(getSyntheticNodeSubclassData<MaskedLoadSDNode>(
5590 dl.
getIROrder(), VTs, ExtTy, isExpanding, MemVT, MMO));
5593 if (
SDNode *
E = FindNodeOrInsertPos(ID, dl, IP)) {
5594 cast<MaskedLoadSDNode>(
E)->refineAlignment(MMO);
5598 ExtTy, isExpanding, MemVT, MMO);
5599 createOperands(N, Ops);
5601 CSEMap.InsertNode(N, IP);
5609 bool IsTruncating,
bool IsCompressing) {
5611 "Invalid chain type");
5618 ID.
AddInteger(getSyntheticNodeSubclassData<MaskedStoreSDNode>(
5619 dl.
getIROrder(), VTs, IsTruncating, IsCompressing, MemVT, MMO));
5622 if (
SDNode *
E = FindNodeOrInsertPos(ID, dl, IP)) {
5623 cast<MaskedStoreSDNode>(
E)->refineAlignment(MMO);
5627 IsTruncating, IsCompressing, MemVT, MMO);
5628 createOperands(N, Ops);
5630 CSEMap.InsertNode(N, IP);
5638 assert(Ops.
size() == 5 &&
"Incompatible number of operands");
5643 ID.AddInteger(getSyntheticNodeSubclassData<MaskedGatherSDNode>(
5647 if (
SDNode *
E = FindNodeOrInsertPos(ID, dl, IP)) {
5648 cast<MaskedGatherSDNode>(
E)->refineAlignment(MMO);
5654 createOperands(N, Ops);
5657 "Incompatible type of the PassThru value in MaskedGatherSDNode");
5660 "Vector width mismatch between mask and data");
5663 "Vector width mismatch between index and data");
5665 CSEMap.InsertNode(N, IP);
5673 assert(Ops.
size() == 5 &&
"Incompatible number of operands");
5678 ID.AddInteger(getSyntheticNodeSubclassData<MaskedScatterSDNode>(
5682 if (
SDNode *
E = FindNodeOrInsertPos(ID, dl, IP)) {
5683 cast<MaskedScatterSDNode>(
E)->refineAlignment(MMO);
5688 createOperands(N, Ops);
5692 "Vector width mismatch between mask and data");
5695 "Vector width mismatch between index and data");
5697 CSEMap.InsertNode(N, IP);
5710 switch (Ops.
size()) {
5711 case 0:
return getNode(Opcode, DL, VT);
5712 case 1:
return getNode(Opcode, DL, VT, static_cast<const SDValue>(Ops[0]));
5713 case 2:
return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
5714 case 3:
return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
5721 return getNode(Opcode, DL, VT, NewOps);
5726 unsigned NumOps = Ops.
size();
5728 case 0:
return getNode(Opcode, DL, VT);
5729 case 1:
return getNode(Opcode, DL, VT, Ops[0]);
5730 case 2:
return getNode(Opcode, DL, VT, Ops[0], Ops[1], Flags);
5731 case 3:
return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
5744 assert(NumOps == 5 &&
"SELECT_CC takes 5 operands!");
5746 "LHS and RHS of condition must have same type!");
5748 "True and False arms of SelectCC must have same type!");
5750 "select_cc node must be of same type as true and false value!");
5754 assert(NumOps == 5 &&
"BR_CC takes 5 operands!");
5756 "LHS/RHS of comparison should match types!");
5770 if (
SDNode *
E = FindNodeOrInsertPos(ID, DL, IP))
5774 createOperands(N, Ops);
5776 CSEMap.InsertNode(N, IP);
5779 createOperands(N, Ops);
5794 return getNode(Opcode, DL, VTList.
VTs[0], Ops);
5805 cast<VTSDNode>(N3.getOperand(1))->getVT() !=
MVT::i1)
5807 else if (N3.getOpcode() ==
ISD::AND)
5808 if (
ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
5812 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
5825 if (
SDNode *
E = FindNodeOrInsertPos(ID, DL, IP))
5829 createOperands(N, Ops);
5830 CSEMap.InsertNode(N, IP);
5833 createOperands(N, Ops);
5847 return getNode(Opcode, DL, VTList, Ops);
5853 return getNode(Opcode, DL, VTList, Ops);
5858 SDValue Ops[] = { N1, N2, N3 };
5859 return getNode(Opcode, DL, VTList, Ops);
5864 SDValue Ops[] = { N1, N2, N3, N4 };
5865 return getNode(Opcode, DL, VTList, Ops);
5871 SDValue Ops[] = { N1, N2, N3, N4, N5 };
5872 return getNode(Opcode, DL, VTList, Ops);
5876 return makeVTList(SDNode::getValueTypeList(VT), 1);
5886 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5892 VTListMap.InsertNode(Result, IP);
5905 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5912 VTListMap.InsertNode(Result, IP);
5926 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5934 VTListMap.InsertNode(Result, IP);
5940 unsigned NumVTs = VTs.
size();
5943 for (
unsigned index = 0; index < NumVTs; index++) {
5948 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5951 std::copy(VTs.
begin(), VTs.
end(), Array);
5953 VTListMap.InsertNode(Result, IP);
5972 void *InsertPos =
nullptr;
5973 if (
SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
5978 if (!RemoveNodeFromCSEMaps(N))
5979 InsertPos =
nullptr;
5982 N->OperandList[0].set(Op);
5985 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5997 void *InsertPos =
nullptr;
5998 if (
SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
6003 if (!RemoveNodeFromCSEMaps(N))
6004 InsertPos =
nullptr;
6007 if (N->OperandList[0] != Op1)
6008 N->OperandList[0].set(Op1);
6009 if (N->OperandList[1] != Op2)
6010 N->OperandList[1].set(Op2);
6013 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
6019 SDValue Ops[] = { Op1, Op2, Op3 };
6026 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
6033 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
6039 unsigned NumOps = Ops.
size();
6041 "Update with wrong number of operands");
6048 void *InsertPos =
nullptr;
6049 if (
SDNode *Existing = FindModifiedNodeSlot(N, Ops, InsertPos))
6054 if (!RemoveNodeFromCSEMaps(N))
6055 InsertPos =
nullptr;
6058 for (
unsigned i = 0;
i != NumOps; ++
i)
6059 if (N->OperandList[
i] != Ops[
i])
6060 N->OperandList[
i].set(Ops[i]);
6063 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
6106 SDValue Ops[] = { Op1, Op2, Op3 };
6195 if (
SDNode *ON = FindNodeOrInsertPos(ID,
SDLoc(N), IP))
6196 return UpdateSDLocOnMergeSDNode(ON,
SDLoc(N));
6199 if (!RemoveNodeFromCSEMaps(N))
6204 N->ValueList = VTs.
VTs;
6205 N->NumValues = VTs.
NumVTs;
6215 DeadNodeSet.
insert(Used);
6220 MN->setMemRefs(
nullptr,
nullptr);
6224 createOperands(N, Ops);
6228 if (!DeadNodeSet.
empty()) {
6230 for (
SDNode *N : DeadNodeSet)
6237 CSEMap.InsertNode(N, IP);
6272 SDValue Ops[] = { Op1, Op2, Op3 };
6294 SDValue Ops[] = { Op1, Op2, Op3 };
6318 SDValue Ops[] = { Op1, Op2, Op3 };
6347 if (
SDNode *
E = FindNodeOrInsertPos(ID, DL, IP)) {
6348 return cast<MachineSDNode>(UpdateSDLocOnMergeSDNode(
E, DL));
6354 createOperands(N, Ops);
6357 CSEMap.InsertNode(N, IP);
6369 VT, Operand, SRIdxVal);
6379 VT, Operand, Subreg, SRIdxVal);
6392 if (
SDNode *
E = FindNodeOrInsertPos(ID,
SDLoc(), IP)) {
6394 E->intersectFlagsWith(Flags);
6405 unsigned R,
bool IsIndirect, uint64_t Off,
6407 assert(cast<DILocalVariable>(Var)->isValidLocationForIntrinsic(DL) &&
6408 "Expected inlined-at fields to agree");
6410 SDDbgValue(Var, Expr, N, R, IsIndirect, Off, DL, O);
6415 const Value *
C, uint64_t Off,
6417 assert(cast<DILocalVariable>(Var)->isValidLocationForIntrinsic(DL) &&
6418 "Expected inlined-at fields to agree");
6424 unsigned FI, uint64_t Off,
6427 assert(cast<DILocalVariable>(Var)->isValidLocationForIntrinsic(DL) &&
6428 "Expected inlined-at fields to agree");
6444 while (UI != UE && N == *UI)
6452 :
SelectionDAG::DAGUpdateListener(d), UI(ui), UE(ue) {}
6465 "Cannot replace with this method!");
6466 assert(From != To.
getNode() &&
"Cannot replace uses of with self");
6469 TransferDbgValues(FromN, To);
6479 RAUWUpdateListener Listener(*
this, UI, UE);
6484 RemoveNodeFromCSEMaps(User);
6494 }
while (UI != UE && *UI == User);
6498 AddModifiedNodeToCSEMaps(User);
6518 "Cannot use this version of ReplaceAllUsesWith!");
6528 assert((i < To->getNumValues()) &&
"Invalid To location");
6535 RAUWUpdateListener Listener(*
this, UI, UE);
6540 RemoveNodeFromCSEMaps(User);
6550 }
while (UI != UE && *UI == User);
6554 AddModifiedNodeToCSEMaps(User);
6573 TransferDbgValues(
SDValue(From,
i), *To);
6578 RAUWUpdateListener Listener(*
this, UI, UE);
6583 RemoveNodeFromCSEMaps(User);
6594 }
while (UI != UE && *UI == User);
6598 AddModifiedNodeToCSEMaps(User);
6611 if (From == To)
return;
6620 TransferDbgValues(From, To);
6626 RAUWUpdateListener Listener(*
this, UI, UE);
6629 bool UserRemovedFromCSEMaps =
false;
6646 if (!UserRemovedFromCSEMaps) {
6647 RemoveNodeFromCSEMaps(User);
6648 UserRemovedFromCSEMaps =
true;
6653 }
while (UI != UE && *UI == User);
6657 if (!UserRemovedFromCSEMaps)
6662 AddModifiedNodeToCSEMaps(User);
6680 bool operator<(
const UseMemo &
L,
const UseMemo &R) {
6696 TransferDbgValues(*From, *To);
6702 for (
unsigned i = 0;
i != Num; ++
i) {
6703 unsigned FromResNo = From[
i].
getResNo();
6706 E = FromNode->
use_end(); UI !=
E; ++UI) {
6709 UseMemo Memo = { *UI,
i, &Use };
6716 std::sort(Uses.
begin(), Uses.
end());
6718 for (
unsigned UseIndex = 0, UseIndexEnd = Uses.
size();
6719 UseIndex != UseIndexEnd; ) {
6725 RemoveNodeFromCSEMaps(User);
6732 unsigned i = Uses[UseIndex].Index;
6737 }
while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
6741 AddModifiedNodeToCSEMaps(User);
6750 unsigned DAGSize = 0;
6773 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
6774 assert(SortedPos != AllNodes.end() &&
"Overran node list");
6793 assert(Degree != 0 &&
"Invalid node degree");
6799 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
6800 assert(SortedPos != AllNodes.end() &&
"Overran node list");
6811 dbgs() <<
"Overran sorted position:\n";
6813 dbgs() <<
"Checking if this is due to cycles\n";
6820 assert(SortedPos == AllNodes.end() &&
6821 "Topological sort incomplete!");
6823 "First node in topological sort is not the entry token!");
6824 assert(AllNodes.front().getNodeId() == 0 &&
6825 "First node in topological sort has non-zero id!");
6826 assert(AllNodes.front().getNumOperands() == 0 &&
6827 "First node in topological sort has operands!");
6828 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
6829 "Last node in topologic sort has unexpected id!");
6830 assert(AllNodes.back().use_empty() &&
6831 "Last node in topologic sort has users!");
6843 DbgInfo->
add(DB, SD, isParameter);
6861 assert(FromNode != ToNode &&
6862 "Should not transfer Debug Values intranode");
6896 return Const !=
nullptr && Const->
isOne();
6914 if (CN && UndefElements.
none() &&
6930 if (CN && UndefElements.
none())
6941 GlobalAddressSDNode::GlobalAddressSDNode(
unsigned Opc,
unsigned Order,
6944 int64_t o,
unsigned char TF)
6950 EVT VT,
unsigned SrcAS,
6953 SrcAddrSpace(SrcAS), DestAddrSpace(DestAS) {}
6957 :
SDNode(Opc, Order, dl, VTs), MemoryVT(memvt), MMO(mmo) {
6977 std::vector<EVT> VTs;
6993 const EVT *SDNode::getValueTypeList(
EVT VT) {
6996 return &(*
EVTs->insert(VT).first);
6999 "Value type out of range!");
7012 if (UI.getUse().getResNo() == Value) {
7030 if (UI.getUse().getResNo() == Value)
7074 unsigned Depth)
const {
7075 if (*
this == Dest)
return true;
7079 if (Depth == 0)
return false;
7091 if (
LoadSDNode *Ld = dyn_cast<LoadSDNode>(*
this)) {
7092 if (!Ld->isVolatile())
7093 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
7106 assert(Num < NumOperands &&
"Invalid child # of SDNode!");
7107 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
7111 if (
auto *FlagsNode = dyn_cast<BinaryWithFlagsSDNode>(
this))
7112 return &FlagsNode->Flags;
7117 if (
auto *FlagsNode = dyn_cast<BinaryWithFlagsSDNode>(
this))
7118 FlagsNode->Flags.intersectWith(Flags);
7123 "Can't unroll a vector with multiple results!");
7126 unsigned NE = VT.getVectorNumElements();
7136 else if (NE > ResNE)
7140 for (i= 0; i !=
NE; ++
i) {
7152 Operands[j] = Operand;
7184 for (; i < ResNE; ++
i)
7211 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
7212 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
7215 if (FS != BFS || FS != (
int)Bytes)
return false;
7221 int64_t LocOffset = cast<ConstantSDNode>(Loc.
getOperand(1))->getSExtValue();
7225 if (LocOffset == Dist * (
int)Bytes)
7231 cast<ConstantSDNode>(BaseLoc.
getOperand(1))->getSExtValue();
7233 if ((LocOffset - BOffset) == Dist * (int)Bytes)
7240 int64_t Offset1 = 0;
7241 int64_t Offset2 = 0;
7244 if (isGA1 && isGA2 && GV1 == GV2)
7245 return Offset1 == (Offset2 + Dist*Bytes);
7255 int64_t GVOffset = 0;
7258 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0);
7261 unsigned AlignBits = KnownZero.countTrailingOnes();
7262 unsigned Align = AlignBits ? 1 <<
std::min(31U, AlignBits) : 0;
7269 int FrameIdx = 1 << 31;
7270 int64_t FrameOffset = 0;
7272 FrameIdx = FI->getIndex();
7276 FrameIdx = cast<FrameIndexSDNode>(Ptr.
getOperand(0))->getIndex();
7280 if (FrameIdx != (1 << 31)) {
7299 assert(!(NumElements & 1) &&
"Splitting vector, but not in half!");
7303 return std::make_pair(LoVT, HiVT);
7308 std::pair<SDValue, SDValue>
7313 "More vector elements requested than available!");
7320 return std::make_pair(Lo, Hi);
7325 unsigned Start,
unsigned Count) {
7333 for (
unsigned i = Start, e = Start + Count;
i != e; ++
i) {
7347 return Val.MachineCPVal->getType();
7348 return Val.ConstVal->getType();
7353 unsigned &SplatBitSize,
7355 unsigned MinSplatBits,
7356 bool isBigEndian)
const {
7360 if (MinSplatBits > sz)
7363 SplatValue =
APInt(sz, 0);
7364 SplatUndef =
APInt(sz, 0);
7371 assert(nOps > 0 &&
"isConstantSplat has 0-size build vector");
7374 for (
unsigned j = 0; j < nOps; ++j) {
7375 unsigned i = isBigEndian ? nOps-1-j : j;
7377 unsigned BitPos = j * EltBitSize;
7382 SplatValue |= CN->getAPIntValue().
zextOrTrunc(EltBitSize).
7383 zextOrTrunc(sz) << BitPos;
7385 SplatValue |= CN->getValueAPF().bitcastToAPInt().
zextOrTrunc(sz) <<BitPos;
7393 HasAnyUndefs = (SplatUndef != 0);
7396 unsigned HalfSize = sz / 2;
7403 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
7404 MinSplatBits > HalfSize)
7407 SplatValue = HighValue | LowValue;
7408 SplatUndef = HighUndef & LowUndef;
7418 if (UndefElements) {
7419 UndefElements->
clear();
7427 (*UndefElements)[
i] =
true;
7428 }
else if (!Splatted) {
7430 }
else if (Splatted != Op) {
7437 "Can only have a splat without a constant for all undefs.");
7446 return dyn_cast_or_null<ConstantSDNode>(
getSplatValue(UndefElements));
7451 return dyn_cast_or_null<ConstantFPSDNode>(
getSplatValue(UndefElements));
7458 dyn_cast_or_null<ConstantFPSDNode>(
getSplatValue(UndefElements))) {
7461 const APFloat &APF = CN->getValueAPF();
7487 assert(i != e &&
"VECTOR_SHUFFLE node with all undef indices!");
7491 for (
int Idx = Mask[i]; i != e; ++
i)
7492 if (Mask[i] >= 0 && Mask[i] != Idx)
7500 if (isa<ConstantSDNode>(N))
7514 if (isa<ConstantFPSDNode>(N))
7529 if (Checked.
count(N))
7534 if (!Visited.
insert(N).second) {
7535 errs() <<
"Detected cycle in SelectionDAG\n";
7536 dbgs() <<
"Offending node:\n";
7554 #ifdef EXPENSIVE_CHECKS
7556 #endif // EXPENSIVE_CHECKS
7558 assert(N &&
"Checking nonexistent SDNode");
void clearAllBits()
Set every bit to 0.
MVT getSimpleValueType() const
Return the simple ValueType of the referenced return value.
SDValue getStore(SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr, MachinePointerInfo PtrInfo, unsigned Alignment=0, MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const AAMDNodes &AAInfo=AAMDNodes())
Helper function to build ISD::STORE nodes.
SDNode * MorphNodeTo(SDNode *N, unsigned Opc, SDVTList VTs, ArrayRef< SDValue > Ops)
This mutates the specified node to have the specified return type, opcode, and operands.
void resize(unsigned N, bool t=false)
resize - Grow or shrink the bitvector.
opStatus roundToIntegral(roundingMode RM)
BITCAST - This operator converts between integer, vector and FP values, as if the value was stored to...
X = FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type down to the precision of the ...
SDValue getGlobalAddress(const GlobalValue *GV, const SDLoc &DL, EVT VT, int64_t offset=0, bool isTargetGA=false, unsigned char TargetFlags=0)
APInt ashr(unsigned shiftAmt) const
Arithmetic right-shift function.
void AddPointer(const void *Ptr)
Add* - Add various data types to Bit data.
bool use_empty() const
Return true if there are no uses of this node.
void computeKnownBits(const Value *V, APInt &KnownZero, APInt &KnownOne, const DataLayout &DL, unsigned Depth=0, AssumptionCache *AC=nullptr, const Instruction *CxtI=nullptr, const DominatorTree *DT=nullptr)
Determine which bits of V are known to be either zero or one and return them in the KnownZero/KnownOn...
void push_back(const T &Elt)
unsigned Log2_32_Ceil(uint32_t Value)
Log2_32_Ceil - This function returns the ceil log base 2 of the specified value, 32 if the value is z...
BUILTIN_OP_END - This must be the last enum value in this list.
A parsed version of the target data layout string in and methods for querying it. ...
CallingConv::ID getLibcallCallingConv(RTLIB::Libcall Call) const
Get the CallingConv that should be used for the specified libcall.
SDValue getValue(unsigned R) const
static APInt getSignBit(unsigned BitWidth)
Get the SignBit for a specific bit width.
static void commuteMask(MutableArrayRef< int > Mask)
Change values in a shuffle permute mask assuming the two vector operands have swapped position...
ConstantFPSDNode * getConstantFPSplatNode(BitVector *UndefElements=nullptr) const
Returns the splatted constant FP or null if this is not a constant FP splat.
raw_ostream & errs()
This returns a reference to a raw_ostream for standard error.
const char * getSymbol() const
opStatus convertFromAPInt(const APInt &Input, bool IsSigned, roundingMode RM)
virtual bool isZExtFree(Type *FromTy, Type *ToTy) const
Return true if any actual instruction that defines a value of type FromTy implicitly zero-extends the...
This SDNode is used for target intrinsics that touch memory and need an associated MachineMemOperand...
SDValue getBoolExtOrTrunc(SDValue Op, const SDLoc &SL, EVT VT, EVT OpVT)
Convert Op, which must be of integer type, to the integer type VT, by using an extension appropriate ...
bool isExactlyValue(double V) const
We don't rely on operator== working on double values, as it returns true for things that are clearly ...
EXTRACT_ELEMENT - This is used to get the lower or upper (determined by a Constant, which is required to be operand #1) half of the integer or float value specified as operand #0.
SDValue getSplatValue(BitVector *UndefElements=nullptr) const
Returns the splatted value or a null value if this is not a splat.
LLVMContext & getContext() const
getContext - Return a reference to the LLVMContext associated with this function. ...
Flags getFlags() const
Return the raw flags of the source value,.
static APInt getAllOnesValue(unsigned numBits)
Get the all-ones value.
LLVMContext * getContext() const
SDValue getTargetIndex(int Index, EVT VT, int64_t Offset=0, unsigned char TargetFlags=0)
Keeps track of dbg_value information through SDISel.
bool isBuildVectorOfConstantSDNodes(const SDNode *N)
Return true if the specified node is a BUILD_VECTOR node of all ConstantSDNode or undef...
uint64_t getZExtValue() const
Get zero extended value.
SDValue UnrollVectorOp(SDNode *N, unsigned ResNE=0)
Utility function used by legalize and lowering to "unroll" a vector operation by splitting out the sc...
SDValue getSetCC(const SDLoc &DL, EVT VT, SDValue LHS, SDValue RHS, ISD::CondCode Cond)
Helper function to make it easier to build SetCC's if you just have an ISD::CondCode instead of an SD...
virtual SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, unsigned Align, bool isVolatile, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const
Emit target-specific code that performs a memcpy.
void dumprFull(const SelectionDAG *G=nullptr) const
printrFull to dbgs().
SDValue getIndexedLoad(SDValue OrigLoad, const SDLoc &dl, SDValue Base, SDValue Offset, ISD::MemIndexedMode AM)
NodeType getExtForLoadExtType(bool IsFP, LoadExtType)
DELETED_NODE - This is an illegal value that is used to catch errors.
MDNODE_SDNODE - This is a node that holdes an MDNode*, which is used to reference metadata in the IR...
unsigned getMaxStoresPerMemcpy(bool OptSize) const
Get maximum # of store operations permitted for llvm.memcpy.
EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR (an vector value) starting with the ...
LegalizeTypeAction getTypeAction(LLVMContext &Context, EVT VT) const
Return how we should legalize values of this type, either it is already legal (return 'Legal') or we ...
bool isKnownNeverNaN(SDValue Op) const
Test whether the given SDValue is known to never be NaN.
BR_CC - Conditional branch.
LLVM_ATTRIBUTE_NORETURN void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
bool none() const
none - Returns true if none of the bits are set.
SDDbgValue * getDbgValue(MDNode *Var, MDNode *Expr, SDNode *N, unsigned R, bool IsIndirect, uint64_t Off, const DebugLoc &DL, unsigned O)
Creates a SDDbgValue node.
bool hasNUsesOfValue(unsigned NUses, unsigned Value) const
Return true if there are exactly NUSES uses of the indicated value.
VECTOR_SHUFFLE(VEC1, VEC2) - Returns a vector, of the same type as VEC1/VEC2.
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
SDVTList getVTList() const
ZERO_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register zero-extension of the low ...
void setBit(unsigned bitPosition)
Set a given bit to 1.
SDValue getSignExtendVectorInReg(SDValue Op, const SDLoc &DL, EVT VT)
Return an operation which will sign extend the low lanes of the operand into the specified vector typ...
unsigned getBitWidth() const
getBitWidth - Return the bitwidth of this constant.
Carry-setting nodes for multiple precision addition and subtraction.
virtual SDValue EmitTargetCodeForMemmove(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, unsigned Align, bool isVolatile, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) const
Emit target-specific code that performs a memmove.
const TargetMachine & getTarget() const
unsigned getPointerTypeSizeInBits(Type *) const
Layout pointer size, in bits, based on the type.
bool isExtended() const
isExtended - Test if the given EVT is extended (as opposed to being simple).
unsigned getPrefTypeAlignment(Type *Ty) const
Returns the preferred stack/global alignment for the specified type.
Clients of various APIs that cause global effects on the DAG can optionally implement this interface...
static bool isBinOpWithFlags(unsigned Opcode)
Returns true if the opcode is a binary operation with flags.
friend struct DAGUpdateListener
DAGUpdateListener is a friend so it can manipulate the listener stack.
const TargetSubtargetInfo & getSubtarget() const
bool isKnownToBeAPowerOfTwo(SDValue Val) const
Test if the given value is known to have exactly one bit set.
unsigned InferPtrAlignment(SDValue Ptr) const
Infer alignment of a load / store address.
void computeKnownBits(SDValue Op, APInt &KnownZero, APInt &KnownOne, unsigned Depth=0) const
Determine which bits of Op are known to be either zero or one and return them in the KnownZero/KnownO...
unsigned getPointerPrefAlignment(unsigned AS=0) const
Return target's alignment for stack-based pointers FIXME: The defaults need to be removed once all of...
size_type count(PtrType Ptr) const
count - Return 1 if the specified pointer is in the set, 0 otherwise.
std::pair< EVT, EVT > GetSplitDestVTs(const EVT &VT) const
Compute the VTs needed for the low/hi parts of a type which is split (or expanded) into two not neces...
CondCode getSetCCAndOperation(CondCode Op1, CondCode Op2, bool isInteger)
Return the result of a logical AND between different comparisons of identical values: ((X op1 Y) & (X...
static APInt getLowBitsSet(unsigned numBits, unsigned loBitsSet)
Get a value with low bits set.
const GlobalValue * getGlobal() const
static void commuteShuffle(SDValue &N1, SDValue &N2, MutableArrayRef< int > M)
Swaps the values of N1 and N2.
virtual void addSelectionDAGCSEId(FoldingSetNodeID &ID)=0
static PointerType * get(Type *ElementType, unsigned AddressSpace)
This constructs a pointer to an object of the specified type in a numbered address space...
bool areNonVolatileConsecutiveLoads(LoadSDNode *LD, LoadSDNode *Base, unsigned Bytes, int Dist) const
Return true if loads are next to each other and can be merged.
SDValue getBasicBlock(MachineBasicBlock *MBB)
RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition.
Completely target-dependent object reference.
unsigned getOpcode() const
Return the SelectionDAG opcode value for this node.
static ISD::NodeType getExtendForContent(BooleanContent Content)
bool getHasDebugValue() const
bool NewNodesMustHaveLegalTypes
When true, additional steps are taken to ensure that getConstant() and similar functions return DAG n...
Type * getTypeForEVT(LLVMContext &Context) const
getTypeForEVT - This method returns an LLVM type corresponding to the specified EVT.
TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or anything else with this node...
unsigned getRawSubclassData() const
Return the SubclassData value, without HasDebugValue.
static const fltSemantics & EVTToAPFloatSemantics(EVT VT)
Returns an APFloat semantics tag appropriate for the given type.
bool isBitwiseNot(SDValue V)
Returns true if V is a bitwise not operation.
Val, Success, OUTCHAIN = ATOMIC_CMP_SWAP_WITH_SUCCESS(INCHAIN, ptr, cmp, swap) N.b.
unsigned getNumOperands() const
Return the number of values used by this operation.
bool all_of(R &&range, UnaryPredicate P)
Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly...
bool isInvalidated() const
unsigned getNumOperands() const
unsigned getValueSizeInBits() const
Returns the size of the value in bits.
void Deallocate(SubClass *E)
Deallocate - Release storage for the pointed-to object.
int64_t getOffset() const
const SDValue & getOperand(unsigned Num) const
const Function * getFunction() const
getFunction - Return the LLVM function that this machine code represents
CallLoweringInfo & setDebugLoc(const SDLoc &dl)
virtual bool allowsMisalignedMemoryAccesses(EVT, unsigned AddrSpace=0, unsigned Align=1, bool *=nullptr) const
Determine if the target supports unaligned memory accesses.
unsigned getAddressSpace() const
Return the address space of the Pointer type.
SIGN_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register sign-extension of the low ...
SDValue getTruncStore(SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr, MachinePointerInfo PtrInfo, EVT TVT, unsigned Alignment=0, MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const AAMDNodes &AAInfo=AAMDNodes())
[US]{MIN/MAX} - Binary minimum or maximum or signed or unsigned integers.
SDNode * isConstantFPBuildVectorOrConstantFP(SDValue N)
Test whether the given value is a constant FP or similar node.
void setNodeId(int Id)
Set unique node id.
static bool isCommutativeBinOp(unsigned Opcode)
Returns true if the opcode is a commutative binary operation.
SDValue getTargetExternalSymbol(const char *Sym, EVT VT, unsigned char TargetFlags=0)
SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, ArrayRef< SDUse > Ops)
Gets or creates the specified node.
ConstantSDNode * getConstantSplatNode(BitVector *UndefElements=nullptr) const
Returns the splatted constant or null if this is not a constant splat.
SDDbgValue * getFrameIndexDbgValue(MDNode *Var, MDNode *Expr, unsigned FI, uint64_t Off, const DebugLoc &DL, unsigned O)
FrameIndex.
const MachinePointerInfo & getPointerInfo() const
static MachinePointerInfo InferPointerInfo(SelectionDAG &DAG, SDValue Ptr, int64_t Offset=0)
InferPointerInfo - If the specified ptr/offset is a frame index, infer a MachinePointerInfo record fr...
const SDValue & setRoot(SDValue N)
Set the current root tag of the SelectionDAG.
void reserve(size_type N)
unsigned getNumSignBits() const
Computes the number of leading bits of this APInt that are equal to its sign bit. ...
const SDValue & getValue() const
void DeleteNode(SDNode *N)
Remove the specified node from the system.
INSERT_SUBVECTOR(VECTOR1, VECTOR2, IDX) - Returns a vector with VECTOR2 inserted into VECTOR1 at the ...
SDValue getConstantPool(const Constant *C, EVT VT, unsigned Align=0, int Offs=0, bool isT=false, unsigned char TargetFlags=0)
APInt zextOrTrunc(unsigned width) const
Zero extend or truncate to width.
std::size_t countLeadingZeros(T Val, ZeroBehavior ZB=ZB_Width)
Count number of 0's from the most significant bit to the least stopping at the first 1...
uint16_t PersistentId
Unique and persistent id per SDNode in the DAG.
EntryToken - This is the marker used to indicate the start of a region.
bool optForSize() const
Optimize this function for size (-Os) or minimum size (-Oz).
void AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter)
Add a dbg_value SDNode.
Select with condition operator - This selects between a true value and a false value (ops #2 and #3) ...
NodeType
ISD::NodeType enum - This enum defines the target-independent operators for a SelectionDAG.
unsigned getResNo() const
get the index which selects a specific result in the SDNode
SDValue getMCSymbol(MCSymbol *Sym, EVT VT)
void ReplaceAllUsesOfValuesWith(const SDValue *From, const SDValue *To, unsigned Num)
Like ReplaceAllUsesOfValueWith, but for multiple values at once.
bool bitsLT(EVT VT) const
bitsLT - Return true if this has less bits than VT.
virtual void NodeUpdated(SDNode *N)
The node N that was updated.
bool isUndef() const
Return true if the type of the node type undefined.
INT = FGETSIGN(FP) - Return the sign bit of the specified floating point value as an integer 0/1 valu...
bool optForMinSize() const
Optimize this function for minimum size (-Oz).
This SDNode is used to implement the code generator support for the llvm IR shufflevector instruction...
bool isAllOnesValue() const
SDValue getExternalSymbol(const char *Sym, EVT VT)
MemSDNode(unsigned Opc, unsigned Order, const DebugLoc &dl, SDVTList VTs, EVT MemoryVT, MachineMemOperand *MMO)
RESULT,OUTCHAIN = INTRINSIC_W_CHAIN(INCHAIN, INTRINSICID, arg1, ...) This node represents a target in...
A templated base class for SmallPtrSet which provides the typesafe interface that is common across al...
SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, const SDLoc &DL)
Returns sum of the base pointer and offset.
static bool hasPredecessorHelper(const SDNode *N, SmallPtrSetImpl< const SDNode * > &Visited, SmallVectorImpl< const SDNode * > &Worklist)
Returns true if N is a predecessor of any node in Worklist.
SDValue getAnyExtendVectorInReg(SDValue Op, const SDLoc &DL, EVT VT)
Return an operation which will any-extend the low lanes of the operand into the specified vector type...
const Triple & getTargetTriple() const
bool isKnownNeverZero(SDValue Op) const
Test whether the given SDValue is known to never be positive or negative zero.
bool isNegative() const
Determine sign of this APInt.
APInt rotl(unsigned rotateAmt) const
Rotate left by rotateAmt.
SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded integer shift operations...
bool isVector() const
isVector - Return true if this is a vector value type.
SDValue getIntPtrConstant(uint64_t Val, const SDLoc &DL, bool isTarget=false)
opStatus divide(const APFloat &RHS, roundingMode RM)
APInt urem(const APInt &RHS) const
Unsigned remainder operation.
The address of a basic block.
void clear()
Clear state and free memory necessary to make this SelectionDAG ready to process a new block...
bool isNegative() const
Return true if the value is negative.
A description of a memory reference used in the backend.
void clear()
clear - Clear all bits.
SDValue FoldSymbolOffset(unsigned Opcode, EVT VT, const GlobalAddressSDNode *GA, const SDNode *N2)
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
AddrSpaceCastSDNode(unsigned Order, const DebugLoc &dl, EVT VT, unsigned SrcAS, unsigned DestAS)
This file declares the MachineConstantPool class which is an abstract constant pool to keep track of ...
struct fuzzer::@269 Flags
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
int64_t getOffset() const
void Reset()
Deallocate all but the current slab and reset the current pointer to the beginning of it...
const APInt & getValue() const
Return the constant as an APInt value reference.
void computeKnownBitsFromRangeMetadata(const MDNode &Ranges, APInt &KnownZero, APInt &KnownOne)
Compute known bits from the range metadata.
Shift and rotation operations.
bool isBuildVectorAllZeros(const SDNode *N)
Return true if the specified node is a BUILD_VECTOR where all of the elements are 0 or undef...
EVT getValueType(unsigned ResNo) const
Return the type of a specified result.
A Use represents the edge between a Value definition and its users.
SDValue getTargetExtractSubreg(int SRIdx, const SDLoc &DL, EVT VT, SDValue Operand)
A convenience function for creating TargetInstrInfo::EXTRACT_SUBREG nodes.
MachineSDNode * getMachineNode(unsigned Opcode, const SDLoc &dl, EVT VT)
These are used for target selectors to create a new node with specified return type(s), MachineInstr opcode, and operands.
MachineFunction & getMachineFunction() const
SDValue getMaskedScatter(SDVTList VTs, EVT VT, const SDLoc &dl, ArrayRef< SDValue > Ops, MachineMemOperand *MMO)
virtual void computeKnownBitsForTargetNode(const SDValue Op, APInt &KnownZero, APInt &KnownOne, const SelectionDAG &DAG, unsigned Depth=0) const
Determine which of the bits specified in Mask are known to be either zero or one and return them in t...
APInt lshr(unsigned shiftAmt) const
Logical right-shift function.
CallLoweringInfo & setChain(SDValue InChain)
BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
virtual bool isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const
Returns true if a cast between SrcAS and DestAS is a noop.
bool isZEXTLoad(const SDNode *N)
Returns true if the specified node is a ZEXTLOAD.
unsigned getAddressSpace() const
MachinePointerInfo getWithOffset(int64_t O) const
static void checkAddrSpaceIsValidForLibcall(const TargetLowering *TLI, unsigned AS)
APInt bitcastToAPInt() const
void AddInteger(signed I)
The memory access is dereferenceable (i.e., doesn't trap).
EVT getScalarType() const
getScalarType - If this is a vector type, return the element type, otherwise return this...
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted...
Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amt) For double-word atomic operations: ValLo, ValHi, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amtLo, amtHi) ValLo, ValHi, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN, ptr, amtLo, amtHi) These correspond to the atomicrmw instruction.
bool isFixedObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a fixed stack object.
allnodes_const_iterator allnodes_end() const
bool bitsGE(EVT VT) const
bitsGE - Return true if this has no less bits than VT.
int getMaskElt(unsigned Idx) const
SDVTList getVTList(EVT VT)
Return an SDVTList that represents the list of values specified.
This is an SDNode representing atomic operations.
SDValue FoldConstantVectorArithmetic(unsigned Opcode, const SDLoc &DL, EVT VT, ArrayRef< SDValue > Ops, const SDNodeFlags *Flags=nullptr)
MDNode * getExpression() const
SDValue FoldSetCC(EVT VT, SDValue N1, SDValue N2, ISD::CondCode Cond, const SDLoc &dl)
Constant fold a setcc to true or false.
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
bool isInteger() const
isInteger - Return true if this is an integer, or a vector integer type.
This represents a list of ValueType's that has been intern'd by a SelectionDAG.
iterator_range< allnodes_iterator > allnodes()
unsigned getEVTAlignment(EVT MemoryVT) const
Compute the default alignment value for the given type.
SDValue getExtLoad(ISD::LoadExtType ExtType, const SDLoc &dl, EVT VT, SDValue Chain, SDValue Ptr, MachinePointerInfo PtrInfo, EVT MemVT, unsigned Alignment=0, MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const AAMDNodes &AAInfo=AAMDNodes())
bool isConstantSplatVector(const SDNode *N, APInt &SplatValue)
Node predicates.
LLVM_NODISCARD bool empty() const
bool getBoolValue() const
Convert APInt to a boolean value.
AtomicOrdering
Atomic ordering for LLVM's memory model.
SDValue getMergeValues(ArrayRef< SDValue > Ops, const SDLoc &dl)
Create a MERGE_VALUES node from the given operands.
virtual MVT getVectorIdxTy(const DataLayout &DL) const
Returns the type to be used for the index operand of: ISD::INSERT_VECTOR_ELT, ISD::EXTRACT_VECTOR_ELT...
EVT getVectorElementType() const
getVectorElementType - Given a vector type, return the type of each element.
unsigned AssignTopologicalOrder()
Topological-sort the AllNodes list and a assign a unique node id for each node in the DAG based on th...
static void VerifySDNode(SDNode *N)
VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid.
bool isConstantSplat(APInt &SplatValue, APInt &SplatUndef, unsigned &SplatBitSize, bool &HasAnyUndefs, unsigned MinSplatBits=0, bool isBigEndian=false) const
Check if this is a constant splat, and if so, find the smallest element size that splats the vector...
auto reverse(ContainerTy &&C, typename std::enable_if< has_rbegin< ContainerTy >::value >::type *=nullptr) -> decltype(make_range(C.rbegin(), C.rend()))
APInt shl(unsigned shiftAmt) const
Left-shift function.
SDValue getSExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT)
Convert Op, which must be of integer type, to the integer type VT, by either sign-extending or trunca...
static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, const SDLoc &dl)
getMemsetValue - Vectorized representation of the memset value operand.
static SDValue getMemsetStores(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, uint64_t Size, unsigned Align, bool isVol, MachinePointerInfo DstPtrInfo)
Lower the call to 'memset' intrinsic function into a series of store operations.
void checkForCycles(const SelectionDAG *DAG, bool force=false)
unsigned getIROrder() const
Return the node ordering.
[SU]INT_TO_FP - These operators convert integers (whose interpreted sign depends on the first letter)...
SDValue getMaskedGather(SDVTList VTs, EVT VT, const SDLoc &dl, ArrayRef< SDValue > Ops, MachineMemOperand *MMO)
opStatus convert(const fltSemantics &ToSemantics, roundingMode RM, bool *losesInfo)
std::pair< SDValue, SDValue > LowerCallTo(CallLoweringInfo &CLI) const
This function lowers an abstract call to a function into an actual call.
unsigned getNumValues() const
Return the number of values defined/returned by this operator.
SDValue getRegisterMask(const uint32_t *RegMask)
DAGUpdateListener *const Next
Select with a vector condition (op #0) and two vector operands (ops #1 and #2), returning a vector re...
Simple integer binary arithmetic operators.
Function Alias Analysis false
bool sgt(const APInt &RHS) const
Signed greather than comparison.
DbgValueKind getKind() const
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory)...
opStatus subtract(const APFloat &RHS, roundingMode RM)
bool isLittleEndian() const
Layout endianness...
MachineConstantPoolValue * getMachineCPVal() const
SDValue getUNDEF(EVT VT)
Return an UNDEF node. UNDEF does not have a useful SDLoc.
static GCRegistry::Add< OcamlGC > B("ocaml","ocaml 3.10-compatible GC")
cmpResult
IEEE-754R 5.11: Floating Point Comparison Relations.
SDValue getMaskedStore(SDValue Chain, const SDLoc &dl, SDValue Val, SDValue Ptr, SDValue Mask, EVT MemVT, MachineMemOperand *MMO, bool IsTruncating=false, bool IsCompressing=false)
CondCode
ISD::CondCode enum - These are ordered carefully to make the bitfields below work out...
const APInt & getAPIntValue() const
TargetConstant* - Like Constant*, but the DAG does not do any folding, simplification, or lowering of the constant.
EVT getMemoryVT() const
Return the type of the in-memory value.
SDValue getTargetConstant(uint64_t Val, const SDLoc &DL, EVT VT, bool isOpaque=false)
ANY_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register any-extension of the low la...
const ConstantInt * getConstantIntValue() const
SDValue getSplatBuildVector(EVT VT, const SDLoc &DL, SDValue Op)
Return a splat ISD::BUILD_VECTOR node, consisting of Op splatted to all elements. ...
void setIROrder(unsigned Order)
Set the node ordering.
LLVM_NODISCARD LLVM_ATTRIBUTE_ALWAYS_INLINE size_t size() const
size - Get the string size.
virtual bool shouldConvertConstantLoadToIntImm(const APInt &Imm, Type *Ty) const
Return true if it is beneficial to convert a load of a constant to just the constant itself...
SDValue getAtomic(unsigned Opcode, const SDLoc &dl, EVT MemVT, SDValue Chain, SDValue Ptr, SDValue Val, const Value *PtrVal, unsigned Alignment, AtomicOrdering Ordering, SynchronizationScope SynchScope)
Gets a node for an atomic op, produces result (if relevant) and chain and takes 2 operands...
void init(MachineFunction &mf)
Prepare this SelectionDAG to process code in the given MachineFunction.
RESULT = INTRINSIC_WO_CHAIN(INTRINSICID, arg1, arg2, ...) This node represents a target intrinsic fun...
size_t size() const
size - Get the array size.
const DataLayout & getDataLayout() const
bool bitsLE(EVT VT) const
bitsLE - Return true if this has no more bits than VT.
Expected< const typename ELFT::Sym * > getSymbol(typename ELFT::SymRange Symbols, uint32_t Index)
Maximum length of the test input libFuzzer tries to guess a good value based on the corpus and reports it always prefer smaller inputs during the corpus shuffle When libFuzzer itself reports a bug this exit code will be used If indicates the maximal total time in seconds to run the fuzzer minimizes the provided crash input Use with etc Experimental Use value profile to guide fuzzing Number of simultaneous worker processes to run the jobs If min(jobs, NumberOfCpuCores()/2)\" is used.") FUZZER_FLAG_INT(reload
unsigned char getTargetFlags() const
bool ult(const APInt &RHS) const
Unsigned less than comparison.
UNDEF - An undefined node.
This class is used to represent ISD::STORE nodes.
static GCRegistry::Add< CoreCLRGC > E("coreclr","CoreCLR-compatible GC")
FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.
static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList)
AddNodeIDValueTypes - Value type lists are intern'd so we can represent them solely with their pointe...
static const fltSemantics & IEEEsingle()
BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a vector with the specified, possibly variable...
bool isOneConstant(SDValue V)
Returns true if V is a constant integer one.
This corresponds to the llvm.lifetime.
static APInt getHighBitsSet(unsigned numBits, unsigned hiBitsSet)
Get a value with high bits set.
virtual const SelectionDAGTargetInfo * getSelectionDAGInfo() const
SDNode * getNode() const
get the SDNode which holds the desired result
FoldingSetNodeID - This class is used to gather all the unique data bits of a node.
The memory access is volatile.
constexpr uint64_t MinAlign(uint64_t A, uint64_t B)
MinAlign - A and B are either alignments or offsets.
bool hasPredecessor(const SDNode *N) const
Return true if N is a predecessor of this node.
unsigned getScalarSizeInBits() const
unsigned getStoreSize() const
getStoreSize - Return the number of bytes overwritten by a store of the specified value type...
SDValue getMDNode(const MDNode *MD)
Return an MDNodeSDNode which holds an MDNode.
bool isTypeLegal(EVT VT) const
Return true if the target has native support for the specified value type.
bool isOnlyUserOf(const SDNode *N) const
Return true if this node is the only use of N.
SDValue getVectorShuffle(EVT VT, const SDLoc &dl, SDValue N1, SDValue N2, ArrayRef< int > Mask)
Return an ISD::VECTOR_SHUFFLE node.
OUTCHAIN = INTRINSIC_VOID(INCHAIN, INTRINSICID, arg1, arg2, ...) This node represents a target intrin...
unsigned UnsafeFPMath
UnsafeFPMath - This flag is enabled when the -enable-unsafe-fp-math flag is specified on the command ...
static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, uint64_t Size, unsigned Align, bool isVol, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo)
bool isInteger() const
isInteger - Return true if this is an integer, or a vector integer type.
SDValue getCommutedVectorShuffle(const ShuffleVectorSDNode &SV)
Returns an ISD::VECTOR_SHUFFLE node semantically equivalent to the shuffle node in input but with swa...
bool isZero() const
Return true if the value is positive or negative zero.
MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...
APInt trunc(unsigned width) const
Truncate to new width.
bool hasFloatingPointExceptions() const
Return true if target supports floating point exceptions.
bool isMachineConstantPoolEntry() const
MVT - Machine Value Type.
static void AddNodeIDNode(FoldingSetNodeID &ID, unsigned short OpC, SDVTList VTList, ArrayRef< SDValue > OpList)
const SDValue & getOperand(unsigned i) const
The instances of the Type class are immutable: once they are created, they are never changed...
Simple binary floating point operators.
SDValue getMemIntrinsicNode(unsigned Opcode, const SDLoc &dl, SDVTList VTList, ArrayRef< SDValue > Ops, EVT MemVT, MachinePointerInfo PtrInfo, unsigned Align=0, bool Vol=false, bool ReadMem=true, bool WriteMem=true, unsigned Size=0)
Creates a MemIntrinsicNode that may produce a result and takes a list of operands.
bool isOperationLegalOrCustom(unsigned Op, EVT VT) const
Return true if the specified operation is legal on this target or can be made legal with custom lower...
static bool doNotCSE(SDNode *N)
doNotCSE - Return true if CSE should not be performed for this node.
bool sge(const APInt &RHS) const
Signed greather or equal comparison.
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
void DropOperands()
Release the operands and set this node to have zero operands.
virtual EVT getOptimalMemOpType(uint64_t, unsigned, unsigned, bool, bool, bool, MachineFunction &) const
Returns the target specific optimal type for load and store operations as a result of memset...
PointerUnion< const Value *, const PseudoSourceValue * > V
This is the IR pointer value for the access, or it is null if unknown.
This is an important base class in LLVM.
LLVM_ATTRIBUTE_ALWAYS_INLINE iterator begin()
LoadExtType
LoadExtType enum - This enum defines the three variants of LOADEXT (load with extension).
INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element at IDX replaced with VAL...
const Constant * getConstVal() const
This file contains the declarations for the subclasses of Constant, which represent the different fla...
LLVM_ATTRIBUTE_RETURNS_NONNULL LLVM_ATTRIBUTE_RETURNS_NOALIAS void * Allocate(size_t Size, size_t Alignment)
Allocate space at the specified alignment.
Carry-using nodes for multiple precision addition and subtraction.
virtual bool isSafeMemOpType(MVT) const
Returns true if it's safe to use load / store of the specified type to expand memcpy / memset inline...
ConstantFP - Floating Point Values [float, double].
const unsigned int integerPartWidth
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
static const fltSemantics & IEEEhalf()
unsigned getMaxStoresPerMemmove(bool OptSize) const
Get maximum # of store operations permitted for llvm.memmove.
LLVM_NODISCARD LLVM_ATTRIBUTE_ALWAYS_INLINE StringRef substr(size_t Start, size_t N=npos) const
Return a reference to the substring from [Start, Start + N).
SDValue getAddrSpaceCast(const SDLoc &dl, EVT VT, SDValue Ptr, unsigned SrcAS, unsigned DestAS)
Return an AddrSpaceCastSDNode.
unsigned getScalarValueSizeInBits() const
static APInt getOneBitSet(unsigned numBits, unsigned BitNo)
Return an APInt with exactly one bit set in the result.
bool sle(const APInt &RHS) const
Signed less or equal comparison.
void RemoveDeadNodes()
This method deletes all unreachable nodes in the SelectionDAG.
static void AddNodeIDOperands(FoldingSetNodeID &ID, ArrayRef< SDValue > Ops)
AddNodeIDOperands - Various routines for adding operands to the NodeID data.
This class provides iterator support for SDUse operands that use a specific SDNode.
BumpPtrAllocator & getAlloc()
ArrayRef< SDDbgValue * > GetDbgValues(const SDNode *SD)
Get the debug values which reference the given SDNode.
static ManagedStatic< std::set< EVT, EVT::compareRawBits > > EVTs
unsigned getBitWidth() const
Return the number of bits in the APInt.
bool uge(const APInt &RHS) const
Unsigned greater or equal comparison.
unsigned getOpcode() const
opStatus multiply(const APFloat &RHS, roundingMode RM)
TargetIndex - Like a constant pool entry, but with completely target-dependent semantics.
APInt sdiv(const APInt &RHS) const
Signed division function for APInt.
AssertSext, AssertZext - These nodes record if a register contains a value that has already been zero...
unsigned char getTargetFlags() const
void RemoveDeadNode(SDNode *N)
Remove the specified node from the system.
self_iterator getIterator()
CondCode getSetCCSwappedOperands(CondCode Operation)
Return the operation corresponding to (Y op X) when given the operation for (X op Y)...
unsigned countPopulation() const
Count the number of bits set.
VAARG - VAARG has four operands: an input chain, a pointer, a SRCVALUE, and the alignment.
ilist< SDNode >::size_type allnodes_size() const
use_iterator use_begin() const
Provide iteration support to walk over all uses of an SDNode.
bool empty() const
empty - Check if the array is empty.
SDValue getMaskedLoad(EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr, SDValue Mask, SDValue Src0, EVT MemVT, MachineMemOperand *MMO, ISD::LoadExtType, bool IsExpanding=false)
const SDValue & getValue() const
ConstantSDNode * isConstOrConstSplat(SDValue V)
Returns the SDNode if it is a constant splat BuildVector or constant int.
opStatus convertToInteger(integerPart *Input, unsigned int Width, bool IsSigned, roundingMode RM, bool *IsExact) const
static bool isValueValidForType(EVT VT, const APFloat &Val)
bool isThreadLocal() const
If the value is "Thread Local", its value isn't shared by the threads.
Bit counting operators with an undefined result for zero inputs.
Val, OUTCHAIN = ATOMIC_CMP_SWAP(INCHAIN, ptr, cmp, swap) For double-word atomic operations: ValLo...
bool MaskedValueIsZero(SDValue Op, const APInt &Mask, unsigned Depth=0) const
Return true if 'Op & Mask' is known to be zero.
X = FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
LLVM_NODISCARD bool empty() const
static ManagedStatic< sys::SmartMutex< true > > VTMutex
void append(in_iter in_start, in_iter in_end)
Add the specified range to the end of the SmallVector.
ArrayRef< SDDbgValue * > getSDDbgValues(const SDNode *Node)
EVT - Extended Value Type.
bool isPointerTy() const
True if this is an instance of PointerType.
std::vector< ArgListEntry > ArgListTy
static const fltSemantics & IEEEquad()
const APFloat & getValueAPF() const
static const APInt * getValidShiftAmountConstant(SDValue V)
If a SHL/SRA/SRL node has a constant or splat constant shift amount that is less than the element bit...
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
bool isEqualTo(SDValue A, SDValue B) const
Test whether two SDValues are known to compare equal.
Abstract base class for all machine specific constantpool value subclasses.
This structure contains all information that is necessary for lowering calls.
BooleanContent getBooleanContents(bool isVec, bool isFloat) const
For targets without i1 registers, this gives the nature of the high-bits of boolean values held in ty...
static EVT getVectorVT(LLVMContext &Context, EVT VT, unsigned NumElements)
getVectorVT - Returns the EVT that represents a vector NumElements in length, where each element is o...
SDDbgValue * getConstantDbgValue(MDNode *Var, MDNode *Expr, const Value *C, uint64_t Off, const DebugLoc &DL, unsigned O)
Constant.
This class contains a discriminated union of information about pointers in memory operands...
uint64_t getConstantOperandVal(unsigned Num) const
Helper method returns the integer value of a ConstantSDNode operand.
bool isPowerOf2() const
Check if this APInt's value is a power of two greater than zero.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
HANDLENODE node - Used as a handle for various purposes.
void copySign(const APFloat &RHS)
APInt rotr(unsigned rotateAmt) const
Rotate right by rotateAmt.
const SDValue & getRoot() const
Return the root tag of the SelectionDAG.
const BlockAddress * getBlockAddress() const
SDValue getLoad(EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr, MachinePointerInfo PtrInfo, unsigned Alignment=0, MachineMemOperand::Flags MMOFlags=MachineMemOperand::MONone, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr)
Loads are not normal binary operators: their result type is not determined by their operands...
SDValue CreateStackTemporary(EVT VT, unsigned minAlign=1)
Create a stack temporary, suitable for holding the specified value type.
bool isNull() const
Test if the pointer held in the union is null, regardless of which type it is.
EH_LABEL - Represents a label in mid basic block used to track locations needed for debug and excepti...
void intersectFlagsWith(const SDNodeFlags *Flags)
Clear any flags in this node that aren't also set in Flags.
APInt srem(const APInt &RHS) const
Function for signed remainder operation.
const MachinePointerInfo & getPointerInfo() const
int64_t getObjectOffset(int ObjectIdx) const
Return the assigned stack offset of the specified object from the incoming stack pointer.
MachineMemOperand * MMO
Memory reference information.
const MDNode * getRanges() const
Returns the Ranges that describes the dereference.
static const char *const Magic
The memory access writes data.
const SDValue & getOffset() const
bool bitsGT(EVT VT) const
bitsGT - Return true if this has more bits than VT.
bool isOSDarwin() const
isOSDarwin - Is this a "Darwin" OS (OS X, iOS, or watchOS).
SDValue getZeroExtendVectorInReg(SDValue Op, const SDLoc &DL, EVT VT)
Return an operation which will zero extend the low lanes of the operand into the specified vector typ...
ArrayRef< int > getMask() const
bool ugt(const APInt &RHS) const
Unsigned greather than comparison.
SDValue getBitcast(EVT VT, SDValue V)
Return a bitcast using the SDLoc of the value operand, and casting to the provided type...
unsigned countTrailingZeros() const
Count the number of trailing zero bits.
IntegerType * getIntPtrType(LLVMContext &C, unsigned AddressSpace=0) const
Returns an integer type with size at least as big as that of a pointer in the given address space...
TokenFactor - This node takes multiple tokens as input and produces a single token result...
unsigned getABITypeAlignment(Type *Ty) const
Returns the minimum ABI-required alignment for the specified type.
SDValue expandVACopy(SDNode *Node)
Expand the specified ISD::VACOPY node as the Legalize pass would.
bool isBuildVectorAllOnes(const SDNode *N)
Return true if the specified node is a BUILD_VECTOR where all of the elements are ~0 or undef...
Iterator for intrusive lists based on ilist_node.
static bool isMemSrcFromString(SDValue Src, StringRef &Str)
isMemSrcFromString - Returns true if memcpy source is a string constant.
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements...
const DebugLoc & getDebugLoc() const
This is the shared class of boolean and integer constants.
void dump() const
Dump this node, for debugging.
allnodes_const_iterator allnodes_begin() const
virtual void NodeDeleted(SDNode *N, SDNode *E)
The node N that was deleted and, if E is not null, an equivalent node E that replaced it...
bool slt(const APInt &RHS) const
Signed less than comparison.
bool isDereferenceable() const
bool isBaseWithConstantOffset(SDValue Op) const
Return true if the specified operand is an ISD::ADD with a ConstantSDNode on the right-hand side...
bool erase(PtrType Ptr)
erase - If the set contains the specified pointer, remove it and return true, otherwise return false...
const char * getLibcallName(RTLIB::Libcall Call) const
Get the libcall routine name for the specified libcall.
EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR identified by the (potentially...
std::pair< SDValue, SDValue > SplitVector(const SDValue &N, const SDLoc &DL, const EVT &LoVT, const EVT &HiVT)
Split the vector with EXTRACT_SUBVECTOR using the provides VTs and return the low/high part...
SDNode * UpdateNodeOperands(SDNode *N, SDValue Op)
Mutate the specified node in-place to have the specified operands.
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
X = FP_ROUND_INREG(Y, VT) - This operator takes an FP register, and rounds it to a floating point val...
SDNode * SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT)
These are used for target selectors to mutate the specified node to have the specified return type...
SDValue getZExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT)
Convert Op, which must be of integer type, to the integer type VT, by either zero-extending or trunca...
ADDRSPACECAST - This operator converts between pointers of different address spaces.
CallLoweringInfo & setCallee(CallingConv::ID CC, Type *ResultType, SDValue Target, ArgListTy &&ArgsList)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small...
unsigned getObjectAlignment(int ObjectIdx) const
Return the alignment of the specified stack object.
Type * getType() const
All values are typed, get the type of this value.
SDValue getBuildVector(EVT VT, const SDLoc &DL, ArrayRef< SDValue > Ops)
Return an ISD::BUILD_VECTOR node.
SDNode * getSDNode() const
virtual const TargetLowering * getTargetLowering() const
SDValue getMemcpy(SDValue Chain, const SDLoc &dl, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, bool isVol, bool AlwaysInline, bool isTailCall, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo)
bool allOperandsUndef(const SDNode *N)
Return true if the node has at least one operand and all operands of the specified node are ISD::UNDE...
An SDNode that represents everything that will be needed to construct a MachineInstr.
const SDValue & getChain() const
A collection of metadata nodes that might be associated with a memory access used by the alias-analys...
Byte Swap and Counting operators.
LLVM_NODISCARD T pop_back_val()
MachineMemOperand * getMemOperand() const
Return a MachineMemOperand object describing the memory reference performed by operation.
This is an abstract virtual class for memory operations.
unsigned char getTargetFlags() const
SDValue getMemmove(SDValue Chain, const SDLoc &dl, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, bool isVol, bool isTailCall, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo)
Wrapper class for IR location info (IR ordering and DebugLoc) to be passed into SDNode creation funct...
unsigned getAddrSpace() const
Return the LLVM IR address space number that this pointer points into.
void ExtractVectorElements(SDValue Op, SmallVectorImpl< SDValue > &Args, unsigned Start=0, unsigned Count=0)
Append the extracted elements from Start to Count out of the vector Op in Args.
static Constant * get(Type *Ty, uint64_t V, bool isSigned=false)
If Ty is a vector type, return a Constant with a splat of the given value.
virtual bool isGAPlusOffset(SDNode *N, const GlobalValue *&GA, int64_t &Offset) const
Returns true (and the GlobalValue and the offset) if the node is a GlobalAddress + offset...
static const int FIRST_TARGET_MEMORY_OPCODE
FIRST_TARGET_MEMORY_OPCODE - Target-specific pre-isel operations which do not reference a specific me...
int32_t exactLogBase2() const
Represents one node in the SelectionDAG.
static Constant * get(Type *Ty, double V)
This returns a ConstantFP, or a vector containing a splat of a ConstantFP, for the specified value in...
CondCode getSetCCInverse(CondCode Operation, bool isInteger)
Return the operation corresponding to !(X op Y), where 'op' is a valid SetCC operation.
Type * getType() const
getType - get type of this MachineConstantPoolValue.
SDValue getNOT(const SDLoc &DL, SDValue Val, EVT VT)
Create a bitwise NOT operation as (XOR Val, -1).
static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src, uint64_t Size, unsigned Align, bool isVol, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo)
AAMDNodes getAAInfo() const
Returns the AA info that describes the dereference.
static GCRegistry::Add< ShadowStackGC > C("shadow-stack","Very portable GC for uncooperative code generators")
virtual unsigned ComputeNumSignBitsForTargetNode(SDValue Op, const SelectionDAG &DAG, unsigned Depth=0) const
This method can be implemented by targets that want to expose additional information about sign bits ...
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
unsigned Log2_32(uint32_t Value)
Log2_32 - This function returns the floor log base 2 of the specified value, -1 if the value is zero...
void swap(llvm::BitVector &LHS, llvm::BitVector &RHS)
Implement std::swap in terms of BitVector swap.
static APInt getSplat(unsigned NewLen, const APInt &V)
Return a value containing V broadcasted over NewLen bits.
ISD::LoadExtType getExtensionType() const
Return whether this is a plain node, or one of the varieties of value-extending loads.
SDNode * isConstantIntBuildVectorOrConstantInt(SDValue N)
Test whether the given value is a constant int or similar node.
MachineMemOperand * getMachineMemOperand(MachinePointerInfo PtrInfo, MachineMemOperand::Flags f, uint64_t s, unsigned base_alignment, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr, SynchronizationScope SynchScope=CrossThread, AtomicOrdering Ordering=AtomicOrdering::NotAtomic, AtomicOrdering FailureOrdering=AtomicOrdering::NotAtomic)
getMachineMemOperand - Allocate a new MachineMemOperand.
Class for arbitrary precision integers.
bool isBuildVectorOfConstantFPSDNodes(const SDNode *N)
Return true if the specified node is a BUILD_VECTOR node of all ConstantFPSDNode or undef...
SDValue getConstantFP(double Val, const SDLoc &DL, EVT VT, bool isTarget=false)
Create a ConstantFPSDNode wrapping a constant value.
bool exceedsNaturalStackAlignment(unsigned Align) const
Returns true if the given alignment exceeds the natural stack alignment.
bool haveNoCommonBitsSet(SDValue A, SDValue B) const
Return true if A and B have no common bits set.
static unsigned getReg(const void *D, unsigned RC, unsigned RegNo)
SDValue FoldConstantArithmetic(unsigned Opcode, const SDLoc &DL, EVT VT, SDNode *Cst1, SDNode *Cst2)
A "pseudo-class" with methods for operating on BUILD_VECTORs.
Select(COND, TRUEVAL, FALSEVAL).
int64_t getSExtValue() const
op_iterator op_begin() const
static use_iterator use_end()
bool isNullFPConstant(SDValue V)
Returns true if V is an FP constant with a value of positive zero.
ZERO_EXTEND - Used for integer types, zeroing the new bits.
ANY_EXTEND - Used for integer types. The high bits are undefined.
opStatus mod(const APFloat &RHS)
LLVM_NODISCARD LLVM_ATTRIBUTE_ALWAYS_INLINE bool empty() const
empty - Check if the string is empty.
iterator insert(iterator I, T &&Elt)
CondCode getSetCCOrOperation(CondCode Op1, CondCode Op2, bool isInteger)
Return the result of a logical OR between different comparisons of identical values: ((X op1 Y) | (X ...
FCOPYSIGN(X, Y) - Return the value of X with the sign of Y.
SDValue getShiftAmountOperand(EVT LHSTy, SDValue Op)
Return the specified value casted to the target's desired shift amount type.
SDValue getBlockAddress(const BlockAddress *BA, EVT VT, int64_t Offset=0, bool isTarget=false, unsigned char TargetFlags=0)
iterator_range< value_op_iterator > op_values() const
static const fltSemantics & IEEEdouble()
static APInt getBitsSet(unsigned numBits, unsigned loBit, unsigned hiBit)
Get a value with a block of bits set.
Flags
Flags values. These may be or'd together.
bool isNonTemporal() const
The memory access reads data.
int64_t getOffset() const
static MachinePointerInfo getFixedStack(MachineFunction &MF, int FI, int64_t Offset=0)
Return a MachinePointerInfo record that refers to the specified FrameIndex.
CallLoweringInfo & setTailCall(bool Value=true)
unsigned char getTargetFlags() const
opStatus add(const APFloat &RHS, roundingMode RM)
unsigned countLeadingOnes() const
Count the number of leading one bits.
SDValue getStackArgumentTokenFactor(SDValue Chain)
Compute a TokenFactor to force all the incoming stack arguments to be loaded from the stack...
ConstantFPSDNode * isConstOrConstSplatFP(SDValue V)
Returns the SDNode if it is a constant splat BuildVector or constant float.
opStatus
IEEE-754R 7: Default exception handling.
These are IR-level optimization flags that may be propagated to SDNodes.
PointerType * getType() const
Global values are always pointers.
Represents a use of a SDNode.
unsigned getIROrder() const
LLVM_ATTRIBUTE_ALWAYS_INLINE iterator end()
uint64_t getConstantOperandVal(unsigned i) const
Bitwise operators - logical and, logical or, logical xor.
static SDValue FoldCONCAT_VECTORS(const SDLoc &DL, EVT VT, ArrayRef< SDValue > Ops, llvm::SelectionDAG &DAG)
bool hasAnyUseOfValue(unsigned Value) const
Return true if there are any use of the indicated value.
static void checkForCyclesHelper(const SDNode *N, SmallPtrSetImpl< const SDNode * > &Visited, SmallPtrSetImpl< const SDNode * > &Checked, const llvm::SelectionDAG *DAG)
static bool shouldLowerMemFuncForSize(const MachineFunction &MF)
APInt udiv(const APInt &RHS) const
Unsigned division operation.
SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to sign extend a small value in ...
LOAD and STORE have token chains as their first operand, then the same operands as an LLVM load/store...
unsigned getMaxStoresPerMemset(bool OptSize) const
Get maximum # of store operations permitted for llvm.memset.
unsigned getSizeInBits() const
getSizeInBits - Return the size of the specified value type in bits.
void ReplaceAllUsesWith(SDValue From, SDValue Op)
Modify anything using 'From' to use 'To' instead.
ArrayRef< SDUse > ops() const
LLVM_ATTRIBUTE_ALWAYS_INLINE size_type size() const
bool isOperandOf(const SDNode *N) const
Return true if this node is an operand of N.
void Profile(FoldingSetNodeID &ID) const
Gather unique data for the node.
bool isIndexed() const
Return true if this is a pre/post inc/dec load/store.
The memory access always returns the same value (or traps).
static std::pair< APInt, bool > FoldValue(unsigned Opcode, const APInt &C1, const APInt &C2)
op_iterator op_end() const
const TargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
const SDValue & getOffset() const
unsigned countTrailingOnes() const
Count the number of trailing one bits.
LLVM_NODISCARD std::enable_if<!is_simple_type< Y >::value, typename cast_retty< X, const Y >::ret_type >::type dyn_cast(const Y &Val)
intptr_t getRawBits() const
bool reachesChainWithoutSideEffects(SDValue Dest, unsigned Depth=2) const
Return true if this operand (which must be a chain) reaches the specified operand without crossing an...
static int isSignedOp(ISD::CondCode Opcode)
For an integer comparison, return 1 if the comparison is a signed operation and 2 if the result is an...
DebugLoc getDebugLoc() const
constexpr int64_t SignExtend64(uint64_t x)
Sign-extend the number in the bottom B bits of X to a 64-bit integer.
int32_t getConstantFPSplatPow2ToLog2Int(BitVector *UndefElements, uint32_t BitWidth) const
If this is a constant FP splat and the splatted constant FP is an exact power or 2, return the log base 2 integer value.
int getNodeId() const
Return the unique node id.
int CreateStackObject(uint64_t Size, unsigned Alignment, bool isSS, const AllocaInst *Alloca=nullptr)
Create a new statically sized stack object, returning a nonnegative identifier to represent it...
EVT getValueType() const
Return the ValueType of the referenced return value.
SDValue getConstant(uint64_t Val, const SDLoc &DL, EVT VT, bool isTarget=false, bool isOpaque=false)
Create a ConstantSDNode wrapping a constant value.
SDValue getCondCode(ISD::CondCode Cond)
SDNode * getNode() const
Convenience function for get().getNode().
bool getConstantStringInfo(const Value *V, StringRef &Str, uint64_t Offset=0, bool TrimAtNul=true)
This function computes the length of a null-terminated C string pointed to by V.
SDValue getAtomicCmpSwap(unsigned Opcode, const SDLoc &dl, EVT MemVT, SDVTList VTs, SDValue Chain, SDValue Ptr, SDValue Cmp, SDValue Swp, MachinePointerInfo PtrInfo, unsigned Alignment, AtomicOrdering SuccessOrdering, AtomicOrdering FailureOrdering, SynchronizationScope SynchScope)
Gets a node for an atomic cmpxchg op.
SDValue getVAArg(EVT VT, const SDLoc &dl, SDValue Chain, SDValue Ptr, SDValue SV, unsigned Align)
VAArg produces a result and token chain, and takes a pointer and a source value as input...
const DebugLoc & getDebugLoc() const
Return the source location info.
virtual bool isTruncateFree(Type *FromTy, Type *ToTy) const
Return true if it's free to truncate a value of type FromTy to type ToTy.
SDValue getIndexedStore(SDValue OrigStoe, const SDLoc &dl, SDValue Base, SDValue Offset, ISD::MemIndexedMode AM)
CONCAT_VECTORS(VECTOR0, VECTOR1, ...) - Given a number of values of vector type with the same length ...
bool isFloatingPoint() const
isFloatingPoint - Return true if this is a FP, or a vector FP type.
static bool FindOptimalMemOpLowering(std::vector< EVT > &MemOps, unsigned Limit, uint64_t Size, unsigned DstAlign, unsigned SrcAlign, bool IsMemset, bool ZeroMemset, bool MemcpyStrSrc, bool AllowOverlap, unsigned DstAS, unsigned SrcAS, SelectionDAG &DAG, const TargetLowering &TLI)
Determines the optimal series of memory ops to replace the memset / memcpy.
SDNode * getNodeIfExists(unsigned Opcode, SDVTList VTs, ArrayRef< SDValue > Ops, const SDNodeFlags *Flags=nullptr)
Get the specified node if it's already available, or else return NULL.
SDValue getJumpTable(int JTI, EVT VT, bool isTarget=false, unsigned char TargetFlags=0)
This class is used to form a handle around another node that is persistent and is updated across invo...
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
opStatus fusedMultiplyAdd(const APFloat &Multiplicand, const APFloat &Addend, roundingMode RM)
bool isAllOnesConstant(SDValue V)
Returns true if V is an integer constant with all bits set.
SDValue getFrameIndex(int FI, EVT VT, bool isTarget=false)
bool isSimple() const
isSimple - Test if the given EVT is simple (as opposed to being extended).
unsigned getAlignment() const
bool operator<(int64_t V1, const APSInt &V2)
MVT getPointerTy(const DataLayout &DL, uint32_t AS=0) const
Return the pointer type for the given address space, defaults to the pointer type from the data layou...
uint64_t getOffset() const
EVT getTypeToTransformTo(LLVMContext &Context, EVT VT) const
For types supported by the target, this is an identity function.
LLVM Value Representation.
FMA - Perform a * b + c with no intermediate rounding step.
SDValue getLogicalNOT(const SDLoc &DL, SDValue Val, EVT VT)
Create a logical NOT operation as (XOR Val, BooleanOne).
SDValue getRegister(unsigned Reg, EVT VT)
SDValue getAnyExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT)
Convert Op, which must be of integer type, to the integer type VT, by either any-extending or truncat...
APInt sextOrTrunc(unsigned width) const
Sign extend or truncate to width.
MemSDNodeBitfields MemSDNodeBits
bool isNullConstant(SDValue V)
Returns true if V is a constant integer zero.
bool isTruncatingStore() const
Return true if the op does a truncation before store.
#define LLVM_FALLTHROUGH
LLVM_FALLTHROUGH - Mark fallthrough cases in switch statements.
void setDebugLoc(DebugLoc dl)
Set source location info.
SDValue getValueType(EVT)
std::underlying_type< E >::type Mask()
Get a bitmask with 1s in all places up to the high-order bit of E's largest value.
PREFETCH - This corresponds to a prefetch intrinsic.
unsigned getResNo() const
void setHasDebugValue(bool b)
unsigned ComputeNumSignBits(SDValue Op, unsigned Depth=0) const
Return the number of times the sign bit of the register is replicated into the other bits...
uint64_t getSize() const
Return the size in bytes of the memory reference.
const TargetLowering & getTargetLoweringInfo() const
void ReplaceAllUsesOfValueWith(SDValue From, SDValue To)
Replace any uses of From with To, leaving uses of other values produced by From.Val alone...
SDValue getEHLabel(const SDLoc &dl, SDValue Root, MCSymbol *Label)
unsigned countLeadingZeros() const
The APInt version of the countLeadingZeros functions in MathExtras.h.
Primary interface to the complete machine description for the target machine.
void add(SDDbgValue *V, const SDNode *Node, bool isParameter)
FoldingSetNodeIDRef Intern(BumpPtrAllocator &Allocator) const
Intern - Copy this node's data to a memory region allocated from the given allocator and return a Fol...
SDValue getSrcValue(const Value *v)
Construct a node to track a Value* through the backend.
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
StringRef - Represent a constant reference to a string, i.e.
APInt zext(unsigned width) const
Zero extend to a new width.
SetCC operator - This evaluates to a true value iff the condition is true.
bool needsStackRealignment(const MachineFunction &MF) const
True if storage within the function requires the stack pointer to be aligned more than the normal cal...
ManagedStatic - This transparently changes the behavior of global statics to be lazily constructed on...
virtual bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const
Return true if folding a constant offset with the given GlobalAddress is legal.
virtual SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, unsigned Align, bool isVolatile, MachinePointerInfo DstPtrInfo) const
Emit target-specific code that performs a memset.
unsigned getMinStackArgumentAlignment() const
Return the minimum stack alignment of an argument.
MERGE_VALUES - This node takes multiple discrete operands and returns them all as its individual resu...
static SDValue getMemsetStringVal(EVT VT, const SDLoc &dl, SelectionDAG &DAG, const TargetLowering &TLI, StringRef Str)
getMemsetStringVal - Similar to getMemsetValue.
BooleanContent
Enum that describes how the target represents true/false values.
static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC)
AddNodeIDOpcode - Add the node opcode to the NodeID data.
static APInt getNullValue(unsigned numBits)
Get the '0' value.
static ManagedStatic< EVTArray > SimpleVTArray
APInt abs() const
Get the absolute value;.
SDValue getEntryNode() const
Return the token chain corresponding to the entry of the function.
OUTCHAIN = ATOMIC_STORE(INCHAIN, ptr, val) This corresponds to "store atomic" instruction.
MDNode * getVariable() const
SDValue getZeroExtendInReg(SDValue Op, const SDLoc &DL, EVT SrcTy)
Return the expression required to zero extend the Op value assuming it was the smaller SrcTy value...
bool SignBitIsZero(SDValue Op, unsigned Depth=0) const
Return true if the sign bit of Op is known to be zero.
bool isOperandOf(const SDNode *N) const
Return true if this node is an operand of N.
SDValue getTargetInsertSubreg(int SRIdx, const SDLoc &DL, EVT VT, SDValue Operand, SDValue Subreg)
A convenience function for creating TargetInstrInfo::INSERT_SUBREG nodes.
TRUNCATE - Completely drop the high bits.
EVT getShiftAmountTy(EVT LHSTy, const DataLayout &DL) const
bool isTargetMemoryOpcode() const
Test if this node has a target-specific memory-referencing opcode (in the <target>ISD namespace and g...
unsigned getAlignment() const
bool isCondCodeLegal(ISD::CondCode CC, MVT VT) const
Return true if the specified condition code is legal on this target.
void erase(const SDNode *Node)
Invalidate all DbgValues attached to the node and remove it from the Node-to-DbgValues map...
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation...
MVT getSimpleValueType(unsigned ResNo) const
Return the type of a specified result as a simple type.
SDDbgValue - Holds the information from a dbg_value node through SDISel.
static GCRegistry::Add< ErlangGC > A("erlang","erlang-compatible garbage collector")
FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW, FLOG, FLOG2, FLOG10, FEXP, FEXP2, FCEIL, FTRUNC, FRINT, FNEARBYINT, FROUND, FFLOOR - Perform various unary floating point operations.
void setObjectAlignment(int ObjectIdx, unsigned Align)
setObjectAlignment - Change the alignment of the specified stack object.
static EVT getIntegerVT(LLVMContext &Context, unsigned BitWidth)
getIntegerVT - Returns the EVT that represents an integer with the given number of bits...
bool ule(const APInt &RHS) const
Unsigned less or equal comparison.
static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N)
If this is an SDNode with special info, add this info to the NodeID data.
Fast - This calling convention attempts to make calls as fast as possible (e.g.
static IntegerType * getInt8Ty(LLVMContext &C)
SDValue getMemset(SDValue Chain, const SDLoc &dl, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, bool isVol, bool isTailCall, MachinePointerInfo DstPtrInfo)
Val, OUTCHAIN = ATOMIC_LOAD(INCHAIN, ptr) This corresponds to "load atomic" instruction.
int64_t getObjectSize(int ObjectIdx) const
Return the size of the specified object.
SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a scalar value into element 0 of the...
static bool isSplatMask(const int *Mask, EVT VT)
unsigned getResNo() const
Convenience function for get().getResNo().
MVT getSimpleVT() const
getSimpleVT - Return the SimpleValueType held in the specified simple EVT.
const SDNodeFlags * getFlags() const
This could be defined as a virtual function and implemented more simply and directly, but it is not to avoid creating a vtable for this class.
bool isMachineOpcode() const
Test if this node has a post-isel opcode, directly corresponding to a MachineInstr opcode...
SDValue expandVAArg(SDNode *Node)
Expand the specified ISD::VAARG node as the Legalize pass would.
This file describes how to lower LLVM code to machine code.
unsigned char getTargetFlags() const
unsigned getOrder() const
uint64_t getZExtValue() const
MemIndexedMode
MemIndexedMode enum - This enum defines the load / store indexed addressing modes.
MULHU/MULHS - Multiply high - Multiply two integers of type iN, producing an unsigned/signed value of...
static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs)
makeVTList - Return an instance of the SDVTList struct initialized with the specified members...
unsigned getVectorNumElements() const
getVectorNumElements - Given a vector type, return the number of elements it contains.
SRCVALUE - This is a node type that holds a Value* that is used to make reference to a value in the L...
This class is used to represent ISD::LOAD nodes.