LLVM  4.0.0
SIFixControlFlowLiveIntervals.cpp
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1 //===-- SIFixControlFlowLiveIntervals.cpp - Fix CF live intervals ---------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 /// \file
11 /// \brief Spilling of EXEC masks used for control flow messes up control flow
12 /// lowering, so mark all live intervals associated with CF instructions as
13 /// non-spillable.
14 ///
15 //===----------------------------------------------------------------------===//
16 
17 #include "AMDGPU.h"
18 #include "SIInstrInfo.h"
22 
23 using namespace llvm;
24 
25 #define DEBUG_TYPE "si-fix-cf-live-intervals"
26 
27 namespace {
28 
29 class SIFixControlFlowLiveIntervals : public MachineFunctionPass {
30 public:
31  static char ID;
32 
33 public:
34  SIFixControlFlowLiveIntervals() : MachineFunctionPass(ID) {
36  }
37 
38  bool runOnMachineFunction(MachineFunction &MF) override;
39 
40  StringRef getPassName() const override { return "SI Fix CF Live Intervals"; }
41 
42  void getAnalysisUsage(AnalysisUsage &AU) const override {
44  AU.setPreservesAll();
46  }
47 };
48 
49 } // End anonymous namespace.
50 
51 INITIALIZE_PASS_BEGIN(SIFixControlFlowLiveIntervals, DEBUG_TYPE,
52  "SI Fix CF Live Intervals", false, false)
54 INITIALIZE_PASS_END(SIFixControlFlowLiveIntervals, DEBUG_TYPE,
55  "SI Fix CF Live Intervals", false, false)
56 
57 char SIFixControlFlowLiveIntervals::ID = 0;
58 
59 char &llvm::SIFixControlFlowLiveIntervalsID = SIFixControlFlowLiveIntervals::ID;
60 
62  return new SIFixControlFlowLiveIntervals();
63 }
64 
65 bool SIFixControlFlowLiveIntervals::runOnMachineFunction(MachineFunction &MF) {
66  LiveIntervals *LIS = &getAnalysis<LiveIntervals>();
67 
68  for (const MachineBasicBlock &MBB : MF) {
69  for (const MachineInstr &MI : MBB) {
70  switch (MI.getOpcode()) {
71  case AMDGPU::SI_IF:
72  case AMDGPU::SI_ELSE:
73  case AMDGPU::SI_BREAK:
74  case AMDGPU::SI_IF_BREAK:
75  case AMDGPU::SI_ELSE_BREAK:
76  case AMDGPU::SI_END_CF: {
77  unsigned Reg = MI.getOperand(0).getReg();
78  LIS->getInterval(Reg).markNotSpillable();
79  break;
80  }
81  default:
82  break;
83  }
84  }
85  }
86 
87  return false;
88 }
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
AnalysisUsage & addRequired()
#define INITIALIZE_PASS_DEPENDENCY(depName)
Definition: PassSupport.h:53
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
Reg
All possible values of the reg field in the ModR/M byte.
char & SIFixControlFlowLiveIntervalsID
SI Fix CF Live false
MachineBasicBlock * MBB
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
Represent the analysis usage information of a pass.
INITIALIZE_PASS_END(RegBankSelect, DEBUG_TYPE,"Assign register bank of generic virtual registers", false, false) RegBankSelect
FunctionPass class - This class is used to implement most global optimizations.
Definition: Pass.h:298
INITIALIZE_PASS_BEGIN(SIFixControlFlowLiveIntervals, DEBUG_TYPE,"SI Fix CF Live Intervals", false, false) INITIALIZE_PASS_END(SIFixControlFlowLiveIntervals
SI Fix CF Live Intervals
void markNotSpillable()
markNotSpillable - Mark interval as not spillable
Definition: LiveInterval.h:759
LiveInterval & getInterval(unsigned Reg)
void setPreservesAll()
Set by analyses that do not transform their input at all.
Representation of each machine instruction.
Definition: MachineInstr.h:52
Interface definition for SIInstrInfo.
void initializeSIFixControlFlowLiveIntervalsPass(PassRegistry &)
FunctionPass * createSIFixControlFlowLiveIntervalsPass()
IRTranslator LLVM IR MI
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:47