10 #ifndef LLVM_LIB_TARGET_HEXAGON_RDFCOPY_H
11 #define LLVM_LIB_TARGET_HEXAGON_RDFCOPY_H
19 class MachineBasicBlock;
20 class MachineDominatorTree;
46 std::map<RegisterRef,std::map<NodeId,NodeId>> RDefMap;
48 std::map<NodeId, EqualityMap> CopyMap;
49 std::vector<NodeId> Copies;
60 #endif // LLVM_LIB_TARGET_HEXAGON_RDFCOPY_H
std::map< RegisterRef, RegisterRef > EqualityMap
virtual ~CopyPropagation()=default
Function Alias Analysis false
static GCRegistry::Add< OcamlGC > B("ocaml","ocaml 3.10-compatible GC")
CopyPropagation(DataFlowGraph &dfg)
virtual bool interpretAsCopy(const MachineInstr *MI, EqualityMap &EM)
std::unordered_map< RegisterId, DefStack > DefStackMap
Representation of each machine instruction.
DominatorTree Class - Concrete subclass of DominatorTreeBase that is used to compute a normal dominat...