LLVM  4.0.0
AMDGPUELFObjectWriter.cpp
Go to the documentation of this file.
1 //===-- AMDGPUELFObjectWriter.cpp - AMDGPU ELF Writer ----------------------==//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 /// \file
9 //===----------------------------------------------------------------------===//
10 
11 #include "AMDGPUMCTargetDesc.h"
13 #include "llvm/MC/MCFixup.h"
14 
15 using namespace llvm;
16 
17 namespace {
18 
19 class AMDGPUELFObjectWriter : public MCELFObjectTargetWriter {
20 public:
21  AMDGPUELFObjectWriter(bool Is64Bit, bool HasRelocationAddend);
22 protected:
23  unsigned getRelocType(MCContext &Ctx, const MCValue &Target,
24  const MCFixup &Fixup, bool IsPCRel) const override;
25 };
26 
27 
28 } // End anonymous namespace
29 
30 AMDGPUELFObjectWriter::AMDGPUELFObjectWriter(bool Is64Bit,
31  bool HasRelocationAddend)
32  : MCELFObjectTargetWriter(Is64Bit,
34  ELF::EM_AMDGPU,
35  HasRelocationAddend) { }
36 
38  const MCValue &Target,
39  const MCFixup &Fixup,
40  bool IsPCRel) const {
41  if (const auto *SymA = Target.getSymA()) {
42  // SCRATCH_RSRC_DWORD[01] is a special global variable that represents
43  // the scratch buffer.
44  if (SymA->getSymbol().getName() == "SCRATCH_RSRC_DWORD0")
45  return ELF::R_AMDGPU_ABS32_LO;
46 
47  if (SymA->getSymbol().getName() == "SCRATCH_RSRC_DWORD1")
48  return ELF::R_AMDGPU_ABS32_HI;
49  }
50 
51  switch (Target.getAccessVariant()) {
52  default:
53  break;
55  return ELF::R_AMDGPU_GOTPCREL;
57  return ELF::R_AMDGPU_GOTPCREL32_LO;
59  return ELF::R_AMDGPU_GOTPCREL32_HI;
61  return ELF::R_AMDGPU_REL32_LO;
63  return ELF::R_AMDGPU_REL32_HI;
64  }
65 
66  switch (Fixup.getKind()) {
67  default: break;
68  case FK_PCRel_4:
69  return ELF::R_AMDGPU_REL32;
70  case FK_Data_4:
71  case FK_SecRel_4:
72  return ELF::R_AMDGPU_ABS32;
73  case FK_Data_8:
74  return ELF::R_AMDGPU_ABS64;
75  }
76 
77  llvm_unreachable("unhandled relocation type");
78 }
79 
80 
82  bool HasRelocationAddend,
83  raw_pwrite_stream &OS) {
85  new AMDGPUELFObjectWriter(Is64Bit, HasRelocationAddend);
86  return createELFObjectWriter(MOTW, OS, true);
87 }
This represents an "assembler immediate".
Definition: MCValue.h:40
Defines the object file and target independent interfaces used by the assembler backend to write nati...
Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...
Definition: MCFixup.h:66
static unsigned getRelocType(const MCValue &Target, const MCFixupKind FixupKind, const bool IsPCRel)
Translates generic PPC fixup kind to Mach-O/PPC relocation type enum.
A four-byte section relative fixup.
Definition: MCFixup.h:42
A four-byte fixup.
Definition: MCFixup.h:26
Context object for machine code objects.
Definition: MCContext.h:51
MCObjectWriter * createAMDGPUELFObjectWriter(bool Is64Bit, bool HasRelocationAddend, raw_pwrite_stream &OS)
MCSymbolRefExpr::VariantKind getAccessVariant() const
Definition: MCValue.cpp:44
MCFixupKind getKind() const
Definition: MCFixup.h:93
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
const MCSymbolRefExpr * getSymA() const
Definition: MCValue.h:47
A four-byte pc relative fixup.
Definition: MCFixup.h:30
Target - Wrapper for Target specific information.
Provides AMDGPU specific target descriptions.
MCObjectWriter * createELFObjectWriter(MCELFObjectTargetWriter *MOTW, raw_pwrite_stream &OS, bool IsLittleEndian)
Construct a new ELF writer instance.
A eight-byte fixup.
Definition: MCFixup.h:27
An abstract base class for streams implementations that also support a pwrite operation.
Definition: raw_ostream.h:333