11 #ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPU_H
12 #define LLVM_LIB_TARGET_AMDGPU_AMDGPU_H
18 class AMDGPUTargetMachine;
20 class GCNTargetMachine;
ModulePass * createAMDGPUAnnotateKernelFeaturesPass()
Pass * createAMDGPUStructurizeCFGPass()
Target & getTheGCNTarget()
The target for GCN GPUs.
FunctionPass * createSIAnnotateControlFlowPass()
Create the annotation pass.
char & SIShrinkInstructionsID
void initializeAMDGPUAnnotateKernelFeaturesPass(PassRegistry &)
aarch64 AArch64 CCMP Pass
char & SILoadStoreOptimizerID
Target & getTheAMDGPUTarget()
The target which suports all AMD GPUs.
void initializeAMDGPUAnnotateUniformValuesPass(PassRegistry &)
FunctionPass * createAMDGPUPromoteAlloca(const TargetMachine *TM=nullptr)
Address space for local memory.
FunctionPass * createAMDGPUCFGStructurizerPass()
FunctionPass * createAMDGPUISelDag(TargetMachine &TM, CodeGenOpt::Level OptLevel)
This pass converts a legalized DAG into a AMDGPU-specific.
void initializeAMDGPUPromoteAllocaPass(PassRegistry &)
char & AMDGPUUnifyMetadataID
FunctionPass * createR600ExpandSpecialInstrsPass(TargetMachine &tm)
void initializeAMDGPUCodeGenPreparePass(PassRegistry &)
char & SIFixControlFlowLiveIntervalsID
FunctionPass * createR600VectorRegMerger(TargetMachine &tm)
FunctionPass * createSITypeRewriter()
FunctionPass * createR600ClauseMergePass(TargetMachine &tm)
FunctionPass * createSILowerI1CopiesPass()
void initializeSIOptimizeExecMaskingPass(PassRegistry &)
void initializeSIFixSGPRCopiesPass(PassRegistry &)
FunctionPass * createR600ControlFlowFinalizer(TargetMachine &tm)
FunctionPass * createSILoadStoreOptimizerPass(TargetMachine &tm)
Address space for region memory.
char & AMDGPUAnnotateUniformValuesPassID
FunctionPass * createSIDebuggerInsertNopsPass()
Address space for constant memory (VTX2)
FunctionPass * createSIWholeQuadModePass()
Address space for private memory.
char & SIInsertSkipsPassID
char & AMDGPUAnnotateKernelFeaturesID
FunctionPass * createR600Packetizer(TargetMachine &tm)
FunctionPass * createAMDGPUUnifyMetadataPass()
void initializeSILowerControlFlowPass(PassRegistry &)
Address space for flat memory.
void initializeSIShrinkInstructionsPass(PassRegistry &)
void initializeSIInsertSkipsPass(PassRegistry &)
FunctionPass * createAMDGPUAnnotateUniformValues()
char & SIOptimizeExecMaskingID
ModulePass * createAMDGPUAlwaysInlinePass()
FunctionPass * createAMDGPUCodeGenPreparePass(const GCNTargetMachine *TM=nullptr)
void initializeSIWholeQuadModePass(PassRegistry &)
static const char * Target
char & SIAnnotateControlFlowPassID
void initializeAMDGPUUnifyMetadataPass(PassRegistry &)
FunctionPass * createSIFixSGPRCopiesPass()
void initializeSILoadStoreOptimizerPass(PassRegistry &)
char & SILowerControlFlowID
void initializeSIAnnotateControlFlowPass(PassRegistry &)
void initializeSIFoldOperandsPass(PassRegistry &)
FunctionPass * createSIShrinkInstructionsPass()
void initializeSIDebuggerInsertNopsPass(PassRegistry &)
Address space for indirect addressible parameter memory (VTX1)
FunctionPass * createSIFoldOperandsPass()
void initializeSIInsertWaitsPass(PassRegistry &)
Address space for direct addressible parameter memory (CONST0)
FunctionPass * createSIInsertWaitsPass()
FunctionPass * createR600EmitClauseMarkers()
void initializeSIFixControlFlowLiveIntervalsPass(PassRegistry &)
FunctionPass * createSIFixControlFlowLiveIntervalsPass()
char & AMDGPUPromoteAllocaID
void initializeSILowerI1CopiesPass(PassRegistry &)
char & SIDebuggerInsertNopsID
ModulePass * createAMDGPUOpenCLImageTypeLoweringPass()
char & AMDGPUCodeGenPrepareID
Address space for global memory (RAT0, VTX0).