43 cl::desc(
"Disable load/store vectorizer"),
80 std::string
Ret =
"e";
85 Ret +=
"-i64:64-v16:16-v32:32-n16:32:64";
102 Subtarget(TT, CPU, FS, *this) {
112 void NVPTXTargetMachine32::anchor() {}
122 void NVPTXTargetMachine64::anchor() {}
140 return getTM<NVPTXTargetMachine>();
143 void addIRPasses()
override;
144 bool addInstSelector()
override;
145 void addPostRegAlloc()
override;
146 void addMachineSSAOptimization()
override;
148 FunctionPass *createTargetRegisterAllocator(
bool)
override;
149 void addFastRegAlloc(
FunctionPass *RegAllocPass)
override;
150 void addOptimizedRegAlloc(
FunctionPass *RegAllocPass)
override;
155 void addEarlyCSEOrGVNPass();
158 void addAddressSpaceInferencePasses();
161 void addStraightLineScalarOptimizationPasses();
167 return new NVPTXPassConfig(
this, PM);
181 void NVPTXPassConfig::addEarlyCSEOrGVNPass() {
188 void NVPTXPassConfig::addAddressSpaceInferencePasses() {
196 void NVPTXPassConfig::addStraightLineScalarOptimizationPasses() {
205 addEarlyCSEOrGVNPass();
213 void NVPTXPassConfig::addIRPasses() {
243 addAddressSpaceInferencePasses();
246 addStraightLineScalarOptimizationPasses();
264 addEarlyCSEOrGVNPass();
267 bool NVPTXPassConfig::addInstSelector() {
280 void NVPTXPassConfig::addPostRegAlloc() {
290 FunctionPass *NVPTXPassConfig::createTargetRegisterAllocator(
bool) {
294 void NVPTXPassConfig::addFastRegAlloc(
FunctionPass *RegAllocPass) {
295 assert(!RegAllocPass &&
"NVPTX uses no regalloc!");
300 void NVPTXPassConfig::addOptimizedRegAlloc(
FunctionPass *RegAllocPass) {
301 assert(!RegAllocPass &&
"NVPTX uses no regalloc!");
313 printAndVerify(
"After Machine Scheduling");
321 printAndVerify(
"After StackSlotColoring");
324 void NVPTXPassConfig::addMachineSSAOptimization() {
326 if (addPass(&EarlyTailDuplicateID))
327 printAndVerify(
"After Pre-RegAlloc TailDuplicate");
346 printAndVerify(
"After codegen DCE pass");
352 printAndVerify(
"After ILP optimizations");
358 printAndVerify(
"After Machine LICM, CSE and Sinking passes");
361 printAndVerify(
"After codegen peephole optimization pass");
FunctionPass * createSpeculativeExecutionPass()
OSType getOS() const
getOS - Get the parsed operating system type of this triple.
FunctionPass * createStraightLineStrengthReducePass()
FunctionPass * createGVNPass(bool NoLoads=false)
Create a legacy GVN pass.
void initializeNVPTXLowerArgsPass(PassRegistry &)
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
void LLVMInitializeNVPTXTarget()
virtual void addIRPasses()
Add common target configurable passes that perform LLVM IR to IR transforms following machine indepen...
FunctionPass * createNVVMReflectPass()
char & MachineLICMID
MachineLICM - This pass performs LICM on machine instructions.
ModulePass * createNVPTXAssignValidGlobalNamesPass()
char & FuncletLayoutID
This pass lays out funclets contiguously.
static std::string computeDataLayout(bool is64Bit)
FunctionPass * createAllocaHoisting()
char & RegisterCoalescerID
RegisterCoalescer - This pass merges live ranges to eliminate copies.
Analysis pass providing the TargetTransformInfo.
MachineFunctionPass * createNVPTXPrologEpilogPass()
char & MachineSchedulerID
MachineScheduler - This pass schedules machine instructions.
ModulePass * createGenericToNVVMPass()
char & ProcessImplicitDefsID
ProcessImpicitDefs pass - This pass removes IMPLICIT_DEFs.
void initializeNVPTXAssignValidGlobalNamesPass(PassRegistry &)
char & MachineLoopInfoID
MachineLoopInfo - This pass is a loop analysis pass.
char & StackColoringID
StackSlotColoring - This pass performs stack coloring and merging.
Pass * createLoadStoreVectorizerPass()
Target-Independent Code Generator Pass Configuration Options.
Target & getTheNVPTXTarget64()
char & MachineCSEID
MachineCSE - This pass performs global CSE on machine instructions.
unsigned int getSmVersion() const
Function Alias Analysis false
TargetIRAnalysis getTargetIRAnalysis() override
Get a TargetIRAnalysis implementation for the target.
char & StackSlotColoringID
StackSlotColoring - This pass performs stack slot coloring.
char & DeadMachineInstructionElimID
DeadMachineInstructionElim - This pass removes dead machine instructions.
TargetPassConfig * createPassConfig(PassManagerBase &PM) override
Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of ...
FunctionPass * createNVPTXImageOptimizerPass()
void initializeNVVMIntrRangePass(PassRegistry &)
char & PHIEliminationID
PHIElimination - This pass eliminates machine instruction PHI nodes by inserting copy instructions...
Target & getTheNVPTXTarget32()
char & LiveVariablesID
LiveVariables pass - This pass computes the set of blocks in which each variable is life and sets mac...
initializer< Ty > init(const Ty &Val)
NVPTXTargetMachine32(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional< Reloc::Model > RM, CodeModel::Model CM, CodeGenOpt::Level OL)
FunctionPass * createSeparateConstOffsetFromGEPPass(const TargetMachine *TM=nullptr, bool LowerGEP=false)
void initializeNVPTXLowerAggrCopiesPass(PassRegistry &)
void initializeNVVMReflectPass(PassRegistry &)
std::enable_if<!std::is_array< T >::value, std::unique_ptr< T > >::type make_unique(Args &&...args)
Constructs a new T() with the given args and returns a unique_ptr<T> which owns the object...
This file provides the interface for LLVM's Global Value Numbering pass which eliminates fully redund...
static bool is64Bit(const char *name)
MachineFunctionPass * createNVPTXReplaceImageHandlesPass()
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang","erlang-compatible garbage collector")
char & LiveDebugValuesID
LiveDebugValues pass.
This class describes a target machine that is implemented with the LLVM target-independent code gener...
FunctionPass class - This class is used to implement most global optimizations.
void initializeNVPTXAllocaHoistingPass(PassRegistry &)
char & MachineCopyPropagationID
MachineCopyPropagation - This pass performs copy propagation on machine instructions.
void initializeGenericToNVVMPass(PassRegistry &)
FunctionPass * createNVPTXInferAddressSpacesPass()
Triple - Helper class for working with autoconf configuration names.
char & PostRASchedulerID
createPostRAScheduler - This pass performs post register allocation scheduling.
void initializeNVPTXLowerAllocaPass(PassRegistry &)
BasicBlockPass * createNVPTXLowerAllocaPass()
char & StackMapLivenessID
StackMapLiveness - This pass analyses the register live-out set of stackmap/patchpoint intrinsics and...
char & TailDuplicateID
TailDuplicate - Duplicate blocks with unconditional branches into tails of their predecessors.
char & MachineSinkingID
MachineSinking - This pass performs sinking on machine instructions.
char & OptimizePHIsID
OptimizePHIs - This pass optimizes machine instruction PHIs to take advantage of opportunities create...
Target - Wrapper for Target specific information.
char & PeepholeOptimizerID
PeepholeOptimizer - This pass performs peephole optimizations - like extension and comparison elimina...
char & PrologEpilogCodeInserterID
PrologEpilogCodeInserter - This pass inserts prolog and epilog code, and eliminates abstract frame re...
void initializeNVPTXInferAddressSpacesPass(PassRegistry &)
char & PatchableFunctionID
This pass implements the "patchable-function" attribute.
MachineFunctionPass * createNVPTXPeephole()
FunctionPass * createNVPTXISelDag(NVPTXTargetMachine &TM, llvm::CodeGenOpt::Level OptLevel)
createNVPTXISelDag - This pass converts a legalized DAG into a NVPTX-specific DAG, ready for instruction scheduling.
~NVPTXTargetMachine() override
FunctionPass * createNVVMIntrRangePass(unsigned int SmVersion)
FunctionPass * createNVPTXLowerArgsPass(const NVPTXTargetMachine *TM)
FunctionPass * createLowerAggrCopies()
void addEarlyAsPossiblePasses(PassManagerBase &PM) override
Add target-specific function passes that should be run as early as possible in the optimization pipel...
FunctionPass * createSROAPass()
NVPTXTargetMachine64(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional< Reloc::Model > RM, CodeModel::Model CM, CodeGenOpt::Level OL)
char & TwoAddressInstructionPassID
TwoAddressInstruction - This pass reduces two-address instructions to use two operands.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
bool hasImageHandles() const
RegisterTargetMachine - Helper template for registering a target machine implementation, for use in the target machine initialization function.
FunctionPass * createEarlyCSEPass(bool UseMemorySSA=false)
static cl::opt< bool > DisableLoadStoreVectorizer("disable-nvptx-load-store-vectorizer", cl::desc("Disable load/store vectorizer"), cl::init(false), cl::Hidden)
StringRef - Represent a constant reference to a string, i.e.
PassRegistry - This class manages the registration and intitialization of the pass subsystem as appli...
static GCMetadataPrinterRegistry::Add< OcamlGCMetadataPrinter > Y("ocaml","ocaml 3.10-compatible collector")
char & LocalStackSlotAllocationID
LocalStackSlotAllocation - This pass assigns local frame indices to stack slots relative to one anoth...
FunctionPass * createNaryReassociatePass()
NVPTXTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional< Reloc::Model > RM, CodeModel::Model CM, CodeGenOpt::Level OP, bool is64bit)