15 #ifndef LLVM_CODEGEN_GLOBALISEL_REGBANKINFO_H
16 #define LLVM_CODEGEN_GLOBALISEL_REGBANKINFO_H
31 class MachineRegisterInfo;
32 class TargetInstrInfo;
33 class TargetRegisterInfo;
63 : StartIdx(StartIdx), Length(Length), RegBank(&RegBank) {}
154 : BreakDown(BreakDown), NumBreakDowns(NumBreakDowns) {}
168 bool verify(
unsigned MeaningfulBitWidth)
const;
189 unsigned NumOperands;
193 return OperandsMapping[
i];
207 unsigned NumOperands)
208 : ID(ID), Cost(Cost), OperandsMapping(OperandsMapping),
209 NumOperands(NumOperands) {
211 "Use the default constructor for invalid mapping");
222 unsigned getID()
const {
return ID; }
240 OperandsMapping = OpdsMapping;
287 static const int DontKnowIdx;
296 getVRegsMem(
unsigned OpIdx);
302 getNewVRegsEnd(
unsigned StartIdx,
unsigned NumVal)
const;
343 void setVRegs(
unsigned OpIdx,
unsigned PartialMapIdx,
unsigned NewVReg);
358 getVRegs(
unsigned OpIdx,
bool ForDebug =
false)
const;
439 unsigned NumBreakDowns)
const;
455 template <
typename Iterator>
472 std::initializer_list<const ValueMapping *> OpdsMapping)
const;
545 unsigned Size)
const {
644 const TargetRegisterInfo &TRI);
652 bool verify(
const TargetRegisterInfo &TRI)
const;
657 const RegisterBankInfo::PartialMapping &PartMapping) {
658 PartMapping.print(OS);
663 operator<<(raw_ostream &OS,
const RegisterBankInfo::ValueMapping &ValMapping) {
664 ValMapping.print(OS);
670 const RegisterBankInfo::InstructionMapping &InstrMapping) {
671 InstrMapping.print(OS);
676 operator<<(raw_ostream &OS,
const RegisterBankInfo::OperandsMapper &OpdMapper) {
677 OpdMapper.print(OS,
false);
683 hash_code
hash_value(
const RegisterBankInfo::PartialMapping &PartMapping);
void setOperandsMapping(const ValueMapping *OpdsMapping)
Set the mapping for all the operands.
void dump() const
Print this on dbgs() stream.
static const unsigned InvalidMappingID
Identifier used when the related instruction mapping instance is generated by the default constructor...
DenseMap< unsigned, ValueMapping * > MapOfOperandsMappings
Keep dynamically allocated array of ValueMapping in a separate map.
virtual unsigned copyCost(const RegisterBank &A, const RegisterBank &B, unsigned Size) const
Get the cost of a copy from B to A, or put differently, get the cost of A = COPY B.
Helper class that represents how the value of an instruction may be mapped and what is the related co...
virtual const RegisterBank & getRegBankFromRegClass(const TargetRegisterClass &RC) const
Get a register bank that covers RC.
bool isValid() const
Check if this ValueMapping is valid.
DenseMap< unsigned, const PartialMapping * > MapOfPartialMappings
Keep dynamically allocated PartialMapping in a separate map.
unsigned getHighBitIdx() const
Helper class that represents how the value of an instruction may be mapped and what is the related co...
const ValueMapping & getValueMapping(unsigned StartIdx, unsigned Length, const RegisterBank &RegBank) const
Methods to get a uniquely generated ValueMapping.
iterator_range< SmallVectorImpl< unsigned >::const_iterator > getVRegs(unsigned OpIdx, bool ForDebug=false) const
Get all the virtual registers required to map the OpIdx-th operand of the instruction.
Helper class used to get/create the virtual registers that will be used to replace the MachineOperand...
Helper struct that represents how a value is partially mapped into a register.
const PartialMapping * BreakDown
How the value is broken down between the different register banks.
Holds all the information related to register banks.
void print(raw_ostream &OS, bool ForDebug=false) const
Print this operands mapper on OS stream.
const HexagonInstrInfo * TII
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Reg
All possible values of the reg field in the ModR/M byte.
unsigned StartIdx
Number of bits at which this partial mapping starts in the original value.
PartialMapping(unsigned StartIdx, unsigned Length, const RegisterBank &RegBank)
Provide a shortcut for quickly building PartialMapping.
const RegisterBank * getRegBankFromConstraints(const MachineInstr &MI, unsigned OpIdx, const TargetInstrInfo &TII, const TargetRegisterInfo &TRI) const
Get the register bank for the OpIdx-th operand of MI form the encoding constraints, if any.
This file implements a class to represent arbitrary precision integral constant values and operations...
bool verify(unsigned MeaningfulBitWidth) const
Verify that this mapping makes sense for a value of MeaningfulBitWidth.
virtual InstructionMappings getInstrAlternativeMappings(const MachineInstr &MI) const
Get the alternative mappings for MI.
bool verify() const
Check that the Mask is compatible with the RegBank.
InstructionMapping getInstrMappingImpl(const MachineInstr &MI) const
Try to get the mapping of MI.
virtual InstructionMapping getInstrMapping(const MachineInstr &MI) const
Get the mapping of the different operands of MI on the register bank.
hash_code hash_value(const APFloat &Arg)
See friend declarations above.
static GCRegistry::Add< OcamlGC > B("ocaml","ocaml 3.10-compatible GC")
const ValueMapping * getOperandsMapping(Iterator Begin, Iterator End) const
Methods to get a uniquely generated array of ValueMapping.
const RegisterBank * RegBank
Register bank where the partial value lives.
TargetInstrInfo - Interface to description of machine instruction set.
void setVRegs(unsigned OpIdx, unsigned PartialMapIdx, unsigned NewVReg)
Set the virtual register of the PartialMapIdx-th partial mapping of the OpIdx-th operand to NewVReg...
bool verify(const TargetRegisterInfo &TRI) const
Check that information hold by this instance make sense for the given TRI.
ValueMapping(const PartialMapping *BreakDown, unsigned NumBreakDowns)
Initialize a ValueMapping with the given parameter.
unsigned const MachineRegisterInfo * MRI
SmallVector< InstructionMapping, 4 > InstructionMappings
Convenient type to represent the alternatives for mapping an instruction.
static unsigned getSizeInBits(unsigned Reg, const MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI)
Get the size in bits of Reg.
const InstructionMapping & getInstrMapping() const
The final mapping of the instruction.
Helper struct that represents how a value is partially mapped into a register.
unsigned Length
Length of this mapping in bits.
unsigned NumRegBanks
Total number of register banks.
static const unsigned End
ValueMapping()
The default constructor creates an invalid (isValid() == false) instance.
static const unsigned DefaultMappingID
Identifier used when the related instruction mapping instance is generated by target independent code...
MachineInstr & getMI() const
Getters.
const PartialMapping * begin() const
Iterators through the PartialMappings.
void dump() const
Print this partial mapping on dbgs() stream.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
const RegisterBank & getRegBank(unsigned ID) const
Get the register bank identified by ID.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Helper class used to get/create the virtual registers that will be used to replace the MachineOperand...
OperandsMapper(MachineInstr &MI, const InstructionMapping &InstrMapping, MachineRegisterInfo &MRI)
Create an OperandsMapper that will hold the information to apply InstrMapping to MI.
InstructionMapping()
Default constructor.
RegisterBank & getRegBank(unsigned ID)
Get the register bank identified by ID.
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small...
static void applyDefaultMapping(const OperandsMapper &OpdMapper)
Helper method to apply something that is like the default mapping.
const ValueMapping & getOperandMapping(unsigned i) const
Get the value mapping of the ith operand.
virtual ~RegisterBankInfo()
This class implements the register bank concept.
DenseMap< unsigned, const ValueMapping * > MapOfValueMappings
Keep dynamically allocated ValueMapping in a separate map.
Helper struct that represents how a value is mapped through different register banks.
unsigned getCost() const
Get the cost.
A range adaptor for a pair of iterators.
void dump() const
Print this operands mapper on dbgs() stream.
void print(raw_ostream &OS) const
Print this on OS;.
const InstructionMapping & getInstrMapping() const
The final mapping of the instruction.
bool isValid() const
Check whether this object is valid.
void createVRegs(unsigned OpIdx)
Create as many new virtual registers as needed for the mapping of the OpIdx-th operand.
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
Representation of each machine instruction.
void print(raw_ostream &OS) const
Print this on OS;.
InstructionMapping(unsigned ID, unsigned Cost, const ValueMapping *OperandsMapping, unsigned NumOperands)
Constructor for the mapping of an instruction.
unsigned getNumRegBanks() const
Get the total number of register banks.
static const TargetRegisterClass * constrainGenericRegister(unsigned Reg, const TargetRegisterClass &RC, MachineRegisterInfo &MRI)
Constrain the (possibly generic) virtual register Reg to RC.
unsigned getNumOperands() const
Get the number of operands.
unsigned getID() const
Get the ID.
virtual void applyMappingImpl(const OperandsMapper &OpdMapper) const
See applyMapping.
raw_ostream & operator<<(raw_ostream &OS, const APInt &I)
Helper struct that represents how a value is mapped through different register banks.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
void dump() const
Print this on dbgs() stream.
unsigned NumBreakDowns
Number of partial mapping to break down this value.
bool verify(const MachineInstr &MI) const
Verifiy that this mapping makes sense for MI.
const PartialMapping & getPartialMapping(unsigned StartIdx, unsigned Length, const RegisterBank &RegBank) const
Get the uniquely generated PartialMapping for the given arguments.
This class implements an extremely fast bulk output stream that can only output to a stream...
const PartialMapping * end() const
class llvm::RegisterBankInfo *void applyMapping(const OperandsMapper &OpdMapper) const
Apply OpdMapper.getInstrMapping() to OpdMapper.getMI().
RegisterBankInfo()
This constructor is meaningless.
static GCRegistry::Add< ErlangGC > A("erlang","erlang-compatible garbage collector")
RegisterBank ** RegBanks
Hold the set of supported register banks.
void print(raw_ostream &OS) const
Print this partial mapping on OS;.