19 #ifndef LLVM_CODEGEN_GLOBALISEL_IRTRANSLATOR_H
20 #define LLVM_CODEGEN_GLOBALISEL_IRTRANSLATOR_H
34 class MachineBasicBlock;
35 class MachineFunction;
37 class MachineRegisterInfo;
38 class TargetPassConfig;
129 bool translateOverflowIntrinsic(
const CallInst &CI,
unsigned Op,
145 bool translateCast(
unsigned Opcode,
const User &U,
150 bool translateStaticAlloca(
const AllocaInst &Inst,
161 return translateCompare(U, MIRBuilder);
166 return translateCompare(U, MIRBuilder);
172 void finishPendingPhis();
176 bool translateBinaryOp(
unsigned Opcode,
const User &U,
177 MachineIRBuilder &MIRBuilder);
181 bool translateBr(
const User &U, MachineIRBuilder &MIRBuilder);
183 bool translateSwitch(
const User &U, MachineIRBuilder &MIRBuilder);
185 bool translateExtractValue(
const User &U, MachineIRBuilder &MIRBuilder);
187 bool translateInsertValue(
const User &U, MachineIRBuilder &MIRBuilder);
189 bool translateSelect(
const User &U, MachineIRBuilder &MIRBuilder);
191 bool translateGetElementPtr(
const User &U, MachineIRBuilder &MIRBuilder);
197 bool translateRet(
const User &U, MachineIRBuilder &MIRBuilder);
199 bool translateAdd(
const User &U, MachineIRBuilder &MIRBuilder) {
200 return translateBinaryOp(TargetOpcode::G_ADD, U, MIRBuilder);
202 bool translateSub(
const User &U, MachineIRBuilder &MIRBuilder) {
203 return translateBinaryOp(TargetOpcode::G_SUB, U, MIRBuilder);
205 bool translateAnd(
const User &U, MachineIRBuilder &MIRBuilder) {
206 return translateBinaryOp(TargetOpcode::G_AND, U, MIRBuilder);
208 bool translateMul(
const User &U, MachineIRBuilder &MIRBuilder) {
209 return translateBinaryOp(TargetOpcode::G_MUL, U, MIRBuilder);
211 bool translateOr(
const User &U, MachineIRBuilder &MIRBuilder) {
212 return translateBinaryOp(TargetOpcode::G_OR, U, MIRBuilder);
214 bool translateXor(
const User &U, MachineIRBuilder &MIRBuilder) {
215 return translateBinaryOp(TargetOpcode::G_XOR, U, MIRBuilder);
218 bool translateUDiv(
const User &U, MachineIRBuilder &MIRBuilder) {
219 return translateBinaryOp(TargetOpcode::G_UDIV, U, MIRBuilder);
221 bool translateSDiv(
const User &U, MachineIRBuilder &MIRBuilder) {
222 return translateBinaryOp(TargetOpcode::G_SDIV, U, MIRBuilder);
224 bool translateURem(
const User &U, MachineIRBuilder &MIRBuilder) {
225 return translateBinaryOp(TargetOpcode::G_UREM, U, MIRBuilder);
227 bool translateSRem(
const User &U, MachineIRBuilder &MIRBuilder) {
228 return translateBinaryOp(TargetOpcode::G_SREM, U, MIRBuilder);
230 bool translateAlloca(
const User &U, MachineIRBuilder &MIRBuilder) {
231 return translateStaticAlloca(cast<AllocaInst>(U), MIRBuilder);
233 bool translateIntToPtr(
const User &U, MachineIRBuilder &MIRBuilder) {
234 return translateCast(TargetOpcode::G_INTTOPTR, U, MIRBuilder);
236 bool translatePtrToInt(
const User &U, MachineIRBuilder &MIRBuilder) {
237 return translateCast(TargetOpcode::G_PTRTOINT, U, MIRBuilder);
239 bool translateTrunc(
const User &U, MachineIRBuilder &MIRBuilder) {
240 return translateCast(TargetOpcode::G_TRUNC, U, MIRBuilder);
242 bool translateFPTrunc(
const User &U, MachineIRBuilder &MIRBuilder) {
243 return translateCast(TargetOpcode::G_FPTRUNC, U, MIRBuilder);
245 bool translateFPExt(
const User &U, MachineIRBuilder &MIRBuilder) {
246 return translateCast(TargetOpcode::G_FPEXT, U, MIRBuilder);
248 bool translateFPToUI(
const User &U, MachineIRBuilder &MIRBuilder) {
249 return translateCast(TargetOpcode::G_FPTOUI, U, MIRBuilder);
251 bool translateFPToSI(
const User &U, MachineIRBuilder &MIRBuilder) {
252 return translateCast(TargetOpcode::G_FPTOSI, U, MIRBuilder);
254 bool translateUIToFP(
const User &U, MachineIRBuilder &MIRBuilder) {
255 return translateCast(TargetOpcode::G_UITOFP, U, MIRBuilder);
257 bool translateSIToFP(
const User &U, MachineIRBuilder &MIRBuilder) {
258 return translateCast(TargetOpcode::G_SITOFP, U, MIRBuilder);
260 bool translateUnreachable(
const User &U, MachineIRBuilder &MIRBuilder) {
263 bool translateSExt(
const User &U, MachineIRBuilder &MIRBuilder) {
264 return translateCast(TargetOpcode::G_SEXT, U, MIRBuilder);
267 bool translateZExt(
const User &U, MachineIRBuilder &MIRBuilder) {
268 return translateCast(TargetOpcode::G_ZEXT, U, MIRBuilder);
271 bool translateShl(
const User &U, MachineIRBuilder &MIRBuilder) {
272 return translateBinaryOp(TargetOpcode::G_SHL, U, MIRBuilder);
274 bool translateLShr(
const User &U, MachineIRBuilder &MIRBuilder) {
275 return translateBinaryOp(TargetOpcode::G_LSHR, U, MIRBuilder);
277 bool translateAShr(
const User &U, MachineIRBuilder &MIRBuilder) {
278 return translateBinaryOp(TargetOpcode::G_ASHR, U, MIRBuilder);
281 bool translateFAdd(
const User &U, MachineIRBuilder &MIRBuilder) {
282 return translateBinaryOp(TargetOpcode::G_FADD, U, MIRBuilder);
284 bool translateFSub(
const User &U, MachineIRBuilder &MIRBuilder) {
285 return translateBinaryOp(TargetOpcode::G_FSUB, U, MIRBuilder);
287 bool translateFMul(
const User &U, MachineIRBuilder &MIRBuilder) {
288 return translateBinaryOp(TargetOpcode::G_FMUL, U, MIRBuilder);
290 bool translateFDiv(
const User &U, MachineIRBuilder &MIRBuilder) {
291 return translateBinaryOp(TargetOpcode::G_FDIV, U, MIRBuilder);
293 bool translateFRem(
const User &U, MachineIRBuilder &MIRBuilder) {
294 return translateBinaryOp(TargetOpcode::G_FREM, U, MIRBuilder);
299 bool translateIndirectBr(
const User &U, MachineIRBuilder &MIRBuilder) {
302 bool translateResume(
const User &U, MachineIRBuilder &MIRBuilder) {
305 bool translateCleanupRet(
const User &U, MachineIRBuilder &MIRBuilder) {
308 bool translateCatchRet(
const User &U, MachineIRBuilder &MIRBuilder) {
311 bool translateCatchSwitch(
const User &U, MachineIRBuilder &MIRBuilder) {
314 bool translateFence(
const User &U, MachineIRBuilder &MIRBuilder) {
317 bool translateAtomicCmpXchg(
const User &U, MachineIRBuilder &MIRBuilder) {
320 bool translateAtomicRMW(
const User &U, MachineIRBuilder &MIRBuilder) {
323 bool translateAddrSpaceCast(
const User &U, MachineIRBuilder &MIRBuilder) {
326 bool translateCleanupPad(
const User &U, MachineIRBuilder &MIRBuilder) {
329 bool translateCatchPad(
const User &U, MachineIRBuilder &MIRBuilder) {
332 bool translateUserOp1(
const User &U, MachineIRBuilder &MIRBuilder) {
335 bool translateUserOp2(
const User &U, MachineIRBuilder &MIRBuilder) {
338 bool translateVAArg(
const User &U, MachineIRBuilder &MIRBuilder) {
341 bool translateExtractElement(
const User &U, MachineIRBuilder &MIRBuilder) {
344 bool translateInsertElement(
const User &U, MachineIRBuilder &MIRBuilder) {
347 bool translateShuffleVector(
const User &U, MachineIRBuilder &MIRBuilder) {
357 MachineIRBuilder CurBuilder;
361 MachineIRBuilder EntryBuilder;
367 MachineRegisterInfo *MRI;
369 const DataLayout *DL;
372 const TargetPassConfig *TPC;
378 void finalizeFunction();
382 unsigned getOrCreateVReg(
const Value &Val);
386 int getOrCreateFrameIndex(
const AllocaInst &AI);
391 unsigned getMemOpAlignment(
const Instruction &
I);
395 MachineBasicBlock &getOrCreateBB(
const BasicBlock &BB);
This class represents a function call, abstracting a target machine's calling convention.
StringRef getPassName() const override
getPassName - Return a nice clean name for a pass.
bool runOnMachineFunction(MachineFunction &MF) override
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
Reg
All possible values of the reg field in the ModR/M byte.
This is an important base class in LLVM.
Helper class to build MachineInstr.
Represent the analysis usage information of a pass.
A SetVector that performs no allocations if smaller than a certain size.
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small...
static GCRegistry::Add< ShadowStackGC > C("shadow-stack","Very portable GC for uncooperative code generators")
This file declares the MachineIRBuilder class.
This file describes high level types that are used by several passes or APIs involved in the GlobalIS...
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - This function should be overriden by passes that need analysis information to do t...
StringRef - Represent a constant reference to a string, i.e.
an instruction to allocate memory on the stack