14 #ifndef LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64ADDRESSINGMODES_H
15 #define LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64ADDRESSINGMODES_H
26 namespace AArch64_AM {
74 switch ((Imm >> 6) & 0x7) {
100 assert((Imm & 0x3f) == Imm &&
"Illegal shifted immedate value!");
110 return (STEnc << 6) | (Imm & 0x3f);
124 assert((Imm & 0x7) == Imm &&
"invalid immediate!");
172 assert((Imm & 0x7) == Imm &&
"Illegal shifted immedate value!");
179 return (Imm & 0x1) != 0;
205 static inline uint64_t
ror(uint64_t elt,
unsigned size) {
206 return ((elt & 1) << (size-1)) | (elt >> 1);
214 uint64_t &Encoding) {
215 if (Imm == 0ULL || Imm == ~0ULL ||
216 (RegSize != 64 && (Imm >> RegSize != 0 || Imm == ~0U)))
220 unsigned Size = RegSize;
224 uint64_t
Mask = (1ULL << Size) - 1;
226 if ((Imm & Mask) != ((Imm >> Size) & Mask)) {
234 uint64_t
Mask = ((uint64_t)-1LL) >> (64 - Size);
239 assert(I < 64 &&
"undefined behavior");
254 assert(Size > I &&
"I should be smaller than element size");
255 unsigned Immr = (Size -
I) & (Size - 1);
259 uint64_t NImms = ~(Size-1) << 1;
266 unsigned N = ((NImms >> 6) & 1) ^ 1;
268 Encoding = (N << 12) | (Immr << 6) | (NImms & 0x3f);
282 uint64_t encoding = 0;
284 assert(res &&
"invalid logical immediate");
294 unsigned N = (val >> 12) & 1;
295 unsigned immr = (val >> 6) & 0x3f;
296 unsigned imms = val & 0x3f;
298 assert((regSize == 64 || N == 0) &&
"undefined logical immediate encoding");
300 assert(len >= 0 &&
"undefined logical immediate encoding");
301 unsigned size = (1 << len);
302 unsigned R = immr & (size - 1);
303 unsigned S = imms & (size - 1);
304 assert(S != size - 1 &&
"undefined logical immediate encoding");
305 uint64_t pattern = (1ULL << (S + 1)) - 1;
306 for (
unsigned i = 0;
i < R; ++
i)
307 pattern =
ror(pattern, size);
310 while (size != regSize) {
311 pattern |= (pattern << size);
323 unsigned N = (val >> 12) & 1;
324 unsigned imms = val & 0x3f;
326 if (regSize == 32 && N != 0)
331 unsigned size = (1 << len);
332 unsigned S = imms & (size - 1);
349 uint8_t Sign = (Imm >> 7) & 0x1;
350 uint8_t Exp = (Imm >> 4) & 0x7;
351 uint8_t Mantissa = Imm & 0xf;
359 FPUnion.I |= Sign << 31;
360 FPUnion.I |= ((Exp & 0x4) != 0 ? 0 : 1) << 30;
361 FPUnion.I |= ((Exp & 0x4) != 0 ? 0x1f : 0) << 25;
362 FPUnion.I |= (Exp & 0x3) << 23;
363 FPUnion.I |= Mantissa << 19;
382 if (Exp < -3 || Exp > 4)
384 Exp = ((Exp+3) & 0x7) ^ 4;
386 return ((
int)Sign << 7) | (Exp << 4) | Mantissa;
403 if (Mantissa & 0x7ffff)
406 if ((Mantissa & 0xf) != Mantissa)
410 if (Exp < -3 || Exp > 4)
412 Exp = ((Exp+3) & 0x7) ^ 4;
414 return ((
int)Sign << 7) | (Exp << 4) | Mantissa;
427 uint64_t Mantissa = Imm.
getZExtValue() & 0xfffffffffffffULL;
431 if (Mantissa & 0xffffffffffffULL)
434 if ((Mantissa & 0xf) != Mantissa)
438 if (Exp < -3 || Exp > 4)
440 Exp = ((Exp+3) & 0x7) ^ 4;
442 return ((
int)Sign << 7) | (Exp << 4) | Mantissa;
455 return ((Imm >> 32) == (Imm & 0xffffffffULL)) &&
456 ((Imm & 0xffffff00ffffff00ULL) == 0);
460 return (Imm & 0xffULL);
464 uint64_t EncVal = Imm;
465 return (EncVal << 32) | EncVal;
470 return ((Imm >> 32) == (Imm & 0xffffffffULL)) &&
471 ((Imm & 0xffff00ffffff00ffULL) == 0);
475 return (Imm & 0xff00ULL) >> 8;
479 uint64_t EncVal = Imm;
480 return (EncVal << 40) | (EncVal << 8);
485 return ((Imm >> 32) == (Imm & 0xffffffffULL)) &&
486 ((Imm & 0xff00ffffff00ffffULL) == 0);
490 return (Imm & 0xff0000ULL) >> 16;
494 uint64_t EncVal = Imm;
495 return (EncVal << 48) | (EncVal << 16);
500 return ((Imm >> 32) == (Imm & 0xffffffffULL)) &&
501 ((Imm & 0x00ffffff00ffffffULL) == 0);
505 return (Imm & 0xff000000ULL) >> 24;
509 uint64_t EncVal = Imm;
510 return (EncVal << 56) | (EncVal << 24);
515 return ((Imm >> 32) == (Imm & 0xffffffffULL)) &&
516 (((Imm & 0x00ff0000ULL) >> 16) == (Imm & 0x000000ffULL)) &&
517 ((Imm & 0xff00ff00ff00ff00ULL) == 0);
521 return (Imm & 0xffULL);
525 uint64_t EncVal = Imm;
526 return (EncVal << 48) | (EncVal << 32) | (EncVal << 16) | EncVal;
531 return ((Imm >> 32) == (Imm & 0xffffffffULL)) &&
532 (((Imm & 0xff000000ULL) >> 16) == (Imm & 0x0000ff00ULL)) &&
533 ((Imm & 0x00ff00ff00ff00ffULL) == 0);
537 return (Imm & 0xff00ULL) >> 8;
541 uint64_t EncVal = Imm;
542 return (EncVal << 56) | (EncVal << 40) | (EncVal << 24) | (EncVal << 8);
547 return ((Imm >> 32) == (Imm & 0xffffffffULL)) &&
548 ((Imm & 0xffff00ffffff00ffULL) == 0x000000ff000000ffULL);
552 return (Imm & 0xff00ULL) >> 8;
556 uint64_t EncVal = Imm;
557 return (EncVal << 40) | (EncVal << 8) | 0x000000ff000000ffULL;
562 return ((Imm >> 32) == (Imm & 0xffffffffULL)) &&
563 ((Imm & 0xff00ffffff00ffffULL) == 0x0000ffff0000ffffULL);
567 uint64_t EncVal = Imm;
568 return (EncVal << 48) | (EncVal << 16) | 0x0000ffff0000ffffULL;
572 return (Imm & 0x00ff0000ULL) >> 16;
577 return ((Imm >> 32) == (Imm & 0xffffffffULL)) &&
578 ((Imm >> 48) == (Imm & 0x0000ffffULL)) &&
579 ((Imm >> 56) == (Imm & 0x000000ffULL));
583 return (Imm & 0xffULL);
587 uint64_t EncVal = Imm;
588 EncVal |= (EncVal << 8);
589 EncVal |= (EncVal << 16);
590 EncVal |= (EncVal << 32);
597 uint64_t ByteA = Imm & 0xff00000000000000ULL;
598 uint64_t ByteB = Imm & 0x00ff000000000000ULL;
599 uint64_t ByteC = Imm & 0x0000ff0000000000ULL;
600 uint64_t ByteD = Imm & 0x000000ff00000000ULL;
601 uint64_t ByteE = Imm & 0x00000000ff000000ULL;
602 uint64_t ByteF = Imm & 0x0000000000ff0000ULL;
603 uint64_t ByteG = Imm & 0x000000000000ff00ULL;
604 uint64_t ByteH = Imm & 0x00000000000000ffULL;
606 return (ByteA == 0ULL || ByteA == 0xff00000000000000ULL) &&
607 (ByteB == 0ULL || ByteB == 0x00ff000000000000ULL) &&
608 (ByteC == 0ULL || ByteC == 0x0000ff0000000000ULL) &&
609 (ByteD == 0ULL || ByteD == 0x000000ff00000000ULL) &&
610 (ByteE == 0ULL || ByteE == 0x00000000ff000000ULL) &&
611 (ByteF == 0ULL || ByteF == 0x0000000000ff0000ULL) &&
612 (ByteG == 0ULL || ByteG == 0x000000000000ff00ULL) &&
613 (ByteH == 0ULL || ByteH == 0x00000000000000ffULL);
617 uint8_t BitA = (Imm & 0xff00000000000000ULL) != 0;
618 uint8_t BitB = (Imm & 0x00ff000000000000ULL) != 0;
619 uint8_t BitC = (Imm & 0x0000ff0000000000ULL) != 0;
620 uint8_t BitD = (Imm & 0x000000ff00000000ULL) != 0;
621 uint8_t BitE = (Imm & 0x00000000ff000000ULL) != 0;
622 uint8_t BitF = (Imm & 0x0000000000ff0000ULL) != 0;
623 uint8_t BitG = (Imm & 0x000000000000ff00ULL) != 0;
624 uint8_t BitH = (Imm & 0x00000000000000ffULL) != 0;
626 uint8_t EncVal = BitA;
646 if (Imm & 0x80) EncVal |= 0xff00000000000000ULL;
647 if (Imm & 0x40) EncVal |= 0x00ff000000000000ULL;
648 if (Imm & 0x20) EncVal |= 0x0000ff0000000000ULL;
649 if (Imm & 0x10) EncVal |= 0x000000ff00000000ULL;
650 if (Imm & 0x08) EncVal |= 0x00000000ff000000ULL;
651 if (Imm & 0x04) EncVal |= 0x0000000000ff0000ULL;
652 if (Imm & 0x02) EncVal |= 0x000000000000ff00ULL;
653 if (Imm & 0x01) EncVal |= 0x00000000000000ffULL;
659 uint64_t BString = (Imm & 0x7E000000ULL) >> 25;
660 return ((Imm >> 32) == (Imm & 0xffffffffULL)) &&
661 (BString == 0x1f || BString == 0x20) &&
662 ((Imm & 0x0007ffff0007ffffULL) == 0);
666 uint8_t BitA = (Imm & 0x80000000ULL) != 0;
667 uint8_t BitB = (Imm & 0x20000000ULL) != 0;
668 uint8_t BitC = (Imm & 0x01000000ULL) != 0;
669 uint8_t BitD = (Imm & 0x00800000ULL) != 0;
670 uint8_t BitE = (Imm & 0x00400000ULL) != 0;
671 uint8_t BitF = (Imm & 0x00200000ULL) != 0;
672 uint8_t BitG = (Imm & 0x00100000ULL) != 0;
673 uint8_t BitH = (Imm & 0x00080000ULL) != 0;
675 uint8_t EncVal = BitA;
695 if (Imm & 0x80) EncVal |= 0x80000000ULL;
696 if (Imm & 0x40) EncVal |= 0x3e000000ULL;
697 else EncVal |= 0x40000000ULL;
698 if (Imm & 0x20) EncVal |= 0x01000000ULL;
699 if (Imm & 0x10) EncVal |= 0x00800000ULL;
700 if (Imm & 0x08) EncVal |= 0x00400000ULL;
701 if (Imm & 0x04) EncVal |= 0x00200000ULL;
702 if (Imm & 0x02) EncVal |= 0x00100000ULL;
703 if (Imm & 0x01) EncVal |= 0x00080000ULL;
704 return (EncVal << 32) | EncVal;
709 uint64_t BString = (Imm & 0x7fc0000000000000ULL) >> 54;
710 return ((BString == 0xff || BString == 0x100) &&
711 ((Imm & 0x0000ffffffffffffULL) == 0));
715 uint8_t BitA = (Imm & 0x8000000000000000ULL) != 0;
716 uint8_t BitB = (Imm & 0x0040000000000000ULL) != 0;
717 uint8_t BitC = (Imm & 0x0020000000000000ULL) != 0;
718 uint8_t BitD = (Imm & 0x0010000000000000ULL) != 0;
719 uint8_t BitE = (Imm & 0x0008000000000000ULL) != 0;
720 uint8_t BitF = (Imm & 0x0004000000000000ULL) != 0;
721 uint8_t BitG = (Imm & 0x0002000000000000ULL) != 0;
722 uint8_t BitH = (Imm & 0x0001000000000000ULL) != 0;
724 uint8_t EncVal = BitA;
744 if (Imm & 0x80) EncVal |= 0x8000000000000000ULL;
745 if (Imm & 0x40) EncVal |= 0x3fc0000000000000ULL;
746 else EncVal |= 0x4000000000000000ULL;
747 if (Imm & 0x20) EncVal |= 0x0020000000000000ULL;
748 if (Imm & 0x10) EncVal |= 0x0010000000000000ULL;
749 if (Imm & 0x08) EncVal |= 0x0008000000000000ULL;
750 if (Imm & 0x04) EncVal |= 0x0004000000000000ULL;
751 if (Imm & 0x02) EncVal |= 0x0002000000000000ULL;
752 if (Imm & 0x01) EncVal |= 0x0001000000000000ULL;
753 return (EncVal << 32) | EncVal;
757 for (
int Shift = 0; Shift <= RegWidth - 16; Shift += 16)
758 if ((Value & ~(0xffffULL << Shift)) == 0)
766 Value &= 0xffffffffULL;
769 if (Value == 0 && Shift != 0)
772 return (Value & ~(0xffffULL << Shift)) == 0;
782 Value &= 0xffffffffULL;
794 Value &= 0xffffffffULL;
static bool isAdvSIMDModImmType6(uint64_t Imm)
static uint64_t decodeAdvSIMDModImmType9(uint8_t Imm)
static float getFPImmFloat(unsigned Imm)
static uint8_t encodeAdvSIMDModImmType3(uint64_t Imm)
static unsigned getArithShiftValue(unsigned Imm)
getArithShiftValue - get the arithmetic shift value.
uint64_t getZExtValue() const
Get zero extended value.
static int getFP16Imm(const APInt &Imm)
getFP16Imm - Return an 8-bit floating-point version of the 16-bit floating-point value.
static bool isAdvSIMDModImmType12(uint64_t Imm)
static bool isAdvSIMDModImmType4(uint64_t Imm)
static uint8_t encodeAdvSIMDModImmType1(uint64_t Imm)
static uint64_t decodeAdvSIMDModImmType3(uint8_t Imm)
static bool processLogicalImmediate(uint64_t Imm, unsigned RegSize, uint64_t &Encoding)
processLogicalImmediate - Determine if an immediate value can be encoded as the immediate operand of ...
static uint64_t decodeAdvSIMDModImmType12(uint8_t Imm)
static bool isMOVZMovAlias(uint64_t Value, int Shift, int RegWidth)
static bool isAdvSIMDModImmType3(uint64_t Imm)
static bool isAnyMOVZMovAlias(uint64_t Value, int RegWidth)
std::size_t countLeadingZeros(T Val, ZeroBehavior ZB=ZB_Width)
Count number of 0's from the most significant bit to the least stopping at the first 1...
static bool getMemDoShift(unsigned Imm)
getMemDoShift - Extract the "do shift" flag value for load/store instructions.
static bool isAdvSIMDModImmType7(uint64_t Imm)
static uint64_t decodeAdvSIMDModImmType5(uint8_t Imm)
std::size_t countTrailingOnes(T Value, ZeroBehavior ZB=ZB_Width)
Count the number of ones from the least significant bit to the first zero bit.
static uint8_t encodeAdvSIMDModImmType6(uint64_t Imm)
APInt lshr(unsigned shiftAmt) const
Logical right-shift function.
APInt bitcastToAPInt() const
static bool isLogicalImmediate(uint64_t imm, unsigned regSize)
isLogicalImmediate - Return true if the immediate is valid for a logical immediate instruction of the...
static bool isAdvSIMDModImmType5(uint64_t Imm)
This file implements a class to represent arbitrary precision integral constant values and operations...
static bool isMOVNMovAlias(uint64_t Value, int Shift, int RegWidth)
static AArch64_AM::ShiftExtendType getMemExtendType(unsigned Imm)
getExtendType - Extract the extend type for the offset operand of loads/stores.
static bool isAdvSIMDModImmType2(uint64_t Imm)
static unsigned getShifterImm(AArch64_AM::ShiftExtendType ST, unsigned Imm)
getShifterImm - Encode the shift type and amount: imm: 6-bit shift amount shifter: 000 ==> lsl 001 ==...
static bool isAdvSIMDModImmType9(uint64_t Imm)
static unsigned getShiftValue(unsigned Imm)
getShiftValue - Extract the shift value.
std::size_t countTrailingZeros(T Val, ZeroBehavior ZB=ZB_Width)
Count number of 0's from the least significant bit to the most stopping at the first 1...
static int getFP32Imm(const APInt &Imm)
getFP32Imm - Return an 8-bit floating-point version of the 32-bit floating-point value.
static const char * getShiftExtendName(AArch64_AM::ShiftExtendType ST)
getShiftName - Get the string encoding for the shift type.
static AArch64_AM::ShiftExtendType getArithExtendType(unsigned Imm)
int64_t getSExtValue() const
Get sign extended value.
static uint64_t decodeLogicalImmediate(uint64_t val, unsigned regSize)
decodeLogicalImmediate - Decode a logical immediate value in the form "N:immr:imms" (where the immr a...
static unsigned getMemExtendImm(AArch64_AM::ShiftExtendType ET, bool DoShift)
getExtendImm - Encode the extend type and amount for a load/store inst: doshift: should the offset be...
static uint64_t decodeAdvSIMDModImmType6(uint8_t Imm)
static bool isAdvSIMDModImmType1(uint64_t Imm)
This file declares a class to represent arbitrary precision floating point values and provide a varie...
static bool isAdvSIMDModImmType8(uint64_t Imm)
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
static uint8_t encodeAdvSIMDModImmType12(uint64_t Imm)
unsigned getExtendEncoding(AArch64_AM::ShiftExtendType ET)
Mapping from extend bits to required operation: shifter: 000 ==> uxtb 001 ==> uxth 010 ==> uxtw 011 =...
static uint8_t encodeAdvSIMDModImmType2(uint64_t Imm)
static uint64_t encodeLogicalImmediate(uint64_t imm, unsigned regSize)
encodeLogicalImmediate - Return the encoded immediate value for a logical immediate instruction of th...
static int getFP64Imm(const APInt &Imm)
getFP64Imm - Return an 8-bit floating-point version of the 64-bit floating-point value.
static AArch64_AM::ShiftExtendType getExtendType(unsigned Imm)
getExtendType - Extract the extend type for operands of arithmetic ops.
static uint64_t decodeAdvSIMDModImmType7(uint8_t Imm)
Class for arbitrary precision integers.
static uint8_t encodeAdvSIMDModImmType10(uint64_t Imm)
static uint64_t decodeAdvSIMDModImmType1(uint8_t Imm)
static unsigned getArithExtendImm(AArch64_AM::ShiftExtendType ET, unsigned Imm)
getArithExtendImm - Encode the extend type and shift amount for an arithmetic instruction: imm: 3-bit...
static uint8_t encodeAdvSIMDModImmType5(uint64_t Imm)
static uint64_t decodeAdvSIMDModImmType8(uint8_t Imm)
static bool isAdvSIMDModImmType10(uint64_t Imm)
static uint8_t encodeAdvSIMDModImmType8(uint64_t Imm)
constexpr bool isShiftedMask_64(uint64_t Value)
isShiftedMask_64 - This function returns true if the argument contains a non-empty sequence of ones w...
static AArch64_AM::ShiftExtendType getShiftType(unsigned Imm)
getShiftType - Extract the shift type.
static bool isAnyMOVWMovAlias(uint64_t Value, int RegWidth)
static uint8_t encodeAdvSIMDModImmType4(uint64_t Imm)
static uint8_t encodeAdvSIMDModImmType11(uint64_t Imm)
static uint64_t decodeAdvSIMDModImmType10(uint8_t Imm)
static bool isValidDecodeLogicalImmediate(uint64_t val, unsigned regSize)
isValidDecodeLogicalImmediate - Check to see if the logical immediate value in the form "N:immr:imms"...
static uint64_t decodeAdvSIMDModImmType11(uint8_t Imm)
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
static uint64_t decodeAdvSIMDModImmType4(uint8_t Imm)
LLVM Value Representation.
static uint64_t decodeAdvSIMDModImmType2(uint8_t Imm)
std::underlying_type< E >::type Mask()
Get a bitmask with 1s in all places up to the high-order bit of E's largest value.
static uint64_t ror(uint64_t elt, unsigned size)
static uint8_t encodeAdvSIMDModImmType9(uint64_t Imm)
static bool isAdvSIMDModImmType11(uint64_t Imm)
static uint8_t encodeAdvSIMDModImmType7(uint64_t Imm)
std::size_t countLeadingOnes(T Value, ZeroBehavior ZB=ZB_Width)
Count the number of ones from the most significant bit to the first zero bit.