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LLVM
4.0.0
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#include <AMDGPUSubtarget.h>
Public Types | |
| enum | { FIXED_SGPR_COUNT_FOR_INIT_BUG = 96 } |
Public Types inherited from llvm::AMDGPUSubtarget | |
| enum | Generation { R600 = 0, R700, EVERGREEN, NORTHERN_ISLANDS, SOUTHERN_ISLANDS, SEA_ISLANDS, VOLCANIC_ISLANDS } |
| enum | { ISAVersion0_0_0, ISAVersion7_0_0, ISAVersion7_0_1, ISAVersion7_0_2, ISAVersion8_0_0, ISAVersion8_0_1, ISAVersion8_0_2, ISAVersion8_0_3, ISAVersion8_0_4, ISAVersion8_1_0 } |
Definition at line 484 of file AMDGPUSubtarget.h.
| anonymous enum |
| Enumerator | |
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| FIXED_SGPR_COUNT_FOR_INIT_BUG | |
Definition at line 486 of file AMDGPUSubtarget.h.
| SISubtarget::SISubtarget | ( | const Triple & | TT, |
| StringRef | CPU, | ||
| StringRef | FS, | ||
| const TargetMachine & | TM | ||
| ) |
Definition at line 279 of file AMDGPUSubtarget.cpp.
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inline |
Definition at line 581 of file AMDGPUSubtarget.h.
References llvm::AMDGPUSubtarget::DebuggerEmitPrologue.
Referenced by debuggerSupported(), llvm::SIFrameLowering::emitPrologue(), PrivateMemoryInputPtr(), and llvm::AMDGPUAsmPrinter::runOnMachineFunction().
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Definition at line 573 of file AMDGPUSubtarget.h.
References llvm::AMDGPUSubtarget::DebuggerInsertNops.
Referenced by debuggerSupported().
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Definition at line 577 of file AMDGPUSubtarget.h.
References llvm::AMDGPUSubtarget::DebuggerReserveRegs.
Referenced by debuggerSupported(), and llvm::SIRegisterInfo::getNumDebuggerReservedVGPRs().
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Definition at line 568 of file AMDGPUSubtarget.h.
References debuggerEmitPrologue(), debuggerInsertNops(), and debuggerReserveRegs().
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Definition at line 564 of file AMDGPUSubtarget.h.
References llvm::AMDGPUSubtarget::EnableSIScheduler.
Referenced by overrideSchedPolicy().
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inlineoverride |
Definition at line 514 of file AMDGPUSubtarget.h.
References assert().
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inlineoverridevirtual |
Implements llvm::AMDGPUSubtarget.
Definition at line 506 of file AMDGPUSubtarget.h.
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inlineoverridevirtual |
Implements llvm::AMDGPUSubtarget.
Definition at line 502 of file AMDGPUSubtarget.h.
Referenced by llvm::SITargetLowering::AdjustInstrPostInstrSelection(), llvm::SIRegisterInfo::eliminateFrameIndex(), emitIndirectDst(), emitIndirectSrc(), llvm::SITargetLowering::EmitInstrWithCustomInserter(), llvm::SIFrameLowering::emitPrologue(), llvm::SIRegisterInfo::materializeFrameBaseRegister(), llvm::SITargetLowering::PostISelFolding(), llvm::SIRegisterInfo::resolveFrameIndex(), llvm::SIRegisterInfo::restoreSGPR(), llvm::SIRegisterInfo::spillSGPR(), llvm::SITargetLowering::splitKillBlock(), and llvm::SITargetLowering::wrapAddr64Rsrc().
| unsigned SISubtarget::getKernArgSegmentSize | ( | const MachineFunction & | MF, |
| unsigned | ExplictArgBytes | ||
| ) | const |
Definition at line 307 of file AMDGPUSubtarget.cpp.
References llvm::alignTo(), llvm::AMDGPUSubtarget::getAlignmentForImplicitArgPtr(), and llvm::AMDGPUSubtarget::getImplicitArgNumBytes().
| unsigned SISubtarget::getMaxNumSGPRs | ( | ) | const |
Definition at line 362 of file AMDGPUSubtarget.cpp.
References FIXED_SGPR_COUNT_FOR_INIT_BUG, llvm::AMDGPUSubtarget::getGeneration(), hasSGPRInitBug(), and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.
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inline |
Definition at line 532 of file AMDGPUSubtarget.h.
Return the maximum number of waves per SIMD for kernels using SGPRs SGPRs.
Definition at line 317 of file AMDGPUSubtarget.cpp.
References llvm::AMDGPUSubtarget::getGeneration(), and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.
Referenced by getMaxWaves().
Return the maximum number of waves per SIMD for kernels using VGPRs VGPRs.
Definition at line 340 of file AMDGPUSubtarget.cpp.
Referenced by getMaxWaves().
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inlineoverridevirtual |
Implements llvm::AMDGPUSubtarget.
Definition at line 519 of file AMDGPUSubtarget.h.
References llvm::SIInstrInfo::getRegisterInfo().
Referenced by llvm::SIMachineFunctionInfo::getSpilledReg(), llvm::SITargetLowering::LowerFormalArguments(), and llvm::SITargetLowering::SITargetLowering().
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inlineoverridevirtual |
Implements llvm::AMDGPUSubtarget.
Definition at line 510 of file AMDGPUSubtarget.h.
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Definition at line 593 of file AMDGPUSubtarget.h.
References llvm::AMDGPUSubtarget::getGeneration(), and llvm::AMDGPUSubtarget::SOUTHERN_ISLANDS.
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Definition at line 536 of file AMDGPUSubtarget.h.
References llvm::AMDGPUSubtarget::FlatAddressSpace.
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Definition at line 560 of file AMDGPUSubtarget.h.
References llvm::AMDGPUSubtarget::HasInv2PiInlineImm.
Referenced by llvm::SIInstrInfo::isInlineConstant().
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Definition at line 544 of file AMDGPUSubtarget.h.
References llvm::AMDGPUSubtarget::HasMovrel.
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Definition at line 552 of file AMDGPUSubtarget.h.
References llvm::AMDGPUSubtarget::getGeneration(), and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.
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Definition at line 556 of file AMDGPUSubtarget.h.
References llvm::AMDGPUSubtarget::HasScalarStores.
Referenced by llvm::SIInstrInfo::loadRegFromStackSlot(), llvm::SIRegisterInfo::restoreSGPR(), llvm::SIRegisterInfo::spillSGPR(), and llvm::SIInstrInfo::storeRegToStackSlot().
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Definition at line 589 of file AMDGPUSubtarget.h.
References llvm::AMDGPUSubtarget::SGPRInitBug.
Referenced by llvm::SIRegisterInfo::getMaxNumSGPRs(), and getMaxNumSGPRs().
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Definition at line 540 of file AMDGPUSubtarget.h.
References llvm::AMDGPUSubtarget::HasSMemRealTime.
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Definition at line 548 of file AMDGPUSubtarget.h.
References llvm::AMDGPUSubtarget::HasVGPRIndexMode.
Referenced by emitIndirectDst(), and emitIndirectSrc().
Definition at line 303 of file AMDGPUSubtarget.cpp.
References llvm::AMDGPUSubtarget::EnableVGPRSpilling, llvm::Function::getCallingConv(), and llvm::AMDGPU::isShader().
Referenced by llvm::SIInstrInfo::loadRegFromStackSlot(), PrivateMemoryInputPtr(), and llvm::SIInstrInfo::storeRegToStackSlot().
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Definition at line 585 of file AMDGPUSubtarget.h.
References llvm::AMDGPUSubtarget::EnableLoadStoreOpt.
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Definition at line 607 of file AMDGPUSubtarget.h.
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Definition at line 286 of file AMDGPUSubtarget.cpp.
References enableSIScheduler(), llvm::MachineSchedPolicy::OnlyBottomUp, llvm::MachineSchedPolicy::OnlyTopDown, llvm::MachineSchedPolicy::ShouldTrackLaneMasks, and llvm::MachineSchedPolicy::ShouldTrackPressure.
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Definition at line 523 of file AMDGPUSubtarget.h.
1.8.6