clang  9.0.0
Mips.cpp
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1 //===--- Mips.cpp - Implement Mips target feature support -----------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements Mips TargetInfo objects.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "Mips.h"
14 #include "Targets.h"
15 #include "clang/Basic/Diagnostic.h"
18 #include "llvm/ADT/StringSwitch.h"
19 
20 using namespace clang;
21 using namespace clang::targets;
22 
23 const Builtin::Info MipsTargetInfo::BuiltinInfo[] = {
24 #define BUILTIN(ID, TYPE, ATTRS) \
25  {#ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, nullptr},
26 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) \
27  {#ID, TYPE, ATTRS, HEADER, ALL_LANGUAGES, nullptr},
28 #include "clang/Basic/BuiltinsMips.def"
29 };
30 
32  return llvm::StringSwitch<bool>(CPU)
33  .Case("mips3", true)
34  .Case("mips4", true)
35  .Case("mips5", true)
36  .Case("mips64", true)
37  .Case("mips64r2", true)
38  .Case("mips64r3", true)
39  .Case("mips64r5", true)
40  .Case("mips64r6", true)
41  .Case("octeon", true)
42  .Default(false);
43  return false;
44 }
45 
46 static constexpr llvm::StringLiteral ValidCPUNames[] = {
47  {"mips1"}, {"mips2"}, {"mips3"}, {"mips4"}, {"mips5"},
48  {"mips32"}, {"mips32r2"}, {"mips32r3"}, {"mips32r5"}, {"mips32r6"},
49  {"mips64"}, {"mips64r2"}, {"mips64r3"}, {"mips64r5"}, {"mips64r6"},
50  {"octeon"}, {"p5600"}};
51 
52 bool MipsTargetInfo::isValidCPUName(StringRef Name) const {
53  return llvm::find(ValidCPUNames, Name) != std::end(ValidCPUNames);
54 }
55 
57  SmallVectorImpl<StringRef> &Values) const {
58  Values.append(std::begin(ValidCPUNames), std::end(ValidCPUNames));
59 }
60 
61 unsigned MipsTargetInfo::getISARev() const {
62  return llvm::StringSwitch<unsigned>(getCPU())
63  .Cases("mips32", "mips64", 1)
64  .Cases("mips32r2", "mips64r2", 2)
65  .Cases("mips32r3", "mips64r3", 3)
66  .Cases("mips32r5", "mips64r5", 5)
67  .Cases("mips32r6", "mips64r6", 6)
68  .Default(0);
69 }
70 
72  MacroBuilder &Builder) const {
73  if (BigEndian) {
74  DefineStd(Builder, "MIPSEB", Opts);
75  Builder.defineMacro("_MIPSEB");
76  } else {
77  DefineStd(Builder, "MIPSEL", Opts);
78  Builder.defineMacro("_MIPSEL");
79  }
80 
81  Builder.defineMacro("__mips__");
82  Builder.defineMacro("_mips");
83  if (Opts.GNUMode)
84  Builder.defineMacro("mips");
85 
86  if (ABI == "o32") {
87  Builder.defineMacro("__mips", "32");
88  Builder.defineMacro("_MIPS_ISA", "_MIPS_ISA_MIPS32");
89  } else {
90  Builder.defineMacro("__mips", "64");
91  Builder.defineMacro("__mips64");
92  Builder.defineMacro("__mips64__");
93  Builder.defineMacro("_MIPS_ISA", "_MIPS_ISA_MIPS64");
94  }
95 
96  const std::string ISARev = std::to_string(getISARev());
97 
98  if (!ISARev.empty())
99  Builder.defineMacro("__mips_isa_rev", ISARev);
100 
101  if (ABI == "o32") {
102  Builder.defineMacro("__mips_o32");
103  Builder.defineMacro("_ABIO32", "1");
104  Builder.defineMacro("_MIPS_SIM", "_ABIO32");
105  } else if (ABI == "n32") {
106  Builder.defineMacro("__mips_n32");
107  Builder.defineMacro("_ABIN32", "2");
108  Builder.defineMacro("_MIPS_SIM", "_ABIN32");
109  } else if (ABI == "n64") {
110  Builder.defineMacro("__mips_n64");
111  Builder.defineMacro("_ABI64", "3");
112  Builder.defineMacro("_MIPS_SIM", "_ABI64");
113  } else
114  llvm_unreachable("Invalid ABI.");
115 
116  if (!IsNoABICalls) {
117  Builder.defineMacro("__mips_abicalls");
118  if (CanUseBSDABICalls)
119  Builder.defineMacro("__ABICALLS__");
120  }
121 
122  Builder.defineMacro("__REGISTER_PREFIX__", "");
123 
124  switch (FloatABI) {
125  case HardFloat:
126  Builder.defineMacro("__mips_hard_float", Twine(1));
127  break;
128  case SoftFloat:
129  Builder.defineMacro("__mips_soft_float", Twine(1));
130  break;
131  }
132 
133  if (IsSingleFloat)
134  Builder.defineMacro("__mips_single_float", Twine(1));
135 
136  switch (FPMode) {
137  case FPXX:
138  Builder.defineMacro("__mips_fpr", Twine(0));
139  break;
140  case FP32:
141  Builder.defineMacro("__mips_fpr", Twine(32));
142  break;
143  case FP64:
144  Builder.defineMacro("__mips_fpr", Twine(64));
145  break;
146 }
147 
148  if (FPMode == FP64 || IsSingleFloat)
149  Builder.defineMacro("_MIPS_FPSET", Twine(32));
150  else
151  Builder.defineMacro("_MIPS_FPSET", Twine(16));
152 
153  if (IsMips16)
154  Builder.defineMacro("__mips16", Twine(1));
155 
156  if (IsMicromips)
157  Builder.defineMacro("__mips_micromips", Twine(1));
158 
159  if (IsNan2008)
160  Builder.defineMacro("__mips_nan2008", Twine(1));
161 
162  if (IsAbs2008)
163  Builder.defineMacro("__mips_abs2008", Twine(1));
164 
165  switch (DspRev) {
166  default:
167  break;
168  case DSP1:
169  Builder.defineMacro("__mips_dsp_rev", Twine(1));
170  Builder.defineMacro("__mips_dsp", Twine(1));
171  break;
172  case DSP2:
173  Builder.defineMacro("__mips_dsp_rev", Twine(2));
174  Builder.defineMacro("__mips_dspr2", Twine(1));
175  Builder.defineMacro("__mips_dsp", Twine(1));
176  break;
177  }
178 
179  if (HasMSA)
180  Builder.defineMacro("__mips_msa", Twine(1));
181 
182  if (DisableMadd4)
183  Builder.defineMacro("__mips_no_madd4", Twine(1));
184 
185  Builder.defineMacro("_MIPS_SZPTR", Twine(getPointerWidth(0)));
186  Builder.defineMacro("_MIPS_SZINT", Twine(getIntWidth()));
187  Builder.defineMacro("_MIPS_SZLONG", Twine(getLongWidth()));
188 
189  Builder.defineMacro("_MIPS_ARCH", "\"" + CPU + "\"");
190  Builder.defineMacro("_MIPS_ARCH_" + StringRef(CPU).upper());
191 
192  // These shouldn't be defined for MIPS-I but there's no need to check
193  // for that since MIPS-I isn't supported.
194  Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
195  Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
196  Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4");
197 
198  // 32-bit MIPS processors don't have the necessary lld/scd instructions
199  // found in 64-bit processors. In the case of O32 on a 64-bit processor,
200  // the instructions exist but using them violates the ABI since they
201  // require 64-bit GPRs and O32 only supports 32-bit GPRs.
202  if (ABI == "n32" || ABI == "n64")
203  Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8");
204 }
205 
206 bool MipsTargetInfo::hasFeature(StringRef Feature) const {
207  return llvm::StringSwitch<bool>(Feature)
208  .Case("mips", true)
209  .Case("fp64", FPMode == FP64)
210  .Default(false);
211 }
212 
214  return llvm::makeArrayRef(BuiltinInfo, clang::Mips::LastTSBuiltin -
216 }
217 
219  return llvm::StringSwitch<unsigned>(ABI)
220  .Case("o32", 32)
221  .Case("n32", 64)
222  .Case("n64", 64)
223  .Default(getPointerWidth(0));
224 }
225 
227  // microMIPS64R6 backend was removed.
228  if (getTriple().isMIPS64() && IsMicromips && (ABI == "n32" || ABI == "n64")) {
229  Diags.Report(diag::err_target_unsupported_cpu_for_micromips) << CPU;
230  return false;
231  }
232  // FIXME: It's valid to use O32 on a 64-bit CPU but the backend can't handle
233  // this yet. It's better to fail here than on the backend assertion.
234  if (processorSupportsGPR64() && ABI == "o32") {
235  Diags.Report(diag::err_target_unsupported_abi) << ABI << CPU;
236  return false;
237  }
238 
239  // 64-bit ABI's require 64-bit CPU's.
240  if (!processorSupportsGPR64() && (ABI == "n32" || ABI == "n64")) {
241  Diags.Report(diag::err_target_unsupported_abi) << ABI << CPU;
242  return false;
243  }
244 
245  // FIXME: It's valid to use O32 on a mips64/mips64el triple but the backend
246  // can't handle this yet. It's better to fail here than on the
247  // backend assertion.
248  if (getTriple().isMIPS64() && ABI == "o32") {
249  Diags.Report(diag::err_target_unsupported_abi_for_triple)
250  << ABI << getTriple().str();
251  return false;
252  }
253 
254  // FIXME: It's valid to use N32/N64 on a mips/mipsel triple but the backend
255  // can't handle this yet. It's better to fail here than on the
256  // backend assertion.
257  if (getTriple().isMIPS32() && (ABI == "n32" || ABI == "n64")) {
258  Diags.Report(diag::err_target_unsupported_abi_for_triple)
259  << ABI << getTriple().str();
260  return false;
261  }
262 
263  // -fpxx is valid only for the o32 ABI
264  if (FPMode == FPXX && (ABI == "n32" || ABI == "n64")) {
265  Diags.Report(diag::err_unsupported_abi_for_opt) << "-mfpxx" << "o32";
266  return false;
267  }
268 
269  // -mfp32 and n32/n64 ABIs are incompatible
270  if (FPMode != FP64 && FPMode != FPXX && !IsSingleFloat &&
271  (ABI == "n32" || ABI == "n64")) {
272  Diags.Report(diag::err_opt_not_valid_with_opt) << "-mfpxx" << CPU;
273  return false;
274  }
275  // Mips revision 6 and -mfp32 are incompatible
276  if (FPMode != FP64 && FPMode != FPXX && (CPU == "mips32r6" ||
277  CPU == "mips64r6")) {
278  Diags.Report(diag::err_opt_not_valid_with_opt) << "-mfp32" << CPU;
279  return false;
280  }
281  // Option -mfp64 permitted on Mips32 iff revision 2 or higher is present
282  if (FPMode == FP64 && (CPU == "mips1" || CPU == "mips2" ||
283  getISARev() < 2) && ABI == "o32") {
284  Diags.Report(diag::err_mips_fp64_req) << "-mfp64";
285  return false;
286  }
287 
288  return true;
289 }
void DefineStd(MacroBuilder &Builder, StringRef MacroName, const LangOptions &Opts)
DefineStd - Define a macro name and standard variants.
Definition: Targets.cpp:54
Defines the clang::MacroBuilder utility class.
unsigned getLongWidth() const
getLongWidth/Align - Return the size of &#39;signed long&#39; and &#39;unsigned long&#39; for this target...
Definition: TargetInfo.h:398
bool hasFeature(StringRef Feature) const override
Determine whether the given target has the given feature.
Definition: Mips.cpp:206
const llvm::Triple & getTriple() const
Returns the target triple of the primary target.
Definition: TargetInfo.h:985
DiagnosticBuilder Report(SourceLocation Loc, unsigned DiagID)
Issue the message to the client.
Definition: Diagnostic.h:1297
void getTargetDefines(const LangOptions &Opts, MacroBuilder &Builder) const override
===-— Other target property query methods --------------------——===//
Definition: Mips.cpp:71
uint64_t getPointerWidth(unsigned AddrSpace) const
Return the width of pointers on this target, for the specified address space.
Definition: TargetInfo.h:358
Keeps track of the various options that can be enabled, which controls the dialect of C or C++ that i...
Definition: LangOptions.h:49
Concrete class used by the front-end to report problems and issues.
Definition: Diagnostic.h:149
Defines the Diagnostic-related interfaces.
unsigned getUnwindWordWidth() const override
Definition: Mips.cpp:218
bool validateTarget(DiagnosticsEngine &Diags) const override
Check the target is valid after it is fully initialized.
Definition: Mips.cpp:226
unsigned getIntWidth() const
getIntWidth/Align - Return the size of &#39;signed int&#39; and &#39;unsigned int&#39; for this target, in bits.
Definition: TargetInfo.h:393
Enumerates target-specific builtins in their own namespaces within namespace clang.
unsigned getISARev() const
Definition: Mips.cpp:61
void fillValidCPUList(SmallVectorImpl< StringRef > &Values) const override
Fill a SmallVectorImpl with the valid values to setCPU.
Definition: Mips.cpp:56
const std::string & getCPU() const
Definition: Mips.h:174
Dataflow Directional Tag Classes.
bool processorSupportsGPR64() const
Definition: Mips.cpp:31
ArrayRef< Builtin::Info > getTargetBuiltins() const override
Return information about target-specific builtins for the current primary target, and info about whic...
Definition: Mips.cpp:213
enum clang::targets::MipsTargetInfo::FPModeEnum FPMode
bool isValidCPUName(StringRef Name) const override
brief Determine whether this TargetInfo supports the given CPU name.
Definition: Mips.cpp:52
static constexpr llvm::StringLiteral ValidCPUNames[]
Definition: Mips.cpp:46
void defineMacro(const Twine &Name, const Twine &Value="1")
Append a #define line for macro of the form "\#define Name Value\n".
Definition: MacroBuilder.h:29