clang  9.0.0
Sparc.h
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1 //===--- Sparc.h - declare sparc target feature support ---------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file declares Sparc TargetInfo objects.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_CLANG_LIB_BASIC_TARGETS_SPARC_H
14 #define LLVM_CLANG_LIB_BASIC_TARGETS_SPARC_H
15 #include "clang/Basic/TargetInfo.h"
17 #include "llvm/ADT/Triple.h"
18 #include "llvm/Support/Compiler.h"
19 namespace clang {
20 namespace targets {
21 // Shared base class for SPARC v8 (32-bit) and SPARC v9 (64-bit).
22 class LLVM_LIBRARY_VISIBILITY SparcTargetInfo : public TargetInfo {
23  static const TargetInfo::GCCRegAlias GCCRegAliases[];
24  static const char *const GCCRegNames[];
25  bool SoftFloat;
26 
27 public:
28  SparcTargetInfo(const llvm::Triple &Triple, const TargetOptions &)
29  : TargetInfo(Triple), SoftFloat(false) {}
30 
31  int getEHDataRegisterNumber(unsigned RegNo) const override {
32  if (RegNo == 0)
33  return 24;
34  if (RegNo == 1)
35  return 25;
36  return -1;
37  }
38 
39  bool handleTargetFeatures(std::vector<std::string> &Features,
40  DiagnosticsEngine &Diags) override {
41  // Check if software floating point is enabled
42  auto Feature = llvm::find(Features, "+soft-float");
43  if (Feature != Features.end()) {
44  SoftFloat = true;
45  }
46  return true;
47  }
48  void getTargetDefines(const LangOptions &Opts,
49  MacroBuilder &Builder) const override;
50 
51  bool hasFeature(StringRef Feature) const override;
52 
53  bool hasSjLjLowering() const override { return true; }
54 
56  // FIXME: Implement!
57  return None;
58  }
61  }
62  ArrayRef<const char *> getGCCRegNames() const override;
63  ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override;
64  bool validateAsmConstraint(const char *&Name,
65  TargetInfo::ConstraintInfo &info) const override {
66  // FIXME: Implement!
67  switch (*Name) {
68  case 'I': // Signed 13-bit constant
69  case 'J': // Zero
70  case 'K': // 32-bit constant with the low 12 bits clear
71  case 'L': // A constant in the range supported by movcc (11-bit signed imm)
72  case 'M': // A constant in the range supported by movrcc (19-bit signed imm)
73  case 'N': // Same as 'K' but zext (required for SIMode)
74  case 'O': // The constant 4096
75  return true;
76 
77  case 'f':
78  case 'e':
79  info.setAllowsRegister();
80  return true;
81  }
82  return false;
83  }
84  const char *getClobbers() const override {
85  // FIXME: Implement!
86  return "";
87  }
88 
89  // No Sparc V7 for now, the backend doesn't support it anyway.
90  enum CPUKind {
125  CK_LEON4_GR740
126  } CPU = CK_GENERIC;
127 
131  };
132 
133  CPUGeneration getCPUGeneration(CPUKind Kind) const;
134 
135  CPUKind getCPUKind(StringRef Name) const;
136 
137  bool isValidCPUName(StringRef Name) const override {
138  return getCPUKind(Name) != CK_GENERIC;
139  }
140 
141  void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
142 
143  bool setCPU(const std::string &Name) override {
144  CPU = getCPUKind(Name);
145  return CPU != CK_GENERIC;
146  }
147 };
148 
149 // SPARC v8 is the 32-bit mode selected by Triple::sparc.
150 class LLVM_LIBRARY_VISIBILITY SparcV8TargetInfo : public SparcTargetInfo {
151 public:
152  SparcV8TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
153  : SparcTargetInfo(Triple, Opts) {
154  resetDataLayout("E-m:e-p:32:32-i64:64-f128:64-n32-S64");
155  // NetBSD / OpenBSD use long (same as llvm default); everyone else uses int.
156  switch (getTriple().getOS()) {
157  default:
158  SizeType = UnsignedInt;
159  IntPtrType = SignedInt;
160  PtrDiffType = SignedInt;
161  break;
162  case llvm::Triple::NetBSD:
163  case llvm::Triple::OpenBSD:
164  SizeType = UnsignedLong;
165  IntPtrType = SignedLong;
166  PtrDiffType = SignedLong;
167  break;
168  }
169  // Up to 32 bits are lock-free atomic, but we're willing to do atomic ops
170  // on up to 64 bits.
171  MaxAtomicPromoteWidth = 64;
172  MaxAtomicInlineWidth = 32;
173  }
174 
175  void getTargetDefines(const LangOptions &Opts,
176  MacroBuilder &Builder) const override;
177 
178  bool hasSjLjLowering() const override { return true; }
179 };
180 
181 // SPARCV8el is the 32-bit little-endian mode selected by Triple::sparcel.
182 class LLVM_LIBRARY_VISIBILITY SparcV8elTargetInfo : public SparcV8TargetInfo {
183 public:
184  SparcV8elTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
185  : SparcV8TargetInfo(Triple, Opts) {
186  resetDataLayout("e-m:e-p:32:32-i64:64-f128:64-n32-S64");
187  }
188 };
189 
190 // SPARC v9 is the 64-bit mode selected by Triple::sparcv9.
191 class LLVM_LIBRARY_VISIBILITY SparcV9TargetInfo : public SparcTargetInfo {
192 public:
193  SparcV9TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
194  : SparcTargetInfo(Triple, Opts) {
195  // FIXME: Support Sparc quad-precision long double?
196  resetDataLayout("E-m:e-i64:64-n32:64-S128");
197  // This is an LP64 platform.
198  LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
199 
200  // OpenBSD uses long long for int64_t and intmax_t.
201  if (getTriple().isOSOpenBSD())
202  IntMaxType = SignedLongLong;
203  else
204  IntMaxType = SignedLong;
205  Int64Type = IntMaxType;
206 
207  // The SPARCv8 System V ABI has long double 128-bits in size, but 64-bit
208  // aligned. The SPARCv9 SCD 2.4.1 says 16-byte aligned.
209  LongDoubleWidth = 128;
210  LongDoubleAlign = 128;
211  LongDoubleFormat = &llvm::APFloat::IEEEquad();
212  MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
213  }
214 
215  void getTargetDefines(const LangOptions &Opts,
216  MacroBuilder &Builder) const override;
217 
218  bool isValidCPUName(StringRef Name) const override {
219  return getCPUGeneration(SparcTargetInfo::getCPUKind(Name)) == CG_V9;
220  }
221 
222  void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
223 
224  bool setCPU(const std::string &Name) override {
225  if (!SparcTargetInfo::setCPU(Name))
226  return false;
227  return getCPUGeneration(CPU) == CG_V9;
228  }
229 };
230 } // namespace targets
231 } // namespace clang
232 #endif // LLVM_CLANG_LIB_BASIC_TARGETS_SPARC_H
int getEHDataRegisterNumber(unsigned RegNo) const override
Return the register number that __builtin_eh_return_regno would return with the specified argument...
Definition: Sparc.h:31
static bool hasFeature(StringRef Feature, const LangOptions &LangOpts, const TargetInfo &Target)
Determine whether a translation unit built using the current language options has the given feature...
Definition: Module.cpp:106
Options for controlling the target.
Definition: TargetOptions.h:26
bool handleTargetFeatures(std::vector< std::string > &Features, DiagnosticsEngine &Diags) override
Perform initialization based on the user configured set of features (e.g., +sse4).
Definition: Sparc.h:39
Keeps track of the various options that can be enabled, which controls the dialect of C or C++ that i...
Definition: LangOptions.h:49
Concrete class used by the front-end to report problems and issues.
Definition: Diagnostic.h:149
static const char *const GCCRegNames[]
Definition: X86.cpp:43
SparcV8elTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: Sparc.h:184
bool setCPU(const std::string &Name) override
Target the specified CPU.
Definition: Sparc.h:143
typedef void* __builtin_va_list;
Definition: TargetInfo.h:228
Exposes information about the current target.
Definition: TargetInfo.h:161
bool hasSjLjLowering() const override
Controls if __builtin_longjmp / __builtin_setjmp can be lowered to llvm.eh.sjlj.longjmp / llvm...
Definition: Sparc.h:53
#define false
Definition: stdbool.h:17
Kind
bool setCPU(const std::string &Name) override
Target the specified CPU.
Definition: Sparc.h:224
SparcV9TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: Sparc.h:193
Defines the clang::TargetOptions class.
bool isValidCPUName(StringRef Name) const override
brief Determine whether this TargetInfo supports the given CPU name.
Definition: Sparc.h:218
bool hasSjLjLowering() const override
Controls if __builtin_longjmp / __builtin_setjmp can be lowered to llvm.eh.sjlj.longjmp / llvm...
Definition: Sparc.h:178
SparcTargetInfo(const llvm::Triple &Triple, const TargetOptions &)
Definition: Sparc.h:28
Dataflow Directional Tag Classes.
bool isValidCPUName(StringRef Name) const override
brief Determine whether this TargetInfo supports the given CPU name.
Definition: Sparc.h:137
bool validateAsmConstraint(const char *&Name, TargetInfo::ConstraintInfo &info) const override
Definition: Sparc.h:64
BuiltinVaListKind getBuiltinVaListKind() const override
Returns the kind of __builtin_va_list type that should be used with this target.
Definition: Sparc.h:59
BuiltinVaListKind
The different kinds of __builtin_va_list types defined by the target implementation.
Definition: TargetInfo.h:223
ArrayRef< Builtin::Info > getTargetBuiltins() const override
Return information about target-specific builtins for the current primary target, and info about whic...
Definition: Sparc.h:55
const char * getClobbers() const override
Returns a string of target-specific clobbers, in LLVM format.
Definition: Sparc.h:84
Defines the clang::TargetInfo interface.
CPUKind getCPUKind(StringRef Name) const
Definition: Sparc.cpp:123
SparcV8TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
Definition: Sparc.h:152