LCOV - code coverage report
Current view: top level - build-llvm/lib/Target/AArch64 - AArch64GenGlobalISel.inc (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 50 115 43.5 %
Date: 2017-09-14 15:23:50 Functions: 4 37 10.8 %
Legend: Lines: hit not hit

          Line data    Source code
       1             : /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
       2             : |*                                                                            *|
       3             : |* Global Instruction Selector for the AArch64 target                         *|
       4             : |*                                                                            *|
       5             : |* Automatically generated file, do not edit!                                 *|
       6             : |*                                                                            *|
       7             : \*===----------------------------------------------------------------------===*/
       8             : 
       9             : #ifdef GET_GLOBALISEL_PREDICATE_BITSET
      10             : const unsigned MAX_SUBTARGET_PREDICATES = 14;
      11             : using PredicateBitset = llvm::PredicateBitsetImpl<MAX_SUBTARGET_PREDICATES>;
      12             : #endif // ifdef GET_GLOBALISEL_PREDICATE_BITSET
      13             : 
      14             : #ifdef GET_GLOBALISEL_TEMPORARIES_DECL
      15             :   mutable MatcherState State;
      16             :   typedef ComplexRendererFn(AArch64InstructionSelector::*ComplexMatcherMemFn)(MachineOperand &) const;
      17             : const MatcherInfoTy<PredicateBitset, ComplexMatcherMemFn> MatcherInfo;
      18             : #endif // ifdef GET_GLOBALISEL_TEMPORARIES_DECL
      19             : 
      20             : #ifdef GET_GLOBALISEL_TEMPORARIES_INIT
      21             : , State(1),
      22             : MatcherInfo({TypeObjects, FeatureBitsets, ImmPredicateFns, {
      23             :   nullptr, // GICP_Invalid
      24             :   &AArch64InstructionSelector::selectArithImmed, // gi_addsub_shifted_imm32
      25             :   &AArch64InstructionSelector::selectArithImmed, // gi_addsub_shifted_imm64
      26        8498 : }})
      27             : #endif // ifdef GET_GLOBALISEL_TEMPORARIES_INIT
      28             : 
      29             : #ifdef GET_GLOBALISEL_IMPL
      30             : // Bits for subtarget features that participate in instruction matching.
      31             : enum SubtargetFeatureBits : uint8_t {
      32             :   Feature_HasFPARMv8Bit = 2,
      33             :   Feature_HasNEONBit = 3,
      34             :   Feature_HasCryptoBit = 5,
      35             :   Feature_HasCRCBit = 0,
      36             :   Feature_HasLSEBit = 13,
      37             :   Feature_HasRDMBit = 4,
      38             :   Feature_HasPerfMonBit = 6,
      39             :   Feature_HasFullFP16Bit = 1,
      40             :   Feature_HasFuseAESBit = 11,
      41             :   Feature_IsLEBit = 7,
      42             :   Feature_IsBEBit = 12,
      43             :   Feature_UseAlternateSExtLoadCVTF32Bit = 10,
      44             :   Feature_NotForCodeSizeBit = 9,
      45             :   Feature_UseSTRQroBit = 8,
      46             : };
      47             : 
      48        1214 : PredicateBitset AArch64InstructionSelector::
      49             : computeAvailableModuleFeatures(const AArch64Subtarget *Subtarget) const {
      50        1214 :   PredicateBitset Features;
      51        1214 :   if (Subtarget->hasFPARMv8())
      52        2400 :     Features[Feature_HasFPARMv8Bit] = 1;
      53        1214 :   if (Subtarget->hasNEON())
      54        2388 :     Features[Feature_HasNEONBit] = 1;
      55        1214 :   if (Subtarget->hasCrypto())
      56         404 :     Features[Feature_HasCryptoBit] = 1;
      57        1214 :   if (Subtarget->hasCRC())
      58         236 :     Features[Feature_HasCRCBit] = 1;
      59        1214 :   if (Subtarget->hasLSE())
      60          16 :     Features[Feature_HasLSEBit] = 1;
      61        1214 :   if (Subtarget->hasRDM())
      62          38 :     Features[Feature_HasRDMBit] = 1;
      63        1214 :   if (Subtarget->hasPerfMon())
      64        2414 :     Features[Feature_HasPerfMonBit] = 1;
      65        1214 :   if (Subtarget->hasFullFP16())
      66          20 :     Features[Feature_HasFullFP16Bit] = 1;
      67        1214 :   if (Subtarget->hasFuseAES())
      68        2192 :     Features[Feature_HasFuseAESBit] = 1;
      69        1214 :   if (Subtarget->isLittleEndian())
      70        2382 :     Features[Feature_IsLEBit] = 1;
      71        1214 :   if (!Subtarget->isLittleEndian())
      72          46 :     Features[Feature_IsBEBit] = 1;
      73        1214 :   if (Subtarget->useAlternateSExtLoadCVTF32Pattern())
      74         162 :     Features[Feature_UseAlternateSExtLoadCVTF32Bit] = 1;
      75        1214 :   return Features;
      76             : }
      77             : 
      78         231 : PredicateBitset AArch64InstructionSelector::
      79             : computeAvailableFunctionFeatures(const AArch64Subtarget *Subtarget, const MachineFunction *MF) const {
      80         231 :   PredicateBitset Features;
      81         231 :   if (!MF->getFunction()->optForSize())
      82         462 :     Features[Feature_NotForCodeSizeBit] = 1;
      83         231 :   if (!Subtarget->isSTRQroSlow() || MF->getFunction()->optForSize())
      84         462 :     Features[Feature_UseSTRQroBit] = 1;
      85         231 :   return Features;
      86             : }
      87             : 
      88             : // LLT Objects.
      89             : enum {
      90             :   GILLT_s16,
      91             :   GILLT_s32,
      92             :   GILLT_s64,
      93             :   GILLT_s128,
      94             :   GILLT_v2s32,
      95             :   GILLT_v2s64,
      96             :   GILLT_v4s16,
      97             :   GILLT_v4s32,
      98             :   GILLT_v8s8,
      99             :   GILLT_v8s16,
     100             :   GILLT_v16s8,
     101             : };
     102             : const static LLT TypeObjects[] = {
     103             :   LLT::scalar(16),
     104             :   LLT::scalar(32),
     105             :   LLT::scalar(64),
     106             :   LLT::scalar(128),
     107             :   LLT::vector(2, 32),
     108             :   LLT::vector(2, 64),
     109             :   LLT::vector(4, 16),
     110             :   LLT::vector(4, 32),
     111             :   LLT::vector(8, 8),
     112             :   LLT::vector(8, 16),
     113             :   LLT::vector(16, 8),
     114      867672 : };
     115             : 
     116             : // Feature bitsets.
     117             : enum {
     118             :   GIFBS_Invalid,
     119             :   GIFBS_HasCRC,
     120             :   GIFBS_HasCrypto,
     121             :   GIFBS_HasFPARMv8,
     122             :   GIFBS_HasFullFP16,
     123             :   GIFBS_HasNEON,
     124             :   GIFBS_HasRDM,
     125             :   GIFBS_IsBE,
     126             :   GIFBS_IsLE,
     127             :   GIFBS_HasNEON_HasFullFP16,
     128             :   GIFBS_HasNEON_HasRDM,
     129             : };
     130             : const static PredicateBitset FeatureBitsets[] {
     131             :   {}, // GIFBS_Invalid
     132             :   {Feature_HasCRCBit, },
     133             :   {Feature_HasCryptoBit, },
     134             :   {Feature_HasFPARMv8Bit, },
     135             :   {Feature_HasFullFP16Bit, },
     136             :   {Feature_HasNEONBit, },
     137             :   {Feature_HasRDMBit, },
     138             :   {Feature_IsBEBit, },
     139             :   {Feature_IsLEBit, },
     140             :   {Feature_HasNEONBit, Feature_HasFullFP16Bit, },
     141             :   {Feature_HasNEONBit, Feature_HasRDMBit, },
     142       72306 : };
     143             : 
     144             : // ComplexPattern predicates.
     145             : enum {
     146             :   GICP_Invalid,
     147             :   GICP_gi_addsub_shifted_imm32,
     148             :   GICP_gi_addsub_shifted_imm64,
     149             : };
     150             : // See constructor for table contents
     151             : 
     152             : // PatFrag predicates.
     153             : enum {
     154             :   GIPFP_Predicate_VectorIndex1 = GIPFP_Invalid + 1,
     155             :   GIPFP_Predicate_VectorIndexB,
     156             :   GIPFP_Predicate_VectorIndexD,
     157             :   GIPFP_Predicate_VectorIndexH,
     158             :   GIPFP_Predicate_VectorIndexS,
     159             :   GIPFP_Predicate_i64imm_32bit,
     160             :   GIPFP_Predicate_imm0_1,
     161             :   GIPFP_Predicate_imm0_127,
     162             :   GIPFP_Predicate_imm0_15,
     163             :   GIPFP_Predicate_imm0_255,
     164             :   GIPFP_Predicate_imm0_31,
     165             :   GIPFP_Predicate_imm0_63,
     166             :   GIPFP_Predicate_imm0_65535,
     167             :   GIPFP_Predicate_imm0_7,
     168             :   GIPFP_Predicate_imm32_0_15,
     169             :   GIPFP_Predicate_imm32_0_31,
     170             :   GIPFP_Predicate_maski16_or_more,
     171             :   GIPFP_Predicate_maski8_or_more,
     172             :   GIPFP_Predicate_s64imm_32bit,
     173             :   GIPFP_Predicate_simm9,
     174             :   GIPFP_Predicate_tbz_imm0_31_diag,
     175             :   GIPFP_Predicate_tbz_imm0_31_nodiag,
     176             :   GIPFP_Predicate_tbz_imm32_63,
     177             :   GIPFP_Predicate_vecshiftL16,
     178             :   GIPFP_Predicate_vecshiftL32,
     179             :   GIPFP_Predicate_vecshiftL64,
     180             :   GIPFP_Predicate_vecshiftL8,
     181             :   GIPFP_Predicate_vecshiftR16,
     182             :   GIPFP_Predicate_vecshiftR16Narrow,
     183             :   GIPFP_Predicate_vecshiftR32,
     184             :   GIPFP_Predicate_vecshiftR32Narrow,
     185             :   GIPFP_Predicate_vecshiftR64,
     186             :   GIPFP_Predicate_vecshiftR64Narrow,
     187             :   GIPFP_Predicate_vecshiftR8,
     188             : };
     189           0 :   static bool Predicate_VectorIndex1(int64_t Imm) {
     190           0 :   return ((uint64_t)Imm) == 1;
     191             :   }
     192           0 :   static bool Predicate_VectorIndexB(int64_t Imm) {
     193           0 :   return ((uint64_t)Imm) < 16;
     194             :   }
     195           0 :   static bool Predicate_VectorIndexD(int64_t Imm) {
     196           0 :   return ((uint64_t)Imm) < 2;
     197             :   }
     198           0 :   static bool Predicate_VectorIndexH(int64_t Imm) {
     199           0 :   return ((uint64_t)Imm) < 8;
     200             :   }
     201           0 :   static bool Predicate_VectorIndexS(int64_t Imm) {
     202           0 :   return ((uint64_t)Imm) < 4;
     203             :   }
     204           0 :   static bool Predicate_i64imm_32bit(int64_t Imm) {
     205           0 :   return (Imm & 0xffffffffULL) == static_cast<uint64_t>(Imm);
     206             :   }
     207           0 :   static bool Predicate_imm0_1(int64_t Imm) {
     208           0 :   return ((uint64_t)Imm) < 2;
     209             :   }
     210           0 :   static bool Predicate_imm0_127(int64_t Imm) {
     211           0 :   return ((uint32_t)Imm) < 128;
     212             :   }
     213           0 :   static bool Predicate_imm0_15(int64_t Imm) {
     214           0 :   return ((uint64_t)Imm) < 16;
     215             :   }
     216           0 :   static bool Predicate_imm0_255(int64_t Imm) {
     217           0 :   return ((uint32_t)Imm) < 256;
     218             :   }
     219           0 :   static bool Predicate_imm0_31(int64_t Imm) {
     220           0 :   return ((uint64_t)Imm) < 32;
     221             :   }
     222           0 :   static bool Predicate_imm0_63(int64_t Imm) {
     223           0 :   return ((uint64_t)Imm) < 64;
     224             :   }
     225           0 :   static bool Predicate_imm0_65535(int64_t Imm) {
     226           0 :   return ((uint32_t)Imm) < 65536;
     227             :   }
     228           0 :   static bool Predicate_imm0_7(int64_t Imm) {
     229           0 :   return ((uint64_t)Imm) < 8;
     230             :   }
     231           0 :   static bool Predicate_imm32_0_15(int64_t Imm) {
     232           0 :   return ((uint32_t)Imm) < 16;
     233             :   }
     234           0 :   static bool Predicate_imm32_0_31(int64_t Imm) {
     235           0 :   return ((uint64_t)Imm) < 32;
     236             :   }
     237           0 :   static bool Predicate_maski16_or_more(int64_t Imm) { return (Imm & 0xffff) == 0xffff;   }
     238           0 :   static bool Predicate_maski8_or_more(int64_t Imm) { return (Imm & 0xff) == 0xff;   }
     239           0 :   static bool Predicate_s64imm_32bit(int64_t Imm) {
     240           0 :   int64_t Imm64 = static_cast<int64_t>(Imm);
     241           0 :   return Imm64 >= std::numeric_limits<int32_t>::min() &&
     242           0 :          Imm64 <= std::numeric_limits<int32_t>::max();
     243             :   }
     244           0 :   static bool Predicate_simm9(int64_t Imm) { return Imm >= -256 && Imm < 256;   }
     245           0 :   static bool Predicate_tbz_imm0_31_diag(int64_t Imm) {
     246           0 :   return (((uint32_t)Imm) < 32);
     247             :   }
     248           0 :   static bool Predicate_tbz_imm0_31_nodiag(int64_t Imm) {
     249           0 :   return (((uint32_t)Imm) < 32);
     250             :   }
     251           0 :   static bool Predicate_tbz_imm32_63(int64_t Imm) {
     252           0 :   return (((uint32_t)Imm) > 31) && (((uint32_t)Imm) < 64);
     253             :   }
     254           0 :   static bool Predicate_vecshiftL16(int64_t Imm) {
     255           0 :   return (((uint32_t)Imm) < 16);
     256             :   }
     257           0 :   static bool Predicate_vecshiftL32(int64_t Imm) {
     258           0 :   return (((uint32_t)Imm) < 32);
     259             :   }
     260           0 :   static bool Predicate_vecshiftL64(int64_t Imm) {
     261           0 :   return (((uint32_t)Imm) < 64);
     262             :   }
     263           0 :   static bool Predicate_vecshiftL8(int64_t Imm) {
     264           0 :   return (((uint32_t)Imm) < 8);
     265             :   }
     266           0 :   static bool Predicate_vecshiftR16(int64_t Imm) {
     267           0 :   return (((uint32_t)Imm) > 0) && (((uint32_t)Imm) < 17);
     268             :   }
     269           0 :   static bool Predicate_vecshiftR16Narrow(int64_t Imm) {
     270           0 :   return (((uint32_t)Imm) > 0) && (((uint32_t)Imm) < 9);
     271             :   }
     272           0 :   static bool Predicate_vecshiftR32(int64_t Imm) {
     273           0 :   return (((uint32_t)Imm) > 0) && (((uint32_t)Imm) < 33);
     274             :   }
     275           0 :   static bool Predicate_vecshiftR32Narrow(int64_t Imm) {
     276           0 :   return (((uint32_t)Imm) > 0) && (((uint32_t)Imm) < 17);
     277             :   }
     278           1 :   static bool Predicate_vecshiftR64(int64_t Imm) {
     279           1 :   return (((uint32_t)Imm) > 0) && (((uint32_t)Imm) < 65);
     280             :   }
     281           0 :   static bool Predicate_vecshiftR64Narrow(int64_t Imm) {
     282           0 :   return (((uint32_t)Imm) > 0) && (((uint32_t)Imm) < 33);
     283             :   }
     284           0 :   static bool Predicate_vecshiftR8(int64_t Imm) {
     285           0 :   return (((uint32_t)Imm) > 0) && (((uint32_t)Imm) < 9);
     286             :   }
     287             : static InstructionSelector::ImmediatePredicateFn ImmPredicateFns[] = {
     288             :   nullptr,
     289             :   Predicate_VectorIndex1,
     290             :   Predicate_VectorIndexB,
     291             :   Predicate_VectorIndexD,
     292             :   Predicate_VectorIndexH,
     293             :   Predicate_VectorIndexS,
     294             :   Predicate_i64imm_32bit,
     295             :   Predicate_imm0_1,
     296             :   Predicate_imm0_127,
     297             :   Predicate_imm0_15,
     298             :   Predicate_imm0_255,
     299             :   Predicate_imm0_31,
     300             :   Predicate_imm0_63,
     301             :   Predicate_imm0_65535,
     302             :   Predicate_imm0_7,
     303             :   Predicate_imm32_0_15,
     304             :   Predicate_imm32_0_31,
     305             :   Predicate_maski16_or_more,
     306             :   Predicate_maski8_or_more,
     307             :   Predicate_s64imm_32bit,
     308             :   Predicate_simm9,
     309             :   Predicate_tbz_imm0_31_diag,
     310             :   Predicate_tbz_imm0_31_nodiag,
     311             :   Predicate_tbz_imm32_63,
     312             :   Predicate_vecshiftL16,
     313             :   Predicate_vecshiftL32,
     314             :   Predicate_vecshiftL64,
     315             :   Predicate_vecshiftL8,
     316             :   Predicate_vecshiftR16,
     317             :   Predicate_vecshiftR16Narrow,
     318             :   Predicate_vecshiftR32,
     319             :   Predicate_vecshiftR32Narrow,
     320             :   Predicate_vecshiftR64,
     321             :   Predicate_vecshiftR64Narrow,
     322             :   Predicate_vecshiftR8,
     323             : };
     324         231 : bool AArch64InstructionSelector::selectImpl(MachineInstr &I) const {
     325         231 :   MachineFunction &MF = *I.getParent()->getParent();
     326         231 :   MachineRegisterInfo &MRI = MF.getRegInfo();
     327             :   // FIXME: This should be computed on a per-function basis rather than per-insn.
     328         231 :   AvailableFunctionFeatures = computeAvailableFunctionFeatures(&STI, &MF);
     329         231 :   const PredicateBitset AvailableFeatures = getAvailableFeatures();
     330         462 :   NewMIVector OutMIs;
     331         462 :   State.MIs.clear();
     332         231 :   State.MIs.push_back(&I);
     333             : 
     334             :   constexpr static int64_t MatchTable0[] = {
     335             :     GIM_Try, /*On fail goto*//*Label 0*/ 108,
     336             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/6,
     337             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
     338             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
     339             :       GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/5, // MIs[2]
     340             :       GIM_CheckNumOperands, /*MI*/2, /*Expected*/2,
     341             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
     342             :       // MIs[0] dst
     343             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
     344             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
     345             :       // MIs[0] Operand 1
     346             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcopy_lane,
     347             :       // MIs[0] Vd
     348             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
     349             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
     350             :       // MIs[0] idx
     351             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
     352             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
     353             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_VectorIndexB,
     354             :       // MIs[1] Operand 0
     355             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s64,
     356             :       // MIs[1] Operand 1
     357             :       // No operand predicates
     358             :       // MIs[0] Vs
     359             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v16s8,
     360             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/AArch64::FPR128RegClassID,
     361             :       // MIs[0] idx2
     362             :       GIM_CheckType, /*MI*/0, /*Op*/5, /*Type*/GILLT_s64,
     363             :       GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_CONSTANT,
     364             :       GIM_CheckImmPredicate, /*MI*/2, /*Predicate*/GIPFP_Predicate_VectorIndexB,
     365             :       // MIs[2] Operand 0
     366             :       GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_s64,
     367             :       // MIs[2] Operand 1
     368             :       // No operand predicates
     369             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
     370             :       GIM_CheckIsSafeToFold, /*InsnID*/2,
     371             :       // (intrinsic_wo_chain:v16i8 344:iPTR, V128:v16i8:$Vd, (imm:i64)<<P:Predicate_VectorIndexB>>:$idx, V128:v16i8:$Vs, (imm:i64)<<P:Predicate_VectorIndexB>>:$idx2)  =>  (INSvi8lane:v16i8 V128:v16i8:$Vd, (imm:i64)<<P:Predicate_VectorIndexB>>:$idx, V128:v16i8:$Vs, (imm:i64)<<P:Predicate_VectorIndexB>>:$idx2)
     372             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::INSvi8lane,
     373             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
     374             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Vd
     375             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
     376             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // Vs
     377             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx2
     378             :       GIR_EraseFromParent, /*InsnID*/0,
     379             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     380             :       GIR_Done,
     381             :     // Label 0: @108
     382             :     GIM_Try, /*On fail goto*//*Label 1*/ 216,
     383             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/6,
     384             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
     385             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
     386             :       GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/5, // MIs[2]
     387             :       GIM_CheckNumOperands, /*MI*/2, /*Expected*/2,
     388             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
     389             :       // MIs[0] dst
     390             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
     391             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
     392             :       // MIs[0] Operand 1
     393             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcopy_lane,
     394             :       // MIs[0] Vd
     395             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
     396             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
     397             :       // MIs[0] idx
     398             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
     399             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
     400             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_VectorIndexH,
     401             :       // MIs[1] Operand 0
     402             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s64,
     403             :       // MIs[1] Operand 1
     404             :       // No operand predicates
     405             :       // MIs[0] Vs
     406             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v8s16,
     407             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/AArch64::FPR128RegClassID,
     408             :       // MIs[0] idx2
     409             :       GIM_CheckType, /*MI*/0, /*Op*/5, /*Type*/GILLT_s64,
     410             :       GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_CONSTANT,
     411             :       GIM_CheckImmPredicate, /*MI*/2, /*Predicate*/GIPFP_Predicate_VectorIndexH,
     412             :       // MIs[2] Operand 0
     413             :       GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_s64,
     414             :       // MIs[2] Operand 1
     415             :       // No operand predicates
     416             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
     417             :       GIM_CheckIsSafeToFold, /*InsnID*/2,
     418             :       // (intrinsic_wo_chain:v8i16 344:iPTR, V128:v8i16:$Vd, (imm:i64)<<P:Predicate_VectorIndexH>>:$idx, V128:v8i16:$Vs, (imm:i64)<<P:Predicate_VectorIndexH>>:$idx2)  =>  (INSvi16lane:v8i16 V128:v8i16:$Vd, (imm:i64)<<P:Predicate_VectorIndexH>>:$idx, V128:v8i16:$Vs, (imm:i64)<<P:Predicate_VectorIndexH>>:$idx2)
     419             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::INSvi16lane,
     420             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
     421             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Vd
     422             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
     423             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // Vs
     424             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx2
     425             :       GIR_EraseFromParent, /*InsnID*/0,
     426             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     427             :       GIR_Done,
     428             :     // Label 1: @216
     429             :     GIM_Try, /*On fail goto*//*Label 2*/ 324,
     430             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/6,
     431             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
     432             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
     433             :       GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/5, // MIs[2]
     434             :       GIM_CheckNumOperands, /*MI*/2, /*Expected*/2,
     435             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
     436             :       // MIs[0] dst
     437             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
     438             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
     439             :       // MIs[0] Operand 1
     440             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcopy_lane,
     441             :       // MIs[0] Vd
     442             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
     443             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
     444             :       // MIs[0] idx
     445             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
     446             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
     447             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_VectorIndexS,
     448             :       // MIs[1] Operand 0
     449             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s64,
     450             :       // MIs[1] Operand 1
     451             :       // No operand predicates
     452             :       // MIs[0] Vs
     453             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32,
     454             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/AArch64::FPR128RegClassID,
     455             :       // MIs[0] idx2
     456             :       GIM_CheckType, /*MI*/0, /*Op*/5, /*Type*/GILLT_s64,
     457             :       GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_CONSTANT,
     458             :       GIM_CheckImmPredicate, /*MI*/2, /*Predicate*/GIPFP_Predicate_VectorIndexS,
     459             :       // MIs[2] Operand 0
     460             :       GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_s64,
     461             :       // MIs[2] Operand 1
     462             :       // No operand predicates
     463             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
     464             :       GIM_CheckIsSafeToFold, /*InsnID*/2,
     465             :       // (intrinsic_wo_chain:v4i32 344:iPTR, V128:v4i32:$Vd, (imm:i64)<<P:Predicate_VectorIndexS>>:$idx, V128:v4i32:$Vs, (imm:i64)<<P:Predicate_VectorIndexS>>:$idx2)  =>  (INSvi32lane:v4i32 V128:v4i32:$Vd, (imm:i64)<<P:Predicate_VectorIndexS>>:$idx, V128:v4i32:$Vs, (imm:i64)<<P:Predicate_VectorIndexS>>:$idx2)
     466             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::INSvi32lane,
     467             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
     468             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Vd
     469             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
     470             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // Vs
     471             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx2
     472             :       GIR_EraseFromParent, /*InsnID*/0,
     473             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     474             :       GIR_Done,
     475             :     // Label 2: @324
     476             :     GIM_Try, /*On fail goto*//*Label 3*/ 432,
     477             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/6,
     478             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
     479             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
     480             :       GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/5, // MIs[2]
     481             :       GIM_CheckNumOperands, /*MI*/2, /*Expected*/2,
     482             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
     483             :       // MIs[0] dst
     484             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
     485             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
     486             :       // MIs[0] Operand 1
     487             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcopy_lane,
     488             :       // MIs[0] Vd
     489             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
     490             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
     491             :       // MIs[0] idx
     492             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
     493             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
     494             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_VectorIndexD,
     495             :       // MIs[1] Operand 0
     496             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s64,
     497             :       // MIs[1] Operand 1
     498             :       // No operand predicates
     499             :       // MIs[0] Vs
     500             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v2s64,
     501             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/AArch64::FPR128RegClassID,
     502             :       // MIs[0] idx2
     503             :       GIM_CheckType, /*MI*/0, /*Op*/5, /*Type*/GILLT_s64,
     504             :       GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_CONSTANT,
     505             :       GIM_CheckImmPredicate, /*MI*/2, /*Predicate*/GIPFP_Predicate_VectorIndexD,
     506             :       // MIs[2] Operand 0
     507             :       GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_s64,
     508             :       // MIs[2] Operand 1
     509             :       // No operand predicates
     510             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
     511             :       GIM_CheckIsSafeToFold, /*InsnID*/2,
     512             :       // (intrinsic_wo_chain:v2i64 344:iPTR, V128:v2i64:$Vd, (imm:i64)<<P:Predicate_VectorIndexD>>:$idx, V128:v2i64:$Vs, (imm:i64)<<P:Predicate_VectorIndexD>>:$idx2)  =>  (INSvi64lane:v2i64 V128:v2i64:$Vd, (imm:i64)<<P:Predicate_VectorIndexD>>:$idx, V128:v2i64:$Vs, (imm:i64)<<P:Predicate_VectorIndexD>>:$idx2)
     513             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::INSvi64lane,
     514             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
     515             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Vd
     516             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
     517             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // Vs
     518             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx2
     519             :       GIR_EraseFromParent, /*InsnID*/0,
     520             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     521             :       GIR_Done,
     522             :     // Label 3: @432
     523             :     GIM_Try, /*On fail goto*//*Label 4*/ 516,
     524             :       GIM_CheckFeatures, GIFBS_HasNEON,
     525             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
     526             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
     527             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
     528             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
     529             :       // MIs[0] dst
     530             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
     531             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
     532             :       // MIs[0] Operand 1
     533             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vsli,
     534             :       // MIs[0] Rd
     535             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
     536             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
     537             :       // MIs[0] Rn
     538             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
     539             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
     540             :       // MIs[0] imm
     541             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s32,
     542             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
     543             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftL8,
     544             :       // MIs[1] Operand 0
     545             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
     546             :       // MIs[1] Operand 1
     547             :       // No operand predicates
     548             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
     549             :       // (intrinsic_wo_chain:v8i8 351:iPTR, V64:v8i8:$Rd, V64:v8i8:$Rn, (imm:i32)<<P:Predicate_vecshiftL8>>:$imm)  =>  (SLIv8i8_shift:v8i8 V64:v8i8:$Rd, V64:v8i8:$Rn, (imm:i32):$imm)
     550             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SLIv8i8_shift,
     551             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
     552             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
     553             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
     554             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
     555             :       GIR_EraseFromParent, /*InsnID*/0,
     556             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     557             :       GIR_Done,
     558             :     // Label 4: @516
     559             :     GIM_Try, /*On fail goto*//*Label 5*/ 600,
     560             :       GIM_CheckFeatures, GIFBS_HasNEON,
     561             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
     562             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
     563             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
     564             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
     565             :       // MIs[0] dst
     566             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
     567             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
     568             :       // MIs[0] Operand 1
     569             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vsli,
     570             :       // MIs[0] Rd
     571             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
     572             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
     573             :       // MIs[0] Rn
     574             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
     575             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
     576             :       // MIs[0] imm
     577             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s32,
     578             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
     579             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftL8,
     580             :       // MIs[1] Operand 0
     581             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
     582             :       // MIs[1] Operand 1
     583             :       // No operand predicates
     584             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
     585             :       // (intrinsic_wo_chain:v16i8 351:iPTR, V128:v16i8:$Rd, V128:v16i8:$Rn, (imm:i32)<<P:Predicate_vecshiftL8>>:$imm)  =>  (SLIv16i8_shift:v16i8 V128:v16i8:$Rd, V128:v16i8:$Rn, (imm:i32):$imm)
     586             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SLIv16i8_shift,
     587             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
     588             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
     589             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
     590             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
     591             :       GIR_EraseFromParent, /*InsnID*/0,
     592             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     593             :       GIR_Done,
     594             :     // Label 5: @600
     595             :     GIM_Try, /*On fail goto*//*Label 6*/ 684,
     596             :       GIM_CheckFeatures, GIFBS_HasNEON,
     597             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
     598             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
     599             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
     600             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
     601             :       // MIs[0] dst
     602             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
     603             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
     604             :       // MIs[0] Operand 1
     605             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vsli,
     606             :       // MIs[0] Rd
     607             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
     608             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
     609             :       // MIs[0] Rn
     610             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
     611             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
     612             :       // MIs[0] imm
     613             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s32,
     614             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
     615             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftL16,
     616             :       // MIs[1] Operand 0
     617             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
     618             :       // MIs[1] Operand 1
     619             :       // No operand predicates
     620             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
     621             :       // (intrinsic_wo_chain:v4i16 351:iPTR, V64:v4i16:$Rd, V64:v4i16:$Rn, (imm:i32)<<P:Predicate_vecshiftL16>>:$imm)  =>  (SLIv4i16_shift:v4i16 V64:v4i16:$Rd, V64:v4i16:$Rn, (imm:i32):$imm)
     622             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SLIv4i16_shift,
     623             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
     624             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
     625             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
     626             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
     627             :       GIR_EraseFromParent, /*InsnID*/0,
     628             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     629             :       GIR_Done,
     630             :     // Label 6: @684
     631             :     GIM_Try, /*On fail goto*//*Label 7*/ 768,
     632             :       GIM_CheckFeatures, GIFBS_HasNEON,
     633             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
     634             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
     635             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
     636             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
     637             :       // MIs[0] dst
     638             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
     639             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
     640             :       // MIs[0] Operand 1
     641             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vsli,
     642             :       // MIs[0] Rd
     643             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
     644             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
     645             :       // MIs[0] Rn
     646             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
     647             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
     648             :       // MIs[0] imm
     649             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s32,
     650             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
     651             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftL16,
     652             :       // MIs[1] Operand 0
     653             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
     654             :       // MIs[1] Operand 1
     655             :       // No operand predicates
     656             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
     657             :       // (intrinsic_wo_chain:v8i16 351:iPTR, V128:v8i16:$Rd, V128:v8i16:$Rn, (imm:i32)<<P:Predicate_vecshiftL16>>:$imm)  =>  (SLIv8i16_shift:v8i16 V128:v8i16:$Rd, V128:v8i16:$Rn, (imm:i32):$imm)
     658             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SLIv8i16_shift,
     659             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
     660             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
     661             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
     662             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
     663             :       GIR_EraseFromParent, /*InsnID*/0,
     664             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     665             :       GIR_Done,
     666             :     // Label 7: @768
     667             :     GIM_Try, /*On fail goto*//*Label 8*/ 852,
     668             :       GIM_CheckFeatures, GIFBS_HasNEON,
     669             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
     670             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
     671             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
     672             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
     673             :       // MIs[0] dst
     674             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
     675             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
     676             :       // MIs[0] Operand 1
     677             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vsli,
     678             :       // MIs[0] Rd
     679             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
     680             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
     681             :       // MIs[0] Rn
     682             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
     683             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
     684             :       // MIs[0] imm
     685             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s32,
     686             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
     687             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftL32,
     688             :       // MIs[1] Operand 0
     689             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
     690             :       // MIs[1] Operand 1
     691             :       // No operand predicates
     692             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
     693             :       // (intrinsic_wo_chain:v2i32 351:iPTR, V64:v2i32:$Rd, V64:v2i32:$Rn, (imm:i32)<<P:Predicate_vecshiftL32>>:$imm)  =>  (SLIv2i32_shift:v2i32 V64:v2i32:$Rd, V64:v2i32:$Rn, (imm:i32):$imm)
     694             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SLIv2i32_shift,
     695             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
     696             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
     697             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
     698             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
     699             :       GIR_EraseFromParent, /*InsnID*/0,
     700             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     701             :       GIR_Done,
     702             :     // Label 8: @852
     703             :     GIM_Try, /*On fail goto*//*Label 9*/ 936,
     704             :       GIM_CheckFeatures, GIFBS_HasNEON,
     705             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
     706             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
     707             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
     708             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
     709             :       // MIs[0] dst
     710             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
     711             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
     712             :       // MIs[0] Operand 1
     713             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vsli,
     714             :       // MIs[0] Rd
     715             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
     716             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
     717             :       // MIs[0] Rn
     718             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
     719             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
     720             :       // MIs[0] imm
     721             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s32,
     722             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
     723             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftL32,
     724             :       // MIs[1] Operand 0
     725             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
     726             :       // MIs[1] Operand 1
     727             :       // No operand predicates
     728             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
     729             :       // (intrinsic_wo_chain:v4i32 351:iPTR, V128:v4i32:$Rd, V128:v4i32:$Rn, (imm:i32)<<P:Predicate_vecshiftL32>>:$imm)  =>  (SLIv4i32_shift:v4i32 V128:v4i32:$Rd, V128:v4i32:$Rn, (imm:i32):$imm)
     730             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SLIv4i32_shift,
     731             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
     732             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
     733             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
     734             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
     735             :       GIR_EraseFromParent, /*InsnID*/0,
     736             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     737             :       GIR_Done,
     738             :     // Label 9: @936
     739             :     GIM_Try, /*On fail goto*//*Label 10*/ 1020,
     740             :       GIM_CheckFeatures, GIFBS_HasNEON,
     741             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
     742             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
     743             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
     744             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
     745             :       // MIs[0] dst
     746             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
     747             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
     748             :       // MIs[0] Operand 1
     749             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vsli,
     750             :       // MIs[0] Rd
     751             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
     752             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
     753             :       // MIs[0] Rn
     754             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
     755             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
     756             :       // MIs[0] imm
     757             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s32,
     758             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
     759             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftL64,
     760             :       // MIs[1] Operand 0
     761             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
     762             :       // MIs[1] Operand 1
     763             :       // No operand predicates
     764             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
     765             :       // (intrinsic_wo_chain:v2i64 351:iPTR, V128:v2i64:$Rd, V128:v2i64:$Rn, (imm:i32)<<P:Predicate_vecshiftL64>>:$imm)  =>  (SLIv2i64_shift:v2i64 V128:v2i64:$Rd, V128:v2i64:$Rn, (imm:i32):$imm)
     766             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SLIv2i64_shift,
     767             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
     768             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
     769             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
     770             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
     771             :       GIR_EraseFromParent, /*InsnID*/0,
     772             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     773             :       GIR_Done,
     774             :     // Label 10: @1020
     775             :     GIM_Try, /*On fail goto*//*Label 11*/ 1104,
     776             :       GIM_CheckFeatures, GIFBS_HasNEON,
     777             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
     778             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
     779             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
     780             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
     781             :       // MIs[0] dst
     782             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
     783             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
     784             :       // MIs[0] Operand 1
     785             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vsri,
     786             :       // MIs[0] Rd
     787             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
     788             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
     789             :       // MIs[0] Rn
     790             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
     791             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
     792             :       // MIs[0] imm
     793             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s32,
     794             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
     795             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR8,
     796             :       // MIs[1] Operand 0
     797             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
     798             :       // MIs[1] Operand 1
     799             :       // No operand predicates
     800             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
     801             :       // (intrinsic_wo_chain:v8i8 352:iPTR, V64:v8i8:$Rd, V64:v8i8:$Rn, (imm:i32)<<P:Predicate_vecshiftR8>>:$imm)  =>  (SRIv8i8_shift:v8i8 V64:v8i8:$Rd, V64:v8i8:$Rn, (imm:i32):$imm)
     802             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRIv8i8_shift,
     803             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
     804             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
     805             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
     806             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
     807             :       GIR_EraseFromParent, /*InsnID*/0,
     808             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     809             :       GIR_Done,
     810             :     // Label 11: @1104
     811             :     GIM_Try, /*On fail goto*//*Label 12*/ 1188,
     812             :       GIM_CheckFeatures, GIFBS_HasNEON,
     813             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
     814             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
     815             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
     816             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
     817             :       // MIs[0] dst
     818             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
     819             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
     820             :       // MIs[0] Operand 1
     821             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vsri,
     822             :       // MIs[0] Rd
     823             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
     824             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
     825             :       // MIs[0] Rn
     826             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
     827             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
     828             :       // MIs[0] imm
     829             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s32,
     830             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
     831             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR8,
     832             :       // MIs[1] Operand 0
     833             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
     834             :       // MIs[1] Operand 1
     835             :       // No operand predicates
     836             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
     837             :       // (intrinsic_wo_chain:v16i8 352:iPTR, V128:v16i8:$Rd, V128:v16i8:$Rn, (imm:i32)<<P:Predicate_vecshiftR8>>:$imm)  =>  (SRIv16i8_shift:v16i8 V128:v16i8:$Rd, V128:v16i8:$Rn, (imm:i32):$imm)
     838             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRIv16i8_shift,
     839             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
     840             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
     841             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
     842             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
     843             :       GIR_EraseFromParent, /*InsnID*/0,
     844             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     845             :       GIR_Done,
     846             :     // Label 12: @1188
     847             :     GIM_Try, /*On fail goto*//*Label 13*/ 1272,
     848             :       GIM_CheckFeatures, GIFBS_HasNEON,
     849             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
     850             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
     851             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
     852             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
     853             :       // MIs[0] dst
     854             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
     855             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
     856             :       // MIs[0] Operand 1
     857             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vsri,
     858             :       // MIs[0] Rd
     859             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
     860             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
     861             :       // MIs[0] Rn
     862             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
     863             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
     864             :       // MIs[0] imm
     865             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s32,
     866             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
     867             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR16,
     868             :       // MIs[1] Operand 0
     869             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
     870             :       // MIs[1] Operand 1
     871             :       // No operand predicates
     872             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
     873             :       // (intrinsic_wo_chain:v4i16 352:iPTR, V64:v4i16:$Rd, V64:v4i16:$Rn, (imm:i32)<<P:Predicate_vecshiftR16>>:$imm)  =>  (SRIv4i16_shift:v4i16 V64:v4i16:$Rd, V64:v4i16:$Rn, (imm:i32):$imm)
     874             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRIv4i16_shift,
     875             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
     876             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
     877             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
     878             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
     879             :       GIR_EraseFromParent, /*InsnID*/0,
     880             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     881             :       GIR_Done,
     882             :     // Label 13: @1272
     883             :     GIM_Try, /*On fail goto*//*Label 14*/ 1356,
     884             :       GIM_CheckFeatures, GIFBS_HasNEON,
     885             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
     886             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
     887             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
     888             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
     889             :       // MIs[0] dst
     890             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
     891             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
     892             :       // MIs[0] Operand 1
     893             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vsri,
     894             :       // MIs[0] Rd
     895             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
     896             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
     897             :       // MIs[0] Rn
     898             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
     899             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
     900             :       // MIs[0] imm
     901             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s32,
     902             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
     903             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR16,
     904             :       // MIs[1] Operand 0
     905             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
     906             :       // MIs[1] Operand 1
     907             :       // No operand predicates
     908             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
     909             :       // (intrinsic_wo_chain:v8i16 352:iPTR, V128:v8i16:$Rd, V128:v8i16:$Rn, (imm:i32)<<P:Predicate_vecshiftR16>>:$imm)  =>  (SRIv8i16_shift:v8i16 V128:v8i16:$Rd, V128:v8i16:$Rn, (imm:i32):$imm)
     910             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRIv8i16_shift,
     911             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
     912             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
     913             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
     914             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
     915             :       GIR_EraseFromParent, /*InsnID*/0,
     916             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     917             :       GIR_Done,
     918             :     // Label 14: @1356
     919             :     GIM_Try, /*On fail goto*//*Label 15*/ 1440,
     920             :       GIM_CheckFeatures, GIFBS_HasNEON,
     921             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
     922             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
     923             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
     924             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
     925             :       // MIs[0] dst
     926             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
     927             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
     928             :       // MIs[0] Operand 1
     929             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vsri,
     930             :       // MIs[0] Rd
     931             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
     932             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
     933             :       // MIs[0] Rn
     934             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
     935             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
     936             :       // MIs[0] imm
     937             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s32,
     938             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
     939             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR32,
     940             :       // MIs[1] Operand 0
     941             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
     942             :       // MIs[1] Operand 1
     943             :       // No operand predicates
     944             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
     945             :       // (intrinsic_wo_chain:v2i32 352:iPTR, V64:v2i32:$Rd, V64:v2i32:$Rn, (imm:i32)<<P:Predicate_vecshiftR32>>:$imm)  =>  (SRIv2i32_shift:v2i32 V64:v2i32:$Rd, V64:v2i32:$Rn, (imm:i32):$imm)
     946             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRIv2i32_shift,
     947             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
     948             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
     949             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
     950             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
     951             :       GIR_EraseFromParent, /*InsnID*/0,
     952             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     953             :       GIR_Done,
     954             :     // Label 15: @1440
     955             :     GIM_Try, /*On fail goto*//*Label 16*/ 1524,
     956             :       GIM_CheckFeatures, GIFBS_HasNEON,
     957             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
     958             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
     959             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
     960             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
     961             :       // MIs[0] dst
     962             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
     963             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
     964             :       // MIs[0] Operand 1
     965             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vsri,
     966             :       // MIs[0] Rd
     967             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
     968             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
     969             :       // MIs[0] Rn
     970             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
     971             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
     972             :       // MIs[0] imm
     973             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s32,
     974             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
     975             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR32,
     976             :       // MIs[1] Operand 0
     977             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
     978             :       // MIs[1] Operand 1
     979             :       // No operand predicates
     980             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
     981             :       // (intrinsic_wo_chain:v4i32 352:iPTR, V128:v4i32:$Rd, V128:v4i32:$Rn, (imm:i32)<<P:Predicate_vecshiftR32>>:$imm)  =>  (SRIv4i32_shift:v4i32 V128:v4i32:$Rd, V128:v4i32:$Rn, (imm:i32):$imm)
     982             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRIv4i32_shift,
     983             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
     984             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
     985             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
     986             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
     987             :       GIR_EraseFromParent, /*InsnID*/0,
     988             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     989             :       GIR_Done,
     990             :     // Label 16: @1524
     991             :     GIM_Try, /*On fail goto*//*Label 17*/ 1608,
     992             :       GIM_CheckFeatures, GIFBS_HasNEON,
     993             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
     994             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
     995             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
     996             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
     997             :       // MIs[0] dst
     998             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
     999             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    1000             :       // MIs[0] Operand 1
    1001             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vsri,
    1002             :       // MIs[0] Rd
    1003             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    1004             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1005             :       // MIs[0] Rn
    1006             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    1007             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    1008             :       // MIs[0] imm
    1009             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s32,
    1010             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    1011             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR64,
    1012             :       // MIs[1] Operand 0
    1013             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    1014             :       // MIs[1] Operand 1
    1015             :       // No operand predicates
    1016             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    1017             :       // (intrinsic_wo_chain:v2i64 352:iPTR, V128:v2i64:$Rd, V128:v2i64:$Rn, (imm:i32)<<P:Predicate_vecshiftR64>>:$imm)  =>  (SRIv2i64_shift:v2i64 V128:v2i64:$Rd, V128:v2i64:$Rn, (imm:i32):$imm)
    1018             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRIv2i64_shift,
    1019             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1020             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1021             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
    1022             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    1023             :       GIR_EraseFromParent, /*InsnID*/0,
    1024             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1025             :       GIR_Done,
    1026             :     // Label 17: @1608
    1027             :     GIM_Try, /*On fail goto*//*Label 18*/ 1690,
    1028             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1029             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
    1030             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    1031             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1032             :       // MIs[0] dst
    1033             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    1034             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    1035             :       // MIs[0] Operand 1
    1036             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vsli,
    1037             :       // MIs[0] Rd
    1038             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    1039             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1040             :       // MIs[0] Rn
    1041             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
    1042             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1043             :       // MIs[0] imm
    1044             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s32,
    1045             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    1046             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftL64,
    1047             :       // MIs[1] Operand 0
    1048             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    1049             :       // MIs[1] Operand 1
    1050             :       // No operand predicates
    1051             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    1052             :       // (intrinsic_wo_chain:v1i64 351:iPTR, FPR64:v1i64:$Rd, FPR64:v1i64:$Rn, (imm:i32)<<P:Predicate_vecshiftL64>>:$imm)  =>  (SLId:v1i64 FPR64:v1i64:$Rd, FPR64:v1i64:$Rn, (imm:i32)<<P:Predicate_vecshiftL64>>:$imm)
    1053             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SLId,
    1054             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1055             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1056             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
    1057             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    1058             :       GIR_EraseFromParent, /*InsnID*/0,
    1059             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1060             :       GIR_Done,
    1061             :     // Label 18: @1690
    1062             :     GIM_Try, /*On fail goto*//*Label 19*/ 1772,
    1063             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1064             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
    1065             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    1066             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1067             :       // MIs[0] dst
    1068             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    1069             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    1070             :       // MIs[0] Operand 1
    1071             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vsri,
    1072             :       // MIs[0] Rd
    1073             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    1074             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1075             :       // MIs[0] Rn
    1076             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
    1077             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1078             :       // MIs[0] imm
    1079             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s32,
    1080             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    1081             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR64,
    1082             :       // MIs[1] Operand 0
    1083             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    1084             :       // MIs[1] Operand 1
    1085             :       // No operand predicates
    1086             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    1087             :       // (intrinsic_wo_chain:v1i64 352:iPTR, FPR64:v1i64:$Rd, FPR64:v1i64:$Rn, (imm:i32)<<P:Predicate_vecshiftR64>>:$imm)  =>  (SRId:v1i64 FPR64:v1i64:$Rd, FPR64:v1i64:$Rn, (imm:i32)<<P:Predicate_vecshiftR64>>:$imm)
    1088             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRId,
    1089             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1090             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1091             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
    1092             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    1093             :       GIR_EraseFromParent, /*InsnID*/0,
    1094             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1095             :       GIR_Done,
    1096             :     // Label 19: @1772
    1097             :     GIM_Try, /*On fail goto*//*Label 20*/ 1842,
    1098             :       GIM_CheckFeatures, GIFBS_HasCrypto,
    1099             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1100             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1101             :       // MIs[0] dst
    1102             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    1103             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    1104             :       // MIs[0] Operand 1
    1105             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_crypto_sha1c,
    1106             :       // MIs[0] Rd
    1107             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    1108             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1109             :       // MIs[0] Rn
    1110             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    1111             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR32RegClassID,
    1112             :       // MIs[0] Rm
    1113             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32,
    1114             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/AArch64::FPR128RegClassID,
    1115             :       // (intrinsic_wo_chain:v4i32 185:iPTR, FPR128:v4i32:$Rd, FPR32:i32:$Rn, V128:v4i32:$Rm)  =>  (SHA1Crrr:v4i32 FPR128:v4i32:$Rd, FPR32:i32:$Rn, V128:v4i32:$Rm)
    1116             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SHA1Crrr,
    1117             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1118             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1119             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
    1120             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // Rm
    1121             :       GIR_EraseFromParent, /*InsnID*/0,
    1122             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1123             :       GIR_Done,
    1124             :     // Label 20: @1842
    1125             :     GIM_Try, /*On fail goto*//*Label 21*/ 1912,
    1126             :       GIM_CheckFeatures, GIFBS_HasCrypto,
    1127             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1128             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1129             :       // MIs[0] dst
    1130             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    1131             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    1132             :       // MIs[0] Operand 1
    1133             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_crypto_sha1p,
    1134             :       // MIs[0] Rd
    1135             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    1136             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1137             :       // MIs[0] Rn
    1138             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    1139             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR32RegClassID,
    1140             :       // MIs[0] Rm
    1141             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32,
    1142             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/AArch64::FPR128RegClassID,
    1143             :       // (intrinsic_wo_chain:v4i32 188:iPTR, FPR128:v4i32:$Rd, FPR32:i32:$Rn, V128:v4i32:$Rm)  =>  (SHA1Prrr:v4i32 FPR128:v4i32:$Rd, FPR32:i32:$Rn, V128:v4i32:$Rm)
    1144             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SHA1Prrr,
    1145             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1146             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1147             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
    1148             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // Rm
    1149             :       GIR_EraseFromParent, /*InsnID*/0,
    1150             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1151             :       GIR_Done,
    1152             :     // Label 21: @1912
    1153             :     GIM_Try, /*On fail goto*//*Label 22*/ 1982,
    1154             :       GIM_CheckFeatures, GIFBS_HasCrypto,
    1155             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1156             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1157             :       // MIs[0] dst
    1158             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    1159             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    1160             :       // MIs[0] Operand 1
    1161             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_crypto_sha1m,
    1162             :       // MIs[0] Rd
    1163             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    1164             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1165             :       // MIs[0] Rn
    1166             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    1167             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR32RegClassID,
    1168             :       // MIs[0] Rm
    1169             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32,
    1170             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/AArch64::FPR128RegClassID,
    1171             :       // (intrinsic_wo_chain:v4i32 187:iPTR, FPR128:v4i32:$Rd, FPR32:i32:$Rn, V128:v4i32:$Rm)  =>  (SHA1Mrrr:v4i32 FPR128:v4i32:$Rd, FPR32:i32:$Rn, V128:v4i32:$Rm)
    1172             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SHA1Mrrr,
    1173             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1174             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1175             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
    1176             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // Rm
    1177             :       GIR_EraseFromParent, /*InsnID*/0,
    1178             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1179             :       GIR_Done,
    1180             :     // Label 22: @1982
    1181             :     GIM_Try, /*On fail goto*//*Label 23*/ 2052,
    1182             :       GIM_CheckFeatures, GIFBS_HasCrypto,
    1183             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1184             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1185             :       // MIs[0] dst
    1186             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    1187             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    1188             :       // MIs[0] Operand 1
    1189             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_crypto_sha1su0,
    1190             :       // MIs[0] Rd
    1191             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    1192             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1193             :       // MIs[0] Rn
    1194             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    1195             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    1196             :       // MIs[0] Rm
    1197             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32,
    1198             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/AArch64::FPR128RegClassID,
    1199             :       // (intrinsic_wo_chain:v4i32 189:iPTR, V128:v4i32:$Rd, V128:v4i32:$Rn, V128:v4i32:$Rm)  =>  (SHA1SU0rrr:v4i32 V128:v4i32:$Rd, V128:v4i32:$Rn, V128:v4i32:$Rm)
    1200             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SHA1SU0rrr,
    1201             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1202             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1203             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
    1204             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // Rm
    1205             :       GIR_EraseFromParent, /*InsnID*/0,
    1206             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1207             :       GIR_Done,
    1208             :     // Label 23: @2052
    1209             :     GIM_Try, /*On fail goto*//*Label 24*/ 2122,
    1210             :       GIM_CheckFeatures, GIFBS_HasCrypto,
    1211             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1212             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1213             :       // MIs[0] dst
    1214             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    1215             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    1216             :       // MIs[0] Operand 1
    1217             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_crypto_sha256h,
    1218             :       // MIs[0] Rd
    1219             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    1220             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1221             :       // MIs[0] Rn
    1222             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    1223             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    1224             :       // MIs[0] Rm
    1225             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32,
    1226             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/AArch64::FPR128RegClassID,
    1227             :       // (intrinsic_wo_chain:v4i32 191:iPTR, FPR128:v4i32:$Rd, FPR128:v4i32:$Rn, V128:v4i32:$Rm)  =>  (SHA256Hrrr:v4i32 FPR128:v4i32:$Rd, FPR128:v4i32:$Rn, V128:v4i32:$Rm)
    1228             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SHA256Hrrr,
    1229             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1230             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1231             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
    1232             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // Rm
    1233             :       GIR_EraseFromParent, /*InsnID*/0,
    1234             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1235             :       GIR_Done,
    1236             :     // Label 24: @2122
    1237             :     GIM_Try, /*On fail goto*//*Label 25*/ 2192,
    1238             :       GIM_CheckFeatures, GIFBS_HasCrypto,
    1239             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1240             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1241             :       // MIs[0] dst
    1242             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    1243             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    1244             :       // MIs[0] Operand 1
    1245             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_crypto_sha256h2,
    1246             :       // MIs[0] Rd
    1247             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    1248             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1249             :       // MIs[0] Rn
    1250             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    1251             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    1252             :       // MIs[0] Rm
    1253             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32,
    1254             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/AArch64::FPR128RegClassID,
    1255             :       // (intrinsic_wo_chain:v4i32 192:iPTR, FPR128:v4i32:$Rd, FPR128:v4i32:$Rn, V128:v4i32:$Rm)  =>  (SHA256H2rrr:v4i32 FPR128:v4i32:$Rd, FPR128:v4i32:$Rn, V128:v4i32:$Rm)
    1256             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SHA256H2rrr,
    1257             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1258             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1259             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
    1260             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // Rm
    1261             :       GIR_EraseFromParent, /*InsnID*/0,
    1262             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1263             :       GIR_Done,
    1264             :     // Label 25: @2192
    1265             :     GIM_Try, /*On fail goto*//*Label 26*/ 2262,
    1266             :       GIM_CheckFeatures, GIFBS_HasCrypto,
    1267             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1268             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1269             :       // MIs[0] dst
    1270             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    1271             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    1272             :       // MIs[0] Operand 1
    1273             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_crypto_sha256su1,
    1274             :       // MIs[0] Rd
    1275             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    1276             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1277             :       // MIs[0] Rn
    1278             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    1279             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    1280             :       // MIs[0] Rm
    1281             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32,
    1282             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/AArch64::FPR128RegClassID,
    1283             :       // (intrinsic_wo_chain:v4i32 194:iPTR, V128:v4i32:$Rd, V128:v4i32:$Rn, V128:v4i32:$Rm)  =>  (SHA256SU1rrr:v4i32 V128:v4i32:$Rd, V128:v4i32:$Rn, V128:v4i32:$Rm)
    1284             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SHA256SU1rrr,
    1285             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1286             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1287             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
    1288             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // Rm
    1289             :       GIR_EraseFromParent, /*InsnID*/0,
    1290             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1291             :       GIR_Done,
    1292             :     // Label 26: @2262
    1293             :     GIM_Try, /*On fail goto*//*Label 27*/ 2330,
    1294             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1295             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1296             :       // MIs[0] dst
    1297             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
    1298             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    1299             :       // MIs[0] Operand 1
    1300             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_tbx1,
    1301             :       // MIs[0] Rd
    1302             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
    1303             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1304             :       // MIs[0] Rn
    1305             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
    1306             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    1307             :       // MIs[0] Ri
    1308             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v8s8,
    1309             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/AArch64::FPR64RegClassID,
    1310             :       // (intrinsic_wo_chain:v8i8 313:iPTR, V64:v8i8:$Rd, VecListOne128:v16i8:$Rn, V64:v8i8:$Ri)  =>  (TBXv8i8One:v8i8 V64:v8i8:$Rd, VecListOne128:v16i8:$Rn, V64:v8i8:$Ri)
    1311             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::TBXv8i8One,
    1312             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1313             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1314             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
    1315             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // Ri
    1316             :       GIR_EraseFromParent, /*InsnID*/0,
    1317             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1318             :       GIR_Done,
    1319             :     // Label 27: @2330
    1320             :     GIM_Try, /*On fail goto*//*Label 28*/ 2398,
    1321             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1322             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1323             :       // MIs[0] dst
    1324             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
    1325             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    1326             :       // MIs[0] Operand 1
    1327             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_tbx1,
    1328             :       // MIs[0] Rd
    1329             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    1330             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1331             :       // MIs[0] Ri
    1332             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
    1333             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    1334             :       // MIs[0] Rn
    1335             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v16s8,
    1336             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/AArch64::FPR128RegClassID,
    1337             :       // (intrinsic_wo_chain:v16i8 313:iPTR, V128:v16i8:$Rd, V128:v16i8:$Ri, V128:v16i8:$Rn)  =>  (TBXv16i8One:v16i8 V128:v16i8:$Rd, V128:v16i8:$Ri, V128:v16i8:$Rn)
    1338             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::TBXv16i8One,
    1339             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1340             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1341             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Ri
    1342             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // Rn
    1343             :       GIR_EraseFromParent, /*InsnID*/0,
    1344             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1345             :       GIR_Done,
    1346             :     // Label 28: @2398
    1347             :     GIM_Try, /*On fail goto*//*Label 29*/ 2502,
    1348             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    1349             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1350             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    1351             :       GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
    1352             :       GIM_CheckNumOperands, /*MI*/2, /*Expected*/2,
    1353             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMA,
    1354             :       // MIs[0] Rd
    1355             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    1356             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
    1357             :       // MIs[0] Operand 1
    1358             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    1359             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FNEG,
    1360             :       // MIs[1] Operand 0
    1361             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    1362             :       // MIs[1] Rn
    1363             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    1364             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR32RegClassID,
    1365             :       // MIs[0] Rm
    1366             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    1367             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
    1368             :       // MIs[0] Operand 3
    1369             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    1370             :       GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_FNEG,
    1371             :       // MIs[2] Operand 0
    1372             :       GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_s32,
    1373             :       // MIs[2] Ra
    1374             :       GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    1375             :       GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR32RegClassID,
    1376             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    1377             :       GIM_CheckIsSafeToFold, /*InsnID*/2,
    1378             :       // (fma:f32 (fneg:f32 FPR32:f32:$Rn), FPR32:f32:$Rm, (fneg:f32 FPR32:f32:$Ra))  =>  (FNMADDSrrr:f32 FPR32:f32:$Rn, FPR32:f32:$Rm, FPR32:f32:$Ra)
    1379             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FNMADDSrrr,
    1380             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1381             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    1382             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
    1383             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Ra
    1384             :       GIR_EraseFromParent, /*InsnID*/0,
    1385             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1386             :       GIR_Done,
    1387             :     // Label 29: @2502
    1388             :     GIM_Try, /*On fail goto*//*Label 30*/ 2606,
    1389             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    1390             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1391             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    1392             :       GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
    1393             :       GIM_CheckNumOperands, /*MI*/2, /*Expected*/2,
    1394             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMA,
    1395             :       // MIs[0] Rd
    1396             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    1397             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    1398             :       // MIs[0] Operand 1
    1399             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    1400             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FNEG,
    1401             :       // MIs[1] Operand 0
    1402             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s64,
    1403             :       // MIs[1] Rn
    1404             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    1405             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1406             :       // MIs[0] Rm
    1407             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    1408             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1409             :       // MIs[0] Operand 3
    1410             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
    1411             :       GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_FNEG,
    1412             :       // MIs[2] Operand 0
    1413             :       GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_s64,
    1414             :       // MIs[2] Ra
    1415             :       GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s64,
    1416             :       GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1417             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    1418             :       GIM_CheckIsSafeToFold, /*InsnID*/2,
    1419             :       // (fma:f64 (fneg:f64 FPR64:f64:$Rn), FPR64:f64:$Rm, (fneg:f64 FPR64:f64:$Ra))  =>  (FNMADDDrrr:f64 FPR64:f64:$Rn, FPR64:f64:$Rm, FPR64:f64:$Ra)
    1420             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FNMADDDrrr,
    1421             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1422             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    1423             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
    1424             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Ra
    1425             :       GIR_EraseFromParent, /*InsnID*/0,
    1426             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1427             :       GIR_Done,
    1428             :     // Label 30: @2606
    1429             :     GIM_Try, /*On fail goto*//*Label 31*/ 2690,
    1430             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    1431             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1432             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    1433             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMA,
    1434             :       // MIs[0] Rd
    1435             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    1436             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
    1437             :       // MIs[0] Operand 1
    1438             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    1439             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FNEG,
    1440             :       // MIs[1] Operand 0
    1441             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    1442             :       // MIs[1] Rn
    1443             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    1444             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR32RegClassID,
    1445             :       // MIs[0] Rm
    1446             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    1447             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
    1448             :       // MIs[0] Ra
    1449             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    1450             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR32RegClassID,
    1451             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    1452             :       // (fma:f32 (fneg:f32 FPR32:f32:$Rn), FPR32:f32:$Rm, FPR32:f32:$Ra)  =>  (FMSUBSrrr:f32 FPR32:f32:$Rn, FPR32:f32:$Rm, FPR32:f32:$Ra)
    1453             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMSUBSrrr,
    1454             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1455             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    1456             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
    1457             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Ra
    1458             :       GIR_EraseFromParent, /*InsnID*/0,
    1459             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1460             :       GIR_Done,
    1461             :     // Label 31: @2690
    1462             :     GIM_Try, /*On fail goto*//*Label 32*/ 2774,
    1463             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    1464             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1465             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    1466             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMA,
    1467             :       // MIs[0] Rd
    1468             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    1469             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    1470             :       // MIs[0] Operand 1
    1471             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    1472             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FNEG,
    1473             :       // MIs[1] Operand 0
    1474             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s64,
    1475             :       // MIs[1] Rn
    1476             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    1477             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1478             :       // MIs[0] Rm
    1479             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    1480             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1481             :       // MIs[0] Ra
    1482             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
    1483             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1484             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    1485             :       // (fma:f64 (fneg:f64 FPR64:f64:$Rn), FPR64:f64:$Rm, FPR64:f64:$Ra)  =>  (FMSUBDrrr:f64 FPR64:f64:$Rn, FPR64:f64:$Rm, FPR64:f64:$Ra)
    1486             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMSUBDrrr,
    1487             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1488             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    1489             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
    1490             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Ra
    1491             :       GIR_EraseFromParent, /*InsnID*/0,
    1492             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1493             :       GIR_Done,
    1494             :     // Label 32: @2774
    1495             :     GIM_Try, /*On fail goto*//*Label 33*/ 2858,
    1496             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    1497             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1498             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    1499             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMA,
    1500             :       // MIs[0] dst
    1501             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    1502             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    1503             :       // MIs[0] Operand 1
    1504             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    1505             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FNEG,
    1506             :       // MIs[1] Operand 0
    1507             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2s32,
    1508             :       // MIs[1] Rn
    1509             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    1510             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1511             :       // MIs[0] Rm
    1512             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    1513             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1514             :       // MIs[0] Rd
    1515             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
    1516             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1517             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    1518             :       // (fma:v2f32 (fneg:v2f32 V64:v2f32:$Rn), V64:v2f32:$Rm, V64:v2f32:$Rd)  =>  (FMLSv2f32:v2f32 V64:v2f32:$Rd, V64:v2f32:$Rn, V64:v2f32:$Rm)
    1519             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMLSv2f32,
    1520             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1521             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rd
    1522             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    1523             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
    1524             :       GIR_EraseFromParent, /*InsnID*/0,
    1525             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1526             :       GIR_Done,
    1527             :     // Label 33: @2858
    1528             :     GIM_Try, /*On fail goto*//*Label 34*/ 2942,
    1529             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    1530             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1531             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    1532             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMA,
    1533             :       // MIs[0] dst
    1534             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    1535             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    1536             :       // MIs[0] Operand 1
    1537             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    1538             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FNEG,
    1539             :       // MIs[1] Operand 0
    1540             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4s32,
    1541             :       // MIs[1] Rn
    1542             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
    1543             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    1544             :       // MIs[0] Rm
    1545             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    1546             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1547             :       // MIs[0] Rd
    1548             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    1549             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    1550             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    1551             :       // (fma:v4f32 (fneg:v4f32 V128:v4f32:$Rn), V128:v4f32:$Rm, V128:v4f32:$Rd)  =>  (FMLSv4f32:v4f32 V128:v4f32:$Rd, V128:v4f32:$Rn, V128:v4f32:$Rm)
    1552             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMLSv4f32,
    1553             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1554             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rd
    1555             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    1556             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
    1557             :       GIR_EraseFromParent, /*InsnID*/0,
    1558             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1559             :       GIR_Done,
    1560             :     // Label 34: @2942
    1561             :     GIM_Try, /*On fail goto*//*Label 35*/ 3026,
    1562             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    1563             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1564             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    1565             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMA,
    1566             :       // MIs[0] dst
    1567             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    1568             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    1569             :       // MIs[0] Operand 1
    1570             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    1571             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FNEG,
    1572             :       // MIs[1] Operand 0
    1573             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2s64,
    1574             :       // MIs[1] Rn
    1575             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
    1576             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    1577             :       // MIs[0] Rm
    1578             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    1579             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1580             :       // MIs[0] Rd
    1581             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    1582             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    1583             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    1584             :       // (fma:v2f64 (fneg:v2f64 V128:v2f64:$Rn), V128:v2f64:$Rm, V128:v2f64:$Rd)  =>  (FMLSv2f64:v2f64 V128:v2f64:$Rd, V128:v2f64:$Rn, V128:v2f64:$Rm)
    1585             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMLSv2f64,
    1586             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1587             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rd
    1588             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    1589             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
    1590             :       GIR_EraseFromParent, /*InsnID*/0,
    1591             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1592             :       GIR_Done,
    1593             :     // Label 35: @3026
    1594             :     GIM_Try, /*On fail goto*//*Label 36*/ 3130,
    1595             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    1596             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1597             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    1598             :       GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
    1599             :       GIM_CheckNumOperands, /*MI*/2, /*Expected*/2,
    1600             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMA,
    1601             :       // MIs[0] Rd
    1602             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    1603             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
    1604             :       // MIs[0] Rn
    1605             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    1606             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR32RegClassID,
    1607             :       // MIs[0] Operand 2
    1608             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    1609             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FNEG,
    1610             :       // MIs[1] Operand 0
    1611             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    1612             :       // MIs[1] Rm
    1613             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    1614             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR32RegClassID,
    1615             :       // MIs[0] Operand 3
    1616             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    1617             :       GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_FNEG,
    1618             :       // MIs[2] Operand 0
    1619             :       GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_s32,
    1620             :       // MIs[2] Ra
    1621             :       GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    1622             :       GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR32RegClassID,
    1623             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    1624             :       GIM_CheckIsSafeToFold, /*InsnID*/2,
    1625             :       // (fma:f32 FPR32:f32:$Rn, (fneg:f32 FPR32:f32:$Rm), (fneg:f32 FPR32:f32:$Ra))  =>  (FNMADDSrrr:f32 FPR32:f32:$Rn, FPR32:f32:$Rm, FPR32:f32:$Ra)
    1626             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FNMADDSrrr,
    1627             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1628             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    1629             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    1630             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Ra
    1631             :       GIR_EraseFromParent, /*InsnID*/0,
    1632             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1633             :       GIR_Done,
    1634             :     // Label 36: @3130
    1635             :     GIM_Try, /*On fail goto*//*Label 37*/ 3234,
    1636             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    1637             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1638             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    1639             :       GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
    1640             :       GIM_CheckNumOperands, /*MI*/2, /*Expected*/2,
    1641             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMA,
    1642             :       // MIs[0] Rd
    1643             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    1644             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    1645             :       // MIs[0] Rn
    1646             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    1647             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1648             :       // MIs[0] Operand 2
    1649             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    1650             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FNEG,
    1651             :       // MIs[1] Operand 0
    1652             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s64,
    1653             :       // MIs[1] Rm
    1654             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    1655             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1656             :       // MIs[0] Operand 3
    1657             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
    1658             :       GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_FNEG,
    1659             :       // MIs[2] Operand 0
    1660             :       GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_s64,
    1661             :       // MIs[2] Ra
    1662             :       GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s64,
    1663             :       GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1664             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    1665             :       GIM_CheckIsSafeToFold, /*InsnID*/2,
    1666             :       // (fma:f64 FPR64:f64:$Rn, (fneg:f64 FPR64:f64:$Rm), (fneg:f64 FPR64:f64:$Ra))  =>  (FNMADDDrrr:f64 FPR64:f64:$Rn, FPR64:f64:$Rm, FPR64:f64:$Ra)
    1667             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FNMADDDrrr,
    1668             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1669             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    1670             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    1671             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Ra
    1672             :       GIR_EraseFromParent, /*InsnID*/0,
    1673             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1674             :       GIR_Done,
    1675             :     // Label 37: @3234
    1676             :     GIM_Try, /*On fail goto*//*Label 38*/ 3320,
    1677             :       GIM_CheckFeatures, GIFBS_HasFullFP16,
    1678             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    1679             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1680             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    1681             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMA,
    1682             :       // MIs[0] Rd
    1683             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
    1684             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR16RegClassID,
    1685             :       // MIs[0] Rn
    1686             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
    1687             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR16RegClassID,
    1688             :       // MIs[0] Operand 2
    1689             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
    1690             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FNEG,
    1691             :       // MIs[1] Operand 0
    1692             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s16,
    1693             :       // MIs[1] Rm
    1694             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s16,
    1695             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR16RegClassID,
    1696             :       // MIs[0] Ra
    1697             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s16,
    1698             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR16RegClassID,
    1699             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    1700             :       // (fma:f16 FPR16:f16:$Rn, (fneg:f16 FPR16:f16:$Rm), FPR16:f16:$Ra)  =>  (FMSUBHrrr:f16 FPR16:f16:$Rn, FPR16:f16:$Rm, FPR16:f16:$Ra)
    1701             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMSUBHrrr,
    1702             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1703             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    1704             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    1705             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Ra
    1706             :       GIR_EraseFromParent, /*InsnID*/0,
    1707             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1708             :       GIR_Done,
    1709             :     // Label 38: @3320
    1710             :     GIM_Try, /*On fail goto*//*Label 39*/ 3406,
    1711             :       GIM_CheckFeatures, GIFBS_HasFPARMv8,
    1712             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    1713             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1714             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    1715             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMA,
    1716             :       // MIs[0] Rd
    1717             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    1718             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
    1719             :       // MIs[0] Rn
    1720             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    1721             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR32RegClassID,
    1722             :       // MIs[0] Operand 2
    1723             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    1724             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FNEG,
    1725             :       // MIs[1] Operand 0
    1726             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    1727             :       // MIs[1] Rm
    1728             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    1729             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR32RegClassID,
    1730             :       // MIs[0] Ra
    1731             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    1732             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR32RegClassID,
    1733             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    1734             :       // (fma:f32 FPR32:f32:$Rn, (fneg:f32 FPR32:f32:$Rm), FPR32:f32:$Ra)  =>  (FMSUBSrrr:f32 FPR32:f32:$Rn, FPR32:f32:$Rm, FPR32:f32:$Ra)
    1735             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMSUBSrrr,
    1736             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1737             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    1738             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    1739             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Ra
    1740             :       GIR_EraseFromParent, /*InsnID*/0,
    1741             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1742             :       GIR_Done,
    1743             :     // Label 39: @3406
    1744             :     GIM_Try, /*On fail goto*//*Label 40*/ 3492,
    1745             :       GIM_CheckFeatures, GIFBS_HasFPARMv8,
    1746             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    1747             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1748             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    1749             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMA,
    1750             :       // MIs[0] Rd
    1751             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    1752             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    1753             :       // MIs[0] Rn
    1754             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    1755             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1756             :       // MIs[0] Operand 2
    1757             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    1758             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FNEG,
    1759             :       // MIs[1] Operand 0
    1760             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s64,
    1761             :       // MIs[1] Rm
    1762             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    1763             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1764             :       // MIs[0] Ra
    1765             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
    1766             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1767             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    1768             :       // (fma:f64 FPR64:f64:$Rn, (fneg:f64 FPR64:f64:$Rm), FPR64:f64:$Ra)  =>  (FMSUBDrrr:f64 FPR64:f64:$Rn, FPR64:f64:$Rm, FPR64:f64:$Ra)
    1769             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMSUBDrrr,
    1770             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1771             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    1772             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    1773             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Ra
    1774             :       GIR_EraseFromParent, /*InsnID*/0,
    1775             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1776             :       GIR_Done,
    1777             :     // Label 40: @3492
    1778             :     GIM_Try, /*On fail goto*//*Label 41*/ 3578,
    1779             :       GIM_CheckFeatures, GIFBS_HasNEON_HasFullFP16,
    1780             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    1781             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1782             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    1783             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMA,
    1784             :       // MIs[0] dst
    1785             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    1786             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    1787             :       // MIs[0] Rn
    1788             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    1789             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1790             :       // MIs[0] Operand 2
    1791             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    1792             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FNEG,
    1793             :       // MIs[1] Operand 0
    1794             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4s16,
    1795             :       // MIs[1] Rm
    1796             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    1797             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1798             :       // MIs[0] Rd
    1799             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
    1800             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1801             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    1802             :       // (fma:v4f16 V64:v4f16:$Rn, (fneg:v4f16 V64:v4f16:$Rm), V64:v4f16:$Rd)  =>  (FMLSv4f16:v4f16 V64:v4f16:$Rd, V64:v4f16:$Rn, V64:v4f16:$Rm)
    1803             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMLSv4f16,
    1804             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1805             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rd
    1806             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    1807             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    1808             :       GIR_EraseFromParent, /*InsnID*/0,
    1809             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1810             :       GIR_Done,
    1811             :     // Label 41: @3578
    1812             :     GIM_Try, /*On fail goto*//*Label 42*/ 3664,
    1813             :       GIM_CheckFeatures, GIFBS_HasNEON_HasFullFP16,
    1814             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    1815             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1816             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    1817             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMA,
    1818             :       // MIs[0] dst
    1819             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    1820             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    1821             :       // MIs[0] Rn
    1822             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    1823             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    1824             :       // MIs[0] Operand 2
    1825             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    1826             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FNEG,
    1827             :       // MIs[1] Operand 0
    1828             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v8s16,
    1829             :       // MIs[1] Rm
    1830             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
    1831             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    1832             :       // MIs[0] Rd
    1833             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    1834             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    1835             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    1836             :       // (fma:v8f16 V128:v8f16:$Rn, (fneg:v8f16 V128:v8f16:$Rm), V128:v8f16:$Rd)  =>  (FMLSv8f16:v8f16 V128:v8f16:$Rd, V128:v8f16:$Rn, V128:v8f16:$Rm)
    1837             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMLSv8f16,
    1838             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1839             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rd
    1840             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    1841             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    1842             :       GIR_EraseFromParent, /*InsnID*/0,
    1843             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1844             :       GIR_Done,
    1845             :     // Label 42: @3664
    1846             :     GIM_Try, /*On fail goto*//*Label 43*/ 3750,
    1847             :       GIM_CheckFeatures, GIFBS_HasNEON,
    1848             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    1849             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1850             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    1851             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMA,
    1852             :       // MIs[0] dst
    1853             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    1854             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    1855             :       // MIs[0] Rn
    1856             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    1857             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1858             :       // MIs[0] Operand 2
    1859             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    1860             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FNEG,
    1861             :       // MIs[1] Operand 0
    1862             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2s32,
    1863             :       // MIs[1] Rm
    1864             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    1865             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1866             :       // MIs[0] Rd
    1867             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
    1868             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1869             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    1870             :       // (fma:v2f32 V64:v2f32:$Rn, (fneg:v2f32 V64:v2f32:$Rm), V64:v2f32:$Rd)  =>  (FMLSv2f32:v2f32 V64:v2f32:$Rd, V64:v2f32:$Rn, V64:v2f32:$Rm)
    1871             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMLSv2f32,
    1872             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1873             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rd
    1874             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    1875             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    1876             :       GIR_EraseFromParent, /*InsnID*/0,
    1877             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1878             :       GIR_Done,
    1879             :     // Label 43: @3750
    1880             :     GIM_Try, /*On fail goto*//*Label 44*/ 3836,
    1881             :       GIM_CheckFeatures, GIFBS_HasNEON,
    1882             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    1883             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1884             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    1885             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMA,
    1886             :       // MIs[0] dst
    1887             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    1888             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    1889             :       // MIs[0] Rn
    1890             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    1891             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    1892             :       // MIs[0] Operand 2
    1893             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    1894             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FNEG,
    1895             :       // MIs[1] Operand 0
    1896             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4s32,
    1897             :       // MIs[1] Rm
    1898             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
    1899             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    1900             :       // MIs[0] Rd
    1901             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    1902             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    1903             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    1904             :       // (fma:v4f32 V128:v4f32:$Rn, (fneg:v4f32 V128:v4f32:$Rm), V128:v4f32:$Rd)  =>  (FMLSv4f32:v4f32 V128:v4f32:$Rd, V128:v4f32:$Rn, V128:v4f32:$Rm)
    1905             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMLSv4f32,
    1906             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1907             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rd
    1908             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    1909             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    1910             :       GIR_EraseFromParent, /*InsnID*/0,
    1911             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1912             :       GIR_Done,
    1913             :     // Label 44: @3836
    1914             :     GIM_Try, /*On fail goto*//*Label 45*/ 3922,
    1915             :       GIM_CheckFeatures, GIFBS_HasNEON,
    1916             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    1917             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1918             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    1919             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMA,
    1920             :       // MIs[0] dst
    1921             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    1922             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    1923             :       // MIs[0] Rn
    1924             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    1925             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    1926             :       // MIs[0] Operand 2
    1927             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    1928             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FNEG,
    1929             :       // MIs[1] Operand 0
    1930             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2s64,
    1931             :       // MIs[1] Rm
    1932             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
    1933             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    1934             :       // MIs[0] Rd
    1935             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    1936             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    1937             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    1938             :       // (fma:v2f64 V128:v2f64:$Rn, (fneg:v2f64 V128:v2f64:$Rm), V128:v2f64:$Rd)  =>  (FMLSv2f64:v2f64 V128:v2f64:$Rd, V128:v2f64:$Rn, V128:v2f64:$Rm)
    1939             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMLSv2f64,
    1940             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1941             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rd
    1942             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    1943             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    1944             :       GIR_EraseFromParent, /*InsnID*/0,
    1945             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1946             :       GIR_Done,
    1947             :     // Label 45: @3922
    1948             :     GIM_Try, /*On fail goto*//*Label 46*/ 4008,
    1949             :       GIM_CheckFeatures, GIFBS_HasFullFP16,
    1950             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    1951             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    1952             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    1953             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMA,
    1954             :       // MIs[0] Rd
    1955             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
    1956             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR16RegClassID,
    1957             :       // MIs[0] Rn
    1958             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
    1959             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR16RegClassID,
    1960             :       // MIs[0] Rm
    1961             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
    1962             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR16RegClassID,
    1963             :       // MIs[0] Operand 3
    1964             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s16,
    1965             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FNEG,
    1966             :       // MIs[1] Operand 0
    1967             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s16,
    1968             :       // MIs[1] Ra
    1969             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s16,
    1970             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR16RegClassID,
    1971             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    1972             :       // (fma:f16 FPR16:f16:$Rn, FPR16:f16:$Rm, (fneg:f16 FPR16:f16:$Ra))  =>  (FNMSUBHrrr:f16 FPR16:f16:$Rn, FPR16:f16:$Rm, FPR16:f16:$Ra)
    1973             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FNMSUBHrrr,
    1974             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1975             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    1976             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
    1977             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Ra
    1978             :       GIR_EraseFromParent, /*InsnID*/0,
    1979             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1980             :       GIR_Done,
    1981             :     // Label 46: @4008
    1982             :     GIM_Try, /*On fail goto*//*Label 47*/ 4094,
    1983             :       GIM_CheckFeatures, GIFBS_HasFPARMv8,
    1984             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    1985             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    1986             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    1987             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMA,
    1988             :       // MIs[0] Rd
    1989             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    1990             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
    1991             :       // MIs[0] Rn
    1992             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    1993             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR32RegClassID,
    1994             :       // MIs[0] Rm
    1995             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    1996             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
    1997             :       // MIs[0] Operand 3
    1998             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    1999             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FNEG,
    2000             :       // MIs[1] Operand 0
    2001             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    2002             :       // MIs[1] Ra
    2003             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    2004             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR32RegClassID,
    2005             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    2006             :       // (fma:f32 FPR32:f32:$Rn, FPR32:f32:$Rm, (fneg:f32 FPR32:f32:$Ra))  =>  (FNMSUBSrrr:f32 FPR32:f32:$Rn, FPR32:f32:$Rm, FPR32:f32:$Ra)
    2007             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FNMSUBSrrr,
    2008             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    2009             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    2010             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
    2011             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Ra
    2012             :       GIR_EraseFromParent, /*InsnID*/0,
    2013             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2014             :       GIR_Done,
    2015             :     // Label 47: @4094
    2016             :     GIM_Try, /*On fail goto*//*Label 48*/ 4180,
    2017             :       GIM_CheckFeatures, GIFBS_HasFPARMv8,
    2018             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2019             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    2020             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    2021             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMA,
    2022             :       // MIs[0] Rd
    2023             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    2024             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    2025             :       // MIs[0] Rn
    2026             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    2027             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2028             :       // MIs[0] Rm
    2029             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    2030             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2031             :       // MIs[0] Operand 3
    2032             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
    2033             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FNEG,
    2034             :       // MIs[1] Operand 0
    2035             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s64,
    2036             :       // MIs[1] Ra
    2037             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    2038             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2039             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    2040             :       // (fma:f64 FPR64:f64:$Rn, FPR64:f64:$Rm, (fneg:f64 FPR64:f64:$Ra))  =>  (FNMSUBDrrr:f64 FPR64:f64:$Rn, FPR64:f64:$Rm, FPR64:f64:$Ra)
    2041             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FNMSUBDrrr,
    2042             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    2043             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    2044             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
    2045             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Ra
    2046             :       GIR_EraseFromParent, /*InsnID*/0,
    2047             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2048             :       GIR_Done,
    2049             :     // Label 48: @4180
    2050             :     GIM_Try, /*On fail goto*//*Label 49*/ 4229,
    2051             :       GIM_CheckFeatures, GIFBS_HasFullFP16,
    2052             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2053             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMA,
    2054             :       // MIs[0] Rd
    2055             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
    2056             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR16RegClassID,
    2057             :       // MIs[0] Rn
    2058             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
    2059             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR16RegClassID,
    2060             :       // MIs[0] Rm
    2061             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
    2062             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR16RegClassID,
    2063             :       // MIs[0] Ra
    2064             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s16,
    2065             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR16RegClassID,
    2066             :       // (fma:f16 FPR16:f16:$Rn, FPR16:f16:$Rm, FPR16:f16:$Ra)  =>  (FMADDHrrr:f16 FPR16:f16:$Rn, FPR16:f16:$Rm, FPR16:f16:$Ra)
    2067             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FMADDHrrr,
    2068             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2069             :       GIR_Done,
    2070             :     // Label 49: @4229
    2071             :     GIM_Try, /*On fail goto*//*Label 50*/ 4278,
    2072             :       GIM_CheckFeatures, GIFBS_HasFPARMv8,
    2073             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2074             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMA,
    2075             :       // MIs[0] Rd
    2076             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    2077             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
    2078             :       // MIs[0] Rn
    2079             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    2080             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR32RegClassID,
    2081             :       // MIs[0] Rm
    2082             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    2083             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
    2084             :       // MIs[0] Ra
    2085             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    2086             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR32RegClassID,
    2087             :       // (fma:f32 FPR32:f32:$Rn, FPR32:f32:$Rm, FPR32:f32:$Ra)  =>  (FMADDSrrr:f32 FPR32:f32:$Rn, FPR32:f32:$Rm, FPR32:f32:$Ra)
    2088             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FMADDSrrr,
    2089             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2090             :       GIR_Done,
    2091             :     // Label 50: @4278
    2092             :     GIM_Try, /*On fail goto*//*Label 51*/ 4327,
    2093             :       GIM_CheckFeatures, GIFBS_HasFPARMv8,
    2094             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2095             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMA,
    2096             :       // MIs[0] Rd
    2097             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    2098             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    2099             :       // MIs[0] Rn
    2100             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    2101             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2102             :       // MIs[0] Rm
    2103             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    2104             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2105             :       // MIs[0] Ra
    2106             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
    2107             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2108             :       // (fma:f64 FPR64:f64:$Rn, FPR64:f64:$Rm, FPR64:f64:$Ra)  =>  (FMADDDrrr:f64 FPR64:f64:$Rn, FPR64:f64:$Rm, FPR64:f64:$Ra)
    2109             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FMADDDrrr,
    2110             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2111             :       GIR_Done,
    2112             :     // Label 51: @4327
    2113             :     GIM_Try, /*On fail goto*//*Label 52*/ 4393,
    2114             :       GIM_CheckFeatures, GIFBS_HasNEON_HasFullFP16,
    2115             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2116             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMA,
    2117             :       // MIs[0] dst
    2118             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    2119             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    2120             :       // MIs[0] Rm
    2121             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    2122             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2123             :       // MIs[0] Rn
    2124             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    2125             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2126             :       // MIs[0] Rd
    2127             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
    2128             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2129             :       // (fma:v4f16 V64:v4f16:$Rm, V64:v4f16:$Rn, V64:v4f16:$Rd)  =>  (FMLAv4f16:v4f16 V64:v4f16:$Rd, V64:v4f16:$Rn, V64:v4f16:$Rm)
    2130             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMLAv4f16,
    2131             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2132             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rd
    2133             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    2134             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rm
    2135             :       GIR_EraseFromParent, /*InsnID*/0,
    2136             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2137             :       GIR_Done,
    2138             :     // Label 52: @4393
    2139             :     GIM_Try, /*On fail goto*//*Label 53*/ 4459,
    2140             :       GIM_CheckFeatures, GIFBS_HasNEON_HasFullFP16,
    2141             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2142             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMA,
    2143             :       // MIs[0] dst
    2144             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    2145             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    2146             :       // MIs[0] Rm
    2147             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    2148             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2149             :       // MIs[0] Rn
    2150             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    2151             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2152             :       // MIs[0] Rd
    2153             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    2154             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    2155             :       // (fma:v8f16 V128:v8f16:$Rm, V128:v8f16:$Rn, V128:v8f16:$Rd)  =>  (FMLAv8f16:v8f16 V128:v8f16:$Rd, V128:v8f16:$Rn, V128:v8f16:$Rm)
    2156             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMLAv8f16,
    2157             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2158             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rd
    2159             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    2160             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rm
    2161             :       GIR_EraseFromParent, /*InsnID*/0,
    2162             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2163             :       GIR_Done,
    2164             :     // Label 53: @4459
    2165             :     GIM_Try, /*On fail goto*//*Label 54*/ 4525,
    2166             :       GIM_CheckFeatures, GIFBS_HasNEON,
    2167             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2168             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMA,
    2169             :       // MIs[0] dst
    2170             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    2171             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    2172             :       // MIs[0] Rm
    2173             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    2174             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2175             :       // MIs[0] Rn
    2176             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    2177             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2178             :       // MIs[0] Rd
    2179             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
    2180             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2181             :       // (fma:v2f32 V64:v2f32:$Rm, V64:v2f32:$Rn, V64:v2f32:$Rd)  =>  (FMLAv2f32:v2f32 V64:v2f32:$Rd, V64:v2f32:$Rn, V64:v2f32:$Rm)
    2182             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMLAv2f32,
    2183             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2184             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rd
    2185             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    2186             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rm
    2187             :       GIR_EraseFromParent, /*InsnID*/0,
    2188             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2189             :       GIR_Done,
    2190             :     // Label 54: @4525
    2191             :     GIM_Try, /*On fail goto*//*Label 55*/ 4591,
    2192             :       GIM_CheckFeatures, GIFBS_HasNEON,
    2193             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2194             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMA,
    2195             :       // MIs[0] dst
    2196             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    2197             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    2198             :       // MIs[0] Rm
    2199             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    2200             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2201             :       // MIs[0] Rn
    2202             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    2203             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2204             :       // MIs[0] Rd
    2205             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    2206             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    2207             :       // (fma:v4f32 V128:v4f32:$Rm, V128:v4f32:$Rn, V128:v4f32:$Rd)  =>  (FMLAv4f32:v4f32 V128:v4f32:$Rd, V128:v4f32:$Rn, V128:v4f32:$Rm)
    2208             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMLAv4f32,
    2209             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2210             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rd
    2211             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    2212             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rm
    2213             :       GIR_EraseFromParent, /*InsnID*/0,
    2214             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2215             :       GIR_Done,
    2216             :     // Label 55: @4591
    2217             :     GIM_Try, /*On fail goto*//*Label 56*/ 4657,
    2218             :       GIM_CheckFeatures, GIFBS_HasNEON,
    2219             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2220             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMA,
    2221             :       // MIs[0] dst
    2222             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    2223             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    2224             :       // MIs[0] Rm
    2225             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    2226             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2227             :       // MIs[0] Rn
    2228             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    2229             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2230             :       // MIs[0] Rd
    2231             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    2232             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    2233             :       // (fma:v2f64 V128:v2f64:$Rm, V128:v2f64:$Rn, V128:v2f64:$Rd)  =>  (FMLAv2f64:v2f64 V128:v2f64:$Rd, V128:v2f64:$Rn, V128:v2f64:$Rm)
    2234             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMLAv2f64,
    2235             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2236             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rd
    2237             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    2238             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rm
    2239             :       GIR_EraseFromParent, /*InsnID*/0,
    2240             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2241             :       GIR_Done,
    2242             :     // Label 56: @4657
    2243             :     GIM_Try, /*On fail goto*//*Label 57*/ 4751,
    2244             :       GIM_CheckFeatures, GIFBS_HasNEON_HasRDM,
    2245             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2246             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    2247             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2248             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2249             :       // MIs[0] dst
    2250             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    2251             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    2252             :       // MIs[0] Operand 1
    2253             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqadd,
    2254             :       // MIs[0] Rd
    2255             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    2256             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2257             :       // MIs[0] Operand 3
    2258             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
    2259             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2260             :       // MIs[1] Operand 0
    2261             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4s16,
    2262             :       // MIs[1] Operand 1
    2263             :       GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sqrdmulh,
    2264             :       // MIs[1] Rn
    2265             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    2266             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2267             :       // MIs[1] Rm
    2268             :       GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s16,
    2269             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2270             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    2271             :       // (intrinsic_wo_chain:v4i16 278:iPTR, V64:v4i16:$Rd, (intrinsic_wo_chain:v4i16 283:iPTR, V64:v4i16:$Rn, V64:v4i16:$Rm))  =>  (SQRDMLAHv4i16:v4i16 V64:v4i16:$Rd, V64:v4i16:$Rn, V64:v4i16:$Rm)
    2272             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRDMLAHv4i16,
    2273             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2274             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2275             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2276             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2277             :       GIR_EraseFromParent, /*InsnID*/0,
    2278             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2279             :       GIR_Done,
    2280             :     // Label 57: @4751
    2281             :     GIM_Try, /*On fail goto*//*Label 58*/ 4845,
    2282             :       GIM_CheckFeatures, GIFBS_HasNEON_HasRDM,
    2283             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2284             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    2285             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2286             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2287             :       // MIs[0] dst
    2288             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    2289             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    2290             :       // MIs[0] Operand 1
    2291             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqadd,
    2292             :       // MIs[0] Rd
    2293             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    2294             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2295             :       // MIs[0] Operand 3
    2296             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    2297             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2298             :       // MIs[1] Operand 0
    2299             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v8s16,
    2300             :       // MIs[1] Operand 1
    2301             :       GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sqrdmulh,
    2302             :       // MIs[1] Rn
    2303             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
    2304             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2305             :       // MIs[1] Rm
    2306             :       GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s16,
    2307             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    2308             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    2309             :       // (intrinsic_wo_chain:v8i16 278:iPTR, V128:v8i16:$Rd, (intrinsic_wo_chain:v8i16 283:iPTR, V128:v8i16:$Rn, V128:v8i16:$Rm))  =>  (SQRDMLAHv8i16:v8i16 V128:v8i16:$Rd, V128:v8i16:$Rn, V128:v8i16:$Rm)
    2310             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRDMLAHv8i16,
    2311             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2312             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2313             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2314             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2315             :       GIR_EraseFromParent, /*InsnID*/0,
    2316             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2317             :       GIR_Done,
    2318             :     // Label 58: @4845
    2319             :     GIM_Try, /*On fail goto*//*Label 59*/ 4939,
    2320             :       GIM_CheckFeatures, GIFBS_HasNEON_HasRDM,
    2321             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2322             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    2323             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2324             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2325             :       // MIs[0] dst
    2326             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    2327             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    2328             :       // MIs[0] Operand 1
    2329             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqadd,
    2330             :       // MIs[0] Rd
    2331             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    2332             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2333             :       // MIs[0] Operand 3
    2334             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
    2335             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2336             :       // MIs[1] Operand 0
    2337             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2s32,
    2338             :       // MIs[1] Operand 1
    2339             :       GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sqrdmulh,
    2340             :       // MIs[1] Rn
    2341             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    2342             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2343             :       // MIs[1] Rm
    2344             :       GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s32,
    2345             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2346             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    2347             :       // (intrinsic_wo_chain:v2i32 278:iPTR, V64:v2i32:$Rd, (intrinsic_wo_chain:v2i32 283:iPTR, V64:v2i32:$Rn, V64:v2i32:$Rm))  =>  (SQRDMLAHv2i32:v2i32 V64:v2i32:$Rd, V64:v2i32:$Rn, V64:v2i32:$Rm)
    2348             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRDMLAHv2i32,
    2349             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2350             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2351             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2352             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2353             :       GIR_EraseFromParent, /*InsnID*/0,
    2354             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2355             :       GIR_Done,
    2356             :     // Label 59: @4939
    2357             :     GIM_Try, /*On fail goto*//*Label 60*/ 5033,
    2358             :       GIM_CheckFeatures, GIFBS_HasNEON_HasRDM,
    2359             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2360             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    2361             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2362             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2363             :       // MIs[0] dst
    2364             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    2365             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    2366             :       // MIs[0] Operand 1
    2367             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqadd,
    2368             :       // MIs[0] Rd
    2369             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    2370             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2371             :       // MIs[0] Operand 3
    2372             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    2373             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2374             :       // MIs[1] Operand 0
    2375             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4s32,
    2376             :       // MIs[1] Operand 1
    2377             :       GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sqrdmulh,
    2378             :       // MIs[1] Rn
    2379             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
    2380             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2381             :       // MIs[1] Rm
    2382             :       GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s32,
    2383             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    2384             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    2385             :       // (intrinsic_wo_chain:v4i32 278:iPTR, V128:v4i32:$Rd, (intrinsic_wo_chain:v4i32 283:iPTR, V128:v4i32:$Rn, V128:v4i32:$Rm))  =>  (SQRDMLAHv4i32:v4i32 V128:v4i32:$Rd, V128:v4i32:$Rn, V128:v4i32:$Rm)
    2386             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRDMLAHv4i32,
    2387             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2388             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2389             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2390             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2391             :       GIR_EraseFromParent, /*InsnID*/0,
    2392             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2393             :       GIR_Done,
    2394             :     // Label 60: @5033
    2395             :     GIM_Try, /*On fail goto*//*Label 61*/ 5127,
    2396             :       GIM_CheckFeatures, GIFBS_HasNEON_HasRDM,
    2397             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2398             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    2399             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2400             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2401             :       // MIs[0] dst
    2402             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    2403             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    2404             :       // MIs[0] Operand 1
    2405             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqsub,
    2406             :       // MIs[0] Rd
    2407             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    2408             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2409             :       // MIs[0] Operand 3
    2410             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
    2411             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2412             :       // MIs[1] Operand 0
    2413             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4s16,
    2414             :       // MIs[1] Operand 1
    2415             :       GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sqrdmulh,
    2416             :       // MIs[1] Rn
    2417             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    2418             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2419             :       // MIs[1] Rm
    2420             :       GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s16,
    2421             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2422             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    2423             :       // (intrinsic_wo_chain:v4i16 291:iPTR, V64:v4i16:$Rd, (intrinsic_wo_chain:v4i16 283:iPTR, V64:v4i16:$Rn, V64:v4i16:$Rm))  =>  (SQRDMLSHv4i16:v4i16 V64:v4i16:$Rd, V64:v4i16:$Rn, V64:v4i16:$Rm)
    2424             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRDMLSHv4i16,
    2425             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2426             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2427             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2428             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2429             :       GIR_EraseFromParent, /*InsnID*/0,
    2430             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2431             :       GIR_Done,
    2432             :     // Label 61: @5127
    2433             :     GIM_Try, /*On fail goto*//*Label 62*/ 5221,
    2434             :       GIM_CheckFeatures, GIFBS_HasNEON_HasRDM,
    2435             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2436             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    2437             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2438             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2439             :       // MIs[0] dst
    2440             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    2441             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    2442             :       // MIs[0] Operand 1
    2443             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqsub,
    2444             :       // MIs[0] Rd
    2445             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    2446             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2447             :       // MIs[0] Operand 3
    2448             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    2449             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2450             :       // MIs[1] Operand 0
    2451             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v8s16,
    2452             :       // MIs[1] Operand 1
    2453             :       GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sqrdmulh,
    2454             :       // MIs[1] Rn
    2455             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
    2456             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2457             :       // MIs[1] Rm
    2458             :       GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s16,
    2459             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    2460             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    2461             :       // (intrinsic_wo_chain:v8i16 291:iPTR, V128:v8i16:$Rd, (intrinsic_wo_chain:v8i16 283:iPTR, V128:v8i16:$Rn, V128:v8i16:$Rm))  =>  (SQRDMLSHv8i16:v8i16 V128:v8i16:$Rd, V128:v8i16:$Rn, V128:v8i16:$Rm)
    2462             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRDMLSHv8i16,
    2463             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2464             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2465             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2466             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2467             :       GIR_EraseFromParent, /*InsnID*/0,
    2468             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2469             :       GIR_Done,
    2470             :     // Label 62: @5221
    2471             :     GIM_Try, /*On fail goto*//*Label 63*/ 5315,
    2472             :       GIM_CheckFeatures, GIFBS_HasNEON_HasRDM,
    2473             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2474             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    2475             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2476             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2477             :       // MIs[0] dst
    2478             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    2479             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    2480             :       // MIs[0] Operand 1
    2481             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqsub,
    2482             :       // MIs[0] Rd
    2483             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    2484             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2485             :       // MIs[0] Operand 3
    2486             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
    2487             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2488             :       // MIs[1] Operand 0
    2489             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2s32,
    2490             :       // MIs[1] Operand 1
    2491             :       GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sqrdmulh,
    2492             :       // MIs[1] Rn
    2493             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    2494             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2495             :       // MIs[1] Rm
    2496             :       GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s32,
    2497             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2498             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    2499             :       // (intrinsic_wo_chain:v2i32 291:iPTR, V64:v2i32:$Rd, (intrinsic_wo_chain:v2i32 283:iPTR, V64:v2i32:$Rn, V64:v2i32:$Rm))  =>  (SQRDMLSHv2i32:v2i32 V64:v2i32:$Rd, V64:v2i32:$Rn, V64:v2i32:$Rm)
    2500             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRDMLSHv2i32,
    2501             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2502             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2503             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2504             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2505             :       GIR_EraseFromParent, /*InsnID*/0,
    2506             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2507             :       GIR_Done,
    2508             :     // Label 63: @5315
    2509             :     GIM_Try, /*On fail goto*//*Label 64*/ 5409,
    2510             :       GIM_CheckFeatures, GIFBS_HasNEON_HasRDM,
    2511             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2512             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    2513             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2514             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2515             :       // MIs[0] dst
    2516             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    2517             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    2518             :       // MIs[0] Operand 1
    2519             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqsub,
    2520             :       // MIs[0] Rd
    2521             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    2522             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2523             :       // MIs[0] Operand 3
    2524             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    2525             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2526             :       // MIs[1] Operand 0
    2527             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4s32,
    2528             :       // MIs[1] Operand 1
    2529             :       GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sqrdmulh,
    2530             :       // MIs[1] Rn
    2531             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
    2532             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2533             :       // MIs[1] Rm
    2534             :       GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s32,
    2535             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    2536             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    2537             :       // (intrinsic_wo_chain:v4i32 291:iPTR, V128:v4i32:$Rd, (intrinsic_wo_chain:v4i32 283:iPTR, V128:v4i32:$Rn, V128:v4i32:$Rm))  =>  (SQRDMLSHv4i32:v4i32 V128:v4i32:$Rd, V128:v4i32:$Rn, V128:v4i32:$Rm)
    2538             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRDMLSHv4i32,
    2539             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2540             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2541             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2542             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2543             :       GIR_EraseFromParent, /*InsnID*/0,
    2544             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2545             :       GIR_Done,
    2546             :     // Label 64: @5409
    2547             :     GIM_Try, /*On fail goto*//*Label 65*/ 5503,
    2548             :       GIM_CheckFeatures, GIFBS_HasNEON,
    2549             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2550             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    2551             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2552             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2553             :       // MIs[0] dst
    2554             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    2555             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    2556             :       // MIs[0] Operand 1
    2557             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqadd,
    2558             :       // MIs[0] Rd
    2559             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    2560             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2561             :       // MIs[0] Operand 3
    2562             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    2563             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2564             :       // MIs[1] Operand 0
    2565             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4s32,
    2566             :       // MIs[1] Operand 1
    2567             :       GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sqdmull,
    2568             :       // MIs[1] Rn
    2569             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    2570             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2571             :       // MIs[1] Rm
    2572             :       GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s16,
    2573             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2574             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    2575             :       // (intrinsic_wo_chain:v4i32 278:iPTR, V128:v4i32:$Rd, (intrinsic_wo_chain:v4i32 280:iPTR, V64:v4i16:$Rn, V64:v4i16:$Rm))  =>  (SQDMLALv4i16_v4i32:v4i32 V128:v4i32:$Rd, V64:v4i16:$Rn, V64:v4i16:$Rm)
    2576             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQDMLALv4i16_v4i32,
    2577             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2578             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2579             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2580             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2581             :       GIR_EraseFromParent, /*InsnID*/0,
    2582             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2583             :       GIR_Done,
    2584             :     // Label 65: @5503
    2585             :     GIM_Try, /*On fail goto*//*Label 66*/ 5597,
    2586             :       GIM_CheckFeatures, GIFBS_HasNEON,
    2587             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2588             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    2589             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2590             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2591             :       // MIs[0] dst
    2592             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    2593             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    2594             :       // MIs[0] Operand 1
    2595             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqadd,
    2596             :       // MIs[0] Rd
    2597             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    2598             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2599             :       // MIs[0] Operand 3
    2600             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    2601             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2602             :       // MIs[1] Operand 0
    2603             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2s64,
    2604             :       // MIs[1] Operand 1
    2605             :       GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sqdmull,
    2606             :       // MIs[1] Rn
    2607             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    2608             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2609             :       // MIs[1] Rm
    2610             :       GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s32,
    2611             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2612             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    2613             :       // (intrinsic_wo_chain:v2i64 278:iPTR, V128:v2i64:$Rd, (intrinsic_wo_chain:v2i64 280:iPTR, V64:v2i32:$Rn, V64:v2i32:$Rm))  =>  (SQDMLALv2i32_v2i64:v2i64 V128:v2i64:$Rd, V64:v2i32:$Rn, V64:v2i32:$Rm)
    2614             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQDMLALv2i32_v2i64,
    2615             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2616             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2617             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2618             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2619             :       GIR_EraseFromParent, /*InsnID*/0,
    2620             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2621             :       GIR_Done,
    2622             :     // Label 66: @5597
    2623             :     GIM_Try, /*On fail goto*//*Label 67*/ 5691,
    2624             :       GIM_CheckFeatures, GIFBS_HasNEON,
    2625             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2626             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    2627             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2628             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2629             :       // MIs[0] dst
    2630             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    2631             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    2632             :       // MIs[0] Operand 1
    2633             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqsub,
    2634             :       // MIs[0] Rd
    2635             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    2636             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2637             :       // MIs[0] Operand 3
    2638             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    2639             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2640             :       // MIs[1] Operand 0
    2641             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4s32,
    2642             :       // MIs[1] Operand 1
    2643             :       GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sqdmull,
    2644             :       // MIs[1] Rn
    2645             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    2646             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2647             :       // MIs[1] Rm
    2648             :       GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s16,
    2649             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2650             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    2651             :       // (intrinsic_wo_chain:v4i32 291:iPTR, V128:v4i32:$Rd, (intrinsic_wo_chain:v4i32 280:iPTR, V64:v4i16:$Rn, V64:v4i16:$Rm))  =>  (SQDMLSLv4i16_v4i32:v4i32 V128:v4i32:$Rd, V64:v4i16:$Rn, V64:v4i16:$Rm)
    2652             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQDMLSLv4i16_v4i32,
    2653             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2654             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2655             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2656             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2657             :       GIR_EraseFromParent, /*InsnID*/0,
    2658             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2659             :       GIR_Done,
    2660             :     // Label 67: @5691
    2661             :     GIM_Try, /*On fail goto*//*Label 68*/ 5785,
    2662             :       GIM_CheckFeatures, GIFBS_HasNEON,
    2663             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2664             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    2665             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2666             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2667             :       // MIs[0] dst
    2668             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    2669             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    2670             :       // MIs[0] Operand 1
    2671             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqsub,
    2672             :       // MIs[0] Rd
    2673             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    2674             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2675             :       // MIs[0] Operand 3
    2676             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    2677             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2678             :       // MIs[1] Operand 0
    2679             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v2s64,
    2680             :       // MIs[1] Operand 1
    2681             :       GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sqdmull,
    2682             :       // MIs[1] Rn
    2683             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    2684             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2685             :       // MIs[1] Rm
    2686             :       GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s32,
    2687             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2688             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    2689             :       // (intrinsic_wo_chain:v2i64 291:iPTR, V128:v2i64:$Rd, (intrinsic_wo_chain:v2i64 280:iPTR, V64:v2i32:$Rn, V64:v2i32:$Rm))  =>  (SQDMLSLv2i32_v2i64:v2i64 V128:v2i64:$Rd, V64:v2i32:$Rn, V64:v2i32:$Rm)
    2690             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQDMLSLv2i32_v2i64,
    2691             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2692             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2693             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2694             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2695             :       GIR_EraseFromParent, /*InsnID*/0,
    2696             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2697             :       GIR_Done,
    2698             :     // Label 68: @5785
    2699             :     GIM_Try, /*On fail goto*//*Label 69*/ 5879,
    2700             :       GIM_CheckFeatures, GIFBS_HasRDM,
    2701             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2702             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    2703             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2704             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2705             :       // MIs[0] dst
    2706             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    2707             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
    2708             :       // MIs[0] Operand 1
    2709             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqadd,
    2710             :       // MIs[0] Rd
    2711             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    2712             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
    2713             :       // MIs[0] Operand 3
    2714             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    2715             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2716             :       // MIs[1] Operand 0
    2717             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    2718             :       // MIs[1] Operand 1
    2719             :       GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sqrdmulh,
    2720             :       // MIs[1] Rn
    2721             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    2722             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
    2723             :       // MIs[1] Rm
    2724             :       GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
    2725             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR32RegClassID,
    2726             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    2727             :       // (intrinsic_wo_chain:i32 278:iPTR, FPR32:i32:$Rd, (intrinsic_wo_chain:i32 283:iPTR, FPR32:i32:$Rn, FPR32:i32:$Rm))  =>  (SQRDMLAHv1i32:i32 FPR32:i32:$Rd, FPR32:i32:$Rn, FPR32:i32:$Rm)
    2728             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRDMLAHv1i32,
    2729             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2730             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2731             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2732             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2733             :       GIR_EraseFromParent, /*InsnID*/0,
    2734             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2735             :       GIR_Done,
    2736             :     // Label 69: @5879
    2737             :     GIM_Try, /*On fail goto*//*Label 70*/ 5973,
    2738             :       GIM_CheckFeatures, GIFBS_HasRDM,
    2739             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2740             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    2741             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2742             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2743             :       // MIs[0] dst
    2744             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    2745             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
    2746             :       // MIs[0] Operand 1
    2747             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqsub,
    2748             :       // MIs[0] Rd
    2749             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    2750             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
    2751             :       // MIs[0] Operand 3
    2752             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    2753             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2754             :       // MIs[1] Operand 0
    2755             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    2756             :       // MIs[1] Operand 1
    2757             :       GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sqrdmulh,
    2758             :       // MIs[1] Rn
    2759             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    2760             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
    2761             :       // MIs[1] Rm
    2762             :       GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
    2763             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR32RegClassID,
    2764             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    2765             :       // (intrinsic_wo_chain:i32 291:iPTR, FPR32:i32:$Rd, (intrinsic_wo_chain:i32 283:iPTR, FPR32:i32:$Rn, FPR32:i32:$Rm))  =>  (SQRDMLSHv1i32:i32 FPR32:i32:$Rd, FPR32:i32:$Rn, FPR32:i32:$Rm)
    2766             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRDMLSHv1i32,
    2767             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2768             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2769             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2770             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2771             :       GIR_EraseFromParent, /*InsnID*/0,
    2772             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2773             :       GIR_Done,
    2774             :     // Label 70: @5973
    2775             :     GIM_Try, /*On fail goto*//*Label 71*/ 6065,
    2776             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2777             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    2778             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2779             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2780             :       // MIs[0] dst
    2781             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    2782             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    2783             :       // MIs[0] Operand 1
    2784             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqadd,
    2785             :       // MIs[0] Rd
    2786             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    2787             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2788             :       // MIs[0] Operand 3
    2789             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
    2790             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2791             :       // MIs[1] Operand 0
    2792             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s64,
    2793             :       // MIs[1] Operand 1
    2794             :       GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sqdmulls_scalar,
    2795             :       // MIs[1] Rn
    2796             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    2797             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
    2798             :       // MIs[1] Rm
    2799             :       GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
    2800             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR32RegClassID,
    2801             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    2802             :       // (intrinsic_wo_chain:i64 278:iPTR, FPR64:i64:$Rd, (intrinsic_wo_chain:i64 281:iPTR, FPR32:i32:$Rn, FPR32:i32:$Rm))  =>  (SQDMLALi32:i64 FPR64:i64:$Rd, FPR32:i32:$Rn, FPR32:i32:$Rm)
    2803             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQDMLALi32,
    2804             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2805             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2806             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2807             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2808             :       GIR_EraseFromParent, /*InsnID*/0,
    2809             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2810             :       GIR_Done,
    2811             :     // Label 71: @6065
    2812             :     GIM_Try, /*On fail goto*//*Label 72*/ 6157,
    2813             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2814             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    2815             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2816             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2817             :       // MIs[0] dst
    2818             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    2819             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    2820             :       // MIs[0] Operand 1
    2821             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqsub,
    2822             :       // MIs[0] Rd
    2823             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    2824             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2825             :       // MIs[0] Operand 3
    2826             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
    2827             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2828             :       // MIs[1] Operand 0
    2829             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s64,
    2830             :       // MIs[1] Operand 1
    2831             :       GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sqdmulls_scalar,
    2832             :       // MIs[1] Rn
    2833             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    2834             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
    2835             :       // MIs[1] Rm
    2836             :       GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
    2837             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR32RegClassID,
    2838             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    2839             :       // (intrinsic_wo_chain:i64 291:iPTR, FPR64:i64:$Rd, (intrinsic_wo_chain:i64 281:iPTR, FPR32:i32:$Rn, FPR32:i32:$Rm))  =>  (SQDMLSLi32:i64 FPR64:i64:$Rd, FPR32:i32:$Rn, FPR32:i32:$Rm)
    2840             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQDMLSLi32,
    2841             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2842             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2843             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2844             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2845             :       GIR_EraseFromParent, /*InsnID*/0,
    2846             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2847             :       GIR_Done,
    2848             :     // Label 72: @6157
    2849             :     GIM_Try, /*On fail goto*//*Label 73*/ 6229,
    2850             :       GIM_CheckFeatures, GIFBS_HasNEON,
    2851             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2852             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    2853             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    2854             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2855             :       // MIs[0] Rd
    2856             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    2857             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
    2858             :       // MIs[0] Operand 1
    2859             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqrshrn,
    2860             :       // MIs[0] Rn
    2861             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    2862             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2863             :       // MIs[0] imm
    2864             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    2865             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    2866             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR32,
    2867             :       // MIs[1] Operand 0
    2868             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    2869             :       // MIs[1] Operand 1
    2870             :       // No operand predicates
    2871             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    2872             :       // (intrinsic_wo_chain:i32 285:iPTR, FPR64:i64:$Rn, (imm:i32)<<P:Predicate_vecshiftR32>>:$imm)  =>  (SQRSHRNs:i32 FPR64:i64:$Rn, (imm:i32):$imm)
    2873             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRSHRNs,
    2874             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    2875             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    2876             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    2877             :       GIR_EraseFromParent, /*InsnID*/0,
    2878             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2879             :       GIR_Done,
    2880             :     // Label 73: @6229
    2881             :     GIM_Try, /*On fail goto*//*Label 74*/ 6301,
    2882             :       GIM_CheckFeatures, GIFBS_HasNEON,
    2883             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2884             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    2885             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    2886             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2887             :       // MIs[0] Rd
    2888             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    2889             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
    2890             :       // MIs[0] Operand 1
    2891             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqrshrun,
    2892             :       // MIs[0] Rn
    2893             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    2894             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2895             :       // MIs[0] imm
    2896             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    2897             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    2898             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR32,
    2899             :       // MIs[1] Operand 0
    2900             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    2901             :       // MIs[1] Operand 1
    2902             :       // No operand predicates
    2903             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    2904             :       // (intrinsic_wo_chain:i32 286:iPTR, FPR64:i64:$Rn, (imm:i32)<<P:Predicate_vecshiftR32>>:$imm)  =>  (SQRSHRUNs:i32 FPR64:i64:$Rn, (imm:i32):$imm)
    2905             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRSHRUNs,
    2906             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    2907             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    2908             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    2909             :       GIR_EraseFromParent, /*InsnID*/0,
    2910             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2911             :       GIR_Done,
    2912             :     // Label 74: @6301
    2913             :     GIM_Try, /*On fail goto*//*Label 75*/ 6373,
    2914             :       GIM_CheckFeatures, GIFBS_HasNEON,
    2915             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2916             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    2917             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    2918             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2919             :       // MIs[0] Rd
    2920             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    2921             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
    2922             :       // MIs[0] Operand 1
    2923             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqshrn,
    2924             :       // MIs[0] Rn
    2925             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    2926             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2927             :       // MIs[0] imm
    2928             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    2929             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    2930             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR32,
    2931             :       // MIs[1] Operand 0
    2932             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    2933             :       // MIs[1] Operand 1
    2934             :       // No operand predicates
    2935             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    2936             :       // (intrinsic_wo_chain:i32 289:iPTR, FPR64:i64:$Rn, (imm:i32)<<P:Predicate_vecshiftR32>>:$imm)  =>  (SQSHRNs:i32 FPR64:i64:$Rn, (imm:i32):$imm)
    2937             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSHRNs,
    2938             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    2939             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    2940             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    2941             :       GIR_EraseFromParent, /*InsnID*/0,
    2942             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2943             :       GIR_Done,
    2944             :     // Label 75: @6373
    2945             :     GIM_Try, /*On fail goto*//*Label 76*/ 6445,
    2946             :       GIM_CheckFeatures, GIFBS_HasNEON,
    2947             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2948             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    2949             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    2950             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2951             :       // MIs[0] Rd
    2952             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    2953             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
    2954             :       // MIs[0] Operand 1
    2955             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqshrun,
    2956             :       // MIs[0] Rn
    2957             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    2958             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2959             :       // MIs[0] imm
    2960             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    2961             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    2962             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR32,
    2963             :       // MIs[1] Operand 0
    2964             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    2965             :       // MIs[1] Operand 1
    2966             :       // No operand predicates
    2967             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    2968             :       // (intrinsic_wo_chain:i32 290:iPTR, FPR64:i64:$Rn, (imm:i32)<<P:Predicate_vecshiftR32>>:$imm)  =>  (SQSHRUNs:i32 FPR64:i64:$Rn, (imm:i32):$imm)
    2969             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSHRUNs,
    2970             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    2971             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    2972             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    2973             :       GIR_EraseFromParent, /*InsnID*/0,
    2974             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2975             :       GIR_Done,
    2976             :     // Label 76: @6445
    2977             :     GIM_Try, /*On fail goto*//*Label 77*/ 6517,
    2978             :       GIM_CheckFeatures, GIFBS_HasNEON,
    2979             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2980             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    2981             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    2982             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2983             :       // MIs[0] Rd
    2984             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    2985             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
    2986             :       // MIs[0] Operand 1
    2987             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqrshrn,
    2988             :       // MIs[0] Rn
    2989             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    2990             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2991             :       // MIs[0] imm
    2992             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    2993             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    2994             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR32,
    2995             :       // MIs[1] Operand 0
    2996             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    2997             :       // MIs[1] Operand 1
    2998             :       // No operand predicates
    2999             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    3000             :       // (intrinsic_wo_chain:i32 332:iPTR, FPR64:i64:$Rn, (imm:i32)<<P:Predicate_vecshiftR32>>:$imm)  =>  (UQRSHRNs:i32 FPR64:i64:$Rn, (imm:i32):$imm)
    3001             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQRSHRNs,
    3002             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3003             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    3004             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    3005             :       GIR_EraseFromParent, /*InsnID*/0,
    3006             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3007             :       GIR_Done,
    3008             :     // Label 77: @6517
    3009             :     GIM_Try, /*On fail goto*//*Label 78*/ 6589,
    3010             :       GIM_CheckFeatures, GIFBS_HasNEON,
    3011             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3012             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    3013             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    3014             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3015             :       // MIs[0] Rd
    3016             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    3017             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
    3018             :       // MIs[0] Operand 1
    3019             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqshrn,
    3020             :       // MIs[0] Rn
    3021             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    3022             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    3023             :       // MIs[0] imm
    3024             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    3025             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    3026             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR32,
    3027             :       // MIs[1] Operand 0
    3028             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    3029             :       // MIs[1] Operand 1
    3030             :       // No operand predicates
    3031             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    3032             :       // (intrinsic_wo_chain:i32 334:iPTR, FPR64:i64:$Rn, (imm:i32)<<P:Predicate_vecshiftR32>>:$imm)  =>  (UQSHRNs:i32 FPR64:i64:$Rn, (imm:i32):$imm)
    3033             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQSHRNs,
    3034             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3035             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    3036             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    3037             :       GIR_EraseFromParent, /*InsnID*/0,
    3038             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3039             :       GIR_Done,
    3040             :     // Label 78: @6589
    3041             :     GIM_Try, /*On fail goto*//*Label 79*/ 6658,
    3042             :       GIM_CheckFeatures, GIFBS_HasNEON_HasFullFP16,
    3043             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3044             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    3045             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    3046             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3047             :       // MIs[0] Rd
    3048             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    3049             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    3050             :       // MIs[0] Operand 1
    3051             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfp2fxs,
    3052             :       // MIs[0] Rn
    3053             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    3054             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    3055             :       // MIs[0] imm
    3056             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    3057             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    3058             :       // MIs[1] Operand 0
    3059             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    3060             :       // MIs[1] Operand 1
    3061             :       // No operand predicates
    3062             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    3063             :       // (intrinsic_wo_chain:v4i16 345:iPTR, V64:v4f16:$Rn, (imm:i32):$imm)  =>  (FCVTZSv4i16_shift:v4i16 V64:v4f16:$Rn, (imm:i32):$imm)
    3064             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTZSv4i16_shift,
    3065             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3066             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    3067             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    3068             :       GIR_EraseFromParent, /*InsnID*/0,
    3069             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3070             :       GIR_Done,
    3071             :     // Label 79: @6658
    3072             :     GIM_Try, /*On fail goto*//*Label 80*/ 6727,
    3073             :       GIM_CheckFeatures, GIFBS_HasNEON_HasFullFP16,
    3074             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3075             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    3076             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    3077             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3078             :       // MIs[0] Rd
    3079             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    3080             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    3081             :       // MIs[0] Operand 1
    3082             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfp2fxs,
    3083             :       // MIs[0] Rn
    3084             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    3085             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3086             :       // MIs[0] imm
    3087             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    3088             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    3089             :       // MIs[1] Operand 0
    3090             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    3091             :       // MIs[1] Operand 1
    3092             :       // No operand predicates
    3093             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    3094             :       // (intrinsic_wo_chain:v8i16 345:iPTR, V128:v8f16:$Rn, (imm:i32):$imm)  =>  (FCVTZSv8i16_shift:v8i16 V128:v8f16:$Rn, (imm:i32):$imm)
    3095             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTZSv8i16_shift,
    3096             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3097             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    3098             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    3099             :       GIR_EraseFromParent, /*InsnID*/0,
    3100             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3101             :       GIR_Done,
    3102             :     // Label 80: @6727
    3103             :     GIM_Try, /*On fail goto*//*Label 81*/ 6796,
    3104             :       GIM_CheckFeatures, GIFBS_HasNEON,
    3105             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3106             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    3107             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    3108             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3109             :       // MIs[0] Rd
    3110             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    3111             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    3112             :       // MIs[0] Operand 1
    3113             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfp2fxs,
    3114             :       // MIs[0] Rn
    3115             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    3116             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    3117             :       // MIs[0] imm
    3118             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    3119             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    3120             :       // MIs[1] Operand 0
    3121             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    3122             :       // MIs[1] Operand 1
    3123             :       // No operand predicates
    3124             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    3125             :       // (intrinsic_wo_chain:v2i32 345:iPTR, V64:v2f32:$Rn, (imm:i32):$imm)  =>  (FCVTZSv2i32_shift:v2i32 V64:v2f32:$Rn, (imm:i32):$imm)
    3126             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTZSv2i32_shift,
    3127             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3128             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    3129             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    3130             :       GIR_EraseFromParent, /*InsnID*/0,
    3131             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3132             :       GIR_Done,
    3133             :     // Label 81: @6796
    3134             :     GIM_Try, /*On fail goto*//*Label 82*/ 6865,
    3135             :       GIM_CheckFeatures, GIFBS_HasNEON,
    3136             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3137             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    3138             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    3139             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3140             :       // MIs[0] Rd
    3141             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    3142             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    3143             :       // MIs[0] Operand 1
    3144             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfp2fxs,
    3145             :       // MIs[0] Rn
    3146             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    3147             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3148             :       // MIs[0] imm
    3149             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    3150             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    3151             :       // MIs[1] Operand 0
    3152             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    3153             :       // MIs[1] Operand 1
    3154             :       // No operand predicates
    3155             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    3156             :       // (intrinsic_wo_chain:v4i32 345:iPTR, V128:v4f32:$Rn, (imm:i32):$imm)  =>  (FCVTZSv4i32_shift:v4i32 V128:v4f32:$Rn, (imm:i32):$imm)
    3157             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTZSv4i32_shift,
    3158             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3159             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    3160             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    3161             :       GIR_EraseFromParent, /*InsnID*/0,
    3162             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3163             :       GIR_Done,
    3164             :     // Label 82: @6865
    3165             :     GIM_Try, /*On fail goto*//*Label 83*/ 6934,
    3166             :       GIM_CheckFeatures, GIFBS_HasNEON,
    3167             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3168             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    3169             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    3170             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3171             :       // MIs[0] Rd
    3172             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    3173             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    3174             :       // MIs[0] Operand 1
    3175             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfp2fxs,
    3176             :       // MIs[0] Rn
    3177             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    3178             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3179             :       // MIs[0] imm
    3180             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    3181             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    3182             :       // MIs[1] Operand 0
    3183             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    3184             :       // MIs[1] Operand 1
    3185             :       // No operand predicates
    3186             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    3187             :       // (intrinsic_wo_chain:v2i64 345:iPTR, V128:v2f64:$Rn, (imm:i32):$imm)  =>  (FCVTZSv2i64_shift:v2i64 V128:v2f64:$Rn, (imm:i32):$imm)
    3188             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTZSv2i64_shift,
    3189             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3190             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    3191             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    3192             :       GIR_EraseFromParent, /*InsnID*/0,
    3193             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3194             :       GIR_Done,
    3195             :     // Label 83: @6934
    3196             :     GIM_Try, /*On fail goto*//*Label 84*/ 7003,
    3197             :       GIM_CheckFeatures, GIFBS_HasNEON_HasFullFP16,
    3198             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3199             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    3200             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    3201             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3202             :       // MIs[0] Rd
    3203             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    3204             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    3205             :       // MIs[0] Operand 1
    3206             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfp2fxu,
    3207             :       // MIs[0] Rn
    3208             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    3209             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    3210             :       // MIs[0] imm
    3211             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    3212             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    3213             :       // MIs[1] Operand 0
    3214             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    3215             :       // MIs[1] Operand 1
    3216             :       // No operand predicates
    3217             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    3218             :       // (intrinsic_wo_chain:v4i16 346:iPTR, V64:v4f16:$Rn, (imm:i32):$imm)  =>  (FCVTZUv4i16_shift:v4i16 V64:v4f16:$Rn, (imm:i32):$imm)
    3219             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTZUv4i16_shift,
    3220             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3221             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    3222             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    3223             :       GIR_EraseFromParent, /*InsnID*/0,
    3224             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3225             :       GIR_Done,
    3226             :     // Label 84: @7003
    3227             :     GIM_Try, /*On fail goto*//*Label 85*/ 7072,
    3228             :       GIM_CheckFeatures, GIFBS_HasNEON_HasFullFP16,
    3229             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3230             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    3231             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    3232             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3233             :       // MIs[0] Rd
    3234             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    3235             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    3236             :       // MIs[0] Operand 1
    3237             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfp2fxu,
    3238             :       // MIs[0] Rn
    3239             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    3240             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3241             :       // MIs[0] imm
    3242             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    3243             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    3244             :       // MIs[1] Operand 0
    3245             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    3246             :       // MIs[1] Operand 1
    3247             :       // No operand predicates
    3248             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    3249             :       // (intrinsic_wo_chain:v8i16 346:iPTR, V128:v8f16:$Rn, (imm:i32):$imm)  =>  (FCVTZUv8i16_shift:v8i16 V128:v8f16:$Rn, (imm:i32):$imm)
    3250             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTZUv8i16_shift,
    3251             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3252             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    3253             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    3254             :       GIR_EraseFromParent, /*InsnID*/0,
    3255             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3256             :       GIR_Done,
    3257             :     // Label 85: @7072
    3258             :     GIM_Try, /*On fail goto*//*Label 86*/ 7141,
    3259             :       GIM_CheckFeatures, GIFBS_HasNEON,
    3260             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3261             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    3262             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    3263             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3264             :       // MIs[0] Rd
    3265             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    3266             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    3267             :       // MIs[0] Operand 1
    3268             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfp2fxu,
    3269             :       // MIs[0] Rn
    3270             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    3271             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    3272             :       // MIs[0] imm
    3273             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    3274             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    3275             :       // MIs[1] Operand 0
    3276             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    3277             :       // MIs[1] Operand 1
    3278             :       // No operand predicates
    3279             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    3280             :       // (intrinsic_wo_chain:v2i32 346:iPTR, V64:v2f32:$Rn, (imm:i32):$imm)  =>  (FCVTZUv2i32_shift:v2i32 V64:v2f32:$Rn, (imm:i32):$imm)
    3281             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTZUv2i32_shift,
    3282             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3283             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    3284             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    3285             :       GIR_EraseFromParent, /*InsnID*/0,
    3286             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3287             :       GIR_Done,
    3288             :     // Label 86: @7141
    3289             :     GIM_Try, /*On fail goto*//*Label 87*/ 7210,
    3290             :       GIM_CheckFeatures, GIFBS_HasNEON,
    3291             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3292             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    3293             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    3294             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3295             :       // MIs[0] Rd
    3296             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    3297             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    3298             :       // MIs[0] Operand 1
    3299             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfp2fxu,
    3300             :       // MIs[0] Rn
    3301             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    3302             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3303             :       // MIs[0] imm
    3304             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    3305             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    3306             :       // MIs[1] Operand 0
    3307             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    3308             :       // MIs[1] Operand 1
    3309             :       // No operand predicates
    3310             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    3311             :       // (intrinsic_wo_chain:v4i32 346:iPTR, V128:v4f32:$Rn, (imm:i32):$imm)  =>  (FCVTZUv4i32_shift:v4i32 V128:v4f32:$Rn, (imm:i32):$imm)
    3312             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTZUv4i32_shift,
    3313             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3314             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    3315             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    3316             :       GIR_EraseFromParent, /*InsnID*/0,
    3317             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3318             :       GIR_Done,
    3319             :     // Label 87: @7210
    3320             :     GIM_Try, /*On fail goto*//*Label 88*/ 7279,
    3321             :       GIM_CheckFeatures, GIFBS_HasNEON,
    3322             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3323             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    3324             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    3325             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3326             :       // MIs[0] Rd
    3327             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    3328             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    3329             :       // MIs[0] Operand 1
    3330             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfp2fxu,
    3331             :       // MIs[0] Rn
    3332             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    3333             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3334             :       // MIs[0] imm
    3335             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    3336             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    3337             :       // MIs[1] Operand 0
    3338             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    3339             :       // MIs[1] Operand 1
    3340             :       // No operand predicates
    3341             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    3342             :       // (intrinsic_wo_chain:v2i64 346:iPTR, V128:v2f64:$Rn, (imm:i32):$imm)  =>  (FCVTZUv2i64_shift:v2i64 V128:v2f64:$Rn, (imm:i32):$imm)
    3343             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTZUv2i64_shift,
    3344             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3345             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    3346             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    3347             :       GIR_EraseFromParent, /*InsnID*/0,
    3348             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3349             :       GIR_Done,
    3350             :     // Label 88: @7279
    3351             :     GIM_Try, /*On fail goto*//*Label 89*/ 7348,
    3352             :       GIM_CheckFeatures, GIFBS_HasNEON_HasFullFP16,
    3353             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3354             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    3355             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    3356             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3357             :       // MIs[0] Rd
    3358             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    3359             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    3360             :       // MIs[0] Operand 1
    3361             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfxs2fp,
    3362             :       // MIs[0] Rn
    3363             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    3364             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    3365             :       // MIs[0] imm
    3366             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    3367             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    3368             :       // MIs[1] Operand 0
    3369             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    3370             :       // MIs[1] Operand 1
    3371             :       // No operand predicates
    3372             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    3373             :       // (intrinsic_wo_chain:v4f16 348:iPTR, V64:v4i16:$Rn, (imm:i32):$imm)  =>  (SCVTFv4i16_shift:v4f16 V64:v4i16:$Rn, (imm:i32):$imm)
    3374             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SCVTFv4i16_shift,
    3375             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3376             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    3377             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    3378             :       GIR_EraseFromParent, /*InsnID*/0,
    3379             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3380             :       GIR_Done,
    3381             :     // Label 89: @7348
    3382             :     GIM_Try, /*On fail goto*//*Label 90*/ 7417,
    3383             :       GIM_CheckFeatures, GIFBS_HasNEON_HasFullFP16,
    3384             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3385             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    3386             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    3387             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3388             :       // MIs[0] Rd
    3389             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    3390             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    3391             :       // MIs[0] Operand 1
    3392             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfxs2fp,
    3393             :       // MIs[0] Rn
    3394             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    3395             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3396             :       // MIs[0] imm
    3397             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    3398             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    3399             :       // MIs[1] Operand 0
    3400             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    3401             :       // MIs[1] Operand 1
    3402             :       // No operand predicates
    3403             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    3404             :       // (intrinsic_wo_chain:v8f16 348:iPTR, V128:v8i16:$Rn, (imm:i32):$imm)  =>  (SCVTFv8i16_shift:v8f16 V128:v8i16:$Rn, (imm:i32):$imm)
    3405             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SCVTFv8i16_shift,
    3406             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3407             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    3408             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    3409             :       GIR_EraseFromParent, /*InsnID*/0,
    3410             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3411             :       GIR_Done,
    3412             :     // Label 90: @7417
    3413             :     GIM_Try, /*On fail goto*//*Label 91*/ 7486,
    3414             :       GIM_CheckFeatures, GIFBS_HasNEON,
    3415             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3416             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    3417             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    3418             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3419             :       // MIs[0] Rd
    3420             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    3421             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    3422             :       // MIs[0] Operand 1
    3423             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfxs2fp,
    3424             :       // MIs[0] Rn
    3425             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    3426             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    3427             :       // MIs[0] imm
    3428             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    3429             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    3430             :       // MIs[1] Operand 0
    3431             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    3432             :       // MIs[1] Operand 1
    3433             :       // No operand predicates
    3434             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    3435             :       // (intrinsic_wo_chain:v2f32 348:iPTR, V64:v2i32:$Rn, (imm:i32):$imm)  =>  (SCVTFv2i32_shift:v2f32 V64:v2i32:$Rn, (imm:i32):$imm)
    3436             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SCVTFv2i32_shift,
    3437             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3438             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    3439             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    3440             :       GIR_EraseFromParent, /*InsnID*/0,
    3441             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3442             :       GIR_Done,
    3443             :     // Label 91: @7486
    3444             :     GIM_Try, /*On fail goto*//*Label 92*/ 7555,
    3445             :       GIM_CheckFeatures, GIFBS_HasNEON,
    3446             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3447             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    3448             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    3449             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3450             :       // MIs[0] Rd
    3451             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    3452             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    3453             :       // MIs[0] Operand 1
    3454             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfxs2fp,
    3455             :       // MIs[0] Rn
    3456             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    3457             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3458             :       // MIs[0] imm
    3459             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    3460             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    3461             :       // MIs[1] Operand 0
    3462             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    3463             :       // MIs[1] Operand 1
    3464             :       // No operand predicates
    3465             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    3466             :       // (intrinsic_wo_chain:v4f32 348:iPTR, V128:v4i32:$Rn, (imm:i32):$imm)  =>  (SCVTFv4i32_shift:v4f32 V128:v4i32:$Rn, (imm:i32):$imm)
    3467             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SCVTFv4i32_shift,
    3468             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3469             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    3470             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    3471             :       GIR_EraseFromParent, /*InsnID*/0,
    3472             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3473             :       GIR_Done,
    3474             :     // Label 92: @7555
    3475             :     GIM_Try, /*On fail goto*//*Label 93*/ 7624,
    3476             :       GIM_CheckFeatures, GIFBS_HasNEON,
    3477             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3478             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    3479             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    3480             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3481             :       // MIs[0] Rd
    3482             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    3483             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    3484             :       // MIs[0] Operand 1
    3485             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfxs2fp,
    3486             :       // MIs[0] Rn
    3487             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    3488             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3489             :       // MIs[0] imm
    3490             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    3491             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    3492             :       // MIs[1] Operand 0
    3493             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    3494             :       // MIs[1] Operand 1
    3495             :       // No operand predicates
    3496             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    3497             :       // (intrinsic_wo_chain:v2f64 348:iPTR, V128:v2i64:$Rn, (imm:i32):$imm)  =>  (SCVTFv2i64_shift:v2f64 V128:v2i64:$Rn, (imm:i32):$imm)
    3498             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SCVTFv2i64_shift,
    3499             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3500             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    3501             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    3502             :       GIR_EraseFromParent, /*InsnID*/0,
    3503             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3504             :       GIR_Done,
    3505             :     // Label 93: @7624
    3506             :     GIM_Try, /*On fail goto*//*Label 94*/ 7696,
    3507             :       GIM_CheckFeatures, GIFBS_HasNEON,
    3508             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3509             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    3510             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    3511             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3512             :       // MIs[0] Rd
    3513             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
    3514             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    3515             :       // MIs[0] Operand 1
    3516             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_rshrn,
    3517             :       // MIs[0] Rn
    3518             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    3519             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3520             :       // MIs[0] imm
    3521             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    3522             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    3523             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR16Narrow,
    3524             :       // MIs[1] Operand 0
    3525             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    3526             :       // MIs[1] Operand 1
    3527             :       // No operand predicates
    3528             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    3529             :       // (intrinsic_wo_chain:v8i8 258:iPTR, V128:v8i16:$Rn, (imm:i32)<<P:Predicate_vecshiftR16Narrow>>:$imm)  =>  (RSHRNv8i8_shift:v8i8 V128:v8i16:$Rn, (imm:i32):$imm)
    3530             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::RSHRNv8i8_shift,
    3531             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3532             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    3533             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    3534             :       GIR_EraseFromParent, /*InsnID*/0,
    3535             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3536             :       GIR_Done,
    3537             :     // Label 94: @7696
    3538             :     GIM_Try, /*On fail goto*//*Label 95*/ 7768,
    3539             :       GIM_CheckFeatures, GIFBS_HasNEON,
    3540             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3541             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    3542             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    3543             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3544             :       // MIs[0] Rd
    3545             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    3546             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    3547             :       // MIs[0] Operand 1
    3548             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_rshrn,
    3549             :       // MIs[0] Rn
    3550             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    3551             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3552             :       // MIs[0] imm
    3553             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    3554             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    3555             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR32Narrow,
    3556             :       // MIs[1] Operand 0
    3557             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    3558             :       // MIs[1] Operand 1
    3559             :       // No operand predicates
    3560             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    3561             :       // (intrinsic_wo_chain:v4i16 258:iPTR, V128:v4i32:$Rn, (imm:i32)<<P:Predicate_vecshiftR32Narrow>>:$imm)  =>  (RSHRNv4i16_shift:v4i16 V128:v4i32:$Rn, (imm:i32):$imm)
    3562             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::RSHRNv4i16_shift,
    3563             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3564             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    3565             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    3566             :       GIR_EraseFromParent, /*InsnID*/0,
    3567             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3568             :       GIR_Done,
    3569             :     // Label 95: @7768
    3570             :     GIM_Try, /*On fail goto*//*Label 96*/ 7840,
    3571             :       GIM_CheckFeatures, GIFBS_HasNEON,
    3572             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3573             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    3574             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    3575             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3576             :       // MIs[0] Rd
    3577             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    3578             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    3579             :       // MIs[0] Operand 1
    3580             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_rshrn,
    3581             :       // MIs[0] Rn
    3582             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    3583             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3584             :       // MIs[0] imm
    3585             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    3586             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    3587             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR64Narrow,
    3588             :       // MIs[1] Operand 0
    3589             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    3590             :       // MIs[1] Operand 1
    3591             :       // No operand predicates
    3592             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    3593             :       // (intrinsic_wo_chain:v2i32 258:iPTR, V128:v2i64:$Rn, (imm:i32)<<P:Predicate_vecshiftR64Narrow>>:$imm)  =>  (RSHRNv2i32_shift:v2i32 V128:v2i64:$Rn, (imm:i32):$imm)
    3594             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::RSHRNv2i32_shift,
    3595             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3596             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    3597             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    3598             :       GIR_EraseFromParent, /*InsnID*/0,
    3599             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3600             :       GIR_Done,
    3601             :     // Label 96: @7840
    3602             :     GIM_Try, /*On fail goto*//*Label 97*/ 7912,
    3603             :       GIM_CheckFeatures, GIFBS_HasNEON,
    3604             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3605             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    3606             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    3607             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3608             :       // MIs[0] Rd
    3609             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
    3610             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    3611             :       // MIs[0] Operand 1
    3612             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqrshrn,
    3613             :       // MIs[0] Rn
    3614             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    3615             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3616             :       // MIs[0] imm
    3617             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    3618             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    3619             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR16Narrow,
    3620             :       // MIs[1] Operand 0
    3621             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    3622             :       // MIs[1] Operand 1
    3623             :       // No operand predicates
    3624             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    3625             :       // (intrinsic_wo_chain:v8i8 285:iPTR, V128:v8i16:$Rn, (imm:i32)<<P:Predicate_vecshiftR16Narrow>>:$imm)  =>  (SQRSHRNv8i8_shift:v8i8 V128:v8i16:$Rn, (imm:i32):$imm)
    3626             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRSHRNv8i8_shift,
    3627             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3628             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    3629             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    3630             :       GIR_EraseFromParent, /*InsnID*/0,
    3631             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3632             :       GIR_Done,
    3633             :     // Label 97: @7912
    3634             :     GIM_Try, /*On fail goto*//*Label 98*/ 7984,
    3635             :       GIM_CheckFeatures, GIFBS_HasNEON,
    3636             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3637             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    3638             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    3639             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3640             :       // MIs[0] Rd
    3641             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    3642             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    3643             :       // MIs[0] Operand 1
    3644             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqrshrn,
    3645             :       // MIs[0] Rn
    3646             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    3647             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3648             :       // MIs[0] imm
    3649             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    3650             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    3651             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR32Narrow,
    3652             :       // MIs[1] Operand 0
    3653             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    3654             :       // MIs[1] Operand 1
    3655             :       // No operand predicates
    3656             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    3657             :       // (intrinsic_wo_chain:v4i16 285:iPTR, V128:v4i32:$Rn, (imm:i32)<<P:Predicate_vecshiftR32Narrow>>:$imm)  =>  (SQRSHRNv4i16_shift:v4i16 V128:v4i32:$Rn, (imm:i32):$imm)
    3658             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRSHRNv4i16_shift,
    3659             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3660             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    3661             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    3662             :       GIR_EraseFromParent, /*InsnID*/0,
    3663             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3664             :       GIR_Done,
    3665             :     // Label 98: @7984
    3666             :     GIM_Try, /*On fail goto*//*Label 99*/ 8056,
    3667             :       GIM_CheckFeatures, GIFBS_HasNEON,
    3668             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3669             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    3670             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    3671             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3672             :       // MIs[0] Rd
    3673             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    3674             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    3675             :       // MIs[0] Operand 1
    3676             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqrshrn,
    3677             :       // MIs[0] Rn
    3678             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    3679             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3680             :       // MIs[0] imm
    3681             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    3682             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    3683             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR64Narrow,
    3684             :       // MIs[1] Operand 0
    3685             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    3686             :       // MIs[1] Operand 1
    3687             :       // No operand predicates
    3688             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    3689             :       // (intrinsic_wo_chain:v2i32 285:iPTR, V128:v2i64:$Rn, (imm:i32)<<P:Predicate_vecshiftR64Narrow>>:$imm)  =>  (SQRSHRNv2i32_shift:v2i32 V128:v2i64:$Rn, (imm:i32):$imm)
    3690             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRSHRNv2i32_shift,
    3691             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3692             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    3693             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    3694             :       GIR_EraseFromParent, /*InsnID*/0,
    3695             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3696             :       GIR_Done,
    3697             :     // Label 99: @8056
    3698             :     GIM_Try, /*On fail goto*//*Label 100*/ 8128,
    3699             :       GIM_CheckFeatures, GIFBS_HasNEON,
    3700             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3701             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    3702             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    3703             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3704             :       // MIs[0] Rd
    3705             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
    3706             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    3707             :       // MIs[0] Operand 1
    3708             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqrshrun,
    3709             :       // MIs[0] Rn
    3710             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    3711             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3712             :       // MIs[0] imm
    3713             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    3714             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    3715             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR16Narrow,
    3716             :       // MIs[1] Operand 0
    3717             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    3718             :       // MIs[1] Operand 1
    3719             :       // No operand predicates
    3720             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    3721             :       // (intrinsic_wo_chain:v8i8 286:iPTR, V128:v8i16:$Rn, (imm:i32)<<P:Predicate_vecshiftR16Narrow>>:$imm)  =>  (SQRSHRUNv8i8_shift:v8i8 V128:v8i16:$Rn, (imm:i32):$imm)
    3722             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRSHRUNv8i8_shift,
    3723             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3724             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    3725             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    3726             :       GIR_EraseFromParent, /*InsnID*/0,
    3727             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3728             :       GIR_Done,
    3729             :     // Label 100: @8128
    3730             :     GIM_Try, /*On fail goto*//*Label 101*/ 8200,
    3731             :       GIM_CheckFeatures, GIFBS_HasNEON,
    3732             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3733             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    3734             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    3735             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3736             :       // MIs[0] Rd
    3737             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    3738             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    3739             :       // MIs[0] Operand 1
    3740             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqrshrun,
    3741             :       // MIs[0] Rn
    3742             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    3743             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3744             :       // MIs[0] imm
    3745             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    3746             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    3747             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR32Narrow,
    3748             :       // MIs[1] Operand 0
    3749             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    3750             :       // MIs[1] Operand 1
    3751             :       // No operand predicates
    3752             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    3753             :       // (intrinsic_wo_chain:v4i16 286:iPTR, V128:v4i32:$Rn, (imm:i32)<<P:Predicate_vecshiftR32Narrow>>:$imm)  =>  (SQRSHRUNv4i16_shift:v4i16 V128:v4i32:$Rn, (imm:i32):$imm)
    3754             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRSHRUNv4i16_shift,
    3755             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3756             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    3757             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    3758             :       GIR_EraseFromParent, /*InsnID*/0,
    3759             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3760             :       GIR_Done,
    3761             :     // Label 101: @8200
    3762             :     GIM_Try, /*On fail goto*//*Label 102*/ 8272,
    3763             :       GIM_CheckFeatures, GIFBS_HasNEON,
    3764             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3765             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    3766             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    3767             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3768             :       // MIs[0] Rd
    3769             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    3770             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    3771             :       // MIs[0] Operand 1
    3772             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqrshrun,
    3773             :       // MIs[0] Rn
    3774             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    3775             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3776             :       // MIs[0] imm
    3777             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    3778             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    3779             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR64Narrow,
    3780             :       // MIs[1] Operand 0
    3781             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    3782             :       // MIs[1] Operand 1
    3783             :       // No operand predicates
    3784             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    3785             :       // (intrinsic_wo_chain:v2i32 286:iPTR, V128:v2i64:$Rn, (imm:i32)<<P:Predicate_vecshiftR64Narrow>>:$imm)  =>  (SQRSHRUNv2i32_shift:v2i32 V128:v2i64:$Rn, (imm:i32):$imm)
    3786             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRSHRUNv2i32_shift,
    3787             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3788             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    3789             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    3790             :       GIR_EraseFromParent, /*InsnID*/0,
    3791             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3792             :       GIR_Done,
    3793             :     // Label 102: @8272
    3794             :     GIM_Try, /*On fail goto*//*Label 103*/ 8344,
    3795             :       GIM_CheckFeatures, GIFBS_HasNEON,
    3796             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3797             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    3798             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    3799             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3800             :       // MIs[0] Rd
    3801             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
    3802             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    3803             :       // MIs[0] Operand 1
    3804             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqshrn,
    3805             :       // MIs[0] Rn
    3806             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    3807             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3808             :       // MIs[0] imm
    3809             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    3810             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    3811             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR16Narrow,
    3812             :       // MIs[1] Operand 0
    3813             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    3814             :       // MIs[1] Operand 1
    3815             :       // No operand predicates
    3816             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    3817             :       // (intrinsic_wo_chain:v8i8 289:iPTR, V128:v8i16:$Rn, (imm:i32)<<P:Predicate_vecshiftR16Narrow>>:$imm)  =>  (SQSHRNv8i8_shift:v8i8 V128:v8i16:$Rn, (imm:i32):$imm)
    3818             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSHRNv8i8_shift,
    3819             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3820             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    3821             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    3822             :       GIR_EraseFromParent, /*InsnID*/0,
    3823             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3824             :       GIR_Done,
    3825             :     // Label 103: @8344
    3826             :     GIM_Try, /*On fail goto*//*Label 104*/ 8416,
    3827             :       GIM_CheckFeatures, GIFBS_HasNEON,
    3828             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3829             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    3830             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    3831             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3832             :       // MIs[0] Rd
    3833             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    3834             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    3835             :       // MIs[0] Operand 1
    3836             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqshrn,
    3837             :       // MIs[0] Rn
    3838             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    3839             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3840             :       // MIs[0] imm
    3841             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    3842             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    3843             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR32Narrow,
    3844             :       // MIs[1] Operand 0
    3845             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    3846             :       // MIs[1] Operand 1
    3847             :       // No operand predicates
    3848             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    3849             :       // (intrinsic_wo_chain:v4i16 289:iPTR, V128:v4i32:$Rn, (imm:i32)<<P:Predicate_vecshiftR32Narrow>>:$imm)  =>  (SQSHRNv4i16_shift:v4i16 V128:v4i32:$Rn, (imm:i32):$imm)
    3850             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSHRNv4i16_shift,
    3851             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3852             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    3853             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    3854             :       GIR_EraseFromParent, /*InsnID*/0,
    3855             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3856             :       GIR_Done,
    3857             :     // Label 104: @8416
    3858             :     GIM_Try, /*On fail goto*//*Label 105*/ 8488,
    3859             :       GIM_CheckFeatures, GIFBS_HasNEON,
    3860             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3861             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    3862             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    3863             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3864             :       // MIs[0] Rd
    3865             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    3866             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    3867             :       // MIs[0] Operand 1
    3868             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqshrn,
    3869             :       // MIs[0] Rn
    3870             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    3871             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3872             :       // MIs[0] imm
    3873             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    3874             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    3875             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR64Narrow,
    3876             :       // MIs[1] Operand 0
    3877             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    3878             :       // MIs[1] Operand 1
    3879             :       // No operand predicates
    3880             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    3881             :       // (intrinsic_wo_chain:v2i32 289:iPTR, V128:v2i64:$Rn, (imm:i32)<<P:Predicate_vecshiftR64Narrow>>:$imm)  =>  (SQSHRNv2i32_shift:v2i32 V128:v2i64:$Rn, (imm:i32):$imm)
    3882             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSHRNv2i32_shift,
    3883             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3884             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    3885             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    3886             :       GIR_EraseFromParent, /*InsnID*/0,
    3887             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3888             :       GIR_Done,
    3889             :     // Label 105: @8488
    3890             :     GIM_Try, /*On fail goto*//*Label 106*/ 8560,
    3891             :       GIM_CheckFeatures, GIFBS_HasNEON,
    3892             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3893             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    3894             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    3895             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3896             :       // MIs[0] Rd
    3897             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
    3898             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    3899             :       // MIs[0] Operand 1
    3900             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqshrun,
    3901             :       // MIs[0] Rn
    3902             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    3903             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3904             :       // MIs[0] imm
    3905             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    3906             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    3907             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR16Narrow,
    3908             :       // MIs[1] Operand 0
    3909             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    3910             :       // MIs[1] Operand 1
    3911             :       // No operand predicates
    3912             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    3913             :       // (intrinsic_wo_chain:v8i8 290:iPTR, V128:v8i16:$Rn, (imm:i32)<<P:Predicate_vecshiftR16Narrow>>:$imm)  =>  (SQSHRUNv8i8_shift:v8i8 V128:v8i16:$Rn, (imm:i32):$imm)
    3914             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSHRUNv8i8_shift,
    3915             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3916             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    3917             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    3918             :       GIR_EraseFromParent, /*InsnID*/0,
    3919             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3920             :       GIR_Done,
    3921             :     // Label 106: @8560
    3922             :     GIM_Try, /*On fail goto*//*Label 107*/ 8632,
    3923             :       GIM_CheckFeatures, GIFBS_HasNEON,
    3924             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3925             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    3926             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    3927             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3928             :       // MIs[0] Rd
    3929             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    3930             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    3931             :       // MIs[0] Operand 1
    3932             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqshrun,
    3933             :       // MIs[0] Rn
    3934             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    3935             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3936             :       // MIs[0] imm
    3937             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    3938             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    3939             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR32Narrow,
    3940             :       // MIs[1] Operand 0
    3941             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    3942             :       // MIs[1] Operand 1
    3943             :       // No operand predicates
    3944             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    3945             :       // (intrinsic_wo_chain:v4i16 290:iPTR, V128:v4i32:$Rn, (imm:i32)<<P:Predicate_vecshiftR32Narrow>>:$imm)  =>  (SQSHRUNv4i16_shift:v4i16 V128:v4i32:$Rn, (imm:i32):$imm)
    3946             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSHRUNv4i16_shift,
    3947             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3948             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    3949             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    3950             :       GIR_EraseFromParent, /*InsnID*/0,
    3951             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3952             :       GIR_Done,
    3953             :     // Label 107: @8632
    3954             :     GIM_Try, /*On fail goto*//*Label 108*/ 8704,
    3955             :       GIM_CheckFeatures, GIFBS_HasNEON,
    3956             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3957             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    3958             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    3959             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3960             :       // MIs[0] Rd
    3961             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    3962             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    3963             :       // MIs[0] Operand 1
    3964             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqshrun,
    3965             :       // MIs[0] Rn
    3966             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    3967             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3968             :       // MIs[0] imm
    3969             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    3970             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    3971             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR64Narrow,
    3972             :       // MIs[1] Operand 0
    3973             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    3974             :       // MIs[1] Operand 1
    3975             :       // No operand predicates
    3976             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    3977             :       // (intrinsic_wo_chain:v2i32 290:iPTR, V128:v2i64:$Rn, (imm:i32)<<P:Predicate_vecshiftR64Narrow>>:$imm)  =>  (SQSHRUNv2i32_shift:v2i32 V128:v2i64:$Rn, (imm:i32):$imm)
    3978             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSHRUNv2i32_shift,
    3979             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3980             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    3981             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    3982             :       GIR_EraseFromParent, /*InsnID*/0,
    3983             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3984             :       GIR_Done,
    3985             :     // Label 108: @8704
    3986             :     GIM_Try, /*On fail goto*//*Label 109*/ 8773,
    3987             :       GIM_CheckFeatures, GIFBS_HasNEON_HasFullFP16,
    3988             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3989             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    3990             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    3991             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3992             :       // MIs[0] Rd
    3993             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    3994             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    3995             :       // MIs[0] Operand 1
    3996             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfxu2fp,
    3997             :       // MIs[0] Rn
    3998             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    3999             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4000             :       // MIs[0] imm
    4001             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    4002             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    4003             :       // MIs[1] Operand 0
    4004             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    4005             :       // MIs[1] Operand 1
    4006             :       // No operand predicates
    4007             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    4008             :       // (intrinsic_wo_chain:v4f16 349:iPTR, V64:v4i16:$Rn, (imm:i32):$imm)  =>  (UCVTFv4i16_shift:v4f16 V64:v4i16:$Rn, (imm:i32):$imm)
    4009             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UCVTFv4i16_shift,
    4010             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4011             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    4012             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    4013             :       GIR_EraseFromParent, /*InsnID*/0,
    4014             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4015             :       GIR_Done,
    4016             :     // Label 109: @8773
    4017             :     GIM_Try, /*On fail goto*//*Label 110*/ 8842,
    4018             :       GIM_CheckFeatures, GIFBS_HasNEON_HasFullFP16,
    4019             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    4020             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    4021             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    4022             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    4023             :       // MIs[0] Rd
    4024             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    4025             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    4026             :       // MIs[0] Operand 1
    4027             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfxu2fp,
    4028             :       // MIs[0] Rn
    4029             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    4030             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    4031             :       // MIs[0] imm
    4032             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    4033             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    4034             :       // MIs[1] Operand 0
    4035             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    4036             :       // MIs[1] Operand 1
    4037             :       // No operand predicates
    4038             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    4039             :       // (intrinsic_wo_chain:v8f16 349:iPTR, V128:v8i16:$Rn, (imm:i32):$imm)  =>  (UCVTFv8i16_shift:v8f16 V128:v8i16:$Rn, (imm:i32):$imm)
    4040             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UCVTFv8i16_shift,
    4041             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4042             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    4043             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    4044             :       GIR_EraseFromParent, /*InsnID*/0,
    4045             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4046             :       GIR_Done,
    4047             :     // Label 110: @8842
    4048             :     GIM_Try, /*On fail goto*//*Label 111*/ 8911,
    4049             :       GIM_CheckFeatures, GIFBS_HasNEON,
    4050             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    4051             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    4052             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    4053             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    4054             :       // MIs[0] Rd
    4055             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    4056             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    4057             :       // MIs[0] Operand 1
    4058             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfxu2fp,
    4059             :       // MIs[0] Rn
    4060             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    4061             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4062             :       // MIs[0] imm
    4063             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    4064             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    4065             :       // MIs[1] Operand 0
    4066             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    4067             :       // MIs[1] Operand 1
    4068             :       // No operand predicates
    4069             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    4070             :       // (intrinsic_wo_chain:v2f32 349:iPTR, V64:v2i32:$Rn, (imm:i32):$imm)  =>  (UCVTFv2i32_shift:v2f32 V64:v2i32:$Rn, (imm:i32):$imm)
    4071             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UCVTFv2i32_shift,
    4072             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4073             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    4074             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    4075             :       GIR_EraseFromParent, /*InsnID*/0,
    4076             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4077             :       GIR_Done,
    4078             :     // Label 111: @8911
    4079             :     GIM_Try, /*On fail goto*//*Label 112*/ 8980,
    4080             :       GIM_CheckFeatures, GIFBS_HasNEON,
    4081             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    4082             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    4083             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    4084             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    4085             :       // MIs[0] Rd
    4086             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    4087             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    4088             :       // MIs[0] Operand 1
    4089             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfxu2fp,
    4090             :       // MIs[0] Rn
    4091             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    4092             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    4093             :       // MIs[0] imm
    4094             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    4095             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    4096             :       // MIs[1] Operand 0
    4097             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    4098             :       // MIs[1] Operand 1
    4099             :       // No operand predicates
    4100             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    4101             :       // (intrinsic_wo_chain:v4f32 349:iPTR, V128:v4i32:$Rn, (imm:i32):$imm)  =>  (UCVTFv4i32_shift:v4f32 V128:v4i32:$Rn, (imm:i32):$imm)
    4102             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UCVTFv4i32_shift,
    4103             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4104             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    4105             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    4106             :       GIR_EraseFromParent, /*InsnID*/0,
    4107             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4108             :       GIR_Done,
    4109             :     // Label 112: @8980
    4110             :     GIM_Try, /*On fail goto*//*Label 113*/ 9049,
    4111             :       GIM_CheckFeatures, GIFBS_HasNEON,
    4112             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    4113             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    4114             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    4115             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    4116             :       // MIs[0] Rd
    4117             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    4118             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    4119             :       // MIs[0] Operand 1
    4120             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfxu2fp,
    4121             :       // MIs[0] Rn
    4122             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    4123             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    4124             :       // MIs[0] imm
    4125             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    4126             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    4127             :       // MIs[1] Operand 0
    4128             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    4129             :       // MIs[1] Operand 1
    4130             :       // No operand predicates
    4131             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    4132             :       // (intrinsic_wo_chain:v2f64 349:iPTR, V128:v2i64:$Rn, (imm:i32):$imm)  =>  (UCVTFv2i64_shift:v2f64 V128:v2i64:$Rn, (imm:i32):$imm)
    4133             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UCVTFv2i64_shift,
    4134             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4135             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    4136             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    4137             :       GIR_EraseFromParent, /*InsnID*/0,
    4138             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4139             :       GIR_Done,
    4140             :     // Label 113: @9049
    4141             :     GIM_Try, /*On fail goto*//*Label 114*/ 9121,
    4142             :       GIM_CheckFeatures, GIFBS_HasNEON,
    4143             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    4144             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    4145             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    4146             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    4147             :       // MIs[0] Rd
    4148             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
    4149             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    4150             :       // MIs[0] Operand 1
    4151             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqrshrn,
    4152             :       // MIs[0] Rn
    4153             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    4154             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    4155             :       // MIs[0] imm
    4156             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    4157             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    4158             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR16Narrow,
    4159             :       // MIs[1] Operand 0
    4160             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    4161             :       // MIs[1] Operand 1
    4162             :       // No operand predicates
    4163             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    4164             :       // (intrinsic_wo_chain:v8i8 332:iPTR, V128:v8i16:$Rn, (imm:i32)<<P:Predicate_vecshiftR16Narrow>>:$imm)  =>  (UQRSHRNv8i8_shift:v8i8 V128:v8i16:$Rn, (imm:i32):$imm)
    4165             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQRSHRNv8i8_shift,
    4166             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4167             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    4168             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    4169             :       GIR_EraseFromParent, /*InsnID*/0,
    4170             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4171             :       GIR_Done,
    4172             :     // Label 114: @9121
    4173             :     GIM_Try, /*On fail goto*//*Label 115*/ 9193,
    4174             :       GIM_CheckFeatures, GIFBS_HasNEON,
    4175             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    4176             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    4177             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    4178             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    4179             :       // MIs[0] Rd
    4180             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    4181             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    4182             :       // MIs[0] Operand 1
    4183             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqrshrn,
    4184             :       // MIs[0] Rn
    4185             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    4186             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    4187             :       // MIs[0] imm
    4188             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    4189             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    4190             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR32Narrow,
    4191             :       // MIs[1] Operand 0
    4192             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    4193             :       // MIs[1] Operand 1
    4194             :       // No operand predicates
    4195             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    4196             :       // (intrinsic_wo_chain:v4i16 332:iPTR, V128:v4i32:$Rn, (imm:i32)<<P:Predicate_vecshiftR32Narrow>>:$imm)  =>  (UQRSHRNv4i16_shift:v4i16 V128:v4i32:$Rn, (imm:i32):$imm)
    4197             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQRSHRNv4i16_shift,
    4198             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4199             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    4200             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    4201             :       GIR_EraseFromParent, /*InsnID*/0,
    4202             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4203             :       GIR_Done,
    4204             :     // Label 115: @9193
    4205             :     GIM_Try, /*On fail goto*//*Label 116*/ 9265,
    4206             :       GIM_CheckFeatures, GIFBS_HasNEON,
    4207             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    4208             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    4209             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    4210             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    4211             :       // MIs[0] Rd
    4212             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    4213             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    4214             :       // MIs[0] Operand 1
    4215             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqrshrn,
    4216             :       // MIs[0] Rn
    4217             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    4218             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    4219             :       // MIs[0] imm
    4220             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    4221             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    4222             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR64Narrow,
    4223             :       // MIs[1] Operand 0
    4224             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    4225             :       // MIs[1] Operand 1
    4226             :       // No operand predicates
    4227             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    4228             :       // (intrinsic_wo_chain:v2i32 332:iPTR, V128:v2i64:$Rn, (imm:i32)<<P:Predicate_vecshiftR64Narrow>>:$imm)  =>  (UQRSHRNv2i32_shift:v2i32 V128:v2i64:$Rn, (imm:i32):$imm)
    4229             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQRSHRNv2i32_shift,
    4230             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4231             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    4232             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    4233             :       GIR_EraseFromParent, /*InsnID*/0,
    4234             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4235             :       GIR_Done,
    4236             :     // Label 116: @9265
    4237             :     GIM_Try, /*On fail goto*//*Label 117*/ 9337,
    4238             :       GIM_CheckFeatures, GIFBS_HasNEON,
    4239             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    4240             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    4241             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    4242             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    4243             :       // MIs[0] Rd
    4244             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
    4245             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    4246             :       // MIs[0] Operand 1
    4247             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqshrn,
    4248             :       // MIs[0] Rn
    4249             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    4250             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    4251             :       // MIs[0] imm
    4252             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    4253             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    4254             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR16Narrow,
    4255             :       // MIs[1] Operand 0
    4256             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    4257             :       // MIs[1] Operand 1
    4258             :       // No operand predicates
    4259             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    4260             :       // (intrinsic_wo_chain:v8i8 334:iPTR, V128:v8i16:$Rn, (imm:i32)<<P:Predicate_vecshiftR16Narrow>>:$imm)  =>  (UQSHRNv8i8_shift:v8i8 V128:v8i16:$Rn, (imm:i32):$imm)
    4261             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQSHRNv8i8_shift,
    4262             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4263             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    4264             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    4265             :       GIR_EraseFromParent, /*InsnID*/0,
    4266             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4267             :       GIR_Done,
    4268             :     // Label 117: @9337
    4269             :     GIM_Try, /*On fail goto*//*Label 118*/ 9409,
    4270             :       GIM_CheckFeatures, GIFBS_HasNEON,
    4271             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    4272             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    4273             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    4274             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    4275             :       // MIs[0] Rd
    4276             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    4277             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    4278             :       // MIs[0] Operand 1
    4279             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqshrn,
    4280             :       // MIs[0] Rn
    4281             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    4282             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    4283             :       // MIs[0] imm
    4284             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    4285             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    4286             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR32Narrow,
    4287             :       // MIs[1] Operand 0
    4288             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    4289             :       // MIs[1] Operand 1
    4290             :       // No operand predicates
    4291             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    4292             :       // (intrinsic_wo_chain:v4i16 334:iPTR, V128:v4i32:$Rn, (imm:i32)<<P:Predicate_vecshiftR32Narrow>>:$imm)  =>  (UQSHRNv4i16_shift:v4i16 V128:v4i32:$Rn, (imm:i32):$imm)
    4293             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQSHRNv4i16_shift,
    4294             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4295             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    4296             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    4297             :       GIR_EraseFromParent, /*InsnID*/0,
    4298             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4299             :       GIR_Done,
    4300             :     // Label 118: @9409
    4301             :     GIM_Try, /*On fail goto*//*Label 119*/ 9481,
    4302             :       GIM_CheckFeatures, GIFBS_HasNEON,
    4303             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    4304             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    4305             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    4306             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    4307             :       // MIs[0] Rd
    4308             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    4309             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    4310             :       // MIs[0] Operand 1
    4311             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqshrn,
    4312             :       // MIs[0] Rn
    4313             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    4314             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    4315             :       // MIs[0] imm
    4316             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    4317             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    4318             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR64Narrow,
    4319             :       // MIs[1] Operand 0
    4320             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    4321             :       // MIs[1] Operand 1
    4322             :       // No operand predicates
    4323             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    4324             :       // (intrinsic_wo_chain:v2i32 334:iPTR, V128:v2i64:$Rn, (imm:i32)<<P:Predicate_vecshiftR64Narrow>>:$imm)  =>  (UQSHRNv2i32_shift:v2i32 V128:v2i64:$Rn, (imm:i32):$imm)
    4325             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQSHRNv2i32_shift,
    4326             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4327             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    4328             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    4329             :       GIR_EraseFromParent, /*InsnID*/0,
    4330             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4331             :       GIR_Done,
    4332             :     // Label 119: @9481
    4333             :     GIM_Try, /*On fail goto*//*Label 120*/ 9551,
    4334             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    4335             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    4336             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    4337             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    4338             :       // MIs[0] Rd
    4339             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    4340             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
    4341             :       // MIs[0] Operand 1
    4342             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfp2fxs,
    4343             :       // MIs[0] Rn
    4344             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    4345             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
    4346             :       // MIs[0] imm
    4347             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    4348             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    4349             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR32,
    4350             :       // MIs[1] Operand 0
    4351             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    4352             :       // MIs[1] Operand 1
    4353             :       // No operand predicates
    4354             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    4355             :       // (intrinsic_wo_chain:i32 345:iPTR, FPR32:f32:$Rn, (imm:i32)<<P:Predicate_vecshiftR32>>:$imm)  =>  (FCVTZSs:i32 FPR32:f32:$Rn, (imm:i32)<<P:Predicate_vecshiftR32>>:$imm)
    4356             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTZSs,
    4357             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4358             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    4359             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    4360             :       GIR_EraseFromParent, /*InsnID*/0,
    4361             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4362             :       GIR_Done,
    4363             :     // Label 120: @9551
    4364             :     GIM_Try, /*On fail goto*//*Label 121*/ 9621,
    4365             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    4366             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    4367             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    4368             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    4369             :       // MIs[0] Rd
    4370             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    4371             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
    4372             :       // MIs[0] Operand 1
    4373             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfp2fxu,
    4374             :       // MIs[0] Rn
    4375             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    4376             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
    4377             :       // MIs[0] imm
    4378             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    4379             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    4380             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR32,
    4381             :       // MIs[1] Operand 0
    4382             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    4383             :       // MIs[1] Operand 1
    4384             :       // No operand predicates
    4385             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    4386             :       // (intrinsic_wo_chain:i32 346:iPTR, FPR32:f32:$Rn, (imm:i32)<<P:Predicate_vecshiftR32>>:$imm)  =>  (FCVTZUs:i32 FPR32:f32:$Rn, (imm:i32)<<P:Predicate_vecshiftR32>>:$imm)
    4387             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTZUs,
    4388             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4389             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    4390             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    4391             :       GIR_EraseFromParent, /*InsnID*/0,
    4392             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4393             :       GIR_Done,
    4394             :     // Label 121: @9621
    4395             :     GIM_Try, /*On fail goto*//*Label 122*/ 9691,
    4396             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    4397             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    4398             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    4399             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    4400             :       // MIs[0] Rd
    4401             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    4402             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    4403             :       // MIs[0] Operand 1
    4404             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfp2fxs,
    4405             :       // MIs[0] Rn
    4406             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    4407             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4408             :       // MIs[0] imm
    4409             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    4410             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    4411             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR64,
    4412             :       // MIs[1] Operand 0
    4413             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    4414             :       // MIs[1] Operand 1
    4415             :       // No operand predicates
    4416             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    4417             :       // (intrinsic_wo_chain:i64 345:iPTR, FPR64:f64:$Rn, (imm:i32)<<P:Predicate_vecshiftR64>>:$imm)  =>  (FCVTZSd:i64 FPR64:f64:$Rn, (imm:i32)<<P:Predicate_vecshiftR64>>:$imm)
    4418             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTZSd,
    4419             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4420             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    4421             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    4422             :       GIR_EraseFromParent, /*InsnID*/0,
    4423             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4424             :       GIR_Done,
    4425             :     // Label 122: @9691
    4426             :     GIM_Try, /*On fail goto*//*Label 123*/ 9761,
    4427             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    4428             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    4429             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    4430             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    4431             :       // MIs[0] Rd
    4432             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    4433             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    4434             :       // MIs[0] Operand 1
    4435             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfp2fxu,
    4436             :       // MIs[0] Rn
    4437             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    4438             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4439             :       // MIs[0] imm
    4440             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    4441             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    4442             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR64,
    4443             :       // MIs[1] Operand 0
    4444             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    4445             :       // MIs[1] Operand 1
    4446             :       // No operand predicates
    4447             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    4448             :       // (intrinsic_wo_chain:i64 346:iPTR, FPR64:f64:$Rn, (imm:i32)<<P:Predicate_vecshiftR64>>:$imm)  =>  (FCVTZUd:i64 FPR64:f64:$Rn, (imm:i32)<<P:Predicate_vecshiftR64>>:$imm)
    4449             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTZUd,
    4450             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4451             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    4452             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    4453             :       GIR_EraseFromParent, /*InsnID*/0,
    4454             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4455             :       GIR_Done,
    4456             :     // Label 123: @9761
    4457             :     GIM_Try, /*On fail goto*//*Label 124*/ 9831,
    4458             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    4459             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    4460             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    4461             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    4462             :       // MIs[0] Rd
    4463             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    4464             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    4465             :       // MIs[0] Operand 1
    4466             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfp2fxs,
    4467             :       // MIs[0] Rn
    4468             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    4469             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4470             :       // MIs[0] imm
    4471             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    4472             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    4473             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR64,
    4474             :       // MIs[1] Operand 0
    4475             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    4476             :       // MIs[1] Operand 1
    4477             :       // No operand predicates
    4478             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    4479             :       // (intrinsic_wo_chain:v1i64 345:iPTR, FPR64:v1f64:$Rn, (imm:i32)<<P:Predicate_vecshiftR64>>:$imm)  =>  (FCVTZSd:v1i64 FPR64:v1f64:$Rn, (imm:i32)<<P:Predicate_vecshiftR64>>:$imm)
    4480             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTZSd,
    4481             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4482             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    4483             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    4484             :       GIR_EraseFromParent, /*InsnID*/0,
    4485             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4486             :       GIR_Done,
    4487             :     // Label 124: @9831
    4488             :     GIM_Try, /*On fail goto*//*Label 125*/ 9901,
    4489             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    4490             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    4491             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    4492             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    4493             :       // MIs[0] Rd
    4494             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    4495             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    4496             :       // MIs[0] Operand 1
    4497             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfp2fxu,
    4498             :       // MIs[0] Rn
    4499             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    4500             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4501             :       // MIs[0] imm
    4502             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    4503             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    4504             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR64,
    4505             :       // MIs[1] Operand 0
    4506             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    4507             :       // MIs[1] Operand 1
    4508             :       // No operand predicates
    4509             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    4510             :       // (intrinsic_wo_chain:v1i64 346:iPTR, FPR64:v1f64:$Rn, (imm:i32)<<P:Predicate_vecshiftR64>>:$imm)  =>  (FCVTZUd:v1i64 FPR64:v1f64:$Rn, (imm:i32)<<P:Predicate_vecshiftR64>>:$imm)
    4511             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTZUd,
    4512             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4513             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    4514             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    4515             :       GIR_EraseFromParent, /*InsnID*/0,
    4516             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4517             :       GIR_Done,
    4518             :     // Label 125: @9901
    4519             :     GIM_Try, /*On fail goto*//*Label 126*/ 9971,
    4520             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    4521             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    4522             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    4523             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    4524             :       // MIs[0] Rd
    4525             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    4526             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
    4527             :       // MIs[0] Operand 1
    4528             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfxs2fp,
    4529             :       // MIs[0] Rn
    4530             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    4531             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
    4532             :       // MIs[0] imm
    4533             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    4534             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    4535             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR32,
    4536             :       // MIs[1] Operand 0
    4537             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    4538             :       // MIs[1] Operand 1
    4539             :       // No operand predicates
    4540             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    4541             :       // (intrinsic_wo_chain:f32 348:iPTR, FPR32:i32:$Rn, (imm:i32)<<P:Predicate_vecshiftR32>>:$imm)  =>  (SCVTFs:f32 FPR32:i32:$Rn, (imm:i32)<<P:Predicate_vecshiftR32>>:$imm)
    4542             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SCVTFs,
    4543             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4544             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    4545             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    4546             :       GIR_EraseFromParent, /*InsnID*/0,
    4547             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4548             :       GIR_Done,
    4549             :     // Label 126: @9971
    4550             :     GIM_Try, /*On fail goto*//*Label 127*/ 10041,
    4551             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    4552             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    4553             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    4554             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    4555             :       // MIs[0] Rd
    4556             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    4557             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
    4558             :       // MIs[0] Operand 1
    4559             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfxu2fp,
    4560             :       // MIs[0] Rn
    4561             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    4562             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
    4563             :       // MIs[0] imm
    4564             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    4565             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    4566             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR32,
    4567             :       // MIs[1] Operand 0
    4568             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    4569             :       // MIs[1] Operand 1
    4570             :       // No operand predicates
    4571             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    4572             :       // (intrinsic_wo_chain:f32 349:iPTR, FPR32:i32:$Rn, (imm:i32)<<P:Predicate_vecshiftR32>>:$imm)  =>  (UCVTFs:f32 FPR32:i32:$Rn, (imm:i32)<<P:Predicate_vecshiftR32>>:$imm)
    4573             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UCVTFs,
    4574             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4575             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    4576             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    4577             :       GIR_EraseFromParent, /*InsnID*/0,
    4578             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4579             :       GIR_Done,
    4580             :     // Label 127: @10041
    4581             :     GIM_Try, /*On fail goto*//*Label 128*/ 10111,
    4582             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    4583             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    4584             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    4585             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    4586             :       // MIs[0] Rd
    4587             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    4588             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    4589             :       // MIs[0] Operand 1
    4590             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfxs2fp,
    4591             :       // MIs[0] Rn
    4592             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    4593             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4594             :       // MIs[0] imm
    4595             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    4596             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    4597             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR64,
    4598             :       // MIs[1] Operand 0
    4599             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    4600             :       // MIs[1] Operand 1
    4601             :       // No operand predicates
    4602             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    4603             :       // (intrinsic_wo_chain:f64 348:iPTR, FPR64:i64:$Rn, (imm:i32)<<P:Predicate_vecshiftR64>>:$imm)  =>  (SCVTFd:f64 FPR64:i64:$Rn, (imm:i32)<<P:Predicate_vecshiftR64>>:$imm)
    4604             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SCVTFd,
    4605             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4606             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    4607             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    4608             :       GIR_EraseFromParent, /*InsnID*/0,
    4609             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4610             :       GIR_Done,
    4611             :     // Label 128: @10111
    4612             :     GIM_Try, /*On fail goto*//*Label 129*/ 10181,
    4613             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    4614             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    4615             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    4616             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    4617             :       // MIs[0] Rd
    4618             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    4619             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    4620             :       // MIs[0] Operand 1
    4621             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfxu2fp,
    4622             :       // MIs[0] Rn
    4623             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    4624             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4625             :       // MIs[0] imm
    4626             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    4627             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    4628             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR64,
    4629             :       // MIs[1] Operand 0
    4630             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    4631             :       // MIs[1] Operand 1
    4632             :       // No operand predicates
    4633             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    4634             :       // (intrinsic_wo_chain:f64 349:iPTR, FPR64:i64:$Rn, (imm:i32)<<P:Predicate_vecshiftR64>>:$imm)  =>  (UCVTFd:f64 FPR64:i64:$Rn, (imm:i32)<<P:Predicate_vecshiftR64>>:$imm)
    4635             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UCVTFd,
    4636             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4637             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    4638             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    4639             :       GIR_EraseFromParent, /*InsnID*/0,
    4640             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4641             :       GIR_Done,
    4642             :     // Label 129: @10181
    4643             :     GIM_Try, /*On fail goto*//*Label 130*/ 10251,
    4644             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    4645             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    4646             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    4647             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    4648             :       // MIs[0] Rd
    4649             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    4650             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    4651             :       // MIs[0] Operand 1
    4652             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfxs2fp,
    4653             :       // MIs[0] Rn
    4654             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    4655             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4656             :       // MIs[0] imm
    4657             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    4658             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    4659             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR64,
    4660             :       // MIs[1] Operand 0
    4661             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    4662             :       // MIs[1] Operand 1
    4663             :       // No operand predicates
    4664             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    4665             :       // (intrinsic_wo_chain:v1f64 348:iPTR, FPR64:v1i64:$Rn, (imm:i32)<<P:Predicate_vecshiftR64>>:$imm)  =>  (SCVTFd:v1f64 FPR64:v1i64:$Rn, (imm:i32)<<P:Predicate_vecshiftR64>>:$imm)
    4666             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SCVTFd,
    4667             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4668             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    4669             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    4670             :       GIR_EraseFromParent, /*InsnID*/0,
    4671             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4672             :       GIR_Done,
    4673             :     // Label 130: @10251
    4674             :     GIM_Try, /*On fail goto*//*Label 131*/ 10321,
    4675             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    4676             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    4677             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    4678             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    4679             :       // MIs[0] Rd
    4680             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    4681             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    4682             :       // MIs[0] Operand 1
    4683             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfxu2fp,
    4684             :       // MIs[0] Rn
    4685             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    4686             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4687             :       // MIs[0] imm
    4688             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    4689             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    4690             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_vecshiftR64,
    4691             :       // MIs[1] Operand 0
    4692             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    4693             :       // MIs[1] Operand 1
    4694             :       // No operand predicates
    4695             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    4696             :       // (intrinsic_wo_chain:v1f64 349:iPTR, FPR64:v1i64:$Rn, (imm:i32)<<P:Predicate_vecshiftR64>>:$imm)  =>  (UCVTFd:v1f64 FPR64:v1i64:$Rn, (imm:i32)<<P:Predicate_vecshiftR64>>:$imm)
    4697             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UCVTFd,
    4698             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4699             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    4700             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
    4701             :       GIR_EraseFromParent, /*InsnID*/0,
    4702             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4703             :       GIR_Done,
    4704             :     // Label 131: @10321
    4705             :     GIM_Try, /*On fail goto*//*Label 132*/ 10379,
    4706             :       GIM_CheckFeatures, GIFBS_HasCRC,
    4707             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    4708             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    4709             :       // MIs[0] Rd
    4710             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    4711             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    4712             :       // MIs[0] Operand 1
    4713             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_crc32b,
    4714             :       // MIs[0] Rn
    4715             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    4716             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    4717             :       // MIs[0] Rm
    4718             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    4719             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR32RegClassID,
    4720             :       // (intrinsic_wo_chain:i32 173:iPTR, GPR32:i32:$Rn, GPR32:i32:$Rm)  =>  (CRC32Brr:i32 GPR32:i32:$Rn, GPR32:i32:$Rm)
    4721             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CRC32Brr,
    4722             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4723             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    4724             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    4725             :       GIR_EraseFromParent, /*InsnID*/0,
    4726             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4727             :       GIR_Done,
    4728             :     // Label 132: @10379
    4729             :     GIM_Try, /*On fail goto*//*Label 133*/ 10437,
    4730             :       GIM_CheckFeatures, GIFBS_HasCRC,
    4731             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    4732             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    4733             :       // MIs[0] Rd
    4734             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    4735             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    4736             :       // MIs[0] Operand 1
    4737             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_crc32h,
    4738             :       // MIs[0] Rn
    4739             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    4740             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    4741             :       // MIs[0] Rm
    4742             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    4743             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR32RegClassID,
    4744             :       // (intrinsic_wo_chain:i32 178:iPTR, GPR32:i32:$Rn, GPR32:i32:$Rm)  =>  (CRC32Hrr:i32 GPR32:i32:$Rn, GPR32:i32:$Rm)
    4745             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CRC32Hrr,
    4746             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4747             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    4748             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    4749             :       GIR_EraseFromParent, /*InsnID*/0,
    4750             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4751             :       GIR_Done,
    4752             :     // Label 133: @10437
    4753             :     GIM_Try, /*On fail goto*//*Label 134*/ 10495,
    4754             :       GIM_CheckFeatures, GIFBS_HasCRC,
    4755             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    4756             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    4757             :       // MIs[0] Rd
    4758             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    4759             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    4760             :       // MIs[0] Operand 1
    4761             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_crc32w,
    4762             :       // MIs[0] Rn
    4763             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    4764             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    4765             :       // MIs[0] Rm
    4766             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    4767             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR32RegClassID,
    4768             :       // (intrinsic_wo_chain:i32 179:iPTR, GPR32:i32:$Rn, GPR32:i32:$Rm)  =>  (CRC32Wrr:i32 GPR32:i32:$Rn, GPR32:i32:$Rm)
    4769             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CRC32Wrr,
    4770             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4771             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    4772             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    4773             :       GIR_EraseFromParent, /*InsnID*/0,
    4774             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4775             :       GIR_Done,
    4776             :     // Label 134: @10495
    4777             :     GIM_Try, /*On fail goto*//*Label 135*/ 10553,
    4778             :       GIM_CheckFeatures, GIFBS_HasCRC,
    4779             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    4780             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    4781             :       // MIs[0] Rd
    4782             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    4783             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    4784             :       // MIs[0] Operand 1
    4785             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_crc32x,
    4786             :       // MIs[0] Rn
    4787             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    4788             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    4789             :       // MIs[0] Rm
    4790             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
    4791             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR64RegClassID,
    4792             :       // (intrinsic_wo_chain:i32 180:iPTR, GPR32:i32:$Rn, GPR64:i64:$Rm)  =>  (CRC32Xrr:i32 GPR32:i32:$Rn, GPR64:i64:$Rm)
    4793             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CRC32Xrr,
    4794             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4795             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    4796             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    4797             :       GIR_EraseFromParent, /*InsnID*/0,
    4798             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4799             :       GIR_Done,
    4800             :     // Label 135: @10553
    4801             :     GIM_Try, /*On fail goto*//*Label 136*/ 10611,
    4802             :       GIM_CheckFeatures, GIFBS_HasCRC,
    4803             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    4804             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    4805             :       // MIs[0] Rd
    4806             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    4807             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    4808             :       // MIs[0] Operand 1
    4809             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_crc32cb,
    4810             :       // MIs[0] Rn
    4811             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    4812             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    4813             :       // MIs[0] Rm
    4814             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    4815             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR32RegClassID,
    4816             :       // (intrinsic_wo_chain:i32 174:iPTR, GPR32:i32:$Rn, GPR32:i32:$Rm)  =>  (CRC32CBrr:i32 GPR32:i32:$Rn, GPR32:i32:$Rm)
    4817             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CRC32CBrr,
    4818             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4819             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    4820             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    4821             :       GIR_EraseFromParent, /*InsnID*/0,
    4822             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4823             :       GIR_Done,
    4824             :     // Label 136: @10611
    4825             :     GIM_Try, /*On fail goto*//*Label 137*/ 10669,
    4826             :       GIM_CheckFeatures, GIFBS_HasCRC,
    4827             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    4828             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    4829             :       // MIs[0] Rd
    4830             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    4831             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    4832             :       // MIs[0] Operand 1
    4833             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_crc32ch,
    4834             :       // MIs[0] Rn
    4835             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    4836             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    4837             :       // MIs[0] Rm
    4838             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    4839             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR32RegClassID,
    4840             :       // (intrinsic_wo_chain:i32 175:iPTR, GPR32:i32:$Rn, GPR32:i32:$Rm)  =>  (CRC32CHrr:i32 GPR32:i32:$Rn, GPR32:i32:$Rm)
    4841             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CRC32CHrr,
    4842             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4843             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    4844             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    4845             :       GIR_EraseFromParent, /*InsnID*/0,
    4846             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4847             :       GIR_Done,
    4848             :     // Label 137: @10669
    4849             :     GIM_Try, /*On fail goto*//*Label 138*/ 10727,
    4850             :       GIM_CheckFeatures, GIFBS_HasCRC,
    4851             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    4852             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    4853             :       // MIs[0] Rd
    4854             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    4855             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    4856             :       // MIs[0] Operand 1
    4857             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_crc32cw,
    4858             :       // MIs[0] Rn
    4859             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    4860             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    4861             :       // MIs[0] Rm
    4862             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    4863             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR32RegClassID,
    4864             :       // (intrinsic_wo_chain:i32 176:iPTR, GPR32:i32:$Rn, GPR32:i32:$Rm)  =>  (CRC32CWrr:i32 GPR32:i32:$Rn, GPR32:i32:$Rm)
    4865             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CRC32CWrr,
    4866             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4867             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    4868             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    4869             :       GIR_EraseFromParent, /*InsnID*/0,
    4870             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4871             :       GIR_Done,
    4872             :     // Label 138: @10727
    4873             :     GIM_Try, /*On fail goto*//*Label 139*/ 10785,
    4874             :       GIM_CheckFeatures, GIFBS_HasCRC,
    4875             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    4876             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    4877             :       // MIs[0] Rd
    4878             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    4879             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    4880             :       // MIs[0] Operand 1
    4881             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_crc32cx,
    4882             :       // MIs[0] Rn
    4883             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    4884             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    4885             :       // MIs[0] Rm
    4886             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
    4887             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR64RegClassID,
    4888             :       // (intrinsic_wo_chain:i32 177:iPTR, GPR32:i32:$Rn, GPR64:i64:$Rm)  =>  (CRC32CXrr:i32 GPR32:i32:$Rn, GPR64:i64:$Rm)
    4889             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CRC32CXrr,
    4890             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4891             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    4892             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    4893             :       GIR_EraseFromParent, /*InsnID*/0,
    4894             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4895             :       GIR_Done,
    4896             :     // Label 139: @10785
    4897             :     GIM_Try, /*On fail goto*//*Label 140*/ 10843,
    4898             :       GIM_CheckFeatures, GIFBS_HasNEON,
    4899             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    4900             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    4901             :       // MIs[0] dst
    4902             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
    4903             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    4904             :       // MIs[0] Operand 1
    4905             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_suqadd,
    4906             :       // MIs[0] Rd
    4907             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
    4908             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4909             :       // MIs[0] Rn
    4910             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
    4911             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    4912             :       // (intrinsic_wo_chain:v8i8 308:iPTR, V64:v8i8:$Rd, V64:v8i8:$Rn)  =>  (SUQADDv8i8:v8i8 V64:v8i8:$Rd, V64:v8i8:$Rn)
    4913             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SUQADDv8i8,
    4914             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4915             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    4916             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
    4917             :       GIR_EraseFromParent, /*InsnID*/0,
    4918             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4919             :       GIR_Done,
    4920             :     // Label 140: @10843
    4921             :     GIM_Try, /*On fail goto*//*Label 141*/ 10901,
    4922             :       GIM_CheckFeatures, GIFBS_HasNEON,
    4923             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    4924             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    4925             :       // MIs[0] dst
    4926             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
    4927             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    4928             :       // MIs[0] Operand 1
    4929             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_suqadd,
    4930             :       // MIs[0] Rd
    4931             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    4932             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    4933             :       // MIs[0] Rn
    4934             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
    4935             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    4936             :       // (intrinsic_wo_chain:v16i8 308:iPTR, V128:v16i8:$Rd, V128:v16i8:$Rn)  =>  (SUQADDv16i8:v16i8 V128:v16i8:$Rd, V128:v16i8:$Rn)
    4937             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SUQADDv16i8,
    4938             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4939             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    4940             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
    4941             :       GIR_EraseFromParent, /*InsnID*/0,
    4942             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4943             :       GIR_Done,
    4944             :     // Label 141: @10901
    4945             :     GIM_Try, /*On fail goto*//*Label 142*/ 10959,
    4946             :       GIM_CheckFeatures, GIFBS_HasNEON,
    4947             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    4948             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    4949             :       // MIs[0] dst
    4950             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    4951             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    4952             :       // MIs[0] Operand 1
    4953             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_suqadd,
    4954             :       // MIs[0] Rd
    4955             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    4956             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4957             :       // MIs[0] Rn
    4958             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
    4959             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    4960             :       // (intrinsic_wo_chain:v4i16 308:iPTR, V64:v4i16:$Rd, V64:v4i16:$Rn)  =>  (SUQADDv4i16:v4i16 V64:v4i16:$Rd, V64:v4i16:$Rn)
    4961             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SUQADDv4i16,
    4962             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4963             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    4964             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
    4965             :       GIR_EraseFromParent, /*InsnID*/0,
    4966             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4967             :       GIR_Done,
    4968             :     // Label 142: @10959
    4969             :     GIM_Try, /*On fail goto*//*Label 143*/ 11017,
    4970             :       GIM_CheckFeatures, GIFBS_HasNEON,
    4971             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    4972             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    4973             :       // MIs[0] dst
    4974             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    4975             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    4976             :       // MIs[0] Operand 1
    4977             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_suqadd,
    4978             :       // MIs[0] Rd
    4979             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    4980             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    4981             :       // MIs[0] Rn
    4982             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    4983             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    4984             :       // (intrinsic_wo_chain:v8i16 308:iPTR, V128:v8i16:$Rd, V128:v8i16:$Rn)  =>  (SUQADDv8i16:v8i16 V128:v8i16:$Rd, V128:v8i16:$Rn)
    4985             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SUQADDv8i16,
    4986             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4987             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    4988             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
    4989             :       GIR_EraseFromParent, /*InsnID*/0,
    4990             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4991             :       GIR_Done,
    4992             :     // Label 143: @11017
    4993             :     GIM_Try, /*On fail goto*//*Label 144*/ 11075,
    4994             :       GIM_CheckFeatures, GIFBS_HasNEON,
    4995             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    4996             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    4997             :       // MIs[0] dst
    4998             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    4999             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5000             :       // MIs[0] Operand 1
    5001             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_suqadd,
    5002             :       // MIs[0] Rd
    5003             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    5004             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5005             :       // MIs[0] Rn
    5006             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
    5007             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    5008             :       // (intrinsic_wo_chain:v2i32 308:iPTR, V64:v2i32:$Rd, V64:v2i32:$Rn)  =>  (SUQADDv2i32:v2i32 V64:v2i32:$Rd, V64:v2i32:$Rn)
    5009             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SUQADDv2i32,
    5010             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    5011             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    5012             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
    5013             :       GIR_EraseFromParent, /*InsnID*/0,
    5014             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5015             :       GIR_Done,
    5016             :     // Label 144: @11075
    5017             :     GIM_Try, /*On fail goto*//*Label 145*/ 11133,
    5018             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5019             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    5020             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    5021             :       // MIs[0] dst
    5022             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    5023             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5024             :       // MIs[0] Operand 1
    5025             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_suqadd,
    5026             :       // MIs[0] Rd
    5027             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    5028             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5029             :       // MIs[0] Rn
    5030             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    5031             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    5032             :       // (intrinsic_wo_chain:v4i32 308:iPTR, V128:v4i32:$Rd, V128:v4i32:$Rn)  =>  (SUQADDv4i32:v4i32 V128:v4i32:$Rd, V128:v4i32:$Rn)
    5033             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SUQADDv4i32,
    5034             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    5035             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    5036             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
    5037             :       GIR_EraseFromParent, /*InsnID*/0,
    5038             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5039             :       GIR_Done,
    5040             :     // Label 145: @11133
    5041             :     GIM_Try, /*On fail goto*//*Label 146*/ 11191,
    5042             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5043             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    5044             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    5045             :       // MIs[0] dst
    5046             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    5047             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5048             :       // MIs[0] Operand 1
    5049             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_suqadd,
    5050             :       // MIs[0] Rd
    5051             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    5052             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5053             :       // MIs[0] Rn
    5054             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    5055             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    5056             :       // (intrinsic_wo_chain:v2i64 308:iPTR, V128:v2i64:$Rd, V128:v2i64:$Rn)  =>  (SUQADDv2i64:v2i64 V128:v2i64:$Rd, V128:v2i64:$Rn)
    5057             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SUQADDv2i64,
    5058             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    5059             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    5060             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
    5061             :       GIR_EraseFromParent, /*InsnID*/0,
    5062             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5063             :       GIR_Done,
    5064             :     // Label 146: @11191
    5065             :     GIM_Try, /*On fail goto*//*Label 147*/ 11249,
    5066             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5067             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    5068             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    5069             :       // MIs[0] dst
    5070             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
    5071             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5072             :       // MIs[0] Operand 1
    5073             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_usqadd,
    5074             :       // MIs[0] Rd
    5075             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
    5076             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5077             :       // MIs[0] Rn
    5078             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
    5079             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    5080             :       // (intrinsic_wo_chain:v8i8 343:iPTR, V64:v8i8:$Rd, V64:v8i8:$Rn)  =>  (USQADDv8i8:v8i8 V64:v8i8:$Rd, V64:v8i8:$Rn)
    5081             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USQADDv8i8,
    5082             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    5083             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    5084             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
    5085             :       GIR_EraseFromParent, /*InsnID*/0,
    5086             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5087             :       GIR_Done,
    5088             :     // Label 147: @11249
    5089             :     GIM_Try, /*On fail goto*//*Label 148*/ 11307,
    5090             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5091             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    5092             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    5093             :       // MIs[0] dst
    5094             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
    5095             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5096             :       // MIs[0] Operand 1
    5097             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_usqadd,
    5098             :       // MIs[0] Rd
    5099             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    5100             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5101             :       // MIs[0] Rn
    5102             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
    5103             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    5104             :       // (intrinsic_wo_chain:v16i8 343:iPTR, V128:v16i8:$Rd, V128:v16i8:$Rn)  =>  (USQADDv16i8:v16i8 V128:v16i8:$Rd, V128:v16i8:$Rn)
    5105             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USQADDv16i8,
    5106             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    5107             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    5108             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
    5109             :       GIR_EraseFromParent, /*InsnID*/0,
    5110             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5111             :       GIR_Done,
    5112             :     // Label 148: @11307
    5113             :     GIM_Try, /*On fail goto*//*Label 149*/ 11365,
    5114             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5115             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    5116             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    5117             :       // MIs[0] dst
    5118             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    5119             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5120             :       // MIs[0] Operand 1
    5121             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_usqadd,
    5122             :       // MIs[0] Rd
    5123             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    5124             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5125             :       // MIs[0] Rn
    5126             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
    5127             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    5128             :       // (intrinsic_wo_chain:v4i16 343:iPTR, V64:v4i16:$Rd, V64:v4i16:$Rn)  =>  (USQADDv4i16:v4i16 V64:v4i16:$Rd, V64:v4i16:$Rn)
    5129             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USQADDv4i16,
    5130             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    5131             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    5132             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
    5133             :       GIR_EraseFromParent, /*InsnID*/0,
    5134             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5135             :       GIR_Done,
    5136             :     // Label 149: @11365
    5137             :     GIM_Try, /*On fail goto*//*Label 150*/ 11423,
    5138             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5139             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    5140             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    5141             :       // MIs[0] dst
    5142             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    5143             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5144             :       // MIs[0] Operand 1
    5145             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_usqadd,
    5146             :       // MIs[0] Rd
    5147             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    5148             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5149             :       // MIs[0] Rn
    5150             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    5151             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    5152             :       // (intrinsic_wo_chain:v8i16 343:iPTR, V128:v8i16:$Rd, V128:v8i16:$Rn)  =>  (USQADDv8i16:v8i16 V128:v8i16:$Rd, V128:v8i16:$Rn)
    5153             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USQADDv8i16,
    5154             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    5155             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    5156             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
    5157             :       GIR_EraseFromParent, /*InsnID*/0,
    5158             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5159             :       GIR_Done,
    5160             :     // Label 150: @11423
    5161             :     GIM_Try, /*On fail goto*//*Label 151*/ 11481,
    5162             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5163             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    5164             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    5165             :       // MIs[0] dst
    5166             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    5167             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5168             :       // MIs[0] Operand 1
    5169             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_usqadd,
    5170             :       // MIs[0] Rd
    5171             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    5172             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5173             :       // MIs[0] Rn
    5174             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
    5175             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    5176             :       // (intrinsic_wo_chain:v2i32 343:iPTR, V64:v2i32:$Rd, V64:v2i32:$Rn)  =>  (USQADDv2i32:v2i32 V64:v2i32:$Rd, V64:v2i32:$Rn)
    5177             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USQADDv2i32,
    5178             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    5179             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    5180             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
    5181             :       GIR_EraseFromParent, /*InsnID*/0,
    5182             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5183             :       GIR_Done,
    5184             :     // Label 151: @11481
    5185             :     GIM_Try, /*On fail goto*//*Label 152*/ 11539,
    5186             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5187             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    5188             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    5189             :       // MIs[0] dst
    5190             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    5191             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5192             :       // MIs[0] Operand 1
    5193             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_usqadd,
    5194             :       // MIs[0] Rd
    5195             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    5196             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5197             :       // MIs[0] Rn
    5198             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    5199             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    5200             :       // (intrinsic_wo_chain:v4i32 343:iPTR, V128:v4i32:$Rd, V128:v4i32:$Rn)  =>  (USQADDv4i32:v4i32 V128:v4i32:$Rd, V128:v4i32:$Rn)
    5201             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USQADDv4i32,
    5202             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    5203             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    5204             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
    5205             :       GIR_EraseFromParent, /*InsnID*/0,
    5206             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5207             :       GIR_Done,
    5208             :     // Label 152: @11539
    5209             :     GIM_Try, /*On fail goto*//*Label 153*/ 11597,
    5210             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5211             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    5212             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    5213             :       // MIs[0] dst
    5214             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    5215             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5216             :       // MIs[0] Operand 1
    5217             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_usqadd,
    5218             :       // MIs[0] Rd
    5219             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    5220             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5221             :       // MIs[0] Rn
    5222             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    5223             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    5224             :       // (intrinsic_wo_chain:v2i64 343:iPTR, V128:v2i64:$Rd, V128:v2i64:$Rn)  =>  (USQADDv2i64:v2i64 V128:v2i64:$Rd, V128:v2i64:$Rn)
    5225             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USQADDv2i64,
    5226             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    5227             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    5228             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
    5229             :       GIR_EraseFromParent, /*InsnID*/0,
    5230             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5231             :       GIR_Done,
    5232             :     // Label 153: @11597
    5233             :     GIM_Try, /*On fail goto*//*Label 154*/ 11655,
    5234             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5235             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    5236             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    5237             :       // MIs[0] Rd
    5238             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
    5239             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5240             :       // MIs[0] Operand 1
    5241             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_addp,
    5242             :       // MIs[0] Rn
    5243             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
    5244             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5245             :       // MIs[0] Rm
    5246             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
    5247             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    5248             :       // (intrinsic_wo_chain:v8i8 205:iPTR, V64:v8i8:$Rn, V64:v8i8:$Rm)  =>  (ADDPv8i8:v8i8 V64:v8i8:$Rn, V64:v8i8:$Rm)
    5249             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ADDPv8i8,
    5250             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5251             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5252             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    5253             :       GIR_EraseFromParent, /*InsnID*/0,
    5254             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5255             :       GIR_Done,
    5256             :     // Label 154: @11655
    5257             :     GIM_Try, /*On fail goto*//*Label 155*/ 11713,
    5258             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5259             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    5260             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    5261             :       // MIs[0] Rd
    5262             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
    5263             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5264             :       // MIs[0] Operand 1
    5265             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_addp,
    5266             :       // MIs[0] Rn
    5267             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    5268             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5269             :       // MIs[0] Rm
    5270             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
    5271             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    5272             :       // (intrinsic_wo_chain:v16i8 205:iPTR, V128:v16i8:$Rn, V128:v16i8:$Rm)  =>  (ADDPv16i8:v16i8 V128:v16i8:$Rn, V128:v16i8:$Rm)
    5273             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ADDPv16i8,
    5274             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5275             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5276             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    5277             :       GIR_EraseFromParent, /*InsnID*/0,
    5278             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5279             :       GIR_Done,
    5280             :     // Label 155: @11713
    5281             :     GIM_Try, /*On fail goto*//*Label 156*/ 11771,
    5282             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5283             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    5284             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    5285             :       // MIs[0] Rd
    5286             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    5287             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5288             :       // MIs[0] Operand 1
    5289             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_addp,
    5290             :       // MIs[0] Rn
    5291             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    5292             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5293             :       // MIs[0] Rm
    5294             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
    5295             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    5296             :       // (intrinsic_wo_chain:v4i16 205:iPTR, V64:v4i16:$Rn, V64:v4i16:$Rm)  =>  (ADDPv4i16:v4i16 V64:v4i16:$Rn, V64:v4i16:$Rm)
    5297             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ADDPv4i16,
    5298             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5299             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5300             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    5301             :       GIR_EraseFromParent, /*InsnID*/0,
    5302             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5303             :       GIR_Done,
    5304             :     // Label 156: @11771
    5305             :     GIM_Try, /*On fail goto*//*Label 157*/ 11829,
    5306             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5307             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    5308             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    5309             :       // MIs[0] Rd
    5310             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    5311             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5312             :       // MIs[0] Operand 1
    5313             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_addp,
    5314             :       // MIs[0] Rn
    5315             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    5316             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5317             :       // MIs[0] Rm
    5318             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    5319             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    5320             :       // (intrinsic_wo_chain:v8i16 205:iPTR, V128:v8i16:$Rn, V128:v8i16:$Rm)  =>  (ADDPv8i16:v8i16 V128:v8i16:$Rn, V128:v8i16:$Rm)
    5321             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ADDPv8i16,
    5322             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5323             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5324             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    5325             :       GIR_EraseFromParent, /*InsnID*/0,
    5326             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5327             :       GIR_Done,
    5328             :     // Label 157: @11829
    5329             :     GIM_Try, /*On fail goto*//*Label 158*/ 11887,
    5330             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5331             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    5332             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    5333             :       // MIs[0] Rd
    5334             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    5335             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5336             :       // MIs[0] Operand 1
    5337             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_addp,
    5338             :       // MIs[0] Rn
    5339             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    5340             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5341             :       // MIs[0] Rm
    5342             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
    5343             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    5344             :       // (intrinsic_wo_chain:v2i32 205:iPTR, V64:v2i32:$Rn, V64:v2i32:$Rm)  =>  (ADDPv2i32:v2i32 V64:v2i32:$Rn, V64:v2i32:$Rm)
    5345             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ADDPv2i32,
    5346             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5347             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5348             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    5349             :       GIR_EraseFromParent, /*InsnID*/0,
    5350             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5351             :       GIR_Done,
    5352             :     // Label 158: @11887
    5353             :     GIM_Try, /*On fail goto*//*Label 159*/ 11945,
    5354             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5355             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    5356             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    5357             :       // MIs[0] Rd
    5358             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    5359             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5360             :       // MIs[0] Operand 1
    5361             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_addp,
    5362             :       // MIs[0] Rn
    5363             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    5364             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5365             :       // MIs[0] Rm
    5366             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    5367             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    5368             :       // (intrinsic_wo_chain:v4i32 205:iPTR, V128:v4i32:$Rn, V128:v4i32:$Rm)  =>  (ADDPv4i32:v4i32 V128:v4i32:$Rn, V128:v4i32:$Rm)
    5369             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ADDPv4i32,
    5370             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5371             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5372             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    5373             :       GIR_EraseFromParent, /*InsnID*/0,
    5374             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5375             :       GIR_Done,
    5376             :     // Label 159: @11945
    5377             :     GIM_Try, /*On fail goto*//*Label 160*/ 12003,
    5378             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5379             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    5380             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    5381             :       // MIs[0] Rd
    5382             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    5383             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5384             :       // MIs[0] Operand 1
    5385             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_addp,
    5386             :       // MIs[0] Rn
    5387             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    5388             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5389             :       // MIs[0] Rm
    5390             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    5391             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    5392             :       // (intrinsic_wo_chain:v2i64 205:iPTR, V128:v2i64:$Rn, V128:v2i64:$Rm)  =>  (ADDPv2i64:v2i64 V128:v2i64:$Rn, V128:v2i64:$Rm)
    5393             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ADDPv2i64,
    5394             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5395             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5396             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    5397             :       GIR_EraseFromParent, /*InsnID*/0,
    5398             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5399             :       GIR_Done,
    5400             :     // Label 160: @12003
    5401             :     GIM_Try, /*On fail goto*//*Label 161*/ 12061,
    5402             :       GIM_CheckFeatures, GIFBS_HasNEON_HasFullFP16,
    5403             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    5404             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    5405             :       // MIs[0] Rd
    5406             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    5407             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5408             :       // MIs[0] Operand 1
    5409             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fabd,
    5410             :       // MIs[0] Rn
    5411             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    5412             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5413             :       // MIs[0] Rm
    5414             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
    5415             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    5416             :       // (intrinsic_wo_chain:v4f16 207:iPTR, V64:v4f16:$Rn, V64:v4f16:$Rm)  =>  (FABDv4f16:v4f16 V64:v4f16:$Rn, V64:v4f16:$Rm)
    5417             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FABDv4f16,
    5418             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5419             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5420             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    5421             :       GIR_EraseFromParent, /*InsnID*/0,
    5422             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5423             :       GIR_Done,
    5424             :     // Label 161: @12061
    5425             :     GIM_Try, /*On fail goto*//*Label 162*/ 12119,
    5426             :       GIM_CheckFeatures, GIFBS_HasNEON_HasFullFP16,
    5427             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    5428             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    5429             :       // MIs[0] Rd
    5430             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    5431             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5432             :       // MIs[0] Operand 1
    5433             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fabd,
    5434             :       // MIs[0] Rn
    5435             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    5436             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5437             :       // MIs[0] Rm
    5438             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    5439             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    5440             :       // (intrinsic_wo_chain:v8f16 207:iPTR, V128:v8f16:$Rn, V128:v8f16:$Rm)  =>  (FABDv8f16:v8f16 V128:v8f16:$Rn, V128:v8f16:$Rm)
    5441             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FABDv8f16,
    5442             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5443             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5444             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    5445             :       GIR_EraseFromParent, /*InsnID*/0,
    5446             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5447             :       GIR_Done,
    5448             :     // Label 162: @12119
    5449             :     GIM_Try, /*On fail goto*//*Label 163*/ 12177,
    5450             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5451             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    5452             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    5453             :       // MIs[0] Rd
    5454             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    5455             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5456             :       // MIs[0] Operand 1
    5457             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fabd,
    5458             :       // MIs[0] Rn
    5459             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    5460             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5461             :       // MIs[0] Rm
    5462             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
    5463             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    5464             :       // (intrinsic_wo_chain:v2f32 207:iPTR, V64:v2f32:$Rn, V64:v2f32:$Rm)  =>  (FABDv2f32:v2f32 V64:v2f32:$Rn, V64:v2f32:$Rm)
    5465             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FABDv2f32,
    5466             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5467             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5468             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    5469             :       GIR_EraseFromParent, /*InsnID*/0,
    5470             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5471             :       GIR_Done,
    5472             :     // Label 163: @12177
    5473             :     GIM_Try, /*On fail goto*//*Label 164*/ 12235,
    5474             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5475             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    5476             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    5477             :       // MIs[0] Rd
    5478             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    5479             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5480             :       // MIs[0] Operand 1
    5481             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fabd,
    5482             :       // MIs[0] Rn
    5483             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    5484             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5485             :       // MIs[0] Rm
    5486             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    5487             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    5488             :       // (intrinsic_wo_chain:v4f32 207:iPTR, V128:v4f32:$Rn, V128:v4f32:$Rm)  =>  (FABDv4f32:v4f32 V128:v4f32:$Rn, V128:v4f32:$Rm)
    5489             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FABDv4f32,
    5490             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5491             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5492             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    5493             :       GIR_EraseFromParent, /*InsnID*/0,
    5494             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5495             :       GIR_Done,
    5496             :     // Label 164: @12235
    5497             :     GIM_Try, /*On fail goto*//*Label 165*/ 12293,
    5498             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5499             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    5500             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    5501             :       // MIs[0] Rd
    5502             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    5503             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5504             :       // MIs[0] Operand 1
    5505             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fabd,
    5506             :       // MIs[0] Rn
    5507             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    5508             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5509             :       // MIs[0] Rm
    5510             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    5511             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    5512             :       // (intrinsic_wo_chain:v2f64 207:iPTR, V128:v2f64:$Rn, V128:v2f64:$Rm)  =>  (FABDv2f64:v2f64 V128:v2f64:$Rn, V128:v2f64:$Rm)
    5513             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FABDv2f64,
    5514             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5515             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5516             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    5517             :       GIR_EraseFromParent, /*InsnID*/0,
    5518             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5519             :       GIR_Done,
    5520             :     // Label 165: @12293
    5521             :     GIM_Try, /*On fail goto*//*Label 166*/ 12351,
    5522             :       GIM_CheckFeatures, GIFBS_HasNEON_HasFullFP16,
    5523             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    5524             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    5525             :       // MIs[0] Rd
    5526             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    5527             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5528             :       // MIs[0] Operand 1
    5529             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_facge,
    5530             :       // MIs[0] Rn
    5531             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    5532             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5533             :       // MIs[0] Rm
    5534             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
    5535             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    5536             :       // (intrinsic_wo_chain:v4i16 208:iPTR, V64:v4f16:$Rn, V64:v4f16:$Rm)  =>  (FACGEv4f16:v4i16 V64:v4f16:$Rn, V64:v4f16:$Rm)
    5537             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FACGEv4f16,
    5538             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5539             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5540             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    5541             :       GIR_EraseFromParent, /*InsnID*/0,
    5542             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5543             :       GIR_Done,
    5544             :     // Label 166: @12351
    5545             :     GIM_Try, /*On fail goto*//*Label 167*/ 12409,
    5546             :       GIM_CheckFeatures, GIFBS_HasNEON_HasFullFP16,
    5547             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    5548             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    5549             :       // MIs[0] Rd
    5550             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    5551             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5552             :       // MIs[0] Operand 1
    5553             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_facge,
    5554             :       // MIs[0] Rn
    5555             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    5556             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5557             :       // MIs[0] Rm
    5558             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    5559             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    5560             :       // (intrinsic_wo_chain:v8i16 208:iPTR, V128:v8f16:$Rn, V128:v8f16:$Rm)  =>  (FACGEv8f16:v8i16 V128:v8f16:$Rn, V128:v8f16:$Rm)
    5561             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FACGEv8f16,
    5562             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5563             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5564             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    5565             :       GIR_EraseFromParent, /*InsnID*/0,
    5566             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5567             :       GIR_Done,
    5568             :     // Label 167: @12409
    5569             :     GIM_Try, /*On fail goto*//*Label 168*/ 12467,
    5570             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5571             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    5572             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    5573             :       // MIs[0] Rd
    5574             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    5575             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5576             :       // MIs[0] Operand 1
    5577             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_facge,
    5578             :       // MIs[0] Rn
    5579             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    5580             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5581             :       // MIs[0] Rm
    5582             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
    5583             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    5584             :       // (intrinsic_wo_chain:v2i32 208:iPTR, V64:v2f32:$Rn, V64:v2f32:$Rm)  =>  (FACGEv2f32:v2i32 V64:v2f32:$Rn, V64:v2f32:$Rm)
    5585             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FACGEv2f32,
    5586             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5587             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5588             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    5589             :       GIR_EraseFromParent, /*InsnID*/0,
    5590             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5591             :       GIR_Done,
    5592             :     // Label 168: @12467
    5593             :     GIM_Try, /*On fail goto*//*Label 169*/ 12525,
    5594             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5595             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    5596             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    5597             :       // MIs[0] Rd
    5598             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    5599             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5600             :       // MIs[0] Operand 1
    5601             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_facge,
    5602             :       // MIs[0] Rn
    5603             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    5604             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5605             :       // MIs[0] Rm
    5606             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    5607             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    5608             :       // (intrinsic_wo_chain:v4i32 208:iPTR, V128:v4f32:$Rn, V128:v4f32:$Rm)  =>  (FACGEv4f32:v4i32 V128:v4f32:$Rn, V128:v4f32:$Rm)
    5609             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FACGEv4f32,
    5610             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5611             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5612             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    5613             :       GIR_EraseFromParent, /*InsnID*/0,
    5614             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5615             :       GIR_Done,
    5616             :     // Label 169: @12525
    5617             :     GIM_Try, /*On fail goto*//*Label 170*/ 12583,
    5618             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5619             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    5620             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    5621             :       // MIs[0] Rd
    5622             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    5623             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5624             :       // MIs[0] Operand 1
    5625             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_facge,
    5626             :       // MIs[0] Rn
    5627             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    5628             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5629             :       // MIs[0] Rm
    5630             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    5631             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    5632             :       // (intrinsic_wo_chain:v2i64 208:iPTR, V128:v2f64:$Rn, V128:v2f64:$Rm)  =>  (FACGEv2f64:v2i64 V128:v2f64:$Rn, V128:v2f64:$Rm)
    5633             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FACGEv2f64,
    5634             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5635             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5636             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    5637             :       GIR_EraseFromParent, /*InsnID*/0,
    5638             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5639             :       GIR_Done,
    5640             :     // Label 170: @12583
    5641             :     GIM_Try, /*On fail goto*//*Label 171*/ 12641,
    5642             :       GIM_CheckFeatures, GIFBS_HasNEON_HasFullFP16,
    5643             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    5644             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    5645             :       // MIs[0] Rd
    5646             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    5647             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5648             :       // MIs[0] Operand 1
    5649             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_facgt,
    5650             :       // MIs[0] Rn
    5651             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    5652             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5653             :       // MIs[0] Rm
    5654             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
    5655             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    5656             :       // (intrinsic_wo_chain:v4i16 209:iPTR, V64:v4f16:$Rn, V64:v4f16:$Rm)  =>  (FACGTv4f16:v4i16 V64:v4f16:$Rn, V64:v4f16:$Rm)
    5657             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FACGTv4f16,
    5658             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5659             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5660             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    5661             :       GIR_EraseFromParent, /*InsnID*/0,
    5662             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5663             :       GIR_Done,
    5664             :     // Label 171: @12641
    5665             :     GIM_Try, /*On fail goto*//*Label 172*/ 12699,
    5666             :       GIM_CheckFeatures, GIFBS_HasNEON_HasFullFP16,
    5667             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    5668             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    5669             :       // MIs[0] Rd
    5670             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    5671             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5672             :       // MIs[0] Operand 1
    5673             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_facgt,
    5674             :       // MIs[0] Rn
    5675             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    5676             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5677             :       // MIs[0] Rm
    5678             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    5679             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    5680             :       // (intrinsic_wo_chain:v8i16 209:iPTR, V128:v8f16:$Rn, V128:v8f16:$Rm)  =>  (FACGTv8f16:v8i16 V128:v8f16:$Rn, V128:v8f16:$Rm)
    5681             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FACGTv8f16,
    5682             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5683             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5684             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    5685             :       GIR_EraseFromParent, /*InsnID*/0,
    5686             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5687             :       GIR_Done,
    5688             :     // Label 172: @12699
    5689             :     GIM_Try, /*On fail goto*//*Label 173*/ 12757,
    5690             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5691             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    5692             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    5693             :       // MIs[0] Rd
    5694             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    5695             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5696             :       // MIs[0] Operand 1
    5697             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_facgt,
    5698             :       // MIs[0] Rn
    5699             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    5700             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5701             :       // MIs[0] Rm
    5702             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
    5703             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    5704             :       // (intrinsic_wo_chain:v2i32 209:iPTR, V64:v2f32:$Rn, V64:v2f32:$Rm)  =>  (FACGTv2f32:v2i32 V64:v2f32:$Rn, V64:v2f32:$Rm)
    5705             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FACGTv2f32,
    5706             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5707             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5708             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    5709             :       GIR_EraseFromParent, /*InsnID*/0,
    5710             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5711             :       GIR_Done,
    5712             :     // Label 173: @12757
    5713             :     GIM_Try, /*On fail goto*//*Label 174*/ 12815,
    5714             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5715             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    5716             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    5717             :       // MIs[0] Rd
    5718             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    5719             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5720             :       // MIs[0] Operand 1
    5721             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_facgt,
    5722             :       // MIs[0] Rn
    5723             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    5724             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5725             :       // MIs[0] Rm
    5726             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    5727             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    5728             :       // (intrinsic_wo_chain:v4i32 209:iPTR, V128:v4f32:$Rn, V128:v4f32:$Rm)  =>  (FACGTv4f32:v4i32 V128:v4f32:$Rn, V128:v4f32:$Rm)
    5729             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FACGTv4f32,
    5730             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5731             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5732             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    5733             :       GIR_EraseFromParent, /*InsnID*/0,
    5734             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5735             :       GIR_Done,
    5736             :     // Label 174: @12815
    5737             :     GIM_Try, /*On fail goto*//*Label 175*/ 12873,
    5738             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5739             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    5740             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    5741             :       // MIs[0] Rd
    5742             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    5743             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5744             :       // MIs[0] Operand 1
    5745             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_facgt,
    5746             :       // MIs[0] Rn
    5747             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    5748             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5749             :       // MIs[0] Rm
    5750             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    5751             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    5752             :       // (intrinsic_wo_chain:v2i64 209:iPTR, V128:v2f64:$Rn, V128:v2f64:$Rm)  =>  (FACGTv2f64:v2i64 V128:v2f64:$Rn, V128:v2f64:$Rm)
    5753             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FACGTv2f64,
    5754             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5755             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5756             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    5757             :       GIR_EraseFromParent, /*InsnID*/0,
    5758             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5759             :       GIR_Done,
    5760             :     // Label 175: @12873
    5761             :     GIM_Try, /*On fail goto*//*Label 176*/ 12931,
    5762             :       GIM_CheckFeatures, GIFBS_HasNEON_HasFullFP16,
    5763             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    5764             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    5765             :       // MIs[0] Rd
    5766             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    5767             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5768             :       // MIs[0] Operand 1
    5769             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_addp,
    5770             :       // MIs[0] Rn
    5771             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    5772             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5773             :       // MIs[0] Rm
    5774             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
    5775             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    5776             :       // (intrinsic_wo_chain:v4f16 205:iPTR, V64:v4f16:$Rn, V64:v4f16:$Rm)  =>  (FADDPv4f16:v4f16 V64:v4f16:$Rn, V64:v4f16:$Rm)
    5777             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FADDPv4f16,
    5778             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5779             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5780             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    5781             :       GIR_EraseFromParent, /*InsnID*/0,
    5782             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5783             :       GIR_Done,
    5784             :     // Label 176: @12931
    5785             :     GIM_Try, /*On fail goto*//*Label 177*/ 12989,
    5786             :       GIM_CheckFeatures, GIFBS_HasNEON_HasFullFP16,
    5787             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    5788             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    5789             :       // MIs[0] Rd
    5790             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    5791             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5792             :       // MIs[0] Operand 1
    5793             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_addp,
    5794             :       // MIs[0] Rn
    5795             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    5796             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5797             :       // MIs[0] Rm
    5798             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    5799             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    5800             :       // (intrinsic_wo_chain:v8f16 205:iPTR, V128:v8f16:$Rn, V128:v8f16:$Rm)  =>  (FADDPv8f16:v8f16 V128:v8f16:$Rn, V128:v8f16:$Rm)
    5801             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FADDPv8f16,
    5802             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5803             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5804             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    5805             :       GIR_EraseFromParent, /*InsnID*/0,
    5806             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5807             :       GIR_Done,
    5808             :     // Label 177: @12989
    5809             :     GIM_Try, /*On fail goto*//*Label 178*/ 13047,
    5810             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5811             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    5812             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    5813             :       // MIs[0] Rd
    5814             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    5815             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5816             :       // MIs[0] Operand 1
    5817             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_addp,
    5818             :       // MIs[0] Rn
    5819             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    5820             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5821             :       // MIs[0] Rm
    5822             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
    5823             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    5824             :       // (intrinsic_wo_chain:v2f32 205:iPTR, V64:v2f32:$Rn, V64:v2f32:$Rm)  =>  (FADDPv2f32:v2f32 V64:v2f32:$Rn, V64:v2f32:$Rm)
    5825             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FADDPv2f32,
    5826             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5827             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5828             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    5829             :       GIR_EraseFromParent, /*InsnID*/0,
    5830             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5831             :       GIR_Done,
    5832             :     // Label 178: @13047
    5833             :     GIM_Try, /*On fail goto*//*Label 179*/ 13105,
    5834             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5835             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    5836             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    5837             :       // MIs[0] Rd
    5838             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    5839             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5840             :       // MIs[0] Operand 1
    5841             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_addp,
    5842             :       // MIs[0] Rn
    5843             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    5844             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5845             :       // MIs[0] Rm
    5846             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    5847             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    5848             :       // (intrinsic_wo_chain:v4f32 205:iPTR, V128:v4f32:$Rn, V128:v4f32:$Rm)  =>  (FADDPv4f32:v4f32 V128:v4f32:$Rn, V128:v4f32:$Rm)
    5849             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FADDPv4f32,
    5850             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5851             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5852             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    5853             :       GIR_EraseFromParent, /*InsnID*/0,
    5854             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5855             :       GIR_Done,
    5856             :     // Label 179: @13105
    5857             :     GIM_Try, /*On fail goto*//*Label 180*/ 13163,
    5858             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5859             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    5860             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    5861             :       // MIs[0] Rd
    5862             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    5863             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5864             :       // MIs[0] Operand 1
    5865             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_addp,
    5866             :       // MIs[0] Rn
    5867             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    5868             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5869             :       // MIs[0] Rm
    5870             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    5871             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    5872             :       // (intrinsic_wo_chain:v2f64 205:iPTR, V128:v2f64:$Rn, V128:v2f64:$Rm)  =>  (FADDPv2f64:v2f64 V128:v2f64:$Rn, V128:v2f64:$Rm)
    5873             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FADDPv2f64,
    5874             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5875             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5876             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    5877             :       GIR_EraseFromParent, /*InsnID*/0,
    5878             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5879             :       GIR_Done,
    5880             :     // Label 180: @13163
    5881             :     GIM_Try, /*On fail goto*//*Label 181*/ 13221,
    5882             :       GIM_CheckFeatures, GIFBS_HasNEON_HasFullFP16,
    5883             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    5884             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    5885             :       // MIs[0] Rd
    5886             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    5887             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5888             :       // MIs[0] Operand 1
    5889             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmaxnmp,
    5890             :       // MIs[0] Rn
    5891             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    5892             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5893             :       // MIs[0] Rm
    5894             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
    5895             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    5896             :       // (intrinsic_wo_chain:v4f16 224:iPTR, V64:v4f16:$Rn, V64:v4f16:$Rm)  =>  (FMAXNMPv4f16:v4f16 V64:v4f16:$Rn, V64:v4f16:$Rm)
    5897             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMAXNMPv4f16,
    5898             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5899             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5900             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    5901             :       GIR_EraseFromParent, /*InsnID*/0,
    5902             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5903             :       GIR_Done,
    5904             :     // Label 181: @13221
    5905             :     GIM_Try, /*On fail goto*//*Label 182*/ 13279,
    5906             :       GIM_CheckFeatures, GIFBS_HasNEON_HasFullFP16,
    5907             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    5908             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    5909             :       // MIs[0] Rd
    5910             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    5911             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5912             :       // MIs[0] Operand 1
    5913             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmaxnmp,
    5914             :       // MIs[0] Rn
    5915             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    5916             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5917             :       // MIs[0] Rm
    5918             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    5919             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    5920             :       // (intrinsic_wo_chain:v8f16 224:iPTR, V128:v8f16:$Rn, V128:v8f16:$Rm)  =>  (FMAXNMPv8f16:v8f16 V128:v8f16:$Rn, V128:v8f16:$Rm)
    5921             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMAXNMPv8f16,
    5922             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5923             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5924             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    5925             :       GIR_EraseFromParent, /*InsnID*/0,
    5926             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5927             :       GIR_Done,
    5928             :     // Label 182: @13279
    5929             :     GIM_Try, /*On fail goto*//*Label 183*/ 13337,
    5930             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5931             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    5932             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    5933             :       // MIs[0] Rd
    5934             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    5935             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5936             :       // MIs[0] Operand 1
    5937             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmaxnmp,
    5938             :       // MIs[0] Rn
    5939             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    5940             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5941             :       // MIs[0] Rm
    5942             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
    5943             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    5944             :       // (intrinsic_wo_chain:v2f32 224:iPTR, V64:v2f32:$Rn, V64:v2f32:$Rm)  =>  (FMAXNMPv2f32:v2f32 V64:v2f32:$Rn, V64:v2f32:$Rm)
    5945             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMAXNMPv2f32,
    5946             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5947             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5948             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    5949             :       GIR_EraseFromParent, /*InsnID*/0,
    5950             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5951             :       GIR_Done,
    5952             :     // Label 183: @13337
    5953             :     GIM_Try, /*On fail goto*//*Label 184*/ 13395,
    5954             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5955             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    5956             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    5957             :       // MIs[0] Rd
    5958             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    5959             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5960             :       // MIs[0] Operand 1
    5961             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmaxnmp,
    5962             :       // MIs[0] Rn
    5963             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    5964             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5965             :       // MIs[0] Rm
    5966             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    5967             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    5968             :       // (intrinsic_wo_chain:v4f32 224:iPTR, V128:v4f32:$Rn, V128:v4f32:$Rm)  =>  (FMAXNMPv4f32:v4f32 V128:v4f32:$Rn, V128:v4f32:$Rm)
    5969             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMAXNMPv4f32,
    5970             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5971             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5972             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    5973             :       GIR_EraseFromParent, /*InsnID*/0,
    5974             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5975             :       GIR_Done,
    5976             :     // Label 184: @13395
    5977             :     GIM_Try, /*On fail goto*//*Label 185*/ 13453,
    5978             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5979             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    5980             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    5981             :       // MIs[0] Rd
    5982             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    5983             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5984             :       // MIs[0] Operand 1
    5985             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmaxnmp,
    5986             :       // MIs[0] Rn
    5987             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    5988             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5989             :       // MIs[0] Rm
    5990             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    5991             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    5992             :       // (intrinsic_wo_chain:v2f64 224:iPTR, V128:v2f64:$Rn, V128:v2f64:$Rm)  =>  (FMAXNMPv2f64:v2f64 V128:v2f64:$Rn, V128:v2f64:$Rm)
    5993             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMAXNMPv2f64,
    5994             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5995             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5996             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    5997             :       GIR_EraseFromParent, /*InsnID*/0,
    5998             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5999             :       GIR_Done,
    6000             :     // Label 185: @13453
    6001             :     GIM_Try, /*On fail goto*//*Label 186*/ 13511,
    6002             :       GIM_CheckFeatures, GIFBS_HasNEON_HasFullFP16,
    6003             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    6004             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    6005             :       // MIs[0] Rd
    6006             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    6007             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6008             :       // MIs[0] Operand 1
    6009             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmaxp,
    6010             :       // MIs[0] Rn
    6011             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    6012             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    6013             :       // MIs[0] Rm
    6014             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
    6015             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    6016             :       // (intrinsic_wo_chain:v4f16 226:iPTR, V64:v4f16:$Rn, V64:v4f16:$Rm)  =>  (FMAXPv4f16:v4f16 V64:v4f16:$Rn, V64:v4f16:$Rm)
    6017             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMAXPv4f16,
    6018             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6019             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    6020             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    6021             :       GIR_EraseFromParent, /*InsnID*/0,
    6022             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6023             :       GIR_Done,
    6024             :     // Label 186: @13511
    6025             :     GIM_Try, /*On fail goto*//*Label 187*/ 13569,
    6026             :       GIM_CheckFeatures, GIFBS_HasNEON_HasFullFP16,
    6027             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    6028             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    6029             :       // MIs[0] Rd
    6030             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    6031             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6032             :       // MIs[0] Operand 1
    6033             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmaxp,
    6034             :       // MIs[0] Rn
    6035             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    6036             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    6037             :       // MIs[0] Rm
    6038             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    6039             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    6040             :       // (intrinsic_wo_chain:v8f16 226:iPTR, V128:v8f16:$Rn, V128:v8f16:$Rm)  =>  (FMAXPv8f16:v8f16 V128:v8f16:$Rn, V128:v8f16:$Rm)
    6041             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMAXPv8f16,
    6042             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6043             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    6044             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    6045             :       GIR_EraseFromParent, /*InsnID*/0,
    6046             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6047             :       GIR_Done,
    6048             :     // Label 187: @13569
    6049             :     GIM_Try, /*On fail goto*//*Label 188*/ 13627,
    6050             :       GIM_CheckFeatures, GIFBS_HasNEON,
    6051             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    6052             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    6053             :       // MIs[0] Rd
    6054             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    6055             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6056             :       // MIs[0] Operand 1
    6057             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmaxp,
    6058             :       // MIs[0] Rn
    6059             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    6060             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    6061             :       // MIs[0] Rm
    6062             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
    6063             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    6064             :       // (intrinsic_wo_chain:v2f32 226:iPTR, V64:v2f32:$Rn, V64:v2f32:$Rm)  =>  (FMAXPv2f32:v2f32 V64:v2f32:$Rn, V64:v2f32:$Rm)
    6065             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMAXPv2f32,
    6066             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6067             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    6068             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    6069             :       GIR_EraseFromParent, /*InsnID*/0,
    6070             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6071             :       GIR_Done,
    6072             :     // Label 188: @13627
    6073             :     GIM_Try, /*On fail goto*//*Label 189*/ 13685,
    6074             :       GIM_CheckFeatures, GIFBS_HasNEON,
    6075             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    6076             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    6077             :       // MIs[0] Rd
    6078             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    6079             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6080             :       // MIs[0] Operand 1
    6081             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmaxp,
    6082             :       // MIs[0] Rn
    6083             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    6084             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    6085             :       // MIs[0] Rm
    6086             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    6087             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    6088             :       // (intrinsic_wo_chain:v4f32 226:iPTR, V128:v4f32:$Rn, V128:v4f32:$Rm)  =>  (FMAXPv4f32:v4f32 V128:v4f32:$Rn, V128:v4f32:$Rm)
    6089             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMAXPv4f32,
    6090             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6091             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    6092             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    6093             :       GIR_EraseFromParent, /*InsnID*/0,
    6094             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6095             :       GIR_Done,
    6096             :     // Label 189: @13685
    6097             :     GIM_Try, /*On fail goto*//*Label 190*/ 13743,
    6098             :       GIM_CheckFeatures, GIFBS_HasNEON,
    6099             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    6100             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    6101             :       // MIs[0] Rd
    6102             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    6103             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6104             :       // MIs[0] Operand 1
    6105             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmaxp,
    6106             :       // MIs[0] Rn
    6107             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    6108             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    6109             :       // MIs[0] Rm
    6110             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    6111             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    6112             :       // (intrinsic_wo_chain:v2f64 226:iPTR, V128:v2f64:$Rn, V128:v2f64:$Rm)  =>  (FMAXPv2f64:v2f64 V128:v2f64:$Rn, V128:v2f64:$Rm)
    6113             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMAXPv2f64,
    6114             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6115             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    6116             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    6117             :       GIR_EraseFromParent, /*InsnID*/0,
    6118             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6119             :       GIR_Done,
    6120             :     // Label 190: @13743
    6121             :     GIM_Try, /*On fail goto*//*Label 191*/ 13801,
    6122             :       GIM_CheckFeatures, GIFBS_HasNEON_HasFullFP16,
    6123             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    6124             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    6125             :       // MIs[0] Rd
    6126             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    6127             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6128             :       // MIs[0] Operand 1
    6129             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fminnmp,
    6130             :       // MIs[0] Rn
    6131             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    6132             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    6133             :       // MIs[0] Rm
    6134             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
    6135             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    6136             :       // (intrinsic_wo_chain:v4f16 230:iPTR, V64:v4f16:$Rn, V64:v4f16:$Rm)  =>  (FMINNMPv4f16:v4f16 V64:v4f16:$Rn, V64:v4f16:$Rm)
    6137             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMINNMPv4f16,
    6138             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6139             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    6140             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    6141             :       GIR_EraseFromParent, /*InsnID*/0,
    6142             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6143             :       GIR_Done,
    6144             :     // Label 191: @13801
    6145             :     GIM_Try, /*On fail goto*//*Label 192*/ 13859,
    6146             :       GIM_CheckFeatures, GIFBS_HasNEON_HasFullFP16,
    6147             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    6148             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    6149             :       // MIs[0] Rd
    6150             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    6151             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6152             :       // MIs[0] Operand 1
    6153             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fminnmp,
    6154             :       // MIs[0] Rn
    6155             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    6156             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    6157             :       // MIs[0] Rm
    6158             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    6159             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    6160             :       // (intrinsic_wo_chain:v8f16 230:iPTR, V128:v8f16:$Rn, V128:v8f16:$Rm)  =>  (FMINNMPv8f16:v8f16 V128:v8f16:$Rn, V128:v8f16:$Rm)
    6161             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMINNMPv8f16,
    6162             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6163             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    6164             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    6165             :       GIR_EraseFromParent, /*InsnID*/0,
    6166             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6167             :       GIR_Done,
    6168             :     // Label 192: @13859
    6169             :     GIM_Try, /*On fail goto*//*Label 193*/ 13917,
    6170             :       GIM_CheckFeatures, GIFBS_HasNEON,
    6171             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    6172             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    6173             :       // MIs[0] Rd
    6174             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    6175             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6176             :       // MIs[0] Operand 1
    6177             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fminnmp,
    6178             :       // MIs[0] Rn
    6179             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    6180             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    6181             :       // MIs[0] Rm
    6182             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
    6183             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    6184             :       // (intrinsic_wo_chain:v2f32 230:iPTR, V64:v2f32:$Rn, V64:v2f32:$Rm)  =>  (FMINNMPv2f32:v2f32 V64:v2f32:$Rn, V64:v2f32:$Rm)
    6185             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMINNMPv2f32,
    6186             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6187             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    6188             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    6189             :       GIR_EraseFromParent, /*InsnID*/0,
    6190             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6191             :       GIR_Done,
    6192             :     // Label 193: @13917
    6193             :     GIM_Try, /*On fail goto*//*Label 194*/ 13975,
    6194             :       GIM_CheckFeatures, GIFBS_HasNEON,
    6195             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    6196             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    6197             :       // MIs[0] Rd
    6198             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    6199             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6200             :       // MIs[0] Operand 1
    6201             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fminnmp,
    6202             :       // MIs[0] Rn
    6203             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    6204             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    6205             :       // MIs[0] Rm
    6206             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    6207             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    6208             :       // (intrinsic_wo_chain:v4f32 230:iPTR, V128:v4f32:$Rn, V128:v4f32:$Rm)  =>  (FMINNMPv4f32:v4f32 V128:v4f32:$Rn, V128:v4f32:$Rm)
    6209             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMINNMPv4f32,
    6210             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6211             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    6212             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    6213             :       GIR_EraseFromParent, /*InsnID*/0,
    6214             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6215             :       GIR_Done,
    6216             :     // Label 194: @13975
    6217             :     GIM_Try, /*On fail goto*//*Label 195*/ 14033,
    6218             :       GIM_CheckFeatures, GIFBS_HasNEON,
    6219             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    6220             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    6221             :       // MIs[0] Rd
    6222             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    6223             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6224             :       // MIs[0] Operand 1
    6225             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fminnmp,
    6226             :       // MIs[0] Rn
    6227             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    6228             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    6229             :       // MIs[0] Rm
    6230             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    6231             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    6232             :       // (intrinsic_wo_chain:v2f64 230:iPTR, V128:v2f64:$Rn, V128:v2f64:$Rm)  =>  (FMINNMPv2f64:v2f64 V128:v2f64:$Rn, V128:v2f64:$Rm)
    6233             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMINNMPv2f64,
    6234             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6235             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    6236             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    6237             :       GIR_EraseFromParent, /*InsnID*/0,
    6238             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6239             :       GIR_Done,
    6240             :     // Label 195: @14033
    6241             :     GIM_Try, /*On fail goto*//*Label 196*/ 14091,
    6242             :       GIM_CheckFeatures, GIFBS_HasNEON_HasFullFP16,
    6243             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    6244             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    6245             :       // MIs[0] Rd
    6246             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    6247             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6248             :       // MIs[0] Operand 1
    6249             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fminp,
    6250             :       // MIs[0] Rn
    6251             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    6252             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    6253             :       // MIs[0] Rm
    6254             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
    6255             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    6256             :       // (intrinsic_wo_chain:v4f16 232:iPTR, V64:v4f16:$Rn, V64:v4f16:$Rm)  =>  (FMINPv4f16:v4f16 V64:v4f16:$Rn, V64:v4f16:$Rm)
    6257             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMINPv4f16,
    6258             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6259             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    6260             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    6261             :       GIR_EraseFromParent, /*InsnID*/0,
    6262             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6263             :       GIR_Done,
    6264             :     // Label 196: @14091
    6265             :     GIM_Try, /*On fail goto*//*Label 197*/ 14149,
    6266             :       GIM_CheckFeatures, GIFBS_HasNEON_HasFullFP16,
    6267             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    6268             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    6269             :       // MIs[0] Rd
    6270             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    6271             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6272             :       // MIs[0] Operand 1
    6273             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fminp,
    6274             :       // MIs[0] Rn
    6275             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    6276             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    6277             :       // MIs[0] Rm
    6278             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    6279             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    6280             :       // (intrinsic_wo_chain:v8f16 232:iPTR, V128:v8f16:$Rn, V128:v8f16:$Rm)  =>  (FMINPv8f16:v8f16 V128:v8f16:$Rn, V128:v8f16:$Rm)
    6281             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMINPv8f16,
    6282             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6283             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    6284             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    6285             :       GIR_EraseFromParent, /*InsnID*/0,
    6286             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6287             :       GIR_Done,
    6288             :     // Label 197: @14149
    6289             :     GIM_Try, /*On fail goto*//*Label 198*/ 14207,
    6290             :       GIM_CheckFeatures, GIFBS_HasNEON,
    6291             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    6292             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    6293             :       // MIs[0] Rd
    6294             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    6295             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6296             :       // MIs[0] Operand 1
    6297             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fminp,
    6298             :       // MIs[0] Rn
    6299             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    6300             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    6301             :       // MIs[0] Rm
    6302             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
    6303             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    6304             :       // (intrinsic_wo_chain:v2f32 232:iPTR, V64:v2f32:$Rn, V64:v2f32:$Rm)  =>  (FMINPv2f32:v2f32 V64:v2f32:$Rn, V64:v2f32:$Rm)
    6305             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMINPv2f32,
    6306             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6307             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    6308             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    6309             :       GIR_EraseFromParent, /*InsnID*/0,
    6310             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6311             :       GIR_Done,
    6312             :     // Label 198: @14207
    6313             :     GIM_Try, /*On fail goto*//*Label 199*/ 14265,
    6314             :       GIM_CheckFeatures, GIFBS_HasNEON,
    6315             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    6316             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    6317             :       // MIs[0] Rd
    6318             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    6319             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6320             :       // MIs[0] Operand 1
    6321             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fminp,
    6322             :       // MIs[0] Rn
    6323             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    6324             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    6325             :       // MIs[0] Rm
    6326             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    6327             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    6328             :       // (intrinsic_wo_chain:v4f32 232:iPTR, V128:v4f32:$Rn, V128:v4f32:$Rm)  =>  (FMINPv4f32:v4f32 V128:v4f32:$Rn, V128:v4f32:$Rm)
    6329             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMINPv4f32,
    6330             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6331             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    6332             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    6333             :       GIR_EraseFromParent, /*InsnID*/0,
    6334             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6335             :       GIR_Done,
    6336             :     // Label 199: @14265
    6337             :     GIM_Try, /*On fail goto*//*Label 200*/ 14323,
    6338             :       GIM_CheckFeatures, GIFBS_HasNEON,
    6339             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    6340             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    6341             :       // MIs[0] Rd
    6342             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    6343             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6344             :       // MIs[0] Operand 1
    6345             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fminp,
    6346             :       // MIs[0] Rn
    6347             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    6348             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    6349             :       // MIs[0] Rm
    6350             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    6351             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    6352             :       // (intrinsic_wo_chain:v2f64 232:iPTR, V128:v2f64:$Rn, V128:v2f64:$Rm)  =>  (FMINPv2f64:v2f64 V128:v2f64:$Rn, V128:v2f64:$Rm)
    6353             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMINPv2f64,
    6354             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6355             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    6356             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    6357             :       GIR_EraseFromParent, /*InsnID*/0,
    6358             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6359             :       GIR_Done,
    6360             :     // Label 200: @14323
    6361             :     GIM_Try, /*On fail goto*//*Label 201*/ 14381,
    6362             :       GIM_CheckFeatures, GIFBS_HasNEON_HasFullFP16,
    6363             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    6364             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    6365             :       // MIs[0] Rd
    6366             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    6367             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6368             :       // MIs[0] Operand 1
    6369             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmulx,
    6370             :       // MIs[0] Rn
    6371             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    6372             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    6373             :       // MIs[0] Rm
    6374             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
    6375             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    6376             :       // (intrinsic_wo_chain:v4f16 234:iPTR, V64:v4f16:$Rn, V64:v4f16:$Rm)  =>  (FMULXv4f16:v4f16 V64:v4f16:$Rn, V64:v4f16:$Rm)
    6377             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMULXv4f16,
    6378             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6379             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    6380             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    6381             :       GIR_EraseFromParent, /*InsnID*/0,
    6382             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6383             :       GIR_Done,
    6384             :     // Label 201: @14381
    6385             :     GIM_Try, /*On fail goto*//*Label 202*/ 14439,
    6386             :       GIM_CheckFeatures, GIFBS_HasNEON_HasFullFP16,
    6387             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    6388             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    6389             :       // MIs[0] Rd
    6390             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    6391             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6392             :       // MIs[0] Operand 1
    6393             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmulx,
    6394             :       // MIs[0] Rn
    6395             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    6396             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    6397             :       // MIs[0] Rm
    6398             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    6399             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    6400             :       // (intrinsic_wo_chain:v8f16 234:iPTR, V128:v8f16:$Rn, V128:v8f16:$Rm)  =>  (FMULXv8f16:v8f16 V128:v8f16:$Rn, V128:v8f16:$Rm)
    6401             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMULXv8f16,
    6402             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6403             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    6404             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    6405             :       GIR_EraseFromParent, /*InsnID*/0,
    6406             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6407             :       GIR_Done,
    6408             :     // Label 202: @14439
    6409             :     GIM_Try, /*On fail goto*//*Label 203*/ 14497,
    6410             :       GIM_CheckFeatures, GIFBS_HasNEON,
    6411             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    6412             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    6413             :       // MIs[0] Rd
    6414             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    6415             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6416             :       // MIs[0] Operand 1
    6417             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmulx,
    6418             :       // MIs[0] Rn
    6419             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    6420             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    6421             :       // MIs[0] Rm
    6422             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
    6423             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    6424             :       // (intrinsic_wo_chain:v2f32 234:iPTR, V64:v2f32:$Rn, V64:v2f32:$Rm)  =>  (FMULXv2f32:v2f32 V64:v2f32:$Rn, V64:v2f32:$Rm)
    6425             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMULXv2f32,
    6426             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6427             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    6428             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    6429             :       GIR_EraseFromParent, /*InsnID*/0,
    6430             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6431             :       GIR_Done,
    6432             :     // Label 203: @14497
    6433             :     GIM_Try, /*On fail goto*//*Label 204*/ 14555,
    6434             :       GIM_CheckFeatures, GIFBS_HasNEON,
    6435             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    6436             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    6437             :       // MIs[0] Rd
    6438             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    6439             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6440             :       // MIs[0] Operand 1
    6441             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmulx,
    6442             :       // MIs[0] Rn
    6443             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    6444             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    6445             :       // MIs[0] Rm
    6446             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    6447             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    6448             :       // (intrinsic_wo_chain:v4f32 234:iPTR, V128:v4f32:$Rn, V128:v4f32:$Rm)  =>  (FMULXv4f32:v4f32 V128:v4f32:$Rn, V128:v4f32:$Rm)
    6449             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMULXv4f32,
    6450             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6451             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    6452             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    6453             :       GIR_EraseFromParent, /*InsnID*/0,
    6454             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6455             :       GIR_Done,
    6456             :     // Label 204: @14555
    6457             :     GIM_Try, /*On fail goto*//*Label 205*/ 14613,
    6458             :       GIM_CheckFeatures, GIFBS_HasNEON,
    6459             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    6460             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    6461             :       // MIs[0] Rd
    6462             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    6463             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6464             :       // MIs[0] Operand 1
    6465             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmulx,
    6466             :       // MIs[0] Rn
    6467             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    6468             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    6469             :       // MIs[0] Rm
    6470             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    6471             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    6472             :       // (intrinsic_wo_chain:v2f64 234:iPTR, V128:v2f64:$Rn, V128:v2f64:$Rm)  =>  (FMULXv2f64:v2f64 V128:v2f64:$Rn, V128:v2f64:$Rm)
    6473             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMULXv2f64,
    6474             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6475             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    6476             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    6477             :       GIR_EraseFromParent, /*InsnID*/0,
    6478             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6479             :       GIR_Done,
    6480             :     // Label 205: @14613
    6481             :     GIM_Try, /*On fail goto*//*Label 206*/ 14671,
    6482             :       GIM_CheckFeatures, GIFBS_HasNEON_HasFullFP16,
    6483             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    6484             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    6485             :       // MIs[0] Rd
    6486             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    6487             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6488             :       // MIs[0] Operand 1
    6489             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frecps,
    6490             :       // MIs[0] Rn
    6491             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    6492             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    6493             :       // MIs[0] Rm
    6494             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
    6495             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    6496             :       // (intrinsic_wo_chain:v4f16 236:iPTR, V64:v4f16:$Rn, V64:v4f16:$Rm)  =>  (FRECPSv4f16:v4f16 V64:v4f16:$Rn, V64:v4f16:$Rm)
    6497             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRECPSv4f16,
    6498             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6499             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    6500             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    6501             :       GIR_EraseFromParent, /*InsnID*/0,
    6502             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6503             :       GIR_Done,
    6504             :     // Label 206: @14671
    6505             :     GIM_Try, /*On fail goto*//*Label 207*/ 14729,
    6506             :       GIM_CheckFeatures, GIFBS_HasNEON_HasFullFP16,
    6507             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    6508             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    6509             :       // MIs[0] Rd
    6510             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    6511             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6512             :       // MIs[0] Operand 1
    6513             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frecps,
    6514             :       // MIs[0] Rn
    6515             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    6516             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    6517             :       // MIs[0] Rm
    6518             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    6519             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    6520             :       // (intrinsic_wo_chain:v8f16 236:iPTR, V128:v8f16:$Rn, V128:v8f16:$Rm)  =>  (FRECPSv8f16:v8f16 V128:v8f16:$Rn, V128:v8f16:$Rm)
    6521             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRECPSv8f16,
    6522             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6523             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    6524             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    6525             :       GIR_EraseFromParent, /*InsnID*/0,
    6526             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6527             :       GIR_Done,
    6528             :     // Label 207: @14729
    6529             :     GIM_Try, /*On fail goto*//*Label 208*/ 14787,
    6530             :       GIM_CheckFeatures, GIFBS_HasNEON,
    6531             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    6532             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    6533             :       // MIs[0] Rd
    6534             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    6535             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6536             :       // MIs[0] Operand 1
    6537             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frecps,
    6538             :       // MIs[0] Rn
    6539             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    6540             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    6541             :       // MIs[0] Rm
    6542             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
    6543             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    6544             :       // (intrinsic_wo_chain:v2f32 236:iPTR, V64:v2f32:$Rn, V64:v2f32:$Rm)  =>  (FRECPSv2f32:v2f32 V64:v2f32:$Rn, V64:v2f32:$Rm)
    6545             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRECPSv2f32,
    6546             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6547             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    6548             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    6549             :       GIR_EraseFromParent, /*InsnID*/0,
    6550             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6551             :       GIR_Done,
    6552             :     // Label 208: @14787
    6553             :     GIM_Try, /*On fail goto*//*Label 209*/ 14845,
    6554             :       GIM_CheckFeatures, GIFBS_HasNEON,
    6555             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    6556             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    6557             :       // MIs[0] Rd
    6558             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    6559             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6560             :       // MIs[0] Operand 1
    6561             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frecps,
    6562             :       // MIs[0] Rn
    6563             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    6564             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    6565             :       // MIs[0] Rm
    6566             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    6567             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    6568             :       // (intrinsic_wo_chain:v4f32 236:iPTR, V128:v4f32:$Rn, V128:v4f32:$Rm)  =>  (FRECPSv4f32:v4f32 V128:v4f32:$Rn, V128:v4f32:$Rm)
    6569             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRECPSv4f32,
    6570             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6571             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    6572             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    6573             :       GIR_EraseFromParent, /*InsnID*/0,
    6574             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6575             :       GIR_Done,
    6576             :     // Label 209: @14845
    6577             :     GIM_Try, /*On fail goto*//*Label 210*/ 14903,
    6578             :       GIM_CheckFeatures, GIFBS_HasNEON,
    6579             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    6580             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    6581             :       // MIs[0] Rd
    6582             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    6583             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6584             :       // MIs[0] Operand 1
    6585             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frecps,
    6586             :       // MIs[0] Rn
    6587             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    6588             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    6589             :       // MIs[0] Rm
    6590             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    6591             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    6592             :       // (intrinsic_wo_chain:v2f64 236:iPTR, V128:v2f64:$Rn, V128:v2f64:$Rm)  =>  (FRECPSv2f64:v2f64 V128:v2f64:$Rn, V128:v2f64:$Rm)
    6593             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRECPSv2f64,
    6594             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6595             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    6596             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    6597             :       GIR_EraseFromParent, /*InsnID*/0,
    6598             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6599             :       GIR_Done,
    6600             :     // Label 210: @14903
    6601             :     GIM_Try, /*On fail goto*//*Label 211*/ 14961,
    6602             :       GIM_CheckFeatures, GIFBS_HasNEON_HasFullFP16,
    6603             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    6604             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    6605             :       // MIs[0] Rd
    6606             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    6607             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6608             :       // MIs[0] Operand 1
    6609             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frsqrts,
    6610             :       // MIs[0] Rn
    6611             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    6612             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    6613             :       // MIs[0] Rm
    6614             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
    6615             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    6616             :       // (intrinsic_wo_chain:v4f16 240:iPTR, V64:v4f16:$Rn, V64:v4f16:$Rm)  =>  (FRSQRTSv4f16:v4f16 V64:v4f16:$Rn, V64:v4f16:$Rm)
    6617             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRSQRTSv4f16,
    6618             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6619             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    6620             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    6621             :       GIR_EraseFromParent, /*InsnID*/0,
    6622             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6623             :       GIR_Done,
    6624             :     // Label 211: @14961
    6625             :     GIM_Try, /*On fail goto*//*Label 212*/ 15019,
    6626             :       GIM_CheckFeatures, GIFBS_HasNEON_HasFullFP16,
    6627             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    6628             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    6629             :       // MIs[0] Rd
    6630             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    6631             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6632             :       // MIs[0] Operand 1
    6633             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frsqrts,
    6634             :       // MIs[0] Rn
    6635             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    6636             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    6637             :       // MIs[0] Rm
    6638             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    6639             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    6640             :       // (intrinsic_wo_chain:v8f16 240:iPTR, V128:v8f16:$Rn, V128:v8f16:$Rm)  =>  (FRSQRTSv8f16:v8f16 V128:v8f16:$Rn, V128:v8f16:$Rm)
    6641             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRSQRTSv8f16,
    6642             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6643             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    6644             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    6645             :       GIR_EraseFromParent, /*InsnID*/0,
    6646             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6647             :       GIR_Done,
    6648             :     // Label 212: @15019
    6649             :     GIM_Try, /*On fail goto*//*Label 213*/ 15077,
    6650             :       GIM_CheckFeatures, GIFBS_HasNEON,
    6651             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    6652             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    6653             :       // MIs[0] Rd
    6654             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    6655             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6656             :       // MIs[0] Operand 1
    6657             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frsqrts,
    6658             :       // MIs[0] Rn
    6659             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    6660             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    6661             :       // MIs[0] Rm
    6662             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
    6663             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    6664             :       // (intrinsic_wo_chain:v2f32 240:iPTR, V64:v2f32:$Rn, V64:v2f32:$Rm)  =>  (FRSQRTSv2f32:v2f32 V64:v2f32:$Rn, V64:v2f32:$Rm)
    6665             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRSQRTSv2f32,
    6666             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6667             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    6668             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    6669             :       GIR_EraseFromParent, /*InsnID*/0,
    6670             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6671             :       GIR_Done,
    6672             :     // Label 213: @15077
    6673             :     GIM_Try, /*On fail goto*//*Label 214*/ 15135,
    6674             :       GIM_CheckFeatures, GIFBS_HasNEON,
    6675             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    6676             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    6677             :       // MIs[0] Rd
    6678             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    6679             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6680             :       // MIs[0] Operand 1
    6681             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frsqrts,
    6682             :       // MIs[0] Rn
    6683             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    6684             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    6685             :       // MIs[0] Rm
    6686             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    6687             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    6688             :       // (intrinsic_wo_chain:v4f32 240:iPTR, V128:v4f32:$Rn, V128:v4f32:$Rm)  =>  (FRSQRTSv4f32:v4f32 V128:v4f32:$Rn, V128:v4f32:$Rm)
    6689             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRSQRTSv4f32,
    6690             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6691             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    6692             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    6693             :       GIR_EraseFromParent, /*InsnID*/0,
    6694             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6695             :       GIR_Done,
    6696             :     // Label 214: @15135
    6697             :     GIM_Try, /*On fail goto*//*Label 215*/ 15193,
    6698             :       GIM_CheckFeatures, GIFBS_HasNEON,
    6699             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    6700             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    6701             :       // MIs[0] Rd
    6702             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    6703             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6704             :       // MIs[0] Operand 1
    6705             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frsqrts,
    6706             :       // MIs[0] Rn
    6707             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    6708             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    6709             :       // MIs[0] Rm
    6710             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    6711             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    6712             :       // (intrinsic_wo_chain:v2f64 240:iPTR, V128:v2f64:$Rn, V128:v2f64:$Rm)  =>  (FRSQRTSv2f64:v2f64 V128:v2f64:$Rn, V128:v2f64:$Rm)
    6713             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRSQRTSv2f64,
    6714             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6715             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    6716             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    6717             :       GIR_EraseFromParent, /*InsnID*/0,
    6718             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6719             :       GIR_Done,
    6720             :     // Label 215: @15193
    6721             :     GIM_Try, /*On fail goto*//*Label 216*/ 15251,
    6722             :       GIM_CheckFeatures, GIFBS_HasNEON,
    6723             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    6724             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    6725             :       // MIs[0] Rd
    6726             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
    6727             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6728             :       // MIs[0] Operand 1
    6729             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_pmul,
    6730             :       // MIs[0] Rn
    6731             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
    6732             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    6733             :       // MIs[0] Rm
    6734             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
    6735             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    6736             :       // (intrinsic_wo_chain:v8i8 253:iPTR, V64:v8i8:$Rn, V64:v8i8:$Rm)  =>  (PMULv8i8:v8i8 V64:v8i8:$Rn, V64:v8i8:$Rm)
    6737             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::PMULv8i8,
    6738             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6739             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    6740             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    6741             :       GIR_EraseFromParent, /*InsnID*/0,
    6742             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6743             :       GIR_Done,
    6744             :     // Label 216: @15251
    6745             :     GIM_Try, /*On fail goto*//*Label 217*/ 15309,
    6746             :       GIM_CheckFeatures, GIFBS_HasNEON,
    6747             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    6748             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    6749             :       // MIs[0] Rd
    6750             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
    6751             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6752             :       // MIs[0] Operand 1
    6753             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_pmul,
    6754             :       // MIs[0] Rn
    6755             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    6756             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    6757             :       // MIs[0] Rm
    6758             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
    6759             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    6760             :       // (intrinsic_wo_chain:v16i8 253:iPTR, V128:v16i8:$Rn, V128:v16i8:$Rm)  =>  (PMULv16i8:v16i8 V128:v16i8:$Rn, V128:v16i8:$Rm)
    6761             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::PMULv16i8,
    6762             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6763             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    6764             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    6765             :       GIR_EraseFromParent, /*InsnID*/0,
    6766             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6767             :       GIR_Done,
    6768             :     // Label 217: @15309
    6769             :     GIM_Try, /*On fail goto*//*Label 218*/ 15367,
    6770             :       GIM_CheckFeatures, GIFBS_HasNEON,
    6771             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    6772             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    6773             :       // MIs[0] Rd
    6774             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
    6775             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6776             :       // MIs[0] Operand 1
    6777             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    6778             :       // MIs[0] Rn
    6779             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
    6780             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    6781             :       // MIs[0] Rm
    6782             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
    6783             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    6784             :       // (intrinsic_wo_chain:v8i8 260:iPTR, V64:v8i8:$Rn, V64:v8i8:$Rm)  =>  (SABDv8i8:v8i8 V64:v8i8:$Rn, V64:v8i8:$Rm)
    6785             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABDv8i8,
    6786             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6787             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    6788             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    6789             :       GIR_EraseFromParent, /*InsnID*/0,
    6790             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6791             :       GIR_Done,
    6792             :     // Label 218: @15367
    6793             :     GIM_Try, /*On fail goto*//*Label 219*/ 15425,
    6794             :       GIM_CheckFeatures, GIFBS_HasNEON,
    6795             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    6796             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    6797             :       // MIs[0] Rd
    6798             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
    6799             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6800             :       // MIs[0] Operand 1
    6801             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    6802             :       // MIs[0] Rn
    6803             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    6804             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    6805             :       // MIs[0] Rm
    6806             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
    6807             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    6808             :       // (intrinsic_wo_chain:v16i8 260:iPTR, V128:v16i8:$Rn, V128:v16i8:$Rm)  =>  (SABDv16i8:v16i8 V128:v16i8:$Rn, V128:v16i8:$Rm)
    6809             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABDv16i8,
    6810             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6811             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    6812             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    6813             :       GIR_EraseFromParent, /*InsnID*/0,
    6814             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6815             :       GIR_Done,
    6816             :     // Label 219: @15425
    6817             :     GIM_Try, /*On fail goto*//*Label 220*/ 15483,
    6818             :       GIM_CheckFeatures, GIFBS_HasNEON,
    6819             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    6820             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    6821             :       // MIs[0] Rd
    6822             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    6823             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6824             :       // MIs[0] Operand 1
    6825             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    6826             :       // MIs[0] Rn
    6827             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    6828             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    6829             :       // MIs[0] Rm
    6830             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
    6831             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    6832             :       // (intrinsic_wo_chain:v4i16 260:iPTR, V64:v4i16:$Rn, V64:v4i16:$Rm)  =>  (SABDv4i16:v4i16 V64:v4i16:$Rn, V64:v4i16:$Rm)
    6833             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABDv4i16,
    6834             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6835             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    6836             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    6837             :       GIR_EraseFromParent, /*InsnID*/0,
    6838             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6839             :       GIR_Done,
    6840             :     // Label 220: @15483
    6841             :     GIM_Try, /*On fail goto*//*Label 221*/ 15541,
    6842             :       GIM_CheckFeatures, GIFBS_HasNEON,
    6843             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    6844             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    6845             :       // MIs[0] Rd
    6846             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    6847             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6848             :       // MIs[0] Operand 1
    6849             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    6850             :       // MIs[0] Rn
    6851             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    6852             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    6853             :       // MIs[0] Rm
    6854             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    6855             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    6856             :       // (intrinsic_wo_chain:v8i16 260:iPTR, V128:v8i16:$Rn, V128:v8i16:$Rm)  =>  (SABDv8i16:v8i16 V128:v8i16:$Rn, V128:v8i16:$Rm)
    6857             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABDv8i16,
    6858             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6859             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    6860             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    6861             :       GIR_EraseFromParent, /*InsnID*/0,
    6862             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6863             :       GIR_Done,
    6864             :     // Label 221: @15541
    6865             :     GIM_Try, /*On fail goto*//*Label 222*/ 15599,
    6866             :       GIM_CheckFeatures, GIFBS_HasNEON,
    6867             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    6868             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    6869             :       // MIs[0] Rd
    6870             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    6871             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6872             :       // MIs[0] Operand 1
    6873             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    6874             :       // MIs[0] Rn
    6875             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    6876             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    6877             :       // MIs[0] Rm
    6878             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
    6879             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    6880             :       // (intrinsic_wo_chain:v2i32 260:iPTR, V64:v2i32:$Rn, V64:v2i32:$Rm)  =>  (SABDv2i32:v2i32 V64:v2i32:$Rn, V64:v2i32:$Rm)
    6881             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABDv2i32,
    6882             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6883             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    6884             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    6885             :       GIR_EraseFromParent, /*InsnID*/0,
    6886             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6887             :       GIR_Done,
    6888             :     // Label 222: @15599
    6889             :     GIM_Try, /*On fail goto*//*Label 223*/ 15657,
    6890             :       GIM_CheckFeatures, GIFBS_HasNEON,
    6891             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    6892             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    6893             :       // MIs[0] Rd
    6894             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    6895             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6896             :       // MIs[0] Operand 1
    6897             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    6898             :       // MIs[0] Rn
    6899             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    6900             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    6901             :       // MIs[0] Rm
    6902             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    6903             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    6904             :       // (intrinsic_wo_chain:v4i32 260:iPTR, V128:v4i32:$Rn, V128:v4i32:$Rm)  =>  (SABDv4i32:v4i32 V128:v4i32:$Rn, V128:v4i32:$Rm)
    6905             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABDv4i32,
    6906             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6907             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    6908             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    6909             :       GIR_EraseFromParent, /*InsnID*/0,
    6910             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6911             :       GIR_Done,
    6912             :     // Label 223: @15657
    6913             :     GIM_Try, /*On fail goto*//*Label 224*/ 15715,
    6914             :       GIM_CheckFeatures, GIFBS_HasNEON,
    6915             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    6916             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    6917             :       // MIs[0] Rd
    6918             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
    6919             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6920             :       // MIs[0] Operand 1
    6921             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_shadd,
    6922             :       // MIs[0] Rn
    6923             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
    6924             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    6925             :       // MIs[0] Rm
    6926             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
    6927             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    6928             :       // (intrinsic_wo_chain:v8i8 267:iPTR, V64:v8i8:$Rn, V64:v8i8:$Rm)  =>  (SHADDv8i8:v8i8 V64:v8i8:$Rn, V64:v8i8:$Rm)
    6929             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SHADDv8i8,
    6930             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6931             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    6932             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    6933             :       GIR_EraseFromParent, /*InsnID*/0,
    6934             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6935             :       GIR_Done,
    6936             :     // Label 224: @15715
    6937             :     GIM_Try, /*On fail goto*//*Label 225*/ 15773,
    6938             :       GIM_CheckFeatures, GIFBS_HasNEON,
    6939             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    6940             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    6941             :       // MIs[0] Rd
    6942             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
    6943             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6944             :       // MIs[0] Operand 1
    6945             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_shadd,
    6946             :       // MIs[0] Rn
    6947             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    6948             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    6949             :       // MIs[0] Rm
    6950             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
    6951             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    6952             :       // (intrinsic_wo_chain:v16i8 267:iPTR, V128:v16i8:$Rn, V128:v16i8:$Rm)  =>  (SHADDv16i8:v16i8 V128:v16i8:$Rn, V128:v16i8:$Rm)
    6953             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SHADDv16i8,
    6954             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6955             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    6956             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    6957             :       GIR_EraseFromParent, /*InsnID*/0,
    6958             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6959             :       GIR_Done,
    6960             :     // Label 225: @15773
    6961             :     GIM_Try, /*On fail goto*//*Label 226*/ 15831,
    6962             :       GIM_CheckFeatures, GIFBS_HasNEON,
    6963             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    6964             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    6965             :       // MIs[0] Rd
    6966             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    6967             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6968             :       // MIs[0] Operand 1
    6969             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_shadd,
    6970             :       // MIs[0] Rn
    6971             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    6972             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    6973             :       // MIs[0] Rm
    6974             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
    6975             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    6976             :       // (intrinsic_wo_chain:v4i16 267:iPTR, V64:v4i16:$Rn, V64:v4i16:$Rm)  =>  (SHADDv4i16:v4i16 V64:v4i16:$Rn, V64:v4i16:$Rm)
    6977             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SHADDv4i16,
    6978             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6979             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    6980             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    6981             :       GIR_EraseFromParent, /*InsnID*/0,
    6982             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6983             :       GIR_Done,
    6984             :     // Label 226: @15831
    6985             :     GIM_Try, /*On fail goto*//*Label 227*/ 15889,
    6986             :       GIM_CheckFeatures, GIFBS_HasNEON,
    6987             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    6988             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    6989             :       // MIs[0] Rd
    6990             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    6991             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6992             :       // MIs[0] Operand 1
    6993             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_shadd,
    6994             :       // MIs[0] Rn
    6995             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    6996             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    6997             :       // MIs[0] Rm
    6998             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    6999             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    7000             :       // (intrinsic_wo_chain:v8i16 267:iPTR, V128:v8i16:$Rn, V128:v8i16:$Rm)  =>  (SHADDv8i16:v8i16 V128:v8i16:$Rn, V128:v8i16:$Rm)
    7001             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SHADDv8i16,
    7002             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7003             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    7004             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    7005             :       GIR_EraseFromParent, /*InsnID*/0,
    7006             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7007             :       GIR_Done,
    7008             :     // Label 227: @15889
    7009             :     GIM_Try, /*On fail goto*//*Label 228*/ 15947,
    7010             :       GIM_CheckFeatures, GIFBS_HasNEON,
    7011             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    7012             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    7013             :       // MIs[0] Rd
    7014             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    7015             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7016             :       // MIs[0] Operand 1
    7017             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_shadd,
    7018             :       // MIs[0] Rn
    7019             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    7020             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    7021             :       // MIs[0] Rm
    7022             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
    7023             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    7024             :       // (intrinsic_wo_chain:v2i32 267:iPTR, V64:v2i32:$Rn, V64:v2i32:$Rm)  =>  (SHADDv2i32:v2i32 V64:v2i32:$Rn, V64:v2i32:$Rm)
    7025             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SHADDv2i32,
    7026             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7027             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    7028             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    7029             :       GIR_EraseFromParent, /*InsnID*/0,
    7030             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7031             :       GIR_Done,
    7032             :     // Label 228: @15947
    7033             :     GIM_Try, /*On fail goto*//*Label 229*/ 16005,
    7034             :       GIM_CheckFeatures, GIFBS_HasNEON,
    7035             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    7036             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    7037             :       // MIs[0] Rd
    7038             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    7039             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7040             :       // MIs[0] Operand 1
    7041             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_shadd,
    7042             :       // MIs[0] Rn
    7043             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    7044             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    7045             :       // MIs[0] Rm
    7046             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    7047             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    7048             :       // (intrinsic_wo_chain:v4i32 267:iPTR, V128:v4i32:$Rn, V128:v4i32:$Rm)  =>  (SHADDv4i32:v4i32 V128:v4i32:$Rn, V128:v4i32:$Rm)
    7049             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SHADDv4i32,
    7050             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7051             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    7052             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    7053             :       GIR_EraseFromParent, /*InsnID*/0,
    7054             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7055             :       GIR_Done,
    7056             :     // Label 229: @16005
    7057             :     GIM_Try, /*On fail goto*//*Label 230*/ 16063,
    7058             :       GIM_CheckFeatures, GIFBS_HasNEON,
    7059             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    7060             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    7061             :       // MIs[0] Rd
    7062             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
    7063             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7064             :       // MIs[0] Operand 1
    7065             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_shsub,
    7066             :       // MIs[0] Rn
    7067             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
    7068             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    7069             :       // MIs[0] Rm
    7070             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
    7071             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    7072             :       // (intrinsic_wo_chain:v8i8 269:iPTR, V64:v8i8:$Rn, V64:v8i8:$Rm)  =>  (SHSUBv8i8:v8i8 V64:v8i8:$Rn, V64:v8i8:$Rm)
    7073             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SHSUBv8i8,
    7074             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7075             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    7076             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    7077             :       GIR_EraseFromParent, /*InsnID*/0,
    7078             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7079             :       GIR_Done,
    7080             :     // Label 230: @16063
    7081             :     GIM_Try, /*On fail goto*//*Label 231*/ 16121,
    7082             :       GIM_CheckFeatures, GIFBS_HasNEON,
    7083             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    7084             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    7085             :       // MIs[0] Rd
    7086             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
    7087             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7088             :       // MIs[0] Operand 1
    7089             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_shsub,
    7090             :       // MIs[0] Rn
    7091             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    7092             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    7093             :       // MIs[0] Rm
    7094             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
    7095             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    7096             :       // (intrinsic_wo_chain:v16i8 269:iPTR, V128:v16i8:$Rn, V128:v16i8:$Rm)  =>  (SHSUBv16i8:v16i8 V128:v16i8:$Rn, V128:v16i8:$Rm)
    7097             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SHSUBv16i8,
    7098             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7099             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    7100             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    7101             :       GIR_EraseFromParent, /*InsnID*/0,
    7102             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7103             :       GIR_Done,
    7104             :     // Label 231: @16121
    7105             :     GIM_Try, /*On fail goto*//*Label 232*/ 16179,
    7106             :       GIM_CheckFeatures, GIFBS_HasNEON,
    7107             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    7108             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    7109             :       // MIs[0] Rd
    7110             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    7111             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7112             :       // MIs[0] Operand 1
    7113             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_shsub,
    7114             :       // MIs[0] Rn
    7115             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    7116             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    7117             :       // MIs[0] Rm
    7118             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
    7119             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    7120             :       // (intrinsic_wo_chain:v4i16 269:iPTR, V64:v4i16:$Rn, V64:v4i16:$Rm)  =>  (SHSUBv4i16:v4i16 V64:v4i16:$Rn, V64:v4i16:$Rm)
    7121             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SHSUBv4i16,
    7122             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7123             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    7124             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    7125             :       GIR_EraseFromParent, /*InsnID*/0,
    7126             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7127             :       GIR_Done,
    7128             :     // Label 232: @16179
    7129             :     GIM_Try, /*On fail goto*//*Label 233*/ 16237,
    7130             :       GIM_CheckFeatures, GIFBS_HasNEON,
    7131             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    7132             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    7133             :       // MIs[0] Rd
    7134             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    7135             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7136             :       // MIs[0] Operand 1
    7137             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_shsub,
    7138             :       // MIs[0] Rn
    7139             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    7140             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    7141             :       // MIs[0] Rm
    7142             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    7143             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    7144             :       // (intrinsic_wo_chain:v8i16 269:iPTR, V128:v8i16:$Rn, V128:v8i16:$Rm)  =>  (SHSUBv8i16:v8i16 V128:v8i16:$Rn, V128:v8i16:$Rm)
    7145             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SHSUBv8i16,
    7146             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7147             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    7148             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    7149             :       GIR_EraseFromParent, /*InsnID*/0,
    7150             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7151             :       GIR_Done,
    7152             :     // Label 233: @16237
    7153             :     GIM_Try, /*On fail goto*//*Label 234*/ 16295,
    7154             :       GIM_CheckFeatures, GIFBS_HasNEON,
    7155             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    7156             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    7157             :       // MIs[0] Rd
    7158             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    7159             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7160             :       // MIs[0] Operand 1
    7161             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_shsub,
    7162             :       // MIs[0] Rn
    7163             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    7164             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    7165             :       // MIs[0] Rm
    7166             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
    7167             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    7168             :       // (intrinsic_wo_chain:v2i32 269:iPTR, V64:v2i32:$Rn, V64:v2i32:$Rm)  =>  (SHSUBv2i32:v2i32 V64:v2i32:$Rn, V64:v2i32:$Rm)
    7169             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SHSUBv2i32,
    7170             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7171             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    7172             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    7173             :       GIR_EraseFromParent, /*InsnID*/0,
    7174             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7175             :       GIR_Done,
    7176             :     // Label 234: @16295
    7177             :     GIM_Try, /*On fail goto*//*Label 235*/ 16353,
    7178             :       GIM_CheckFeatures, GIFBS_HasNEON,
    7179             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    7180             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    7181             :       // MIs[0] Rd
    7182             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    7183             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7184             :       // MIs[0] Operand 1
    7185             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_shsub,
    7186             :       // MIs[0] Rn
    7187             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    7188             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    7189             :       // MIs[0] Rm
    7190             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    7191             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    7192             :       // (intrinsic_wo_chain:v4i32 269:iPTR, V128:v4i32:$Rn, V128:v4i32:$Rm)  =>  (SHSUBv4i32:v4i32 V128:v4i32:$Rn, V128:v4i32:$Rm)
    7193             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SHSUBv4i32,
    7194             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7195             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    7196             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    7197             :       GIR_EraseFromParent, /*InsnID*/0,
    7198             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7199             :       GIR_Done,
    7200             :     // Label 235: @16353
    7201             :     GIM_Try, /*On fail goto*//*Label 236*/ 16411,
    7202             :       GIM_CheckFeatures, GIFBS_HasNEON,
    7203             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    7204             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    7205             :       // MIs[0] Rd
    7206             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
    7207             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7208             :       // MIs[0] Operand 1
    7209             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_smaxp,
    7210             :       // MIs[0] Rn
    7211             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
    7212             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    7213             :       // MIs[0] Rm
    7214             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
    7215             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    7216             :       // (intrinsic_wo_chain:v8i8 271:iPTR, V64:v8i8:$Rn, V64:v8i8:$Rm)  =>  (SMAXPv8i8:v8i8 V64:v8i8:$Rn, V64:v8i8:$Rm)
    7217             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMAXPv8i8,
    7218             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7219             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    7220             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    7221             :       GIR_EraseFromParent, /*InsnID*/0,
    7222             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7223             :       GIR_Done,
    7224             :     // Label 236: @16411
    7225             :     GIM_Try, /*On fail goto*//*Label 237*/ 16469,
    7226             :       GIM_CheckFeatures, GIFBS_HasNEON,
    7227             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    7228             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    7229             :       // MIs[0] Rd
    7230             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
    7231             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7232             :       // MIs[0] Operand 1
    7233             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_smaxp,
    7234             :       // MIs[0] Rn
    7235             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    7236             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    7237             :       // MIs[0] Rm
    7238             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
    7239             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    7240             :       // (intrinsic_wo_chain:v16i8 271:iPTR, V128:v16i8:$Rn, V128:v16i8:$Rm)  =>  (SMAXPv16i8:v16i8 V128:v16i8:$Rn, V128:v16i8:$Rm)
    7241             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMAXPv16i8,
    7242             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7243             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    7244             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    7245             :       GIR_EraseFromParent, /*InsnID*/0,
    7246             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7247             :       GIR_Done,
    7248             :     // Label 237: @16469
    7249             :     GIM_Try, /*On fail goto*//*Label 238*/ 16527,
    7250             :       GIM_CheckFeatures, GIFBS_HasNEON,
    7251             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    7252             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    7253             :       // MIs[0] Rd
    7254             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    7255             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7256             :       // MIs[0] Operand 1
    7257             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_smaxp,
    7258             :       // MIs[0] Rn
    7259             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    7260             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    7261             :       // MIs[0] Rm
    7262             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
    7263             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    7264             :       // (intrinsic_wo_chain:v4i16 271:iPTR, V64:v4i16:$Rn, V64:v4i16:$Rm)  =>  (SMAXPv4i16:v4i16 V64:v4i16:$Rn, V64:v4i16:$Rm)
    7265             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMAXPv4i16,
    7266             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7267             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    7268             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    7269             :       GIR_EraseFromParent, /*InsnID*/0,
    7270             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7271             :       GIR_Done,
    7272             :     // Label 238: @16527
    7273             :     GIM_Try, /*On fail goto*//*Label 239*/ 16585,
    7274             :       GIM_CheckFeatures, GIFBS_HasNEON,
    7275             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    7276             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    7277             :       // MIs[0] Rd
    7278             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    7279             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7280             :       // MIs[0] Operand 1
    7281             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_smaxp,
    7282             :       // MIs[0] Rn
    7283             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    7284             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    7285             :       // MIs[0] Rm
    7286             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    7287             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    7288             :       // (intrinsic_wo_chain:v8i16 271:iPTR, V128:v8i16:$Rn, V128:v8i16:$Rm)  =>  (SMAXPv8i16:v8i16 V128:v8i16:$Rn, V128:v8i16:$Rm)
    7289             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMAXPv8i16,
    7290             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7291             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    7292             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    7293             :       GIR_EraseFromParent, /*InsnID*/0,
    7294             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7295             :       GIR_Done,
    7296             :     // Label 239: @16585
    7297             :     GIM_Try, /*On fail goto*//*Label 240*/ 16643,
    7298             :       GIM_CheckFeatures, GIFBS_HasNEON,
    7299             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    7300             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    7301             :       // MIs[0] Rd
    7302             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    7303             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7304             :       // MIs[0] Operand 1
    7305             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_smaxp,
    7306             :       // MIs[0] Rn
    7307             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    7308             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    7309             :       // MIs[0] Rm
    7310             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
    7311             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    7312             :       // (intrinsic_wo_chain:v2i32 271:iPTR, V64:v2i32:$Rn, V64:v2i32:$Rm)  =>  (SMAXPv2i32:v2i32 V64:v2i32:$Rn, V64:v2i32:$Rm)
    7313             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMAXPv2i32,
    7314             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7315             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    7316             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    7317             :       GIR_EraseFromParent, /*InsnID*/0,
    7318             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7319             :       GIR_Done,
    7320             :     // Label 240: @16643
    7321             :     GIM_Try, /*On fail goto*//*Label 241*/ 16701,
    7322             :       GIM_CheckFeatures, GIFBS_HasNEON,
    7323             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    7324             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    7325             :       // MIs[0] Rd
    7326             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    7327             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7328             :       // MIs[0] Operand 1
    7329             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_smaxp,
    7330             :       // MIs[0] Rn
    7331             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    7332             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    7333             :       // MIs[0] Rm
    7334             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    7335             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    7336             :       // (intrinsic_wo_chain:v4i32 271:iPTR, V128:v4i32:$Rn, V128:v4i32:$Rm)  =>  (SMAXPv4i32:v4i32 V128:v4i32:$Rn, V128:v4i32:$Rm)
    7337             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMAXPv4i32,
    7338             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7339             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    7340             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    7341             :       GIR_EraseFromParent, /*InsnID*/0,
    7342             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7343             :       GIR_Done,
    7344             :     // Label 241: @16701
    7345             :     GIM_Try, /*On fail goto*//*Label 242*/ 16759,
    7346             :       GIM_CheckFeatures, GIFBS_HasNEON,
    7347             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    7348             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    7349             :       // MIs[0] Rd
    7350             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
    7351             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7352             :       // MIs[0] Operand 1
    7353             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sminp,
    7354             :       // MIs[0] Rn
    7355             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
    7356             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    7357             :       // MIs[0] Rm
    7358             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
    7359             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    7360             :       // (intrinsic_wo_chain:v8i8 274:iPTR, V64:v8i8:$Rn, V64:v8i8:$Rm)  =>  (SMINPv8i8:v8i8 V64:v8i8:$Rn, V64:v8i8:$Rm)
    7361             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMINPv8i8,
    7362             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7363             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    7364             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    7365             :       GIR_EraseFromParent, /*InsnID*/0,
    7366             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7367             :       GIR_Done,
    7368             :     // Label 242: @16759
    7369             :     GIM_Try, /*On fail goto*//*Label 243*/ 16817,
    7370             :       GIM_CheckFeatures, GIFBS_HasNEON,
    7371             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    7372             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    7373             :       // MIs[0] Rd
    7374             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
    7375             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7376             :       // MIs[0] Operand 1
    7377             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sminp,
    7378             :       // MIs[0] Rn
    7379             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    7380             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    7381             :       // MIs[0] Rm
    7382             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
    7383             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    7384             :       // (intrinsic_wo_chain:v16i8 274:iPTR, V128:v16i8:$Rn, V128:v16i8:$Rm)  =>  (SMINPv16i8:v16i8 V128:v16i8:$Rn, V128:v16i8:$Rm)
    7385             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMINPv16i8,
    7386             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7387             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    7388             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    7389             :       GIR_EraseFromParent, /*InsnID*/0,
    7390             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7391             :       GIR_Done,
    7392             :     // Label 243: @16817
    7393             :     GIM_Try, /*On fail goto*//*Label 244*/ 16875,
    7394             :       GIM_CheckFeatures, GIFBS_HasNEON,
    7395             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    7396             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    7397             :       // MIs[0] Rd
    7398             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    7399             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7400             :       // MIs[0] Operand 1
    7401             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sminp,
    7402             :       // MIs[0] Rn
    7403             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    7404             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    7405             :       // MIs[0] Rm
    7406             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
    7407             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    7408             :       // (intrinsic_wo_chain:v4i16 274:iPTR, V64:v4i16:$Rn, V64:v4i16:$Rm)  =>  (SMINPv4i16:v4i16 V64:v4i16:$Rn, V64:v4i16:$Rm)
    7409             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMINPv4i16,
    7410             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7411             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    7412             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    7413             :       GIR_EraseFromParent, /*InsnID*/0,
    7414             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7415             :       GIR_Done,
    7416             :     // Label 244: @16875
    7417             :     GIM_Try, /*On fail goto*//*Label 245*/ 16933,
    7418             :       GIM_CheckFeatures, GIFBS_HasNEON,
    7419             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    7420             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    7421             :       // MIs[0] Rd
    7422             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    7423             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7424             :       // MIs[0] Operand 1
    7425             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sminp,
    7426             :       // MIs[0] Rn
    7427             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    7428             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    7429             :       // MIs[0] Rm
    7430             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    7431             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    7432             :       // (intrinsic_wo_chain:v8i16 274:iPTR, V128:v8i16:$Rn, V128:v8i16:$Rm)  =>  (SMINPv8i16:v8i16 V128:v8i16:$Rn, V128:v8i16:$Rm)
    7433             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMINPv8i16,
    7434             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7435             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    7436             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    7437             :       GIR_EraseFromParent, /*InsnID*/0,
    7438             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7439             :       GIR_Done,
    7440             :     // Label 245: @16933
    7441             :     GIM_Try, /*On fail goto*//*Label 246*/ 16991,
    7442             :       GIM_CheckFeatures, GIFBS_HasNEON,
    7443             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    7444             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    7445             :       // MIs[0] Rd
    7446             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    7447             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7448             :       // MIs[0] Operand 1
    7449             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sminp,
    7450             :       // MIs[0] Rn
    7451             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    7452             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    7453             :       // MIs[0] Rm
    7454             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
    7455             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    7456             :       // (intrinsic_wo_chain:v2i32 274:iPTR, V64:v2i32:$Rn, V64:v2i32:$Rm)  =>  (SMINPv2i32:v2i32 V64:v2i32:$Rn, V64:v2i32:$Rm)
    7457             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMINPv2i32,
    7458             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7459             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    7460             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    7461             :       GIR_EraseFromParent, /*InsnID*/0,
    7462             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7463             :       GIR_Done,
    7464             :     // Label 246: @16991
    7465             :     GIM_Try, /*On fail goto*//*Label 247*/ 17049,
    7466             :       GIM_CheckFeatures, GIFBS_HasNEON,
    7467             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    7468             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    7469             :       // MIs[0] Rd
    7470             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    7471             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7472             :       // MIs[0] Operand 1
    7473             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sminp,
    7474             :       // MIs[0] Rn
    7475             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    7476             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    7477             :       // MIs[0] Rm
    7478             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    7479             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    7480             :       // (intrinsic_wo_chain:v4i32 274:iPTR, V128:v4i32:$Rn, V128:v4i32:$Rm)  =>  (SMINPv4i32:v4i32 V128:v4i32:$Rn, V128:v4i32:$Rm)
    7481             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMINPv4i32,
    7482             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7483             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    7484             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    7485             :       GIR_EraseFromParent, /*InsnID*/0,
    7486             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7487             :       GIR_Done,
    7488             :     // Label 247: @17049
    7489             :     GIM_Try, /*On fail goto*//*Label 248*/ 17107,
    7490             :       GIM_CheckFeatures, GIFBS_HasNEON,
    7491             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    7492             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    7493             :       // MIs[0] Rd
    7494             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
    7495             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7496             :       // MIs[0] Operand 1
    7497             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqadd,
    7498             :       // MIs[0] Rn
    7499             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
    7500             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    7501             :       // MIs[0] Rm
    7502             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
    7503             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    7504             :       // (intrinsic_wo_chain:v8i8 278:iPTR, V64:v8i8:$Rn, V64:v8i8:$Rm)  =>  (SQADDv8i8:v8i8 V64:v8i8:$Rn, V64:v8i8:$Rm)
    7505             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQADDv8i8,
    7506             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7507             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    7508             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    7509             :       GIR_EraseFromParent, /*InsnID*/0,
    7510             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7511             :       GIR_Done,
    7512             :     // Label 248: @17107
    7513             :     GIM_Try, /*On fail goto*//*Label 249*/ 17165,
    7514             :       GIM_CheckFeatures, GIFBS_HasNEON,
    7515             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    7516             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    7517             :       // MIs[0] Rd
    7518             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
    7519             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7520             :       // MIs[0] Operand 1
    7521             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqadd,
    7522             :       // MIs[0] Rn
    7523             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    7524             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    7525             :       // MIs[0] Rm
    7526             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
    7527             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    7528             :       // (intrinsic_wo_chain:v16i8 278:iPTR, V128:v16i8:$Rn, V128:v16i8:$Rm)  =>  (SQADDv16i8:v16i8 V128:v16i8:$Rn, V128:v16i8:$Rm)
    7529             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQADDv16i8,
    7530             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7531             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    7532             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    7533             :       GIR_EraseFromParent, /*InsnID*/0,
    7534             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7535             :       GIR_Done,
    7536             :     // Label 249: @17165
    7537             :     GIM_Try, /*On fail goto*//*Label 250*/ 17223,
    7538             :       GIM_CheckFeatures, GIFBS_HasNEON,
    7539             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    7540             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    7541             :       // MIs[0] Rd
    7542             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    7543             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7544             :       // MIs[0] Operand 1
    7545             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqadd,
    7546             :       // MIs[0] Rn
    7547             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    7548             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    7549             :       // MIs[0] Rm
    7550             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
    7551             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    7552             :       // (intrinsic_wo_chain:v4i16 278:iPTR, V64:v4i16:$Rn, V64:v4i16:$Rm)  =>  (SQADDv4i16:v4i16 V64:v4i16:$Rn, V64:v4i16:$Rm)
    7553             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQADDv4i16,
    7554             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7555             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    7556             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    7557             :       GIR_EraseFromParent, /*InsnID*/0,
    7558             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7559             :       GIR_Done,
    7560             :     // Label 250: @17223
    7561             :     GIM_Try, /*On fail goto*//*Label 251*/ 17281,
    7562             :       GIM_CheckFeatures, GIFBS_HasNEON,
    7563             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    7564             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    7565             :       // MIs[0] Rd
    7566             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    7567             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7568             :       // MIs[0] Operand 1
    7569             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqadd,
    7570             :       // MIs[0] Rn
    7571             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    7572             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    7573             :       // MIs[0] Rm
    7574             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    7575             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    7576             :       // (intrinsic_wo_chain:v8i16 278:iPTR, V128:v8i16:$Rn, V128:v8i16:$Rm)  =>  (SQADDv8i16:v8i16 V128:v8i16:$Rn, V128:v8i16:$Rm)
    7577             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQADDv8i16,
    7578             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7579             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    7580             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    7581             :       GIR_EraseFromParent, /*InsnID*/0,
    7582             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7583             :       GIR_Done,
    7584             :     // Label 251: @17281
    7585             :     GIM_Try, /*On fail goto*//*Label 252*/ 17339,
    7586             :       GIM_CheckFeatures, GIFBS_HasNEON,
    7587             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    7588             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    7589             :       // MIs[0] Rd
    7590             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    7591             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7592             :       // MIs[0] Operand 1
    7593             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqadd,
    7594             :       // MIs[0] Rn
    7595             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    7596             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    7597             :       // MIs[0] Rm
    7598             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
    7599             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    7600             :       // (intrinsic_wo_chain:v2i32 278:iPTR, V64:v2i32:$Rn, V64:v2i32:$Rm)  =>  (SQADDv2i32:v2i32 V64:v2i32:$Rn, V64:v2i32:$Rm)
    7601             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQADDv2i32,
    7602             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7603             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    7604             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    7605             :       GIR_EraseFromParent, /*InsnID*/0,
    7606             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7607             :       GIR_Done,
    7608             :     // Label 252: @17339
    7609             :     GIM_Try, /*On fail goto*//*Label 253*/ 17397,
    7610             :       GIM_CheckFeatures, GIFBS_HasNEON,
    7611             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    7612             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    7613             :       // MIs[0] Rd
    7614             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    7615             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7616             :       // MIs[0] Operand 1
    7617             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqadd,
    7618             :       // MIs[0] Rn
    7619             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    7620             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    7621             :       // MIs[0] Rm
    7622             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    7623             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    7624             :       // (intrinsic_wo_chain:v4i32 278:iPTR, V128:v4i32:$Rn, V128:v4i32:$Rm)  =>  (SQADDv4i32:v4i32 V128:v4i32:$Rn, V128:v4i32:$Rm)
    7625             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQADDv4i32,
    7626             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7627             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    7628             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    7629             :       GIR_EraseFromParent, /*InsnID*/0,
    7630             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7631             :       GIR_Done,
    7632             :     // Label 253: @17397
    7633             :     GIM_Try, /*On fail goto*//*Label 254*/ 17455,
    7634             :       GIM_CheckFeatures, GIFBS_HasNEON,
    7635             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    7636             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    7637             :       // MIs[0] Rd
    7638             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    7639             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7640             :       // MIs[0] Operand 1
    7641             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqadd,
    7642             :       // MIs[0] Rn
    7643             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    7644             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    7645             :       // MIs[0] Rm
    7646             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    7647             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    7648             :       // (intrinsic_wo_chain:v2i64 278:iPTR, V128:v2i64:$Rn, V128:v2i64:$Rm)  =>  (SQADDv2i64:v2i64 V128:v2i64:$Rn, V128:v2i64:$Rm)
    7649             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQADDv2i64,
    7650             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7651             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    7652             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    7653             :       GIR_EraseFromParent, /*InsnID*/0,
    7654             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7655             :       GIR_Done,
    7656             :     // Label 254: @17455
    7657             :     GIM_Try, /*On fail goto*//*Label 255*/ 17513,
    7658             :       GIM_CheckFeatures, GIFBS_HasNEON,
    7659             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    7660             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    7661             :       // MIs[0] Rd
    7662             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    7663             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7664             :       // MIs[0] Operand 1
    7665             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqdmulh,
    7666             :       // MIs[0] Rn
    7667             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    7668             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    7669             :       // MIs[0] Rm
    7670             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
    7671             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    7672             :       // (intrinsic_wo_chain:v4i16 279:iPTR, V64:v4i16:$Rn, V64:v4i16:$Rm)  =>  (SQDMULHv4i16:v4i16 V64:v4i16:$Rn, V64:v4i16:$Rm)
    7673             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQDMULHv4i16,
    7674             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7675             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    7676             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    7677             :       GIR_EraseFromParent, /*InsnID*/0,
    7678             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7679             :       GIR_Done,
    7680             :     // Label 255: @17513
    7681             :     GIM_Try, /*On fail goto*//*Label 256*/ 17571,
    7682             :       GIM_CheckFeatures, GIFBS_HasNEON,
    7683             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    7684             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    7685             :       // MIs[0] Rd
    7686             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    7687             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7688             :       // MIs[0] Operand 1
    7689             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqdmulh,
    7690             :       // MIs[0] Rn
    7691             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    7692             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    7693             :       // MIs[0] Rm
    7694             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    7695             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    7696             :       // (intrinsic_wo_chain:v8i16 279:iPTR, V128:v8i16:$Rn, V128:v8i16:$Rm)  =>  (SQDMULHv8i16:v8i16 V128:v8i16:$Rn, V128:v8i16:$Rm)
    7697             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQDMULHv8i16,
    7698             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7699             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    7700             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    7701             :       GIR_EraseFromParent, /*InsnID*/0,
    7702             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7703             :       GIR_Done,
    7704             :     // Label 256: @17571
    7705             :     GIM_Try, /*On fail goto*//*Label 257*/ 17629,
    7706             :       GIM_CheckFeatures, GIFBS_HasNEON,
    7707             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    7708             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    7709             :       // MIs[0] Rd
    7710             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    7711             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7712             :       // MIs[0] Operand 1
    7713             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqdmulh,
    7714             :       // MIs[0] Rn
    7715             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    7716             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    7717             :       // MIs[0] Rm
    7718             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
    7719             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    7720             :       // (intrinsic_wo_chain:v2i32 279:iPTR, V64:v2i32:$Rn, V64:v2i32:$Rm)  =>  (SQDMULHv2i32:v2i32 V64:v2i32:$Rn, V64:v2i32:$Rm)
    7721             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQDMULHv2i32,
    7722             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7723             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    7724             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    7725             :       GIR_EraseFromParent, /*InsnID*/0,
    7726             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7727             :       GIR_Done,
    7728             :     // Label 257: @17629
    7729             :     GIM_Try, /*On fail goto*//*Label 258*/ 17687,
    7730             :       GIM_CheckFeatures, GIFBS_HasNEON,
    7731             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    7732             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    7733             :       // MIs[0] Rd
    7734             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    7735             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7736             :       // MIs[0] Operand 1
    7737             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqdmulh,
    7738             :       // MIs[0] Rn
    7739             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    7740             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    7741             :       // MIs[0] Rm
    7742             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    7743             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    7744             :       // (intrinsic_wo_chain:v4i32 279:iPTR, V128:v4i32:$Rn, V128:v4i32:$Rm)  =>  (SQDMULHv4i32:v4i32 V128:v4i32:$Rn, V128:v4i32:$Rm)
    7745             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQDMULHv4i32,
    7746             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7747             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    7748             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    7749             :       GIR_EraseFromParent, /*InsnID*/0,
    7750             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7751             :       GIR_Done,
    7752             :     // Label 258: @17687
    7753             :     GIM_Try, /*On fail goto*//*Label 259*/ 17745,
    7754             :       GIM_CheckFeatures, GIFBS_HasNEON,
    7755             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    7756             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    7757             :       // MIs[0] Rd
    7758             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    7759             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7760             :       // MIs[0] Operand 1
    7761             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqrdmulh,
    7762             :       // MIs[0] Rn
    7763             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    7764             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    7765             :       // MIs[0] Rm
    7766             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
    7767             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    7768             :       // (intrinsic_wo_chain:v4i16 283:iPTR, V64:v4i16:$Rn, V64:v4i16:$Rm)  =>  (SQRDMULHv4i16:v4i16 V64:v4i16:$Rn, V64:v4i16:$Rm)
    7769             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRDMULHv4i16,
    7770             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7771             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    7772             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    7773             :       GIR_EraseFromParent, /*InsnID*/0,
    7774             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7775             :       GIR_Done,
    7776             :     // Label 259: @17745
    7777             :     GIM_Try, /*On fail goto*//*Label 260*/ 17803,
    7778             :       GIM_CheckFeatures, GIFBS_HasNEON,
    7779             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    7780             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    7781             :       // MIs[0] Rd
    7782             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    7783             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7784             :       // MIs[0] Operand 1
    7785             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqrdmulh,
    7786             :       // MIs[0] Rn
    7787             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    7788             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    7789             :       // MIs[0] Rm
    7790             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    7791             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    7792             :       // (intrinsic_wo_chain:v8i16 283:iPTR, V128:v8i16:$Rn, V128:v8i16:$Rm)  =>  (SQRDMULHv8i16:v8i16 V128:v8i16:$Rn, V128:v8i16:$Rm)
    7793             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRDMULHv8i16,
    7794             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7795             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    7796             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    7797             :       GIR_EraseFromParent, /*InsnID*/0,
    7798             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7799             :       GIR_Done,
    7800             :     // Label 260: @17803
    7801             :     GIM_Try, /*On fail goto*//*Label 261*/ 17861,
    7802             :       GIM_CheckFeatures, GIFBS_HasNEON,
    7803             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    7804             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    7805             :       // MIs[0] Rd
    7806             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    7807             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7808             :       // MIs[0] Operand 1
    7809             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqrdmulh,
    7810             :       // MIs[0] Rn
    7811             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    7812             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    7813             :       // MIs[0] Rm
    7814             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
    7815             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    7816             :       // (intrinsic_wo_chain:v2i32 283:iPTR, V64:v2i32:$Rn, V64:v2i32:$Rm)  =>  (SQRDMULHv2i32:v2i32 V64:v2i32:$Rn, V64:v2i32:$Rm)
    7817             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRDMULHv2i32,
    7818             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7819             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    7820             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    7821             :       GIR_EraseFromParent, /*InsnID*/0,
    7822             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7823             :       GIR_Done,
    7824             :     // Label 261: @17861
    7825             :     GIM_Try, /*On fail goto*//*Label 262*/ 17919,
    7826             :       GIM_CheckFeatures, GIFBS_HasNEON,
    7827             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    7828             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    7829             :       // MIs[0] Rd
    7830             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    7831             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7832             :       // MIs[0] Operand 1
    7833             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqrdmulh,
    7834             :       // MIs[0] Rn
    7835             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    7836             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    7837             :       // MIs[0] Rm
    7838             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    7839             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    7840             :       // (intrinsic_wo_chain:v4i32 283:iPTR, V128:v4i32:$Rn, V128:v4i32:$Rm)  =>  (SQRDMULHv4i32:v4i32 V128:v4i32:$Rn, V128:v4i32:$Rm)
    7841             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRDMULHv4i32,
    7842             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7843             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    7844             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    7845             :       GIR_EraseFromParent, /*InsnID*/0,
    7846             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7847             :       GIR_Done,
    7848             :     // Label 262: @17919
    7849             :     GIM_Try, /*On fail goto*//*Label 263*/ 17977,
    7850             :       GIM_CheckFeatures, GIFBS_HasNEON,
    7851             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    7852             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    7853             :       // MIs[0] Rd
    7854             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
    7855             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7856             :       // MIs[0] Operand 1
    7857             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqrshl,
    7858             :       // MIs[0] Rn
    7859             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
    7860             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    7861             :       // MIs[0] Rm
    7862             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
    7863             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    7864             :       // (intrinsic_wo_chain:v8i8 284:iPTR, V64:v8i8:$Rn, V64:v8i8:$Rm)  =>  (SQRSHLv8i8:v8i8 V64:v8i8:$Rn, V64:v8i8:$Rm)
    7865             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRSHLv8i8,
    7866             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7867             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    7868             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    7869             :       GIR_EraseFromParent, /*InsnID*/0,
    7870             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7871             :       GIR_Done,
    7872             :     // Label 263: @17977
    7873             :     GIM_Try, /*On fail goto*//*Label 264*/ 18035,
    7874             :       GIM_CheckFeatures, GIFBS_HasNEON,
    7875             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    7876             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    7877             :       // MIs[0] Rd
    7878             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
    7879             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7880             :       // MIs[0] Operand 1
    7881             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqrshl,
    7882             :       // MIs[0] Rn
    7883             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    7884             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    7885             :       // MIs[0] Rm
    7886             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
    7887             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    7888             :       // (intrinsic_wo_chain:v16i8 284:iPTR, V128:v16i8:$Rn, V128:v16i8:$Rm)  =>  (SQRSHLv16i8:v16i8 V128:v16i8:$Rn, V128:v16i8:$Rm)
    7889             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRSHLv16i8,
    7890             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7891             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    7892             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    7893             :       GIR_EraseFromParent, /*InsnID*/0,
    7894             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7895             :       GIR_Done,
    7896             :     // Label 264: @18035
    7897             :     GIM_Try, /*On fail goto*//*Label 265*/ 18093,
    7898             :       GIM_CheckFeatures, GIFBS_HasNEON,
    7899             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    7900             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    7901             :       // MIs[0] Rd
    7902             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    7903             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7904             :       // MIs[0] Operand 1
    7905             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqrshl,
    7906             :       // MIs[0] Rn
    7907             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    7908             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    7909             :       // MIs[0] Rm
    7910             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
    7911             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    7912             :       // (intrinsic_wo_chain:v4i16 284:iPTR, V64:v4i16:$Rn, V64:v4i16:$Rm)  =>  (SQRSHLv4i16:v4i16 V64:v4i16:$Rn, V64:v4i16:$Rm)
    7913             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRSHLv4i16,
    7914             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7915             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    7916             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    7917             :       GIR_EraseFromParent, /*InsnID*/0,
    7918             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7919             :       GIR_Done,
    7920             :     // Label 265: @18093
    7921             :     GIM_Try, /*On fail goto*//*Label 266*/ 18151,
    7922             :       GIM_CheckFeatures, GIFBS_HasNEON,
    7923             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    7924             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    7925             :       // MIs[0] Rd
    7926             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    7927             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7928             :       // MIs[0] Operand 1
    7929             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqrshl,
    7930             :       // MIs[0] Rn
    7931             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    7932             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    7933             :       // MIs[0] Rm
    7934             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    7935             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    7936             :       // (intrinsic_wo_chain:v8i16 284:iPTR, V128:v8i16:$Rn, V128:v8i16:$Rm)  =>  (SQRSHLv8i16:v8i16 V128:v8i16:$Rn, V128:v8i16:$Rm)
    7937             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRSHLv8i16,
    7938             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7939             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    7940             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    7941             :       GIR_EraseFromParent, /*InsnID*/0,
    7942             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7943             :       GIR_Done,
    7944             :     // Label 266: @18151
    7945             :     GIM_Try, /*On fail goto*//*Label 267*/ 18209,
    7946             :       GIM_CheckFeatures, GIFBS_HasNEON,
    7947             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    7948             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    7949             :       // MIs[0] Rd
    7950             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    7951             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7952             :       // MIs[0] Operand 1
    7953             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqrshl,
    7954             :       // MIs[0] Rn
    7955             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    7956             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    7957             :       // MIs[0] Rm
    7958             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
    7959             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    7960             :       // (intrinsic_wo_chain:v2i32 284:iPTR, V64:v2i32:$Rn, V64:v2i32:$Rm)  =>  (SQRSHLv2i32:v2i32 V64:v2i32:$Rn, V64:v2i32:$Rm)
    7961             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRSHLv2i32,
    7962             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7963             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    7964             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    7965             :       GIR_EraseFromParent, /*InsnID*/0,
    7966             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7967             :       GIR_Done,
    7968             :     // Label 267: @18209
    7969             :     GIM_Try, /*On fail goto*//*Label 268*/ 18267,
    7970             :       GIM_CheckFeatures, GIFBS_HasNEON,
    7971             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    7972             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    7973             :       // MIs[0] Rd
    7974             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    7975             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7976             :       // MIs[0] Operand 1
    7977             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqrshl,
    7978             :       // MIs[0] Rn
    7979             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    7980             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    7981             :       // MIs[0] Rm
    7982             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    7983             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    7984             :       // (intrinsic_wo_chain:v4i32 284:iPTR, V128:v4i32:$Rn, V128:v4i32:$Rm)  =>  (SQRSHLv4i32:v4i32 V128:v4i32:$Rn, V128:v4i32:$Rm)
    7985             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRSHLv4i32,
    7986             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7987             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    7988             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    7989             :       GIR_EraseFromParent, /*InsnID*/0,
    7990             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7991             :       GIR_Done,
    7992             :     // Label 268: @18267
    7993             :     GIM_Try, /*On fail goto*//*Label 269*/ 18325,
    7994             :       GIM_CheckFeatures, GIFBS_HasNEON,
    7995             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    7996             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    7997             :       // MIs[0] Rd
    7998             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    7999             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8000             :       // MIs[0] Operand 1
    8001             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqrshl,
    8002             :       // MIs[0] Rn
    8003             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    8004             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    8005             :       // MIs[0] Rm
    8006             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    8007             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    8008             :       // (intrinsic_wo_chain:v2i64 284:iPTR, V128:v2i64:$Rn, V128:v2i64:$Rm)  =>  (SQRSHLv2i64:v2i64 V128:v2i64:$Rn, V128:v2i64:$Rm)
    8009             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRSHLv2i64,
    8010             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8011             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    8012             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    8013             :       GIR_EraseFromParent, /*InsnID*/0,
    8014             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8015             :       GIR_Done,
    8016             :     // Label 269: @18325
    8017             :     GIM_Try, /*On fail goto*//*Label 270*/ 18383,
    8018             :       GIM_CheckFeatures, GIFBS_HasNEON,
    8019             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    8020             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8021             :       // MIs[0] Rd
    8022             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
    8023             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8024             :       // MIs[0] Operand 1
    8025             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqshl,
    8026             :       // MIs[0] Rn
    8027             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
    8028             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    8029             :       // MIs[0] Rm
    8030             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
    8031             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    8032             :       // (intrinsic_wo_chain:v8i8 287:iPTR, V64:v8i8:$Rn, V64:v8i8:$Rm)  =>  (SQSHLv8i8:v8i8 V64:v8i8:$Rn, V64:v8i8:$Rm)
    8033             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSHLv8i8,
    8034             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8035             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    8036             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    8037             :       GIR_EraseFromParent, /*InsnID*/0,
    8038             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8039             :       GIR_Done,
    8040             :     // Label 270: @18383
    8041             :     GIM_Try, /*On fail goto*//*Label 271*/ 18441,
    8042             :       GIM_CheckFeatures, GIFBS_HasNEON,
    8043             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    8044             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8045             :       // MIs[0] Rd
    8046             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
    8047             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8048             :       // MIs[0] Operand 1
    8049             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqshl,
    8050             :       // MIs[0] Rn
    8051             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    8052             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    8053             :       // MIs[0] Rm
    8054             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
    8055             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    8056             :       // (intrinsic_wo_chain:v16i8 287:iPTR, V128:v16i8:$Rn, V128:v16i8:$Rm)  =>  (SQSHLv16i8:v16i8 V128:v16i8:$Rn, V128:v16i8:$Rm)
    8057             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSHLv16i8,
    8058             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8059             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    8060             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    8061             :       GIR_EraseFromParent, /*InsnID*/0,
    8062             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8063             :       GIR_Done,
    8064             :     // Label 271: @18441
    8065             :     GIM_Try, /*On fail goto*//*Label 272*/ 18499,
    8066             :       GIM_CheckFeatures, GIFBS_HasNEON,
    8067             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    8068             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8069             :       // MIs[0] Rd
    8070             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    8071             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8072             :       // MIs[0] Operand 1
    8073             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqshl,
    8074             :       // MIs[0] Rn
    8075             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    8076             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    8077             :       // MIs[0] Rm
    8078             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
    8079             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    8080             :       // (intrinsic_wo_chain:v4i16 287:iPTR, V64:v4i16:$Rn, V64:v4i16:$Rm)  =>  (SQSHLv4i16:v4i16 V64:v4i16:$Rn, V64:v4i16:$Rm)
    8081             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSHLv4i16,
    8082             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8083             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    8084             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    8085             :       GIR_EraseFromParent, /*InsnID*/0,
    8086             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8087             :       GIR_Done,
    8088             :     // Label 272: @18499
    8089             :     GIM_Try, /*On fail goto*//*Label 273*/ 18557,
    8090             :       GIM_CheckFeatures, GIFBS_HasNEON,
    8091             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    8092             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8093             :       // MIs[0] Rd
    8094             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    8095             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8096             :       // MIs[0] Operand 1
    8097             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqshl,
    8098             :       // MIs[0] Rn
    8099             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    8100             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    8101             :       // MIs[0] Rm
    8102             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    8103             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    8104             :       // (intrinsic_wo_chain:v8i16 287:iPTR, V128:v8i16:$Rn, V128:v8i16:$Rm)  =>  (SQSHLv8i16:v8i16 V128:v8i16:$Rn, V128:v8i16:$Rm)
    8105             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSHLv8i16,
    8106             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8107             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    8108             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    8109             :       GIR_EraseFromParent, /*InsnID*/0,
    8110             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8111             :       GIR_Done,
    8112             :     // Label 273: @18557
    8113             :     GIM_Try, /*On fail goto*//*Label 274*/ 18615,
    8114             :       GIM_CheckFeatures, GIFBS_HasNEON,
    8115             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    8116             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8117             :       // MIs[0] Rd
    8118             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    8119             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8120             :       // MIs[0] Operand 1
    8121             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqshl,
    8122             :       // MIs[0] Rn
    8123             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    8124             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    8125             :       // MIs[0] Rm
    8126             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
    8127             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    8128             :       // (intrinsic_wo_chain:v2i32 287:iPTR, V64:v2i32:$Rn, V64:v2i32:$Rm)  =>  (SQSHLv2i32:v2i32 V64:v2i32:$Rn, V64:v2i32:$Rm)
    8129             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSHLv2i32,
    8130             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8131             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    8132             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    8133             :       GIR_EraseFromParent, /*InsnID*/0,
    8134             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8135             :       GIR_Done,
    8136             :     // Label 274: @18615
    8137             :     GIM_Try, /*On fail goto*//*Label 275*/ 18673,
    8138             :       GIM_CheckFeatures, GIFBS_HasNEON,
    8139             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    8140             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8141             :       // MIs[0] Rd
    8142             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    8143             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8144             :       // MIs[0] Operand 1
    8145             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqshl,
    8146             :       // MIs[0] Rn
    8147             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    8148             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    8149             :       // MIs[0] Rm
    8150             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    8151             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    8152             :       // (intrinsic_wo_chain:v4i32 287:iPTR, V128:v4i32:$Rn, V128:v4i32:$Rm)  =>  (SQSHLv4i32:v4i32 V128:v4i32:$Rn, V128:v4i32:$Rm)
    8153             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSHLv4i32,
    8154             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8155             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    8156             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    8157             :       GIR_EraseFromParent, /*InsnID*/0,
    8158             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8159             :       GIR_Done,
    8160             :     // Label 275: @18673
    8161             :     GIM_Try, /*On fail goto*//*Label 276*/ 18731,
    8162             :       GIM_CheckFeatures, GIFBS_HasNEON,
    8163             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    8164             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8165             :       // MIs[0] Rd
    8166             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    8167             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8168             :       // MIs[0] Operand 1
    8169             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqshl,
    8170             :       // MIs[0] Rn
    8171             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    8172             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    8173             :       // MIs[0] Rm
    8174             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    8175             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    8176             :       // (intrinsic_wo_chain:v2i64 287:iPTR, V128:v2i64:$Rn, V128:v2i64:$Rm)  =>  (SQSHLv2i64:v2i64 V128:v2i64:$Rn, V128:v2i64:$Rm)
    8177             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSHLv2i64,
    8178             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8179             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    8180             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    8181             :       GIR_EraseFromParent, /*InsnID*/0,
    8182             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8183             :       GIR_Done,
    8184             :     // Label 276: @18731
    8185             :     GIM_Try, /*On fail goto*//*Label 277*/ 18789,
    8186             :       GIM_CheckFeatures, GIFBS_HasNEON,
    8187             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    8188             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8189             :       // MIs[0] Rd
    8190             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
    8191             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8192             :       // MIs[0] Operand 1
    8193             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqsub,
    8194             :       // MIs[0] Rn
    8195             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
    8196             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    8197             :       // MIs[0] Rm
    8198             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
    8199             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    8200             :       // (intrinsic_wo_chain:v8i8 291:iPTR, V64:v8i8:$Rn, V64:v8i8:$Rm)  =>  (SQSUBv8i8:v8i8 V64:v8i8:$Rn, V64:v8i8:$Rm)
    8201             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSUBv8i8,
    8202             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8203             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    8204             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    8205             :       GIR_EraseFromParent, /*InsnID*/0,
    8206             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8207             :       GIR_Done,
    8208             :     // Label 277: @18789
    8209             :     GIM_Try, /*On fail goto*//*Label 278*/ 18847,
    8210             :       GIM_CheckFeatures, GIFBS_HasNEON,
    8211             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    8212             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8213             :       // MIs[0] Rd
    8214             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
    8215             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8216             :       // MIs[0] Operand 1
    8217             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqsub,
    8218             :       // MIs[0] Rn
    8219             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    8220             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    8221             :       // MIs[0] Rm
    8222             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
    8223             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    8224             :       // (intrinsic_wo_chain:v16i8 291:iPTR, V128:v16i8:$Rn, V128:v16i8:$Rm)  =>  (SQSUBv16i8:v16i8 V128:v16i8:$Rn, V128:v16i8:$Rm)
    8225             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSUBv16i8,
    8226             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8227             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    8228             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    8229             :       GIR_EraseFromParent, /*InsnID*/0,
    8230             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8231             :       GIR_Done,
    8232             :     // Label 278: @18847
    8233             :     GIM_Try, /*On fail goto*//*Label 279*/ 18905,
    8234             :       GIM_CheckFeatures, GIFBS_HasNEON,
    8235             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    8236             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8237             :       // MIs[0] Rd
    8238             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    8239             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8240             :       // MIs[0] Operand 1
    8241             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqsub,
    8242             :       // MIs[0] Rn
    8243             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    8244             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    8245             :       // MIs[0] Rm
    8246             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
    8247             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    8248             :       // (intrinsic_wo_chain:v4i16 291:iPTR, V64:v4i16:$Rn, V64:v4i16:$Rm)  =>  (SQSUBv4i16:v4i16 V64:v4i16:$Rn, V64:v4i16:$Rm)
    8249             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSUBv4i16,
    8250             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8251             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    8252             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    8253             :       GIR_EraseFromParent, /*InsnID*/0,
    8254             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8255             :       GIR_Done,
    8256             :     // Label 279: @18905
    8257             :     GIM_Try, /*On fail goto*//*Label 280*/ 18963,
    8258             :       GIM_CheckFeatures, GIFBS_HasNEON,
    8259             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    8260             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8261             :       // MIs[0] Rd
    8262             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    8263             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8264             :       // MIs[0] Operand 1
    8265             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqsub,
    8266             :       // MIs[0] Rn
    8267             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    8268             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    8269             :       // MIs[0] Rm
    8270             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    8271             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    8272             :       // (intrinsic_wo_chain:v8i16 291:iPTR, V128:v8i16:$Rn, V128:v8i16:$Rm)  =>  (SQSUBv8i16:v8i16 V128:v8i16:$Rn, V128:v8i16:$Rm)
    8273             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSUBv8i16,
    8274             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8275             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    8276             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    8277             :       GIR_EraseFromParent, /*InsnID*/0,
    8278             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8279             :       GIR_Done,
    8280             :     // Label 280: @18963
    8281             :     GIM_Try, /*On fail goto*//*Label 281*/ 19021,
    8282             :       GIM_CheckFeatures, GIFBS_HasNEON,
    8283             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    8284             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8285             :       // MIs[0] Rd
    8286             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    8287             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8288             :       // MIs[0] Operand 1
    8289             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqsub,
    8290             :       // MIs[0] Rn
    8291             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    8292             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    8293             :       // MIs[0] Rm
    8294             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
    8295             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    8296             :       // (intrinsic_wo_chain:v2i32 291:iPTR, V64:v2i32:$Rn, V64:v2i32:$Rm)  =>  (SQSUBv2i32:v2i32 V64:v2i32:$Rn, V64:v2i32:$Rm)
    8297             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSUBv2i32,
    8298             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8299             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    8300             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    8301             :       GIR_EraseFromParent, /*InsnID*/0,
    8302             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8303             :       GIR_Done,
    8304             :     // Label 281: @19021
    8305             :     GIM_Try, /*On fail goto*//*Label 282*/ 19079,
    8306             :       GIM_CheckFeatures, GIFBS_HasNEON,
    8307             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    8308             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8309             :       // MIs[0] Rd
    8310             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    8311             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8312             :       // MIs[0] Operand 1
    8313             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqsub,
    8314             :       // MIs[0] Rn
    8315             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    8316             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    8317             :       // MIs[0] Rm
    8318             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    8319             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    8320             :       // (intrinsic_wo_chain:v4i32 291:iPTR, V128:v4i32:$Rn, V128:v4i32:$Rm)  =>  (SQSUBv4i32:v4i32 V128:v4i32:$Rn, V128:v4i32:$Rm)
    8321             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSUBv4i32,
    8322             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8323             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    8324             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    8325             :       GIR_EraseFromParent, /*InsnID*/0,
    8326             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8327             :       GIR_Done,
    8328             :     // Label 282: @19079
    8329             :     GIM_Try, /*On fail goto*//*Label 283*/ 19137,
    8330             :       GIM_CheckFeatures, GIFBS_HasNEON,
    8331             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    8332             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8333             :       // MIs[0] Rd
    8334             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    8335             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8336             :       // MIs[0] Operand 1
    8337             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqsub,
    8338             :       // MIs[0] Rn
    8339             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    8340             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    8341             :       // MIs[0] Rm
    8342             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    8343             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    8344             :       // (intrinsic_wo_chain:v2i64 291:iPTR, V128:v2i64:$Rn, V128:v2i64:$Rm)  =>  (SQSUBv2i64:v2i64 V128:v2i64:$Rn, V128:v2i64:$Rm)
    8345             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSUBv2i64,
    8346             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8347             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    8348             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    8349             :       GIR_EraseFromParent, /*InsnID*/0,
    8350             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8351             :       GIR_Done,
    8352             :     // Label 283: @19137
    8353             :     GIM_Try, /*On fail goto*//*Label 284*/ 19195,
    8354             :       GIM_CheckFeatures, GIFBS_HasNEON,
    8355             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    8356             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8357             :       // MIs[0] Rd
    8358             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
    8359             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8360             :       // MIs[0] Operand 1
    8361             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_srhadd,
    8362             :       // MIs[0] Rn
    8363             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
    8364             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    8365             :       // MIs[0] Rm
    8366             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
    8367             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    8368             :       // (intrinsic_wo_chain:v8i8 294:iPTR, V64:v8i8:$Rn, V64:v8i8:$Rm)  =>  (SRHADDv8i8:v8i8 V64:v8i8:$Rn, V64:v8i8:$Rm)
    8369             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRHADDv8i8,
    8370             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8371             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    8372             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    8373             :       GIR_EraseFromParent, /*InsnID*/0,
    8374             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8375             :       GIR_Done,
    8376             :     // Label 284: @19195
    8377             :     GIM_Try, /*On fail goto*//*Label 285*/ 19253,
    8378             :       GIM_CheckFeatures, GIFBS_HasNEON,
    8379             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    8380             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8381             :       // MIs[0] Rd
    8382             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
    8383             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8384             :       // MIs[0] Operand 1
    8385             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_srhadd,
    8386             :       // MIs[0] Rn
    8387             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    8388             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    8389             :       // MIs[0] Rm
    8390             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
    8391             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    8392             :       // (intrinsic_wo_chain:v16i8 294:iPTR, V128:v16i8:$Rn, V128:v16i8:$Rm)  =>  (SRHADDv16i8:v16i8 V128:v16i8:$Rn, V128:v16i8:$Rm)
    8393             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRHADDv16i8,
    8394             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8395             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    8396             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    8397             :       GIR_EraseFromParent, /*InsnID*/0,
    8398             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8399             :       GIR_Done,
    8400             :     // Label 285: @19253
    8401             :     GIM_Try, /*On fail goto*//*Label 286*/ 19311,
    8402             :       GIM_CheckFeatures, GIFBS_HasNEON,
    8403             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    8404             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8405             :       // MIs[0] Rd
    8406             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    8407             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8408             :       // MIs[0] Operand 1
    8409             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_srhadd,
    8410             :       // MIs[0] Rn
    8411             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    8412             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    8413             :       // MIs[0] Rm
    8414             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
    8415             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    8416             :       // (intrinsic_wo_chain:v4i16 294:iPTR, V64:v4i16:$Rn, V64:v4i16:$Rm)  =>  (SRHADDv4i16:v4i16 V64:v4i16:$Rn, V64:v4i16:$Rm)
    8417             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRHADDv4i16,
    8418             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8419             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    8420             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    8421             :       GIR_EraseFromParent, /*InsnID*/0,
    8422             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8423             :       GIR_Done,
    8424             :     // Label 286: @19311
    8425             :     GIM_Try, /*On fail goto*//*Label 287*/ 19369,
    8426             :       GIM_CheckFeatures, GIFBS_HasNEON,
    8427             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    8428             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8429             :       // MIs[0] Rd
    8430             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    8431             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8432             :       // MIs[0] Operand 1
    8433             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_srhadd,
    8434             :       // MIs[0] Rn
    8435             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    8436             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    8437             :       // MIs[0] Rm
    8438             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    8439             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    8440             :       // (intrinsic_wo_chain:v8i16 294:iPTR, V128:v8i16:$Rn, V128:v8i16:$Rm)  =>  (SRHADDv8i16:v8i16 V128:v8i16:$Rn, V128:v8i16:$Rm)
    8441             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRHADDv8i16,
    8442             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8443             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    8444             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    8445             :       GIR_EraseFromParent, /*InsnID*/0,
    8446             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8447             :       GIR_Done,
    8448             :     // Label 287: @19369
    8449             :     GIM_Try, /*On fail goto*//*Label 288*/ 19427,
    8450             :       GIM_CheckFeatures, GIFBS_HasNEON,
    8451             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    8452             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8453             :       // MIs[0] Rd
    8454             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    8455             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8456             :       // MIs[0] Operand 1
    8457             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_srhadd,
    8458             :       // MIs[0] Rn
    8459             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    8460             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    8461             :       // MIs[0] Rm
    8462             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
    8463             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    8464             :       // (intrinsic_wo_chain:v2i32 294:iPTR, V64:v2i32:$Rn, V64:v2i32:$Rm)  =>  (SRHADDv2i32:v2i32 V64:v2i32:$Rn, V64:v2i32:$Rm)
    8465             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRHADDv2i32,
    8466             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8467             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    8468             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    8469             :       GIR_EraseFromParent, /*InsnID*/0,
    8470             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8471             :       GIR_Done,
    8472             :     // Label 288: @19427
    8473             :     GIM_Try, /*On fail goto*//*Label 289*/ 19485,
    8474             :       GIM_CheckFeatures, GIFBS_HasNEON,
    8475             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    8476             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8477             :       // MIs[0] Rd
    8478             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    8479             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8480             :       // MIs[0] Operand 1
    8481             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_srhadd,
    8482             :       // MIs[0] Rn
    8483             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    8484             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    8485             :       // MIs[0] Rm
    8486             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    8487             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    8488             :       // (intrinsic_wo_chain:v4i32 294:iPTR, V128:v4i32:$Rn, V128:v4i32:$Rm)  =>  (SRHADDv4i32:v4i32 V128:v4i32:$Rn, V128:v4i32:$Rm)
    8489             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRHADDv4i32,
    8490             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8491             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    8492             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    8493             :       GIR_EraseFromParent, /*InsnID*/0,
    8494             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8495             :       GIR_Done,
    8496             :     // Label 289: @19485
    8497             :     GIM_Try, /*On fail goto*//*Label 290*/ 19543,
    8498             :       GIM_CheckFeatures, GIFBS_HasNEON,
    8499             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    8500             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8501             :       // MIs[0] Rd
    8502             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
    8503             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8504             :       // MIs[0] Operand 1
    8505             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_srshl,
    8506             :       // MIs[0] Rn
    8507             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
    8508             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    8509             :       // MIs[0] Rm
    8510             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
    8511             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    8512             :       // (intrinsic_wo_chain:v8i8 295:iPTR, V64:v8i8:$Rn, V64:v8i8:$Rm)  =>  (SRSHLv8i8:v8i8 V64:v8i8:$Rn, V64:v8i8:$Rm)
    8513             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRSHLv8i8,
    8514             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8515             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    8516             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    8517             :       GIR_EraseFromParent, /*InsnID*/0,
    8518             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8519             :       GIR_Done,
    8520             :     // Label 290: @19543
    8521             :     GIM_Try, /*On fail goto*//*Label 291*/ 19601,
    8522             :       GIM_CheckFeatures, GIFBS_HasNEON,
    8523             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    8524             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8525             :       // MIs[0] Rd
    8526             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
    8527             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8528             :       // MIs[0] Operand 1
    8529             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_srshl,
    8530             :       // MIs[0] Rn
    8531             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    8532             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    8533             :       // MIs[0] Rm
    8534             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
    8535             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    8536             :       // (intrinsic_wo_chain:v16i8 295:iPTR, V128:v16i8:$Rn, V128:v16i8:$Rm)  =>  (SRSHLv16i8:v16i8 V128:v16i8:$Rn, V128:v16i8:$Rm)
    8537             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRSHLv16i8,
    8538             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8539             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    8540             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    8541             :       GIR_EraseFromParent, /*InsnID*/0,
    8542             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8543             :       GIR_Done,
    8544             :     // Label 291: @19601
    8545             :     GIM_Try, /*On fail goto*//*Label 292*/ 19659,
    8546             :       GIM_CheckFeatures, GIFBS_HasNEON,
    8547             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    8548             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8549             :       // MIs[0] Rd
    8550             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    8551             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8552             :       // MIs[0] Operand 1
    8553             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_srshl,
    8554             :       // MIs[0] Rn
    8555             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    8556             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    8557             :       // MIs[0] Rm
    8558             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
    8559             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    8560             :       // (intrinsic_wo_chain:v4i16 295:iPTR, V64:v4i16:$Rn, V64:v4i16:$Rm)  =>  (SRSHLv4i16:v4i16 V64:v4i16:$Rn, V64:v4i16:$Rm)
    8561             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRSHLv4i16,
    8562             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8563             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    8564             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    8565             :       GIR_EraseFromParent, /*InsnID*/0,
    8566             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8567             :       GIR_Done,
    8568             :     // Label 292: @19659
    8569             :     GIM_Try, /*On fail goto*//*Label 293*/ 19717,
    8570             :       GIM_CheckFeatures, GIFBS_HasNEON,
    8571             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    8572             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8573             :       // MIs[0] Rd
    8574             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    8575             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8576             :       // MIs[0] Operand 1
    8577             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_srshl,
    8578             :       // MIs[0] Rn
    8579             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    8580             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    8581             :       // MIs[0] Rm
    8582             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    8583             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    8584             :       // (intrinsic_wo_chain:v8i16 295:iPTR, V128:v8i16:$Rn, V128:v8i16:$Rm)  =>  (SRSHLv8i16:v8i16 V128:v8i16:$Rn, V128:v8i16:$Rm)
    8585             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRSHLv8i16,
    8586             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8587             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    8588             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    8589             :       GIR_EraseFromParent, /*InsnID*/0,
    8590             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8591             :       GIR_Done,
    8592             :     // Label 293: @19717
    8593             :     GIM_Try, /*On fail goto*//*Label 294*/ 19775,
    8594             :       GIM_CheckFeatures, GIFBS_HasNEON,
    8595             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    8596             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8597             :       // MIs[0] Rd
    8598             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    8599             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8600             :       // MIs[0] Operand 1
    8601             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_srshl,
    8602             :       // MIs[0] Rn
    8603             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    8604             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    8605             :       // MIs[0] Rm
    8606             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
    8607             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    8608             :       // (intrinsic_wo_chain:v2i32 295:iPTR, V64:v2i32:$Rn, V64:v2i32:$Rm)  =>  (SRSHLv2i32:v2i32 V64:v2i32:$Rn, V64:v2i32:$Rm)
    8609             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRSHLv2i32,
    8610             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8611             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    8612             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    8613             :       GIR_EraseFromParent, /*InsnID*/0,
    8614             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8615             :       GIR_Done,
    8616             :     // Label 294: @19775
    8617             :     GIM_Try, /*On fail goto*//*Label 295*/ 19833,
    8618             :       GIM_CheckFeatures, GIFBS_HasNEON,
    8619             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    8620             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8621             :       // MIs[0] Rd
    8622             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    8623             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8624             :       // MIs[0] Operand 1
    8625             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_srshl,
    8626             :       // MIs[0] Rn
    8627             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    8628             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    8629             :       // MIs[0] Rm
    8630             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    8631             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    8632             :       // (intrinsic_wo_chain:v4i32 295:iPTR, V128:v4i32:$Rn, V128:v4i32:$Rm)  =>  (SRSHLv4i32:v4i32 V128:v4i32:$Rn, V128:v4i32:$Rm)
    8633             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRSHLv4i32,
    8634             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8635             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    8636             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    8637             :       GIR_EraseFromParent, /*InsnID*/0,
    8638             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8639             :       GIR_Done,
    8640             :     // Label 295: @19833
    8641             :     GIM_Try, /*On fail goto*//*Label 296*/ 19891,
    8642             :       GIM_CheckFeatures, GIFBS_HasNEON,
    8643             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    8644             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8645             :       // MIs[0] Rd
    8646             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    8647             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8648             :       // MIs[0] Operand 1
    8649             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_srshl,
    8650             :       // MIs[0] Rn
    8651             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    8652             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    8653             :       // MIs[0] Rm
    8654             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    8655             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    8656             :       // (intrinsic_wo_chain:v2i64 295:iPTR, V128:v2i64:$Rn, V128:v2i64:$Rm)  =>  (SRSHLv2i64:v2i64 V128:v2i64:$Rn, V128:v2i64:$Rm)
    8657             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRSHLv2i64,
    8658             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8659             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    8660             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    8661             :       GIR_EraseFromParent, /*InsnID*/0,
    8662             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8663             :       GIR_Done,
    8664             :     // Label 296: @19891
    8665             :     GIM_Try, /*On fail goto*//*Label 297*/ 19949,
    8666             :       GIM_CheckFeatures, GIFBS_HasNEON,
    8667             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    8668             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8669             :       // MIs[0] Rd
    8670             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
    8671             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8672             :       // MIs[0] Operand 1
    8673             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sshl,
    8674             :       // MIs[0] Rn
    8675             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
    8676             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    8677             :       // MIs[0] Rm
    8678             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
    8679             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    8680             :       // (intrinsic_wo_chain:v8i8 296:iPTR, V64:v8i8:$Rn, V64:v8i8:$Rm)  =>  (SSHLv8i8:v8i8 V64:v8i8:$Rn, V64:v8i8:$Rm)
    8681             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SSHLv8i8,
    8682             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8683             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    8684             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    8685             :       GIR_EraseFromParent, /*InsnID*/0,
    8686             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8687             :       GIR_Done,
    8688             :     // Label 297: @19949
    8689             :     GIM_Try, /*On fail goto*//*Label 298*/ 20007,
    8690             :       GIM_CheckFeatures, GIFBS_HasNEON,
    8691             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    8692             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8693             :       // MIs[0] Rd
    8694             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
    8695             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8696             :       // MIs[0] Operand 1
    8697             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sshl,
    8698             :       // MIs[0] Rn
    8699             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    8700             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    8701             :       // MIs[0] Rm
    8702             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
    8703             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    8704             :       // (intrinsic_wo_chain:v16i8 296:iPTR, V128:v16i8:$Rn, V128:v16i8:$Rm)  =>  (SSHLv16i8:v16i8 V128:v16i8:$Rn, V128:v16i8:$Rm)
    8705             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SSHLv16i8,
    8706             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8707             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    8708             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    8709             :       GIR_EraseFromParent, /*InsnID*/0,
    8710             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8711             :       GIR_Done,
    8712             :     // Label 298: @20007
    8713             :     GIM_Try, /*On fail goto*//*Label 299*/ 20065,
    8714             :       GIM_CheckFeatures, GIFBS_HasNEON,
    8715             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    8716             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8717             :       // MIs[0] Rd
    8718             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    8719             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8720             :       // MIs[0] Operand 1
    8721             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sshl,
    8722             :       // MIs[0] Rn
    8723             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    8724             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    8725             :       // MIs[0] Rm
    8726             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
    8727             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    8728             :       // (intrinsic_wo_chain:v4i16 296:iPTR, V64:v4i16:$Rn, V64:v4i16:$Rm)  =>  (SSHLv4i16:v4i16 V64:v4i16:$Rn, V64:v4i16:$Rm)
    8729             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SSHLv4i16,
    8730             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8731             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    8732             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    8733             :       GIR_EraseFromParent, /*InsnID*/0,
    8734             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8735             :       GIR_Done,
    8736             :     // Label 299: @20065
    8737             :     GIM_Try, /*On fail goto*//*Label 300*/ 20123,
    8738             :       GIM_CheckFeatures, GIFBS_HasNEON,
    8739             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    8740             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8741             :       // MIs[0] Rd
    8742             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    8743             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8744             :       // MIs[0] Operand 1
    8745             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sshl,
    8746             :       // MIs[0] Rn
    8747             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    8748             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    8749             :       // MIs[0] Rm
    8750             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    8751             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    8752             :       // (intrinsic_wo_chain:v8i16 296:iPTR, V128:v8i16:$Rn, V128:v8i16:$Rm)  =>  (SSHLv8i16:v8i16 V128:v8i16:$Rn, V128:v8i16:$Rm)
    8753             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SSHLv8i16,
    8754             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8755             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    8756             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    8757             :       GIR_EraseFromParent, /*InsnID*/0,
    8758             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8759             :       GIR_Done,
    8760             :     // Label 300: @20123
    8761             :     GIM_Try, /*On fail goto*//*Label 301*/ 20181,
    8762             :       GIM_CheckFeatures, GIFBS_HasNEON,
    8763             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    8764             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8765             :       // MIs[0] Rd
    8766             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    8767             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8768             :       // MIs[0] Operand 1
    8769             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sshl,
    8770             :       // MIs[0] Rn
    8771             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    8772             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    8773             :       // MIs[0] Rm
    8774             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
    8775             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    8776             :       // (intrinsic_wo_chain:v2i32 296:iPTR, V64:v2i32:$Rn, V64:v2i32:$Rm)  =>  (SSHLv2i32:v2i32 V64:v2i32:$Rn, V64:v2i32:$Rm)
    8777             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SSHLv2i32,
    8778             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8779             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    8780             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    8781             :       GIR_EraseFromParent, /*InsnID*/0,
    8782             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8783             :       GIR_Done,
    8784             :     // Label 301: @20181
    8785             :     GIM_Try, /*On fail goto*//*Label 302*/ 20239,
    8786             :       GIM_CheckFeatures, GIFBS_HasNEON,
    8787             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    8788             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8789             :       // MIs[0] Rd
    8790             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    8791             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8792             :       // MIs[0] Operand 1
    8793             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sshl,
    8794             :       // MIs[0] Rn
    8795             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    8796             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    8797             :       // MIs[0] Rm
    8798             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    8799             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    8800             :       // (intrinsic_wo_chain:v4i32 296:iPTR, V128:v4i32:$Rn, V128:v4i32:$Rm)  =>  (SSHLv4i32:v4i32 V128:v4i32:$Rn, V128:v4i32:$Rm)
    8801             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SSHLv4i32,
    8802             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8803             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    8804             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    8805             :       GIR_EraseFromParent, /*InsnID*/0,
    8806             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8807             :       GIR_Done,
    8808             :     // Label 302: @20239
    8809             :     GIM_Try, /*On fail goto*//*Label 303*/ 20297,
    8810             :       GIM_CheckFeatures, GIFBS_HasNEON,
    8811             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    8812             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8813             :       // MIs[0] Rd
    8814             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    8815             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8816             :       // MIs[0] Operand 1
    8817             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sshl,
    8818             :       // MIs[0] Rn
    8819             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    8820             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    8821             :       // MIs[0] Rm
    8822             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    8823             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    8824             :       // (intrinsic_wo_chain:v2i64 296:iPTR, V128:v2i64:$Rn, V128:v2i64:$Rm)  =>  (SSHLv2i64:v2i64 V128:v2i64:$Rn, V128:v2i64:$Rm)
    8825             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SSHLv2i64,
    8826             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8827             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    8828             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    8829             :       GIR_EraseFromParent, /*InsnID*/0,
    8830             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8831             :       GIR_Done,
    8832             :     // Label 303: @20297
    8833             :     GIM_Try, /*On fail goto*//*Label 304*/ 20355,
    8834             :       GIM_CheckFeatures, GIFBS_HasNEON,
    8835             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    8836             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8837             :       // MIs[0] Rd
    8838             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
    8839             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8840             :       // MIs[0] Operand 1
    8841             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    8842             :       // MIs[0] Rn
    8843             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
    8844             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    8845             :       // MIs[0] Rm
    8846             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
    8847             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    8848             :       // (intrinsic_wo_chain:v8i8 317:iPTR, V64:v8i8:$Rn, V64:v8i8:$Rm)  =>  (UABDv8i8:v8i8 V64:v8i8:$Rn, V64:v8i8:$Rm)
    8849             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABDv8i8,
    8850             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8851             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    8852             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    8853             :       GIR_EraseFromParent, /*InsnID*/0,
    8854             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8855             :       GIR_Done,
    8856             :     // Label 304: @20355
    8857             :     GIM_Try, /*On fail goto*//*Label 305*/ 20413,
    8858             :       GIM_CheckFeatures, GIFBS_HasNEON,
    8859             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    8860             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8861             :       // MIs[0] Rd
    8862             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
    8863             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8864             :       // MIs[0] Operand 1
    8865             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    8866             :       // MIs[0] Rn
    8867             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    8868             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    8869             :       // MIs[0] Rm
    8870             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
    8871             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    8872             :       // (intrinsic_wo_chain:v16i8 317:iPTR, V128:v16i8:$Rn, V128:v16i8:$Rm)  =>  (UABDv16i8:v16i8 V128:v16i8:$Rn, V128:v16i8:$Rm)
    8873             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABDv16i8,
    8874             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8875             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    8876             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    8877             :       GIR_EraseFromParent, /*InsnID*/0,
    8878             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8879             :       GIR_Done,
    8880             :     // Label 305: @20413
    8881             :     GIM_Try, /*On fail goto*//*Label 306*/ 20471,
    8882             :       GIM_CheckFeatures, GIFBS_HasNEON,
    8883             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    8884             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8885             :       // MIs[0] Rd
    8886             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    8887             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8888             :       // MIs[0] Operand 1
    8889             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    8890             :       // MIs[0] Rn
    8891             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    8892             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    8893             :       // MIs[0] Rm
    8894             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
    8895             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    8896             :       // (intrinsic_wo_chain:v4i16 317:iPTR, V64:v4i16:$Rn, V64:v4i16:$Rm)  =>  (UABDv4i16:v4i16 V64:v4i16:$Rn, V64:v4i16:$Rm)
    8897             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABDv4i16,
    8898             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8899             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    8900             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    8901             :       GIR_EraseFromParent, /*InsnID*/0,
    8902             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8903             :       GIR_Done,
    8904             :     // Label 306: @20471
    8905             :     GIM_Try, /*On fail goto*//*Label 307*/ 20529,
    8906             :       GIM_CheckFeatures, GIFBS_HasNEON,
    8907             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    8908             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8909             :       // MIs[0] Rd
    8910             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    8911             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8912             :       // MIs[0] Operand 1
    8913             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    8914             :       // MIs[0] Rn
    8915             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    8916             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    8917             :       // MIs[0] Rm
    8918             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    8919             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    8920             :       // (intrinsic_wo_chain:v8i16 317:iPTR, V128:v8i16:$Rn, V128:v8i16:$Rm)  =>  (UABDv8i16:v8i16 V128:v8i16:$Rn, V128:v8i16:$Rm)
    8921             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABDv8i16,
    8922             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8923             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    8924             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    8925             :       GIR_EraseFromParent, /*InsnID*/0,
    8926             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8927             :       GIR_Done,
    8928             :     // Label 307: @20529
    8929             :     GIM_Try, /*On fail goto*//*Label 308*/ 20587,
    8930             :       GIM_CheckFeatures, GIFBS_HasNEON,
    8931             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    8932             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8933             :       // MIs[0] Rd
    8934             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    8935             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8936             :       // MIs[0] Operand 1
    8937             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    8938             :       // MIs[0] Rn
    8939             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    8940             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    8941             :       // MIs[0] Rm
    8942             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
    8943             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    8944             :       // (intrinsic_wo_chain:v2i32 317:iPTR, V64:v2i32:$Rn, V64:v2i32:$Rm)  =>  (UABDv2i32:v2i32 V64:v2i32:$Rn, V64:v2i32:$Rm)
    8945             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABDv2i32,
    8946             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8947             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    8948             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    8949             :       GIR_EraseFromParent, /*InsnID*/0,
    8950             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8951             :       GIR_Done,
    8952             :     // Label 308: @20587
    8953             :     GIM_Try, /*On fail goto*//*Label 309*/ 20645,
    8954             :       GIM_CheckFeatures, GIFBS_HasNEON,
    8955             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    8956             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8957             :       // MIs[0] Rd
    8958             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    8959             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8960             :       // MIs[0] Operand 1
    8961             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    8962             :       // MIs[0] Rn
    8963             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    8964             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    8965             :       // MIs[0] Rm
    8966             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    8967             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    8968             :       // (intrinsic_wo_chain:v4i32 317:iPTR, V128:v4i32:$Rn, V128:v4i32:$Rm)  =>  (UABDv4i32:v4i32 V128:v4i32:$Rn, V128:v4i32:$Rm)
    8969             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABDv4i32,
    8970             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8971             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    8972             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    8973             :       GIR_EraseFromParent, /*InsnID*/0,
    8974             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8975             :       GIR_Done,
    8976             :     // Label 309: @20645
    8977             :     GIM_Try, /*On fail goto*//*Label 310*/ 20703,
    8978             :       GIM_CheckFeatures, GIFBS_HasNEON,
    8979             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    8980             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8981             :       // MIs[0] Rd
    8982             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
    8983             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8984             :       // MIs[0] Operand 1
    8985             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uhadd,
    8986             :       // MIs[0] Rn
    8987             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
    8988             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    8989             :       // MIs[0] Rm
    8990             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
    8991             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    8992             :       // (intrinsic_wo_chain:v8i8 321:iPTR, V64:v8i8:$Rn, V64:v8i8:$Rm)  =>  (UHADDv8i8:v8i8 V64:v8i8:$Rn, V64:v8i8:$Rm)
    8993             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UHADDv8i8,
    8994             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8995             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    8996             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    8997             :       GIR_EraseFromParent, /*InsnID*/0,
    8998             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8999             :       GIR_Done,
    9000             :     // Label 310: @20703
    9001             :     GIM_Try, /*On fail goto*//*Label 311*/ 20761,
    9002             :       GIM_CheckFeatures, GIFBS_HasNEON,
    9003             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    9004             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9005             :       // MIs[0] Rd
    9006             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
    9007             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    9008             :       // MIs[0] Operand 1
    9009             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uhadd,
    9010             :       // MIs[0] Rn
    9011             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    9012             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    9013             :       // MIs[0] Rm
    9014             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
    9015             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    9016             :       // (intrinsic_wo_chain:v16i8 321:iPTR, V128:v16i8:$Rn, V128:v16i8:$Rm)  =>  (UHADDv16i8:v16i8 V128:v16i8:$Rn, V128:v16i8:$Rm)
    9017             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UHADDv16i8,
    9018             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    9019             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    9020             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    9021             :       GIR_EraseFromParent, /*InsnID*/0,
    9022             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9023             :       GIR_Done,
    9024             :     // Label 311: @20761
    9025             :     GIM_Try, /*On fail goto*//*Label 312*/ 20819,
    9026             :       GIM_CheckFeatures, GIFBS_HasNEON,
    9027             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    9028             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9029             :       // MIs[0] Rd
    9030             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    9031             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    9032             :       // MIs[0] Operand 1
    9033             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uhadd,
    9034             :       // MIs[0] Rn
    9035             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    9036             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    9037             :       // MIs[0] Rm
    9038             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
    9039             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    9040             :       // (intrinsic_wo_chain:v4i16 321:iPTR, V64:v4i16:$Rn, V64:v4i16:$Rm)  =>  (UHADDv4i16:v4i16 V64:v4i16:$Rn, V64:v4i16:$Rm)
    9041             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UHADDv4i16,
    9042             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    9043             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    9044             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    9045             :       GIR_EraseFromParent, /*InsnID*/0,
    9046             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9047             :       GIR_Done,
    9048             :     // Label 312: @20819
    9049             :     GIM_Try, /*On fail goto*//*Label 313*/ 20877,
    9050             :       GIM_CheckFeatures, GIFBS_HasNEON,
    9051             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    9052             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9053             :       // MIs[0] Rd
    9054             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    9055             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    9056             :       // MIs[0] Operand 1
    9057             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uhadd,
    9058             :       // MIs[0] Rn
    9059             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    9060             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    9061             :       // MIs[0] Rm
    9062             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    9063             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    9064             :       // (intrinsic_wo_chain:v8i16 321:iPTR, V128:v8i16:$Rn, V128:v8i16:$Rm)  =>  (UHADDv8i16:v8i16 V128:v8i16:$Rn, V128:v8i16:$Rm)
    9065             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UHADDv8i16,
    9066             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    9067             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    9068             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    9069             :       GIR_EraseFromParent, /*InsnID*/0,
    9070             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9071             :       GIR_Done,
    9072             :     // Label 313: @20877
    9073             :     GIM_Try, /*On fail goto*//*Label 314*/ 20935,
    9074             :       GIM_CheckFeatures, GIFBS_HasNEON,
    9075             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    9076             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9077             :       // MIs[0] Rd
    9078             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    9079             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    9080             :       // MIs[0] Operand 1
    9081             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uhadd,
    9082             :       // MIs[0] Rn
    9083             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    9084             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    9085             :       // MIs[0] Rm
    9086             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
    9087             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    9088             :       // (intrinsic_wo_chain:v2i32 321:iPTR, V64:v2i32:$Rn, V64:v2i32:$Rm)  =>  (UHADDv2i32:v2i32 V64:v2i32:$Rn, V64:v2i32:$Rm)
    9089             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UHADDv2i32,
    9090             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    9091             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    9092             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    9093             :       GIR_EraseFromParent, /*InsnID*/0,
    9094             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9095             :       GIR_Done,
    9096             :     // Label 314: @20935
    9097             :     GIM_Try, /*On fail goto*//*Label 315*/ 20993,
    9098             :       GIM_CheckFeatures, GIFBS_HasNEON,
    9099             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    9100             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9101             :       // MIs[0] Rd
    9102             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    9103             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    9104             :       // MIs[0] Operand 1
    9105             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uhadd,
    9106             :       // MIs[0] Rn
    9107             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    9108             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    9109             :       // MIs[0] Rm
    9110             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    9111             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    9112             :       // (intrinsic_wo_chain:v4i32 321:iPTR, V128:v4i32:$Rn, V128:v4i32:$Rm)  =>  (UHADDv4i32:v4i32 V128:v4i32:$Rn, V128:v4i32:$Rm)
    9113             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UHADDv4i32,
    9114             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    9115             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    9116             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    9117             :       GIR_EraseFromParent, /*InsnID*/0,
    9118             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9119             :       GIR_Done,
    9120             :     // Label 315: @20993
    9121             :     GIM_Try, /*On fail goto*//*Label 316*/ 21051,
    9122             :       GIM_CheckFeatures, GIFBS_HasNEON,
    9123             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    9124             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9125             :       // MIs[0] Rd
    9126             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
    9127             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    9128             :       // MIs[0] Operand 1
    9129             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uhsub,
    9130             :       // MIs[0] Rn
    9131             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
    9132             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    9133             :       // MIs[0] Rm
    9134             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
    9135             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    9136             :       // (intrinsic_wo_chain:v8i8 322:iPTR, V64:v8i8:$Rn, V64:v8i8:$Rm)  =>  (UHSUBv8i8:v8i8 V64:v8i8:$Rn, V64:v8i8:$Rm)
    9137             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UHSUBv8i8,
    9138             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    9139             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    9140             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    9141             :       GIR_EraseFromParent, /*InsnID*/0,
    9142             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9143             :       GIR_Done,
    9144             :     // Label 316: @21051
    9145             :     GIM_Try, /*On fail goto*//*Label 317*/ 21109,
    9146             :       GIM_CheckFeatures, GIFBS_HasNEON,
    9147             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    9148             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9149             :       // MIs[0] Rd
    9150             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
    9151             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    9152             :       // MIs[0] Operand 1
    9153             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uhsub,
    9154             :       // MIs[0] Rn
    9155             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    9156             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    9157             :       // MIs[0] Rm
    9158             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
    9159             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    9160             :       // (intrinsic_wo_chain:v16i8 322:iPTR, V128:v16i8:$Rn, V128:v16i8:$Rm)  =>  (UHSUBv16i8:v16i8 V128:v16i8:$Rn, V128:v16i8:$Rm)
    9161             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UHSUBv16i8,
    9162             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    9163             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    9164             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    9165             :       GIR_EraseFromParent, /*InsnID*/0,
    9166             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9167             :       GIR_Done,
    9168             :     // Label 317: @21109
    9169             :     GIM_Try, /*On fail goto*//*Label 318*/ 21167,
    9170             :       GIM_CheckFeatures, GIFBS_HasNEON,
    9171             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    9172             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9173             :       // MIs[0] Rd
    9174             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    9175             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    9176             :       // MIs[0] Operand 1
    9177             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uhsub,
    9178             :       // MIs[0] Rn
    9179             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    9180             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    9181             :       // MIs[0] Rm
    9182             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
    9183             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    9184             :       // (intrinsic_wo_chain:v4i16 322:iPTR, V64:v4i16:$Rn, V64:v4i16:$Rm)  =>  (UHSUBv4i16:v4i16 V64:v4i16:$Rn, V64:v4i16:$Rm)
    9185             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UHSUBv4i16,
    9186             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    9187             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    9188             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    9189             :       GIR_EraseFromParent, /*InsnID*/0,
    9190             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9191             :       GIR_Done,
    9192             :     // Label 318: @21167
    9193             :     GIM_Try, /*On fail goto*//*Label 319*/ 21225,
    9194             :       GIM_CheckFeatures, GIFBS_HasNEON,
    9195             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    9196             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9197             :       // MIs[0] Rd
    9198             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    9199             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    9200             :       // MIs[0] Operand 1
    9201             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uhsub,
    9202             :       // MIs[0] Rn
    9203             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    9204             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    9205             :       // MIs[0] Rm
    9206             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    9207             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    9208             :       // (intrinsic_wo_chain:v8i16 322:iPTR, V128:v8i16:$Rn, V128:v8i16:$Rm)  =>  (UHSUBv8i16:v8i16 V128:v8i16:$Rn, V128:v8i16:$Rm)
    9209             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UHSUBv8i16,
    9210             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    9211             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    9212             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    9213             :       GIR_EraseFromParent, /*InsnID*/0,
    9214             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9215             :       GIR_Done,
    9216             :     // Label 319: @21225
    9217             :     GIM_Try, /*On fail goto*//*Label 320*/ 21283,
    9218             :       GIM_CheckFeatures, GIFBS_HasNEON,
    9219             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    9220             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9221             :       // MIs[0] Rd
    9222             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    9223             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    9224             :       // MIs[0] Operand 1
    9225             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uhsub,
    9226             :       // MIs[0] Rn
    9227             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    9228             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    9229             :       // MIs[0] Rm
    9230             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
    9231             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    9232             :       // (intrinsic_wo_chain:v2i32 322:iPTR, V64:v2i32:$Rn, V64:v2i32:$Rm)  =>  (UHSUBv2i32:v2i32 V64:v2i32:$Rn, V64:v2i32:$Rm)
    9233             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UHSUBv2i32,
    9234             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    9235             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    9236             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    9237             :       GIR_EraseFromParent, /*InsnID*/0,
    9238             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9239             :       GIR_Done,
    9240             :     // Label 320: @21283
    9241             :     GIM_Try, /*On fail goto*//*Label 321*/ 21341,
    9242             :       GIM_CheckFeatures, GIFBS_HasNEON,
    9243             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    9244             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9245             :       // MIs[0] Rd
    9246             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    9247             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    9248             :       // MIs[0] Operand 1
    9249             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uhsub,
    9250             :       // MIs[0] Rn
    9251             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    9252             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    9253             :       // MIs[0] Rm
    9254             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    9255             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    9256             :       // (intrinsic_wo_chain:v4i32 322:iPTR, V128:v4i32:$Rn, V128:v4i32:$Rm)  =>  (UHSUBv4i32:v4i32 V128:v4i32:$Rn, V128:v4i32:$Rm)
    9257             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UHSUBv4i32,
    9258             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    9259             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    9260             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    9261             :       GIR_EraseFromParent, /*InsnID*/0,
    9262             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9263             :       GIR_Done,
    9264             :     // Label 321: @21341
    9265             :     GIM_Try, /*On fail goto*//*Label 322*/ 21399,
    9266             :       GIM_CheckFeatures, GIFBS_HasNEON,
    9267             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    9268             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9269             :       // MIs[0] Rd
    9270             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
    9271             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    9272             :       // MIs[0] Operand 1
    9273             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_umaxp,
    9274             :       // MIs[0] Rn
    9275             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
    9276             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    9277             :       // MIs[0] Rm
    9278             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
    9279             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    9280             :       // (intrinsic_wo_chain:v8i8 324:iPTR, V64:v8i8:$Rn, V64:v8i8:$Rm)  =>  (UMAXPv8i8:v8i8 V64:v8i8:$Rn, V64:v8i8:$Rm)
    9281             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMAXPv8i8,
    9282             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    9283             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    9284             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    9285             :       GIR_EraseFromParent, /*InsnID*/0,
    9286             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9287             :       GIR_Done,
    9288             :     // Label 322: @21399
    9289             :     GIM_Try, /*On fail goto*//*Label 323*/ 21457,
    9290             :       GIM_CheckFeatures, GIFBS_HasNEON,
    9291             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    9292             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9293             :       // MIs[0] Rd
    9294             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
    9295             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    9296             :       // MIs[0] Operand 1
    9297             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_umaxp,
    9298             :       // MIs[0] Rn
    9299             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    9300             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    9301             :       // MIs[0] Rm
    9302             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
    9303             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    9304             :       // (intrinsic_wo_chain:v16i8 324:iPTR, V128:v16i8:$Rn, V128:v16i8:$Rm)  =>  (UMAXPv16i8:v16i8 V128:v16i8:$Rn, V128:v16i8:$Rm)
    9305             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMAXPv16i8,
    9306             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    9307             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    9308             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    9309             :       GIR_EraseFromParent, /*InsnID*/0,
    9310             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9311             :       GIR_Done,
    9312             :     // Label 323: @21457
    9313             :     GIM_Try, /*On fail goto*//*Label 324*/ 21515,
    9314             :       GIM_CheckFeatures, GIFBS_HasNEON,
    9315             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    9316             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9317             :       // MIs[0] Rd
    9318             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    9319             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    9320             :       // MIs[0] Operand 1
    9321             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_umaxp,
    9322             :       // MIs[0] Rn
    9323             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    9324             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    9325             :       // MIs[0] Rm
    9326             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
    9327             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    9328             :       // (intrinsic_wo_chain:v4i16 324:iPTR, V64:v4i16:$Rn, V64:v4i16:$Rm)  =>  (UMAXPv4i16:v4i16 V64:v4i16:$Rn, V64:v4i16:$Rm)
    9329             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMAXPv4i16,
    9330             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    9331             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    9332             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    9333             :       GIR_EraseFromParent, /*InsnID*/0,
    9334             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9335             :       GIR_Done,
    9336             :     // Label 324: @21515
    9337             :     GIM_Try, /*On fail goto*//*Label 325*/ 21573,
    9338             :       GIM_CheckFeatures, GIFBS_HasNEON,
    9339             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    9340             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9341             :       // MIs[0] Rd
    9342             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    9343             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    9344             :       // MIs[0] Operand 1
    9345             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_umaxp,
    9346             :       // MIs[0] Rn
    9347             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    9348             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    9349             :       // MIs[0] Rm
    9350             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    9351             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    9352             :       // (intrinsic_wo_chain:v8i16 324:iPTR, V128:v8i16:$Rn, V128:v8i16:$Rm)  =>  (UMAXPv8i16:v8i16 V128:v8i16:$Rn, V128:v8i16:$Rm)
    9353             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMAXPv8i16,
    9354             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    9355             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    9356             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    9357             :       GIR_EraseFromParent, /*InsnID*/0,
    9358             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9359             :       GIR_Done,
    9360             :     // Label 325: @21573
    9361             :     GIM_Try, /*On fail goto*//*Label 326*/ 21631,
    9362             :       GIM_CheckFeatures, GIFBS_HasNEON,
    9363             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    9364             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9365             :       // MIs[0] Rd
    9366             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    9367             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    9368             :       // MIs[0] Operand 1
    9369             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_umaxp,
    9370             :       // MIs[0] Rn
    9371             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    9372             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    9373             :       // MIs[0] Rm
    9374             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
    9375             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    9376             :       // (intrinsic_wo_chain:v2i32 324:iPTR, V64:v2i32:$Rn, V64:v2i32:$Rm)  =>  (UMAXPv2i32:v2i32 V64:v2i32:$Rn, V64:v2i32:$Rm)
    9377             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMAXPv2i32,
    9378             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    9379             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    9380             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    9381             :       GIR_EraseFromParent, /*InsnID*/0,
    9382             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9383             :       GIR_Done,
    9384             :     // Label 326: @21631
    9385             :     GIM_Try, /*On fail goto*//*Label 327*/ 21689,
    9386             :       GIM_CheckFeatures, GIFBS_HasNEON,
    9387             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    9388             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9389             :       // MIs[0] Rd
    9390             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    9391             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    9392             :       // MIs[0] Operand 1
    9393             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_umaxp,
    9394             :       // MIs[0] Rn
    9395             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    9396             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    9397             :       // MIs[0] Rm
    9398             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    9399             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    9400             :       // (intrinsic_wo_chain:v4i32 324:iPTR, V128:v4i32:$Rn, V128:v4i32:$Rm)  =>  (UMAXPv4i32:v4i32 V128:v4i32:$Rn, V128:v4i32:$Rm)
    9401             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMAXPv4i32,
    9402             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    9403             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    9404             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    9405             :       GIR_EraseFromParent, /*InsnID*/0,
    9406             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9407             :       GIR_Done,
    9408             :     // Label 327: @21689
    9409             :     GIM_Try, /*On fail goto*//*Label 328*/ 21747,
    9410             :       GIM_CheckFeatures, GIFBS_HasNEON,
    9411             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    9412             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9413             :       // MIs[0] Rd
    9414             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
    9415             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    9416             :       // MIs[0] Operand 1
    9417             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uminp,
    9418             :       // MIs[0] Rn
    9419             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
    9420             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    9421             :       // MIs[0] Rm
    9422             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
    9423             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    9424             :       // (intrinsic_wo_chain:v8i8 327:iPTR, V64:v8i8:$Rn, V64:v8i8:$Rm)  =>  (UMINPv8i8:v8i8 V64:v8i8:$Rn, V64:v8i8:$Rm)
    9425             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMINPv8i8,
    9426             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    9427             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    9428             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    9429             :       GIR_EraseFromParent, /*InsnID*/0,
    9430             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9431             :       GIR_Done,
    9432             :     // Label 328: @21747
    9433             :     GIM_Try, /*On fail goto*//*Label 329*/ 21805,
    9434             :       GIM_CheckFeatures, GIFBS_HasNEON,
    9435             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    9436             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9437             :       // MIs[0] Rd
    9438             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
    9439             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    9440             :       // MIs[0] Operand 1
    9441             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uminp,
    9442             :       // MIs[0] Rn
    9443             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    9444             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    9445             :       // MIs[0] Rm
    9446             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
    9447             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    9448             :       // (intrinsic_wo_chain:v16i8 327:iPTR, V128:v16i8:$Rn, V128:v16i8:$Rm)  =>  (UMINPv16i8:v16i8 V128:v16i8:$Rn, V128:v16i8:$Rm)
    9449             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMINPv16i8,
    9450             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    9451             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    9452             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    9453             :       GIR_EraseFromParent, /*InsnID*/0,
    9454             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9455             :       GIR_Done,
    9456             :     // Label 329: @21805
    9457             :     GIM_Try, /*On fail goto*//*Label 330*/ 21863,
    9458             :       GIM_CheckFeatures, GIFBS_HasNEON,
    9459             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    9460             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9461             :       // MIs[0] Rd
    9462             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    9463             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    9464             :       // MIs[0] Operand 1
    9465             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uminp,
    9466             :       // MIs[0] Rn
    9467             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    9468             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    9469             :       // MIs[0] Rm
    9470             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
    9471             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    9472             :       // (intrinsic_wo_chain:v4i16 327:iPTR, V64:v4i16:$Rn, V64:v4i16:$Rm)  =>  (UMINPv4i16:v4i16 V64:v4i16:$Rn, V64:v4i16:$Rm)
    9473             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMINPv4i16,
    9474             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    9475             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    9476             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    9477             :       GIR_EraseFromParent, /*InsnID*/0,
    9478             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9479             :       GIR_Done,
    9480             :     // Label 330: @21863
    9481             :     GIM_Try, /*On fail goto*//*Label 331*/ 21921,
    9482             :       GIM_CheckFeatures, GIFBS_HasNEON,
    9483             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    9484             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9485             :       // MIs[0] Rd
    9486             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    9487             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    9488             :       // MIs[0] Operand 1
    9489             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uminp,
    9490             :       // MIs[0] Rn
    9491             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    9492             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    9493             :       // MIs[0] Rm
    9494             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    9495             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    9496             :       // (intrinsic_wo_chain:v8i16 327:iPTR, V128:v8i16:$Rn, V128:v8i16:$Rm)  =>  (UMINPv8i16:v8i16 V128:v8i16:$Rn, V128:v8i16:$Rm)
    9497             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMINPv8i16,
    9498             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    9499             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    9500             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    9501             :       GIR_EraseFromParent, /*InsnID*/0,
    9502             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9503             :       GIR_Done,
    9504             :     // Label 331: @21921
    9505             :     GIM_Try, /*On fail goto*//*Label 332*/ 21979,
    9506             :       GIM_CheckFeatures, GIFBS_HasNEON,
    9507             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    9508             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9509             :       // MIs[0] Rd
    9510             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    9511             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    9512             :       // MIs[0] Operand 1
    9513             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uminp,
    9514             :       // MIs[0] Rn
    9515             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    9516             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    9517             :       // MIs[0] Rm
    9518             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
    9519             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    9520             :       // (intrinsic_wo_chain:v2i32 327:iPTR, V64:v2i32:$Rn, V64:v2i32:$Rm)  =>  (UMINPv2i32:v2i32 V64:v2i32:$Rn, V64:v2i32:$Rm)
    9521             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMINPv2i32,
    9522             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    9523             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    9524             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    9525             :       GIR_EraseFromParent, /*InsnID*/0,
    9526             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9527             :       GIR_Done,
    9528             :     // Label 332: @21979
    9529             :     GIM_Try, /*On fail goto*//*Label 333*/ 22037,
    9530             :       GIM_CheckFeatures, GIFBS_HasNEON,
    9531             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    9532             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9533             :       // MIs[0] Rd
    9534             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    9535             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    9536             :       // MIs[0] Operand 1
    9537             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uminp,
    9538             :       // MIs[0] Rn
    9539             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    9540             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    9541             :       // MIs[0] Rm
    9542             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    9543             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    9544             :       // (intrinsic_wo_chain:v4i32 327:iPTR, V128:v4i32:$Rn, V128:v4i32:$Rm)  =>  (UMINPv4i32:v4i32 V128:v4i32:$Rn, V128:v4i32:$Rm)
    9545             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMINPv4i32,
    9546             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    9547             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    9548             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    9549             :       GIR_EraseFromParent, /*InsnID*/0,
    9550             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9551             :       GIR_Done,
    9552             :     // Label 333: @22037
    9553             :     GIM_Try, /*On fail goto*//*Label 334*/ 22095,
    9554             :       GIM_CheckFeatures, GIFBS_HasNEON,
    9555             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    9556             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9557             :       // MIs[0] Rd
    9558             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
    9559             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    9560             :       // MIs[0] Operand 1
    9561             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqadd,
    9562             :       // MIs[0] Rn
    9563             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
    9564             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    9565             :       // MIs[0] Rm
    9566             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
    9567             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    9568             :       // (intrinsic_wo_chain:v8i8 330:iPTR, V64:v8i8:$Rn, V64:v8i8:$Rm)  =>  (UQADDv8i8:v8i8 V64:v8i8:$Rn, V64:v8i8:$Rm)
    9569             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQADDv8i8,
    9570             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    9571             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    9572             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    9573             :       GIR_EraseFromParent, /*InsnID*/0,
    9574             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9575             :       GIR_Done,
    9576             :     // Label 334: @22095
    9577             :     GIM_Try, /*On fail goto*//*Label 335*/ 22153,
    9578             :       GIM_CheckFeatures, GIFBS_HasNEON,
    9579             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    9580             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9581             :       // MIs[0] Rd
    9582             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
    9583             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    9584             :       // MIs[0] Operand 1
    9585             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqadd,
    9586             :       // MIs[0] Rn
    9587             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    9588             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    9589             :       // MIs[0] Rm
    9590             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
    9591             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    9592             :       // (intrinsic_wo_chain:v16i8 330:iPTR, V128:v16i8:$Rn, V128:v16i8:$Rm)  =>  (UQADDv16i8:v16i8 V128:v16i8:$Rn, V128:v16i8:$Rm)
    9593             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQADDv16i8,
    9594             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    9595             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    9596             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    9597             :       GIR_EraseFromParent, /*InsnID*/0,
    9598             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9599             :       GIR_Done,
    9600             :     // Label 335: @22153
    9601             :     GIM_Try, /*On fail goto*//*Label 336*/ 22211,
    9602             :       GIM_CheckFeatures, GIFBS_HasNEON,
    9603             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    9604             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9605             :       // MIs[0] Rd
    9606             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    9607             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    9608             :       // MIs[0] Operand 1
    9609             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqadd,
    9610             :       // MIs[0] Rn
    9611             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    9612             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    9613             :       // MIs[0] Rm
    9614             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
    9615             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    9616             :       // (intrinsic_wo_chain:v4i16 330:iPTR, V64:v4i16:$Rn, V64:v4i16:$Rm)  =>  (UQADDv4i16:v4i16 V64:v4i16:$Rn, V64:v4i16:$Rm)
    9617             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQADDv4i16,
    9618             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    9619             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    9620             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    9621             :       GIR_EraseFromParent, /*InsnID*/0,
    9622             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9623             :       GIR_Done,
    9624             :     // Label 336: @22211
    9625             :     GIM_Try, /*On fail goto*//*Label 337*/ 22269,
    9626             :       GIM_CheckFeatures, GIFBS_HasNEON,
    9627             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    9628             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9629             :       // MIs[0] Rd
    9630             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    9631             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    9632             :       // MIs[0] Operand 1
    9633             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqadd,
    9634             :       // MIs[0] Rn
    9635             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    9636             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    9637             :       // MIs[0] Rm
    9638             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    9639             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    9640             :       // (intrinsic_wo_chain:v8i16 330:iPTR, V128:v8i16:$Rn, V128:v8i16:$Rm)  =>  (UQADDv8i16:v8i16 V128:v8i16:$Rn, V128:v8i16:$Rm)
    9641             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQADDv8i16,
    9642             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    9643             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    9644             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    9645             :       GIR_EraseFromParent, /*InsnID*/0,
    9646             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9647             :       GIR_Done,
    9648             :     // Label 337: @22269
    9649             :     GIM_Try, /*On fail goto*//*Label 338*/ 22327,
    9650             :       GIM_CheckFeatures, GIFBS_HasNEON,
    9651             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    9652             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9653             :       // MIs[0] Rd
    9654             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    9655             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    9656             :       // MIs[0] Operand 1
    9657             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqadd,
    9658             :       // MIs[0] Rn
    9659             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    9660             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    9661             :       // MIs[0] Rm
    9662             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
    9663             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    9664             :       // (intrinsic_wo_chain:v2i32 330:iPTR, V64:v2i32:$Rn, V64:v2i32:$Rm)  =>  (UQADDv2i32:v2i32 V64:v2i32:$Rn, V64:v2i32:$Rm)
    9665             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQADDv2i32,
    9666             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    9667             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    9668             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    9669             :       GIR_EraseFromParent, /*InsnID*/0,
    9670             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9671             :       GIR_Done,
    9672             :     // Label 338: @22327
    9673             :     GIM_Try, /*On fail goto*//*Label 339*/ 22385,
    9674             :       GIM_CheckFeatures, GIFBS_HasNEON,
    9675             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    9676             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9677             :       // MIs[0] Rd
    9678             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    9679             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    9680             :       // MIs[0] Operand 1
    9681             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqadd,
    9682             :       // MIs[0] Rn
    9683             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    9684             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    9685             :       // MIs[0] Rm
    9686             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    9687             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    9688             :       // (intrinsic_wo_chain:v4i32 330:iPTR, V128:v4i32:$Rn, V128:v4i32:$Rm)  =>  (UQADDv4i32:v4i32 V128:v4i32:$Rn, V128:v4i32:$Rm)
    9689             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQADDv4i32,
    9690             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    9691             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    9692             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    9693             :       GIR_EraseFromParent, /*InsnID*/0,
    9694             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9695             :       GIR_Done,
    9696             :     // Label 339: @22385
    9697             :     GIM_Try, /*On fail goto*//*Label 340*/ 22443,
    9698             :       GIM_CheckFeatures, GIFBS_HasNEON,
    9699             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    9700             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9701             :       // MIs[0] Rd
    9702             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    9703             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    9704             :       // MIs[0] Operand 1
    9705             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqadd,
    9706             :       // MIs[0] Rn
    9707             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    9708             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    9709             :       // MIs[0] Rm
    9710             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    9711             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    9712             :       // (intrinsic_wo_chain:v2i64 330:iPTR, V128:v2i64:$Rn, V128:v2i64:$Rm)  =>  (UQADDv2i64:v2i64 V128:v2i64:$Rn, V128:v2i64:$Rm)
    9713             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQADDv2i64,
    9714             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    9715             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    9716             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    9717             :       GIR_EraseFromParent, /*InsnID*/0,
    9718             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9719             :       GIR_Done,
    9720             :     // Label 340: @22443
    9721             :     GIM_Try, /*On fail goto*//*Label 341*/ 22501,
    9722             :       GIM_CheckFeatures, GIFBS_HasNEON,
    9723             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    9724             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9725             :       // MIs[0] Rd
    9726             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
    9727             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    9728             :       // MIs[0] Operand 1
    9729             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqrshl,
    9730             :       // MIs[0] Rn
    9731             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
    9732             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    9733             :       // MIs[0] Rm
    9734             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
    9735             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    9736             :       // (intrinsic_wo_chain:v8i8 331:iPTR, V64:v8i8:$Rn, V64:v8i8:$Rm)  =>  (UQRSHLv8i8:v8i8 V64:v8i8:$Rn, V64:v8i8:$Rm)
    9737             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQRSHLv8i8,
    9738             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    9739             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    9740             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    9741             :       GIR_EraseFromParent, /*InsnID*/0,
    9742             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9743             :       GIR_Done,
    9744             :     // Label 341: @22501
    9745             :     GIM_Try, /*On fail goto*//*Label 342*/ 22559,
    9746             :       GIM_CheckFeatures, GIFBS_HasNEON,
    9747             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    9748             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9749             :       // MIs[0] Rd
    9750             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
    9751             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    9752             :       // MIs[0] Operand 1
    9753             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqrshl,
    9754             :       // MIs[0] Rn
    9755             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    9756             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    9757             :       // MIs[0] Rm
    9758             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
    9759             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    9760             :       // (intrinsic_wo_chain:v16i8 331:iPTR, V128:v16i8:$Rn, V128:v16i8:$Rm)  =>  (UQRSHLv16i8:v16i8 V128:v16i8:$Rn, V128:v16i8:$Rm)
    9761             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQRSHLv16i8,
    9762             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    9763             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    9764             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    9765             :       GIR_EraseFromParent, /*InsnID*/0,
    9766             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9767             :       GIR_Done,
    9768             :     // Label 342: @22559
    9769             :     GIM_Try, /*On fail goto*//*Label 343*/ 22617,
    9770             :       GIM_CheckFeatures, GIFBS_HasNEON,
    9771             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    9772             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9773             :       // MIs[0] Rd
    9774             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
    9775             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    9776             :       // MIs[0] Operand 1
    9777             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqrshl,
    9778             :       // MIs[0] Rn
    9779             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    9780             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    9781             :       // MIs[0] Rm
    9782             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
    9783             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    9784             :       // (intrinsic_wo_chain:v4i16 331:iPTR, V64:v4i16:$Rn, V64:v4i16:$Rm)  =>  (UQRSHLv4i16:v4i16 V64:v4i16:$Rn, V64:v4i16:$Rm)
    9785             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQRSHLv4i16,
    9786             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    9787             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    9788             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    9789             :       GIR_EraseFromParent, /*InsnID*/0,
    9790             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9791             :       GIR_Done,
    9792             :     // Label 343: @22617
    9793             :     GIM_Try, /*On fail goto*//*Label 344*/ 22675,
    9794             :       GIM_CheckFeatures, GIFBS_HasNEON,
    9795             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    9796             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9797             :       // MIs[0] Rd
    9798             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    9799             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    9800             :       // MIs[0] Operand 1
    9801             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqrshl,
    9802             :       // MIs[0] Rn
    9803             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    9804             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    9805             :       // MIs[0] Rm
    9806             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    9807             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    9808             :       // (intrinsic_wo_chain:v8i16 331:iPTR, V128:v8i16:$Rn, V128:v8i16:$Rm)  =>  (UQRSHLv8i16:v8i16 V128:v8i16:$Rn, V128:v8i16:$Rm)
    9809             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQRSHLv8i16,
    9810             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    9811             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    9812             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
    9813             :       GIR_EraseFromParent, /*InsnID*/0,
    9814             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9815             :       GIR_Done,
    9816             :     // Label 344: @22675
    9817             :     GIM_Try, /*On fail goto*//*Label 345*/ 22733,
    9818             :       GIM_CheckFeatures, GIFBS_HasNEON,
    9819             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    9820             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9821             :       // MIs[0] Rd
    9822             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
    9823             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    9824             :       // MIs[0] Operand 1
    9825             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqrshl,
    9826             :       // MIs[0] Rn
    9827             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    9828             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    9829             :       // MIs[0] Rm
    9830