LCOV - code coverage report
Current view: top level - build-llvm/lib/Target/AArch64 - AArch64GenGlobalISel.inc (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 47 180 26.1 %
Date: 2018-07-13 00:08:38 Functions: 5 8 62.5 %
Legend: Lines: hit not hit

          Line data    Source code
       1             : /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
       2             : |*                                                                            *|
       3             : |* Global Instruction Selector for the AArch64 target                         *|
       4             : |*                                                                            *|
       5             : |* Automatically generated file, do not edit!                                 *|
       6             : |*                                                                            *|
       7             : \*===----------------------------------------------------------------------===*/
       8             : 
       9             : #ifdef GET_GLOBALISEL_PREDICATE_BITSET
      10             : const unsigned MAX_SUBTARGET_PREDICATES = 15;
      11             : using PredicateBitset = llvm::PredicateBitsetImpl<MAX_SUBTARGET_PREDICATES>;
      12             : #endif // ifdef GET_GLOBALISEL_PREDICATE_BITSET
      13             : 
      14             : #ifdef GET_GLOBALISEL_TEMPORARIES_DECL
      15             :   mutable MatcherState State;
      16             :   typedef ComplexRendererFns(AArch64InstructionSelector::*ComplexMatcherMemFn)(MachineOperand &) const;
      17             :   typedef void(AArch64InstructionSelector::*CustomRendererFn)(MachineInstrBuilder &, const MachineInstr&) const;
      18             :   const ISelInfoTy<PredicateBitset, ComplexMatcherMemFn, CustomRendererFn> ISelInfo;
      19             :   static AArch64InstructionSelector::ComplexMatcherMemFn ComplexPredicateFns[];
      20             :   static AArch64InstructionSelector::CustomRendererFn CustomRenderers[];
      21             :   bool testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const override;
      22             :   bool testImmPredicate_APInt(unsigned PredicateID, const APInt &Imm) const override;
      23             :   bool testImmPredicate_APFloat(unsigned PredicateID, const APFloat &Imm) const override;
      24             :   const int64_t *getMatchTable() const override;
      25             :   bool testMIPredicate_MI(unsigned PredicateID, const MachineInstr &MI) const override;
      26             : #endif // ifdef GET_GLOBALISEL_TEMPORARIES_DECL
      27             : 
      28             : #ifdef GET_GLOBALISEL_TEMPORARIES_INIT
      29             : , State(1),
      30        5752 : ISelInfo(TypeObjects, NumTypeObjects, FeatureBitsets, ComplexPredicateFns, CustomRenderers)
      31             : #endif // ifdef GET_GLOBALISEL_TEMPORARIES_INIT
      32             : 
      33             : #ifdef GET_GLOBALISEL_IMPL
      34             : // Bits for subtarget features that participate in instruction matching.
      35             : enum SubtargetFeatureBits : uint8_t {
      36             :   Feature_HasFPARMv8Bit = 3,
      37             :   Feature_HasNEONBit = 4,
      38             :   Feature_HasCryptoBit = 6,
      39             :   Feature_HasDotProdBit = 0,
      40             :   Feature_HasCRCBit = 1,
      41             :   Feature_HasLSEBit = 7,
      42             :   Feature_HasRDMBit = 5,
      43             :   Feature_HasPerfMonBit = 8,
      44             :   Feature_HasFullFP16Bit = 2,
      45             :   Feature_HasFuseAESBit = 13,
      46             :   Feature_IsLEBit = 9,
      47             :   Feature_IsBEBit = 14,
      48             :   Feature_UseAlternateSExtLoadCVTF32Bit = 12,
      49             :   Feature_NotForCodeSizeBit = 11,
      50             :   Feature_UseSTRQroBit = 10,
      51             : };
      52             : 
      53        1438 : PredicateBitset AArch64InstructionSelector::
      54             : computeAvailableModuleFeatures(const AArch64Subtarget *Subtarget) const {
      55        1438 :   PredicateBitset Features;
      56        1438 :   if (Subtarget->hasFPARMv8())
      57             :     Features[Feature_HasFPARMv8Bit] = 1;
      58        1438 :   if (Subtarget->hasNEON())
      59             :     Features[Feature_HasNEONBit] = 1;
      60        1438 :   if (Subtarget->hasCrypto())
      61             :     Features[Feature_HasCryptoBit] = 1;
      62        1438 :   if (Subtarget->hasDotProd())
      63             :     Features[Feature_HasDotProdBit] = 1;
      64        1438 :   if (Subtarget->hasCRC())
      65             :     Features[Feature_HasCRCBit] = 1;
      66        1438 :   if (Subtarget->hasLSE())
      67             :     Features[Feature_HasLSEBit] = 1;
      68        1438 :   if (Subtarget->hasRDM())
      69             :     Features[Feature_HasRDMBit] = 1;
      70        1438 :   if (Subtarget->hasPerfMon())
      71             :     Features[Feature_HasPerfMonBit] = 1;
      72        1438 :   if (Subtarget->hasFullFP16())
      73             :     Features[Feature_HasFullFP16Bit] = 1;
      74        1438 :   if (Subtarget->hasFuseAES())
      75             :     Features[Feature_HasFuseAESBit] = 1;
      76        1438 :   if (Subtarget->isLittleEndian())
      77             :     Features[Feature_IsLEBit] = 1;
      78        1438 :   if (!Subtarget->isLittleEndian())
      79             :     Features[Feature_IsBEBit] = 1;
      80        1438 :   if (Subtarget->useAlternateSExtLoadCVTF32Pattern())
      81             :     Features[Feature_UseAlternateSExtLoadCVTF32Bit] = 1;
      82        1438 :   return Features;
      83             : }
      84             : 
      85         803 : PredicateBitset AArch64InstructionSelector::
      86             : computeAvailableFunctionFeatures(const AArch64Subtarget *Subtarget, const MachineFunction *MF) const {
      87         803 :   PredicateBitset Features;
      88         803 :   if (!MF->getFunction().optForSize())
      89             :     Features[Feature_NotForCodeSizeBit] = 1;
      90         803 :   if (!Subtarget->isSTRQroSlow() || MF->getFunction().optForSize())
      91             :     Features[Feature_UseSTRQroBit] = 1;
      92         803 :   return Features;
      93             : }
      94             : 
      95             : // LLT Objects.
      96             : enum {
      97             :   GILLT_s16,
      98             :   GILLT_s32,
      99             :   GILLT_s64,
     100             :   GILLT_s128,
     101             :   GILLT_v2s32,
     102             :   GILLT_v2s64,
     103             :   GILLT_v4s16,
     104             :   GILLT_v4s32,
     105             :   GILLT_v8s8,
     106             :   GILLT_v8s16,
     107             :   GILLT_v16s8,
     108             : };
     109             : const static size_t NumTypeObjects = 11;
     110             : const static LLT TypeObjects[] = {
     111             :   LLT::scalar(16),
     112             :   LLT::scalar(32),
     113             :   LLT::scalar(64),
     114             :   LLT::scalar(128),
     115             :   LLT::vector(2, 32),
     116             :   LLT::vector(2, 64),
     117             :   LLT::vector(4, 16),
     118             :   LLT::vector(4, 32),
     119             :   LLT::vector(8, 8),
     120             :   LLT::vector(8, 16),
     121             :   LLT::vector(16, 8),
     122       99743 : };
     123             : 
     124             : // Feature bitsets.
     125             : enum {
     126             :   GIFBS_Invalid,
     127             :   GIFBS_HasCRC,
     128             :   GIFBS_HasCrypto,
     129             :   GIFBS_HasDotProd,
     130             :   GIFBS_HasFPARMv8,
     131             :   GIFBS_HasFullFP16,
     132             :   GIFBS_HasFuseAES,
     133             :   GIFBS_HasLSE,
     134             :   GIFBS_HasNEON,
     135             :   GIFBS_HasRDM,
     136             :   GIFBS_IsBE,
     137             :   GIFBS_IsLE,
     138             :   GIFBS_HasFullFP16_HasNEON,
     139             :   GIFBS_HasNEON_HasRDM,
     140             : };
     141             : const static PredicateBitset FeatureBitsets[] {
     142             :   {}, // GIFBS_Invalid
     143             :   {Feature_HasCRCBit, },
     144             :   {Feature_HasCryptoBit, },
     145             :   {Feature_HasDotProdBit, },
     146             :   {Feature_HasFPARMv8Bit, },
     147             :   {Feature_HasFullFP16Bit, },
     148             :   {Feature_HasFuseAESBit, },
     149             :   {Feature_HasLSEBit, },
     150             :   {Feature_HasNEONBit, },
     151             :   {Feature_HasRDMBit, },
     152             :   {Feature_IsBEBit, },
     153             :   {Feature_IsLEBit, },
     154             :   {Feature_HasFullFP16Bit, Feature_HasNEONBit, },
     155             :   {Feature_HasNEONBit, Feature_HasRDMBit, },
     156       99743 : };
     157             : 
     158             : // ComplexPattern predicates.
     159             : enum {
     160             :   GICP_Invalid,
     161             :   GICP_gi_addsub_shifted_imm32,
     162             :   GICP_gi_addsub_shifted_imm64,
     163             :   GICP_gi_am_indexed128,
     164             :   GICP_gi_am_indexed16,
     165             :   GICP_gi_am_indexed32,
     166             :   GICP_gi_am_indexed64,
     167             :   GICP_gi_am_indexed8,
     168             :   GICP_gi_am_unscaled128,
     169             :   GICP_gi_am_unscaled16,
     170             :   GICP_gi_am_unscaled32,
     171             :   GICP_gi_am_unscaled64,
     172             :   GICP_gi_am_unscaled8,
     173             : };
     174             : // See constructor for table contents
     175             : 
     176             : // PatFrag predicates.
     177             : enum {
     178             :   GIPFP_I64_Predicate_VectorIndex1 = GIPFP_I64_Invalid + 1,
     179             :   GIPFP_I64_Predicate_VectorIndexB,
     180             :   GIPFP_I64_Predicate_VectorIndexD,
     181             :   GIPFP_I64_Predicate_VectorIndexH,
     182             :   GIPFP_I64_Predicate_VectorIndexS,
     183             :   GIPFP_I64_Predicate_addsub_imm8_opt_lsl_i16,
     184             :   GIPFP_I64_Predicate_addsub_imm8_opt_lsl_i32,
     185             :   GIPFP_I64_Predicate_addsub_imm8_opt_lsl_i64,
     186             :   GIPFP_I64_Predicate_addsub_imm8_opt_lsl_i8,
     187             :   GIPFP_I64_Predicate_cpy_imm8_opt_lsl_i16,
     188             :   GIPFP_I64_Predicate_cpy_imm8_opt_lsl_i32,
     189             :   GIPFP_I64_Predicate_cpy_imm8_opt_lsl_i64,
     190             :   GIPFP_I64_Predicate_cpy_imm8_opt_lsl_i8,
     191             :   GIPFP_I64_Predicate_i64imm_32bit,
     192             :   GIPFP_I64_Predicate_imm0_1,
     193             :   GIPFP_I64_Predicate_imm0_127,
     194             :   GIPFP_I64_Predicate_imm0_15,
     195             :   GIPFP_I64_Predicate_imm0_255,
     196             :   GIPFP_I64_Predicate_imm0_31,
     197             :   GIPFP_I64_Predicate_imm0_63,
     198             :   GIPFP_I64_Predicate_imm0_65535,
     199             :   GIPFP_I64_Predicate_imm0_7,
     200             :   GIPFP_I64_Predicate_imm32_0_15,
     201             :   GIPFP_I64_Predicate_imm32_0_31,
     202             :   GIPFP_I64_Predicate_maski16_or_more,
     203             :   GIPFP_I64_Predicate_maski8_or_more,
     204             :   GIPFP_I64_Predicate_s64imm_32bit,
     205             :   GIPFP_I64_Predicate_simm4s1,
     206             :   GIPFP_I64_Predicate_simm4s16,
     207             :   GIPFP_I64_Predicate_simm4s2,
     208             :   GIPFP_I64_Predicate_simm4s3,
     209             :   GIPFP_I64_Predicate_simm4s4,
     210             :   GIPFP_I64_Predicate_simm5_32b,
     211             :   GIPFP_I64_Predicate_simm5_64b,
     212             :   GIPFP_I64_Predicate_simm6_32b,
     213             :   GIPFP_I64_Predicate_simm6s1,
     214             :   GIPFP_I64_Predicate_simm8,
     215             :   GIPFP_I64_Predicate_simm9,
     216             :   GIPFP_I64_Predicate_sve_elm_idx_extdup_b,
     217             :   GIPFP_I64_Predicate_sve_elm_idx_extdup_d,
     218             :   GIPFP_I64_Predicate_sve_elm_idx_extdup_h,
     219             :   GIPFP_I64_Predicate_sve_elm_idx_extdup_q,
     220             :   GIPFP_I64_Predicate_sve_elm_idx_extdup_s,
     221             :   GIPFP_I64_Predicate_sve_incdec_imm,
     222             :   GIPFP_I64_Predicate_sve_pred_enum,
     223             :   GIPFP_I64_Predicate_sve_prfop,
     224             :   GIPFP_I64_Predicate_tbz_imm0_31_diag,
     225             :   GIPFP_I64_Predicate_tbz_imm0_31_nodiag,
     226             :   GIPFP_I64_Predicate_tbz_imm32_63,
     227             :   GIPFP_I64_Predicate_uimm5s2,
     228             :   GIPFP_I64_Predicate_uimm5s4,
     229             :   GIPFP_I64_Predicate_uimm5s8,
     230             :   GIPFP_I64_Predicate_uimm6,
     231             :   GIPFP_I64_Predicate_uimm6s1,
     232             :   GIPFP_I64_Predicate_uimm6s2,
     233             :   GIPFP_I64_Predicate_uimm6s4,
     234             :   GIPFP_I64_Predicate_uimm6s8,
     235             :   GIPFP_I64_Predicate_vecshiftL16,
     236             :   GIPFP_I64_Predicate_vecshiftL32,
     237             :   GIPFP_I64_Predicate_vecshiftL64,
     238             :   GIPFP_I64_Predicate_vecshiftL8,
     239             :   GIPFP_I64_Predicate_vecshiftR16,
     240             :   GIPFP_I64_Predicate_vecshiftR16Narrow,
     241             :   GIPFP_I64_Predicate_vecshiftR32,
     242             :   GIPFP_I64_Predicate_vecshiftR32Narrow,
     243             :   GIPFP_I64_Predicate_vecshiftR64,
     244             :   GIPFP_I64_Predicate_vecshiftR64Narrow,
     245             :   GIPFP_I64_Predicate_vecshiftR8,
     246             : };
     247           5 : bool AArch64InstructionSelector::testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const {
     248           5 :   switch (PredicateID) {
     249           0 :   case GIPFP_I64_Predicate_VectorIndex1: {
     250           0 :      return ((uint64_t)Imm) == 1; 
     251             :     llvm_unreachable("ImmediateCode should have returned");
     252             :     return false;
     253             :   }
     254           0 :   case GIPFP_I64_Predicate_VectorIndexB: {
     255           0 :      return ((uint64_t)Imm) < 16; 
     256             :     llvm_unreachable("ImmediateCode should have returned");
     257             :     return false;
     258             :   }
     259           0 :   case GIPFP_I64_Predicate_VectorIndexD: {
     260           0 :      return ((uint64_t)Imm) < 2; 
     261             :     llvm_unreachable("ImmediateCode should have returned");
     262             :     return false;
     263             :   }
     264           0 :   case GIPFP_I64_Predicate_VectorIndexH: {
     265           0 :      return ((uint64_t)Imm) < 8; 
     266             :     llvm_unreachable("ImmediateCode should have returned");
     267             :     return false;
     268             :   }
     269           0 :   case GIPFP_I64_Predicate_VectorIndexS: {
     270           0 :      return ((uint64_t)Imm) < 4; 
     271             :     llvm_unreachable("ImmediateCode should have returned");
     272             :     return false;
     273             :   }
     274             :   case GIPFP_I64_Predicate_addsub_imm8_opt_lsl_i16: {
     275             :     
     276             :   return AArch64_AM::isSVEAddSubImm<int16_t>(Imm);
     277             : 
     278             :     llvm_unreachable("ImmediateCode should have returned");
     279             :     return false;
     280             :   }
     281             :   case GIPFP_I64_Predicate_addsub_imm8_opt_lsl_i32: {
     282             :     
     283             :   return AArch64_AM::isSVEAddSubImm<int32_t>(Imm);
     284             : 
     285             :     llvm_unreachable("ImmediateCode should have returned");
     286             :     return false;
     287             :   }
     288             :   case GIPFP_I64_Predicate_addsub_imm8_opt_lsl_i64: {
     289             :     
     290             :   return AArch64_AM::isSVEAddSubImm<int64_t>(Imm);
     291             : 
     292             :     llvm_unreachable("ImmediateCode should have returned");
     293             :     return false;
     294             :   }
     295             :   case GIPFP_I64_Predicate_addsub_imm8_opt_lsl_i8: {
     296             :     
     297             :   return AArch64_AM::isSVEAddSubImm<int8_t>(Imm);
     298             : 
     299             :     llvm_unreachable("ImmediateCode should have returned");
     300             :     return false;
     301             :   }
     302             :   case GIPFP_I64_Predicate_cpy_imm8_opt_lsl_i16: {
     303             :     
     304             :   return AArch64_AM::isSVECpyImm<int16_t>(Imm);
     305             : 
     306             :     llvm_unreachable("ImmediateCode should have returned");
     307             :     return false;
     308             :   }
     309             :   case GIPFP_I64_Predicate_cpy_imm8_opt_lsl_i32: {
     310             :     
     311           0 :   return AArch64_AM::isSVECpyImm<int32_t>(Imm);
     312             : 
     313             :     llvm_unreachable("ImmediateCode should have returned");
     314             :     return false;
     315             :   }
     316             :   case GIPFP_I64_Predicate_cpy_imm8_opt_lsl_i64: {
     317             :     
     318           0 :   return AArch64_AM::isSVECpyImm<int64_t>(Imm);
     319             : 
     320             :     llvm_unreachable("ImmediateCode should have returned");
     321             :     return false;
     322             :   }
     323             :   case GIPFP_I64_Predicate_cpy_imm8_opt_lsl_i8: {
     324             :     
     325             :   return AArch64_AM::isSVECpyImm<int8_t>(Imm);
     326             : 
     327             :     llvm_unreachable("ImmediateCode should have returned");
     328             :     return false;
     329             :   }
     330           0 :   case GIPFP_I64_Predicate_i64imm_32bit: {
     331             :     
     332           0 :   return (Imm & 0xffffffffULL) == static_cast<uint64_t>(Imm);
     333             : 
     334             :     llvm_unreachable("ImmediateCode should have returned");
     335             :     return false;
     336             :   }
     337           0 :   case GIPFP_I64_Predicate_imm0_1: {
     338             :     
     339           0 :   return ((uint64_t)Imm) < 2;
     340             : 
     341             :     llvm_unreachable("ImmediateCode should have returned");
     342             :     return false;
     343             :   }
     344           1 :   case GIPFP_I64_Predicate_imm0_127: {
     345             :     
     346           1 :   return ((uint32_t)Imm) < 128;
     347             : 
     348             :     llvm_unreachable("ImmediateCode should have returned");
     349             :     return false;
     350             :   }
     351           0 :   case GIPFP_I64_Predicate_imm0_15: {
     352             :     
     353           0 :   return ((uint64_t)Imm) < 16;
     354             : 
     355             :     llvm_unreachable("ImmediateCode should have returned");
     356             :     return false;
     357             :   }
     358           0 :   case GIPFP_I64_Predicate_imm0_255: {
     359             :     
     360           0 :   return ((uint32_t)Imm) < 256;
     361             : 
     362             :     llvm_unreachable("ImmediateCode should have returned");
     363             :     return false;
     364             :   }
     365           0 :   case GIPFP_I64_Predicate_imm0_31: {
     366             :     
     367           0 :   return ((uint64_t)Imm) < 32;
     368             : 
     369             :     llvm_unreachable("ImmediateCode should have returned");
     370             :     return false;
     371             :   }
     372           2 :   case GIPFP_I64_Predicate_imm0_63: {
     373             :     
     374           2 :   return ((uint64_t)Imm) < 64;
     375             : 
     376             :     llvm_unreachable("ImmediateCode should have returned");
     377             :     return false;
     378             :   }
     379           0 :   case GIPFP_I64_Predicate_imm0_65535: {
     380             :     
     381           0 :   return ((uint32_t)Imm) < 65536;
     382             : 
     383             :     llvm_unreachable("ImmediateCode should have returned");
     384             :     return false;
     385             :   }
     386           0 :   case GIPFP_I64_Predicate_imm0_7: {
     387             :     
     388           0 :   return ((uint64_t)Imm) < 8;
     389             : 
     390             :     llvm_unreachable("ImmediateCode should have returned");
     391             :     return false;
     392             :   }
     393           0 :   case GIPFP_I64_Predicate_imm32_0_15: {
     394             :     
     395           0 :   return ((uint32_t)Imm) < 16;
     396             : 
     397             :     llvm_unreachable("ImmediateCode should have returned");
     398             :     return false;
     399             :   }
     400           0 :   case GIPFP_I64_Predicate_imm32_0_31: {
     401             :     
     402           0 :   return ((uint64_t)Imm) < 32;
     403             : 
     404             :     llvm_unreachable("ImmediateCode should have returned");
     405             :     return false;
     406             :   }
     407           0 :   case GIPFP_I64_Predicate_maski16_or_more: {
     408           0 :      return (Imm & 0xffff) == 0xffff; 
     409             :     llvm_unreachable("ImmediateCode should have returned");
     410             :     return false;
     411             :   }
     412           0 :   case GIPFP_I64_Predicate_maski8_or_more: {
     413           0 :      return (Imm & 0xff) == 0xff; 
     414             :     llvm_unreachable("ImmediateCode should have returned");
     415             :     return false;
     416             :   }
     417           1 :   case GIPFP_I64_Predicate_s64imm_32bit: {
     418             :     
     419             :   int64_t Imm64 = static_cast<int64_t>(Imm);
     420           1 :   return Imm64 >= std::numeric_limits<int32_t>::min() &&
     421           1 :          Imm64 <= std::numeric_limits<int32_t>::max();
     422             : 
     423             :     llvm_unreachable("ImmediateCode should have returned");
     424             :     return false;
     425             :   }
     426           0 :   case GIPFP_I64_Predicate_simm4s1: {
     427           0 :      return Imm >=-8  && Imm <= 7; 
     428             :     llvm_unreachable("ImmediateCode should have returned");
     429             :     return false;
     430             :   }
     431           0 :   case GIPFP_I64_Predicate_simm4s16: {
     432           0 :      return Imm >=-128  && Imm <= 112 && (Imm % 16) == 0x0; 
     433             :     llvm_unreachable("ImmediateCode should have returned");
     434             :     return false;
     435             :   }
     436           0 :   case GIPFP_I64_Predicate_simm4s2: {
     437           0 :      return Imm >=-16  && Imm <= 14 && (Imm % 2) == 0x0; 
     438             :     llvm_unreachable("ImmediateCode should have returned");
     439             :     return false;
     440             :   }
     441           0 :   case GIPFP_I64_Predicate_simm4s3: {
     442           0 :      return Imm >=-24  && Imm <= 21 && (Imm % 3) == 0x0; 
     443             :     llvm_unreachable("ImmediateCode should have returned");
     444             :     return false;
     445             :   }
     446           0 :   case GIPFP_I64_Predicate_simm4s4: {
     447           0 :      return Imm >=-32  && Imm <= 28 && (Imm % 4) == 0x0; 
     448             :     llvm_unreachable("ImmediateCode should have returned");
     449             :     return false;
     450             :   }
     451           0 :   case GIPFP_I64_Predicate_simm5_32b: {
     452           0 :      return Imm >= -16 && Imm < 16; 
     453             :     llvm_unreachable("ImmediateCode should have returned");
     454             :     return false;
     455             :   }
     456           0 :   case GIPFP_I64_Predicate_simm5_64b: {
     457           0 :      return Imm >= -16 && Imm < 16; 
     458             :     llvm_unreachable("ImmediateCode should have returned");
     459             :     return false;
     460             :   }
     461           0 :   case GIPFP_I64_Predicate_simm6_32b: {
     462           0 :      return Imm >= -32 && Imm < 32; 
     463             :     llvm_unreachable("ImmediateCode should have returned");
     464             :     return false;
     465             :   }
     466           0 :   case GIPFP_I64_Predicate_simm6s1: {
     467           0 :      return Imm >= -32 && Imm < 32; 
     468             :     llvm_unreachable("ImmediateCode should have returned");
     469             :     return false;
     470             :   }
     471           0 :   case GIPFP_I64_Predicate_simm8: {
     472           0 :      return Imm >= -128 && Imm < 127; 
     473             :     llvm_unreachable("ImmediateCode should have returned");
     474             :     return false;
     475             :   }
     476           0 :   case GIPFP_I64_Predicate_simm9: {
     477           0 :      return Imm >= -256 && Imm < 256; 
     478             :     llvm_unreachable("ImmediateCode should have returned");
     479             :     return false;
     480             :   }
     481           0 :   case GIPFP_I64_Predicate_sve_elm_idx_extdup_b: {
     482           0 :      return ((uint64_t)Imm) < 64; 
     483             :     llvm_unreachable("ImmediateCode should have returned");
     484             :     return false;
     485             :   }
     486           0 :   case GIPFP_I64_Predicate_sve_elm_idx_extdup_d: {
     487           0 :      return ((uint64_t)Imm) < 8; 
     488             :     llvm_unreachable("ImmediateCode should have returned");
     489             :     return false;
     490             :   }
     491           0 :   case GIPFP_I64_Predicate_sve_elm_idx_extdup_h: {
     492           0 :      return ((uint64_t)Imm) < 32; 
     493             :     llvm_unreachable("ImmediateCode should have returned");
     494             :     return false;
     495             :   }
     496           0 :   case GIPFP_I64_Predicate_sve_elm_idx_extdup_q: {
     497           0 :      return ((uint64_t)Imm) < 4; 
     498             :     llvm_unreachable("ImmediateCode should have returned");
     499             :     return false;
     500             :   }
     501           0 :   case GIPFP_I64_Predicate_sve_elm_idx_extdup_s: {
     502           0 :      return ((uint64_t)Imm) < 16; 
     503             :     llvm_unreachable("ImmediateCode should have returned");
     504             :     return false;
     505             :   }
     506           0 :   case GIPFP_I64_Predicate_sve_incdec_imm: {
     507             :     
     508           0 :   return (((uint32_t)Imm) > 0) && (((uint32_t)Imm) < 17);
     509             : 
     510             :     llvm_unreachable("ImmediateCode should have returned");
     511             :     return false;
     512             :   }
     513           0 :   case GIPFP_I64_Predicate_sve_pred_enum: {
     514             :     
     515           0 :   return (((uint32_t)Imm) < 32);
     516             :   
     517             :     llvm_unreachable("ImmediateCode should have returned");
     518             :     return false;
     519             :   }
     520           0 :   case GIPFP_I64_Predicate_sve_prfop: {
     521             :     
     522           0 :     return (((uint32_t)Imm) <= 15);
     523             :   
     524             :     llvm_unreachable("ImmediateCode should have returned");
     525             :     return false;
     526             :   }
     527           0 :   case GIPFP_I64_Predicate_tbz_imm0_31_diag: {
     528             :     
     529           0 :   return (((uint32_t)Imm) < 32);
     530             : 
     531             :     llvm_unreachable("ImmediateCode should have returned");
     532             :     return false;
     533             :   }
     534           0 :   case GIPFP_I64_Predicate_tbz_imm0_31_nodiag: {
     535             :     
     536           0 :   return (((uint32_t)Imm) < 32);
     537             : 
     538             :     llvm_unreachable("ImmediateCode should have returned");
     539             :     return false;
     540             :   }
     541           0 :   case GIPFP_I64_Predicate_tbz_imm32_63: {
     542             :     
     543           0 :   return (((uint32_t)Imm) > 31) && (((uint32_t)Imm) < 64);
     544             : 
     545             :     llvm_unreachable("ImmediateCode should have returned");
     546             :     return false;
     547             :   }
     548           0 :   case GIPFP_I64_Predicate_uimm5s2: {
     549           0 :      return Imm >= 0 && Imm < (32*2) && ((Imm % 2) == 0); 
     550             :     llvm_unreachable("ImmediateCode should have returned");
     551             :     return false;
     552             :   }
     553           0 :   case GIPFP_I64_Predicate_uimm5s4: {
     554           0 :      return Imm >= 0 && Imm < (32*4) && ((Imm % 4) == 0); 
     555             :     llvm_unreachable("ImmediateCode should have returned");
     556             :     return false;
     557             :   }
     558           0 :   case GIPFP_I64_Predicate_uimm5s8: {
     559           0 :      return Imm >= 0 && Imm < (32*8) && ((Imm % 8) == 0); 
     560             :     llvm_unreachable("ImmediateCode should have returned");
     561             :     return false;
     562             :   }
     563           0 :   case GIPFP_I64_Predicate_uimm6: {
     564           0 :      return Imm >= 0 && Imm < 64; 
     565             :     llvm_unreachable("ImmediateCode should have returned");
     566             :     return false;
     567             :   }
     568           0 :   case GIPFP_I64_Predicate_uimm6s1: {
     569           0 :      return Imm >= 0 && Imm < 64; 
     570             :     llvm_unreachable("ImmediateCode should have returned");
     571             :     return false;
     572             :   }
     573           0 :   case GIPFP_I64_Predicate_uimm6s2: {
     574           0 :      return Imm >= 0 && Imm < (64*2) && ((Imm % 2) == 0); 
     575             :     llvm_unreachable("ImmediateCode should have returned");
     576             :     return false;
     577             :   }
     578           0 :   case GIPFP_I64_Predicate_uimm6s4: {
     579           0 :      return Imm >= 0 && Imm < (64*4) && ((Imm % 4) == 0); 
     580             :     llvm_unreachable("ImmediateCode should have returned");
     581             :     return false;
     582             :   }
     583           0 :   case GIPFP_I64_Predicate_uimm6s8: {
     584           0 :      return Imm >= 0 && Imm < (64*8) && ((Imm % 8) == 0); 
     585             :     llvm_unreachable("ImmediateCode should have returned");
     586             :     return false;
     587             :   }
     588           0 :   case GIPFP_I64_Predicate_vecshiftL16: {
     589             :     
     590           0 :   return (((uint32_t)Imm) < 16);
     591             : 
     592             :     llvm_unreachable("ImmediateCode should have returned");
     593             :     return false;
     594             :   }
     595           0 :   case GIPFP_I64_Predicate_vecshiftL32: {
     596             :     
     597           0 :   return (((uint32_t)Imm) < 32);
     598             : 
     599             :     llvm_unreachable("ImmediateCode should have returned");
     600             :     return false;
     601             :   }
     602           0 :   case GIPFP_I64_Predicate_vecshiftL64: {
     603             :     
     604           0 :   return (((uint32_t)Imm) < 64);
     605             : 
     606             :     llvm_unreachable("ImmediateCode should have returned");
     607             :     return false;
     608             :   }
     609           0 :   case GIPFP_I64_Predicate_vecshiftL8: {
     610             :     
     611           0 :   return (((uint32_t)Imm) < 8);
     612             : 
     613             :     llvm_unreachable("ImmediateCode should have returned");
     614             :     return false;
     615             :   }
     616           0 :   case GIPFP_I64_Predicate_vecshiftR16: {
     617             :     
     618           0 :   return (((uint32_t)Imm) > 0) && (((uint32_t)Imm) < 17);
     619             : 
     620             :     llvm_unreachable("ImmediateCode should have returned");
     621             :     return false;
     622             :   }
     623           0 :   case GIPFP_I64_Predicate_vecshiftR16Narrow: {
     624             :     
     625           0 :   return (((uint32_t)Imm) > 0) && (((uint32_t)Imm) < 9);
     626             : 
     627             :     llvm_unreachable("ImmediateCode should have returned");
     628             :     return false;
     629             :   }
     630           0 :   case GIPFP_I64_Predicate_vecshiftR32: {
     631             :     
     632           0 :   return (((uint32_t)Imm) > 0) && (((uint32_t)Imm) < 33);
     633             : 
     634             :     llvm_unreachable("ImmediateCode should have returned");
     635             :     return false;
     636             :   }
     637           0 :   case GIPFP_I64_Predicate_vecshiftR32Narrow: {
     638             :     
     639           0 :   return (((uint32_t)Imm) > 0) && (((uint32_t)Imm) < 17);
     640             : 
     641             :     llvm_unreachable("ImmediateCode should have returned");
     642             :     return false;
     643             :   }
     644           1 :   case GIPFP_I64_Predicate_vecshiftR64: {
     645             :     
     646           1 :   return (((uint32_t)Imm) > 0) && (((uint32_t)Imm) < 65);
     647             : 
     648             :     llvm_unreachable("ImmediateCode should have returned");
     649             :     return false;
     650             :   }
     651           0 :   case GIPFP_I64_Predicate_vecshiftR64Narrow: {
     652             :     
     653           0 :   return (((uint32_t)Imm) > 0) && (((uint32_t)Imm) < 33);
     654             : 
     655             :     llvm_unreachable("ImmediateCode should have returned");
     656             :     return false;
     657             :   }
     658           0 :   case GIPFP_I64_Predicate_vecshiftR8: {
     659             :     
     660           0 :   return (((uint32_t)Imm) > 0) && (((uint32_t)Imm) < 9);
     661             : 
     662             :     llvm_unreachable("ImmediateCode should have returned");
     663             :     return false;
     664             :   }
     665             :   }
     666           0 :   llvm_unreachable("Unknown predicate");
     667             :   return false;
     668             : }
     669             : // PatFrag predicates.
     670             : enum {
     671             :   GIPFP_APFloat_Predicate_fpimm0 = GIPFP_APFloat_Invalid + 1,
     672             :   GIPFP_APFloat_Predicate_fpimm16,
     673             :   GIPFP_APFloat_Predicate_fpimm32,
     674             :   GIPFP_APFloat_Predicate_fpimm64,
     675             :   GIPFP_APFloat_Predicate_simdimmtype10,
     676             : };
     677          30 : bool AArch64InstructionSelector::testImmPredicate_APFloat(unsigned PredicateID, const APFloat & Imm) const {
     678          30 :   switch (PredicateID) {
     679          30 :   case GIPFP_APFloat_Predicate_fpimm0: {
     680             :     
     681          30 :   return Imm.isExactlyValue(+0.0);
     682             : 
     683             :     llvm_unreachable("ImmediateCode should have returned");
     684             :     return false;
     685             :   }
     686           0 :   case GIPFP_APFloat_Predicate_fpimm16: {
     687             :     
     688           0 :       return AArch64_AM::getFP16Imm(Imm) != -1;
     689             :     
     690             :     llvm_unreachable("ImmediateCode should have returned");
     691             :     return false;
     692             :   }
     693           0 :   case GIPFP_APFloat_Predicate_fpimm32: {
     694             :     
     695           0 :       return AArch64_AM::getFP32Imm(Imm) != -1;
     696             :     
     697             :     llvm_unreachable("ImmediateCode should have returned");
     698             :     return false;
     699             :   }
     700           0 :   case GIPFP_APFloat_Predicate_fpimm64: {
     701             :     
     702           0 :       return AArch64_AM::getFP64Imm(Imm) != -1;
     703             :     
     704             :     llvm_unreachable("ImmediateCode should have returned");
     705             :     return false;
     706             :   }
     707           0 :   case GIPFP_APFloat_Predicate_simdimmtype10: {
     708             :     
     709             :       return AArch64_AM::isAdvSIMDModImmType10(
     710           0 :                  Imm.bitcastToAPInt().getZExtValue());
     711             :     
     712             :     llvm_unreachable("ImmediateCode should have returned");
     713             :     return false;
     714             :   }
     715             :   }
     716           0 :   llvm_unreachable("Unknown predicate");
     717             :   return false;
     718             : }
     719             : // PatFrag predicates.
     720             : enum {
     721             :   GIPFP_APInt_Predicate_logical_imm32 = GIPFP_APInt_Invalid + 1,
     722             :   GIPFP_APInt_Predicate_logical_imm64,
     723             : };
     724           0 : bool AArch64InstructionSelector::testImmPredicate_APInt(unsigned PredicateID, const APInt & Imm) const {
     725           0 :   switch (PredicateID) {
     726             :   case GIPFP_APInt_Predicate_logical_imm32: {
     727             :     
     728           0 :   return AArch64_AM::isLogicalImmediate(Imm.getZExtValue(), 32);
     729             : 
     730             :     llvm_unreachable("ImmediateCode should have returned");
     731             :     return false;
     732             :   }
     733             :   case GIPFP_APInt_Predicate_logical_imm64: {
     734             :     
     735           0 :   return AArch64_AM::isLogicalImmediate(Imm.getZExtValue(), 64);
     736             : 
     737             :     llvm_unreachable("ImmediateCode should have returned");
     738             :     return false;
     739             :   }
     740             :   }
     741           0 :   llvm_unreachable("Unknown predicate");
     742             :   return false;
     743             : }
     744           0 : bool AArch64InstructionSelector::testMIPredicate_MI(unsigned PredicateID, const MachineInstr & MI) const {
     745             :   const MachineFunction &MF = *MI.getParent()->getParent();
     746             :   const MachineRegisterInfo &MRI = MF.getRegInfo();
     747             :   (void)MRI;
     748           0 :   llvm_unreachable("Unknown predicate");
     749             :   return false;
     750             : }
     751             : 
     752             : AArch64InstructionSelector::ComplexMatcherMemFn
     753             : AArch64InstructionSelector::ComplexPredicateFns[] = {
     754             :   nullptr, // GICP_Invalid
     755             :   &AArch64InstructionSelector::selectArithImmed, // gi_addsub_shifted_imm32
     756             :   &AArch64InstructionSelector::selectArithImmed, // gi_addsub_shifted_imm64
     757             :   &AArch64InstructionSelector::selectAddrModeIndexed<128>, // gi_am_indexed128
     758             :   &AArch64InstructionSelector::selectAddrModeIndexed<16>, // gi_am_indexed16
     759             :   &AArch64InstructionSelector::selectAddrModeIndexed<32>, // gi_am_indexed32
     760             :   &AArch64InstructionSelector::selectAddrModeIndexed<64>, // gi_am_indexed64
     761             :   &AArch64InstructionSelector::selectAddrModeIndexed<8>, // gi_am_indexed8
     762             :   &AArch64InstructionSelector::selectAddrModeUnscaled128, // gi_am_unscaled128
     763             :   &AArch64InstructionSelector::selectAddrModeUnscaled16, // gi_am_unscaled16
     764             :   &AArch64InstructionSelector::selectAddrModeUnscaled32, // gi_am_unscaled32
     765             :   &AArch64InstructionSelector::selectAddrModeUnscaled64, // gi_am_unscaled64
     766             :   &AArch64InstructionSelector::selectAddrModeUnscaled8, // gi_am_unscaled8
     767             : };
     768             : 
     769             : // Custom renderers.
     770             : enum {
     771             :   GICR_Invalid,
     772             :   GICR_renderTruncImm, 
     773             : };
     774             : AArch64InstructionSelector::CustomRendererFn
     775             : AArch64InstructionSelector::CustomRenderers[] = {
     776             :   nullptr, // GICP_Invalid
     777             :   &AArch64InstructionSelector::renderTruncImm, // gi_trunc_imm
     778             : };
     779             : 
     780         803 : bool AArch64InstructionSelector::selectImpl(MachineInstr &I, CodeGenCoverage &CoverageInfo) const {
     781         803 :   MachineFunction &MF = *I.getParent()->getParent();
     782         803 :   MachineRegisterInfo &MRI = MF.getRegInfo();
     783             :   // FIXME: This should be computed on a per-function basis rather than per-insn.
     784         803 :   AvailableFunctionFeatures = computeAvailableFunctionFeatures(&STI, &MF);
     785         803 :   const PredicateBitset AvailableFeatures = getAvailableFeatures();
     786             :   NewMIVector OutMIs;
     787             :   State.MIs.clear();
     788         803 :   State.MIs.push_back(&I);
     789             : 
     790         803 :   if (executeMatchTable(*this, OutMIs, State, ISelInfo, getMatchTable(), TII, MRI, TRI, RBI, AvailableFeatures, CoverageInfo)) {
     791             :     return true;
     792             :   }
     793             : 
     794         304 :   return false;
     795             : }
     796             : 
     797           0 : const int64_t *AArch64InstructionSelector::getMatchTable() const {
     798             :   constexpr static int64_t MatchTable0[] = {
     799             :     GIM_SwitchOpcode, /*MI*/0, /*[*/34, 124, /*)*//*default:*//*Label 49*/ 77510,
     800             :     /*TargetOpcode::G_ADD*//*Label 0*/ 95,
     801             :     /*TargetOpcode::G_SUB*//*Label 1*/ 7370,
     802             :     /*TargetOpcode::G_MUL*//*Label 2*/ 9951,
     803             :     /*TargetOpcode::G_SDIV*//*Label 3*/ 10732,
     804             :     /*TargetOpcode::G_UDIV*//*Label 4*/ 10801, 0, 0,
     805             :     /*TargetOpcode::G_AND*//*Label 5*/ 10870,
     806             :     /*TargetOpcode::G_OR*//*Label 6*/ 11412,
     807             :     /*TargetOpcode::G_XOR*//*Label 7*/ 11954, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
     808             :     /*TargetOpcode::G_BITCAST*//*Label 8*/ 12664,
     809             :     /*TargetOpcode::G_LOAD*//*Label 9*/ 20157,
     810             :     /*TargetOpcode::G_SEXTLOAD*//*Label 10*/ 22213,
     811             :     /*TargetOpcode::G_ZEXTLOAD*//*Label 11*/ 22684,
     812             :     /*TargetOpcode::G_STORE*//*Label 12*/ 23036, 0,
     813             :     /*TargetOpcode::G_ATOMIC_CMPXCHG*//*Label 13*/ 24935,
     814             :     /*TargetOpcode::G_ATOMICRMW_XCHG*//*Label 14*/ 26132,
     815             :     /*TargetOpcode::G_ATOMICRMW_ADD*//*Label 15*/ 27161,
     816             :     /*TargetOpcode::G_ATOMICRMW_SUB*//*Label 16*/ 28190,
     817             :     /*TargetOpcode::G_ATOMICRMW_AND*//*Label 17*/ 29599, 0,
     818             :     /*TargetOpcode::G_ATOMICRMW_OR*//*Label 18*/ 31008,
     819             :     /*TargetOpcode::G_ATOMICRMW_XOR*//*Label 19*/ 32037,
     820             :     /*TargetOpcode::G_ATOMICRMW_MAX*//*Label 20*/ 33066,
     821             :     /*TargetOpcode::G_ATOMICRMW_MIN*//*Label 21*/ 34095,
     822             :     /*TargetOpcode::G_ATOMICRMW_UMAX*//*Label 22*/ 35124,
     823             :     /*TargetOpcode::G_ATOMICRMW_UMIN*//*Label 23*/ 36153, 0, 0,
     824             :     /*TargetOpcode::G_INTRINSIC*//*Label 24*/ 37182,
     825             :     /*TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS*//*Label 25*/ 71113,
     826             :     /*TargetOpcode::G_ANYEXT*//*Label 26*/ 71293,
     827             :     /*TargetOpcode::G_TRUNC*//*Label 27*/ 71407,
     828             :     /*TargetOpcode::G_CONSTANT*//*Label 28*/ 71532,
     829             :     /*TargetOpcode::G_FCONSTANT*//*Label 29*/ 71585, 0, 0,
     830             :     /*TargetOpcode::G_SEXT*//*Label 30*/ 71663,
     831             :     /*TargetOpcode::G_ZEXT*//*Label 31*/ 71777,
     832             :     /*TargetOpcode::G_SHL*//*Label 32*/ 72236,
     833             :     /*TargetOpcode::G_LSHR*//*Label 33*/ 72412,
     834             :     /*TargetOpcode::G_ASHR*//*Label 34*/ 72663, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
     835             :     /*TargetOpcode::G_FADD*//*Label 35*/ 72914,
     836             :     /*TargetOpcode::G_FSUB*//*Label 36*/ 73187,
     837             :     /*TargetOpcode::G_FMUL*//*Label 37*/ 73460,
     838             :     /*TargetOpcode::G_FMA*//*Label 38*/ 73733,
     839             :     /*TargetOpcode::G_FDIV*//*Label 39*/ 75257, 0, 0, 0, 0, 0, 0,
     840             :     /*TargetOpcode::G_FNEG*//*Label 40*/ 75530,
     841             :     /*TargetOpcode::G_FPEXT*//*Label 41*/ 76078,
     842             :     /*TargetOpcode::G_FPTRUNC*//*Label 42*/ 76207,
     843             :     /*TargetOpcode::G_FPTOSI*//*Label 43*/ 76336,
     844             :     /*TargetOpcode::G_FPTOUI*//*Label 44*/ 76612,
     845             :     /*TargetOpcode::G_SITOFP*//*Label 45*/ 76888,
     846             :     /*TargetOpcode::G_UITOFP*//*Label 46*/ 77166, 0, 0, 0,
     847             :     /*TargetOpcode::G_BR*//*Label 47*/ 77444, 0, 0, 0,
     848             :     /*TargetOpcode::G_BSWAP*//*Label 48*/ 77457,
     849             :     // Label 0: @95
     850             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 11, /*)*//*default:*//*Label 59*/ 7369,
     851             :     /*GILLT_s32*//*Label 50*/ 111,
     852             :     /*GILLT_s64*//*Label 51*/ 212, 0,
     853             :     /*GILLT_v2s32*//*Label 52*/ 1284,
     854             :     /*GILLT_v2s64*//*Label 53*/ 1897,
     855             :     /*GILLT_v4s16*//*Label 54*/ 3000,
     856             :     /*GILLT_v4s32*//*Label 55*/ 3613,
     857             :     /*GILLT_v8s8*//*Label 56*/ 5086,
     858             :     /*GILLT_v8s16*//*Label 57*/ 5491,
     859             :     /*GILLT_v16s8*//*Label 58*/ 6964,
     860             :     // Label 50: @111
     861             :     GIM_Try, /*On fail goto*//*Label 60*/ 211,
     862             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
     863             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
     864             :       GIM_Try, /*On fail goto*//*Label 61*/ 155, // Rule ID 3774 //
     865             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32spRegClassID,
     866             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32spRegClassID,
     867             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_addsub_shifted_imm32,
     868             :         // (add:{ *:[i32] } addsub_shifted_imm32:{ *:[i32] }:$imm, GPR32sp:{ *:[i32] }:$Rn)  =>  (ADDWri:{ *:[i32] } GPR32sp:{ *:[i32] }:$Rn, addsub_shifted_imm32:{ *:[i32] }:$imm)
     869             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ADDWri,
     870             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
     871             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
     872             :         GIR_ComplexRenderer, /*InsnID*/0, /*RendererID*/0, // imm
     873             :         GIR_EraseFromParent, /*InsnID*/0,
     874             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     875             :         // GIR_Coverage, 3774,
     876             :         GIR_Done,
     877             :       // Label 61: @155
     878             :       GIM_Try, /*On fail goto*//*Label 62*/ 189, // Rule ID 33 //
     879             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32spRegClassID,
     880             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32spRegClassID,
     881             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/2, /*Renderer*/0, GICP_gi_addsub_shifted_imm32,
     882             :         // (add:{ *:[i32] } GPR32sp:{ *:[i32] }:$Rn, addsub_shifted_imm32:{ *:[i32] }:$imm)  =>  (ADDWri:{ *:[i32] } GPR32sp:{ *:[i32] }:$Rn, addsub_shifted_imm32:{ *:[i32] }:$imm)
     883             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ADDWri,
     884             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
     885             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
     886             :         GIR_ComplexRenderer, /*InsnID*/0, /*RendererID*/0, // imm
     887             :         GIR_EraseFromParent, /*InsnID*/0,
     888             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     889             :         // GIR_Coverage, 33,
     890             :         GIR_Done,
     891             :       // Label 62: @189
     892             :       GIM_Try, /*On fail goto*//*Label 63*/ 210, // Rule ID 35 //
     893             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
     894             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
     895             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
     896             :         // (add:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)  =>  (ADDWrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
     897             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ADDWrr,
     898             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     899             :         // GIR_Coverage, 35,
     900             :         GIR_Done,
     901             :       // Label 63: @210
     902             :       GIM_Reject,
     903             :     // Label 60: @211
     904             :     GIM_Reject,
     905             :     // Label 51: @212
     906             :     GIM_Try, /*On fail goto*//*Label 64*/ 1283,
     907             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
     908             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
     909             :       GIM_Try, /*On fail goto*//*Label 65*/ 256, // Rule ID 3775 //
     910             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64spRegClassID,
     911             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64spRegClassID,
     912             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_addsub_shifted_imm64,
     913             :         // (add:{ *:[i64] } addsub_shifted_imm64:{ *:[i64] }:$imm, GPR64sp:{ *:[i64] }:$Rn)  =>  (ADDXri:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, addsub_shifted_imm64:{ *:[i64] }:$imm)
     914             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ADDXri,
     915             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
     916             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
     917             :         GIR_ComplexRenderer, /*InsnID*/0, /*RendererID*/0, // imm
     918             :         GIR_EraseFromParent, /*InsnID*/0,
     919             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     920             :         // GIR_Coverage, 3775,
     921             :         GIR_Done,
     922             :       // Label 65: @256
     923             :       GIM_Try, /*On fail goto*//*Label 66*/ 352, // Rule ID 1885 //
     924             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
     925             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
     926             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
     927             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
     928             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
     929             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
     930             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
     931             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
     932             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
     933             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
     934             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_CONSTANT,
     935             :         GIM_CheckI64ImmPredicate, /*MI*/3, /*Predicate*/GIPFP_I64_Predicate_s64imm_32bit,
     936             :         // MIs[3] Operand 1
     937             :         // No operand predicates
     938             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
     939             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
     940             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
     941             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
     942             :         // (add:{ *:[i64] } (mul:{ *:[i64] } (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (imm:{ *:[i64] })<<P:Predicate_s64imm_32bit>>:$C), GPR64:{ *:[i64] }:$Ra)  =>  (SMADDLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, (MOVi32imm:{ *:[i32] } (trunc_imm:{ *:[i32] } (imm:{ *:[i64] }):$C)), GPR64:{ *:[i64] }:$Ra)
     943             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
     944             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::MOVi32imm,
     945             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
     946             :         GIR_CustomRenderer, /*InsnID*/1, /*OldInsnID*/3, /*Renderer*/GICR_renderTruncImm, // C
     947             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
     948             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMADDLrrr,
     949             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
     950             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
     951             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
     952             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Ra
     953             :         GIR_EraseFromParent, /*InsnID*/0,
     954             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     955             :         // GIR_Coverage, 1885,
     956             :         GIR_Done,
     957             :       // Label 66: @352
     958             :       GIM_Try, /*On fail goto*//*Label 67*/ 448, // Rule ID 1886 //
     959             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
     960             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
     961             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
     962             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
     963             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
     964             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
     965             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
     966             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
     967             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
     968             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
     969             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_CONSTANT,
     970             :         GIM_CheckI64ImmPredicate, /*MI*/3, /*Predicate*/GIPFP_I64_Predicate_i64imm_32bit,
     971             :         // MIs[3] Operand 1
     972             :         // No operand predicates
     973             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
     974             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
     975             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
     976             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
     977             :         // (add:{ *:[i64] } (mul:{ *:[i64] } (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (imm:{ *:[i64] })<<P:Predicate_i64imm_32bit>>:$C), GPR64:{ *:[i64] }:$Ra)  =>  (UMADDLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, (MOVi32imm:{ *:[i32] } (trunc_imm:{ *:[i32] } (imm:{ *:[i64] }):$C)), GPR64:{ *:[i64] }:$Ra)
     978             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
     979             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::MOVi32imm,
     980             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
     981             :         GIR_CustomRenderer, /*InsnID*/1, /*OldInsnID*/3, /*Renderer*/GICR_renderTruncImm, // C
     982             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
     983             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMADDLrrr,
     984             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
     985             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
     986             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
     987             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Ra
     988             :         GIR_EraseFromParent, /*InsnID*/0,
     989             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     990             :         // GIR_Coverage, 1886,
     991             :         GIR_Done,
     992             :       // Label 67: @448
     993             :       GIM_Try, /*On fail goto*//*Label 68*/ 482, // Rule ID 34 //
     994             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64spRegClassID,
     995             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
     996             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/2, /*Renderer*/0, GICP_gi_addsub_shifted_imm64,
     997             :         // (add:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, addsub_shifted_imm64:{ *:[i64] }:$imm)  =>  (ADDXri:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, addsub_shifted_imm64:{ *:[i64] }:$imm)
     998             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ADDXri,
     999             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1000             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    1001             :         GIR_ComplexRenderer, /*InsnID*/0, /*RendererID*/0, // imm
    1002             :         GIR_EraseFromParent, /*InsnID*/0,
    1003             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1004             :         // GIR_Coverage, 34,
    1005             :         GIR_Done,
    1006             :       // Label 68: @482
    1007             :       GIM_Try, /*On fail goto*//*Label 69*/ 578, // Rule ID 4026 //
    1008             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    1009             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    1010             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1011             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    1012             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    1013             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    1014             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    1015             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
    1016             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    1017             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    1018             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
    1019             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_CONSTANT,
    1020             :         GIM_CheckI64ImmPredicate, /*MI*/3, /*Predicate*/GIPFP_I64_Predicate_s64imm_32bit,
    1021             :         // MIs[3] Operand 1
    1022             :         // No operand predicates
    1023             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1024             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    1025             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
    1026             :         // (add:{ *:[i64] } GPR64:{ *:[i64] }:$Ra, (mul:{ *:[i64] } (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (imm:{ *:[i64] })<<P:Predicate_s64imm_32bit>>:$C))  =>  (SMADDLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, (MOVi32imm:{ *:[i32] } (trunc_imm:{ *:[i32] } (imm:{ *:[i64] }):$C)), GPR64:{ *:[i64] }:$Ra)
    1027             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
    1028             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::MOVi32imm,
    1029             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    1030             :         GIR_CustomRenderer, /*InsnID*/1, /*OldInsnID*/3, /*Renderer*/GICR_renderTruncImm, // C
    1031             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    1032             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMADDLrrr,
    1033             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1034             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    1035             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    1036             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Ra
    1037             :         GIR_EraseFromParent, /*InsnID*/0,
    1038             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1039             :         // GIR_Coverage, 4026,
    1040             :         GIR_Done,
    1041             :       // Label 69: @578
    1042             :       GIM_Try, /*On fail goto*//*Label 70*/ 674, // Rule ID 4027 //
    1043             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    1044             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    1045             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1046             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    1047             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    1048             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    1049             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    1050             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
    1051             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    1052             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    1053             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
    1054             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_CONSTANT,
    1055             :         GIM_CheckI64ImmPredicate, /*MI*/3, /*Predicate*/GIPFP_I64_Predicate_i64imm_32bit,
    1056             :         // MIs[3] Operand 1
    1057             :         // No operand predicates
    1058             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1059             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    1060             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
    1061             :         // (add:{ *:[i64] } GPR64:{ *:[i64] }:$Ra, (mul:{ *:[i64] } (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (imm:{ *:[i64] })<<P:Predicate_i64imm_32bit>>:$C))  =>  (UMADDLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, (MOVi32imm:{ *:[i32] } (trunc_imm:{ *:[i32] } (imm:{ *:[i64] }):$C)), GPR64:{ *:[i64] }:$Ra)
    1062             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
    1063             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::MOVi32imm,
    1064             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    1065             :         GIR_CustomRenderer, /*InsnID*/1, /*OldInsnID*/3, /*Renderer*/GICR_renderTruncImm, // C
    1066             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    1067             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMADDLrrr,
    1068             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1069             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    1070             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    1071             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Ra
    1072             :         GIR_EraseFromParent, /*InsnID*/0,
    1073             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1074             :         // GIR_Coverage, 4027,
    1075             :         GIR_Done,
    1076             :       // Label 70: @674
    1077             :       GIM_Try, /*On fail goto*//*Label 71*/ 759, // Rule ID 3786 //
    1078             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    1079             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1080             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    1081             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    1082             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    1083             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    1084             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
    1085             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    1086             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    1087             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
    1088             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_SEXT,
    1089             :         GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_s32,
    1090             :         GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    1091             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    1092             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1093             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    1094             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
    1095             :         // (add:{ *:[i64] } (mul:{ *:[i64] } (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rm)), GPR64:{ *:[i64] }:$Ra)  =>  (SMADDLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm, GPR64:{ *:[i64] }:$Ra)
    1096             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMADDLrrr,
    1097             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1098             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    1099             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // Rm
    1100             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Ra
    1101             :         GIR_EraseFromParent, /*InsnID*/0,
    1102             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1103             :         // GIR_Coverage, 3786,
    1104             :         GIR_Done,
    1105             :       // Label 71: @759
    1106             :       GIM_Try, /*On fail goto*//*Label 72*/ 844, // Rule ID 3787 //
    1107             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    1108             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1109             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    1110             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    1111             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    1112             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    1113             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
    1114             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    1115             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    1116             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
    1117             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_ZEXT,
    1118             :         GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_s32,
    1119             :         GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    1120             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    1121             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1122             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    1123             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
    1124             :         // (add:{ *:[i64] } (mul:{ *:[i64] } (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rm)), GPR64:{ *:[i64] }:$Ra)  =>  (UMADDLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm, GPR64:{ *:[i64] }:$Ra)
    1125             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMADDLrrr,
    1126             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1127             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    1128             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // Rm
    1129             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Ra
    1130             :         GIR_EraseFromParent, /*InsnID*/0,
    1131             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1132             :         // GIR_Coverage, 3787,
    1133             :         GIR_Done,
    1134             :       // Label 72: @844
    1135             :       GIM_Try, /*On fail goto*//*Label 73*/ 929, // Rule ID 65 //
    1136             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    1137             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    1138             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1139             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    1140             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    1141             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    1142             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    1143             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
    1144             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    1145             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    1146             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
    1147             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_SEXT,
    1148             :         GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_s32,
    1149             :         GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    1150             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1151             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    1152             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
    1153             :         // (add:{ *:[i64] } GPR64:{ *:[i64] }:$Ra, (mul:{ *:[i64] } (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rm)))  =>  (SMADDLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm, GPR64:{ *:[i64] }:$Ra)
    1154             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMADDLrrr,
    1155             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1156             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    1157             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // Rm
    1158             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Ra
    1159             :         GIR_EraseFromParent, /*InsnID*/0,
    1160             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1161             :         // GIR_Coverage, 65,
    1162             :         GIR_Done,
    1163             :       // Label 73: @929
    1164             :       GIM_Try, /*On fail goto*//*Label 74*/ 1014, // Rule ID 67 //
    1165             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    1166             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    1167             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1168             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    1169             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    1170             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    1171             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    1172             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
    1173             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    1174             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    1175             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
    1176             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_ZEXT,
    1177             :         GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_s32,
    1178             :         GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    1179             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1180             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    1181             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
    1182             :         // (add:{ *:[i64] } GPR64:{ *:[i64] }:$Ra, (mul:{ *:[i64] } (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rm)))  =>  (UMADDLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm, GPR64:{ *:[i64] }:$Ra)
    1183             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMADDLrrr,
    1184             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1185             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    1186             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // Rm
    1187             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Ra
    1188             :         GIR_EraseFromParent, /*InsnID*/0,
    1189             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1190             :         // GIR_Coverage, 67,
    1191             :         GIR_Done,
    1192             :       // Label 74: @1014
    1193             :       GIM_Try, /*On fail goto*//*Label 75*/ 1070, // Rule ID 3840 //
    1194             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1195             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    1196             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1197             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1198             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    1199             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_saddlp,
    1200             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    1201             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1202             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1203             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1204             :         // (add:{ *:[v1i64] } (intrinsic_wo_chain:{ *:[v1i64] } 269:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn), V64:{ *:[v1i64] }:$Rd)  =>  (SADALPv2i32_v1i64:{ *:[v1i64] } V64:{ *:[v1i64] }:$Rd, V64:{ *:[v2i32] }:$Rn)
    1205             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADALPv2i32_v1i64,
    1206             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1207             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1208             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1209             :         GIR_EraseFromParent, /*InsnID*/0,
    1210             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1211             :         // GIR_Coverage, 3840,
    1212             :         GIR_Done,
    1213             :       // Label 75: @1070
    1214             :       GIM_Try, /*On fail goto*//*Label 76*/ 1126, // Rule ID 3846 //
    1215             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1216             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    1217             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1218             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1219             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    1220             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uaddlp,
    1221             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    1222             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1223             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1224             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1225             :         // (add:{ *:[v1i64] } (intrinsic_wo_chain:{ *:[v1i64] } 327:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn), V64:{ *:[v1i64] }:$Rd)  =>  (UADALPv2i32_v1i64:{ *:[v1i64] } V64:{ *:[v1i64] }:$Rd, V64:{ *:[v2i32] }:$Rn)
    1226             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADALPv2i32_v1i64,
    1227             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1228             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1229             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1230             :         GIR_EraseFromParent, /*InsnID*/0,
    1231             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1232             :         // GIR_Coverage, 3846,
    1233             :         GIR_Done,
    1234             :       // Label 76: @1126
    1235             :       GIM_Try, /*On fail goto*//*Label 77*/ 1182, // Rule ID 686 //
    1236             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1237             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    1238             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1239             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1240             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1241             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    1242             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_saddlp,
    1243             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    1244             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1245             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1246             :         // (add:{ *:[v1i64] } V64:{ *:[v1i64] }:$Rd, (intrinsic_wo_chain:{ *:[v1i64] } 269:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn))  =>  (SADALPv2i32_v1i64:{ *:[v1i64] } V64:{ *:[v1i64] }:$Rd, V64:{ *:[v2i32] }:$Rn)
    1247             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADALPv2i32_v1i64,
    1248             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1249             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    1250             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1251             :         GIR_EraseFromParent, /*InsnID*/0,
    1252             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1253             :         // GIR_Coverage, 686,
    1254             :         GIR_Done,
    1255             :       // Label 77: @1182
    1256             :       GIM_Try, /*On fail goto*//*Label 78*/ 1238, // Rule ID 730 //
    1257             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1258             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    1259             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1260             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1261             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1262             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    1263             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uaddlp,
    1264             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    1265             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1266             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1267             :         // (add:{ *:[v1i64] } V64:{ *:[v1i64] }:$Rd, (intrinsic_wo_chain:{ *:[v1i64] } 327:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn))  =>  (UADALPv2i32_v1i64:{ *:[v1i64] } V64:{ *:[v1i64] }:$Rd, V64:{ *:[v2i32] }:$Rn)
    1268             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADALPv2i32_v1i64,
    1269             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1270             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    1271             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1272             :         GIR_EraseFromParent, /*InsnID*/0,
    1273             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1274             :         // GIR_Coverage, 730,
    1275             :         GIR_Done,
    1276             :       // Label 78: @1238
    1277             :       GIM_Try, /*On fail goto*//*Label 79*/ 1259, // Rule ID 36 //
    1278             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    1279             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    1280             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    1281             :         // (add:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)  =>  (ADDXrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
    1282             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ADDXrr,
    1283             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1284             :         // GIR_Coverage, 36,
    1285             :         GIR_Done,
    1286             :       // Label 79: @1259
    1287             :       GIM_Try, /*On fail goto*//*Label 80*/ 1282, // Rule ID 1185 //
    1288             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1289             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    1290             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1291             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1292             :         // (add:{ *:[v1i64] } FPR64:{ *:[v1i64] }:$Rn, FPR64:{ *:[v1i64] }:$Rm)  =>  (ADDv1i64:{ *:[v1i64] } FPR64:{ *:[v1i64] }:$Rn, FPR64:{ *:[v1i64] }:$Rm)
    1293             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ADDv1i64,
    1294             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1295             :         // GIR_Coverage, 1185,
    1296             :         GIR_Done,
    1297             :       // Label 80: @1282
    1298             :       GIM_Reject,
    1299             :     // Label 64: @1283
    1300             :     GIM_Reject,
    1301             :     // Label 52: @1284
    1302             :     GIM_Try, /*On fail goto*//*Label 81*/ 1896,
    1303             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    1304             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    1305             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    1306             :       GIM_Try, /*On fail goto*//*Label 82*/ 1362, // Rule ID 3858 //
    1307             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1308             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1309             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1310             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    1311             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    1312             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    1313             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s32,
    1314             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1315             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1316             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1317             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1318             :         // (add:{ *:[v2i32] } (intrinsic_wo_chain:{ *:[v2i32] } 268:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm), V64:{ *:[v2i32] }:$Rd)  =>  (SABAv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1319             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABAv2i32,
    1320             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1321             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1322             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1323             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    1324             :         GIR_EraseFromParent, /*InsnID*/0,
    1325             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1326             :         // GIR_Coverage, 3858,
    1327             :         GIR_Done,
    1328             :       // Label 82: @1362
    1329             :       GIM_Try, /*On fail goto*//*Label 83*/ 1426, // Rule ID 3864 //
    1330             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1331             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1332             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1333             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    1334             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    1335             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    1336             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s32,
    1337             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1338             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1339             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1340             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1341             :         // (add:{ *:[v2i32] } (intrinsic_wo_chain:{ *:[v2i32] } 326:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm), V64:{ *:[v2i32] }:$Rd)  =>  (UABAv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1342             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABAv2i32,
    1343             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1344             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1345             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1346             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    1347             :         GIR_EraseFromParent, /*InsnID*/0,
    1348             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1349             :         // GIR_Coverage, 3864,
    1350             :         GIR_Done,
    1351             :       // Label 83: @1426
    1352             :       GIM_Try, /*On fail goto*//*Label 84*/ 1478, // Rule ID 3838 //
    1353             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1354             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1355             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1356             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    1357             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_saddlp,
    1358             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    1359             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1360             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1361             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1362             :         // (add:{ *:[v2i32] } (intrinsic_wo_chain:{ *:[v2i32] } 269:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn), V64:{ *:[v2i32] }:$Rd)  =>  (SADALPv4i16_v2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, V64:{ *:[v4i16] }:$Rn)
    1363             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADALPv4i16_v2i32,
    1364             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1365             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1366             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1367             :         GIR_EraseFromParent, /*InsnID*/0,
    1368             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1369             :         // GIR_Coverage, 3838,
    1370             :         GIR_Done,
    1371             :       // Label 84: @1478
    1372             :       GIM_Try, /*On fail goto*//*Label 85*/ 1530, // Rule ID 3844 //
    1373             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1374             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1375             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1376             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    1377             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uaddlp,
    1378             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    1379             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1380             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1381             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1382             :         // (add:{ *:[v2i32] } (intrinsic_wo_chain:{ *:[v2i32] } 327:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn), V64:{ *:[v2i32] }:$Rd)  =>  (UADALPv4i16_v2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, V64:{ *:[v4i16] }:$Rn)
    1383             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADALPv4i16_v2i32,
    1384             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1385             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1386             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1387             :         GIR_EraseFromParent, /*InsnID*/0,
    1388             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1389             :         // GIR_Coverage, 3844,
    1390             :         GIR_Done,
    1391             :       // Label 85: @1530
    1392             :       GIM_Try, /*On fail goto*//*Label 86*/ 1594, // Rule ID 960 //
    1393             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1394             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1395             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1396             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1397             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    1398             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    1399             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    1400             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s32,
    1401             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1402             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1403             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1404             :         // (add:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, (intrinsic_wo_chain:{ *:[v2i32] } 268:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm))  =>  (SABAv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1405             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABAv2i32,
    1406             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1407             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    1408             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1409             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    1410             :         GIR_EraseFromParent, /*InsnID*/0,
    1411             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1412             :         // GIR_Coverage, 960,
    1413             :         GIR_Done,
    1414             :       // Label 86: @1594
    1415             :       GIM_Try, /*On fail goto*//*Label 87*/ 1658, // Rule ID 1071 //
    1416             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1417             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1418             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1419             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1420             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    1421             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    1422             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    1423             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s32,
    1424             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1425             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1426             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1427             :         // (add:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, (intrinsic_wo_chain:{ *:[v2i32] } 326:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm))  =>  (UABAv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1428             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABAv2i32,
    1429             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1430             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    1431             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1432             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    1433             :         GIR_EraseFromParent, /*InsnID*/0,
    1434             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1435             :         // GIR_Coverage, 1071,
    1436             :         GIR_Done,
    1437             :       // Label 87: @1658
    1438             :       GIM_Try, /*On fail goto*//*Label 88*/ 1710, // Rule ID 684 //
    1439             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1440             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1441             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1442             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1443             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    1444             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_saddlp,
    1445             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    1446             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1447             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1448             :         // (add:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, (intrinsic_wo_chain:{ *:[v2i32] } 269:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn))  =>  (SADALPv4i16_v2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, V64:{ *:[v4i16] }:$Rn)
    1449             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADALPv4i16_v2i32,
    1450             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1451             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    1452             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1453             :         GIR_EraseFromParent, /*InsnID*/0,
    1454             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1455             :         // GIR_Coverage, 684,
    1456             :         GIR_Done,
    1457             :       // Label 88: @1710
    1458             :       GIM_Try, /*On fail goto*//*Label 89*/ 1762, // Rule ID 728 //
    1459             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1460             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1461             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1462             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1463             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    1464             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uaddlp,
    1465             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    1466             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1467             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1468             :         // (add:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, (intrinsic_wo_chain:{ *:[v2i32] } 327:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn))  =>  (UADALPv4i16_v2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, V64:{ *:[v4i16] }:$Rn)
    1469             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADALPv4i16_v2i32,
    1470             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1471             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    1472             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1473             :         GIR_EraseFromParent, /*InsnID*/0,
    1474             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1475             :         // GIR_Coverage, 728,
    1476             :         GIR_Done,
    1477             :       // Label 89: @1762
    1478             :       GIM_Try, /*On fail goto*//*Label 90*/ 1819, // Rule ID 3852 //
    1479             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1480             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1481             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    1482             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    1483             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    1484             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1485             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1486             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1487             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1488             :         // (add:{ *:[v2i32] } (mul:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm), V64:{ *:[v2i32] }:$Rd)  =>  (MLAv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1489             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLAv2i32,
    1490             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1491             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1492             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    1493             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    1494             :         GIR_EraseFromParent, /*InsnID*/0,
    1495             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1496             :         // GIR_Coverage, 3852,
    1497             :         GIR_Done,
    1498             :       // Label 90: @1819
    1499             :       GIM_Try, /*On fail goto*//*Label 91*/ 1876, // Rule ID 940 //
    1500             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1501             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1502             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1503             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    1504             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    1505             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    1506             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1507             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1508             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1509             :         // (add:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, (mul:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm))  =>  (MLAv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1510             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLAv2i32,
    1511             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1512             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    1513             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    1514             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    1515             :         GIR_EraseFromParent, /*InsnID*/0,
    1516             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1517             :         // GIR_Coverage, 940,
    1518             :         GIR_Done,
    1519             :       // Label 91: @1876
    1520             :       GIM_Try, /*On fail goto*//*Label 92*/ 1895, // Rule ID 764 //
    1521             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1522             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1523             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1524             :         // (add:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)  =>  (ADDv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1525             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ADDv2i32,
    1526             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1527             :         // GIR_Coverage, 764,
    1528             :         GIR_Done,
    1529             :       // Label 92: @1895
    1530             :       GIM_Reject,
    1531             :     // Label 81: @1896
    1532             :     GIM_Reject,
    1533             :     // Label 53: @1897
    1534             :     GIM_Try, /*On fail goto*//*Label 93*/ 2999,
    1535             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    1536             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    1537             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    1538             :       GIM_Try, /*On fail goto*//*Label 94*/ 1988, // Rule ID 3912 //
    1539             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1540             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1541             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    1542             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    1543             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    1544             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_INTRINSIC,
    1545             :         GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
    1546             :         GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    1547             :         GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s32,
    1548             :         GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v2s32,
    1549             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1550             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1551             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1552             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1553             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    1554             :         // (add:{ *:[v2i64] } (zext:{ *:[v2i64] } (intrinsic_wo_chain:{ *:[v2i32] } 268:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)), V128:{ *:[v2i64] }:$Rd)  =>  (SABALv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1555             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABALv2i32_v2i64,
    1556             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1557             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1558             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // Rn
    1559             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // Rm
    1560             :         GIR_EraseFromParent, /*InsnID*/0,
    1561             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1562             :         // GIR_Coverage, 3912,
    1563             :         GIR_Done,
    1564             :       // Label 94: @1988
    1565             :       GIM_Try, /*On fail goto*//*Label 95*/ 2065, // Rule ID 3930 //
    1566             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1567             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1568             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    1569             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    1570             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    1571             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_INTRINSIC,
    1572             :         GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
    1573             :         GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    1574             :         GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s32,
    1575             :         GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v2s32,
    1576             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1577             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1578             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1579             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1580             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    1581             :         // (add:{ *:[v2i64] } (zext:{ *:[v2i64] } (intrinsic_wo_chain:{ *:[v2i32] } 326:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)), V128:{ *:[v2i64] }:$Rd)  =>  (UABALv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1582             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABALv2i32_v2i64,
    1583             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1584             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1585             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // Rn
    1586             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // Rm
    1587             :         GIR_EraseFromParent, /*InsnID*/0,
    1588             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1589             :         // GIR_Coverage, 3930,
    1590             :         GIR_Done,
    1591             :       // Label 95: @2065
    1592             :       GIM_Try, /*On fail goto*//*Label 96*/ 2142, // Rule ID 1267 //
    1593             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1594             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    1595             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1596             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    1597             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    1598             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    1599             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_INTRINSIC,
    1600             :         GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
    1601             :         GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    1602             :         GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s32,
    1603             :         GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v2s32,
    1604             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1605             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1606             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1607             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    1608             :         // (add:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, (zext:{ *:[v2i64] } (intrinsic_wo_chain:{ *:[v2i32] } 268:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)))  =>  (SABALv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1609             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABALv2i32_v2i64,
    1610             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1611             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    1612             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // Rn
    1613             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // Rm
    1614             :         GIR_EraseFromParent, /*InsnID*/0,
    1615             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1616             :         // GIR_Coverage, 1267,
    1617             :         GIR_Done,
    1618             :       // Label 96: @2142
    1619             :       GIM_Try, /*On fail goto*//*Label 97*/ 2219, // Rule ID 1333 //
    1620             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1621             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    1622             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1623             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    1624             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    1625             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    1626             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_INTRINSIC,
    1627             :         GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
    1628             :         GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    1629             :         GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s32,
    1630             :         GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v2s32,
    1631             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1632             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1633             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1634             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    1635             :         // (add:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, (zext:{ *:[v2i64] } (intrinsic_wo_chain:{ *:[v2i32] } 326:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)))  =>  (UABALv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1636             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABALv2i32_v2i64,
    1637             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1638             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    1639             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // Rn
    1640             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // Rm
    1641             :         GIR_EraseFromParent, /*InsnID*/0,
    1642             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1643             :         // GIR_Coverage, 1333,
    1644             :         GIR_Done,
    1645             :       // Label 97: @2219
    1646             :       GIM_Try, /*On fail goto*//*Label 98*/ 2283, // Rule ID 3924 //
    1647             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1648             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1649             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1650             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    1651             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_smull,
    1652             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    1653             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s32,
    1654             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1655             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1656             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1657             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1658             :         // (add:{ *:[v2i64] } (intrinsic_wo_chain:{ *:[v2i64] } 285:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm), V128:{ *:[v2i64] }:$Rd)  =>  (SMLALv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1659             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMLALv2i32_v2i64,
    1660             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1661             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1662             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1663             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    1664             :         GIR_EraseFromParent, /*InsnID*/0,
    1665             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1666             :         // GIR_Coverage, 3924,
    1667             :         GIR_Done,
    1668             :       // Label 98: @2283
    1669             :       GIM_Try, /*On fail goto*//*Label 99*/ 2347, // Rule ID 3942 //
    1670             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1671             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1672             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1673             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    1674             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_umull,
    1675             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    1676             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s32,
    1677             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1678             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1679             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1680             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1681             :         // (add:{ *:[v2i64] } (intrinsic_wo_chain:{ *:[v2i64] } 339:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm), V128:{ *:[v2i64] }:$Rd)  =>  (UMLALv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1682             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMLALv2i32_v2i64,
    1683             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1684             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1685             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1686             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    1687             :         GIR_EraseFromParent, /*InsnID*/0,
    1688             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1689             :         // GIR_Coverage, 3942,
    1690             :         GIR_Done,
    1691             :       // Label 99: @2347
    1692             :       GIM_Try, /*On fail goto*//*Label 100*/ 2399, // Rule ID 3841 //
    1693             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1694             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1695             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1696             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    1697             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_saddlp,
    1698             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
    1699             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1700             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1701             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1702             :         // (add:{ *:[v2i64] } (intrinsic_wo_chain:{ *:[v2i64] } 269:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn), V128:{ *:[v2i64] }:$Rd)  =>  (SADALPv4i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V128:{ *:[v4i32] }:$Rn)
    1703             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADALPv4i32_v2i64,
    1704             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1705             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1706             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1707             :         GIR_EraseFromParent, /*InsnID*/0,
    1708             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1709             :         // GIR_Coverage, 3841,
    1710             :         GIR_Done,
    1711             :       // Label 100: @2399
    1712             :       GIM_Try, /*On fail goto*//*Label 101*/ 2451, // Rule ID 3847 //
    1713             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1714             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1715             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1716             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    1717             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uaddlp,
    1718             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
    1719             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1720             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1721             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1722             :         // (add:{ *:[v2i64] } (intrinsic_wo_chain:{ *:[v2i64] } 327:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn), V128:{ *:[v2i64] }:$Rd)  =>  (UADALPv4i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V128:{ *:[v4i32] }:$Rn)
    1723             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADALPv4i32_v2i64,
    1724             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1725             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1726             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1727             :         GIR_EraseFromParent, /*InsnID*/0,
    1728             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1729             :         // GIR_Coverage, 3847,
    1730             :         GIR_Done,
    1731             :       // Label 101: @2451
    1732             :       GIM_Try, /*On fail goto*//*Label 102*/ 2515, // Rule ID 1291 //
    1733             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1734             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    1735             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1736             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1737             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    1738             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_smull,
    1739             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    1740             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s32,
    1741             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1742             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1743             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1744             :         // (add:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, (intrinsic_wo_chain:{ *:[v2i64] } 285:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm))  =>  (SMLALv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1745             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMLALv2i32_v2i64,
    1746             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1747             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    1748             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1749             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    1750             :         GIR_EraseFromParent, /*InsnID*/0,
    1751             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1752             :         // GIR_Coverage, 1291,
    1753             :         GIR_Done,
    1754             :       // Label 102: @2515
    1755             :       GIM_Try, /*On fail goto*//*Label 103*/ 2579, // Rule ID 1351 //
    1756             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1757             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    1758             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1759             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1760             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    1761             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_umull,
    1762             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    1763             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s32,
    1764             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1765             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1766             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1767             :         // (add:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, (intrinsic_wo_chain:{ *:[v2i64] } 339:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm))  =>  (UMLALv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1768             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMLALv2i32_v2i64,
    1769             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1770             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    1771             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1772             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    1773             :         GIR_EraseFromParent, /*InsnID*/0,
    1774             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1775             :         // GIR_Coverage, 1351,
    1776             :         GIR_Done,
    1777             :       // Label 103: @2579
    1778             :       GIM_Try, /*On fail goto*//*Label 104*/ 2631, // Rule ID 687 //
    1779             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1780             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    1781             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1782             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1783             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    1784             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_saddlp,
    1785             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
    1786             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1787             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1788             :         // (add:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, (intrinsic_wo_chain:{ *:[v2i64] } 269:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn))  =>  (SADALPv4i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V128:{ *:[v4i32] }:$Rn)
    1789             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADALPv4i32_v2i64,
    1790             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1791             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    1792             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1793             :         GIR_EraseFromParent, /*InsnID*/0,
    1794             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1795             :         // GIR_Coverage, 687,
    1796             :         GIR_Done,
    1797             :       // Label 104: @2631
    1798             :       GIM_Try, /*On fail goto*//*Label 105*/ 2683, // Rule ID 731 //
    1799             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1800             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    1801             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1802             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1803             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    1804             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uaddlp,
    1805             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
    1806             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1807             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1808             :         // (add:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, (intrinsic_wo_chain:{ *:[v2i64] } 327:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn))  =>  (UADALPv4i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V128:{ *:[v4i32] }:$Rn)
    1809             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADALPv4i32_v2i64,
    1810             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1811             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    1812             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1813             :         GIR_EraseFromParent, /*InsnID*/0,
    1814             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1815             :         // GIR_Coverage, 731,
    1816             :         GIR_Done,
    1817             :       // Label 105: @2683
    1818             :       GIM_Try, /*On fail goto*//*Label 106*/ 2741, // Rule ID 1279 //
    1819             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1820             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1821             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    1822             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    1823             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1824             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    1825             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
    1826             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s32,
    1827             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1828             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1829             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    1830             :         // (add:{ *:[v2i64] } (sext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rn), (sext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rm))  =>  (SADDLv2i32_v2i64:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1831             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADDLv2i32_v2i64,
    1832             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1833             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    1834             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rm
    1835             :         GIR_EraseFromParent, /*InsnID*/0,
    1836             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1837             :         // GIR_Coverage, 1279,
    1838             :         GIR_Done,
    1839             :       // Label 106: @2741
    1840             :       GIM_Try, /*On fail goto*//*Label 107*/ 2799, // Rule ID 1339 //
    1841             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1842             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1843             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    1844             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    1845             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1846             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    1847             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
    1848             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s32,
    1849             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1850             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1851             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    1852             :         // (add:{ *:[v2i64] } (zext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rn), (zext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rm))  =>  (UADDLv2i32_v2i64:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1853             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADDLv2i32_v2i64,
    1854             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1855             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    1856             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rm
    1857             :         GIR_EraseFromParent, /*InsnID*/0,
    1858             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1859             :         // GIR_Coverage, 1339,
    1860             :         GIR_Done,
    1861             :       // Label 107: @2799
    1862             :       GIM_Try, /*On fail goto*//*Label 108*/ 2844, // Rule ID 3918 //
    1863             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1864             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1865             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    1866             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    1867             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1868             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1869             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1870             :         // (add:{ *:[v2i64] } (sext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rm), V128:{ *:[v2i64] }:$Rn)  =>  (SADDWv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1871             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADDWv2i32_v2i64,
    1872             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1873             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    1874             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    1875             :         GIR_EraseFromParent, /*InsnID*/0,
    1876             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1877             :         // GIR_Coverage, 3918,
    1878             :         GIR_Done,
    1879             :       // Label 108: @2844
    1880             :       GIM_Try, /*On fail goto*//*Label 109*/ 2889, // Rule ID 3936 //
    1881             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1882             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1883             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    1884             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    1885             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1886             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1887             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1888             :         // (add:{ *:[v2i64] } (zext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rm), V128:{ *:[v2i64] }:$Rn)  =>  (UADDWv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1889             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADDWv2i32_v2i64,
    1890             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1891             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    1892             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    1893             :         GIR_EraseFromParent, /*InsnID*/0,
    1894             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1895             :         // GIR_Coverage, 3936,
    1896             :         GIR_Done,
    1897             :       // Label 109: @2889
    1898             :       GIM_Try, /*On fail goto*//*Label 110*/ 2934, // Rule ID 1285 //
    1899             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1900             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    1901             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1902             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    1903             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    1904             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1905             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1906             :         // (add:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, (sext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rm))  =>  (SADDWv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1907             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADDWv2i32_v2i64,
    1908             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1909             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    1910             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    1911             :         GIR_EraseFromParent, /*InsnID*/0,
    1912             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1913             :         // GIR_Coverage, 1285,
    1914             :         GIR_Done,
    1915             :       // Label 110: @2934
    1916             :       GIM_Try, /*On fail goto*//*Label 111*/ 2979, // Rule ID 1345 //
    1917             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1918             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    1919             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1920             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    1921             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    1922             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1923             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1924             :         // (add:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, (zext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rm))  =>  (UADDWv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1925             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADDWv2i32_v2i64,
    1926             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1927             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    1928             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    1929             :         GIR_EraseFromParent, /*InsnID*/0,
    1930             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1931             :         // GIR_Coverage, 1345,
    1932             :         GIR_Done,
    1933             :       // Label 111: @2979
    1934             :       GIM_Try, /*On fail goto*//*Label 112*/ 2998, // Rule ID 766 //
    1935             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1936             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    1937             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1938             :         // (add:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)  =>  (ADDv2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)
    1939             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ADDv2i64,
    1940             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1941             :         // GIR_Coverage, 766,
    1942             :         GIR_Done,
    1943             :       // Label 112: @2998
    1944             :       GIM_Reject,
    1945             :     // Label 93: @2999
    1946             :     GIM_Reject,
    1947             :     // Label 54: @3000
    1948             :     GIM_Try, /*On fail goto*//*Label 113*/ 3612,
    1949             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    1950             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    1951             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    1952             :       GIM_Try, /*On fail goto*//*Label 114*/ 3078, // Rule ID 3856 //
    1953             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1954             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1955             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1956             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    1957             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    1958             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    1959             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s16,
    1960             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1961             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1962             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1963             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1964             :         // (add:{ *:[v4i16] } (intrinsic_wo_chain:{ *:[v4i16] } 268:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm), V64:{ *:[v4i16] }:$Rd)  =>  (SABAv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    1965             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABAv4i16,
    1966             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1967             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1968             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1969             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    1970             :         GIR_EraseFromParent, /*InsnID*/0,
    1971             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1972             :         // GIR_Coverage, 3856,
    1973             :         GIR_Done,
    1974             :       // Label 114: @3078
    1975             :       GIM_Try, /*On fail goto*//*Label 115*/ 3142, // Rule ID 3862 //
    1976             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1977             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1978             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1979             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    1980             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    1981             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    1982             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s16,
    1983             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1984             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1985             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1986             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1987             :         // (add:{ *:[v4i16] } (intrinsic_wo_chain:{ *:[v4i16] } 326:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm), V64:{ *:[v4i16] }:$Rd)  =>  (UABAv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    1988             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABAv4i16,
    1989             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1990             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1991             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1992             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    1993             :         GIR_EraseFromParent, /*InsnID*/0,
    1994             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1995             :         // GIR_Coverage, 3862,
    1996             :         GIR_Done,
    1997             :       // Label 115: @3142
    1998             :       GIM_Try, /*On fail goto*//*Label 116*/ 3194, // Rule ID 3836 //
    1999             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2000             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2001             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2002             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    2003             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_saddlp,
    2004             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    2005             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2006             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2007             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2008             :         // (add:{ *:[v4i16] } (intrinsic_wo_chain:{ *:[v4i16] } 269:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn), V64:{ *:[v4i16] }:$Rd)  =>  (SADALPv8i8_v4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, V64:{ *:[v8i8] }:$Rn)
    2009             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADALPv8i8_v4i16,
    2010             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2011             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2012             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2013             :         GIR_EraseFromParent, /*InsnID*/0,
    2014             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2015             :         // GIR_Coverage, 3836,
    2016             :         GIR_Done,
    2017             :       // Label 116: @3194
    2018             :       GIM_Try, /*On fail goto*//*Label 117*/ 3246, // Rule ID 3842 //
    2019             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2020             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2021             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2022             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    2023             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uaddlp,
    2024             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    2025             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2026             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2027             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2028             :         // (add:{ *:[v4i16] } (intrinsic_wo_chain:{ *:[v4i16] } 327:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn), V64:{ *:[v4i16] }:$Rd)  =>  (UADALPv8i8_v4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, V64:{ *:[v8i8] }:$Rn)
    2029             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADALPv8i8_v4i16,
    2030             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2031             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2032             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2033             :         GIR_EraseFromParent, /*InsnID*/0,
    2034             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2035             :         // GIR_Coverage, 3842,
    2036             :         GIR_Done,
    2037             :       // Label 117: @3246
    2038             :       GIM_Try, /*On fail goto*//*Label 118*/ 3310, // Rule ID 958 //
    2039             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2040             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2041             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2042             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2043             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2044             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    2045             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    2046             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s16,
    2047             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2048             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2049             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2050             :         // (add:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, (intrinsic_wo_chain:{ *:[v4i16] } 268:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm))  =>  (SABAv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2051             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABAv4i16,
    2052             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2053             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2054             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2055             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2056             :         GIR_EraseFromParent, /*InsnID*/0,
    2057             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2058             :         // GIR_Coverage, 958,
    2059             :         GIR_Done,
    2060             :       // Label 118: @3310
    2061             :       GIM_Try, /*On fail goto*//*Label 119*/ 3374, // Rule ID 1069 //
    2062             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2063             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2064             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2065             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2066             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2067             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    2068             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    2069             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s16,
    2070             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2071             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2072             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2073             :         // (add:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, (intrinsic_wo_chain:{ *:[v4i16] } 326:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm))  =>  (UABAv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2074             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABAv4i16,
    2075             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2076             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2077             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2078             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2079             :         GIR_EraseFromParent, /*InsnID*/0,
    2080             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2081             :         // GIR_Coverage, 1069,
    2082             :         GIR_Done,
    2083             :       // Label 119: @3374
    2084             :       GIM_Try, /*On fail goto*//*Label 120*/ 3426, // Rule ID 682 //
    2085             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2086             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2087             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2088             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2089             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    2090             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_saddlp,
    2091             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    2092             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2093             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2094             :         // (add:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, (intrinsic_wo_chain:{ *:[v4i16] } 269:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn))  =>  (SADALPv8i8_v4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, V64:{ *:[v8i8] }:$Rn)
    2095             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADALPv8i8_v4i16,
    2096             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2097             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2098             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2099             :         GIR_EraseFromParent, /*InsnID*/0,
    2100             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2101             :         // GIR_Coverage, 682,
    2102             :         GIR_Done,
    2103             :       // Label 120: @3426
    2104             :       GIM_Try, /*On fail goto*//*Label 121*/ 3478, // Rule ID 726 //
    2105             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2106             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2107             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2108             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2109             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    2110             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uaddlp,
    2111             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    2112             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2113             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2114             :         // (add:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, (intrinsic_wo_chain:{ *:[v4i16] } 327:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn))  =>  (UADALPv8i8_v4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, V64:{ *:[v8i8] }:$Rn)
    2115             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADALPv8i8_v4i16,
    2116             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2117             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2118             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2119             :         GIR_EraseFromParent, /*InsnID*/0,
    2120             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2121             :         // GIR_Coverage, 726,
    2122             :         GIR_Done,
    2123             :       // Label 121: @3478
    2124             :       GIM_Try, /*On fail goto*//*Label 122*/ 3535, // Rule ID 3850 //
    2125             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2126             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2127             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    2128             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    2129             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    2130             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2131             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2132             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2133             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2134             :         // (add:{ *:[v4i16] } (mul:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm), V64:{ *:[v4i16] }:$Rd)  =>  (MLAv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2135             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLAv4i16,
    2136             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2137             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2138             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    2139             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    2140             :         GIR_EraseFromParent, /*InsnID*/0,
    2141             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2142             :         // GIR_Coverage, 3850,
    2143             :         GIR_Done,
    2144             :       // Label 122: @3535
    2145             :       GIM_Try, /*On fail goto*//*Label 123*/ 3592, // Rule ID 938 //
    2146             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2147             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2148             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2149             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    2150             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    2151             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    2152             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2153             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2154             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2155             :         // (add:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, (mul:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm))  =>  (MLAv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2156             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLAv4i16,
    2157             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2158             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2159             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    2160             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    2161             :         GIR_EraseFromParent, /*InsnID*/0,
    2162             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2163             :         // GIR_Coverage, 938,
    2164             :         GIR_Done,
    2165             :       // Label 123: @3592
    2166             :       GIM_Try, /*On fail goto*//*Label 124*/ 3611, // Rule ID 762 //
    2167             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2168             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2169             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2170             :         // (add:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)  =>  (ADDv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2171             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ADDv4i16,
    2172             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2173             :         // GIR_Coverage, 762,
    2174             :         GIR_Done,
    2175             :       // Label 124: @3611
    2176             :       GIM_Reject,
    2177             :     // Label 113: @3612
    2178             :     GIM_Reject,
    2179             :     // Label 55: @3613
    2180             :     GIM_Try, /*On fail goto*//*Label 125*/ 5085,
    2181             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    2182             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    2183             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    2184             :       GIM_Try, /*On fail goto*//*Label 126*/ 3704, // Rule ID 3910 //
    2185             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2186             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2187             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    2188             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    2189             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    2190             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_INTRINSIC,
    2191             :         GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
    2192             :         GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    2193             :         GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s16,
    2194             :         GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v4s16,
    2195             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2196             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2197             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2198             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2199             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    2200             :         // (add:{ *:[v4i32] } (zext:{ *:[v4i32] } (intrinsic_wo_chain:{ *:[v4i16] } 268:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)), V128:{ *:[v4i32] }:$Rd)  =>  (SABALv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2201             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABALv4i16_v4i32,
    2202             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2203             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2204             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // Rn
    2205             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // Rm
    2206             :         GIR_EraseFromParent, /*InsnID*/0,
    2207             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2208             :         // GIR_Coverage, 3910,
    2209             :         GIR_Done,
    2210             :       // Label 126: @3704
    2211             :       GIM_Try, /*On fail goto*//*Label 127*/ 3781, // Rule ID 3928 //
    2212             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2213             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2214             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    2215             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    2216             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    2217             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_INTRINSIC,
    2218             :         GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
    2219             :         GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    2220             :         GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s16,
    2221             :         GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v4s16,
    2222             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2223             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2224             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2225             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2226             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    2227             :         // (add:{ *:[v4i32] } (zext:{ *:[v4i32] } (intrinsic_wo_chain:{ *:[v4i16] } 326:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)), V128:{ *:[v4i32] }:$Rd)  =>  (UABALv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2228             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABALv4i16_v4i32,
    2229             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2230             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2231             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // Rn
    2232             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // Rm
    2233             :         GIR_EraseFromParent, /*InsnID*/0,
    2234             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2235             :         // GIR_Coverage, 3928,
    2236             :         GIR_Done,
    2237             :       // Label 127: @3781
    2238             :       GIM_Try, /*On fail goto*//*Label 128*/ 3858, // Rule ID 1265 //
    2239             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2240             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2241             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2242             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    2243             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    2244             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    2245             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_INTRINSIC,
    2246             :         GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
    2247             :         GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    2248             :         GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s16,
    2249             :         GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v4s16,
    2250             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2251             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2252             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2253             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    2254             :         // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, (zext:{ *:[v4i32] } (intrinsic_wo_chain:{ *:[v4i16] } 268:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)))  =>  (SABALv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2255             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABALv4i16_v4i32,
    2256             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2257             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2258             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // Rn
    2259             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // Rm
    2260             :         GIR_EraseFromParent, /*InsnID*/0,
    2261             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2262             :         // GIR_Coverage, 1265,
    2263             :         GIR_Done,
    2264             :       // Label 128: @3858
    2265             :       GIM_Try, /*On fail goto*//*Label 129*/ 3935, // Rule ID 1331 //
    2266             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2267             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2268             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2269             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    2270             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    2271             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    2272             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_INTRINSIC,
    2273             :         GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
    2274             :         GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    2275             :         GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s16,
    2276             :         GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v4s16,
    2277             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2278             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2279             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2280             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    2281             :         // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, (zext:{ *:[v4i32] } (intrinsic_wo_chain:{ *:[v4i16] } 326:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)))  =>  (UABALv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2282             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABALv4i16_v4i32,
    2283             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2284             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2285             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // Rn
    2286             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // Rm
    2287             :         GIR_EraseFromParent, /*InsnID*/0,
    2288             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2289             :         // GIR_Coverage, 1331,
    2290             :         GIR_Done,
    2291             :       // Label 129: @3935
    2292             :       GIM_Try, /*On fail goto*//*Label 130*/ 3999, // Rule ID 3859 //
    2293             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2294             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2295             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2296             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2297             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    2298             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
    2299             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s32,
    2300             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2301             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    2302             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2303             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2304             :         // (add:{ *:[v4i32] } (intrinsic_wo_chain:{ *:[v4i32] } 268:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm), V128:{ *:[v4i32] }:$Rd)  =>  (SABAv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
    2305             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABAv4i32,
    2306             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2307             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2308             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2309             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2310             :         GIR_EraseFromParent, /*InsnID*/0,
    2311             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2312             :         // GIR_Coverage, 3859,
    2313             :         GIR_Done,
    2314             :       // Label 130: @3999
    2315             :       GIM_Try, /*On fail goto*//*Label 131*/ 4063, // Rule ID 3865 //
    2316             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2317             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2318             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2319             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2320             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    2321             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
    2322             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s32,
    2323             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2324             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    2325             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2326             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2327             :         // (add:{ *:[v4i32] } (intrinsic_wo_chain:{ *:[v4i32] } 326:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm), V128:{ *:[v4i32] }:$Rd)  =>  (UABAv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
    2328             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABAv4i32,
    2329             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2330             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2331             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2332             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2333             :         GIR_EraseFromParent, /*InsnID*/0,
    2334             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2335             :         // GIR_Coverage, 3865,
    2336             :         GIR_Done,
    2337             :       // Label 131: @4063
    2338             :       GIM_Try, /*On fail goto*//*Label 132*/ 4127, // Rule ID 3922 //
    2339             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2340             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2341             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2342             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2343             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_smull,
    2344             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    2345             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s16,
    2346             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2347             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2348             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2349             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2350             :         // (add:{ *:[v4i32] } (intrinsic_wo_chain:{ *:[v4i32] } 285:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm), V128:{ *:[v4i32] }:$Rd)  =>  (SMLALv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2351             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMLALv4i16_v4i32,
    2352             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2353             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2354             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2355             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2356             :         GIR_EraseFromParent, /*InsnID*/0,
    2357             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2358             :         // GIR_Coverage, 3922,
    2359             :         GIR_Done,
    2360             :       // Label 132: @4127
    2361             :       GIM_Try, /*On fail goto*//*Label 133*/ 4191, // Rule ID 3940 //
    2362             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2363             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2364             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2365             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2366             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_umull,
    2367             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    2368             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s16,
    2369             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2370             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2371             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2372             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2373             :         // (add:{ *:[v4i32] } (intrinsic_wo_chain:{ *:[v4i32] } 339:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm), V128:{ *:[v4i32] }:$Rd)  =>  (UMLALv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2374             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMLALv4i16_v4i32,
    2375             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2376             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2377             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2378             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2379             :         GIR_EraseFromParent, /*InsnID*/0,
    2380             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2381             :         // GIR_Coverage, 3940,
    2382             :         GIR_Done,
    2383             :       // Label 133: @4191
    2384             :       GIM_Try, /*On fail goto*//*Label 134*/ 4243, // Rule ID 3839 //
    2385             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2386             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2387             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2388             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    2389             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_saddlp,
    2390             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
    2391             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2392             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2393             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2394             :         // (add:{ *:[v4i32] } (intrinsic_wo_chain:{ *:[v4i32] } 269:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn), V128:{ *:[v4i32] }:$Rd)  =>  (SADALPv8i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v8i16] }:$Rn)
    2395             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADALPv8i16_v4i32,
    2396             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2397             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2398             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2399             :         GIR_EraseFromParent, /*InsnID*/0,
    2400             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2401             :         // GIR_Coverage, 3839,
    2402             :         GIR_Done,
    2403             :       // Label 134: @4243
    2404             :       GIM_Try, /*On fail goto*//*Label 135*/ 4295, // Rule ID 3845 //
    2405             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2406             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2407             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2408             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    2409             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uaddlp,
    2410             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
    2411             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2412             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2413             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2414             :         // (add:{ *:[v4i32] } (intrinsic_wo_chain:{ *:[v4i32] } 327:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn), V128:{ *:[v4i32] }:$Rd)  =>  (UADALPv8i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v8i16] }:$Rn)
    2415             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADALPv8i16_v4i32,
    2416             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2417             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2418             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2419             :         GIR_EraseFromParent, /*InsnID*/0,
    2420             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2421             :         // GIR_Coverage, 3845,
    2422             :         GIR_Done,
    2423             :       // Label 135: @4295
    2424             :       GIM_Try, /*On fail goto*//*Label 136*/ 4359, // Rule ID 961 //
    2425             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2426             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2427             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2428             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2429             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2430             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    2431             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
    2432             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s32,
    2433             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2434             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    2435             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2436             :         // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, (intrinsic_wo_chain:{ *:[v4i32] } 268:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm))  =>  (SABAv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
    2437             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABAv4i32,
    2438             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2439             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2440             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2441             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2442             :         GIR_EraseFromParent, /*InsnID*/0,
    2443             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2444             :         // GIR_Coverage, 961,
    2445             :         GIR_Done,
    2446             :       // Label 136: @4359
    2447             :       GIM_Try, /*On fail goto*//*Label 137*/ 4423, // Rule ID 1072 //
    2448             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2449             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2450             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2451             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2452             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2453             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    2454             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
    2455             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s32,
    2456             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2457             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    2458             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2459             :         // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, (intrinsic_wo_chain:{ *:[v4i32] } 326:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm))  =>  (UABAv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
    2460             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABAv4i32,
    2461             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2462             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2463             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2464             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2465             :         GIR_EraseFromParent, /*InsnID*/0,
    2466             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2467             :         // GIR_Coverage, 1072,
    2468             :         GIR_Done,
    2469             :       // Label 137: @4423
    2470             :       GIM_Try, /*On fail goto*//*Label 138*/ 4487, // Rule ID 1289 //
    2471             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2472             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2473             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2474             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2475             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2476             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_smull,
    2477             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    2478             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s16,
    2479             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2480             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2481             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2482             :         // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, (intrinsic_wo_chain:{ *:[v4i32] } 285:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm))  =>  (SMLALv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2483             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMLALv4i16_v4i32,
    2484             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2485             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2486             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2487             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2488             :         GIR_EraseFromParent, /*InsnID*/0,
    2489             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2490             :         // GIR_Coverage, 1289,
    2491             :         GIR_Done,
    2492             :       // Label 138: @4487
    2493             :       GIM_Try, /*On fail goto*//*Label 139*/ 4551, // Rule ID 1349 //
    2494             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2495             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2496             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2497             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2498             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2499             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_umull,
    2500             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    2501             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s16,
    2502             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2503             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2504             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2505             :         // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, (intrinsic_wo_chain:{ *:[v4i32] } 339:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm))  =>  (UMLALv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2506             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMLALv4i16_v4i32,
    2507             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2508             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2509             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2510             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2511             :         GIR_EraseFromParent, /*InsnID*/0,
    2512             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2513             :         // GIR_Coverage, 1349,
    2514             :         GIR_Done,
    2515             :       // Label 139: @4551
    2516             :       GIM_Try, /*On fail goto*//*Label 140*/ 4603, // Rule ID 685 //
    2517             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2518             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2519             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2520             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2521             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    2522             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_saddlp,
    2523             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
    2524             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2525             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2526             :         // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, (intrinsic_wo_chain:{ *:[v4i32] } 269:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn))  =>  (SADALPv8i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v8i16] }:$Rn)
    2527             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADALPv8i16_v4i32,
    2528             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2529             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2530             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2531             :         GIR_EraseFromParent, /*InsnID*/0,
    2532             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2533             :         // GIR_Coverage, 685,
    2534             :         GIR_Done,
    2535             :       // Label 140: @4603
    2536             :       GIM_Try, /*On fail goto*//*Label 141*/ 4655, // Rule ID 729 //
    2537             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2538             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2539             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2540             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2541             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    2542             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uaddlp,
    2543             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
    2544             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2545             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2546             :         // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, (intrinsic_wo_chain:{ *:[v4i32] } 327:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn))  =>  (UADALPv8i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v8i16] }:$Rn)
    2547             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADALPv8i16_v4i32,
    2548             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2549             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2550             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2551             :         GIR_EraseFromParent, /*InsnID*/0,
    2552             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2553             :         // GIR_Coverage, 729,
    2554             :         GIR_Done,
    2555             :       // Label 141: @4655
    2556             :       GIM_Try, /*On fail goto*//*Label 142*/ 4713, // Rule ID 1277 //
    2557             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2558             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2559             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    2560             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    2561             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2562             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    2563             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
    2564             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s16,
    2565             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2566             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2567             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    2568             :         // (add:{ *:[v4i32] } (sext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rn), (sext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rm))  =>  (SADDLv4i16_v4i32:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2569             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADDLv4i16_v4i32,
    2570             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    2571             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    2572             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rm
    2573             :         GIR_EraseFromParent, /*InsnID*/0,
    2574             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2575             :         // GIR_Coverage, 1277,
    2576             :         GIR_Done,
    2577             :       // Label 142: @4713
    2578             :       GIM_Try, /*On fail goto*//*Label 143*/ 4771, // Rule ID 1337 //
    2579             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2580             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2581             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    2582             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    2583             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2584             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    2585             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
    2586             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s16,
    2587             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2588             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2589             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    2590             :         // (add:{ *:[v4i32] } (zext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rn), (zext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rm))  =>  (UADDLv4i16_v4i32:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2591             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADDLv4i16_v4i32,
    2592             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    2593             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    2594             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rm
    2595             :         GIR_EraseFromParent, /*InsnID*/0,
    2596             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2597             :         // GIR_Coverage, 1337,
    2598             :         GIR_Done,
    2599             :       // Label 143: @4771
    2600             :       GIM_Try, /*On fail goto*//*Label 144*/ 4828, // Rule ID 3853 //
    2601             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2602             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2603             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    2604             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
    2605             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
    2606             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2607             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2608             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2609             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2610             :         // (add:{ *:[v4i32] } (mul:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm), V128:{ *:[v4i32] }:$Rd)  =>  (MLAv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
    2611             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLAv4i32,
    2612             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2613             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2614             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    2615             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    2616             :         GIR_EraseFromParent, /*InsnID*/0,
    2617             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2618             :         // GIR_Coverage, 3853,
    2619             :         GIR_Done,
    2620             :       // Label 144: @4828
    2621             :       GIM_Try, /*On fail goto*//*Label 145*/ 4873, // Rule ID 3916 //
    2622             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2623             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2624             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    2625             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    2626             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2627             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2628             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2629             :         // (add:{ *:[v4i32] } (sext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rm), V128:{ *:[v4i32] }:$Rn)  =>  (SADDWv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2630             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADDWv4i16_v4i32,
    2631             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    2632             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    2633             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    2634             :         GIR_EraseFromParent, /*InsnID*/0,
    2635             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2636             :         // GIR_Coverage, 3916,
    2637             :         GIR_Done,
    2638             :       // Label 145: @4873
    2639             :       GIM_Try, /*On fail goto*//*Label 146*/ 4918, // Rule ID 3934 //
    2640             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2641             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2642             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    2643             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    2644             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2645             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2646             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2647             :         // (add:{ *:[v4i32] } (zext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rm), V128:{ *:[v4i32] }:$Rn)  =>  (UADDWv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2648             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADDWv4i16_v4i32,
    2649             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    2650             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    2651             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    2652             :         GIR_EraseFromParent, /*InsnID*/0,
    2653             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2654             :         // GIR_Coverage, 3934,
    2655             :         GIR_Done,
    2656             :       // Label 146: @4918
    2657             :       GIM_Try, /*On fail goto*//*Label 147*/ 4975, // Rule ID 941 //
    2658             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2659             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2660             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2661             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    2662             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
    2663             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
    2664             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2665             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2666             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2667             :         // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, (mul:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm))  =>  (MLAv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
    2668             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLAv4i32,
    2669             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2670             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2671             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    2672             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    2673             :         GIR_EraseFromParent, /*InsnID*/0,
    2674             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2675             :         // GIR_Coverage, 941,
    2676             :         GIR_Done,
    2677             :       // Label 147: @4975
    2678             :       GIM_Try, /*On fail goto*//*Label 148*/ 5020, // Rule ID 1283 //
    2679             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2680             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2681             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2682             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    2683             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    2684             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2685             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2686             :         // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, (sext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rm))  =>  (SADDWv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2687             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADDWv4i16_v4i32,
    2688             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    2689             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    2690             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    2691             :         GIR_EraseFromParent, /*InsnID*/0,
    2692             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2693             :         // GIR_Coverage, 1283,
    2694             :         GIR_Done,
    2695             :       // Label 148: @5020
    2696             :       GIM_Try, /*On fail goto*//*Label 149*/ 5065, // Rule ID 1343 //
    2697             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2698             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2699             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2700             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    2701             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    2702             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2703             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2704             :         // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, (zext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rm))  =>  (UADDWv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2705             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADDWv4i16_v4i32,
    2706             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    2707             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    2708             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    2709             :         GIR_EraseFromParent, /*InsnID*/0,
    2710             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2711             :         // GIR_Coverage, 1343,
    2712             :         GIR_Done,
    2713             :       // Label 149: @5065
    2714             :       GIM_Try, /*On fail goto*//*Label 150*/ 5084, // Rule ID 765 //
    2715             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2716             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2717             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2718             :         // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (ADDv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
    2719             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ADDv4i32,
    2720             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2721             :         // GIR_Coverage, 765,
    2722             :         GIR_Done,
    2723             :       // Label 150: @5084
    2724             :       GIM_Reject,
    2725             :     // Label 125: @5085
    2726             :     GIM_Reject,
    2727             :     // Label 56: @5086
    2728             :     GIM_Try, /*On fail goto*//*Label 151*/ 5490,
    2729             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    2730             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
    2731             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    2732             :       GIM_Try, /*On fail goto*//*Label 152*/ 5164, // Rule ID 3854 //
    2733             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2734             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2735             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2736             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2737             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    2738             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    2739             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s8,
    2740             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2741             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2742             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2743             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2744             :         // (add:{ *:[v8i8] } (intrinsic_wo_chain:{ *:[v8i8] } 268:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm), V64:{ *:[v8i8] }:$Rd)  =>  (SABAv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    2745             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABAv8i8,
    2746             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2747             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2748             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2749             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2750             :         GIR_EraseFromParent, /*InsnID*/0,
    2751             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2752             :         // GIR_Coverage, 3854,
    2753             :         GIR_Done,
    2754             :       // Label 152: @5164
    2755             :       GIM_Try, /*On fail goto*//*Label 153*/ 5228, // Rule ID 3860 //
    2756             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2757             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2758             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2759             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2760             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    2761             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    2762             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s8,
    2763             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2764             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2765             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2766             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2767             :         // (add:{ *:[v8i8] } (intrinsic_wo_chain:{ *:[v8i8] } 326:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm), V64:{ *:[v8i8] }:$Rd)  =>  (UABAv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    2768             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABAv8i8,
    2769             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2770             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2771             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2772             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2773             :         GIR_EraseFromParent, /*InsnID*/0,
    2774             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2775             :         // GIR_Coverage, 3860,
    2776             :         GIR_Done,
    2777             :       // Label 153: @5228
    2778             :       GIM_Try, /*On fail goto*//*Label 154*/ 5292, // Rule ID 956 //
    2779             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2780             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2781             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2782             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2783             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2784             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    2785             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    2786             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s8,
    2787             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2788             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2789             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2790             :         // (add:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rd, (intrinsic_wo_chain:{ *:[v8i8] } 268:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm))  =>  (SABAv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    2791             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABAv8i8,
    2792             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2793             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2794             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2795             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2796             :         GIR_EraseFromParent, /*InsnID*/0,
    2797             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2798             :         // GIR_Coverage, 956,
    2799             :         GIR_Done,
    2800             :       // Label 154: @5292
    2801             :       GIM_Try, /*On fail goto*//*Label 155*/ 5356, // Rule ID 1067 //
    2802             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2803             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2804             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2805             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2806             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2807             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    2808             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    2809             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s8,
    2810             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2811             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2812             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2813             :         // (add:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rd, (intrinsic_wo_chain:{ *:[v8i8] } 326:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm))  =>  (UABAv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    2814             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABAv8i8,
    2815             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2816             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2817             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2818             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2819             :         GIR_EraseFromParent, /*InsnID*/0,
    2820             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2821             :         // GIR_Coverage, 1067,
    2822             :         GIR_Done,
    2823             :       // Label 155: @5356
    2824             :       GIM_Try, /*On fail goto*//*Label 156*/ 5413, // Rule ID 3848 //
    2825             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2826             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2827             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    2828             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    2829             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    2830             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2831             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2832             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2833             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2834             :         // (add:{ *:[v8i8] } (mul:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm), V64:{ *:[v8i8] }:$Rd)  =>  (MLAv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    2835             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLAv8i8,
    2836             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2837             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2838             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    2839             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    2840             :         GIR_EraseFromParent, /*InsnID*/0,
    2841             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2842             :         // GIR_Coverage, 3848,
    2843             :         GIR_Done,
    2844             :       // Label 156: @5413
    2845             :       GIM_Try, /*On fail goto*//*Label 157*/ 5470, // Rule ID 936 //
    2846             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2847             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2848             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2849             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    2850             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    2851             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    2852             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2853             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2854             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2855             :         // (add:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rd, (mul:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm))  =>  (MLAv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    2856             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLAv8i8,
    2857             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2858             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2859             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    2860             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    2861             :         GIR_EraseFromParent, /*InsnID*/0,
    2862             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2863             :         // GIR_Coverage, 936,
    2864             :         GIR_Done,
    2865             :       // Label 157: @5470
    2866             :       GIM_Try, /*On fail goto*//*Label 158*/ 5489, // Rule ID 760 //
    2867             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2868             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2869             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2870             :         // (add:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (ADDv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    2871             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ADDv8i8,
    2872             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2873             :         // GIR_Coverage, 760,
    2874             :         GIR_Done,
    2875             :       // Label 158: @5489
    2876             :       GIM_Reject,
    2877             :     // Label 151: @5490
    2878             :     GIM_Reject,
    2879             :     // Label 57: @5491
    2880             :     GIM_Try, /*On fail goto*//*Label 159*/ 6963,
    2881             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    2882             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    2883             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    2884             :       GIM_Try, /*On fail goto*//*Label 160*/ 5582, // Rule ID 3908 //
    2885             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2886             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2887             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    2888             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    2889             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    2890             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_INTRINSIC,
    2891             :         GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
    2892             :         GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    2893             :         GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s8,
    2894             :         GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v8s8,
    2895             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2896             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2897             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2898             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2899             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    2900             :         // (add:{ *:[v8i16] } (zext:{ *:[v8i16] } (intrinsic_wo_chain:{ *:[v8i8] } 268:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)), V128:{ *:[v8i16] }:$Rd)  =>  (SABALv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    2901             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABALv8i8_v8i16,
    2902             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2903             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2904             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // Rn
    2905             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // Rm
    2906             :         GIR_EraseFromParent, /*InsnID*/0,
    2907             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2908             :         // GIR_Coverage, 3908,
    2909             :         GIR_Done,
    2910             :       // Label 160: @5582
    2911             :       GIM_Try, /*On fail goto*//*Label 161*/ 5659, // Rule ID 3926 //
    2912             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2913             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2914             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    2915             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    2916             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    2917             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_INTRINSIC,
    2918             :         GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
    2919             :         GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    2920             :         GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s8,
    2921             :         GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v8s8,
    2922             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2923             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2924             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2925             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2926             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    2927             :         // (add:{ *:[v8i16] } (zext:{ *:[v8i16] } (intrinsic_wo_chain:{ *:[v8i8] } 326:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)), V128:{ *:[v8i16] }:$Rd)  =>  (UABALv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    2928             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABALv8i8_v8i16,
    2929             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2930             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2931             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // Rn
    2932             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // Rm
    2933             :         GIR_EraseFromParent, /*InsnID*/0,
    2934             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2935             :         // GIR_Coverage, 3926,
    2936             :         GIR_Done,
    2937             :       // Label 161: @5659
    2938             :       GIM_Try, /*On fail goto*//*Label 162*/ 5736, // Rule ID 1263 //
    2939             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2940             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2941             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2942             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    2943             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    2944             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    2945             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_INTRINSIC,
    2946             :         GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
    2947             :         GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    2948             :         GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s8,
    2949             :         GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v8s8,
    2950             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2951             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2952             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2953             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    2954             :         // (add:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, (zext:{ *:[v8i16] } (intrinsic_wo_chain:{ *:[v8i8] } 268:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)))  =>  (SABALv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    2955             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABALv8i8_v8i16,
    2956             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2957             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2958             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // Rn
    2959             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // Rm
    2960             :         GIR_EraseFromParent, /*InsnID*/0,
    2961             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2962             :         // GIR_Coverage, 1263,
    2963             :         GIR_Done,
    2964             :       // Label 162: @5736
    2965             :       GIM_Try, /*On fail goto*//*Label 163*/ 5813, // Rule ID 1329 //
    2966             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2967             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2968             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2969             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    2970             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    2971             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    2972             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_INTRINSIC,
    2973             :         GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
    2974             :         GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    2975             :         GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s8,
    2976             :         GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v8s8,
    2977             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2978             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2979             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2980             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    2981             :         // (add:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, (zext:{ *:[v8i16] } (intrinsic_wo_chain:{ *:[v8i8] } 326:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)))  =>  (UABALv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    2982             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABALv8i8_v8i16,
    2983             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2984             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2985             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // Rn
    2986             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // Rm
    2987             :         GIR_EraseFromParent, /*InsnID*/0,
    2988             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2989             :         // GIR_Coverage, 1329,
    2990             :         GIR_Done,
    2991             :       // Label 163: @5813
    2992             :       GIM_Try, /*On fail goto*//*Label 164*/ 5877, // Rule ID 3857 //
    2993             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2994             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2995             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2996             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2997             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    2998             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
    2999             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s16,
    3000             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3001             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    3002             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3003             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3004             :         // (add:{ *:[v8i16] } (intrinsic_wo_chain:{ *:[v8i16] } 268:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm), V128:{ *:[v8i16] }:$Rd)  =>  (SABAv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
    3005             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABAv8i16,
    3006             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3007             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    3008             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3009             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    3010             :         GIR_EraseFromParent, /*InsnID*/0,
    3011             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3012             :         // GIR_Coverage, 3857,
    3013             :         GIR_Done,
    3014             :       // Label 164: @5877
    3015             :       GIM_Try, /*On fail goto*//*Label 165*/ 5941, // Rule ID 3863 //
    3016             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3017             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    3018             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3019             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    3020             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    3021             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
    3022             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s16,
    3023             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3024             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    3025             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3026             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3027             :         // (add:{ *:[v8i16] } (intrinsic_wo_chain:{ *:[v8i16] } 326:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm), V128:{ *:[v8i16] }:$Rd)  =>  (UABAv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
    3028             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABAv8i16,
    3029             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3030             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    3031             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3032             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    3033             :         GIR_EraseFromParent, /*InsnID*/0,
    3034             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3035             :         // GIR_Coverage, 3863,
    3036             :         GIR_Done,
    3037             :       // Label 165: @5941
    3038             :       GIM_Try, /*On fail goto*//*Label 166*/ 6005, // Rule ID 3920 //
    3039             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3040             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    3041             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3042             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    3043             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_smull,
    3044             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    3045             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s8,
    3046             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    3047             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    3048             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3049             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3050             :         // (add:{ *:[v8i16] } (intrinsic_wo_chain:{ *:[v8i16] } 285:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm), V128:{ *:[v8i16] }:$Rd)  =>  (SMLALv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    3051             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMLALv8i8_v8i16,
    3052             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3053             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    3054             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3055             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    3056             :         GIR_EraseFromParent, /*InsnID*/0,
    3057             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3058             :         // GIR_Coverage, 3920,
    3059             :         GIR_Done,
    3060             :       // Label 166: @6005
    3061             :       GIM_Try, /*On fail goto*//*Label 167*/ 6069, // Rule ID 3938 //
    3062             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3063             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    3064             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3065             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    3066             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_umull,
    3067             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    3068             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s8,
    3069             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    3070             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    3071             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3072             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3073             :         // (add:{ *:[v8i16] } (intrinsic_wo_chain:{ *:[v8i16] } 339:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm), V128:{ *:[v8i16] }:$Rd)  =>  (UMLALv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    3074             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMLALv8i8_v8i16,
    3075             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3076             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    3077             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3078             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    3079             :         GIR_EraseFromParent, /*InsnID*/0,
    3080             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3081             :         // GIR_Coverage, 3938,
    3082             :         GIR_Done,
    3083             :       // Label 167: @6069
    3084             :       GIM_Try, /*On fail goto*//*Label 168*/ 6121, // Rule ID 3837 //
    3085             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3086             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    3087             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3088             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    3089             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_saddlp,
    3090             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
    3091             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3092             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3093             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3094             :         // (add:{ *:[v8i16] } (intrinsic_wo_chain:{ *:[v8i16] } 269:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn), V128:{ *:[v8i16] }:$Rd)  =>  (SADALPv16i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V128:{ *:[v16i8] }:$Rn)
    3095             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADALPv16i8_v8i16,
    3096             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3097             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    3098             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3099             :         GIR_EraseFromParent, /*InsnID*/0,
    3100             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3101             :         // GIR_Coverage, 3837,
    3102             :         GIR_Done,
    3103             :       // Label 168: @6121
    3104             :       GIM_Try, /*On fail goto*//*Label 169*/ 6173, // Rule ID 3843 //
    3105             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3106             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    3107             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3108             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    3109             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uaddlp,
    3110             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
    3111             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3112             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3113             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3114             :         // (add:{ *:[v8i16] } (intrinsic_wo_chain:{ *:[v8i16] } 327:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn), V128:{ *:[v8i16] }:$Rd)  =>  (UADALPv16i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V128:{ *:[v16i8] }:$Rn)
    3115             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADALPv16i8_v8i16,
    3116             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3117             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    3118             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3119             :         GIR_EraseFromParent, /*InsnID*/0,
    3120             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3121             :         // GIR_Coverage, 3843,
    3122             :         GIR_Done,
    3123             :       // Label 169: @6173
    3124             :       GIM_Try, /*On fail goto*//*Label 170*/ 6237, // Rule ID 959 //
    3125             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3126             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3127             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3128             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3129             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    3130             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    3131             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
    3132             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s16,
    3133             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3134             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    3135             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3136             :         // (add:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, (intrinsic_wo_chain:{ *:[v8i16] } 268:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm))  =>  (SABAv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
    3137             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABAv8i16,
    3138             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3139             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    3140             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3141             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    3142             :         GIR_EraseFromParent, /*InsnID*/0,
    3143             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3144             :         // GIR_Coverage, 959,
    3145             :         GIR_Done,
    3146             :       // Label 170: @6237
    3147             :       GIM_Try, /*On fail goto*//*Label 171*/ 6301, // Rule ID 1070 //
    3148             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3149             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3150             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3151             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3152             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    3153             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    3154             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
    3155             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s16,
    3156             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3157             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    3158             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3159             :         // (add:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, (intrinsic_wo_chain:{ *:[v8i16] } 326:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm))  =>  (UABAv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
    3160             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABAv8i16,
    3161             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3162             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    3163             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3164             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    3165             :         GIR_EraseFromParent, /*InsnID*/0,
    3166             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3167             :         // GIR_Coverage, 1070,
    3168             :         GIR_Done,
    3169             :       // Label 171: @6301
    3170             :       GIM_Try, /*On fail goto*//*Label 172*/ 6365, // Rule ID 1287 //
    3171             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3172             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3173             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3174             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3175             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    3176             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_smull,
    3177             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    3178             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s8,
    3179             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    3180             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    3181             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3182             :         // (add:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, (intrinsic_wo_chain:{ *:[v8i16] } 285:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm))  =>  (SMLALv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    3183             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMLALv8i8_v8i16,
    3184             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3185             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    3186             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3187             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    3188             :         GIR_EraseFromParent, /*InsnID*/0,
    3189             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3190             :         // GIR_Coverage, 1287,
    3191             :         GIR_Done,
    3192             :       // Label 172: @6365
    3193             :       GIM_Try, /*On fail goto*//*Label 173*/ 6429, // Rule ID 1347 //
    3194             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3195             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3196             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3197             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3198             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    3199             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_umull,
    3200             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    3201             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s8,
    3202             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    3203             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    3204             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3205             :         // (add:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, (intrinsic_wo_chain:{ *:[v8i16] } 339:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm))  =>  (UMLALv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    3206             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMLALv8i8_v8i16,
    3207             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3208             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    3209             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3210             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    3211             :         GIR_EraseFromParent, /*InsnID*/0,
    3212             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3213             :         // GIR_Coverage, 1347,
    3214             :         GIR_Done,
    3215             :       // Label 173: @6429
    3216             :       GIM_Try, /*On fail goto*//*Label 174*/ 6481, // Rule ID 683 //
    3217             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3218             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3219             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3220             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3221             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    3222             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_saddlp,
    3223             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
    3224             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3225             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3226             :         // (add:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, (intrinsic_wo_chain:{ *:[v8i16] } 269:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn))  =>  (SADALPv16i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V128:{ *:[v16i8] }:$Rn)
    3227             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADALPv16i8_v8i16,
    3228             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3229             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    3230             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3231             :         GIR_EraseFromParent, /*InsnID*/0,
    3232             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3233             :         // GIR_Coverage, 683,
    3234             :         GIR_Done,
    3235             :       // Label 174: @6481
    3236             :       GIM_Try, /*On fail goto*//*Label 175*/ 6533, // Rule ID 727 //
    3237             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3238             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3239             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3240             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3241             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    3242             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uaddlp,
    3243             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
    3244             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3245             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3246             :         // (add:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, (intrinsic_wo_chain:{ *:[v8i16] } 327:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn))  =>  (UADALPv16i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V128:{ *:[v16i8] }:$Rn)
    3247             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADALPv16i8_v8i16,
    3248             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3249             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    3250             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3251             :         GIR_EraseFromParent, /*InsnID*/0,
    3252             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3253             :         // GIR_Coverage, 727,
    3254             :         GIR_Done,
    3255             :       // Label 175: @6533
    3256             :       GIM_Try, /*On fail goto*//*Label 176*/ 6591, // Rule ID 1275 //
    3257             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3258             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    3259             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    3260             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    3261             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    3262             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    3263             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
    3264             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s8,
    3265             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    3266             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3267             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    3268             :         // (add:{ *:[v8i16] } (sext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rn), (sext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rm))  =>  (SADDLv8i8_v8i16:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    3269             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADDLv8i8_v8i16,
    3270             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3271             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    3272             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rm
    3273             :         GIR_EraseFromParent, /*InsnID*/0,
    3274             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3275             :         // GIR_Coverage, 1275,
    3276             :         GIR_Done,
    3277             :       // Label 176: @6591
    3278             :       GIM_Try, /*On fail goto*//*Label 177*/ 6649, // Rule ID 1335 //
    3279             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3280             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    3281             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    3282             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    3283             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    3284             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    3285             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
    3286             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s8,
    3287             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    3288             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3289             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    3290             :         // (add:{ *:[v8i16] } (zext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rn), (zext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rm))  =>  (UADDLv8i8_v8i16:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    3291             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADDLv8i8_v8i16,
    3292             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3293             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    3294             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rm
    3295             :         GIR_EraseFromParent, /*InsnID*/0,
    3296             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3297             :         // GIR_Coverage, 1335,
    3298             :         GIR_Done,
    3299             :       // Label 177: @6649
    3300             :       GIM_Try, /*On fail goto*//*Label 178*/ 6706, // Rule ID 3851 //
    3301             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3302             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    3303             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3304             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
    3305             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
    3306             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3307             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3308             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3309             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3310             :         // (add:{ *:[v8i16] } (mul:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm), V128:{ *:[v8i16] }:$Rd)  =>  (MLAv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
    3311             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLAv8i16,
    3312             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3313             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    3314             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    3315             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    3316             :         GIR_EraseFromParent, /*InsnID*/0,
    3317             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3318             :         // GIR_Coverage, 3851,
    3319             :         GIR_Done,
    3320             :       // Label 178: @6706
    3321             :       GIM_Try, /*On fail goto*//*Label 179*/ 6751, // Rule ID 3914 //
    3322             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3323             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    3324             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    3325             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    3326             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    3327             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3328             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3329             :         // (add:{ *:[v8i16] } (sext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rm), V128:{ *:[v8i16] }:$Rn)  =>  (SADDWv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    3330             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADDWv8i8_v8i16,
    3331             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3332             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    3333             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    3334             :         GIR_EraseFromParent, /*InsnID*/0,
    3335             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3336             :         // GIR_Coverage, 3914,
    3337             :         GIR_Done,
    3338             :       // Label 179: @6751
    3339             :       GIM_Try, /*On fail goto*//*Label 180*/ 6796, // Rule ID 3932 //
    3340             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3341             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    3342             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    3343             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    3344             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    3345             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3346             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3347             :         // (add:{ *:[v8i16] } (zext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rm), V128:{ *:[v8i16] }:$Rn)  =>  (UADDWv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    3348             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADDWv8i8_v8i16,
    3349             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3350             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    3351             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    3352             :         GIR_EraseFromParent, /*InsnID*/0,
    3353             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3354             :         // GIR_Coverage, 3932,
    3355             :         GIR_Done,
    3356             :       // Label 180: @6796
    3357             :       GIM_Try, /*On fail goto*//*Label 181*/ 6853, // Rule ID 939 //
    3358             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3359             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3360             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3361             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3362             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
    3363             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
    3364             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3365             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3366             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3367             :         // (add:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, (mul:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm))  =>  (MLAv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
    3368             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLAv8i16,
    3369             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3370             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    3371             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    3372             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    3373             :         GIR_EraseFromParent, /*InsnID*/0,
    3374             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3375             :         // GIR_Coverage, 939,
    3376             :         GIR_Done,
    3377             :       // Label 181: @6853
    3378             :       GIM_Try, /*On fail goto*//*Label 182*/ 6898, // Rule ID 1281 //
    3379             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3380             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3381             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3382             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    3383             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    3384             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    3385             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3386             :         // (add:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, (sext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rm))  =>  (SADDWv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    3387             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADDWv8i8_v8i16,
    3388             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3389             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    3390             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    3391             :         GIR_EraseFromParent, /*InsnID*/0,
    3392             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3393             :         // GIR_Coverage, 1281,
    3394             :         GIR_Done,
    3395             :       // Label 182: @6898
    3396             :       GIM_Try, /*On fail goto*//*Label 183*/ 6943, // Rule ID 1341 //
    3397             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3398             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3399             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3400             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    3401             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    3402             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    3403             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3404             :         // (add:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, (zext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rm))  =>  (UADDWv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    3405             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADDWv8i8_v8i16,
    3406             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3407             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    3408             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    3409             :         GIR_EraseFromParent, /*InsnID*/0,
    3410             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3411             :         // GIR_Coverage, 1341,
    3412             :         GIR_Done,
    3413             :       // Label 183: @6943
    3414             :       GIM_Try, /*On fail goto*//*Label 184*/ 6962, // Rule ID 763 //
    3415             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3416             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3417             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3418             :         // (add:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)  =>  (ADDv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
    3419             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ADDv8i16,
    3420             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3421             :         // GIR_Coverage, 763,
    3422             :         GIR_Done,
    3423             :       // Label 184: @6962
    3424             :       GIM_Reject,
    3425             :     // Label 159: @6963
    3426             :     GIM_Reject,
    3427             :     // Label 58: @6964
    3428             :     GIM_Try, /*On fail goto*//*Label 185*/ 7368,
    3429             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    3430             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    3431             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    3432             :       GIM_Try, /*On fail goto*//*Label 186*/ 7042, // Rule ID 3855 //
    3433             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3434             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    3435             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3436             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    3437             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    3438             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
    3439             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v16s8,
    3440             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3441             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    3442             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3443             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3444             :         // (add:{ *:[v16i8] } (intrinsic_wo_chain:{ *:[v16i8] } 268:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm), V128:{ *:[v16i8] }:$Rd)  =>  (SABAv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rd, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
    3445             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABAv16i8,
    3446             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3447             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    3448             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3449             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    3450             :         GIR_EraseFromParent, /*InsnID*/0,
    3451             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3452             :         // GIR_Coverage, 3855,
    3453             :         GIR_Done,
    3454             :       // Label 186: @7042
    3455             :       GIM_Try, /*On fail goto*//*Label 187*/ 7106, // Rule ID 3861 //
    3456             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3457             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    3458             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3459             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    3460             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    3461             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
    3462             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v16s8,
    3463             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3464             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    3465             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3466             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3467             :         // (add:{ *:[v16i8] } (intrinsic_wo_chain:{ *:[v16i8] } 326:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm), V128:{ *:[v16i8] }:$Rd)  =>  (UABAv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rd, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
    3468             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABAv16i8,
    3469             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3470             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    3471             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3472             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    3473             :         GIR_EraseFromParent, /*InsnID*/0,
    3474             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3475             :         // GIR_Coverage, 3861,
    3476             :         GIR_Done,
    3477             :       // Label 187: @7106
    3478             :       GIM_Try, /*On fail goto*//*Label 188*/ 7170, // Rule ID 957 //
    3479             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3480             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3481             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3482             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3483             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    3484             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    3485             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
    3486             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v16s8,
    3487             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3488             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    3489             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3490             :         // (add:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rd, (intrinsic_wo_chain:{ *:[v16i8] } 268:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm))  =>  (SABAv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rd, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
    3491             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABAv16i8,
    3492             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3493             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    3494             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3495             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    3496             :         GIR_EraseFromParent, /*InsnID*/0,
    3497             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3498             :         // GIR_Coverage, 957,
    3499             :         GIR_Done,
    3500             :       // Label 188: @7170
    3501             :       GIM_Try, /*On fail goto*//*Label 189*/ 7234, // Rule ID 1068 //
    3502             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3503             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3504             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3505             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3506             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    3507             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    3508             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
    3509             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v16s8,
    3510             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3511             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    3512             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3513             :         // (add:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rd, (intrinsic_wo_chain:{ *:[v16i8] } 326:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm))  =>  (UABAv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rd, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
    3514             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABAv16i8,
    3515             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3516             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    3517             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3518             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    3519             :         GIR_EraseFromParent, /*InsnID*/0,
    3520             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3521             :         // GIR_Coverage, 1068,
    3522             :         GIR_Done,
    3523             :       // Label 189: @7234
    3524             :       GIM_Try, /*On fail goto*//*Label 190*/ 7291, // Rule ID 3849 //
    3525             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3526             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    3527             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3528             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
    3529             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
    3530             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3531             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3532             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3533             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3534             :         // (add:{ *:[v16i8] } (mul:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm), V128:{ *:[v16i8] }:$Rd)  =>  (MLAv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rd, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
    3535             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLAv16i8,
    3536             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3537             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    3538             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    3539             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    3540             :         GIR_EraseFromParent, /*InsnID*/0,
    3541             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3542             :         // GIR_Coverage, 3849,
    3543             :         GIR_Done,
    3544             :       // Label 190: @7291
    3545             :       GIM_Try, /*On fail goto*//*Label 191*/ 7348, // Rule ID 937 //
    3546             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3547             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3548             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3549             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3550             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
    3551             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
    3552             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3553             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3554             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3555             :         // (add:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rd, (mul:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm))  =>  (MLAv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rd, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
    3556             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLAv16i8,
    3557             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3558             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    3559             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    3560             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    3561             :         GIR_EraseFromParent, /*InsnID*/0,
    3562             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3563             :         // GIR_Coverage, 937,
    3564             :         GIR_Done,
    3565             :       // Label 191: @7348
    3566             :       GIM_Try, /*On fail goto*//*Label 192*/ 7367, // Rule ID 761 //
    3567             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3568             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3569             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3570             :         // (add:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (ADDv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
    3571             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ADDv16i8,
    3572             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3573             :         // GIR_Coverage, 761,
    3574             :         GIR_Done,
    3575             :       // Label 192: @7367
    3576             :       GIM_Reject,
    3577             :     // Label 185: @7368
    3578             :     GIM_Reject,
    3579             :     // Label 59: @7369
    3580             :     GIM_Reject,
    3581             :     // Label 1: @7370
    3582             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 11, /*)*//*default:*//*Label 202*/ 9950,
    3583             :     /*GILLT_s32*//*Label 193*/ 7386,
    3584             :     /*GILLT_s64*//*Label 194*/ 7506, 0,
    3585             :     /*GILLT_v2s32*//*Label 195*/ 8377,
    3586             :     /*GILLT_v2s64*//*Label 196*/ 8465,
    3587             :     /*GILLT_v4s16*//*Label 197*/ 8834,
    3588             :     /*GILLT_v4s32*//*Label 198*/ 8922,
    3589             :     /*GILLT_v8s8*//*Label 199*/ 9348,
    3590             :     /*GILLT_v8s16*//*Label 200*/ 9436,
    3591             :     /*GILLT_v16s8*//*Label 201*/ 9862,
    3592             :     // Label 193: @7386
    3593             :     GIM_Try, /*On fail goto*//*Label 203*/ 7505,
    3594             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    3595             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    3596             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    3597             :       GIM_Try, /*On fail goto*//*Label 204*/ 7454, // Rule ID 1871 //
    3598             :         GIM_CheckConstantInt, /*MI*/0, /*Op*/1, 0,
    3599             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3600             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3601             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    3602             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    3603             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    3604             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    3605             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3606             :         // (sub:{ *:[i32] } 0:{ *:[i32] }, (mul:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm))  =>  (MSUBWrrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm, WZR:{ *:[i32] })
    3607             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MSUBWrrr,
    3608             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3609             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    3610             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    3611             :         GIR_AddRegister, /*InsnID*/0, AArch64::WZR,
    3612             :         GIR_EraseFromParent, /*InsnID*/0,
    3613             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3614             :         // GIR_Coverage, 1871,
    3615             :         GIR_Done,
    3616             :       // Label 204: @7454
    3617             :       GIM_Try, /*On fail goto*//*Label 205*/ 7484, // Rule ID 1837 //
    3618             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32spRegClassID,
    3619             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/2, /*Renderer*/0, GICP_gi_addsub_shifted_imm32,
    3620             :         // (sub:{ *:[i32] } GPR32sp:{ *:[i32] }:$Rn, addsub_shifted_imm32:{ *:[i32] }:$imm)  =>  (SUBSWri:{ *:[i32] }:{ *:[i32] } GPR32sp:{ *:[i32] }:$Rn, addsub_shifted_imm32:{ *:[i32] }:$imm)
    3621             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SUBSWri,
    3622             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3623             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    3624             :         GIR_ComplexRenderer, /*InsnID*/0, /*RendererID*/0, // imm
    3625             :         GIR_EraseFromParent, /*InsnID*/0,
    3626             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3627             :         // GIR_Coverage, 1837,
    3628             :         GIR_Done,
    3629             :       // Label 205: @7484
    3630             :       GIM_Try, /*On fail goto*//*Label 206*/ 7504, // Rule ID 1839 //
    3631             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    3632             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    3633             :         // (sub:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)  =>  (SUBSWrr:{ *:[i32] }:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
    3634             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SUBSWrr,
    3635             :         GIR_AddImplicitDef, /*InsnID*/0, AArch64::NZCV,
    3636             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3637             :         // GIR_Coverage, 1839,
    3638             :         GIR_Done,
    3639             :       // Label 206: @7504
    3640             :       GIM_Reject,
    3641             :     // Label 203: @7505
    3642             :     GIM_Reject,
    3643             :     // Label 194: @7506
    3644             :     GIM_Try, /*On fail goto*//*Label 207*/ 8376,
    3645             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    3646             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    3647             :       GIM_Try, /*On fail goto*//*Label 208*/ 7611, // Rule ID 1882 //
    3648             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    3649             :         GIM_CheckConstantInt, /*MI*/0, /*Op*/1, 0,
    3650             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3651             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3652             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    3653             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    3654             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    3655             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
    3656             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    3657             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    3658             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
    3659             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_CONSTANT,
    3660             :         GIM_CheckI64ImmPredicate, /*MI*/3, /*Predicate*/GIPFP_I64_Predicate_s64imm_32bit,
    3661             :         // MIs[3] Operand 1
    3662             :         // No operand predicates
    3663             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3664             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    3665             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
    3666             :         // (sub:{ *:[i64] } 0:{ *:[i64] }, (mul:{ *:[i64] } (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (imm:{ *:[i64] })<<P:Predicate_s64imm_32bit>>:$C))  =>  (SMSUBLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, (MOVi32imm:{ *:[i32] } (trunc_imm:{ *:[i32] } (imm:{ *:[i64] }):$C)), XZR:{ *:[i64] })
    3667             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
    3668             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::MOVi32imm,
    3669             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    3670             :         GIR_CustomRenderer, /*InsnID*/1, /*OldInsnID*/3, /*Renderer*/GICR_renderTruncImm, // C
    3671             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    3672             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMSUBLrrr,
    3673             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3674             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    3675             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    3676             :         GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
    3677             :         GIR_EraseFromParent, /*InsnID*/0,
    3678             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3679             :         // GIR_Coverage, 1882,
    3680             :         GIR_Done,
    3681             :       // Label 208: @7611
    3682             :       GIM_Try, /*On fail goto*//*Label 209*/ 7706, // Rule ID 1883 //
    3683             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    3684             :         GIM_CheckConstantInt, /*MI*/0, /*Op*/1, 0,
    3685             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3686             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3687             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    3688             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    3689             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    3690             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
    3691             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    3692             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    3693             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
    3694             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_CONSTANT,
    3695             :         GIM_CheckI64ImmPredicate, /*MI*/3, /*Predicate*/GIPFP_I64_Predicate_i64imm_32bit,
    3696             :         // MIs[3] Operand 1
    3697             :         // No operand predicates
    3698             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3699             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    3700             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
    3701             :         // (sub:{ *:[i64] } 0:{ *:[i64] }, (mul:{ *:[i64] } (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (imm:{ *:[i64] })<<P:Predicate_i64imm_32bit>>:$C))  =>  (UMSUBLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, (MOVi32imm:{ *:[i32] } (trunc_imm:{ *:[i32] } (imm:{ *:[i64] }):$C)), XZR:{ *:[i64] })
    3702             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
    3703             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::MOVi32imm,
    3704             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    3705             :         GIR_CustomRenderer, /*InsnID*/1, /*OldInsnID*/3, /*Renderer*/GICR_renderTruncImm, // C
    3706             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    3707             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMSUBLrrr,
    3708             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3709             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    3710             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    3711             :         GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
    3712             :         GIR_EraseFromParent, /*InsnID*/0,
    3713             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3714             :         // GIR_Coverage, 1883,
    3715             :         GIR_Done,
    3716             :       // Label 209: @7706
    3717             :       GIM_Try, /*On fail goto*//*Label 210*/ 7790, // Rule ID 1877 //
    3718             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    3719             :         GIM_CheckConstantInt, /*MI*/0, /*Op*/1, 0,
    3720             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3721             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3722             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    3723             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    3724             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    3725             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
    3726             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    3727             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    3728             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
    3729             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_SEXT,
    3730             :         GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_s32,
    3731             :         GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    3732             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3733             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    3734             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
    3735             :         // (sub:{ *:[i64] } 0:{ *:[i64] }, (mul:{ *:[i64] } (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rm)))  =>  (SMSUBLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm, XZR:{ *:[i64] })
    3736             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMSUBLrrr,
    3737             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3738             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    3739             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // Rm
    3740             :         GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
    3741             :         GIR_EraseFromParent, /*InsnID*/0,
    3742             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3743             :         // GIR_Coverage, 1877,
    3744             :         GIR_Done,
    3745             :       // Label 210: @7790
    3746             :       GIM_Try, /*On fail goto*//*Label 211*/ 7874, // Rule ID 1878 //
    3747             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    3748             :         GIM_CheckConstantInt, /*MI*/0, /*Op*/1, 0,
    3749             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3750             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3751             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    3752             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    3753             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    3754             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
    3755             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    3756             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    3757             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
    3758             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_ZEXT,
    3759             :         GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_s32,
    3760             :         GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    3761             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3762             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    3763             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
    3764             :         // (sub:{ *:[i64] } 0:{ *:[i64] }, (mul:{ *:[i64] } (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rm)))  =>  (UMSUBLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm, XZR:{ *:[i64] })
    3765             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMSUBLrrr,
    3766             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3767             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    3768             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // Rm
    3769             :         GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
    3770             :         GIR_EraseFromParent, /*InsnID*/0,
    3771             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3772             :         // GIR_Coverage, 1878,
    3773             :         GIR_Done,
    3774             :       // Label 211: @7874
    3775             :       GIM_Try, /*On fail goto*//*Label 212*/ 7970, // Rule ID 1888 //
    3776             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    3777             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    3778             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3779             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3780             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    3781             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    3782             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    3783             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
    3784             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    3785             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    3786             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
    3787             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_CONSTANT,
    3788             :         GIM_CheckI64ImmPredicate, /*MI*/3, /*Predicate*/GIPFP_I64_Predicate_s64imm_32bit,
    3789             :         // MIs[3] Operand 1
    3790             :         // No operand predicates
    3791             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3792             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    3793             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
    3794             :         // (sub:{ *:[i64] } GPR64:{ *:[i64] }:$Ra, (mul:{ *:[i64] } (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (imm:{ *:[i64] })<<P:Predicate_s64imm_32bit>>:$C))  =>  (SMSUBLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, (MOVi32imm:{ *:[i32] } (trunc_imm:{ *:[i32] } (imm:{ *:[i64] }):$C)), GPR64:{ *:[i64] }:$Ra)
    3795             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
    3796             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::MOVi32imm,
    3797             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    3798             :         GIR_CustomRenderer, /*InsnID*/1, /*OldInsnID*/3, /*Renderer*/GICR_renderTruncImm, // C
    3799             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    3800             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMSUBLrrr,
    3801             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3802             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    3803             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    3804             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Ra
    3805             :         GIR_EraseFromParent, /*InsnID*/0,
    3806             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3807             :         // GIR_Coverage, 1888,
    3808             :         GIR_Done,
    3809             :       // Label 212: @7970
    3810             :       GIM_Try, /*On fail goto*//*Label 213*/ 8066, // Rule ID 1889 //
    3811             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    3812             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    3813             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3814             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3815             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    3816             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    3817             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    3818             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
    3819             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    3820             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    3821             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
    3822             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_CONSTANT,
    3823             :         GIM_CheckI64ImmPredicate, /*MI*/3, /*Predicate*/GIPFP_I64_Predicate_i64imm_32bit,
    3824             :         // MIs[3] Operand 1
    3825             :         // No operand predicates
    3826             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3827             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    3828             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
    3829             :         // (sub:{ *:[i64] } GPR64:{ *:[i64] }:$Ra, (mul:{ *:[i64] } (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (imm:{ *:[i64] })<<P:Predicate_i64imm_32bit>>:$C))  =>  (UMSUBLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, (MOVi32imm:{ *:[i32] } (trunc_imm:{ *:[i32] } (imm:{ *:[i64] }):$C)), GPR64:{ *:[i64] }:$Ra)
    3830             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
    3831             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::MOVi32imm,
    3832             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    3833             :         GIR_CustomRenderer, /*InsnID*/1, /*OldInsnID*/3, /*Renderer*/GICR_renderTruncImm, // C
    3834             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    3835             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMSUBLrrr,
    3836             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3837             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    3838             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    3839             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Ra
    3840             :         GIR_EraseFromParent, /*InsnID*/0,
    3841             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3842             :         // GIR_Coverage, 1889,
    3843             :         GIR_Done,
    3844             :       // Label 213: @8066
    3845             :       GIM_Try, /*On fail goto*//*Label 214*/ 8151, // Rule ID 66 //
    3846             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    3847             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    3848             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3849             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3850             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    3851             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    3852             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    3853             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
    3854             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    3855             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    3856             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
    3857             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_SEXT,
    3858             :         GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_s32,
    3859             :         GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    3860             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3861             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    3862             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
    3863             :         // (sub:{ *:[i64] } GPR64:{ *:[i64] }:$Ra, (mul:{ *:[i64] } (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rm)))  =>  (SMSUBLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm, GPR64:{ *:[i64] }:$Ra)
    3864             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMSUBLrrr,
    3865             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3866             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    3867             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // Rm
    3868             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Ra
    3869             :         GIR_EraseFromParent, /*InsnID*/0,
    3870             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3871             :         // GIR_Coverage, 66,
    3872             :         GIR_Done,
    3873             :       // Label 214: @8151
    3874             :       GIM_Try, /*On fail goto*//*Label 215*/ 8236, // Rule ID 68 //
    3875             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    3876             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    3877             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3878             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3879             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    3880             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    3881             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    3882             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
    3883             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    3884             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    3885             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
    3886             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_ZEXT,
    3887             :         GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_s32,
    3888             :         GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    3889             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3890             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    3891             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
    3892             :         // (sub:{ *:[i64] } GPR64:{ *:[i64] }:$Ra, (mul:{ *:[i64] } (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rm)))  =>  (UMSUBLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm, GPR64:{ *:[i64] }:$Ra)
    3893             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMSUBLrrr,
    3894             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3895             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    3896             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // Rm
    3897             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Ra
    3898             :         GIR_EraseFromParent, /*InsnID*/0,
    3899             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3900             :         // GIR_Coverage, 68,
    3901             :         GIR_Done,
    3902             :       // Label 215: @8236
    3903             :       GIM_Try, /*On fail goto*//*Label 216*/ 8294, // Rule ID 1872 //
    3904             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    3905             :         GIM_CheckConstantInt, /*MI*/0, /*Op*/1, 0,
    3906             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3907             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3908             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    3909             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    3910             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    3911             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    3912             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3913             :         // (sub:{ *:[i64] } 0:{ *:[i64] }, (mul:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm))  =>  (MSUBXrrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm, XZR:{ *:[i64] })
    3914             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MSUBXrrr,
    3915             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3916             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    3917             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    3918             :         GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
    3919             :         GIR_EraseFromParent, /*InsnID*/0,
    3920             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3921             :         // GIR_Coverage, 1872,
    3922             :         GIR_Done,
    3923             :       // Label 216: @8294
    3924             :       GIM_Try, /*On fail goto*//*Label 217*/ 8328, // Rule ID 1838 //
    3925             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    3926             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
    3927             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/2, /*Renderer*/0, GICP_gi_addsub_shifted_imm64,
    3928             :         // (sub:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, addsub_shifted_imm64:{ *:[i64] }:$imm)  =>  (SUBSXri:{ *:[i64] }:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, addsub_shifted_imm64:{ *:[i64] }:$imm)
    3929             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SUBSXri,
    3930             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3931             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    3932             :         GIR_ComplexRenderer, /*InsnID*/0, /*RendererID*/0, // imm
    3933             :         GIR_EraseFromParent, /*InsnID*/0,
    3934             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3935             :         // GIR_Coverage, 1838,
    3936             :         GIR_Done,
    3937             :       // Label 217: @8328
    3938             :       GIM_Try, /*On fail goto*//*Label 218*/ 8351, // Rule ID 1222 //
    3939             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3940             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    3941             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    3942             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    3943             :         // (sub:{ *:[v1i64] } FPR64:{ *:[v1i64] }:$Rn, FPR64:{ *:[v1i64] }:$Rm)  =>  (SUBv1i64:{ *:[v1i64] } FPR64:{ *:[v1i64] }:$Rn, FPR64:{ *:[v1i64] }:$Rm)
    3944             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SUBv1i64,
    3945             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3946             :         // GIR_Coverage, 1222,
    3947             :         GIR_Done,
    3948             :       // Label 218: @8351
    3949             :       GIM_Try, /*On fail goto*//*Label 219*/ 8375, // Rule ID 1840 //
    3950             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    3951             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    3952             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    3953             :         // (sub:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)  =>  (SUBSXrr:{ *:[i64] }:{ *:[i32] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
    3954             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SUBSXrr,
    3955             :         GIR_AddImplicitDef, /*InsnID*/0, AArch64::NZCV,
    3956             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3957             :         // GIR_Coverage, 1840,
    3958             :         GIR_Done,
    3959             :       // Label 219: @8375
    3960             :       GIM_Reject,
    3961             :     // Label 207: @8376
    3962             :     GIM_Reject,
    3963             :     // Label 195: @8377
    3964             :     GIM_Try, /*On fail goto*//*Label 220*/ 8464,
    3965             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    3966             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    3967             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    3968             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    3969             :       GIM_Try, /*On fail goto*//*Label 221*/ 8448, // Rule ID 946 //
    3970             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3971             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3972             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3973             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    3974             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    3975             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    3976             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    3977             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3978             :         // (sub:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, (mul:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm))  =>  (MLSv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    3979             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLSv2i32,
    3980             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3981             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    3982             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    3983             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    3984             :         GIR_EraseFromParent, /*InsnID*/0,
    3985             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3986             :         // GIR_Coverage, 946,
    3987             :         GIR_Done,
    3988             :       // Label 221: @8448
    3989             :       GIM_Try, /*On fail goto*//*Label 222*/ 8463, // Rule ID 1064 //
    3990             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3991             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    3992             :         // (sub:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)  =>  (SUBv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    3993             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SUBv2i32,
    3994             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3995             :         // GIR_Coverage, 1064,
    3996             :         GIR_Done,
    3997             :       // Label 222: @8463
    3998             :       GIM_Reject,
    3999             :     // Label 220: @8464
    4000             :     GIM_Reject,
    4001             :     // Label 196: @8465
    4002             :     GIM_Try, /*On fail goto*//*Label 223*/ 8833,
    4003             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    4004             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    4005             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    4006             :       GIM_Try, /*On fail goto*//*Label 224*/ 8543, // Rule ID 1297 //
    4007             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4008             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4009             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4010             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    4011             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    4012             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_smull,
    4013             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    4014             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s32,
    4015             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4016             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    4017             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4018             :         // (sub:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, (intrinsic_wo_chain:{ *:[v2i64] } 285:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm))  =>  (SMLSLv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    4019             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMLSLv2i32_v2i64,
    4020             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4021             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    4022             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    4023             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    4024             :         GIR_EraseFromParent, /*InsnID*/0,
    4025             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4026             :         // GIR_Coverage, 1297,
    4027             :         GIR_Done,
    4028             :       // Label 224: @8543
    4029             :       GIM_Try, /*On fail goto*//*Label 225*/ 8607, // Rule ID 1357 //
    4030             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4031             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4032             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4033             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    4034             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    4035             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_umull,
    4036             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    4037             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s32,
    4038             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4039             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    4040             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4041             :         // (sub:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, (intrinsic_wo_chain:{ *:[v2i64] } 339:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm))  =>  (UMLSLv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    4042             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMLSLv2i32_v2i64,
    4043             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4044             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    4045             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    4046             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    4047             :         GIR_EraseFromParent, /*InsnID*/0,
    4048             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4049             :         // GIR_Coverage, 1357,
    4050             :         GIR_Done,
    4051             :       // Label 225: @8607
    4052             :       GIM_Try, /*On fail goto*//*Label 226*/ 8665, // Rule ID 1321 //
    4053             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4054             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    4055             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    4056             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    4057             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4058             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    4059             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
    4060             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s32,
    4061             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4062             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4063             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    4064             :         // (sub:{ *:[v2i64] } (sext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rn), (sext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rm))  =>  (SSUBLv2i32_v2i64:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    4065             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SSUBLv2i32_v2i64,
    4066             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4067             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4068             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rm
    4069             :         GIR_EraseFromParent, /*InsnID*/0,
    4070             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4071             :         // GIR_Coverage, 1321,
    4072             :         GIR_Done,
    4073             :       // Label 226: @8665
    4074             :       GIM_Try, /*On fail goto*//*Label 227*/ 8723, // Rule ID 1369 //
    4075             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4076             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    4077             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    4078             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    4079             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4080             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    4081             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
    4082             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s32,
    4083             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4084             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4085             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    4086             :         // (sub:{ *:[v2i64] } (zext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rn), (zext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rm))  =>  (USUBLv2i32_v2i64:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    4087             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USUBLv2i32_v2i64,
    4088             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4089             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4090             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rm
    4091             :         GIR_EraseFromParent, /*InsnID*/0,
    4092             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4093             :         // GIR_Coverage, 1369,
    4094             :         GIR_Done,
    4095             :       // Label 227: @8723
    4096             :       GIM_Try, /*On fail goto*//*Label 228*/ 8768, // Rule ID 1327 //
    4097             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4098             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4099             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4100             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    4101             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    4102             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4103             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4104             :         // (sub:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, (sext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rm))  =>  (SSUBWv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    4105             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SSUBWv2i32_v2i64,
    4106             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4107             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    4108             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    4109             :         GIR_EraseFromParent, /*InsnID*/0,
    4110             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4111             :         // GIR_Coverage, 1327,
    4112             :         GIR_Done,
    4113             :       // Label 228: @8768
    4114             :       GIM_Try, /*On fail goto*//*Label 229*/ 8813, // Rule ID 1375 //
    4115             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4116             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4117             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4118             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    4119             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    4120             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4121             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4122             :         // (sub:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, (zext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rm))  =>  (USUBWv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    4123             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USUBWv2i32_v2i64,
    4124             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4125             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    4126             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    4127             :         GIR_EraseFromParent, /*InsnID*/0,
    4128             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4129             :         // GIR_Coverage, 1375,
    4130             :         GIR_Done,
    4131             :       // Label 229: @8813
    4132             :       GIM_Try, /*On fail goto*//*Label 230*/ 8832, // Rule ID 1066 //
    4133             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4134             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4135             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    4136             :         // (sub:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)  =>  (SUBv2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)
    4137             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SUBv2i64,
    4138             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4139             :         // GIR_Coverage, 1066,
    4140             :         GIR_Done,
    4141             :       // Label 230: @8832
    4142             :       GIM_Reject,
    4143             :     // Label 223: @8833
    4144             :     GIM_Reject,
    4145             :     // Label 197: @8834
    4146             :     GIM_Try, /*On fail goto*//*Label 231*/ 8921,
    4147             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    4148             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    4149             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    4150             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4151             :       GIM_Try, /*On fail goto*//*Label 232*/ 8905, // Rule ID 944 //
    4152             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4153             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4154             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    4155             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    4156             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    4157             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4158             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4159             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4160             :         // (sub:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, (mul:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm))  =>  (MLSv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    4161             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLSv4i16,
    4162             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4163             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    4164             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4165             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    4166             :         GIR_EraseFromParent, /*InsnID*/0,
    4167             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4168             :         // GIR_Coverage, 944,
    4169             :         GIR_Done,
    4170             :       // Label 232: @8905
    4171             :       GIM_Try, /*On fail goto*//*Label 233*/ 8920, // Rule ID 1062 //
    4172             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4173             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4174             :         // (sub:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)  =>  (SUBv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    4175             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SUBv4i16,
    4176             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4177             :         // GIR_Coverage, 1062,
    4178             :         GIR_Done,
    4179             :       // Label 233: @8920
    4180             :       GIM_Reject,
    4181             :     // Label 231: @8921
    4182             :     GIM_Reject,
    4183             :     // Label 198: @8922
    4184             :     GIM_Try, /*On fail goto*//*Label 234*/ 9347,
    4185             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    4186             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    4187             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    4188             :       GIM_Try, /*On fail goto*//*Label 235*/ 9000, // Rule ID 1295 //
    4189             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4190             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4191             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4192             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    4193             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    4194             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_smull,
    4195             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    4196             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s16,
    4197             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4198             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    4199             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4200             :         // (sub:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, (intrinsic_wo_chain:{ *:[v4i32] } 285:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm))  =>  (SMLSLv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    4201             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMLSLv4i16_v4i32,
    4202             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4203             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    4204             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    4205             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    4206             :         GIR_EraseFromParent, /*InsnID*/0,
    4207             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4208             :         // GIR_Coverage, 1295,
    4209             :         GIR_Done,
    4210             :       // Label 235: @9000
    4211             :       GIM_Try, /*On fail goto*//*Label 236*/ 9064, // Rule ID 1355 //
    4212             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4213             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4214             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4215             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    4216             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    4217             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_umull,
    4218             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    4219             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s16,
    4220             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4221             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    4222             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4223             :         // (sub:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, (intrinsic_wo_chain:{ *:[v4i32] } 339:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm))  =>  (UMLSLv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    4224             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMLSLv4i16_v4i32,
    4225             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4226             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    4227             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    4228             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    4229             :         GIR_EraseFromParent, /*InsnID*/0,
    4230             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4231             :         // GIR_Coverage, 1355,
    4232             :         GIR_Done,
    4233             :       // Label 236: @9064
    4234             :       GIM_Try, /*On fail goto*//*Label 237*/ 9122, // Rule ID 1319 //
    4235             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4236             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    4237             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    4238             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    4239             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4240             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    4241             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
    4242             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s16,
    4243             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4244             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4245             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    4246             :         // (sub:{ *:[v4i32] } (sext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rn), (sext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rm))  =>  (SSUBLv4i16_v4i32:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    4247             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SSUBLv4i16_v4i32,
    4248             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4249             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4250             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rm
    4251             :         GIR_EraseFromParent, /*InsnID*/0,
    4252             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4253             :         // GIR_Coverage, 1319,
    4254             :         GIR_Done,
    4255             :       // Label 237: @9122
    4256             :       GIM_Try, /*On fail goto*//*Label 238*/ 9180, // Rule ID 1367 //
    4257             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4258             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    4259             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    4260             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    4261             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4262             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    4263             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
    4264             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s16,
    4265             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4266             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4267             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    4268             :         // (sub:{ *:[v4i32] } (zext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rn), (zext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rm))  =>  (USUBLv4i16_v4i32:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    4269             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USUBLv4i16_v4i32,
    4270             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4271             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4272             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rm
    4273             :         GIR_EraseFromParent, /*InsnID*/0,
    4274             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4275             :         // GIR_Coverage, 1367,
    4276             :         GIR_Done,
    4277             :       // Label 238: @9180
    4278             :       GIM_Try, /*On fail goto*//*Label 239*/ 9237, // Rule ID 947 //
    4279             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4280             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4281             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4282             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    4283             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
    4284             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
    4285             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4286             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    4287             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4288             :         // (sub:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, (mul:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm))  =>  (MLSv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
    4289             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLSv4i32,
    4290             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4291             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    4292             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4293             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    4294             :         GIR_EraseFromParent, /*InsnID*/0,
    4295             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4296             :         // GIR_Coverage, 947,
    4297             :         GIR_Done,
    4298             :       // Label 239: @9237
    4299             :       GIM_Try, /*On fail goto*//*Label 240*/ 9282, // Rule ID 1325 //
    4300             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4301             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4302             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4303             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    4304             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    4305             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4306             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4307             :         // (sub:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, (sext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rm))  =>  (SSUBWv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    4308             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SSUBWv4i16_v4i32,
    4309             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4310             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    4311             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    4312             :         GIR_EraseFromParent, /*InsnID*/0,
    4313             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4314             :         // GIR_Coverage, 1325,
    4315             :         GIR_Done,
    4316             :       // Label 240: @9282
    4317             :       GIM_Try, /*On fail goto*//*Label 241*/ 9327, // Rule ID 1373 //
    4318             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4319             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4320             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4321             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    4322             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    4323             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4324             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4325             :         // (sub:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, (zext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rm))  =>  (USUBWv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    4326             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USUBWv4i16_v4i32,
    4327             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4328             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    4329             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    4330             :         GIR_EraseFromParent, /*InsnID*/0,
    4331             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4332             :         // GIR_Coverage, 1373,
    4333             :         GIR_Done,
    4334             :       // Label 241: @9327
    4335             :       GIM_Try, /*On fail goto*//*Label 242*/ 9346, // Rule ID 1065 //
    4336             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4337             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4338             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    4339             :         // (sub:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (SUBv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
    4340             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SUBv4i32,
    4341             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4342             :         // GIR_Coverage, 1065,
    4343             :         GIR_Done,
    4344             :       // Label 242: @9346
    4345             :       GIM_Reject,
    4346             :     // Label 234: @9347
    4347             :     GIM_Reject,
    4348             :     // Label 199: @9348
    4349             :     GIM_Try, /*On fail goto*//*Label 243*/ 9435,
    4350             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    4351             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
    4352             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    4353             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4354             :       GIM_Try, /*On fail goto*//*Label 244*/ 9419, // Rule ID 942 //
    4355             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4356             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4357             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    4358             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    4359             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    4360             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4361             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4362             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4363             :         // (sub:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rd, (mul:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm))  =>  (MLSv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    4364             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLSv8i8,
    4365             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4366             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    4367             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4368             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    4369             :         GIR_EraseFromParent, /*InsnID*/0,
    4370             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4371             :         // GIR_Coverage, 942,
    4372             :         GIR_Done,
    4373             :       // Label 244: @9419
    4374             :       GIM_Try, /*On fail goto*//*Label 245*/ 9434, // Rule ID 1060 //
    4375             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4376             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4377             :         // (sub:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (SUBv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    4378             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SUBv8i8,
    4379             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4380             :         // GIR_Coverage, 1060,
    4381             :         GIR_Done,
    4382             :       // Label 245: @9434
    4383             :       GIM_Reject,
    4384             :     // Label 243: @9435
    4385             :     GIM_Reject,
    4386             :     // Label 200: @9436
    4387             :     GIM_Try, /*On fail goto*//*Label 246*/ 9861,
    4388             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    4389             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    4390             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    4391             :       GIM_Try, /*On fail goto*//*Label 247*/ 9514, // Rule ID 1293 //
    4392             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4393             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4394             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4395             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    4396             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    4397             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_smull,
    4398             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    4399             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s8,
    4400             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4401             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    4402             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4403             :         // (sub:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, (intrinsic_wo_chain:{ *:[v8i16] } 285:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm))  =>  (SMLSLv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    4404             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMLSLv8i8_v8i16,
    4405             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4406             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    4407             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    4408             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    4409             :         GIR_EraseFromParent, /*InsnID*/0,
    4410             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4411             :         // GIR_Coverage, 1293,
    4412             :         GIR_Done,
    4413             :       // Label 247: @9514
    4414             :       GIM_Try, /*On fail goto*//*Label 248*/ 9578, // Rule ID 1353 //
    4415             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4416             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4417             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4418             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    4419             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    4420             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_umull,
    4421             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    4422             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s8,
    4423             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4424             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    4425             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4426             :         // (sub:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, (intrinsic_wo_chain:{ *:[v8i16] } 339:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm))  =>  (UMLSLv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    4427             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMLSLv8i8_v8i16,
    4428             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4429             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    4430             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    4431             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    4432             :         GIR_EraseFromParent, /*InsnID*/0,
    4433             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4434             :         // GIR_Coverage, 1353,
    4435             :         GIR_Done,
    4436             :       // Label 248: @9578
    4437             :       GIM_Try, /*On fail goto*//*Label 249*/ 9636, // Rule ID 1317 //
    4438             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4439             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    4440             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    4441             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    4442             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4443             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    4444             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
    4445             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s8,
    4446             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4447             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4448             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    4449             :         // (sub:{ *:[v8i16] } (sext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rn), (sext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rm))  =>  (SSUBLv8i8_v8i16:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    4450             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SSUBLv8i8_v8i16,
    4451             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4452             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4453             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rm
    4454             :         GIR_EraseFromParent, /*InsnID*/0,
    4455             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4456             :         // GIR_Coverage, 1317,
    4457             :         GIR_Done,
    4458             :       // Label 249: @9636
    4459             :       GIM_Try, /*On fail goto*//*Label 250*/ 9694, // Rule ID 1365 //
    4460             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4461             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    4462             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    4463             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    4464             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4465             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    4466             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
    4467             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s8,
    4468             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4469             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4470             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    4471             :         // (sub:{ *:[v8i16] } (zext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rn), (zext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rm))  =>  (USUBLv8i8_v8i16:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    4472             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USUBLv8i8_v8i16,
    4473             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4474             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4475             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rm
    4476             :         GIR_EraseFromParent, /*InsnID*/0,
    4477             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4478             :         // GIR_Coverage, 1365,
    4479             :         GIR_Done,
    4480             :       // Label 250: @9694
    4481             :       GIM_Try, /*On fail goto*//*Label 251*/ 9751, // Rule ID 945 //
    4482             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4483             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4484             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4485             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    4486             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
    4487             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
    4488             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4489             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    4490             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4491             :         // (sub:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, (mul:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm))  =>  (MLSv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
    4492             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLSv8i16,
    4493             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4494             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    4495             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4496             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    4497             :         GIR_EraseFromParent, /*InsnID*/0,
    4498             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4499             :         // GIR_Coverage, 945,
    4500             :         GIR_Done,
    4501             :       // Label 251: @9751
    4502             :       GIM_Try, /*On fail goto*//*Label 252*/ 9796, // Rule ID 1323 //
    4503             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4504             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4505             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4506             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    4507             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    4508             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4509             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4510             :         // (sub:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, (sext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rm))  =>  (SSUBWv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    4511             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SSUBWv8i8_v8i16,
    4512             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4513             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    4514             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    4515             :         GIR_EraseFromParent, /*InsnID*/0,
    4516             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4517             :         // GIR_Coverage, 1323,
    4518             :         GIR_Done,
    4519             :       // Label 252: @9796
    4520             :       GIM_Try, /*On fail goto*//*Label 253*/ 9841, // Rule ID 1371 //
    4521             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4522             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4523             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4524             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    4525             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    4526             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4527             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4528             :         // (sub:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, (zext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rm))  =>  (USUBWv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    4529             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USUBWv8i8_v8i16,
    4530             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4531             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    4532             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    4533             :         GIR_EraseFromParent, /*InsnID*/0,
    4534             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4535             :         // GIR_Coverage, 1371,
    4536             :         GIR_Done,
    4537             :       // Label 253: @9841
    4538             :       GIM_Try, /*On fail goto*//*Label 254*/ 9860, // Rule ID 1063 //
    4539             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4540             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4541             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    4542             :         // (sub:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)  =>  (SUBv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
    4543             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SUBv8i16,
    4544             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4545             :         // GIR_Coverage, 1063,
    4546             :         GIR_Done,
    4547             :       // Label 254: @9860
    4548             :       GIM_Reject,
    4549             :     // Label 246: @9861
    4550             :     GIM_Reject,
    4551             :     // Label 201: @9862
    4552             :     GIM_Try, /*On fail goto*//*Label 255*/ 9949,
    4553             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    4554             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    4555             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    4556             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4557             :       GIM_Try, /*On fail goto*//*Label 256*/ 9933, // Rule ID 943 //
    4558             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4559             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4560             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    4561             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
    4562             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
    4563             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4564             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    4565             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4566             :         // (sub:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rd, (mul:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm))  =>  (MLSv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rd, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
    4567             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLSv16i8,
    4568             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4569             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    4570             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4571             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    4572             :         GIR_EraseFromParent, /*InsnID*/0,
    4573             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4574             :         // GIR_Coverage, 943,
    4575             :         GIR_Done,
    4576             :       // Label 256: @9933
    4577             :       GIM_Try, /*On fail goto*//*Label 257*/ 9948, // Rule ID 1061 //
    4578             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4579             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    4580             :         // (sub:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (SUBv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
    4581             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SUBv16i8,
    4582             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4583             :         // GIR_Coverage, 1061,
    4584             :         GIR_Done,
    4585             :       // Label 257: @9948
    4586             :       GIM_Reject,
    4587             :     // Label 255: @9949
    4588             :     GIM_Reject,
    4589             :     // Label 202: @9950
    4590             :     GIM_Reject,
    4591             :     // Label 2: @9951
    4592             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 11, /*)*//*default:*//*Label 266*/ 10731,
    4593             :     /*GILLT_s32*//*Label 258*/ 9967,
    4594             :     /*GILLT_s64*//*Label 259*/ 10124, 0,
    4595             :     /*GILLT_v2s32*//*Label 260*/ 10539, 0,
    4596             :     /*GILLT_v4s16*//*Label 261*/ 10571,
    4597             :     /*GILLT_v4s32*//*Label 262*/ 10603,
    4598             :     /*GILLT_v8s8*//*Label 263*/ 10635,
    4599             :     /*GILLT_v8s16*//*Label 264*/ 10667,
    4600             :     /*GILLT_v16s8*//*Label 265*/ 10699,
    4601             :     // Label 258: @9967
    4602             :     GIM_Try, /*On fail goto*//*Label 267*/ 10123,
    4603             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    4604             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    4605             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    4606             :       GIM_Try, /*On fail goto*//*Label 268*/ 10035, // Rule ID 1873 //
    4607             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    4608             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB,
    4609             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    4610             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    4611             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 0,
    4612             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    4613             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    4614             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4615             :         // (mul:{ *:[i32] } (sub:{ *:[i32] } 0:{ *:[i32] }, GPR32:{ *:[i32] }:$Rn), GPR32:{ *:[i32] }:$Rm)  =>  (MSUBWrrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm, WZR:{ *:[i32] })
    4616             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MSUBWrrr,
    4617             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4618             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    4619             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
    4620             :         GIR_AddRegister, /*InsnID*/0, AArch64::WZR,
    4621             :         GIR_EraseFromParent, /*InsnID*/0,
    4622             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4623             :         // GIR_Coverage, 1873,
    4624             :         GIR_Done,
    4625             :       // Label 268: @10035
    4626             :       GIM_Try, /*On fail goto*//*Label 269*/ 10089, // Rule ID 4024 //
    4627             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    4628             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4629             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB,
    4630             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    4631             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    4632             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 0,
    4633             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    4634             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4635             :         // (mul:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, (sub:{ *:[i32] } 0:{ *:[i32] }, GPR32:{ *:[i32] }:$Rn))  =>  (MSUBWrrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm, WZR:{ *:[i32] })
    4636             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MSUBWrrr,
    4637             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4638             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    4639             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rm
    4640             :         GIR_AddRegister, /*InsnID*/0, AArch64::WZR,
    4641             :         GIR_EraseFromParent, /*InsnID*/0,
    4642             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4643             :         // GIR_Coverage, 4024,
    4644             :         GIR_Done,
    4645             :       // Label 269: @10089
    4646             :       GIM_Try, /*On fail goto*//*Label 270*/ 10122, // Rule ID 1869 //
    4647             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    4648             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    4649             :         // (mul:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)  =>  (MADDWrrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm, WZR:{ *:[i32] })
    4650             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MADDWrrr,
    4651             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4652             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    4653             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
    4654             :         GIR_AddRegister, /*InsnID*/0, AArch64::WZR,
    4655             :         GIR_EraseFromParent, /*InsnID*/0,
    4656             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4657             :         // GIR_Coverage, 1869,
    4658             :         GIR_Done,
    4659             :       // Label 270: @10122
    4660             :       GIM_Reject,
    4661             :     // Label 267: @10123
    4662             :     GIM_Reject,
    4663             :     // Label 259: @10124
    4664             :     GIM_Try, /*On fail goto*//*Label 271*/ 10538,
    4665             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    4666             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    4667             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    4668             :       GIM_Try, /*On fail goto*//*Label 272*/ 10192, // Rule ID 1874 //
    4669             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    4670             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB,
    4671             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    4672             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    4673             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 0,
    4674             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    4675             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    4676             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4677             :         // (mul:{ *:[i64] } (sub:{ *:[i64] } 0:{ *:[i64] }, GPR64:{ *:[i64] }:$Rn), GPR64:{ *:[i64] }:$Rm)  =>  (MSUBXrrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm, XZR:{ *:[i64] })
    4678             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MSUBXrrr,
    4679             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4680             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    4681             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
    4682             :         GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
    4683             :         GIR_EraseFromParent, /*InsnID*/0,
    4684             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4685             :         // GIR_Coverage, 1874,
    4686             :         GIR_Done,
    4687             :       // Label 272: @10192
    4688             :       GIM_Try, /*On fail goto*//*Label 273*/ 10246, // Rule ID 4025 //
    4689             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    4690             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4691             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB,
    4692             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    4693             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    4694             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 0,
    4695             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    4696             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4697             :         // (mul:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, (sub:{ *:[i64] } 0:{ *:[i64] }, GPR64:{ *:[i64] }:$Rn))  =>  (MSUBXrrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm, XZR:{ *:[i64] })
    4698             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MSUBXrrr,
    4699             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4700             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    4701             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rm
    4702             :         GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
    4703             :         GIR_EraseFromParent, /*InsnID*/0,
    4704             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4705             :         // GIR_Coverage, 4025,
    4706             :         GIR_Done,
    4707             :       // Label 273: @10246
    4708             :       GIM_Try, /*On fail goto*//*Label 274*/ 10316, // Rule ID 1879 //
    4709             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    4710             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    4711             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    4712             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    4713             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    4714             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_CONSTANT,
    4715             :         GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIPFP_I64_Predicate_s64imm_32bit,
    4716             :         // MIs[2] Operand 1
    4717             :         // No operand predicates
    4718             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4719             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    4720             :         // (mul:{ *:[i64] } (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (imm:{ *:[i64] })<<P:Predicate_s64imm_32bit>>:$C)  =>  (SMADDLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, (MOVi32imm:{ *:[i32] } (trunc_imm:{ *:[i32] } (imm:{ *:[i64] }):$C)), XZR:{ *:[i64] })
    4721             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
    4722             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::MOVi32imm,
    4723             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    4724             :         GIR_CustomRenderer, /*InsnID*/1, /*OldInsnID*/2, /*Renderer*/GICR_renderTruncImm, // C
    4725             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    4726             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMADDLrrr,
    4727             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4728             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4729             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    4730             :         GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
    4731             :         GIR_EraseFromParent, /*InsnID*/0,
    4732             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4733             :         // GIR_Coverage, 1879,
    4734             :         GIR_Done,
    4735             :       // Label 274: @10316
    4736             :       GIM_Try, /*On fail goto*//*Label 275*/ 10386, // Rule ID 1880 //
    4737             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    4738             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    4739             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    4740             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    4741             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    4742             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_CONSTANT,
    4743             :         GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIPFP_I64_Predicate_i64imm_32bit,
    4744             :         // MIs[2] Operand 1
    4745             :         // No operand predicates
    4746             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4747             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    4748             :         // (mul:{ *:[i64] } (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (imm:{ *:[i64] })<<P:Predicate_i64imm_32bit>>:$C)  =>  (UMADDLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, (MOVi32imm:{ *:[i32] } (trunc_imm:{ *:[i32] } (imm:{ *:[i64] }):$C)), XZR:{ *:[i64] })
    4749             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
    4750             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::MOVi32imm,
    4751             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    4752             :         GIR_CustomRenderer, /*InsnID*/1, /*OldInsnID*/2, /*Renderer*/GICR_renderTruncImm, // C
    4753             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    4754             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMADDLrrr,
    4755             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4756             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4757             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    4758             :         GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
    4759             :         GIR_EraseFromParent, /*InsnID*/0,
    4760             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4761             :         // GIR_Coverage, 1880,
    4762             :         GIR_Done,
    4763             :       // Label 275: @10386
    4764             :       GIM_Try, /*On fail goto*//*Label 276*/ 10445, // Rule ID 1875 //
    4765             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    4766             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    4767             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    4768             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    4769             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    4770             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
    4771             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    4772             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    4773             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4774             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    4775             :         // (mul:{ *:[i64] } (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rm))  =>  (SMADDLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm, XZR:{ *:[i64] })
    4776             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMADDLrrr,
    4777             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4778             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4779             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rm
    4780             :         GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
    4781             :         GIR_EraseFromParent, /*InsnID*/0,
    4782             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4783             :         // GIR_Coverage, 1875,
    4784             :         GIR_Done,
    4785             :       // Label 276: @10445
    4786             :       GIM_Try, /*On fail goto*//*Label 277*/ 10504, // Rule ID 1876 //
    4787             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    4788             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    4789             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    4790             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    4791             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    4792             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
    4793             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    4794             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    4795             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4796             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    4797             :         // (mul:{ *:[i64] } (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rm))  =>  (UMADDLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm, XZR:{ *:[i64] })
    4798             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMADDLrrr,
    4799             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4800             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4801             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rm
    4802             :         GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
    4803             :         GIR_EraseFromParent, /*InsnID*/0,
    4804             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4805             :         // GIR_Coverage, 1876,
    4806             :         GIR_Done,
    4807             :       // Label 277: @10504
    4808             :       GIM_Try, /*On fail goto*//*Label 278*/ 10537, // Rule ID 1870 //
    4809             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    4810             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    4811             :         // (mul:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)  =>  (MADDXrrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm, XZR:{ *:[i64] })
    4812             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MADDXrrr,
    4813             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4814             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    4815             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
    4816             :         GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
    4817             :         GIR_EraseFromParent, /*InsnID*/0,
    4818             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4819             :         // GIR_Coverage, 1870,
    4820             :         GIR_Done,
    4821             :       // Label 278: @10537
    4822             :       GIM_Reject,
    4823             :     // Label 271: @10538
    4824             :     GIM_Reject,
    4825             :     // Label 260: @10539
    4826             :     GIM_Try, /*On fail goto*//*Label 279*/ 10570, // Rule ID 952 //
    4827             :       GIM_CheckFeatures, GIFBS_HasNEON,
    4828             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    4829             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    4830             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    4831             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4832             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4833             :       // (mul:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)  =>  (MULv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    4834             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::MULv2i32,
    4835             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4836             :       // GIR_Coverage, 952,
    4837             :       GIR_Done,
    4838             :     // Label 279: @10570
    4839             :     GIM_Reject,
    4840             :     // Label 261: @10571
    4841             :     GIM_Try, /*On fail goto*//*Label 280*/ 10602, // Rule ID 950 //
    4842             :       GIM_CheckFeatures, GIFBS_HasNEON,
    4843             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    4844             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    4845             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    4846             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4847             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4848             :       // (mul:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)  =>  (MULv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    4849             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::MULv4i16,
    4850             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4851             :       // GIR_Coverage, 950,
    4852             :       GIR_Done,
    4853             :     // Label 280: @10602
    4854             :     GIM_Reject,
    4855             :     // Label 262: @10603
    4856             :     GIM_Try, /*On fail goto*//*Label 281*/ 10634, // Rule ID 953 //
    4857             :       GIM_CheckFeatures, GIFBS_HasNEON,
    4858             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    4859             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    4860             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    4861             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4862             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    4863             :       // (mul:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (MULv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
    4864             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::MULv4i32,
    4865             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4866             :       // GIR_Coverage, 953,
    4867             :       GIR_Done,
    4868             :     // Label 281: @10634
    4869             :     GIM_Reject,
    4870             :     // Label 263: @10635
    4871             :     GIM_Try, /*On fail goto*//*Label 282*/ 10666, // Rule ID 948 //
    4872             :       GIM_CheckFeatures, GIFBS_HasNEON,
    4873             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    4874             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
    4875             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    4876             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4877             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4878             :       // (mul:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (MULv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    4879             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::MULv8i8,
    4880             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4881             :       // GIR_Coverage, 948,
    4882             :       GIR_Done,
    4883             :     // Label 282: @10666
    4884             :     GIM_Reject,
    4885             :     // Label 264: @10667
    4886             :     GIM_Try, /*On fail goto*//*Label 283*/ 10698, // Rule ID 951 //
    4887             :       GIM_CheckFeatures, GIFBS_HasNEON,
    4888             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    4889             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    4890             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    4891             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4892             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    4893             :       // (mul:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)  =>  (MULv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
    4894             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::MULv8i16,
    4895             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4896             :       // GIR_Coverage, 951,
    4897             :       GIR_Done,
    4898             :     // Label 283: @10698
    4899             :     GIM_Reject,
    4900             :     // Label 265: @10699
    4901             :     GIM_Try, /*On fail goto*//*Label 284*/ 10730, // Rule ID 949 //
    4902             :       GIM_CheckFeatures, GIFBS_HasNEON,
    4903             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    4904             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    4905             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    4906             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4907             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    4908             :       // (mul:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (MULv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
    4909             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::MULv16i8,
    4910             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4911             :       // GIR_Coverage, 949,
    4912             :       GIR_Done,
    4913             :     // Label 284: @10730
    4914             :     GIM_Reject,
    4915             :     // Label 266: @10731
    4916             :     GIM_Reject,
    4917             :     // Label 3: @10732
    4918             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 3, /*)*//*default:*//*Label 287*/ 10800,
    4919             :     /*GILLT_s32*//*Label 285*/ 10740,
    4920             :     /*GILLT_s64*//*Label 286*/ 10770,
    4921             :     // Label 285: @10740
    4922             :     GIM_Try, /*On fail goto*//*Label 288*/ 10769, // Rule ID 59 //
    4923             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    4924             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    4925             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    4926             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    4927             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    4928             :       // (sdiv:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)  =>  (SDIVWr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
    4929             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SDIVWr,
    4930             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4931             :       // GIR_Coverage, 59,
    4932             :       GIR_Done,
    4933             :     // Label 288: @10769
    4934             :     GIM_Reject,
    4935             :     // Label 286: @10770
    4936             :     GIM_Try, /*On fail goto*//*Label 289*/ 10799, // Rule ID 60 //
    4937             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    4938             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    4939             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    4940             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    4941             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    4942             :       // (sdiv:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)  =>  (SDIVXr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
    4943             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SDIVXr,
    4944             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4945             :       // GIR_Coverage, 60,
    4946             :       GIR_Done,
    4947             :     // Label 289: @10799
    4948             :     GIM_Reject,
    4949             :     // Label 287: @10800
    4950             :     GIM_Reject,
    4951             :     // Label 4: @10801
    4952             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 3, /*)*//*default:*//*Label 292*/ 10869,
    4953             :     /*GILLT_s32*//*Label 290*/ 10809,
    4954             :     /*GILLT_s64*//*Label 291*/ 10839,
    4955             :     // Label 290: @10809
    4956             :     GIM_Try, /*On fail goto*//*Label 293*/ 10838, // Rule ID 57 //
    4957             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    4958             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    4959             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    4960             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    4961             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    4962             :       // (udiv:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)  =>  (UDIVWr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
    4963             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::UDIVWr,
    4964             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4965             :       // GIR_Coverage, 57,
    4966             :       GIR_Done,
    4967             :     // Label 293: @10838
    4968             :     GIM_Reject,
    4969             :     // Label 291: @10839
    4970             :     GIM_Try, /*On fail goto*//*Label 294*/ 10868, // Rule ID 58 //
    4971             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    4972             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    4973             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    4974             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    4975             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    4976             :       // (udiv:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)  =>  (UDIVXr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
    4977             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::UDIVXr,
    4978             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4979             :       // GIR_Coverage, 58,
    4980             :       GIR_Done,
    4981             :     // Label 294: @10868
    4982             :     GIM_Reject,
    4983             :     // Label 292: @10869
    4984             :     GIM_Reject,
    4985             :     // Label 5: @10870
    4986             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 11, /*)*//*default:*//*Label 304*/ 11411,
    4987             :     /*GILLT_s32*//*Label 295*/ 10886,
    4988             :     /*GILLT_s64*//*Label 296*/ 11021, 0,
    4989             :     /*GILLT_v2s32*//*Label 297*/ 11187,
    4990             :     /*GILLT_v2s64*//*Label 298*/ 11219,
    4991             :     /*GILLT_v4s16*//*Label 299*/ 11251,
    4992             :     /*GILLT_v4s32*//*Label 300*/ 11283,
    4993             :     /*GILLT_v8s8*//*Label 301*/ 11315,
    4994             :     /*GILLT_v8s16*//*Label 302*/ 11347,
    4995             :     /*GILLT_v16s8*//*Label 303*/ 11379,
    4996             :     // Label 295: @10886
    4997             :     GIM_Try, /*On fail goto*//*Label 305*/ 11020,
    4998             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    4999             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    5000             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    5001             :       GIM_Try, /*On fail goto*//*Label 306*/ 10951, // Rule ID 3796 //
    5002             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    5003             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5004             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    5005             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    5006             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5007             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5008             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    5009             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    5010             :         // (and:{ *:[i32] } (xor:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, -1:{ *:[i32] }), GPR32:{ *:[i32] }:$Rn)  =>  (BICWrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
    5011             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::BICWrr,
    5012             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5013             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5014             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    5015             :         GIR_EraseFromParent, /*InsnID*/0,
    5016             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5017             :         // GIR_Coverage, 3796,
    5018             :         GIR_Done,
    5019             :       // Label 306: @10951
    5020             :       GIM_Try, /*On fail goto*//*Label 307*/ 11002, // Rule ID 99 //
    5021             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5022             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    5023             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5024             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    5025             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    5026             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5027             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5028             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    5029             :         // (and:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, (xor:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, -1:{ *:[i32] }))  =>  (BICWrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
    5030             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::BICWrr,
    5031             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5032             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    5033             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    5034             :         GIR_EraseFromParent, /*InsnID*/0,
    5035             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5036             :         // GIR_Coverage, 99,
    5037             :         GIR_Done,
    5038             :       // Label 307: @11002
    5039             :       GIM_Try, /*On fail goto*//*Label 308*/ 11019, // Rule ID 95 //
    5040             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5041             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    5042             :         // (and:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)  =>  (ANDWrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
    5043             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ANDWrr,
    5044             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5045             :         // GIR_Coverage, 95,
    5046             :         GIR_Done,
    5047             :       // Label 308: @11019
    5048             :       GIM_Reject,
    5049             :     // Label 305: @11020
    5050             :     GIM_Reject,
    5051             :     // Label 296: @11021
    5052             :     GIM_Try, /*On fail goto*//*Label 309*/ 11186,
    5053             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    5054             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    5055             :       GIM_Try, /*On fail goto*//*Label 310*/ 11086, // Rule ID 3797 //
    5056             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5057             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    5058             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5059             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    5060             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    5061             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5062             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5063             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    5064             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    5065             :         // (and:{ *:[i64] } (xor:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, -1:{ *:[i64] }), GPR64:{ *:[i64] }:$Rn)  =>  (BICXrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
    5066             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::BICXrr,
    5067             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5068             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5069             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    5070             :         GIR_EraseFromParent, /*InsnID*/0,
    5071             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5072             :         // GIR_Coverage, 3797,
    5073             :         GIR_Done,
    5074             :       // Label 310: @11086
    5075             :       GIM_Try, /*On fail goto*//*Label 311*/ 11141, // Rule ID 100 //
    5076             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5077             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5078             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    5079             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5080             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    5081             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    5082             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5083             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5084             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    5085             :         // (and:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, (xor:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, -1:{ *:[i64] }))  =>  (BICXrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
    5086             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::BICXrr,
    5087             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5088             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    5089             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    5090             :         GIR_EraseFromParent, /*InsnID*/0,
    5091             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5092             :         // GIR_Coverage, 100,
    5093             :         GIR_Done,
    5094             :       // Label 311: @11141
    5095             :       GIM_Try, /*On fail goto*//*Label 312*/ 11162, // Rule ID 96 //
    5096             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5097             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5098             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    5099             :         // (and:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)  =>  (ANDXrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
    5100             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ANDXrr,
    5101             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5102             :         // GIR_Coverage, 96,
    5103             :         GIR_Done,
    5104             :       // Label 312: @11162
    5105             :       GIM_Try, /*On fail goto*//*Label 313*/ 11185, // Rule ID 1765 //
    5106             :         GIM_CheckFeatures, GIFBS_HasNEON,
    5107             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5108             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5109             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5110             :         // (and:{ *:[v1i64] } V64:{ *:[v1i64] }:$LHS, V64:{ *:[v1i64] }:$RHS)  =>  (ANDv8i8:{ *:[v1i64] } V64:{ *:[v1i64] }:$LHS, V64:{ *:[v1i64] }:$RHS)
    5111             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ANDv8i8,
    5112             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5113             :         // GIR_Coverage, 1765,
    5114             :         GIR_Done,
    5115             :       // Label 313: @11185
    5116             :       GIM_Reject,
    5117             :     // Label 309: @11186
    5118             :     GIM_Reject,
    5119             :     // Label 297: @11187
    5120             :     GIM_Try, /*On fail goto*//*Label 314*/ 11218, // Rule ID 1764 //
    5121             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5122             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    5123             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    5124             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5125             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5126             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5127             :       // (and:{ *:[v2i32] } V64:{ *:[v2i32] }:$LHS, V64:{ *:[v2i32] }:$RHS)  =>  (ANDv8i8:{ *:[v2i32] } V64:{ *:[v2i32] }:$LHS, V64:{ *:[v2i32] }:$RHS)
    5128             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ANDv8i8,
    5129             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5130             :       // GIR_Coverage, 1764,
    5131             :       GIR_Done,
    5132             :     // Label 314: @11218
    5133             :     GIM_Reject,
    5134             :     // Label 298: @11219
    5135             :     GIM_Try, /*On fail goto*//*Label 315*/ 11250, // Rule ID 1768 //
    5136             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5137             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    5138             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    5139             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5140             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    5141             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5142             :       // (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$LHS, V128:{ *:[v2i64] }:$RHS)  =>  (ANDv16i8:{ *:[v2i64] } V128:{ *:[v2i64] }:$LHS, V128:{ *:[v2i64] }:$RHS)
    5143             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ANDv16i8,
    5144             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5145             :       // GIR_Coverage, 1768,
    5146             :       GIR_Done,
    5147             :     // Label 315: @11250
    5148             :     GIM_Reject,
    5149             :     // Label 299: @11251
    5150             :     GIM_Try, /*On fail goto*//*Label 316*/ 11282, // Rule ID 1763 //
    5151             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5152             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    5153             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    5154             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5155             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5156             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5157             :       // (and:{ *:[v4i16] } V64:{ *:[v4i16] }:$LHS, V64:{ *:[v4i16] }:$RHS)  =>  (ANDv8i8:{ *:[v4i16] } V64:{ *:[v4i16] }:$LHS, V64:{ *:[v4i16] }:$RHS)
    5158             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ANDv8i8,
    5159             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5160             :       // GIR_Coverage, 1763,
    5161             :       GIR_Done,
    5162             :     // Label 316: @11282
    5163             :     GIM_Reject,
    5164             :     // Label 300: @11283
    5165             :     GIM_Try, /*On fail goto*//*Label 317*/ 11314, // Rule ID 1767 //
    5166             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5167             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    5168             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    5169             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5170             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    5171             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5172             :       // (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$LHS, V128:{ *:[v4i32] }:$RHS)  =>  (ANDv16i8:{ *:[v4i32] } V128:{ *:[v4i32] }:$LHS, V128:{ *:[v4i32] }:$RHS)
    5173             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ANDv16i8,
    5174             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5175             :       // GIR_Coverage, 1767,
    5176             :       GIR_Done,
    5177             :     // Label 317: @11314
    5178             :     GIM_Reject,
    5179             :     // Label 301: @11315
    5180             :     GIM_Try, /*On fail goto*//*Label 318*/ 11346, // Rule ID 1171 //
    5181             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5182             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    5183             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
    5184             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5185             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5186             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5187             :       // (and:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (ANDv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    5188             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ANDv8i8,
    5189             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5190             :       // GIR_Coverage, 1171,
    5191             :       GIR_Done,
    5192             :     // Label 318: @11346
    5193             :     GIM_Reject,
    5194             :     // Label 302: @11347
    5195             :     GIM_Try, /*On fail goto*//*Label 319*/ 11378, // Rule ID 1766 //
    5196             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5197             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    5198             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    5199             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5200             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    5201             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5202             :       // (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$LHS, V128:{ *:[v8i16] }:$RHS)  =>  (ANDv16i8:{ *:[v8i16] } V128:{ *:[v8i16] }:$LHS, V128:{ *:[v8i16] }:$RHS)
    5203             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ANDv16i8,
    5204             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5205             :       // GIR_Coverage, 1766,
    5206             :       GIR_Done,
    5207             :     // Label 319: @11378
    5208             :     GIM_Reject,
    5209             :     // Label 303: @11379
    5210             :     GIM_Try, /*On fail goto*//*Label 320*/ 11410, // Rule ID 1172 //
    5211             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5212             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    5213             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    5214             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5215             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    5216             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5217             :       // (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (ANDv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
    5218             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ANDv16i8,
    5219             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5220             :       // GIR_Coverage, 1172,
    5221             :       GIR_Done,
    5222             :     // Label 320: @11410
    5223             :     GIM_Reject,
    5224             :     // Label 304: @11411
    5225             :     GIM_Reject,
    5226             :     // Label 6: @11412
    5227             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 11, /*)*//*default:*//*Label 330*/ 11953,
    5228             :     /*GILLT_s32*//*Label 321*/ 11428,
    5229             :     /*GILLT_s64*//*Label 322*/ 11563, 0,
    5230             :     /*GILLT_v2s32*//*Label 323*/ 11729,
    5231             :     /*GILLT_v2s64*//*Label 324*/ 11761,
    5232             :     /*GILLT_v4s16*//*Label 325*/ 11793,
    5233             :     /*GILLT_v4s32*//*Label 326*/ 11825,
    5234             :     /*GILLT_v8s8*//*Label 327*/ 11857,
    5235             :     /*GILLT_v8s16*//*Label 328*/ 11889,
    5236             :     /*GILLT_v16s8*//*Label 329*/ 11921,
    5237             :     // Label 321: @11428
    5238             :     GIM_Try, /*On fail goto*//*Label 331*/ 11562,
    5239             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    5240             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    5241             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    5242             :       GIM_Try, /*On fail goto*//*Label 332*/ 11493, // Rule ID 3816 //
    5243             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    5244             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5245             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    5246             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    5247             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5248             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5249             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    5250             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    5251             :         // (or:{ *:[i32] } (xor:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, -1:{ *:[i32] }), GPR32:{ *:[i32] }:$Rn)  =>  (ORNWrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
    5252             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ORNWrr,
    5253             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5254             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5255             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    5256             :         GIR_EraseFromParent, /*InsnID*/0,
    5257             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5258             :         // GIR_Coverage, 3816,
    5259             :         GIR_Done,
    5260             :       // Label 332: @11493
    5261             :       GIM_Try, /*On fail goto*//*Label 333*/ 11544, // Rule ID 111 //
    5262             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5263             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    5264             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5265             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    5266             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    5267             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5268             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5269             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    5270             :         // (or:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, (xor:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, -1:{ *:[i32] }))  =>  (ORNWrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
    5271             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ORNWrr,
    5272             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5273             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    5274             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    5275             :         GIR_EraseFromParent, /*InsnID*/0,
    5276             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5277             :         // GIR_Coverage, 111,
    5278             :         GIR_Done,
    5279             :       // Label 333: @11544
    5280             :       GIM_Try, /*On fail goto*//*Label 334*/ 11561, // Rule ID 115 //
    5281             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5282             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    5283             :         // (or:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)  =>  (ORRWrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
    5284             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ORRWrr,
    5285             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5286             :         // GIR_Coverage, 115,
    5287             :         GIR_Done,
    5288             :       // Label 334: @11561
    5289             :       GIM_Reject,
    5290             :     // Label 331: @11562
    5291             :     GIM_Reject,
    5292             :     // Label 322: @11563
    5293             :     GIM_Try, /*On fail goto*//*Label 335*/ 11728,
    5294             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    5295             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    5296             :       GIM_Try, /*On fail goto*//*Label 336*/ 11628, // Rule ID 3817 //
    5297             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5298             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    5299             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5300             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    5301             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    5302             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5303             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5304             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    5305             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    5306             :         // (or:{ *:[i64] } (xor:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, -1:{ *:[i64] }), GPR64:{ *:[i64] }:$Rn)  =>  (ORNXrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
    5307             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ORNXrr,
    5308             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5309             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5310             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    5311             :         GIR_EraseFromParent, /*InsnID*/0,
    5312             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5313             :         // GIR_Coverage, 3817,
    5314             :         GIR_Done,
    5315             :       // Label 336: @11628
    5316             :       GIM_Try, /*On fail goto*//*Label 337*/ 11683, // Rule ID 112 //
    5317             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5318             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5319             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    5320             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5321             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    5322             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    5323             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5324             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5325             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    5326             :         // (or:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, (xor:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, -1:{ *:[i64] }))  =>  (ORNXrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
    5327             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ORNXrr,
    5328             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5329             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    5330             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    5331             :         GIR_EraseFromParent, /*InsnID*/0,
    5332             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5333             :         // GIR_Coverage, 112,
    5334             :         GIR_Done,
    5335             :       // Label 337: @11683
    5336             :       GIM_Try, /*On fail goto*//*Label 338*/ 11704, // Rule ID 116 //
    5337             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5338             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5339             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    5340             :         // (or:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)  =>  (ORRXrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
    5341             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ORRXrr,
    5342             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5343             :         // GIR_Coverage, 116,
    5344             :         GIR_Done,
    5345             :       // Label 338: @11704
    5346             :       GIM_Try, /*On fail goto*//*Label 339*/ 11727, // Rule ID 2392 //
    5347             :         GIM_CheckFeatures, GIFBS_HasNEON,
    5348             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5349             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5350             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5351             :         // (or:{ *:[v1i64] } V64:{ *:[v1i64] }:$LHS, V64:{ *:[v1i64] }:$RHS)  =>  (ORRv8i8:{ *:[v1i64] } V64:{ *:[v1i64] }:$LHS, V64:{ *:[v1i64] }:$RHS)
    5352             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ORRv8i8,
    5353             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5354             :         // GIR_Coverage, 2392,
    5355             :         GIR_Done,
    5356             :       // Label 339: @11727
    5357             :       GIM_Reject,
    5358             :     // Label 335: @11728
    5359             :     GIM_Reject,
    5360             :     // Label 323: @11729
    5361             :     GIM_Try, /*On fail goto*//*Label 340*/ 11760, // Rule ID 2391 //
    5362             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5363             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    5364             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    5365             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5366             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5367             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5368             :       // (or:{ *:[v2i32] } V64:{ *:[v2i32] }:$LHS, V64:{ *:[v2i32] }:$RHS)  =>  (ORRv8i8:{ *:[v2i32] } V64:{ *:[v2i32] }:$LHS, V64:{ *:[v2i32] }:$RHS)
    5369             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ORRv8i8,
    5370             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5371             :       // GIR_Coverage, 2391,
    5372             :       GIR_Done,
    5373             :     // Label 340: @11760
    5374             :     GIM_Reject,
    5375             :     // Label 324: @11761
    5376             :     GIM_Try, /*On fail goto*//*Label 341*/ 11792, // Rule ID 2395 //
    5377             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5378             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    5379             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    5380             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5381             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    5382             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5383             :       // (or:{ *:[v2i64] } V128:{ *:[v2i64] }:$LHS, V128:{ *:[v2i64] }:$RHS)  =>  (ORRv16i8:{ *:[v2i64] } V128:{ *:[v2i64] }:$LHS, V128:{ *:[v2i64] }:$RHS)
    5384             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ORRv16i8,
    5385             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5386             :       // GIR_Coverage, 2395,
    5387             :       GIR_Done,
    5388             :     // Label 341: @11792
    5389             :     GIM_Reject,
    5390             :     // Label 325: @11793
    5391             :     GIM_Try, /*On fail goto*//*Label 342*/ 11824, // Rule ID 2390 //
    5392             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5393             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    5394             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    5395             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5396             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5397             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5398             :       // (or:{ *:[v4i16] } V64:{ *:[v4i16] }:$LHS, V64:{ *:[v4i16] }:$RHS)  =>  (ORRv8i8:{ *:[v4i16] } V64:{ *:[v4i16] }:$LHS, V64:{ *:[v4i16] }:$RHS)
    5399             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ORRv8i8,
    5400             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5401             :       // GIR_Coverage, 2390,
    5402             :       GIR_Done,
    5403             :     // Label 342: @11824
    5404             :     GIM_Reject,
    5405             :     // Label 326: @11825
    5406             :     GIM_Try, /*On fail goto*//*Label 343*/ 11856, // Rule ID 2394 //
    5407             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5408             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    5409             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    5410             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5411             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    5412             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5413             :       // (or:{ *:[v4i32] } V128:{ *:[v4i32] }:$LHS, V128:{ *:[v4i32] }:$RHS)  =>  (ORRv16i8:{ *:[v4i32] } V128:{ *:[v4i32] }:$LHS, V128:{ *:[v4i32] }:$RHS)
    5414             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ORRv16i8,
    5415             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5416             :       // GIR_Coverage, 2394,
    5417             :       GIR_Done,
    5418             :     // Label 343: @11856
    5419             :     GIM_Reject,
    5420             :     // Label 327: @11857
    5421             :     GIM_Try, /*On fail goto*//*Label 344*/ 11888, // Rule ID 1183 //
    5422             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5423             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    5424             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
    5425             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5426             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5427             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5428             :       // (or:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (ORRv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    5429             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ORRv8i8,
    5430             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5431             :       // GIR_Coverage, 1183,
    5432             :       GIR_Done,
    5433             :     // Label 344: @11888
    5434             :     GIM_Reject,
    5435             :     // Label 328: @11889
    5436             :     GIM_Try, /*On fail goto*//*Label 345*/ 11920, // Rule ID 2393 //
    5437             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5438             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    5439             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    5440             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5441             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    5442             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5443             :       // (or:{ *:[v8i16] } V128:{ *:[v8i16] }:$LHS, V128:{ *:[v8i16] }:$RHS)  =>  (ORRv16i8:{ *:[v8i16] } V128:{ *:[v8i16] }:$LHS, V128:{ *:[v8i16] }:$RHS)
    5444             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ORRv16i8,
    5445             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5446             :       // GIR_Coverage, 2393,
    5447             :       GIR_Done,
    5448             :     // Label 345: @11920
    5449             :     GIM_Reject,
    5450             :     // Label 329: @11921
    5451             :     GIM_Try, /*On fail goto*//*Label 346*/ 11952, // Rule ID 1184 //
    5452             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5453             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    5454             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    5455             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5456             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    5457             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5458             :       // (or:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (ORRv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
    5459             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ORRv16i8,
    5460             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5461             :       // GIR_Coverage, 1184,
    5462             :       GIR_Done,
    5463             :     // Label 346: @11952
    5464             :     GIM_Reject,
    5465             :     // Label 330: @11953
    5466             :     GIM_Reject,
    5467             :     // Label 7: @11954
    5468             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 11, /*)*//*default:*//*Label 356*/ 12663,
    5469             :     /*GILLT_s32*//*Label 347*/ 11970,
    5470             :     /*GILLT_s64*//*Label 348*/ 12185, 0,
    5471             :     /*GILLT_v2s32*//*Label 349*/ 12439,
    5472             :     /*GILLT_v2s64*//*Label 350*/ 12471,
    5473             :     /*GILLT_v4s16*//*Label 351*/ 12503,
    5474             :     /*GILLT_v4s32*//*Label 352*/ 12535,
    5475             :     /*GILLT_v8s8*//*Label 353*/ 12567,
    5476             :     /*GILLT_v8s16*//*Label 354*/ 12599,
    5477             :     /*GILLT_v16s8*//*Label 355*/ 12631,
    5478             :     // Label 347: @11970
    5479             :     GIM_Try, /*On fail goto*//*Label 357*/ 12184,
    5480             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    5481             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    5482             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    5483             :       GIM_Try, /*On fail goto*//*Label 358*/ 12035, // Rule ID 3800 //
    5484             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    5485             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5486             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    5487             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    5488             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5489             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5490             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    5491             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    5492             :         // (xor:{ *:[i32] } (xor:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, -1:{ *:[i32] }), GPR32:{ *:[i32] }:$Rm)  =>  (EONWrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
    5493             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EONWrr,
    5494             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5495             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    5496             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
    5497             :         GIR_EraseFromParent, /*InsnID*/0,
    5498             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5499             :         // GIR_Coverage, 3800,
    5500             :         GIR_Done,
    5501             :       // Label 358: @12035
    5502             :       GIM_Try, /*On fail goto*//*Label 359*/ 12086, // Rule ID 103 //
    5503             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    5504             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5505             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    5506             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    5507             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5508             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    5509             :         GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
    5510             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    5511             :         // (xor:{ *:[i32] } (xor:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm), -1:{ *:[i32] })  =>  (EONWrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
    5512             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EONWrr,
    5513             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5514             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    5515             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    5516             :         GIR_EraseFromParent, /*InsnID*/0,
    5517             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5518             :         // GIR_Coverage, 103,
    5519             :         GIR_Done,
    5520             :       // Label 359: @12086
    5521             :       GIM_Try, /*On fail goto*//*Label 360*/ 12137, // Rule ID 3801 //
    5522             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5523             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    5524             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5525             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    5526             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    5527             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5528             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5529             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    5530             :         // (xor:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, (xor:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, -1:{ *:[i32] }))  =>  (EONWrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
    5531             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EONWrr,
    5532             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5533             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    5534             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rm
    5535             :         GIR_EraseFromParent, /*InsnID*/0,
    5536             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5537             :         // GIR_Coverage, 3801,
    5538             :         GIR_Done,
    5539             :       // Label 360: @12137
    5540             :       GIM_Try, /*On fail goto*//*Label 361*/ 12166, // Rule ID 1891 //
    5541             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5542             :         GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
    5543             :         // (xor:{ *:[i32] } GPR32:{ *:[i32] }:$Wm, -1:{ *:[i32] })  =>  (ORNWrr:{ *:[i32] } WZR:{ *:[i32] }, GPR32:{ *:[i32] }:$Wm)
    5544             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ORNWrr,
    5545             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5546             :         GIR_AddRegister, /*InsnID*/0, AArch64::WZR,
    5547             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Wm
    5548             :         GIR_EraseFromParent, /*InsnID*/0,
    5549             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5550             :         // GIR_Coverage, 1891,
    5551             :         GIR_Done,
    5552             :       // Label 361: @12166
    5553             :       GIM_Try, /*On fail goto*//*Label 362*/ 12183, // Rule ID 107 //
    5554             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5555             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    5556             :         // (xor:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)  =>  (EORWrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
    5557             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::EORWrr,
    5558             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5559             :         // GIR_Coverage, 107,
    5560             :         GIR_Done,
    5561             :       // Label 362: @12183
    5562             :       GIM_Reject,
    5563             :     // Label 357: @12184
    5564             :     GIM_Reject,
    5565             :     // Label 348: @12185
    5566             :     GIM_Try, /*On fail goto*//*Label 363*/ 12438,
    5567             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    5568             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    5569             :       GIM_Try, /*On fail goto*//*Label 364*/ 12250, // Rule ID 3802 //
    5570             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5571             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    5572             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5573             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    5574             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    5575             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5576             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5577             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    5578             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    5579             :         // (xor:{ *:[i64] } (xor:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, -1:{ *:[i64] }), GPR64:{ *:[i64] }:$Rm)  =>  (EONXrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
    5580             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EONXrr,
    5581             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5582             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    5583             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
    5584             :         GIR_EraseFromParent, /*InsnID*/0,
    5585             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5586             :         // GIR_Coverage, 3802,
    5587             :         GIR_Done,
    5588             :       // Label 364: @12250
    5589             :       GIM_Try, /*On fail goto*//*Label 365*/ 12305, // Rule ID 104 //
    5590             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5591             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    5592             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5593             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    5594             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    5595             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5596             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    5597             :         GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
    5598             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    5599             :         // (xor:{ *:[i64] } (xor:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm), -1:{ *:[i64] })  =>  (EONXrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
    5600             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EONXrr,
    5601             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5602             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    5603             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    5604             :         GIR_EraseFromParent, /*InsnID*/0,
    5605             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5606             :         // GIR_Coverage, 104,
    5607             :         GIR_Done,
    5608             :       // Label 365: @12305
    5609             :       GIM_Try, /*On fail goto*//*Label 366*/ 12360, // Rule ID 3803 //
    5610             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5611             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5612             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    5613             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5614             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    5615             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    5616             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5617             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5618             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    5619             :         // (xor:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, (xor:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, -1:{ *:[i64] }))  =>  (EONXrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
    5620             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EONXrr,
    5621             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5622             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    5623             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rm
    5624             :         GIR_EraseFromParent, /*InsnID*/0,
    5625             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5626             :         // GIR_Coverage, 3803,
    5627             :         GIR_Done,
    5628             :       // Label 366: @12360
    5629             :       GIM_Try, /*On fail goto*//*Label 367*/ 12393, // Rule ID 1892 //
    5630             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5631             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5632             :         GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
    5633             :         // (xor:{ *:[i64] } GPR64:{ *:[i64] }:$Xm, -1:{ *:[i64] })  =>  (ORNXrr:{ *:[i64] } XZR:{ *:[i64] }, GPR64:{ *:[i64] }:$Xm)
    5634             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ORNXrr,
    5635             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5636             :         GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
    5637             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Xm
    5638             :         GIR_EraseFromParent, /*InsnID*/0,
    5639             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5640             :         // GIR_Coverage, 1892,
    5641             :         GIR_Done,
    5642             :       // Label 367: @12393
    5643             :       GIM_Try, /*On fail goto*//*Label 368*/ 12414, // Rule ID 108 //
    5644             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5645             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5646             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    5647             :         // (xor:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)  =>  (EORXrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
    5648             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::EORXrr,
    5649             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5650             :         // GIR_Coverage, 108,
    5651             :         GIR_Done,
    5652             :       // Label 368: @12414
    5653             :       GIM_Try, /*On fail goto*//*Label 369*/ 12437, // Rule ID 2380 //
    5654             :         GIM_CheckFeatures, GIFBS_HasNEON,
    5655             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5656             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5657             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5658             :         // (xor:{ *:[v1i64] } V64:{ *:[v1i64] }:$LHS, V64:{ *:[v1i64] }:$RHS)  =>  (EORv8i8:{ *:[v1i64] } V64:{ *:[v1i64] }:$LHS, V64:{ *:[v1i64] }:$RHS)
    5659             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::EORv8i8,
    5660             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5661             :         // GIR_Coverage, 2380,
    5662             :         GIR_Done,
    5663             :       // Label 369: @12437
    5664             :       GIM_Reject,
    5665             :     // Label 363: @12438
    5666             :     GIM_Reject,
    5667             :     // Label 349: @12439
    5668             :     GIM_Try, /*On fail goto*//*Label 370*/ 12470, // Rule ID 2379 //
    5669             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5670             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    5671             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    5672             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5673             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5674             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5675             :       // (xor:{ *:[v2i32] } V64:{ *:[v2i32] }:$LHS, V64:{ *:[v2i32] }:$RHS)  =>  (EORv8i8:{ *:[v2i32] } V64:{ *:[v2i32] }:$LHS, V64:{ *:[v2i32] }:$RHS)
    5676             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::EORv8i8,
    5677             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5678             :       // GIR_Coverage, 2379,
    5679             :       GIR_Done,
    5680             :     // Label 370: @12470
    5681             :     GIM_Reject,
    5682             :     // Label 350: @12471
    5683             :     GIM_Try, /*On fail goto*//*Label 371*/ 12502, // Rule ID 2383 //
    5684             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5685             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    5686             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    5687             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5688             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    5689             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5690             :       // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$LHS, V128:{ *:[v2i64] }:$RHS)  =>  (EORv16i8:{ *:[v2i64] } V128:{ *:[v2i64] }:$LHS, V128:{ *:[v2i64] }:$RHS)
    5691             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::EORv16i8,
    5692             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5693             :       // GIR_Coverage, 2383,
    5694             :       GIR_Done,
    5695             :     // Label 371: @12502
    5696             :     GIM_Reject,
    5697             :     // Label 351: @12503
    5698             :     GIM_Try, /*On fail goto*//*Label 372*/ 12534, // Rule ID 2378 //
    5699             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5700             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    5701             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    5702             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5703             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5704             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5705             :       // (xor:{ *:[v4i16] } V64:{ *:[v4i16] }:$LHS, V64:{ *:[v4i16] }:$RHS)  =>  (EORv8i8:{ *:[v4i16] } V64:{ *:[v4i16] }:$LHS, V64:{ *:[v4i16] }:$RHS)
    5706             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::EORv8i8,
    5707             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5708             :       // GIR_Coverage, 2378,
    5709             :       GIR_Done,
    5710             :     // Label 372: @12534
    5711             :     GIM_Reject,
    5712             :     // Label 352: @12535
    5713             :     GIM_Try, /*On fail goto*//*Label 373*/ 12566, // Rule ID 2382 //
    5714             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5715             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    5716             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    5717             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5718             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    5719             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5720             :       // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$LHS, V128:{ *:[v4i32] }:$RHS)  =>  (EORv16i8:{ *:[v4i32] } V128:{ *:[v4i32] }:$LHS, V128:{ *:[v4i32] }:$RHS)
    5721             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::EORv16i8,
    5722             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5723             :       // GIR_Coverage, 2382,
    5724             :       GIR_Done,
    5725             :     // Label 373: @12566
    5726             :     GIM_Reject,
    5727             :     // Label 353: @12567
    5728             :     GIM_Try, /*On fail goto*//*Label 374*/ 12598, // Rule ID 1179 //
    5729             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5730             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    5731             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
    5732             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5733             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5734             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5735             :       // (xor:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (EORv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    5736             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::EORv8i8,
    5737             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5738             :       // GIR_Coverage, 1179,
    5739             :       GIR_Done,
    5740             :     // Label 374: @12598
    5741             :     GIM_Reject,
    5742             :     // Label 354: @12599
    5743             :     GIM_Try, /*On fail goto*//*Label 375*/ 12630, // Rule ID 2381 //
    5744             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5745             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    5746             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    5747             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5748             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    5749             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5750             :       // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$LHS, V128:{ *:[v8i16] }:$RHS)  =>  (EORv16i8:{ *:[v8i16] } V128:{ *:[v8i16] }:$LHS, V128:{ *:[v8i16] }:$RHS)
    5751             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::EORv16i8,
    5752             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5753             :       // GIR_Coverage, 2381,
    5754             :       GIR_Done,
    5755             :     // Label 375: @12630
    5756             :     GIM_Reject,
    5757             :     // Label 355: @12631
    5758             :     GIM_Try, /*On fail goto*//*Label 376*/ 12662, // Rule ID 1180 //
    5759             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5760             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    5761             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    5762             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5763             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    5764             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5765             :       // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (EORv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
    5766             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::EORv16i8,
    5767             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5768             :       // GIR_Coverage, 1180,
    5769             :       GIR_Done,
    5770             :     // Label 376: @12662
    5771             :     GIM_Reject,
    5772             :     // Label 356: @12663
    5773             :     GIM_Reject,
    5774             :     // Label 8: @12664
    5775             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 11, /*)*//*default:*//*Label 387*/ 20156,
    5776             :     /*GILLT_s32*//*Label 377*/ 12680,
    5777             :     /*GILLT_s64*//*Label 378*/ 12726,
    5778             :     /*GILLT_s128*//*Label 379*/ 14302,
    5779             :     /*GILLT_v2s32*//*Label 380*/ 14974,
    5780             :     /*GILLT_v2s64*//*Label 381*/ 15869,
    5781             :     /*GILLT_v4s16*//*Label 382*/ 16650,
    5782             :     /*GILLT_v4s32*//*Label 383*/ 17545,
    5783             :     /*GILLT_v8s8*//*Label 384*/ 18390,
    5784             :     /*GILLT_v8s16*//*Label 385*/ 18863,
    5785             :     /*GILLT_v16s8*//*Label 386*/ 19708,
    5786             :     // Label 377: @12680
    5787             :     GIM_Try, /*On fail goto*//*Label 388*/ 12725,
    5788             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    5789             :       GIM_Try, /*On fail goto*//*Label 389*/ 12705, // Rule ID 3209 //
    5790             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
    5791             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5792             :         // (bitconvert:{ *:[f32] } GPR32:{ *:[i32] }:$Xn)  =>  (COPY_TO_REGCLASS:{ *:[f32] } GPR32:{ *:[i32] }:$Xn, FPR32:{ *:[i32] })
    5793             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    5794             :         GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR32*/5,
    5795             :         // GIR_Coverage, 3209,
    5796             :         GIR_Done,
    5797             :       // Label 389: @12705
    5798             :       GIM_Try, /*On fail goto*//*Label 390*/ 12724, // Rule ID 3210 //
    5799             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    5800             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR32RegClassID,
    5801             :         // (bitconvert:{ *:[i32] } FPR32:{ *:[f32] }:$Xn)  =>  (COPY_TO_REGCLASS:{ *:[i32] } FPR32:{ *:[f32] }:$Xn, GPR32:{ *:[i32] })
    5802             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    5803             :         GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GPR32*/6,
    5804             :         // GIR_Coverage, 3210,
    5805             :         GIR_Done,
    5806             :       // Label 390: @12724
    5807             :       GIM_Reject,
    5808             :     // Label 388: @12725
    5809             :     GIM_Reject,
    5810             :     // Label 378: @12726
    5811             :     GIM_Try, /*On fail goto*//*Label 391*/ 12751, // Rule ID 3187 //
    5812             :       GIM_CheckFeatures, GIFBS_IsLE,
    5813             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    5814             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5815             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5816             :       // (bitconvert:{ *:[i64] } V64:{ *:[v8i8] }:$Vn)  =>  (COPY_TO_REGCLASS:{ *:[i64] } V64:{ *:[v8i8] }:$Vn, GPR64:{ *:[i32] })
    5817             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    5818             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GPR64*/17,
    5819             :       // GIR_Coverage, 3187,
    5820             :       GIR_Done,
    5821             :     // Label 391: @12751
    5822             :     GIM_Try, /*On fail goto*//*Label 392*/ 12776, // Rule ID 3188 //
    5823             :       GIM_CheckFeatures, GIFBS_IsLE,
    5824             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    5825             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5826             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5827             :       // (bitconvert:{ *:[i64] } V64:{ *:[v4i16] }:$Vn)  =>  (COPY_TO_REGCLASS:{ *:[i64] } V64:{ *:[v4i16] }:$Vn, GPR64:{ *:[i32] })
    5828             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    5829             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GPR64*/17,
    5830             :       // GIR_Coverage, 3188,
    5831             :       GIR_Done,
    5832             :     // Label 392: @12776
    5833             :     GIM_Try, /*On fail goto*//*Label 393*/ 12801, // Rule ID 3189 //
    5834             :       GIM_CheckFeatures, GIFBS_IsLE,
    5835             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    5836             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5837             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5838             :       // (bitconvert:{ *:[i64] } V64:{ *:[v2i32] }:$Vn)  =>  (COPY_TO_REGCLASS:{ *:[i64] } V64:{ *:[v2i32] }:$Vn, GPR64:{ *:[i32] })
    5839             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    5840             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GPR64*/17,
    5841             :       // GIR_Coverage, 3189,
    5842             :       GIR_Done,
    5843             :     // Label 393: @12801
    5844             :     GIM_Try, /*On fail goto*//*Label 394*/ 12826, // Rule ID 3190 //
    5845             :       GIM_CheckFeatures, GIFBS_IsLE,
    5846             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    5847             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5848             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5849             :       // (bitconvert:{ *:[i64] } V64:{ *:[v4f16] }:$Vn)  =>  (COPY_TO_REGCLASS:{ *:[i64] } V64:{ *:[v4f16] }:$Vn, GPR64:{ *:[i32] })
    5850             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    5851             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GPR64*/17,
    5852             :       // GIR_Coverage, 3190,
    5853             :       GIR_Done,
    5854             :     // Label 394: @12826
    5855             :     GIM_Try, /*On fail goto*//*Label 395*/ 12851, // Rule ID 3191 //
    5856             :       GIM_CheckFeatures, GIFBS_IsLE,
    5857             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    5858             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5859             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5860             :       // (bitconvert:{ *:[i64] } V64:{ *:[v2f32] }:$Vn)  =>  (COPY_TO_REGCLASS:{ *:[i64] } V64:{ *:[v2f32] }:$Vn, GPR64:{ *:[i32] })
    5861             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    5862             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GPR64*/17,
    5863             :       // GIR_Coverage, 3191,
    5864             :       GIR_Done,
    5865             :     // Label 395: @12851
    5866             :     GIM_Try, /*On fail goto*//*Label 396*/ 12876, // Rule ID 3192 //
    5867             :       GIM_CheckFeatures, GIFBS_IsLE,
    5868             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    5869             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5870             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5871             :       // (bitconvert:{ *:[i64] } V64:{ *:[v1f64] }:$Vn)  =>  (COPY_TO_REGCLASS:{ *:[i64] } V64:{ *:[v1f64] }:$Vn, GPR64:{ *:[i32] })
    5872             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    5873             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GPR64*/17,
    5874             :       // GIR_Coverage, 3192,
    5875             :       GIR_Done,
    5876             :     // Label 396: @12876
    5877             :     GIM_Try, /*On fail goto*//*Label 397*/ 12924, // Rule ID 3198 //
    5878             :       GIM_CheckFeatures, GIFBS_IsBE,
    5879             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    5880             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5881             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5882             :       // (bitconvert:{ *:[i64] } V64:{ *:[v8i8] }:$Vn)  =>  (REV64v8i8:{ *:[i64] } (COPY_TO_REGCLASS:{ *:[i64] } V64:{ *:[v8i8] }:$Vn, GPR64:{ *:[i32] }))
    5883             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
    5884             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY,
    5885             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    5886             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // Vn
    5887             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    5888             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::REV64v8i8,
    5889             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5890             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    5891             :       GIR_EraseFromParent, /*InsnID*/0,
    5892             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5893             :       // GIR_Coverage, 3198,
    5894             :       GIR_Done,
    5895             :     // Label 397: @12924
    5896             :     GIM_Try, /*On fail goto*//*Label 398*/ 12972, // Rule ID 3199 //
    5897             :       GIM_CheckFeatures, GIFBS_IsBE,
    5898             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    5899             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5900             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5901             :       // (bitconvert:{ *:[i64] } V64:{ *:[v4i16] }:$Vn)  =>  (REV64v4i16:{ *:[i64] } (COPY_TO_REGCLASS:{ *:[i64] } V64:{ *:[v4i16] }:$Vn, GPR64:{ *:[i32] }))
    5902             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
    5903             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY,
    5904             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    5905             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // Vn
    5906             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    5907             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    5908             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5909             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    5910             :       GIR_EraseFromParent, /*InsnID*/0,
    5911             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5912             :       // GIR_Coverage, 3199,
    5913             :       GIR_Done,
    5914             :     // Label 398: @12972
    5915             :     GIM_Try, /*On fail goto*//*Label 399*/ 13020, // Rule ID 3200 //
    5916             :       GIM_CheckFeatures, GIFBS_IsBE,
    5917             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    5918             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5919             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5920             :       // (bitconvert:{ *:[i64] } V64:{ *:[v2i32] }:$Vn)  =>  (REV64v2i32:{ *:[i64] } (COPY_TO_REGCLASS:{ *:[i64] } V64:{ *:[v2i32] }:$Vn, GPR64:{ *:[i32] }))
    5921             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
    5922             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY,
    5923             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    5924             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // Vn
    5925             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    5926             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    5927             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5928             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    5929             :       GIR_EraseFromParent, /*InsnID*/0,
    5930             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5931             :       // GIR_Coverage, 3200,
    5932             :       GIR_Done,
    5933             :     // Label 399: @13020
    5934             :     GIM_Try, /*On fail goto*//*Label 400*/ 13068, // Rule ID 3201 //
    5935             :       GIM_CheckFeatures, GIFBS_IsBE,
    5936             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    5937             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5938             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5939             :       // (bitconvert:{ *:[i64] } V64:{ *:[v4f16] }:$Vn)  =>  (REV64v4i16:{ *:[i64] } (COPY_TO_REGCLASS:{ *:[i64] } V64:{ *:[v4f16] }:$Vn, GPR64:{ *:[i32] }))
    5940             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
    5941             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY,
    5942             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    5943             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // Vn
    5944             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    5945             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    5946             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5947             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    5948             :       GIR_EraseFromParent, /*InsnID*/0,
    5949             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5950             :       // GIR_Coverage, 3201,
    5951             :       GIR_Done,
    5952             :     // Label 400: @13068
    5953             :     GIM_Try, /*On fail goto*//*Label 401*/ 13116, // Rule ID 3202 //
    5954             :       GIM_CheckFeatures, GIFBS_IsBE,
    5955             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    5956             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5957             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5958             :       // (bitconvert:{ *:[i64] } V64:{ *:[v2f32] }:$Vn)  =>  (REV64v2i32:{ *:[i64] } (COPY_TO_REGCLASS:{ *:[i64] } V64:{ *:[v2f32] }:$Vn, GPR64:{ *:[i32] }))
    5959             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
    5960             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY,
    5961             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    5962             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // Vn
    5963             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    5964             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    5965             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5966             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    5967             :       GIR_EraseFromParent, /*InsnID*/0,
    5968             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5969             :       // GIR_Coverage, 3202,
    5970             :       GIR_Done,
    5971             :     // Label 401: @13116
    5972             :     GIM_Try, /*On fail goto*//*Label 402*/ 13139, // Rule ID 3203 //
    5973             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    5974             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5975             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5976             :       // (bitconvert:{ *:[v1i64] } GPR64:{ *:[i64] }:$Xn)  =>  (COPY_TO_REGCLASS:{ *:[v1i64] } GPR64:{ *:[i64] }:$Xn, FPR64:{ *:[i32] })
    5977             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    5978             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    5979             :       // GIR_Coverage, 3203,
    5980             :       GIR_Done,
    5981             :     // Label 402: @13139
    5982             :     GIM_Try, /*On fail goto*//*Label 403*/ 13162, // Rule ID 3204 //
    5983             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    5984             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5985             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5986             :       // (bitconvert:{ *:[v1f64] } GPR64:{ *:[i64] }:$Xn)  =>  (COPY_TO_REGCLASS:{ *:[v1f64] } GPR64:{ *:[i64] }:$Xn, FPR64:{ *:[i32] })
    5987             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    5988             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    5989             :       // GIR_Coverage, 3204,
    5990             :       GIR_Done,
    5991             :     // Label 403: @13162
    5992             :     GIM_Try, /*On fail goto*//*Label 404*/ 13185, // Rule ID 3205 //
    5993             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    5994             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5995             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5996             :       // (bitconvert:{ *:[i64] } V64:{ *:[v1i64] }:$Vn)  =>  (COPY_TO_REGCLASS:{ *:[i64] } V64:{ *:[v1i64] }:$Vn, GPR64:{ *:[i32] })
    5997             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    5998             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GPR64*/17,
    5999             :       // GIR_Coverage, 3205,
    6000             :       GIR_Done,
    6001             :     // Label 404: @13185
    6002             :     GIM_Try, /*On fail goto*//*Label 405*/ 13208, // Rule ID 3211 //
    6003             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6004             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6005             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    6006             :       // (bitconvert:{ *:[f64] } GPR64:{ *:[i64] }:$Xn)  =>  (COPY_TO_REGCLASS:{ *:[f64] } GPR64:{ *:[i64] }:$Xn, FPR64:{ *:[i32] })
    6007             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6008             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6009             :       // GIR_Coverage, 3211,
    6010             :       GIR_Done,
    6011             :     // Label 405: @13208
    6012             :     GIM_Try, /*On fail goto*//*Label 406*/ 13231, // Rule ID 3212 //
    6013             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6014             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    6015             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6016             :       // (bitconvert:{ *:[i64] } FPR64:{ *:[f64] }:$Xn)  =>  (COPY_TO_REGCLASS:{ *:[i64] } FPR64:{ *:[f64] }:$Xn, GPR64:{ *:[i32] })
    6017             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6018             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GPR64*/17,
    6019             :       // GIR_Coverage, 3212,
    6020             :       GIR_Done,
    6021             :     // Label 406: @13231
    6022             :     GIM_Try, /*On fail goto*//*Label 407*/ 13254, // Rule ID 3213 //
    6023             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6024             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    6025             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6026             :       // (bitconvert:{ *:[i64] } V64:{ *:[v1f64] }:$Vn)  =>  (COPY_TO_REGCLASS:{ *:[i64] } V64:{ *:[v1f64] }:$Vn, GPR64:{ *:[i32] })
    6027             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6028             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GPR64*/17,
    6029             :       // GIR_Coverage, 3213,
    6030             :       GIR_Done,
    6031             :     // Label 407: @13254
    6032             :     GIM_Try, /*On fail goto*//*Label 408*/ 13288, // Rule ID 3214 //
    6033             :       GIM_CheckFeatures, GIFBS_IsLE,
    6034             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    6035             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6036             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6037             :       // (bitconvert:{ *:[v1i64] } FPR64:{ *:[v2i32] }:$src)  =>  FPR64:{ *:[v1i64] }:$src
    6038             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6039             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6040             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6041             :       GIR_EraseFromParent, /*InsnID*/0,
    6042             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6043             :       // GIR_Coverage, 3214,
    6044             :       GIR_Done,
    6045             :     // Label 408: @13288
    6046             :     GIM_Try, /*On fail goto*//*Label 409*/ 13322, // Rule ID 3215 //
    6047             :       GIM_CheckFeatures, GIFBS_IsLE,
    6048             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6049             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6050             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6051             :       // (bitconvert:{ *:[v1i64] } FPR64:{ *:[v4i16] }:$src)  =>  FPR64:{ *:[v1i64] }:$src
    6052             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6053             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6054             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6055             :       GIR_EraseFromParent, /*InsnID*/0,
    6056             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6057             :       // GIR_Coverage, 3215,
    6058             :       GIR_Done,
    6059             :     // Label 409: @13322
    6060             :     GIM_Try, /*On fail goto*//*Label 410*/ 13356, // Rule ID 3216 //
    6061             :       GIM_CheckFeatures, GIFBS_IsLE,
    6062             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    6063             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6064             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6065             :       // (bitconvert:{ *:[v1i64] } FPR64:{ *:[v8i8] }:$src)  =>  FPR64:{ *:[v1i64] }:$src
    6066             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6067             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6068             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6069             :       GIR_EraseFromParent, /*InsnID*/0,
    6070             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6071             :       // GIR_Coverage, 3216,
    6072             :       GIR_Done,
    6073             :     // Label 410: @13356
    6074             :     GIM_Try, /*On fail goto*//*Label 411*/ 13390, // Rule ID 3217 //
    6075             :       GIM_CheckFeatures, GIFBS_IsLE,
    6076             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6077             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6078             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6079             :       // (bitconvert:{ *:[v1i64] } FPR64:{ *:[v4f16] }:$src)  =>  FPR64:{ *:[v1i64] }:$src
    6080             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6081             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6082             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6083             :       GIR_EraseFromParent, /*InsnID*/0,
    6084             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6085             :       // GIR_Coverage, 3217,
    6086             :       GIR_Done,
    6087             :     // Label 411: @13390
    6088             :     GIM_Try, /*On fail goto*//*Label 412*/ 13424, // Rule ID 3218 //
    6089             :       GIM_CheckFeatures, GIFBS_IsLE,
    6090             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    6091             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6092             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6093             :       // (bitconvert:{ *:[v1i64] } FPR64:{ *:[v2f32] }:$src)  =>  FPR64:{ *:[v1i64] }:$src
    6094             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6095             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6096             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6097             :       GIR_EraseFromParent, /*InsnID*/0,
    6098             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6099             :       // GIR_Coverage, 3218,
    6100             :       GIR_Done,
    6101             :     // Label 412: @13424
    6102             :     GIM_Try, /*On fail goto*//*Label 413*/ 13447, // Rule ID 3219 //
    6103             :       GIM_CheckFeatures, GIFBS_IsBE,
    6104             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    6105             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6106             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6107             :       // (bitconvert:{ *:[v1i64] } FPR64:{ *:[v2i32] }:$src)  =>  (REV64v2i32:{ *:[v1i64] } FPR64:{ *:[v2i32] }:$src)
    6108             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    6109             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6110             :       // GIR_Coverage, 3219,
    6111             :       GIR_Done,
    6112             :     // Label 413: @13447
    6113             :     GIM_Try, /*On fail goto*//*Label 414*/ 13470, // Rule ID 3220 //
    6114             :       GIM_CheckFeatures, GIFBS_IsBE,
    6115             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6116             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6117             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6118             :       // (bitconvert:{ *:[v1i64] } FPR64:{ *:[v4i16] }:$src)  =>  (REV64v4i16:{ *:[v1i64] } FPR64:{ *:[v4i16] }:$src)
    6119             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    6120             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6121             :       // GIR_Coverage, 3220,
    6122             :       GIR_Done,
    6123             :     // Label 414: @13470
    6124             :     GIM_Try, /*On fail goto*//*Label 415*/ 13493, // Rule ID 3221 //
    6125             :       GIM_CheckFeatures, GIFBS_IsBE,
    6126             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    6127             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6128             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6129             :       // (bitconvert:{ *:[v1i64] } FPR64:{ *:[v8i8] }:$src)  =>  (REV64v8i8:{ *:[v1i64] } FPR64:{ *:[v8i8] }:$src)
    6130             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v8i8,
    6131             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6132             :       // GIR_Coverage, 3221,
    6133             :       GIR_Done,
    6134             :     // Label 415: @13493
    6135             :     GIM_Try, /*On fail goto*//*Label 416*/ 13516, // Rule ID 3222 //
    6136             :       GIM_CheckFeatures, GIFBS_IsBE,
    6137             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6138             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6139             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6140             :       // (bitconvert:{ *:[v1i64] } FPR64:{ *:[v4f16] }:$src)  =>  (REV64v4i16:{ *:[v1i64] } FPR64:{ *:[v4f16] }:$src)
    6141             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    6142             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6143             :       // GIR_Coverage, 3222,
    6144             :       GIR_Done,
    6145             :     // Label 416: @13516
    6146             :     GIM_Try, /*On fail goto*//*Label 417*/ 13539, // Rule ID 3223 //
    6147             :       GIM_CheckFeatures, GIFBS_IsBE,
    6148             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    6149             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6150             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6151             :       // (bitconvert:{ *:[v1i64] } FPR64:{ *:[v2f32] }:$src)  =>  (REV64v2i32:{ *:[v1i64] } FPR64:{ *:[v2f32] }:$src)
    6152             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    6153             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6154             :       // GIR_Coverage, 3223,
    6155             :       GIR_Done,
    6156             :     // Label 417: @13539
    6157             :     GIM_Try, /*On fail goto*//*Label 418*/ 13571, // Rule ID 3224 //
    6158             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6159             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6160             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6161             :       // (bitconvert:{ *:[v1i64] } FPR64:{ *:[v1f64] }:$src)  =>  FPR64:{ *:[v1i64] }:$src
    6162             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6163             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6164             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6165             :       GIR_EraseFromParent, /*InsnID*/0,
    6166             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6167             :       // GIR_Coverage, 3224,
    6168             :       GIR_Done,
    6169             :     // Label 418: @13571
    6170             :     GIM_Try, /*On fail goto*//*Label 419*/ 13603, // Rule ID 3225 //
    6171             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6172             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6173             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6174             :       // (bitconvert:{ *:[v1i64] } FPR64:{ *:[f64] }:$src)  =>  FPR64:{ *:[v1i64] }:$src
    6175             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6176             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6177             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6178             :       GIR_EraseFromParent, /*InsnID*/0,
    6179             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6180             :       // GIR_Coverage, 3225,
    6181             :       GIR_Done,
    6182             :     // Label 419: @13603
    6183             :     GIM_Try, /*On fail goto*//*Label 420*/ 13637, // Rule ID 3279 //
    6184             :       GIM_CheckFeatures, GIFBS_IsLE,
    6185             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    6186             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6187             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6188             :       // (bitconvert:{ *:[f64] } FPR64:{ *:[v2i32] }:$src)  =>  FPR64:{ *:[f64] }:$src
    6189             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6190             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6191             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6192             :       GIR_EraseFromParent, /*InsnID*/0,
    6193             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6194             :       // GIR_Coverage, 3279,
    6195             :       GIR_Done,
    6196             :     // Label 420: @13637
    6197             :     GIM_Try, /*On fail goto*//*Label 421*/ 13671, // Rule ID 3280 //
    6198             :       GIM_CheckFeatures, GIFBS_IsLE,
    6199             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6200             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6201             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6202             :       // (bitconvert:{ *:[f64] } FPR64:{ *:[v4i16] }:$src)  =>  FPR64:{ *:[f64] }:$src
    6203             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6204             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6205             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6206             :       GIR_EraseFromParent, /*InsnID*/0,
    6207             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6208             :       // GIR_Coverage, 3280,
    6209             :       GIR_Done,
    6210             :     // Label 421: @13671
    6211             :     GIM_Try, /*On fail goto*//*Label 422*/ 13705, // Rule ID 3281 //
    6212             :       GIM_CheckFeatures, GIFBS_IsLE,
    6213             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    6214             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6215             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6216             :       // (bitconvert:{ *:[f64] } FPR64:{ *:[v2f32] }:$src)  =>  FPR64:{ *:[f64] }:$src
    6217             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6218             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6219             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6220             :       GIR_EraseFromParent, /*InsnID*/0,
    6221             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6222             :       // GIR_Coverage, 3281,
    6223             :       GIR_Done,
    6224             :     // Label 422: @13705
    6225             :     GIM_Try, /*On fail goto*//*Label 423*/ 13739, // Rule ID 3282 //
    6226             :       GIM_CheckFeatures, GIFBS_IsLE,
    6227             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    6228             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6229             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6230             :       // (bitconvert:{ *:[f64] } FPR64:{ *:[v8i8] }:$src)  =>  FPR64:{ *:[f64] }:$src
    6231             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6232             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6233             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6234             :       GIR_EraseFromParent, /*InsnID*/0,
    6235             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6236             :       // GIR_Coverage, 3282,
    6237             :       GIR_Done,
    6238             :     // Label 423: @13739
    6239             :     GIM_Try, /*On fail goto*//*Label 424*/ 13773, // Rule ID 3283 //
    6240             :       GIM_CheckFeatures, GIFBS_IsLE,
    6241             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6242             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6243             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6244             :       // (bitconvert:{ *:[f64] } FPR64:{ *:[v4f16] }:$src)  =>  FPR64:{ *:[f64] }:$src
    6245             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6246             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6247             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6248             :       GIR_EraseFromParent, /*InsnID*/0,
    6249             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6250             :       // GIR_Coverage, 3283,
    6251             :       GIR_Done,
    6252             :     // Label 424: @13773
    6253             :     GIM_Try, /*On fail goto*//*Label 425*/ 13796, // Rule ID 3284 //
    6254             :       GIM_CheckFeatures, GIFBS_IsBE,
    6255             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    6256             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6257             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6258             :       // (bitconvert:{ *:[f64] } FPR64:{ *:[v2i32] }:$src)  =>  (REV64v2i32:{ *:[f64] } FPR64:{ *:[v2i32] }:$src)
    6259             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    6260             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6261             :       // GIR_Coverage, 3284,
    6262             :       GIR_Done,
    6263             :     // Label 425: @13796
    6264             :     GIM_Try, /*On fail goto*//*Label 426*/ 13819, // Rule ID 3285 //
    6265             :       GIM_CheckFeatures, GIFBS_IsBE,
    6266             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6267             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6268             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6269             :       // (bitconvert:{ *:[f64] } FPR64:{ *:[v4i16] }:$src)  =>  (REV64v4i16:{ *:[f64] } FPR64:{ *:[v4i16] }:$src)
    6270             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    6271             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6272             :       // GIR_Coverage, 3285,
    6273             :       GIR_Done,
    6274             :     // Label 426: @13819
    6275             :     GIM_Try, /*On fail goto*//*Label 427*/ 13842, // Rule ID 3286 //
    6276             :       GIM_CheckFeatures, GIFBS_IsBE,
    6277             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    6278             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6279             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6280             :       // (bitconvert:{ *:[f64] } FPR64:{ *:[v2f32] }:$src)  =>  (REV64v2i32:{ *:[f64] } FPR64:{ *:[v2f32] }:$src)
    6281             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    6282             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6283             :       // GIR_Coverage, 3286,
    6284             :       GIR_Done,
    6285             :     // Label 427: @13842
    6286             :     GIM_Try, /*On fail goto*//*Label 428*/ 13865, // Rule ID 3287 //
    6287             :       GIM_CheckFeatures, GIFBS_IsBE,
    6288             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    6289             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6290             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6291             :       // (bitconvert:{ *:[f64] } FPR64:{ *:[v8i8] }:$src)  =>  (REV64v8i8:{ *:[f64] } FPR64:{ *:[v8i8] }:$src)
    6292             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v8i8,
    6293             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6294             :       // GIR_Coverage, 3287,
    6295             :       GIR_Done,
    6296             :     // Label 428: @13865
    6297             :     GIM_Try, /*On fail goto*//*Label 429*/ 13888, // Rule ID 3288 //
    6298             :       GIM_CheckFeatures, GIFBS_IsBE,
    6299             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6300             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6301             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6302             :       // (bitconvert:{ *:[f64] } FPR64:{ *:[v4f16] }:$src)  =>  (REV64v4i16:{ *:[f64] } FPR64:{ *:[v4f16] }:$src)
    6303             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    6304             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6305             :       // GIR_Coverage, 3288,
    6306             :       GIR_Done,
    6307             :     // Label 429: @13888
    6308             :     GIM_Try, /*On fail goto*//*Label 430*/ 13920, // Rule ID 3289 //
    6309             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6310             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6311             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6312             :       // (bitconvert:{ *:[f64] } FPR64:{ *:[v1i64] }:$src)  =>  FPR64:{ *:[f64] }:$src
    6313             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6314             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6315             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6316             :       GIR_EraseFromParent, /*InsnID*/0,
    6317             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6318             :       // GIR_Coverage, 3289,
    6319             :       GIR_Done,
    6320             :     // Label 430: @13920
    6321             :     GIM_Try, /*On fail goto*//*Label 431*/ 13952, // Rule ID 3290 //
    6322             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6323             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6324             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6325             :       // (bitconvert:{ *:[f64] } FPR64:{ *:[v1f64] }:$src)  =>  FPR64:{ *:[f64] }:$src
    6326             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6327             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6328             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6329             :       GIR_EraseFromParent, /*InsnID*/0,
    6330             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6331             :       // GIR_Coverage, 3290,
    6332             :       GIR_Done,
    6333             :     // Label 431: @13952
    6334             :     GIM_Try, /*On fail goto*//*Label 432*/ 13986, // Rule ID 3291 //
    6335             :       GIM_CheckFeatures, GIFBS_IsLE,
    6336             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    6337             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6338             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6339             :       // (bitconvert:{ *:[v1f64] } FPR64:{ *:[v2i32] }:$src)  =>  FPR64:{ *:[v1f64] }:$src
    6340             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6341             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6342             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6343             :       GIR_EraseFromParent, /*InsnID*/0,
    6344             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6345             :       // GIR_Coverage, 3291,
    6346             :       GIR_Done,
    6347             :     // Label 432: @13986
    6348             :     GIM_Try, /*On fail goto*//*Label 433*/ 14020, // Rule ID 3292 //
    6349             :       GIM_CheckFeatures, GIFBS_IsLE,
    6350             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6351             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6352             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6353             :       // (bitconvert:{ *:[v1f64] } FPR64:{ *:[v4i16] }:$src)  =>  FPR64:{ *:[v1f64] }:$src
    6354             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6355             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6356             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6357             :       GIR_EraseFromParent, /*InsnID*/0,
    6358             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6359             :       // GIR_Coverage, 3292,
    6360             :       GIR_Done,
    6361             :     // Label 433: @14020
    6362             :     GIM_Try, /*On fail goto*//*Label 434*/ 14054, // Rule ID 3293 //
    6363             :       GIM_CheckFeatures, GIFBS_IsLE,
    6364             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    6365             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6366             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6367             :       // (bitconvert:{ *:[v1f64] } FPR64:{ *:[v8i8] }:$src)  =>  FPR64:{ *:[v1f64] }:$src
    6368             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6369             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6370             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6371             :       GIR_EraseFromParent, /*InsnID*/0,
    6372             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6373             :       // GIR_Coverage, 3293,
    6374             :       GIR_Done,
    6375             :     // Label 434: @14054
    6376             :     GIM_Try, /*On fail goto*//*Label 435*/ 14088, // Rule ID 3294 //
    6377             :       GIM_CheckFeatures, GIFBS_IsLE,
    6378             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    6379             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6380             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6381             :       // (bitconvert:{ *:[v1f64] } FPR64:{ *:[v2f32] }:$src)  =>  FPR64:{ *:[v1f64] }:$src
    6382             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6383             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6384             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6385             :       GIR_EraseFromParent, /*InsnID*/0,
    6386             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6387             :       // GIR_Coverage, 3294,
    6388             :       GIR_Done,
    6389             :     // Label 435: @14088
    6390             :     GIM_Try, /*On fail goto*//*Label 436*/ 14122, // Rule ID 3295 //
    6391             :       GIM_CheckFeatures, GIFBS_IsLE,
    6392             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6393             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6394             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6395             :       // (bitconvert:{ *:[v1f64] } FPR64:{ *:[v4f16] }:$src)  =>  FPR64:{ *:[v1f64] }:$src
    6396             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6397             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6398             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6399             :       GIR_EraseFromParent, /*InsnID*/0,
    6400             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6401             :       // GIR_Coverage, 3295,
    6402             :       GIR_Done,
    6403             :     // Label 436: @14122
    6404             :     GIM_Try, /*On fail goto*//*Label 437*/ 14145, // Rule ID 3296 //
    6405             :       GIM_CheckFeatures, GIFBS_IsBE,
    6406             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    6407             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6408             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6409             :       // (bitconvert:{ *:[v1f64] } FPR64:{ *:[v2i32] }:$src)  =>  (REV64v2i32:{ *:[v1f64] } FPR64:{ *:[v2i32] }:$src)
    6410             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    6411             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6412             :       // GIR_Coverage, 3296,
    6413             :       GIR_Done,
    6414             :     // Label 437: @14145
    6415             :     GIM_Try, /*On fail goto*//*Label 438*/ 14168, // Rule ID 3297 //
    6416             :       GIM_CheckFeatures, GIFBS_IsBE,
    6417             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6418             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6419             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6420             :       // (bitconvert:{ *:[v1f64] } FPR64:{ *:[v4i16] }:$src)  =>  (REV64v4i16:{ *:[v1f64] } FPR64:{ *:[v4i16] }:$src)
    6421             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    6422             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6423             :       // GIR_Coverage, 3297,
    6424             :       GIR_Done,
    6425             :     // Label 438: @14168
    6426             :     GIM_Try, /*On fail goto*//*Label 439*/ 14191, // Rule ID 3298 //
    6427             :       GIM_CheckFeatures, GIFBS_IsBE,
    6428             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    6429             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6430             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6431             :       // (bitconvert:{ *:[v1f64] } FPR64:{ *:[v8i8] }:$src)  =>  (REV64v8i8:{ *:[v1f64] } FPR64:{ *:[v8i8] }:$src)
    6432             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v8i8,
    6433             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6434             :       // GIR_Coverage, 3298,
    6435             :       GIR_Done,
    6436             :     // Label 439: @14191
    6437             :     GIM_Try, /*On fail goto*//*Label 440*/ 14214, // Rule ID 3299 //
    6438             :       GIM_CheckFeatures, GIFBS_IsBE,
    6439             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    6440             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6441             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6442             :       // (bitconvert:{ *:[v1f64] } FPR64:{ *:[v2f32] }:$src)  =>  (REV64v2i32:{ *:[v1f64] } FPR64:{ *:[v2f32] }:$src)
    6443             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    6444             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6445             :       // GIR_Coverage, 3299,
    6446             :       GIR_Done,
    6447             :     // Label 440: @14214
    6448             :     GIM_Try, /*On fail goto*//*Label 441*/ 14237, // Rule ID 3300 //
    6449             :       GIM_CheckFeatures, GIFBS_IsBE,
    6450             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6451             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6452             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6453             :       // (bitconvert:{ *:[v1f64] } FPR64:{ *:[v4f16] }:$src)  =>  (REV64v4i16:{ *:[v1f64] } FPR64:{ *:[v4f16] }:$src)
    6454             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    6455             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6456             :       // GIR_Coverage, 3300,
    6457             :       GIR_Done,
    6458             :     // Label 441: @14237
    6459             :     GIM_Try, /*On fail goto*//*Label 442*/ 14269, // Rule ID 3301 //
    6460             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6461             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6462             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6463             :       // (bitconvert:{ *:[v1f64] } FPR64:{ *:[v1i64] }:$src)  =>  FPR64:{ *:[v1f64] }:$src
    6464             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6465             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6466             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6467             :       GIR_EraseFromParent, /*InsnID*/0,
    6468             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6469             :       // GIR_Coverage, 3301,
    6470             :       GIR_Done,
    6471             :     // Label 442: @14269
    6472             :     GIM_Try, /*On fail goto*//*Label 443*/ 14301, // Rule ID 3302 //
    6473             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6474             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6475             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6476             :       // (bitconvert:{ *:[v1f64] } FPR64:{ *:[f64] }:$src)  =>  FPR64:{ *:[v1f64] }:$src
    6477             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6478             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6479             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6480             :       GIR_EraseFromParent, /*InsnID*/0,
    6481             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6482             :       // GIR_Coverage, 3302,
    6483             :       GIR_Done,
    6484             :     // Label 443: @14301
    6485             :     GIM_Reject,
    6486             :     // Label 379: @14302
    6487             :     GIM_Try, /*On fail goto*//*Label 444*/ 14336, // Rule ID 3316 //
    6488             :       GIM_CheckFeatures, GIFBS_IsLE,
    6489             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    6490             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6491             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    6492             :       // (bitconvert:{ *:[f128] } FPR128:{ *:[v2i64] }:$src)  =>  FPR128:{ *:[f128] }:$src
    6493             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6494             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6495             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6496             :       GIR_EraseFromParent, /*InsnID*/0,
    6497             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    6498             :       // GIR_Coverage, 3316,
    6499             :       GIR_Done,
    6500             :     // Label 444: @14336
    6501             :     GIM_Try, /*On fail goto*//*Label 445*/ 14370, // Rule ID 3317 //
    6502             :       GIM_CheckFeatures, GIFBS_IsLE,
    6503             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    6504             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6505             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    6506             :       // (bitconvert:{ *:[f128] } FPR128:{ *:[v4i32] }:$src)  =>  FPR128:{ *:[f128] }:$src
    6507             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6508             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6509             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6510             :       GIR_EraseFromParent, /*InsnID*/0,
    6511             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    6512             :       // GIR_Coverage, 3317,
    6513             :       GIR_Done,
    6514             :     // Label 445: @14370
    6515             :     GIM_Try, /*On fail goto*//*Label 446*/ 14404, // Rule ID 3318 //
    6516             :       GIM_CheckFeatures, GIFBS_IsLE,
    6517             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    6518             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6519             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    6520             :       // (bitconvert:{ *:[f128] } FPR128:{ *:[v8i16] }:$src)  =>  FPR128:{ *:[f128] }:$src
    6521             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6522             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6523             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6524             :       GIR_EraseFromParent, /*InsnID*/0,
    6525             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    6526             :       // GIR_Coverage, 3318,
    6527             :       GIR_Done,
    6528             :     // Label 446: @14404
    6529             :     GIM_Try, /*On fail goto*//*Label 447*/ 14438, // Rule ID 3319 //
    6530             :       GIM_CheckFeatures, GIFBS_IsLE,
    6531             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    6532             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6533             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    6534             :       // (bitconvert:{ *:[f128] } FPR128:{ *:[v2f64] }:$src)  =>  FPR128:{ *:[f128] }:$src
    6535             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6536             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6537             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6538             :       GIR_EraseFromParent, /*InsnID*/0,
    6539             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    6540             :       // GIR_Coverage, 3319,
    6541             :       GIR_Done,
    6542             :     // Label 447: @14438
    6543             :     GIM_Try, /*On fail goto*//*Label 448*/ 14472, // Rule ID 3320 //
    6544             :       GIM_CheckFeatures, GIFBS_IsLE,
    6545             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    6546             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6547             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    6548             :       // (bitconvert:{ *:[f128] } FPR128:{ *:[v4f32] }:$src)  =>  FPR128:{ *:[f128] }:$src
    6549             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6550             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6551             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6552             :       GIR_EraseFromParent, /*InsnID*/0,
    6553             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    6554             :       // GIR_Coverage, 3320,
    6555             :       GIR_Done,
    6556             :     // Label 448: @14472
    6557             :     GIM_Try, /*On fail goto*//*Label 449*/ 14506, // Rule ID 3321 //
    6558             :       GIM_CheckFeatures, GIFBS_IsLE,
    6559             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    6560             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6561             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    6562             :       // (bitconvert:{ *:[f128] } FPR128:{ *:[v8f16] }:$src)  =>  FPR128:{ *:[f128] }:$src
    6563             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6564             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6565             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6566             :       GIR_EraseFromParent, /*InsnID*/0,
    6567             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    6568             :       // GIR_Coverage, 3321,
    6569             :       GIR_Done,
    6570             :     // Label 449: @14506
    6571             :     GIM_Try, /*On fail goto*//*Label 450*/ 14540, // Rule ID 3322 //
    6572             :       GIM_CheckFeatures, GIFBS_IsLE,
    6573             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    6574             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6575             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    6576             :       // (bitconvert:{ *:[f128] } FPR128:{ *:[v16i8] }:$src)  =>  FPR128:{ *:[f128] }:$src
    6577             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6578             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6579             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6580             :       GIR_EraseFromParent, /*InsnID*/0,
    6581             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    6582             :       // GIR_Coverage, 3322,
    6583             :       GIR_Done,
    6584             :     // Label 450: @14540
    6585             :     GIM_Try, /*On fail goto*//*Label 451*/ 14579, // Rule ID 3323 //
    6586             :       GIM_CheckFeatures, GIFBS_IsBE,
    6587             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    6588             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6589             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    6590             :       // (bitconvert:{ *:[f128] } FPR128:{ *:[v2i64] }:$src)  =>  (EXTv16i8:{ *:[f128] } FPR128:{ *:[v2i64] }:$src, FPR128:{ *:[v2i64] }:$src, 8:{ *:[i32] })
    6591             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EXTv16i8,
    6592             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6593             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6594             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6595             :       GIR_AddImm, /*InsnID*/0, /*Imm*/8,
    6596             :       GIR_EraseFromParent, /*InsnID*/0,
    6597             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6598             :       // GIR_Coverage, 3323,
    6599             :       GIR_Done,
    6600             :     // Label 451: @14579
    6601             :     GIM_Try, /*On fail goto*//*Label 452*/ 14650, // Rule ID 3324 //
    6602             :       GIM_CheckFeatures, GIFBS_IsBE,
    6603             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    6604             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6605             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    6606             :       // (bitconvert:{ *:[f128] } FPR128:{ *:[v4i32] }:$src)  =>  (EXTv16i8:{ *:[f128] } (REV64v4i32:{ *:[f128] } FPR128:{ *:[v4i32] }:$src), (REV64v4i32:{ *:[f128] } FPR128:{ *:[v4i32] }:$src), 8:{ *:[i32] })
    6607             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s128,
    6608             :       GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s128,
    6609             :       GIR_BuildMI, /*InsnID*/2, /*Opcode*/AArch64::REV64v4i32,
    6610             :       GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
    6611             :       GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
    6612             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
    6613             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::REV64v4i32,
    6614             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    6615             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
    6616             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    6617             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EXTv16i8,
    6618             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6619             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    6620             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/1, /*TempRegFlags*/0,
    6621             :       GIR_AddImm, /*InsnID*/0, /*Imm*/8,
    6622             :       GIR_EraseFromParent, /*InsnID*/0,
    6623             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6624             :       // GIR_Coverage, 3324,
    6625             :       GIR_Done,
    6626             :     // Label 452: @14650
    6627             :     GIM_Try, /*On fail goto*//*Label 453*/ 14721, // Rule ID 3325 //
    6628             :       GIM_CheckFeatures, GIFBS_IsBE,
    6629             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    6630             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6631             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    6632             :       // (bitconvert:{ *:[f128] } FPR128:{ *:[v8i16] }:$src)  =>  (EXTv16i8:{ *:[f128] } (REV64v8i16:{ *:[f128] } FPR128:{ *:[v8i16] }:$src), (REV64v8i16:{ *:[f128] } FPR128:{ *:[v8i16] }:$src), 8:{ *:[i32] })
    6633             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s128,
    6634             :       GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s128,
    6635             :       GIR_BuildMI, /*InsnID*/2, /*Opcode*/AArch64::REV64v8i16,
    6636             :       GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
    6637             :       GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
    6638             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
    6639             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::REV64v8i16,
    6640             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    6641             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
    6642             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    6643             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EXTv16i8,
    6644             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6645             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    6646             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/1, /*TempRegFlags*/0,
    6647             :       GIR_AddImm, /*InsnID*/0, /*Imm*/8,
    6648             :       GIR_EraseFromParent, /*InsnID*/0,
    6649             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6650             :       // GIR_Coverage, 3325,
    6651             :       GIR_Done,
    6652             :     // Label 453: @14721
    6653             :     GIM_Try, /*On fail goto*//*Label 454*/ 14792, // Rule ID 3326 //
    6654             :       GIM_CheckFeatures, GIFBS_IsBE,
    6655             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    6656             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6657             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    6658             :       // (bitconvert:{ *:[f128] } FPR128:{ *:[v8f16] }:$src)  =>  (EXTv16i8:{ *:[f128] } (REV64v8i16:{ *:[f128] } FPR128:{ *:[v8f16] }:$src), (REV64v8i16:{ *:[f128] } FPR128:{ *:[v8f16] }:$src), 8:{ *:[i32] })
    6659             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s128,
    6660             :       GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s128,
    6661             :       GIR_BuildMI, /*InsnID*/2, /*Opcode*/AArch64::REV64v8i16,
    6662             :       GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
    6663             :       GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
    6664             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
    6665             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::REV64v8i16,
    6666             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    6667             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
    6668             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    6669             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EXTv16i8,
    6670             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6671             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    6672             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/1, /*TempRegFlags*/0,
    6673             :       GIR_AddImm, /*InsnID*/0, /*Imm*/8,
    6674             :       GIR_EraseFromParent, /*InsnID*/0,
    6675             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6676             :       // GIR_Coverage, 3326,
    6677             :       GIR_Done,
    6678             :     // Label 454: @14792
    6679             :     GIM_Try, /*On fail goto*//*Label 455*/ 14831, // Rule ID 3327 //
    6680             :       GIM_CheckFeatures, GIFBS_IsBE,
    6681             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    6682             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6683             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    6684             :       // (bitconvert:{ *:[f128] } FPR128:{ *:[v2f64] }:$src)  =>  (EXTv16i8:{ *:[f128] } FPR128:{ *:[v2f64] }:$src, FPR128:{ *:[v2f64] }:$src, 8:{ *:[i32] })
    6685             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EXTv16i8,
    6686             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6687             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6688             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6689             :       GIR_AddImm, /*InsnID*/0, /*Imm*/8,
    6690             :       GIR_EraseFromParent, /*InsnID*/0,
    6691             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6692             :       // GIR_Coverage, 3327,
    6693             :       GIR_Done,
    6694             :     // Label 455: @14831
    6695             :     GIM_Try, /*On fail goto*//*Label 456*/ 14902, // Rule ID 3328 //
    6696             :       GIM_CheckFeatures, GIFBS_IsBE,
    6697             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    6698             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6699             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    6700             :       // (bitconvert:{ *:[f128] } FPR128:{ *:[v4f32] }:$src)  =>  (EXTv16i8:{ *:[f128] } (REV64v4i32:{ *:[f128] } FPR128:{ *:[v4f32] }:$src), (REV64v4i32:{ *:[f128] } FPR128:{ *:[v4f32] }:$src), 8:{ *:[i32] })
    6701             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s128,
    6702             :       GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s128,
    6703             :       GIR_BuildMI, /*InsnID*/2, /*Opcode*/AArch64::REV64v4i32,
    6704             :       GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
    6705             :       GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
    6706             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
    6707             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::REV64v4i32,
    6708             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    6709             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
    6710             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    6711             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EXTv16i8,
    6712             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6713             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    6714             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/1, /*TempRegFlags*/0,
    6715             :       GIR_AddImm, /*InsnID*/0, /*Imm*/8,
    6716             :       GIR_EraseFromParent, /*InsnID*/0,
    6717             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6718             :       // GIR_Coverage, 3328,
    6719             :       GIR_Done,
    6720             :     // Label 456: @14902
    6721             :     GIM_Try, /*On fail goto*//*Label 457*/ 14973, // Rule ID 3329 //
    6722             :       GIM_CheckFeatures, GIFBS_IsBE,
    6723             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    6724             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6725             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    6726             :       // (bitconvert:{ *:[f128] } FPR128:{ *:[v16i8] }:$src)  =>  (EXTv16i8:{ *:[f128] } (REV64v16i8:{ *:[f128] } FPR128:{ *:[v16i8] }:$src), (REV64v16i8:{ *:[f128] } FPR128:{ *:[v16i8] }:$src), 8:{ *:[i32] })
    6727             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s128,
    6728             :       GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s128,
    6729             :       GIR_BuildMI, /*InsnID*/2, /*Opcode*/AArch64::REV64v16i8,
    6730             :       GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
    6731             :       GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
    6732             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
    6733             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::REV64v16i8,
    6734             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    6735             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
    6736             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    6737             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EXTv16i8,
    6738             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6739             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    6740             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/1, /*TempRegFlags*/0,
    6741             :       GIR_AddImm, /*InsnID*/0, /*Imm*/8,
    6742             :       GIR_EraseFromParent, /*InsnID*/0,
    6743             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6744             :       // GIR_Coverage, 3329,
    6745             :       GIR_Done,
    6746             :     // Label 457: @14973
    6747             :     GIM_Reject,
    6748             :     // Label 380: @14974
    6749             :     GIM_Try, /*On fail goto*//*Label 458*/ 14999, // Rule ID 3184 //
    6750             :       GIM_CheckFeatures, GIFBS_IsLE,
    6751             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6752             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6753             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    6754             :       // (bitconvert:{ *:[v2i32] } GPR64:{ *:[i64] }:$Xn)  =>  (COPY_TO_REGCLASS:{ *:[v2i32] } GPR64:{ *:[i64] }:$Xn, FPR64:{ *:[i32] })
    6755             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6756             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6757             :       // GIR_Coverage, 3184,
    6758             :       GIR_Done,
    6759             :     // Label 458: @14999
    6760             :     GIM_Try, /*On fail goto*//*Label 459*/ 15024, // Rule ID 3186 //
    6761             :       GIM_CheckFeatures, GIFBS_IsLE,
    6762             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6763             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6764             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    6765             :       // (bitconvert:{ *:[v2f32] } GPR64:{ *:[i64] }:$Xn)  =>  (COPY_TO_REGCLASS:{ *:[v2f32] } GPR64:{ *:[i64] }:$Xn, FPR64:{ *:[i32] })
    6766             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6767             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6768             :       // GIR_Coverage, 3186,
    6769             :       GIR_Done,
    6770             :     // Label 459: @15024
    6771             :     GIM_Try, /*On fail goto*//*Label 460*/ 15072, // Rule ID 3195 //
    6772             :       GIM_CheckFeatures, GIFBS_IsBE,
    6773             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6774             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6775             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    6776             :       // (bitconvert:{ *:[v2i32] } GPR64:{ *:[i64] }:$Xn)  =>  (REV64v2i32:{ *:[v2i32] } (COPY_TO_REGCLASS:{ *:[i64] } GPR64:{ *:[i64] }:$Xn, FPR64:{ *:[i32] }))
    6777             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
    6778             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY,
    6779             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    6780             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // Xn
    6781             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    6782             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    6783             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6784             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    6785             :       GIR_EraseFromParent, /*InsnID*/0,
    6786             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6787             :       // GIR_Coverage, 3195,
    6788             :       GIR_Done,
    6789             :     // Label 460: @15072
    6790             :     GIM_Try, /*On fail goto*//*Label 461*/ 15120, // Rule ID 3197 //
    6791             :       GIM_CheckFeatures, GIFBS_IsBE,
    6792             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6793             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6794             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    6795             :       // (bitconvert:{ *:[v2f32] } GPR64:{ *:[i64] }:$Xn)  =>  (REV64v2i32:{ *:[v2f32] } (COPY_TO_REGCLASS:{ *:[i64] } GPR64:{ *:[i64] }:$Xn, FPR64:{ *:[i32] }))
    6796             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
    6797             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY,
    6798             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    6799             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // Xn
    6800             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    6801             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    6802             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6803             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    6804             :       GIR_EraseFromParent, /*InsnID*/0,
    6805             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6806             :       // GIR_Coverage, 3197,
    6807             :       GIR_Done,
    6808             :     // Label 461: @15120
    6809             :     GIM_Try, /*On fail goto*//*Label 462*/ 15154, // Rule ID 3226 //
    6810             :       GIM_CheckFeatures, GIFBS_IsLE,
    6811             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6812             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6813             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6814             :       // (bitconvert:{ *:[v2i32] } FPR64:{ *:[v1i64] }:$src)  =>  FPR64:{ *:[v2i32] }:$src
    6815             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6816             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6817             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6818             :       GIR_EraseFromParent, /*InsnID*/0,
    6819             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6820             :       // GIR_Coverage, 3226,
    6821             :       GIR_Done,
    6822             :     // Label 462: @15154
    6823             :     GIM_Try, /*On fail goto*//*Label 463*/ 15188, // Rule ID 3227 //
    6824             :       GIM_CheckFeatures, GIFBS_IsLE,
    6825             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6826             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6827             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6828             :       // (bitconvert:{ *:[v2i32] } FPR64:{ *:[v4i16] }:$src)  =>  FPR64:{ *:[v2i32] }:$src
    6829             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6830             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6831             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6832             :       GIR_EraseFromParent, /*InsnID*/0,
    6833             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6834             :       // GIR_Coverage, 3227,
    6835             :       GIR_Done,
    6836             :     // Label 463: @15188
    6837             :     GIM_Try, /*On fail goto*//*Label 464*/ 15222, // Rule ID 3228 //
    6838             :       GIM_CheckFeatures, GIFBS_IsLE,
    6839             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    6840             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6841             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6842             :       // (bitconvert:{ *:[v2i32] } FPR64:{ *:[v8i8] }:$src)  =>  FPR64:{ *:[v2i32] }:$src
    6843             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6844             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6845             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6846             :       GIR_EraseFromParent, /*InsnID*/0,
    6847             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6848             :       // GIR_Coverage, 3228,
    6849             :       GIR_Done,
    6850             :     // Label 464: @15222
    6851             :     GIM_Try, /*On fail goto*//*Label 465*/ 15256, // Rule ID 3229 //
    6852             :       GIM_CheckFeatures, GIFBS_IsLE,
    6853             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6854             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6855             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6856             :       // (bitconvert:{ *:[v2i32] } FPR64:{ *:[f64] }:$src)  =>  FPR64:{ *:[v2i32] }:$src
    6857             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6858             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6859             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6860             :       GIR_EraseFromParent, /*InsnID*/0,
    6861             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6862             :       // GIR_Coverage, 3229,
    6863             :       GIR_Done,
    6864             :     // Label 465: @15256
    6865             :     GIM_Try, /*On fail goto*//*Label 466*/ 15290, // Rule ID 3230 //
    6866             :       GIM_CheckFeatures, GIFBS_IsLE,
    6867             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6868             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6869             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6870             :       // (bitconvert:{ *:[v2i32] } FPR64:{ *:[v1f64] }:$src)  =>  FPR64:{ *:[v2i32] }:$src
    6871             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6872             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6873             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6874             :       GIR_EraseFromParent, /*InsnID*/0,
    6875             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6876             :       // GIR_Coverage, 3230,
    6877             :       GIR_Done,
    6878             :     // Label 466: @15290
    6879             :     GIM_Try, /*On fail goto*//*Label 467*/ 15324, // Rule ID 3231 //
    6880             :       GIM_CheckFeatures, GIFBS_IsLE,
    6881             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6882             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6883             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6884             :       // (bitconvert:{ *:[v2i32] } FPR64:{ *:[v4f16] }:$src)  =>  FPR64:{ *:[v2i32] }:$src
    6885             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6886             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6887             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6888             :       GIR_EraseFromParent, /*InsnID*/0,
    6889             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6890             :       // GIR_Coverage, 3231,
    6891             :       GIR_Done,
    6892             :     // Label 467: @15324
    6893             :     GIM_Try, /*On fail goto*//*Label 468*/ 15347, // Rule ID 3232 //
    6894             :       GIM_CheckFeatures, GIFBS_IsBE,
    6895             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6896             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6897             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6898             :       // (bitconvert:{ *:[v2i32] } FPR64:{ *:[v1i64] }:$src)  =>  (REV64v2i32:{ *:[v2i32] } FPR64:{ *:[v1i64] }:$src)
    6899             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    6900             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6901             :       // GIR_Coverage, 3232,
    6902             :       GIR_Done,
    6903             :     // Label 468: @15347
    6904             :     GIM_Try, /*On fail goto*//*Label 469*/ 15370, // Rule ID 3233 //
    6905             :       GIM_CheckFeatures, GIFBS_IsBE,
    6906             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6907             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6908             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6909             :       // (bitconvert:{ *:[v2i32] } FPR64:{ *:[v4i16] }:$src)  =>  (REV32v4i16:{ *:[v2i32] } FPR64:{ *:[v4i16] }:$src)
    6910             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v4i16,
    6911             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6912             :       // GIR_Coverage, 3233,
    6913             :       GIR_Done,
    6914             :     // Label 469: @15370
    6915             :     GIM_Try, /*On fail goto*//*Label 470*/ 15393, // Rule ID 3234 //
    6916             :       GIM_CheckFeatures, GIFBS_IsBE,
    6917             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    6918             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6919             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6920             :       // (bitconvert:{ *:[v2i32] } FPR64:{ *:[v8i8] }:$src)  =>  (REV32v8i8:{ *:[v2i32] } FPR64:{ *:[v8i8] }:$src)
    6921             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v8i8,
    6922             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6923             :       // GIR_Coverage, 3234,
    6924             :       GIR_Done,
    6925             :     // Label 470: @15393
    6926             :     GIM_Try, /*On fail goto*//*Label 471*/ 15416, // Rule ID 3235 //
    6927             :       GIM_CheckFeatures, GIFBS_IsBE,
    6928             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6929             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6930             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6931             :       // (bitconvert:{ *:[v2i32] } FPR64:{ *:[f64] }:$src)  =>  (REV64v2i32:{ *:[v2i32] } FPR64:{ *:[f64] }:$src)
    6932             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    6933             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6934             :       // GIR_Coverage, 3235,
    6935             :       GIR_Done,
    6936             :     // Label 471: @15416
    6937             :     GIM_Try, /*On fail goto*//*Label 472*/ 15439, // Rule ID 3236 //
    6938             :       GIM_CheckFeatures, GIFBS_IsBE,
    6939             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6940             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6941             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6942             :       // (bitconvert:{ *:[v2i32] } FPR64:{ *:[v1f64] }:$src)  =>  (REV64v2i32:{ *:[v2i32] } FPR64:{ *:[v1f64] }:$src)
    6943             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    6944             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6945             :       // GIR_Coverage, 3236,
    6946             :       GIR_Done,
    6947             :     // Label 472: @15439
    6948             :     GIM_Try, /*On fail goto*//*Label 473*/ 15462, // Rule ID 3237 //
    6949             :       GIM_CheckFeatures, GIFBS_IsBE,
    6950             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6951             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6952             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6953             :       // (bitconvert:{ *:[v2i32] } FPR64:{ *:[v4f16] }:$src)  =>  (REV32v4i16:{ *:[v2i32] } FPR64:{ *:[v4f16] }:$src)
    6954             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v4i16,
    6955             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6956             :       // GIR_Coverage, 3237,
    6957             :       GIR_Done,
    6958             :     // Label 473: @15462
    6959             :     GIM_Try, /*On fail goto*//*Label 474*/ 15494, // Rule ID 3238 //
    6960             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    6961             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6962             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6963             :       // (bitconvert:{ *:[v2i32] } FPR64:{ *:[v2f32] }:$src)  =>  FPR64:{ *:[v2i32] }:$src
    6964             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6965             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6966             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6967             :       GIR_EraseFromParent, /*InsnID*/0,
    6968             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6969             :       // GIR_Coverage, 3238,
    6970             :       GIR_Done,
    6971             :     // Label 474: @15494
    6972             :     GIM_Try, /*On fail goto*//*Label 475*/ 15528, // Rule ID 3303 //
    6973             :       GIM_CheckFeatures, GIFBS_IsLE,
    6974             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6975             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6976             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6977             :       // (bitconvert:{ *:[v2f32] } FPR64:{ *:[v1i64] }:$src)  =>  FPR64:{ *:[v2f32] }:$src
    6978             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6979             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6980             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6981             :       GIR_EraseFromParent, /*InsnID*/0,
    6982             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6983             :       // GIR_Coverage, 3303,
    6984             :       GIR_Done,
    6985             :     // Label 475: @15528
    6986             :     GIM_Try, /*On fail goto*//*Label 476*/ 15562, // Rule ID 3304 //
    6987             :       GIM_CheckFeatures, GIFBS_IsLE,
    6988             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6989             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6990             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6991             :       // (bitconvert:{ *:[v2f32] } FPR64:{ *:[v4i16] }:$src)  =>  FPR64:{ *:[v2f32] }:$src
    6992             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6993             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6994             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6995             :       GIR_EraseFromParent, /*InsnID*/0,
    6996             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6997             :       // GIR_Coverage, 3304,
    6998             :       GIR_Done,
    6999             :     // Label 476: @15562
    7000             :     GIM_Try, /*On fail goto*//*Label 477*/ 15596, // Rule ID 3305 //
    7001             :       GIM_CheckFeatures, GIFBS_IsLE,
    7002             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    7003             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7004             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7005             :       // (bitconvert:{ *:[v2f32] } FPR64:{ *:[v8i8] }:$src)  =>  FPR64:{ *:[v2f32] }:$src
    7006             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7007             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7008             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7009             :       GIR_EraseFromParent, /*InsnID*/0,
    7010             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7011             :       // GIR_Coverage, 3305,
    7012             :       GIR_Done,
    7013             :     // Label 477: @15596
    7014             :     GIM_Try, /*On fail goto*//*Label 478*/ 15630, // Rule ID 3306 //
    7015             :       GIM_CheckFeatures, GIFBS_IsLE,
    7016             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7017             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7018             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7019             :       // (bitconvert:{ *:[v2f32] } FPR64:{ *:[v1f64] }:$src)  =>  FPR64:{ *:[v2f32] }:$src
    7020             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7021             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7022             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7023             :       GIR_EraseFromParent, /*InsnID*/0,
    7024             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7025             :       // GIR_Coverage, 3306,
    7026             :       GIR_Done,
    7027             :     // Label 478: @15630
    7028             :     GIM_Try, /*On fail goto*//*Label 479*/ 15664, // Rule ID 3307 //
    7029             :       GIM_CheckFeatures, GIFBS_IsLE,
    7030             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7031             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7032             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7033             :       // (bitconvert:{ *:[v2f32] } FPR64:{ *:[f64] }:$src)  =>  FPR64:{ *:[v2f32] }:$src
    7034             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7035             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7036             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7037             :       GIR_EraseFromParent, /*InsnID*/0,
    7038             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7039             :       // GIR_Coverage, 3307,
    7040             :       GIR_Done,
    7041             :     // Label 479: @15664
    7042             :     GIM_Try, /*On fail goto*//*Label 480*/ 15698, // Rule ID 3308 //
    7043             :       GIM_CheckFeatures, GIFBS_IsLE,
    7044             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    7045             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7046             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7047             :       // (bitconvert:{ *:[v2f32] } FPR64:{ *:[v4f16] }:$src)  =>  FPR64:{ *:[v2f32] }:$src
    7048             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7049             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7050             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7051             :       GIR_EraseFromParent, /*InsnID*/0,
    7052             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7053             :       // GIR_Coverage, 3308,
    7054             :       GIR_Done,
    7055             :     // Label 480: @15698
    7056             :     GIM_Try, /*On fail goto*//*Label 481*/ 15721, // Rule ID 3309 //
    7057             :       GIM_CheckFeatures, GIFBS_IsBE,
    7058             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7059             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7060             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7061             :       // (bitconvert:{ *:[v2f32] } FPR64:{ *:[v1i64] }:$src)  =>  (REV64v2i32:{ *:[v2f32] } FPR64:{ *:[v1i64] }:$src)
    7062             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    7063             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7064             :       // GIR_Coverage, 3309,
    7065             :       GIR_Done,
    7066             :     // Label 481: @15721
    7067             :     GIM_Try, /*On fail goto*//*Label 482*/ 15744, // Rule ID 3310 //
    7068             :       GIM_CheckFeatures, GIFBS_IsBE,
    7069             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    7070             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7071             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7072             :       // (bitconvert:{ *:[v2f32] } FPR64:{ *:[v4i16] }:$src)  =>  (REV32v4i16:{ *:[v2f32] } FPR64:{ *:[v4i16] }:$src)
    7073             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v4i16,
    7074             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7075             :       // GIR_Coverage, 3310,
    7076             :       GIR_Done,
    7077             :     // Label 482: @15744
    7078             :     GIM_Try, /*On fail goto*//*Label 483*/ 15767, // Rule ID 3311 //
    7079             :       GIM_CheckFeatures, GIFBS_IsBE,
    7080             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    7081             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7082             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7083             :       // (bitconvert:{ *:[v2f32] } FPR64:{ *:[v8i8] }:$src)  =>  (REV32v8i8:{ *:[v2f32] } FPR64:{ *:[v8i8] }:$src)
    7084             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v8i8,
    7085             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7086             :       // GIR_Coverage, 3311,
    7087             :       GIR_Done,
    7088             :     // Label 483: @15767
    7089             :     GIM_Try, /*On fail goto*//*Label 484*/ 15790, // Rule ID 3312 //
    7090             :       GIM_CheckFeatures, GIFBS_IsBE,
    7091             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7092             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7093             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7094             :       // (bitconvert:{ *:[v2f32] } FPR64:{ *:[v1f64] }:$src)  =>  (REV64v2i32:{ *:[v2f32] } FPR64:{ *:[v1f64] }:$src)
    7095             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    7096             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7097             :       // GIR_Coverage, 3312,
    7098             :       GIR_Done,
    7099             :     // Label 484: @15790
    7100             :     GIM_Try, /*On fail goto*//*Label 485*/ 15813, // Rule ID 3313 //
    7101             :       GIM_CheckFeatures, GIFBS_IsBE,
    7102             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7103             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7104             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7105             :       // (bitconvert:{ *:[v2f32] } FPR64:{ *:[f64] }:$src)  =>  (REV64v2i32:{ *:[v2f32] } FPR64:{ *:[f64] }:$src)
    7106             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    7107             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7108             :       // GIR_Coverage, 3313,
    7109             :       GIR_Done,
    7110             :     // Label 485: @15813
    7111             :     GIM_Try, /*On fail goto*//*Label 486*/ 15836, // Rule ID 3314 //
    7112             :       GIM_CheckFeatures, GIFBS_IsBE,
    7113             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    7114             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7115             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7116             :       // (bitconvert:{ *:[v2f32] } FPR64:{ *:[v4f16] }:$src)  =>  (REV32v4i16:{ *:[v2f32] } FPR64:{ *:[v4f16] }:$src)
    7117             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v4i16,
    7118             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7119             :       // GIR_Coverage, 3314,
    7120             :       GIR_Done,
    7121             :     // Label 486: @15836
    7122             :     GIM_Try, /*On fail goto*//*Label 487*/ 15868, // Rule ID 3315 //
    7123             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    7124             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7125             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7126             :       // (bitconvert:{ *:[v2f32] } FPR64:{ *:[v2i32] }:$src)  =>  FPR64:{ *:[v2f32] }:$src
    7127             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7128             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7129             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7130             :       GIR_EraseFromParent, /*InsnID*/0,
    7131             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7132             :       // GIR_Coverage, 3315,
    7133             :       GIR_Done,
    7134             :     // Label 487: @15868
    7135             :     GIM_Reject,
    7136             :     // Label 381: @15869
    7137             :     GIM_Try, /*On fail goto*//*Label 488*/ 15903, // Rule ID 3330 //
    7138             :       GIM_CheckFeatures, GIFBS_IsLE,
    7139             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
    7140             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7141             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7142             :       // (bitconvert:{ *:[v2f64] } FPR128:{ *:[f128] }:$src)  =>  FPR128:{ *:[v2f64] }:$src
    7143             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7144             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7145             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7146             :       GIR_EraseFromParent, /*InsnID*/0,
    7147             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    7148             :       // GIR_Coverage, 3330,
    7149             :       GIR_Done,
    7150             :     // Label 488: @15903
    7151             :     GIM_Try, /*On fail goto*//*Label 489*/ 15937, // Rule ID 3331 //
    7152             :       GIM_CheckFeatures, GIFBS_IsLE,
    7153             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    7154             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7155             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7156             :       // (bitconvert:{ *:[v2f64] } FPR128:{ *:[v4i32] }:$src)  =>  FPR128:{ *:[v2f64] }:$src
    7157             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7158             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7159             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7160             :       GIR_EraseFromParent, /*InsnID*/0,
    7161             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    7162             :       // GIR_Coverage, 3331,
    7163             :       GIR_Done,
    7164             :     // Label 489: @15937
    7165             :     GIM_Try, /*On fail goto*//*Label 490*/ 15971, // Rule ID 3332 //
    7166             :       GIM_CheckFeatures, GIFBS_IsLE,
    7167             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    7168             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7169             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7170             :       // (bitconvert:{ *:[v2f64] } FPR128:{ *:[v8i16] }:$src)  =>  FPR128:{ *:[v2f64] }:$src
    7171             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7172             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7173             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7174             :       GIR_EraseFromParent, /*InsnID*/0,
    7175             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    7176             :       // GIR_Coverage, 3332,
    7177             :       GIR_Done,
    7178             :     // Label 490: @15971
    7179             :     GIM_Try, /*On fail goto*//*Label 491*/ 16005, // Rule ID 3333 //
    7180             :       GIM_CheckFeatures, GIFBS_IsLE,
    7181             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    7182             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7183             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7184             :       // (bitconvert:{ *:[v2f64] } FPR128:{ *:[v8f16] }:$src)  =>  FPR128:{ *:[v2f64] }:$src
    7185             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7186             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7187             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7188             :       GIR_EraseFromParent, /*InsnID*/0,
    7189             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    7190             :       // GIR_Coverage, 3333,
    7191             :       GIR_Done,
    7192             :     // Label 491: @16005
    7193             :     GIM_Try, /*On fail goto*//*Label 492*/ 16039, // Rule ID 3334 //
    7194             :       GIM_CheckFeatures, GIFBS_IsLE,
    7195             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    7196             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7197             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7198             :       // (bitconvert:{ *:[v2f64] } FPR128:{ *:[v16i8] }:$src)  =>  FPR128:{ *:[v2f64] }:$src
    7199             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7200             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7201             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7202             :       GIR_EraseFromParent, /*InsnID*/0,
    7203             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    7204             :       // GIR_Coverage, 3334,
    7205             :       GIR_Done,
    7206             :     // Label 492: @16039
    7207             :     GIM_Try, /*On fail goto*//*Label 493*/ 16073, // Rule ID 3335 //
    7208             :       GIM_CheckFeatures, GIFBS_IsLE,
    7209             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    7210             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7211             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7212             :       // (bitconvert:{ *:[v2f64] } FPR128:{ *:[v4f32] }:$src)  =>  FPR128:{ *:[v2f64] }:$src
    7213             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7214             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7215             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7216             :       GIR_EraseFromParent, /*InsnID*/0,
    7217             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    7218             :       // GIR_Coverage, 3335,
    7219             :       GIR_Done,
    7220             :     // Label 493: @16073
    7221             :     GIM_Try, /*On fail goto*//*Label 494*/ 16112, // Rule ID 3336 //
    7222             :       GIM_CheckFeatures, GIFBS_IsBE,
    7223             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
    7224             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7225             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7226             :       // (bitconvert:{ *:[v2f64] } FPR128:{ *:[f128] }:$src)  =>  (EXTv16i8:{ *:[v2f64] } FPR128:{ *:[f128] }:$src, FPR128:{ *:[f128] }:$src, 8:{ *:[i32] })
    7227             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EXTv16i8,
    7228             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7229             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7230             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7231             :       GIR_AddImm, /*InsnID*/0, /*Imm*/8,
    7232             :       GIR_EraseFromParent, /*InsnID*/0,
    7233             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7234             :       // GIR_Coverage, 3336,
    7235             :       GIR_Done,
    7236             :     // Label 494: @16112
    7237             :     GIM_Try, /*On fail goto*//*Label 495*/ 16135, // Rule ID 3337 //
    7238             :       GIM_CheckFeatures, GIFBS_IsBE,
    7239             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    7240             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7241             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7242             :       // (bitconvert:{ *:[v2f64] } FPR128:{ *:[v4i32] }:$src)  =>  (REV64v4i32:{ *:[v2f64] } FPR128:{ *:[v4i32] }:$src)
    7243             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i32,
    7244             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7245             :       // GIR_Coverage, 3337,
    7246             :       GIR_Done,
    7247             :     // Label 495: @16135
    7248             :     GIM_Try, /*On fail goto*//*Label 496*/ 16158, // Rule ID 3338 //
    7249             :       GIM_CheckFeatures, GIFBS_IsBE,
    7250             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    7251             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7252             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7253             :       // (bitconvert:{ *:[v2f64] } FPR128:{ *:[v8i16] }:$src)  =>  (REV64v8i16:{ *:[v2f64] } FPR128:{ *:[v8i16] }:$src)
    7254             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v8i16,
    7255             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7256             :       // GIR_Coverage, 3338,
    7257             :       GIR_Done,
    7258             :     // Label 496: @16158
    7259             :     GIM_Try, /*On fail goto*//*Label 497*/ 16181, // Rule ID 3339 //
    7260             :       GIM_CheckFeatures, GIFBS_IsBE,
    7261             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    7262             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7263             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7264             :       // (bitconvert:{ *:[v2f64] } FPR128:{ *:[v8f16] }:$src)  =>  (REV64v8i16:{ *:[v2f64] } FPR128:{ *:[v8f16] }:$src)
    7265             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v8i16,
    7266             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7267             :       // GIR_Coverage, 3339,
    7268             :       GIR_Done,
    7269             :     // Label 497: @16181
    7270             :     GIM_Try, /*On fail goto*//*Label 498*/ 16204, // Rule ID 3340 //
    7271             :       GIM_CheckFeatures, GIFBS_IsBE,
    7272             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    7273             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7274             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7275             :       // (bitconvert:{ *:[v2f64] } FPR128:{ *:[v16i8] }:$src)  =>  (REV64v16i8:{ *:[v2f64] } FPR128:{ *:[v16i8] }:$src)
    7276             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v16i8,
    7277             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7278             :       // GIR_Coverage, 3340,
    7279             :       GIR_Done,
    7280             :     // Label 498: @16204
    7281             :     GIM_Try, /*On fail goto*//*Label 499*/ 16227, // Rule ID 3341 //
    7282             :       GIM_CheckFeatures, GIFBS_IsBE,
    7283             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    7284             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7285             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7286             :       // (bitconvert:{ *:[v2f64] } FPR128:{ *:[v4f32] }:$src)  =>  (REV64v4i32:{ *:[v2f64] } FPR128:{ *:[v4f32] }:$src)
    7287             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i32,
    7288             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7289             :       // GIR_Coverage, 3341,
    7290             :       GIR_Done,
    7291             :     // Label 499: @16227
    7292             :     GIM_Try, /*On fail goto*//*Label 500*/ 16259, // Rule ID 3342 //
    7293             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    7294             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7295             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7296             :       // (bitconvert:{ *:[v2f64] } FPR128:{ *:[v2i64] }:$src)  =>  FPR128:{ *:[v2f64] }:$src
    7297             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7298             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7299             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7300             :       GIR_EraseFromParent, /*InsnID*/0,
    7301             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    7302             :       // GIR_Coverage, 3342,
    7303             :       GIR_Done,
    7304             :     // Label 500: @16259
    7305             :     GIM_Try, /*On fail goto*//*Label 501*/ 16293, // Rule ID 3356 //
    7306             :       GIM_CheckFeatures, GIFBS_IsLE,
    7307             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
    7308             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7309             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7310             :       // (bitconvert:{ *:[v2i64] } FPR128:{ *:[f128] }:$src)  =>  FPR128:{ *:[v2i64] }:$src
    7311             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7312             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7313             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7314             :       GIR_EraseFromParent, /*InsnID*/0,
    7315             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    7316             :       // GIR_Coverage, 3356,
    7317             :       GIR_Done,
    7318             :     // Label 501: @16293
    7319             :     GIM_Try, /*On fail goto*//*Label 502*/ 16327, // Rule ID 3357 //
    7320             :       GIM_CheckFeatures, GIFBS_IsLE,
    7321             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    7322             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7323             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7324             :       // (bitconvert:{ *:[v2i64] } FPR128:{ *:[v4i32] }:$src)  =>  FPR128:{ *:[v2i64] }:$src
    7325             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7326             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7327             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7328             :       GIR_EraseFromParent, /*InsnID*/0,
    7329             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    7330             :       // GIR_Coverage, 3357,
    7331             :       GIR_Done,
    7332             :     // Label 502: @16327
    7333             :     GIM_Try, /*On fail goto*//*Label 503*/ 16361, // Rule ID 3358 //
    7334             :       GIM_CheckFeatures, GIFBS_IsLE,
    7335             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    7336             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7337             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7338             :       // (bitconvert:{ *:[v2i64] } FPR128:{ *:[v8i16] }:$src)  =>  FPR128:{ *:[v2i64] }:$src
    7339             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7340             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7341             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7342             :       GIR_EraseFromParent, /*InsnID*/0,
    7343             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    7344             :       // GIR_Coverage, 3358,
    7345             :       GIR_Done,
    7346             :     // Label 503: @16361
    7347             :     GIM_Try, /*On fail goto*//*Label 504*/ 16395, // Rule ID 3359 //
    7348             :       GIM_CheckFeatures, GIFBS_IsLE,
    7349             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    7350             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7351             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7352             :       // (bitconvert:{ *:[v2i64] } FPR128:{ *:[v16i8] }:$src)  =>  FPR128:{ *:[v2i64] }:$src
    7353             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7354             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7355             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7356             :       GIR_EraseFromParent, /*InsnID*/0,
    7357             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    7358             :       // GIR_Coverage, 3359,
    7359             :       GIR_Done,
    7360             :     // Label 504: @16395
    7361             :     GIM_Try, /*On fail goto*//*Label 505*/ 16429, // Rule ID 3360 //
    7362             :       GIM_CheckFeatures, GIFBS_IsLE,
    7363             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    7364             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7365             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7366             :       // (bitconvert:{ *:[v2i64] } FPR128:{ *:[v4f32] }:$src)  =>  FPR128:{ *:[v2i64] }:$src
    7367             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7368             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7369             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7370             :       GIR_EraseFromParent, /*InsnID*/0,
    7371             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    7372             :       // GIR_Coverage, 3360,
    7373             :       GIR_Done,
    7374             :     // Label 505: @16429
    7375             :     GIM_Try, /*On fail goto*//*Label 506*/ 16463, // Rule ID 3361 //
    7376             :       GIM_CheckFeatures, GIFBS_IsLE,
    7377             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    7378             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7379             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7380             :       // (bitconvert:{ *:[v2i64] } FPR128:{ *:[v8f16] }:$src)  =>  FPR128:{ *:[v2i64] }:$src
    7381             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7382             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7383             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7384             :       GIR_EraseFromParent, /*InsnID*/0,
    7385             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    7386             :       // GIR_Coverage, 3361,
    7387             :       GIR_Done,
    7388             :     // Label 506: @16463
    7389             :     GIM_Try, /*On fail goto*//*Label 507*/ 16502, // Rule ID 3362 //
    7390             :       GIM_CheckFeatures, GIFBS_IsBE,
    7391             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
    7392             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7393             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7394             :       // (bitconvert:{ *:[v2i64] } FPR128:{ *:[f128] }:$src)  =>  (EXTv16i8:{ *:[v2i64] } FPR128:{ *:[f128] }:$src, FPR128:{ *:[f128] }:$src, 8:{ *:[i32] })
    7395             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EXTv16i8,
    7396             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7397             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7398             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7399             :       GIR_AddImm, /*InsnID*/0, /*Imm*/8,
    7400             :       GIR_EraseFromParent, /*InsnID*/0,
    7401             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7402             :       // GIR_Coverage, 3362,
    7403             :       GIR_Done,
    7404             :     // Label 507: @16502
    7405             :     GIM_Try, /*On fail goto*//*Label 508*/ 16525, // Rule ID 3363 //
    7406             :       GIM_CheckFeatures, GIFBS_IsBE,
    7407             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    7408             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7409             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7410             :       // (bitconvert:{ *:[v2i64] } FPR128:{ *:[v4i32] }:$src)  =>  (REV64v4i32:{ *:[v2i64] } FPR128:{ *:[v4i32] }:$src)
    7411             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i32,
    7412             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7413             :       // GIR_Coverage, 3363,
    7414             :       GIR_Done,
    7415             :     // Label 508: @16525
    7416             :     GIM_Try, /*On fail goto*//*Label 509*/ 16548, // Rule ID 3364 //
    7417             :       GIM_CheckFeatures, GIFBS_IsBE,
    7418             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    7419             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7420             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7421             :       // (bitconvert:{ *:[v2i64] } FPR128:{ *:[v8i16] }:$src)  =>  (REV64v8i16:{ *:[v2i64] } FPR128:{ *:[v8i16] }:$src)
    7422             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v8i16,
    7423             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7424             :       // GIR_Coverage, 3364,
    7425             :       GIR_Done,
    7426             :     // Label 509: @16548
    7427             :     GIM_Try, /*On fail goto*//*Label 510*/ 16571, // Rule ID 3365 //
    7428             :       GIM_CheckFeatures, GIFBS_IsBE,
    7429             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    7430             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7431             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7432             :       // (bitconvert:{ *:[v2i64] } FPR128:{ *:[v16i8] }:$src)  =>  (REV64v16i8:{ *:[v2i64] } FPR128:{ *:[v16i8] }:$src)
    7433             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v16i8,
    7434             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7435             :       // GIR_Coverage, 3365,
    7436             :       GIR_Done,
    7437             :     // Label 510: @16571
    7438             :     GIM_Try, /*On fail goto*//*Label 511*/ 16594, // Rule ID 3366 //
    7439             :       GIM_CheckFeatures, GIFBS_IsBE,
    7440             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    7441             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7442             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7443             :       // (bitconvert:{ *:[v2i64] } FPR128:{ *:[v4f32] }:$src)  =>  (REV64v4i32:{ *:[v2i64] } FPR128:{ *:[v4f32] }:$src)
    7444             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i32,
    7445             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7446             :       // GIR_Coverage, 3366,
    7447             :       GIR_Done,
    7448             :     // Label 511: @16594
    7449             :     GIM_Try, /*On fail goto*//*Label 512*/ 16617, // Rule ID 3367 //
    7450             :       GIM_CheckFeatures, GIFBS_IsBE,
    7451             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    7452             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7453             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7454             :       // (bitconvert:{ *:[v2i64] } FPR128:{ *:[v8f16] }:$src)  =>  (REV64v8i16:{ *:[v2i64] } FPR128:{ *:[v8f16] }:$src)
    7455             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v8i16,
    7456             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7457             :       // GIR_Coverage, 3367,
    7458             :       GIR_Done,
    7459             :     // Label 512: @16617
    7460             :     GIM_Try, /*On fail goto*//*Label 513*/ 16649, // Rule ID 3368 //
    7461             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    7462             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7463             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7464             :       // (bitconvert:{ *:[v2i64] } FPR128:{ *:[v2f64] }:$src)  =>  FPR128:{ *:[v2i64] }:$src
    7465             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7466             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7467             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7468             :       GIR_EraseFromParent, /*InsnID*/0,
    7469             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    7470             :       // GIR_Coverage, 3368,
    7471             :       GIR_Done,
    7472             :     // Label 513: @16649
    7473             :     GIM_Reject,
    7474             :     // Label 382: @16650
    7475             :     GIM_Try, /*On fail goto*//*Label 514*/ 16675, // Rule ID 3183 //
    7476             :       GIM_CheckFeatures, GIFBS_IsLE,
    7477             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7478             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7479             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    7480             :       // (bitconvert:{ *:[v4i16] } GPR64:{ *:[i64] }:$Xn)  =>  (COPY_TO_REGCLASS:{ *:[v4i16] } GPR64:{ *:[i64] }:$Xn, FPR64:{ *:[i32] })
    7481             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7482             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7483             :       // GIR_Coverage, 3183,
    7484             :       GIR_Done,
    7485             :     // Label 514: @16675
    7486             :     GIM_Try, /*On fail goto*//*Label 515*/ 16700, // Rule ID 3185 //
    7487             :       GIM_CheckFeatures, GIFBS_IsLE,
    7488             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7489             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7490             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    7491             :       // (bitconvert:{ *:[v4f16] } GPR64:{ *:[i64] }:$Xn)  =>  (COPY_TO_REGCLASS:{ *:[v4f16] } GPR64:{ *:[i64] }:$Xn, FPR64:{ *:[i32] })
    7492             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7493             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7494             :       // GIR_Coverage, 3185,
    7495             :       GIR_Done,
    7496             :     // Label 515: @16700
    7497             :     GIM_Try, /*On fail goto*//*Label 516*/ 16748, // Rule ID 3194 //
    7498             :       GIM_CheckFeatures, GIFBS_IsBE,
    7499             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7500             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7501             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    7502             :       // (bitconvert:{ *:[v4i16] } GPR64:{ *:[i64] }:$Xn)  =>  (REV64v4i16:{ *:[v4i16] } (COPY_TO_REGCLASS:{ *:[i64] } GPR64:{ *:[i64] }:$Xn, FPR64:{ *:[i32] }))
    7503             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
    7504             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY,
    7505             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    7506             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // Xn
    7507             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    7508             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    7509             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7510             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    7511             :       GIR_EraseFromParent, /*InsnID*/0,
    7512             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7513             :       // GIR_Coverage, 3194,
    7514             :       GIR_Done,
    7515             :     // Label 516: @16748
    7516             :     GIM_Try, /*On fail goto*//*Label 517*/ 16796, // Rule ID 3196 //
    7517             :       GIM_CheckFeatures, GIFBS_IsBE,
    7518             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7519             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7520             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    7521             :       // (bitconvert:{ *:[v4f16] } GPR64:{ *:[i64] }:$Xn)  =>  (REV64v4i16:{ *:[v4f16] } (COPY_TO_REGCLASS:{ *:[i64] } GPR64:{ *:[i64] }:$Xn, FPR64:{ *:[i32] }))
    7522             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
    7523             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY,
    7524             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    7525             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // Xn
    7526             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    7527             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    7528             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7529             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    7530             :       GIR_EraseFromParent, /*InsnID*/0,
    7531             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7532             :       // GIR_Coverage, 3196,
    7533             :       GIR_Done,
    7534             :     // Label 517: @16796
    7535             :     GIM_Try, /*On fail goto*//*Label 518*/ 16830, // Rule ID 3239 //
    7536             :       GIM_CheckFeatures, GIFBS_IsLE,
    7537             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7538             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7539             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7540             :       // (bitconvert:{ *:[v4i16] } FPR64:{ *:[v1i64] }:$src)  =>  FPR64:{ *:[v4i16] }:$src
    7541             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7542             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7543             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7544             :       GIR_EraseFromParent, /*InsnID*/0,
    7545             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7546             :       // GIR_Coverage, 3239,
    7547             :       GIR_Done,
    7548             :     // Label 518: @16830
    7549             :     GIM_Try, /*On fail goto*//*Label 519*/ 16864, // Rule ID 3240 //
    7550             :       GIM_CheckFeatures, GIFBS_IsLE,
    7551             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    7552             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7553             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7554             :       // (bitconvert:{ *:[v4i16] } FPR64:{ *:[v2i32] }:$src)  =>  FPR64:{ *:[v4i16] }:$src
    7555             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7556             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7557             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7558             :       GIR_EraseFromParent, /*InsnID*/0,
    7559             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7560             :       // GIR_Coverage, 3240,
    7561             :       GIR_Done,
    7562             :     // Label 519: @16864
    7563             :     GIM_Try, /*On fail goto*//*Label 520*/ 16898, // Rule ID 3241 //
    7564             :       GIM_CheckFeatures, GIFBS_IsLE,
    7565             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    7566             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7567             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7568             :       // (bitconvert:{ *:[v4i16] } FPR64:{ *:[v8i8] }:$src)  =>  FPR64:{ *:[v4i16] }:$src
    7569             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7570             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7571             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7572             :       GIR_EraseFromParent, /*InsnID*/0,
    7573             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7574             :       // GIR_Coverage, 3241,
    7575             :       GIR_Done,
    7576             :     // Label 520: @16898
    7577             :     GIM_Try, /*On fail goto*//*Label 521*/ 16932, // Rule ID 3242 //
    7578             :       GIM_CheckFeatures, GIFBS_IsLE,
    7579             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7580             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7581             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7582             :       // (bitconvert:{ *:[v4i16] } FPR64:{ *:[f64] }:$src)  =>  FPR64:{ *:[v4i16] }:$src
    7583             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7584             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7585             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7586             :       GIR_EraseFromParent, /*InsnID*/0,
    7587             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7588             :       // GIR_Coverage, 3242,
    7589             :       GIR_Done,
    7590             :     // Label 521: @16932
    7591             :     GIM_Try, /*On fail goto*//*Label 522*/ 16966, // Rule ID 3243 //
    7592             :       GIM_CheckFeatures, GIFBS_IsLE,
    7593             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    7594             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7595             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7596             :       // (bitconvert:{ *:[v4i16] } FPR64:{ *:[v2f32] }:$src)  =>  FPR64:{ *:[v4i16] }:$src
    7597             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7598             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7599             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7600             :       GIR_EraseFromParent, /*InsnID*/0,
    7601             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7602             :       // GIR_Coverage, 3243,
    7603             :       GIR_Done,
    7604             :     // Label 522: @16966
    7605             :     GIM_Try, /*On fail goto*//*Label 523*/ 17000, // Rule ID 3244 //
    7606             :       GIM_CheckFeatures, GIFBS_IsLE,
    7607             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7608             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7609             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7610             :       // (bitconvert:{ *:[v4i16] } FPR64:{ *:[v1f64] }:$src)  =>  FPR64:{ *:[v4i16] }:$src
    7611             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7612             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7613             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7614             :       GIR_EraseFromParent, /*InsnID*/0,
    7615             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7616             :       // GIR_Coverage, 3244,
    7617             :       GIR_Done,
    7618             :     // Label 523: @17000
    7619             :     GIM_Try, /*On fail goto*//*Label 524*/ 17023, // Rule ID 3245 //
    7620             :       GIM_CheckFeatures, GIFBS_IsBE,
    7621             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7622             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7623             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7624             :       // (bitconvert:{ *:[v4i16] } FPR64:{ *:[v1i64] }:$src)  =>  (REV64v4i16:{ *:[v4i16] } FPR64:{ *:[v1i64] }:$src)
    7625             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    7626             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7627             :       // GIR_Coverage, 3245,
    7628             :       GIR_Done,
    7629             :     // Label 524: @17023
    7630             :     GIM_Try, /*On fail goto*//*Label 525*/ 17046, // Rule ID 3246 //
    7631             :       GIM_CheckFeatures, GIFBS_IsBE,
    7632             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    7633             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7634             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7635             :       // (bitconvert:{ *:[v4i16] } FPR64:{ *:[v2i32] }:$src)  =>  (REV32v4i16:{ *:[v4i16] } FPR64:{ *:[v2i32] }:$src)
    7636             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v4i16,
    7637             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7638             :       // GIR_Coverage, 3246,
    7639             :       GIR_Done,
    7640             :     // Label 525: @17046
    7641             :     GIM_Try, /*On fail goto*//*Label 526*/ 17069, // Rule ID 3247 //
    7642             :       GIM_CheckFeatures, GIFBS_IsBE,
    7643             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    7644             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7645             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7646             :       // (bitconvert:{ *:[v4i16] } FPR64:{ *:[v8i8] }:$src)  =>  (REV16v8i8:{ *:[v4i16] } FPR64:{ *:[v8i8] }:$src)
    7647             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV16v8i8,
    7648             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7649             :       // GIR_Coverage, 3247,
    7650             :       GIR_Done,
    7651             :     // Label 526: @17069
    7652             :     GIM_Try, /*On fail goto*//*Label 527*/ 17092, // Rule ID 3248 //
    7653             :       GIM_CheckFeatures, GIFBS_IsBE,
    7654             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7655             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7656             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7657             :       // (bitconvert:{ *:[v4i16] } FPR64:{ *:[f64] }:$src)  =>  (REV64v4i16:{ *:[v4i16] } FPR64:{ *:[f64] }:$src)
    7658             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    7659             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7660             :       // GIR_Coverage, 3248,
    7661             :       GIR_Done,
    7662             :     // Label 527: @17092
    7663             :     GIM_Try, /*On fail goto*//*Label 528*/ 17115, // Rule ID 3249 //
    7664             :       GIM_CheckFeatures, GIFBS_IsBE,
    7665             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    7666             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7667             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7668             :       // (bitconvert:{ *:[v4i16] } FPR64:{ *:[v2f32] }:$src)  =>  (REV32v4i16:{ *:[v4i16] } FPR64:{ *:[v2f32] }:$src)
    7669             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v4i16,
    7670             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7671             :       // GIR_Coverage, 3249,
    7672             :       GIR_Done,
    7673             :     // Label 528: @17115
    7674             :     GIM_Try, /*On fail goto*//*Label 529*/ 17138, // Rule ID 3250 //
    7675             :       GIM_CheckFeatures, GIFBS_IsBE,
    7676             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7677             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7678             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7679             :       // (bitconvert:{ *:[v4i16] } FPR64:{ *:[v1f64] }:$src)  =>  (REV64v4i16:{ *:[v4i16] } FPR64:{ *:[v1f64] }:$src)
    7680             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    7681             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7682             :       // GIR_Coverage, 3250,
    7683             :       GIR_Done,
    7684             :     // Label 529: @17138
    7685             :     GIM_Try, /*On fail goto*//*Label 530*/ 17170, // Rule ID 3251 //
    7686             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    7687             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7688             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7689             :       // (bitconvert:{ *:[v4i16] } FPR64:{ *:[v4f16] }:$src)  =>  FPR64:{ *:[v4i16] }:$src
    7690             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7691             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7692             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7693             :       GIR_EraseFromParent, /*InsnID*/0,
    7694             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7695             :       // GIR_Coverage, 3251,
    7696             :       GIR_Done,
    7697             :     // Label 530: @17170
    7698             :     GIM_Try, /*On fail goto*//*Label 531*/ 17204, // Rule ID 3252 //
    7699             :       GIM_CheckFeatures, GIFBS_IsLE,
    7700             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7701             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7702             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7703             :       // (bitconvert:{ *:[v4f16] } FPR64:{ *:[v1i64] }:$src)  =>  FPR64:{ *:[v4f16] }:$src
    7704             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7705             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7706             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7707             :       GIR_EraseFromParent, /*InsnID*/0,
    7708             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7709             :       // GIR_Coverage, 3252,
    7710             :       GIR_Done,
    7711             :     // Label 531: @17204
    7712             :     GIM_Try, /*On fail goto*//*Label 532*/ 17238, // Rule ID 3253 //
    7713             :       GIM_CheckFeatures, GIFBS_IsLE,
    7714             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    7715             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7716             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7717             :       // (bitconvert:{ *:[v4f16] } FPR64:{ *:[v2i32] }:$src)  =>  FPR64:{ *:[v4f16] }:$src
    7718             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7719             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7720             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7721             :       GIR_EraseFromParent, /*InsnID*/0,
    7722             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7723             :       // GIR_Coverage, 3253,
    7724             :       GIR_Done,
    7725             :     // Label 532: @17238
    7726             :     GIM_Try, /*On fail goto*//*Label 533*/ 17272, // Rule ID 3254 //
    7727             :       GIM_CheckFeatures, GIFBS_IsLE,
    7728             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    7729             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7730             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7731             :       // (bitconvert:{ *:[v4f16] } FPR64:{ *:[v8i8] }:$src)  =>  FPR64:{ *:[v4f16] }:$src
    7732             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7733             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7734             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7735             :       GIR_EraseFromParent, /*InsnID*/0,
    7736             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7737             :       // GIR_Coverage, 3254,
    7738             :       GIR_Done,
    7739             :     // Label 533: @17272
    7740             :     GIM_Try, /*On fail goto*//*Label 534*/ 17306, // Rule ID 3255 //
    7741             :       GIM_CheckFeatures, GIFBS_IsLE,
    7742             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7743             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7744             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7745             :       // (bitconvert:{ *:[v4f16] } FPR64:{ *:[f64] }:$src)  =>  FPR64:{ *:[v4f16] }:$src
    7746             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7747             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7748             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7749             :       GIR_EraseFromParent, /*InsnID*/0,
    7750             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7751             :       // GIR_Coverage, 3255,
    7752             :       GIR_Done,
    7753             :     // Label 534: @17306
    7754             :     GIM_Try, /*On fail goto*//*Label 535*/ 17340, // Rule ID 3256 //
    7755             :       GIM_CheckFeatures, GIFBS_IsLE,
    7756             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    7757             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7758             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7759             :       // (bitconvert:{ *:[v4f16] } FPR64:{ *:[v2f32] }:$src)  =>  FPR64:{ *:[v4f16] }:$src
    7760             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7761             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7762             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7763             :       GIR_EraseFromParent, /*InsnID*/0,
    7764             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7765             :       // GIR_Coverage, 3256,
    7766             :       GIR_Done,
    7767             :     // Label 535: @17340
    7768             :     GIM_Try, /*On fail goto*//*Label 536*/ 17374, // Rule ID 3257 //
    7769             :       GIM_CheckFeatures, GIFBS_IsLE,
    7770             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7771             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7772             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7773             :       // (bitconvert:{ *:[v4f16] } FPR64:{ *:[v1f64] }:$src)  =>  FPR64:{ *:[v4f16] }:$src
    7774             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7775             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7776             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7777             :       GIR_EraseFromParent, /*InsnID*/0,
    7778             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7779             :       // GIR_Coverage, 3257,
    7780             :       GIR_Done,
    7781             :     // Label 536: @17374
    7782             :     GIM_Try, /*On fail goto*//*Label 537*/ 17397, // Rule ID 3258 //
    7783             :       GIM_CheckFeatures, GIFBS_IsBE,
    7784             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7785             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7786             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7787             :       // (bitconvert:{ *:[v4f16] } FPR64:{ *:[v1i64] }:$src)  =>  (REV64v4i16:{ *:[v4f16] } FPR64:{ *:[v1i64] }:$src)
    7788             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    7789             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7790             :       // GIR_Coverage, 3258,
    7791             :       GIR_Done,
    7792             :     // Label 537: @17397
    7793             :     GIM_Try, /*On fail goto*//*Label 538*/ 17420, // Rule ID 3259 //
    7794             :       GIM_CheckFeatures, GIFBS_IsBE,
    7795             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    7796             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7797             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7798             :       // (bitconvert:{ *:[v4f16] } FPR64:{ *:[v2i32] }:$src)  =>  (REV32v4i16:{ *:[v4f16] } FPR64:{ *:[v2i32] }:$src)
    7799             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v4i16,
    7800             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7801             :       // GIR_Coverage, 3259,
    7802             :       GIR_Done,
    7803             :     // Label 538: @17420
    7804             :     GIM_Try, /*On fail goto*//*Label 539*/ 17443, // Rule ID 3260 //
    7805             :       GIM_CheckFeatures, GIFBS_IsBE,
    7806             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    7807             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7808             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7809             :       // (bitconvert:{ *:[v4f16] } FPR64:{ *:[v8i8] }:$src)  =>  (REV16v8i8:{ *:[v4f16] } FPR64:{ *:[v8i8] }:$src)
    7810             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV16v8i8,
    7811             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7812             :       // GIR_Coverage, 3260,
    7813             :       GIR_Done,
    7814             :     // Label 539: @17443
    7815             :     GIM_Try, /*On fail goto*//*Label 540*/ 17466, // Rule ID 3261 //
    7816             :       GIM_CheckFeatures, GIFBS_IsBE,
    7817             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7818             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7819             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7820             :       // (bitconvert:{ *:[v4f16] } FPR64:{ *:[f64] }:$src)  =>  (REV64v4i16:{ *:[v4f16] } FPR64:{ *:[f64] }:$src)
    7821             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    7822             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7823             :       // GIR_Coverage, 3261,
    7824             :       GIR_Done,
    7825             :     // Label 540: @17466
    7826             :     GIM_Try, /*On fail goto*//*Label 541*/ 17489, // Rule ID 3262 //
    7827             :       GIM_CheckFeatures, GIFBS_IsBE,
    7828             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    7829             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7830             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7831             :       // (bitconvert:{ *:[v4f16] } FPR64:{ *:[v2f32] }:$src)  =>  (REV32v4i16:{ *:[v4f16] } FPR64:{ *:[v2f32] }:$src)
    7832             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v4i16,
    7833             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7834             :       // GIR_Coverage, 3262,
    7835             :       GIR_Done,
    7836             :     // Label 541: @17489
    7837             :     GIM_Try, /*On fail goto*//*Label 542*/ 17512, // Rule ID 3263 //
    7838             :       GIM_CheckFeatures, GIFBS_IsBE,
    7839             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7840             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7841             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7842             :       // (bitconvert:{ *:[v4f16] } FPR64:{ *:[v1f64] }:$src)  =>  (REV64v4i16:{ *:[v4f16] } FPR64:{ *:[v1f64] }:$src)
    7843             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    7844             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7845             :       // GIR_Coverage, 3263,
    7846             :       GIR_Done,
    7847             :     // Label 542: @17512
    7848             :     GIM_Try, /*On fail goto*//*Label 543*/ 17544, // Rule ID 3264 //
    7849             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    7850             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7851             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7852             :       // (bitconvert:{ *:[v4f16] } FPR64:{ *:[v4i16] }:$src)  =>  FPR64:{ *:[v4f16] }:$src
    7853             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7854             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7855             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7856             :       GIR_EraseFromParent, /*InsnID*/0,
    7857             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7858             :       // GIR_Coverage, 3264,
    7859             :       GIR_Done,
    7860             :     // Label 543: @17544
    7861             :     GIM_Reject,
    7862             :     // Label 383: @17545
    7863             :     GIM_Try, /*On fail goto*//*Label 544*/ 17579, // Rule ID 3343 //
    7864             :       GIM_CheckFeatures, GIFBS_IsLE,
    7865             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
    7866             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7867             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7868             :       // (bitconvert:{ *:[v4f32] } FPR128:{ *:[f128] }:$src)  =>  FPR128:{ *:[v4f32] }:$src
    7869             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7870             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7871             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7872             :       GIR_EraseFromParent, /*InsnID*/0,
    7873             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    7874             :       // GIR_Coverage, 3343,
    7875             :       GIR_Done,
    7876             :     // Label 544: @17579
    7877             :     GIM_Try, /*On fail goto*//*Label 545*/ 17613, // Rule ID 3344 //
    7878             :       GIM_CheckFeatures, GIFBS_IsLE,
    7879             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    7880             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7881             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7882             :       // (bitconvert:{ *:[v4f32] } FPR128:{ *:[v8i16] }:$src)  =>  FPR128:{ *:[v4f32] }:$src
    7883             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7884             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7885             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7886             :       GIR_EraseFromParent, /*InsnID*/0,
    7887             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    7888             :       // GIR_Coverage, 3344,
    7889             :       GIR_Done,
    7890             :     // Label 545: @17613
    7891             :     GIM_Try, /*On fail goto*//*Label 546*/ 17647, // Rule ID 3345 //
    7892             :       GIM_CheckFeatures, GIFBS_IsLE,
    7893             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    7894             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7895             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7896             :       // (bitconvert:{ *:[v4f32] } FPR128:{ *:[v8f16] }:$src)  =>  FPR128:{ *:[v4f32] }:$src
    7897             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7898             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7899             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7900             :       GIR_EraseFromParent, /*InsnID*/0,
    7901             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    7902             :       // GIR_Coverage, 3345,
    7903             :       GIR_Done,
    7904             :     // Label 546: @17647
    7905             :     GIM_Try, /*On fail goto*//*Label 547*/ 17681, // Rule ID 3346 //
    7906             :       GIM_CheckFeatures, GIFBS_IsLE,
    7907             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    7908             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7909             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7910             :       // (bitconvert:{ *:[v4f32] } FPR128:{ *:[v16i8] }:$src)  =>  FPR128:{ *:[v4f32] }:$src
    7911             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7912             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7913             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7914             :       GIR_EraseFromParent, /*InsnID*/0,
    7915             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    7916             :       // GIR_Coverage, 3346,
    7917             :       GIR_Done,
    7918             :     // Label 547: @17681
    7919             :     GIM_Try, /*On fail goto*//*Label 548*/ 17715, // Rule ID 3347 //
    7920             :       GIM_CheckFeatures, GIFBS_IsLE,
    7921             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    7922             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7923             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7924             :       // (bitconvert:{ *:[v4f32] } FPR128:{ *:[v2i64] }:$src)  =>  FPR128:{ *:[v4f32] }:$src
    7925             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7926             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7927             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7928             :       GIR_EraseFromParent, /*InsnID*/0,
    7929             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    7930             :       // GIR_Coverage, 3347,
    7931             :       GIR_Done,
    7932             :     // Label 548: @17715
    7933             :     GIM_Try, /*On fail goto*//*Label 549*/ 17749, // Rule ID 3348 //
    7934             :       GIM_CheckFeatures, GIFBS_IsLE,
    7935             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    7936             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7937             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7938             :       // (bitconvert:{ *:[v4f32] } FPR128:{ *:[v2f64] }:$src)  =>  FPR128:{ *:[v4f32] }:$src
    7939             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7940             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7941             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7942             :       GIR_EraseFromParent, /*InsnID*/0,
    7943             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    7944             :       // GIR_Coverage, 3348,
    7945             :       GIR_Done,
    7946             :     // Label 549: @17749
    7947             :     GIM_Try, /*On fail goto*//*Label 550*/ 17820, // Rule ID 3349 //
    7948             :       GIM_CheckFeatures, GIFBS_IsBE,
    7949             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
    7950             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7951             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7952             :       // (bitconvert:{ *:[v4f32] } FPR128:{ *:[f128] }:$src)  =>  (EXTv16i8:{ *:[v4f32] } (REV64v4i32:{ *:[f128] } FPR128:{ *:[f128] }:$src), (REV64v4i32:{ *:[f128] } FPR128:{ *:[f128] }:$src), 8:{ *:[i32] })
    7953             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s128,
    7954             :       GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s128,
    7955             :       GIR_BuildMI, /*InsnID*/2, /*Opcode*/AArch64::REV64v4i32,
    7956             :       GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
    7957             :       GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
    7958             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
    7959             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::REV64v4i32,
    7960             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    7961             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
    7962             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    7963             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EXTv16i8,
    7964             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7965             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    7966             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/1, /*TempRegFlags*/0,
    7967             :       GIR_AddImm, /*InsnID*/0, /*Imm*/8,
    7968             :       GIR_EraseFromParent, /*InsnID*/0,
    7969             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7970             :       // GIR_Coverage, 3349,
    7971             :       GIR_Done,
    7972             :     // Label 550: @17820
    7973             :     GIM_Try, /*On fail goto*//*Label 551*/ 17843, // Rule ID 3350 //
    7974             :       GIM_CheckFeatures, GIFBS_IsBE,
    7975             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    7976             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7977             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7978             :       // (bitconvert:{ *:[v4f32] } FPR128:{ *:[v8i16] }:$src)  =>  (REV32v8i16:{ *:[v4f32] } FPR128:{ *:[v8i16] }:$src)
    7979             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v8i16,
    7980             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7981             :       // GIR_Coverage, 3350,
    7982             :       GIR_Done,
    7983             :     // Label 551: @17843
    7984             :     GIM_Try, /*On fail goto*//*Label 552*/ 17866, // Rule ID 3351 //
    7985             :       GIM_CheckFeatures, GIFBS_IsBE,
    7986             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    7987             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7988             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7989             :       // (bitconvert:{ *:[v4f32] } FPR128:{ *:[v8f16] }:$src)  =>  (REV32v8i16:{ *:[v4f32] } FPR128:{ *:[v8f16] }:$src)
    7990             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v8i16,
    7991             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7992             :       // GIR_Coverage, 3351,
    7993             :       GIR_Done,
    7994             :     // Label 552: @17866
    7995             :     GIM_Try, /*On fail goto*//*Label 553*/ 17889, // Rule ID 3352 //
    7996             :       GIM_CheckFeatures, GIFBS_IsBE,
    7997             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    7998             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7999             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8000             :       // (bitconvert:{ *:[v4f32] } FPR128:{ *:[v16i8] }:$src)  =>  (REV32v16i8:{ *:[v4f32] } FPR128:{ *:[v16i8] }:$src)
    8001             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v16i8,
    8002             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8003             :       // GIR_Coverage, 3352,
    8004             :       GIR_Done,
    8005             :     // Label 553: @17889
    8006             :     GIM_Try, /*On fail goto*//*Label 554*/ 17912, // Rule ID 3353 //
    8007             :       GIM_CheckFeatures, GIFBS_IsBE,
    8008             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8009             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8010             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8011             :       // (bitconvert:{ *:[v4f32] } FPR128:{ *:[v2i64] }:$src)  =>  (REV64v4i32:{ *:[v4f32] } FPR128:{ *:[v2i64] }:$src)
    8012             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i32,
    8013             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8014             :       // GIR_Coverage, 3353,
    8015             :       GIR_Done,
    8016             :     // Label 554: @17912
    8017             :     GIM_Try, /*On fail goto*//*Label 555*/ 17935, // Rule ID 3354 //
    8018             :       GIM_CheckFeatures, GIFBS_IsBE,
    8019             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8020             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8021             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8022             :       // (bitconvert:{ *:[v4f32] } FPR128:{ *:[v2f64] }:$src)  =>  (REV64v4i32:{ *:[v4f32] } FPR128:{ *:[v2f64] }:$src)
    8023             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i32,
    8024             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8025             :       // GIR_Coverage, 3354,
    8026             :       GIR_Done,
    8027             :     // Label 555: @17935
    8028             :     GIM_Try, /*On fail goto*//*Label 556*/ 17967, // Rule ID 3355 //
    8029             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8030             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8031             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8032             :       // (bitconvert:{ *:[v4f32] } FPR128:{ *:[v4i32] }:$src)  =>  FPR128:{ *:[v4f32] }:$src
    8033             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8034             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8035             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8036             :       GIR_EraseFromParent, /*InsnID*/0,
    8037             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    8038             :       // GIR_Coverage, 3355,
    8039             :       GIR_Done,
    8040             :     // Label 556: @17967
    8041             :     GIM_Try, /*On fail goto*//*Label 557*/ 18001, // Rule ID 3369 //
    8042             :       GIM_CheckFeatures, GIFBS_IsLE,
    8043             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
    8044             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8045             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8046             :       // (bitconvert:{ *:[v4i32] } FPR128:{ *:[f128] }:$src)  =>  FPR128:{ *:[v4i32] }:$src
    8047             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8048             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8049             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8050             :       GIR_EraseFromParent, /*InsnID*/0,
    8051             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    8052             :       // GIR_Coverage, 3369,
    8053             :       GIR_Done,
    8054             :     // Label 557: @18001
    8055             :     GIM_Try, /*On fail goto*//*Label 558*/ 18035, // Rule ID 3370 //
    8056             :       GIM_CheckFeatures, GIFBS_IsLE,
    8057             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8058             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8059             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8060             :       // (bitconvert:{ *:[v4i32] } FPR128:{ *:[v2i64] }:$src)  =>  FPR128:{ *:[v4i32] }:$src
    8061             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8062             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8063             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8064             :       GIR_EraseFromParent, /*InsnID*/0,
    8065             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    8066             :       // GIR_Coverage, 3370,
    8067             :       GIR_Done,
    8068             :     // Label 558: @18035
    8069             :     GIM_Try, /*On fail goto*//*Label 559*/ 18069, // Rule ID 3371 //
    8070             :       GIM_CheckFeatures, GIFBS_IsLE,
    8071             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    8072             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8073             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8074             :       // (bitconvert:{ *:[v4i32] } FPR128:{ *:[v8i16] }:$src)  =>  FPR128:{ *:[v4i32] }:$src
    8075             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8076             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8077             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8078             :       GIR_EraseFromParent, /*InsnID*/0,
    8079             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    8080             :       // GIR_Coverage, 3371,
    8081             :       GIR_Done,
    8082             :     // Label 559: @18069
    8083             :     GIM_Try, /*On fail goto*//*Label 560*/ 18103, // Rule ID 3372 //
    8084             :       GIM_CheckFeatures, GIFBS_IsLE,
    8085             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    8086             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8087             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8088             :       // (bitconvert:{ *:[v4i32] } FPR128:{ *:[v16i8] }:$src)  =>  FPR128:{ *:[v4i32] }:$src
    8089             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8090             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8091             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8092             :       GIR_EraseFromParent, /*InsnID*/0,
    8093             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    8094             :       // GIR_Coverage, 3372,
    8095             :       GIR_Done,
    8096             :     // Label 560: @18103
    8097             :     GIM_Try, /*On fail goto*//*Label 561*/ 18137, // Rule ID 3373 //
    8098             :       GIM_CheckFeatures, GIFBS_IsLE,
    8099             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8100             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8101             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8102             :       // (bitconvert:{ *:[v4i32] } FPR128:{ *:[v2f64] }:$src)  =>  FPR128:{ *:[v4i32] }:$src
    8103             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8104             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8105             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8106             :       GIR_EraseFromParent, /*InsnID*/0,
    8107             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    8108             :       // GIR_Coverage, 3373,
    8109             :       GIR_Done,
    8110             :     // Label 561: @18137
    8111             :     GIM_Try, /*On fail goto*//*Label 562*/ 18171, // Rule ID 3374 //
    8112             :       GIM_CheckFeatures, GIFBS_IsLE,
    8113             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    8114             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8115             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8116             :       // (bitconvert:{ *:[v4i32] } FPR128:{ *:[v8f16] }:$src)  =>  FPR128:{ *:[v4i32] }:$src
    8117             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8118             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8119             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8120             :       GIR_EraseFromParent, /*InsnID*/0,
    8121             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    8122             :       // GIR_Coverage, 3374,
    8123             :       GIR_Done,
    8124             :     // Label 562: @18171
    8125             :     GIM_Try, /*On fail goto*//*Label 563*/ 18242, // Rule ID 3375 //
    8126             :       GIM_CheckFeatures, GIFBS_IsBE,
    8127             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
    8128             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8129             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8130             :       // (bitconvert:{ *:[v4i32] } FPR128:{ *:[f128] }:$src)  =>  (EXTv16i8:{ *:[v4i32] } (REV64v4i32:{ *:[f128] } FPR128:{ *:[f128] }:$src), (REV64v4i32:{ *:[f128] } FPR128:{ *:[f128] }:$src), 8:{ *:[i32] })
    8131             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s128,
    8132             :       GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s128,
    8133             :       GIR_BuildMI, /*InsnID*/2, /*Opcode*/AArch64::REV64v4i32,
    8134             :       GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
    8135             :       GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
    8136             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
    8137             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::REV64v4i32,
    8138             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    8139             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
    8140             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    8141             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EXTv16i8,
    8142             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8143             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    8144             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/1, /*TempRegFlags*/0,
    8145             :       GIR_AddImm, /*InsnID*/0, /*Imm*/8,
    8146             :       GIR_EraseFromParent, /*InsnID*/0,
    8147             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8148             :       // GIR_Coverage, 3375,
    8149             :       GIR_Done,
    8150             :     // Label 563: @18242
    8151             :     GIM_Try, /*On fail goto*//*Label 564*/ 18265, // Rule ID 3376 //
    8152             :       GIM_CheckFeatures, GIFBS_IsBE,
    8153             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8154             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8155             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8156             :       // (bitconvert:{ *:[v4i32] } FPR128:{ *:[v2i64] }:$src)  =>  (REV64v4i32:{ *:[v4i32] } FPR128:{ *:[v2i64] }:$src)
    8157             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i32,
    8158             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8159             :       // GIR_Coverage, 3376,
    8160             :       GIR_Done,
    8161             :     // Label 564: @18265
    8162             :     GIM_Try, /*On fail goto*//*Label 565*/ 18288, // Rule ID 3377 //
    8163             :       GIM_CheckFeatures, GIFBS_IsBE,
    8164             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    8165             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8166             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8167             :       // (bitconvert:{ *:[v4i32] } FPR128:{ *:[v8i16] }:$src)  =>  (REV32v8i16:{ *:[v4i32] } FPR128:{ *:[v8i16] }:$src)
    8168             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v8i16,
    8169             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8170             :       // GIR_Coverage, 3377,
    8171             :       GIR_Done,
    8172             :     // Label 565: @18288
    8173             :     GIM_Try, /*On fail goto*//*Label 566*/ 18311, // Rule ID 3378 //
    8174             :       GIM_CheckFeatures, GIFBS_IsBE,
    8175             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    8176             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8177             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8178             :       // (bitconvert:{ *:[v4i32] } FPR128:{ *:[v16i8] }:$src)  =>  (REV32v16i8:{ *:[v4i32] } FPR128:{ *:[v16i8] }:$src)
    8179             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v16i8,
    8180             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8181             :       // GIR_Coverage, 3378,
    8182             :       GIR_Done,
    8183             :     // Label 566: @18311
    8184             :     GIM_Try, /*On fail goto*//*Label 567*/ 18334, // Rule ID 3379 //
    8185             :       GIM_CheckFeatures, GIFBS_IsBE,
    8186             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8187             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8188             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8189             :       // (bitconvert:{ *:[v4i32] } FPR128:{ *:[v2f64] }:$src)  =>  (REV64v4i32:{ *:[v4i32] } FPR128:{ *:[v2f64] }:$src)
    8190             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i32,
    8191             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8192             :       // GIR_Coverage, 3379,
    8193             :       GIR_Done,
    8194             :     // Label 567: @18334
    8195             :     GIM_Try, /*On fail goto*//*Label 568*/ 18357, // Rule ID 3380 //
    8196             :       GIM_CheckFeatures, GIFBS_IsBE,
    8197             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    8198             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8199             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8200             :       // (bitconvert:{ *:[v4i32] } FPR128:{ *:[v8f16] }:$src)  =>  (REV32v8i16:{ *:[v4i32] } FPR128:{ *:[v8f16] }:$src)
    8201             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v8i16,
    8202             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8203             :       // GIR_Coverage, 3380,
    8204             :       GIR_Done,
    8205             :     // Label 568: @18357
    8206             :     GIM_Try, /*On fail goto*//*Label 569*/ 18389, // Rule ID 3381 //
    8207             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8208             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8209             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8210             :       // (bitconvert:{ *:[v4i32] } FPR128:{ *:[v4f32] }:$src)  =>  FPR128:{ *:[v4i32] }:$src
    8211             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8212             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8213             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8214             :       GIR_EraseFromParent, /*InsnID*/0,
    8215             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    8216             :       // GIR_Coverage, 3381,
    8217             :       GIR_Done,
    8218             :     // Label 569: @18389
    8219             :     GIM_Reject,
    8220             :     // Label 384: @18390
    8221             :     GIM_Try, /*On fail goto*//*Label 570*/ 18415, // Rule ID 3182 //
    8222             :       GIM_CheckFeatures, GIFBS_IsLE,
    8223             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    8224             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8225             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    8226             :       // (bitconvert:{ *:[v8i8] } GPR64:{ *:[i64] }:$Xn)  =>  (COPY_TO_REGCLASS:{ *:[v8i8] } GPR64:{ *:[i64] }:$Xn, FPR64:{ *:[i32] })
    8227             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8228             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    8229             :       // GIR_Coverage, 3182,
    8230             :       GIR_Done,
    8231             :     // Label 570: @18415
    8232             :     GIM_Try, /*On fail goto*//*Label 571*/ 18463, // Rule ID 3193 //
    8233             :       GIM_CheckFeatures, GIFBS_IsBE,
    8234             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    8235             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8236             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    8237             :       // (bitconvert:{ *:[v8i8] } GPR64:{ *:[i64] }:$Xn)  =>  (REV64v8i8:{ *:[v8i8] } (COPY_TO_REGCLASS:{ *:[i64] } GPR64:{ *:[i64] }:$Xn, FPR64:{ *:[i32] }))
    8238             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
    8239             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY,
    8240             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    8241             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // Xn
    8242             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    8243             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::REV64v8i8,
    8244             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8245             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    8246             :       GIR_EraseFromParent, /*InsnID*/0,
    8247             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8248             :       // GIR_Coverage, 3193,
    8249             :       GIR_Done,
    8250             :     // Label 571: @18463
    8251             :     GIM_Try, /*On fail goto*//*Label 572*/ 18497, // Rule ID 3265 //
    8252             :       GIM_CheckFeatures, GIFBS_IsLE,
    8253             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    8254             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8255             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    8256             :       // (bitconvert:{ *:[v8i8] } FPR64:{ *:[v1i64] }:$src)  =>  FPR64:{ *:[v8i8] }:$src
    8257             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8258             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8259             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8260             :       GIR_EraseFromParent, /*InsnID*/0,
    8261             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    8262             :       // GIR_Coverage, 3265,
    8263             :       GIR_Done,
    8264             :     // Label 572: @18497
    8265             :     GIM_Try, /*On fail goto*//*Label 573*/ 18531, // Rule ID 3266 //
    8266             :       GIM_CheckFeatures, GIFBS_IsLE,
    8267             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    8268             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8269             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    8270             :       // (bitconvert:{ *:[v8i8] } FPR64:{ *:[v2i32] }:$src)  =>  FPR64:{ *:[v8i8] }:$src
    8271             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8272             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8273             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8274             :       GIR_EraseFromParent, /*InsnID*/0,
    8275             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    8276             :       // GIR_Coverage, 3266,
    8277             :       GIR_Done,
    8278             :     // Label 573: @18531
    8279             :     GIM_Try, /*On fail goto*//*Label 574*/ 18565, // Rule ID 3267 //
    8280             :       GIM_CheckFeatures, GIFBS_IsLE,
    8281             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    8282             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8283             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    8284             :       // (bitconvert:{ *:[v8i8] } FPR64:{ *:[v4i16] }:$src)  =>  FPR64:{ *:[v8i8] }:$src
    8285             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8286             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8287             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8288             :       GIR_EraseFromParent, /*InsnID*/0,
    8289             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    8290             :       // GIR_Coverage, 3267,
    8291             :       GIR_Done,
    8292             :     // Label 574: @18565
    8293             :     GIM_Try, /*On fail goto*//*Label 575*/ 18599, // Rule ID 3268 //
    8294             :       GIM_CheckFeatures, GIFBS_IsLE,
    8295             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    8296             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8297             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    8298             :       // (bitconvert:{ *:[v8i8] } FPR64:{ *:[f64] }:$src)  =>  FPR64:{ *:[v8i8] }:$src
    8299             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8300             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8301             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8302             :       GIR_EraseFromParent, /*InsnID*/0,
    8303             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    8304             :       // GIR_Coverage, 3268,
    8305             :       GIR_Done,
    8306             :     // Label 575: @18599
    8307             :     GIM_Try, /*On fail goto*//*Label 576*/ 18633, // Rule ID 3269 //
    8308             :       GIM_CheckFeatures, GIFBS_IsLE,
    8309             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    8310             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8311             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    8312             :       // (bitconvert:{ *:[v8i8] } FPR64:{ *:[v2f32] }:$src)  =>  FPR64:{ *:[v8i8] }:$src
    8313             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8314             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8315             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8316             :       GIR_EraseFromParent, /*InsnID*/0,
    8317             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    8318             :       // GIR_Coverage, 3269,
    8319             :       GIR_Done,
    8320             :     // Label 576: @18633
    8321             :     GIM_Try, /*On fail goto*//*Label 577*/ 18667, // Rule ID 3270 //
    8322             :       GIM_CheckFeatures, GIFBS_IsLE,
    8323             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    8324             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8325             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    8326             :       // (bitconvert:{ *:[v8i8] } FPR64:{ *:[v1f64] }:$src)  =>  FPR64:{ *:[v8i8] }:$src
    8327             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8328             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8329             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8330             :       GIR_EraseFromParent, /*InsnID*/0,
    8331             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    8332             :       // GIR_Coverage, 3270,
    8333             :       GIR_Done,
    8334             :     // Label 577: @18667
    8335             :     GIM_Try, /*On fail goto*//*Label 578*/ 18701, // Rule ID 3271 //
    8336             :       GIM_CheckFeatures, GIFBS_IsLE,
    8337             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    8338             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8339             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    8340             :       // (bitconvert:{ *:[v8i8] } FPR64:{ *:[v4f16] }:$src)  =>  FPR64:{ *:[v8i8] }:$src
    8341             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8342             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8343             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8344             :       GIR_EraseFromParent, /*InsnID*/0,
    8345             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    8346             :       // GIR_Coverage, 3271,
    8347             :       GIR_Done,
    8348             :     // Label 578: @18701
    8349             :     GIM_Try, /*On fail goto*//*Label 579*/ 18724, // Rule ID 3272 //
    8350             :       GIM_CheckFeatures, GIFBS_IsBE,
    8351             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    8352             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8353             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    8354             :       // (bitconvert:{ *:[v8i8] } FPR64:{ *:[v1i64] }:$src)  =>  (REV64v8i8:{ *:[v8i8] } FPR64:{ *:[v1i64] }:$src)
    8355             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v8i8,
    8356             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8357             :       // GIR_Coverage, 3272,
    8358             :       GIR_Done,
    8359             :     // Label 579: @18724
    8360             :     GIM_Try, /*On fail goto*//*Label 580*/ 18747, // Rule ID 3273 //
    8361             :       GIM_CheckFeatures, GIFBS_IsBE,
    8362             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    8363             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8364             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    8365             :       // (bitconvert:{ *:[v8i8] } FPR64:{ *:[v2i32] }:$src)  =>  (REV32v8i8:{ *:[v8i8] } FPR64:{ *:[v2i32] }:$src)
    8366             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v8i8,
    8367             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8368             :       // GIR_Coverage, 3273,
    8369             :       GIR_Done,
    8370             :     // Label 580: @18747
    8371             :     GIM_Try, /*On fail goto*//*Label 581*/ 18770, // Rule ID 3274 //
    8372             :       GIM_CheckFeatures, GIFBS_IsBE,
    8373             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    8374             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8375             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    8376             :       // (bitconvert:{ *:[v8i8] } FPR64:{ *:[v4i16] }:$src)  =>  (REV16v8i8:{ *:[v8i8] } FPR64:{ *:[v4i16] }:$src)
    8377             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV16v8i8,
    8378             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8379             :       // GIR_Coverage, 3274,
    8380             :       GIR_Done,
    8381             :     // Label 581: @18770
    8382             :     GIM_Try, /*On fail goto*//*Label 582*/ 18793, // Rule ID 3275 //
    8383             :       GIM_CheckFeatures, GIFBS_IsBE,
    8384             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    8385             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8386             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    8387             :       // (bitconvert:{ *:[v8i8] } FPR64:{ *:[f64] }:$src)  =>  (REV64v8i8:{ *:[v8i8] } FPR64:{ *:[f64] }:$src)
    8388             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v8i8,
    8389             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8390             :       // GIR_Coverage, 3275,
    8391             :       GIR_Done,
    8392             :     // Label 582: @18793
    8393             :     GIM_Try, /*On fail goto*//*Label 583*/ 18816, // Rule ID 3276 //
    8394             :       GIM_CheckFeatures, GIFBS_IsBE,
    8395             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    8396             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8397             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    8398             :       // (bitconvert:{ *:[v8i8] } FPR64:{ *:[v2f32] }:$src)  =>  (REV32v8i8:{ *:[v8i8] } FPR64:{ *:[v2f32] }:$src)
    8399             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v8i8,
    8400             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8401             :       // GIR_Coverage, 3276,
    8402             :       GIR_Done,
    8403             :     // Label 583: @18816
    8404             :     GIM_Try, /*On fail goto*//*Label 584*/ 18839, // Rule ID 3277 //
    8405             :       GIM_CheckFeatures, GIFBS_IsBE,
    8406             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    8407             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8408             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    8409             :       // (bitconvert:{ *:[v8i8] } FPR64:{ *:[v1f64] }:$src)  =>  (REV64v8i8:{ *:[v8i8] } FPR64:{ *:[v1f64] }:$src)
    8410             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v8i8,
    8411             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8412             :       // GIR_Coverage, 3277,
    8413             :       GIR_Done,
    8414             :     // Label 584: @18839
    8415             :     GIM_Try, /*On fail goto*//*Label 585*/ 18862, // Rule ID 3278 //
    8416             :       GIM_CheckFeatures, GIFBS_IsBE,
    8417             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    8418             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8419             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    8420             :       // (bitconvert:{ *:[v8i8] } FPR64:{ *:[v4f16] }:$src)  =>  (REV16v8i8:{ *:[v8i8] } FPR64:{ *:[v4f16] }:$src)
    8421             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV16v8i8,
    8422             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8423             :       // GIR_Coverage, 3278,
    8424             :       GIR_Done,
    8425             :     // Label 585: @18862
    8426             :     GIM_Reject,
    8427             :     // Label 385: @18863
    8428             :     GIM_Try, /*On fail goto*//*Label 586*/ 18897, // Rule ID 3382 //
    8429             :       GIM_CheckFeatures, GIFBS_IsLE,
    8430             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
    8431             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8432             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8433             :       // (bitconvert:{ *:[v8i16] } FPR128:{ *:[f128] }:$src)  =>  FPR128:{ *:[v8i16] }:$src
    8434             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8435             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8436             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8437             :       GIR_EraseFromParent, /*InsnID*/0,
    8438             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    8439             :       // GIR_Coverage, 3382,
    8440             :       GIR_Done,
    8441             :     // Label 586: @18897
    8442             :     GIM_Try, /*On fail goto*//*Label 587*/ 18931, // Rule ID 3383 //
    8443             :       GIM_CheckFeatures, GIFBS_IsLE,
    8444             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8445             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8446             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8447             :       // (bitconvert:{ *:[v8i16] } FPR128:{ *:[v2i64] }:$src)  =>  FPR128:{ *:[v8i16] }:$src
    8448             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8449             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8450             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8451             :       GIR_EraseFromParent, /*InsnID*/0,
    8452             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    8453             :       // GIR_Coverage, 3383,
    8454             :       GIR_Done,
    8455             :     // Label 587: @18931
    8456             :     GIM_Try, /*On fail goto*//*Label 588*/ 18965, // Rule ID 3384 //
    8457             :       GIM_CheckFeatures, GIFBS_IsLE,
    8458             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8459             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8460             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8461             :       // (bitconvert:{ *:[v8i16] } FPR128:{ *:[v4i32] }:$src)  =>  FPR128:{ *:[v8i16] }:$src
    8462             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8463             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8464             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8465             :       GIR_EraseFromParent, /*InsnID*/0,
    8466             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    8467             :       // GIR_Coverage, 3384,
    8468             :       GIR_Done,
    8469             :     // Label 588: @18965
    8470             :     GIM_Try, /*On fail goto*//*Label 589*/ 18999, // Rule ID 3385 //
    8471             :       GIM_CheckFeatures, GIFBS_IsLE,
    8472             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    8473             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8474             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8475             :       // (bitconvert:{ *:[v8i16] } FPR128:{ *:[v16i8] }:$src)  =>  FPR128:{ *:[v8i16] }:$src
    8476             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8477             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8478             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8479             :       GIR_EraseFromParent, /*InsnID*/0,
    8480             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    8481             :       // GIR_Coverage, 3385,
    8482             :       GIR_Done,
    8483             :     // Label 589: @18999
    8484             :     GIM_Try, /*On fail goto*//*Label 590*/ 19033, // Rule ID 3386 //
    8485             :       GIM_CheckFeatures, GIFBS_IsLE,
    8486             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8487             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8488             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8489             :       // (bitconvert:{ *:[v8i16] } FPR128:{ *:[v2f64] }:$src)  =>  FPR128:{ *:[v8i16] }:$src
    8490             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8491             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8492             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8493             :       GIR_EraseFromParent, /*InsnID*/0,
    8494             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    8495             :       // GIR_Coverage, 3386,
    8496             :       GIR_Done,
    8497             :     // Label 590: @19033
    8498             :     GIM_Try, /*On fail goto*//*Label 591*/ 19067, // Rule ID 3387 //
    8499             :       GIM_CheckFeatures, GIFBS_IsLE,
    8500             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8501             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8502             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8503             :       // (bitconvert:{ *:[v8i16] } FPR128:{ *:[v4f32] }:$src)  =>  FPR128:{ *:[v8i16] }:$src
    8504             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8505             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8506             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8507             :       GIR_EraseFromParent, /*InsnID*/0,
    8508             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    8509             :       // GIR_Coverage, 3387,
    8510             :       GIR_Done,
    8511             :     // Label 591: @19067
    8512             :     GIM_Try, /*On fail goto*//*Label 592*/ 19138, // Rule ID 3388 //
    8513             :       GIM_CheckFeatures, GIFBS_IsBE,
    8514             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
    8515             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8516             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8517             :       // (bitconvert:{ *:[v8i16] } FPR128:{ *:[f128] }:$src)  =>  (EXTv16i8:{ *:[v8i16] } (REV64v8i16:{ *:[f128] } FPR128:{ *:[f128] }:$src), (REV64v8i16:{ *:[f128] } FPR128:{ *:[f128] }:$src), 8:{ *:[i32] })
    8518             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s128,
    8519             :       GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s128,
    8520             :       GIR_BuildMI, /*InsnID*/2, /*Opcode*/AArch64::REV64v8i16,
    8521             :       GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
    8522             :       GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
    8523             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
    8524             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::REV64v8i16,
    8525             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    8526             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
    8527             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    8528             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EXTv16i8,
    8529             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8530             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    8531             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/1, /*TempRegFlags*/0,
    8532             :       GIR_AddImm, /*InsnID*/0, /*Imm*/8,
    8533             :       GIR_EraseFromParent, /*InsnID*/0,
    8534             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8535             :       // GIR_Coverage, 3388,
    8536             :       GIR_Done,
    8537             :     // Label 592: @19138
    8538             :     GIM_Try, /*On fail goto*//*Label 593*/ 19161, // Rule ID 3389 //
    8539             :       GIM_CheckFeatures, GIFBS_IsBE,
    8540             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8541             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8542             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8543             :       // (bitconvert:{ *:[v8i16] } FPR128:{ *:[v2i64] }:$src)  =>  (REV64v8i16:{ *:[v8i16] } FPR128:{ *:[v2i64] }:$src)
    8544             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v8i16,
    8545             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8546             :       // GIR_Coverage, 3389,
    8547             :       GIR_Done,
    8548             :     // Label 593: @19161
    8549             :     GIM_Try, /*On fail goto*//*Label 594*/ 19184, // Rule ID 3390 //
    8550             :       GIM_CheckFeatures, GIFBS_IsBE,
    8551             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8552             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8553             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8554             :       // (bitconvert:{ *:[v8i16] } FPR128:{ *:[v4i32] }:$src)  =>  (REV32v8i16:{ *:[v8i16] } FPR128:{ *:[v4i32] }:$src)
    8555             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v8i16,
    8556             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8557             :       // GIR_Coverage, 3390,
    8558             :       GIR_Done,
    8559             :     // Label 594: @19184
    8560             :     GIM_Try, /*On fail goto*//*Label 595*/ 19207, // Rule ID 3391 //
    8561             :       GIM_CheckFeatures, GIFBS_IsBE,
    8562             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    8563             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8564             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8565             :       // (bitconvert:{ *:[v8i16] } FPR128:{ *:[v16i8] }:$src)  =>  (REV16v16i8:{ *:[v8i16] } FPR128:{ *:[v16i8] }:$src)
    8566             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV16v16i8,
    8567             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8568             :       // GIR_Coverage, 3391,
    8569             :       GIR_Done,
    8570             :     // Label 595: @19207
    8571             :     GIM_Try, /*On fail goto*//*Label 596*/ 19230, // Rule ID 3392 //
    8572             :       GIM_CheckFeatures, GIFBS_IsBE,
    8573             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8574             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8575             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8576             :       // (bitconvert:{ *:[v8i16] } FPR128:{ *:[v2f64] }:$src)  =>  (REV64v8i16:{ *:[v8i16] } FPR128:{ *:[v2f64] }:$src)
    8577             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v8i16,
    8578             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8579             :       // GIR_Coverage, 3392,
    8580             :       GIR_Done,
    8581             :     // Label 596: @19230
    8582             :     GIM_Try, /*On fail goto*//*Label 597*/ 19253, // Rule ID 3393 //
    8583             :       GIM_CheckFeatures, GIFBS_IsBE,
    8584             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8585             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8586             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8587             :       // (bitconvert:{ *:[v8i16] } FPR128:{ *:[v4f32] }:$src)  =>  (REV32v8i16:{ *:[v8i16] } FPR128:{ *:[v4f32] }:$src)
    8588             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v8i16,
    8589             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8590             :       // GIR_Coverage, 3393,
    8591             :       GIR_Done,
    8592             :     // Label 597: @19253
    8593             :     GIM_Try, /*On fail goto*//*Label 598*/ 19285, // Rule ID 3394 //
    8594             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    8595             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8596             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8597             :       // (bitconvert:{ *:[v8i16] } FPR128:{ *:[v8f16] }:$src)  =>  FPR128:{ *:[v8i16] }:$src
    8598             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8599             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8600             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8601             :       GIR_EraseFromParent, /*InsnID*/0,
    8602             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    8603             :       // GIR_Coverage, 3394,
    8604             :       GIR_Done,
    8605             :     // Label 598: @19285
    8606             :     GIM_Try, /*On fail goto*//*Label 599*/ 19319, // Rule ID 3395 //
    8607             :       GIM_CheckFeatures, GIFBS_IsLE,
    8608             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
    8609             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8610             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8611             :       // (bitconvert:{ *:[v8f16] } FPR128:{ *:[f128] }:$src)  =>  FPR128:{ *:[v8f16] }:$src
    8612             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8613             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8614             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8615             :       GIR_EraseFromParent, /*InsnID*/0,
    8616             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    8617             :       // GIR_Coverage, 3395,
    8618             :       GIR_Done,
    8619             :     // Label 599: @19319
    8620             :     GIM_Try, /*On fail goto*//*Label 600*/ 19353, // Rule ID 3396 //
    8621             :       GIM_CheckFeatures, GIFBS_IsLE,
    8622             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8623             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8624             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8625             :       // (bitconvert:{ *:[v8f16] } FPR128:{ *:[v2i64] }:$src)  =>  FPR128:{ *:[v8f16] }:$src
    8626             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8627             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8628             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8629             :       GIR_EraseFromParent, /*InsnID*/0,
    8630             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    8631             :       // GIR_Coverage, 3396,
    8632             :       GIR_Done,
    8633             :     // Label 600: @19353
    8634             :     GIM_Try, /*On fail goto*//*Label 601*/ 19387, // Rule ID 3397 //
    8635             :       GIM_CheckFeatures, GIFBS_IsLE,
    8636             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8637             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8638             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8639             :       // (bitconvert:{ *:[v8f16] } FPR128:{ *:[v4i32] }:$src)  =>  FPR128:{ *:[v8f16] }:$src
    8640             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8641             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8642             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8643             :       GIR_EraseFromParent, /*InsnID*/0,
    8644             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    8645             :       // GIR_Coverage, 3397,
    8646             :       GIR_Done,
    8647             :     // Label 601: @19387
    8648             :     GIM_Try, /*On fail goto*//*Label 602*/ 19421, // Rule ID 3398 //
    8649             :       GIM_CheckFeatures, GIFBS_IsLE,
    8650             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    8651             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8652             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8653             :       // (bitconvert:{ *:[v8f16] } FPR128:{ *:[v16i8] }:$src)  =>  FPR128:{ *:[v8f16] }:$src
    8654             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8655             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8656             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8657             :       GIR_EraseFromParent, /*InsnID*/0,
    8658             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    8659             :       // GIR_Coverage, 3398,
    8660             :       GIR_Done,
    8661             :     // Label 602: @19421
    8662             :     GIM_Try, /*On fail goto*//*Label 603*/ 19455, // Rule ID 3399 //
    8663             :       GIM_CheckFeatures, GIFBS_IsLE,
    8664             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8665             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8666             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8667             :       // (bitconvert:{ *:[v8f16] } FPR128:{ *:[v2f64] }:$src)  =>  FPR128:{ *:[v8f16] }:$src
    8668             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8669             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8670             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8671             :       GIR_EraseFromParent, /*InsnID*/0,
    8672             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    8673             :       // GIR_Coverage, 3399,
    8674             :       GIR_Done,
    8675             :     // Label 603: @19455
    8676             :     GIM_Try, /*On fail goto*//*Label 604*/ 19489, // Rule ID 3400 //
    8677             :       GIM_CheckFeatures, GIFBS_IsLE,
    8678             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8679             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8680             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8681             :       // (bitconvert:{ *:[v8f16] } FPR128:{ *:[v4f32] }:$src)  =>  FPR128:{ *:[v8f16] }:$src
    8682             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8683             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8684             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8685             :       GIR_EraseFromParent, /*InsnID*/0,
    8686             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    8687             :       // GIR_Coverage, 3400,
    8688             :       GIR_Done,
    8689             :     // Label 604: @19489
    8690             :     GIM_Try, /*On fail goto*//*Label 605*/ 19560, // Rule ID 3401 //
    8691             :       GIM_CheckFeatures, GIFBS_IsBE,
    8692             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
    8693             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8694             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8695             :       // (bitconvert:{ *:[v8f16] } FPR128:{ *:[f128] }:$src)  =>  (EXTv16i8:{ *:[v8f16] } (REV64v8i16:{ *:[f128] } FPR128:{ *:[f128] }:$src), (REV64v8i16:{ *:[f128] } FPR128:{ *:[f128] }:$src), 8:{ *:[i32] })
    8696             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s128,
    8697             :       GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s128,
    8698             :       GIR_BuildMI, /*InsnID*/2, /*Opcode*/AArch64::REV64v8i16,
    8699             :       GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
    8700             :       GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
    8701             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
    8702             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::REV64v8i16,
    8703             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    8704             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
    8705             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    8706             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EXTv16i8,
    8707             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8708             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    8709             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/1, /*TempRegFlags*/0,
    8710             :       GIR_AddImm, /*InsnID*/0, /*Imm*/8,
    8711             :       GIR_EraseFromParent, /*InsnID*/0,
    8712             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8713             :       // GIR_Coverage, 3401,
    8714             :       GIR_Done,
    8715             :     // Label 605: @19560
    8716             :     GIM_Try, /*On fail goto*//*Label 606*/ 19583, // Rule ID 3402 //
    8717             :       GIM_CheckFeatures, GIFBS_IsBE,
    8718             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8719             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8720             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8721             :       // (bitconvert:{ *:[v8f16] } FPR128:{ *:[v2i64] }:$src)  =>  (REV64v8i16:{ *:[v8f16] } FPR128:{ *:[v2i64] }:$src)
    8722             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v8i16,
    8723             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8724             :       // GIR_Coverage, 3402,
    8725             :       GIR_Done,
    8726             :     // Label 606: @19583
    8727             :     GIM_Try, /*On fail goto*//*Label 607*/ 19606, // Rule ID 3403 //
    8728             :       GIM_CheckFeatures, GIFBS_IsBE,
    8729             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8730             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8731             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8732             :       // (bitconvert:{ *:[v8f16] } FPR128:{ *:[v4i32] }:$src)  =>  (REV32v8i16:{ *:[v8f16] } FPR128:{ *:[v4i32] }:$src)
    8733             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v8i16,
    8734             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8735             :       // GIR_Coverage, 3403,
    8736             :       GIR_Done,
    8737             :     // Label 607: @19606
    8738             :     GIM_Try, /*On fail goto*//*Label 608*/ 19629, // Rule ID 3404 //
    8739             :       GIM_CheckFeatures, GIFBS_IsBE,
    8740             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    8741             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8742             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8743             :       // (bitconvert:{ *:[v8f16] } FPR128:{ *:[v16i8] }:$src)  =>  (REV16v16i8:{ *:[v8f16] } FPR128:{ *:[v16i8] }:$src)
    8744             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV16v16i8,
    8745             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8746             :       // GIR_Coverage, 3404,
    8747             :       GIR_Done,
    8748             :     // Label 608: @19629
    8749             :     GIM_Try, /*On fail goto*//*Label 609*/ 19652, // Rule ID 3405 //
    8750             :       GIM_CheckFeatures, GIFBS_IsBE,
    8751             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8752             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8753             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8754             :       // (bitconvert:{ *:[v8f16] } FPR128:{ *:[v2f64] }:$src)  =>  (REV64v8i16:{ *:[v8f16] } FPR128:{ *:[v2f64] }:$src)
    8755             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v8i16,
    8756             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8757             :       // GIR_Coverage, 3405,
    8758             :       GIR_Done,
    8759             :     // Label 609: @19652
    8760             :     GIM_Try, /*On fail goto*//*Label 610*/ 19675, // Rule ID 3406 //
    8761             :       GIM_CheckFeatures, GIFBS_IsBE,
    8762             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8763             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8764             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8765             :       // (bitconvert:{ *:[v8f16] } FPR128:{ *:[v4f32] }:$src)  =>  (REV32v8i16:{ *:[v8f16] } FPR128:{ *:[v4f32] }:$src)
    8766             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v8i16,
    8767             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8768             :       // GIR_Coverage, 3406,
    8769             :       GIR_Done,
    8770             :     // Label 610: @19675
    8771             :     GIM_Try, /*On fail goto*//*Label 611*/ 19707, // Rule ID 3407 //
    8772             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    8773             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8774             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8775             :       // (bitconvert:{ *:[v8f16] } FPR128:{ *:[v8i16] }:$src)  =>  FPR128:{ *:[v8f16] }:$src
    8776             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8777             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8778             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8779             :       GIR_EraseFromParent, /*InsnID*/0,
    8780             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    8781             :       // GIR_Coverage, 3407,
    8782             :       GIR_Done,
    8783             :     // Label 611: @19707
    8784             :     GIM_Reject,
    8785             :     // Label 386: @19708
    8786             :     GIM_Try, /*On fail goto*//*Label 612*/ 19742, // Rule ID 3408 //
    8787             :       GIM_CheckFeatures, GIFBS_IsLE,
    8788             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
    8789             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8790             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8791             :       // (bitconvert:{ *:[v16i8] } FPR128:{ *:[f128] }:$src)  =>  FPR128:{ *:[v16i8] }:$src
    8792             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8793             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8794             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8795             :       GIR_EraseFromParent, /*InsnID*/0,
    8796             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    8797             :       // GIR_Coverage, 3408,
    8798             :       GIR_Done,
    8799             :     // Label 612: @19742
    8800             :     GIM_Try, /*On fail goto*//*Label 613*/ 19776, // Rule ID 3409 //
    8801             :       GIM_CheckFeatures, GIFBS_IsLE,
    8802             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8803             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8804             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8805             :       // (bitconvert:{ *:[v16i8] } FPR128:{ *:[v2i64] }:$src)  =>  FPR128:{ *:[v16i8] }:$src
    8806             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8807             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8808             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8809             :       GIR_EraseFromParent, /*InsnID*/0,
    8810             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    8811             :       // GIR_Coverage, 3409,
    8812             :       GIR_Done,
    8813             :     // Label 613: @19776
    8814             :     GIM_Try, /*On fail goto*//*Label 614*/ 19810, // Rule ID 3410 //
    8815             :       GIM_CheckFeatures, GIFBS_IsLE,
    8816             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8817             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8818             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8819             :       // (bitconvert:{ *:[v16i8] } FPR128:{ *:[v4i32] }:$src)  =>  FPR128:{ *:[v16i8] }:$src
    8820             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8821             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8822             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8823             :       GIR_EraseFromParent, /*InsnID*/0,
    8824             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    8825             :       // GIR_Coverage, 3410,
    8826             :       GIR_Done,
    8827             :     // Label 614: @19810
    8828             :     GIM_Try, /*On fail goto*//*Label 615*/ 19844, // Rule ID 3411 //
    8829             :       GIM_CheckFeatures, GIFBS_IsLE,
    8830             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    8831             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8832             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8833             :       // (bitconvert:{ *:[v16i8] } FPR128:{ *:[v8i16] }:$src)  =>  FPR128:{ *:[v16i8] }:$src
    8834             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8835             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8836             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8837             :       GIR_EraseFromParent, /*InsnID*/0,
    8838             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    8839             :       // GIR_Coverage, 3411,
    8840             :       GIR_Done,
    8841             :     // Label 615: @19844
    8842             :     GIM_Try, /*On fail goto*//*Label 616*/ 19878, // Rule ID 3412 //
    8843             :       GIM_CheckFeatures, GIFBS_IsLE,
    8844             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8845             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8846             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8847             :       // (bitconvert:{ *:[v16i8] } FPR128:{ *:[v2f64] }:$src)  =>  FPR128:{ *:[v16i8] }:$src
    8848             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8849             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8850             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8851             :       GIR_EraseFromParent, /*InsnID*/0,
    8852             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    8853             :       // GIR_Coverage, 3412,
    8854             :       GIR_Done,
    8855             :     // Label 616: @19878
    8856             :     GIM_Try, /*On fail goto*//*Label 617*/ 19912, // Rule ID 3413 //
    8857             :       GIM_CheckFeatures, GIFBS_IsLE,
    8858             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8859             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8860             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8861             :       // (bitconvert:{ *:[v16i8] } FPR128:{ *:[v4f32] }:$src)  =>  FPR128:{ *:[v16i8] }:$src
    8862             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8863             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8864             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8865             :       GIR_EraseFromParent, /*InsnID*/0,
    8866             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    8867             :       // GIR_Coverage, 3413,
    8868             :       GIR_Done,
    8869             :     // Label 617: @19912
    8870             :     GIM_Try, /*On fail goto*//*Label 618*/ 19946, // Rule ID 3414 //
    8871             :       GIM_CheckFeatures, GIFBS_IsLE,
    8872             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    8873             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8874             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8875             :       // (bitconvert:{ *:[v16i8] } FPR128:{ *:[v8f16] }:$src)  =>  FPR128:{ *:[v16i8] }:$src
    8876             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8877             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8878             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8879             :       GIR_EraseFromParent, /*InsnID*/0,
    8880             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/30,
    8881             :       // GIR_Coverage, 3414,
    8882             :       GIR_Done,
    8883             :     // Label 618: @19946
    8884             :     GIM_Try, /*On fail goto*//*Label 619*/ 20017, // Rule ID 3415 //
    8885             :       GIM_CheckFeatures, GIFBS_IsBE,
    8886             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
    8887             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8888             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8889             :       // (bitconvert:{ *:[v16i8] } FPR128:{ *:[f128] }:$src)  =>  (EXTv16i8:{ *:[v16i8] } (REV64v16i8:{ *:[f128] } FPR128:{ *:[f128] }:$src), (REV64v16i8:{ *:[f128] } FPR128:{ *:[f128] }:$src), 8:{ *:[i32] })
    8890             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s128,
    8891             :       GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s128,
    8892             :       GIR_BuildMI, /*InsnID*/2, /*Opcode*/AArch64::REV64v16i8,
    8893             :       GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
    8894             :       GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
    8895             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
    8896             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::REV64v16i8,
    8897             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    8898             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
    8899             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    8900             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EXTv16i8,
    8901             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8902             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    8903             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/1, /*TempRegFlags*/0,
    8904             :       GIR_AddImm, /*InsnID*/0, /*Imm*/8,
    8905             :       GIR_EraseFromParent, /*InsnID*/0,
    8906             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8907             :       // GIR_Coverage, 3415,
    8908             :       GIR_Done,
    8909             :     // Label 619: @20017
    8910             :     GIM_Try, /*On fail goto*//*Label 620*/ 20040, // Rule ID 3416 //
    8911             :       GIM_CheckFeatures, GIFBS_IsBE,
    8912             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8913             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8914             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8915             :       // (bitconvert:{ *:[v16i8] } FPR128:{ *:[v2i64] }:$src)  =>  (REV64v16i8:{ *:[v16i8] } FPR128:{ *:[v2i64] }:$src)
    8916             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v16i8,
    8917             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8918             :       // GIR_Coverage, 3416,
    8919             :       GIR_Done,
    8920             :     // Label 620: @20040
    8921             :     GIM_Try, /*On fail goto*//*Label 621*/ 20063, // Rule ID 3417 //
    8922             :       GIM_CheckFeatures, GIFBS_IsBE,
    8923             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8924             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8925             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8926             :       // (bitconvert:{ *:[v16i8] } FPR128:{ *:[v4i32] }:$src)  =>  (REV32v16i8:{ *:[v16i8] } FPR128:{ *:[v4i32] }:$src)
    8927             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v16i8,
    8928             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8929             :       // GIR_Coverage, 3417,
    8930             :       GIR_Done,
    8931             :     // Label 621: @20063
    8932             :     GIM_Try, /*On fail goto*//*Label 622*/ 20086, // Rule ID 3418 //
    8933             :       GIM_CheckFeatures, GIFBS_IsBE,
    8934             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    8935             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8936             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8937             :       // (bitconvert:{ *:[v16i8] } FPR128:{ *:[v8i16] }:$src)  =>  (REV16v16i8:{ *:[v16i8] } FPR128:{ *:[v8i16] }:$src)
    8938             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV16v16i8,
    8939             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8940             :       // GIR_Coverage, 3418,
    8941             :       GIR_Done,
    8942             :     // Label 622: @20086
    8943             :     GIM_Try, /*On fail goto*//*Label 623*/ 20109, // Rule ID 3419 //
    8944             :       GIM_CheckFeatures, GIFBS_IsBE,
    8945             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8946             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8947             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8948             :       // (bitconvert:{ *:[v16i8] } FPR128:{ *:[v2f64] }:$src)  =>  (REV64v16i8:{ *:[v16i8] } FPR128:{ *:[v2f64] }:$src)
    8949             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v16i8,
    8950             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8951             :       // GIR_Coverage, 3419,
    8952             :       GIR_Done,
    8953             :     // Label 623: @20109
    8954             :     GIM_Try, /*On fail goto*//*Label 624*/ 20132, // Rule ID 3420 //
    8955             :       GIM_CheckFeatures, GIFBS_IsBE,
    8956             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8957             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8958             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8959             :       // (bitconvert:{ *:[v16i8] } FPR128:{ *:[v4f32] }:$src)  =>  (REV32v16i8:{ *:[v16i8] } FPR128:{ *:[v4f32] }:$src)
    8960             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v16i8,
    8961             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8962             :       // GIR_Coverage, 3420,
    8963             :       GIR_Done,
    8964             :     // Label 624: @20132
    8965             :     GIM_Try, /*On fail goto*//*Label 625*/ 20155, // Rule ID 3421 //
    8966             :       GIM_CheckFeatures, GIFBS_IsBE,
    8967             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    8968             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8969             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8970             :       // (bitconvert:{ *:[v16i8] } FPR128:{ *:[v8f16] }:$src)  =>  (REV16v16i8:{ *:[v16i8] } FPR128:{ *:[v8f16] }:$src)
    8971             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV16v16i8,
    8972             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8973             :       // GIR_Coverage, 3421,
    8974             :       GIR_Done,
    8975             :     // Label 625: @20155
    8976             :     GIM_Reject,
    8977             :     // Label 387: @20156
    8978             :     GIM_Reject,
    8979             :     // Label 9: @20157
    8980             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/0, 11, /*)*//*default:*//*Label 637*/ 22212,
    8981             :     /*GILLT_s16*//*Label 626*/ 20174,
    8982             :     /*GILLT_s32*//*Label 627*/ 20255,
    8983             :     /*GILLT_s64*//*Label 628*/ 20740,
    8984             :     /*GILLT_s128*//*Label 629*/ 21084,
    8985             :     /*GILLT_v2s32*//*Label 630*/ 21196,
    8986             :     /*GILLT_v2s64*//*Label 631*/ 21360,
    8987             :     /*GILLT_v4s16*//*Label 632*/ 21524,
    8988             :     /*GILLT_v4s32*//*Label 633*/ 21688,
    8989             :     /*GILLT_v8s8*//*Label 634*/ 21852,
    8990             :     /*GILLT_v8s16*//*Label 635*/ 21950,
    8991             :     /*GILLT_v16s8*//*Label 636*/ 22114,
    8992             :     // Label 626: @20174
    8993             :     GIM_Try, /*On fail goto*//*Label 638*/ 20254,
    8994             :       GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    8995             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    8996             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR16RegClassID,
    8997             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    8998             :       GIM_Try, /*On fail goto*//*Label 639*/ 20222, // Rule ID 194 //
    8999             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed16,
    9000             :         // (ld:{ *:[f16] } (am_indexed16:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s2:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDRHui:{ *:[f16] } GPR64sp:{ *:[i64] }:$Rn, uimm12s2:{ *:[i64] }:$offset)
    9001             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRHui,
    9002             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9003             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9004             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9005             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9006             :         GIR_EraseFromParent, /*InsnID*/0,
    9007             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9008             :         // GIR_Coverage, 194,
    9009             :         GIR_Done,
    9010             :       // Label 639: @20222
    9011             :       GIM_Try, /*On fail goto*//*Label 640*/ 20253, // Rule ID 209 //
    9012             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled16,
    9013             :         // (ld:{ *:[f16] } (am_unscaled16:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDURHi:{ *:[f16] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] }):$offset)
    9014             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURHi,
    9015             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9016             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9017             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9018             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9019             :         GIR_EraseFromParent, /*InsnID*/0,
    9020             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9021             :         // GIR_Coverage, 209,
    9022             :         GIR_Done,
    9023             :       // Label 640: @20253
    9024             :       GIM_Reject,
    9025             :     // Label 638: @20254
    9026             :     GIM_Reject,
    9027             :     // Label 627: @20255
    9028             :     GIM_Try, /*On fail goto*//*Label 641*/ 20301, // Rule ID 192 //
    9029             :       GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    9030             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9031             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    9032             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9033             :       GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed32,
    9034             :       // (ld:{ *:[i32] } (am_indexed32:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s4:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDRWui:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, uimm12s4:{ *:[i64] }:$offset)
    9035             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRWui,
    9036             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9037             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9038             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9039             :       GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9040             :       GIR_EraseFromParent, /*InsnID*/0,
    9041             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9042             :       // GIR_Coverage, 192,
    9043             :       GIR_Done,
    9044             :     // Label 641: @20301
    9045             :     GIM_Try, /*On fail goto*//*Label 642*/ 20347, // Rule ID 195 //
    9046             :       GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    9047             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9048             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
    9049             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9050             :       GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed32,
    9051             :       // (ld:{ *:[f32] } (am_indexed32:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s4:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDRSui:{ *:[f32] } GPR64sp:{ *:[i64] }:$Rn, uimm12s4:{ *:[i64] }:$offset)
    9052             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRSui,
    9053             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9054             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9055             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9056             :       GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9057             :       GIR_EraseFromParent, /*InsnID*/0,
    9058             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9059             :       // GIR_Coverage, 195,
    9060             :       GIR_Done,
    9061             :     // Label 642: @20347
    9062             :     GIM_Try, /*On fail goto*//*Label 643*/ 20393, // Rule ID 207 //
    9063             :       GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    9064             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9065             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    9066             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9067             :       GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled32,
    9068             :       // (ld:{ *:[i32] } (am_unscaled32:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDURWi:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] }):$offset)
    9069             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURWi,
    9070             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9071             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9072             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9073             :       GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9074             :       GIR_EraseFromParent, /*InsnID*/0,
    9075             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9076             :       // GIR_Coverage, 207,
    9077             :       GIR_Done,
    9078             :     // Label 643: @20393
    9079             :     GIM_Try, /*On fail goto*//*Label 644*/ 20439, // Rule ID 210 //
    9080             :       GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    9081             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9082             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
    9083             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9084             :       GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled32,
    9085             :       // (ld:{ *:[f32] } (am_unscaled32:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDURSi:{ *:[f32] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] }):$offset)
    9086             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURSi,
    9087             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9088             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9089             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9090             :       GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9091             :       GIR_EraseFromParent, /*InsnID*/0,
    9092             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9093             :       // GIR_Coverage, 210,
    9094             :       GIR_Done,
    9095             :     // Label 644: @20439
    9096             :     GIM_Try, /*On fail goto*//*Label 645*/ 20489, // Rule ID 2040 //
    9097             :       GIM_CheckMemorySizeLessThanLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    9098             :       GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
    9099             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9100             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    9101             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9102             :       GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed16,
    9103             :       // (ld:{ *:[i32] } (am_indexed16:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s2:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi16>>  =>  (LDRHHui:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, uimm12s2:{ *:[i64] }:$offset)
    9104             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRHHui,
    9105             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9106             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9107             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9108             :       GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9109             :       GIR_EraseFromParent, /*InsnID*/0,
    9110             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9111             :       // GIR_Coverage, 2040,
    9112             :       GIR_Done,
    9113             :     // Label 645: @20489
    9114             :     GIM_Try, /*On fail goto*//*Label 646*/ 20539, // Rule ID 2041 //
    9115             :       GIM_CheckMemorySizeLessThanLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    9116             :       GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
    9117             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9118             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    9119             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9120             :       GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed8,
    9121             :       // (ld:{ *:[i32] } (am_indexed8:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s1:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi8>>  =>  (LDRBBui:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, uimm12s1:{ *:[i64] }:$offset)
    9122             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRBBui,
    9123             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9124             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9125             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9126             :       GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9127             :       GIR_EraseFromParent, /*InsnID*/0,
    9128             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9129             :       // GIR_Coverage, 2041,
    9130             :       GIR_Done,
    9131             :     // Label 646: @20539
    9132             :     GIM_Try, /*On fail goto*//*Label 647*/ 20589, // Rule ID 2042 //
    9133             :       GIM_CheckMemorySizeLessThanLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    9134             :       GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
    9135             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9136             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    9137             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9138             :       GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed8,
    9139             :       // (ld:{ *:[i32] } (am_indexed8:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s1:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi1>>  =>  (LDRBBui:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, uimm12s1:{ *:[i64] }:$offset)
    9140             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRBBui,
    9141             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9142             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9143             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9144             :       GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9145             :       GIR_EraseFromParent, /*InsnID*/0,
    9146             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9147             :       // GIR_Coverage, 2042,
    9148             :       GIR_Done,
    9149             :     // Label 647: @20589
    9150             :     GIM_Try, /*On fail goto*//*Label 648*/ 20639, // Rule ID 2062 //
    9151             :       GIM_CheckMemorySizeLessThanLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    9152             :       GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
    9153             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9154             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    9155             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9156             :       GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled16,
    9157             :       // (ld:{ *:[i32] } (am_unscaled16:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi16>>  =>  (LDURHHi:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset)
    9158             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURHHi,
    9159             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9160             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9161             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9162             :       GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9163             :       GIR_EraseFromParent, /*InsnID*/0,
    9164             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9165             :       // GIR_Coverage, 2062,
    9166             :       GIR_Done,
    9167             :     // Label 648: @20639
    9168             :     GIM_Try, /*On fail goto*//*Label 649*/ 20689, // Rule ID 2063 //
    9169             :       GIM_CheckMemorySizeLessThanLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    9170             :       GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
    9171             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9172             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    9173             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9174             :       GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled8,
    9175             :       // (ld:{ *:[i32] } (am_unscaled8:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi8>>  =>  (LDURBBi:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset)
    9176             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURBBi,
    9177             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9178             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9179             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9180             :       GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9181             :       GIR_EraseFromParent, /*InsnID*/0,
    9182             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9183             :       // GIR_Coverage, 2063,
    9184             :       GIR_Done,
    9185             :     // Label 649: @20689
    9186             :     GIM_Try, /*On fail goto*//*Label 650*/ 20739, // Rule ID 2064 //
    9187             :       GIM_CheckMemorySizeLessThanLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    9188             :       GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
    9189             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9190             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    9191             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9192             :       GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled8,
    9193             :       // (ld:{ *:[i32] } (am_unscaled8:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi1>>  =>  (LDURBBi:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset)
    9194             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURBBi,
    9195             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9196             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9197             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9198             :       GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9199             :       GIR_EraseFromParent, /*InsnID*/0,
    9200             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9201             :       // GIR_Coverage, 2064,
    9202             :       GIR_Done,
    9203             :     // Label 650: @20739
    9204             :     GIM_Reject,
    9205             :     // Label 628: @20740
    9206             :     GIM_Try, /*On fail goto*//*Label 651*/ 21083,
    9207             :       GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    9208             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9209             :       GIM_Try, /*On fail goto*//*Label 652*/ 20788, // Rule ID 191 //
    9210             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    9211             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9212             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed64,
    9213             :         // (ld:{ *:[i64] } (am_indexed64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDRXui:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset)
    9214             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRXui,
    9215             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9216             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9217             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9218             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9219             :         GIR_EraseFromParent, /*InsnID*/0,
    9220             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9221             :         // GIR_Coverage, 191,
    9222             :         GIR_Done,
    9223             :       // Label 652: @20788
    9224             :       GIM_Try, /*On fail goto*//*Label 653*/ 20827, // Rule ID 196 //
    9225             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    9226             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9227             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed64,
    9228             :         // (ld:{ *:[f64] } (am_indexed64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDRDui:{ *:[f64] } GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset)
    9229             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRDui,
    9230             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9231             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9232             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9233             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9234             :         GIR_EraseFromParent, /*InsnID*/0,
    9235             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9236             :         // GIR_Coverage, 196,
    9237             :         GIR_Done,
    9238             :       // Label 653: @20827
    9239             :       GIM_Try, /*On fail goto*//*Label 654*/ 20866, // Rule ID 206 //
    9240             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    9241             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9242             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled64,
    9243             :         // (ld:{ *:[i64] } (am_unscaled64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDURXi:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] }):$offset)
    9244             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURXi,
    9245             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9246             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9247             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9248             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9249             :         GIR_EraseFromParent, /*InsnID*/0,
    9250             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9251             :         // GIR_Coverage, 206,
    9252             :         GIR_Done,
    9253             :       // Label 654: @20866
    9254             :       GIM_Try, /*On fail goto*//*Label 655*/ 20905, // Rule ID 211 //
    9255             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    9256             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9257             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled64,
    9258             :         // (ld:{ *:[f64] } (am_unscaled64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDURDi:{ *:[f64] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] }):$offset)
    9259             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURDi,
    9260             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9261             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9262             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9263             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9264             :         GIR_EraseFromParent, /*InsnID*/0,
    9265             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9266             :         // GIR_Coverage, 211,
    9267             :         GIR_Done,
    9268             :       // Label 655: @20905
    9269             :       GIM_Try, /*On fail goto*//*Label 656*/ 20944, // Rule ID 2026 //
    9270             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    9271             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9272             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed64,
    9273             :         // (ld:{ *:[v1f64] } (am_indexed64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDRDui:{ *:[v1f64] } GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset)
    9274             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRDui,
    9275             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9276             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9277             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9278             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9279             :         GIR_EraseFromParent, /*InsnID*/0,
    9280             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9281             :         // GIR_Coverage, 2026,
    9282             :         GIR_Done,
    9283             :       // Label 656: @20944
    9284             :       GIM_Try, /*On fail goto*//*Label 657*/ 20983, // Rule ID 2027 //
    9285             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    9286             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9287             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed64,
    9288             :         // (ld:{ *:[v1i64] } (am_indexed64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDRDui:{ *:[v1i64] } GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset)
    9289             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRDui,
    9290             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9291             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9292             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*Rendere