LCOV - code coverage report
Current view: top level - build-llvm/lib/Target/AArch64 - AArch64GenGlobalISel.inc (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 25 203 12.3 %
Date: 2018-10-20 13:21:21 Functions: 3 8 37.5 %
Legend: Lines: hit not hit

          Line data    Source code
       1             : /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
       2             : |*                                                                            *|
       3             : |* Global Instruction Selector for the AArch64 target                         *|
       4             : |*                                                                            *|
       5             : |* Automatically generated file, do not edit!                                 *|
       6             : |*                                                                            *|
       7             : \*===----------------------------------------------------------------------===*/
       8             : 
       9             : #ifdef GET_GLOBALISEL_PREDICATE_BITSET
      10             : const unsigned MAX_SUBTARGET_PREDICATES = 18;
      11             : using PredicateBitset = llvm::PredicateBitsetImpl<MAX_SUBTARGET_PREDICATES>;
      12             : #endif // ifdef GET_GLOBALISEL_PREDICATE_BITSET
      13             : 
      14             : #ifdef GET_GLOBALISEL_TEMPORARIES_DECL
      15             :   mutable MatcherState State;
      16             :   typedef ComplexRendererFns(AArch64InstructionSelector::*ComplexMatcherMemFn)(MachineOperand &) const;
      17             :   typedef void(AArch64InstructionSelector::*CustomRendererFn)(MachineInstrBuilder &, const MachineInstr&) const;
      18             :   const ISelInfoTy<PredicateBitset, ComplexMatcherMemFn, CustomRendererFn> ISelInfo;
      19             :   static AArch64InstructionSelector::ComplexMatcherMemFn ComplexPredicateFns[];
      20             :   static AArch64InstructionSelector::CustomRendererFn CustomRenderers[];
      21             :   bool testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const override;
      22             :   bool testImmPredicate_APInt(unsigned PredicateID, const APInt &Imm) const override;
      23             :   bool testImmPredicate_APFloat(unsigned PredicateID, const APFloat &Imm) const override;
      24             :   const int64_t *getMatchTable() const override;
      25             :   bool testMIPredicate_MI(unsigned PredicateID, const MachineInstr &MI) const override;
      26             : #endif // ifdef GET_GLOBALISEL_TEMPORARIES_DECL
      27             : 
      28             : #ifdef GET_GLOBALISEL_TEMPORARIES_INIT
      29             : , State(1),
      30        1570 : ISelInfo(TypeObjects, NumTypeObjects, FeatureBitsets, ComplexPredicateFns, CustomRenderers)
      31             : #endif // ifdef GET_GLOBALISEL_TEMPORARIES_INIT
      32             : 
      33             : #ifdef GET_GLOBALISEL_IMPL
      34             : // Bits for subtarget features that participate in instruction matching.
      35             : enum SubtargetFeatureBits : uint8_t {
      36             :   Feature_HasFPARMv8Bit = 3,
      37             :   Feature_HasNEONBit = 4,
      38             :   Feature_HasSHA2Bit = 7,
      39             :   Feature_HasAESBit = 6,
      40             :   Feature_HasDotProdBit = 0,
      41             :   Feature_HasCRCBit = 1,
      42             :   Feature_HasLSEBit = 8,
      43             :   Feature_HasRDMBit = 5,
      44             :   Feature_HasPerfMonBit = 9,
      45             :   Feature_HasFullFP16Bit = 2,
      46             :   Feature_HasFuseAESBit = 14,
      47             :   Feature_IsLEBit = 10,
      48             :   Feature_IsBEBit = 15,
      49             :   Feature_UseAlternateSExtLoadCVTF32Bit = 13,
      50             :   Feature_NotForCodeSizeBit = 12,
      51             :   Feature_UseSTRQroBit = 11,
      52             :   Feature_UseBTIBit = 17,
      53             :   Feature_NotUseBTIBit = 16,
      54             : };
      55             : 
      56           0 : PredicateBitset AArch64InstructionSelector::
      57             : computeAvailableModuleFeatures(const AArch64Subtarget *Subtarget) const {
      58           0 :   PredicateBitset Features;
      59           0 :   if (Subtarget->hasFPARMv8())
      60           0 :     Features[Feature_HasFPARMv8Bit] = 1;
      61           0 :   if (Subtarget->hasNEON())
      62           0 :     Features[Feature_HasNEONBit] = 1;
      63           0 :   if (Subtarget->hasSHA2())
      64           0 :     Features[Feature_HasSHA2Bit] = 1;
      65           0 :   if (Subtarget->hasAES())
      66           0 :     Features[Feature_HasAESBit] = 1;
      67           0 :   if (Subtarget->hasDotProd())
      68           0 :     Features[Feature_HasDotProdBit] = 1;
      69           0 :   if (Subtarget->hasCRC())
      70           0 :     Features[Feature_HasCRCBit] = 1;
      71           0 :   if (Subtarget->hasLSE())
      72           0 :     Features[Feature_HasLSEBit] = 1;
      73           0 :   if (Subtarget->hasRDM())
      74           0 :     Features[Feature_HasRDMBit] = 1;
      75           0 :   if (Subtarget->hasPerfMon())
      76           0 :     Features[Feature_HasPerfMonBit] = 1;
      77           0 :   if (Subtarget->hasFullFP16())
      78           0 :     Features[Feature_HasFullFP16Bit] = 1;
      79           0 :   if (Subtarget->hasFuseAES())
      80           0 :     Features[Feature_HasFuseAESBit] = 1;
      81           0 :   if (Subtarget->isLittleEndian())
      82           0 :     Features[Feature_IsLEBit] = 1;
      83           0 :   if (!Subtarget->isLittleEndian())
      84           0 :     Features[Feature_IsBEBit] = 1;
      85           0 :   if (Subtarget->useAlternateSExtLoadCVTF32Pattern())
      86           0 :     Features[Feature_UseAlternateSExtLoadCVTF32Bit] = 1;
      87           0 :   return Features;
      88             : }
      89             : 
      90           0 : PredicateBitset AArch64InstructionSelector::
      91             : computeAvailableFunctionFeatures(const AArch64Subtarget *Subtarget, const MachineFunction *MF) const {
      92           0 :   PredicateBitset Features;
      93           0 :   if (!MF->getFunction().optForSize())
      94           0 :     Features[Feature_NotForCodeSizeBit] = 1;
      95           0 :   if (!Subtarget->isSTRQroSlow() || MF->getFunction().optForSize())
      96           0 :     Features[Feature_UseSTRQroBit] = 1;
      97           0 :   if ( MF->getFunction().hasFnAttribute("branch-target-enforcement") )
      98           0 :     Features[Feature_UseBTIBit] = 1;
      99           0 :   if ( !MF->getFunction().hasFnAttribute("branch-target-enforcement") )
     100           0 :     Features[Feature_NotUseBTIBit] = 1;
     101           0 :   return Features;
     102             : }
     103             : 
     104             : // LLT Objects.
     105             : enum {
     106             :   GILLT_s16,
     107             :   GILLT_s32,
     108             :   GILLT_s64,
     109             :   GILLT_s128,
     110             :   GILLT_v2s32,
     111             :   GILLT_v2s64,
     112             :   GILLT_v4s16,
     113             :   GILLT_v4s32,
     114             :   GILLT_v8s8,
     115             :   GILLT_v8s16,
     116             :   GILLT_v16s8,
     117             : };
     118             : const static size_t NumTypeObjects = 11;
     119             : const static LLT TypeObjects[] = {
     120             :   LLT::scalar(16),
     121             :   LLT::scalar(32),
     122             :   LLT::scalar(64),
     123             :   LLT::scalar(128),
     124             :   LLT::vector(2, 32),
     125             :   LLT::vector(2, 64),
     126             :   LLT::vector(4, 16),
     127             :   LLT::vector(4, 32),
     128             :   LLT::vector(8, 8),
     129             :   LLT::vector(8, 16),
     130             :   LLT::vector(16, 8),
     131             : };
     132             : 
     133             : // Feature bitsets.
     134             : enum {
     135             :   GIFBS_Invalid,
     136             :   GIFBS_HasAES,
     137             :   GIFBS_HasCRC,
     138             :   GIFBS_HasDotProd,
     139             :   GIFBS_HasFPARMv8,
     140             :   GIFBS_HasFullFP16,
     141             :   GIFBS_HasFuseAES,
     142             :   GIFBS_HasLSE,
     143             :   GIFBS_HasNEON,
     144             :   GIFBS_HasRDM,
     145             :   GIFBS_HasSHA2,
     146             :   GIFBS_IsBE,
     147             :   GIFBS_IsLE,
     148             :   GIFBS_HasFullFP16_HasNEON,
     149             :   GIFBS_HasNEON_HasRDM,
     150             : };
     151             : const static PredicateBitset FeatureBitsets[] {
     152             :   {}, // GIFBS_Invalid
     153             :   {Feature_HasAESBit, },
     154             :   {Feature_HasCRCBit, },
     155             :   {Feature_HasDotProdBit, },
     156             :   {Feature_HasFPARMv8Bit, },
     157             :   {Feature_HasFullFP16Bit, },
     158             :   {Feature_HasFuseAESBit, },
     159             :   {Feature_HasLSEBit, },
     160             :   {Feature_HasNEONBit, },
     161             :   {Feature_HasRDMBit, },
     162             :   {Feature_HasSHA2Bit, },
     163             :   {Feature_IsBEBit, },
     164             :   {Feature_IsLEBit, },
     165             :   {Feature_HasFullFP16Bit, Feature_HasNEONBit, },
     166             :   {Feature_HasNEONBit, Feature_HasRDMBit, },
     167             : };
     168             : 
     169             : // ComplexPattern predicates.
     170             : enum {
     171             :   GICP_Invalid,
     172             :   GICP_gi_addsub_shifted_imm32,
     173             :   GICP_gi_addsub_shifted_imm64,
     174             :   GICP_gi_am_indexed128,
     175             :   GICP_gi_am_indexed16,
     176             :   GICP_gi_am_indexed32,
     177             :   GICP_gi_am_indexed64,
     178             :   GICP_gi_am_indexed8,
     179             :   GICP_gi_am_unscaled128,
     180             :   GICP_gi_am_unscaled16,
     181             :   GICP_gi_am_unscaled32,
     182             :   GICP_gi_am_unscaled64,
     183             :   GICP_gi_am_unscaled8,
     184             : };
     185             : // See constructor for table contents
     186             : 
     187             : // PatFrag predicates.
     188             : enum {
     189             :   GIPFP_I64_Predicate_VectorIndex1 = GIPFP_I64_Invalid + 1,
     190             :   GIPFP_I64_Predicate_VectorIndexB,
     191             :   GIPFP_I64_Predicate_VectorIndexD,
     192             :   GIPFP_I64_Predicate_VectorIndexH,
     193             :   GIPFP_I64_Predicate_VectorIndexS,
     194             :   GIPFP_I64_Predicate_addsub_imm8_opt_lsl_i16,
     195             :   GIPFP_I64_Predicate_addsub_imm8_opt_lsl_i32,
     196             :   GIPFP_I64_Predicate_addsub_imm8_opt_lsl_i64,
     197             :   GIPFP_I64_Predicate_addsub_imm8_opt_lsl_i8,
     198             :   GIPFP_I64_Predicate_cpy_imm8_opt_lsl_i16,
     199             :   GIPFP_I64_Predicate_cpy_imm8_opt_lsl_i32,
     200             :   GIPFP_I64_Predicate_cpy_imm8_opt_lsl_i64,
     201             :   GIPFP_I64_Predicate_cpy_imm8_opt_lsl_i8,
     202             :   GIPFP_I64_Predicate_i64imm_32bit,
     203             :   GIPFP_I64_Predicate_imm0_1,
     204             :   GIPFP_I64_Predicate_imm0_127,
     205             :   GIPFP_I64_Predicate_imm0_15,
     206             :   GIPFP_I64_Predicate_imm0_255,
     207             :   GIPFP_I64_Predicate_imm0_31,
     208             :   GIPFP_I64_Predicate_imm0_63,
     209             :   GIPFP_I64_Predicate_imm0_65535,
     210             :   GIPFP_I64_Predicate_imm0_7,
     211             :   GIPFP_I64_Predicate_imm32_0_15,
     212             :   GIPFP_I64_Predicate_imm32_0_31,
     213             :   GIPFP_I64_Predicate_maski16_or_more,
     214             :   GIPFP_I64_Predicate_maski8_or_more,
     215             :   GIPFP_I64_Predicate_s64imm_32bit,
     216             :   GIPFP_I64_Predicate_simm4s1,
     217             :   GIPFP_I64_Predicate_simm4s16,
     218             :   GIPFP_I64_Predicate_simm4s2,
     219             :   GIPFP_I64_Predicate_simm4s3,
     220             :   GIPFP_I64_Predicate_simm4s4,
     221             :   GIPFP_I64_Predicate_simm5_32b,
     222             :   GIPFP_I64_Predicate_simm5_64b,
     223             :   GIPFP_I64_Predicate_simm6_32b,
     224             :   GIPFP_I64_Predicate_simm6s1,
     225             :   GIPFP_I64_Predicate_simm8,
     226             :   GIPFP_I64_Predicate_simm9,
     227             :   GIPFP_I64_Predicate_sve_elm_idx_extdup_b,
     228             :   GIPFP_I64_Predicate_sve_elm_idx_extdup_d,
     229             :   GIPFP_I64_Predicate_sve_elm_idx_extdup_h,
     230             :   GIPFP_I64_Predicate_sve_elm_idx_extdup_q,
     231             :   GIPFP_I64_Predicate_sve_elm_idx_extdup_s,
     232             :   GIPFP_I64_Predicate_sve_incdec_imm,
     233             :   GIPFP_I64_Predicate_sve_pred_enum,
     234             :   GIPFP_I64_Predicate_sve_prfop,
     235             :   GIPFP_I64_Predicate_tbz_imm0_31_diag,
     236             :   GIPFP_I64_Predicate_tbz_imm0_31_nodiag,
     237             :   GIPFP_I64_Predicate_tbz_imm32_63,
     238             :   GIPFP_I64_Predicate_uimm5s2,
     239             :   GIPFP_I64_Predicate_uimm5s4,
     240             :   GIPFP_I64_Predicate_uimm5s8,
     241             :   GIPFP_I64_Predicate_uimm6,
     242             :   GIPFP_I64_Predicate_uimm6s1,
     243             :   GIPFP_I64_Predicate_uimm6s16,
     244             :   GIPFP_I64_Predicate_uimm6s2,
     245             :   GIPFP_I64_Predicate_uimm6s4,
     246             :   GIPFP_I64_Predicate_uimm6s8,
     247             :   GIPFP_I64_Predicate_vecshiftL16,
     248             :   GIPFP_I64_Predicate_vecshiftL32,
     249             :   GIPFP_I64_Predicate_vecshiftL64,
     250             :   GIPFP_I64_Predicate_vecshiftL8,
     251             :   GIPFP_I64_Predicate_vecshiftR16,
     252             :   GIPFP_I64_Predicate_vecshiftR16Narrow,
     253             :   GIPFP_I64_Predicate_vecshiftR32,
     254             :   GIPFP_I64_Predicate_vecshiftR32Narrow,
     255             :   GIPFP_I64_Predicate_vecshiftR64,
     256             :   GIPFP_I64_Predicate_vecshiftR64Narrow,
     257             :   GIPFP_I64_Predicate_vecshiftR8,
     258             : };
     259           5 : bool AArch64InstructionSelector::testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const {
     260           5 :   switch (PredicateID) {
     261           0 :   case GIPFP_I64_Predicate_VectorIndex1: {
     262           0 :      return ((uint64_t)Imm) == 1; 
     263             :     llvm_unreachable("ImmediateCode should have returned");
     264             :     return false;
     265             :   }
     266           0 :   case GIPFP_I64_Predicate_VectorIndexB: {
     267           0 :      return ((uint64_t)Imm) < 16; 
     268             :     llvm_unreachable("ImmediateCode should have returned");
     269             :     return false;
     270             :   }
     271           0 :   case GIPFP_I64_Predicate_VectorIndexD: {
     272           0 :      return ((uint64_t)Imm) < 2; 
     273             :     llvm_unreachable("ImmediateCode should have returned");
     274             :     return false;
     275             :   }
     276           0 :   case GIPFP_I64_Predicate_VectorIndexH: {
     277           0 :      return ((uint64_t)Imm) < 8; 
     278             :     llvm_unreachable("ImmediateCode should have returned");
     279             :     return false;
     280             :   }
     281           0 :   case GIPFP_I64_Predicate_VectorIndexS: {
     282           0 :      return ((uint64_t)Imm) < 4; 
     283             :     llvm_unreachable("ImmediateCode should have returned");
     284             :     return false;
     285             :   }
     286             :   case GIPFP_I64_Predicate_addsub_imm8_opt_lsl_i16: {
     287             :     
     288             :   return AArch64_AM::isSVEAddSubImm<int16_t>(Imm);
     289             : 
     290             :     llvm_unreachable("ImmediateCode should have returned");
     291             :     return false;
     292             :   }
     293             :   case GIPFP_I64_Predicate_addsub_imm8_opt_lsl_i32: {
     294             :     
     295             :   return AArch64_AM::isSVEAddSubImm<int32_t>(Imm);
     296             : 
     297             :     llvm_unreachable("ImmediateCode should have returned");
     298             :     return false;
     299             :   }
     300             :   case GIPFP_I64_Predicate_addsub_imm8_opt_lsl_i64: {
     301             :     
     302             :   return AArch64_AM::isSVEAddSubImm<int64_t>(Imm);
     303             : 
     304             :     llvm_unreachable("ImmediateCode should have returned");
     305             :     return false;
     306             :   }
     307             :   case GIPFP_I64_Predicate_addsub_imm8_opt_lsl_i8: {
     308             :     
     309             :   return AArch64_AM::isSVEAddSubImm<int8_t>(Imm);
     310             : 
     311             :     llvm_unreachable("ImmediateCode should have returned");
     312             :     return false;
     313             :   }
     314             :   case GIPFP_I64_Predicate_cpy_imm8_opt_lsl_i16: {
     315             :     
     316             :   return AArch64_AM::isSVECpyImm<int16_t>(Imm);
     317             : 
     318             :     llvm_unreachable("ImmediateCode should have returned");
     319             :     return false;
     320             :   }
     321             :   case GIPFP_I64_Predicate_cpy_imm8_opt_lsl_i32: {
     322             :     
     323           0 :   return AArch64_AM::isSVECpyImm<int32_t>(Imm);
     324             : 
     325             :     llvm_unreachable("ImmediateCode should have returned");
     326             :     return false;
     327             :   }
     328             :   case GIPFP_I64_Predicate_cpy_imm8_opt_lsl_i64: {
     329             :     
     330           0 :   return AArch64_AM::isSVECpyImm<int64_t>(Imm);
     331             : 
     332             :     llvm_unreachable("ImmediateCode should have returned");
     333             :     return false;
     334             :   }
     335             :   case GIPFP_I64_Predicate_cpy_imm8_opt_lsl_i8: {
     336             :     
     337             :   return AArch64_AM::isSVECpyImm<int8_t>(Imm);
     338             : 
     339             :     llvm_unreachable("ImmediateCode should have returned");
     340             :     return false;
     341             :   }
     342           0 :   case GIPFP_I64_Predicate_i64imm_32bit: {
     343             :     
     344           0 :   return (Imm & 0xffffffffULL) == static_cast<uint64_t>(Imm);
     345             : 
     346             :     llvm_unreachable("ImmediateCode should have returned");
     347             :     return false;
     348             :   }
     349           0 :   case GIPFP_I64_Predicate_imm0_1: {
     350             :     
     351           0 :   return ((uint64_t)Imm) < 2;
     352             : 
     353             :     llvm_unreachable("ImmediateCode should have returned");
     354             :     return false;
     355             :   }
     356           1 :   case GIPFP_I64_Predicate_imm0_127: {
     357             :     
     358           1 :   return ((uint32_t)Imm) < 128;
     359             : 
     360             :     llvm_unreachable("ImmediateCode should have returned");
     361             :     return false;
     362             :   }
     363           0 :   case GIPFP_I64_Predicate_imm0_15: {
     364             :     
     365           0 :   return ((uint64_t)Imm) < 16;
     366             : 
     367             :     llvm_unreachable("ImmediateCode should have returned");
     368             :     return false;
     369             :   }
     370           0 :   case GIPFP_I64_Predicate_imm0_255: {
     371             :     
     372           0 :   return ((uint32_t)Imm) < 256;
     373             : 
     374             :     llvm_unreachable("ImmediateCode should have returned");
     375             :     return false;
     376             :   }
     377           0 :   case GIPFP_I64_Predicate_imm0_31: {
     378             :     
     379           0 :   return ((uint64_t)Imm) < 32;
     380             : 
     381             :     llvm_unreachable("ImmediateCode should have returned");
     382             :     return false;
     383             :   }
     384           2 :   case GIPFP_I64_Predicate_imm0_63: {
     385             :     
     386           2 :   return ((uint64_t)Imm) < 64;
     387             : 
     388             :     llvm_unreachable("ImmediateCode should have returned");
     389             :     return false;
     390             :   }
     391           0 :   case GIPFP_I64_Predicate_imm0_65535: {
     392             :     
     393           0 :   return ((uint32_t)Imm) < 65536;
     394             : 
     395             :     llvm_unreachable("ImmediateCode should have returned");
     396             :     return false;
     397             :   }
     398           0 :   case GIPFP_I64_Predicate_imm0_7: {
     399             :     
     400           0 :   return ((uint64_t)Imm) < 8;
     401             : 
     402             :     llvm_unreachable("ImmediateCode should have returned");
     403             :     return false;
     404             :   }
     405           0 :   case GIPFP_I64_Predicate_imm32_0_15: {
     406             :     
     407           0 :   return ((uint32_t)Imm) < 16;
     408             : 
     409             :     llvm_unreachable("ImmediateCode should have returned");
     410             :     return false;
     411             :   }
     412           0 :   case GIPFP_I64_Predicate_imm32_0_31: {
     413             :     
     414           0 :   return ((uint64_t)Imm) < 32;
     415             : 
     416             :     llvm_unreachable("ImmediateCode should have returned");
     417             :     return false;
     418             :   }
     419           0 :   case GIPFP_I64_Predicate_maski16_or_more: {
     420           0 :      return (Imm & 0xffff) == 0xffff; 
     421             :     llvm_unreachable("ImmediateCode should have returned");
     422             :     return false;
     423             :   }
     424           0 :   case GIPFP_I64_Predicate_maski8_or_more: {
     425           0 :      return (Imm & 0xff) == 0xff; 
     426             :     llvm_unreachable("ImmediateCode should have returned");
     427             :     return false;
     428             :   }
     429           1 :   case GIPFP_I64_Predicate_s64imm_32bit: {
     430             :     
     431             :   int64_t Imm64 = static_cast<int64_t>(Imm);
     432           1 :   return Imm64 >= std::numeric_limits<int32_t>::min() &&
     433           1 :          Imm64 <= std::numeric_limits<int32_t>::max();
     434             : 
     435             :     llvm_unreachable("ImmediateCode should have returned");
     436             :     return false;
     437             :   }
     438           0 :   case GIPFP_I64_Predicate_simm4s1: {
     439           0 :      return Imm >=-8  && Imm <= 7; 
     440             :     llvm_unreachable("ImmediateCode should have returned");
     441             :     return false;
     442             :   }
     443           0 :   case GIPFP_I64_Predicate_simm4s16: {
     444           0 :      return Imm >=-128  && Imm <= 112 && (Imm % 16) == 0x0; 
     445             :     llvm_unreachable("ImmediateCode should have returned");
     446             :     return false;
     447             :   }
     448           0 :   case GIPFP_I64_Predicate_simm4s2: {
     449           0 :      return Imm >=-16  && Imm <= 14 && (Imm % 2) == 0x0; 
     450             :     llvm_unreachable("ImmediateCode should have returned");
     451             :     return false;
     452             :   }
     453           0 :   case GIPFP_I64_Predicate_simm4s3: {
     454           0 :      return Imm >=-24  && Imm <= 21 && (Imm % 3) == 0x0; 
     455             :     llvm_unreachable("ImmediateCode should have returned");
     456             :     return false;
     457             :   }
     458           0 :   case GIPFP_I64_Predicate_simm4s4: {
     459           0 :      return Imm >=-32  && Imm <= 28 && (Imm % 4) == 0x0; 
     460             :     llvm_unreachable("ImmediateCode should have returned");
     461             :     return false;
     462             :   }
     463           0 :   case GIPFP_I64_Predicate_simm5_32b: {
     464           0 :      return Imm >= -16 && Imm < 16; 
     465             :     llvm_unreachable("ImmediateCode should have returned");
     466             :     return false;
     467             :   }
     468           0 :   case GIPFP_I64_Predicate_simm5_64b: {
     469           0 :      return Imm >= -16 && Imm < 16; 
     470             :     llvm_unreachable("ImmediateCode should have returned");
     471             :     return false;
     472             :   }
     473           0 :   case GIPFP_I64_Predicate_simm6_32b: {
     474           0 :      return Imm >= -32 && Imm < 32; 
     475             :     llvm_unreachable("ImmediateCode should have returned");
     476             :     return false;
     477             :   }
     478           0 :   case GIPFP_I64_Predicate_simm6s1: {
     479           0 :      return Imm >= -32 && Imm < 32; 
     480             :     llvm_unreachable("ImmediateCode should have returned");
     481             :     return false;
     482             :   }
     483           0 :   case GIPFP_I64_Predicate_simm8: {
     484           0 :      return Imm >= -128 && Imm < 127; 
     485             :     llvm_unreachable("ImmediateCode should have returned");
     486             :     return false;
     487             :   }
     488           0 :   case GIPFP_I64_Predicate_simm9: {
     489           0 :      return Imm >= -256 && Imm < 256; 
     490             :     llvm_unreachable("ImmediateCode should have returned");
     491             :     return false;
     492             :   }
     493           0 :   case GIPFP_I64_Predicate_sve_elm_idx_extdup_b: {
     494           0 :      return ((uint64_t)Imm) < 64; 
     495             :     llvm_unreachable("ImmediateCode should have returned");
     496             :     return false;
     497             :   }
     498           0 :   case GIPFP_I64_Predicate_sve_elm_idx_extdup_d: {
     499           0 :      return ((uint64_t)Imm) < 8; 
     500             :     llvm_unreachable("ImmediateCode should have returned");
     501             :     return false;
     502             :   }
     503           0 :   case GIPFP_I64_Predicate_sve_elm_idx_extdup_h: {
     504           0 :      return ((uint64_t)Imm) < 32; 
     505             :     llvm_unreachable("ImmediateCode should have returned");
     506             :     return false;
     507             :   }
     508           0 :   case GIPFP_I64_Predicate_sve_elm_idx_extdup_q: {
     509           0 :      return ((uint64_t)Imm) < 4; 
     510             :     llvm_unreachable("ImmediateCode should have returned");
     511             :     return false;
     512             :   }
     513           0 :   case GIPFP_I64_Predicate_sve_elm_idx_extdup_s: {
     514           0 :      return ((uint64_t)Imm) < 16; 
     515             :     llvm_unreachable("ImmediateCode should have returned");
     516             :     return false;
     517             :   }
     518           0 :   case GIPFP_I64_Predicate_sve_incdec_imm: {
     519             :     
     520           0 :   return (((uint32_t)Imm) > 0) && (((uint32_t)Imm) < 17);
     521             : 
     522             :     llvm_unreachable("ImmediateCode should have returned");
     523             :     return false;
     524             :   }
     525           0 :   case GIPFP_I64_Predicate_sve_pred_enum: {
     526             :     
     527           0 :   return (((uint32_t)Imm) < 32);
     528             :   
     529             :     llvm_unreachable("ImmediateCode should have returned");
     530             :     return false;
     531             :   }
     532           0 :   case GIPFP_I64_Predicate_sve_prfop: {
     533             :     
     534           0 :     return (((uint32_t)Imm) <= 15);
     535             :   
     536             :     llvm_unreachable("ImmediateCode should have returned");
     537             :     return false;
     538             :   }
     539           0 :   case GIPFP_I64_Predicate_tbz_imm0_31_diag: {
     540             :     
     541           0 :   return (((uint32_t)Imm) < 32);
     542             : 
     543             :     llvm_unreachable("ImmediateCode should have returned");
     544             :     return false;
     545             :   }
     546           0 :   case GIPFP_I64_Predicate_tbz_imm0_31_nodiag: {
     547             :     
     548           0 :   return (((uint32_t)Imm) < 32);
     549             : 
     550             :     llvm_unreachable("ImmediateCode should have returned");
     551             :     return false;
     552             :   }
     553           0 :   case GIPFP_I64_Predicate_tbz_imm32_63: {
     554             :     
     555           0 :   return (((uint32_t)Imm) > 31) && (((uint32_t)Imm) < 64);
     556             : 
     557             :     llvm_unreachable("ImmediateCode should have returned");
     558             :     return false;
     559             :   }
     560           0 :   case GIPFP_I64_Predicate_uimm5s2: {
     561           0 :      return Imm >= 0 && Imm < (32*2) && ((Imm % 2) == 0); 
     562             :     llvm_unreachable("ImmediateCode should have returned");
     563             :     return false;
     564             :   }
     565           0 :   case GIPFP_I64_Predicate_uimm5s4: {
     566           0 :      return Imm >= 0 && Imm < (32*4) && ((Imm % 4) == 0); 
     567             :     llvm_unreachable("ImmediateCode should have returned");
     568             :     return false;
     569             :   }
     570           0 :   case GIPFP_I64_Predicate_uimm5s8: {
     571           0 :      return Imm >= 0 && Imm < (32*8) && ((Imm % 8) == 0); 
     572             :     llvm_unreachable("ImmediateCode should have returned");
     573             :     return false;
     574             :   }
     575           0 :   case GIPFP_I64_Predicate_uimm6: {
     576           0 :      return Imm >= 0 && Imm < 64; 
     577             :     llvm_unreachable("ImmediateCode should have returned");
     578             :     return false;
     579             :   }
     580           0 :   case GIPFP_I64_Predicate_uimm6s1: {
     581           0 :      return Imm >= 0 && Imm < 64; 
     582             :     llvm_unreachable("ImmediateCode should have returned");
     583             :     return false;
     584             :   }
     585           0 :   case GIPFP_I64_Predicate_uimm6s16: {
     586           0 :      return Imm >= 0 && Imm < (64*16) && ((Imm % 16) == 0); 
     587             :     llvm_unreachable("ImmediateCode should have returned");
     588             :     return false;
     589             :   }
     590           0 :   case GIPFP_I64_Predicate_uimm6s2: {
     591           0 :      return Imm >= 0 && Imm < (64*2) && ((Imm % 2) == 0); 
     592             :     llvm_unreachable("ImmediateCode should have returned");
     593             :     return false;
     594             :   }
     595           0 :   case GIPFP_I64_Predicate_uimm6s4: {
     596           0 :      return Imm >= 0 && Imm < (64*4) && ((Imm % 4) == 0); 
     597             :     llvm_unreachable("ImmediateCode should have returned");
     598             :     return false;
     599             :   }
     600           0 :   case GIPFP_I64_Predicate_uimm6s8: {
     601           0 :      return Imm >= 0 && Imm < (64*8) && ((Imm % 8) == 0); 
     602             :     llvm_unreachable("ImmediateCode should have returned");
     603             :     return false;
     604             :   }
     605           0 :   case GIPFP_I64_Predicate_vecshiftL16: {
     606             :     
     607           0 :   return (((uint32_t)Imm) < 16);
     608             : 
     609             :     llvm_unreachable("ImmediateCode should have returned");
     610             :     return false;
     611             :   }
     612           0 :   case GIPFP_I64_Predicate_vecshiftL32: {
     613             :     
     614           0 :   return (((uint32_t)Imm) < 32);
     615             : 
     616             :     llvm_unreachable("ImmediateCode should have returned");
     617             :     return false;
     618             :   }
     619           0 :   case GIPFP_I64_Predicate_vecshiftL64: {
     620             :     
     621           0 :   return (((uint32_t)Imm) < 64);
     622             : 
     623             :     llvm_unreachable("ImmediateCode should have returned");
     624             :     return false;
     625             :   }
     626           0 :   case GIPFP_I64_Predicate_vecshiftL8: {
     627             :     
     628           0 :   return (((uint32_t)Imm) < 8);
     629             : 
     630             :     llvm_unreachable("ImmediateCode should have returned");
     631             :     return false;
     632             :   }
     633           0 :   case GIPFP_I64_Predicate_vecshiftR16: {
     634             :     
     635           0 :   return (((uint32_t)Imm) > 0) && (((uint32_t)Imm) < 17);
     636             : 
     637             :     llvm_unreachable("ImmediateCode should have returned");
     638             :     return false;
     639             :   }
     640           0 :   case GIPFP_I64_Predicate_vecshiftR16Narrow: {
     641             :     
     642           0 :   return (((uint32_t)Imm) > 0) && (((uint32_t)Imm) < 9);
     643             : 
     644             :     llvm_unreachable("ImmediateCode should have returned");
     645             :     return false;
     646             :   }
     647           0 :   case GIPFP_I64_Predicate_vecshiftR32: {
     648             :     
     649           0 :   return (((uint32_t)Imm) > 0) && (((uint32_t)Imm) < 33);
     650             : 
     651             :     llvm_unreachable("ImmediateCode should have returned");
     652             :     return false;
     653             :   }
     654           0 :   case GIPFP_I64_Predicate_vecshiftR32Narrow: {
     655             :     
     656           0 :   return (((uint32_t)Imm) > 0) && (((uint32_t)Imm) < 17);
     657             : 
     658             :     llvm_unreachable("ImmediateCode should have returned");
     659             :     return false;
     660             :   }
     661           1 :   case GIPFP_I64_Predicate_vecshiftR64: {
     662             :     
     663           1 :   return (((uint32_t)Imm) > 0) && (((uint32_t)Imm) < 65);
     664             : 
     665             :     llvm_unreachable("ImmediateCode should have returned");
     666             :     return false;
     667             :   }
     668           0 :   case GIPFP_I64_Predicate_vecshiftR64Narrow: {
     669             :     
     670           0 :   return (((uint32_t)Imm) > 0) && (((uint32_t)Imm) < 33);
     671             : 
     672             :     llvm_unreachable("ImmediateCode should have returned");
     673             :     return false;
     674             :   }
     675           0 :   case GIPFP_I64_Predicate_vecshiftR8: {
     676             :     
     677           0 :   return (((uint32_t)Imm) > 0) && (((uint32_t)Imm) < 9);
     678             : 
     679             :     llvm_unreachable("ImmediateCode should have returned");
     680             :     return false;
     681             :   }
     682             :   }
     683           0 :   llvm_unreachable("Unknown predicate");
     684             :   return false;
     685             : }
     686             : // PatFrag predicates.
     687             : enum {
     688             :   GIPFP_APFloat_Predicate_fpimm0 = GIPFP_APFloat_Invalid + 1,
     689             :   GIPFP_APFloat_Predicate_fpimm16,
     690             :   GIPFP_APFloat_Predicate_fpimm32,
     691             :   GIPFP_APFloat_Predicate_fpimm64,
     692             :   GIPFP_APFloat_Predicate_simdimmtype10,
     693             : };
     694          30 : bool AArch64InstructionSelector::testImmPredicate_APFloat(unsigned PredicateID, const APFloat & Imm) const {
     695          30 :   switch (PredicateID) {
     696          30 :   case GIPFP_APFloat_Predicate_fpimm0: {
     697             :     
     698          30 :   return Imm.isExactlyValue(+0.0);
     699             : 
     700             :     llvm_unreachable("ImmediateCode should have returned");
     701             :     return false;
     702             :   }
     703           0 :   case GIPFP_APFloat_Predicate_fpimm16: {
     704             :     
     705           0 :       return AArch64_AM::getFP16Imm(Imm) != -1;
     706             :     
     707             :     llvm_unreachable("ImmediateCode should have returned");
     708             :     return false;
     709             :   }
     710           0 :   case GIPFP_APFloat_Predicate_fpimm32: {
     711             :     
     712           0 :       return AArch64_AM::getFP32Imm(Imm) != -1;
     713             :     
     714             :     llvm_unreachable("ImmediateCode should have returned");
     715             :     return false;
     716             :   }
     717           0 :   case GIPFP_APFloat_Predicate_fpimm64: {
     718             :     
     719           0 :       return AArch64_AM::getFP64Imm(Imm) != -1;
     720             :     
     721             :     llvm_unreachable("ImmediateCode should have returned");
     722             :     return false;
     723             :   }
     724           0 :   case GIPFP_APFloat_Predicate_simdimmtype10: {
     725             :     
     726           0 :       return AArch64_AM::isAdvSIMDModImmType10(
     727           0 :                  Imm.bitcastToAPInt().getZExtValue());
     728             :     
     729             :     llvm_unreachable("ImmediateCode should have returned");
     730             :     return false;
     731             :   }
     732             :   }
     733           0 :   llvm_unreachable("Unknown predicate");
     734             :   return false;
     735             : }
     736             : // PatFrag predicates.
     737             : enum {
     738             :   GIPFP_APInt_Predicate_logical_imm32 = GIPFP_APInt_Invalid + 1,
     739             :   GIPFP_APInt_Predicate_logical_imm64,
     740             : };
     741           0 : bool AArch64InstructionSelector::testImmPredicate_APInt(unsigned PredicateID, const APInt & Imm) const {
     742           0 :   switch (PredicateID) {
     743             :   case GIPFP_APInt_Predicate_logical_imm32: {
     744             :     
     745           0 :   return AArch64_AM::isLogicalImmediate(Imm.getZExtValue(), 32);
     746             : 
     747             :     llvm_unreachable("ImmediateCode should have returned");
     748             :     return false;
     749             :   }
     750             :   case GIPFP_APInt_Predicate_logical_imm64: {
     751             :     
     752           0 :   return AArch64_AM::isLogicalImmediate(Imm.getZExtValue(), 64);
     753             : 
     754             :     llvm_unreachable("ImmediateCode should have returned");
     755             :     return false;
     756             :   }
     757             :   }
     758           0 :   llvm_unreachable("Unknown predicate");
     759             :   return false;
     760             : }
     761           0 : bool AArch64InstructionSelector::testMIPredicate_MI(unsigned PredicateID, const MachineInstr & MI) const {
     762             :   const MachineFunction &MF = *MI.getParent()->getParent();
     763             :   const MachineRegisterInfo &MRI = MF.getRegInfo();
     764             :   (void)MRI;
     765           0 :   llvm_unreachable("Unknown predicate");
     766             :   return false;
     767             : }
     768             : 
     769             : AArch64InstructionSelector::ComplexMatcherMemFn
     770             : AArch64InstructionSelector::ComplexPredicateFns[] = {
     771             :   nullptr, // GICP_Invalid
     772             :   &AArch64InstructionSelector::selectArithImmed, // gi_addsub_shifted_imm32
     773             :   &AArch64InstructionSelector::selectArithImmed, // gi_addsub_shifted_imm64
     774             :   &AArch64InstructionSelector::selectAddrModeIndexed<128>, // gi_am_indexed128
     775             :   &AArch64InstructionSelector::selectAddrModeIndexed<16>, // gi_am_indexed16
     776             :   &AArch64InstructionSelector::selectAddrModeIndexed<32>, // gi_am_indexed32
     777             :   &AArch64InstructionSelector::selectAddrModeIndexed<64>, // gi_am_indexed64
     778             :   &AArch64InstructionSelector::selectAddrModeIndexed<8>, // gi_am_indexed8
     779             :   &AArch64InstructionSelector::selectAddrModeUnscaled128, // gi_am_unscaled128
     780             :   &AArch64InstructionSelector::selectAddrModeUnscaled16, // gi_am_unscaled16
     781             :   &AArch64InstructionSelector::selectAddrModeUnscaled32, // gi_am_unscaled32
     782             :   &AArch64InstructionSelector::selectAddrModeUnscaled64, // gi_am_unscaled64
     783             :   &AArch64InstructionSelector::selectAddrModeUnscaled8, // gi_am_unscaled8
     784             : };
     785             : 
     786             : // Custom renderers.
     787             : enum {
     788             :   GICR_Invalid,
     789             :   GICR_renderTruncImm, 
     790             : };
     791             : AArch64InstructionSelector::CustomRendererFn
     792             : AArch64InstructionSelector::CustomRenderers[] = {
     793             :   nullptr, // GICP_Invalid
     794             :   &AArch64InstructionSelector::renderTruncImm, // gi_trunc_imm
     795             : };
     796             : 
     797        1082 : bool AArch64InstructionSelector::selectImpl(MachineInstr &I, CodeGenCoverage &CoverageInfo) const {
     798        1082 :   MachineFunction &MF = *I.getParent()->getParent();
     799        1082 :   MachineRegisterInfo &MRI = MF.getRegInfo();
     800             :   // FIXME: This should be computed on a per-function basis rather than per-insn.
     801        1082 :   AvailableFunctionFeatures = computeAvailableFunctionFeatures(&STI, &MF);
     802        1082 :   const PredicateBitset AvailableFeatures = getAvailableFeatures();
     803             :   NewMIVector OutMIs;
     804             :   State.MIs.clear();
     805        1082 :   State.MIs.push_back(&I);
     806             : 
     807        1082 :   if (executeMatchTable(*this, OutMIs, State, ISelInfo, getMatchTable(), TII, MRI, TRI, RBI, AvailableFeatures, CoverageInfo)) {
     808         691 :     return true;
     809             :   }
     810             : 
     811             :   return false;
     812             : }
     813             : 
     814           0 : const int64_t *AArch64InstructionSelector::getMatchTable() const {
     815             :   constexpr static int64_t MatchTable0[] = {
     816             :     GIM_SwitchOpcode, /*MI*/0, /*[*/34, 135, /*)*//*default:*//*Label 52*/ 78305,
     817             :     /*TargetOpcode::G_ADD*//*Label 0*/ 106,
     818             :     /*TargetOpcode::G_SUB*//*Label 1*/ 7381,
     819             :     /*TargetOpcode::G_MUL*//*Label 2*/ 9962,
     820             :     /*TargetOpcode::G_SDIV*//*Label 3*/ 10743,
     821             :     /*TargetOpcode::G_UDIV*//*Label 4*/ 10812, 0, 0,
     822             :     /*TargetOpcode::G_AND*//*Label 5*/ 10881,
     823             :     /*TargetOpcode::G_OR*//*Label 6*/ 11423,
     824             :     /*TargetOpcode::G_XOR*//*Label 7*/ 11965, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
     825             :     /*TargetOpcode::G_BITCAST*//*Label 8*/ 12675, 0, 0,
     826             :     /*TargetOpcode::G_LOAD*//*Label 9*/ 20168,
     827             :     /*TargetOpcode::G_SEXTLOAD*//*Label 10*/ 22224,
     828             :     /*TargetOpcode::G_ZEXTLOAD*//*Label 11*/ 22695,
     829             :     /*TargetOpcode::G_STORE*//*Label 12*/ 23047, 0,
     830             :     /*TargetOpcode::G_ATOMIC_CMPXCHG*//*Label 13*/ 24946,
     831             :     /*TargetOpcode::G_ATOMICRMW_XCHG*//*Label 14*/ 26143,
     832             :     /*TargetOpcode::G_ATOMICRMW_ADD*//*Label 15*/ 27172,
     833             :     /*TargetOpcode::G_ATOMICRMW_SUB*//*Label 16*/ 28201,
     834             :     /*TargetOpcode::G_ATOMICRMW_AND*//*Label 17*/ 29610, 0,
     835             :     /*TargetOpcode::G_ATOMICRMW_OR*//*Label 18*/ 31019,
     836             :     /*TargetOpcode::G_ATOMICRMW_XOR*//*Label 19*/ 32048,
     837             :     /*TargetOpcode::G_ATOMICRMW_MAX*//*Label 20*/ 33077,
     838             :     /*TargetOpcode::G_ATOMICRMW_MIN*//*Label 21*/ 34106,
     839             :     /*TargetOpcode::G_ATOMICRMW_UMAX*//*Label 22*/ 35135,
     840             :     /*TargetOpcode::G_ATOMICRMW_UMIN*//*Label 23*/ 36164, 0, 0,
     841             :     /*TargetOpcode::G_INTRINSIC*//*Label 24*/ 37193,
     842             :     /*TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS*//*Label 25*/ 71124,
     843             :     /*TargetOpcode::G_ANYEXT*//*Label 26*/ 71304,
     844             :     /*TargetOpcode::G_TRUNC*//*Label 27*/ 71418,
     845             :     /*TargetOpcode::G_CONSTANT*//*Label 28*/ 71543,
     846             :     /*TargetOpcode::G_FCONSTANT*//*Label 29*/ 71596, 0, 0,
     847             :     /*TargetOpcode::G_SEXT*//*Label 30*/ 71674,
     848             :     /*TargetOpcode::G_ZEXT*//*Label 31*/ 71788,
     849             :     /*TargetOpcode::G_SHL*//*Label 32*/ 72247,
     850             :     /*TargetOpcode::G_LSHR*//*Label 33*/ 72423,
     851             :     /*TargetOpcode::G_ASHR*//*Label 34*/ 72674, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
     852             :     /*TargetOpcode::G_FADD*//*Label 35*/ 72925,
     853             :     /*TargetOpcode::G_FSUB*//*Label 36*/ 73198,
     854             :     /*TargetOpcode::G_FMUL*//*Label 37*/ 73471,
     855             :     /*TargetOpcode::G_FMA*//*Label 38*/ 73744,
     856             :     /*TargetOpcode::G_FDIV*//*Label 39*/ 75268, 0, 0, 0, 0, 0, 0,
     857             :     /*TargetOpcode::G_FNEG*//*Label 40*/ 75541,
     858             :     /*TargetOpcode::G_FPEXT*//*Label 41*/ 76089,
     859             :     /*TargetOpcode::G_FPTRUNC*//*Label 42*/ 76218,
     860             :     /*TargetOpcode::G_FPTOSI*//*Label 43*/ 76347,
     861             :     /*TargetOpcode::G_FPTOUI*//*Label 44*/ 76623,
     862             :     /*TargetOpcode::G_SITOFP*//*Label 45*/ 76899,
     863             :     /*TargetOpcode::G_UITOFP*//*Label 46*/ 77177, 0, 0, 0,
     864             :     /*TargetOpcode::G_BR*//*Label 47*/ 77455, 0, 0, 0,
     865             :     /*TargetOpcode::G_CTTZ*//*Label 48*/ 77468, 0,
     866             :     /*TargetOpcode::G_CTLZ*//*Label 49*/ 77571, 0,
     867             :     /*TargetOpcode::G_CTPOP*//*Label 50*/ 78194,
     868             :     /*TargetOpcode::G_BSWAP*//*Label 51*/ 78252,
     869             :     // Label 0: @106
     870             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 11, /*)*//*default:*//*Label 62*/ 7380,
     871             :     /*GILLT_s32*//*Label 53*/ 122,
     872             :     /*GILLT_s64*//*Label 54*/ 223, 0,
     873             :     /*GILLT_v2s32*//*Label 55*/ 1295,
     874             :     /*GILLT_v2s64*//*Label 56*/ 1908,
     875             :     /*GILLT_v4s16*//*Label 57*/ 3011,
     876             :     /*GILLT_v4s32*//*Label 58*/ 3624,
     877             :     /*GILLT_v8s8*//*Label 59*/ 5097,
     878             :     /*GILLT_v8s16*//*Label 60*/ 5502,
     879             :     /*GILLT_v16s8*//*Label 61*/ 6975,
     880             :     // Label 53: @122
     881             :     GIM_Try, /*On fail goto*//*Label 63*/ 222,
     882             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
     883             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
     884             :       GIM_Try, /*On fail goto*//*Label 64*/ 166, // Rule ID 3788 //
     885             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32spRegClassID,
     886             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32spRegClassID,
     887             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_addsub_shifted_imm32,
     888             :         // (add:{ *:[i32] } addsub_shifted_imm32:{ *:[i32] }:$imm, GPR32sp:{ *:[i32] }:$Rn)  =>  (ADDWri:{ *:[i32] } GPR32sp:{ *:[i32] }:$Rn, addsub_shifted_imm32:{ *:[i32] }:$imm)
     889             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ADDWri,
     890             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
     891             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
     892             :         GIR_ComplexRenderer, /*InsnID*/0, /*RendererID*/0, // imm
     893             :         GIR_EraseFromParent, /*InsnID*/0,
     894             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     895             :         // GIR_Coverage, 3788,
     896             :         GIR_Done,
     897             :       // Label 64: @166
     898             :       GIM_Try, /*On fail goto*//*Label 65*/ 200, // Rule ID 33 //
     899             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32spRegClassID,
     900             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32spRegClassID,
     901             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/2, /*Renderer*/0, GICP_gi_addsub_shifted_imm32,
     902             :         // (add:{ *:[i32] } GPR32sp:{ *:[i32] }:$Rn, addsub_shifted_imm32:{ *:[i32] }:$imm)  =>  (ADDWri:{ *:[i32] } GPR32sp:{ *:[i32] }:$Rn, addsub_shifted_imm32:{ *:[i32] }:$imm)
     903             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ADDWri,
     904             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
     905             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
     906             :         GIR_ComplexRenderer, /*InsnID*/0, /*RendererID*/0, // imm
     907             :         GIR_EraseFromParent, /*InsnID*/0,
     908             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     909             :         // GIR_Coverage, 33,
     910             :         GIR_Done,
     911             :       // Label 65: @200
     912             :       GIM_Try, /*On fail goto*//*Label 66*/ 221, // Rule ID 35 //
     913             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
     914             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
     915             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
     916             :         // (add:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)  =>  (ADDWrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
     917             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ADDWrr,
     918             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     919             :         // GIR_Coverage, 35,
     920             :         GIR_Done,
     921             :       // Label 66: @221
     922             :       GIM_Reject,
     923             :     // Label 63: @222
     924             :     GIM_Reject,
     925             :     // Label 54: @223
     926             :     GIM_Try, /*On fail goto*//*Label 67*/ 1294,
     927             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
     928             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
     929             :       GIM_Try, /*On fail goto*//*Label 68*/ 267, // Rule ID 3789 //
     930             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64spRegClassID,
     931             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64spRegClassID,
     932             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_addsub_shifted_imm64,
     933             :         // (add:{ *:[i64] } addsub_shifted_imm64:{ *:[i64] }:$imm, GPR64sp:{ *:[i64] }:$Rn)  =>  (ADDXri:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, addsub_shifted_imm64:{ *:[i64] }:$imm)
     934             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ADDXri,
     935             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
     936             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
     937             :         GIR_ComplexRenderer, /*InsnID*/0, /*RendererID*/0, // imm
     938             :         GIR_EraseFromParent, /*InsnID*/0,
     939             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     940             :         // GIR_Coverage, 3789,
     941             :         GIR_Done,
     942             :       // Label 68: @267
     943             :       GIM_Try, /*On fail goto*//*Label 69*/ 363, // Rule ID 1893 //
     944             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
     945             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
     946             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
     947             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
     948             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
     949             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
     950             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
     951             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
     952             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
     953             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
     954             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_CONSTANT,
     955             :         GIM_CheckI64ImmPredicate, /*MI*/3, /*Predicate*/GIPFP_I64_Predicate_s64imm_32bit,
     956             :         // MIs[3] Operand 1
     957             :         // No operand predicates
     958             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
     959             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
     960             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
     961             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
     962             :         // (add:{ *:[i64] } (mul:{ *:[i64] } (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (imm:{ *:[i64] })<<P:Predicate_s64imm_32bit>>:$C), GPR64:{ *:[i64] }:$Ra)  =>  (SMADDLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, (MOVi32imm:{ *:[i32] } (trunc_imm:{ *:[i32] } (imm:{ *:[i64] }):$C)), GPR64:{ *:[i64] }:$Ra)
     963             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
     964             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::MOVi32imm,
     965             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
     966             :         GIR_CustomRenderer, /*InsnID*/1, /*OldInsnID*/3, /*Renderer*/GICR_renderTruncImm, // C
     967             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
     968             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMADDLrrr,
     969             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
     970             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
     971             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
     972             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Ra
     973             :         GIR_EraseFromParent, /*InsnID*/0,
     974             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     975             :         // GIR_Coverage, 1893,
     976             :         GIR_Done,
     977             :       // Label 69: @363
     978             :       GIM_Try, /*On fail goto*//*Label 70*/ 459, // Rule ID 1894 //
     979             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
     980             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
     981             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
     982             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
     983             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
     984             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
     985             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
     986             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
     987             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
     988             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
     989             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_CONSTANT,
     990             :         GIM_CheckI64ImmPredicate, /*MI*/3, /*Predicate*/GIPFP_I64_Predicate_i64imm_32bit,
     991             :         // MIs[3] Operand 1
     992             :         // No operand predicates
     993             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
     994             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
     995             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
     996             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
     997             :         // (add:{ *:[i64] } (mul:{ *:[i64] } (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (imm:{ *:[i64] })<<P:Predicate_i64imm_32bit>>:$C), GPR64:{ *:[i64] }:$Ra)  =>  (UMADDLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, (MOVi32imm:{ *:[i32] } (trunc_imm:{ *:[i32] } (imm:{ *:[i64] }):$C)), GPR64:{ *:[i64] }:$Ra)
     998             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
     999             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::MOVi32imm,
    1000             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    1001             :         GIR_CustomRenderer, /*InsnID*/1, /*OldInsnID*/3, /*Renderer*/GICR_renderTruncImm, // C
    1002             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    1003             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMADDLrrr,
    1004             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1005             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    1006             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    1007             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Ra
    1008             :         GIR_EraseFromParent, /*InsnID*/0,
    1009             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1010             :         // GIR_Coverage, 1894,
    1011             :         GIR_Done,
    1012             :       // Label 70: @459
    1013             :       GIM_Try, /*On fail goto*//*Label 71*/ 493, // Rule ID 34 //
    1014             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64spRegClassID,
    1015             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
    1016             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/2, /*Renderer*/0, GICP_gi_addsub_shifted_imm64,
    1017             :         // (add:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, addsub_shifted_imm64:{ *:[i64] }:$imm)  =>  (ADDXri:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, addsub_shifted_imm64:{ *:[i64] }:$imm)
    1018             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ADDXri,
    1019             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1020             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    1021             :         GIR_ComplexRenderer, /*InsnID*/0, /*RendererID*/0, // imm
    1022             :         GIR_EraseFromParent, /*InsnID*/0,
    1023             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1024             :         // GIR_Coverage, 34,
    1025             :         GIR_Done,
    1026             :       // Label 71: @493
    1027             :       GIM_Try, /*On fail goto*//*Label 72*/ 589, // Rule ID 4040 //
    1028             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    1029             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    1030             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1031             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    1032             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    1033             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    1034             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    1035             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
    1036             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    1037             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    1038             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
    1039             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_CONSTANT,
    1040             :         GIM_CheckI64ImmPredicate, /*MI*/3, /*Predicate*/GIPFP_I64_Predicate_s64imm_32bit,
    1041             :         // MIs[3] Operand 1
    1042             :         // No operand predicates
    1043             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1044             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    1045             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
    1046             :         // (add:{ *:[i64] } GPR64:{ *:[i64] }:$Ra, (mul:{ *:[i64] } (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (imm:{ *:[i64] })<<P:Predicate_s64imm_32bit>>:$C))  =>  (SMADDLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, (MOVi32imm:{ *:[i32] } (trunc_imm:{ *:[i32] } (imm:{ *:[i64] }):$C)), GPR64:{ *:[i64] }:$Ra)
    1047             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
    1048             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::MOVi32imm,
    1049             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    1050             :         GIR_CustomRenderer, /*InsnID*/1, /*OldInsnID*/3, /*Renderer*/GICR_renderTruncImm, // C
    1051             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    1052             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMADDLrrr,
    1053             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1054             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    1055             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    1056             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Ra
    1057             :         GIR_EraseFromParent, /*InsnID*/0,
    1058             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1059             :         // GIR_Coverage, 4040,
    1060             :         GIR_Done,
    1061             :       // Label 72: @589
    1062             :       GIM_Try, /*On fail goto*//*Label 73*/ 685, // Rule ID 4041 //
    1063             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    1064             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    1065             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1066             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    1067             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    1068             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    1069             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    1070             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
    1071             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    1072             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    1073             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
    1074             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_CONSTANT,
    1075             :         GIM_CheckI64ImmPredicate, /*MI*/3, /*Predicate*/GIPFP_I64_Predicate_i64imm_32bit,
    1076             :         // MIs[3] Operand 1
    1077             :         // No operand predicates
    1078             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1079             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    1080             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
    1081             :         // (add:{ *:[i64] } GPR64:{ *:[i64] }:$Ra, (mul:{ *:[i64] } (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (imm:{ *:[i64] })<<P:Predicate_i64imm_32bit>>:$C))  =>  (UMADDLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, (MOVi32imm:{ *:[i32] } (trunc_imm:{ *:[i32] } (imm:{ *:[i64] }):$C)), GPR64:{ *:[i64] }:$Ra)
    1082             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
    1083             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::MOVi32imm,
    1084             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    1085             :         GIR_CustomRenderer, /*InsnID*/1, /*OldInsnID*/3, /*Renderer*/GICR_renderTruncImm, // C
    1086             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    1087             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMADDLrrr,
    1088             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1089             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    1090             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    1091             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Ra
    1092             :         GIR_EraseFromParent, /*InsnID*/0,
    1093             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1094             :         // GIR_Coverage, 4041,
    1095             :         GIR_Done,
    1096             :       // Label 73: @685
    1097             :       GIM_Try, /*On fail goto*//*Label 74*/ 770, // Rule ID 3800 //
    1098             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    1099             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1100             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    1101             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    1102             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    1103             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    1104             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
    1105             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    1106             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    1107             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
    1108             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_SEXT,
    1109             :         GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_s32,
    1110             :         GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    1111             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    1112             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1113             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    1114             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
    1115             :         // (add:{ *:[i64] } (mul:{ *:[i64] } (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rm)), GPR64:{ *:[i64] }:$Ra)  =>  (SMADDLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm, GPR64:{ *:[i64] }:$Ra)
    1116             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMADDLrrr,
    1117             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1118             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    1119             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // Rm
    1120             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Ra
    1121             :         GIR_EraseFromParent, /*InsnID*/0,
    1122             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1123             :         // GIR_Coverage, 3800,
    1124             :         GIR_Done,
    1125             :       // Label 74: @770
    1126             :       GIM_Try, /*On fail goto*//*Label 75*/ 855, // Rule ID 3801 //
    1127             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    1128             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1129             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    1130             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    1131             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    1132             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    1133             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
    1134             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    1135             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    1136             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
    1137             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_ZEXT,
    1138             :         GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_s32,
    1139             :         GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    1140             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    1141             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1142             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    1143             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
    1144             :         // (add:{ *:[i64] } (mul:{ *:[i64] } (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rm)), GPR64:{ *:[i64] }:$Ra)  =>  (UMADDLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm, GPR64:{ *:[i64] }:$Ra)
    1145             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMADDLrrr,
    1146             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1147             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    1148             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // Rm
    1149             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Ra
    1150             :         GIR_EraseFromParent, /*InsnID*/0,
    1151             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1152             :         // GIR_Coverage, 3801,
    1153             :         GIR_Done,
    1154             :       // Label 75: @855
    1155             :       GIM_Try, /*On fail goto*//*Label 76*/ 940, // Rule ID 65 //
    1156             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    1157             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    1158             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1159             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    1160             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    1161             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    1162             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    1163             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
    1164             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    1165             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    1166             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
    1167             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_SEXT,
    1168             :         GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_s32,
    1169             :         GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    1170             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1171             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    1172             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
    1173             :         // (add:{ *:[i64] } GPR64:{ *:[i64] }:$Ra, (mul:{ *:[i64] } (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rm)))  =>  (SMADDLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm, GPR64:{ *:[i64] }:$Ra)
    1174             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMADDLrrr,
    1175             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1176             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    1177             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // Rm
    1178             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Ra
    1179             :         GIR_EraseFromParent, /*InsnID*/0,
    1180             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1181             :         // GIR_Coverage, 65,
    1182             :         GIR_Done,
    1183             :       // Label 76: @940
    1184             :       GIM_Try, /*On fail goto*//*Label 77*/ 1025, // Rule ID 67 //
    1185             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    1186             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    1187             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1188             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    1189             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    1190             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    1191             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    1192             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
    1193             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    1194             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    1195             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
    1196             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_ZEXT,
    1197             :         GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_s32,
    1198             :         GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    1199             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1200             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    1201             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
    1202             :         // (add:{ *:[i64] } GPR64:{ *:[i64] }:$Ra, (mul:{ *:[i64] } (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rm)))  =>  (UMADDLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm, GPR64:{ *:[i64] }:$Ra)
    1203             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMADDLrrr,
    1204             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1205             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    1206             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // Rm
    1207             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Ra
    1208             :         GIR_EraseFromParent, /*InsnID*/0,
    1209             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1210             :         // GIR_Coverage, 67,
    1211             :         GIR_Done,
    1212             :       // Label 77: @1025
    1213             :       GIM_Try, /*On fail goto*//*Label 78*/ 1081, // Rule ID 3854 //
    1214             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1215             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    1216             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1217             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1218             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    1219             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_saddlp,
    1220             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    1221             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1222             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1223             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1224             :         // (add:{ *:[v1i64] } (intrinsic_wo_chain:{ *:[v1i64] } 274:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn), V64:{ *:[v1i64] }:$Rd)  =>  (SADALPv2i32_v1i64:{ *:[v1i64] } V64:{ *:[v1i64] }:$Rd, V64:{ *:[v2i32] }:$Rn)
    1225             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADALPv2i32_v1i64,
    1226             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1227             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1228             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1229             :         GIR_EraseFromParent, /*InsnID*/0,
    1230             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1231             :         // GIR_Coverage, 3854,
    1232             :         GIR_Done,
    1233             :       // Label 78: @1081
    1234             :       GIM_Try, /*On fail goto*//*Label 79*/ 1137, // Rule ID 3860 //
    1235             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1236             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    1237             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1238             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1239             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    1240             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uaddlp,
    1241             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    1242             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1243             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1244             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1245             :         // (add:{ *:[v1i64] } (intrinsic_wo_chain:{ *:[v1i64] } 332:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn), V64:{ *:[v1i64] }:$Rd)  =>  (UADALPv2i32_v1i64:{ *:[v1i64] } V64:{ *:[v1i64] }:$Rd, V64:{ *:[v2i32] }:$Rn)
    1246             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADALPv2i32_v1i64,
    1247             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1248             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1249             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1250             :         GIR_EraseFromParent, /*InsnID*/0,
    1251             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1252             :         // GIR_Coverage, 3860,
    1253             :         GIR_Done,
    1254             :       // Label 79: @1137
    1255             :       GIM_Try, /*On fail goto*//*Label 80*/ 1193, // Rule ID 694 //
    1256             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1257             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    1258             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1259             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1260             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1261             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    1262             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_saddlp,
    1263             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    1264             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1265             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1266             :         // (add:{ *:[v1i64] } V64:{ *:[v1i64] }:$Rd, (intrinsic_wo_chain:{ *:[v1i64] } 274:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn))  =>  (SADALPv2i32_v1i64:{ *:[v1i64] } V64:{ *:[v1i64] }:$Rd, V64:{ *:[v2i32] }:$Rn)
    1267             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADALPv2i32_v1i64,
    1268             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1269             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    1270             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1271             :         GIR_EraseFromParent, /*InsnID*/0,
    1272             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1273             :         // GIR_Coverage, 694,
    1274             :         GIR_Done,
    1275             :       // Label 80: @1193
    1276             :       GIM_Try, /*On fail goto*//*Label 81*/ 1249, // Rule ID 738 //
    1277             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1278             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    1279             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1280             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1281             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1282             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    1283             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uaddlp,
    1284             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    1285             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1286             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1287             :         // (add:{ *:[v1i64] } V64:{ *:[v1i64] }:$Rd, (intrinsic_wo_chain:{ *:[v1i64] } 332:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn))  =>  (UADALPv2i32_v1i64:{ *:[v1i64] } V64:{ *:[v1i64] }:$Rd, V64:{ *:[v2i32] }:$Rn)
    1288             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADALPv2i32_v1i64,
    1289             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1290             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    1291             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1292             :         GIR_EraseFromParent, /*InsnID*/0,
    1293             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1294             :         // GIR_Coverage, 738,
    1295             :         GIR_Done,
    1296             :       // Label 81: @1249
    1297             :       GIM_Try, /*On fail goto*//*Label 82*/ 1270, // Rule ID 36 //
    1298             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    1299             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    1300             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    1301             :         // (add:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)  =>  (ADDXrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
    1302             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ADDXrr,
    1303             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1304             :         // GIR_Coverage, 36,
    1305             :         GIR_Done,
    1306             :       // Label 82: @1270
    1307             :       GIM_Try, /*On fail goto*//*Label 83*/ 1293, // Rule ID 1193 //
    1308             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1309             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    1310             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1311             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1312             :         // (add:{ *:[v1i64] } FPR64:{ *:[v1i64] }:$Rn, FPR64:{ *:[v1i64] }:$Rm)  =>  (ADDv1i64:{ *:[v1i64] } FPR64:{ *:[v1i64] }:$Rn, FPR64:{ *:[v1i64] }:$Rm)
    1313             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ADDv1i64,
    1314             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1315             :         // GIR_Coverage, 1193,
    1316             :         GIR_Done,
    1317             :       // Label 83: @1293
    1318             :       GIM_Reject,
    1319             :     // Label 67: @1294
    1320             :     GIM_Reject,
    1321             :     // Label 55: @1295
    1322             :     GIM_Try, /*On fail goto*//*Label 84*/ 1907,
    1323             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    1324             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    1325             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    1326             :       GIM_Try, /*On fail goto*//*Label 85*/ 1373, // Rule ID 3872 //
    1327             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1328             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1329             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1330             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    1331             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    1332             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    1333             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s32,
    1334             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1335             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1336             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1337             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1338             :         // (add:{ *:[v2i32] } (intrinsic_wo_chain:{ *:[v2i32] } 273:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm), V64:{ *:[v2i32] }:$Rd)  =>  (SABAv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1339             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABAv2i32,
    1340             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1341             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1342             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1343             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    1344             :         GIR_EraseFromParent, /*InsnID*/0,
    1345             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1346             :         // GIR_Coverage, 3872,
    1347             :         GIR_Done,
    1348             :       // Label 85: @1373
    1349             :       GIM_Try, /*On fail goto*//*Label 86*/ 1437, // Rule ID 3878 //
    1350             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1351             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1352             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1353             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    1354             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    1355             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    1356             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s32,
    1357             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1358             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1359             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1360             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1361             :         // (add:{ *:[v2i32] } (intrinsic_wo_chain:{ *:[v2i32] } 331:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm), V64:{ *:[v2i32] }:$Rd)  =>  (UABAv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1362             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABAv2i32,
    1363             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1364             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1365             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1366             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    1367             :         GIR_EraseFromParent, /*InsnID*/0,
    1368             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1369             :         // GIR_Coverage, 3878,
    1370             :         GIR_Done,
    1371             :       // Label 86: @1437
    1372             :       GIM_Try, /*On fail goto*//*Label 87*/ 1489, // Rule ID 3852 //
    1373             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1374             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1375             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1376             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    1377             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_saddlp,
    1378             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    1379             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1380             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1381             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1382             :         // (add:{ *:[v2i32] } (intrinsic_wo_chain:{ *:[v2i32] } 274:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn), V64:{ *:[v2i32] }:$Rd)  =>  (SADALPv4i16_v2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, V64:{ *:[v4i16] }:$Rn)
    1383             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADALPv4i16_v2i32,
    1384             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1385             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1386             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1387             :         GIR_EraseFromParent, /*InsnID*/0,
    1388             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1389             :         // GIR_Coverage, 3852,
    1390             :         GIR_Done,
    1391             :       // Label 87: @1489
    1392             :       GIM_Try, /*On fail goto*//*Label 88*/ 1541, // Rule ID 3858 //
    1393             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1394             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1395             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1396             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    1397             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uaddlp,
    1398             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    1399             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1400             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1401             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1402             :         // (add:{ *:[v2i32] } (intrinsic_wo_chain:{ *:[v2i32] } 332:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn), V64:{ *:[v2i32] }:$Rd)  =>  (UADALPv4i16_v2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, V64:{ *:[v4i16] }:$Rn)
    1403             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADALPv4i16_v2i32,
    1404             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1405             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1406             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1407             :         GIR_EraseFromParent, /*InsnID*/0,
    1408             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1409             :         // GIR_Coverage, 3858,
    1410             :         GIR_Done,
    1411             :       // Label 88: @1541
    1412             :       GIM_Try, /*On fail goto*//*Label 89*/ 1605, // Rule ID 968 //
    1413             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1414             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1415             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1416             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1417             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    1418             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    1419             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    1420             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s32,
    1421             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1422             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1423             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1424             :         // (add:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, (intrinsic_wo_chain:{ *:[v2i32] } 273:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm))  =>  (SABAv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1425             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABAv2i32,
    1426             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1427             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    1428             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1429             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    1430             :         GIR_EraseFromParent, /*InsnID*/0,
    1431             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1432             :         // GIR_Coverage, 968,
    1433             :         GIR_Done,
    1434             :       // Label 89: @1605
    1435             :       GIM_Try, /*On fail goto*//*Label 90*/ 1669, // Rule ID 1079 //
    1436             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1437             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1438             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1439             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1440             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    1441             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    1442             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    1443             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s32,
    1444             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1445             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1446             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1447             :         // (add:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, (intrinsic_wo_chain:{ *:[v2i32] } 331:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm))  =>  (UABAv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1448             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABAv2i32,
    1449             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1450             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    1451             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1452             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    1453             :         GIR_EraseFromParent, /*InsnID*/0,
    1454             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1455             :         // GIR_Coverage, 1079,
    1456             :         GIR_Done,
    1457             :       // Label 90: @1669
    1458             :       GIM_Try, /*On fail goto*//*Label 91*/ 1721, // Rule ID 692 //
    1459             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1460             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1461             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1462             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1463             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    1464             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_saddlp,
    1465             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    1466             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1467             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1468             :         // (add:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, (intrinsic_wo_chain:{ *:[v2i32] } 274:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn))  =>  (SADALPv4i16_v2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, V64:{ *:[v4i16] }:$Rn)
    1469             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADALPv4i16_v2i32,
    1470             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1471             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    1472             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1473             :         GIR_EraseFromParent, /*InsnID*/0,
    1474             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1475             :         // GIR_Coverage, 692,
    1476             :         GIR_Done,
    1477             :       // Label 91: @1721
    1478             :       GIM_Try, /*On fail goto*//*Label 92*/ 1773, // Rule ID 736 //
    1479             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1480             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1481             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1482             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1483             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    1484             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uaddlp,
    1485             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    1486             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1487             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1488             :         // (add:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, (intrinsic_wo_chain:{ *:[v2i32] } 332:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn))  =>  (UADALPv4i16_v2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, V64:{ *:[v4i16] }:$Rn)
    1489             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADALPv4i16_v2i32,
    1490             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1491             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    1492             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1493             :         GIR_EraseFromParent, /*InsnID*/0,
    1494             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1495             :         // GIR_Coverage, 736,
    1496             :         GIR_Done,
    1497             :       // Label 92: @1773
    1498             :       GIM_Try, /*On fail goto*//*Label 93*/ 1830, // Rule ID 3866 //
    1499             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1500             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1501             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    1502             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    1503             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    1504             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1505             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1506             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1507             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1508             :         // (add:{ *:[v2i32] } (mul:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm), V64:{ *:[v2i32] }:$Rd)  =>  (MLAv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1509             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLAv2i32,
    1510             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1511             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1512             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    1513             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    1514             :         GIR_EraseFromParent, /*InsnID*/0,
    1515             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1516             :         // GIR_Coverage, 3866,
    1517             :         GIR_Done,
    1518             :       // Label 93: @1830
    1519             :       GIM_Try, /*On fail goto*//*Label 94*/ 1887, // Rule ID 948 //
    1520             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1521             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1522             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1523             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    1524             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    1525             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    1526             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1527             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1528             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1529             :         // (add:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, (mul:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm))  =>  (MLAv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1530             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLAv2i32,
    1531             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1532             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    1533             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    1534             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    1535             :         GIR_EraseFromParent, /*InsnID*/0,
    1536             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1537             :         // GIR_Coverage, 948,
    1538             :         GIR_Done,
    1539             :       // Label 94: @1887
    1540             :       GIM_Try, /*On fail goto*//*Label 95*/ 1906, // Rule ID 772 //
    1541             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1542             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1543             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1544             :         // (add:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)  =>  (ADDv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1545             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ADDv2i32,
    1546             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1547             :         // GIR_Coverage, 772,
    1548             :         GIR_Done,
    1549             :       // Label 95: @1906
    1550             :       GIM_Reject,
    1551             :     // Label 84: @1907
    1552             :     GIM_Reject,
    1553             :     // Label 56: @1908
    1554             :     GIM_Try, /*On fail goto*//*Label 96*/ 3010,
    1555             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    1556             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    1557             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    1558             :       GIM_Try, /*On fail goto*//*Label 97*/ 1999, // Rule ID 3926 //
    1559             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1560             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1561             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    1562             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    1563             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    1564             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_INTRINSIC,
    1565             :         GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
    1566             :         GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    1567             :         GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s32,
    1568             :         GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v2s32,
    1569             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1570             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1571             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1572             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1573             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    1574             :         // (add:{ *:[v2i64] } (zext:{ *:[v2i64] } (intrinsic_wo_chain:{ *:[v2i32] } 273:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)), V128:{ *:[v2i64] }:$Rd)  =>  (SABALv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1575             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABALv2i32_v2i64,
    1576             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1577             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1578             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // Rn
    1579             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // Rm
    1580             :         GIR_EraseFromParent, /*InsnID*/0,
    1581             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1582             :         // GIR_Coverage, 3926,
    1583             :         GIR_Done,
    1584             :       // Label 97: @1999
    1585             :       GIM_Try, /*On fail goto*//*Label 98*/ 2076, // Rule ID 3944 //
    1586             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1587             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1588             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    1589             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    1590             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    1591             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_INTRINSIC,
    1592             :         GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
    1593             :         GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    1594             :         GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s32,
    1595             :         GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v2s32,
    1596             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1597             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1598             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1599             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1600             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    1601             :         // (add:{ *:[v2i64] } (zext:{ *:[v2i64] } (intrinsic_wo_chain:{ *:[v2i32] } 331:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)), V128:{ *:[v2i64] }:$Rd)  =>  (UABALv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1602             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABALv2i32_v2i64,
    1603             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1604             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1605             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // Rn
    1606             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // Rm
    1607             :         GIR_EraseFromParent, /*InsnID*/0,
    1608             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1609             :         // GIR_Coverage, 3944,
    1610             :         GIR_Done,
    1611             :       // Label 98: @2076
    1612             :       GIM_Try, /*On fail goto*//*Label 99*/ 2153, // Rule ID 1275 //
    1613             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1614             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    1615             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1616             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    1617             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    1618             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    1619             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_INTRINSIC,
    1620             :         GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
    1621             :         GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    1622             :         GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s32,
    1623             :         GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v2s32,
    1624             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1625             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1626             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1627             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    1628             :         // (add:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, (zext:{ *:[v2i64] } (intrinsic_wo_chain:{ *:[v2i32] } 273:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)))  =>  (SABALv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1629             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABALv2i32_v2i64,
    1630             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1631             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    1632             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // Rn
    1633             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // Rm
    1634             :         GIR_EraseFromParent, /*InsnID*/0,
    1635             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1636             :         // GIR_Coverage, 1275,
    1637             :         GIR_Done,
    1638             :       // Label 99: @2153
    1639             :       GIM_Try, /*On fail goto*//*Label 100*/ 2230, // Rule ID 1341 //
    1640             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1641             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    1642             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1643             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    1644             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    1645             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    1646             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_INTRINSIC,
    1647             :         GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
    1648             :         GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    1649             :         GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s32,
    1650             :         GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v2s32,
    1651             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1652             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1653             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1654             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    1655             :         // (add:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, (zext:{ *:[v2i64] } (intrinsic_wo_chain:{ *:[v2i32] } 331:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)))  =>  (UABALv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1656             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABALv2i32_v2i64,
    1657             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1658             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    1659             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // Rn
    1660             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // Rm
    1661             :         GIR_EraseFromParent, /*InsnID*/0,
    1662             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1663             :         // GIR_Coverage, 1341,
    1664             :         GIR_Done,
    1665             :       // Label 100: @2230
    1666             :       GIM_Try, /*On fail goto*//*Label 101*/ 2294, // Rule ID 3938 //
    1667             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1668             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1669             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1670             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    1671             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_smull,
    1672             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    1673             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s32,
    1674             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1675             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1676             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1677             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1678             :         // (add:{ *:[v2i64] } (intrinsic_wo_chain:{ *:[v2i64] } 290:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm), V128:{ *:[v2i64] }:$Rd)  =>  (SMLALv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1679             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMLALv2i32_v2i64,
    1680             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1681             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1682             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1683             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    1684             :         GIR_EraseFromParent, /*InsnID*/0,
    1685             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1686             :         // GIR_Coverage, 3938,
    1687             :         GIR_Done,
    1688             :       // Label 101: @2294
    1689             :       GIM_Try, /*On fail goto*//*Label 102*/ 2358, // Rule ID 3956 //
    1690             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1691             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1692             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1693             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    1694             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_umull,
    1695             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    1696             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s32,
    1697             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1698             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1699             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1700             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1701             :         // (add:{ *:[v2i64] } (intrinsic_wo_chain:{ *:[v2i64] } 344:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm), V128:{ *:[v2i64] }:$Rd)  =>  (UMLALv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1702             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMLALv2i32_v2i64,
    1703             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1704             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1705             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1706             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    1707             :         GIR_EraseFromParent, /*InsnID*/0,
    1708             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1709             :         // GIR_Coverage, 3956,
    1710             :         GIR_Done,
    1711             :       // Label 102: @2358
    1712             :       GIM_Try, /*On fail goto*//*Label 103*/ 2410, // Rule ID 3855 //
    1713             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1714             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1715             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1716             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    1717             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_saddlp,
    1718             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
    1719             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1720             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1721             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1722             :         // (add:{ *:[v2i64] } (intrinsic_wo_chain:{ *:[v2i64] } 274:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn), V128:{ *:[v2i64] }:$Rd)  =>  (SADALPv4i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V128:{ *:[v4i32] }:$Rn)
    1723             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADALPv4i32_v2i64,
    1724             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1725             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1726             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1727             :         GIR_EraseFromParent, /*InsnID*/0,
    1728             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1729             :         // GIR_Coverage, 3855,
    1730             :         GIR_Done,
    1731             :       // Label 103: @2410
    1732             :       GIM_Try, /*On fail goto*//*Label 104*/ 2462, // Rule ID 3861 //
    1733             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1734             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1735             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1736             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    1737             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uaddlp,
    1738             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
    1739             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1740             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1741             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1742             :         // (add:{ *:[v2i64] } (intrinsic_wo_chain:{ *:[v2i64] } 332:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn), V128:{ *:[v2i64] }:$Rd)  =>  (UADALPv4i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V128:{ *:[v4i32] }:$Rn)
    1743             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADALPv4i32_v2i64,
    1744             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1745             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1746             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1747             :         GIR_EraseFromParent, /*InsnID*/0,
    1748             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1749             :         // GIR_Coverage, 3861,
    1750             :         GIR_Done,
    1751             :       // Label 104: @2462
    1752             :       GIM_Try, /*On fail goto*//*Label 105*/ 2526, // Rule ID 1299 //
    1753             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1754             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    1755             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1756             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1757             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    1758             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_smull,
    1759             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    1760             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s32,
    1761             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1762             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1763             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1764             :         // (add:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, (intrinsic_wo_chain:{ *:[v2i64] } 290:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm))  =>  (SMLALv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1765             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMLALv2i32_v2i64,
    1766             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1767             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    1768             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1769             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    1770             :         GIR_EraseFromParent, /*InsnID*/0,
    1771             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1772             :         // GIR_Coverage, 1299,
    1773             :         GIR_Done,
    1774             :       // Label 105: @2526
    1775             :       GIM_Try, /*On fail goto*//*Label 106*/ 2590, // Rule ID 1359 //
    1776             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1777             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    1778             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1779             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1780             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    1781             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_umull,
    1782             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    1783             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s32,
    1784             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1785             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1786             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1787             :         // (add:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, (intrinsic_wo_chain:{ *:[v2i64] } 344:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm))  =>  (UMLALv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1788             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMLALv2i32_v2i64,
    1789             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1790             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    1791             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1792             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    1793             :         GIR_EraseFromParent, /*InsnID*/0,
    1794             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1795             :         // GIR_Coverage, 1359,
    1796             :         GIR_Done,
    1797             :       // Label 106: @2590
    1798             :       GIM_Try, /*On fail goto*//*Label 107*/ 2642, // Rule ID 695 //
    1799             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1800             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    1801             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1802             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1803             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    1804             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_saddlp,
    1805             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
    1806             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1807             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1808             :         // (add:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, (intrinsic_wo_chain:{ *:[v2i64] } 274:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn))  =>  (SADALPv4i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V128:{ *:[v4i32] }:$Rn)
    1809             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADALPv4i32_v2i64,
    1810             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1811             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    1812             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1813             :         GIR_EraseFromParent, /*InsnID*/0,
    1814             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1815             :         // GIR_Coverage, 695,
    1816             :         GIR_Done,
    1817             :       // Label 107: @2642
    1818             :       GIM_Try, /*On fail goto*//*Label 108*/ 2694, // Rule ID 739 //
    1819             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1820             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    1821             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1822             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1823             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    1824             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uaddlp,
    1825             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
    1826             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1827             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1828             :         // (add:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, (intrinsic_wo_chain:{ *:[v2i64] } 332:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn))  =>  (UADALPv4i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V128:{ *:[v4i32] }:$Rn)
    1829             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADALPv4i32_v2i64,
    1830             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1831             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    1832             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1833             :         GIR_EraseFromParent, /*InsnID*/0,
    1834             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1835             :         // GIR_Coverage, 739,
    1836             :         GIR_Done,
    1837             :       // Label 108: @2694
    1838             :       GIM_Try, /*On fail goto*//*Label 109*/ 2752, // Rule ID 1287 //
    1839             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1840             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1841             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    1842             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    1843             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1844             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    1845             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
    1846             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s32,
    1847             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1848             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1849             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    1850             :         // (add:{ *:[v2i64] } (sext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rn), (sext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rm))  =>  (SADDLv2i32_v2i64:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1851             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADDLv2i32_v2i64,
    1852             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1853             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    1854             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rm
    1855             :         GIR_EraseFromParent, /*InsnID*/0,
    1856             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1857             :         // GIR_Coverage, 1287,
    1858             :         GIR_Done,
    1859             :       // Label 109: @2752
    1860             :       GIM_Try, /*On fail goto*//*Label 110*/ 2810, // Rule ID 1347 //
    1861             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1862             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1863             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    1864             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    1865             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1866             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    1867             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
    1868             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s32,
    1869             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1870             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1871             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    1872             :         // (add:{ *:[v2i64] } (zext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rn), (zext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rm))  =>  (UADDLv2i32_v2i64:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1873             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADDLv2i32_v2i64,
    1874             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1875             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    1876             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rm
    1877             :         GIR_EraseFromParent, /*InsnID*/0,
    1878             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1879             :         // GIR_Coverage, 1347,
    1880             :         GIR_Done,
    1881             :       // Label 110: @2810
    1882             :       GIM_Try, /*On fail goto*//*Label 111*/ 2855, // Rule ID 3932 //
    1883             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1884             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1885             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    1886             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    1887             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1888             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1889             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1890             :         // (add:{ *:[v2i64] } (sext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rm), V128:{ *:[v2i64] }:$Rn)  =>  (SADDWv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1891             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADDWv2i32_v2i64,
    1892             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1893             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    1894             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    1895             :         GIR_EraseFromParent, /*InsnID*/0,
    1896             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1897             :         // GIR_Coverage, 3932,
    1898             :         GIR_Done,
    1899             :       // Label 111: @2855
    1900             :       GIM_Try, /*On fail goto*//*Label 112*/ 2900, // Rule ID 3950 //
    1901             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1902             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1903             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    1904             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    1905             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1906             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1907             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1908             :         // (add:{ *:[v2i64] } (zext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rm), V128:{ *:[v2i64] }:$Rn)  =>  (UADDWv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1909             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADDWv2i32_v2i64,
    1910             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1911             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    1912             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    1913             :         GIR_EraseFromParent, /*InsnID*/0,
    1914             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1915             :         // GIR_Coverage, 3950,
    1916             :         GIR_Done,
    1917             :       // Label 112: @2900
    1918             :       GIM_Try, /*On fail goto*//*Label 113*/ 2945, // Rule ID 1293 //
    1919             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1920             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    1921             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1922             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    1923             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    1924             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1925             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1926             :         // (add:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, (sext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rm))  =>  (SADDWv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1927             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADDWv2i32_v2i64,
    1928             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1929             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    1930             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    1931             :         GIR_EraseFromParent, /*InsnID*/0,
    1932             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1933             :         // GIR_Coverage, 1293,
    1934             :         GIR_Done,
    1935             :       // Label 113: @2945
    1936             :       GIM_Try, /*On fail goto*//*Label 114*/ 2990, // Rule ID 1353 //
    1937             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1938             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    1939             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1940             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    1941             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    1942             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1943             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1944             :         // (add:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, (zext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rm))  =>  (UADDWv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1945             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADDWv2i32_v2i64,
    1946             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1947             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    1948             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    1949             :         GIR_EraseFromParent, /*InsnID*/0,
    1950             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1951             :         // GIR_Coverage, 1353,
    1952             :         GIR_Done,
    1953             :       // Label 114: @2990
    1954             :       GIM_Try, /*On fail goto*//*Label 115*/ 3009, // Rule ID 774 //
    1955             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1956             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    1957             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1958             :         // (add:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)  =>  (ADDv2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)
    1959             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ADDv2i64,
    1960             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1961             :         // GIR_Coverage, 774,
    1962             :         GIR_Done,
    1963             :       // Label 115: @3009
    1964             :       GIM_Reject,
    1965             :     // Label 96: @3010
    1966             :     GIM_Reject,
    1967             :     // Label 57: @3011
    1968             :     GIM_Try, /*On fail goto*//*Label 116*/ 3623,
    1969             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    1970             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    1971             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    1972             :       GIM_Try, /*On fail goto*//*Label 117*/ 3089, // Rule ID 3870 //
    1973             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1974             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1975             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1976             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    1977             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    1978             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    1979             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s16,
    1980             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1981             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1982             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1983             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1984             :         // (add:{ *:[v4i16] } (intrinsic_wo_chain:{ *:[v4i16] } 273:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm), V64:{ *:[v4i16] }:$Rd)  =>  (SABAv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    1985             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABAv4i16,
    1986             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1987             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1988             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1989             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    1990             :         GIR_EraseFromParent, /*InsnID*/0,
    1991             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1992             :         // GIR_Coverage, 3870,
    1993             :         GIR_Done,
    1994             :       // Label 117: @3089
    1995             :       GIM_Try, /*On fail goto*//*Label 118*/ 3153, // Rule ID 3876 //
    1996             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1997             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1998             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1999             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2000             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    2001             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    2002             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s16,
    2003             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2004             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2005             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2006             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2007             :         // (add:{ *:[v4i16] } (intrinsic_wo_chain:{ *:[v4i16] } 331:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm), V64:{ *:[v4i16] }:$Rd)  =>  (UABAv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2008             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABAv4i16,
    2009             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2010             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2011             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2012             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2013             :         GIR_EraseFromParent, /*InsnID*/0,
    2014             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2015             :         // GIR_Coverage, 3876,
    2016             :         GIR_Done,
    2017             :       // Label 118: @3153
    2018             :       GIM_Try, /*On fail goto*//*Label 119*/ 3205, // Rule ID 3850 //
    2019             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2020             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2021             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2022             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    2023             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_saddlp,
    2024             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    2025             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2026             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2027             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2028             :         // (add:{ *:[v4i16] } (intrinsic_wo_chain:{ *:[v4i16] } 274:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn), V64:{ *:[v4i16] }:$Rd)  =>  (SADALPv8i8_v4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, V64:{ *:[v8i8] }:$Rn)
    2029             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADALPv8i8_v4i16,
    2030             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2031             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2032             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2033             :         GIR_EraseFromParent, /*InsnID*/0,
    2034             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2035             :         // GIR_Coverage, 3850,
    2036             :         GIR_Done,
    2037             :       // Label 119: @3205
    2038             :       GIM_Try, /*On fail goto*//*Label 120*/ 3257, // Rule ID 3856 //
    2039             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2040             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2041             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2042             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    2043             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uaddlp,
    2044             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    2045             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2046             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2047             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2048             :         // (add:{ *:[v4i16] } (intrinsic_wo_chain:{ *:[v4i16] } 332:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn), V64:{ *:[v4i16] }:$Rd)  =>  (UADALPv8i8_v4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, V64:{ *:[v8i8] }:$Rn)
    2049             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADALPv8i8_v4i16,
    2050             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2051             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2052             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2053             :         GIR_EraseFromParent, /*InsnID*/0,
    2054             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2055             :         // GIR_Coverage, 3856,
    2056             :         GIR_Done,
    2057             :       // Label 120: @3257
    2058             :       GIM_Try, /*On fail goto*//*Label 121*/ 3321, // Rule ID 966 //
    2059             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2060             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2061             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2062             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2063             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2064             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    2065             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    2066             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s16,
    2067             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2068             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2069             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2070             :         // (add:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, (intrinsic_wo_chain:{ *:[v4i16] } 273:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm))  =>  (SABAv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2071             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABAv4i16,
    2072             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2073             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2074             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2075             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2076             :         GIR_EraseFromParent, /*InsnID*/0,
    2077             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2078             :         // GIR_Coverage, 966,
    2079             :         GIR_Done,
    2080             :       // Label 121: @3321
    2081             :       GIM_Try, /*On fail goto*//*Label 122*/ 3385, // Rule ID 1077 //
    2082             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2083             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2084             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2085             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2086             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2087             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    2088             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    2089             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s16,
    2090             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2091             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2092             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2093             :         // (add:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, (intrinsic_wo_chain:{ *:[v4i16] } 331:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm))  =>  (UABAv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2094             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABAv4i16,
    2095             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2096             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2097             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2098             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2099             :         GIR_EraseFromParent, /*InsnID*/0,
    2100             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2101             :         // GIR_Coverage, 1077,
    2102             :         GIR_Done,
    2103             :       // Label 122: @3385
    2104             :       GIM_Try, /*On fail goto*//*Label 123*/ 3437, // Rule ID 690 //
    2105             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2106             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2107             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2108             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2109             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    2110             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_saddlp,
    2111             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    2112             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2113             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2114             :         // (add:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, (intrinsic_wo_chain:{ *:[v4i16] } 274:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn))  =>  (SADALPv8i8_v4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, V64:{ *:[v8i8] }:$Rn)
    2115             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADALPv8i8_v4i16,
    2116             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2117             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2118             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2119             :         GIR_EraseFromParent, /*InsnID*/0,
    2120             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2121             :         // GIR_Coverage, 690,
    2122             :         GIR_Done,
    2123             :       // Label 123: @3437
    2124             :       GIM_Try, /*On fail goto*//*Label 124*/ 3489, // Rule ID 734 //
    2125             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2126             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2127             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2128             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2129             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    2130             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uaddlp,
    2131             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    2132             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2133             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2134             :         // (add:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, (intrinsic_wo_chain:{ *:[v4i16] } 332:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn))  =>  (UADALPv8i8_v4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, V64:{ *:[v8i8] }:$Rn)
    2135             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADALPv8i8_v4i16,
    2136             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2137             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2138             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2139             :         GIR_EraseFromParent, /*InsnID*/0,
    2140             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2141             :         // GIR_Coverage, 734,
    2142             :         GIR_Done,
    2143             :       // Label 124: @3489
    2144             :       GIM_Try, /*On fail goto*//*Label 125*/ 3546, // Rule ID 3864 //
    2145             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2146             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2147             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    2148             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    2149             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    2150             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2151             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2152             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2153             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2154             :         // (add:{ *:[v4i16] } (mul:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm), V64:{ *:[v4i16] }:$Rd)  =>  (MLAv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2155             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLAv4i16,
    2156             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2157             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2158             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    2159             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    2160             :         GIR_EraseFromParent, /*InsnID*/0,
    2161             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2162             :         // GIR_Coverage, 3864,
    2163             :         GIR_Done,
    2164             :       // Label 125: @3546
    2165             :       GIM_Try, /*On fail goto*//*Label 126*/ 3603, // Rule ID 946 //
    2166             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2167             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2168             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2169             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    2170             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    2171             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    2172             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2173             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2174             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2175             :         // (add:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, (mul:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm))  =>  (MLAv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2176             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLAv4i16,
    2177             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2178             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2179             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    2180             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    2181             :         GIR_EraseFromParent, /*InsnID*/0,
    2182             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2183             :         // GIR_Coverage, 946,
    2184             :         GIR_Done,
    2185             :       // Label 126: @3603
    2186             :       GIM_Try, /*On fail goto*//*Label 127*/ 3622, // Rule ID 770 //
    2187             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2188             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2189             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2190             :         // (add:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)  =>  (ADDv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2191             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ADDv4i16,
    2192             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2193             :         // GIR_Coverage, 770,
    2194             :         GIR_Done,
    2195             :       // Label 127: @3622
    2196             :       GIM_Reject,
    2197             :     // Label 116: @3623
    2198             :     GIM_Reject,
    2199             :     // Label 58: @3624
    2200             :     GIM_Try, /*On fail goto*//*Label 128*/ 5096,
    2201             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    2202             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    2203             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    2204             :       GIM_Try, /*On fail goto*//*Label 129*/ 3715, // Rule ID 3924 //
    2205             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2206             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2207             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    2208             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    2209             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    2210             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_INTRINSIC,
    2211             :         GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
    2212             :         GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    2213             :         GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s16,
    2214             :         GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v4s16,
    2215             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2216             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2217             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2218             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2219             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    2220             :         // (add:{ *:[v4i32] } (zext:{ *:[v4i32] } (intrinsic_wo_chain:{ *:[v4i16] } 273:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)), V128:{ *:[v4i32] }:$Rd)  =>  (SABALv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2221             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABALv4i16_v4i32,
    2222             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2223             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2224             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // Rn
    2225             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // Rm
    2226             :         GIR_EraseFromParent, /*InsnID*/0,
    2227             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2228             :         // GIR_Coverage, 3924,
    2229             :         GIR_Done,
    2230             :       // Label 129: @3715
    2231             :       GIM_Try, /*On fail goto*//*Label 130*/ 3792, // Rule ID 3942 //
    2232             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2233             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2234             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    2235             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    2236             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    2237             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_INTRINSIC,
    2238             :         GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
    2239             :         GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    2240             :         GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s16,
    2241             :         GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v4s16,
    2242             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2243             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2244             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2245             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2246             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    2247             :         // (add:{ *:[v4i32] } (zext:{ *:[v4i32] } (intrinsic_wo_chain:{ *:[v4i16] } 331:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)), V128:{ *:[v4i32] }:$Rd)  =>  (UABALv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2248             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABALv4i16_v4i32,
    2249             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2250             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2251             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // Rn
    2252             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // Rm
    2253             :         GIR_EraseFromParent, /*InsnID*/0,
    2254             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2255             :         // GIR_Coverage, 3942,
    2256             :         GIR_Done,
    2257             :       // Label 130: @3792
    2258             :       GIM_Try, /*On fail goto*//*Label 131*/ 3869, // Rule ID 1273 //
    2259             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2260             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2261             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2262             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    2263             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    2264             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    2265             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_INTRINSIC,
    2266             :         GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
    2267             :         GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    2268             :         GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s16,
    2269             :         GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v4s16,
    2270             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2271             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2272             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2273             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    2274             :         // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, (zext:{ *:[v4i32] } (intrinsic_wo_chain:{ *:[v4i16] } 273:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)))  =>  (SABALv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2275             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABALv4i16_v4i32,
    2276             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2277             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2278             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // Rn
    2279             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // Rm
    2280             :         GIR_EraseFromParent, /*InsnID*/0,
    2281             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2282             :         // GIR_Coverage, 1273,
    2283             :         GIR_Done,
    2284             :       // Label 131: @3869
    2285             :       GIM_Try, /*On fail goto*//*Label 132*/ 3946, // Rule ID 1339 //
    2286             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2287             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2288             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2289             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    2290             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    2291             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    2292             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_INTRINSIC,
    2293             :         GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
    2294             :         GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    2295             :         GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s16,
    2296             :         GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v4s16,
    2297             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2298             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2299             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2300             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    2301             :         // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, (zext:{ *:[v4i32] } (intrinsic_wo_chain:{ *:[v4i16] } 331:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)))  =>  (UABALv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2302             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABALv4i16_v4i32,
    2303             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2304             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2305             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // Rn
    2306             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // Rm
    2307             :         GIR_EraseFromParent, /*InsnID*/0,
    2308             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2309             :         // GIR_Coverage, 1339,
    2310             :         GIR_Done,
    2311             :       // Label 132: @3946
    2312             :       GIM_Try, /*On fail goto*//*Label 133*/ 4010, // Rule ID 3873 //
    2313             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2314             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2315             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2316             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2317             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    2318             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
    2319             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s32,
    2320             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2321             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    2322             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2323             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2324             :         // (add:{ *:[v4i32] } (intrinsic_wo_chain:{ *:[v4i32] } 273:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm), V128:{ *:[v4i32] }:$Rd)  =>  (SABAv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
    2325             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABAv4i32,
    2326             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2327             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2328             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2329             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2330             :         GIR_EraseFromParent, /*InsnID*/0,
    2331             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2332             :         // GIR_Coverage, 3873,
    2333             :         GIR_Done,
    2334             :       // Label 133: @4010
    2335             :       GIM_Try, /*On fail goto*//*Label 134*/ 4074, // Rule ID 3879 //
    2336             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2337             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2338             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2339             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2340             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    2341             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
    2342             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s32,
    2343             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2344             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    2345             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2346             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2347             :         // (add:{ *:[v4i32] } (intrinsic_wo_chain:{ *:[v4i32] } 331:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm), V128:{ *:[v4i32] }:$Rd)  =>  (UABAv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
    2348             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABAv4i32,
    2349             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2350             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2351             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2352             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2353             :         GIR_EraseFromParent, /*InsnID*/0,
    2354             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2355             :         // GIR_Coverage, 3879,
    2356             :         GIR_Done,
    2357             :       // Label 134: @4074
    2358             :       GIM_Try, /*On fail goto*//*Label 135*/ 4138, // Rule ID 3936 //
    2359             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2360             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2361             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2362             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2363             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_smull,
    2364             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    2365             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s16,
    2366             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2367             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2368             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2369             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2370             :         // (add:{ *:[v4i32] } (intrinsic_wo_chain:{ *:[v4i32] } 290:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm), V128:{ *:[v4i32] }:$Rd)  =>  (SMLALv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2371             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMLALv4i16_v4i32,
    2372             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2373             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2374             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2375             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2376             :         GIR_EraseFromParent, /*InsnID*/0,
    2377             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2378             :         // GIR_Coverage, 3936,
    2379             :         GIR_Done,
    2380             :       // Label 135: @4138
    2381             :       GIM_Try, /*On fail goto*//*Label 136*/ 4202, // Rule ID 3954 //
    2382             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2383             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2384             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2385             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2386             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_umull,
    2387             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    2388             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s16,
    2389             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2390             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2391             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2392             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2393             :         // (add:{ *:[v4i32] } (intrinsic_wo_chain:{ *:[v4i32] } 344:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm), V128:{ *:[v4i32] }:$Rd)  =>  (UMLALv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2394             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMLALv4i16_v4i32,
    2395             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2396             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2397             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2398             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2399             :         GIR_EraseFromParent, /*InsnID*/0,
    2400             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2401             :         // GIR_Coverage, 3954,
    2402             :         GIR_Done,
    2403             :       // Label 136: @4202
    2404             :       GIM_Try, /*On fail goto*//*Label 137*/ 4254, // Rule ID 3853 //
    2405             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2406             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2407             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2408             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    2409             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_saddlp,
    2410             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
    2411             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2412             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2413             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2414             :         // (add:{ *:[v4i32] } (intrinsic_wo_chain:{ *:[v4i32] } 274:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn), V128:{ *:[v4i32] }:$Rd)  =>  (SADALPv8i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v8i16] }:$Rn)
    2415             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADALPv8i16_v4i32,
    2416             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2417             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2418             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2419             :         GIR_EraseFromParent, /*InsnID*/0,
    2420             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2421             :         // GIR_Coverage, 3853,
    2422             :         GIR_Done,
    2423             :       // Label 137: @4254
    2424             :       GIM_Try, /*On fail goto*//*Label 138*/ 4306, // Rule ID 3859 //
    2425             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2426             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2427             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2428             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    2429             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uaddlp,
    2430             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
    2431             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2432             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2433             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2434             :         // (add:{ *:[v4i32] } (intrinsic_wo_chain:{ *:[v4i32] } 332:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn), V128:{ *:[v4i32] }:$Rd)  =>  (UADALPv8i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v8i16] }:$Rn)
    2435             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADALPv8i16_v4i32,
    2436             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2437             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2438             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2439             :         GIR_EraseFromParent, /*InsnID*/0,
    2440             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2441             :         // GIR_Coverage, 3859,
    2442             :         GIR_Done,
    2443             :       // Label 138: @4306
    2444             :       GIM_Try, /*On fail goto*//*Label 139*/ 4370, // Rule ID 969 //
    2445             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2446             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2447             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2448             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2449             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2450             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    2451             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
    2452             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s32,
    2453             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2454             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    2455             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2456             :         // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, (intrinsic_wo_chain:{ *:[v4i32] } 273:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm))  =>  (SABAv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
    2457             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABAv4i32,
    2458             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2459             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2460             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2461             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2462             :         GIR_EraseFromParent, /*InsnID*/0,
    2463             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2464             :         // GIR_Coverage, 969,
    2465             :         GIR_Done,
    2466             :       // Label 139: @4370
    2467             :       GIM_Try, /*On fail goto*//*Label 140*/ 4434, // Rule ID 1080 //
    2468             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2469             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2470             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2471             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2472             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2473             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    2474             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
    2475             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s32,
    2476             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2477             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    2478             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2479             :         // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, (intrinsic_wo_chain:{ *:[v4i32] } 331:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm))  =>  (UABAv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
    2480             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABAv4i32,
    2481             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2482             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2483             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2484             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2485             :         GIR_EraseFromParent, /*InsnID*/0,
    2486             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2487             :         // GIR_Coverage, 1080,
    2488             :         GIR_Done,
    2489             :       // Label 140: @4434
    2490             :       GIM_Try, /*On fail goto*//*Label 141*/ 4498, // Rule ID 1297 //
    2491             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2492             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2493             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2494             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2495             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2496             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_smull,
    2497             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    2498             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s16,
    2499             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2500             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2501             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2502             :         // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, (intrinsic_wo_chain:{ *:[v4i32] } 290:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm))  =>  (SMLALv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2503             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMLALv4i16_v4i32,
    2504             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2505             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2506             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2507             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2508             :         GIR_EraseFromParent, /*InsnID*/0,
    2509             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2510             :         // GIR_Coverage, 1297,
    2511             :         GIR_Done,
    2512             :       // Label 141: @4498
    2513             :       GIM_Try, /*On fail goto*//*Label 142*/ 4562, // Rule ID 1357 //
    2514             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2515             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2516             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2517             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2518             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2519             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_umull,
    2520             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    2521             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s16,
    2522             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2523             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2524             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2525             :         // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, (intrinsic_wo_chain:{ *:[v4i32] } 344:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm))  =>  (UMLALv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2526             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMLALv4i16_v4i32,
    2527             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2528             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2529             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2530             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2531             :         GIR_EraseFromParent, /*InsnID*/0,
    2532             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2533             :         // GIR_Coverage, 1357,
    2534             :         GIR_Done,
    2535             :       // Label 142: @4562
    2536             :       GIM_Try, /*On fail goto*//*Label 143*/ 4614, // Rule ID 693 //
    2537             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2538             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2539             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2540             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2541             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    2542             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_saddlp,
    2543             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
    2544             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2545             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2546             :         // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, (intrinsic_wo_chain:{ *:[v4i32] } 274:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn))  =>  (SADALPv8i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v8i16] }:$Rn)
    2547             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADALPv8i16_v4i32,
    2548             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2549             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2550             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2551             :         GIR_EraseFromParent, /*InsnID*/0,
    2552             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2553             :         // GIR_Coverage, 693,
    2554             :         GIR_Done,
    2555             :       // Label 143: @4614
    2556             :       GIM_Try, /*On fail goto*//*Label 144*/ 4666, // Rule ID 737 //
    2557             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2558             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2559             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2560             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2561             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    2562             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uaddlp,
    2563             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
    2564             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2565             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2566             :         // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, (intrinsic_wo_chain:{ *:[v4i32] } 332:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn))  =>  (UADALPv8i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v8i16] }:$Rn)
    2567             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADALPv8i16_v4i32,
    2568             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2569             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2570             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2571             :         GIR_EraseFromParent, /*InsnID*/0,
    2572             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2573             :         // GIR_Coverage, 737,
    2574             :         GIR_Done,
    2575             :       // Label 144: @4666
    2576             :       GIM_Try, /*On fail goto*//*Label 145*/ 4724, // Rule ID 1285 //
    2577             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2578             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2579             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    2580             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    2581             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2582             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    2583             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
    2584             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s16,
    2585             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2586             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2587             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    2588             :         // (add:{ *:[v4i32] } (sext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rn), (sext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rm))  =>  (SADDLv4i16_v4i32:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2589             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADDLv4i16_v4i32,
    2590             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    2591             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    2592             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rm
    2593             :         GIR_EraseFromParent, /*InsnID*/0,
    2594             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2595             :         // GIR_Coverage, 1285,
    2596             :         GIR_Done,
    2597             :       // Label 145: @4724
    2598             :       GIM_Try, /*On fail goto*//*Label 146*/ 4782, // Rule ID 1345 //
    2599             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2600             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2601             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    2602             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    2603             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2604             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    2605             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
    2606             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s16,
    2607             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2608             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2609             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    2610             :         // (add:{ *:[v4i32] } (zext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rn), (zext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rm))  =>  (UADDLv4i16_v4i32:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2611             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADDLv4i16_v4i32,
    2612             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    2613             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    2614             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rm
    2615             :         GIR_EraseFromParent, /*InsnID*/0,
    2616             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2617             :         // GIR_Coverage, 1345,
    2618             :         GIR_Done,
    2619             :       // Label 146: @4782
    2620             :       GIM_Try, /*On fail goto*//*Label 147*/ 4839, // Rule ID 3867 //
    2621             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2622             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2623             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    2624             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
    2625             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
    2626             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2627             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2628             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2629             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2630             :         // (add:{ *:[v4i32] } (mul:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm), V128:{ *:[v4i32] }:$Rd)  =>  (MLAv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
    2631             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLAv4i32,
    2632             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2633             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2634             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    2635             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    2636             :         GIR_EraseFromParent, /*InsnID*/0,
    2637             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2638             :         // GIR_Coverage, 3867,
    2639             :         GIR_Done,
    2640             :       // Label 147: @4839
    2641             :       GIM_Try, /*On fail goto*//*Label 148*/ 4884, // Rule ID 3930 //
    2642             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2643             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2644             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    2645             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    2646             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2647             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2648             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2649             :         // (add:{ *:[v4i32] } (sext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rm), V128:{ *:[v4i32] }:$Rn)  =>  (SADDWv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2650             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADDWv4i16_v4i32,
    2651             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    2652             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    2653             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    2654             :         GIR_EraseFromParent, /*InsnID*/0,
    2655             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2656             :         // GIR_Coverage, 3930,
    2657             :         GIR_Done,
    2658             :       // Label 148: @4884
    2659             :       GIM_Try, /*On fail goto*//*Label 149*/ 4929, // Rule ID 3948 //
    2660             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2661             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2662             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    2663             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    2664             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2665             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2666             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2667             :         // (add:{ *:[v4i32] } (zext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rm), V128:{ *:[v4i32] }:$Rn)  =>  (UADDWv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2668             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADDWv4i16_v4i32,
    2669             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    2670             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    2671             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    2672             :         GIR_EraseFromParent, /*InsnID*/0,
    2673             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2674             :         // GIR_Coverage, 3948,
    2675             :         GIR_Done,
    2676             :       // Label 149: @4929
    2677             :       GIM_Try, /*On fail goto*//*Label 150*/ 4986, // Rule ID 949 //
    2678             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2679             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2680             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2681             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    2682             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
    2683             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
    2684             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2685             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2686             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2687             :         // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, (mul:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm))  =>  (MLAv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
    2688             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLAv4i32,
    2689             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2690             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2691             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    2692             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    2693             :         GIR_EraseFromParent, /*InsnID*/0,
    2694             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2695             :         // GIR_Coverage, 949,
    2696             :         GIR_Done,
    2697             :       // Label 150: @4986
    2698             :       GIM_Try, /*On fail goto*//*Label 151*/ 5031, // Rule ID 1291 //
    2699             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2700             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2701             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2702             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    2703             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    2704             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2705             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2706             :         // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, (sext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rm))  =>  (SADDWv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2707             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADDWv4i16_v4i32,
    2708             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    2709             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    2710             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    2711             :         GIR_EraseFromParent, /*InsnID*/0,
    2712             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2713             :         // GIR_Coverage, 1291,
    2714             :         GIR_Done,
    2715             :       // Label 151: @5031
    2716             :       GIM_Try, /*On fail goto*//*Label 152*/ 5076, // Rule ID 1351 //
    2717             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2718             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2719             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2720             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    2721             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    2722             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2723             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2724             :         // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, (zext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rm))  =>  (UADDWv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2725             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADDWv4i16_v4i32,
    2726             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    2727             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    2728             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    2729             :         GIR_EraseFromParent, /*InsnID*/0,
    2730             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2731             :         // GIR_Coverage, 1351,
    2732             :         GIR_Done,
    2733             :       // Label 152: @5076
    2734             :       GIM_Try, /*On fail goto*//*Label 153*/ 5095, // Rule ID 773 //
    2735             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2736             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2737             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2738             :         // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (ADDv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
    2739             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ADDv4i32,
    2740             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2741             :         // GIR_Coverage, 773,
    2742             :         GIR_Done,
    2743             :       // Label 153: @5095
    2744             :       GIM_Reject,
    2745             :     // Label 128: @5096
    2746             :     GIM_Reject,
    2747             :     // Label 59: @5097
    2748             :     GIM_Try, /*On fail goto*//*Label 154*/ 5501,
    2749             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    2750             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
    2751             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    2752             :       GIM_Try, /*On fail goto*//*Label 155*/ 5175, // Rule ID 3868 //
    2753             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2754             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2755             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2756             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2757             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    2758             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    2759             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s8,
    2760             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2761             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2762             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2763             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2764             :         // (add:{ *:[v8i8] } (intrinsic_wo_chain:{ *:[v8i8] } 273:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm), V64:{ *:[v8i8] }:$Rd)  =>  (SABAv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    2765             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABAv8i8,
    2766             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2767             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2768             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2769             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2770             :         GIR_EraseFromParent, /*InsnID*/0,
    2771             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2772             :         // GIR_Coverage, 3868,
    2773             :         GIR_Done,
    2774             :       // Label 155: @5175
    2775             :       GIM_Try, /*On fail goto*//*Label 156*/ 5239, // Rule ID 3874 //
    2776             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2777             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2778             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2779             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2780             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    2781             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    2782             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s8,
    2783             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2784             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2785             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2786             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2787             :         // (add:{ *:[v8i8] } (intrinsic_wo_chain:{ *:[v8i8] } 331:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm), V64:{ *:[v8i8] }:$Rd)  =>  (UABAv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    2788             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABAv8i8,
    2789             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2790             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2791             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2792             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2793             :         GIR_EraseFromParent, /*InsnID*/0,
    2794             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2795             :         // GIR_Coverage, 3874,
    2796             :         GIR_Done,
    2797             :       // Label 156: @5239
    2798             :       GIM_Try, /*On fail goto*//*Label 157*/ 5303, // Rule ID 964 //
    2799             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2800             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2801             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2802             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2803             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2804             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    2805             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    2806             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s8,
    2807             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2808             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2809             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2810             :         // (add:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rd, (intrinsic_wo_chain:{ *:[v8i8] } 273:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm))  =>  (SABAv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    2811             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABAv8i8,
    2812             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2813             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2814             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2815             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2816             :         GIR_EraseFromParent, /*InsnID*/0,
    2817             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2818             :         // GIR_Coverage, 964,
    2819             :         GIR_Done,
    2820             :       // Label 157: @5303
    2821             :       GIM_Try, /*On fail goto*//*Label 158*/ 5367, // Rule ID 1075 //
    2822             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2823             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2824             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2825             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2826             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2827             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    2828             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    2829             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s8,
    2830             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2831             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2832             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2833             :         // (add:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rd, (intrinsic_wo_chain:{ *:[v8i8] } 331:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm))  =>  (UABAv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    2834             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABAv8i8,
    2835             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2836             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2837             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2838             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2839             :         GIR_EraseFromParent, /*InsnID*/0,
    2840             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2841             :         // GIR_Coverage, 1075,
    2842             :         GIR_Done,
    2843             :       // Label 158: @5367
    2844             :       GIM_Try, /*On fail goto*//*Label 159*/ 5424, // Rule ID 3862 //
    2845             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2846             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2847             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    2848             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    2849             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    2850             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2851             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2852             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2853             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2854             :         // (add:{ *:[v8i8] } (mul:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm), V64:{ *:[v8i8] }:$Rd)  =>  (MLAv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    2855             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLAv8i8,
    2856             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2857             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2858             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    2859             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    2860             :         GIR_EraseFromParent, /*InsnID*/0,
    2861             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2862             :         // GIR_Coverage, 3862,
    2863             :         GIR_Done,
    2864             :       // Label 159: @5424
    2865             :       GIM_Try, /*On fail goto*//*Label 160*/ 5481, // Rule ID 944 //
    2866             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2867             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2868             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2869             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    2870             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    2871             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    2872             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2873             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2874             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2875             :         // (add:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rd, (mul:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm))  =>  (MLAv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    2876             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLAv8i8,
    2877             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2878             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2879             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    2880             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    2881             :         GIR_EraseFromParent, /*InsnID*/0,
    2882             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2883             :         // GIR_Coverage, 944,
    2884             :         GIR_Done,
    2885             :       // Label 160: @5481
    2886             :       GIM_Try, /*On fail goto*//*Label 161*/ 5500, // Rule ID 768 //
    2887             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2888             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2889             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2890             :         // (add:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (ADDv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    2891             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ADDv8i8,
    2892             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2893             :         // GIR_Coverage, 768,
    2894             :         GIR_Done,
    2895             :       // Label 161: @5500
    2896             :       GIM_Reject,
    2897             :     // Label 154: @5501
    2898             :     GIM_Reject,
    2899             :     // Label 60: @5502
    2900             :     GIM_Try, /*On fail goto*//*Label 162*/ 6974,
    2901             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    2902             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    2903             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    2904             :       GIM_Try, /*On fail goto*//*Label 163*/ 5593, // Rule ID 3922 //
    2905             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2906             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2907             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    2908             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    2909             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    2910             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_INTRINSIC,
    2911             :         GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
    2912             :         GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    2913             :         GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s8,
    2914             :         GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v8s8,
    2915             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2916             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2917             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2918             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2919             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    2920             :         // (add:{ *:[v8i16] } (zext:{ *:[v8i16] } (intrinsic_wo_chain:{ *:[v8i8] } 273:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)), V128:{ *:[v8i16] }:$Rd)  =>  (SABALv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    2921             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABALv8i8_v8i16,
    2922             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2923             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2924             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // Rn
    2925             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // Rm
    2926             :         GIR_EraseFromParent, /*InsnID*/0,
    2927             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2928             :         // GIR_Coverage, 3922,
    2929             :         GIR_Done,
    2930             :       // Label 163: @5593
    2931             :       GIM_Try, /*On fail goto*//*Label 164*/ 5670, // Rule ID 3940 //
    2932             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2933             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2934             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    2935             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    2936             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    2937             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_INTRINSIC,
    2938             :         GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
    2939             :         GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    2940             :         GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s8,
    2941             :         GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v8s8,
    2942             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2943             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2944             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2945             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2946             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    2947             :         // (add:{ *:[v8i16] } (zext:{ *:[v8i16] } (intrinsic_wo_chain:{ *:[v8i8] } 331:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)), V128:{ *:[v8i16] }:$Rd)  =>  (UABALv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    2948             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABALv8i8_v8i16,
    2949             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2950             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2951             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // Rn
    2952             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // Rm
    2953             :         GIR_EraseFromParent, /*InsnID*/0,
    2954             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2955             :         // GIR_Coverage, 3940,
    2956             :         GIR_Done,
    2957             :       // Label 164: @5670
    2958             :       GIM_Try, /*On fail goto*//*Label 165*/ 5747, // Rule ID 1271 //
    2959             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2960             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2961             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2962             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    2963             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    2964             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    2965             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_INTRINSIC,
    2966             :         GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
    2967             :         GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    2968             :         GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s8,
    2969             :         GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v8s8,
    2970             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2971             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2972             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2973             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    2974             :         // (add:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, (zext:{ *:[v8i16] } (intrinsic_wo_chain:{ *:[v8i8] } 273:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)))  =>  (SABALv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    2975             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABALv8i8_v8i16,
    2976             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2977             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2978             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // Rn
    2979             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // Rm
    2980             :         GIR_EraseFromParent, /*InsnID*/0,
    2981             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2982             :         // GIR_Coverage, 1271,
    2983             :         GIR_Done,
    2984             :       // Label 165: @5747
    2985             :       GIM_Try, /*On fail goto*//*Label 166*/ 5824, // Rule ID 1337 //
    2986             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2987             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2988             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2989             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    2990             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    2991             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    2992             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_INTRINSIC,
    2993             :         GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
    2994             :         GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    2995             :         GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s8,
    2996             :         GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v8s8,
    2997             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2998             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2999             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3000             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    3001             :         // (add:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, (zext:{ *:[v8i16] } (intrinsic_wo_chain:{ *:[v8i8] } 331:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)))  =>  (UABALv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    3002             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABALv8i8_v8i16,
    3003             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3004             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    3005             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // Rn
    3006             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // Rm
    3007             :         GIR_EraseFromParent, /*InsnID*/0,
    3008             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3009             :         // GIR_Coverage, 1337,
    3010             :         GIR_Done,
    3011             :       // Label 166: @5824
    3012             :       GIM_Try, /*On fail goto*//*Label 167*/ 5888, // Rule ID 3871 //
    3013             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3014             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    3015             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3016             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    3017             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    3018             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
    3019             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s16,
    3020             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3021             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    3022             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3023             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3024             :         // (add:{ *:[v8i16] } (intrinsic_wo_chain:{ *:[v8i16] } 273:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm), V128:{ *:[v8i16] }:$Rd)  =>  (SABAv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
    3025             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABAv8i16,
    3026             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3027             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    3028             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3029             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    3030             :         GIR_EraseFromParent, /*InsnID*/0,
    3031             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3032             :         // GIR_Coverage, 3871,
    3033             :         GIR_Done,
    3034             :       // Label 167: @5888
    3035             :       GIM_Try, /*On fail goto*//*Label 168*/ 5952, // Rule ID 3877 //
    3036             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3037             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    3038             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3039             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    3040             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    3041             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
    3042             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s16,
    3043             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3044             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    3045             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3046             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3047             :         // (add:{ *:[v8i16] } (intrinsic_wo_chain:{ *:[v8i16] } 331:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm), V128:{ *:[v8i16] }:$Rd)  =>  (UABAv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
    3048             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABAv8i16,
    3049             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3050             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    3051             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3052             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    3053             :         GIR_EraseFromParent, /*InsnID*/0,
    3054             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3055             :         // GIR_Coverage, 3877,
    3056             :         GIR_Done,
    3057             :       // Label 168: @5952
    3058             :       GIM_Try, /*On fail goto*//*Label 169*/ 6016, // Rule ID 3934 //
    3059             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3060             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    3061             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3062             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    3063             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_smull,
    3064             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    3065             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s8,
    3066             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    3067             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    3068             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3069             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3070             :         // (add:{ *:[v8i16] } (intrinsic_wo_chain:{ *:[v8i16] } 290:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm), V128:{ *:[v8i16] }:$Rd)  =>  (SMLALv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    3071             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMLALv8i8_v8i16,
    3072             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3073             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    3074             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3075             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    3076             :         GIR_EraseFromParent, /*InsnID*/0,
    3077             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3078             :         // GIR_Coverage, 3934,
    3079             :         GIR_Done,
    3080             :       // Label 169: @6016
    3081             :       GIM_Try, /*On fail goto*//*Label 170*/ 6080, // Rule ID 3952 //
    3082             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3083             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    3084             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3085             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    3086             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_umull,
    3087             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    3088             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s8,
    3089             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    3090             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    3091             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3092             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3093             :         // (add:{ *:[v8i16] } (intrinsic_wo_chain:{ *:[v8i16] } 344:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm), V128:{ *:[v8i16] }:$Rd)  =>  (UMLALv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    3094             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMLALv8i8_v8i16,
    3095             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3096             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    3097             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3098             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    3099             :         GIR_EraseFromParent, /*InsnID*/0,
    3100             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3101             :         // GIR_Coverage, 3952,
    3102             :         GIR_Done,
    3103             :       // Label 170: @6080
    3104             :       GIM_Try, /*On fail goto*//*Label 171*/ 6132, // Rule ID 3851 //
    3105             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3106             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    3107             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3108             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    3109             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_saddlp,
    3110             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
    3111             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3112             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3113             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3114             :         // (add:{ *:[v8i16] } (intrinsic_wo_chain:{ *:[v8i16] } 274:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn), V128:{ *:[v8i16] }:$Rd)  =>  (SADALPv16i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V128:{ *:[v16i8] }:$Rn)
    3115             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADALPv16i8_v8i16,
    3116             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3117             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    3118             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3119             :         GIR_EraseFromParent, /*InsnID*/0,
    3120             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3121             :         // GIR_Coverage, 3851,
    3122             :         GIR_Done,
    3123             :       // Label 171: @6132
    3124             :       GIM_Try, /*On fail goto*//*Label 172*/ 6184, // Rule ID 3857 //
    3125             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3126             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    3127             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3128             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    3129             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uaddlp,
    3130             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
    3131             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3132             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3133             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3134             :         // (add:{ *:[v8i16] } (intrinsic_wo_chain:{ *:[v8i16] } 332:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn), V128:{ *:[v8i16] }:$Rd)  =>  (UADALPv16i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V128:{ *:[v16i8] }:$Rn)
    3135             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADALPv16i8_v8i16,
    3136             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3137             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    3138             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3139             :         GIR_EraseFromParent, /*InsnID*/0,
    3140             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3141             :         // GIR_Coverage, 3857,
    3142             :         GIR_Done,
    3143             :       // Label 172: @6184
    3144             :       GIM_Try, /*On fail goto*//*Label 173*/ 6248, // Rule ID 967 //
    3145             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3146             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3147             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3148             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3149             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    3150             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    3151             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
    3152             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s16,
    3153             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3154             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    3155             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3156             :         // (add:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, (intrinsic_wo_chain:{ *:[v8i16] } 273:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm))  =>  (SABAv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
    3157             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABAv8i16,
    3158             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3159             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    3160             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3161             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    3162             :         GIR_EraseFromParent, /*InsnID*/0,
    3163             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3164             :         // GIR_Coverage, 967,
    3165             :         GIR_Done,
    3166             :       // Label 173: @6248
    3167             :       GIM_Try, /*On fail goto*//*Label 174*/ 6312, // Rule ID 1078 //
    3168             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3169             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3170             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3171             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3172             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    3173             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    3174             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
    3175             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s16,
    3176             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3177             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    3178             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3179             :         // (add:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, (intrinsic_wo_chain:{ *:[v8i16] } 331:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm))  =>  (UABAv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
    3180             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABAv8i16,
    3181             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3182             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    3183             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3184             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    3185             :         GIR_EraseFromParent, /*InsnID*/0,
    3186             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3187             :         // GIR_Coverage, 1078,
    3188             :         GIR_Done,
    3189             :       // Label 174: @6312
    3190             :       GIM_Try, /*On fail goto*//*Label 175*/ 6376, // Rule ID 1295 //
    3191             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3192             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3193             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3194             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3195             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    3196             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_smull,
    3197             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    3198             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s8,
    3199             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    3200             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    3201             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3202             :         // (add:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, (intrinsic_wo_chain:{ *:[v8i16] } 290:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm))  =>  (SMLALv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    3203             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMLALv8i8_v8i16,
    3204             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3205             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    3206             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3207             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    3208             :         GIR_EraseFromParent, /*InsnID*/0,
    3209             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3210             :         // GIR_Coverage, 1295,
    3211             :         GIR_Done,
    3212             :       // Label 175: @6376
    3213             :       GIM_Try, /*On fail goto*//*Label 176*/ 6440, // Rule ID 1355 //
    3214             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3215             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3216             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3217             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3218             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    3219             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_umull,
    3220             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    3221             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s8,
    3222             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    3223             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    3224             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3225             :         // (add:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, (intrinsic_wo_chain:{ *:[v8i16] } 344:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm))  =>  (UMLALv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    3226             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMLALv8i8_v8i16,
    3227             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3228             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    3229             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3230             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    3231             :         GIR_EraseFromParent, /*InsnID*/0,
    3232             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3233             :         // GIR_Coverage, 1355,
    3234             :         GIR_Done,
    3235             :       // Label 176: @6440
    3236             :       GIM_Try, /*On fail goto*//*Label 177*/ 6492, // Rule ID 691 //
    3237             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3238             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3239             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3240             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3241             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    3242             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_saddlp,
    3243             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
    3244             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3245             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3246             :         // (add:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, (intrinsic_wo_chain:{ *:[v8i16] } 274:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn))  =>  (SADALPv16i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V128:{ *:[v16i8] }:$Rn)
    3247             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADALPv16i8_v8i16,
    3248             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3249             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    3250             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3251             :         GIR_EraseFromParent, /*InsnID*/0,
    3252             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3253             :         // GIR_Coverage, 691,
    3254             :         GIR_Done,
    3255             :       // Label 177: @6492
    3256             :       GIM_Try, /*On fail goto*//*Label 178*/ 6544, // Rule ID 735 //
    3257             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3258             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3259             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3260             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3261             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    3262             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uaddlp,
    3263             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
    3264             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3265             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3266             :         // (add:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, (intrinsic_wo_chain:{ *:[v8i16] } 332:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn))  =>  (UADALPv16i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V128:{ *:[v16i8] }:$Rn)
    3267             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADALPv16i8_v8i16,
    3268             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3269             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    3270             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3271             :         GIR_EraseFromParent, /*InsnID*/0,
    3272             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3273             :         // GIR_Coverage, 735,
    3274             :         GIR_Done,
    3275             :       // Label 178: @6544
    3276             :       GIM_Try, /*On fail goto*//*Label 179*/ 6602, // Rule ID 1283 //
    3277             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3278             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    3279             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    3280             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    3281             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    3282             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    3283             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
    3284             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s8,
    3285             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    3286             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3287             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    3288             :         // (add:{ *:[v8i16] } (sext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rn), (sext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rm))  =>  (SADDLv8i8_v8i16:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    3289             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADDLv8i8_v8i16,
    3290             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3291             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    3292             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rm
    3293             :         GIR_EraseFromParent, /*InsnID*/0,
    3294             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3295             :         // GIR_Coverage, 1283,
    3296             :         GIR_Done,
    3297             :       // Label 179: @6602
    3298             :       GIM_Try, /*On fail goto*//*Label 180*/ 6660, // Rule ID 1343 //
    3299             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3300             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    3301             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    3302             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    3303             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    3304             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    3305             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
    3306             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s8,
    3307             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    3308             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3309             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    3310             :         // (add:{ *:[v8i16] } (zext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rn), (zext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rm))  =>  (UADDLv8i8_v8i16:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    3311             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADDLv8i8_v8i16,
    3312             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3313             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    3314             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rm
    3315             :         GIR_EraseFromParent, /*InsnID*/0,
    3316             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3317             :         // GIR_Coverage, 1343,
    3318             :         GIR_Done,
    3319             :       // Label 180: @6660
    3320             :       GIM_Try, /*On fail goto*//*Label 181*/ 6717, // Rule ID 3865 //
    3321             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3322             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    3323             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3324             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
    3325             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
    3326             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3327             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3328             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3329             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3330             :         // (add:{ *:[v8i16] } (mul:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm), V128:{ *:[v8i16] }:$Rd)  =>  (MLAv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
    3331             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLAv8i16,
    3332             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3333             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    3334             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    3335             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    3336             :         GIR_EraseFromParent, /*InsnID*/0,
    3337             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3338             :         // GIR_Coverage, 3865,
    3339             :         GIR_Done,
    3340             :       // Label 181: @6717
    3341             :       GIM_Try, /*On fail goto*//*Label 182*/ 6762, // Rule ID 3928 //
    3342             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3343             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    3344             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    3345             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    3346             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    3347             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3348             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3349             :         // (add:{ *:[v8i16] } (sext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rm), V128:{ *:[v8i16] }:$Rn)  =>  (SADDWv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    3350             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADDWv8i8_v8i16,
    3351             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3352             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    3353             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    3354             :         GIR_EraseFromParent, /*InsnID*/0,
    3355             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3356             :         // GIR_Coverage, 3928,
    3357             :         GIR_Done,
    3358             :       // Label 182: @6762
    3359             :       GIM_Try, /*On fail goto*//*Label 183*/ 6807, // Rule ID 3946 //
    3360             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3361             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    3362             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    3363             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    3364             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    3365             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3366             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3367             :         // (add:{ *:[v8i16] } (zext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rm), V128:{ *:[v8i16] }:$Rn)  =>  (UADDWv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    3368             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADDWv8i8_v8i16,
    3369             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3370             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    3371             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    3372             :         GIR_EraseFromParent, /*InsnID*/0,
    3373             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3374             :         // GIR_Coverage, 3946,
    3375             :         GIR_Done,
    3376             :       // Label 183: @6807
    3377             :       GIM_Try, /*On fail goto*//*Label 184*/ 6864, // Rule ID 947 //
    3378             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3379             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3380             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3381             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3382             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
    3383             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
    3384             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3385             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3386             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3387             :         // (add:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, (mul:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm))  =>  (MLAv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
    3388             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLAv8i16,
    3389             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3390             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    3391             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    3392             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    3393             :         GIR_EraseFromParent, /*InsnID*/0,
    3394             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3395             :         // GIR_Coverage, 947,
    3396             :         GIR_Done,
    3397             :       // Label 184: @6864
    3398             :       GIM_Try, /*On fail goto*//*Label 185*/ 6909, // Rule ID 1289 //
    3399             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3400             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3401             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3402             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    3403             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    3404             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    3405             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3406             :         // (add:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, (sext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rm))  =>  (SADDWv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    3407             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADDWv8i8_v8i16,
    3408             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3409             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    3410             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    3411             :         GIR_EraseFromParent, /*InsnID*/0,
    3412             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3413             :         // GIR_Coverage, 1289,
    3414             :         GIR_Done,
    3415             :       // Label 185: @6909
    3416             :       GIM_Try, /*On fail goto*//*Label 186*/ 6954, // Rule ID 1349 //
    3417             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3418             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3419             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3420             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    3421             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    3422             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    3423             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3424             :         // (add:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, (zext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rm))  =>  (UADDWv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    3425             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADDWv8i8_v8i16,
    3426             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3427             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    3428             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    3429             :         GIR_EraseFromParent, /*InsnID*/0,
    3430             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3431             :         // GIR_Coverage, 1349,
    3432             :         GIR_Done,
    3433             :       // Label 186: @6954
    3434             :       GIM_Try, /*On fail goto*//*Label 187*/ 6973, // Rule ID 771 //
    3435             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3436             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3437             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3438             :         // (add:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)  =>  (ADDv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
    3439             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ADDv8i16,
    3440             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3441             :         // GIR_Coverage, 771,
    3442             :         GIR_Done,
    3443             :       // Label 187: @6973
    3444             :       GIM_Reject,
    3445             :     // Label 162: @6974
    3446             :     GIM_Reject,
    3447             :     // Label 61: @6975
    3448             :     GIM_Try, /*On fail goto*//*Label 188*/ 7379,
    3449             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    3450             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    3451             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    3452             :       GIM_Try, /*On fail goto*//*Label 189*/ 7053, // Rule ID 3869 //
    3453             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3454             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    3455             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3456             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    3457             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    3458             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
    3459             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v16s8,
    3460             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3461             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    3462             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3463             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3464             :         // (add:{ *:[v16i8] } (intrinsic_wo_chain:{ *:[v16i8] } 273:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm), V128:{ *:[v16i8] }:$Rd)  =>  (SABAv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rd, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
    3465             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABAv16i8,
    3466             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3467             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    3468             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3469             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    3470             :         GIR_EraseFromParent, /*InsnID*/0,
    3471             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3472             :         // GIR_Coverage, 3869,
    3473             :         GIR_Done,
    3474             :       // Label 189: @7053
    3475             :       GIM_Try, /*On fail goto*//*Label 190*/ 7117, // Rule ID 3875 //
    3476             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3477             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    3478             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3479             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    3480             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    3481             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
    3482             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v16s8,
    3483             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3484             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    3485             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3486             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3487             :         // (add:{ *:[v16i8] } (intrinsic_wo_chain:{ *:[v16i8] } 331:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm), V128:{ *:[v16i8] }:$Rd)  =>  (UABAv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rd, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
    3488             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABAv16i8,
    3489             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3490             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    3491             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3492             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    3493             :         GIR_EraseFromParent, /*InsnID*/0,
    3494             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3495             :         // GIR_Coverage, 3875,
    3496             :         GIR_Done,
    3497             :       // Label 190: @7117
    3498             :       GIM_Try, /*On fail goto*//*Label 191*/ 7181, // Rule ID 965 //
    3499             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3500             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3501             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3502             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3503             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    3504             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    3505             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
    3506             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v16s8,
    3507             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3508             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    3509             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3510             :         // (add:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rd, (intrinsic_wo_chain:{ *:[v16i8] } 273:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm))  =>  (SABAv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rd, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
    3511             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABAv16i8,
    3512             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3513             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    3514             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3515             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    3516             :         GIR_EraseFromParent, /*InsnID*/0,
    3517             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3518             :         // GIR_Coverage, 965,
    3519             :         GIR_Done,
    3520             :       // Label 191: @7181
    3521             :       GIM_Try, /*On fail goto*//*Label 192*/ 7245, // Rule ID 1076 //
    3522             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3523             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3524             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3525             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3526             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    3527             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    3528             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
    3529             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v16s8,
    3530             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3531             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    3532             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3533             :         // (add:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rd, (intrinsic_wo_chain:{ *:[v16i8] } 331:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm))  =>  (UABAv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rd, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
    3534             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABAv16i8,
    3535             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3536             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    3537             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3538             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    3539             :         GIR_EraseFromParent, /*InsnID*/0,
    3540             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3541             :         // GIR_Coverage, 1076,
    3542             :         GIR_Done,
    3543             :       // Label 192: @7245
    3544             :       GIM_Try, /*On fail goto*//*Label 193*/ 7302, // Rule ID 3863 //
    3545             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3546             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    3547             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3548             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
    3549             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
    3550             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3551             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3552             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3553             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3554             :         // (add:{ *:[v16i8] } (mul:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm), V128:{ *:[v16i8] }:$Rd)  =>  (MLAv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rd, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
    3555             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLAv16i8,
    3556             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3557             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    3558             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    3559             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    3560             :         GIR_EraseFromParent, /*InsnID*/0,
    3561             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3562             :         // GIR_Coverage, 3863,
    3563             :         GIR_Done,
    3564             :       // Label 193: @7302
    3565             :       GIM_Try, /*On fail goto*//*Label 194*/ 7359, // Rule ID 945 //
    3566             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3567             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3568             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3569             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3570             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
    3571             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
    3572             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3573             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3574             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3575             :         // (add:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rd, (mul:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm))  =>  (MLAv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rd, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
    3576             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLAv16i8,
    3577             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3578             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    3579             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    3580             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    3581             :         GIR_EraseFromParent, /*InsnID*/0,
    3582             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3583             :         // GIR_Coverage, 945,
    3584             :         GIR_Done,
    3585             :       // Label 194: @7359
    3586             :       GIM_Try, /*On fail goto*//*Label 195*/ 7378, // Rule ID 769 //
    3587             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3588             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3589             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3590             :         // (add:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (ADDv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
    3591             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ADDv16i8,
    3592             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3593             :         // GIR_Coverage, 769,
    3594             :         GIR_Done,
    3595             :       // Label 195: @7378
    3596             :       GIM_Reject,
    3597             :     // Label 188: @7379
    3598             :     GIM_Reject,
    3599             :     // Label 62: @7380
    3600             :     GIM_Reject,
    3601             :     // Label 1: @7381
    3602             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 11, /*)*//*default:*//*Label 205*/ 9961,
    3603             :     /*GILLT_s32*//*Label 196*/ 7397,
    3604             :     /*GILLT_s64*//*Label 197*/ 7517, 0,
    3605             :     /*GILLT_v2s32*//*Label 198*/ 8388,
    3606             :     /*GILLT_v2s64*//*Label 199*/ 8476,
    3607             :     /*GILLT_v4s16*//*Label 200*/ 8845,
    3608             :     /*GILLT_v4s32*//*Label 201*/ 8933,
    3609             :     /*GILLT_v8s8*//*Label 202*/ 9359,
    3610             :     /*GILLT_v8s16*//*Label 203*/ 9447,
    3611             :     /*GILLT_v16s8*//*Label 204*/ 9873,
    3612             :     // Label 196: @7397
    3613             :     GIM_Try, /*On fail goto*//*Label 206*/ 7516,
    3614             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    3615             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    3616             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    3617             :       GIM_Try, /*On fail goto*//*Label 207*/ 7465, // Rule ID 1879 //
    3618             :         GIM_CheckConstantInt, /*MI*/0, /*Op*/1, 0,
    3619             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3620             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3621             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    3622             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    3623             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    3624             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    3625             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3626             :         // (sub:{ *:[i32] } 0:{ *:[i32] }, (mul:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm))  =>  (MSUBWrrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm, WZR:{ *:[i32] })
    3627             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MSUBWrrr,
    3628             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3629             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    3630             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    3631             :         GIR_AddRegister, /*InsnID*/0, AArch64::WZR,
    3632             :         GIR_EraseFromParent, /*InsnID*/0,
    3633             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3634             :         // GIR_Coverage, 1879,
    3635             :         GIR_Done,
    3636             :       // Label 207: @7465
    3637             :       GIM_Try, /*On fail goto*//*Label 208*/ 7495, // Rule ID 1845 //
    3638             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32spRegClassID,
    3639             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/2, /*Renderer*/0, GICP_gi_addsub_shifted_imm32,
    3640             :         // (sub:{ *:[i32] } GPR32sp:{ *:[i32] }:$Rn, addsub_shifted_imm32:{ *:[i32] }:$imm)  =>  (SUBSWri:{ *:[i32] }:{ *:[i32] } GPR32sp:{ *:[i32] }:$Rn, addsub_shifted_imm32:{ *:[i32] }:$imm)
    3641             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SUBSWri,
    3642             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3643             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    3644             :         GIR_ComplexRenderer, /*InsnID*/0, /*RendererID*/0, // imm
    3645             :         GIR_EraseFromParent, /*InsnID*/0,
    3646             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3647             :         // GIR_Coverage, 1845,
    3648             :         GIR_Done,
    3649             :       // Label 208: @7495
    3650             :       GIM_Try, /*On fail goto*//*Label 209*/ 7515, // Rule ID 1847 //
    3651             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    3652             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    3653             :         // (sub:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)  =>  (SUBSWrr:{ *:[i32] }:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
    3654             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SUBSWrr,
    3655             :         GIR_AddImplicitDef, /*InsnID*/0, AArch64::NZCV,
    3656             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3657             :         // GIR_Coverage, 1847,
    3658             :         GIR_Done,
    3659             :       // Label 209: @7515
    3660             :       GIM_Reject,
    3661             :     // Label 206: @7516
    3662             :     GIM_Reject,
    3663             :     // Label 197: @7517
    3664             :     GIM_Try, /*On fail goto*//*Label 210*/ 8387,
    3665             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    3666             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    3667             :       GIM_Try, /*On fail goto*//*Label 211*/ 7622, // Rule ID 1890 //
    3668             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    3669             :         GIM_CheckConstantInt, /*MI*/0, /*Op*/1, 0,
    3670             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3671             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3672             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    3673             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    3674             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    3675             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
    3676             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    3677             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    3678             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
    3679             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_CONSTANT,
    3680             :         GIM_CheckI64ImmPredicate, /*MI*/3, /*Predicate*/GIPFP_I64_Predicate_s64imm_32bit,
    3681             :         // MIs[3] Operand 1
    3682             :         // No operand predicates
    3683             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3684             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    3685             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
    3686             :         // (sub:{ *:[i64] } 0:{ *:[i64] }, (mul:{ *:[i64] } (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (imm:{ *:[i64] })<<P:Predicate_s64imm_32bit>>:$C))  =>  (SMSUBLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, (MOVi32imm:{ *:[i32] } (trunc_imm:{ *:[i32] } (imm:{ *:[i64] }):$C)), XZR:{ *:[i64] })
    3687             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
    3688             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::MOVi32imm,
    3689             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    3690             :         GIR_CustomRenderer, /*InsnID*/1, /*OldInsnID*/3, /*Renderer*/GICR_renderTruncImm, // C
    3691             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    3692             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMSUBLrrr,
    3693             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3694             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    3695             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    3696             :         GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
    3697             :         GIR_EraseFromParent, /*InsnID*/0,
    3698             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3699             :         // GIR_Coverage, 1890,
    3700             :         GIR_Done,
    3701             :       // Label 211: @7622
    3702             :       GIM_Try, /*On fail goto*//*Label 212*/ 7717, // Rule ID 1891 //
    3703             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    3704             :         GIM_CheckConstantInt, /*MI*/0, /*Op*/1, 0,
    3705             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3706             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3707             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    3708             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    3709             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    3710             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
    3711             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    3712             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    3713             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
    3714             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_CONSTANT,
    3715             :         GIM_CheckI64ImmPredicate, /*MI*/3, /*Predicate*/GIPFP_I64_Predicate_i64imm_32bit,
    3716             :         // MIs[3] Operand 1
    3717             :         // No operand predicates
    3718             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3719             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    3720             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
    3721             :         // (sub:{ *:[i64] } 0:{ *:[i64] }, (mul:{ *:[i64] } (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (imm:{ *:[i64] })<<P:Predicate_i64imm_32bit>>:$C))  =>  (UMSUBLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, (MOVi32imm:{ *:[i32] } (trunc_imm:{ *:[i32] } (imm:{ *:[i64] }):$C)), XZR:{ *:[i64] })
    3722             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
    3723             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::MOVi32imm,
    3724             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    3725             :         GIR_CustomRenderer, /*InsnID*/1, /*OldInsnID*/3, /*Renderer*/GICR_renderTruncImm, // C
    3726             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    3727             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMSUBLrrr,
    3728             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3729             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    3730             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    3731             :         GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
    3732             :         GIR_EraseFromParent, /*InsnID*/0,
    3733             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3734             :         // GIR_Coverage, 1891,
    3735             :         GIR_Done,
    3736             :       // Label 212: @7717
    3737             :       GIM_Try, /*On fail goto*//*Label 213*/ 7801, // Rule ID 1885 //
    3738             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    3739             :         GIM_CheckConstantInt, /*MI*/0, /*Op*/1, 0,
    3740             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3741             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3742             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    3743             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    3744             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    3745             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
    3746             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    3747             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    3748             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
    3749             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_SEXT,
    3750             :         GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_s32,
    3751             :         GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    3752             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3753             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    3754             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
    3755             :         // (sub:{ *:[i64] } 0:{ *:[i64] }, (mul:{ *:[i64] } (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rm)))  =>  (SMSUBLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm, XZR:{ *:[i64] })
    3756             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMSUBLrrr,
    3757             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3758             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    3759             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // Rm
    3760             :         GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
    3761             :         GIR_EraseFromParent, /*InsnID*/0,
    3762             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3763             :         // GIR_Coverage, 1885,
    3764             :         GIR_Done,
    3765             :       // Label 213: @7801
    3766             :       GIM_Try, /*On fail goto*//*Label 214*/ 7885, // Rule ID 1886 //
    3767             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    3768             :         GIM_CheckConstantInt, /*MI*/0, /*Op*/1, 0,
    3769             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3770             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3771             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    3772             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    3773             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    3774             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
    3775             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    3776             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    3777             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
    3778             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_ZEXT,
    3779             :         GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_s32,
    3780             :         GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    3781             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3782             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    3783             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
    3784             :         // (sub:{ *:[i64] } 0:{ *:[i64] }, (mul:{ *:[i64] } (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rm)))  =>  (UMSUBLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm, XZR:{ *:[i64] })
    3785             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMSUBLrrr,
    3786             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3787             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    3788             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // Rm
    3789             :         GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
    3790             :         GIR_EraseFromParent, /*InsnID*/0,
    3791             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3792             :         // GIR_Coverage, 1886,
    3793             :         GIR_Done,
    3794             :       // Label 214: @7885
    3795             :       GIM_Try, /*On fail goto*//*Label 215*/ 7981, // Rule ID 1896 //
    3796             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    3797             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    3798             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3799             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3800             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    3801             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    3802             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    3803             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
    3804             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    3805             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    3806             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
    3807             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_CONSTANT,
    3808             :         GIM_CheckI64ImmPredicate, /*MI*/3, /*Predicate*/GIPFP_I64_Predicate_s64imm_32bit,
    3809             :         // MIs[3] Operand 1
    3810             :         // No operand predicates
    3811             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3812             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    3813             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
    3814             :         // (sub:{ *:[i64] } GPR64:{ *:[i64] }:$Ra, (mul:{ *:[i64] } (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (imm:{ *:[i64] })<<P:Predicate_s64imm_32bit>>:$C))  =>  (SMSUBLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, (MOVi32imm:{ *:[i32] } (trunc_imm:{ *:[i32] } (imm:{ *:[i64] }):$C)), GPR64:{ *:[i64] }:$Ra)
    3815             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
    3816             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::MOVi32imm,
    3817             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    3818             :         GIR_CustomRenderer, /*InsnID*/1, /*OldInsnID*/3, /*Renderer*/GICR_renderTruncImm, // C
    3819             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    3820             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMSUBLrrr,
    3821             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3822             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    3823             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    3824             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Ra
    3825             :         GIR_EraseFromParent, /*InsnID*/0,
    3826             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3827             :         // GIR_Coverage, 1896,
    3828             :         GIR_Done,
    3829             :       // Label 215: @7981
    3830             :       GIM_Try, /*On fail goto*//*Label 216*/ 8077, // Rule ID 1897 //
    3831             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    3832             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    3833             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3834             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3835             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    3836             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    3837             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    3838             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
    3839             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    3840             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    3841             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
    3842             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_CONSTANT,
    3843             :         GIM_CheckI64ImmPredicate, /*MI*/3, /*Predicate*/GIPFP_I64_Predicate_i64imm_32bit,
    3844             :         // MIs[3] Operand 1
    3845             :         // No operand predicates
    3846             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3847             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    3848             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
    3849             :         // (sub:{ *:[i64] } GPR64:{ *:[i64] }:$Ra, (mul:{ *:[i64] } (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (imm:{ *:[i64] })<<P:Predicate_i64imm_32bit>>:$C))  =>  (UMSUBLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, (MOVi32imm:{ *:[i32] } (trunc_imm:{ *:[i32] } (imm:{ *:[i64] }):$C)), GPR64:{ *:[i64] }:$Ra)
    3850             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
    3851             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::MOVi32imm,
    3852             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    3853             :         GIR_CustomRenderer, /*InsnID*/1, /*OldInsnID*/3, /*Renderer*/GICR_renderTruncImm, // C
    3854             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    3855             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMSUBLrrr,
    3856             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3857             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    3858             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    3859             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Ra
    3860             :         GIR_EraseFromParent, /*InsnID*/0,
    3861             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3862             :         // GIR_Coverage, 1897,
    3863             :         GIR_Done,
    3864             :       // Label 216: @8077
    3865             :       GIM_Try, /*On fail goto*//*Label 217*/ 8162, // Rule ID 66 //
    3866             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    3867             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    3868             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3869             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3870             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    3871             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    3872             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    3873             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
    3874             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    3875             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    3876             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
    3877             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_SEXT,
    3878             :         GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_s32,
    3879             :         GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    3880             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3881             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    3882             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
    3883             :         // (sub:{ *:[i64] } GPR64:{ *:[i64] }:$Ra, (mul:{ *:[i64] } (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rm)))  =>  (SMSUBLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm, GPR64:{ *:[i64] }:$Ra)
    3884             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMSUBLrrr,
    3885             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3886             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    3887             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // Rm
    3888             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Ra
    3889             :         GIR_EraseFromParent, /*InsnID*/0,
    3890             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3891             :         // GIR_Coverage, 66,
    3892             :         GIR_Done,
    3893             :       // Label 217: @8162
    3894             :       GIM_Try, /*On fail goto*//*Label 218*/ 8247, // Rule ID 68 //
    3895             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    3896             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    3897             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3898             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3899             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    3900             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    3901             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    3902             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
    3903             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    3904             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    3905             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
    3906             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_ZEXT,
    3907             :         GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_s32,
    3908             :         GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    3909             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3910             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    3911             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
    3912             :         // (sub:{ *:[i64] } GPR64:{ *:[i64] }:$Ra, (mul:{ *:[i64] } (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rm)))  =>  (UMSUBLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm, GPR64:{ *:[i64] }:$Ra)
    3913             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMSUBLrrr,
    3914             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3915             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    3916             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // Rm
    3917             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Ra
    3918             :         GIR_EraseFromParent, /*InsnID*/0,
    3919             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3920             :         // GIR_Coverage, 68,
    3921             :         GIR_Done,
    3922             :       // Label 218: @8247
    3923             :       GIM_Try, /*On fail goto*//*Label 219*/ 8305, // Rule ID 1880 //
    3924             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    3925             :         GIM_CheckConstantInt, /*MI*/0, /*Op*/1, 0,
    3926             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3927             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3928             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    3929             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    3930             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    3931             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    3932             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3933             :         // (sub:{ *:[i64] } 0:{ *:[i64] }, (mul:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm))  =>  (MSUBXrrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm, XZR:{ *:[i64] })
    3934             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MSUBXrrr,
    3935             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3936             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    3937             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    3938             :         GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
    3939             :         GIR_EraseFromParent, /*InsnID*/0,
    3940             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3941             :         // GIR_Coverage, 1880,
    3942             :         GIR_Done,
    3943             :       // Label 219: @8305
    3944             :       GIM_Try, /*On fail goto*//*Label 220*/ 8339, // Rule ID 1846 //
    3945             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    3946             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
    3947             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/2, /*Renderer*/0, GICP_gi_addsub_shifted_imm64,
    3948             :         // (sub:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, addsub_shifted_imm64:{ *:[i64] }:$imm)  =>  (SUBSXri:{ *:[i64] }:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, addsub_shifted_imm64:{ *:[i64] }:$imm)
    3949             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SUBSXri,
    3950             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3951             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    3952             :         GIR_ComplexRenderer, /*InsnID*/0, /*RendererID*/0, // imm
    3953             :         GIR_EraseFromParent, /*InsnID*/0,
    3954             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3955             :         // GIR_Coverage, 1846,
    3956             :         GIR_Done,
    3957             :       // Label 220: @8339
    3958             :       GIM_Try, /*On fail goto*//*Label 221*/ 8362, // Rule ID 1230 //
    3959             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3960             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    3961             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    3962             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    3963             :         // (sub:{ *:[v1i64] } FPR64:{ *:[v1i64] }:$Rn, FPR64:{ *:[v1i64] }:$Rm)  =>  (SUBv1i64:{ *:[v1i64] } FPR64:{ *:[v1i64] }:$Rn, FPR64:{ *:[v1i64] }:$Rm)
    3964             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SUBv1i64,
    3965             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3966             :         // GIR_Coverage, 1230,
    3967             :         GIR_Done,
    3968             :       // Label 221: @8362
    3969             :       GIM_Try, /*On fail goto*//*Label 222*/ 8386, // Rule ID 1848 //
    3970             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    3971             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    3972             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    3973             :         // (sub:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)  =>  (SUBSXrr:{ *:[i64] }:{ *:[i32] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
    3974             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SUBSXrr,
    3975             :         GIR_AddImplicitDef, /*InsnID*/0, AArch64::NZCV,
    3976             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3977             :         // GIR_Coverage, 1848,
    3978             :         GIR_Done,
    3979             :       // Label 222: @8386
    3980             :       GIM_Reject,
    3981             :     // Label 210: @8387
    3982             :     GIM_Reject,
    3983             :     // Label 198: @8388
    3984             :     GIM_Try, /*On fail goto*//*Label 223*/ 8475,
    3985             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    3986             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    3987             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    3988             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    3989             :       GIM_Try, /*On fail goto*//*Label 224*/ 8459, // Rule ID 954 //
    3990             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3991             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3992             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3993             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    3994             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    3995             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    3996             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    3997             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3998             :         // (sub:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, (mul:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm))  =>  (MLSv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    3999             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLSv2i32,
    4000             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4001             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    4002             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4003             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    4004             :         GIR_EraseFromParent, /*InsnID*/0,
    4005             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4006             :         // GIR_Coverage, 954,
    4007             :         GIR_Done,
    4008             :       // Label 224: @8459
    4009             :       GIM_Try, /*On fail goto*//*Label 225*/ 8474, // Rule ID 1072 //
    4010             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4011             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4012             :         // (sub:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)  =>  (SUBv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    4013             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SUBv2i32,
    4014             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4015             :         // GIR_Coverage, 1072,
    4016             :         GIR_Done,
    4017             :       // Label 225: @8474
    4018             :       GIM_Reject,
    4019             :     // Label 223: @8475
    4020             :     GIM_Reject,
    4021             :     // Label 199: @8476
    4022             :     GIM_Try, /*On fail goto*//*Label 226*/ 8844,
    4023             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    4024             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    4025             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    4026             :       GIM_Try, /*On fail goto*//*Label 227*/ 8554, // Rule ID 1305 //
    4027             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4028             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4029             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4030             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    4031             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    4032             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_smull,
    4033             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    4034             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s32,
    4035             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4036             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    4037             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4038             :         // (sub:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, (intrinsic_wo_chain:{ *:[v2i64] } 290:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm))  =>  (SMLSLv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    4039             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMLSLv2i32_v2i64,
    4040             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4041             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    4042             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    4043             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    4044             :         GIR_EraseFromParent, /*InsnID*/0,
    4045             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4046             :         // GIR_Coverage, 1305,
    4047             :         GIR_Done,
    4048             :       // Label 227: @8554
    4049             :       GIM_Try, /*On fail goto*//*Label 228*/ 8618, // Rule ID 1365 //
    4050             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4051             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4052             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4053             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    4054             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    4055             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_umull,
    4056             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    4057             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s32,
    4058             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4059             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    4060             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4061             :         // (sub:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, (intrinsic_wo_chain:{ *:[v2i64] } 344:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm))  =>  (UMLSLv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    4062             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMLSLv2i32_v2i64,
    4063             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4064             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    4065             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    4066             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    4067             :         GIR_EraseFromParent, /*InsnID*/0,
    4068             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4069             :         // GIR_Coverage, 1365,
    4070             :         GIR_Done,
    4071             :       // Label 228: @8618
    4072             :       GIM_Try, /*On fail goto*//*Label 229*/ 8676, // Rule ID 1329 //
    4073             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4074             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    4075             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    4076             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    4077             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4078             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    4079             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
    4080             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s32,
    4081             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4082             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4083             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    4084             :         // (sub:{ *:[v2i64] } (sext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rn), (sext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rm))  =>  (SSUBLv2i32_v2i64:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    4085             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SSUBLv2i32_v2i64,
    4086             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4087             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4088             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rm
    4089             :         GIR_EraseFromParent, /*InsnID*/0,
    4090             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4091             :         // GIR_Coverage, 1329,
    4092             :         GIR_Done,
    4093             :       // Label 229: @8676
    4094             :       GIM_Try, /*On fail goto*//*Label 230*/ 8734, // Rule ID 1377 //
    4095             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4096             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    4097             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    4098             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    4099             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4100             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    4101             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
    4102             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s32,
    4103             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4104             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4105             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    4106             :         // (sub:{ *:[v2i64] } (zext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rn), (zext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rm))  =>  (USUBLv2i32_v2i64:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    4107             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USUBLv2i32_v2i64,
    4108             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4109             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4110             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rm
    4111             :         GIR_EraseFromParent, /*InsnID*/0,
    4112             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4113             :         // GIR_Coverage, 1377,
    4114             :         GIR_Done,
    4115             :       // Label 230: @8734
    4116             :       GIM_Try, /*On fail goto*//*Label 231*/ 8779, // Rule ID 1335 //
    4117             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4118             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4119             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4120             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    4121             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    4122             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4123             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4124             :         // (sub:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, (sext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rm))  =>  (SSUBWv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    4125             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SSUBWv2i32_v2i64,
    4126             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4127             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    4128             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    4129             :         GIR_EraseFromParent, /*InsnID*/0,
    4130             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4131             :         // GIR_Coverage, 1335,
    4132             :         GIR_Done,
    4133             :       // Label 231: @8779
    4134             :       GIM_Try, /*On fail goto*//*Label 232*/ 8824, // Rule ID 1383 //
    4135             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4136             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4137             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4138             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    4139             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    4140             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4141             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4142             :         // (sub:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, (zext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rm))  =>  (USUBWv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    4143             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USUBWv2i32_v2i64,
    4144             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4145             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    4146             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    4147             :         GIR_EraseFromParent, /*InsnID*/0,
    4148             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4149             :         // GIR_Coverage, 1383,
    4150             :         GIR_Done,
    4151             :       // Label 232: @8824
    4152             :       GIM_Try, /*On fail goto*//*Label 233*/ 8843, // Rule ID 1074 //
    4153             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4154             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4155             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    4156             :         // (sub:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)  =>  (SUBv2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)
    4157             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SUBv2i64,
    4158             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4159             :         // GIR_Coverage, 1074,
    4160             :         GIR_Done,
    4161             :       // Label 233: @8843
    4162             :       GIM_Reject,
    4163             :     // Label 226: @8844
    4164             :     GIM_Reject,
    4165             :     // Label 200: @8845
    4166             :     GIM_Try, /*On fail goto*//*Label 234*/ 8932,
    4167             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    4168             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    4169             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    4170             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4171             :       GIM_Try, /*On fail goto*//*Label 235*/ 8916, // Rule ID 952 //
    4172             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4173             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4174             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    4175             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    4176             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    4177             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4178             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4179             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4180             :         // (sub:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, (mul:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm))  =>  (MLSv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    4181             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLSv4i16,
    4182             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4183             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    4184             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4185             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    4186             :         GIR_EraseFromParent, /*InsnID*/0,
    4187             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4188             :         // GIR_Coverage, 952,
    4189             :         GIR_Done,
    4190             :       // Label 235: @8916
    4191             :       GIM_Try, /*On fail goto*//*Label 236*/ 8931, // Rule ID 1070 //
    4192             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4193             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4194             :         // (sub:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)  =>  (SUBv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    4195             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SUBv4i16,
    4196             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4197             :         // GIR_Coverage, 1070,
    4198             :         GIR_Done,
    4199             :       // Label 236: @8931
    4200             :       GIM_Reject,
    4201             :     // Label 234: @8932
    4202             :     GIM_Reject,
    4203             :     // Label 201: @8933
    4204             :     GIM_Try, /*On fail goto*//*Label 237*/ 9358,
    4205             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    4206             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    4207             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    4208             :       GIM_Try, /*On fail goto*//*Label 238*/ 9011, // Rule ID 1303 //
    4209             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4210             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4211             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4212             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    4213             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    4214             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_smull,
    4215             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    4216             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s16,
    4217             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4218             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    4219             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4220             :         // (sub:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, (intrinsic_wo_chain:{ *:[v4i32] } 290:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm))  =>  (SMLSLv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    4221             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMLSLv4i16_v4i32,
    4222             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4223             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    4224             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    4225             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    4226             :         GIR_EraseFromParent, /*InsnID*/0,
    4227             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4228             :         // GIR_Coverage, 1303,
    4229             :         GIR_Done,
    4230             :       // Label 238: @9011
    4231             :       GIM_Try, /*On fail goto*//*Label 239*/ 9075, // Rule ID 1363 //
    4232             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4233             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4234             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4235             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    4236             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    4237             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_umull,
    4238             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    4239             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s16,
    4240             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4241             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    4242             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4243             :         // (sub:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, (intrinsic_wo_chain:{ *:[v4i32] } 344:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm))  =>  (UMLSLv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    4244             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMLSLv4i16_v4i32,
    4245             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4246             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    4247             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    4248             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    4249             :         GIR_EraseFromParent, /*InsnID*/0,
    4250             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4251             :         // GIR_Coverage, 1363,
    4252             :         GIR_Done,
    4253             :       // Label 239: @9075
    4254             :       GIM_Try, /*On fail goto*//*Label 240*/ 9133, // Rule ID 1327 //
    4255             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4256             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    4257             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    4258             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    4259             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4260             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    4261             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
    4262             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s16,
    4263             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4264             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4265             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    4266             :         // (sub:{ *:[v4i32] } (sext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rn), (sext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rm))  =>  (SSUBLv4i16_v4i32:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    4267             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SSUBLv4i16_v4i32,
    4268             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4269             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4270             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rm
    4271             :         GIR_EraseFromParent, /*InsnID*/0,
    4272             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4273             :         // GIR_Coverage, 1327,
    4274             :         GIR_Done,
    4275             :       // Label 240: @9133
    4276             :       GIM_Try, /*On fail goto*//*Label 241*/ 9191, // Rule ID 1375 //
    4277             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4278             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    4279             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    4280             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    4281             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4282             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    4283             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
    4284             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s16,
    4285             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4286             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4287             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    4288             :         // (sub:{ *:[v4i32] } (zext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rn), (zext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rm))  =>  (USUBLv4i16_v4i32:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    4289             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USUBLv4i16_v4i32,
    4290             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4291             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4292             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rm
    4293             :         GIR_EraseFromParent, /*InsnID*/0,
    4294             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4295             :         // GIR_Coverage, 1375,
    4296             :         GIR_Done,
    4297             :       // Label 241: @9191
    4298             :       GIM_Try, /*On fail goto*//*Label 242*/ 9248, // Rule ID 955 //
    4299             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4300             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4301             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4302             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    4303             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
    4304             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
    4305             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4306             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    4307             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4308             :         // (sub:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, (mul:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm))  =>  (MLSv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
    4309             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLSv4i32,
    4310             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4311             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    4312             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4313             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    4314             :         GIR_EraseFromParent, /*InsnID*/0,
    4315             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4316             :         // GIR_Coverage, 955,
    4317             :         GIR_Done,
    4318             :       // Label 242: @9248
    4319             :       GIM_Try, /*On fail goto*//*Label 243*/ 9293, // Rule ID 1333 //
    4320             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4321             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4322             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4323             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    4324             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    4325             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4326             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4327             :         // (sub:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, (sext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rm))  =>  (SSUBWv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    4328             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SSUBWv4i16_v4i32,
    4329             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4330             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    4331             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    4332             :         GIR_EraseFromParent, /*InsnID*/0,
    4333             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4334             :         // GIR_Coverage, 1333,
    4335             :         GIR_Done,
    4336             :       // Label 243: @9293
    4337             :       GIM_Try, /*On fail goto*//*Label 244*/ 9338, // Rule ID 1381 //
    4338             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4339             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4340             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4341             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    4342             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    4343             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4344             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4345             :         // (sub:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, (zext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rm))  =>  (USUBWv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    4346             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USUBWv4i16_v4i32,
    4347             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4348             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    4349             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    4350             :         GIR_EraseFromParent, /*InsnID*/0,
    4351             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4352             :         // GIR_Coverage, 1381,
    4353             :         GIR_Done,
    4354             :       // Label 244: @9338
    4355             :       GIM_Try, /*On fail goto*//*Label 245*/ 9357, // Rule ID 1073 //
    4356             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4357             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4358             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    4359             :         // (sub:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (SUBv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
    4360             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SUBv4i32,
    4361             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4362             :         // GIR_Coverage, 1073,
    4363             :         GIR_Done,
    4364             :       // Label 245: @9357
    4365             :       GIM_Reject,
    4366             :     // Label 237: @9358
    4367             :     GIM_Reject,
    4368             :     // Label 202: @9359
    4369             :     GIM_Try, /*On fail goto*//*Label 246*/ 9446,
    4370             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    4371             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
    4372             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    4373             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4374             :       GIM_Try, /*On fail goto*//*Label 247*/ 9430, // Rule ID 950 //
    4375             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4376             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4377             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    4378             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    4379             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    4380             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4381             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4382             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4383             :         // (sub:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rd, (mul:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm))  =>  (MLSv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    4384             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLSv8i8,
    4385             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4386             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    4387             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4388             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    4389             :         GIR_EraseFromParent, /*InsnID*/0,
    4390             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4391             :         // GIR_Coverage, 950,
    4392             :         GIR_Done,
    4393             :       // Label 247: @9430
    4394             :       GIM_Try, /*On fail goto*//*Label 248*/ 9445, // Rule ID 1068 //
    4395             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4396             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4397             :         // (sub:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (SUBv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    4398             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SUBv8i8,
    4399             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4400             :         // GIR_Coverage, 1068,
    4401             :         GIR_Done,
    4402             :       // Label 248: @9445
    4403             :       GIM_Reject,
    4404             :     // Label 246: @9446
    4405             :     GIM_Reject,
    4406             :     // Label 203: @9447
    4407             :     GIM_Try, /*On fail goto*//*Label 249*/ 9872,
    4408             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    4409             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    4410             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    4411             :       GIM_Try, /*On fail goto*//*Label 250*/ 9525, // Rule ID 1301 //
    4412             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4413             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4414             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4415             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    4416             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    4417             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_smull,
    4418             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    4419             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s8,
    4420             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4421             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    4422             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4423             :         // (sub:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, (intrinsic_wo_chain:{ *:[v8i16] } 290:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm))  =>  (SMLSLv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    4424             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMLSLv8i8_v8i16,
    4425             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4426             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    4427             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    4428             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    4429             :         GIR_EraseFromParent, /*InsnID*/0,
    4430             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4431             :         // GIR_Coverage, 1301,
    4432             :         GIR_Done,
    4433             :       // Label 250: @9525
    4434             :       GIM_Try, /*On fail goto*//*Label 251*/ 9589, // Rule ID 1361 //
    4435             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4436             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4437             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4438             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    4439             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    4440             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_umull,
    4441             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    4442             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s8,
    4443             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4444             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    4445             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4446             :         // (sub:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, (intrinsic_wo_chain:{ *:[v8i16] } 344:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm))  =>  (UMLSLv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    4447             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMLSLv8i8_v8i16,
    4448             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4449             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    4450             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    4451             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    4452             :         GIR_EraseFromParent, /*InsnID*/0,
    4453             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4454             :         // GIR_Coverage, 1361,
    4455             :         GIR_Done,
    4456             :       // Label 251: @9589
    4457             :       GIM_Try, /*On fail goto*//*Label 252*/ 9647, // Rule ID 1325 //
    4458             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4459             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    4460             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    4461             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    4462             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4463             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    4464             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
    4465             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s8,
    4466             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4467             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4468             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    4469             :         // (sub:{ *:[v8i16] } (sext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rn), (sext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rm))  =>  (SSUBLv8i8_v8i16:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    4470             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SSUBLv8i8_v8i16,
    4471             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4472             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4473             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rm
    4474             :         GIR_EraseFromParent, /*InsnID*/0,
    4475             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4476             :         // GIR_Coverage, 1325,
    4477             :         GIR_Done,
    4478             :       // Label 252: @9647
    4479             :       GIM_Try, /*On fail goto*//*Label 253*/ 9705, // Rule ID 1373 //
    4480             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4481             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    4482             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    4483             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    4484             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4485             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    4486             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
    4487             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s8,
    4488             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4489             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4490             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    4491             :         // (sub:{ *:[v8i16] } (zext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rn), (zext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rm))  =>  (USUBLv8i8_v8i16:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    4492             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USUBLv8i8_v8i16,
    4493             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4494             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4495             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rm
    4496             :         GIR_EraseFromParent, /*InsnID*/0,
    4497             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4498             :         // GIR_Coverage, 1373,
    4499             :         GIR_Done,
    4500             :       // Label 253: @9705
    4501             :       GIM_Try, /*On fail goto*//*Label 254*/ 9762, // Rule ID 953 //
    4502             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4503             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4504             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4505             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    4506             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
    4507             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
    4508             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4509             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    4510             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4511             :         // (sub:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, (mul:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm))  =>  (MLSv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
    4512             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLSv8i16,
    4513             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4514             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    4515             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4516             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    4517             :         GIR_EraseFromParent, /*InsnID*/0,
    4518             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4519             :         // GIR_Coverage, 953,
    4520             :         GIR_Done,
    4521             :       // Label 254: @9762
    4522             :       GIM_Try, /*On fail goto*//*Label 255*/ 9807, // Rule ID 1331 //
    4523             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4524             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4525             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4526             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    4527             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    4528             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4529             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4530             :         // (sub:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, (sext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rm))  =>  (SSUBWv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    4531             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SSUBWv8i8_v8i16,
    4532             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4533             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    4534             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    4535             :         GIR_EraseFromParent, /*InsnID*/0,
    4536             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4537             :         // GIR_Coverage, 1331,
    4538             :         GIR_Done,
    4539             :       // Label 255: @9807
    4540             :       GIM_Try, /*On fail goto*//*Label 256*/ 9852, // Rule ID 1379 //
    4541             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4542             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4543             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4544             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    4545             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    4546             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4547             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4548             :         // (sub:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, (zext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rm))  =>  (USUBWv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    4549             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USUBWv8i8_v8i16,
    4550             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4551             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    4552             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    4553             :         GIR_EraseFromParent, /*InsnID*/0,
    4554             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4555             :         // GIR_Coverage, 1379,
    4556             :         GIR_Done,
    4557             :       // Label 256: @9852
    4558             :       GIM_Try, /*On fail goto*//*Label 257*/ 9871, // Rule ID 1071 //
    4559             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4560             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4561             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    4562             :         // (sub:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)  =>  (SUBv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
    4563             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SUBv8i16,
    4564             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4565             :         // GIR_Coverage, 1071,
    4566             :         GIR_Done,
    4567             :       // Label 257: @9871
    4568             :       GIM_Reject,
    4569             :     // Label 249: @9872
    4570             :     GIM_Reject,
    4571             :     // Label 204: @9873
    4572             :     GIM_Try, /*On fail goto*//*Label 258*/ 9960,
    4573             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    4574             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    4575             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    4576             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4577             :       GIM_Try, /*On fail goto*//*Label 259*/ 9944, // Rule ID 951 //
    4578             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4579             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4580             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    4581             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
    4582             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
    4583             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4584             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    4585             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4586             :         // (sub:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rd, (mul:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm))  =>  (MLSv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rd, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
    4587             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLSv16i8,
    4588             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4589             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    4590             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4591             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    4592             :         GIR_EraseFromParent, /*InsnID*/0,
    4593             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4594             :         // GIR_Coverage, 951,
    4595             :         GIR_Done,
    4596             :       // Label 259: @9944
    4597             :       GIM_Try, /*On fail goto*//*Label 260*/ 9959, // Rule ID 1069 //
    4598             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4599             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    4600             :         // (sub:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (SUBv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
    4601             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SUBv16i8,
    4602             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4603             :         // GIR_Coverage, 1069,
    4604             :         GIR_Done,
    4605             :       // Label 260: @9959
    4606             :       GIM_Reject,
    4607             :     // Label 258: @9960
    4608             :     GIM_Reject,
    4609             :     // Label 205: @9961
    4610             :     GIM_Reject,
    4611             :     // Label 2: @9962
    4612             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 11, /*)*//*default:*//*Label 269*/ 10742,
    4613             :     /*GILLT_s32*//*Label 261*/ 9978,
    4614             :     /*GILLT_s64*//*Label 262*/ 10135, 0,
    4615             :     /*GILLT_v2s32*//*Label 263*/ 10550, 0,
    4616             :     /*GILLT_v4s16*//*Label 264*/ 10582,
    4617             :     /*GILLT_v4s32*//*Label 265*/ 10614,
    4618             :     /*GILLT_v8s8*//*Label 266*/ 10646,
    4619             :     /*GILLT_v8s16*//*Label 267*/ 10678,
    4620             :     /*GILLT_v16s8*//*Label 268*/ 10710,
    4621             :     // Label 261: @9978
    4622             :     GIM_Try, /*On fail goto*//*Label 270*/ 10134,
    4623             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    4624             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    4625             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    4626             :       GIM_Try, /*On fail goto*//*Label 271*/ 10046, // Rule ID 1881 //
    4627             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    4628             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB,
    4629             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    4630             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    4631             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 0,
    4632             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    4633             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    4634             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4635             :         // (mul:{ *:[i32] } (sub:{ *:[i32] } 0:{ *:[i32] }, GPR32:{ *:[i32] }:$Rn), GPR32:{ *:[i32] }:$Rm)  =>  (MSUBWrrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm, WZR:{ *:[i32] })
    4636             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MSUBWrrr,
    4637             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4638             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    4639             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
    4640             :         GIR_AddRegister, /*InsnID*/0, AArch64::WZR,
    4641             :         GIR_EraseFromParent, /*InsnID*/0,
    4642             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4643             :         // GIR_Coverage, 1881,
    4644             :         GIR_Done,
    4645             :       // Label 271: @10046
    4646             :       GIM_Try, /*On fail goto*//*Label 272*/ 10100, // Rule ID 4038 //
    4647             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    4648             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4649             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB,
    4650             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    4651             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    4652             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 0,
    4653             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    4654             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4655             :         // (mul:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, (sub:{ *:[i32] } 0:{ *:[i32] }, GPR32:{ *:[i32] }:$Rn))  =>  (MSUBWrrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm, WZR:{ *:[i32] })
    4656             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MSUBWrrr,
    4657             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4658             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    4659             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rm
    4660             :         GIR_AddRegister, /*InsnID*/0, AArch64::WZR,
    4661             :         GIR_EraseFromParent, /*InsnID*/0,
    4662             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4663             :         // GIR_Coverage, 4038,
    4664             :         GIR_Done,
    4665             :       // Label 272: @10100
    4666             :       GIM_Try, /*On fail goto*//*Label 273*/ 10133, // Rule ID 1877 //
    4667             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    4668             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    4669             :         // (mul:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)  =>  (MADDWrrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm, WZR:{ *:[i32] })
    4670             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MADDWrrr,
    4671             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4672             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    4673             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
    4674             :         GIR_AddRegister, /*InsnID*/0, AArch64::WZR,
    4675             :         GIR_EraseFromParent, /*InsnID*/0,
    4676             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4677             :         // GIR_Coverage, 1877,
    4678             :         GIR_Done,
    4679             :       // Label 273: @10133
    4680             :       GIM_Reject,
    4681             :     // Label 270: @10134
    4682             :     GIM_Reject,
    4683             :     // Label 262: @10135
    4684             :     GIM_Try, /*On fail goto*//*Label 274*/ 10549,
    4685             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    4686             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    4687             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    4688             :       GIM_Try, /*On fail goto*//*Label 275*/ 10203, // Rule ID 1882 //
    4689             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    4690             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB,
    4691             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    4692             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    4693             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 0,
    4694             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    4695             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    4696             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4697             :         // (mul:{ *:[i64] } (sub:{ *:[i64] } 0:{ *:[i64] }, GPR64:{ *:[i64] }:$Rn), GPR64:{ *:[i64] }:$Rm)  =>  (MSUBXrrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm, XZR:{ *:[i64] })
    4698             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MSUBXrrr,
    4699             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4700             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    4701             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
    4702             :         GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
    4703             :         GIR_EraseFromParent, /*InsnID*/0,
    4704             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4705             :         // GIR_Coverage, 1882,
    4706             :         GIR_Done,
    4707             :       // Label 275: @10203
    4708             :       GIM_Try, /*On fail goto*//*Label 276*/ 10257, // Rule ID 4039 //
    4709             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    4710             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4711             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB,
    4712             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    4713             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    4714             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 0,
    4715             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    4716             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4717             :         // (mul:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, (sub:{ *:[i64] } 0:{ *:[i64] }, GPR64:{ *:[i64] }:$Rn))  =>  (MSUBXrrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm, XZR:{ *:[i64] })
    4718             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MSUBXrrr,
    4719             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4720             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    4721             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rm
    4722             :         GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
    4723             :         GIR_EraseFromParent, /*InsnID*/0,
    4724             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4725             :         // GIR_Coverage, 4039,
    4726             :         GIR_Done,
    4727             :       // Label 276: @10257
    4728             :       GIM_Try, /*On fail goto*//*Label 277*/ 10327, // Rule ID 1887 //
    4729             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    4730             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    4731             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    4732             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    4733             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    4734             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_CONSTANT,
    4735             :         GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIPFP_I64_Predicate_s64imm_32bit,
    4736             :         // MIs[2] Operand 1
    4737             :         // No operand predicates
    4738             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4739             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    4740             :         // (mul:{ *:[i64] } (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (imm:{ *:[i64] })<<P:Predicate_s64imm_32bit>>:$C)  =>  (SMADDLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, (MOVi32imm:{ *:[i32] } (trunc_imm:{ *:[i32] } (imm:{ *:[i64] }):$C)), XZR:{ *:[i64] })
    4741             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
    4742             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::MOVi32imm,
    4743             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    4744             :         GIR_CustomRenderer, /*InsnID*/1, /*OldInsnID*/2, /*Renderer*/GICR_renderTruncImm, // C
    4745             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    4746             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMADDLrrr,
    4747             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4748             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4749             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    4750             :         GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
    4751             :         GIR_EraseFromParent, /*InsnID*/0,
    4752             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4753             :         // GIR_Coverage, 1887,
    4754             :         GIR_Done,
    4755             :       // Label 277: @10327
    4756             :       GIM_Try, /*On fail goto*//*Label 278*/ 10397, // Rule ID 1888 //
    4757             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    4758             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    4759             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    4760             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    4761             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    4762             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_CONSTANT,
    4763             :         GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIPFP_I64_Predicate_i64imm_32bit,
    4764             :         // MIs[2] Operand 1
    4765             :         // No operand predicates
    4766             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4767             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    4768             :         // (mul:{ *:[i64] } (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (imm:{ *:[i64] })<<P:Predicate_i64imm_32bit>>:$C)  =>  (UMADDLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, (MOVi32imm:{ *:[i32] } (trunc_imm:{ *:[i32] } (imm:{ *:[i64] }):$C)), XZR:{ *:[i64] })
    4769             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
    4770             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::MOVi32imm,
    4771             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    4772             :         GIR_CustomRenderer, /*InsnID*/1, /*OldInsnID*/2, /*Renderer*/GICR_renderTruncImm, // C
    4773             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    4774             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMADDLrrr,
    4775             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4776             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4777             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    4778             :         GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
    4779             :         GIR_EraseFromParent, /*InsnID*/0,
    4780             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4781             :         // GIR_Coverage, 1888,
    4782             :         GIR_Done,
    4783             :       // Label 278: @10397
    4784             :       GIM_Try, /*On fail goto*//*Label 279*/ 10456, // Rule ID 1883 //
    4785             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    4786             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    4787             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    4788             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    4789             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    4790             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
    4791             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    4792             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    4793             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4794             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    4795             :         // (mul:{ *:[i64] } (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rm))  =>  (SMADDLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm, XZR:{ *:[i64] })
    4796             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMADDLrrr,
    4797             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4798             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4799             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rm
    4800             :         GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
    4801             :         GIR_EraseFromParent, /*InsnID*/0,
    4802             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4803             :         // GIR_Coverage, 1883,
    4804             :         GIR_Done,
    4805             :       // Label 279: @10456
    4806             :       GIM_Try, /*On fail goto*//*Label 280*/ 10515, // Rule ID 1884 //
    4807             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    4808             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    4809             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    4810             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    4811             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    4812             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
    4813             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    4814             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    4815             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4816             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    4817             :         // (mul:{ *:[i64] } (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rm))  =>  (UMADDLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm, XZR:{ *:[i64] })
    4818             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMADDLrrr,
    4819             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4820             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4821             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rm
    4822             :         GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
    4823             :         GIR_EraseFromParent, /*InsnID*/0,
    4824             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4825             :         // GIR_Coverage, 1884,
    4826             :         GIR_Done,
    4827             :       // Label 280: @10515
    4828             :       GIM_Try, /*On fail goto*//*Label 281*/ 10548, // Rule ID 1878 //
    4829             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    4830             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    4831             :         // (mul:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)  =>  (MADDXrrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm, XZR:{ *:[i64] })
    4832             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MADDXrrr,
    4833             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4834             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    4835             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
    4836             :         GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
    4837             :         GIR_EraseFromParent, /*InsnID*/0,
    4838             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4839             :         // GIR_Coverage, 1878,
    4840             :         GIR_Done,
    4841             :       // Label 281: @10548
    4842             :       GIM_Reject,
    4843             :     // Label 274: @10549
    4844             :     GIM_Reject,
    4845             :     // Label 263: @10550
    4846             :     GIM_Try, /*On fail goto*//*Label 282*/ 10581, // Rule ID 960 //
    4847             :       GIM_CheckFeatures, GIFBS_HasNEON,
    4848             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    4849             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    4850             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    4851             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4852             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4853             :       // (mul:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)  =>  (MULv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    4854             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::MULv2i32,
    4855             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4856             :       // GIR_Coverage, 960,
    4857             :       GIR_Done,
    4858             :     // Label 282: @10581
    4859             :     GIM_Reject,
    4860             :     // Label 264: @10582
    4861             :     GIM_Try, /*On fail goto*//*Label 283*/ 10613, // Rule ID 958 //
    4862             :       GIM_CheckFeatures, GIFBS_HasNEON,
    4863             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    4864             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    4865             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    4866             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4867             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4868             :       // (mul:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)  =>  (MULv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    4869             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::MULv4i16,
    4870             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4871             :       // GIR_Coverage, 958,
    4872             :       GIR_Done,
    4873             :     // Label 283: @10613
    4874             :     GIM_Reject,
    4875             :     // Label 265: @10614
    4876             :     GIM_Try, /*On fail goto*//*Label 284*/ 10645, // Rule ID 961 //
    4877             :       GIM_CheckFeatures, GIFBS_HasNEON,
    4878             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    4879             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    4880             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    4881             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4882             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    4883             :       // (mul:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (MULv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
    4884             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::MULv4i32,
    4885             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4886             :       // GIR_Coverage, 961,
    4887             :       GIR_Done,
    4888             :     // Label 284: @10645
    4889             :     GIM_Reject,
    4890             :     // Label 266: @10646
    4891             :     GIM_Try, /*On fail goto*//*Label 285*/ 10677, // Rule ID 956 //
    4892             :       GIM_CheckFeatures, GIFBS_HasNEON,
    4893             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    4894             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
    4895             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    4896             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4897             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4898             :       // (mul:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (MULv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    4899             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::MULv8i8,
    4900             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4901             :       // GIR_Coverage, 956,
    4902             :       GIR_Done,
    4903             :     // Label 285: @10677
    4904             :     GIM_Reject,
    4905             :     // Label 267: @10678
    4906             :     GIM_Try, /*On fail goto*//*Label 286*/ 10709, // Rule ID 959 //
    4907             :       GIM_CheckFeatures, GIFBS_HasNEON,
    4908             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    4909             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    4910             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    4911             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4912             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    4913             :       // (mul:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)  =>  (MULv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
    4914             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::MULv8i16,
    4915             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4916             :       // GIR_Coverage, 959,
    4917             :       GIR_Done,
    4918             :     // Label 286: @10709
    4919             :     GIM_Reject,
    4920             :     // Label 268: @10710
    4921             :     GIM_Try, /*On fail goto*//*Label 287*/ 10741, // Rule ID 957 //
    4922             :       GIM_CheckFeatures, GIFBS_HasNEON,
    4923             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    4924             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    4925             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    4926             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4927             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    4928             :       // (mul:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (MULv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
    4929             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::MULv16i8,
    4930             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4931             :       // GIR_Coverage, 957,
    4932             :       GIR_Done,
    4933             :     // Label 287: @10741
    4934             :     GIM_Reject,
    4935             :     // Label 269: @10742
    4936             :     GIM_Reject,
    4937             :     // Label 3: @10743
    4938             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 3, /*)*//*default:*//*Label 290*/ 10811,
    4939             :     /*GILLT_s32*//*Label 288*/ 10751,
    4940             :     /*GILLT_s64*//*Label 289*/ 10781,
    4941             :     // Label 288: @10751
    4942             :     GIM_Try, /*On fail goto*//*Label 291*/ 10780, // Rule ID 59 //
    4943             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    4944             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    4945             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    4946             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    4947             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    4948             :       // (sdiv:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)  =>  (SDIVWr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
    4949             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SDIVWr,
    4950             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4951             :       // GIR_Coverage, 59,
    4952             :       GIR_Done,
    4953             :     // Label 291: @10780
    4954             :     GIM_Reject,
    4955             :     // Label 289: @10781
    4956             :     GIM_Try, /*On fail goto*//*Label 292*/ 10810, // Rule ID 60 //
    4957             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    4958             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    4959             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    4960             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    4961             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    4962             :       // (sdiv:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)  =>  (SDIVXr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
    4963             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SDIVXr,
    4964             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4965             :       // GIR_Coverage, 60,
    4966             :       GIR_Done,
    4967             :     // Label 292: @10810
    4968             :     GIM_Reject,
    4969             :     // Label 290: @10811
    4970             :     GIM_Reject,
    4971             :     // Label 4: @10812
    4972             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 3, /*)*//*default:*//*Label 295*/ 10880,
    4973             :     /*GILLT_s32*//*Label 293*/ 10820,
    4974             :     /*GILLT_s64*//*Label 294*/ 10850,
    4975             :     // Label 293: @10820
    4976             :     GIM_Try, /*On fail goto*//*Label 296*/ 10849, // Rule ID 57 //
    4977             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    4978             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    4979             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    4980             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    4981             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    4982             :       // (udiv:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)  =>  (UDIVWr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
    4983             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::UDIVWr,
    4984             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4985             :       // GIR_Coverage, 57,
    4986             :       GIR_Done,
    4987             :     // Label 296: @10849
    4988             :     GIM_Reject,
    4989             :     // Label 294: @10850
    4990             :     GIM_Try, /*On fail goto*//*Label 297*/ 10879, // Rule ID 58 //
    4991             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    4992             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    4993             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    4994             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    4995             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    4996             :       // (udiv:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)  =>  (UDIVXr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
    4997             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::UDIVXr,
    4998             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4999             :       // GIR_Coverage, 58,
    5000             :       GIR_Done,
    5001             :     // Label 297: @10879
    5002             :     GIM_Reject,
    5003             :     // Label 295: @10880
    5004             :     GIM_Reject,
    5005             :     // Label 5: @10881
    5006             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 11, /*)*//*default:*//*Label 307*/ 11422,
    5007             :     /*GILLT_s32*//*Label 298*/ 10897,
    5008             :     /*GILLT_s64*//*Label 299*/ 11032, 0,
    5009             :     /*GILLT_v2s32*//*Label 300*/ 11198,
    5010             :     /*GILLT_v2s64*//*Label 301*/ 11230,
    5011             :     /*GILLT_v4s16*//*Label 302*/ 11262,
    5012             :     /*GILLT_v4s32*//*Label 303*/ 11294,
    5013             :     /*GILLT_v8s8*//*Label 304*/ 11326,
    5014             :     /*GILLT_v8s16*//*Label 305*/ 11358,
    5015             :     /*GILLT_v16s8*//*Label 306*/ 11390,
    5016             :     // Label 298: @10897
    5017             :     GIM_Try, /*On fail goto*//*Label 308*/ 11031,
    5018             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    5019             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    5020             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    5021             :       GIM_Try, /*On fail goto*//*Label 309*/ 10962, // Rule ID 3810 //
    5022             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    5023             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5024             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    5025             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    5026             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5027             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5028             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    5029             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    5030             :         // (and:{ *:[i32] } (xor:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, -1:{ *:[i32] }), GPR32:{ *:[i32] }:$Rn)  =>  (BICWrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
    5031             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::BICWrr,
    5032             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5033             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5034             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    5035             :         GIR_EraseFromParent, /*InsnID*/0,
    5036             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5037             :         // GIR_Coverage, 3810,
    5038             :         GIR_Done,
    5039             :       // Label 309: @10962
    5040             :       GIM_Try, /*On fail goto*//*Label 310*/ 11013, // Rule ID 99 //
    5041             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5042             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    5043             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5044             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    5045             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    5046             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5047             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5048             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    5049             :         // (and:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, (xor:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, -1:{ *:[i32] }))  =>  (BICWrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
    5050             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::BICWrr,
    5051             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5052             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    5053             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    5054             :         GIR_EraseFromParent, /*InsnID*/0,
    5055             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5056             :         // GIR_Coverage, 99,
    5057             :         GIR_Done,
    5058             :       // Label 310: @11013
    5059             :       GIM_Try, /*On fail goto*//*Label 311*/ 11030, // Rule ID 95 //
    5060             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5061             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    5062             :         // (and:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)  =>  (ANDWrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
    5063             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ANDWrr,
    5064             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5065             :         // GIR_Coverage, 95,
    5066             :         GIR_Done,
    5067             :       // Label 311: @11030
    5068             :       GIM_Reject,
    5069             :     // Label 308: @11031
    5070             :     GIM_Reject,
    5071             :     // Label 299: @11032
    5072             :     GIM_Try, /*On fail goto*//*Label 312*/ 11197,
    5073             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    5074             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    5075             :       GIM_Try, /*On fail goto*//*Label 313*/ 11097, // Rule ID 3811 //
    5076             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5077             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    5078             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5079             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    5080             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    5081             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5082             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5083             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    5084             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    5085             :         // (and:{ *:[i64] } (xor:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, -1:{ *:[i64] }), GPR64:{ *:[i64] }:$Rn)  =>  (BICXrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
    5086             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::BICXrr,
    5087             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5088             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5089             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    5090             :         GIR_EraseFromParent, /*InsnID*/0,
    5091             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5092             :         // GIR_Coverage, 3811,
    5093             :         GIR_Done,
    5094             :       // Label 313: @11097
    5095             :       GIM_Try, /*On fail goto*//*Label 314*/ 11152, // Rule ID 100 //
    5096             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5097             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5098             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    5099             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5100             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    5101             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    5102             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5103             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5104             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    5105             :         // (and:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, (xor:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, -1:{ *:[i64] }))  =>  (BICXrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
    5106             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::BICXrr,
    5107             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5108             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    5109             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    5110             :         GIR_EraseFromParent, /*InsnID*/0,
    5111             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5112             :         // GIR_Coverage, 100,
    5113             :         GIR_Done,
    5114             :       // Label 314: @11152
    5115             :       GIM_Try, /*On fail goto*//*Label 315*/ 11173, // Rule ID 96 //
    5116             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5117             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5118             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    5119             :         // (and:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)  =>  (ANDXrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
    5120             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ANDXrr,
    5121             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5122             :         // GIR_Coverage, 96,
    5123             :         GIR_Done,
    5124             :       // Label 315: @11173
    5125             :       GIM_Try, /*On fail goto*//*Label 316*/ 11196, // Rule ID 1773 //
    5126             :         GIM_CheckFeatures, GIFBS_HasNEON,
    5127             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5128             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5129             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5130             :         // (and:{ *:[v1i64] } V64:{ *:[v1i64] }:$LHS, V64:{ *:[v1i64] }:$RHS)  =>  (ANDv8i8:{ *:[v1i64] } V64:{ *:[v1i64] }:$LHS, V64:{ *:[v1i64] }:$RHS)
    5131             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ANDv8i8,
    5132             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5133             :         // GIR_Coverage, 1773,
    5134             :         GIR_Done,
    5135             :       // Label 316: @11196
    5136             :       GIM_Reject,
    5137             :     // Label 312: @11197
    5138             :     GIM_Reject,
    5139             :     // Label 300: @11198
    5140             :     GIM_Try, /*On fail goto*//*Label 317*/ 11229, // Rule ID 1772 //
    5141             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5142             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    5143             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    5144             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5145             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5146             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5147             :       // (and:{ *:[v2i32] } V64:{ *:[v2i32] }:$LHS, V64:{ *:[v2i32] }:$RHS)  =>  (ANDv8i8:{ *:[v2i32] } V64:{ *:[v2i32] }:$LHS, V64:{ *:[v2i32] }:$RHS)
    5148             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ANDv8i8,
    5149             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5150             :       // GIR_Coverage, 1772,
    5151             :       GIR_Done,
    5152             :     // Label 317: @11229
    5153             :     GIM_Reject,
    5154             :     // Label 301: @11230
    5155             :     GIM_Try, /*On fail goto*//*Label 318*/ 11261, // Rule ID 1776 //
    5156             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5157             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    5158             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    5159             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5160             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    5161             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5162             :       // (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$LHS, V128:{ *:[v2i64] }:$RHS)  =>  (ANDv16i8:{ *:[v2i64] } V128:{ *:[v2i64] }:$LHS, V128:{ *:[v2i64] }:$RHS)
    5163             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ANDv16i8,
    5164             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5165             :       // GIR_Coverage, 1776,
    5166             :       GIR_Done,
    5167             :     // Label 318: @11261
    5168             :     GIM_Reject,
    5169             :     // Label 302: @11262
    5170             :     GIM_Try, /*On fail goto*//*Label 319*/ 11293, // Rule ID 1771 //
    5171             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5172             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    5173             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    5174             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5175             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5176             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5177             :       // (and:{ *:[v4i16] } V64:{ *:[v4i16] }:$LHS, V64:{ *:[v4i16] }:$RHS)  =>  (ANDv8i8:{ *:[v4i16] } V64:{ *:[v4i16] }:$LHS, V64:{ *:[v4i16] }:$RHS)
    5178             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ANDv8i8,
    5179             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5180             :       // GIR_Coverage, 1771,
    5181             :       GIR_Done,
    5182             :     // Label 319: @11293
    5183             :     GIM_Reject,
    5184             :     // Label 303: @11294
    5185             :     GIM_Try, /*On fail goto*//*Label 320*/ 11325, // Rule ID 1775 //
    5186             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5187             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    5188             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    5189             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5190             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    5191             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5192             :       // (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$LHS, V128:{ *:[v4i32] }:$RHS)  =>  (ANDv16i8:{ *:[v4i32] } V128:{ *:[v4i32] }:$LHS, V128:{ *:[v4i32] }:$RHS)
    5193             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ANDv16i8,
    5194             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5195             :       // GIR_Coverage, 1775,
    5196             :       GIR_Done,
    5197             :     // Label 320: @11325
    5198             :     GIM_Reject,
    5199             :     // Label 304: @11326
    5200             :     GIM_Try, /*On fail goto*//*Label 321*/ 11357, // Rule ID 1179 //
    5201             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5202             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    5203             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
    5204             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5205             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5206             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5207             :       // (and:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (ANDv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    5208             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ANDv8i8,
    5209             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5210             :       // GIR_Coverage, 1179,
    5211             :       GIR_Done,
    5212             :     // Label 321: @11357
    5213             :     GIM_Reject,
    5214             :     // Label 305: @11358
    5215             :     GIM_Try, /*On fail goto*//*Label 322*/ 11389, // Rule ID 1774 //
    5216             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5217             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    5218             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    5219             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5220             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    5221             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5222             :       // (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$LHS, V128:{ *:[v8i16] }:$RHS)  =>  (ANDv16i8:{ *:[v8i16] } V128:{ *:[v8i16] }:$LHS, V128:{ *:[v8i16] }:$RHS)
    5223             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ANDv16i8,
    5224             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5225             :       // GIR_Coverage, 1774,
    5226             :       GIR_Done,
    5227             :     // Label 322: @11389
    5228             :     GIM_Reject,
    5229             :     // Label 306: @11390
    5230             :     GIM_Try, /*On fail goto*//*Label 323*/ 11421, // Rule ID 1180 //
    5231             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5232             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    5233             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    5234             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5235             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    5236             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5237             :       // (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (ANDv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
    5238             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ANDv16i8,
    5239             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5240             :       // GIR_Coverage, 1180,
    5241             :       GIR_Done,
    5242             :     // Label 323: @11421
    5243             :     GIM_Reject,
    5244             :     // Label 307: @11422
    5245             :     GIM_Reject,
    5246             :     // Label 6: @11423
    5247             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 11, /*)*//*default:*//*Label 333*/ 11964,
    5248             :     /*GILLT_s32*//*Label 324*/ 11439,
    5249             :     /*GILLT_s64*//*Label 325*/ 11574, 0,
    5250             :     /*GILLT_v2s32*//*Label 326*/ 11740,
    5251             :     /*GILLT_v2s64*//*Label 327*/ 11772,
    5252             :     /*GILLT_v4s16*//*Label 328*/ 11804,
    5253             :     /*GILLT_v4s32*//*Label 329*/ 11836,
    5254             :     /*GILLT_v8s8*//*Label 330*/ 11868,
    5255             :     /*GILLT_v8s16*//*Label 331*/ 11900,
    5256             :     /*GILLT_v16s8*//*Label 332*/ 11932,
    5257             :     // Label 324: @11439
    5258             :     GIM_Try, /*On fail goto*//*Label 334*/ 11573,
    5259             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    5260             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    5261             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    5262             :       GIM_Try, /*On fail goto*//*Label 335*/ 11504, // Rule ID 3830 //
    5263             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    5264             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5265             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    5266             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    5267             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5268             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5269             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    5270             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    5271             :         // (or:{ *:[i32] } (xor:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, -1:{ *:[i32] }), GPR32:{ *:[i32] }:$Rn)  =>  (ORNWrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
    5272             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ORNWrr,
    5273             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5274             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5275             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    5276             :         GIR_EraseFromParent, /*InsnID*/0,
    5277             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5278             :         // GIR_Coverage, 3830,
    5279             :         GIR_Done,
    5280             :       // Label 335: @11504
    5281             :       GIM_Try, /*On fail goto*//*Label 336*/ 11555, // Rule ID 111 //
    5282             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5283             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    5284             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5285             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    5286             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    5287             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5288             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5289             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    5290             :         // (or:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, (xor:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, -1:{ *:[i32] }))  =>  (ORNWrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
    5291             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ORNWrr,
    5292             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5293             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    5294             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    5295             :         GIR_EraseFromParent, /*InsnID*/0,
    5296             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5297             :         // GIR_Coverage, 111,
    5298             :         GIR_Done,
    5299             :       // Label 336: @11555
    5300             :       GIM_Try, /*On fail goto*//*Label 337*/ 11572, // Rule ID 115 //
    5301             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5302             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    5303             :         // (or:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)  =>  (ORRWrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
    5304             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ORRWrr,
    5305             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5306             :         // GIR_Coverage, 115,
    5307             :         GIR_Done,
    5308             :       // Label 337: @11572
    5309             :       GIM_Reject,
    5310             :     // Label 334: @11573
    5311             :     GIM_Reject,
    5312             :     // Label 325: @11574
    5313             :     GIM_Try, /*On fail goto*//*Label 338*/ 11739,
    5314             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    5315             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    5316             :       GIM_Try, /*On fail goto*//*Label 339*/ 11639, // Rule ID 3831 //
    5317             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5318             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    5319             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5320             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    5321             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    5322             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5323             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5324             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    5325             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    5326             :         // (or:{ *:[i64] } (xor:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, -1:{ *:[i64] }), GPR64:{ *:[i64] }:$Rn)  =>  (ORNXrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
    5327             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ORNXrr,
    5328             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5329             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5330             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    5331             :         GIR_EraseFromParent, /*InsnID*/0,
    5332             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5333             :         // GIR_Coverage, 3831,
    5334             :         GIR_Done,
    5335             :       // Label 339: @11639
    5336             :       GIM_Try, /*On fail goto*//*Label 340*/ 11694, // Rule ID 112 //
    5337             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5338             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5339             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    5340             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5341             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    5342             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    5343             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5344             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5345             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    5346             :         // (or:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, (xor:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, -1:{ *:[i64] }))  =>  (ORNXrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
    5347             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ORNXrr,
    5348             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5349             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    5350             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    5351             :         GIR_EraseFromParent, /*InsnID*/0,
    5352             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5353             :         // GIR_Coverage, 112,
    5354             :         GIR_Done,
    5355             :       // Label 340: @11694
    5356             :       GIM_Try, /*On fail goto*//*Label 341*/ 11715, // Rule ID 116 //
    5357             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5358             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5359             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    5360             :         // (or:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)  =>  (ORRXrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
    5361             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ORRXrr,
    5362             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5363             :         // GIR_Coverage, 116,
    5364             :         GIR_Done,
    5365             :       // Label 341: @11715
    5366             :       GIM_Try, /*On fail goto*//*Label 342*/ 11738, // Rule ID 2405 //
    5367             :         GIM_CheckFeatures, GIFBS_HasNEON,
    5368             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5369             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5370             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5371             :         // (or:{ *:[v1i64] } V64:{ *:[v1i64] }:$LHS, V64:{ *:[v1i64] }:$RHS)  =>  (ORRv8i8:{ *:[v1i64] } V64:{ *:[v1i64] }:$LHS, V64:{ *:[v1i64] }:$RHS)
    5372             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ORRv8i8,
    5373             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5374             :         // GIR_Coverage, 2405,
    5375             :         GIR_Done,
    5376             :       // Label 342: @11738
    5377             :       GIM_Reject,
    5378             :     // Label 338: @11739
    5379             :     GIM_Reject,
    5380             :     // Label 326: @11740
    5381             :     GIM_Try, /*On fail goto*//*Label 343*/ 11771, // Rule ID 2404 //
    5382             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5383             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    5384             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    5385             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5386             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5387             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5388             :       // (or:{ *:[v2i32] } V64:{ *:[v2i32] }:$LHS, V64:{ *:[v2i32] }:$RHS)  =>  (ORRv8i8:{ *:[v2i32] } V64:{ *:[v2i32] }:$LHS, V64:{ *:[v2i32] }:$RHS)
    5389             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ORRv8i8,
    5390             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5391             :       // GIR_Coverage, 2404,
    5392             :       GIR_Done,
    5393             :     // Label 343: @11771
    5394             :     GIM_Reject,
    5395             :     // Label 327: @11772
    5396             :     GIM_Try, /*On fail goto*//*Label 344*/ 11803, // Rule ID 2408 //
    5397             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5398             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    5399             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    5400             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5401             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    5402             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5403             :       // (or:{ *:[v2i64] } V128:{ *:[v2i64] }:$LHS, V128:{ *:[v2i64] }:$RHS)  =>  (ORRv16i8:{ *:[v2i64] } V128:{ *:[v2i64] }:$LHS, V128:{ *:[v2i64] }:$RHS)
    5404             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ORRv16i8,
    5405             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5406             :       // GIR_Coverage, 2408,
    5407             :       GIR_Done,
    5408             :     // Label 344: @11803
    5409             :     GIM_Reject,
    5410             :     // Label 328: @11804
    5411             :     GIM_Try, /*On fail goto*//*Label 345*/ 11835, // Rule ID 2403 //
    5412             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5413             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    5414             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    5415             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5416             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5417             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5418             :       // (or:{ *:[v4i16] } V64:{ *:[v4i16] }:$LHS, V64:{ *:[v4i16] }:$RHS)  =>  (ORRv8i8:{ *:[v4i16] } V64:{ *:[v4i16] }:$LHS, V64:{ *:[v4i16] }:$RHS)
    5419             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ORRv8i8,
    5420             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5421             :       // GIR_Coverage, 2403,
    5422             :       GIR_Done,
    5423             :     // Label 345: @11835
    5424             :     GIM_Reject,
    5425             :     // Label 329: @11836
    5426             :     GIM_Try, /*On fail goto*//*Label 346*/ 11867, // Rule ID 2407 //
    5427             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5428             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    5429             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    5430             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5431             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    5432             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5433             :       // (or:{ *:[v4i32] } V128:{ *:[v4i32] }:$LHS, V128:{ *:[v4i32] }:$RHS)  =>  (ORRv16i8:{ *:[v4i32] } V128:{ *:[v4i32] }:$LHS, V128:{ *:[v4i32] }:$RHS)
    5434             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ORRv16i8,
    5435             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5436             :       // GIR_Coverage, 2407,
    5437             :       GIR_Done,
    5438             :     // Label 346: @11867
    5439             :     GIM_Reject,
    5440             :     // Label 330: @11868
    5441             :     GIM_Try, /*On fail goto*//*Label 347*/ 11899, // Rule ID 1191 //
    5442             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5443             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    5444             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
    5445             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5446             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5447             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5448             :       // (or:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (ORRv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    5449             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ORRv8i8,
    5450             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5451             :       // GIR_Coverage, 1191,
    5452             :       GIR_Done,
    5453             :     // Label 347: @11899
    5454             :     GIM_Reject,
    5455             :     // Label 331: @11900
    5456             :     GIM_Try, /*On fail goto*//*Label 348*/ 11931, // Rule ID 2406 //
    5457             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5458             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    5459             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    5460             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5461             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    5462             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5463             :       // (or:{ *:[v8i16] } V128:{ *:[v8i16] }:$LHS, V128:{ *:[v8i16] }:$RHS)  =>  (ORRv16i8:{ *:[v8i16] } V128:{ *:[v8i16] }:$LHS, V128:{ *:[v8i16] }:$RHS)
    5464             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ORRv16i8,
    5465             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5466             :       // GIR_Coverage, 2406,
    5467             :       GIR_Done,
    5468             :     // Label 348: @11931
    5469             :     GIM_Reject,
    5470             :     // Label 332: @11932
    5471             :     GIM_Try, /*On fail goto*//*Label 349*/ 11963, // Rule ID 1192 //
    5472             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5473             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    5474             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    5475             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5476             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    5477             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5478             :       // (or:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (ORRv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
    5479             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ORRv16i8,
    5480             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5481             :       // GIR_Coverage, 1192,
    5482             :       GIR_Done,
    5483             :     // Label 349: @11963
    5484             :     GIM_Reject,
    5485             :     // Label 333: @11964
    5486             :     GIM_Reject,
    5487             :     // Label 7: @11965
    5488             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 11, /*)*//*default:*//*Label 359*/ 12674,
    5489             :     /*GILLT_s32*//*Label 350*/ 11981,
    5490             :     /*GILLT_s64*//*Label 351*/ 12196, 0,
    5491             :     /*GILLT_v2s32*//*Label 352*/ 12450,
    5492             :     /*GILLT_v2s64*//*Label 353*/ 12482,
    5493             :     /*GILLT_v4s16*//*Label 354*/ 12514,
    5494             :     /*GILLT_v4s32*//*Label 355*/ 12546,
    5495             :     /*GILLT_v8s8*//*Label 356*/ 12578,
    5496             :     /*GILLT_v8s16*//*Label 357*/ 12610,
    5497             :     /*GILLT_v16s8*//*Label 358*/ 12642,
    5498             :     // Label 350: @11981
    5499             :     GIM_Try, /*On fail goto*//*Label 360*/ 12195,
    5500             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    5501             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    5502             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    5503             :       GIM_Try, /*On fail goto*//*Label 361*/ 12046, // Rule ID 3814 //
    5504             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    5505             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5506             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    5507             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    5508             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5509             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5510             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    5511             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    5512             :         // (xor:{ *:[i32] } (xor:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, -1:{ *:[i32] }), GPR32:{ *:[i32] }:$Rm)  =>  (EONWrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
    5513             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EONWrr,
    5514             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5515             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    5516             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
    5517             :         GIR_EraseFromParent, /*InsnID*/0,
    5518             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5519             :         // GIR_Coverage, 3814,
    5520             :         GIR_Done,
    5521             :       // Label 361: @12046
    5522             :       GIM_Try, /*On fail goto*//*Label 362*/ 12097, // Rule ID 103 //
    5523             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    5524             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5525             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    5526             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    5527             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5528             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    5529             :         GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
    5530             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    5531             :         // (xor:{ *:[i32] } (xor:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm), -1:{ *:[i32] })  =>  (EONWrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
    5532             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EONWrr,
    5533             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5534             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    5535             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    5536             :         GIR_EraseFromParent, /*InsnID*/0,
    5537             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5538             :         // GIR_Coverage, 103,
    5539             :         GIR_Done,
    5540             :       // Label 362: @12097
    5541             :       GIM_Try, /*On fail goto*//*Label 363*/ 12148, // Rule ID 3815 //
    5542             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5543             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    5544             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5545             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    5546             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    5547             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5548             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5549             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    5550             :         // (xor:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, (xor:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, -1:{ *:[i32] }))  =>  (EONWrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
    5551             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EONWrr,
    5552             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5553             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    5554             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rm
    5555             :         GIR_EraseFromParent, /*InsnID*/0,
    5556             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5557             :         // GIR_Coverage, 3815,
    5558             :         GIR_Done,
    5559             :       // Label 363: @12148
    5560             :       GIM_Try, /*On fail goto*//*Label 364*/ 12177, // Rule ID 1899 //
    5561             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5562             :         GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
    5563             :         // (xor:{ *:[i32] } GPR32:{ *:[i32] }:$Wm, -1:{ *:[i32] })  =>  (ORNWrr:{ *:[i32] } WZR:{ *:[i32] }, GPR32:{ *:[i32] }:$Wm)
    5564             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ORNWrr,
    5565             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5566             :         GIR_AddRegister, /*InsnID*/0, AArch64::WZR,
    5567             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Wm
    5568             :         GIR_EraseFromParent, /*InsnID*/0,
    5569             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5570             :         // GIR_Coverage, 1899,
    5571             :         GIR_Done,
    5572             :       // Label 364: @12177
    5573             :       GIM_Try, /*On fail goto*//*Label 365*/ 12194, // Rule ID 107 //
    5574             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5575             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    5576             :         // (xor:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)  =>  (EORWrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
    5577             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::EORWrr,
    5578             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5579             :         // GIR_Coverage, 107,
    5580             :         GIR_Done,
    5581             :       // Label 365: @12194
    5582             :       GIM_Reject,
    5583             :     // Label 360: @12195
    5584             :     GIM_Reject,
    5585             :     // Label 351: @12196
    5586             :     GIM_Try, /*On fail goto*//*Label 366*/ 12449,
    5587             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    5588             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    5589             :       GIM_Try, /*On fail goto*//*Label 367*/ 12261, // Rule ID 3816 //
    5590             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5591             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    5592             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5593             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    5594             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    5595             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5596             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5597             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    5598             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    5599             :         // (xor:{ *:[i64] } (xor:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, -1:{ *:[i64] }), GPR64:{ *:[i64] }:$Rm)  =>  (EONXrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
    5600             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EONXrr,
    5601             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5602             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    5603             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
    5604             :         GIR_EraseFromParent, /*InsnID*/0,
    5605             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5606             :         // GIR_Coverage, 3816,
    5607             :         GIR_Done,
    5608             :       // Label 367: @12261
    5609             :       GIM_Try, /*On fail goto*//*Label 368*/ 12316, // Rule ID 104 //
    5610             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5611             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    5612             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5613             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    5614             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    5615             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5616             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    5617             :         GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
    5618             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    5619             :         // (xor:{ *:[i64] } (xor:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm), -1:{ *:[i64] })  =>  (EONXrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
    5620             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EONXrr,
    5621             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5622             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    5623             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    5624             :         GIR_EraseFromParent, /*InsnID*/0,
    5625             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5626             :         // GIR_Coverage, 104,
    5627             :         GIR_Done,
    5628             :       // Label 368: @12316
    5629             :       GIM_Try, /*On fail goto*//*Label 369*/ 12371, // Rule ID 3817 //
    5630             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5631             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5632             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    5633             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5634             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    5635             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    5636             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5637             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5638             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    5639             :         // (xor:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, (xor:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, -1:{ *:[i64] }))  =>  (EONXrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
    5640             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EONXrr,
    5641             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5642             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    5643             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rm
    5644             :         GIR_EraseFromParent, /*InsnID*/0,
    5645             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5646             :         // GIR_Coverage, 3817,
    5647             :         GIR_Done,
    5648             :       // Label 369: @12371
    5649             :       GIM_Try, /*On fail goto*//*Label 370*/ 12404, // Rule ID 1900 //
    5650             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5651             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5652             :         GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
    5653             :         // (xor:{ *:[i64] } GPR64:{ *:[i64] }:$Xm, -1:{ *:[i64] })  =>  (ORNXrr:{ *:[i64] } XZR:{ *:[i64] }, GPR64:{ *:[i64] }:$Xm)
    5654             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ORNXrr,
    5655             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5656             :         GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
    5657             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Xm
    5658             :         GIR_EraseFromParent, /*InsnID*/0,
    5659             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5660             :         // GIR_Coverage, 1900,
    5661             :         GIR_Done,
    5662             :       // Label 370: @12404
    5663             :       GIM_Try, /*On fail goto*//*Label 371*/ 12425, // Rule ID 108 //
    5664             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5665             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5666             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    5667             :         // (xor:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)  =>  (EORXrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
    5668             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::EORXrr,
    5669             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5670             :         // GIR_Coverage, 108,
    5671             :         GIR_Done,
    5672             :       // Label 371: @12425
    5673             :       GIM_Try, /*On fail goto*//*Label 372*/ 12448, // Rule ID 2393 //
    5674             :         GIM_CheckFeatures, GIFBS_HasNEON,
    5675             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5676             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5677             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5678             :         // (xor:{ *:[v1i64] } V64:{ *:[v1i64] }:$LHS, V64:{ *:[v1i64] }:$RHS)  =>  (EORv8i8:{ *:[v1i64] } V64:{ *:[v1i64] }:$LHS, V64:{ *:[v1i64] }:$RHS)
    5679             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::EORv8i8,
    5680             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5681             :         // GIR_Coverage, 2393,
    5682             :         GIR_Done,
    5683             :       // Label 372: @12448
    5684             :       GIM_Reject,
    5685             :     // Label 366: @12449
    5686             :     GIM_Reject,
    5687             :     // Label 352: @12450
    5688             :     GIM_Try, /*On fail goto*//*Label 373*/ 12481, // Rule ID 2392 //
    5689             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5690             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    5691             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    5692             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5693             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5694             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5695             :       // (xor:{ *:[v2i32] } V64:{ *:[v2i32] }:$LHS, V64:{ *:[v2i32] }:$RHS)  =>  (EORv8i8:{ *:[v2i32] } V64:{ *:[v2i32] }:$LHS, V64:{ *:[v2i32] }:$RHS)
    5696             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::EORv8i8,
    5697             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5698             :       // GIR_Coverage, 2392,
    5699             :       GIR_Done,
    5700             :     // Label 373: @12481
    5701             :     GIM_Reject,
    5702             :     // Label 353: @12482
    5703             :     GIM_Try, /*On fail goto*//*Label 374*/ 12513, // Rule ID 2396 //
    5704             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5705             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    5706             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    5707             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5708             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    5709             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5710             :       // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$LHS, V128:{ *:[v2i64] }:$RHS)  =>  (EORv16i8:{ *:[v2i64] } V128:{ *:[v2i64] }:$LHS, V128:{ *:[v2i64] }:$RHS)
    5711             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::EORv16i8,
    5712             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5713             :       // GIR_Coverage, 2396,
    5714             :       GIR_Done,
    5715             :     // Label 374: @12513
    5716             :     GIM_Reject,
    5717             :     // Label 354: @12514
    5718             :     GIM_Try, /*On fail goto*//*Label 375*/ 12545, // Rule ID 2391 //
    5719             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5720             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    5721             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    5722             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5723             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5724             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5725             :       // (xor:{ *:[v4i16] } V64:{ *:[v4i16] }:$LHS, V64:{ *:[v4i16] }:$RHS)  =>  (EORv8i8:{ *:[v4i16] } V64:{ *:[v4i16] }:$LHS, V64:{ *:[v4i16] }:$RHS)
    5726             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::EORv8i8,
    5727             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5728             :       // GIR_Coverage, 2391,
    5729             :       GIR_Done,
    5730             :     // Label 375: @12545
    5731             :     GIM_Reject,
    5732             :     // Label 355: @12546
    5733             :     GIM_Try, /*On fail goto*//*Label 376*/ 12577, // Rule ID 2395 //
    5734             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5735             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    5736             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    5737             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5738             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    5739             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5740             :       // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$LHS, V128:{ *:[v4i32] }:$RHS)  =>  (EORv16i8:{ *:[v4i32] } V128:{ *:[v4i32] }:$LHS, V128:{ *:[v4i32] }:$RHS)
    5741             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::EORv16i8,
    5742             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5743             :       // GIR_Coverage, 2395,
    5744             :       GIR_Done,
    5745             :     // Label 376: @12577
    5746             :     GIM_Reject,
    5747             :     // Label 356: @12578
    5748             :     GIM_Try, /*On fail goto*//*Label 377*/ 12609, // Rule ID 1187 //
    5749             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5750             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    5751             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
    5752             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5753             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5754             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5755             :       // (xor:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (EORv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    5756             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::EORv8i8,
    5757             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5758             :       // GIR_Coverage, 1187,
    5759             :       GIR_Done,
    5760             :     // Label 377: @12609
    5761             :     GIM_Reject,
    5762             :     // Label 357: @12610
    5763             :     GIM_Try, /*On fail goto*//*Label 378*/ 12641, // Rule ID 2394 //
    5764             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5765             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    5766             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    5767             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5768             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    5769             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5770             :       // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$LHS, V128:{ *:[v8i16] }:$RHS)  =>  (EORv16i8:{ *:[v8i16] } V128:{ *:[v8i16] }:$LHS, V128:{ *:[v8i16] }:$RHS)
    5771             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::EORv16i8,
    5772             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5773             :       // GIR_Coverage, 2394,
    5774             :       GIR_Done,
    5775             :     // Label 378: @12641
    5776             :     GIM_Reject,
    5777             :     // Label 358: @12642
    5778             :     GIM_Try, /*On fail goto*//*Label 379*/ 12673, // Rule ID 1188 //
    5779             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5780             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    5781             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    5782             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5783             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    5784             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5785             :       // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (EORv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
    5786             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::EORv16i8,
    5787             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5788             :       // GIR_Coverage, 1188,
    5789             :       GIR_Done,
    5790             :     // Label 379: @12673
    5791             :     GIM_Reject,
    5792             :     // Label 359: @12674
    5793             :     GIM_Reject,
    5794             :     // Label 8: @12675
    5795             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 11, /*)*//*default:*//*Label 390*/ 20167,
    5796             :     /*GILLT_s32*//*Label 380*/ 12691,
    5797             :     /*GILLT_s64*//*Label 381*/ 12737,
    5798             :     /*GILLT_s128*//*Label 382*/ 14313,
    5799             :     /*GILLT_v2s32*//*Label 383*/ 14985,
    5800             :     /*GILLT_v2s64*//*Label 384*/ 15880,
    5801             :     /*GILLT_v4s16*//*Label 385*/ 16661,
    5802             :     /*GILLT_v4s32*//*Label 386*/ 17556,
    5803             :     /*GILLT_v8s8*//*Label 387*/ 18401,
    5804             :     /*GILLT_v8s16*//*Label 388*/ 18874,
    5805             :     /*GILLT_v16s8*//*Label 389*/ 19719,
    5806             :     // Label 380: @12691
    5807             :     GIM_Try, /*On fail goto*//*Label 391*/ 12736,
    5808             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    5809             :       GIM_Try, /*On fail goto*//*Label 392*/ 12716, // Rule ID 3222 //
    5810             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
    5811             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5812             :         // (bitconvert:{ *:[f32] } GPR32:{ *:[i32] }:$Xn)  =>  (COPY_TO_REGCLASS:{ *:[f32] } GPR32:{ *:[i32] }:$Xn, FPR32:{ *:[i32] })
    5813             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    5814             :         GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR32*/5,
    5815             :         // GIR_Coverage, 3222,
    5816             :         GIR_Done,
    5817             :       // Label 392: @12716
    5818             :       GIM_Try, /*On fail goto*//*Label 393*/ 12735, // Rule ID 3223 //
    5819             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    5820             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR32RegClassID,
    5821             :         // (bitconvert:{ *:[i32] } FPR32:{ *:[f32] }:$Xn)  =>  (COPY_TO_REGCLASS:{ *:[i32] } FPR32:{ *:[f32] }:$Xn, GPR32:{ *:[i32] })
    5822             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    5823             :         GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GPR32*/6,
    5824             :         // GIR_Coverage, 3223,
    5825             :         GIR_Done,
    5826             :       // Label 393: @12735
    5827             :       GIM_Reject,
    5828             :     // Label 391: @12736
    5829             :     GIM_Reject,
    5830             :     // Label 381: @12737
    5831             :     GIM_Try, /*On fail goto*//*Label 394*/ 12762, // Rule ID 3200 //
    5832             :       GIM_CheckFeatures, GIFBS_IsLE,
    5833             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    5834             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5835             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5836             :       // (bitconvert:{ *:[i64] } V64:{ *:[v8i8] }:$Vn)  =>  (COPY_TO_REGCLASS:{ *:[i64] } V64:{ *:[v8i8] }:$Vn, GPR64:{ *:[i32] })
    5837             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    5838             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GPR64*/17,
    5839             :       // GIR_Coverage, 3200,
    5840             :       GIR_Done,
    5841             :     // Label 394: @12762
    5842             :     GIM_Try, /*On fail goto*//*Label 395*/ 12787, // Rule ID 3201 //
    5843             :       GIM_CheckFeatures, GIFBS_IsLE,
    5844             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    5845             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5846             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5847             :       // (bitconvert:{ *:[i64] } V64:{ *:[v4i16] }:$Vn)  =>  (COPY_TO_REGCLASS:{ *:[i64] } V64:{ *:[v4i16] }:$Vn, GPR64:{ *:[i32] })
    5848             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    5849             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GPR64*/17,
    5850             :       // GIR_Coverage, 3201,
    5851             :       GIR_Done,
    5852             :     // Label 395: @12787
    5853             :     GIM_Try, /*On fail goto*//*Label 396*/ 12812, // Rule ID 3202 //
    5854             :       GIM_CheckFeatures, GIFBS_IsLE,
    5855             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    5856             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5857             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5858             :       // (bitconvert:{ *:[i64] } V64:{ *:[v2i32] }:$Vn)  =>  (COPY_TO_REGCLASS:{ *:[i64] } V64:{ *:[v2i32] }:$Vn, GPR64:{ *:[i32] })
    5859             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    5860             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GPR64*/17,
    5861             :       // GIR_Coverage, 3202,
    5862             :       GIR_Done,
    5863             :     // Label 396: @12812
    5864             :     GIM_Try, /*On fail goto*//*Label 397*/ 12837, // Rule ID 3203 //
    5865             :       GIM_CheckFeatures, GIFBS_IsLE,
    5866             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    5867             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5868             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5869             :       // (bitconvert:{ *:[i64] } V64:{ *:[v4f16] }:$Vn)  =>  (COPY_TO_REGCLASS:{ *:[i64] } V64:{ *:[v4f16] }:$Vn, GPR64:{ *:[i32] })
    5870             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    5871             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GPR64*/17,
    5872             :       // GIR_Coverage, 3203,
    5873             :       GIR_Done,
    5874             :     // Label 397: @12837
    5875             :     GIM_Try, /*On fail goto*//*Label 398*/ 12862, // Rule ID 3204 //
    5876             :       GIM_CheckFeatures, GIFBS_IsLE,
    5877             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    5878             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5879             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5880             :       // (bitconvert:{ *:[i64] } V64:{ *:[v2f32] }:$Vn)  =>  (COPY_TO_REGCLASS:{ *:[i64] } V64:{ *:[v2f32] }:$Vn, GPR64:{ *:[i32] })
    5881             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    5882             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GPR64*/17,
    5883             :       // GIR_Coverage, 3204,
    5884             :       GIR_Done,
    5885             :     // Label 398: @12862
    5886             :     GIM_Try, /*On fail goto*//*Label 399*/ 12887, // Rule ID 3205 //
    5887             :       GIM_CheckFeatures, GIFBS_IsLE,
    5888             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    5889             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5890             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5891             :       // (bitconvert:{ *:[i64] } V64:{ *:[v1f64] }:$Vn)  =>  (COPY_TO_REGCLASS:{ *:[i64] } V64:{ *:[v1f64] }:$Vn, GPR64:{ *:[i32] })
    5892             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    5893             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GPR64*/17,
    5894             :       // GIR_Coverage, 3205,
    5895             :       GIR_Done,
    5896             :     // Label 399: @12887
    5897             :     GIM_Try, /*On fail goto*//*Label 400*/ 12935, // Rule ID 3211 //
    5898             :       GIM_CheckFeatures, GIFBS_IsBE,
    5899             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    5900             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5901             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5902             :       // (bitconvert:{ *:[i64] } V64:{ *:[v8i8] }:$Vn)  =>  (REV64v8i8:{ *:[i64] } (COPY_TO_REGCLASS:{ *:[i64] } V64:{ *:[v8i8] }:$Vn, GPR64:{ *:[i32] }))
    5903             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
    5904             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY,
    5905             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    5906             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // Vn
    5907             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    5908             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::REV64v8i8,
    5909             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5910             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    5911             :       GIR_EraseFromParent, /*InsnID*/0,
    5912             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5913             :       // GIR_Coverage, 3211,
    5914             :       GIR_Done,
    5915             :     // Label 400: @12935
    5916             :     GIM_Try, /*On fail goto*//*Label 401*/ 12983, // Rule ID 3212 //
    5917             :       GIM_CheckFeatures, GIFBS_IsBE,
    5918             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    5919             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5920             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5921             :       // (bitconvert:{ *:[i64] } V64:{ *:[v4i16] }:$Vn)  =>  (REV64v4i16:{ *:[i64] } (COPY_TO_REGCLASS:{ *:[i64] } V64:{ *:[v4i16] }:$Vn, GPR64:{ *:[i32] }))
    5922             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
    5923             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY,
    5924             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    5925             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // Vn
    5926             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    5927             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    5928             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5929             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    5930             :       GIR_EraseFromParent, /*InsnID*/0,
    5931             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5932             :       // GIR_Coverage, 3212,
    5933             :       GIR_Done,
    5934             :     // Label 401: @12983
    5935             :     GIM_Try, /*On fail goto*//*Label 402*/ 13031, // Rule ID 3213 //
    5936             :       GIM_CheckFeatures, GIFBS_IsBE,
    5937             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    5938             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5939             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5940             :       // (bitconvert:{ *:[i64] } V64:{ *:[v2i32] }:$Vn)  =>  (REV64v2i32:{ *:[i64] } (COPY_TO_REGCLASS:{ *:[i64] } V64:{ *:[v2i32] }:$Vn, GPR64:{ *:[i32] }))
    5941             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
    5942             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY,
    5943             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    5944             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // Vn
    5945             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    5946             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    5947             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5948             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    5949             :       GIR_EraseFromParent, /*InsnID*/0,
    5950             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5951             :       // GIR_Coverage, 3213,
    5952             :       GIR_Done,
    5953             :     // Label 402: @13031
    5954             :     GIM_Try, /*On fail goto*//*Label 403*/ 13079, // Rule ID 3214 //
    5955             :       GIM_CheckFeatures, GIFBS_IsBE,
    5956             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    5957             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5958             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5959             :       // (bitconvert:{ *:[i64] } V64:{ *:[v4f16] }:$Vn)  =>  (REV64v4i16:{ *:[i64] } (COPY_TO_REGCLASS:{ *:[i64] } V64:{ *:[v4f16] }:$Vn, GPR64:{ *:[i32] }))
    5960             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
    5961             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY,
    5962             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    5963             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // Vn
    5964             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    5965             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    5966             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5967             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    5968             :       GIR_EraseFromParent, /*InsnID*/0,
    5969             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5970             :       // GIR_Coverage, 3214,
    5971             :       GIR_Done,
    5972             :     // Label 403: @13079
    5973             :     GIM_Try, /*On fail goto*//*Label 404*/ 13127, // Rule ID 3215 //
    5974             :       GIM_CheckFeatures, GIFBS_IsBE,
    5975             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    5976             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5977             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5978             :       // (bitconvert:{ *:[i64] } V64:{ *:[v2f32] }:$Vn)  =>  (REV64v2i32:{ *:[i64] } (COPY_TO_REGCLASS:{ *:[i64] } V64:{ *:[v2f32] }:$Vn, GPR64:{ *:[i32] }))
    5979             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
    5980             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY,
    5981             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    5982             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // Vn
    5983             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    5984             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    5985             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5986             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    5987             :       GIR_EraseFromParent, /*InsnID*/0,
    5988             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5989             :       // GIR_Coverage, 3215,
    5990             :       GIR_Done,
    5991             :     // Label 404: @13127
    5992             :     GIM_Try, /*On fail goto*//*Label 405*/ 13150, // Rule ID 3216 //
    5993             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    5994             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5995             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5996             :       // (bitconvert:{ *:[v1i64] } GPR64:{ *:[i64] }:$Xn)  =>  (COPY_TO_REGCLASS:{ *:[v1i64] } GPR64:{ *:[i64] }:$Xn, FPR64:{ *:[i32] })
    5997             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    5998             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    5999             :       // GIR_Coverage, 3216,
    6000             :       GIR_Done,
    6001             :     // Label 405: @13150
    6002             :     GIM_Try, /*On fail goto*//*Label 406*/ 13173, // Rule ID 3217 //
    6003             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6004             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6005             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    6006             :       // (bitconvert:{ *:[v1f64] } GPR64:{ *:[i64] }:$Xn)  =>  (COPY_TO_REGCLASS:{ *:[v1f64] } GPR64:{ *:[i64] }:$Xn, FPR64:{ *:[i32] })
    6007             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6008             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6009             :       // GIR_Coverage, 3217,
    6010             :       GIR_Done,
    6011             :     // Label 406: @13173
    6012             :     GIM_Try, /*On fail goto*//*Label 407*/ 13196, // Rule ID 3218 //
    6013             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6014             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    6015             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6016             :       // (bitconvert:{ *:[i64] } V64:{ *:[v1i64] }:$Vn)  =>  (COPY_TO_REGCLASS:{ *:[i64] } V64:{ *:[v1i64] }:$Vn, GPR64:{ *:[i32] })
    6017             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6018             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GPR64*/17,
    6019             :       // GIR_Coverage, 3218,
    6020             :       GIR_Done,
    6021             :     // Label 407: @13196
    6022             :     GIM_Try, /*On fail goto*//*Label 408*/ 13219, // Rule ID 3224 //
    6023             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6024             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6025             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    6026             :       // (bitconvert:{ *:[f64] } GPR64:{ *:[i64] }:$Xn)  =>  (COPY_TO_REGCLASS:{ *:[f64] } GPR64:{ *:[i64] }:$Xn, FPR64:{ *:[i32] })
    6027             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6028             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6029             :       // GIR_Coverage, 3224,
    6030             :       GIR_Done,
    6031             :     // Label 408: @13219
    6032             :     GIM_Try, /*On fail goto*//*Label 409*/ 13242, // Rule ID 3225 //
    6033             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6034             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    6035             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6036             :       // (bitconvert:{ *:[i64] } FPR64:{ *:[f64] }:$Xn)  =>  (COPY_TO_REGCLASS:{ *:[i64] } FPR64:{ *:[f64] }:$Xn, GPR64:{ *:[i32] })
    6037             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6038             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GPR64*/17,
    6039             :       // GIR_Coverage, 3225,
    6040             :       GIR_Done,
    6041             :     // Label 409: @13242
    6042             :     GIM_Try, /*On fail goto*//*Label 410*/ 13265, // Rule ID 3226 //
    6043             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6044             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    6045             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6046             :       // (bitconvert:{ *:[i64] } V64:{ *:[v1f64] }:$Vn)  =>  (COPY_TO_REGCLASS:{ *:[i64] } V64:{ *:[v1f64] }:$Vn, GPR64:{ *:[i32] })
    6047             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6048             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GPR64*/17,
    6049             :       // GIR_Coverage, 3226,
    6050             :       GIR_Done,
    6051             :     // Label 410: @13265
    6052             :     GIM_Try, /*On fail goto*//*Label 411*/ 13299, // Rule ID 3227 //
    6053             :       GIM_CheckFeatures, GIFBS_IsLE,
    6054             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    6055             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6056             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6057             :       // (bitconvert:{ *:[v1i64] } FPR64:{ *:[v2i32] }:$src)  =>  FPR64:{ *:[v1i64] }:$src
    6058             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6059             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6060             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6061             :       GIR_EraseFromParent, /*InsnID*/0,
    6062             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6063             :       // GIR_Coverage, 3227,
    6064             :       GIR_Done,
    6065             :     // Label 411: @13299
    6066             :     GIM_Try, /*On fail goto*//*Label 412*/ 13333, // Rule ID 3228 //
    6067             :       GIM_CheckFeatures, GIFBS_IsLE,
    6068             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6069             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6070             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6071             :       // (bitconvert:{ *:[v1i64] } FPR64:{ *:[v4i16] }:$src)  =>  FPR64:{ *:[v1i64] }:$src
    6072             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6073             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6074             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6075             :       GIR_EraseFromParent, /*InsnID*/0,
    6076             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6077             :       // GIR_Coverage, 3228,
    6078             :       GIR_Done,
    6079             :     // Label 412: @13333
    6080             :     GIM_Try, /*On fail goto*//*Label 413*/ 13367, // Rule ID 3229 //
    6081             :       GIM_CheckFeatures, GIFBS_IsLE,
    6082             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    6083             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6084             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6085             :       // (bitconvert:{ *:[v1i64] } FPR64:{ *:[v8i8] }:$src)  =>  FPR64:{ *:[v1i64] }:$src
    6086             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6087             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6088             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6089             :       GIR_EraseFromParent, /*InsnID*/0,
    6090             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6091             :       // GIR_Coverage, 3229,
    6092             :       GIR_Done,
    6093             :     // Label 413: @13367
    6094             :     GIM_Try, /*On fail goto*//*Label 414*/ 13401, // Rule ID 3230 //
    6095             :       GIM_CheckFeatures, GIFBS_IsLE,
    6096             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6097             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6098             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6099             :       // (bitconvert:{ *:[v1i64] } FPR64:{ *:[v4f16] }:$src)  =>  FPR64:{ *:[v1i64] }:$src
    6100             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6101             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6102             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6103             :       GIR_EraseFromParent, /*InsnID*/0,
    6104             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6105             :       // GIR_Coverage, 3230,
    6106             :       GIR_Done,
    6107             :     // Label 414: @13401
    6108             :     GIM_Try, /*On fail goto*//*Label 415*/ 13435, // Rule ID 3231 //
    6109             :       GIM_CheckFeatures, GIFBS_IsLE,
    6110             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    6111             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6112             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6113             :       // (bitconvert:{ *:[v1i64] } FPR64:{ *:[v2f32] }:$src)  =>  FPR64:{ *:[v1i64] }:$src
    6114             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6115             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6116             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6117             :       GIR_EraseFromParent, /*InsnID*/0,
    6118             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6119             :       // GIR_Coverage, 3231,
    6120             :       GIR_Done,
    6121             :     // Label 415: @13435
    6122             :     GIM_Try, /*On fail goto*//*Label 416*/ 13458, // Rule ID 3232 //
    6123             :       GIM_CheckFeatures, GIFBS_IsBE,
    6124             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    6125             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6126             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6127             :       // (bitconvert:{ *:[v1i64] } FPR64:{ *:[v2i32] }:$src)  =>  (REV64v2i32:{ *:[v1i64] } FPR64:{ *:[v2i32] }:$src)
    6128             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    6129             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6130             :       // GIR_Coverage, 3232,
    6131             :       GIR_Done,
    6132             :     // Label 416: @13458
    6133             :     GIM_Try, /*On fail goto*//*Label 417*/ 13481, // Rule ID 3233 //
    6134             :       GIM_CheckFeatures, GIFBS_IsBE,
    6135             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6136             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6137             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6138             :       // (bitconvert:{ *:[v1i64] } FPR64:{ *:[v4i16] }:$src)  =>  (REV64v4i16:{ *:[v1i64] } FPR64:{ *:[v4i16] }:$src)
    6139             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    6140             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6141             :       // GIR_Coverage, 3233,
    6142             :       GIR_Done,
    6143             :     // Label 417: @13481
    6144             :     GIM_Try, /*On fail goto*//*Label 418*/ 13504, // Rule ID 3234 //
    6145             :       GIM_CheckFeatures, GIFBS_IsBE,
    6146             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    6147             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6148             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6149             :       // (bitconvert:{ *:[v1i64] } FPR64:{ *:[v8i8] }:$src)  =>  (REV64v8i8:{ *:[v1i64] } FPR64:{ *:[v8i8] }:$src)
    6150             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v8i8,
    6151             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6152             :       // GIR_Coverage, 3234,
    6153             :       GIR_Done,
    6154             :     // Label 418: @13504
    6155             :     GIM_Try, /*On fail goto*//*Label 419*/ 13527, // Rule ID 3235 //
    6156             :       GIM_CheckFeatures, GIFBS_IsBE,
    6157             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6158             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6159             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6160             :       // (bitconvert:{ *:[v1i64] } FPR64:{ *:[v4f16] }:$src)  =>  (REV64v4i16:{ *:[v1i64] } FPR64:{ *:[v4f16] }:$src)
    6161             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    6162             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6163             :       // GIR_Coverage, 3235,
    6164             :       GIR_Done,
    6165             :     // Label 419: @13527
    6166             :     GIM_Try, /*On fail goto*//*Label 420*/ 13550, // Rule ID 3236 //
    6167             :       GIM_CheckFeatures, GIFBS_IsBE,
    6168             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    6169             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6170             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6171             :       // (bitconvert:{ *:[v1i64] } FPR64:{ *:[v2f32] }:$src)  =>  (REV64v2i32:{ *:[v1i64] } FPR64:{ *:[v2f32] }:$src)
    6172             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    6173             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6174             :       // GIR_Coverage, 3236,
    6175             :       GIR_Done,
    6176             :     // Label 420: @13550
    6177             :     GIM_Try, /*On fail goto*//*Label 421*/ 13582, // Rule ID 3237 //
    6178             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6179             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6180             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6181             :       // (bitconvert:{ *:[v1i64] } FPR64:{ *:[v1f64] }:$src)  =>  FPR64:{ *:[v1i64] }:$src
    6182             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6183             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6184             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6185             :       GIR_EraseFromParent, /*InsnID*/0,
    6186             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6187             :       // GIR_Coverage, 3237,
    6188             :       GIR_Done,
    6189             :     // Label 421: @13582
    6190             :     GIM_Try, /*On fail goto*//*Label 422*/ 13614, // Rule ID 3238 //
    6191             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6192             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6193             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6194             :       // (bitconvert:{ *:[v1i64] } FPR64:{ *:[f64] }:$src)  =>  FPR64:{ *:[v1i64] }:$src
    6195             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6196             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6197             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6198             :       GIR_EraseFromParent, /*InsnID*/0,
    6199             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6200             :       // GIR_Coverage, 3238,
    6201             :       GIR_Done,
    6202             :     // Label 422: @13614
    6203             :     GIM_Try, /*On fail goto*//*Label 423*/ 13648, // Rule ID 3292 //
    6204             :       GIM_CheckFeatures, GIFBS_IsLE,
    6205             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    6206             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6207             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6208             :       // (bitconvert:{ *:[f64] } FPR64:{ *:[v2i32] }:$src)  =>  FPR64:{ *:[f64] }:$src
    6209             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6210             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6211             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6212             :       GIR_EraseFromParent, /*InsnID*/0,
    6213             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6214             :       // GIR_Coverage, 3292,
    6215             :       GIR_Done,
    6216             :     // Label 423: @13648
    6217             :     GIM_Try, /*On fail goto*//*Label 424*/ 13682, // Rule ID 3293 //
    6218             :       GIM_CheckFeatures, GIFBS_IsLE,
    6219             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6220             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6221             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6222             :       // (bitconvert:{ *:[f64] } FPR64:{ *:[v4i16] }:$src)  =>  FPR64:{ *:[f64] }:$src
    6223             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6224             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6225             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6226             :       GIR_EraseFromParent, /*InsnID*/0,
    6227             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6228             :       // GIR_Coverage, 3293,
    6229             :       GIR_Done,
    6230             :     // Label 424: @13682
    6231             :     GIM_Try, /*On fail goto*//*Label 425*/ 13716, // Rule ID 3294 //
    6232             :       GIM_CheckFeatures, GIFBS_IsLE,
    6233             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    6234             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6235             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6236             :       // (bitconvert:{ *:[f64] } FPR64:{ *:[v2f32] }:$src)  =>  FPR64:{ *:[f64] }:$src
    6237             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6238             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6239             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6240             :       GIR_EraseFromParent, /*InsnID*/0,
    6241             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6242             :       // GIR_Coverage, 3294,
    6243             :       GIR_Done,
    6244             :     // Label 425: @13716
    6245             :     GIM_Try, /*On fail goto*//*Label 426*/ 13750, // Rule ID 3295 //
    6246             :       GIM_CheckFeatures, GIFBS_IsLE,
    6247             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    6248             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6249             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6250             :       // (bitconvert:{ *:[f64] } FPR64:{ *:[v8i8] }:$src)  =>  FPR64:{ *:[f64] }:$src
    6251             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6252             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6253             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6254             :       GIR_EraseFromParent, /*InsnID*/0,
    6255             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6256             :       // GIR_Coverage, 3295,
    6257             :       GIR_Done,
    6258             :     // Label 426: @13750
    6259             :     GIM_Try, /*On fail goto*//*Label 427*/ 13784, // Rule ID 3296 //
    6260             :       GIM_CheckFeatures, GIFBS_IsLE,
    6261             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6262             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6263             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6264             :       // (bitconvert:{ *:[f64] } FPR64:{ *:[v4f16] }:$src)  =>  FPR64:{ *:[f64] }:$src
    6265             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6266             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6267             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6268             :       GIR_EraseFromParent, /*InsnID*/0,
    6269             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6270             :       // GIR_Coverage, 3296,
    6271             :       GIR_Done,
    6272             :     // Label 427: @13784
    6273             :     GIM_Try, /*On fail goto*//*Label 428*/ 13807, // Rule ID 3297 //
    6274             :       GIM_CheckFeatures, GIFBS_IsBE,
    6275             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    6276             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6277             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6278             :       // (bitconvert:{ *:[f64] } FPR64:{ *:[v2i32] }:$src)  =>  (REV64v2i32:{ *:[f64] } FPR64:{ *:[v2i32] }:$src)
    6279             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    6280             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6281             :       // GIR_Coverage, 3297,
    6282             :       GIR_Done,
    6283             :     // Label 428: @13807
    6284             :     GIM_Try, /*On fail goto*//*Label 429*/ 13830, // Rule ID 3298 //
    6285             :       GIM_CheckFeatures, GIFBS_IsBE,
    6286             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6287             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6288             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6289             :       // (bitconvert:{ *:[f64] } FPR64:{ *:[v4i16] }:$src)  =>  (REV64v4i16:{ *:[f64] } FPR64:{ *:[v4i16] }:$src)
    6290             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    6291             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6292             :       // GIR_Coverage, 3298,
    6293             :       GIR_Done,
    6294             :     // Label 429: @13830
    6295             :     GIM_Try, /*On fail goto*//*Label 430*/ 13853, // Rule ID 3299 //
    6296             :       GIM_CheckFeatures, GIFBS_IsBE,
    6297             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    6298             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6299             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6300             :       // (bitconvert:{ *:[f64] } FPR64:{ *:[v2f32] }:$src)  =>  (REV64v2i32:{ *:[f64] } FPR64:{ *:[v2f32] }:$src)
    6301             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    6302             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6303             :       // GIR_Coverage, 3299,
    6304             :       GIR_Done,
    6305             :     // Label 430: @13853
    6306             :     GIM_Try, /*On fail goto*//*Label 431*/ 13876, // Rule ID 3300 //
    6307             :       GIM_CheckFeatures, GIFBS_IsBE,
    6308             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    6309             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6310             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6311             :       // (bitconvert:{ *:[f64] } FPR64:{ *:[v8i8] }:$src)  =>  (REV64v8i8:{ *:[f64] } FPR64:{ *:[v8i8] }:$src)
    6312             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v8i8,
    6313             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6314             :       // GIR_Coverage, 3300,
    6315             :       GIR_Done,
    6316             :     // Label 431: @13876
    6317             :     GIM_Try, /*On fail goto*//*Label 432*/ 13899, // Rule ID 3301 //
    6318             :       GIM_CheckFeatures, GIFBS_IsBE,
    6319             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6320             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6321             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6322             :       // (bitconvert:{ *:[f64] } FPR64:{ *:[v4f16] }:$src)  =>  (REV64v4i16:{ *:[f64] } FPR64:{ *:[v4f16] }:$src)
    6323             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    6324             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6325             :       // GIR_Coverage, 3301,
    6326             :       GIR_Done,
    6327             :     // Label 432: @13899
    6328             :     GIM_Try, /*On fail goto*//*Label 433*/ 13931, // Rule ID 3302 //
    6329             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6330             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6331             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6332             :       // (bitconvert:{ *:[f64] } FPR64:{ *:[v1i64] }:$src)  =>  FPR64:{ *:[f64] }:$src
    6333             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6334             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6335             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6336             :       GIR_EraseFromParent, /*InsnID*/0,
    6337             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6338             :       // GIR_Coverage, 3302,
    6339             :       GIR_Done,
    6340             :     // Label 433: @13931
    6341             :     GIM_Try, /*On fail goto*//*Label 434*/ 13963, // Rule ID 3303 //
    6342             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6343             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6344             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6345             :       // (bitconvert:{ *:[f64] } FPR64:{ *:[v1f64] }:$src)  =>  FPR64:{ *:[f64] }:$src
    6346             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6347             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6348             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6349             :       GIR_EraseFromParent, /*InsnID*/0,
    6350             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6351             :       // GIR_Coverage, 3303,
    6352             :       GIR_Done,
    6353             :     // Label 434: @13963
    6354             :     GIM_Try, /*On fail goto*//*Label 435*/ 13997, // Rule ID 3304 //
    6355             :       GIM_CheckFeatures, GIFBS_IsLE,
    6356             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    6357             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6358             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6359             :       // (bitconvert:{ *:[v1f64] } FPR64:{ *:[v2i32] }:$src)  =>  FPR64:{ *:[v1f64] }:$src
    6360             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6361             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6362             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6363             :       GIR_EraseFromParent, /*InsnID*/0,
    6364             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6365             :       // GIR_Coverage, 3304,
    6366             :       GIR_Done,
    6367             :     // Label 435: @13997
    6368             :     GIM_Try, /*On fail goto*//*Label 436*/ 14031, // Rule ID 3305 //
    6369             :       GIM_CheckFeatures, GIFBS_IsLE,
    6370             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6371             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6372             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6373             :       // (bitconvert:{ *:[v1f64] } FPR64:{ *:[v4i16] }:$src)  =>  FPR64:{ *:[v1f64] }:$src
    6374             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6375             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6376             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6377             :       GIR_EraseFromParent, /*InsnID*/0,
    6378             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6379             :       // GIR_Coverage, 3305,
    6380             :       GIR_Done,
    6381             :     // Label 436: @14031
    6382             :     GIM_Try, /*On fail goto*//*Label 437*/ 14065, // Rule ID 3306 //
    6383             :       GIM_CheckFeatures, GIFBS_IsLE,
    6384             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    6385             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6386             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6387             :       // (bitconvert:{ *:[v1f64] } FPR64:{ *:[v8i8] }:$src)  =>  FPR64:{ *:[v1f64] }:$src
    6388             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6389             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6390             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6391             :       GIR_EraseFromParent, /*InsnID*/0,
    6392             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6393             :       // GIR_Coverage, 3306,
    6394             :       GIR_Done,
    6395             :     // Label 437: @14065
    6396             :     GIM_Try, /*On fail goto*//*Label 438*/ 14099, // Rule ID 3307 //
    6397             :       GIM_CheckFeatures, GIFBS_IsLE,
    6398             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    6399             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6400             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6401             :       // (bitconvert:{ *:[v1f64] } FPR64:{ *:[v2f32] }:$src)  =>  FPR64:{ *:[v1f64] }:$src
    6402             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6403             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6404             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6405             :       GIR_EraseFromParent, /*InsnID*/0,
    6406             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6407             :       // GIR_Coverage, 3307,
    6408             :       GIR_Done,
    6409             :     // Label 438: @14099
    6410             :     GIM_Try, /*On fail goto*//*Label 439*/ 14133, // Rule ID 3308 //
    6411             :       GIM_CheckFeatures, GIFBS_IsLE,
    6412             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6413             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6414             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6415             :       // (bitconvert:{ *:[v1f64] } FPR64:{ *:[v4f16] }:$src)  =>  FPR64:{ *:[v1f64] }:$src
    6416             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6417             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6418             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6419             :       GIR_EraseFromParent, /*InsnID*/0,
    6420             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6421             :       // GIR_Coverage, 3308,
    6422             :       GIR_Done,
    6423             :     // Label 439: @14133
    6424             :     GIM_Try, /*On fail goto*//*Label 440*/ 14156, // Rule ID 3309 //
    6425             :       GIM_CheckFeatures, GIFBS_IsBE,
    6426             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    6427             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6428             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6429             :       // (bitconvert:{ *:[v1f64] } FPR64:{ *:[v2i32] }:$src)  =>  (REV64v2i32:{ *:[v1f64] } FPR64:{ *:[v2i32] }:$src)
    6430             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    6431             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6432             :       // GIR_Coverage, 3309,
    6433             :       GIR_Done,
    6434             :     // Label 440: @14156
    6435             :     GIM_Try, /*On fail goto*//*Label 441*/ 14179, // Rule ID 3310 //
    6436             :       GIM_CheckFeatures, GIFBS_IsBE,
    6437             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6438             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6439             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6440             :       // (bitconvert:{ *:[v1f64] } FPR64:{ *:[v4i16] }:$src)  =>  (REV64v4i16:{ *:[v1f64] } FPR64:{ *:[v4i16] }:$src)
    6441             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    6442             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6443             :       // GIR_Coverage, 3310,
    6444             :       GIR_Done,
    6445             :     // Label 441: @14179
    6446             :     GIM_Try, /*On fail goto*//*Label 442*/ 14202, // Rule ID 3311 //
    6447             :       GIM_CheckFeatures, GIFBS_IsBE,
    6448             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    6449             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6450             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6451             :       // (bitconvert:{ *:[v1f64] } FPR64:{ *:[v8i8] }:$src)  =>  (REV64v8i8:{ *:[v1f64] } FPR64:{ *:[v8i8] }:$src)
    6452             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v8i8,
    6453             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6454             :       // GIR_Coverage, 3311,
    6455             :       GIR_Done,
    6456             :     // Label 442: @14202
    6457             :     GIM_Try, /*On fail goto*//*Label 443*/ 14225, // Rule ID 3312 //
    6458             :       GIM_CheckFeatures, GIFBS_IsBE,
    6459             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    6460             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6461             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6462             :       // (bitconvert:{ *:[v1f64] } FPR64:{ *:[v2f32] }:$src)  =>  (REV64v2i32:{ *:[v1f64] } FPR64:{ *:[v2f32] }:$src)
    6463             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    6464             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6465             :       // GIR_Coverage, 3312,
    6466             :       GIR_Done,
    6467             :     // Label 443: @14225
    6468             :     GIM_Try, /*On fail goto*//*Label 444*/ 14248, // Rule ID 3313 //
    6469             :       GIM_CheckFeatures, GIFBS_IsBE,
    6470             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6471             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6472             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6473             :       // (bitconvert:{ *:[v1f64] } FPR64:{ *:[v4f16] }:$src)  =>  (REV64v4i16:{ *:[v1f64] } FPR64:{ *:[v4f16] }:$src)
    6474             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    6475             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6476             :       // GIR_Coverage, 3313,
    6477             :       GIR_Done,
    6478             :     // Label 444: @14248
    6479             :     GIM_Try, /*On fail goto*//*Label 445*/ 14280, // Rule ID 3314 //
    6480             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6481             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6482             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6483             :       // (bitconvert:{ *:[v1f64] } FPR64:{ *:[v1i64] }:$src)  =>  FPR64:{ *:[v1f64] }:$src
    6484             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6485             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6486             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6487             :       GIR_EraseFromParent, /*InsnID*/0,
    6488             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6489             :       // GIR_Coverage, 3314,
    6490             :       GIR_Done,
    6491             :     // Label 445: @14280
    6492             :     GIM_Try, /*On fail goto*//*Label 446*/ 14312, // Rule ID 3315 //
    6493             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6494             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6495             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6496             :       // (bitconvert:{ *:[v1f64] } FPR64:{ *:[f64] }:$src)  =>  FPR64:{ *:[v1f64] }:$src
    6497             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6498             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6499             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6500             :       GIR_EraseFromParent, /*InsnID*/0,
    6501             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6502             :       // GIR_Coverage, 3315,
    6503             :       GIR_Done,
    6504             :     // Label 446: @14312
    6505             :     GIM_Reject,
    6506             :     // Label 382: @14313
    6507             :     GIM_Try, /*On fail goto*//*Label 447*/ 14347, // Rule ID 3329 //
    6508             :       GIM_CheckFeatures, GIFBS_IsLE,
    6509             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    6510             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6511             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    6512             :       // (bitconvert:{ *:[f128] } FPR128:{ *:[v2i64] }:$src)  =>  FPR128:{ *:[f128] }:$src
    6513             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6514             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6515             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6516             :       GIR_EraseFromParent, /*InsnID*/0,
    6517             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    6518             :       // GIR_Coverage, 3329,
    6519             :       GIR_Done,
    6520             :     // Label 447: @14347
    6521             :     GIM_Try, /*On fail goto*//*Label 448*/ 14381, // Rule ID 3330 //
    6522             :       GIM_CheckFeatures, GIFBS_IsLE,
    6523             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    6524             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6525             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    6526             :       // (bitconvert:{ *:[f128] } FPR128:{ *:[v4i32] }:$src)  =>  FPR128:{ *:[f128] }:$src
    6527             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6528             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6529             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6530             :       GIR_EraseFromParent, /*InsnID*/0,
    6531             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    6532             :       // GIR_Coverage, 3330,
    6533             :       GIR_Done,
    6534             :     // Label 448: @14381
    6535             :     GIM_Try, /*On fail goto*//*Label 449*/ 14415, // Rule ID 3331 //
    6536             :       GIM_CheckFeatures, GIFBS_IsLE,
    6537             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    6538             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6539             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    6540             :       // (bitconvert:{ *:[f128] } FPR128:{ *:[v8i16] }:$src)  =>  FPR128:{ *:[f128] }:$src
    6541             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6542             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6543             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6544             :       GIR_EraseFromParent, /*InsnID*/0,
    6545             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    6546             :       // GIR_Coverage, 3331,
    6547             :       GIR_Done,
    6548             :     // Label 449: @14415
    6549             :     GIM_Try, /*On fail goto*//*Label 450*/ 14449, // Rule ID 3332 //
    6550             :       GIM_CheckFeatures, GIFBS_IsLE,
    6551             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    6552             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6553             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    6554             :       // (bitconvert:{ *:[f128] } FPR128:{ *:[v2f64] }:$src)  =>  FPR128:{ *:[f128] }:$src
    6555             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6556             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6557             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6558             :       GIR_EraseFromParent, /*InsnID*/0,
    6559             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    6560             :       // GIR_Coverage, 3332,
    6561             :       GIR_Done,
    6562             :     // Label 450: @14449
    6563             :     GIM_Try, /*On fail goto*//*Label 451*/ 14483, // Rule ID 3333 //
    6564             :       GIM_CheckFeatures, GIFBS_IsLE,
    6565             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    6566             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6567             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    6568             :       // (bitconvert:{ *:[f128] } FPR128:{ *:[v4f32] }:$src)  =>  FPR128:{ *:[f128] }:$src
    6569             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6570             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6571             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6572             :       GIR_EraseFromParent, /*InsnID*/0,
    6573             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    6574             :       // GIR_Coverage, 3333,
    6575             :       GIR_Done,
    6576             :     // Label 451: @14483
    6577             :     GIM_Try, /*On fail goto*//*Label 452*/ 14517, // Rule ID 3334 //
    6578             :       GIM_CheckFeatures, GIFBS_IsLE,
    6579             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    6580             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6581             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    6582             :       // (bitconvert:{ *:[f128] } FPR128:{ *:[v8f16] }:$src)  =>  FPR128:{ *:[f128] }:$src
    6583             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6584             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6585             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6586             :       GIR_EraseFromParent, /*InsnID*/0,
    6587             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    6588             :       // GIR_Coverage, 3334,
    6589             :       GIR_Done,
    6590             :     // Label 452: @14517
    6591             :     GIM_Try, /*On fail goto*//*Label 453*/ 14551, // Rule ID 3335 //
    6592             :       GIM_CheckFeatures, GIFBS_IsLE,
    6593             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    6594             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6595             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    6596             :       // (bitconvert:{ *:[f128] } FPR128:{ *:[v16i8] }:$src)  =>  FPR128:{ *:[f128] }:$src
    6597             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6598             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6599             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6600             :       GIR_EraseFromParent, /*InsnID*/0,
    6601             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    6602             :       // GIR_Coverage, 3335,
    6603             :       GIR_Done,
    6604             :     // Label 453: @14551
    6605             :     GIM_Try, /*On fail goto*//*Label 454*/ 14590, // Rule ID 3336 //
    6606             :       GIM_CheckFeatures, GIFBS_IsBE,
    6607             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    6608             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6609             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    6610             :       // (bitconvert:{ *:[f128] } FPR128:{ *:[v2i64] }:$src)  =>  (EXTv16i8:{ *:[f128] } FPR128:{ *:[v2i64] }:$src, FPR128:{ *:[v2i64] }:$src, 8:{ *:[i32] })
    6611             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EXTv16i8,
    6612             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6613             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6614             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6615             :       GIR_AddImm, /*InsnID*/0, /*Imm*/8,
    6616             :       GIR_EraseFromParent, /*InsnID*/0,
    6617             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6618             :       // GIR_Coverage, 3336,
    6619             :       GIR_Done,
    6620             :     // Label 454: @14590
    6621             :     GIM_Try, /*On fail goto*//*Label 455*/ 14661, // Rule ID 3337 //
    6622             :       GIM_CheckFeatures, GIFBS_IsBE,
    6623             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    6624             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6625             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    6626             :       // (bitconvert:{ *:[f128] } FPR128:{ *:[v4i32] }:$src)  =>  (EXTv16i8:{ *:[f128] } (REV64v4i32:{ *:[f128] } FPR128:{ *:[v4i32] }:$src), (REV64v4i32:{ *:[f128] } FPR128:{ *:[v4i32] }:$src), 8:{ *:[i32] })
    6627             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s128,
    6628             :       GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s128,
    6629             :       GIR_BuildMI, /*InsnID*/2, /*Opcode*/AArch64::REV64v4i32,
    6630             :       GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
    6631             :       GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
    6632             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
    6633             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::REV64v4i32,
    6634             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    6635             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
    6636             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    6637             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EXTv16i8,
    6638             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6639             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    6640             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/1, /*TempRegFlags*/0,
    6641             :       GIR_AddImm, /*InsnID*/0, /*Imm*/8,
    6642             :       GIR_EraseFromParent, /*InsnID*/0,
    6643             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6644             :       // GIR_Coverage, 3337,
    6645             :       GIR_Done,
    6646             :     // Label 455: @14661
    6647             :     GIM_Try, /*On fail goto*//*Label 456*/ 14732, // Rule ID 3338 //
    6648             :       GIM_CheckFeatures, GIFBS_IsBE,
    6649             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    6650             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6651             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    6652             :       // (bitconvert:{ *:[f128] } FPR128:{ *:[v8i16] }:$src)  =>  (EXTv16i8:{ *:[f128] } (REV64v8i16:{ *:[f128] } FPR128:{ *:[v8i16] }:$src), (REV64v8i16:{ *:[f128] } FPR128:{ *:[v8i16] }:$src), 8:{ *:[i32] })
    6653             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s128,
    6654             :       GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s128,
    6655             :       GIR_BuildMI, /*InsnID*/2, /*Opcode*/AArch64::REV64v8i16,
    6656             :       GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
    6657             :       GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
    6658             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
    6659             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::REV64v8i16,
    6660             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    6661             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
    6662             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    6663             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EXTv16i8,
    6664             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6665             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    6666             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/1, /*TempRegFlags*/0,
    6667             :       GIR_AddImm, /*InsnID*/0, /*Imm*/8,
    6668             :       GIR_EraseFromParent, /*InsnID*/0,
    6669             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6670             :       // GIR_Coverage, 3338,
    6671             :       GIR_Done,
    6672             :     // Label 456: @14732
    6673             :     GIM_Try, /*On fail goto*//*Label 457*/ 14803, // Rule ID 3339 //
    6674             :       GIM_CheckFeatures, GIFBS_IsBE,
    6675             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    6676             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6677             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    6678             :       // (bitconvert:{ *:[f128] } FPR128:{ *:[v8f16] }:$src)  =>  (EXTv16i8:{ *:[f128] } (REV64v8i16:{ *:[f128] } FPR128:{ *:[v8f16] }:$src), (REV64v8i16:{ *:[f128] } FPR128:{ *:[v8f16] }:$src), 8:{ *:[i32] })
    6679             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s128,
    6680             :       GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s128,
    6681             :       GIR_BuildMI, /*InsnID*/2, /*Opcode*/AArch64::REV64v8i16,
    6682             :       GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
    6683             :       GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
    6684             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
    6685             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::REV64v8i16,
    6686             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    6687             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
    6688             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    6689             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EXTv16i8,
    6690             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6691             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    6692             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/1, /*TempRegFlags*/0,
    6693             :       GIR_AddImm, /*InsnID*/0, /*Imm*/8,
    6694             :       GIR_EraseFromParent, /*InsnID*/0,
    6695             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6696             :       // GIR_Coverage, 3339,
    6697             :       GIR_Done,
    6698             :     // Label 457: @14803
    6699             :     GIM_Try, /*On fail goto*//*Label 458*/ 14842, // Rule ID 3340 //
    6700             :       GIM_CheckFeatures, GIFBS_IsBE,
    6701             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    6702             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6703             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    6704             :       // (bitconvert:{ *:[f128] } FPR128:{ *:[v2f64] }:$src)  =>  (EXTv16i8:{ *:[f128] } FPR128:{ *:[v2f64] }:$src, FPR128:{ *:[v2f64] }:$src, 8:{ *:[i32] })
    6705             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EXTv16i8,
    6706             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6707             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6708             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6709             :       GIR_AddImm, /*InsnID*/0, /*Imm*/8,
    6710             :       GIR_EraseFromParent, /*InsnID*/0,
    6711             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6712             :       // GIR_Coverage, 3340,
    6713             :       GIR_Done,
    6714             :     // Label 458: @14842
    6715             :     GIM_Try, /*On fail goto*//*Label 459*/ 14913, // Rule ID 3341 //
    6716             :       GIM_CheckFeatures, GIFBS_IsBE,
    6717             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    6718             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6719             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    6720             :       // (bitconvert:{ *:[f128] } FPR128:{ *:[v4f32] }:$src)  =>  (EXTv16i8:{ *:[f128] } (REV64v4i32:{ *:[f128] } FPR128:{ *:[v4f32] }:$src), (REV64v4i32:{ *:[f128] } FPR128:{ *:[v4f32] }:$src), 8:{ *:[i32] })
    6721             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s128,
    6722             :       GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s128,
    6723             :       GIR_BuildMI, /*InsnID*/2, /*Opcode*/AArch64::REV64v4i32,
    6724             :       GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
    6725             :       GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
    6726             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
    6727             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::REV64v4i32,
    6728             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    6729             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
    6730             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    6731             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EXTv16i8,
    6732             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6733             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    6734             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/1, /*TempRegFlags*/0,
    6735             :       GIR_AddImm, /*InsnID*/0, /*Imm*/8,
    6736             :       GIR_EraseFromParent, /*InsnID*/0,
    6737             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6738             :       // GIR_Coverage, 3341,
    6739             :       GIR_Done,
    6740             :     // Label 459: @14913
    6741             :     GIM_Try, /*On fail goto*//*Label 460*/ 14984, // Rule ID 3342 //
    6742             :       GIM_CheckFeatures, GIFBS_IsBE,
    6743             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    6744             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6745             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    6746             :       // (bitconvert:{ *:[f128] } FPR128:{ *:[v16i8] }:$src)  =>  (EXTv16i8:{ *:[f128] } (REV64v16i8:{ *:[f128] } FPR128:{ *:[v16i8] }:$src), (REV64v16i8:{ *:[f128] } FPR128:{ *:[v16i8] }:$src), 8:{ *:[i32] })
    6747             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s128,
    6748             :       GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s128,
    6749             :       GIR_BuildMI, /*InsnID*/2, /*Opcode*/AArch64::REV64v16i8,
    6750             :       GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
    6751             :       GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
    6752             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
    6753             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::REV64v16i8,
    6754             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    6755             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
    6756             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    6757             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EXTv16i8,
    6758             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6759             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    6760             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/1, /*TempRegFlags*/0,
    6761             :       GIR_AddImm, /*InsnID*/0, /*Imm*/8,
    6762             :       GIR_EraseFromParent, /*InsnID*/0,
    6763             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6764             :       // GIR_Coverage, 3342,
    6765             :       GIR_Done,
    6766             :     // Label 460: @14984
    6767             :     GIM_Reject,
    6768             :     // Label 383: @14985
    6769             :     GIM_Try, /*On fail goto*//*Label 461*/ 15010, // Rule ID 3197 //
    6770             :       GIM_CheckFeatures, GIFBS_IsLE,
    6771             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6772             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6773             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    6774             :       // (bitconvert:{ *:[v2i32] } GPR64:{ *:[i64] }:$Xn)  =>  (COPY_TO_REGCLASS:{ *:[v2i32] } GPR64:{ *:[i64] }:$Xn, FPR64:{ *:[i32] })
    6775             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6776             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6777             :       // GIR_Coverage, 3197,
    6778             :       GIR_Done,
    6779             :     // Label 461: @15010
    6780             :     GIM_Try, /*On fail goto*//*Label 462*/ 15035, // Rule ID 3199 //
    6781             :       GIM_CheckFeatures, GIFBS_IsLE,
    6782             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6783             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6784             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    6785             :       // (bitconvert:{ *:[v2f32] } GPR64:{ *:[i64] }:$Xn)  =>  (COPY_TO_REGCLASS:{ *:[v2f32] } GPR64:{ *:[i64] }:$Xn, FPR64:{ *:[i32] })
    6786             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6787             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6788             :       // GIR_Coverage, 3199,
    6789             :       GIR_Done,
    6790             :     // Label 462: @15035
    6791             :     GIM_Try, /*On fail goto*//*Label 463*/ 15083, // Rule ID 3208 //
    6792             :       GIM_CheckFeatures, GIFBS_IsBE,
    6793             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6794             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6795             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    6796             :       // (bitconvert:{ *:[v2i32] } GPR64:{ *:[i64] }:$Xn)  =>  (REV64v2i32:{ *:[v2i32] } (COPY_TO_REGCLASS:{ *:[i64] } GPR64:{ *:[i64] }:$Xn, FPR64:{ *:[i32] }))
    6797             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
    6798             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY,
    6799             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    6800             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // Xn
    6801             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    6802             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    6803             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6804             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    6805             :       GIR_EraseFromParent, /*InsnID*/0,
    6806             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6807             :       // GIR_Coverage, 3208,
    6808             :       GIR_Done,
    6809             :     // Label 463: @15083
    6810             :     GIM_Try, /*On fail goto*//*Label 464*/ 15131, // Rule ID 3210 //
    6811             :       GIM_CheckFeatures, GIFBS_IsBE,
    6812             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6813             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6814             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    6815             :       // (bitconvert:{ *:[v2f32] } GPR64:{ *:[i64] }:$Xn)  =>  (REV64v2i32:{ *:[v2f32] } (COPY_TO_REGCLASS:{ *:[i64] } GPR64:{ *:[i64] }:$Xn, FPR64:{ *:[i32] }))
    6816             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
    6817             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY,
    6818             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    6819             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // Xn
    6820             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    6821             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    6822             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6823             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    6824             :       GIR_EraseFromParent, /*InsnID*/0,
    6825             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6826             :       // GIR_Coverage, 3210,
    6827             :       GIR_Done,
    6828             :     // Label 464: @15131
    6829             :     GIM_Try, /*On fail goto*//*Label 465*/ 15165, // Rule ID 3239 //
    6830             :       GIM_CheckFeatures, GIFBS_IsLE,
    6831             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6832             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6833             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6834             :       // (bitconvert:{ *:[v2i32] } FPR64:{ *:[v1i64] }:$src)  =>  FPR64:{ *:[v2i32] }:$src
    6835             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6836             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6837             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6838             :       GIR_EraseFromParent, /*InsnID*/0,
    6839             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6840             :       // GIR_Coverage, 3239,
    6841             :       GIR_Done,
    6842             :     // Label 465: @15165
    6843             :     GIM_Try, /*On fail goto*//*Label 466*/ 15199, // Rule ID 3240 //
    6844             :       GIM_CheckFeatures, GIFBS_IsLE,
    6845             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6846             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6847             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6848             :       // (bitconvert:{ *:[v2i32] } FPR64:{ *:[v4i16] }:$src)  =>  FPR64:{ *:[v2i32] }:$src
    6849             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6850             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6851             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6852             :       GIR_EraseFromParent, /*InsnID*/0,
    6853             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6854             :       // GIR_Coverage, 3240,
    6855             :       GIR_Done,
    6856             :     // Label 466: @15199
    6857             :     GIM_Try, /*On fail goto*//*Label 467*/ 15233, // Rule ID 3241 //
    6858             :       GIM_CheckFeatures, GIFBS_IsLE,
    6859             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    6860             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6861             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6862             :       // (bitconvert:{ *:[v2i32] } FPR64:{ *:[v8i8] }:$src)  =>  FPR64:{ *:[v2i32] }:$src
    6863             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6864             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6865             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6866             :       GIR_EraseFromParent, /*InsnID*/0,
    6867             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6868             :       // GIR_Coverage, 3241,
    6869             :       GIR_Done,
    6870             :     // Label 467: @15233
    6871             :     GIM_Try, /*On fail goto*//*Label 468*/ 15267, // Rule ID 3242 //
    6872             :       GIM_CheckFeatures, GIFBS_IsLE,
    6873             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6874             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6875             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6876             :       // (bitconvert:{ *:[v2i32] } FPR64:{ *:[f64] }:$src)  =>  FPR64:{ *:[v2i32] }:$src
    6877             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6878             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6879             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6880             :       GIR_EraseFromParent, /*InsnID*/0,
    6881             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6882             :       // GIR_Coverage, 3242,
    6883             :       GIR_Done,
    6884             :     // Label 468: @15267
    6885             :     GIM_Try, /*On fail goto*//*Label 469*/ 15301, // Rule ID 3243 //
    6886             :       GIM_CheckFeatures, GIFBS_IsLE,
    6887             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6888             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6889             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6890             :       // (bitconvert:{ *:[v2i32] } FPR64:{ *:[v1f64] }:$src)  =>  FPR64:{ *:[v2i32] }:$src
    6891             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6892             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6893             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6894             :       GIR_EraseFromParent, /*InsnID*/0,
    6895             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6896             :       // GIR_Coverage, 3243,
    6897             :       GIR_Done,
    6898             :     // Label 469: @15301
    6899             :     GIM_Try, /*On fail goto*//*Label 470*/ 15335, // Rule ID 3244 //
    6900             :       GIM_CheckFeatures, GIFBS_IsLE,
    6901             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6902             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6903             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6904             :       // (bitconvert:{ *:[v2i32] } FPR64:{ *:[v4f16] }:$src)  =>  FPR64:{ *:[v2i32] }:$src
    6905             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6906             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6907             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6908             :       GIR_EraseFromParent, /*InsnID*/0,
    6909             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6910             :       // GIR_Coverage, 3244,
    6911             :       GIR_Done,
    6912             :     // Label 470: @15335
    6913             :     GIM_Try, /*On fail goto*//*Label 471*/ 15358, // Rule ID 3245 //
    6914             :       GIM_CheckFeatures, GIFBS_IsBE,
    6915             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6916             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6917             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6918             :       // (bitconvert:{ *:[v2i32] } FPR64:{ *:[v1i64] }:$src)  =>  (REV64v2i32:{ *:[v2i32] } FPR64:{ *:[v1i64] }:$src)
    6919             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    6920             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6921             :       // GIR_Coverage, 3245,
    6922             :       GIR_Done,
    6923             :     // Label 471: @15358
    6924             :     GIM_Try, /*On fail goto*//*Label 472*/ 15381, // Rule ID 3246 //
    6925             :       GIM_CheckFeatures, GIFBS_IsBE,
    6926             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6927             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6928             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6929             :       // (bitconvert:{ *:[v2i32] } FPR64:{ *:[v4i16] }:$src)  =>  (REV32v4i16:{ *:[v2i32] } FPR64:{ *:[v4i16] }:$src)
    6930             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v4i16,
    6931             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6932             :       // GIR_Coverage, 3246,
    6933             :       GIR_Done,
    6934             :     // Label 472: @15381
    6935             :     GIM_Try, /*On fail goto*//*Label 473*/ 15404, // Rule ID 3247 //
    6936             :       GIM_CheckFeatures, GIFBS_IsBE,
    6937             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    6938             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6939             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6940             :       // (bitconvert:{ *:[v2i32] } FPR64:{ *:[v8i8] }:$src)  =>  (REV32v8i8:{ *:[v2i32] } FPR64:{ *:[v8i8] }:$src)
    6941             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v8i8,
    6942             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6943             :       // GIR_Coverage, 3247,
    6944             :       GIR_Done,
    6945             :     // Label 473: @15404
    6946             :     GIM_Try, /*On fail goto*//*Label 474*/ 15427, // Rule ID 3248 //
    6947             :       GIM_CheckFeatures, GIFBS_IsBE,
    6948             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6949             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6950             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6951             :       // (bitconvert:{ *:[v2i32] } FPR64:{ *:[f64] }:$src)  =>  (REV64v2i32:{ *:[v2i32] } FPR64:{ *:[f64] }:$src)
    6952             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    6953             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6954             :       // GIR_Coverage, 3248,
    6955             :       GIR_Done,
    6956             :     // Label 474: @15427
    6957             :     GIM_Try, /*On fail goto*//*Label 475*/ 15450, // Rule ID 3249 //
    6958             :       GIM_CheckFeatures, GIFBS_IsBE,
    6959             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6960             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6961             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6962             :       // (bitconvert:{ *:[v2i32] } FPR64:{ *:[v1f64] }:$src)  =>  (REV64v2i32:{ *:[v2i32] } FPR64:{ *:[v1f64] }:$src)
    6963             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    6964             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6965             :       // GIR_Coverage, 3249,
    6966             :       GIR_Done,
    6967             :     // Label 475: @15450
    6968             :     GIM_Try, /*On fail goto*//*Label 476*/ 15473, // Rule ID 3250 //
    6969             :       GIM_CheckFeatures, GIFBS_IsBE,
    6970             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6971             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6972             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6973             :       // (bitconvert:{ *:[v2i32] } FPR64:{ *:[v4f16] }:$src)  =>  (REV32v4i16:{ *:[v2i32] } FPR64:{ *:[v4f16] }:$src)
    6974             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v4i16,
    6975             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6976             :       // GIR_Coverage, 3250,
    6977             :       GIR_Done,
    6978             :     // Label 476: @15473
    6979             :     GIM_Try, /*On fail goto*//*Label 477*/ 15505, // Rule ID 3251 //
    6980             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    6981             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6982             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6983             :       // (bitconvert:{ *:[v2i32] } FPR64:{ *:[v2f32] }:$src)  =>  FPR64:{ *:[v2i32] }:$src
    6984             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6985             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6986             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6987             :       GIR_EraseFromParent, /*InsnID*/0,
    6988             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6989             :       // GIR_Coverage, 3251,
    6990             :       GIR_Done,
    6991             :     // Label 477: @15505
    6992             :     GIM_Try, /*On fail goto*//*Label 478*/ 15539, // Rule ID 3316 //
    6993             :       GIM_CheckFeatures, GIFBS_IsLE,
    6994             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6995             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6996             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6997             :       // (bitconvert:{ *:[v2f32] } FPR64:{ *:[v1i64] }:$src)  =>  FPR64:{ *:[v2f32] }:$src
    6998             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6999             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7000             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7001             :       GIR_EraseFromParent, /*InsnID*/0,
    7002             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7003             :       // GIR_Coverage, 3316,
    7004             :       GIR_Done,
    7005             :     // Label 478: @15539
    7006             :     GIM_Try, /*On fail goto*//*Label 479*/ 15573, // Rule ID 3317 //
    7007             :       GIM_CheckFeatures, GIFBS_IsLE,
    7008             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    7009             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7010             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7011             :       // (bitconvert:{ *:[v2f32] } FPR64:{ *:[v4i16] }:$src)  =>  FPR64:{ *:[v2f32] }:$src
    7012             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7013             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7014             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7015             :       GIR_EraseFromParent, /*InsnID*/0,
    7016             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7017             :       // GIR_Coverage, 3317,
    7018             :       GIR_Done,
    7019             :     // Label 479: @15573
    7020             :     GIM_Try, /*On fail goto*//*Label 480*/ 15607, // Rule ID 3318 //
    7021             :       GIM_CheckFeatures, GIFBS_IsLE,
    7022             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    7023             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7024             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7025             :       // (bitconvert:{ *:[v2f32] } FPR64:{ *:[v8i8] }:$src)  =>  FPR64:{ *:[v2f32] }:$src
    7026             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7027             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7028             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7029             :       GIR_EraseFromParent, /*InsnID*/0,
    7030             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7031             :       // GIR_Coverage, 3318,
    7032             :       GIR_Done,
    7033             :     // Label 480: @15607
    7034             :     GIM_Try, /*On fail goto*//*Label 481*/ 15641, // Rule ID 3319 //
    7035             :       GIM_CheckFeatures, GIFBS_IsLE,
    7036             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7037             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7038             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7039             :       // (bitconvert:{ *:[v2f32] } FPR64:{ *:[v1f64] }:$src)  =>  FPR64:{ *:[v2f32] }:$src
    7040             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7041             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7042             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7043             :       GIR_EraseFromParent, /*InsnID*/0,
    7044             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7045             :       // GIR_Coverage, 3319,
    7046             :       GIR_Done,
    7047             :     // Label 481: @15641
    7048             :     GIM_Try, /*On fail goto*//*Label 482*/ 15675, // Rule ID 3320 //
    7049             :       GIM_CheckFeatures, GIFBS_IsLE,
    7050             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7051             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7052             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7053             :       // (bitconvert:{ *:[v2f32] } FPR64:{ *:[f64] }:$src)  =>  FPR64:{ *:[v2f32] }:$src
    7054             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7055             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7056             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7057             :       GIR_EraseFromParent, /*InsnID*/0,
    7058             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7059             :       // GIR_Coverage, 3320,
    7060             :       GIR_Done,
    7061             :     // Label 482: @15675
    7062             :     GIM_Try, /*On fail goto*//*Label 483*/ 15709, // Rule ID 3321 //
    7063             :       GIM_CheckFeatures, GIFBS_IsLE,
    7064             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    7065             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7066             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7067             :       // (bitconvert:{ *:[v2f32] } FPR64:{ *:[v4f16] }:$src)  =>  FPR64:{ *:[v2f32] }:$src
    7068             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7069             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7070             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7071             :       GIR_EraseFromParent, /*InsnID*/0,
    7072             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7073             :       // GIR_Coverage, 3321,
    7074             :       GIR_Done,
    7075             :     // Label 483: @15709
    7076             :     GIM_Try, /*On fail goto*//*Label 484*/ 15732, // Rule ID 3322 //
    7077             :       GIM_CheckFeatures, GIFBS_IsBE,
    7078             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7079             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7080             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7081             :       // (bitconvert:{ *:[v2f32] } FPR64:{ *:[v1i64] }:$src)  =>  (REV64v2i32:{ *:[v2f32] } FPR64:{ *:[v1i64] }:$src)
    7082             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    7083             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7084             :       // GIR_Coverage, 3322,
    7085             :       GIR_Done,
    7086             :     // Label 484: @15732
    7087             :     GIM_Try, /*On fail goto*//*Label 485*/ 15755, // Rule ID 3323 //
    7088             :       GIM_CheckFeatures, GIFBS_IsBE,
    7089             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    7090             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7091             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7092             :       // (bitconvert:{ *:[v2f32] } FPR64:{ *:[v4i16] }:$src)  =>  (REV32v4i16:{ *:[v2f32] } FPR64:{ *:[v4i16] }:$src)
    7093             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v4i16,
    7094             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7095             :       // GIR_Coverage, 3323,
    7096             :       GIR_Done,
    7097             :     // Label 485: @15755
    7098             :     GIM_Try, /*On fail goto*//*Label 486*/ 15778, // Rule ID 3324 //
    7099             :       GIM_CheckFeatures, GIFBS_IsBE,
    7100             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    7101             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7102             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7103             :       // (bitconvert:{ *:[v2f32] } FPR64:{ *:[v8i8] }:$src)  =>  (REV32v8i8:{ *:[v2f32] } FPR64:{ *:[v8i8] }:$src)
    7104             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v8i8,
    7105             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7106             :       // GIR_Coverage, 3324,
    7107             :       GIR_Done,
    7108             :     // Label 486: @15778
    7109             :     GIM_Try, /*On fail goto*//*Label 487*/ 15801, // Rule ID 3325 //
    7110             :       GIM_CheckFeatures, GIFBS_IsBE,
    7111             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7112             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7113             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7114             :       // (bitconvert:{ *:[v2f32] } FPR64:{ *:[v1f64] }:$src)  =>  (REV64v2i32:{ *:[v2f32] } FPR64:{ *:[v1f64] }:$src)
    7115             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    7116             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7117             :       // GIR_Coverage, 3325,
    7118             :       GIR_Done,
    7119             :     // Label 487: @15801
    7120             :     GIM_Try, /*On fail goto*//*Label 488*/ 15824, // Rule ID 3326 //
    7121             :       GIM_CheckFeatures, GIFBS_IsBE,
    7122             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7123             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7124             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7125             :       // (bitconvert:{ *:[v2f32] } FPR64:{ *:[f64] }:$src)  =>  (REV64v2i32:{ *:[v2f32] } FPR64:{ *:[f64] }:$src)
    7126             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    7127             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7128             :       // GIR_Coverage, 3326,
    7129             :       GIR_Done,
    7130             :     // Label 488: @15824
    7131             :     GIM_Try, /*On fail goto*//*Label 489*/ 15847, // Rule ID 3327 //
    7132             :       GIM_CheckFeatures, GIFBS_IsBE,
    7133             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    7134             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7135             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7136             :       // (bitconvert:{ *:[v2f32] } FPR64:{ *:[v4f16] }:$src)  =>  (REV32v4i16:{ *:[v2f32] } FPR64:{ *:[v4f16] }:$src)
    7137             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v4i16,
    7138             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7139             :       // GIR_Coverage, 3327,
    7140             :       GIR_Done,
    7141             :     // Label 489: @15847
    7142             :     GIM_Try, /*On fail goto*//*Label 490*/ 15879, // Rule ID 3328 //
    7143             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    7144             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7145             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7146             :       // (bitconvert:{ *:[v2f32] } FPR64:{ *:[v2i32] }:$src)  =>  FPR64:{ *:[v2f32] }:$src
    7147             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7148             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7149             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7150             :       GIR_EraseFromParent, /*InsnID*/0,
    7151             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7152             :       // GIR_Coverage, 3328,
    7153             :       GIR_Done,
    7154             :     // Label 490: @15879
    7155             :     GIM_Reject,
    7156             :     // Label 384: @15880
    7157             :     GIM_Try, /*On fail goto*//*Label 491*/ 15914, // Rule ID 3343 //
    7158             :       GIM_CheckFeatures, GIFBS_IsLE,
    7159             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
    7160             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7161             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7162             :       // (bitconvert:{ *:[v2f64] } FPR128:{ *:[f128] }:$src)  =>  FPR128:{ *:[v2f64] }:$src
    7163             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7164             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7165             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7166             :       GIR_EraseFromParent, /*InsnID*/0,
    7167             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    7168             :       // GIR_Coverage, 3343,
    7169             :       GIR_Done,
    7170             :     // Label 491: @15914
    7171             :     GIM_Try, /*On fail goto*//*Label 492*/ 15948, // Rule ID 3344 //
    7172             :       GIM_CheckFeatures, GIFBS_IsLE,
    7173             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    7174             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7175             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7176             :       // (bitconvert:{ *:[v2f64] } FPR128:{ *:[v4i32] }:$src)  =>  FPR128:{ *:[v2f64] }:$src
    7177             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7178             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7179             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7180             :       GIR_EraseFromParent, /*InsnID*/0,
    7181             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    7182             :       // GIR_Coverage, 3344,
    7183             :       GIR_Done,
    7184             :     // Label 492: @15948
    7185             :     GIM_Try, /*On fail goto*//*Label 493*/ 15982, // Rule ID 3345 //
    7186             :       GIM_CheckFeatures, GIFBS_IsLE,
    7187             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    7188             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7189             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7190             :       // (bitconvert:{ *:[v2f64] } FPR128:{ *:[v8i16] }:$src)  =>  FPR128:{ *:[v2f64] }:$src
    7191             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7192             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7193             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7194             :       GIR_EraseFromParent, /*InsnID*/0,
    7195             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    7196             :       // GIR_Coverage, 3345,
    7197             :       GIR_Done,
    7198             :     // Label 493: @15982
    7199             :     GIM_Try, /*On fail goto*//*Label 494*/ 16016, // Rule ID 3346 //
    7200             :       GIM_CheckFeatures, GIFBS_IsLE,
    7201             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    7202             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7203             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7204             :       // (bitconvert:{ *:[v2f64] } FPR128:{ *:[v8f16] }:$src)  =>  FPR128:{ *:[v2f64] }:$src
    7205             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7206             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7207             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7208             :       GIR_EraseFromParent, /*InsnID*/0,
    7209             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    7210             :       // GIR_Coverage, 3346,
    7211             :       GIR_Done,
    7212             :     // Label 494: @16016
    7213             :     GIM_Try, /*On fail goto*//*Label 495*/ 16050, // Rule ID 3347 //
    7214             :       GIM_CheckFeatures, GIFBS_IsLE,
    7215             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    7216             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7217             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7218             :       // (bitconvert:{ *:[v2f64] } FPR128:{ *:[v16i8] }:$src)  =>  FPR128:{ *:[v2f64] }:$src
    7219             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7220             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7221             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7222             :       GIR_EraseFromParent, /*InsnID*/0,
    7223             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    7224             :       // GIR_Coverage, 3347,
    7225             :       GIR_Done,
    7226             :     // Label 495: @16050
    7227             :     GIM_Try, /*On fail goto*//*Label 496*/ 16084, // Rule ID 3348 //
    7228             :       GIM_CheckFeatures, GIFBS_IsLE,
    7229             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    7230             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7231             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7232             :       // (bitconvert:{ *:[v2f64] } FPR128:{ *:[v4f32] }:$src)  =>  FPR128:{ *:[v2f64] }:$src
    7233             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7234             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7235             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7236             :       GIR_EraseFromParent, /*InsnID*/0,
    7237             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    7238             :       // GIR_Coverage, 3348,
    7239             :       GIR_Done,
    7240             :     // Label 496: @16084
    7241             :     GIM_Try, /*On fail goto*//*Label 497*/ 16123, // Rule ID 3349 //
    7242             :       GIM_CheckFeatures, GIFBS_IsBE,
    7243             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
    7244             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7245             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7246             :       // (bitconvert:{ *:[v2f64] } FPR128:{ *:[f128] }:$src)  =>  (EXTv16i8:{ *:[v2f64] } FPR128:{ *:[f128] }:$src, FPR128:{ *:[f128] }:$src, 8:{ *:[i32] })
    7247             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EXTv16i8,
    7248             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7249             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7250             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7251             :       GIR_AddImm, /*InsnID*/0, /*Imm*/8,
    7252             :       GIR_EraseFromParent, /*InsnID*/0,
    7253             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7254             :       // GIR_Coverage, 3349,
    7255             :       GIR_Done,
    7256             :     // Label 497: @16123
    7257             :     GIM_Try, /*On fail goto*//*Label 498*/ 16146, // Rule ID 3350 //
    7258             :       GIM_CheckFeatures, GIFBS_IsBE,
    7259             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    7260             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7261             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7262             :       // (bitconvert:{ *:[v2f64] } FPR128:{ *:[v4i32] }:$src)  =>  (REV64v4i32:{ *:[v2f64] } FPR128:{ *:[v4i32] }:$src)
    7263             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i32,
    7264             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7265             :       // GIR_Coverage, 3350,
    7266             :       GIR_Done,
    7267             :     // Label 498: @16146
    7268             :     GIM_Try, /*On fail goto*//*Label 499*/ 16169, // Rule ID 3351 //
    7269             :       GIM_CheckFeatures, GIFBS_IsBE,
    7270             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    7271             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7272             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7273             :       // (bitconvert:{ *:[v2f64] } FPR128:{ *:[v8i16] }:$src)  =>  (REV64v8i16:{ *:[v2f64] } FPR128:{ *:[v8i16] }:$src)
    7274             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v8i16,
    7275             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7276             :       // GIR_Coverage, 3351,
    7277             :       GIR_Done,
    7278             :     // Label 499: @16169
    7279             :     GIM_Try, /*On fail goto*//*Label 500*/ 16192, // Rule ID 3352 //
    7280             :       GIM_CheckFeatures, GIFBS_IsBE,
    7281             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    7282             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7283             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7284             :       // (bitconvert:{ *:[v2f64] } FPR128:{ *:[v8f16] }:$src)  =>  (REV64v8i16:{ *:[v2f64] } FPR128:{ *:[v8f16] }:$src)
    7285             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v8i16,
    7286             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7287             :       // GIR_Coverage, 3352,
    7288             :       GIR_Done,
    7289             :     // Label 500: @16192
    7290             :     GIM_Try, /*On fail goto*//*Label 501*/ 16215, // Rule ID 3353 //
    7291             :       GIM_CheckFeatures, GIFBS_IsBE,
    7292             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    7293             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7294             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7295             :       // (bitconvert:{ *:[v2f64] } FPR128:{ *:[v16i8] }:$src)  =>  (REV64v16i8:{ *:[v2f64] } FPR128:{ *:[v16i8] }:$src)
    7296             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v16i8,
    7297             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7298             :       // GIR_Coverage, 3353,
    7299             :       GIR_Done,
    7300             :     // Label 501: @16215
    7301             :     GIM_Try, /*On fail goto*//*Label 502*/ 16238, // Rule ID 3354 //
    7302             :       GIM_CheckFeatures, GIFBS_IsBE,
    7303             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    7304             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7305             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7306             :       // (bitconvert:{ *:[v2f64] } FPR128:{ *:[v4f32] }:$src)  =>  (REV64v4i32:{ *:[v2f64] } FPR128:{ *:[v4f32] }:$src)
    7307             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i32,
    7308             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7309             :       // GIR_Coverage, 3354,
    7310             :       GIR_Done,
    7311             :     // Label 502: @16238
    7312             :     GIM_Try, /*On fail goto*//*Label 503*/ 16270, // Rule ID 3355 //
    7313             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    7314             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7315             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7316             :       // (bitconvert:{ *:[v2f64] } FPR128:{ *:[v2i64] }:$src)  =>  FPR128:{ *:[v2f64] }:$src
    7317             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7318             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7319             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7320             :       GIR_EraseFromParent, /*InsnID*/0,
    7321             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    7322             :       // GIR_Coverage, 3355,
    7323             :       GIR_Done,
    7324             :     // Label 503: @16270
    7325             :     GIM_Try, /*On fail goto*//*Label 504*/ 16304, // Rule ID 3369 //
    7326             :       GIM_CheckFeatures, GIFBS_IsLE,
    7327             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
    7328             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7329             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7330             :       // (bitconvert:{ *:[v2i64] } FPR128:{ *:[f128] }:$src)  =>  FPR128:{ *:[v2i64] }:$src
    7331             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7332             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7333             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7334             :       GIR_EraseFromParent, /*InsnID*/0,
    7335             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    7336             :       // GIR_Coverage, 3369,
    7337             :       GIR_Done,
    7338             :     // Label 504: @16304
    7339             :     GIM_Try, /*On fail goto*//*Label 505*/ 16338, // Rule ID 3370 //
    7340             :       GIM_CheckFeatures, GIFBS_IsLE,
    7341             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    7342             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7343             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7344             :       // (bitconvert:{ *:[v2i64] } FPR128:{ *:[v4i32] }:$src)  =>  FPR128:{ *:[v2i64] }:$src
    7345             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7346             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7347             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7348             :       GIR_EraseFromParent, /*InsnID*/0,
    7349             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    7350             :       // GIR_Coverage, 3370,
    7351             :       GIR_Done,
    7352             :     // Label 505: @16338
    7353             :     GIM_Try, /*On fail goto*//*Label 506*/ 16372, // Rule ID 3371 //
    7354             :       GIM_CheckFeatures, GIFBS_IsLE,
    7355             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    7356             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7357             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7358             :       // (bitconvert:{ *:[v2i64] } FPR128:{ *:[v8i16] }:$src)  =>  FPR128:{ *:[v2i64] }:$src
    7359             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7360             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7361             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7362             :       GIR_EraseFromParent, /*InsnID*/0,
    7363             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    7364             :       // GIR_Coverage, 3371,
    7365             :       GIR_Done,
    7366             :     // Label 506: @16372
    7367             :     GIM_Try, /*On fail goto*//*Label 507*/ 16406, // Rule ID 3372 //
    7368             :       GIM_CheckFeatures, GIFBS_IsLE,
    7369             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    7370             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7371             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7372             :       // (bitconvert:{ *:[v2i64] } FPR128:{ *:[v16i8] }:$src)  =>  FPR128:{ *:[v2i64] }:$src
    7373             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7374             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7375             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7376             :       GIR_EraseFromParent, /*InsnID*/0,
    7377             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    7378             :       // GIR_Coverage, 3372,
    7379             :       GIR_Done,
    7380             :     // Label 507: @16406
    7381             :     GIM_Try, /*On fail goto*//*Label 508*/ 16440, // Rule ID 3373 //
    7382             :       GIM_CheckFeatures, GIFBS_IsLE,
    7383             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    7384             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7385             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7386             :       // (bitconvert:{ *:[v2i64] } FPR128:{ *:[v4f32] }:$src)  =>  FPR128:{ *:[v2i64] }:$src
    7387             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7388             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7389             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7390             :       GIR_EraseFromParent, /*InsnID*/0,
    7391             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    7392             :       // GIR_Coverage, 3373,
    7393             :       GIR_Done,
    7394             :     // Label 508: @16440
    7395             :     GIM_Try, /*On fail goto*//*Label 509*/ 16474, // Rule ID 3374 //
    7396             :       GIM_CheckFeatures, GIFBS_IsLE,
    7397             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    7398             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7399             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7400             :       // (bitconvert:{ *:[v2i64] } FPR128:{ *:[v8f16] }:$src)  =>  FPR128:{ *:[v2i64] }:$src
    7401             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7402             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7403             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7404             :       GIR_EraseFromParent, /*InsnID*/0,
    7405             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    7406             :       // GIR_Coverage, 3374,
    7407             :       GIR_Done,
    7408             :     // Label 509: @16474
    7409             :     GIM_Try, /*On fail goto*//*Label 510*/ 16513, // Rule ID 3375 //
    7410             :       GIM_CheckFeatures, GIFBS_IsBE,
    7411             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
    7412             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7413             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7414             :       // (bitconvert:{ *:[v2i64] } FPR128:{ *:[f128] }:$src)  =>  (EXTv16i8:{ *:[v2i64] } FPR128:{ *:[f128] }:$src, FPR128:{ *:[f128] }:$src, 8:{ *:[i32] })
    7415             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EXTv16i8,
    7416             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7417             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7418             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7419             :       GIR_AddImm, /*InsnID*/0, /*Imm*/8,
    7420             :       GIR_EraseFromParent, /*InsnID*/0,
    7421             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7422             :       // GIR_Coverage, 3375,
    7423             :       GIR_Done,
    7424             :     // Label 510: @16513
    7425             :     GIM_Try, /*On fail goto*//*Label 511*/ 16536, // Rule ID 3376 //
    7426             :       GIM_CheckFeatures, GIFBS_IsBE,
    7427             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    7428             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7429             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7430             :       // (bitconvert:{ *:[v2i64] } FPR128:{ *:[v4i32] }:$src)  =>  (REV64v4i32:{ *:[v2i64] } FPR128:{ *:[v4i32] }:$src)
    7431             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i32,
    7432             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7433             :       // GIR_Coverage, 3376,
    7434             :       GIR_Done,
    7435             :     // Label 511: @16536
    7436             :     GIM_Try, /*On fail goto*//*Label 512*/ 16559, // Rule ID 3377 //
    7437             :       GIM_CheckFeatures, GIFBS_IsBE,
    7438             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    7439             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7440             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7441             :       // (bitconvert:{ *:[v2i64] } FPR128:{ *:[v8i16] }:$src)  =>  (REV64v8i16:{ *:[v2i64] } FPR128:{ *:[v8i16] }:$src)
    7442             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v8i16,
    7443             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7444             :       // GIR_Coverage, 3377,
    7445             :       GIR_Done,
    7446             :     // Label 512: @16559
    7447             :     GIM_Try, /*On fail goto*//*Label 513*/ 16582, // Rule ID 3378 //
    7448             :       GIM_CheckFeatures, GIFBS_IsBE,
    7449             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    7450             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7451             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7452             :       // (bitconvert:{ *:[v2i64] } FPR128:{ *:[v16i8] }:$src)  =>  (REV64v16i8:{ *:[v2i64] } FPR128:{ *:[v16i8] }:$src)
    7453             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v16i8,
    7454             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7455             :       // GIR_Coverage, 3378,
    7456             :       GIR_Done,
    7457             :     // Label 513: @16582
    7458             :     GIM_Try, /*On fail goto*//*Label 514*/ 16605, // Rule ID 3379 //
    7459             :       GIM_CheckFeatures, GIFBS_IsBE,
    7460             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    7461             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7462             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7463             :       // (bitconvert:{ *:[v2i64] } FPR128:{ *:[v4f32] }:$src)  =>  (REV64v4i32:{ *:[v2i64] } FPR128:{ *:[v4f32] }:$src)
    7464             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i32,
    7465             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7466             :       // GIR_Coverage, 3379,
    7467             :       GIR_Done,
    7468             :     // Label 514: @16605
    7469             :     GIM_Try, /*On fail goto*//*Label 515*/ 16628, // Rule ID 3380 //
    7470             :       GIM_CheckFeatures, GIFBS_IsBE,
    7471             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    7472             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7473             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7474             :       // (bitconvert:{ *:[v2i64] } FPR128:{ *:[v8f16] }:$src)  =>  (REV64v8i16:{ *:[v2i64] } FPR128:{ *:[v8f16] }:$src)
    7475             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v8i16,
    7476             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7477             :       // GIR_Coverage, 3380,
    7478             :       GIR_Done,
    7479             :     // Label 515: @16628
    7480             :     GIM_Try, /*On fail goto*//*Label 516*/ 16660, // Rule ID 3381 //
    7481             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    7482             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7483             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7484             :       // (bitconvert:{ *:[v2i64] } FPR128:{ *:[v2f64] }:$src)  =>  FPR128:{ *:[v2i64] }:$src
    7485             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7486             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7487             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7488             :       GIR_EraseFromParent, /*InsnID*/0,
    7489             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    7490             :       // GIR_Coverage, 3381,
    7491             :       GIR_Done,
    7492             :     // Label 516: @16660
    7493             :     GIM_Reject,
    7494             :     // Label 385: @16661
    7495             :     GIM_Try, /*On fail goto*//*Label 517*/ 16686, // Rule ID 3196 //
    7496             :       GIM_CheckFeatures, GIFBS_IsLE,
    7497             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7498             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7499             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    7500             :       // (bitconvert:{ *:[v4i16] } GPR64:{ *:[i64] }:$Xn)  =>  (COPY_TO_REGCLASS:{ *:[v4i16] } GPR64:{ *:[i64] }:$Xn, FPR64:{ *:[i32] })
    7501             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7502             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7503             :       // GIR_Coverage, 3196,
    7504             :       GIR_Done,
    7505             :     // Label 517: @16686
    7506             :     GIM_Try, /*On fail goto*//*Label 518*/ 16711, // Rule ID 3198 //
    7507             :       GIM_CheckFeatures, GIFBS_IsLE,
    7508             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7509             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7510             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    7511             :       // (bitconvert:{ *:[v4f16] } GPR64:{ *:[i64] }:$Xn)  =>  (COPY_TO_REGCLASS:{ *:[v4f16] } GPR64:{ *:[i64] }:$Xn, FPR64:{ *:[i32] })
    7512             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7513             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7514             :       // GIR_Coverage, 3198,
    7515             :       GIR_Done,
    7516             :     // Label 518: @16711
    7517             :     GIM_Try, /*On fail goto*//*Label 519*/ 16759, // Rule ID 3207 //
    7518             :       GIM_CheckFeatures, GIFBS_IsBE,
    7519             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7520             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7521             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    7522             :       // (bitconvert:{ *:[v4i16] } GPR64:{ *:[i64] }:$Xn)  =>  (REV64v4i16:{ *:[v4i16] } (COPY_TO_REGCLASS:{ *:[i64] } GPR64:{ *:[i64] }:$Xn, FPR64:{ *:[i32] }))
    7523             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
    7524             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY,
    7525             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    7526             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // Xn
    7527             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    7528             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    7529             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7530             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    7531             :       GIR_EraseFromParent, /*InsnID*/0,
    7532             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7533             :       // GIR_Coverage, 3207,
    7534             :       GIR_Done,
    7535             :     // Label 519: @16759
    7536             :     GIM_Try, /*On fail goto*//*Label 520*/ 16807, // Rule ID 3209 //
    7537             :       GIM_CheckFeatures, GIFBS_IsBE,
    7538             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7539             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7540             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    7541             :       // (bitconvert:{ *:[v4f16] } GPR64:{ *:[i64] }:$Xn)  =>  (REV64v4i16:{ *:[v4f16] } (COPY_TO_REGCLASS:{ *:[i64] } GPR64:{ *:[i64] }:$Xn, FPR64:{ *:[i32] }))
    7542             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
    7543             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY,
    7544             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    7545             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // Xn
    7546             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    7547             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    7548             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7549             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    7550             :       GIR_EraseFromParent, /*InsnID*/0,
    7551             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7552             :       // GIR_Coverage, 3209,
    7553             :       GIR_Done,
    7554             :     // Label 520: @16807
    7555             :     GIM_Try, /*On fail goto*//*Label 521*/ 16841, // Rule ID 3252 //
    7556             :       GIM_CheckFeatures, GIFBS_IsLE,
    7557             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7558             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7559             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7560             :       // (bitconvert:{ *:[v4i16] } FPR64:{ *:[v1i64] }:$src)  =>  FPR64:{ *:[v4i16] }:$src
    7561             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7562             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7563             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7564             :       GIR_EraseFromParent, /*InsnID*/0,
    7565             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7566             :       // GIR_Coverage, 3252,
    7567             :       GIR_Done,
    7568             :     // Label 521: @16841
    7569             :     GIM_Try, /*On fail goto*//*Label 522*/ 16875, // Rule ID 3253 //
    7570             :       GIM_CheckFeatures, GIFBS_IsLE,
    7571             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    7572             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7573             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7574             :       // (bitconvert:{ *:[v4i16] } FPR64:{ *:[v2i32] }:$src)  =>  FPR64:{ *:[v4i16] }:$src
    7575             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7576             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7577             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7578             :       GIR_EraseFromParent, /*InsnID*/0,
    7579             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7580             :       // GIR_Coverage, 3253,
    7581             :       GIR_Done,
    7582             :     // Label 522: @16875
    7583             :     GIM_Try, /*On fail goto*//*Label 523*/ 16909, // Rule ID 3254 //
    7584             :       GIM_CheckFeatures, GIFBS_IsLE,
    7585             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    7586             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7587             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7588             :       // (bitconvert:{ *:[v4i16] } FPR64:{ *:[v8i8] }:$src)  =>  FPR64:{ *:[v4i16] }:$src
    7589             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7590             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7591             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7592             :       GIR_EraseFromParent, /*InsnID*/0,
    7593             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7594             :       // GIR_Coverage, 3254,
    7595             :       GIR_Done,
    7596             :     // Label 523: @16909
    7597             :     GIM_Try, /*On fail goto*//*Label 524*/ 16943, // Rule ID 3255 //
    7598             :       GIM_CheckFeatures, GIFBS_IsLE,
    7599             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7600             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7601             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7602             :       // (bitconvert:{ *:[v4i16] } FPR64:{ *:[f64] }:$src)  =>  FPR64:{ *:[v4i16] }:$src
    7603             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7604             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7605             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7606             :       GIR_EraseFromParent, /*InsnID*/0,
    7607             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7608             :       // GIR_Coverage, 3255,
    7609             :       GIR_Done,
    7610             :     // Label 524: @16943
    7611             :     GIM_Try, /*On fail goto*//*Label 525*/ 16977, // Rule ID 3256 //
    7612             :       GIM_CheckFeatures, GIFBS_IsLE,
    7613             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    7614             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7615             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7616             :       // (bitconvert:{ *:[v4i16] } FPR64:{ *:[v2f32] }:$src)  =>  FPR64:{ *:[v4i16] }:$src
    7617             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7618             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7619             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7620             :       GIR_EraseFromParent, /*InsnID*/0,
    7621             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7622             :       // GIR_Coverage, 3256,
    7623             :       GIR_Done,
    7624             :     // Label 525: @16977
    7625             :     GIM_Try, /*On fail goto*//*Label 526*/ 17011, // Rule ID 3257 //
    7626             :       GIM_CheckFeatures, GIFBS_IsLE,
    7627             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7628             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7629             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7630             :       // (bitconvert:{ *:[v4i16] } FPR64:{ *:[v1f64] }:$src)  =>  FPR64:{ *:[v4i16] }:$src
    7631             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7632             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7633             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7634             :       GIR_EraseFromParent, /*InsnID*/0,
    7635             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7636             :       // GIR_Coverage, 3257,
    7637             :       GIR_Done,
    7638             :     // Label 526: @17011
    7639             :     GIM_Try, /*On fail goto*//*Label 527*/ 17034, // Rule ID 3258 //
    7640             :       GIM_CheckFeatures, GIFBS_IsBE,
    7641             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7642             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7643             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7644             :       // (bitconvert:{ *:[v4i16] } FPR64:{ *:[v1i64] }:$src)  =>  (REV64v4i16:{ *:[v4i16] } FPR64:{ *:[v1i64] }:$src)
    7645             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    7646             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7647             :       // GIR_Coverage, 3258,
    7648             :       GIR_Done,
    7649             :     // Label 527: @17034
    7650             :     GIM_Try, /*On fail goto*//*Label 528*/ 17057, // Rule ID 3259 //
    7651             :       GIM_CheckFeatures, GIFBS_IsBE,
    7652             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    7653             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7654             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7655             :       // (bitconvert:{ *:[v4i16] } FPR64:{ *:[v2i32] }:$src)  =>  (REV32v4i16:{ *:[v4i16] } FPR64:{ *:[v2i32] }:$src)
    7656             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v4i16,
    7657             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7658             :       // GIR_Coverage, 3259,
    7659             :       GIR_Done,
    7660             :     // Label 528: @17057
    7661             :     GIM_Try, /*On fail goto*//*Label 529*/ 17080, // Rule ID 3260 //
    7662             :       GIM_CheckFeatures, GIFBS_IsBE,
    7663             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    7664             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7665             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7666             :       // (bitconvert:{ *:[v4i16] } FPR64:{ *:[v8i8] }:$src)  =>  (REV16v8i8:{ *:[v4i16] } FPR64:{ *:[v8i8] }:$src)
    7667             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV16v8i8,
    7668             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7669             :       // GIR_Coverage, 3260,
    7670             :       GIR_Done,
    7671             :     // Label 529: @17080
    7672             :     GIM_Try, /*On fail goto*//*Label 530*/ 17103, // Rule ID 3261 //
    7673             :       GIM_CheckFeatures, GIFBS_IsBE,
    7674             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7675             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7676             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7677             :       // (bitconvert:{ *:[v4i16] } FPR64:{ *:[f64] }:$src)  =>  (REV64v4i16:{ *:[v4i16] } FPR64:{ *:[f64] }:$src)
    7678             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    7679             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7680             :       // GIR_Coverage, 3261,
    7681             :       GIR_Done,
    7682             :     // Label 530: @17103
    7683             :     GIM_Try, /*On fail goto*//*Label 531*/ 17126, // Rule ID 3262 //
    7684             :       GIM_CheckFeatures, GIFBS_IsBE,
    7685             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    7686             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7687             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7688             :       // (bitconvert:{ *:[v4i16] } FPR64:{ *:[v2f32] }:$src)  =>  (REV32v4i16:{ *:[v4i16] } FPR64:{ *:[v2f32] }:$src)
    7689             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v4i16,
    7690             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7691             :       // GIR_Coverage, 3262,
    7692             :       GIR_Done,
    7693             :     // Label 531: @17126
    7694             :     GIM_Try, /*On fail goto*//*Label 532*/ 17149, // Rule ID 3263 //
    7695             :       GIM_CheckFeatures, GIFBS_IsBE,
    7696             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7697             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7698             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7699             :       // (bitconvert:{ *:[v4i16] } FPR64:{ *:[v1f64] }:$src)  =>  (REV64v4i16:{ *:[v4i16] } FPR64:{ *:[v1f64] }:$src)
    7700             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    7701             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7702             :       // GIR_Coverage, 3263,
    7703             :       GIR_Done,
    7704             :     // Label 532: @17149
    7705             :     GIM_Try, /*On fail goto*//*Label 533*/ 17181, // Rule ID 3264 //
    7706             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    7707             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7708             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7709             :       // (bitconvert:{ *:[v4i16] } FPR64:{ *:[v4f16] }:$src)  =>  FPR64:{ *:[v4i16] }:$src
    7710             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7711             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7712             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7713             :       GIR_EraseFromParent, /*InsnID*/0,
    7714             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7715             :       // GIR_Coverage, 3264,
    7716             :       GIR_Done,
    7717             :     // Label 533: @17181
    7718             :     GIM_Try, /*On fail goto*//*Label 534*/ 17215, // Rule ID 3265 //
    7719             :       GIM_CheckFeatures, GIFBS_IsLE,
    7720             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7721             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7722             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7723             :       // (bitconvert:{ *:[v4f16] } FPR64:{ *:[v1i64] }:$src)  =>  FPR64:{ *:[v4f16] }:$src
    7724             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7725             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7726             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7727             :       GIR_EraseFromParent, /*InsnID*/0,
    7728             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7729             :       // GIR_Coverage, 3265,
    7730             :       GIR_Done,
    7731             :     // Label 534: @17215
    7732             :     GIM_Try, /*On fail goto*//*Label 535*/ 17249, // Rule ID 3266 //
    7733             :       GIM_CheckFeatures, GIFBS_IsLE,
    7734             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    7735             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7736             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7737             :       // (bitconvert:{ *:[v4f16] } FPR64:{ *:[v2i32] }:$src)  =>  FPR64:{ *:[v4f16] }:$src
    7738             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7739             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7740             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7741             :       GIR_EraseFromParent, /*InsnID*/0,
    7742             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7743             :       // GIR_Coverage, 3266,
    7744             :       GIR_Done,
    7745             :     // Label 535: @17249
    7746             :     GIM_Try, /*On fail goto*//*Label 536*/ 17283, // Rule ID 3267 //
    7747             :       GIM_CheckFeatures, GIFBS_IsLE,
    7748             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    7749             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7750             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7751             :       // (bitconvert:{ *:[v4f16] } FPR64:{ *:[v8i8] }:$src)  =>  FPR64:{ *:[v4f16] }:$src
    7752             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7753             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7754             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7755             :       GIR_EraseFromParent, /*InsnID*/0,
    7756             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7757             :       // GIR_Coverage, 3267,
    7758             :       GIR_Done,
    7759             :     // Label 536: @17283
    7760             :     GIM_Try, /*On fail goto*//*Label 537*/ 17317, // Rule ID 3268 //
    7761             :       GIM_CheckFeatures, GIFBS_IsLE,
    7762             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7763             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7764             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7765             :       // (bitconvert:{ *:[v4f16] } FPR64:{ *:[f64] }:$src)  =>  FPR64:{ *:[v4f16] }:$src
    7766             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7767             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7768             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7769             :       GIR_EraseFromParent, /*InsnID*/0,
    7770             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7771             :       // GIR_Coverage, 3268,
    7772             :       GIR_Done,
    7773             :     // Label 537: @17317
    7774             :     GIM_Try, /*On fail goto*//*Label 538*/ 17351, // Rule ID 3269 //
    7775             :       GIM_CheckFeatures, GIFBS_IsLE,
    7776             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    7777             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7778             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7779             :       // (bitconvert:{ *:[v4f16] } FPR64:{ *:[v2f32] }:$src)  =>  FPR64:{ *:[v4f16] }:$src
    7780             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7781             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7782             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7783             :       GIR_EraseFromParent, /*InsnID*/0,
    7784             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7785             :       // GIR_Coverage, 3269,
    7786             :       GIR_Done,
    7787             :     // Label 538: @17351
    7788             :     GIM_Try, /*On fail goto*//*Label 539*/ 17385, // Rule ID 3270 //
    7789             :       GIM_CheckFeatures, GIFBS_IsLE,
    7790             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7791             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7792             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7793             :       // (bitconvert:{ *:[v4f16] } FPR64:{ *:[v1f64] }:$src)  =>  FPR64:{ *:[v4f16] }:$src
    7794             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7795             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7796             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7797             :       GIR_EraseFromParent, /*InsnID*/0,
    7798             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7799             :       // GIR_Coverage, 3270,
    7800             :       GIR_Done,
    7801             :     // Label 539: @17385
    7802             :     GIM_Try, /*On fail goto*//*Label 540*/ 17408, // Rule ID 3271 //
    7803             :       GIM_CheckFeatures, GIFBS_IsBE,
    7804             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7805             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7806             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7807             :       // (bitconvert:{ *:[v4f16] } FPR64:{ *:[v1i64] }:$src)  =>  (REV64v4i16:{ *:[v4f16] } FPR64:{ *:[v1i64] }:$src)
    7808             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    7809             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7810             :       // GIR_Coverage, 3271,
    7811             :       GIR_Done,
    7812             :     // Label 540: @17408
    7813             :     GIM_Try, /*On fail goto*//*Label 541*/ 17431, // Rule ID 3272 //
    7814             :       GIM_CheckFeatures, GIFBS_IsBE,
    7815             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    7816             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7817             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7818             :       // (bitconvert:{ *:[v4f16] } FPR64:{ *:[v2i32] }:$src)  =>  (REV32v4i16:{ *:[v4f16] } FPR64:{ *:[v2i32] }:$src)
    7819             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v4i16,
    7820             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7821             :       // GIR_Coverage, 3272,
    7822             :       GIR_Done,
    7823             :     // Label 541: @17431
    7824             :     GIM_Try, /*On fail goto*//*Label 542*/ 17454, // Rule ID 3273 //
    7825             :       GIM_CheckFeatures, GIFBS_IsBE,
    7826             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    7827             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7828             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7829             :       // (bitconvert:{ *:[v4f16] } FPR64:{ *:[v8i8] }:$src)  =>  (REV16v8i8:{ *:[v4f16] } FPR64:{ *:[v8i8] }:$src)
    7830             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV16v8i8,
    7831             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7832             :       // GIR_Coverage, 3273,
    7833             :       GIR_Done,
    7834             :     // Label 542: @17454
    7835             :     GIM_Try, /*On fail goto*//*Label 543*/ 17477, // Rule ID 3274 //
    7836             :       GIM_CheckFeatures, GIFBS_IsBE,
    7837             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7838             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7839             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7840             :       // (bitconvert:{ *:[v4f16] } FPR64:{ *:[f64] }:$src)  =>  (REV64v4i16:{ *:[v4f16] } FPR64:{ *:[f64] }:$src)
    7841             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    7842             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7843             :       // GIR_Coverage, 3274,
    7844             :       GIR_Done,
    7845             :     // Label 543: @17477
    7846             :     GIM_Try, /*On fail goto*//*Label 544*/ 17500, // Rule ID 3275 //
    7847             :       GIM_CheckFeatures, GIFBS_IsBE,
    7848             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    7849             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7850             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7851             :       // (bitconvert:{ *:[v4f16] } FPR64:{ *:[v2f32] }:$src)  =>  (REV32v4i16:{ *:[v4f16] } FPR64:{ *:[v2f32] }:$src)
    7852             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v4i16,
    7853             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7854             :       // GIR_Coverage, 3275,
    7855             :       GIR_Done,
    7856             :     // Label 544: @17500
    7857             :     GIM_Try, /*On fail goto*//*Label 545*/ 17523, // Rule ID 3276 //
    7858             :       GIM_CheckFeatures, GIFBS_IsBE,
    7859             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7860             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7861             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7862             :       // (bitconvert:{ *:[v4f16] } FPR64:{ *:[v1f64] }:$src)  =>  (REV64v4i16:{ *:[v4f16] } FPR64:{ *:[v1f64] }:$src)
    7863             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    7864             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7865             :       // GIR_Coverage, 3276,
    7866             :       GIR_Done,
    7867             :     // Label 545: @17523
    7868             :     GIM_Try, /*On fail goto*//*Label 546*/ 17555, // Rule ID 3277 //
    7869             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    7870             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7871             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7872             :       // (bitconvert:{ *:[v4f16] } FPR64:{ *:[v4i16] }:$src)  =>  FPR64:{ *:[v4f16] }:$src
    7873             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7874             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7875             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7876             :       GIR_EraseFromParent, /*InsnID*/0,
    7877             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7878             :       // GIR_Coverage, 3277,
    7879             :       GIR_Done,
    7880             :     // Label 546: @17555
    7881             :     GIM_Reject,
    7882             :     // Label 386: @17556
    7883             :     GIM_Try, /*On fail goto*//*Label 547*/ 17590, // Rule ID 3356 //
    7884             :       GIM_CheckFeatures, GIFBS_IsLE,
    7885             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
    7886             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7887             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7888             :       // (bitconvert:{ *:[v4f32] } FPR128:{ *:[f128] }:$src)  =>  FPR128:{ *:[v4f32] }:$src
    7889             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7890             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7891             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7892             :       GIR_EraseFromParent, /*InsnID*/0,
    7893             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    7894             :       // GIR_Coverage, 3356,
    7895             :       GIR_Done,
    7896             :     // Label 547: @17590
    7897             :     GIM_Try, /*On fail goto*//*Label 548*/ 17624, // Rule ID 3357 //
    7898             :       GIM_CheckFeatures, GIFBS_IsLE,
    7899             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    7900             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7901             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7902             :       // (bitconvert:{ *:[v4f32] } FPR128:{ *:[v8i16] }:$src)  =>  FPR128:{ *:[v4f32] }:$src
    7903             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7904             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7905             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7906             :       GIR_EraseFromParent, /*InsnID*/0,
    7907             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    7908             :       // GIR_Coverage, 3357,
    7909             :       GIR_Done,
    7910             :     // Label 548: @17624
    7911             :     GIM_Try, /*On fail goto*//*Label 549*/ 17658, // Rule ID 3358 //
    7912             :       GIM_CheckFeatures, GIFBS_IsLE,
    7913             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    7914             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7915             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7916             :       // (bitconvert:{ *:[v4f32] } FPR128:{ *:[v8f16] }:$src)  =>  FPR128:{ *:[v4f32] }:$src
    7917             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7918             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7919             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7920             :       GIR_EraseFromParent, /*InsnID*/0,
    7921             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    7922             :       // GIR_Coverage, 3358,
    7923             :       GIR_Done,
    7924             :     // Label 549: @17658
    7925             :     GIM_Try, /*On fail goto*//*Label 550*/ 17692, // Rule ID 3359 //
    7926             :       GIM_CheckFeatures, GIFBS_IsLE,
    7927             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    7928             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7929             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7930             :       // (bitconvert:{ *:[v4f32] } FPR128:{ *:[v16i8] }:$src)  =>  FPR128:{ *:[v4f32] }:$src
    7931             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7932             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7933             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7934             :       GIR_EraseFromParent, /*InsnID*/0,
    7935             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    7936             :       // GIR_Coverage, 3359,
    7937             :       GIR_Done,
    7938             :     // Label 550: @17692
    7939             :     GIM_Try, /*On fail goto*//*Label 551*/ 17726, // Rule ID 3360 //
    7940             :       GIM_CheckFeatures, GIFBS_IsLE,
    7941             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    7942             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7943             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7944             :       // (bitconvert:{ *:[v4f32] } FPR128:{ *:[v2i64] }:$src)  =>  FPR128:{ *:[v4f32] }:$src
    7945             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7946             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7947             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7948             :       GIR_EraseFromParent, /*InsnID*/0,
    7949             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    7950             :       // GIR_Coverage, 3360,
    7951             :       GIR_Done,
    7952             :     // Label 551: @17726
    7953             :     GIM_Try, /*On fail goto*//*Label 552*/ 17760, // Rule ID 3361 //
    7954             :       GIM_CheckFeatures, GIFBS_IsLE,
    7955             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    7956             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7957             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7958             :       // (bitconvert:{ *:[v4f32] } FPR128:{ *:[v2f64] }:$src)  =>  FPR128:{ *:[v4f32] }:$src
    7959             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7960             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7961             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7962             :       GIR_EraseFromParent, /*InsnID*/0,
    7963             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    7964             :       // GIR_Coverage, 3361,
    7965             :       GIR_Done,
    7966             :     // Label 552: @17760
    7967             :     GIM_Try, /*On fail goto*//*Label 553*/ 17831, // Rule ID 3362 //
    7968             :       GIM_CheckFeatures, GIFBS_IsBE,
    7969             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
    7970             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7971             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7972             :       // (bitconvert:{ *:[v4f32] } FPR128:{ *:[f128] }:$src)  =>  (EXTv16i8:{ *:[v4f32] } (REV64v4i32:{ *:[f128] } FPR128:{ *:[f128] }:$src), (REV64v4i32:{ *:[f128] } FPR128:{ *:[f128] }:$src), 8:{ *:[i32] })
    7973             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s128,
    7974             :       GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s128,
    7975             :       GIR_BuildMI, /*InsnID*/2, /*Opcode*/AArch64::REV64v4i32,
    7976             :       GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
    7977             :       GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
    7978             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
    7979             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::REV64v4i32,
    7980             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    7981             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
    7982             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    7983             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EXTv16i8,
    7984             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7985             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    7986             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/1, /*TempRegFlags*/0,
    7987             :       GIR_AddImm, /*InsnID*/0, /*Imm*/8,
    7988             :       GIR_EraseFromParent, /*InsnID*/0,
    7989             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7990             :       // GIR_Coverage, 3362,
    7991             :       GIR_Done,
    7992             :     // Label 553: @17831
    7993             :     GIM_Try, /*On fail goto*//*Label 554*/ 17854, // Rule ID 3363 //
    7994             :       GIM_CheckFeatures, GIFBS_IsBE,
    7995             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    7996             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7997             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7998             :       // (bitconvert:{ *:[v4f32] } FPR128:{ *:[v8i16] }:$src)  =>  (REV32v8i16:{ *:[v4f32] } FPR128:{ *:[v8i16] }:$src)
    7999             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v8i16,
    8000             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8001             :       // GIR_Coverage, 3363,
    8002             :       GIR_Done,
    8003             :     // Label 554: @17854
    8004             :     GIM_Try, /*On fail goto*//*Label 555*/ 17877, // Rule ID 3364 //
    8005             :       GIM_CheckFeatures, GIFBS_IsBE,
    8006             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    8007             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8008             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8009             :       // (bitconvert:{ *:[v4f32] } FPR128:{ *:[v8f16] }:$src)  =>  (REV32v8i16:{ *:[v4f32] } FPR128:{ *:[v8f16] }:$src)
    8010             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v8i16,
    8011             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8012             :       // GIR_Coverage, 3364,
    8013             :       GIR_Done,
    8014             :     // Label 555: @17877
    8015             :     GIM_Try, /*On fail goto*//*Label 556*/ 17900, // Rule ID 3365 //
    8016             :       GIM_CheckFeatures, GIFBS_IsBE,
    8017             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    8018             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8019             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8020             :       // (bitconvert:{ *:[v4f32] } FPR128:{ *:[v16i8] }:$src)  =>  (REV32v16i8:{ *:[v4f32] } FPR128:{ *:[v16i8] }:$src)
    8021             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v16i8,
    8022             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8023             :       // GIR_Coverage, 3365,
    8024             :       GIR_Done,
    8025             :     // Label 556: @17900
    8026             :     GIM_Try, /*On fail goto*//*Label 557*/ 17923, // Rule ID 3366 //
    8027             :       GIM_CheckFeatures, GIFBS_IsBE,
    8028             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8029             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8030             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8031             :       // (bitconvert:{ *:[v4f32] } FPR128:{ *:[v2i64] }:$src)  =>  (REV64v4i32:{ *:[v4f32] } FPR128:{ *:[v2i64] }:$src)
    8032             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i32,
    8033             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8034             :       // GIR_Coverage, 3366,
    8035             :       GIR_Done,
    8036             :     // Label 557: @17923
    8037             :     GIM_Try, /*On fail goto*//*Label 558*/ 17946, // Rule ID 3367 //
    8038             :       GIM_CheckFeatures, GIFBS_IsBE,
    8039             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8040             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8041             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8042             :       // (bitconvert:{ *:[v4f32] } FPR128:{ *:[v2f64] }:$src)  =>  (REV64v4i32:{ *:[v4f32] } FPR128:{ *:[v2f64] }:$src)
    8043             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i32,
    8044             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8045             :       // GIR_Coverage, 3367,
    8046             :       GIR_Done,
    8047             :     // Label 558: @17946
    8048             :     GIM_Try, /*On fail goto*//*Label 559*/ 17978, // Rule ID 3368 //
    8049             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8050             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8051             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8052             :       // (bitconvert:{ *:[v4f32] } FPR128:{ *:[v4i32] }:$src)  =>  FPR128:{ *:[v4f32] }:$src
    8053             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8054             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8055             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8056             :       GIR_EraseFromParent, /*InsnID*/0,
    8057             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8058             :       // GIR_Coverage, 3368,
    8059             :       GIR_Done,
    8060             :     // Label 559: @17978
    8061             :     GIM_Try, /*On fail goto*//*Label 560*/ 18012, // Rule ID 3382 //
    8062             :       GIM_CheckFeatures, GIFBS_IsLE,
    8063             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
    8064             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8065             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8066             :       // (bitconvert:{ *:[v4i32] } FPR128:{ *:[f128] }:$src)  =>  FPR128:{ *:[v4i32] }:$src
    8067             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8068             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8069             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8070             :       GIR_EraseFromParent, /*InsnID*/0,
    8071             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8072             :       // GIR_Coverage, 3382,
    8073             :       GIR_Done,
    8074             :     // Label 560: @18012
    8075             :     GIM_Try, /*On fail goto*//*Label 561*/ 18046, // Rule ID 3383 //
    8076             :       GIM_CheckFeatures, GIFBS_IsLE,
    8077             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8078             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8079             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8080             :       // (bitconvert:{ *:[v4i32] } FPR128:{ *:[v2i64] }:$src)  =>  FPR128:{ *:[v4i32] }:$src
    8081             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8082             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8083             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8084             :       GIR_EraseFromParent, /*InsnID*/0,
    8085             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8086             :       // GIR_Coverage, 3383,
    8087             :       GIR_Done,
    8088             :     // Label 561: @18046
    8089             :     GIM_Try, /*On fail goto*//*Label 562*/ 18080, // Rule ID 3384 //
    8090             :       GIM_CheckFeatures, GIFBS_IsLE,
    8091             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    8092             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8093             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8094             :       // (bitconvert:{ *:[v4i32] } FPR128:{ *:[v8i16] }:$src)  =>  FPR128:{ *:[v4i32] }:$src
    8095             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8096             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8097             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8098             :       GIR_EraseFromParent, /*InsnID*/0,
    8099             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8100             :       // GIR_Coverage, 3384,
    8101             :       GIR_Done,
    8102             :     // Label 562: @18080
    8103             :     GIM_Try, /*On fail goto*//*Label 563*/ 18114, // Rule ID 3385 //
    8104             :       GIM_CheckFeatures, GIFBS_IsLE,
    8105             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    8106             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8107             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8108             :       // (bitconvert:{ *:[v4i32] } FPR128:{ *:[v16i8] }:$src)  =>  FPR128:{ *:[v4i32] }:$src
    8109             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8110             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8111             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8112             :       GIR_EraseFromParent, /*InsnID*/0,
    8113             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8114             :       // GIR_Coverage, 3385,
    8115             :       GIR_Done,
    8116             :     // Label 563: @18114
    8117             :     GIM_Try, /*On fail goto*//*Label 564*/ 18148, // Rule ID 3386 //
    8118             :       GIM_CheckFeatures, GIFBS_IsLE,
    8119             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8120             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8121             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8122             :       // (bitconvert:{ *:[v4i32] } FPR128:{ *:[v2f64] }:$src)  =>  FPR128:{ *:[v4i32] }:$src
    8123             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8124             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8125             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8126             :       GIR_EraseFromParent, /*InsnID*/0,
    8127             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8128             :       // GIR_Coverage, 3386,
    8129             :       GIR_Done,
    8130             :     // Label 564: @18148
    8131             :     GIM_Try, /*On fail goto*//*Label 565*/ 18182, // Rule ID 3387 //
    8132             :       GIM_CheckFeatures, GIFBS_IsLE,
    8133             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    8134             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8135             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8136             :       // (bitconvert:{ *:[v4i32] } FPR128:{ *:[v8f16] }:$src)  =>  FPR128:{ *:[v4i32] }:$src
    8137             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8138             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8139             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8140             :       GIR_EraseFromParent, /*InsnID*/0,
    8141             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8142             :       // GIR_Coverage, 3387,
    8143             :       GIR_Done,
    8144             :     // Label 565: @18182
    8145             :     GIM_Try, /*On fail goto*//*Label 566*/ 18253, // Rule ID 3388 //
    8146             :       GIM_CheckFeatures, GIFBS_IsBE,
    8147             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
    8148             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8149             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8150             :       // (bitconvert:{ *:[v4i32] } FPR128:{ *:[f128] }:$src)  =>  (EXTv16i8:{ *:[v4i32] } (REV64v4i32:{ *:[f128] } FPR128:{ *:[f128] }:$src), (REV64v4i32:{ *:[f128] } FPR128:{ *:[f128] }:$src), 8:{ *:[i32] })
    8151             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s128,
    8152             :       GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s128,
    8153             :       GIR_BuildMI, /*InsnID*/2, /*Opcode*/AArch64::REV64v4i32,
    8154             :       GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
    8155             :       GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
    8156             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
    8157             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::REV64v4i32,
    8158             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    8159             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
    8160             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    8161             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EXTv16i8,
    8162             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8163             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    8164             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/1, /*TempRegFlags*/0,
    8165             :       GIR_AddImm, /*InsnID*/0, /*Imm*/8,
    8166             :       GIR_EraseFromParent, /*InsnID*/0,
    8167             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8168             :       // GIR_Coverage, 3388,
    8169             :       GIR_Done,
    8170             :     // Label 566: @18253
    8171             :     GIM_Try, /*On fail goto*//*Label 567*/ 18276, // Rule ID 3389 //
    8172             :       GIM_CheckFeatures, GIFBS_IsBE,
    8173             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8174             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8175             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8176             :       // (bitconvert:{ *:[v4i32] } FPR128:{ *:[v2i64] }:$src)  =>  (REV64v4i32:{ *:[v4i32] } FPR128:{ *:[v2i64] }:$src)
    8177             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i32,
    8178             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8179             :       // GIR_Coverage, 3389,
    8180             :       GIR_Done,
    8181             :     // Label 567: @18276
    8182             :     GIM_Try, /*On fail goto*//*Label 568*/ 18299, // Rule ID 3390 //
    8183             :       GIM_CheckFeatures, GIFBS_IsBE,
    8184             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    8185             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8186             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8187             :       // (bitconvert:{ *:[v4i32] } FPR128:{ *:[v8i16] }:$src)  =>  (REV32v8i16:{ *:[v4i32] } FPR128:{ *:[v8i16] }:$src)
    8188             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v8i16,
    8189             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8190             :       // GIR_Coverage, 3390,
    8191             :       GIR_Done,
    8192             :     // Label 568: @18299
    8193             :     GIM_Try, /*On fail goto*//*Label 569*/ 18322, // Rule ID 3391 //
    8194             :       GIM_CheckFeatures, GIFBS_IsBE,
    8195             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    8196             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8197             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8198             :       // (bitconvert:{ *:[v4i32] } FPR128:{ *:[v16i8] }:$src)  =>  (REV32v16i8:{ *:[v4i32] } FPR128:{ *:[v16i8] }:$src)
    8199             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v16i8,
    8200             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8201             :       // GIR_Coverage, 3391,
    8202             :       GIR_Done,
    8203             :     // Label 569: @18322
    8204             :     GIM_Try, /*On fail goto*//*Label 570*/ 18345, // Rule ID 3392 //
    8205             :       GIM_CheckFeatures, GIFBS_IsBE,
    8206             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8207             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8208             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8209             :       // (bitconvert:{ *:[v4i32] } FPR128:{ *:[v2f64] }:$src)  =>  (REV64v4i32:{ *:[v4i32] } FPR128:{ *:[v2f64] }:$src)
    8210             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i32,
    8211             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8212             :       // GIR_Coverage, 3392,
    8213             :       GIR_Done,
    8214             :     // Label 570: @18345
    8215             :     GIM_Try, /*On fail goto*//*Label 571*/ 18368, // Rule ID 3393 //
    8216             :       GIM_CheckFeatures, GIFBS_IsBE,
    8217             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    8218             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8219             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8220             :       // (bitconvert:{ *:[v4i32] } FPR128:{ *:[v8f16] }:$src)  =>  (REV32v8i16:{ *:[v4i32] } FPR128:{ *:[v8f16] }:$src)
    8221             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v8i16,
    8222             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8223             :       // GIR_Coverage, 3393,
    8224             :       GIR_Done,
    8225             :     // Label 571: @18368
    8226             :     GIM_Try, /*On fail goto*//*Label 572*/ 18400, // Rule ID 3394 //
    8227             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8228             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8229             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8230             :       // (bitconvert:{ *:[v4i32] } FPR128:{ *:[v4f32] }:$src)  =>  FPR128:{ *:[v4i32] }:$src
    8231             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8232             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8233             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8234             :       GIR_EraseFromParent, /*InsnID*/0,
    8235             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8236             :       // GIR_Coverage, 3394,
    8237             :       GIR_Done,
    8238             :     // Label 572: @18400
    8239             :     GIM_Reject,
    8240             :     // Label 387: @18401
    8241             :     GIM_Try, /*On fail goto*//*Label 573*/ 18426, // Rule ID 3195 //
    8242             :       GIM_CheckFeatures, GIFBS_IsLE,
    8243             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    8244             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8245             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    8246             :       // (bitconvert:{ *:[v8i8] } GPR64:{ *:[i64] }:$Xn)  =>  (COPY_TO_REGCLASS:{ *:[v8i8] } GPR64:{ *:[i64] }:$Xn, FPR64:{ *:[i32] })
    8247             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8248             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    8249             :       // GIR_Coverage, 3195,
    8250             :       GIR_Done,
    8251             :     // Label 573: @18426
    8252             :     GIM_Try, /*On fail goto*//*Label 574*/ 18474, // Rule ID 3206 //
    8253             :       GIM_CheckFeatures, GIFBS_IsBE,
    8254             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    8255             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8256             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    8257             :       // (bitconvert:{ *:[v8i8] } GPR64:{ *:[i64] }:$Xn)  =>  (REV64v8i8:{ *:[v8i8] } (COPY_TO_REGCLASS:{ *:[i64] } GPR64:{ *:[i64] }:$Xn, FPR64:{ *:[i32] }))
    8258             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
    8259             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY,
    8260             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    8261             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // Xn
    8262             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    8263             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::REV64v8i8,
    8264             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8265             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    8266             :       GIR_EraseFromParent, /*InsnID*/0,
    8267             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8268             :       // GIR_Coverage, 3206,
    8269             :       GIR_Done,
    8270             :     // Label 574: @18474
    8271             :     GIM_Try, /*On fail goto*//*Label 575*/ 18508, // Rule ID 3278 //
    8272             :       GIM_CheckFeatures, GIFBS_IsLE,
    8273             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    8274             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8275             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    8276             :       // (bitconvert:{ *:[v8i8] } FPR64:{ *:[v1i64] }:$src)  =>  FPR64:{ *:[v8i8] }:$src
    8277             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8278             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8279             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8280             :       GIR_EraseFromParent, /*InsnID*/0,
    8281             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    8282             :       // GIR_Coverage, 3278,
    8283             :       GIR_Done,
    8284             :     // Label 575: @18508
    8285             :     GIM_Try, /*On fail goto*//*Label 576*/ 18542, // Rule ID 3279 //
    8286             :       GIM_CheckFeatures, GIFBS_IsLE,
    8287             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    8288             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8289             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    8290             :       // (bitconvert:{ *:[v8i8] } FPR64:{ *:[v2i32] }:$src)  =>  FPR64:{ *:[v8i8] }:$src
    8291             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8292             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8293             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8294             :       GIR_EraseFromParent, /*InsnID*/0,
    8295             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    8296             :       // GIR_Coverage, 3279,
    8297             :       GIR_Done,
    8298             :     // Label 576: @18542
    8299             :     GIM_Try, /*On fail goto*//*Label 577*/ 18576, // Rule ID 3280 //
    8300             :       GIM_CheckFeatures, GIFBS_IsLE,
    8301             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    8302             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8303             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    8304             :       // (bitconvert:{ *:[v8i8] } FPR64:{ *:[v4i16] }:$src)  =>  FPR64:{ *:[v8i8] }:$src
    8305             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8306             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8307             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8308             :       GIR_EraseFromParent, /*InsnID*/0,
    8309             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    8310             :       // GIR_Coverage, 3280,
    8311             :       GIR_Done,
    8312             :     // Label 577: @18576
    8313             :     GIM_Try, /*On fail goto*//*Label 578*/ 18610, // Rule ID 3281 //
    8314             :       GIM_CheckFeatures, GIFBS_IsLE,
    8315             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    8316             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8317             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    8318             :       // (bitconvert:{ *:[v8i8] } FPR64:{ *:[f64] }:$src)  =>  FPR64:{ *:[v8i8] }:$src
    8319             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8320             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8321             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8322             :       GIR_EraseFromParent, /*InsnID*/0,
    8323             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    8324             :       // GIR_Coverage, 3281,
    8325             :       GIR_Done,
    8326             :     // Label 578: @18610
    8327             :     GIM_Try, /*On fail goto*//*Label 579*/ 18644, // Rule ID 3282 //
    8328             :       GIM_CheckFeatures, GIFBS_IsLE,
    8329             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    8330             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8331             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    8332             :       // (bitconvert:{ *:[v8i8] } FPR64:{ *:[v2f32] }:$src)  =>  FPR64:{ *:[v8i8] }:$src
    8333             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8334             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8335             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8336             :       GIR_EraseFromParent, /*InsnID*/0,
    8337             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    8338             :       // GIR_Coverage, 3282,
    8339             :       GIR_Done,
    8340             :     // Label 579: @18644
    8341             :     GIM_Try, /*On fail goto*//*Label 580*/ 18678, // Rule ID 3283 //
    8342             :       GIM_CheckFeatures, GIFBS_IsLE,
    8343             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    8344             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8345             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    8346             :       // (bitconvert:{ *:[v8i8] } FPR64:{ *:[v1f64] }:$src)  =>  FPR64:{ *:[v8i8] }:$src
    8347             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8348             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8349             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8350             :       GIR_EraseFromParent, /*InsnID*/0,
    8351             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    8352             :       // GIR_Coverage, 3283,
    8353             :       GIR_Done,
    8354             :     // Label 580: @18678
    8355             :     GIM_Try, /*On fail goto*//*Label 581*/ 18712, // Rule ID 3284 //
    8356             :       GIM_CheckFeatures, GIFBS_IsLE,
    8357             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    8358             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8359             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    8360             :       // (bitconvert:{ *:[v8i8] } FPR64:{ *:[v4f16] }:$src)  =>  FPR64:{ *:[v8i8] }:$src
    8361             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8362             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8363             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8364             :       GIR_EraseFromParent, /*InsnID*/0,
    8365             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    8366             :       // GIR_Coverage, 3284,
    8367             :       GIR_Done,
    8368             :     // Label 581: @18712
    8369             :     GIM_Try, /*On fail goto*//*Label 582*/ 18735, // Rule ID 3285 //
    8370             :       GIM_CheckFeatures, GIFBS_IsBE,
    8371             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    8372             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8373             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    8374             :       // (bitconvert:{ *:[v8i8] } FPR64:{ *:[v1i64] }:$src)  =>  (REV64v8i8:{ *:[v8i8] } FPR64:{ *:[v1i64] }:$src)
    8375             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v8i8,
    8376             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8377             :       // GIR_Coverage, 3285,
    8378             :       GIR_Done,
    8379             :     // Label 582: @18735
    8380             :     GIM_Try, /*On fail goto*//*Label 583*/ 18758, // Rule ID 3286 //
    8381             :       GIM_CheckFeatures, GIFBS_IsBE,
    8382             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    8383             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8384             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    8385             :       // (bitconvert:{ *:[v8i8] } FPR64:{ *:[v2i32] }:$src)  =>  (REV32v8i8:{ *:[v8i8] } FPR64:{ *:[v2i32] }:$src)
    8386             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v8i8,
    8387             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8388             :       // GIR_Coverage, 3286,
    8389             :       GIR_Done,
    8390             :     // Label 583: @18758
    8391             :     GIM_Try, /*On fail goto*//*Label 584*/ 18781, // Rule ID 3287 //
    8392             :       GIM_CheckFeatures, GIFBS_IsBE,
    8393             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    8394             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8395             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    8396             :       // (bitconvert:{ *:[v8i8] } FPR64:{ *:[v4i16] }:$src)  =>  (REV16v8i8:{ *:[v8i8] } FPR64:{ *:[v4i16] }:$src)
    8397             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV16v8i8,
    8398             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8399             :       // GIR_Coverage, 3287,
    8400             :       GIR_Done,
    8401             :     // Label 584: @18781
    8402             :     GIM_Try, /*On fail goto*//*Label 585*/ 18804, // Rule ID 3288 //
    8403             :       GIM_CheckFeatures, GIFBS_IsBE,
    8404             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    8405             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8406             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    8407             :       // (bitconvert:{ *:[v8i8] } FPR64:{ *:[f64] }:$src)  =>  (REV64v8i8:{ *:[v8i8] } FPR64:{ *:[f64] }:$src)
    8408             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v8i8,
    8409             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8410             :       // GIR_Coverage, 3288,
    8411             :       GIR_Done,
    8412             :     // Label 585: @18804
    8413             :     GIM_Try, /*On fail goto*//*Label 586*/ 18827, // Rule ID 3289 //
    8414             :       GIM_CheckFeatures, GIFBS_IsBE,
    8415             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    8416             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8417             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    8418             :       // (bitconvert:{ *:[v8i8] } FPR64:{ *:[v2f32] }:$src)  =>  (REV32v8i8:{ *:[v8i8] } FPR64:{ *:[v2f32] }:$src)
    8419             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v8i8,
    8420             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8421             :       // GIR_Coverage, 3289,
    8422             :       GIR_Done,
    8423             :     // Label 586: @18827
    8424             :     GIM_Try, /*On fail goto*//*Label 587*/ 18850, // Rule ID 3290 //
    8425             :       GIM_CheckFeatures, GIFBS_IsBE,
    8426             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    8427             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8428             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    8429             :       // (bitconvert:{ *:[v8i8] } FPR64:{ *:[v1f64] }:$src)  =>  (REV64v8i8:{ *:[v8i8] } FPR64:{ *:[v1f64] }:$src)
    8430             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v8i8,
    8431             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8432             :       // GIR_Coverage, 3290,
    8433             :       GIR_Done,
    8434             :     // Label 587: @18850
    8435             :     GIM_Try, /*On fail goto*//*Label 588*/ 18873, // Rule ID 3291 //
    8436             :       GIM_CheckFeatures, GIFBS_IsBE,
    8437             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    8438             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8439             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    8440             :       // (bitconvert:{ *:[v8i8] } FPR64:{ *:[v4f16] }:$src)  =>  (REV16v8i8:{ *:[v8i8] } FPR64:{ *:[v4f16] }:$src)
    8441             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV16v8i8,
    8442             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8443             :       // GIR_Coverage, 3291,
    8444             :       GIR_Done,
    8445             :     // Label 588: @18873
    8446             :     GIM_Reject,
    8447             :     // Label 388: @18874
    8448             :     GIM_Try, /*On fail goto*//*Label 589*/ 18908, // Rule ID 3395 //
    8449             :       GIM_CheckFeatures, GIFBS_IsLE,
    8450             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
    8451             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8452             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8453             :       // (bitconvert:{ *:[v8i16] } FPR128:{ *:[f128] }:$src)  =>  FPR128:{ *:[v8i16] }:$src
    8454             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8455             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8456             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8457             :       GIR_EraseFromParent, /*InsnID*/0,
    8458             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8459             :       // GIR_Coverage, 3395,
    8460             :       GIR_Done,
    8461             :     // Label 589: @18908
    8462             :     GIM_Try, /*On fail goto*//*Label 590*/ 18942, // Rule ID 3396 //
    8463             :       GIM_CheckFeatures, GIFBS_IsLE,
    8464             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8465             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8466             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8467             :       // (bitconvert:{ *:[v8i16] } FPR128:{ *:[v2i64] }:$src)  =>  FPR128:{ *:[v8i16] }:$src
    8468             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8469             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8470             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8471             :       GIR_EraseFromParent, /*InsnID*/0,
    8472             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8473             :       // GIR_Coverage, 3396,
    8474             :       GIR_Done,
    8475             :     // Label 590: @18942
    8476             :     GIM_Try, /*On fail goto*//*Label 591*/ 18976, // Rule ID 3397 //
    8477             :       GIM_CheckFeatures, GIFBS_IsLE,
    8478             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8479             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8480             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8481             :       // (bitconvert:{ *:[v8i16] } FPR128:{ *:[v4i32] }:$src)  =>  FPR128:{ *:[v8i16] }:$src
    8482             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8483             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8484             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8485             :       GIR_EraseFromParent, /*InsnID*/0,
    8486             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8487             :       // GIR_Coverage, 3397,
    8488             :       GIR_Done,
    8489             :     // Label 591: @18976
    8490             :     GIM_Try, /*On fail goto*//*Label 592*/ 19010, // Rule ID 3398 //
    8491             :       GIM_CheckFeatures, GIFBS_IsLE,
    8492             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    8493             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8494             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8495             :       // (bitconvert:{ *:[v8i16] } FPR128:{ *:[v16i8] }:$src)  =>  FPR128:{ *:[v8i16] }:$src
    8496             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8497             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8498             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8499             :       GIR_EraseFromParent, /*InsnID*/0,
    8500             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8501             :       // GIR_Coverage, 3398,
    8502             :       GIR_Done,
    8503             :     // Label 592: @19010
    8504             :     GIM_Try, /*On fail goto*//*Label 593*/ 19044, // Rule ID 3399 //
    8505             :       GIM_CheckFeatures, GIFBS_IsLE,
    8506             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8507             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8508             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8509             :       // (bitconvert:{ *:[v8i16] } FPR128:{ *:[v2f64] }:$src)  =>  FPR128:{ *:[v8i16] }:$src
    8510             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8511             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8512             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8513             :       GIR_EraseFromParent, /*InsnID*/0,
    8514             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8515             :       // GIR_Coverage, 3399,
    8516             :       GIR_Done,
    8517             :     // Label 593: @19044
    8518             :     GIM_Try, /*On fail goto*//*Label 594*/ 19078, // Rule ID 3400 //
    8519             :       GIM_CheckFeatures, GIFBS_IsLE,
    8520             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8521             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8522             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8523             :       // (bitconvert:{ *:[v8i16] } FPR128:{ *:[v4f32] }:$src)  =>  FPR128:{ *:[v8i16] }:$src
    8524             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8525             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8526             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8527             :       GIR_EraseFromParent, /*InsnID*/0,
    8528             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8529             :       // GIR_Coverage, 3400,
    8530             :       GIR_Done,
    8531             :     // Label 594: @19078
    8532             :     GIM_Try, /*On fail goto*//*Label 595*/ 19149, // Rule ID 3401 //
    8533             :       GIM_CheckFeatures, GIFBS_IsBE,
    8534             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
    8535             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8536             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8537             :       // (bitconvert:{ *:[v8i16] } FPR128:{ *:[f128] }:$src)  =>  (EXTv16i8:{ *:[v8i16] } (REV64v8i16:{ *:[f128] } FPR128:{ *:[f128] }:$src), (REV64v8i16:{ *:[f128] } FPR128:{ *:[f128] }:$src), 8:{ *:[i32] })
    8538             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s128,
    8539             :       GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s128,
    8540             :       GIR_BuildMI, /*InsnID*/2, /*Opcode*/AArch64::REV64v8i16,
    8541             :       GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
    8542             :       GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
    8543             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
    8544             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::REV64v8i16,
    8545             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    8546             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
    8547             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    8548             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EXTv16i8,
    8549             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8550             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    8551             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/1, /*TempRegFlags*/0,
    8552             :       GIR_AddImm, /*InsnID*/0, /*Imm*/8,
    8553             :       GIR_EraseFromParent, /*InsnID*/0,
    8554             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8555             :       // GIR_Coverage, 3401,
    8556             :       GIR_Done,
    8557             :     // Label 595: @19149
    8558             :     GIM_Try, /*On fail goto*//*Label 596*/ 19172, // Rule ID 3402 //
    8559             :       GIM_CheckFeatures, GIFBS_IsBE,
    8560             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8561             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8562             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8563             :       // (bitconvert:{ *:[v8i16] } FPR128:{ *:[v2i64] }:$src)  =>  (REV64v8i16:{ *:[v8i16] } FPR128:{ *:[v2i64] }:$src)
    8564             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v8i16,
    8565             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8566             :       // GIR_Coverage, 3402,
    8567             :       GIR_Done,
    8568             :     // Label 596: @19172
    8569             :     GIM_Try, /*On fail goto*//*Label 597*/ 19195, // Rule ID 3403 //
    8570             :       GIM_CheckFeatures, GIFBS_IsBE,
    8571             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8572             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8573             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8574             :       // (bitconvert:{ *:[v8i16] } FPR128:{ *:[v4i32] }:$src)  =>  (REV32v8i16:{ *:[v8i16] } FPR128:{ *:[v4i32] }:$src)
    8575             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v8i16,
    8576             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8577             :       // GIR_Coverage, 3403,
    8578             :       GIR_Done,
    8579             :     // Label 597: @19195
    8580             :     GIM_Try, /*On fail goto*//*Label 598*/ 19218, // Rule ID 3404 //
    8581             :       GIM_CheckFeatures, GIFBS_IsBE,
    8582             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    8583             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8584             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8585             :       // (bitconvert:{ *:[v8i16] } FPR128:{ *:[v16i8] }:$src)  =>  (REV16v16i8:{ *:[v8i16] } FPR128:{ *:[v16i8] }:$src)
    8586             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV16v16i8,
    8587             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8588             :       // GIR_Coverage, 3404,
    8589             :       GIR_Done,
    8590             :     // Label 598: @19218
    8591             :     GIM_Try, /*On fail goto*//*Label 599*/ 19241, // Rule ID 3405 //
    8592             :       GIM_CheckFeatures, GIFBS_IsBE,
    8593             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8594             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8595             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8596             :       // (bitconvert:{ *:[v8i16] } FPR128:{ *:[v2f64] }:$src)  =>  (REV64v8i16:{ *:[v8i16] } FPR128:{ *:[v2f64] }:$src)
    8597             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v8i16,
    8598             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8599             :       // GIR_Coverage, 3405,
    8600             :       GIR_Done,
    8601             :     // Label 599: @19241
    8602             :     GIM_Try, /*On fail goto*//*Label 600*/ 19264, // Rule ID 3406 //
    8603             :       GIM_CheckFeatures, GIFBS_IsBE,
    8604             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8605             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8606             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8607             :       // (bitconvert:{ *:[v8i16] } FPR128:{ *:[v4f32] }:$src)  =>  (REV32v8i16:{ *:[v8i16] } FPR128:{ *:[v4f32] }:$src)
    8608             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v8i16,
    8609             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8610             :       // GIR_Coverage, 3406,
    8611             :       GIR_Done,
    8612             :     // Label 600: @19264
    8613             :     GIM_Try, /*On fail goto*//*Label 601*/ 19296, // Rule ID 3407 //
    8614             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    8615             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8616             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8617             :       // (bitconvert:{ *:[v8i16] } FPR128:{ *:[v8f16] }:$src)  =>  FPR128:{ *:[v8i16] }:$src
    8618             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8619             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8620             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8621             :       GIR_EraseFromParent, /*InsnID*/0,
    8622             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8623             :       // GIR_Coverage, 3407,
    8624             :       GIR_Done,
    8625             :     // Label 601: @19296
    8626             :     GIM_Try, /*On fail goto*//*Label 602*/ 19330, // Rule ID 3408 //
    8627             :       GIM_CheckFeatures, GIFBS_IsLE,
    8628             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
    8629             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8630             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8631             :       // (bitconvert:{ *:[v8f16] } FPR128:{ *:[f128] }:$src)  =>  FPR128:{ *:[v8f16] }:$src
    8632             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8633             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8634             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8635             :       GIR_EraseFromParent, /*InsnID*/0,
    8636             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8637             :       // GIR_Coverage, 3408,
    8638             :       GIR_Done,
    8639             :     // Label 602: @19330
    8640             :     GIM_Try, /*On fail goto*//*Label 603*/ 19364, // Rule ID 3409 //
    8641             :       GIM_CheckFeatures, GIFBS_IsLE,
    8642             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8643             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8644             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8645             :       // (bitconvert:{ *:[v8f16] } FPR128:{ *:[v2i64] }:$src)  =>  FPR128:{ *:[v8f16] }:$src
    8646             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8647             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8648             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8649             :       GIR_EraseFromParent, /*InsnID*/0,
    8650             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8651             :       // GIR_Coverage, 3409,
    8652             :       GIR_Done,
    8653             :     // Label 603: @19364
    8654             :     GIM_Try, /*On fail goto*//*Label 604*/ 19398, // Rule ID 3410 //
    8655             :       GIM_CheckFeatures, GIFBS_IsLE,
    8656             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8657             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8658             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8659             :       // (bitconvert:{ *:[v8f16] } FPR128:{ *:[v4i32] }:$src)  =>  FPR128:{ *:[v8f16] }:$src
    8660             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8661             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8662             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8663             :       GIR_EraseFromParent, /*InsnID*/0,
    8664             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8665             :       // GIR_Coverage, 3410,
    8666             :       GIR_Done,
    8667             :     // Label 604: @19398
    8668             :     GIM_Try, /*On fail goto*//*Label 605*/ 19432, // Rule ID 3411 //
    8669             :       GIM_CheckFeatures, GIFBS_IsLE,
    8670             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    8671             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8672             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8673             :       // (bitconvert:{ *:[v8f16] } FPR128:{ *:[v16i8] }:$src)  =>  FPR128:{ *:[v8f16] }:$src
    8674             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8675             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8676             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8677             :       GIR_EraseFromParent, /*InsnID*/0,
    8678             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8679             :       // GIR_Coverage, 3411,
    8680             :       GIR_Done,
    8681             :     // Label 605: @19432
    8682             :     GIM_Try, /*On fail goto*//*Label 606*/ 19466, // Rule ID 3412 //
    8683             :       GIM_CheckFeatures, GIFBS_IsLE,
    8684             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8685             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8686             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8687             :       // (bitconvert:{ *:[v8f16] } FPR128:{ *:[v2f64] }:$src)  =>  FPR128:{ *:[v8f16] }:$src
    8688             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8689             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8690             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8691             :       GIR_EraseFromParent, /*InsnID*/0,
    8692             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8693             :       // GIR_Coverage, 3412,
    8694             :       GIR_Done,
    8695             :     // Label 606: @19466
    8696             :     GIM_Try, /*On fail goto*//*Label 607*/ 19500, // Rule ID 3413 //
    8697             :       GIM_CheckFeatures, GIFBS_IsLE,
    8698             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8699             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8700             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8701             :       // (bitconvert:{ *:[v8f16] } FPR128:{ *:[v4f32] }:$src)  =>  FPR128:{ *:[v8f16] }:$src
    8702             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8703             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8704             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8705             :       GIR_EraseFromParent, /*InsnID*/0,
    8706             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8707             :       // GIR_Coverage, 3413,
    8708             :       GIR_Done,
    8709             :     // Label 607: @19500
    8710             :     GIM_Try, /*On fail goto*//*Label 608*/ 19571, // Rule ID 3414 //
    8711             :       GIM_CheckFeatures, GIFBS_IsBE,
    8712             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
    8713             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8714             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8715             :       // (bitconvert:{ *:[v8f16] } FPR128:{ *:[f128] }:$src)  =>  (EXTv16i8:{ *:[v8f16] } (REV64v8i16:{ *:[f128] } FPR128:{ *:[f128] }:$src), (REV64v8i16:{ *:[f128] } FPR128:{ *:[f128] }:$src), 8:{ *:[i32] })
    8716             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s128,
    8717             :       GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s128,
    8718             :       GIR_BuildMI, /*InsnID*/2, /*Opcode*/AArch64::REV64v8i16,
    8719             :       GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
    8720             :       GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
    8721             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
    8722             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::REV64v8i16,
    8723             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    8724             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
    8725             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    8726             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EXTv16i8,
    8727             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8728             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    8729             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/1, /*TempRegFlags*/0,
    8730             :       GIR_AddImm, /*InsnID*/0, /*Imm*/8,
    8731             :       GIR_EraseFromParent, /*InsnID*/0,
    8732             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8733             :       // GIR_Coverage, 3414,
    8734             :       GIR_Done,
    8735             :     // Label 608: @19571
    8736             :     GIM_Try, /*On fail goto*//*Label 609*/ 19594, // Rule ID 3415 //
    8737             :       GIM_CheckFeatures, GIFBS_IsBE,
    8738             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8739             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8740             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8741             :       // (bitconvert:{ *:[v8f16] } FPR128:{ *:[v2i64] }:$src)  =>  (REV64v8i16:{ *:[v8f16] } FPR128:{ *:[v2i64] }:$src)
    8742             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v8i16,
    8743             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8744             :       // GIR_Coverage, 3415,
    8745             :       GIR_Done,
    8746             :     // Label 609: @19594
    8747             :     GIM_Try, /*On fail goto*//*Label 610*/ 19617, // Rule ID 3416 //
    8748             :       GIM_CheckFeatures, GIFBS_IsBE,
    8749             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8750             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8751             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8752             :       // (bitconvert:{ *:[v8f16] } FPR128:{ *:[v4i32] }:$src)  =>  (REV32v8i16:{ *:[v8f16] } FPR128:{ *:[v4i32] }:$src)
    8753             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v8i16,
    8754             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8755             :       // GIR_Coverage, 3416,
    8756             :       GIR_Done,
    8757             :     // Label 610: @19617
    8758             :     GIM_Try, /*On fail goto*//*Label 611*/ 19640, // Rule ID 3417 //
    8759             :       GIM_CheckFeatures, GIFBS_IsBE,
    8760             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    8761             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8762             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8763             :       // (bitconvert:{ *:[v8f16] } FPR128:{ *:[v16i8] }:$src)  =>  (REV16v16i8:{ *:[v8f16] } FPR128:{ *:[v16i8] }:$src)
    8764             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV16v16i8,
    8765             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8766             :       // GIR_Coverage, 3417,
    8767             :       GIR_Done,
    8768             :     // Label 611: @19640
    8769             :     GIM_Try, /*On fail goto*//*Label 612*/ 19663, // Rule ID 3418 //
    8770             :       GIM_CheckFeatures, GIFBS_IsBE,
    8771             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8772             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8773             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8774             :       // (bitconvert:{ *:[v8f16] } FPR128:{ *:[v2f64] }:$src)  =>  (REV64v8i16:{ *:[v8f16] } FPR128:{ *:[v2f64] }:$src)
    8775             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v8i16,
    8776             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8777             :       // GIR_Coverage, 3418,
    8778             :       GIR_Done,
    8779             :     // Label 612: @19663
    8780             :     GIM_Try, /*On fail goto*//*Label 613*/ 19686, // Rule ID 3419 //
    8781             :       GIM_CheckFeatures, GIFBS_IsBE,
    8782             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8783             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8784             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8785             :       // (bitconvert:{ *:[v8f16] } FPR128:{ *:[v4f32] }:$src)  =>  (REV32v8i16:{ *:[v8f16] } FPR128:{ *:[v4f32] }:$src)
    8786             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v8i16,
    8787             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8788             :       // GIR_Coverage, 3419,
    8789             :       GIR_Done,
    8790             :     // Label 613: @19686
    8791             :     GIM_Try, /*On fail goto*//*Label 614*/ 19718, // Rule ID 3420 //
    8792             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    8793             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8794             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8795             :       // (bitconvert:{ *:[v8f16] } FPR128:{ *:[v8i16] }:$src)  =>  FPR128:{ *:[v8f16] }:$src
    8796             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8797             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8798             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8799             :       GIR_EraseFromParent, /*InsnID*/0,
    8800             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8801             :       // GIR_Coverage, 3420,
    8802             :       GIR_Done,
    8803             :     // Label 614: @19718
    8804             :     GIM_Reject,
    8805             :     // Label 389: @19719
    8806             :     GIM_Try, /*On fail goto*//*Label 615*/ 19753, // Rule ID 3421 //
    8807             :       GIM_CheckFeatures, GIFBS_IsLE,
    8808             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
    8809             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8810             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8811             :       // (bitconvert:{ *:[v16i8] } FPR128:{ *:[f128] }:$src)  =>  FPR128:{ *:[v16i8] }:$src
    8812             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8813             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8814             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8815             :       GIR_EraseFromParent, /*InsnID*/0,
    8816             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8817             :       // GIR_Coverage, 3421,
    8818             :       GIR_Done,
    8819             :     // Label 615: @19753
    8820             :     GIM_Try, /*On fail goto*//*Label 616*/ 19787, // Rule ID 3422 //
    8821             :       GIM_CheckFeatures, GIFBS_IsLE,
    8822             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8823             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8824             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8825             :       // (bitconvert:{ *:[v16i8] } FPR128:{ *:[v2i64] }:$src)  =>  FPR128:{ *:[v16i8] }:$src
    8826             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8827             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8828             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8829             :       GIR_EraseFromParent, /*InsnID*/0,
    8830             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8831             :       // GIR_Coverage, 3422,
    8832             :       GIR_Done,
    8833             :     // Label 616: @19787
    8834             :     GIM_Try, /*On fail goto*//*Label 617*/ 19821, // Rule ID 3423 //
    8835             :       GIM_CheckFeatures, GIFBS_IsLE,
    8836             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8837             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8838             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8839             :       // (bitconvert:{ *:[v16i8] } FPR128:{ *:[v4i32] }:$src)  =>  FPR128:{ *:[v16i8] }:$src
    8840             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8841             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8842             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8843             :       GIR_EraseFromParent, /*InsnID*/0,
    8844             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8845             :       // GIR_Coverage, 3423,
    8846             :       GIR_Done,
    8847             :     // Label 617: @19821
    8848             :     GIM_Try, /*On fail goto*//*Label 618*/ 19855, // Rule ID 3424 //
    8849             :       GIM_CheckFeatures, GIFBS_IsLE,
    8850             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    8851             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8852             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8853             :       // (bitconvert:{ *:[v16i8] } FPR128:{ *:[v8i16] }:$src)  =>  FPR128:{ *:[v16i8] }:$src
    8854             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8855             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8856             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8857             :       GIR_EraseFromParent, /*InsnID*/0,
    8858             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8859             :       // GIR_Coverage, 3424,
    8860             :       GIR_Done,
    8861             :     // Label 618: @19855
    8862             :     GIM_Try, /*On fail goto*//*Label 619*/ 19889, // Rule ID 3425 //
    8863             :       GIM_CheckFeatures, GIFBS_IsLE,
    8864             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8865             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8866             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8867             :       // (bitconvert:{ *:[v16i8] } FPR128:{ *:[v2f64] }:$src)  =>  FPR128:{ *:[v16i8] }:$src
    8868             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8869             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8870             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8871             :       GIR_EraseFromParent, /*InsnID*/0,
    8872             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8873             :       // GIR_Coverage, 3425,
    8874             :       GIR_Done,
    8875             :     // Label 619: @19889
    8876             :     GIM_Try, /*On fail goto*//*Label 620*/ 19923, // Rule ID 3426 //
    8877             :       GIM_CheckFeatures, GIFBS_IsLE,
    8878             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8879             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8880             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8881             :       // (bitconvert:{ *:[v16i8] } FPR128:{ *:[v4f32] }:$src)  =>  FPR128:{ *:[v16i8] }:$src
    8882             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8883             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8884             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8885             :       GIR_EraseFromParent, /*InsnID*/0,
    8886             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8887             :       // GIR_Coverage, 3426,
    8888             :       GIR_Done,
    8889             :     // Label 620: @19923
    8890             :     GIM_Try, /*On fail goto*//*Label 621*/ 19957, // Rule ID 3427 //
    8891             :       GIM_CheckFeatures, GIFBS_IsLE,
    8892             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    8893             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8894             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8895             :       // (bitconvert:{ *:[v16i8] } FPR128:{ *:[v8f16] }:$src)  =>  FPR128:{ *:[v16i8] }:$src
    8896             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8897             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8898             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8899             :       GIR_EraseFromParent, /*InsnID*/0,
    8900             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8901             :       // GIR_Coverage, 3427,
    8902             :       GIR_Done,
    8903             :     // Label 621: @19957
    8904             :     GIM_Try, /*On fail goto*//*Label 622*/ 20028, // Rule ID 3428 //
    8905             :       GIM_CheckFeatures, GIFBS_IsBE,
    8906             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
    8907             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8908             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8909             :       // (bitconvert:{ *:[v16i8] } FPR128:{ *:[f128] }:$src)  =>  (EXTv16i8:{ *:[v16i8] } (REV64v16i8:{ *:[f128] } FPR128:{ *:[f128] }:$src), (REV64v16i8:{ *:[f128] } FPR128:{ *:[f128] }:$src), 8:{ *:[i32] })
    8910             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s128,
    8911             :       GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s128,
    8912             :       GIR_BuildMI, /*InsnID*/2, /*Opcode*/AArch64::REV64v16i8,
    8913             :       GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
    8914             :       GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
    8915             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
    8916             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::REV64v16i8,
    8917             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    8918             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
    8919             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    8920             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EXTv16i8,
    8921             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8922             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    8923             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/1, /*TempRegFlags*/0,
    8924             :       GIR_AddImm, /*InsnID*/0, /*Imm*/8,
    8925             :       GIR_EraseFromParent, /*InsnID*/0,
    8926             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8927             :       // GIR_Coverage, 3428,
    8928             :       GIR_Done,
    8929             :     // Label 622: @20028
    8930             :     GIM_Try, /*On fail goto*//*Label 623*/ 20051, // Rule ID 3429 //
    8931             :       GIM_CheckFeatures, GIFBS_IsBE,
    8932             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8933             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8934             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8935             :       // (bitconvert:{ *:[v16i8] } FPR128:{ *:[v2i64] }:$src)  =>  (REV64v16i8:{ *:[v16i8] } FPR128:{ *:[v2i64] }:$src)
    8936             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v16i8,
    8937             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8938             :       // GIR_Coverage, 3429,
    8939             :       GIR_Done,
    8940             :     // Label 623: @20051
    8941             :     GIM_Try, /*On fail goto*//*Label 624*/ 20074, // Rule ID 3430 //
    8942             :       GIM_CheckFeatures, GIFBS_IsBE,
    8943             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8944             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8945             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8946             :       // (bitconvert:{ *:[v16i8] } FPR128:{ *:[v4i32] }:$src)  =>  (REV32v16i8:{ *:[v16i8] } FPR128:{ *:[v4i32] }:$src)
    8947             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v16i8,
    8948             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8949             :       // GIR_Coverage, 3430,
    8950             :       GIR_Done,
    8951             :     // Label 624: @20074
    8952             :     GIM_Try, /*On fail goto*//*Label 625*/ 20097, // Rule ID 3431 //
    8953             :       GIM_CheckFeatures, GIFBS_IsBE,
    8954             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    8955             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8956             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8957             :       // (bitconvert:{ *:[v16i8] } FPR128:{ *:[v8i16] }:$src)  =>  (REV16v16i8:{ *:[v16i8] } FPR128:{ *:[v8i16] }:$src)
    8958             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV16v16i8,
    8959             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8960             :       // GIR_Coverage, 3431,
    8961             :       GIR_Done,
    8962             :     // Label 625: @20097
    8963             :     GIM_Try, /*On fail goto*//*Label 626*/ 20120, // Rule ID 3432 //
    8964             :       GIM_CheckFeatures, GIFBS_IsBE,
    8965             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8966             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8967             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8968             :       // (bitconvert:{ *:[v16i8] } FPR128:{ *:[v2f64] }:$src)  =>  (REV64v16i8:{ *:[v16i8] } FPR128:{ *:[v2f64] }:$src)
    8969             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v16i8,
    8970             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8971             :       // GIR_Coverage, 3432,
    8972             :       GIR_Done,
    8973             :     // Label 626: @20120
    8974             :     GIM_Try, /*On fail goto*//*Label 627*/ 20143, // Rule ID 3433 //
    8975             :       GIM_CheckFeatures, GIFBS_IsBE,
    8976             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8977             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8978             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8979             :       // (bitconvert:{ *:[v16i8] } FPR128:{ *:[v4f32] }:$src)  =>  (REV32v16i8:{ *:[v16i8] } FPR128:{ *:[v4f32] }:$src)
    8980             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v16i8,
    8981             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8982             :       // GIR_Coverage, 3433,
    8983             :       GIR_Done,
    8984             :     // Label 627: @20143
    8985             :     GIM_Try, /*On fail goto*//*Label 628*/ 20166, // Rule ID 3434 //
    8986             :       GIM_CheckFeatures, GIFBS_IsBE,
    8987             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    8988             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8989             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8990             :       // (bitconvert:{ *:[v16i8] } FPR128:{ *:[v8f16] }:$src)  =>  (REV16v16i8:{ *:[v16i8] } FPR128:{ *:[v8f16] }:$src)
    8991             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV16v16i8,
    8992             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8993             :       // GIR_Coverage, 3434,
    8994             :       GIR_Done,
    8995             :     // Label 628: @20166
    8996             :     GIM_Reject,
    8997             :     // Label 390: @20167
    8998             :     GIM_Reject,
    8999             :     // Label 9: @20168
    9000             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/0, 11, /*)*//*default:*//*Label 640*/ 22223,
    9001             :     /*GILLT_s16*//*Label 629*/ 20185,
    9002             :     /*GILLT_s32*//*Label 630*/ 20266,
    9003             :     /*GILLT_s64*//*Label 631*/ 20751,
    9004             :     /*GILLT_s128*//*Label 632*/ 21095,
    9005             :     /*GILLT_v2s32*//*Label 633*/ 21207,
    9006             :     /*GILLT_v2s64*//*Label 634*/ 21371,
    9007             :     /*GILLT_v4s16*//*Label 635*/ 21535,
    9008             :     /*GILLT_v4s32*//*Label 636*/ 21699,
    9009             :     /*GILLT_v8s8*//*Label 637*/ 21863,
    9010             :     /*GILLT_v8s16*//*Label 638*/ 21961,
    9011             :     /*GILLT_v16s8*//*Label 639*/ 22125,
    9012             :     // Label 629: @20185
    9013             :     GIM_Try, /*On fail goto*//*Label 641*/ 20265,
    9014             :       GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    9015             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9016             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR16RegClassID,
    9017             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9018             :       GIM_Try, /*On fail goto*//*Label 642*/ 20233, // Rule ID 195 //
    9019             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed16,
    9020             :         // (ld:{ *:[f16] } (am_indexed16:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s2:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDRHui:{ *:[f16] } GPR64sp:{ *:[i64] }:$Rn, uimm12s2:{ *:[i64] }:$offset)
    9021             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRHui,
    9022             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9023             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9024             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9025             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9026             :         GIR_EraseFromParent, /*InsnID*/0,
    9027             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9028             :         // GIR_Coverage, 195,
    9029             :         GIR_Done,
    9030             :       // Label 642: @20233
    9031             :       GIM_Try, /*On fail goto*//*Label 643*/ 20264, // Rule ID 216 //
    9032             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled16,
    9033             :         // (ld:{ *:[f16] } (am_unscaled16:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDURHi:{ *:[f16] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] }):$offset)
    9034             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURHi,
    9035             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9036             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9037             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9038             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9039             :         GIR_EraseFromParent, /*InsnID*/0,
    9040             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9041             :         // GIR_Coverage, 216,
    9042             :         GIR_Done,
    9043             :       // Label 643: @20264
    9044             :       GIM_Reject,
    9045             :     // Label 641: @20265
    9046             :     GIM_Reject,
    9047             :     // Label 630: @20266
    9048             :     GIM_Try, /*On fail goto*//*Label 644*/ 20312, // Rule ID 193 //
    9049             :       GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    9050             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9051             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    9052             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9053             :       GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed32,
    9054             :       // (ld:{ *:[i32] } (am_indexed32:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s4:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDRWui:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, uimm12s4:{ *:[i64] }:$offset)
    9055             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRWui,
    9056             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9057             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9058             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9059             :       GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9060             :       GIR_EraseFromParent, /*InsnID*/0,
    9061             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9062             :       // GIR_Coverage, 193,
    9063             :       GIR_Done,
    9064             :     // Label 644: @20312
    9065             :     GIM_Try, /*On fail goto*//*Label 645*/ 20358, // Rule ID 196 //
    9066             :       GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    9067             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9068             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
    9069             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9070             :       GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed32,
    9071             :       // (ld:{ *:[f32] } (am_indexed32:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s4:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDRSui:{ *:[f32] } GPR64sp:{ *:[i64] }:$Rn, uimm12s4:{ *:[i64] }:$offset)
    9072             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRSui,
    9073             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9074             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9075             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9076             :       GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9077             :       GIR_EraseFromParent, /*InsnID*/0,
    9078             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9079             :       // GIR_Coverage, 196,
    9080             :       GIR_Done,
    9081             :     // Label 645: @20358
    9082             :     GIM_Try, /*On fail goto*//*Label 646*/ 20404, // Rule ID 214 //
    9083             :       GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    9084             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9085             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    9086             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9087             :       GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled32,
    9088             :       // (ld:{ *:[i32] } (am_unscaled32:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDURWi:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] }):$offset)
    9089             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURWi,
    9090             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9091             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9092             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9093             :       GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9094             :       GIR_EraseFromParent, /*InsnID*/0,
    9095             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9096             :       // GIR_Coverage, 214,
    9097             :       GIR_Done,
    9098             :     // Label 646: @20404
    9099             :     GIM_Try, /*On fail goto*//*Label 647*/ 20450, // Rule ID 217 //
    9100             :       GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    9101             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9102             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
    9103             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9104             :       GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled32,
    9105             :       // (ld:{ *:[f32] } (am_unscaled32:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDURSi:{ *:[f32] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] }):$offset)
    9106             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURSi,
    9107             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9108             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9109             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9110             :       GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9111             :       GIR_EraseFromParent, /*InsnID*/0,
    9112             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9113             :       // GIR_Coverage, 217,
    9114             :       GIR_Done,
    9115             :     // Label 647: @20450
    9116             :     GIM_Try, /*On fail goto*//*Label 648*/ 20500, // Rule ID 2052 //
    9117             :       GIM_CheckMemorySizeLessThanLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    9118             :       GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
    9119             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9120             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    9121             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9122             :       GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed16,
    9123             :       // (ld:{ *:[i32] } (am_indexed16:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s2:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi16>>  =>  (LDRHHui:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, uimm12s2:{ *:[i64] }:$offset)
    9124             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRHHui,
    9125             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9126             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9127             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9128             :       GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9129             :       GIR_EraseFromParent, /*InsnID*/0,
    9130             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9131             :       // GIR_Coverage, 2052,
    9132             :       GIR_Done,
    9133             :     // Label 648: @20500
    9134             :     GIM_Try, /*On fail goto*//*Label 649*/ 20550, // Rule ID 2053 //
    9135             :       GIM_CheckMemorySizeLessThanLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    9136             :       GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
    9137             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9138             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    9139             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9140             :       GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed8,
    9141             :       // (ld:{ *:[i32] } (am_indexed8:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s1:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi8>>  =>  (LDRBBui:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, uimm12s1:{ *:[i64] }:$offset)
    9142             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRBBui,
    9143             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9144             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9145             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9146             :       GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9147             :       GIR_EraseFromParent, /*InsnID*/0,
    9148             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9149             :       // GIR_Coverage, 2053,
    9150             :       GIR_Done,
    9151             :     // Label 649: @20550
    9152             :     GIM_Try, /*On fail goto*//*Label 650*/ 20600, // Rule ID 2054 //
    9153             :       GIM_CheckMemorySizeLessThanLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    9154             :       GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
    9155             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9156             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    9157             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9158             :       GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed8,
    9159             :       // (ld:{ *:[i32] } (am_indexed8:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s1:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi1>>  =>  (LDRBBui:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, uimm12s1:{ *:[i64] }:$offset)
    9160             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRBBui,
    9161             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9162             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9163             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9164             :       GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9165             :       GIR_EraseFromParent, /*InsnID*/0,
    9166             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9167             :       // GIR_Coverage, 2054,
    9168             :       GIR_Done,
    9169             :     // Label 650: @20600
    9170             :     GIM_Try, /*On fail goto*//*Label 651*/ 20650, // Rule ID 2075 //
    9171             :       GIM_CheckMemorySizeLessThanLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    9172             :       GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
    9173             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9174             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    9175             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9176             :       GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled16,
    9177             :       // (ld:{ *:[i32] } (am_unscaled16:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi16>>  =>  (LDURHHi:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset)
    9178             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURHHi,
    9179             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9180             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9181             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9182             :       GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9183             :       GIR_EraseFromParent, /*InsnID*/0,
    9184             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9185             :       // GIR_Coverage, 2075,
    9186             :       GIR_Done,
    9187             :     // Label 651: @20650
    9188             :     GIM_Try, /*On fail goto*//*Label 652*/ 20700, // Rule ID 2076 //
    9189             :       GIM_CheckMemorySizeLessThanLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    9190             :       GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
    9191             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9192             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    9193             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9194             :       GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled8,
    9195             :       // (ld:{ *:[i32] } (am_unscaled8:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi8>>  =>  (LDURBBi:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset)
    9196             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURBBi,
    9197             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9198             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9199             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9200             :       GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9201             :       GIR_EraseFromParent, /*InsnID*/0,
    9202             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9203             :       // GIR_Coverage, 2076,
    9204             :       GIR_Done,
    9205             :     // Label 652: @20700
    9206             :     GIM_Try, /*On fail goto*//*Label 653*/ 20750, // Rule ID 2077 //
    9207             :       GIM_CheckMemorySizeLessThanLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    9208             :       GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
    9209             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9210             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    9211             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9212             :       GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled8,
    9213             :       // (ld:{ *:[i32] } (am_unscaled8:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi1>>  =>  (LDURBBi:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset)
    9214             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURBBi,
    9215             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9216             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9217             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9218             :       GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9219             :       GIR_EraseFromParent, /*InsnID*/0,
    9220             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9221             :       // GIR_Coverage, 2077,
    9222             :       GIR_Done,
    9223             :     // Label 653: @20750
    9224             :     GIM_Reject,
    9225             :     // Label 631: @20751
    9226             :     GIM_Try, /*On fail goto*//*Label 654*/ 21094,
    9227             :       GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    9228             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9229             :       GIM_Try, /*On fail goto*//*Label 655*/ 20799, // Rule ID 192 //
    9230             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    9231             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9232             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed64,
    9233             :         // (ld:{ *:[i64] } (am_indexed64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDRXui:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset)
    9234             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRXui,
    9235             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9236             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9237             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9238             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9239             :         GIR_EraseFromParent, /*InsnID*/0,
    9240             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9241             :         // GIR_Coverage, 192,
    9242             :         GIR_Done,
    9243             :       // Label 655: @20799
    9244             :       GIM_Try, /*On fail goto*//*Label 656*/ 20838, // Rule ID 197 //
    9245             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    9246             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9247             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed64,
    9248             :         // (ld:{ *:[f64] } (am_indexed64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDRDui:{ *:[f64] } GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset)
    9249             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRDui,
    9250             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9251             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9252             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9253             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9254             :         GIR_EraseFromParent, /*InsnID*/0,
    9255             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9256             :         // GIR_Coverage, 197,
    9257             :         GIR_Done,
    9258             :       // Label 656: @20838
    9259             :       GIM_Try, /*On fail goto*//*Label 657*/ 20877, // Rule ID 213 //
    9260             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    9261             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9262             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled64,
    9263             :         // (ld:{ *:[i64] } (am_unscaled64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDURXi:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] }):$offset)
    9264             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURXi,
    9265             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9266             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9267             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9268             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9269             :         GIR_EraseFromParent, /*InsnID*/0,
    9270             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9271             :         // GIR_Coverage, 213,
    9272             :         GIR_Done,
    9273             :       // Label 657: @20877
    9274             :       GIM_Try, /*On fail goto*//*Label 658*/ 20916, // Rule ID 218 //
    9275             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    9276             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9277             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled64,
    9278             :         // (ld:{ *:[f64] } (am_unscaled64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDURDi:{ *:[f64] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] }):$offset)
    9279             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURDi,
    9280             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9281             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9282             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9283             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9284             :         GIR_EraseFromParent, /*InsnID*/0,
    9285             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9286             :         // GIR_Coverage, 218,
    9287             :         GIR_Done,
    9288             :       // Label 658: @20916
    9289             :       GIM_Try, /*On fail goto*//*Label 659*/ 20955, // Rule ID 2038 //
    9290             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    9291             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9292             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed64,
    9293             :         // (ld:{ *:[v1f64] } (am_indexed64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDRDui:{ *:[v1f64] } GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset)
    9294             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRDui,
    9295             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9296             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9297             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9298             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9299             :         GIR_EraseFromParent, /*InsnID*/0,
    9300             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9301             :         // GIR_Coverage, 2038,
    9302             :         GIR_Done,
    9303             :       // Label 659: @20955
    9304             :       GIM_Try, /*On fail goto*//*Label 660*/ 20994, // Rule ID 2039 //
    9305             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    9306             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9307             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed64,
    9308             :         // (ld:{ *:[v1i64] } (am_indexed64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDRDui:{ *:[v1i64] } GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset)
    9309             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRDui,
    9310             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9311             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9312             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9313             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9314             :         GIR_EraseFromParent, /*InsnID*/0,
    9315             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9316             :         // GIR_Coverage, 2039,
    9317             :         GIR_Done,
    9318             :       // Label 660: @20994
    9319             :       GIM_Try, /*On fail goto*//*Label 661*/ 21033, // Rule ID 2066 //
    9320             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    9321             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9322             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled64,
    9323             :         // (ld:{ *:[v1f64] } (am_unscaled64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDURDi:{ *:[v1f64] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset)
    9324             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURDi,
    9325             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9326             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9327             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9328             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9329             :         GIR_EraseFromParent, /*InsnID*/0,
    9330             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9331             :         // GIR_Coverage, 2066,
    9332             :         GIR_Done,
    9333             :       // Label 661: @21033
    9334             :       GIM_Try, /*On fail goto*//*Label 662*/ 21072, // Rule ID 2067 //
    9335             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    9336             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9337             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled64,
    9338             :         // (ld:{ *:[v1i64] } (am_unscaled64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDURDi:{ *:[v1i64] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset)
    9339             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURDi,
    9340             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9341             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9342             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9343             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9344             :         GIR_EraseFromParent, /*InsnID*/0,
    9345             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9346             :         // GIR_Coverage, 2067,
    9347             :         GIR_Done,
    9348             :       // Label 662: @21072
    9349             :       GIM_Try, /*On fail goto*//*Label 663*/ 21093, // Rule ID 3024 //
    9350             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    9351             :         // MIs[0] Rn
    9352             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
    9353             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
    9354             :         // (ld:{ *:[v1i64] } GPR64sp:{ *:[i64] }:$Rn)<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LD1Onev1d:{ *:[v1i64] } GPR64sp:{ *:[i64] }:$Rn)
    9355             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::LD1Onev1d,
    9356             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9357             :         // GIR_Coverage, 3024,
    9358             :         GIR_Done,
    9359             :       // Label 663: @21093
    9360             :       GIM_Reject,
    9361             :     // Label 654: @21094
    9362             :     GIM_Reject,
    9363             :     // Label 632: @21095
    9364             :     GIM_Try, /*On fail goto*//*Label 664*/ 21206,
    9365             :       GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    9366             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9367             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    9368             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9369             :       GIM_Try, /*On fail goto*//*Label 665*/ 21143, // Rule ID 198 //
    9370             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed128,
    9371             :         // (ld:{ *:[f128] } (am_indexed128:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s16:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDRQui:{ *:[f128] } GPR64sp:{ *:[i64] }:$Rn, uimm12s16:{ *:[i64] }:$offset)
    9372             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRQui,
    9373             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9374             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9375             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9376             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9377             :         GIR_EraseFromParent, /*InsnID*/0,
    9378             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9379             :         // GIR_Coverage, 198,
    9380             :         GIR_Done,
    9381             :       // Label 665: @21143
    9382             :       GIM_Try, /*On fail goto*//*Label 666*/ 21174, // Rule ID 219 //
    9383             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled128,
    9384             :         // (ld:{ *:[f128] } (am_unscaled128:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDURQi:{ *:[f128] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] }):$offset)
    9385             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURQi,
    9386             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9387             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9388             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9389             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9390             :         GIR_EraseFromParent, /*InsnID*/0,
    9391             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9392             :         // GIR_Coverage, 219,
    9393             :         GIR_Done,
    9394             :       // Label 666: @21174
    9395             :       GIM_Try, /*On fail goto*//*Label 667*/ 21205, // Rule ID 2047 //
    9396             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed128,
    9397             :         // (ld:{ *:[f128] } (am_indexed128:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s16:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDRQui:{ *:[f128] } GPR64sp:{ *:[i64] }:$Rn, uimm12s16:{ *:[i64] }:$offset)
    9398             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRQui,
    9399             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9400             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9401             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9402             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9403             :         GIR_EraseFromParent, /*InsnID*/0,
    9404             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9405             :         // GIR_Coverage, 2047,
    9406             :         GIR_Done,
    9407             :       // Label 667: @21205
    9408             :       GIM_Reject,
    9409             :     // Label 664: @21206
    9410             :     GIM_Reject,
    9411             :     // Label 633: @21207
    9412             :     GIM_Try, /*On fail goto*//*Label 668*/ 21370,
    9413             :       GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    9414             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9415             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    9416             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9417             :       GIM_Try, /*On fail goto*//*Label 669*/ 21257, // Rule ID 2033 //
    9418             :         GIM_CheckFeatures, GIFBS_IsLE,
    9419             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed64,
    9420             :         // (ld:{ *:[v2f32] } (am_indexed64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDRDui:{ *:[v2f32] } GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset)
    9421             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRDui,
    9422             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9423             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9424             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9425             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9426             :         GIR_EraseFromParent, /*InsnID*/0,
    9427             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9428             :         // GIR_Coverage, 2033,
    9429             :         GIR_Done,
    9430             :       // Label 669: @21257
    9431             :       GIM_Try, /*On fail goto*//*Label 670*/ 21290, // Rule ID 2036 //
    9432             :         GIM_CheckFeatures, GIFBS_IsLE,
    9433             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed64,
    9434             :         // (ld:{ *:[v2i32] } (am_indexed64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDRDui:{ *:[v2i32] } GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset)
    9435             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRDui,
    9436             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9437             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9438             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9439             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9440             :         GIR_EraseFromParent, /*InsnID*/0,
    9441             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9442             :         // GIR_Coverage, 2036,
    9443             :         GIR_Done,
    9444             :       // Label 670: @21290
    9445             :       GIM_Try, /*On fail goto*//*Label 671*/ 21323, // Rule ID 2061 //
    9446             :         GIM_CheckFeatures, GIFBS_IsLE,
    9447             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled64,
    9448             :         // (ld:{ *:[v2f32] } (am_unscaled64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDURDi:{ *:[v2f32] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset)
    9449             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURDi,
    9450             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9451             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9452             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9453             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9454             :         GIR_EraseFromParent, /*InsnID*/0,
    9455             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9456             :         // GIR_Coverage, 2061,
    9457             :         GIR_Done,
    9458             :       // Label 671: @21323
    9459             :       GIM_Try, /*On fail goto*//*Label 672*/ 21356, // Rule ID 2062 //
    9460             :         GIM_CheckFeatures, GIFBS_IsLE,
    9461             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled64,
    9462             :         // (ld:{ *:[v2i32] } (am_unscaled64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDURDi:{ *:[v2i32] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset)
    9463             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURDi,
    9464             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9465             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9466             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9467             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9468             :         GIR_EraseFromParent, /*InsnID*/0,
    9469             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9470             :         // GIR_Coverage, 2062,
    9471             :         GIR_Done,
    9472             :       // Label 672: @21356
    9473             :       GIM_Try, /*On fail goto*//*Label 673*/ 21369, // Rule ID 3023 //
    9474             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
    9475             :         // (ld:{ *:[v2i32] } GPR64sp:{ *:[i64] }:$Rn)<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LD1Onev2s:{ *:[v2i32] } GPR64sp:{ *:[i64] }:$Rn)
    9476             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::LD1Onev2s,
    9477             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9478             :         // GIR_Coverage, 3023,
    9479             :         GIR_Done,
    9480             :       // Label 673: @21369
    9481             :       GIM_Reject,
    9482             :     // Label 668: @21370
    9483             :     GIM_Reject,
    9484             :     // Label 634: @21371
    9485             :     GIM_Try, /*On fail goto*//*Label 674*/ 21534,
    9486             :       GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    9487             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9488             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    9489             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9490             :       GIM_Try, /*On fail goto*//*Label 675*/ 21421, // Rule ID 2041 //
    9491             :         GIM_CheckFeatures, GIFBS_IsLE,
    9492             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed128,
    9493             :         // (ld:{ *:[v2f64] } (am_indexed128:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s16:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDRQui:{ *:[v2f64] } GPR64sp:{ *:[i64] }:$Rn, uimm12s16:{ *:[i64] }:$offset)
    9494             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRQui,
    9495             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9496             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9497             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9498             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9499             :         GIR_EraseFromParent, /*InsnID*/0,
    9500             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9501             :         // GIR_Coverage, 2041,
    9502             :         GIR_Done,
    9503             :       // Label 675: @21421
    9504             :       GIM_Try, /*On fail goto*//*Label 676*/ 21454, // Rule ID 2045 //
    9505             :         GIM_CheckFeatures, GIFBS_IsLE,
    9506             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed128,
    9507             :         // (ld:{ *:[v2i64] } (am_indexed128:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s16:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDRQui:{ *:[v2i64] } GPR64sp:{ *:[i64] }:$Rn, uimm12s16:{ *:[i64] }:$offset)
    9508             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRQui,
    9509             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9510             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9511             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9512             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9513             :         GIR_EraseFromParent, /*InsnID*/0,
    9514             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9515             :         // GIR_Coverage, 2045,
    9516             :         GIR_Done,
    9517             :       // Label 676: @21454
    9518             :       GIM_Try, /*On fail goto*//*Label 677*/ 21487, // Rule ID 2068 //
    9519             :         GIM_CheckFeatures, GIFBS_IsLE,
    9520             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled128,
    9521             :         // (ld:{ *:[v2f64] } (am_unscaled128:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDURQi:{ *:[v2f64] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset)
    9522             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURQi,
    9523             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9524             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9525             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9526             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9527             :         GIR_EraseFromParent, /*InsnID*/0,
    9528             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9529             :         // GIR_Coverage, 2068,
    9530             :         GIR_Done,
    9531             :       // Label 677: @21487
    9532             :       GIM_Try, /*On fail goto*//*Label 678*/ 21520, // Rule ID 2069 //
    9533             :         GIM_CheckFeatures, GIFBS_IsLE,
    9534             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled128,
    9535             :         // (ld:{ *:[v2i64] } (am_unscaled128:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDURQi:{ *:[v2i64] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset)
    9536             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURQi,
    9537             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9538             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9539             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9540             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9541             :         GIR_EraseFromParent, /*InsnID*/0,
    9542             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9543             :         // GIR_Coverage, 2069,
    9544             :         GIR_Done,
    9545             :       // Label 678: @21520
    9546             :       GIM_Try, /*On fail goto*//*Label 679*/ 21533, // Rule ID 3020 //
    9547             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
    9548             :         // (ld:{ *:[v2i64] } GPR64sp:{ *:[i64] }:$Rn)<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LD1Onev2d:{ *:[v2i64] } GPR64sp:{ *:[i64] }:$Rn)
    9549             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::LD1Onev2d,
    9550             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9551             :         // GIR_Coverage, 3020,
    9552             :         GIR_Done,
    9553             :       // Label 679: @21533
    9554             :       GIM_Reject,
    9555             :     // Label 674: @21534
    9556             :     GIM_Reject,
    9557             :     // Label 635: @21535
    9558             :     GIM_Try, /*On fail goto*//*Label 680*/ 21698,
    9559             :       GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    9560             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9561             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    9562             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9563             :       GIM_Try, /*On fail goto*//*Label 681*/ 21585, // Rule ID 2035 //
    9564             :         GIM_CheckFeatures, GIFBS_IsLE,
    9565             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed64,
    9566             :         // (ld:{ *:[v4i16] } (am_indexed64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDRDui:{ *:[v4i16] } GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset)
    9567             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRDui,
    9568             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9569             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9570             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9571             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9572             :         GIR_EraseFromParent, /*InsnID*/0,
    9573             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9574             :         // GIR_Coverage, 2035,
    9575             :         GIR_Done,
    9576             :       // Label 681: @21585
    9577             :       GIM_Try, /*On fail goto*//*Label 682*/ 21618, // Rule ID 2037 //
    9578             :         GIM_CheckFeatures, GIFBS_IsLE,
    9579             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed64,
    9580             :         // (ld:{ *:[v4f16] } (am_indexed64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDRDui:{ *:[v4f16] } GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset)
    9581             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRDui,
    9582             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9583             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9584             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9585             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9586             :         GIR_EraseFromParent, /*InsnID*/0,
    9587             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9588             :         // GIR_Coverage, 2037,
    9589             :         GIR_Done,
    9590             :       // Label 682: @21618
    9591             :       GIM_Try, /*On fail goto*//*Label 683*/ 21651, // Rule ID 2063 //
    9592             :         GIM_CheckFeatures, GIFBS_IsLE,
    9593             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled64,
    9594             :         // (ld:{ *:[v4i16] } (am_unscaled64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDURDi:{ *:[v4i16] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset)
    9595             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURDi,
    9596             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9597             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9598             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9599             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9600             :         GIR_EraseFromParent, /*InsnID*/0,
    9601             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9602             :         // GIR_Coverage, 2063,
    9603             :         GIR_Done,
    9604             :       // Label 683: @21651
    9605             :       GIM_Try, /*On fail goto*//*Label 684*/ 21684, // Rule ID 2065 //
    9606             :         GIM_CheckFeatures, GIFBS_IsLE,
    9607             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled64,
    9608             :         // (ld:{ *:[v4f16] } (am_unscaled64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDURDi:{ *:[v4f16] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset)
    9609             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURDi,
    9610             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9611             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9612             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9613             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9614             :         GIR_EraseFromParent, /*InsnID*/0,
    9615             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9616             :         // GIR_Coverage, 2065,
    9617             :         GIR_Done,
    9618             :       // Label 684: @21684
    9619             :       GIM_Try, /*On fail goto*//*Label 685*/ 21697, // Rule ID 3022 //
    9620             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
    9621             :         // (ld:{ *:[v4i16] } GPR64sp:{ *:[i64] }:$Rn)<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LD1Onev4h:{ *:[v4i16] } GPR64sp:{ *:[i64] }:$Rn)
    9622             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::LD1Onev4h,
    9623             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9624             :         // GIR_Coverage, 3022,
    9625             :         GIR_Done,
    9626             :       // Label 685: @21697
    9627             :       GIM_Reject,
    9628             :     // Label 680: @21698
    9629             :     GIM_Reject,
    9630             :     // Label 636: @21699
    9631             :     GIM_Try, /*On fail goto*//*Label 686*/ 21862,
    9632             :       GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    9633             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9634             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    9635             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9636             :       GIM_Try, /*On fail goto*//*Label 687*/ 21749, // Rule ID 2040 //
    9637             :         GIM_CheckFeatures, GIFBS_IsLE,
    9638             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed128,
    9639             :         // (ld:{ *:[v4f32] } (am_indexed128:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s16:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDRQui:{ *:[v4f32] } GPR64sp:{ *:[i64] }:$Rn, uimm12s16:{ *:[i64] }:$offset)
    9640             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRQui,
    9641             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9642             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9643             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9644             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9645             :         GIR_EraseFromParent, /*InsnID*/0,
    9646             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9647             :         // GIR_Coverage, 2040,
    9648             :         GIR_Done,
    9649             :       // Label 687: @21749
    9650             :       GIM_Try, /*On fail goto*//*Label 688*/ 21782, // Rule ID 2044 //
    9651             :         GIM_CheckFeatures, GIFBS_IsLE,
    9652             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed128,
    9653             :         // (ld:{ *:[v4i32] } (am_indexed128:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s16:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDRQui:{ *:[v4i32] } GPR64sp:{ *:[i64] }:$Rn, uimm12s16:{ *:[i64] }:$offset)
    9654             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRQui,
    9655             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9656             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9657             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9658             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9659             :         GIR_EraseFromParent, /*InsnID*/0,
    9660             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9661             :         // GIR_Coverage, 2044,
    9662             :         GIR_Done,
    9663             :       // Label 688: @21782
    9664             :       GIM_Try, /*On fail goto*//*Label 689*/ 21815, // Rule ID 2070 //
    9665             :         GIM_CheckFeatures, GIFBS_IsLE,
    9666             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled128,
    9667             :         // (ld:{ *:[v4f32] } (am_unscaled128:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDURQi:{ *:[v4f32] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset)
    9668             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURQi,
    9669             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9670             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9671             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9672             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9673             :         GIR_EraseFromParent, /*InsnID*/0,
    9674             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9675             :         // GIR_Coverage, 2070,
    9676             :         GIR_Done,
    9677             :       // Label 689: @21815
    9678             :       GIM_Try, /*On fail goto*//*Label 690*/ 21848, // Rule ID 2071 //
    9679             :         GIM_CheckFeatures, GIFBS_IsLE,
    9680             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled128,
    9681             :         // (ld:{ *:[v4i32] } (am_unscaled128:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDURQi:{ *:[v4i32] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset)
    9682             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURQi,
    9683             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9684             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9685             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9686             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9687             :         GIR_EraseFromParent, /*InsnID*/0,
    9688             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9689             :         // GIR_Coverage, 2071,
    9690             :         GIR_Done,
    9691             :       // Label 690: @21848
    9692             :       GIM_Try, /*On fail goto*//*Label 691*/ 21861, // Rule ID 3019 //
    9693             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
    9694             :         // (ld:{ *:[v4i32] } GPR64sp:{ *:[i64] }:$Rn)<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LD1Onev4s:{ *:[v4i32] } GPR64sp:{ *:[i64] }:$Rn)
    9695             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::LD1Onev4s,
    9696             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9697             :         // GIR_Coverage, 3019,
    9698             :         GIR_Done,
    9699             :       // Label 691: @21861
    9700             :       GIM_Reject,
    9701             :     // Label 686: @21862
    9702             :     GIM_Reject,
    9703             :     // Label 637: @21863
    9704             :     GIM_Try, /*On fail goto*//*Label 692*/ 21960,
    9705             :       GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    9706             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9707             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    9708             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9709             :       GIM_Try, /*On fail goto*//*Label 693*/ 21913, // Rule ID 2034 //
    9710             :         GIM_CheckFeatures, GIFBS_IsLE,
    9711             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed64,
    9712             :         // (ld:{ *:[v8i8] } (am_indexed64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDRDui:{ *:[v8i8] } GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset)
    9713             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRDui,
    9714             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9715             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9716             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9717             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9718             :         GIR_EraseFromParent, /*InsnID*/0,
    9719             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9720             :         // GIR_Coverage, 2034,
    9721             :         GIR_Done,
    9722             :       // Label 693: @21913
    9723             :       GIM_Try, /*On fail goto*//*Label 694*/ 21946, // Rule ID 2064 //
    9724             :         GIM_CheckFeatures, GIFBS_IsLE,
    9725             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled64,
    9726             :         // (ld:{ *:[v8i8] } (am_unscaled64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDURDi:{ *:[v8i8] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset)
    9727             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURDi,
    9728             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9729             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9730             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9731             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9732             :         GIR_EraseFromParent, /*InsnID*/0,
    9733             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9734             :         // GIR_Coverage, 2064,
    9735             :         GIR_Done,
    9736             :       // Label 694: @21946
    9737             :       GIM_Try, /*On fail goto*//*Label 695*/ 21959, // Rule ID 3021 //
    9738             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
    9739             :         // (ld:{ *:[v8i8] } GPR64sp:{ *:[i64] }:$Rn)<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LD1Onev8b:{ *:[v8i8] } GPR64sp:{ *:[i64] }:$Rn)
    9740             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::LD1Onev8b,
    9741             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9742             :         // GIR_Coverage, 3021,
    9743             :         GIR_Done,
    9744             :       // Label 695: @21959
    9745             :       GIM_Reject,
    9746             :     // Label 692: @21960
    9747             :     GIM_Reject,
    9748             :     // Label 638: @21961
    9749             :     GIM_Try, /*On fail goto*//*Label 696*/ 22124,
    9750             :       GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    9751             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9752             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    9753             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9754             :       GIM_Try, /*On fail goto*//*Label 697*/ 22011, // Rule ID 2043 //
    9755             :         GIM_CheckFeatures, GIFBS_IsLE,
    9756             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed128,
    9757             :         // (ld:{ *:[v8i16] } (am_indexed128:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s16:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDRQui:{ *:[v8i16] } GPR64sp:{ *:[i64] }:$Rn, uimm12s16:{ *:[i64] }:$offset)
    9758             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRQui,
    9759             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9760             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9761             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9762             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9763             :         GIR_EraseFromParent, /*InsnID*/0,
    9764             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9765             :         // GIR_Coverage, 2043,
    9766             :         GIR_Done,
    9767             :       // Label 697: @22011
    9768             :       GIM_Try, /*On fail goto*//*Label 698*/ 22044, // Rule ID 2046 //
    9769             :         GIM_CheckFeatures, GIFBS_IsLE,
    9770             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed128,
    9771             :         // (ld:{ *:[v8f16] } (am_indexed128:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s16:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDRQui:{ *:[v8f16] } GPR64sp:{ *:[i64] }:$Rn, uimm12s16:{ *:[i64] }:$offset)
    9772             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRQui,
    9773             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9774             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9775             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9776             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9777             :         GIR_EraseFromParent, /*InsnID*/0,
    9778             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9779             :         // GIR_Coverage, 2046,
    9780             :         GIR_Done,
    9781             :       // Label 698: @22044
    9782             :       GIM_Try, /*On fail goto*//*Label 699*/ 22077, // Rule ID 2072 //
    9783             :         GIM_CheckFeatures, GIFBS_IsLE,
    9784             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled128,
    9785             :         // (ld:{ *:[v8i16] } (am_unscaled128:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDURQi:{ *:[v8i16] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset)
    9786             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURQi,
    9787             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9788             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9789             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9790             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9791             :         GIR_EraseFromParent, /*InsnID*/0,
    9792             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9793             :         // GIR_Coverage, 2072,
    9794             :         GIR_Done,
    9795             :       // Label 699: @22077
    9796             :       GIM_Try, /*On fail goto*//*Label 700*/ 22110, // Rule ID 2074 //
    9797             :         GIM_CheckFeatures, GIFBS_IsLE,
    9798             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled128,
    9799             :         // (ld:{ *:[v8f16] } (am_unscaled128:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDURQi:{ *:[v8f16] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset)
    9800             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURQi,
    9801             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9802             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9803             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9804             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9805             :         GIR_EraseFromParent, /*InsnID*/0,
    9806             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9807             :         // GIR_Coverage, 2074,
    9808             :         GIR_Done,
    9809             :       // Label 700: @22110
    9810             :       GIM_Try, /*On fail goto*//*Label 701*/ 22123, // Rule ID 3018 //
    9811             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
    9812             :         // (ld:{ *:[v8i16] } GPR64sp:{ *:[i64] }:$Rn)<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LD1Onev8h:{ *:[v8i16] } GPR64sp:{ *:[i64] }:$Rn)
    9813             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::LD1Onev8h,
    9814             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9815             :         // GIR_Coverage, 3018,
    9816             :         GIR_Done,
    9817             :       // Label 701: @22123
    9818             :       GIM_Reject,
    9819             :     // Label 696: @22124
    9820             :     GIM_Reject,
    9821             :     // Label 639: @22125
    9822             :     GIM_Try, /*On fail goto*//*Label 702*/ 22222,
    9823             :       GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    9824             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9825             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    9826             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9827             :       GIM_Try, /*On fail goto*//*Label 703*/ 22175, // Rule ID 2042 //
    9828             :         GIM_CheckFeatures, GIFBS_IsLE,
    9829             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed128,
    9830             :         // (ld:{ *:[v16i8] } (am_indexed128:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s16:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDRQui:{ *:[v16i8] } GPR64sp:{ *:[i64] }:$Rn, uimm12s16:{ *:[i64] }:$offset)
    9831             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRQui,
    9832             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9833             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9834             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9835             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9836             :         GIR_EraseFromParent, /*InsnID*/0,
    9837             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9838             :         // GIR_Coverage, 2042,
    9839             :         GIR_Done,
    9840             :       // Label 703: @22175
    9841             :       GIM_Try, /*On fail goto*//*Label 704*/ 22208, // Rule ID 2073 //
    9842             :         GIM_CheckFeatures, GIFBS_IsLE,
    9843             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled128,
    9844             :         // (ld:{ *:[v16i8] } (am_unscaled128:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDURQi:{ *:[v16i8] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset)
    9845             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURQi,
    9846             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9847             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9848             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9849             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9850             :         GIR_EraseFromParent, /*InsnID*/0,
    9851             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9852             :         // GIR_Coverage, 2073,
    9853             :         GIR_Done,
    9854             :       // Label 704: @22208
    9855             :       GIM_Try, /*On fail goto*//*Label 705*/ 22221, // Rule ID 3017 //
    9856             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
    9857             :         // (ld:{ *:[v16i8] } GPR64sp:{ *:[i64] }:$Rn)<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LD1Onev16b:{ *:[v16i8] } GPR64sp:{ *:[i64] }:$Rn)
    9858             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::LD1Onev16b,
    9859             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9860             :         // GIR_Coverage, 3017,
    9861             :         GIR_Done,
    9862             :       // Label 705: @22221
    9863             :       GIM_Reject,
    9864             :     // Label 702: @22222
    9865             :     GIM_Reject,
    9866             :     // Label 640: @22223
    9867             :     GIM_Reject,
    9868             :     // Label 10: @22224
    9869             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 3, /*)*//*default:*//*Label 708*/ 22694,
    9870             :     /*GILLT_s32*//*Label 706*/ 22232,
    9871             :     /*GILLT_s64*//*Label 707*/ 22417,
    9872             :     // Label 706: @22232
    9873             :     GIM_Try, /*On fail goto*//*Label 709*/ 22278, // Rule ID 201 //
    9874             :       GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
    9875             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9876             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    9877             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9878             :       GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed16,
    9879             :       // (ld:{ *:[i32] } (am_indexed16:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s2:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi16>>  =>  (LDRSHWui:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, uimm12s2:{ *:[i64] }:$offset)
    9880             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRSHWui,
    9881             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9882             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9883             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9884             :       GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9885             :       GIR_EraseFromParent, /*InsnID*/0,
    9886             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9887             :       // GIR_Coverage, 201,
    9888             :       GIR_Done,
    9889             :     // Label 709: @22278
    9890             :     GIM_Try, /*On fail goto*//*Label 710*/ 22324, // Rule ID 203 //
    9891             :       GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
    9892             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9893             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    9894             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9895             :       GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed8,
    9896             :       // (ld:{ *:[i32] } (am_indexed8:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s1:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi8>>  =>  (LDRSBWui:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, uimm12s1:{ *:[i64] }:$offset)
    9897             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRSBWui,
    9898             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9899             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9900             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9901             :       GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9902             :       GIR_EraseFromParent, /*InsnID*/0,
    9903             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9904             :       // GIR_Coverage, 203,
    9905             :       GIR_Done,
    9906             :     // Label 710: @22324
    9907             :     GIM_Try, /*On fail goto*//*Label 711*/ 22370, // Rule ID 222 //
    9908             :       GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
    9909             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9910             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    9911             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9912             :       GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled16,
    9913             :       // (ld:{ *:[i32] } (am_unscaled16:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi16>>  =>  (LDURSHWi:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] }):$offset)
    9914             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURSHWi,
    9915             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9916             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9917             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9918             :       GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9919             :       GIR_EraseFromParent, /*InsnID*/0,
    9920             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9921             :       // GIR_Coverage, 222,
    9922             :       GIR_Done,
    9923             :     // Label 711: @22370
    9924             :     GIM_Try, /*On fail goto*//*Label 712*/ 22416, // Rule ID 224 //
    9925             :       GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
    9926             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9927             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    9928             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9929             :       GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled8,
    9930             :       // (ld:{ *:[i32] } (am_unscaled8:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi8>>  =>  (LDURSBWi:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] }):$offset)
    9931             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURSBWi,
    9932             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9933             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9934             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9935             :       GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9936             :       GIR_EraseFromParent, /*InsnID*/0,
    9937             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9938             :       // GIR_Coverage, 224,
    9939             :       GIR_Done,
    9940             :     // Label 712: @22416
    9941             :     GIM_Reject,
    9942             :     // Label 707: @22417
    9943             :     GIM_Try, /*On fail goto*//*Label 713*/ 22463, // Rule ID 202 //
    9944             :       GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
    9945             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9946             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    9947             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9948             :       GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed16,
    9949             :       // (ld:{ *:[i64] } (am_indexed16:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s2:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi16>>  =>  (LDRSHXui:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, uimm12s2:{ *:[i64] }:$offset)
    9950             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRSHXui,
    9951             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9952             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9953             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9954             :       GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9955             :       GIR_EraseFromParent, /*InsnID*/0,
    9956             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9957             :       // GIR_Coverage, 202,
    9958             :       GIR_Done,
    9959             :     // Label 713: @22463
    9960             :     GIM_Try, /*On fail goto*//*Label 714*/ 22509, // Rule ID 204 //
    9961             :       GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
    9962             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9963             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    9964             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9965             :       GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed8,
    9966             :       // (ld:{ *:[i64] } (am_indexed8:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s1:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi8>>  =>  (LDRSBXui:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, uimm12s1:{ *:[i64] }:$offset)
    9967             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRSBXui,
    9968             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9969             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9970             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9971             :       GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9972             :       GIR_EraseFromParent, /*InsnID*/0,
    9973             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9974             :       // GIR_Coverage, 204,
    9975             :       GIR_Done,
    9976             :     // Label 714: @22509
    9977             :     GIM_Try, /*On fail goto*//*Label 715*/ 22555, // Rule ID 205 //
    9978             :       GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
    9979             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9980             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    9981             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9982             :       GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed32,
    9983             :       // (ld:{ *:[i64] } (am_indexed32:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s4:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi32>>  =>  (LDRSWui:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, uimm12s4:{ *:[i64] }:$offset)
    9984             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRSWui,
    9985             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9986             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9987             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9988             :       GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9989             :       GIR_EraseFromParent, /*InsnID*/0,
    9990             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9991             :       // GIR_Coverage, 205,
    9992             :       GIR_Done,
    9993             :     // Label 715: @22555
    9994             :     GIM_Try, /*On fail goto*//*Label 716*/ 22601, // Rule ID 223 //
    9995             :       GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
    9996             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9997             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    9998             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9999             :       GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled16,
   10000             :       // (ld:{ *:[i64] } (am_unscaled16:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi16>>  =>  (LDURSHXi:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] }):$offset)
   10001             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURSHXi,
   10002             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10003             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10004             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10005             :       GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10006             :       GIR_EraseFromParent, /*InsnID*/0,
   10007             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10008             :       // GIR_Coverage, 223,
   10009             :       GIR_Done,
   10010             :     // Label 716: @22601
   10011             :     GIM_Try, /*On fail goto*//*Label 717*/ 22647, // Rule ID 225 //
   10012             :       GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   10013             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
   10014             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   10015             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10016             :       GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled8,
   10017             :       // (ld:{ *:[i64] } (am_unscaled8:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi8>>  =>  (LDURSBXi:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] }):$offset)
   10018             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURSBXi,
   10019             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10020             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10021             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10022             :       GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10023             :       GIR_EraseFromParent, /*InsnID*/0,
   10024             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10025             :       // GIR_Coverage, 225,
   10026             :       GIR_Done,
   10027             :     // Label 717: @22647
   10028             :     GIM_Try, /*On fail goto*//*Label 718*/ 22693, // Rule ID 226 //
   10029             :       GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   10030             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
   10031             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   10032             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10033             :       GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled32,
   10034             :       // (ld:{ *:[i64] } (am_unscaled32:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_sextload>><<P:Predicate_sextloadi32>>  =>  (LDURSWi:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] }):$offset)
   10035             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURSWi,
   10036             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10037             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10038             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10039             :       GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10040             :       GIR_EraseFromParent, /*InsnID*/0,
   10041             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10042             :       // GIR_Coverage, 226,
   10043             :       GIR_Done,
   10044             :     // Label 718: @22693
   10045             :     GIM_Reject,
   10046             :     // Label 708: @22694
   10047             :     GIM_Reject,
   10048             :     // Label 11: @22695
   10049             :     GIM_Try, /*On fail goto*//*Label 719*/ 23046,
   10050             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   10051             :       GIM_Try, /*On fail goto*//*Label 720*/ 22747, // Rule ID 199 //
   10052             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   10053             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
   10054             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   10055             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10056             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed16,
   10057             :         // (ld:{ *:[i32] } (am_indexed16:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s2:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_zextload>><<P:Predicate_zextloadi16>>  =>  (LDRHHui:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, uimm12s2:{ *:[i64] }:$offset)
   10058             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRHHui,
   10059             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10060             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10061             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10062             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10063             :         GIR_EraseFromParent, /*InsnID*/0,
   10064             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10065             :         // GIR_Coverage, 199,
   10066             :         GIR_Done,
   10067             :       // Label 720: @22747
   10068             :       GIM_Try, /*On fail goto*//*Label 721*/ 22793, // Rule ID 200 //
   10069             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   10070             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
   10071             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   10072             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10073             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed8,
   10074             :         // (ld:{ *:[i32] } (am_indexed8:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s1:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_zextload>><<P:Predicate_zextloadi8>>  =>  (LDRBBui:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, uimm12s1:{ *:[i64] }:$offset)
   10075             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRBBui,
   10076             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10077             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10078             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10079             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10080             :         GIR_EraseFromParent, /*InsnID*/0,
   10081             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10082             :         // GIR_Coverage, 200,
   10083             :         GIR_Done,
   10084             :       // Label 721: @22793
   10085             :       GIM_Try, /*On fail goto*//*Label 722*/ 22839, // Rule ID 220 //
   10086             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   10087             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
   10088             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   10089             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10090             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled16,
   10091             :         // (ld:{ *:[i32] } (am_unscaled16:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_zextload>><<P:Predicate_zextloadi16>>  =>  (LDURHHi:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] }):$offset)
   10092             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURHHi,
   10093             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10094             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10095             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10096             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10097             :         GIR_EraseFromParent, /*InsnID*/0,
   10098             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10099             :         // GIR_Coverage, 220,
   10100             :         GIR_Done,
   10101             :       // Label 722: @22839
   10102             :       GIM_Try, /*On fail goto*//*Label 723*/ 22919,
   10103             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   10104             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
   10105             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   10106             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10107             :         GIM_Try, /*On fail goto*//*Label 724*/ 22887, // Rule ID 221 //
   10108             :           GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled16,
   10109             :           // (ld:{ *:[i32] } (am_unscaled16:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_zextload>><<P:Predicate_zextloadi8>>  =>  (LDURBBi:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] }):$offset)
   10110             :           GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURBBi,
   10111             :           GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10112             :           GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10113             :           GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10114             :           GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10115             :           GIR_EraseFromParent, /*InsnID*/0,
   10116             :           GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10117             :           // GIR_Coverage, 221,
   10118             :           GIR_Done,
   10119             :         // Label 724: @22887
   10120             :         GIM_Try, /*On fail goto*//*Label 725*/ 22918, // Rule ID 2050 //
   10121             :           GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed8,
   10122             :           // (ld:{ *:[i32] } (am_indexed8:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s1:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_zextload>><<P:Predicate_zextloadi1>>  =>  (LDRBBui:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, uimm12s1:{ *:[i64] }:$offset)
   10123             :           GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRBBui,
   10124             :           GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10125             :           GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10126             :           GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10127             :           GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10128             :           GIR_EraseFromParent, /*InsnID*/0,
   10129             :           GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10130             :           // GIR_Coverage, 2050,
   10131             :           GIR_Done,
   10132             :         // Label 725: @22918
   10133             :         GIM_Reject,
   10134             :       // Label 723: @22919
   10135             :       GIM_Try, /*On fail goto*//*Label 726*/ 22965, // Rule ID 2082 //
   10136             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   10137             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
   10138             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   10139             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10140             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled16,
   10141             :         // (ld:{ *:[i32] } (am_unscaled16:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_zextload>><<P:Predicate_zextloadi16>>  =>  (LDURHHi:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset)
   10142             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURHHi,
   10143             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10144             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10145             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10146             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10147             :         GIR_EraseFromParent, /*InsnID*/0,
   10148             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10149             :         // GIR_Coverage, 2082,
   10150             :         GIR_Done,
   10151             :       // Label 726: @22965
   10152             :       GIM_Try, /*On fail goto*//*Label 727*/ 23045,
   10153             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   10154             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
   10155             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   10156             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10157             :         GIM_Try, /*On fail goto*//*Label 728*/ 23013, // Rule ID 2083 //
   10158             :           GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled8,
   10159             :           // (ld:{ *:[i32] } (am_unscaled8:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_zextload>><<P:Predicate_zextloadi8>>  =>  (LDURBBi:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset)
   10160             :           GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURBBi,
   10161             :           GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10162             :           GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10163             :           GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10164             :           GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10165             :           GIR_EraseFromParent, /*InsnID*/0,
   10166             :           GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10167             :           // GIR_Coverage, 2083,
   10168             :           GIR_Done,
   10169             :         // Label 728: @23013
   10170             :         GIM_Try, /*On fail goto*//*Label 729*/ 23044, // Rule ID 2084 //
   10171             :           GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled8,
   10172             :           // (ld:{ *:[i32] } (am_unscaled8:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_zextload>><<P:Predicate_zextloadi1>>  =>  (LDURBBi:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset)
   10173             :           GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURBBi,
   10174             :           GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10175             :           GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10176             :           GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10177             :           GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10178             :           GIR_EraseFromParent, /*InsnID*/0,
   10179             :           GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10180             :           // GIR_Coverage, 2084,
   10181             :           GIR_Done,
   10182             :         // Label 729: @23044
   10183             :         GIM_Reject,
   10184             :       // Label 727: @23045
   10185             :       GIM_Reject,
   10186             :     // Label 719: @23046
   10187             :     GIM_Reject,
   10188             :     // Label 12: @23047
   10189             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/0, 11, /*)*//*default:*//*Label 741*/ 24945,
   10190             :     /*GILLT_s16*//*Label 730*/ 23064,
   10191             :     /*GILLT_s32*//*Label 731*/ 23141,
   10192             :     /*GILLT_s64*//*Label 732*/ 23306,
   10193             :     /*GILLT_s128*//*Label 733*/ 23644,
   10194             :     /*GILLT_v2s32*//*Label 734*/ 23752,
   10195             :     /*GILLT_v2s64*//*Label 735*/ 23940,
   10196             :     /*GILLT_v4s16*//*Label 736*/ 24169,
   10197             :     /*GILLT_v4s32*//*Label 737*/ 24357,
   10198             :     /*GILLT_v8s8*//*Label 738*/ 24545,
   10199             :     /*GILLT_v8s16*//*Label 739*/ 24651,
   10200             :     /*GILLT_v16s8*//*Label 740*/ 24839,
   10201             :     // Label 730: @23064
   10202             :     GIM_Try, /*On fail goto*//*Label 742*/ 23140,
   10203             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
   10204             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR16RegClassID,
   10205             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10206             :       GIM_Try, /*On fail goto*//*Label 743*/ 23108, // Rule ID 247 //
   10207             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed16,
   10208             :         // (st FPR16Op:{ *:[f16] }:$Rt, (am_indexed16:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s2:{ *:[i64] }:$offset))<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (STRHui FPR16Op:{ *:[f16] }:$Rt, GPR64sp:{ *:[i64] }:$Rn, uimm12s2:{ *:[i64] }:$offset)
   10209             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::STRHui,
   10210             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10211             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10212             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10213             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10214             :         GIR_EraseFromParent, /*InsnID*/0,
   10215             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10216             :         // GIR_Coverage, 247,
   10217             :         GIR_Done,
   10218             :       // Label 743: @23108
   10219             :       GIM_Try, /*On fail goto*//*Label 744*/ 23139, // Rule ID 255 //
   10220             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled16,
   10221             :         // (st FPR16Op:{ *:[f16] }:$Rt, (am_unscaled16:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (STURHi FPR16Op:{ *:[f16] }:$Rt, GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] }):$offset)
   10222             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::STURHi,
   10223             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10224             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10225             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10226             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10227             :         GIR_EraseFromParent, /*InsnID*/0,
   10228             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10229             :         // GIR_Coverage, 255,
   10230             :         GIR_Done,
   10231             :       // Label 744: @23139
   10232             :       GIM_Reject,
   10233             :     // Label 742: @23140
   10234             :     GIM_Reject,
   10235             :     // Label 731: @23141
   10236             :     GIM_Try, /*On fail goto*//*Label 745*/ 23305,
   10237             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
   10238             :       GIM_Try, /*On fail goto*//*Label 746*/ 23186, // Rule ID 245 //
   10239             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   10240             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10241             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed32,
   10242             :         // (st GPR32z:{ *:[i32] }:$Rt, (am_indexed32:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s4:{ *:[i64] }:$offset))<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (STRWui GPR32z:{ *:[i32] }:$Rt, GPR64sp:{ *:[i64] }:$Rn, uimm12s4:{ *:[i64] }:$offset)
   10243             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::STRWui,
   10244             :         GIR_CopyOrAddZeroReg, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, AArch64::WZR, // Rt
   10245             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10246             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10247             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10248             :         GIR_EraseFromParent, /*InsnID*/0,
   10249             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10250             :         // GIR_Coverage, 245,
   10251             :         GIR_Done,
   10252             :       // Label 746: @23186
   10253             :       GIM_Try, /*On fail goto*//*Label 747*/ 23225, // Rule ID 248 //
   10254             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   10255             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10256             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed32,
   10257             :         // (st FPR32Op:{ *:[f32] }:$Rt, (am_indexed32:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s4:{ *:[i64] }:$offset))<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (STRSui FPR32Op:{ *:[f32] }:$Rt, GPR64sp:{ *:[i64] }:$Rn, uimm12s4:{ *:[i64] }:$offset)
   10258             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::STRSui,
   10259             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10260             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10261             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10262             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10263             :         GIR_EraseFromParent, /*InsnID*/0,
   10264             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10265             :         // GIR_Coverage, 248,
   10266             :         GIR_Done,
   10267             :       // Label 747: @23225
   10268             :       GIM_Try, /*On fail goto*//*Label 748*/ 23265, // Rule ID 253 //
   10269             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   10270             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10271             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled32,
   10272             :         // (st GPR32z:{ *:[i32] }:$Rt, (am_unscaled32:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (STURWi GPR32z:{ *:[i32] }:$Rt, GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] }):$offset)
   10273             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::STURWi,
   10274             :         GIR_CopyOrAddZeroReg, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, AArch64::WZR, // Rt
   10275             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10276             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10277             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10278             :         GIR_EraseFromParent, /*InsnID*/0,
   10279             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10280             :         // GIR_Coverage, 253,
   10281             :         GIR_Done,
   10282             :       // Label 748: @23265
   10283             :       GIM_Try, /*On fail goto*//*Label 749*/ 23304, // Rule ID 256 //
   10284             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   10285             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10286             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled32,
   10287             :         // (st FPR32Op:{ *:[f32] }:$Rt, (am_unscaled32:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (STURSi FPR32Op:{ *:[f32] }:$Rt, GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] }):$offset)
   10288             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::STURSi,
   10289             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10290             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10291             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10292             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10293             :         GIR_EraseFromParent, /*InsnID*/0,
   10294             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10295             :         // GIR_Coverage, 256,
   10296             :         GIR_Done,
   10297             :       // Label 749: @23304
   10298             :       GIM_Reject,
   10299             :     // Label 745: @23305
   10300             :     GIM_Reject,
   10301             :     // Label 732: @23306
   10302             :     GIM_Try, /*On fail goto*//*Label 750*/ 23643,
   10303             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
   10304             :       GIM_Try, /*On fail goto*//*Label 751*/ 23351, // Rule ID 244 //
   10305             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   10306             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10307             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed64,
   10308             :         // (st GPR64z:{ *:[i64] }:$Rt, (am_indexed64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset))<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (STRXui GPR64z:{ *:[i64] }:$Rt, GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset)
   10309             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::STRXui,
   10310             :         GIR_CopyOrAddZeroReg, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, AArch64::XZR, // Rt
   10311             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10312             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10313             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10314             :         GIR_EraseFromParent, /*InsnID*/0,
   10315             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10316             :         // GIR_Coverage, 244,
   10317             :         GIR_Done,
   10318             :       // Label 751: @23351
   10319             :       GIM_Try, /*On fail goto*//*Label 752*/ 23390, // Rule ID 249 //
   10320             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   10321             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10322             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed64,
   10323             :         // (st FPR64Op:{ *:[f64] }:$Rt, (am_indexed64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset))<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (STRDui FPR64Op:{ *:[f64] }:$Rt, GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset)
   10324             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::STRDui,
   10325             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10326             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10327             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10328             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10329             :         GIR_EraseFromParent, /*InsnID*/0,
   10330             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10331             :         // GIR_Coverage, 249,
   10332             :         GIR_Done,
   10333             :       // Label 752: @23390
   10334             :       GIM_Try, /*On fail goto*//*Label 753*/ 23429, // Rule ID 2139 //
   10335             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   10336             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10337             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed64,
   10338             :         // (st FPR64:{ *:[v1i64] }:$Rt, (am_indexed64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset))<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (STRDui FPR64:{ *:[v1i64] }:$Rt, GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset)
   10339             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::STRDui,
   10340             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10341             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10342             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10343             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10344             :         GIR_EraseFromParent, /*InsnID*/0,
   10345             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10346             :         // GIR_Coverage, 2139,
   10347             :         GIR_Done,
   10348             :       // Label 753: @23429
   10349             :       GIM_Try, /*On fail goto*//*Label 754*/ 23468, // Rule ID 2140 //
   10350             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   10351             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10352             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed64,
   10353             :         // (st FPR64:{ *:[v1f64] }:$Rt, (am_indexed64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset))<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (STRDui FPR64:{ *:[v1f64] }:$Rt, GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset)
   10354             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::STRDui,
   10355             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10356             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10357             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10358             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10359             :         GIR_EraseFromParent, /*InsnID*/0,
   10360             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10361             :         // GIR_Coverage, 2140,
   10362             :         GIR_Done,
   10363             :       // Label 754: @23468
   10364             :       GIM_Try, /*On fail goto*//*Label 755*/ 23508, // Rule ID 252 //
   10365             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   10366             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10367             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled64,
   10368             :         // (st GPR64z:{ *:[i64] }:$Rt, (am_unscaled64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (STURXi GPR64z:{ *:[i64] }:$Rt, GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] }):$offset)
   10369             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::STURXi,
   10370             :         GIR_CopyOrAddZeroReg, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, AArch64::XZR, // Rt
   10371             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10372             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10373             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10374             :         GIR_EraseFromParent, /*InsnID*/0,
   10375             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10376             :         // GIR_Coverage, 252,
   10377             :         GIR_Done,
   10378             :       // Label 755: @23508
   10379             :       GIM_Try, /*On fail goto*//*Label 756*/ 23547, // Rule ID 257 //
   10380             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   10381             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10382             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled64,
   10383             :         // (st FPR64Op:{ *:[f64] }:$Rt, (am_unscaled64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (STURDi FPR64Op:{ *:[f64] }:$Rt, GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] }):$offset)
   10384             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::STURDi,
   10385             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10386             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10387             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10388             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10389             :         GIR_EraseFromParent, /*InsnID*/0,
   10390             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10391             :         // GIR_Coverage, 257,
   10392             :         GIR_Done,
   10393             :       // Label 756: @23547
   10394             :       GIM_Try, /*On fail goto*//*Label 757*/ 23586, // Rule ID 2163 //
   10395             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   10396             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10397             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled64,
   10398             :         // (st FPR64:{ *:[v1f64] }:$Rt, (am_unscaled64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (STURDi FPR64:{ *:[v1f64] }:$Rt, GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset)
   10399             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::STURDi,
   10400             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10401             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10402             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10403             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10404             :         GIR_EraseFromParent, /*InsnID*/0,
   10405             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10406             :         // GIR_Coverage, 2163,
   10407             :         GIR_Done,
   10408             :       // Label 757: @23586
   10409             :       GIM_Try, /*On fail goto*//*Label 758*/ 23625, // Rule ID 2164 //
   10410             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   10411             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10412             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled64,
   10413             :         // (st FPR64:{ *:[v1i64] }:$Rt, (am_unscaled64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (STURDi FPR64:{ *:[v1i64] }:$Rt, GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset)
   10414             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::STURDi,
   10415             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10416             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10417             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10418             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10419             :         GIR_EraseFromParent, /*InsnID*/0,
   10420             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10421             :         // GIR_Coverage, 2164,
   10422             :         GIR_Done,
   10423             :       // Label 758: @23625
   10424             :       GIM_Try, /*On fail goto*//*Label 759*/ 23642, // Rule ID 3032 //
   10425             :         // MIs[0] Rn
   10426             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   10427             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   10428             :         // (st v1i64:{ *:[v1i64] }:$Vt, GPR64sp:{ *:[i64] }:$Rn)<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (ST1Onev1d v1i64:{ *:[v1i64] }:$Vt, GPR64sp:{ *:[i64] }:$Rn)
   10429             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ST1Onev1d,
   10430             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10431             :         // GIR_Coverage, 3032,
   10432             :         GIR_Done,
   10433             :       // Label 759: @23642
   10434             :       GIM_Reject,
   10435             :     // Label 750: @23643
   10436             :     GIM_Reject,
   10437             :     // Label 733: @23644
   10438             :     GIM_Try, /*On fail goto*//*Label 760*/ 23751,
   10439             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
   10440             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   10441             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10442             :       GIM_Try, /*On fail goto*//*Label 761*/ 23688, // Rule ID 2146 //
   10443             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed128,
   10444             :         // (st FPR128:{ *:[f128] }:$Rt, (am_indexed128:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s16:{ *:[i64] }:$offset))<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (STRQui FPR128:{ *:[f128] }:$Rt, GPR64sp:{ *:[i64] }:$Rn, uimm12s16:{ *:[i64] }:$offset)
   10445             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::STRQui,
   10446             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10447             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10448             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10449             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10450             :         GIR_EraseFromParent, /*InsnID*/0,
   10451             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10452             :         // GIR_Coverage, 2146,
   10453             :         GIR_Done,
   10454             :       // Label 761: @23688
   10455             :       GIM_Try, /*On fail goto*//*Label 762*/ 23719, // Rule ID 2170 //
   10456             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled128,
   10457             :         // (st FPR128:{ *:[f128] }:$Rt, (am_unscaled128:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (STURQi FPR128:{ *:[f128] }:$Rt, GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset)
   10458             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::STURQi,
   10459             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10460             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10461             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10462             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10463             :         GIR_EraseFromParent, /*InsnID*/0,
   10464             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10465             :         // GIR_Coverage, 2170,
   10466             :         GIR_Done,
   10467             :       // Label 762: @23719
   10468             :       GIM_Try, /*On fail goto*//*Label 763*/ 23750, // Rule ID 258 //
   10469             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled128,
   10470             :         // (st FPR128Op:{ *:[f128] }:$Rt, (am_unscaled128:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (STURQi FPR128Op:{ *:[f128] }:$Rt, GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] }):$offset)
   10471             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::STURQi,
   10472             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10473             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10474             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10475             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10476             :         GIR_EraseFromParent, /*InsnID*/0,
   10477             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10478             :         // GIR_Coverage, 258,
   10479             :         GIR_Done,
   10480             :       // Label 763: @23750
   10481             :       GIM_Reject,
   10482             :     // Label 760: @23751
   10483             :     GIM_Reject,
   10484             :     // Label 734: @23752
   10485             :     GIM_Try, /*On fail goto*//*Label 764*/ 23939,
   10486             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
   10487             :       GIM_Try, /*On fail goto*//*Label 765*/ 23798, // Rule ID 2141 //
   10488             :         GIM_CheckFeatures, GIFBS_IsLE,
   10489             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   10490             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10491             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed64,
   10492             :         // (st FPR64:{ *:[v2f32] }:$Rt, (am_indexed64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset))<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (STRDui FPR64:{ *:[v2f32] }:$Rt, GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset)
   10493             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::STRDui,
   10494             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10495             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10496             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10497             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10498             :         GIR_EraseFromParent, /*InsnID*/0,
   10499             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10500             :         // GIR_Coverage, 2141,
   10501             :         GIR_Done,
   10502             :       // Label 765: @23798
   10503             :       GIM_Try, /*On fail goto*//*Label 766*/ 23839, // Rule ID 2144 //
   10504             :         GIM_CheckFeatures, GIFBS_IsLE,
   10505             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   10506             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10507             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed64,
   10508             :         // (st FPR64:{ *:[v2i32] }:$Rt, (am_indexed64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset))<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (STRDui FPR64:{ *:[v2i32] }:$Rt, GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset)
   10509             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::STRDui,
   10510             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10511             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10512             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10513             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10514             :         GIR_EraseFromParent, /*InsnID*/0,
   10515             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10516             :         // GIR_Coverage, 2144,
   10517             :         GIR_Done,
   10518             :       // Label 766: @23839
   10519             :       GIM_Try, /*On fail goto*//*Label 767*/ 23880, // Rule ID 2165 //
   10520             :         GIM_CheckFeatures, GIFBS_IsLE,
   10521             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   10522             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10523             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled64,
   10524             :         // (st FPR64:{ *:[v2f32] }:$Rt, (am_unscaled64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (STURDi FPR64:{ *:[v2f32] }:$Rt, GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset)
   10525             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::STURDi,
   10526             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10527             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10528             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10529             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10530             :         GIR_EraseFromParent, /*InsnID*/0,
   10531             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10532             :         // GIR_Coverage, 2165,
   10533             :         GIR_Done,
   10534             :       // Label 767: @23880
   10535             :       GIM_Try, /*On fail goto*//*Label 768*/ 23921, // Rule ID 2168 //
   10536             :         GIM_CheckFeatures, GIFBS_IsLE,
   10537             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   10538             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10539             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled64,
   10540             :         // (st FPR64:{ *:[v2i32] }:$Rt, (am_unscaled64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (STURDi FPR64:{ *:[v2i32] }:$Rt, GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset)
   10541             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::STURDi,
   10542             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10543             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10544             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10545             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10546             :         GIR_EraseFromParent, /*InsnID*/0,
   10547             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10548             :         // GIR_Coverage, 2168,
   10549             :         GIR_Done,
   10550             :       // Label 768: @23921
   10551             :       GIM_Try, /*On fail goto*//*Label 769*/ 23938, // Rule ID 3031 //
   10552             :         // MIs[0] Rn
   10553             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   10554             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   10555             :         // (st v2i32:{ *:[v2i32] }:$Vt, GPR64sp:{ *:[i64] }:$Rn)<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (ST1Onev2s v2i32:{ *:[v2i32] }:$Vt, GPR64sp:{ *:[i64] }:$Rn)
   10556             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ST1Onev2s,
   10557             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10558             :         // GIR_Coverage, 3031,
   10559             :         GIR_Done,
   10560             :       // Label 769: @23938
   10561             :       GIM_Reject,
   10562             :     // Label 764: @23939
   10563             :     GIM_Reject,
   10564             :     // Label 735: @23940
   10565             :     GIM_Try, /*On fail goto*//*Label 770*/ 24168,
   10566             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
   10567             :       GIM_Try, /*On fail goto*//*Label 771*/ 23986, // Rule ID 2148 //
   10568             :         GIM_CheckFeatures, GIFBS_IsLE,
   10569             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   10570             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10571             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed128,
   10572             :         // (st FPR128:{ *:[v2f64] }:$Rt, (am_indexed128:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s16:{ *:[i64] }:$offset))<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (STRQui FPR128:{ *:[v2f64] }:$Rt, GPR64sp:{ *:[i64] }:$Rn, uimm12s16:{ *:[i64] }:$offset)
   10573             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::STRQui,
   10574             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10575             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10576             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10577             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10578             :         GIR_EraseFromParent, /*InsnID*/0,
   10579             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10580             :         // GIR_Coverage, 2148,
   10581             :         GIR_Done,
   10582             :       // Label 771: @23986
   10583             :       GIM_Try, /*On fail goto*//*Label 772*/ 24027, // Rule ID 2152 //
   10584             :         GIM_CheckFeatures, GIFBS_IsLE,
   10585             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   10586             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10587             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed128,
   10588             :         // (st FPR128:{ *:[v2i64] }:$Rt, (am_indexed128:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s16:{ *:[i64] }:$offset))<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (STRQui FPR128:{ *:[v2i64] }:$Rt, GPR64sp:{ *:[i64] }:$Rn, uimm12s16:{ *:[i64] }:$offset)
   10589             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::STRQui,
   10590             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10591             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10592             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10593             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10594             :         GIR_EraseFromParent, /*InsnID*/0,
   10595             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10596             :         // GIR_Coverage, 2152,
   10597             :         GIR_Done,
   10598             :       // Label 772: @24027
   10599             :       GIM_Try, /*On fail goto*//*Label 773*/ 24068, // Rule ID 2172 //
   10600             :         GIM_CheckFeatures, GIFBS_IsLE,
   10601             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   10602             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10603             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled128,
   10604             :         // (st FPR128:{ *:[v2f64] }:$Rt, (am_unscaled128:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (STURQi FPR128:{ *:[v2f64] }:$Rt, GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset)
   10605             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::STURQi,
   10606             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10607             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10608             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10609             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10610             :         GIR_EraseFromParent, /*InsnID*/0,
   10611             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10612             :         // GIR_Coverage, 2172,
   10613             :         GIR_Done,
   10614             :       // Label 773: @24068
   10615             :       GIM_Try, /*On fail goto*//*Label 774*/ 24109, // Rule ID 2176 //
   10616             :         GIM_CheckFeatures, GIFBS_IsLE,
   10617             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   10618             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10619             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled128,
   10620             :         // (st FPR128:{ *:[v2i64] }:$Rt, (am_unscaled128:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (STURQi FPR128:{ *:[v2i64] }:$Rt, GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset)
   10621             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::STURQi,
   10622             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10623             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10624             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10625             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10626             :         GIR_EraseFromParent, /*InsnID*/0,
   10627             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10628             :         // GIR_Coverage, 2176,
   10629             :         GIR_Done,
   10630             :       // Label 774: @24109
   10631             :       GIM_Try, /*On fail goto*//*Label 775*/ 24150, // Rule ID 2177 //
   10632             :         GIM_CheckFeatures, GIFBS_IsLE,
   10633             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   10634             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10635             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled128,
   10636             :         // (st FPR128:{ *:[v2f64] }:$Rt, (am_unscaled128:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (STURQi FPR128:{ *:[v2f64] }:$Rt, GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset)
   10637             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::STURQi,
   10638             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10639             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10640             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10641             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10642             :         GIR_EraseFromParent, /*InsnID*/0,
   10643             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10644             :         // GIR_Coverage, 2177,
   10645             :         GIR_Done,
   10646             :       // Label 775: @24150
   10647             :       GIM_Try, /*On fail goto*//*Label 776*/ 24167, // Rule ID 3028 //
   10648             :         // MIs[0] Rn
   10649             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   10650             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   10651             :         // (st v2i64:{ *:[v2i64] }:$Vt, GPR64sp:{ *:[i64] }:$Rn)<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (ST1Onev2d v2i64:{ *:[v2i64] }:$Vt, GPR64sp:{ *:[i64] }:$Rn)
   10652             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ST1Onev2d,
   10653             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10654             :         // GIR_Coverage, 3028,
   10655             :         GIR_Done,
   10656             :       // Label 776: @24167
   10657             :       GIM_Reject,
   10658             :     // Label 770: @24168
   10659             :     GIM_Reject,
   10660             :     // Label 736: @24169
   10661             :     GIM_Try, /*On fail goto*//*Label 777*/ 24356,
   10662             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
   10663             :       GIM_Try, /*On fail goto*//*Label 778*/ 24215, // Rule ID 2143 //
   10664             :         GIM_CheckFeatures, GIFBS_IsLE,
   10665             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   10666             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10667             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed64,
   10668             :         // (st FPR64:{ *:[v4i16] }:$Rt, (am_indexed64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset))<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (STRDui FPR64:{ *:[v4i16] }:$Rt, GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset)
   10669             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::STRDui,
   10670             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10671             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10672             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10673             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10674             :         GIR_EraseFromParent, /*InsnID*/0,
   10675             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10676             :         // GIR_Coverage, 2143,
   10677             :         GIR_Done,
   10678             :       // Label 778: @24215
   10679             :       GIM_Try, /*On fail goto*//*Label 779*/ 24256, // Rule ID 2145 //
   10680             :         GIM_CheckFeatures, GIFBS_IsLE,
   10681             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   10682             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10683             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed64,
   10684             :         // (st FPR64:{ *:[v4f16] }:$Rt, (am_indexed64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset))<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (STRDui FPR64:{ *:[v4f16] }:$Rt, GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset)
   10685             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::STRDui,
   10686             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10687             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10688             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10689             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10690             :         GIR_EraseFromParent, /*InsnID*/0,
   10691             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10692             :         // GIR_Coverage, 2145,
   10693             :         GIR_Done,
   10694             :       // Label 779: @24256
   10695             :       GIM_Try, /*On fail goto*//*Label 780*/ 24297, // Rule ID 2167 //
   10696             :         GIM_CheckFeatures, GIFBS_IsLE,
   10697             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   10698             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10699             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled64,
   10700             :         // (st FPR64:{ *:[v4i16] }:$Rt, (am_unscaled64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (STURDi FPR64:{ *:[v4i16] }:$Rt, GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset)
   10701             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::STURDi,
   10702             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10703             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10704             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10705             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10706             :         GIR_EraseFromParent, /*InsnID*/0,
   10707             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10708             :         // GIR_Coverage, 2167,
   10709             :         GIR_Done,
   10710             :       // Label 780: @24297
   10711             :       GIM_Try, /*On fail goto*//*Label 781*/ 24338, // Rule ID 2169 //
   10712             :         GIM_CheckFeatures, GIFBS_IsLE,
   10713             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   10714             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10715             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled64,
   10716             :         // (st FPR64:{ *:[v4f16] }:$Rt, (am_unscaled64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (STURDi FPR64:{ *:[v4f16] }:$Rt, GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset)
   10717             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::STURDi,
   10718             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10719             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10720             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10721             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10722             :         GIR_EraseFromParent, /*InsnID*/0,
   10723             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10724             :         // GIR_Coverage, 2169,
   10725             :         GIR_Done,
   10726             :       // Label 781: @24338
   10727             :       GIM_Try, /*On fail goto*//*Label 782*/ 24355, // Rule ID 3030 //
   10728             :         // MIs[0] Rn
   10729             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   10730             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   10731             :         // (st v4i16:{ *:[v4i16] }:$Vt, GPR64sp:{ *:[i64] }:$Rn)<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (ST1Onev4h v4i16:{ *:[v4i16] }:$Vt, GPR64sp:{ *:[i64] }:$Rn)
   10732             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ST1Onev4h,
   10733             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10734             :         // GIR_Coverage, 3030,
   10735             :         GIR_Done,
   10736             :       // Label 782: @24355
   10737             :       GIM_Reject,
   10738             :     // Label 777: @24356
   10739             :     GIM_Reject,
   10740             :     // Label 737: @24357
   10741             :     GIM_Try, /*On fail goto*//*Label 783*/ 24544,
   10742             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
   10743             :       GIM_Try, /*On fail goto*//*Label 784*/ 24403, // Rule ID 2147 //
   10744             :         GIM_CheckFeatures, GIFBS_IsLE,
   10745             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   10746             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10747             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed128,
   10748             :         // (st FPR128:{ *:[v4f32] }:$Rt, (am_indexed128:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s16:{ *:[i64] }:$offset))<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (STRQui FPR128:{ *:[v4f32] }:$Rt, GPR64sp:{ *:[i64] }:$Rn, uimm12s16:{ *:[i64] }:$offset)
   10749             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::STRQui,
   10750             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10751             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10752             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10753             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10754             :         GIR_EraseFromParent, /*InsnID*/0,
   10755             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10756             :         // GIR_Coverage, 2147,
   10757             :         GIR_Done,
   10758             :       // Label 784: @24403
   10759             :       GIM_Try, /*On fail goto*//*Label 785*/ 24444, // Rule ID 2151 //
   10760             :         GIM_CheckFeatures, GIFBS_IsLE,
   10761             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   10762             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10763             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed128,
   10764             :         // (st FPR128:{ *:[v4i32] }:$Rt, (am_indexed128:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s16:{ *:[i64] }:$offset))<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (STRQui FPR128:{ *:[v4i32] }:$Rt, GPR64sp:{ *:[i64] }:$Rn, uimm12s16:{ *:[i64] }:$offset)
   10765             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::STRQui,
   10766             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10767             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10768             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10769             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10770             :         GIR_EraseFromParent, /*InsnID*/0,
   10771             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10772             :         // GIR_Coverage, 2151,
   10773             :         GIR_Done,
   10774             :       // Label 785: @24444
   10775             :       GIM_Try, /*On fail goto*//*Label 786*/ 24485, // Rule ID 2171 //
   10776             :         GIM_CheckFeatures, GIFBS_IsLE,
   10777             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   10778             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10779             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled128,
   10780             :         // (st FPR128:{ *:[v4f32] }:$Rt, (am_unscaled128:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (STURQi FPR128:{ *:[v4f32] }:$Rt, GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset)
   10781             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::STURQi,
   10782             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10783             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10784             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10785             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10786             :         GIR_EraseFromParent, /*InsnID*/0,
   10787             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10788             :         // GIR_Coverage, 2171,
   10789             :         GIR_Done,
   10790             :       // Label 786: @24485
   10791             :       GIM_Try, /*On fail goto*//*Label 787*/ 24526, // Rule ID 2175 //
   10792             :         GIM_CheckFeatures, GIFBS_IsLE,
   10793             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   10794             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10795             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled128,
   10796             :         // (st FPR128:{ *:[v4i32] }:$Rt, (am_unscaled128:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (STURQi FPR128:{ *:[v4i32] }:$Rt, GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset)
   10797             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::STURQi,
   10798             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10799             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10800             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10801             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10802             :         GIR_EraseFromParent, /*InsnID*/0,
   10803             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10804             :         // GIR_Coverage, 2175,
   10805             :         GIR_Done,
   10806             :       // Label 787: @24526
   10807             :       GIM_Try, /*On fail goto*//*Label 788*/ 24543, // Rule ID 3027 //
   10808             :         // MIs[0] Rn
   10809             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   10810             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   10811             :         // (st v4i32:{ *:[v4i32] }:$Vt, GPR64sp:{ *:[i64] }:$Rn)<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (ST1Onev4s v4i32:{ *:[v4i32] }:$Vt, GPR64sp:{ *:[i64] }:$Rn)
   10812             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ST1Onev4s,
   10813             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10814             :         // GIR_Coverage, 3027,
   10815             :         GIR_Done,
   10816             :       // Label 788: @24543
   10817             :       GIM_Reject,
   10818             :     // Label 783: @24544
   10819             :     GIM_Reject,
   10820             :     // Label 738: @24545
   10821             :     GIM_Try, /*On fail goto*//*Label 789*/ 24650,
   10822             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
   10823             :       GIM_Try, /*On fail goto*//*Label 790*/ 24591, // Rule ID 2142 //
   10824             :         GIM_CheckFeatures, GIFBS_IsLE,
   10825             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   10826             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10827             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed64,
   10828             :         // (st FPR64:{ *:[v8i8] }:$Rt, (am_indexed64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset))<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (STRDui FPR64:{ *:[v8i8] }:$Rt, GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset)
   10829             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::STRDui,
   10830             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10831             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10832             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10833             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10834             :         GIR_EraseFromParent, /*InsnID*/0,
   10835             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10836             :         // GIR_Coverage, 2142,
   10837             :         GIR_Done,
   10838             :       // Label 790: @24591
   10839             :       GIM_Try, /*On fail goto*//*Label 791*/ 24632, // Rule ID 2166 //
   10840             :         GIM_CheckFeatures, GIFBS_IsLE,
   10841             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   10842             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10843             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled64,
   10844             :         // (st FPR64:{ *:[v8i8] }:$Rt, (am_unscaled64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (STURDi FPR64:{ *:[v8i8] }:$Rt, GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset)
   10845             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::STURDi,
   10846             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10847             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10848             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10849             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10850             :         GIR_EraseFromParent, /*InsnID*/0,
   10851             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10852             :         // GIR_Coverage, 2166,
   10853             :         GIR_Done,
   10854             :       // Label 791: @24632
   10855             :       GIM_Try, /*On fail goto*//*Label 792*/ 24649, // Rule ID 3029 //
   10856             :         // MIs[0] Rn
   10857             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   10858             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   10859             :         // (st v8i8:{ *:[v8i8] }:$Vt, GPR64sp:{ *:[i64] }:$Rn)<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (ST1Onev8b v8i8:{ *:[v8i8] }:$Vt, GPR64sp:{ *:[i64] }:$Rn)
   10860             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ST1Onev8b,
   10861             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10862             :         // GIR_Coverage, 3029,
   10863             :         GIR_Done,
   10864             :       // Label 792: @24649
   10865             :       GIM_Reject,
   10866             :     // Label 789: @24650
   10867             :     GIM_Reject,
   10868             :     // Label 739: @24651
   10869             :     GIM_Try, /*On fail goto*//*Label 793*/ 24838,
   10870             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
   10871             :       GIM_Try, /*On fail goto*//*Label 794*/ 24697, // Rule ID 2150 //
   10872             :         GIM_CheckFeatures, GIFBS_IsLE,
   10873             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   10874             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10875             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed128,
   10876             :         // (st FPR128:{ *:[v8i16] }:$Rt, (am_indexed128:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s16:{ *:[i64] }:$offset))<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (STRQui FPR128:{ *:[v8i16] }:$Rt, GPR64sp:{ *:[i64] }:$Rn, uimm12s16:{ *:[i64] }:$offset)
   10877             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::STRQui,
   10878             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10879             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10880             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10881             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10882             :         GIR_EraseFromParent, /*InsnID*/0,
   10883             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10884             :         // GIR_Coverage, 2150,
   10885             :         GIR_Done,
   10886             :       // Label 794: @24697
   10887             :       GIM_Try, /*On fail goto*//*Label 795*/ 24738, // Rule ID 2153 //
   10888             :         GIM_CheckFeatures, GIFBS_IsLE,
   10889             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   10890             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10891             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed128,
   10892             :         // (st FPR128:{ *:[v8f16] }:$Rt, (am_indexed128:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s16:{ *:[i64] }:$offset))<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (STRQui FPR128:{ *:[v8f16] }:$Rt, GPR64sp:{ *:[i64] }:$Rn, uimm12s16:{ *:[i64] }:$offset)
   10893             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::STRQui,
   10894             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10895             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10896             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10897             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10898             :         GIR_EraseFromParent, /*InsnID*/0,
   10899             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10900             :         // GIR_Coverage, 2153,
   10901             :         GIR_Done,
   10902             :       // Label 795: @24738
   10903             :       GIM_Try, /*On fail goto*//*Label 796*/ 24779, // Rule ID 2174 //
   10904             :         GIM_CheckFeatures, GIFBS_IsLE,
   10905             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   10906             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10907             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled128,
   10908             :         // (st FPR128:{ *:[v8i16] }:$Rt, (am_unscaled128:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (STURQi FPR128:{ *:[v8i16] }:$Rt, GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset)
   10909             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::STURQi,
   10910             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10911             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10912             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10913             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10914             :         GIR_EraseFromParent, /*InsnID*/0,
   10915             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10916             :         // GIR_Coverage, 2174,
   10917             :         GIR_Done,
   10918             :       // Label 796: @24779
   10919             :       GIM_Try, /*On fail goto*//*Label 797*/ 24820, // Rule ID 2178 //
   10920             :         GIM_CheckFeatures, GIFBS_IsLE,
   10921             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   10922             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10923             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled128,
   10924             :         // (st FPR128:{ *:[v8f16] }:$Rt, (am_unscaled128:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (STURQi FPR128:{ *:[v8f16] }:$Rt, GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset)
   10925             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::STURQi,
   10926             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10927             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10928             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10929             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10930             :         GIR_EraseFromParent, /*InsnID*/0,
   10931             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10932             :         // GIR_Coverage, 2178,
   10933             :         GIR_Done,
   10934             :       // Label 797: @24820
   10935             :       GIM_Try, /*On fail goto*//*Label 798*/ 24837, // Rule ID 3026 //
   10936             :         // MIs[0] Rn
   10937             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   10938             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   10939             :         // (st v8i16:{ *:[v8i16] }:$Vt, GPR64sp:{ *:[i64] }:$Rn)<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (ST1Onev8h v8i16:{ *:[v8i16] }:$Vt, GPR64sp:{ *:[i64] }:$Rn)
   10940             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ST1Onev8h,
   10941             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10942             :         // GIR_Coverage, 3026,
   10943             :         GIR_Done,
   10944             :       // Label 798: @24837
   10945             :       GIM_Reject,
   10946             :     // Label 793: @24838
   10947             :     GIM_Reject,
   10948             :     // Label 740: @24839
   10949             :     GIM_Try, /*On fail goto*//*Label 799*/ 24944,
   10950             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
   10951             :       GIM_Try, /*On fail goto*//*Label 800*/ 24885, // Rule ID 2149 //
   10952             :         GIM_CheckFeatures, GIFBS_IsLE,
   10953             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   10954             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10955             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed128,
   10956             :         // (st FPR128:{ *:[v16i8] }:$Rt, (am_indexed128:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s16:{ *:[i64] }:$offset))<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (STRQui FPR128:{ *:[v16i8] }:$Rt, GPR64sp:{ *:[i64] }:$Rn, uimm12s16:{ *:[i64] }:$offset)
   10957             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::STRQui,
   10958             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10959             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10960             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10961             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10962             :         GIR_EraseFromParent, /*InsnID*/0,
   10963             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10964             :         // GIR_Coverage, 2149,
   10965             :         GIR_Done,
   10966             :       // Label 800: @24885
   10967             :       GIM_Try, /*On fail goto*//*Label 801*/ 24926, // Rule ID 2173 //
   10968             :         GIM_CheckFeatures, GIFBS_IsLE,
   10969             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   10970             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
   10971             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled128,
   10972             :         // (st FPR128:{ *:[v16i8] }:$Rt, (am_unscaled128:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (STURQi FPR128:{ *:[v16i8] }:$Rt, GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset)
   10973             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::STURQi,
   10974             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   10975             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
   10976             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
   10977             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   10978             :         GIR_EraseFromParent, /*InsnID*/0,
   10979             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10980             :         // GIR_Coverage, 2173,
   10981             :         GIR_Done,
   10982             :       // Label 801: @24926
   10983             :       GIM_Try, /*On fail goto*//*Label 802*/ 24943, // Rule ID 3025 //
   10984             :         // MIs[0] Rn
   10985             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   10986             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   10987             :         // (st v16i8:{ *:[v16i8] }:$Vt, GPR64sp:{ *:[i64] }:$Rn)<<P:Predicate_unindexedstore>><<P:Predicate_store>>  =>  (ST1Onev16b v16i8:{ *:[v16i8] }:$Vt, GPR64sp:{ *:[i64] }:$Rn)
   10988             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ST1Onev16b,
   10989             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   10990             :         // GIR_Coverage, 3025,
   10991             :         GIR_Done,
   10992             :       // Label 802: @24943
   10993             :       GIM_Reject,
   10994             :     // Label 799: @24944
   10995             :     GIM_Reject,
   10996             :     // Label 741: @24945
   10997             :     GIM_Reject,
   10998             :     // Label 13: @24946
   10999             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 3, /*)*//*default:*//*Label 805*/ 26142,
   11000             :     /*GILLT_s32*//*Label 803*/ 24954,
   11001             :     /*GILLT_s64*//*Label 804*/ 25851,
   11002             :     // Label 803: @24954
   11003             :     GIM_Try, /*On fail goto*//*Label 806*/ 25850,
   11004             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   11005             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   11006             :       GIM_Try, /*On fail goto*//*Label 807*/ 25023, // Rule ID 3733 //
   11007             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11008             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   11009             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   11010             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   11011             :         // MIs[0] Rn
   11012             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11013             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11014             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   11015             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR32RegClassID,
   11016             :         // (atomic_cmp_swap:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rold, GPR32:{ *:[i32] }:$Rnew)<<P:Predicate_atomic_cmp_swap_32>><<P:Predicate_atomic_cmp_swap_32_monotonic>>  =>  (CASW:{ *:[i32] } GPR32:{ *:[i32] }:$Rold, GPR32:{ *:[i32] }:$Rnew, GPR64sp:{ *:[i64] }:$Rn)
   11017             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CASW,
   11018             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // out
   11019             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rold
   11020             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rnew
   11021             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11022             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11023             :         GIR_EraseFromParent, /*InsnID*/0,
   11024             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11025             :         // GIR_Coverage, 3733,
   11026             :         GIR_Done,
   11027             :       // Label 807: @25023
   11028             :       GIM_Try, /*On fail goto*//*Label 808*/ 25082, // Rule ID 3734 //
   11029             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11030             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   11031             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   11032             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   11033             :         // MIs[0] Rn
   11034             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11035             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11036             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   11037             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR32RegClassID,
   11038             :         // (atomic_cmp_swap:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rold, GPR32:{ *:[i32] }:$Rnew)<<P:Predicate_atomic_cmp_swap_32>><<P:Predicate_atomic_cmp_swap_32_acquire>>  =>  (CASAW:{ *:[i32] } GPR32:{ *:[i32] }:$Rold, GPR32:{ *:[i32] }:$Rnew, GPR64sp:{ *:[i64] }:$Rn)
   11039             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CASAW,
   11040             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // out
   11041             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rold
   11042             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rnew
   11043             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11044             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11045             :         GIR_EraseFromParent, /*InsnID*/0,
   11046             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11047             :         // GIR_Coverage, 3734,
   11048             :         GIR_Done,
   11049             :       // Label 808: @25082
   11050             :       GIM_Try, /*On fail goto*//*Label 809*/ 25141, // Rule ID 3735 //
   11051             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11052             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   11053             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   11054             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   11055             :         // MIs[0] Rn
   11056             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11057             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11058             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   11059             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR32RegClassID,
   11060             :         // (atomic_cmp_swap:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rold, GPR32:{ *:[i32] }:$Rnew)<<P:Predicate_atomic_cmp_swap_32>><<P:Predicate_atomic_cmp_swap_32_release>>  =>  (CASLW:{ *:[i32] } GPR32:{ *:[i32] }:$Rold, GPR32:{ *:[i32] }:$Rnew, GPR64sp:{ *:[i64] }:$Rn)
   11061             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CASLW,
   11062             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // out
   11063             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rold
   11064             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rnew
   11065             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11066             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11067             :         GIR_EraseFromParent, /*InsnID*/0,
   11068             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11069             :         // GIR_Coverage, 3735,
   11070             :         GIR_Done,
   11071             :       // Label 809: @25141
   11072             :       GIM_Try, /*On fail goto*//*Label 810*/ 25200, // Rule ID 3736 //
   11073             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11074             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   11075             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   11076             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   11077             :         // MIs[0] Rn
   11078             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11079             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11080             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   11081             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR32RegClassID,
   11082             :         // (atomic_cmp_swap:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rold, GPR32:{ *:[i32] }:$Rnew)<<P:Predicate_atomic_cmp_swap_32>><<P:Predicate_atomic_cmp_swap_32_acq_rel>>  =>  (CASALW:{ *:[i32] } GPR32:{ *:[i32] }:$Rold, GPR32:{ *:[i32] }:$Rnew, GPR64sp:{ *:[i64] }:$Rn)
   11083             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CASALW,
   11084             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // out
   11085             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rold
   11086             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rnew
   11087             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11088             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11089             :         GIR_EraseFromParent, /*InsnID*/0,
   11090             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11091             :         // GIR_Coverage, 3736,
   11092             :         GIR_Done,
   11093             :       // Label 810: @25200
   11094             :       GIM_Try, /*On fail goto*//*Label 811*/ 25259, // Rule ID 3737 //
   11095             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11096             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   11097             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   11098             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   11099             :         // MIs[0] Rn
   11100             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11101             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11102             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   11103             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR32RegClassID,
   11104             :         // (atomic_cmp_swap:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rold, GPR32:{ *:[i32] }:$Rnew)<<P:Predicate_atomic_cmp_swap_32>><<P:Predicate_atomic_cmp_swap_32_seq_cst>>  =>  (CASALW:{ *:[i32] } GPR32:{ *:[i32] }:$Rold, GPR32:{ *:[i32] }:$Rnew, GPR64sp:{ *:[i64] }:$Rn)
   11105             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CASALW,
   11106             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // out
   11107             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rold
   11108             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rnew
   11109             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11110             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11111             :         GIR_EraseFromParent, /*InsnID*/0,
   11112             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11113             :         // GIR_Coverage, 3737,
   11114             :         GIR_Done,
   11115             :       // Label 811: @25259
   11116             :       GIM_Try, /*On fail goto*//*Label 812*/ 25318, // Rule ID 3738 //
   11117             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11118             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   11119             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   11120             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   11121             :         // MIs[0] Rn
   11122             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11123             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11124             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   11125             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR32RegClassID,
   11126             :         // (atomic_cmp_swap:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rold, GPR32:{ *:[i32] }:$Rnew)<<P:Predicate_atomic_cmp_swap_16>><<P:Predicate_atomic_cmp_swap_16_monotonic>>  =>  (CASH:{ *:[i32] } GPR32:{ *:[i32] }:$Rold, GPR32:{ *:[i32] }:$Rnew, GPR64sp:{ *:[i64] }:$Rn)
   11127             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CASH,
   11128             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // out
   11129             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rold
   11130             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rnew
   11131             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11132             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11133             :         GIR_EraseFromParent, /*InsnID*/0,
   11134             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11135             :         // GIR_Coverage, 3738,
   11136             :         GIR_Done,
   11137             :       // Label 812: @25318
   11138             :       GIM_Try, /*On fail goto*//*Label 813*/ 25377, // Rule ID 3739 //
   11139             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11140             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   11141             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   11142             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   11143             :         // MIs[0] Rn
   11144             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11145             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11146             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   11147             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR32RegClassID,
   11148             :         // (atomic_cmp_swap:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rold, GPR32:{ *:[i32] }:$Rnew)<<P:Predicate_atomic_cmp_swap_16>><<P:Predicate_atomic_cmp_swap_16_acquire>>  =>  (CASAH:{ *:[i32] } GPR32:{ *:[i32] }:$Rold, GPR32:{ *:[i32] }:$Rnew, GPR64sp:{ *:[i64] }:$Rn)
   11149             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CASAH,
   11150             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // out
   11151             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rold
   11152             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rnew
   11153             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11154             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11155             :         GIR_EraseFromParent, /*InsnID*/0,
   11156             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11157             :         // GIR_Coverage, 3739,
   11158             :         GIR_Done,
   11159             :       // Label 813: @25377
   11160             :       GIM_Try, /*On fail goto*//*Label 814*/ 25436, // Rule ID 3740 //
   11161             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11162             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   11163             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   11164             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   11165             :         // MIs[0] Rn
   11166             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11167             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11168             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   11169             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR32RegClassID,
   11170             :         // (atomic_cmp_swap:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rold, GPR32:{ *:[i32] }:$Rnew)<<P:Predicate_atomic_cmp_swap_16>><<P:Predicate_atomic_cmp_swap_16_release>>  =>  (CASLH:{ *:[i32] } GPR32:{ *:[i32] }:$Rold, GPR32:{ *:[i32] }:$Rnew, GPR64sp:{ *:[i64] }:$Rn)
   11171             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CASLH,
   11172             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // out
   11173             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rold
   11174             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rnew
   11175             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11176             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11177             :         GIR_EraseFromParent, /*InsnID*/0,
   11178             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11179             :         // GIR_Coverage, 3740,
   11180             :         GIR_Done,
   11181             :       // Label 814: @25436
   11182             :       GIM_Try, /*On fail goto*//*Label 815*/ 25495, // Rule ID 3741 //
   11183             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11184             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   11185             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   11186             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   11187             :         // MIs[0] Rn
   11188             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11189             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11190             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   11191             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR32RegClassID,
   11192             :         // (atomic_cmp_swap:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rold, GPR32:{ *:[i32] }:$Rnew)<<P:Predicate_atomic_cmp_swap_16>><<P:Predicate_atomic_cmp_swap_16_acq_rel>>  =>  (CASALH:{ *:[i32] } GPR32:{ *:[i32] }:$Rold, GPR32:{ *:[i32] }:$Rnew, GPR64sp:{ *:[i64] }:$Rn)
   11193             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CASALH,
   11194             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // out
   11195             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rold
   11196             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rnew
   11197             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11198             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11199             :         GIR_EraseFromParent, /*InsnID*/0,
   11200             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11201             :         // GIR_Coverage, 3741,
   11202             :         GIR_Done,
   11203             :       // Label 815: @25495
   11204             :       GIM_Try, /*On fail goto*//*Label 816*/ 25554, // Rule ID 3742 //
   11205             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11206             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   11207             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   11208             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   11209             :         // MIs[0] Rn
   11210             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11211             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11212             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   11213             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR32RegClassID,
   11214             :         // (atomic_cmp_swap:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rold, GPR32:{ *:[i32] }:$Rnew)<<P:Predicate_atomic_cmp_swap_16>><<P:Predicate_atomic_cmp_swap_16_seq_cst>>  =>  (CASALH:{ *:[i32] } GPR32:{ *:[i32] }:$Rold, GPR32:{ *:[i32] }:$Rnew, GPR64sp:{ *:[i64] }:$Rn)
   11215             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CASALH,
   11216             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // out
   11217             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rold
   11218             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rnew
   11219             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11220             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11221             :         GIR_EraseFromParent, /*InsnID*/0,
   11222             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11223             :         // GIR_Coverage, 3742,
   11224             :         GIR_Done,
   11225             :       // Label 816: @25554
   11226             :       GIM_Try, /*On fail goto*//*Label 817*/ 25613, // Rule ID 3743 //
   11227             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11228             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   11229             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   11230             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   11231             :         // MIs[0] Rn
   11232             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11233             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11234             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   11235             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR32RegClassID,
   11236             :         // (atomic_cmp_swap:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rold, GPR32:{ *:[i32] }:$Rnew)<<P:Predicate_atomic_cmp_swap_8>><<P:Predicate_atomic_cmp_swap_8_monotonic>>  =>  (CASB:{ *:[i32] } GPR32:{ *:[i32] }:$Rold, GPR32:{ *:[i32] }:$Rnew, GPR64sp:{ *:[i64] }:$Rn)
   11237             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CASB,
   11238             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // out
   11239             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rold
   11240             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rnew
   11241             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11242             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11243             :         GIR_EraseFromParent, /*InsnID*/0,
   11244             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11245             :         // GIR_Coverage, 3743,
   11246             :         GIR_Done,
   11247             :       // Label 817: @25613
   11248             :       GIM_Try, /*On fail goto*//*Label 818*/ 25672, // Rule ID 3744 //
   11249             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11250             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   11251             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   11252             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   11253             :         // MIs[0] Rn
   11254             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11255             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11256             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   11257             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR32RegClassID,
   11258             :         // (atomic_cmp_swap:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rold, GPR32:{ *:[i32] }:$Rnew)<<P:Predicate_atomic_cmp_swap_8>><<P:Predicate_atomic_cmp_swap_8_acquire>>  =>  (CASAB:{ *:[i32] } GPR32:{ *:[i32] }:$Rold, GPR32:{ *:[i32] }:$Rnew, GPR64sp:{ *:[i64] }:$Rn)
   11259             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CASAB,
   11260             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // out
   11261             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rold
   11262             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rnew
   11263             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11264             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11265             :         GIR_EraseFromParent, /*InsnID*/0,
   11266             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11267             :         // GIR_Coverage, 3744,
   11268             :         GIR_Done,
   11269             :       // Label 818: @25672
   11270             :       GIM_Try, /*On fail goto*//*Label 819*/ 25731, // Rule ID 3745 //
   11271             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11272             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   11273             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   11274             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   11275             :         // MIs[0] Rn
   11276             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11277             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11278             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   11279             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR32RegClassID,
   11280             :         // (atomic_cmp_swap:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rold, GPR32:{ *:[i32] }:$Rnew)<<P:Predicate_atomic_cmp_swap_8>><<P:Predicate_atomic_cmp_swap_8_release>>  =>  (CASLB:{ *:[i32] } GPR32:{ *:[i32] }:$Rold, GPR32:{ *:[i32] }:$Rnew, GPR64sp:{ *:[i64] }:$Rn)
   11281             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CASLB,
   11282             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // out
   11283             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rold
   11284             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rnew
   11285             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11286             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11287             :         GIR_EraseFromParent, /*InsnID*/0,
   11288             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11289             :         // GIR_Coverage, 3745,
   11290             :         GIR_Done,
   11291             :       // Label 819: @25731
   11292             :       GIM_Try, /*On fail goto*//*Label 820*/ 25790, // Rule ID 3746 //
   11293             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11294             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   11295             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   11296             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   11297             :         // MIs[0] Rn
   11298             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11299             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11300             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   11301             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR32RegClassID,
   11302             :         // (atomic_cmp_swap:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rold, GPR32:{ *:[i32] }:$Rnew)<<P:Predicate_atomic_cmp_swap_8>><<P:Predicate_atomic_cmp_swap_8_acq_rel>>  =>  (CASALB:{ *:[i32] } GPR32:{ *:[i32] }:$Rold, GPR32:{ *:[i32] }:$Rnew, GPR64sp:{ *:[i64] }:$Rn)
   11303             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CASALB,
   11304             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // out
   11305             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rold
   11306             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rnew
   11307             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11308             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11309             :         GIR_EraseFromParent, /*InsnID*/0,
   11310             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11311             :         // GIR_Coverage, 3746,
   11312             :         GIR_Done,
   11313             :       // Label 820: @25790
   11314             :       GIM_Try, /*On fail goto*//*Label 821*/ 25849, // Rule ID 3747 //
   11315             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11316             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   11317             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   11318             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   11319             :         // MIs[0] Rn
   11320             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11321             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11322             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   11323             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR32RegClassID,
   11324             :         // (atomic_cmp_swap:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rold, GPR32:{ *:[i32] }:$Rnew)<<P:Predicate_atomic_cmp_swap_8>><<P:Predicate_atomic_cmp_swap_8_seq_cst>>  =>  (CASALB:{ *:[i32] } GPR32:{ *:[i32] }:$Rold, GPR32:{ *:[i32] }:$Rnew, GPR64sp:{ *:[i64] }:$Rn)
   11325             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CASALB,
   11326             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // out
   11327             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rold
   11328             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rnew
   11329             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11330             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11331             :         GIR_EraseFromParent, /*InsnID*/0,
   11332             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11333             :         // GIR_Coverage, 3747,
   11334             :         GIR_Done,
   11335             :       // Label 821: @25849
   11336             :       GIM_Reject,
   11337             :     // Label 806: @25850
   11338             :     GIM_Reject,
   11339             :     // Label 804: @25851
   11340             :     GIM_Try, /*On fail goto*//*Label 822*/ 26141,
   11341             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   11342             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   11343             :       GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/8,
   11344             :       GIM_Try, /*On fail goto*//*Label 823*/ 25920, // Rule ID 1828 //
   11345             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11346             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   11347             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   11348             :         // MIs[0] Rn
   11349             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11350             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11351             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   11352             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR64RegClassID,
   11353             :         // (atomic_cmp_swap:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rold, GPR64:{ *:[i64] }:$Rnew)<<P:Predicate_atomic_cmp_swap_64>><<P:Predicate_atomic_cmp_swap_64_monotonic>>  =>  (CASX:{ *:[i64] } GPR64:{ *:[i64] }:$Rold, GPR64:{ *:[i64] }:$Rnew, GPR64sp:{ *:[i64] }:$Rn)
   11354             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CASX,
   11355             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // out
   11356             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rold
   11357             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rnew
   11358             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11359             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11360             :         GIR_EraseFromParent, /*InsnID*/0,
   11361             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11362             :         // GIR_Coverage, 1828,
   11363             :         GIR_Done,
   11364             :       // Label 823: @25920
   11365             :       GIM_Try, /*On fail goto*//*Label 824*/ 25975, // Rule ID 1829 //
   11366             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11367             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   11368             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   11369             :         // MIs[0] Rn
   11370             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11371             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11372             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   11373             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR64RegClassID,
   11374             :         // (atomic_cmp_swap:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rold, GPR64:{ *:[i64] }:$Rnew)<<P:Predicate_atomic_cmp_swap_64>><<P:Predicate_atomic_cmp_swap_64_acquire>>  =>  (CASAX:{ *:[i64] } GPR64:{ *:[i64] }:$Rold, GPR64:{ *:[i64] }:$Rnew, GPR64sp:{ *:[i64] }:$Rn)
   11375             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CASAX,
   11376             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // out
   11377             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rold
   11378             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rnew
   11379             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11380             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11381             :         GIR_EraseFromParent, /*InsnID*/0,
   11382             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11383             :         // GIR_Coverage, 1829,
   11384             :         GIR_Done,
   11385             :       // Label 824: @25975
   11386             :       GIM_Try, /*On fail goto*//*Label 825*/ 26030, // Rule ID 1830 //
   11387             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11388             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   11389             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   11390             :         // MIs[0] Rn
   11391             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11392             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11393             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   11394             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR64RegClassID,
   11395             :         // (atomic_cmp_swap:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rold, GPR64:{ *:[i64] }:$Rnew)<<P:Predicate_atomic_cmp_swap_64>><<P:Predicate_atomic_cmp_swap_64_release>>  =>  (CASLX:{ *:[i64] } GPR64:{ *:[i64] }:$Rold, GPR64:{ *:[i64] }:$Rnew, GPR64sp:{ *:[i64] }:$Rn)
   11396             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CASLX,
   11397             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // out
   11398             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rold
   11399             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rnew
   11400             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11401             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11402             :         GIR_EraseFromParent, /*InsnID*/0,
   11403             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11404             :         // GIR_Coverage, 1830,
   11405             :         GIR_Done,
   11406             :       // Label 825: @26030
   11407             :       GIM_Try, /*On fail goto*//*Label 826*/ 26085, // Rule ID 1831 //
   11408             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11409             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   11410             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   11411             :         // MIs[0] Rn
   11412             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11413             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11414             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   11415             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR64RegClassID,
   11416             :         // (atomic_cmp_swap:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rold, GPR64:{ *:[i64] }:$Rnew)<<P:Predicate_atomic_cmp_swap_64>><<P:Predicate_atomic_cmp_swap_64_acq_rel>>  =>  (CASALX:{ *:[i64] } GPR64:{ *:[i64] }:$Rold, GPR64:{ *:[i64] }:$Rnew, GPR64sp:{ *:[i64] }:$Rn)
   11417             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CASALX,
   11418             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // out
   11419             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rold
   11420             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rnew
   11421             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11422             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11423             :         GIR_EraseFromParent, /*InsnID*/0,
   11424             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11425             :         // GIR_Coverage, 1831,
   11426             :         GIR_Done,
   11427             :       // Label 826: @26085
   11428             :       GIM_Try, /*On fail goto*//*Label 827*/ 26140, // Rule ID 1832 //
   11429             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11430             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   11431             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   11432             :         // MIs[0] Rn
   11433             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11434             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11435             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   11436             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR64RegClassID,
   11437             :         // (atomic_cmp_swap:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rold, GPR64:{ *:[i64] }:$Rnew)<<P:Predicate_atomic_cmp_swap_64>><<P:Predicate_atomic_cmp_swap_64_seq_cst>>  =>  (CASALX:{ *:[i64] } GPR64:{ *:[i64] }:$Rold, GPR64:{ *:[i64] }:$Rnew, GPR64sp:{ *:[i64] }:$Rn)
   11438             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CASALX,
   11439             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // out
   11440             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rold
   11441             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rnew
   11442             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11443             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11444             :         GIR_EraseFromParent, /*InsnID*/0,
   11445             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11446             :         // GIR_Coverage, 1832,
   11447             :         GIR_Done,
   11448             :       // Label 827: @26140
   11449             :       GIM_Reject,
   11450             :     // Label 822: @26141
   11451             :     GIM_Reject,
   11452             :     // Label 805: @26142
   11453             :     GIM_Reject,
   11454             :     // Label 14: @26143
   11455             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 3, /*)*//*default:*//*Label 830*/ 27171,
   11456             :     /*GILLT_s32*//*Label 828*/ 26151,
   11457             :     /*GILLT_s64*//*Label 829*/ 26924,
   11458             :     // Label 828: @26151
   11459             :     GIM_Try, /*On fail goto*//*Label 831*/ 26923,
   11460             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   11461             :       GIM_Try, /*On fail goto*//*Label 832*/ 26208, // Rule ID 3718 //
   11462             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11463             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   11464             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   11465             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   11466             :         // MIs[0] Rn
   11467             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11468             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11469             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   11470             :         // (atomic_swap:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_swap_32>><<P:Predicate_atomic_swap_32_monotonic>>  =>  (SWPW:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   11471             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SWPW,
   11472             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   11473             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   11474             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11475             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11476             :         GIR_EraseFromParent, /*InsnID*/0,
   11477             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11478             :         // GIR_Coverage, 3718,
   11479             :         GIR_Done,
   11480             :       // Label 832: @26208
   11481             :       GIM_Try, /*On fail goto*//*Label 833*/ 26259, // Rule ID 3719 //
   11482             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11483             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   11484             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   11485             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   11486             :         // MIs[0] Rn
   11487             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11488             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11489             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   11490             :         // (atomic_swap:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_swap_32>><<P:Predicate_atomic_swap_32_acquire>>  =>  (SWPAW:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   11491             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SWPAW,
   11492             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   11493             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   11494             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11495             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11496             :         GIR_EraseFromParent, /*InsnID*/0,
   11497             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11498             :         // GIR_Coverage, 3719,
   11499             :         GIR_Done,
   11500             :       // Label 833: @26259
   11501             :       GIM_Try, /*On fail goto*//*Label 834*/ 26310, // Rule ID 3720 //
   11502             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11503             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   11504             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   11505             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   11506             :         // MIs[0] Rn
   11507             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11508             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11509             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   11510             :         // (atomic_swap:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_swap_32>><<P:Predicate_atomic_swap_32_release>>  =>  (SWPLW:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   11511             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SWPLW,
   11512             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   11513             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   11514             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11515             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11516             :         GIR_EraseFromParent, /*InsnID*/0,
   11517             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11518             :         // GIR_Coverage, 3720,
   11519             :         GIR_Done,
   11520             :       // Label 834: @26310
   11521             :       GIM_Try, /*On fail goto*//*Label 835*/ 26361, // Rule ID 3721 //
   11522             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11523             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   11524             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   11525             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   11526             :         // MIs[0] Rn
   11527             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11528             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11529             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   11530             :         // (atomic_swap:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_swap_32>><<P:Predicate_atomic_swap_32_acq_rel>>  =>  (SWPALW:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   11531             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SWPALW,
   11532             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   11533             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   11534             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11535             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11536             :         GIR_EraseFromParent, /*InsnID*/0,
   11537             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11538             :         // GIR_Coverage, 3721,
   11539             :         GIR_Done,
   11540             :       // Label 835: @26361
   11541             :       GIM_Try, /*On fail goto*//*Label 836*/ 26412, // Rule ID 3722 //
   11542             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11543             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   11544             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   11545             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   11546             :         // MIs[0] Rn
   11547             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11548             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11549             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   11550             :         // (atomic_swap:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_swap_32>><<P:Predicate_atomic_swap_32_seq_cst>>  =>  (SWPALW:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   11551             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SWPALW,
   11552             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   11553             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   11554             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11555             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11556             :         GIR_EraseFromParent, /*InsnID*/0,
   11557             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11558             :         // GIR_Coverage, 3722,
   11559             :         GIR_Done,
   11560             :       // Label 836: @26412
   11561             :       GIM_Try, /*On fail goto*//*Label 837*/ 26463, // Rule ID 3723 //
   11562             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11563             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   11564             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   11565             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   11566             :         // MIs[0] Rn
   11567             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11568             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11569             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   11570             :         // (atomic_swap:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_swap_16>><<P:Predicate_atomic_swap_16_monotonic>>  =>  (SWPH:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   11571             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SWPH,
   11572             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   11573             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   11574             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11575             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11576             :         GIR_EraseFromParent, /*InsnID*/0,
   11577             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11578             :         // GIR_Coverage, 3723,
   11579             :         GIR_Done,
   11580             :       // Label 837: @26463
   11581             :       GIM_Try, /*On fail goto*//*Label 838*/ 26514, // Rule ID 3724 //
   11582             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11583             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   11584             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   11585             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   11586             :         // MIs[0] Rn
   11587             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11588             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11589             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   11590             :         // (atomic_swap:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_swap_16>><<P:Predicate_atomic_swap_16_acquire>>  =>  (SWPAH:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   11591             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SWPAH,
   11592             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   11593             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   11594             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11595             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11596             :         GIR_EraseFromParent, /*InsnID*/0,
   11597             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11598             :         // GIR_Coverage, 3724,
   11599             :         GIR_Done,
   11600             :       // Label 838: @26514
   11601             :       GIM_Try, /*On fail goto*//*Label 839*/ 26565, // Rule ID 3725 //
   11602             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11603             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   11604             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   11605             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   11606             :         // MIs[0] Rn
   11607             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11608             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11609             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   11610             :         // (atomic_swap:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_swap_16>><<P:Predicate_atomic_swap_16_release>>  =>  (SWPLH:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   11611             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SWPLH,
   11612             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   11613             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   11614             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11615             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11616             :         GIR_EraseFromParent, /*InsnID*/0,
   11617             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11618             :         // GIR_Coverage, 3725,
   11619             :         GIR_Done,
   11620             :       // Label 839: @26565
   11621             :       GIM_Try, /*On fail goto*//*Label 840*/ 26616, // Rule ID 3726 //
   11622             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11623             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   11624             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   11625             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   11626             :         // MIs[0] Rn
   11627             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11628             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11629             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   11630             :         // (atomic_swap:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_swap_16>><<P:Predicate_atomic_swap_16_acq_rel>>  =>  (SWPALH:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   11631             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SWPALH,
   11632             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   11633             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   11634             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11635             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11636             :         GIR_EraseFromParent, /*InsnID*/0,
   11637             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11638             :         // GIR_Coverage, 3726,
   11639             :         GIR_Done,
   11640             :       // Label 840: @26616
   11641             :       GIM_Try, /*On fail goto*//*Label 841*/ 26667, // Rule ID 3727 //
   11642             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11643             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   11644             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   11645             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   11646             :         // MIs[0] Rn
   11647             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11648             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11649             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   11650             :         // (atomic_swap:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_swap_16>><<P:Predicate_atomic_swap_16_seq_cst>>  =>  (SWPALH:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   11651             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SWPALH,
   11652             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   11653             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   11654             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11655             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11656             :         GIR_EraseFromParent, /*InsnID*/0,
   11657             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11658             :         // GIR_Coverage, 3727,
   11659             :         GIR_Done,
   11660             :       // Label 841: @26667
   11661             :       GIM_Try, /*On fail goto*//*Label 842*/ 26718, // Rule ID 3728 //
   11662             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11663             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   11664             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   11665             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   11666             :         // MIs[0] Rn
   11667             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11668             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11669             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   11670             :         // (atomic_swap:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_swap_8>><<P:Predicate_atomic_swap_8_monotonic>>  =>  (SWPB:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   11671             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SWPB,
   11672             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   11673             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   11674             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11675             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11676             :         GIR_EraseFromParent, /*InsnID*/0,
   11677             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11678             :         // GIR_Coverage, 3728,
   11679             :         GIR_Done,
   11680             :       // Label 842: @26718
   11681             :       GIM_Try, /*On fail goto*//*Label 843*/ 26769, // Rule ID 3729 //
   11682             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11683             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   11684             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   11685             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   11686             :         // MIs[0] Rn
   11687             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11688             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11689             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   11690             :         // (atomic_swap:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_swap_8>><<P:Predicate_atomic_swap_8_acquire>>  =>  (SWPAB:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   11691             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SWPAB,
   11692             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   11693             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   11694             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11695             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11696             :         GIR_EraseFromParent, /*InsnID*/0,
   11697             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11698             :         // GIR_Coverage, 3729,
   11699             :         GIR_Done,
   11700             :       // Label 843: @26769
   11701             :       GIM_Try, /*On fail goto*//*Label 844*/ 26820, // Rule ID 3730 //
   11702             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11703             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   11704             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   11705             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   11706             :         // MIs[0] Rn
   11707             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11708             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11709             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   11710             :         // (atomic_swap:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_swap_8>><<P:Predicate_atomic_swap_8_release>>  =>  (SWPLB:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   11711             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SWPLB,
   11712             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   11713             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   11714             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11715             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11716             :         GIR_EraseFromParent, /*InsnID*/0,
   11717             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11718             :         // GIR_Coverage, 3730,
   11719             :         GIR_Done,
   11720             :       // Label 844: @26820
   11721             :       GIM_Try, /*On fail goto*//*Label 845*/ 26871, // Rule ID 3731 //
   11722             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11723             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   11724             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   11725             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   11726             :         // MIs[0] Rn
   11727             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11728             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11729             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   11730             :         // (atomic_swap:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_swap_8>><<P:Predicate_atomic_swap_8_acq_rel>>  =>  (SWPALB:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   11731             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SWPALB,
   11732             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   11733             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   11734             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11735             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11736             :         GIR_EraseFromParent, /*InsnID*/0,
   11737             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11738             :         // GIR_Coverage, 3731,
   11739             :         GIR_Done,
   11740             :       // Label 845: @26871
   11741             :       GIM_Try, /*On fail goto*//*Label 846*/ 26922, // Rule ID 3732 //
   11742             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11743             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   11744             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   11745             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   11746             :         // MIs[0] Rn
   11747             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11748             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11749             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   11750             :         // (atomic_swap:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_swap_8>><<P:Predicate_atomic_swap_8_seq_cst>>  =>  (SWPALB:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   11751             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SWPALB,
   11752             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   11753             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   11754             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11755             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11756             :         GIR_EraseFromParent, /*InsnID*/0,
   11757             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11758             :         // GIR_Coverage, 3732,
   11759             :         GIR_Done,
   11760             :       // Label 846: @26922
   11761             :       GIM_Reject,
   11762             :     // Label 831: @26923
   11763             :     GIM_Reject,
   11764             :     // Label 829: @26924
   11765             :     GIM_Try, /*On fail goto*//*Label 847*/ 27170,
   11766             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   11767             :       GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/8,
   11768             :       GIM_Try, /*On fail goto*//*Label 848*/ 26981, // Rule ID 3713 //
   11769             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11770             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   11771             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   11772             :         // MIs[0] Rn
   11773             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11774             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11775             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   11776             :         // (atomic_swap:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_swap_64>><<P:Predicate_atomic_swap_64_monotonic>>  =>  (SWPX:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   11777             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SWPX,
   11778             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   11779             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   11780             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11781             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11782             :         GIR_EraseFromParent, /*InsnID*/0,
   11783             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11784             :         // GIR_Coverage, 3713,
   11785             :         GIR_Done,
   11786             :       // Label 848: @26981
   11787             :       GIM_Try, /*On fail goto*//*Label 849*/ 27028, // Rule ID 3714 //
   11788             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11789             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   11790             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   11791             :         // MIs[0] Rn
   11792             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11793             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11794             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   11795             :         // (atomic_swap:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_swap_64>><<P:Predicate_atomic_swap_64_acquire>>  =>  (SWPAX:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   11796             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SWPAX,
   11797             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   11798             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   11799             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11800             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11801             :         GIR_EraseFromParent, /*InsnID*/0,
   11802             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11803             :         // GIR_Coverage, 3714,
   11804             :         GIR_Done,
   11805             :       // Label 849: @27028
   11806             :       GIM_Try, /*On fail goto*//*Label 850*/ 27075, // Rule ID 3715 //
   11807             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11808             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   11809             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   11810             :         // MIs[0] Rn
   11811             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11812             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11813             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   11814             :         // (atomic_swap:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_swap_64>><<P:Predicate_atomic_swap_64_release>>  =>  (SWPLX:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   11815             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SWPLX,
   11816             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   11817             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   11818             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11819             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11820             :         GIR_EraseFromParent, /*InsnID*/0,
   11821             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11822             :         // GIR_Coverage, 3715,
   11823             :         GIR_Done,
   11824             :       // Label 850: @27075
   11825             :       GIM_Try, /*On fail goto*//*Label 851*/ 27122, // Rule ID 3716 //
   11826             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11827             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   11828             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   11829             :         // MIs[0] Rn
   11830             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11831             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11832             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   11833             :         // (atomic_swap:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_swap_64>><<P:Predicate_atomic_swap_64_acq_rel>>  =>  (SWPALX:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   11834             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SWPALX,
   11835             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   11836             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   11837             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11838             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11839             :         GIR_EraseFromParent, /*InsnID*/0,
   11840             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11841             :         // GIR_Coverage, 3716,
   11842             :         GIR_Done,
   11843             :       // Label 851: @27122
   11844             :       GIM_Try, /*On fail goto*//*Label 852*/ 27169, // Rule ID 3717 //
   11845             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11846             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   11847             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   11848             :         // MIs[0] Rn
   11849             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11850             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11851             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   11852             :         // (atomic_swap:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_swap_64>><<P:Predicate_atomic_swap_64_seq_cst>>  =>  (SWPALX:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   11853             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SWPALX,
   11854             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   11855             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   11856             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11857             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11858             :         GIR_EraseFromParent, /*InsnID*/0,
   11859             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11860             :         // GIR_Coverage, 3717,
   11861             :         GIR_Done,
   11862             :       // Label 852: @27169
   11863             :       GIM_Reject,
   11864             :     // Label 847: @27170
   11865             :     GIM_Reject,
   11866             :     // Label 830: @27171
   11867             :     GIM_Reject,
   11868             :     // Label 15: @27172
   11869             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 3, /*)*//*default:*//*Label 855*/ 28200,
   11870             :     /*GILLT_s32*//*Label 853*/ 27180,
   11871             :     /*GILLT_s64*//*Label 854*/ 27953,
   11872             :     // Label 853: @27180
   11873             :     GIM_Try, /*On fail goto*//*Label 856*/ 27952,
   11874             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   11875             :       GIM_Try, /*On fail goto*//*Label 857*/ 27237, // Rule ID 3558 //
   11876             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11877             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   11878             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   11879             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   11880             :         // MIs[0] Rn
   11881             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11882             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11883             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   11884             :         // (atomic_load_add:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_add_32>><<P:Predicate_atomic_load_add_32_monotonic>>  =>  (LDADDW:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   11885             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDADDW,
   11886             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   11887             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   11888             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11889             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11890             :         GIR_EraseFromParent, /*InsnID*/0,
   11891             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11892             :         // GIR_Coverage, 3558,
   11893             :         GIR_Done,
   11894             :       // Label 857: @27237
   11895             :       GIM_Try, /*On fail goto*//*Label 858*/ 27288, // Rule ID 3559 //
   11896             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11897             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   11898             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   11899             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   11900             :         // MIs[0] Rn
   11901             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11902             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11903             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   11904             :         // (atomic_load_add:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_add_32>><<P:Predicate_atomic_load_add_32_acquire>>  =>  (LDADDAW:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   11905             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDADDAW,
   11906             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   11907             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   11908             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11909             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11910             :         GIR_EraseFromParent, /*InsnID*/0,
   11911             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11912             :         // GIR_Coverage, 3559,
   11913             :         GIR_Done,
   11914             :       // Label 858: @27288
   11915             :       GIM_Try, /*On fail goto*//*Label 859*/ 27339, // Rule ID 3560 //
   11916             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11917             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   11918             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   11919             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   11920             :         // MIs[0] Rn
   11921             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11922             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11923             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   11924             :         // (atomic_load_add:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_add_32>><<P:Predicate_atomic_load_add_32_release>>  =>  (LDADDLW:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   11925             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDADDLW,
   11926             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   11927             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   11928             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11929             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11930             :         GIR_EraseFromParent, /*InsnID*/0,
   11931             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11932             :         // GIR_Coverage, 3560,
   11933             :         GIR_Done,
   11934             :       // Label 859: @27339
   11935             :       GIM_Try, /*On fail goto*//*Label 860*/ 27390, // Rule ID 3561 //
   11936             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11937             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   11938             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   11939             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   11940             :         // MIs[0] Rn
   11941             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11942             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11943             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   11944             :         // (atomic_load_add:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_add_32>><<P:Predicate_atomic_load_add_32_acq_rel>>  =>  (LDADDALW:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   11945             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDADDALW,
   11946             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   11947             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   11948             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11949             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11950             :         GIR_EraseFromParent, /*InsnID*/0,
   11951             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11952             :         // GIR_Coverage, 3561,
   11953             :         GIR_Done,
   11954             :       // Label 860: @27390
   11955             :       GIM_Try, /*On fail goto*//*Label 861*/ 27441, // Rule ID 3562 //
   11956             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11957             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   11958             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   11959             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   11960             :         // MIs[0] Rn
   11961             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11962             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11963             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   11964             :         // (atomic_load_add:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_add_32>><<P:Predicate_atomic_load_add_32_seq_cst>>  =>  (LDADDALW:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   11965             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDADDALW,
   11966             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   11967             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   11968             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11969             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11970             :         GIR_EraseFromParent, /*InsnID*/0,
   11971             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11972             :         // GIR_Coverage, 3562,
   11973             :         GIR_Done,
   11974             :       // Label 861: @27441
   11975             :       GIM_Try, /*On fail goto*//*Label 862*/ 27492, // Rule ID 3563 //
   11976             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11977             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   11978             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   11979             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   11980             :         // MIs[0] Rn
   11981             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   11982             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   11983             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   11984             :         // (atomic_load_add:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_add_16>><<P:Predicate_atomic_load_add_16_monotonic>>  =>  (LDADDH:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   11985             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDADDH,
   11986             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   11987             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   11988             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   11989             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   11990             :         GIR_EraseFromParent, /*InsnID*/0,
   11991             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   11992             :         // GIR_Coverage, 3563,
   11993             :         GIR_Done,
   11994             :       // Label 862: @27492
   11995             :       GIM_Try, /*On fail goto*//*Label 863*/ 27543, // Rule ID 3564 //
   11996             :         GIM_CheckFeatures, GIFBS_HasLSE,
   11997             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   11998             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   11999             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   12000             :         // MIs[0] Rn
   12001             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   12002             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   12003             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   12004             :         // (atomic_load_add:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_add_16>><<P:Predicate_atomic_load_add_16_acquire>>  =>  (LDADDAH:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   12005             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDADDAH,
   12006             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   12007             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   12008             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   12009             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   12010             :         GIR_EraseFromParent, /*InsnID*/0,
   12011             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   12012             :         // GIR_Coverage, 3564,
   12013             :         GIR_Done,
   12014             :       // Label 863: @27543
   12015             :       GIM_Try, /*On fail goto*//*Label 864*/ 27594, // Rule ID 3565 //
   12016             :         GIM_CheckFeatures, GIFBS_HasLSE,
   12017             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   12018             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   12019             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   12020             :         // MIs[0] Rn
   12021             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   12022             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   12023             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   12024             :         // (atomic_load_add:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_add_16>><<P:Predicate_atomic_load_add_16_release>>  =>  (LDADDLH:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   12025             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDADDLH,
   12026             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   12027             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   12028             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   12029             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   12030             :         GIR_EraseFromParent, /*InsnID*/0,
   12031             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   12032             :         // GIR_Coverage, 3565,
   12033             :         GIR_Done,
   12034             :       // Label 864: @27594
   12035             :       GIM_Try, /*On fail goto*//*Label 865*/ 27645, // Rule ID 3566 //
   12036             :         GIM_CheckFeatures, GIFBS_HasLSE,
   12037             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   12038             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   12039             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   12040             :         // MIs[0] Rn
   12041             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   12042             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   12043             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   12044             :         // (atomic_load_add:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_add_16>><<P:Predicate_atomic_load_add_16_acq_rel>>  =>  (LDADDALH:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   12045             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDADDALH,
   12046             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   12047             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   12048             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   12049             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   12050             :         GIR_EraseFromParent, /*InsnID*/0,
   12051             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   12052             :         // GIR_Coverage, 3566,
   12053             :         GIR_Done,
   12054             :       // Label 865: @27645
   12055             :       GIM_Try, /*On fail goto*//*Label 866*/ 27696, // Rule ID 3567 //
   12056             :         GIM_CheckFeatures, GIFBS_HasLSE,
   12057             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   12058             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   12059             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   12060             :         // MIs[0] Rn
   12061             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   12062             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   12063             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   12064             :         // (atomic_load_add:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_add_16>><<P:Predicate_atomic_load_add_16_seq_cst>>  =>  (LDADDALH:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   12065             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDADDALH,
   12066             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   12067             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   12068             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   12069             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   12070             :         GIR_EraseFromParent, /*InsnID*/0,
   12071             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   12072             :         // GIR_Coverage, 3567,
   12073             :         GIR_Done,
   12074             :       // Label 866: @27696
   12075             :       GIM_Try, /*On fail goto*//*Label 867*/ 27747, // Rule ID 3568 //
   12076             :         GIM_CheckFeatures, GIFBS_HasLSE,
   12077             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   12078             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   12079             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   12080             :         // MIs[0] Rn
   12081             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   12082             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   12083             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   12084             :         // (atomic_load_add:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_add_8>><<P:Predicate_atomic_load_add_8_monotonic>>  =>  (LDADDB:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   12085             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDADDB,
   12086             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   12087             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   12088             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   12089             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   12090             :         GIR_EraseFromParent, /*InsnID*/0,
   12091             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   12092             :         // GIR_Coverage, 3568,
   12093             :         GIR_Done,
   12094             :       // Label 867: @27747
   12095             :       GIM_Try, /*On fail goto*//*Label 868*/ 27798, // Rule ID 3569 //
   12096             :         GIM_CheckFeatures, GIFBS_HasLSE,
   12097             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   12098             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   12099             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   12100             :         // MIs[0] Rn
   12101             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   12102             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   12103             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   12104             :         // (atomic_load_add:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_add_8>><<P:Predicate_atomic_load_add_8_acquire>>  =>  (LDADDAB:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   12105             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDADDAB,
   12106             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   12107             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   12108             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   12109             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   12110             :         GIR_EraseFromParent, /*InsnID*/0,
   12111             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   12112             :         // GIR_Coverage, 3569,
   12113             :         GIR_Done,
   12114             :       // Label 868: @27798
   12115             :       GIM_Try, /*On fail goto*//*Label 869*/ 27849, // Rule ID 3570 //
   12116             :         GIM_CheckFeatures, GIFBS_HasLSE,
   12117             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   12118             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   12119             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   12120             :         // MIs[0] Rn
   12121             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   12122             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   12123             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   12124             :         // (atomic_load_add:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_add_8>><<P:Predicate_atomic_load_add_8_release>>  =>  (LDADDLB:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   12125             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDADDLB,
   12126             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   12127             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   12128             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   12129             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   12130             :         GIR_EraseFromParent, /*InsnID*/0,
   12131             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   12132             :         // GIR_Coverage, 3570,
   12133             :         GIR_Done,
   12134             :       // Label 869: @27849
   12135             :       GIM_Try, /*On fail goto*//*Label 870*/ 27900, // Rule ID 3571 //
   12136             :         GIM_CheckFeatures, GIFBS_HasLSE,
   12137             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   12138             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   12139             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   12140             :         // MIs[0] Rn
   12141             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   12142             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   12143             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   12144             :         // (atomic_load_add:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_add_8>><<P:Predicate_atomic_load_add_8_acq_rel>>  =>  (LDADDALB:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   12145             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDADDALB,
   12146             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   12147             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   12148             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   12149             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   12150             :         GIR_EraseFromParent, /*InsnID*/0,
   12151             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   12152             :         // GIR_Coverage, 3571,
   12153             :         GIR_Done,
   12154             :       // Label 870: @27900
   12155             :       GIM_Try, /*On fail goto*//*Label 871*/ 27951, // Rule ID 3572 //
   12156             :         GIM_CheckFeatures, GIFBS_HasLSE,
   12157             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   12158             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   12159             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   12160             :         // MIs[0] Rn
   12161             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   12162             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   12163             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   12164             :         // (atomic_load_add:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_add_8>><<P:Predicate_atomic_load_add_8_seq_cst>>  =>  (LDADDALB:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   12165             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDADDALB,
   12166             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   12167             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   12168             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   12169             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   12170             :         GIR_EraseFromParent, /*InsnID*/0,
   12171             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   12172             :         // GIR_Coverage, 3572,
   12173             :         GIR_Done,
   12174             :       // Label 871: @27951
   12175             :       GIM_Reject,
   12176             :     // Label 856: @27952
   12177             :     GIM_Reject,
   12178             :     // Label 854: @27953
   12179             :     GIM_Try, /*On fail goto*//*Label 872*/ 28199,
   12180             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   12181             :       GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/8,
   12182             :       GIM_Try, /*On fail goto*//*Label 873*/ 28010, // Rule ID 1823 //
   12183             :         GIM_CheckFeatures, GIFBS_HasLSE,
   12184             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   12185             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   12186             :         // MIs[0] Rn
   12187             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   12188             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   12189             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   12190             :         // (atomic_load_add:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_add_64>><<P:Predicate_atomic_load_add_64_monotonic>>  =>  (LDADDX:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   12191             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDADDX,
   12192             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   12193             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   12194             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   12195             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   12196             :         GIR_EraseFromParent, /*InsnID*/0,
   12197             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   12198             :         // GIR_Coverage, 1823,
   12199             :         GIR_Done,
   12200             :       // Label 873: @28010
   12201             :       GIM_Try, /*On fail goto*//*Label 874*/ 28057, // Rule ID 1824 //
   12202             :         GIM_CheckFeatures, GIFBS_HasLSE,
   12203             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   12204             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   12205             :         // MIs[0] Rn
   12206             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   12207             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   12208             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   12209             :         // (atomic_load_add:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_add_64>><<P:Predicate_atomic_load_add_64_acquire>>  =>  (LDADDAX:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   12210             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDADDAX,
   12211             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   12212             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   12213             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   12214             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   12215             :         GIR_EraseFromParent, /*InsnID*/0,
   12216             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   12217             :         // GIR_Coverage, 1824,
   12218             :         GIR_Done,
   12219             :       // Label 874: @28057
   12220             :       GIM_Try, /*On fail goto*//*Label 875*/ 28104, // Rule ID 1825 //
   12221             :         GIM_CheckFeatures, GIFBS_HasLSE,
   12222             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   12223             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   12224             :         // MIs[0] Rn
   12225             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   12226             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   12227             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   12228             :         // (atomic_load_add:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_add_64>><<P:Predicate_atomic_load_add_64_release>>  =>  (LDADDLX:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   12229             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDADDLX,
   12230             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   12231             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   12232             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   12233             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   12234             :         GIR_EraseFromParent, /*InsnID*/0,
   12235             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   12236             :         // GIR_Coverage, 1825,
   12237             :         GIR_Done,
   12238             :       // Label 875: @28104
   12239             :       GIM_Try, /*On fail goto*//*Label 876*/ 28151, // Rule ID 1826 //
   12240             :         GIM_CheckFeatures, GIFBS_HasLSE,
   12241             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   12242             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   12243             :         // MIs[0] Rn
   12244             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   12245             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   12246             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   12247             :         // (atomic_load_add:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_add_64>><<P:Predicate_atomic_load_add_64_acq_rel>>  =>  (LDADDALX:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   12248             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDADDALX,
   12249             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   12250             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   12251             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   12252             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   12253             :         GIR_EraseFromParent, /*InsnID*/0,
   12254             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   12255             :         // GIR_Coverage, 1826,
   12256             :         GIR_Done,
   12257             :       // Label 876: @28151
   12258             :       GIM_Try, /*On fail goto*//*Label 877*/ 28198, // Rule ID 1827 //
   12259             :         GIM_CheckFeatures, GIFBS_HasLSE,
   12260             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   12261             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   12262             :         // MIs[0] Rn
   12263             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   12264             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   12265             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   12266             :         // (atomic_load_add:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_add_64>><<P:Predicate_atomic_load_add_64_seq_cst>>  =>  (LDADDALX:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   12267             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDADDALX,
   12268             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   12269             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   12270             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   12271             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   12272             :         GIR_EraseFromParent, /*InsnID*/0,
   12273             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   12274             :         // GIR_Coverage, 1827,
   12275             :         GIR_Done,
   12276             :       // Label 877: @28198
   12277             :       GIM_Reject,
   12278             :     // Label 872: @28199
   12279             :     GIM_Reject,
   12280             :     // Label 855: @28200
   12281             :     GIM_Reject,
   12282             :     // Label 16: @28201
   12283             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 3, /*)*//*default:*//*Label 880*/ 29609,
   12284             :     /*GILLT_s32*//*Label 878*/ 28209,
   12285             :     /*GILLT_s64*//*Label 879*/ 29267,
   12286             :     // Label 878: @28209
   12287             :     GIM_Try, /*On fail goto*//*Label 881*/ 29266,
   12288             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   12289             :       GIM_Try, /*On fail goto*//*Label 882*/ 28285, // Rule ID 3753 //
   12290             :         GIM_CheckFeatures, GIFBS_HasLSE,
   12291             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   12292             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   12293             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   12294             :         // MIs[0] Rn
   12295             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   12296             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   12297             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   12298             :         // (atomic_load_sub:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_sub_32>><<P:Predicate_atomic_load_sub_32_monotonic>>  =>  (LDADDW:{ *:[i32] } (SUBWrr:{ *:[i32] } WZR:{ *:[i32] }, GPR32:{ *:[i32] }:$Rm), GPR64sp:{ *:[i64] }:$Rn)
   12299             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
   12300             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::SUBWrr,
   12301             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   12302             :         GIR_AddRegister, /*InsnID*/1, AArch64::WZR,
   12303             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   12304             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   12305             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDADDW,
   12306             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   12307             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   12308             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   12309             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   12310             :         GIR_EraseFromParent, /*InsnID*/0,
   12311             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   12312             :         // GIR_Coverage, 3753,
   12313             :         GIR_Done,
   12314             :       // Label 882: @28285
   12315             :       GIM_Try, /*On fail goto*//*Label 883*/ 28355, // Rule ID 3754 //
   12316             :         GIM_CheckFeatures, GIFBS_HasLSE,
   12317             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   12318             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   12319             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   12320             :         // MIs[0] Rn
   12321             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   12322             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   12323             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   12324             :         // (atomic_load_sub:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_sub_32>><<P:Predicate_atomic_load_sub_32_acquire>>  =>  (LDADDAW:{ *:[i32] } (SUBWrr:{ *:[i32] } WZR:{ *:[i32] }, GPR32:{ *:[i32] }:$Rm), GPR64sp:{ *:[i64] }:$Rn)
   12325             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
   12326             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::SUBWrr,
   12327             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   12328             :         GIR_AddRegister, /*InsnID*/1, AArch64::WZR,
   12329             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   12330             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   12331             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDADDAW,
   12332             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   12333             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   12334             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   12335             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   12336             :         GIR_EraseFromParent, /*InsnID*/0,
   12337             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   12338             :         // GIR_Coverage, 3754,
   12339             :         GIR_Done,
   12340             :       // Label 883: @28355
   12341             :       GIM_Try, /*On fail goto*//*Label 884*/ 28425, // Rule ID 3755 //
   12342             :         GIM_CheckFeatures, GIFBS_HasLSE,
   12343             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   12344             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   12345             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   12346             :         // MIs[0] Rn
   12347             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   12348             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   12349             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   12350             :         // (atomic_load_sub:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_sub_32>><<P:Predicate_atomic_load_sub_32_release>>  =>  (LDADDLW:{ *:[i32] } (SUBWrr:{ *:[i32] } WZR:{ *:[i32] }, GPR32:{ *:[i32] }:$Rm), GPR64sp:{ *:[i64] }:$Rn)
   12351             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
   12352             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::SUBWrr,
   12353             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   12354             :         GIR_AddRegister, /*InsnID*/1, AArch64::WZR,
   12355             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   12356             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   12357             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDADDLW,
   12358             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   12359             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   12360             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   12361             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   12362             :         GIR_EraseFromParent, /*InsnID*/0,
   12363             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   12364             :         // GIR_Coverage, 3755,
   12365             :         GIR_Done,
   12366             :       // Label 884: @28425
   12367             :       GIM_Try, /*On fail goto*//*Label 885*/ 28495, // Rule ID 3756 //
   12368             :         GIM_CheckFeatures, GIFBS_HasLSE,
   12369             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   12370             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   12371             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   12372             :         // MIs[0] Rn
   12373             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   12374             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   12375             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   12376             :         // (atomic_load_sub:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_sub_32>><<P:Predicate_atomic_load_sub_32_acq_rel>>  =>  (LDADDALW:{ *:[i32] } (SUBWrr:{ *:[i32] } WZR:{ *:[i32] }, GPR32:{ *:[i32] }:$Rm), GPR64sp:{ *:[i64] }:$Rn)
   12377             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
   12378             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::SUBWrr,
   12379             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   12380             :         GIR_AddRegister, /*InsnID*/1, AArch64::WZR,
   12381             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   12382             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   12383             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDADDALW,
   12384             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   12385             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   12386             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   12387             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   12388             :         GIR_EraseFromParent, /*InsnID*/0,
   12389             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   12390             :         // GIR_Coverage, 3756,
   12391             :         GIR_Done,
   12392             :       // Label 885: @28495
   12393             :       GIM_Try, /*On fail goto*//*Label 886*/ 28565, // Rule ID 3757 //
   12394             :         GIM_CheckFeatures, GIFBS_HasLSE,
   12395             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   12396             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   12397             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   12398             :         // MIs[0] Rn
   12399             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   12400             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   12401             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   12402             :         // (atomic_load_sub:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_sub_32>><<P:Predicate_atomic_load_sub_32_seq_cst>>  =>  (LDADDALW:{ *:[i32] } (SUBWrr:{ *:[i32] } WZR:{ *:[i32] }, GPR32:{ *:[i32] }:$Rm), GPR64sp:{ *:[i64] }:$Rn)
   12403             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
   12404             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::SUBWrr,
   12405             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   12406             :         GIR_AddRegister, /*InsnID*/1, AArch64::WZR,
   12407             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   12408             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   12409             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDADDALW,
   12410             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   12411             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   12412             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   12413             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   12414             :         GIR_EraseFromParent, /*InsnID*/0,
   12415             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   12416             :         // GIR_Coverage, 3757,
   12417             :         GIR_Done,
   12418             :       // Label 886: @28565
   12419             :       GIM_Try, /*On fail goto*//*Label 887*/ 28635, // Rule ID 3758 //
   12420             :         GIM_CheckFeatures, GIFBS_HasLSE,
   12421             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   12422             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   12423             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   12424             :         // MIs[0] Rn
   12425             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   12426             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   12427             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   12428             :         // (atomic_load_sub:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_sub_16>><<P:Predicate_atomic_load_sub_16_monotonic>>  =>  (LDADDH:{ *:[i32] } (SUBWrr:{ *:[i32] } WZR:{ *:[i32] }, GPR32:{ *:[i32] }:$Rm), GPR64sp:{ *:[i64] }:$Rn)
   12429             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
   12430             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::SUBWrr,
   12431             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   12432             :         GIR_AddRegister, /*InsnID*/1, AArch64::WZR,
   12433             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   12434             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   12435             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDADDH,
   12436             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   12437             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   12438             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   12439             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   12440             :         GIR_EraseFromParent, /*InsnID*/0,
   12441             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   12442             :         // GIR_Coverage, 3758,
   12443             :         GIR_Done,
   12444             :       // Label 887: @28635
   12445             :       GIM_Try, /*On fail goto*//*Label 888*/ 28705, // Rule ID 3759 //
   12446             :         GIM_CheckFeatures, GIFBS_HasLSE,
   12447             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   12448             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   12449             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   12450             :         // MIs[0] Rn
   12451             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   12452             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   12453             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   12454             :         // (atomic_load_sub:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_sub_16>><<P:Predicate_atomic_load_sub_16_acquire>>  =>  (LDADDAH:{ *:[i32] } (SUBWrr:{ *:[i32] } WZR:{ *:[i32] }, GPR32:{ *:[i32] }:$Rm), GPR64sp:{ *:[i64] }:$Rn)
   12455             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
   12456             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::SUBWrr,
   12457             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   12458             :         GIR_AddRegister, /*InsnID*/1, AArch64::WZR,
   12459             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   12460             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   12461             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDADDAH,
   12462             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   12463             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   12464             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   12465             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   12466             :         GIR_EraseFromParent, /*InsnID*/0,
   12467             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   12468             :         // GIR_Coverage, 3759,
   12469             :         GIR_Done,
   12470             :       // Label 888: @28705
   12471             :       GIM_Try, /*On fail goto*//*Label 889*/ 28775, // Rule ID 3760 //
   12472             :         GIM_CheckFeatures, GIFBS_HasLSE,
   12473             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   12474             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   12475             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   12476             :         // MIs[0] Rn
   12477             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   12478             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   12479             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   12480             :         // (atomic_load_sub:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_sub_16>><<P:Predicate_atomic_load_sub_16_release>>  =>  (LDADDLH:{ *:[i32] } (SUBWrr:{ *:[i32] } WZR:{ *:[i32] }, GPR32:{ *:[i32] }:$Rm), GPR64sp:{ *:[i64] }:$Rn)
   12481             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
   12482             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::SUBWrr,
   12483             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   12484             :         GIR_AddRegister, /*InsnID*/1, AArch64::WZR,
   12485             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   12486             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   12487             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDADDLH,
   12488             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   12489             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   12490             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   12491             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   12492             :         GIR_EraseFromParent, /*InsnID*/0,
   12493             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   12494             :         // GIR_Coverage, 3760,
   12495             :         GIR_Done,
   12496             :       // Label 889: @28775
   12497             :       GIM_Try, /*On fail goto*//*Label 890*/ 28845, // Rule ID 3761 //
   12498             :         GIM_CheckFeatures, GIFBS_HasLSE,
   12499             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   12500             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   12501             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   12502             :         // MIs[0] Rn
   12503             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   12504             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   12505             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   12506             :         // (atomic_load_sub:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_sub_16>><<P:Predicate_atomic_load_sub_16_acq_rel>>  =>  (LDADDALH:{ *:[i32] } (SUBWrr:{ *:[i32] } WZR:{ *:[i32] }, GPR32:{ *:[i32] }:$Rm), GPR64sp:{ *:[i64] }:$Rn)
   12507             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
   12508             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::SUBWrr,
   12509             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   12510             :         GIR_AddRegister, /*InsnID*/1, AArch64::WZR,
   12511             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   12512             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   12513             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDADDALH,
   12514             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   12515             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   12516             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   12517             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   12518             :         GIR_EraseFromParent, /*InsnID*/0,
   12519             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   12520             :         // GIR_Coverage, 3761,
   12521             :         GIR_Done,
   12522             :       // Label 890: @28845
   12523             :       GIM_Try, /*On fail goto*//*Label 891*/ 28915, // Rule ID 3762 //
   12524             :         GIM_CheckFeatures, GIFBS_HasLSE,
   12525             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   12526             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   12527             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   12528             :         // MIs[0] Rn
   12529             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   12530             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   12531             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   12532             :         // (atomic_load_sub:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_sub_16>><<P:Predicate_atomic_load_sub_16_seq_cst>>  =>  (LDADDALH:{ *:[i32] } (SUBWrr:{ *:[i32] } WZR:{ *:[i32] }, GPR32:{ *:[i32] }:$Rm), GPR64sp:{ *:[i64] }:$Rn)
   12533             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
   12534             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::SUBWrr,
   12535             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   12536             :         GIR_AddRegister, /*InsnID*/1, AArch64::WZR,
   12537             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   12538             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   12539             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDADDALH,
   12540             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   12541             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   12542             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   12543             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   12544             :         GIR_EraseFromParent, /*InsnID*/0,
   12545             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   12546             :         // GIR_Coverage, 3762,
   12547             :         GIR_Done,
   12548             :       // Label 891: @28915
   12549             :       GIM_Try, /*On fail goto*//*Label 892*/ 28985, // Rule ID 3763 //
   12550             :         GIM_CheckFeatures, GIFBS_HasLSE,
   12551             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   12552             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   12553             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   12554             :         // MIs[0] Rn
   12555             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   12556             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   12557             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   12558             :         // (atomic_load_sub:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_sub_8>><<P:Predicate_atomic_load_sub_8_monotonic>>  =>  (LDADDB:{ *:[i32] } (SUBWrr:{ *:[i32] } WZR:{ *:[i32] }, GPR32:{ *:[i32] }:$Rm), GPR64sp:{ *:[i64] }:$Rn)
   12559             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
   12560             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::SUBWrr,
   12561             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   12562             :         GIR_AddRegister, /*InsnID*/1, AArch64::WZR,
   12563             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   12564             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   12565             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDADDB,
   12566             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   12567             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   12568             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   12569             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   12570             :         GIR_EraseFromParent, /*InsnID*/0,
   12571             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   12572             :         // GIR_Coverage, 3763,
   12573             :         GIR_Done,
   12574             :       // Label 892: @28985
   12575             :       GIM_Try, /*On fail goto*//*Label 893*/ 29055, // Rule ID 3764 //
   12576             :         GIM_CheckFeatures, GIFBS_HasLSE,
   12577             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   12578             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   12579             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   12580             :         // MIs[0] Rn
   12581             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   12582             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   12583             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   12584             :         // (atomic_load_sub:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_sub_8>><<P:Predicate_atomic_load_sub_8_acquire>>  =>  (LDADDAB:{ *:[i32] } (SUBWrr:{ *:[i32] } WZR:{ *:[i32] }, GPR32:{ *:[i32] }:$Rm), GPR64sp:{ *:[i64] }:$Rn)
   12585             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
   12586             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::SUBWrr,
   12587             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   12588             :         GIR_AddRegister, /*InsnID*/1, AArch64::WZR,
   12589             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   12590             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   12591             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDADDAB,
   12592             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   12593             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   12594             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   12595             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   12596             :         GIR_EraseFromParent, /*InsnID*/0,
   12597             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   12598             :         // GIR_Coverage, 3764,
   12599             :         GIR_Done,
   12600             :       // Label 893: @29055
   12601             :       GIM_Try, /*On fail goto*//*Label 894*/ 29125, // Rule ID 3765 //
   12602             :         GIM_CheckFeatures, GIFBS_HasLSE,
   12603             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   12604             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   12605             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   12606             :         // MIs[0] Rn
   12607             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   12608             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   12609             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   12610             :         // (atomic_load_sub:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_sub_8>><<P:Predicate_atomic_load_sub_8_release>>  =>  (LDADDLB:{ *:[i32] } (SUBWrr:{ *:[i32] } WZR:{ *:[i32] }, GPR32:{ *:[i32] }:$Rm), GPR64sp:{ *:[i64] }:$Rn)
   12611             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
   12612             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::SUBWrr,
   12613             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   12614             :         GIR_AddRegister, /*InsnID*/1, AArch64::WZR,
   12615             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   12616             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   12617             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDADDLB,
   12618             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   12619             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   12620             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   12621             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   12622             :         GIR_EraseFromParent, /*InsnID*/0,
   12623             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   12624             :         // GIR_Coverage, 3765,
   12625             :         GIR_Done,
   12626             :       // Label 894: @29125
   12627             :       GIM_Try, /*On fail goto*//*Label 895*/ 29195, // Rule ID 3766 //
   12628             :         GIM_CheckFeatures, GIFBS_HasLSE,
   12629             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   12630             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   12631             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   12632             :         // MIs[0] Rn
   12633             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   12634             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   12635             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   12636             :         // (atomic_load_sub:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_sub_8>><<P:Predicate_atomic_load_sub_8_acq_rel>>  =>  (LDADDALB:{ *:[i32] } (SUBWrr:{ *:[i32] } WZR:{ *:[i32] }, GPR32:{ *:[i32] }:$Rm), GPR64sp:{ *:[i64] }:$Rn)
   12637             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
   12638             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::SUBWrr,
   12639             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   12640             :         GIR_AddRegister, /*InsnID*/1, AArch64::WZR,
   12641             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   12642             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   12643             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDADDALB,
   12644             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   12645             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   12646             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   12647             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   12648             :         GIR_EraseFromParent, /*InsnID*/0,
   12649             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   12650             :         // GIR_Coverage, 3766,
   12651             :         GIR_Done,
   12652             :       // Label 895: @29195
   12653             :       GIM_Try, /*On fail goto*//*Label 896*/ 29265, // Rule ID 3767 //
   12654             :         GIM_CheckFeatures, GIFBS_HasLSE,
   12655             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   12656             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   12657             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   12658             :         // MIs[0] Rn
   12659             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   12660             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   12661             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   12662             :         // (atomic_load_sub:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_sub_8>><<P:Predicate_atomic_load_sub_8_seq_cst>>  =>  (LDADDALB:{ *:[i32] } (SUBWrr:{ *:[i32] } WZR:{ *:[i32] }, GPR32:{ *:[i32] }:$Rm), GPR64sp:{ *:[i64] }:$Rn)
   12663             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
   12664             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::SUBWrr,
   12665             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   12666             :         GIR_AddRegister, /*InsnID*/1, AArch64::WZR,
   12667             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   12668             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   12669             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDADDALB,
   12670             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   12671             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   12672             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   12673             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   12674             :         GIR_EraseFromParent, /*InsnID*/0,
   12675             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   12676             :         // GIR_Coverage, 3767,
   12677             :         GIR_Done,
   12678             :       // Label 896: @29265
   12679             :       GIM_Reject,
   12680             :     // Label 881: @29266
   12681             :     GIM_Reject,
   12682             :     // Label 879: @29267
   12683             :     GIM_Try, /*On fail goto*//*Label 897*/ 29608,
   12684             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   12685             :       GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/8,
   12686             :       GIM_Try, /*On fail goto*//*Label 898*/ 29343, // Rule ID 3748 //
   12687             :         GIM_CheckFeatures, GIFBS_HasLSE,
   12688             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   12689             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   12690             :         // MIs[0] Rn
   12691             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   12692             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   12693             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   12694             :         // (atomic_load_sub:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_sub_64>><<P:Predicate_atomic_load_sub_64_monotonic>>  =>  (LDADDX:{ *:[i64] } (SUBXrr:{ *:[i64] } XZR:{ *:[i64] }, GPR64:{ *:[i64] }:$Rm), GPR64sp:{ *:[i64] }:$Rn)
   12695             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
   12696             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::SUBXrr,
   12697             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   12698             :         GIR_AddRegister, /*InsnID*/1, AArch64::XZR,
   12699             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   12700             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   12701             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDADDX,
   12702             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   12703             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   12704             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   12705             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   12706             :         GIR_EraseFromParent, /*InsnID*/0,
   12707             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   12708             :         // GIR_Coverage, 3748,
   12709             :         GIR_Done,
   12710             :       // Label 898: @29343
   12711             :       GIM_Try, /*On fail goto*//*Label 899*/ 29409, // Rule ID 3749 //
   12712             :         GIM_CheckFeatures, GIFBS_HasLSE,
   12713             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   12714             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   12715             :         // MIs[0] Rn
   12716             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   12717             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   12718             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   12719             :         // (atomic_load_sub:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_sub_64>><<P:Predicate_atomic_load_sub_64_acquire>>  =>  (LDADDAX:{ *:[i64] } (SUBXrr:{ *:[i64] } XZR:{ *:[i64] }, GPR64:{ *:[i64] }:$Rm), GPR64sp:{ *:[i64] }:$Rn)
   12720             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
   12721             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::SUBXrr,
   12722             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   12723             :         GIR_AddRegister, /*InsnID*/1, AArch64::XZR,
   12724             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   12725             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   12726             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDADDAX,
   12727             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   12728             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   12729             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   12730             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   12731             :         GIR_EraseFromParent, /*InsnID*/0,
   12732             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   12733             :         // GIR_Coverage, 3749,
   12734             :         GIR_Done,
   12735             :       // Label 899: @29409
   12736             :       GIM_Try, /*On fail goto*//*Label 900*/ 29475, // Rule ID 3750 //
   12737             :         GIM_CheckFeatures, GIFBS_HasLSE,
   12738             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   12739             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   12740             :         // MIs[0] Rn
   12741             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   12742             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   12743             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   12744             :         // (atomic_load_sub:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_sub_64>><<P:Predicate_atomic_load_sub_64_release>>  =>  (LDADDLX:{ *:[i64] } (SUBXrr:{ *:[i64] } XZR:{ *:[i64] }, GPR64:{ *:[i64] }:$Rm), GPR64sp:{ *:[i64] }:$Rn)
   12745             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
   12746             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::SUBXrr,
   12747             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   12748             :         GIR_AddRegister, /*InsnID*/1, AArch64::XZR,
   12749             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   12750             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   12751             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDADDLX,
   12752             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   12753             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   12754             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   12755             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   12756             :         GIR_EraseFromParent, /*InsnID*/0,
   12757             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   12758             :         // GIR_Coverage, 3750,
   12759             :         GIR_Done,
   12760             :       // Label 900: @29475
   12761             :       GIM_Try, /*On fail goto*//*Label 901*/ 29541, // Rule ID 3751 //
   12762             :         GIM_CheckFeatures, GIFBS_HasLSE,
   12763             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   12764             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   12765             :         // MIs[0] Rn
   12766             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   12767             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   12768             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   12769             :         // (atomic_load_sub:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_sub_64>><<P:Predicate_atomic_load_sub_64_acq_rel>>  =>  (LDADDALX:{ *:[i64] } (SUBXrr:{ *:[i64] } XZR:{ *:[i64] }, GPR64:{ *:[i64] }:$Rm), GPR64sp:{ *:[i64] }:$Rn)
   12770             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
   12771             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::SUBXrr,
   12772             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   12773             :         GIR_AddRegister, /*InsnID*/1, AArch64::XZR,
   12774             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   12775             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   12776             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDADDALX,
   12777             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   12778             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   12779             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   12780             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   12781             :         GIR_EraseFromParent, /*InsnID*/0,
   12782             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   12783             :         // GIR_Coverage, 3751,
   12784             :         GIR_Done,
   12785             :       // Label 901: @29541
   12786             :       GIM_Try, /*On fail goto*//*Label 902*/ 29607, // Rule ID 3752 //
   12787             :         GIM_CheckFeatures, GIFBS_HasLSE,
   12788             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   12789             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   12790             :         // MIs[0] Rn
   12791             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   12792             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   12793             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   12794             :         // (atomic_load_sub:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_sub_64>><<P:Predicate_atomic_load_sub_64_seq_cst>>  =>  (LDADDALX:{ *:[i64] } (SUBXrr:{ *:[i64] } XZR:{ *:[i64] }, GPR64:{ *:[i64] }:$Rm), GPR64sp:{ *:[i64] }:$Rn)
   12795             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
   12796             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::SUBXrr,
   12797             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   12798             :         GIR_AddRegister, /*InsnID*/1, AArch64::XZR,
   12799             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   12800             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   12801             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDADDALX,
   12802             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   12803             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   12804             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   12805             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   12806             :         GIR_EraseFromParent, /*InsnID*/0,
   12807             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   12808             :         // GIR_Coverage, 3752,
   12809             :         GIR_Done,
   12810             :       // Label 902: @29607
   12811             :       GIM_Reject,
   12812             :     // Label 897: @29608
   12813             :     GIM_Reject,
   12814             :     // Label 880: @29609
   12815             :     GIM_Reject,
   12816             :     // Label 17: @29610
   12817             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 3, /*)*//*default:*//*Label 905*/ 31018,
   12818             :     /*GILLT_s32*//*Label 903*/ 29618,
   12819             :     /*GILLT_s64*//*Label 904*/ 30676,
   12820             :     // Label 903: @29618
   12821             :     GIM_Try, /*On fail goto*//*Label 906*/ 30675,
   12822             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   12823             :       GIM_Try, /*On fail goto*//*Label 907*/ 29694, // Rule ID 3773 //
   12824             :         GIM_CheckFeatures, GIFBS_HasLSE,
   12825             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   12826             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   12827             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   12828             :         // MIs[0] Rn
   12829             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   12830             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   12831             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   12832             :         // (atomic_load_and:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_and_32>><<P:Predicate_atomic_load_and_32_monotonic>>  =>  (LDCLRW:{ *:[i32] } (ORNWrr:{ *:[i32] } WZR:{ *:[i32] }, GPR32:{ *:[i32] }:$Rm), GPR64sp:{ *:[i64] }:$Rn)
   12833             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
   12834             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::ORNWrr,
   12835             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   12836             :         GIR_AddRegister, /*InsnID*/1, AArch64::WZR,
   12837             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   12838             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   12839             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDCLRW,
   12840             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   12841             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   12842             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   12843             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   12844             :         GIR_EraseFromParent, /*InsnID*/0,
   12845             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   12846             :         // GIR_Coverage, 3773,
   12847             :         GIR_Done,
   12848             :       // Label 907: @29694
   12849             :       GIM_Try, /*On fail goto*//*Label 908*/ 29764, // Rule ID 3774 //
   12850             :         GIM_CheckFeatures, GIFBS_HasLSE,
   12851             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   12852             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   12853             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   12854             :         // MIs[0] Rn
   12855             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   12856             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   12857             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   12858             :         // (atomic_load_and:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_and_32>><<P:Predicate_atomic_load_and_32_acquire>>  =>  (LDCLRAW:{ *:[i32] } (ORNWrr:{ *:[i32] } WZR:{ *:[i32] }, GPR32:{ *:[i32] }:$Rm), GPR64sp:{ *:[i64] }:$Rn)
   12859             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
   12860             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::ORNWrr,
   12861             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   12862             :         GIR_AddRegister, /*InsnID*/1, AArch64::WZR,
   12863             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   12864             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   12865             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDCLRAW,
   12866             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   12867             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   12868             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   12869             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   12870             :         GIR_EraseFromParent, /*InsnID*/0,
   12871             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   12872             :         // GIR_Coverage, 3774,
   12873             :         GIR_Done,
   12874             :       // Label 908: @29764
   12875             :       GIM_Try, /*On fail goto*//*Label 909*/ 29834, // Rule ID 3775 //
   12876             :         GIM_CheckFeatures, GIFBS_HasLSE,
   12877             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   12878             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   12879             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   12880             :         // MIs[0] Rn
   12881             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   12882             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   12883             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   12884             :         // (atomic_load_and:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_and_32>><<P:Predicate_atomic_load_and_32_release>>  =>  (LDCLRLW:{ *:[i32] } (ORNWrr:{ *:[i32] } WZR:{ *:[i32] }, GPR32:{ *:[i32] }:$Rm), GPR64sp:{ *:[i64] }:$Rn)
   12885             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
   12886             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::ORNWrr,
   12887             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   12888             :         GIR_AddRegister, /*InsnID*/1, AArch64::WZR,
   12889             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   12890             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   12891             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDCLRLW,
   12892             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   12893             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   12894             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   12895             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   12896             :         GIR_EraseFromParent, /*InsnID*/0,
   12897             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   12898             :         // GIR_Coverage, 3775,
   12899             :         GIR_Done,
   12900             :       // Label 909: @29834
   12901             :       GIM_Try, /*On fail goto*//*Label 910*/ 29904, // Rule ID 3776 //
   12902             :         GIM_CheckFeatures, GIFBS_HasLSE,
   12903             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   12904             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   12905             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   12906             :         // MIs[0] Rn
   12907             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   12908             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   12909             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   12910             :         // (atomic_load_and:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_and_32>><<P:Predicate_atomic_load_and_32_acq_rel>>  =>  (LDCLRALW:{ *:[i32] } (ORNWrr:{ *:[i32] } WZR:{ *:[i32] }, GPR32:{ *:[i32] }:$Rm), GPR64sp:{ *:[i64] }:$Rn)
   12911             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
   12912             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::ORNWrr,
   12913             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   12914             :         GIR_AddRegister, /*InsnID*/1, AArch64::WZR,
   12915             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   12916             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   12917             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDCLRALW,
   12918             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   12919             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   12920             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   12921             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   12922             :         GIR_EraseFromParent, /*InsnID*/0,
   12923             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   12924             :         // GIR_Coverage, 3776,
   12925             :         GIR_Done,
   12926             :       // Label 910: @29904
   12927             :       GIM_Try, /*On fail goto*//*Label 911*/ 29974, // Rule ID 3777 //
   12928             :         GIM_CheckFeatures, GIFBS_HasLSE,
   12929             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   12930             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   12931             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   12932             :         // MIs[0] Rn
   12933             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   12934             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   12935             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   12936             :         // (atomic_load_and:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_and_32>><<P:Predicate_atomic_load_and_32_seq_cst>>  =>  (LDCLRALW:{ *:[i32] } (ORNWrr:{ *:[i32] } WZR:{ *:[i32] }, GPR32:{ *:[i32] }:$Rm), GPR64sp:{ *:[i64] }:$Rn)
   12937             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
   12938             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::ORNWrr,
   12939             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   12940             :         GIR_AddRegister, /*InsnID*/1, AArch64::WZR,
   12941             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   12942             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   12943             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDCLRALW,
   12944             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   12945             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   12946             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   12947             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   12948             :         GIR_EraseFromParent, /*InsnID*/0,
   12949             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   12950             :         // GIR_Coverage, 3777,
   12951             :         GIR_Done,
   12952             :       // Label 911: @29974
   12953             :       GIM_Try, /*On fail goto*//*Label 912*/ 30044, // Rule ID 3778 //
   12954             :         GIM_CheckFeatures, GIFBS_HasLSE,
   12955             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   12956             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   12957             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   12958             :         // MIs[0] Rn
   12959             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   12960             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   12961             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   12962             :         // (atomic_load_and:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_and_16>><<P:Predicate_atomic_load_and_16_monotonic>>  =>  (LDCLRH:{ *:[i32] } (ORNWrr:{ *:[i32] } WZR:{ *:[i32] }, GPR32:{ *:[i32] }:$Rm), GPR64sp:{ *:[i64] }:$Rn)
   12963             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
   12964             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::ORNWrr,
   12965             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   12966             :         GIR_AddRegister, /*InsnID*/1, AArch64::WZR,
   12967             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   12968             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   12969             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDCLRH,
   12970             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   12971             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   12972             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   12973             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   12974             :         GIR_EraseFromParent, /*InsnID*/0,
   12975             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   12976             :         // GIR_Coverage, 3778,
   12977             :         GIR_Done,
   12978             :       // Label 912: @30044
   12979             :       GIM_Try, /*On fail goto*//*Label 913*/ 30114, // Rule ID 3779 //
   12980             :         GIM_CheckFeatures, GIFBS_HasLSE,
   12981             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   12982             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   12983             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   12984             :         // MIs[0] Rn
   12985             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   12986             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   12987             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   12988             :         // (atomic_load_and:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_and_16>><<P:Predicate_atomic_load_and_16_acquire>>  =>  (LDCLRAH:{ *:[i32] } (ORNWrr:{ *:[i32] } WZR:{ *:[i32] }, GPR32:{ *:[i32] }:$Rm), GPR64sp:{ *:[i64] }:$Rn)
   12989             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
   12990             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::ORNWrr,
   12991             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   12992             :         GIR_AddRegister, /*InsnID*/1, AArch64::WZR,
   12993             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   12994             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   12995             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDCLRAH,
   12996             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   12997             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   12998             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   12999             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13000             :         GIR_EraseFromParent, /*InsnID*/0,
   13001             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13002             :         // GIR_Coverage, 3779,
   13003             :         GIR_Done,
   13004             :       // Label 913: @30114
   13005             :       GIM_Try, /*On fail goto*//*Label 914*/ 30184, // Rule ID 3780 //
   13006             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13007             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   13008             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   13009             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   13010             :         // MIs[0] Rn
   13011             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13012             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13013             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   13014             :         // (atomic_load_and:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_and_16>><<P:Predicate_atomic_load_and_16_release>>  =>  (LDCLRLH:{ *:[i32] } (ORNWrr:{ *:[i32] } WZR:{ *:[i32] }, GPR32:{ *:[i32] }:$Rm), GPR64sp:{ *:[i64] }:$Rn)
   13015             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
   13016             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::ORNWrr,
   13017             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   13018             :         GIR_AddRegister, /*InsnID*/1, AArch64::WZR,
   13019             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13020             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   13021             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDCLRLH,
   13022             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13023             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   13024             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13025             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13026             :         GIR_EraseFromParent, /*InsnID*/0,
   13027             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13028             :         // GIR_Coverage, 3780,
   13029             :         GIR_Done,
   13030             :       // Label 914: @30184
   13031             :       GIM_Try, /*On fail goto*//*Label 915*/ 30254, // Rule ID 3781 //
   13032             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13033             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   13034             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   13035             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   13036             :         // MIs[0] Rn
   13037             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13038             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13039             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   13040             :         // (atomic_load_and:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_and_16>><<P:Predicate_atomic_load_and_16_acq_rel>>  =>  (LDCLRALH:{ *:[i32] } (ORNWrr:{ *:[i32] } WZR:{ *:[i32] }, GPR32:{ *:[i32] }:$Rm), GPR64sp:{ *:[i64] }:$Rn)
   13041             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
   13042             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::ORNWrr,
   13043             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   13044             :         GIR_AddRegister, /*InsnID*/1, AArch64::WZR,
   13045             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13046             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   13047             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDCLRALH,
   13048             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13049             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   13050             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13051             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13052             :         GIR_EraseFromParent, /*InsnID*/0,
   13053             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13054             :         // GIR_Coverage, 3781,
   13055             :         GIR_Done,
   13056             :       // Label 915: @30254
   13057             :       GIM_Try, /*On fail goto*//*Label 916*/ 30324, // Rule ID 3782 //
   13058             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13059             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   13060             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   13061             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   13062             :         // MIs[0] Rn
   13063             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13064             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13065             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   13066             :         // (atomic_load_and:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_and_16>><<P:Predicate_atomic_load_and_16_seq_cst>>  =>  (LDCLRALH:{ *:[i32] } (ORNWrr:{ *:[i32] } WZR:{ *:[i32] }, GPR32:{ *:[i32] }:$Rm), GPR64sp:{ *:[i64] }:$Rn)
   13067             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
   13068             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::ORNWrr,
   13069             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   13070             :         GIR_AddRegister, /*InsnID*/1, AArch64::WZR,
   13071             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13072             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   13073             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDCLRALH,
   13074             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13075             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   13076             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13077             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13078             :         GIR_EraseFromParent, /*InsnID*/0,
   13079             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13080             :         // GIR_Coverage, 3782,
   13081             :         GIR_Done,
   13082             :       // Label 916: @30324
   13083             :       GIM_Try, /*On fail goto*//*Label 917*/ 30394, // Rule ID 3783 //
   13084             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13085             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   13086             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   13087             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   13088             :         // MIs[0] Rn
   13089             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13090             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13091             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   13092             :         // (atomic_load_and:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_and_8>><<P:Predicate_atomic_load_and_8_monotonic>>  =>  (LDCLRB:{ *:[i32] } (ORNWrr:{ *:[i32] } WZR:{ *:[i32] }, GPR32:{ *:[i32] }:$Rm), GPR64sp:{ *:[i64] }:$Rn)
   13093             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
   13094             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::ORNWrr,
   13095             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   13096             :         GIR_AddRegister, /*InsnID*/1, AArch64::WZR,
   13097             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13098             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   13099             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDCLRB,
   13100             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13101             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   13102             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13103             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13104             :         GIR_EraseFromParent, /*InsnID*/0,
   13105             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13106             :         // GIR_Coverage, 3783,
   13107             :         GIR_Done,
   13108             :       // Label 917: @30394
   13109             :       GIM_Try, /*On fail goto*//*Label 918*/ 30464, // Rule ID 3784 //
   13110             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13111             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   13112             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   13113             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   13114             :         // MIs[0] Rn
   13115             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13116             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13117             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   13118             :         // (atomic_load_and:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_and_8>><<P:Predicate_atomic_load_and_8_acquire>>  =>  (LDCLRAB:{ *:[i32] } (ORNWrr:{ *:[i32] } WZR:{ *:[i32] }, GPR32:{ *:[i32] }:$Rm), GPR64sp:{ *:[i64] }:$Rn)
   13119             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
   13120             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::ORNWrr,
   13121             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   13122             :         GIR_AddRegister, /*InsnID*/1, AArch64::WZR,
   13123             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13124             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   13125             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDCLRAB,
   13126             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13127             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   13128             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13129             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13130             :         GIR_EraseFromParent, /*InsnID*/0,
   13131             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13132             :         // GIR_Coverage, 3784,
   13133             :         GIR_Done,
   13134             :       // Label 918: @30464
   13135             :       GIM_Try, /*On fail goto*//*Label 919*/ 30534, // Rule ID 3785 //
   13136             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13137             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   13138             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   13139             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   13140             :         // MIs[0] Rn
   13141             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13142             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13143             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   13144             :         // (atomic_load_and:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_and_8>><<P:Predicate_atomic_load_and_8_release>>  =>  (LDCLRLB:{ *:[i32] } (ORNWrr:{ *:[i32] } WZR:{ *:[i32] }, GPR32:{ *:[i32] }:$Rm), GPR64sp:{ *:[i64] }:$Rn)
   13145             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
   13146             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::ORNWrr,
   13147             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   13148             :         GIR_AddRegister, /*InsnID*/1, AArch64::WZR,
   13149             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13150             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   13151             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDCLRLB,
   13152             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13153             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   13154             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13155             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13156             :         GIR_EraseFromParent, /*InsnID*/0,
   13157             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13158             :         // GIR_Coverage, 3785,
   13159             :         GIR_Done,
   13160             :       // Label 919: @30534
   13161             :       GIM_Try, /*On fail goto*//*Label 920*/ 30604, // Rule ID 3786 //
   13162             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13163             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   13164             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   13165             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   13166             :         // MIs[0] Rn
   13167             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13168             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13169             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   13170             :         // (atomic_load_and:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_and_8>><<P:Predicate_atomic_load_and_8_acq_rel>>  =>  (LDCLRALB:{ *:[i32] } (ORNWrr:{ *:[i32] } WZR:{ *:[i32] }, GPR32:{ *:[i32] }:$Rm), GPR64sp:{ *:[i64] }:$Rn)
   13171             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
   13172             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::ORNWrr,
   13173             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   13174             :         GIR_AddRegister, /*InsnID*/1, AArch64::WZR,
   13175             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13176             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   13177             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDCLRALB,
   13178             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13179             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   13180             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13181             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13182             :         GIR_EraseFromParent, /*InsnID*/0,
   13183             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13184             :         // GIR_Coverage, 3786,
   13185             :         GIR_Done,
   13186             :       // Label 920: @30604
   13187             :       GIM_Try, /*On fail goto*//*Label 921*/ 30674, // Rule ID 3787 //
   13188             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13189             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   13190             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   13191             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   13192             :         // MIs[0] Rn
   13193             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13194             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13195             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   13196             :         // (atomic_load_and:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_and_8>><<P:Predicate_atomic_load_and_8_seq_cst>>  =>  (LDCLRALB:{ *:[i32] } (ORNWrr:{ *:[i32] } WZR:{ *:[i32] }, GPR32:{ *:[i32] }:$Rm), GPR64sp:{ *:[i64] }:$Rn)
   13197             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
   13198             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::ORNWrr,
   13199             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   13200             :         GIR_AddRegister, /*InsnID*/1, AArch64::WZR,
   13201             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13202             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   13203             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDCLRALB,
   13204             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13205             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   13206             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13207             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13208             :         GIR_EraseFromParent, /*InsnID*/0,
   13209             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13210             :         // GIR_Coverage, 3787,
   13211             :         GIR_Done,
   13212             :       // Label 921: @30674
   13213             :       GIM_Reject,
   13214             :     // Label 906: @30675
   13215             :     GIM_Reject,
   13216             :     // Label 904: @30676
   13217             :     GIM_Try, /*On fail goto*//*Label 922*/ 31017,
   13218             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   13219             :       GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/8,
   13220             :       GIM_Try, /*On fail goto*//*Label 923*/ 30752, // Rule ID 3768 //
   13221             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13222             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   13223             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   13224             :         // MIs[0] Rn
   13225             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13226             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13227             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   13228             :         // (atomic_load_and:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_and_64>><<P:Predicate_atomic_load_and_64_monotonic>>  =>  (LDCLRX:{ *:[i64] } (ORNXrr:{ *:[i64] } XZR:{ *:[i64] }, GPR64:{ *:[i64] }:$Rm), GPR64sp:{ *:[i64] }:$Rn)
   13229             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
   13230             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::ORNXrr,
   13231             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   13232             :         GIR_AddRegister, /*InsnID*/1, AArch64::XZR,
   13233             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13234             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   13235             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDCLRX,
   13236             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13237             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   13238             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13239             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13240             :         GIR_EraseFromParent, /*InsnID*/0,
   13241             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13242             :         // GIR_Coverage, 3768,
   13243             :         GIR_Done,
   13244             :       // Label 923: @30752
   13245             :       GIM_Try, /*On fail goto*//*Label 924*/ 30818, // Rule ID 3769 //
   13246             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13247             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   13248             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   13249             :         // MIs[0] Rn
   13250             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13251             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13252             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   13253             :         // (atomic_load_and:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_and_64>><<P:Predicate_atomic_load_and_64_acquire>>  =>  (LDCLRAX:{ *:[i64] } (ORNXrr:{ *:[i64] } XZR:{ *:[i64] }, GPR64:{ *:[i64] }:$Rm), GPR64sp:{ *:[i64] }:$Rn)
   13254             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
   13255             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::ORNXrr,
   13256             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   13257             :         GIR_AddRegister, /*InsnID*/1, AArch64::XZR,
   13258             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13259             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   13260             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDCLRAX,
   13261             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13262             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   13263             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13264             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13265             :         GIR_EraseFromParent, /*InsnID*/0,
   13266             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13267             :         // GIR_Coverage, 3769,
   13268             :         GIR_Done,
   13269             :       // Label 924: @30818
   13270             :       GIM_Try, /*On fail goto*//*Label 925*/ 30884, // Rule ID 3770 //
   13271             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13272             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   13273             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   13274             :         // MIs[0] Rn
   13275             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13276             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13277             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   13278             :         // (atomic_load_and:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_and_64>><<P:Predicate_atomic_load_and_64_release>>  =>  (LDCLRLX:{ *:[i64] } (ORNXrr:{ *:[i64] } XZR:{ *:[i64] }, GPR64:{ *:[i64] }:$Rm), GPR64sp:{ *:[i64] }:$Rn)
   13279             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
   13280             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::ORNXrr,
   13281             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   13282             :         GIR_AddRegister, /*InsnID*/1, AArch64::XZR,
   13283             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13284             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   13285             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDCLRLX,
   13286             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13287             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   13288             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13289             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13290             :         GIR_EraseFromParent, /*InsnID*/0,
   13291             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13292             :         // GIR_Coverage, 3770,
   13293             :         GIR_Done,
   13294             :       // Label 925: @30884
   13295             :       GIM_Try, /*On fail goto*//*Label 926*/ 30950, // Rule ID 3771 //
   13296             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13297             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   13298             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   13299             :         // MIs[0] Rn
   13300             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13301             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13302             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   13303             :         // (atomic_load_and:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_and_64>><<P:Predicate_atomic_load_and_64_acq_rel>>  =>  (LDCLRALX:{ *:[i64] } (ORNXrr:{ *:[i64] } XZR:{ *:[i64] }, GPR64:{ *:[i64] }:$Rm), GPR64sp:{ *:[i64] }:$Rn)
   13304             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
   13305             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::ORNXrr,
   13306             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   13307             :         GIR_AddRegister, /*InsnID*/1, AArch64::XZR,
   13308             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13309             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   13310             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDCLRALX,
   13311             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13312             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   13313             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13314             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13315             :         GIR_EraseFromParent, /*InsnID*/0,
   13316             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13317             :         // GIR_Coverage, 3771,
   13318             :         GIR_Done,
   13319             :       // Label 926: @30950
   13320             :       GIM_Try, /*On fail goto*//*Label 927*/ 31016, // Rule ID 3772 //
   13321             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13322             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   13323             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   13324             :         // MIs[0] Rn
   13325             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13326             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13327             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   13328             :         // (atomic_load_and:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_and_64>><<P:Predicate_atomic_load_and_64_seq_cst>>  =>  (LDCLRALX:{ *:[i64] } (ORNXrr:{ *:[i64] } XZR:{ *:[i64] }, GPR64:{ *:[i64] }:$Rm), GPR64sp:{ *:[i64] }:$Rn)
   13329             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
   13330             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::ORNXrr,
   13331             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   13332             :         GIR_AddRegister, /*InsnID*/1, AArch64::XZR,
   13333             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13334             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   13335             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDCLRALX,
   13336             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13337             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   13338             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13339             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13340             :         GIR_EraseFromParent, /*InsnID*/0,
   13341             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13342             :         // GIR_Coverage, 3772,
   13343             :         GIR_Done,
   13344             :       // Label 927: @31016
   13345             :       GIM_Reject,
   13346             :     // Label 922: @31017
   13347             :     GIM_Reject,
   13348             :     // Label 905: @31018
   13349             :     GIM_Reject,
   13350             :     // Label 18: @31019
   13351             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 3, /*)*//*default:*//*Label 930*/ 32047,
   13352             :     /*GILLT_s32*//*Label 928*/ 31027,
   13353             :     /*GILLT_s64*//*Label 929*/ 31800,
   13354             :     // Label 928: @31027
   13355             :     GIM_Try, /*On fail goto*//*Label 931*/ 31799,
   13356             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   13357             :       GIM_Try, /*On fail goto*//*Label 932*/ 31084, // Rule ID 3578 //
   13358             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13359             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   13360             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   13361             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   13362             :         // MIs[0] Rn
   13363             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13364             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13365             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   13366             :         // (atomic_load_or:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_or_32>><<P:Predicate_atomic_load_or_32_monotonic>>  =>  (LDSETW:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   13367             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSETW,
   13368             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13369             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13370             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13371             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13372             :         GIR_EraseFromParent, /*InsnID*/0,
   13373             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13374             :         // GIR_Coverage, 3578,
   13375             :         GIR_Done,
   13376             :       // Label 932: @31084
   13377             :       GIM_Try, /*On fail goto*//*Label 933*/ 31135, // Rule ID 3579 //
   13378             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13379             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   13380             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   13381             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   13382             :         // MIs[0] Rn
   13383             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13384             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13385             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   13386             :         // (atomic_load_or:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_or_32>><<P:Predicate_atomic_load_or_32_acquire>>  =>  (LDSETAW:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   13387             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSETAW,
   13388             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13389             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13390             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13391             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13392             :         GIR_EraseFromParent, /*InsnID*/0,
   13393             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13394             :         // GIR_Coverage, 3579,
   13395             :         GIR_Done,
   13396             :       // Label 933: @31135
   13397             :       GIM_Try, /*On fail goto*//*Label 934*/ 31186, // Rule ID 3580 //
   13398             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13399             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   13400             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   13401             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   13402             :         // MIs[0] Rn
   13403             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13404             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13405             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   13406             :         // (atomic_load_or:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_or_32>><<P:Predicate_atomic_load_or_32_release>>  =>  (LDSETLW:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   13407             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSETLW,
   13408             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13409             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13410             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13411             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13412             :         GIR_EraseFromParent, /*InsnID*/0,
   13413             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13414             :         // GIR_Coverage, 3580,
   13415             :         GIR_Done,
   13416             :       // Label 934: @31186
   13417             :       GIM_Try, /*On fail goto*//*Label 935*/ 31237, // Rule ID 3581 //
   13418             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13419             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   13420             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   13421             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   13422             :         // MIs[0] Rn
   13423             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13424             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13425             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   13426             :         // (atomic_load_or:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_or_32>><<P:Predicate_atomic_load_or_32_acq_rel>>  =>  (LDSETALW:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   13427             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSETALW,
   13428             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13429             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13430             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13431             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13432             :         GIR_EraseFromParent, /*InsnID*/0,
   13433             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13434             :         // GIR_Coverage, 3581,
   13435             :         GIR_Done,
   13436             :       // Label 935: @31237
   13437             :       GIM_Try, /*On fail goto*//*Label 936*/ 31288, // Rule ID 3582 //
   13438             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13439             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   13440             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   13441             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   13442             :         // MIs[0] Rn
   13443             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13444             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13445             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   13446             :         // (atomic_load_or:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_or_32>><<P:Predicate_atomic_load_or_32_seq_cst>>  =>  (LDSETALW:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   13447             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSETALW,
   13448             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13449             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13450             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13451             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13452             :         GIR_EraseFromParent, /*InsnID*/0,
   13453             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13454             :         // GIR_Coverage, 3582,
   13455             :         GIR_Done,
   13456             :       // Label 936: @31288
   13457             :       GIM_Try, /*On fail goto*//*Label 937*/ 31339, // Rule ID 3583 //
   13458             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13459             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   13460             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   13461             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   13462             :         // MIs[0] Rn
   13463             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13464             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13465             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   13466             :         // (atomic_load_or:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_or_16>><<P:Predicate_atomic_load_or_16_monotonic>>  =>  (LDSETH:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   13467             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSETH,
   13468             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13469             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13470             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13471             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13472             :         GIR_EraseFromParent, /*InsnID*/0,
   13473             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13474             :         // GIR_Coverage, 3583,
   13475             :         GIR_Done,
   13476             :       // Label 937: @31339
   13477             :       GIM_Try, /*On fail goto*//*Label 938*/ 31390, // Rule ID 3584 //
   13478             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13479             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   13480             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   13481             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   13482             :         // MIs[0] Rn
   13483             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13484             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13485             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   13486             :         // (atomic_load_or:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_or_16>><<P:Predicate_atomic_load_or_16_acquire>>  =>  (LDSETAH:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   13487             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSETAH,
   13488             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13489             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13490             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13491             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13492             :         GIR_EraseFromParent, /*InsnID*/0,
   13493             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13494             :         // GIR_Coverage, 3584,
   13495             :         GIR_Done,
   13496             :       // Label 938: @31390
   13497             :       GIM_Try, /*On fail goto*//*Label 939*/ 31441, // Rule ID 3585 //
   13498             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13499             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   13500             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   13501             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   13502             :         // MIs[0] Rn
   13503             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13504             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13505             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   13506             :         // (atomic_load_or:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_or_16>><<P:Predicate_atomic_load_or_16_release>>  =>  (LDSETLH:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   13507             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSETLH,
   13508             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13509             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13510             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13511             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13512             :         GIR_EraseFromParent, /*InsnID*/0,
   13513             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13514             :         // GIR_Coverage, 3585,
   13515             :         GIR_Done,
   13516             :       // Label 939: @31441
   13517             :       GIM_Try, /*On fail goto*//*Label 940*/ 31492, // Rule ID 3586 //
   13518             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13519             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   13520             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   13521             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   13522             :         // MIs[0] Rn
   13523             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13524             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13525             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   13526             :         // (atomic_load_or:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_or_16>><<P:Predicate_atomic_load_or_16_acq_rel>>  =>  (LDSETALH:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   13527             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSETALH,
   13528             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13529             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13530             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13531             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13532             :         GIR_EraseFromParent, /*InsnID*/0,
   13533             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13534             :         // GIR_Coverage, 3586,
   13535             :         GIR_Done,
   13536             :       // Label 940: @31492
   13537             :       GIM_Try, /*On fail goto*//*Label 941*/ 31543, // Rule ID 3587 //
   13538             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13539             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   13540             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   13541             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   13542             :         // MIs[0] Rn
   13543             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13544             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13545             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   13546             :         // (atomic_load_or:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_or_16>><<P:Predicate_atomic_load_or_16_seq_cst>>  =>  (LDSETALH:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   13547             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSETALH,
   13548             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13549             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13550             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13551             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13552             :         GIR_EraseFromParent, /*InsnID*/0,
   13553             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13554             :         // GIR_Coverage, 3587,
   13555             :         GIR_Done,
   13556             :       // Label 941: @31543
   13557             :       GIM_Try, /*On fail goto*//*Label 942*/ 31594, // Rule ID 3588 //
   13558             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13559             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   13560             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   13561             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   13562             :         // MIs[0] Rn
   13563             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13564             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13565             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   13566             :         // (atomic_load_or:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_or_8>><<P:Predicate_atomic_load_or_8_monotonic>>  =>  (LDSETB:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   13567             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSETB,
   13568             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13569             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13570             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13571             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13572             :         GIR_EraseFromParent, /*InsnID*/0,
   13573             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13574             :         // GIR_Coverage, 3588,
   13575             :         GIR_Done,
   13576             :       // Label 942: @31594
   13577             :       GIM_Try, /*On fail goto*//*Label 943*/ 31645, // Rule ID 3589 //
   13578             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13579             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   13580             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   13581             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   13582             :         // MIs[0] Rn
   13583             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13584             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13585             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   13586             :         // (atomic_load_or:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_or_8>><<P:Predicate_atomic_load_or_8_acquire>>  =>  (LDSETAB:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   13587             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSETAB,
   13588             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13589             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13590             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13591             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13592             :         GIR_EraseFromParent, /*InsnID*/0,
   13593             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13594             :         // GIR_Coverage, 3589,
   13595             :         GIR_Done,
   13596             :       // Label 943: @31645
   13597             :       GIM_Try, /*On fail goto*//*Label 944*/ 31696, // Rule ID 3590 //
   13598             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13599             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   13600             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   13601             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   13602             :         // MIs[0] Rn
   13603             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13604             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13605             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   13606             :         // (atomic_load_or:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_or_8>><<P:Predicate_atomic_load_or_8_release>>  =>  (LDSETLB:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   13607             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSETLB,
   13608             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13609             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13610             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13611             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13612             :         GIR_EraseFromParent, /*InsnID*/0,
   13613             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13614             :         // GIR_Coverage, 3590,
   13615             :         GIR_Done,
   13616             :       // Label 944: @31696
   13617             :       GIM_Try, /*On fail goto*//*Label 945*/ 31747, // Rule ID 3591 //
   13618             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13619             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   13620             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   13621             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   13622             :         // MIs[0] Rn
   13623             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13624             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13625             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   13626             :         // (atomic_load_or:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_or_8>><<P:Predicate_atomic_load_or_8_acq_rel>>  =>  (LDSETALB:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   13627             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSETALB,
   13628             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13629             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13630             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13631             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13632             :         GIR_EraseFromParent, /*InsnID*/0,
   13633             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13634             :         // GIR_Coverage, 3591,
   13635             :         GIR_Done,
   13636             :       // Label 945: @31747
   13637             :       GIM_Try, /*On fail goto*//*Label 946*/ 31798, // Rule ID 3592 //
   13638             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13639             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   13640             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   13641             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   13642             :         // MIs[0] Rn
   13643             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13644             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13645             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   13646             :         // (atomic_load_or:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_or_8>><<P:Predicate_atomic_load_or_8_seq_cst>>  =>  (LDSETALB:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   13647             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSETALB,
   13648             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13649             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13650             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13651             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13652             :         GIR_EraseFromParent, /*InsnID*/0,
   13653             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13654             :         // GIR_Coverage, 3592,
   13655             :         GIR_Done,
   13656             :       // Label 946: @31798
   13657             :       GIM_Reject,
   13658             :     // Label 931: @31799
   13659             :     GIM_Reject,
   13660             :     // Label 929: @31800
   13661             :     GIM_Try, /*On fail goto*//*Label 947*/ 32046,
   13662             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   13663             :       GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/8,
   13664             :       GIM_Try, /*On fail goto*//*Label 948*/ 31857, // Rule ID 3573 //
   13665             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13666             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   13667             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   13668             :         // MIs[0] Rn
   13669             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13670             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13671             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   13672             :         // (atomic_load_or:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_or_64>><<P:Predicate_atomic_load_or_64_monotonic>>  =>  (LDSETX:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   13673             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSETX,
   13674             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13675             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13676             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13677             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13678             :         GIR_EraseFromParent, /*InsnID*/0,
   13679             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13680             :         // GIR_Coverage, 3573,
   13681             :         GIR_Done,
   13682             :       // Label 948: @31857
   13683             :       GIM_Try, /*On fail goto*//*Label 949*/ 31904, // Rule ID 3574 //
   13684             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13685             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   13686             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   13687             :         // MIs[0] Rn
   13688             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13689             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13690             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   13691             :         // (atomic_load_or:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_or_64>><<P:Predicate_atomic_load_or_64_acquire>>  =>  (LDSETAX:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   13692             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSETAX,
   13693             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13694             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13695             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13696             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13697             :         GIR_EraseFromParent, /*InsnID*/0,
   13698             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13699             :         // GIR_Coverage, 3574,
   13700             :         GIR_Done,
   13701             :       // Label 949: @31904
   13702             :       GIM_Try, /*On fail goto*//*Label 950*/ 31951, // Rule ID 3575 //
   13703             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13704             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   13705             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   13706             :         // MIs[0] Rn
   13707             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13708             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13709             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   13710             :         // (atomic_load_or:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_or_64>><<P:Predicate_atomic_load_or_64_release>>  =>  (LDSETLX:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   13711             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSETLX,
   13712             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13713             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13714             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13715             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13716             :         GIR_EraseFromParent, /*InsnID*/0,
   13717             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13718             :         // GIR_Coverage, 3575,
   13719             :         GIR_Done,
   13720             :       // Label 950: @31951
   13721             :       GIM_Try, /*On fail goto*//*Label 951*/ 31998, // Rule ID 3576 //
   13722             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13723             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   13724             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   13725             :         // MIs[0] Rn
   13726             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13727             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13728             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   13729             :         // (atomic_load_or:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_or_64>><<P:Predicate_atomic_load_or_64_acq_rel>>  =>  (LDSETALX:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   13730             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSETALX,
   13731             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13732             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13733             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13734             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13735             :         GIR_EraseFromParent, /*InsnID*/0,
   13736             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13737             :         // GIR_Coverage, 3576,
   13738             :         GIR_Done,
   13739             :       // Label 951: @31998
   13740             :       GIM_Try, /*On fail goto*//*Label 952*/ 32045, // Rule ID 3577 //
   13741             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13742             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   13743             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   13744             :         // MIs[0] Rn
   13745             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13746             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13747             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   13748             :         // (atomic_load_or:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_or_64>><<P:Predicate_atomic_load_or_64_seq_cst>>  =>  (LDSETALX:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   13749             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSETALX,
   13750             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13751             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13752             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13753             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13754             :         GIR_EraseFromParent, /*InsnID*/0,
   13755             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13756             :         // GIR_Coverage, 3577,
   13757             :         GIR_Done,
   13758             :       // Label 952: @32045
   13759             :       GIM_Reject,
   13760             :     // Label 947: @32046
   13761             :     GIM_Reject,
   13762             :     // Label 930: @32047
   13763             :     GIM_Reject,
   13764             :     // Label 19: @32048
   13765             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 3, /*)*//*default:*//*Label 955*/ 33076,
   13766             :     /*GILLT_s32*//*Label 953*/ 32056,
   13767             :     /*GILLT_s64*//*Label 954*/ 32829,
   13768             :     // Label 953: @32056
   13769             :     GIM_Try, /*On fail goto*//*Label 956*/ 32828,
   13770             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   13771             :       GIM_Try, /*On fail goto*//*Label 957*/ 32113, // Rule ID 3598 //
   13772             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13773             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   13774             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   13775             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   13776             :         // MIs[0] Rn
   13777             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13778             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13779             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   13780             :         // (atomic_load_xor:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_xor_32>><<P:Predicate_atomic_load_xor_32_monotonic>>  =>  (LDEORW:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   13781             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDEORW,
   13782             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13783             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13784             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13785             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13786             :         GIR_EraseFromParent, /*InsnID*/0,
   13787             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13788             :         // GIR_Coverage, 3598,
   13789             :         GIR_Done,
   13790             :       // Label 957: @32113
   13791             :       GIM_Try, /*On fail goto*//*Label 958*/ 32164, // Rule ID 3599 //
   13792             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13793             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   13794             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   13795             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   13796             :         // MIs[0] Rn
   13797             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13798             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13799             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   13800             :         // (atomic_load_xor:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_xor_32>><<P:Predicate_atomic_load_xor_32_acquire>>  =>  (LDEORAW:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   13801             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDEORAW,
   13802             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13803             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13804             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13805             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13806             :         GIR_EraseFromParent, /*InsnID*/0,
   13807             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13808             :         // GIR_Coverage, 3599,
   13809             :         GIR_Done,
   13810             :       // Label 958: @32164
   13811             :       GIM_Try, /*On fail goto*//*Label 959*/ 32215, // Rule ID 3600 //
   13812             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13813             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   13814             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   13815             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   13816             :         // MIs[0] Rn
   13817             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13818             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13819             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   13820             :         // (atomic_load_xor:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_xor_32>><<P:Predicate_atomic_load_xor_32_release>>  =>  (LDEORLW:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   13821             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDEORLW,
   13822             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13823             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13824             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13825             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13826             :         GIR_EraseFromParent, /*InsnID*/0,
   13827             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13828             :         // GIR_Coverage, 3600,
   13829             :         GIR_Done,
   13830             :       // Label 959: @32215
   13831             :       GIM_Try, /*On fail goto*//*Label 960*/ 32266, // Rule ID 3601 //
   13832             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13833             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   13834             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   13835             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   13836             :         // MIs[0] Rn
   13837             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13838             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13839             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   13840             :         // (atomic_load_xor:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_xor_32>><<P:Predicate_atomic_load_xor_32_acq_rel>>  =>  (LDEORALW:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   13841             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDEORALW,
   13842             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13843             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13844             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13845             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13846             :         GIR_EraseFromParent, /*InsnID*/0,
   13847             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13848             :         // GIR_Coverage, 3601,
   13849             :         GIR_Done,
   13850             :       // Label 960: @32266
   13851             :       GIM_Try, /*On fail goto*//*Label 961*/ 32317, // Rule ID 3602 //
   13852             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13853             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   13854             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   13855             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   13856             :         // MIs[0] Rn
   13857             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13858             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13859             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   13860             :         // (atomic_load_xor:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_xor_32>><<P:Predicate_atomic_load_xor_32_seq_cst>>  =>  (LDEORALW:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   13861             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDEORALW,
   13862             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13863             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13864             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13865             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13866             :         GIR_EraseFromParent, /*InsnID*/0,
   13867             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13868             :         // GIR_Coverage, 3602,
   13869             :         GIR_Done,
   13870             :       // Label 961: @32317
   13871             :       GIM_Try, /*On fail goto*//*Label 962*/ 32368, // Rule ID 3603 //
   13872             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13873             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   13874             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   13875             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   13876             :         // MIs[0] Rn
   13877             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13878             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13879             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   13880             :         // (atomic_load_xor:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_xor_16>><<P:Predicate_atomic_load_xor_16_monotonic>>  =>  (LDEORH:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   13881             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDEORH,
   13882             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13883             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13884             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13885             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13886             :         GIR_EraseFromParent, /*InsnID*/0,
   13887             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13888             :         // GIR_Coverage, 3603,
   13889             :         GIR_Done,
   13890             :       // Label 962: @32368
   13891             :       GIM_Try, /*On fail goto*//*Label 963*/ 32419, // Rule ID 3604 //
   13892             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13893             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   13894             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   13895             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   13896             :         // MIs[0] Rn
   13897             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13898             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13899             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   13900             :         // (atomic_load_xor:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_xor_16>><<P:Predicate_atomic_load_xor_16_acquire>>  =>  (LDEORAH:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   13901             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDEORAH,
   13902             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13903             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13904             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13905             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13906             :         GIR_EraseFromParent, /*InsnID*/0,
   13907             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13908             :         // GIR_Coverage, 3604,
   13909             :         GIR_Done,
   13910             :       // Label 963: @32419
   13911             :       GIM_Try, /*On fail goto*//*Label 964*/ 32470, // Rule ID 3605 //
   13912             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13913             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   13914             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   13915             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   13916             :         // MIs[0] Rn
   13917             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13918             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13919             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   13920             :         // (atomic_load_xor:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_xor_16>><<P:Predicate_atomic_load_xor_16_release>>  =>  (LDEORLH:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   13921             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDEORLH,
   13922             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13923             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13924             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13925             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13926             :         GIR_EraseFromParent, /*InsnID*/0,
   13927             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13928             :         // GIR_Coverage, 3605,
   13929             :         GIR_Done,
   13930             :       // Label 964: @32470
   13931             :       GIM_Try, /*On fail goto*//*Label 965*/ 32521, // Rule ID 3606 //
   13932             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13933             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   13934             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   13935             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   13936             :         // MIs[0] Rn
   13937             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13938             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13939             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   13940             :         // (atomic_load_xor:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_xor_16>><<P:Predicate_atomic_load_xor_16_acq_rel>>  =>  (LDEORALH:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   13941             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDEORALH,
   13942             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13943             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13944             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13945             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13946             :         GIR_EraseFromParent, /*InsnID*/0,
   13947             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13948             :         // GIR_Coverage, 3606,
   13949             :         GIR_Done,
   13950             :       // Label 965: @32521
   13951             :       GIM_Try, /*On fail goto*//*Label 966*/ 32572, // Rule ID 3607 //
   13952             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13953             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   13954             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   13955             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   13956             :         // MIs[0] Rn
   13957             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13958             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13959             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   13960             :         // (atomic_load_xor:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_xor_16>><<P:Predicate_atomic_load_xor_16_seq_cst>>  =>  (LDEORALH:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   13961             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDEORALH,
   13962             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13963             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13964             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13965             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13966             :         GIR_EraseFromParent, /*InsnID*/0,
   13967             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13968             :         // GIR_Coverage, 3607,
   13969             :         GIR_Done,
   13970             :       // Label 966: @32572
   13971             :       GIM_Try, /*On fail goto*//*Label 967*/ 32623, // Rule ID 3608 //
   13972             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13973             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   13974             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   13975             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   13976             :         // MIs[0] Rn
   13977             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13978             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13979             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   13980             :         // (atomic_load_xor:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_xor_8>><<P:Predicate_atomic_load_xor_8_monotonic>>  =>  (LDEORB:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   13981             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDEORB,
   13982             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   13983             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   13984             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   13985             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   13986             :         GIR_EraseFromParent, /*InsnID*/0,
   13987             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   13988             :         // GIR_Coverage, 3608,
   13989             :         GIR_Done,
   13990             :       // Label 967: @32623
   13991             :       GIM_Try, /*On fail goto*//*Label 968*/ 32674, // Rule ID 3609 //
   13992             :         GIM_CheckFeatures, GIFBS_HasLSE,
   13993             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   13994             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   13995             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   13996             :         // MIs[0] Rn
   13997             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   13998             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   13999             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   14000             :         // (atomic_load_xor:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_xor_8>><<P:Predicate_atomic_load_xor_8_acquire>>  =>  (LDEORAB:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14001             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDEORAB,
   14002             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14003             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14004             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14005             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14006             :         GIR_EraseFromParent, /*InsnID*/0,
   14007             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14008             :         // GIR_Coverage, 3609,
   14009             :         GIR_Done,
   14010             :       // Label 968: @32674
   14011             :       GIM_Try, /*On fail goto*//*Label 969*/ 32725, // Rule ID 3610 //
   14012             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14013             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   14014             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   14015             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   14016             :         // MIs[0] Rn
   14017             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14018             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14019             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   14020             :         // (atomic_load_xor:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_xor_8>><<P:Predicate_atomic_load_xor_8_release>>  =>  (LDEORLB:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14021             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDEORLB,
   14022             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14023             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14024             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14025             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14026             :         GIR_EraseFromParent, /*InsnID*/0,
   14027             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14028             :         // GIR_Coverage, 3610,
   14029             :         GIR_Done,
   14030             :       // Label 969: @32725
   14031             :       GIM_Try, /*On fail goto*//*Label 970*/ 32776, // Rule ID 3611 //
   14032             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14033             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   14034             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   14035             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   14036             :         // MIs[0] Rn
   14037             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14038             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14039             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   14040             :         // (atomic_load_xor:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_xor_8>><<P:Predicate_atomic_load_xor_8_acq_rel>>  =>  (LDEORALB:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14041             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDEORALB,
   14042             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14043             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14044             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14045             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14046             :         GIR_EraseFromParent, /*InsnID*/0,
   14047             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14048             :         // GIR_Coverage, 3611,
   14049             :         GIR_Done,
   14050             :       // Label 970: @32776
   14051             :       GIM_Try, /*On fail goto*//*Label 971*/ 32827, // Rule ID 3612 //
   14052             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14053             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   14054             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   14055             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   14056             :         // MIs[0] Rn
   14057             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14058             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14059             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   14060             :         // (atomic_load_xor:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_xor_8>><<P:Predicate_atomic_load_xor_8_seq_cst>>  =>  (LDEORALB:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14061             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDEORALB,
   14062             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14063             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14064             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14065             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14066             :         GIR_EraseFromParent, /*InsnID*/0,
   14067             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14068             :         // GIR_Coverage, 3612,
   14069             :         GIR_Done,
   14070             :       // Label 971: @32827
   14071             :       GIM_Reject,
   14072             :     // Label 956: @32828
   14073             :     GIM_Reject,
   14074             :     // Label 954: @32829
   14075             :     GIM_Try, /*On fail goto*//*Label 972*/ 33075,
   14076             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   14077             :       GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/8,
   14078             :       GIM_Try, /*On fail goto*//*Label 973*/ 32886, // Rule ID 3593 //
   14079             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14080             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   14081             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   14082             :         // MIs[0] Rn
   14083             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14084             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14085             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   14086             :         // (atomic_load_xor:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_xor_64>><<P:Predicate_atomic_load_xor_64_monotonic>>  =>  (LDEORX:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14087             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDEORX,
   14088             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14089             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14090             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14091             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14092             :         GIR_EraseFromParent, /*InsnID*/0,
   14093             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14094             :         // GIR_Coverage, 3593,
   14095             :         GIR_Done,
   14096             :       // Label 973: @32886
   14097             :       GIM_Try, /*On fail goto*//*Label 974*/ 32933, // Rule ID 3594 //
   14098             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14099             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   14100             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   14101             :         // MIs[0] Rn
   14102             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14103             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14104             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   14105             :         // (atomic_load_xor:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_xor_64>><<P:Predicate_atomic_load_xor_64_acquire>>  =>  (LDEORAX:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14106             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDEORAX,
   14107             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14108             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14109             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14110             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14111             :         GIR_EraseFromParent, /*InsnID*/0,
   14112             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14113             :         // GIR_Coverage, 3594,
   14114             :         GIR_Done,
   14115             :       // Label 974: @32933
   14116             :       GIM_Try, /*On fail goto*//*Label 975*/ 32980, // Rule ID 3595 //
   14117             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14118             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   14119             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   14120             :         // MIs[0] Rn
   14121             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14122             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14123             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   14124             :         // (atomic_load_xor:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_xor_64>><<P:Predicate_atomic_load_xor_64_release>>  =>  (LDEORLX:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14125             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDEORLX,
   14126             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14127             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14128             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14129             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14130             :         GIR_EraseFromParent, /*InsnID*/0,
   14131             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14132             :         // GIR_Coverage, 3595,
   14133             :         GIR_Done,
   14134             :       // Label 975: @32980
   14135             :       GIM_Try, /*On fail goto*//*Label 976*/ 33027, // Rule ID 3596 //
   14136             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14137             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   14138             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   14139             :         // MIs[0] Rn
   14140             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14141             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14142             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   14143             :         // (atomic_load_xor:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_xor_64>><<P:Predicate_atomic_load_xor_64_acq_rel>>  =>  (LDEORALX:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14144             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDEORALX,
   14145             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14146             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14147             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14148             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14149             :         GIR_EraseFromParent, /*InsnID*/0,
   14150             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14151             :         // GIR_Coverage, 3596,
   14152             :         GIR_Done,
   14153             :       // Label 976: @33027
   14154             :       GIM_Try, /*On fail goto*//*Label 977*/ 33074, // Rule ID 3597 //
   14155             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14156             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   14157             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   14158             :         // MIs[0] Rn
   14159             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14160             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14161             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   14162             :         // (atomic_load_xor:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_xor_64>><<P:Predicate_atomic_load_xor_64_seq_cst>>  =>  (LDEORALX:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14163             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDEORALX,
   14164             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14165             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14166             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14167             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14168             :         GIR_EraseFromParent, /*InsnID*/0,
   14169             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14170             :         // GIR_Coverage, 3597,
   14171             :         GIR_Done,
   14172             :       // Label 977: @33074
   14173             :       GIM_Reject,
   14174             :     // Label 972: @33075
   14175             :     GIM_Reject,
   14176             :     // Label 955: @33076
   14177             :     GIM_Reject,
   14178             :     // Label 20: @33077
   14179             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 3, /*)*//*default:*//*Label 980*/ 34105,
   14180             :     /*GILLT_s32*//*Label 978*/ 33085,
   14181             :     /*GILLT_s64*//*Label 979*/ 33858,
   14182             :     // Label 978: @33085
   14183             :     GIM_Try, /*On fail goto*//*Label 981*/ 33857,
   14184             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   14185             :       GIM_Try, /*On fail goto*//*Label 982*/ 33142, // Rule ID 3638 //
   14186             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14187             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   14188             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   14189             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   14190             :         // MIs[0] Rn
   14191             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14192             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14193             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   14194             :         // (atomic_load_max:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_max_32>><<P:Predicate_atomic_load_max_32_monotonic>>  =>  (LDSMAXW:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14195             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSMAXW,
   14196             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14197             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14198             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14199             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14200             :         GIR_EraseFromParent, /*InsnID*/0,
   14201             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14202             :         // GIR_Coverage, 3638,
   14203             :         GIR_Done,
   14204             :       // Label 982: @33142
   14205             :       GIM_Try, /*On fail goto*//*Label 983*/ 33193, // Rule ID 3639 //
   14206             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14207             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   14208             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   14209             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   14210             :         // MIs[0] Rn
   14211             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14212             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14213             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   14214             :         // (atomic_load_max:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_max_32>><<P:Predicate_atomic_load_max_32_acquire>>  =>  (LDSMAXAW:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14215             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSMAXAW,
   14216             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14217             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14218             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14219             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14220             :         GIR_EraseFromParent, /*InsnID*/0,
   14221             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14222             :         // GIR_Coverage, 3639,
   14223             :         GIR_Done,
   14224             :       // Label 983: @33193
   14225             :       GIM_Try, /*On fail goto*//*Label 984*/ 33244, // Rule ID 3640 //
   14226             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14227             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   14228             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   14229             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   14230             :         // MIs[0] Rn
   14231             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14232             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14233             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   14234             :         // (atomic_load_max:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_max_32>><<P:Predicate_atomic_load_max_32_release>>  =>  (LDSMAXLW:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14235             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSMAXLW,
   14236             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14237             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14238             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14239             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14240             :         GIR_EraseFromParent, /*InsnID*/0,
   14241             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14242             :         // GIR_Coverage, 3640,
   14243             :         GIR_Done,
   14244             :       // Label 984: @33244
   14245             :       GIM_Try, /*On fail goto*//*Label 985*/ 33295, // Rule ID 3641 //
   14246             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14247             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   14248             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   14249             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   14250             :         // MIs[0] Rn
   14251             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14252             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14253             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   14254             :         // (atomic_load_max:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_max_32>><<P:Predicate_atomic_load_max_32_acq_rel>>  =>  (LDSMAXALW:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14255             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSMAXALW,
   14256             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14257             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14258             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14259             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14260             :         GIR_EraseFromParent, /*InsnID*/0,
   14261             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14262             :         // GIR_Coverage, 3641,
   14263             :         GIR_Done,
   14264             :       // Label 985: @33295
   14265             :       GIM_Try, /*On fail goto*//*Label 986*/ 33346, // Rule ID 3642 //
   14266             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14267             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   14268             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   14269             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   14270             :         // MIs[0] Rn
   14271             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14272             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14273             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   14274             :         // (atomic_load_max:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_max_32>><<P:Predicate_atomic_load_max_32_seq_cst>>  =>  (LDSMAXALW:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14275             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSMAXALW,
   14276             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14277             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14278             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14279             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14280             :         GIR_EraseFromParent, /*InsnID*/0,
   14281             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14282             :         // GIR_Coverage, 3642,
   14283             :         GIR_Done,
   14284             :       // Label 986: @33346
   14285             :       GIM_Try, /*On fail goto*//*Label 987*/ 33397, // Rule ID 3643 //
   14286             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14287             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   14288             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   14289             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   14290             :         // MIs[0] Rn
   14291             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14292             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14293             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   14294             :         // (atomic_load_max:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_max_16>><<P:Predicate_atomic_load_max_16_monotonic>>  =>  (LDSMAXH:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14295             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSMAXH,
   14296             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14297             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14298             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14299             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14300             :         GIR_EraseFromParent, /*InsnID*/0,
   14301             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14302             :         // GIR_Coverage, 3643,
   14303             :         GIR_Done,
   14304             :       // Label 987: @33397
   14305             :       GIM_Try, /*On fail goto*//*Label 988*/ 33448, // Rule ID 3644 //
   14306             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14307             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   14308             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   14309             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   14310             :         // MIs[0] Rn
   14311             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14312             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14313             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   14314             :         // (atomic_load_max:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_max_16>><<P:Predicate_atomic_load_max_16_acquire>>  =>  (LDSMAXAH:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14315             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSMAXAH,
   14316             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14317             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14318             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14319             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14320             :         GIR_EraseFromParent, /*InsnID*/0,
   14321             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14322             :         // GIR_Coverage, 3644,
   14323             :         GIR_Done,
   14324             :       // Label 988: @33448
   14325             :       GIM_Try, /*On fail goto*//*Label 989*/ 33499, // Rule ID 3645 //
   14326             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14327             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   14328             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   14329             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   14330             :         // MIs[0] Rn
   14331             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14332             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14333             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   14334             :         // (atomic_load_max:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_max_16>><<P:Predicate_atomic_load_max_16_release>>  =>  (LDSMAXLH:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14335             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSMAXLH,
   14336             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14337             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14338             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14339             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14340             :         GIR_EraseFromParent, /*InsnID*/0,
   14341             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14342             :         // GIR_Coverage, 3645,
   14343             :         GIR_Done,
   14344             :       // Label 989: @33499
   14345             :       GIM_Try, /*On fail goto*//*Label 990*/ 33550, // Rule ID 3646 //
   14346             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14347             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   14348             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   14349             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   14350             :         // MIs[0] Rn
   14351             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14352             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14353             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   14354             :         // (atomic_load_max:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_max_16>><<P:Predicate_atomic_load_max_16_acq_rel>>  =>  (LDSMAXALH:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14355             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSMAXALH,
   14356             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14357             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14358             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14359             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14360             :         GIR_EraseFromParent, /*InsnID*/0,
   14361             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14362             :         // GIR_Coverage, 3646,
   14363             :         GIR_Done,
   14364             :       // Label 990: @33550
   14365             :       GIM_Try, /*On fail goto*//*Label 991*/ 33601, // Rule ID 3647 //
   14366             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14367             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   14368             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   14369             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   14370             :         // MIs[0] Rn
   14371             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14372             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14373             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   14374             :         // (atomic_load_max:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_max_16>><<P:Predicate_atomic_load_max_16_seq_cst>>  =>  (LDSMAXALH:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14375             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSMAXALH,
   14376             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14377             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14378             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14379             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14380             :         GIR_EraseFromParent, /*InsnID*/0,
   14381             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14382             :         // GIR_Coverage, 3647,
   14383             :         GIR_Done,
   14384             :       // Label 991: @33601
   14385             :       GIM_Try, /*On fail goto*//*Label 992*/ 33652, // Rule ID 3648 //
   14386             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14387             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   14388             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   14389             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   14390             :         // MIs[0] Rn
   14391             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14392             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14393             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   14394             :         // (atomic_load_max:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_max_8>><<P:Predicate_atomic_load_max_8_monotonic>>  =>  (LDSMAXB:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14395             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSMAXB,
   14396             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14397             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14398             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14399             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14400             :         GIR_EraseFromParent, /*InsnID*/0,
   14401             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14402             :         // GIR_Coverage, 3648,
   14403             :         GIR_Done,
   14404             :       // Label 992: @33652
   14405             :       GIM_Try, /*On fail goto*//*Label 993*/ 33703, // Rule ID 3649 //
   14406             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14407             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   14408             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   14409             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   14410             :         // MIs[0] Rn
   14411             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14412             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14413             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   14414             :         // (atomic_load_max:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_max_8>><<P:Predicate_atomic_load_max_8_acquire>>  =>  (LDSMAXAB:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14415             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSMAXAB,
   14416             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14417             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14418             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14419             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14420             :         GIR_EraseFromParent, /*InsnID*/0,
   14421             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14422             :         // GIR_Coverage, 3649,
   14423             :         GIR_Done,
   14424             :       // Label 993: @33703
   14425             :       GIM_Try, /*On fail goto*//*Label 994*/ 33754, // Rule ID 3650 //
   14426             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14427             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   14428             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   14429             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   14430             :         // MIs[0] Rn
   14431             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14432             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14433             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   14434             :         // (atomic_load_max:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_max_8>><<P:Predicate_atomic_load_max_8_release>>  =>  (LDSMAXLB:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14435             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSMAXLB,
   14436             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14437             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14438             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14439             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14440             :         GIR_EraseFromParent, /*InsnID*/0,
   14441             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14442             :         // GIR_Coverage, 3650,
   14443             :         GIR_Done,
   14444             :       // Label 994: @33754
   14445             :       GIM_Try, /*On fail goto*//*Label 995*/ 33805, // Rule ID 3651 //
   14446             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14447             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   14448             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   14449             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   14450             :         // MIs[0] Rn
   14451             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14452             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14453             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   14454             :         // (atomic_load_max:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_max_8>><<P:Predicate_atomic_load_max_8_acq_rel>>  =>  (LDSMAXALB:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14455             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSMAXALB,
   14456             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14457             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14458             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14459             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14460             :         GIR_EraseFromParent, /*InsnID*/0,
   14461             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14462             :         // GIR_Coverage, 3651,
   14463             :         GIR_Done,
   14464             :       // Label 995: @33805
   14465             :       GIM_Try, /*On fail goto*//*Label 996*/ 33856, // Rule ID 3652 //
   14466             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14467             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   14468             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   14469             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   14470             :         // MIs[0] Rn
   14471             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14472             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14473             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   14474             :         // (atomic_load_max:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_max_8>><<P:Predicate_atomic_load_max_8_seq_cst>>  =>  (LDSMAXALB:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14475             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSMAXALB,
   14476             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14477             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14478             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14479             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14480             :         GIR_EraseFromParent, /*InsnID*/0,
   14481             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14482             :         // GIR_Coverage, 3652,
   14483             :         GIR_Done,
   14484             :       // Label 996: @33856
   14485             :       GIM_Reject,
   14486             :     // Label 981: @33857
   14487             :     GIM_Reject,
   14488             :     // Label 979: @33858
   14489             :     GIM_Try, /*On fail goto*//*Label 997*/ 34104,
   14490             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   14491             :       GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/8,
   14492             :       GIM_Try, /*On fail goto*//*Label 998*/ 33915, // Rule ID 3633 //
   14493             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14494             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   14495             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   14496             :         // MIs[0] Rn
   14497             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14498             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14499             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   14500             :         // (atomic_load_max:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_max_64>><<P:Predicate_atomic_load_max_64_monotonic>>  =>  (LDSMAXX:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14501             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSMAXX,
   14502             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14503             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14504             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14505             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14506             :         GIR_EraseFromParent, /*InsnID*/0,
   14507             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14508             :         // GIR_Coverage, 3633,
   14509             :         GIR_Done,
   14510             :       // Label 998: @33915
   14511             :       GIM_Try, /*On fail goto*//*Label 999*/ 33962, // Rule ID 3634 //
   14512             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14513             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   14514             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   14515             :         // MIs[0] Rn
   14516             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14517             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14518             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   14519             :         // (atomic_load_max:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_max_64>><<P:Predicate_atomic_load_max_64_acquire>>  =>  (LDSMAXAX:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14520             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSMAXAX,
   14521             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14522             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14523             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14524             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14525             :         GIR_EraseFromParent, /*InsnID*/0,
   14526             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14527             :         // GIR_Coverage, 3634,
   14528             :         GIR_Done,
   14529             :       // Label 999: @33962
   14530             :       GIM_Try, /*On fail goto*//*Label 1000*/ 34009, // Rule ID 3635 //
   14531             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14532             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   14533             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   14534             :         // MIs[0] Rn
   14535             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14536             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14537             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   14538             :         // (atomic_load_max:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_max_64>><<P:Predicate_atomic_load_max_64_release>>  =>  (LDSMAXLX:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14539             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSMAXLX,
   14540             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14541             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14542             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14543             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14544             :         GIR_EraseFromParent, /*InsnID*/0,
   14545             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14546             :         // GIR_Coverage, 3635,
   14547             :         GIR_Done,
   14548             :       // Label 1000: @34009
   14549             :       GIM_Try, /*On fail goto*//*Label 1001*/ 34056, // Rule ID 3636 //
   14550             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14551             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   14552             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   14553             :         // MIs[0] Rn
   14554             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14555             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14556             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   14557             :         // (atomic_load_max:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_max_64>><<P:Predicate_atomic_load_max_64_acq_rel>>  =>  (LDSMAXALX:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14558             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSMAXALX,
   14559             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14560             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14561             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14562             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14563             :         GIR_EraseFromParent, /*InsnID*/0,
   14564             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14565             :         // GIR_Coverage, 3636,
   14566             :         GIR_Done,
   14567             :       // Label 1001: @34056
   14568             :       GIM_Try, /*On fail goto*//*Label 1002*/ 34103, // Rule ID 3637 //
   14569             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14570             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   14571             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   14572             :         // MIs[0] Rn
   14573             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14574             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14575             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   14576             :         // (atomic_load_max:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_max_64>><<P:Predicate_atomic_load_max_64_seq_cst>>  =>  (LDSMAXALX:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14577             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSMAXALX,
   14578             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14579             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14580             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14581             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14582             :         GIR_EraseFromParent, /*InsnID*/0,
   14583             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14584             :         // GIR_Coverage, 3637,
   14585             :         GIR_Done,
   14586             :       // Label 1002: @34103
   14587             :       GIM_Reject,
   14588             :     // Label 997: @34104
   14589             :     GIM_Reject,
   14590             :     // Label 980: @34105
   14591             :     GIM_Reject,
   14592             :     // Label 21: @34106
   14593             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 3, /*)*//*default:*//*Label 1005*/ 35134,
   14594             :     /*GILLT_s32*//*Label 1003*/ 34114,
   14595             :     /*GILLT_s64*//*Label 1004*/ 34887,
   14596             :     // Label 1003: @34114
   14597             :     GIM_Try, /*On fail goto*//*Label 1006*/ 34886,
   14598             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   14599             :       GIM_Try, /*On fail goto*//*Label 1007*/ 34171, // Rule ID 3658 //
   14600             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14601             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   14602             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   14603             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   14604             :         // MIs[0] Rn
   14605             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14606             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14607             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   14608             :         // (atomic_load_min:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_min_32>><<P:Predicate_atomic_load_min_32_monotonic>>  =>  (LDSMINW:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14609             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSMINW,
   14610             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14611             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14612             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14613             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14614             :         GIR_EraseFromParent, /*InsnID*/0,
   14615             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14616             :         // GIR_Coverage, 3658,
   14617             :         GIR_Done,
   14618             :       // Label 1007: @34171
   14619             :       GIM_Try, /*On fail goto*//*Label 1008*/ 34222, // Rule ID 3659 //
   14620             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14621             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   14622             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   14623             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   14624             :         // MIs[0] Rn
   14625             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14626             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14627             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   14628             :         // (atomic_load_min:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_min_32>><<P:Predicate_atomic_load_min_32_acquire>>  =>  (LDSMINAW:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14629             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSMINAW,
   14630             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14631             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14632             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14633             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14634             :         GIR_EraseFromParent, /*InsnID*/0,
   14635             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14636             :         // GIR_Coverage, 3659,
   14637             :         GIR_Done,
   14638             :       // Label 1008: @34222
   14639             :       GIM_Try, /*On fail goto*//*Label 1009*/ 34273, // Rule ID 3660 //
   14640             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14641             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   14642             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   14643             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   14644             :         // MIs[0] Rn
   14645             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14646             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14647             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   14648             :         // (atomic_load_min:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_min_32>><<P:Predicate_atomic_load_min_32_release>>  =>  (LDSMINLW:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14649             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSMINLW,
   14650             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14651             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14652             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14653             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14654             :         GIR_EraseFromParent, /*InsnID*/0,
   14655             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14656             :         // GIR_Coverage, 3660,
   14657             :         GIR_Done,
   14658             :       // Label 1009: @34273
   14659             :       GIM_Try, /*On fail goto*//*Label 1010*/ 34324, // Rule ID 3661 //
   14660             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14661             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   14662             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   14663             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   14664             :         // MIs[0] Rn
   14665             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14666             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14667             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   14668             :         // (atomic_load_min:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_min_32>><<P:Predicate_atomic_load_min_32_acq_rel>>  =>  (LDSMINALW:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14669             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSMINALW,
   14670             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14671             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14672             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14673             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14674             :         GIR_EraseFromParent, /*InsnID*/0,
   14675             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14676             :         // GIR_Coverage, 3661,
   14677             :         GIR_Done,
   14678             :       // Label 1010: @34324
   14679             :       GIM_Try, /*On fail goto*//*Label 1011*/ 34375, // Rule ID 3662 //
   14680             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14681             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   14682             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   14683             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   14684             :         // MIs[0] Rn
   14685             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14686             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14687             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   14688             :         // (atomic_load_min:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_min_32>><<P:Predicate_atomic_load_min_32_seq_cst>>  =>  (LDSMINALW:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14689             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSMINALW,
   14690             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14691             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14692             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14693             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14694             :         GIR_EraseFromParent, /*InsnID*/0,
   14695             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14696             :         // GIR_Coverage, 3662,
   14697             :         GIR_Done,
   14698             :       // Label 1011: @34375
   14699             :       GIM_Try, /*On fail goto*//*Label 1012*/ 34426, // Rule ID 3663 //
   14700             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14701             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   14702             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   14703             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   14704             :         // MIs[0] Rn
   14705             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14706             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14707             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   14708             :         // (atomic_load_min:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_min_16>><<P:Predicate_atomic_load_min_16_monotonic>>  =>  (LDSMINH:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14709             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSMINH,
   14710             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14711             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14712             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14713             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14714             :         GIR_EraseFromParent, /*InsnID*/0,
   14715             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14716             :         // GIR_Coverage, 3663,
   14717             :         GIR_Done,
   14718             :       // Label 1012: @34426
   14719             :       GIM_Try, /*On fail goto*//*Label 1013*/ 34477, // Rule ID 3664 //
   14720             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14721             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   14722             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   14723             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   14724             :         // MIs[0] Rn
   14725             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14726             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14727             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   14728             :         // (atomic_load_min:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_min_16>><<P:Predicate_atomic_load_min_16_acquire>>  =>  (LDSMINAH:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14729             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSMINAH,
   14730             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14731             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14732             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14733             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14734             :         GIR_EraseFromParent, /*InsnID*/0,
   14735             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14736             :         // GIR_Coverage, 3664,
   14737             :         GIR_Done,
   14738             :       // Label 1013: @34477
   14739             :       GIM_Try, /*On fail goto*//*Label 1014*/ 34528, // Rule ID 3665 //
   14740             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14741             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   14742             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   14743             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   14744             :         // MIs[0] Rn
   14745             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14746             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14747             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   14748             :         // (atomic_load_min:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_min_16>><<P:Predicate_atomic_load_min_16_release>>  =>  (LDSMINLH:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14749             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSMINLH,
   14750             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14751             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14752             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14753             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14754             :         GIR_EraseFromParent, /*InsnID*/0,
   14755             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14756             :         // GIR_Coverage, 3665,
   14757             :         GIR_Done,
   14758             :       // Label 1014: @34528
   14759             :       GIM_Try, /*On fail goto*//*Label 1015*/ 34579, // Rule ID 3666 //
   14760             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14761             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   14762             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   14763             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   14764             :         // MIs[0] Rn
   14765             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14766             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14767             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   14768             :         // (atomic_load_min:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_min_16>><<P:Predicate_atomic_load_min_16_acq_rel>>  =>  (LDSMINALH:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14769             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSMINALH,
   14770             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14771             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14772             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14773             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14774             :         GIR_EraseFromParent, /*InsnID*/0,
   14775             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14776             :         // GIR_Coverage, 3666,
   14777             :         GIR_Done,
   14778             :       // Label 1015: @34579
   14779             :       GIM_Try, /*On fail goto*//*Label 1016*/ 34630, // Rule ID 3667 //
   14780             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14781             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   14782             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   14783             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   14784             :         // MIs[0] Rn
   14785             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14786             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14787             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   14788             :         // (atomic_load_min:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_min_16>><<P:Predicate_atomic_load_min_16_seq_cst>>  =>  (LDSMINALH:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14789             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSMINALH,
   14790             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14791             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14792             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14793             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14794             :         GIR_EraseFromParent, /*InsnID*/0,
   14795             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14796             :         // GIR_Coverage, 3667,
   14797             :         GIR_Done,
   14798             :       // Label 1016: @34630
   14799             :       GIM_Try, /*On fail goto*//*Label 1017*/ 34681, // Rule ID 3668 //
   14800             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14801             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   14802             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   14803             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   14804             :         // MIs[0] Rn
   14805             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14806             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14807             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   14808             :         // (atomic_load_min:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_min_8>><<P:Predicate_atomic_load_min_8_monotonic>>  =>  (LDSMINB:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14809             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSMINB,
   14810             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14811             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14812             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14813             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14814             :         GIR_EraseFromParent, /*InsnID*/0,
   14815             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14816             :         // GIR_Coverage, 3668,
   14817             :         GIR_Done,
   14818             :       // Label 1017: @34681
   14819             :       GIM_Try, /*On fail goto*//*Label 1018*/ 34732, // Rule ID 3669 //
   14820             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14821             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   14822             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   14823             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   14824             :         // MIs[0] Rn
   14825             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14826             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14827             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   14828             :         // (atomic_load_min:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_min_8>><<P:Predicate_atomic_load_min_8_acquire>>  =>  (LDSMINAB:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14829             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSMINAB,
   14830             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14831             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14832             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14833             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14834             :         GIR_EraseFromParent, /*InsnID*/0,
   14835             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14836             :         // GIR_Coverage, 3669,
   14837             :         GIR_Done,
   14838             :       // Label 1018: @34732
   14839             :       GIM_Try, /*On fail goto*//*Label 1019*/ 34783, // Rule ID 3670 //
   14840             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14841             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   14842             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   14843             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   14844             :         // MIs[0] Rn
   14845             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14846             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14847             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   14848             :         // (atomic_load_min:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_min_8>><<P:Predicate_atomic_load_min_8_release>>  =>  (LDSMINLB:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14849             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSMINLB,
   14850             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14851             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14852             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14853             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14854             :         GIR_EraseFromParent, /*InsnID*/0,
   14855             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14856             :         // GIR_Coverage, 3670,
   14857             :         GIR_Done,
   14858             :       // Label 1019: @34783
   14859             :       GIM_Try, /*On fail goto*//*Label 1020*/ 34834, // Rule ID 3671 //
   14860             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14861             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   14862             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   14863             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   14864             :         // MIs[0] Rn
   14865             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14866             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14867             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   14868             :         // (atomic_load_min:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_min_8>><<P:Predicate_atomic_load_min_8_acq_rel>>  =>  (LDSMINALB:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14869             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSMINALB,
   14870             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14871             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14872             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14873             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14874             :         GIR_EraseFromParent, /*InsnID*/0,
   14875             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14876             :         // GIR_Coverage, 3671,
   14877             :         GIR_Done,
   14878             :       // Label 1020: @34834
   14879             :       GIM_Try, /*On fail goto*//*Label 1021*/ 34885, // Rule ID 3672 //
   14880             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14881             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   14882             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   14883             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   14884             :         // MIs[0] Rn
   14885             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14886             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14887             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   14888             :         // (atomic_load_min:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_min_8>><<P:Predicate_atomic_load_min_8_seq_cst>>  =>  (LDSMINALB:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14889             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSMINALB,
   14890             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14891             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14892             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14893             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14894             :         GIR_EraseFromParent, /*InsnID*/0,
   14895             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14896             :         // GIR_Coverage, 3672,
   14897             :         GIR_Done,
   14898             :       // Label 1021: @34885
   14899             :       GIM_Reject,
   14900             :     // Label 1006: @34886
   14901             :     GIM_Reject,
   14902             :     // Label 1004: @34887
   14903             :     GIM_Try, /*On fail goto*//*Label 1022*/ 35133,
   14904             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   14905             :       GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/8,
   14906             :       GIM_Try, /*On fail goto*//*Label 1023*/ 34944, // Rule ID 3653 //
   14907             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14908             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   14909             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   14910             :         // MIs[0] Rn
   14911             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14912             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14913             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   14914             :         // (atomic_load_min:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_min_64>><<P:Predicate_atomic_load_min_64_monotonic>>  =>  (LDSMINX:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14915             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSMINX,
   14916             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14917             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14918             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14919             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14920             :         GIR_EraseFromParent, /*InsnID*/0,
   14921             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14922             :         // GIR_Coverage, 3653,
   14923             :         GIR_Done,
   14924             :       // Label 1023: @34944
   14925             :       GIM_Try, /*On fail goto*//*Label 1024*/ 34991, // Rule ID 3654 //
   14926             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14927             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   14928             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   14929             :         // MIs[0] Rn
   14930             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14931             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14932             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   14933             :         // (atomic_load_min:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_min_64>><<P:Predicate_atomic_load_min_64_acquire>>  =>  (LDSMINAX:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14934             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSMINAX,
   14935             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14936             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14937             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14938             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14939             :         GIR_EraseFromParent, /*InsnID*/0,
   14940             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14941             :         // GIR_Coverage, 3654,
   14942             :         GIR_Done,
   14943             :       // Label 1024: @34991
   14944             :       GIM_Try, /*On fail goto*//*Label 1025*/ 35038, // Rule ID 3655 //
   14945             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14946             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   14947             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   14948             :         // MIs[0] Rn
   14949             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14950             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14951             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   14952             :         // (atomic_load_min:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_min_64>><<P:Predicate_atomic_load_min_64_release>>  =>  (LDSMINLX:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14953             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSMINLX,
   14954             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14955             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14956             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14957             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14958             :         GIR_EraseFromParent, /*InsnID*/0,
   14959             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14960             :         // GIR_Coverage, 3655,
   14961             :         GIR_Done,
   14962             :       // Label 1025: @35038
   14963             :       GIM_Try, /*On fail goto*//*Label 1026*/ 35085, // Rule ID 3656 //
   14964             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14965             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   14966             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   14967             :         // MIs[0] Rn
   14968             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14969             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14970             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   14971             :         // (atomic_load_min:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_min_64>><<P:Predicate_atomic_load_min_64_acq_rel>>  =>  (LDSMINALX:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14972             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSMINALX,
   14973             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14974             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14975             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14976             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14977             :         GIR_EraseFromParent, /*InsnID*/0,
   14978             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14979             :         // GIR_Coverage, 3656,
   14980             :         GIR_Done,
   14981             :       // Label 1026: @35085
   14982             :       GIM_Try, /*On fail goto*//*Label 1027*/ 35132, // Rule ID 3657 //
   14983             :         GIM_CheckFeatures, GIFBS_HasLSE,
   14984             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   14985             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   14986             :         // MIs[0] Rn
   14987             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   14988             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   14989             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   14990             :         // (atomic_load_min:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_min_64>><<P:Predicate_atomic_load_min_64_seq_cst>>  =>  (LDSMINALX:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   14991             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDSMINALX,
   14992             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   14993             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   14994             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   14995             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   14996             :         GIR_EraseFromParent, /*InsnID*/0,
   14997             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   14998             :         // GIR_Coverage, 3657,
   14999             :         GIR_Done,
   15000             :       // Label 1027: @35132
   15001             :       GIM_Reject,
   15002             :     // Label 1022: @35133
   15003             :     GIM_Reject,
   15004             :     // Label 1005: @35134
   15005             :     GIM_Reject,
   15006             :     // Label 22: @35135
   15007             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 3, /*)*//*default:*//*Label 1030*/ 36163,
   15008             :     /*GILLT_s32*//*Label 1028*/ 35143,
   15009             :     /*GILLT_s64*//*Label 1029*/ 35916,
   15010             :     // Label 1028: @35143
   15011             :     GIM_Try, /*On fail goto*//*Label 1031*/ 35915,
   15012             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   15013             :       GIM_Try, /*On fail goto*//*Label 1032*/ 35200, // Rule ID 3678 //
   15014             :         GIM_CheckFeatures, GIFBS_HasLSE,
   15015             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   15016             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   15017             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   15018             :         // MIs[0] Rn
   15019             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   15020             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   15021             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   15022             :         // (atomic_load_umax:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_umax_32>><<P:Predicate_atomic_load_umax_32_monotonic>>  =>  (LDUMAXW:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   15023             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDUMAXW,
   15024             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   15025             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   15026             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   15027             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   15028             :         GIR_EraseFromParent, /*InsnID*/0,
   15029             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15030             :         // GIR_Coverage, 3678,
   15031             :         GIR_Done,
   15032             :       // Label 1032: @35200
   15033             :       GIM_Try, /*On fail goto*//*Label 1033*/ 35251, // Rule ID 3679 //
   15034             :         GIM_CheckFeatures, GIFBS_HasLSE,
   15035             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   15036             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   15037             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   15038             :         // MIs[0] Rn
   15039             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   15040             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   15041             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   15042             :         // (atomic_load_umax:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_umax_32>><<P:Predicate_atomic_load_umax_32_acquire>>  =>  (LDUMAXAW:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   15043             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDUMAXAW,
   15044             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   15045             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   15046             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   15047             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   15048             :         GIR_EraseFromParent, /*InsnID*/0,
   15049             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15050             :         // GIR_Coverage, 3679,
   15051             :         GIR_Done,
   15052             :       // Label 1033: @35251
   15053             :       GIM_Try, /*On fail goto*//*Label 1034*/ 35302, // Rule ID 3680 //
   15054             :         GIM_CheckFeatures, GIFBS_HasLSE,
   15055             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   15056             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   15057             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   15058             :         // MIs[0] Rn
   15059             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   15060             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   15061             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   15062             :         // (atomic_load_umax:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_umax_32>><<P:Predicate_atomic_load_umax_32_release>>  =>  (LDUMAXLW:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   15063             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDUMAXLW,
   15064             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   15065             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   15066             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   15067             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   15068             :         GIR_EraseFromParent, /*InsnID*/0,
   15069             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15070             :         // GIR_Coverage, 3680,
   15071             :         GIR_Done,
   15072             :       // Label 1034: @35302
   15073             :       GIM_Try, /*On fail goto*//*Label 1035*/ 35353, // Rule ID 3681 //
   15074             :         GIM_CheckFeatures, GIFBS_HasLSE,
   15075             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   15076             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   15077             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   15078             :         // MIs[0] Rn
   15079             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   15080             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   15081             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   15082             :         // (atomic_load_umax:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_umax_32>><<P:Predicate_atomic_load_umax_32_acq_rel>>  =>  (LDUMAXALW:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   15083             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDUMAXALW,
   15084             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   15085             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   15086             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   15087             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   15088             :         GIR_EraseFromParent, /*InsnID*/0,
   15089             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15090             :         // GIR_Coverage, 3681,
   15091             :         GIR_Done,
   15092             :       // Label 1035: @35353
   15093             :       GIM_Try, /*On fail goto*//*Label 1036*/ 35404, // Rule ID 3682 //
   15094             :         GIM_CheckFeatures, GIFBS_HasLSE,
   15095             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   15096             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   15097             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   15098             :         // MIs[0] Rn
   15099             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   15100             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   15101             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   15102             :         // (atomic_load_umax:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_umax_32>><<P:Predicate_atomic_load_umax_32_seq_cst>>  =>  (LDUMAXALW:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   15103             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDUMAXALW,
   15104             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   15105             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   15106             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   15107             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   15108             :         GIR_EraseFromParent, /*InsnID*/0,
   15109             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15110             :         // GIR_Coverage, 3682,
   15111             :         GIR_Done,
   15112             :       // Label 1036: @35404
   15113             :       GIM_Try, /*On fail goto*//*Label 1037*/ 35455, // Rule ID 3683 //
   15114             :         GIM_CheckFeatures, GIFBS_HasLSE,
   15115             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   15116             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   15117             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   15118             :         // MIs[0] Rn
   15119             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   15120             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   15121             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   15122             :         // (atomic_load_umax:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_umax_16>><<P:Predicate_atomic_load_umax_16_monotonic>>  =>  (LDUMAXH:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   15123             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDUMAXH,
   15124             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   15125             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   15126             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   15127             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   15128             :         GIR_EraseFromParent, /*InsnID*/0,
   15129             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15130             :         // GIR_Coverage, 3683,
   15131             :         GIR_Done,
   15132             :       // Label 1037: @35455
   15133             :       GIM_Try, /*On fail goto*//*Label 1038*/ 35506, // Rule ID 3684 //
   15134             :         GIM_CheckFeatures, GIFBS_HasLSE,
   15135             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   15136             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   15137             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   15138             :         // MIs[0] Rn
   15139             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   15140             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   15141             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   15142             :         // (atomic_load_umax:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_umax_16>><<P:Predicate_atomic_load_umax_16_acquire>>  =>  (LDUMAXAH:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   15143             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDUMAXAH,
   15144             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   15145             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   15146             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   15147             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   15148             :         GIR_EraseFromParent, /*InsnID*/0,
   15149             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15150             :         // GIR_Coverage, 3684,
   15151             :         GIR_Done,
   15152             :       // Label 1038: @35506
   15153             :       GIM_Try, /*On fail goto*//*Label 1039*/ 35557, // Rule ID 3685 //
   15154             :         GIM_CheckFeatures, GIFBS_HasLSE,
   15155             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   15156             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   15157             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   15158             :         // MIs[0] Rn
   15159             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   15160             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   15161             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   15162             :         // (atomic_load_umax:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_umax_16>><<P:Predicate_atomic_load_umax_16_release>>  =>  (LDUMAXLH:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   15163             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDUMAXLH,
   15164             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   15165             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   15166             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   15167             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   15168             :         GIR_EraseFromParent, /*InsnID*/0,
   15169             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15170             :         // GIR_Coverage, 3685,
   15171             :         GIR_Done,
   15172             :       // Label 1039: @35557
   15173             :       GIM_Try, /*On fail goto*//*Label 1040*/ 35608, // Rule ID 3686 //
   15174             :         GIM_CheckFeatures, GIFBS_HasLSE,
   15175             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   15176             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   15177             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   15178             :         // MIs[0] Rn
   15179             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   15180             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   15181             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   15182             :         // (atomic_load_umax:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_umax_16>><<P:Predicate_atomic_load_umax_16_acq_rel>>  =>  (LDUMAXALH:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   15183             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDUMAXALH,
   15184             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   15185             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   15186             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   15187             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   15188             :         GIR_EraseFromParent, /*InsnID*/0,
   15189             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15190             :         // GIR_Coverage, 3686,
   15191             :         GIR_Done,
   15192             :       // Label 1040: @35608
   15193             :       GIM_Try, /*On fail goto*//*Label 1041*/ 35659, // Rule ID 3687 //
   15194             :         GIM_CheckFeatures, GIFBS_HasLSE,
   15195             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   15196             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   15197             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   15198             :         // MIs[0] Rn
   15199             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   15200             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   15201             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   15202             :         // (atomic_load_umax:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_umax_16>><<P:Predicate_atomic_load_umax_16_seq_cst>>  =>  (LDUMAXALH:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   15203             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDUMAXALH,
   15204             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   15205             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   15206             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   15207             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   15208             :         GIR_EraseFromParent, /*InsnID*/0,
   15209             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15210             :         // GIR_Coverage, 3687,
   15211             :         GIR_Done,
   15212             :       // Label 1041: @35659
   15213             :       GIM_Try, /*On fail goto*//*Label 1042*/ 35710, // Rule ID 3688 //
   15214             :         GIM_CheckFeatures, GIFBS_HasLSE,
   15215             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   15216             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   15217             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   15218             :         // MIs[0] Rn
   15219             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   15220             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   15221             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   15222             :         // (atomic_load_umax:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_umax_8>><<P:Predicate_atomic_load_umax_8_monotonic>>  =>  (LDUMAXB:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   15223             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDUMAXB,
   15224             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   15225             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   15226             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   15227             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   15228             :         GIR_EraseFromParent, /*InsnID*/0,
   15229             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15230             :         // GIR_Coverage, 3688,
   15231             :         GIR_Done,
   15232             :       // Label 1042: @35710
   15233             :       GIM_Try, /*On fail goto*//*Label 1043*/ 35761, // Rule ID 3689 //
   15234             :         GIM_CheckFeatures, GIFBS_HasLSE,
   15235             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   15236             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   15237             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   15238             :         // MIs[0] Rn
   15239             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   15240             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   15241             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   15242             :         // (atomic_load_umax:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_umax_8>><<P:Predicate_atomic_load_umax_8_acquire>>  =>  (LDUMAXAB:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   15243             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDUMAXAB,
   15244             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   15245             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   15246             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   15247             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   15248             :         GIR_EraseFromParent, /*InsnID*/0,
   15249             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15250             :         // GIR_Coverage, 3689,
   15251             :         GIR_Done,
   15252             :       // Label 1043: @35761
   15253             :       GIM_Try, /*On fail goto*//*Label 1044*/ 35812, // Rule ID 3690 //
   15254             :         GIM_CheckFeatures, GIFBS_HasLSE,
   15255             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   15256             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   15257             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   15258             :         // MIs[0] Rn
   15259             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   15260             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   15261             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   15262             :         // (atomic_load_umax:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_umax_8>><<P:Predicate_atomic_load_umax_8_release>>  =>  (LDUMAXLB:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   15263             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDUMAXLB,
   15264             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   15265             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   15266             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   15267             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   15268             :         GIR_EraseFromParent, /*InsnID*/0,
   15269             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15270             :         // GIR_Coverage, 3690,
   15271             :         GIR_Done,
   15272             :       // Label 1044: @35812
   15273             :       GIM_Try, /*On fail goto*//*Label 1045*/ 35863, // Rule ID 3691 //
   15274             :         GIM_CheckFeatures, GIFBS_HasLSE,
   15275             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   15276             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   15277             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   15278             :         // MIs[0] Rn
   15279             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   15280             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   15281             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   15282             :         // (atomic_load_umax:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_umax_8>><<P:Predicate_atomic_load_umax_8_acq_rel>>  =>  (LDUMAXALB:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   15283             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDUMAXALB,
   15284             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   15285             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   15286             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   15287             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   15288             :         GIR_EraseFromParent, /*InsnID*/0,
   15289             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15290             :         // GIR_Coverage, 3691,
   15291             :         GIR_Done,
   15292             :       // Label 1045: @35863
   15293             :       GIM_Try, /*On fail goto*//*Label 1046*/ 35914, // Rule ID 3692 //
   15294             :         GIM_CheckFeatures, GIFBS_HasLSE,
   15295             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   15296             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   15297             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   15298             :         // MIs[0] Rn
   15299             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   15300             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   15301             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   15302             :         // (atomic_load_umax:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_umax_8>><<P:Predicate_atomic_load_umax_8_seq_cst>>  =>  (LDUMAXALB:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   15303             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDUMAXALB,
   15304             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   15305             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   15306             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   15307             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   15308             :         GIR_EraseFromParent, /*InsnID*/0,
   15309             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15310             :         // GIR_Coverage, 3692,
   15311             :         GIR_Done,
   15312             :       // Label 1046: @35914
   15313             :       GIM_Reject,
   15314             :     // Label 1031: @35915
   15315             :     GIM_Reject,
   15316             :     // Label 1029: @35916
   15317             :     GIM_Try, /*On fail goto*//*Label 1047*/ 36162,
   15318             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   15319             :       GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/8,
   15320             :       GIM_Try, /*On fail goto*//*Label 1048*/ 35973, // Rule ID 3673 //
   15321             :         GIM_CheckFeatures, GIFBS_HasLSE,
   15322             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   15323             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   15324             :         // MIs[0] Rn
   15325             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   15326             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   15327             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   15328             :         // (atomic_load_umax:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_umax_64>><<P:Predicate_atomic_load_umax_64_monotonic>>  =>  (LDUMAXX:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   15329             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDUMAXX,
   15330             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   15331             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   15332             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   15333             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   15334             :         GIR_EraseFromParent, /*InsnID*/0,
   15335             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15336             :         // GIR_Coverage, 3673,
   15337             :         GIR_Done,
   15338             :       // Label 1048: @35973
   15339             :       GIM_Try, /*On fail goto*//*Label 1049*/ 36020, // Rule ID 3674 //
   15340             :         GIM_CheckFeatures, GIFBS_HasLSE,
   15341             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   15342             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   15343             :         // MIs[0] Rn
   15344             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   15345             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   15346             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   15347             :         // (atomic_load_umax:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_umax_64>><<P:Predicate_atomic_load_umax_64_acquire>>  =>  (LDUMAXAX:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   15348             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDUMAXAX,
   15349             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   15350             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   15351             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   15352             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   15353             :         GIR_EraseFromParent, /*InsnID*/0,
   15354             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15355             :         // GIR_Coverage, 3674,
   15356             :         GIR_Done,
   15357             :       // Label 1049: @36020
   15358             :       GIM_Try, /*On fail goto*//*Label 1050*/ 36067, // Rule ID 3675 //
   15359             :         GIM_CheckFeatures, GIFBS_HasLSE,
   15360             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   15361             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   15362             :         // MIs[0] Rn
   15363             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   15364             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   15365             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   15366             :         // (atomic_load_umax:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_umax_64>><<P:Predicate_atomic_load_umax_64_release>>  =>  (LDUMAXLX:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   15367             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDUMAXLX,
   15368             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   15369             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   15370             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   15371             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   15372             :         GIR_EraseFromParent, /*InsnID*/0,
   15373             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15374             :         // GIR_Coverage, 3675,
   15375             :         GIR_Done,
   15376             :       // Label 1050: @36067
   15377             :       GIM_Try, /*On fail goto*//*Label 1051*/ 36114, // Rule ID 3676 //
   15378             :         GIM_CheckFeatures, GIFBS_HasLSE,
   15379             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   15380             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   15381             :         // MIs[0] Rn
   15382             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   15383             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   15384             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   15385             :         // (atomic_load_umax:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_umax_64>><<P:Predicate_atomic_load_umax_64_acq_rel>>  =>  (LDUMAXALX:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   15386             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDUMAXALX,
   15387             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   15388             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   15389             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   15390             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   15391             :         GIR_EraseFromParent, /*InsnID*/0,
   15392             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15393             :         // GIR_Coverage, 3676,
   15394             :         GIR_Done,
   15395             :       // Label 1051: @36114
   15396             :       GIM_Try, /*On fail goto*//*Label 1052*/ 36161, // Rule ID 3677 //
   15397             :         GIM_CheckFeatures, GIFBS_HasLSE,
   15398             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   15399             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   15400             :         // MIs[0] Rn
   15401             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   15402             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   15403             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   15404             :         // (atomic_load_umax:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_umax_64>><<P:Predicate_atomic_load_umax_64_seq_cst>>  =>  (LDUMAXALX:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   15405             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDUMAXALX,
   15406             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   15407             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   15408             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   15409             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   15410             :         GIR_EraseFromParent, /*InsnID*/0,
   15411             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15412             :         // GIR_Coverage, 3677,
   15413             :         GIR_Done,
   15414             :       // Label 1052: @36161
   15415             :       GIM_Reject,
   15416             :     // Label 1047: @36162
   15417             :     GIM_Reject,
   15418             :     // Label 1030: @36163
   15419             :     GIM_Reject,
   15420             :     // Label 23: @36164
   15421             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 3, /*)*//*default:*//*Label 1055*/ 37192,
   15422             :     /*GILLT_s32*//*Label 1053*/ 36172,
   15423             :     /*GILLT_s64*//*Label 1054*/ 36945,
   15424             :     // Label 1053: @36172
   15425             :     GIM_Try, /*On fail goto*//*Label 1056*/ 36944,
   15426             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   15427             :       GIM_Try, /*On fail goto*//*Label 1057*/ 36229, // Rule ID 3698 //
   15428             :         GIM_CheckFeatures, GIFBS_HasLSE,
   15429             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   15430             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   15431             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   15432             :         // MIs[0] Rn
   15433             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   15434             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   15435             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   15436             :         // (atomic_load_umin:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_umin_32>><<P:Predicate_atomic_load_umin_32_monotonic>>  =>  (LDUMINW:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   15437             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDUMINW,
   15438             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   15439             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   15440             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   15441             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   15442             :         GIR_EraseFromParent, /*InsnID*/0,
   15443             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15444             :         // GIR_Coverage, 3698,
   15445             :         GIR_Done,
   15446             :       // Label 1057: @36229
   15447             :       GIM_Try, /*On fail goto*//*Label 1058*/ 36280, // Rule ID 3699 //
   15448             :         GIM_CheckFeatures, GIFBS_HasLSE,
   15449             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   15450             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   15451             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   15452             :         // MIs[0] Rn
   15453             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   15454             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   15455             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   15456             :         // (atomic_load_umin:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_umin_32>><<P:Predicate_atomic_load_umin_32_acquire>>  =>  (LDUMINAW:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   15457             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDUMINAW,
   15458             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   15459             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   15460             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   15461             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   15462             :         GIR_EraseFromParent, /*InsnID*/0,
   15463             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15464             :         // GIR_Coverage, 3699,
   15465             :         GIR_Done,
   15466             :       // Label 1058: @36280
   15467             :       GIM_Try, /*On fail goto*//*Label 1059*/ 36331, // Rule ID 3700 //
   15468             :         GIM_CheckFeatures, GIFBS_HasLSE,
   15469             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   15470             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   15471             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   15472             :         // MIs[0] Rn
   15473             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   15474             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   15475             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   15476             :         // (atomic_load_umin:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_umin_32>><<P:Predicate_atomic_load_umin_32_release>>  =>  (LDUMINLW:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   15477             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDUMINLW,
   15478             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   15479             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   15480             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   15481             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   15482             :         GIR_EraseFromParent, /*InsnID*/0,
   15483             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15484             :         // GIR_Coverage, 3700,
   15485             :         GIR_Done,
   15486             :       // Label 1059: @36331
   15487             :       GIM_Try, /*On fail goto*//*Label 1060*/ 36382, // Rule ID 3701 //
   15488             :         GIM_CheckFeatures, GIFBS_HasLSE,
   15489             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   15490             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   15491             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   15492             :         // MIs[0] Rn
   15493             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   15494             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   15495             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   15496             :         // (atomic_load_umin:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_umin_32>><<P:Predicate_atomic_load_umin_32_acq_rel>>  =>  (LDUMINALW:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   15497             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDUMINALW,
   15498             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   15499             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   15500             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   15501             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   15502             :         GIR_EraseFromParent, /*InsnID*/0,
   15503             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15504             :         // GIR_Coverage, 3701,
   15505             :         GIR_Done,
   15506             :       // Label 1060: @36382
   15507             :       GIM_Try, /*On fail goto*//*Label 1061*/ 36433, // Rule ID 3702 //
   15508             :         GIM_CheckFeatures, GIFBS_HasLSE,
   15509             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
   15510             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   15511             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   15512             :         // MIs[0] Rn
   15513             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   15514             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   15515             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   15516             :         // (atomic_load_umin:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_umin_32>><<P:Predicate_atomic_load_umin_32_seq_cst>>  =>  (LDUMINALW:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   15517             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDUMINALW,
   15518             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   15519             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   15520             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   15521             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   15522             :         GIR_EraseFromParent, /*InsnID*/0,
   15523             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15524             :         // GIR_Coverage, 3702,
   15525             :         GIR_Done,
   15526             :       // Label 1061: @36433
   15527             :       GIM_Try, /*On fail goto*//*Label 1062*/ 36484, // Rule ID 3703 //
   15528             :         GIM_CheckFeatures, GIFBS_HasLSE,
   15529             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   15530             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   15531             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   15532             :         // MIs[0] Rn
   15533             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   15534             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   15535             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   15536             :         // (atomic_load_umin:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_umin_16>><<P:Predicate_atomic_load_umin_16_monotonic>>  =>  (LDUMINH:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   15537             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDUMINH,
   15538             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   15539             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   15540             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   15541             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   15542             :         GIR_EraseFromParent, /*InsnID*/0,
   15543             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15544             :         // GIR_Coverage, 3703,
   15545             :         GIR_Done,
   15546             :       // Label 1062: @36484
   15547             :       GIM_Try, /*On fail goto*//*Label 1063*/ 36535, // Rule ID 3704 //
   15548             :         GIM_CheckFeatures, GIFBS_HasLSE,
   15549             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   15550             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   15551             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   15552             :         // MIs[0] Rn
   15553             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   15554             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   15555             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   15556             :         // (atomic_load_umin:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_umin_16>><<P:Predicate_atomic_load_umin_16_acquire>>  =>  (LDUMINAH:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   15557             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDUMINAH,
   15558             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   15559             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   15560             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   15561             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   15562             :         GIR_EraseFromParent, /*InsnID*/0,
   15563             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15564             :         // GIR_Coverage, 3704,
   15565             :         GIR_Done,
   15566             :       // Label 1063: @36535
   15567             :       GIM_Try, /*On fail goto*//*Label 1064*/ 36586, // Rule ID 3705 //
   15568             :         GIM_CheckFeatures, GIFBS_HasLSE,
   15569             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   15570             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   15571             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   15572             :         // MIs[0] Rn
   15573             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   15574             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   15575             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   15576             :         // (atomic_load_umin:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_umin_16>><<P:Predicate_atomic_load_umin_16_release>>  =>  (LDUMINLH:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   15577             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDUMINLH,
   15578             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   15579             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   15580             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   15581             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   15582             :         GIR_EraseFromParent, /*InsnID*/0,
   15583             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15584             :         // GIR_Coverage, 3705,
   15585             :         GIR_Done,
   15586             :       // Label 1064: @36586
   15587             :       GIM_Try, /*On fail goto*//*Label 1065*/ 36637, // Rule ID 3706 //
   15588             :         GIM_CheckFeatures, GIFBS_HasLSE,
   15589             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   15590             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   15591             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   15592             :         // MIs[0] Rn
   15593             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   15594             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   15595             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   15596             :         // (atomic_load_umin:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_umin_16>><<P:Predicate_atomic_load_umin_16_acq_rel>>  =>  (LDUMINALH:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   15597             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDUMINALH,
   15598             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   15599             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   15600             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   15601             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   15602             :         GIR_EraseFromParent, /*InsnID*/0,
   15603             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15604             :         // GIR_Coverage, 3706,
   15605             :         GIR_Done,
   15606             :       // Label 1065: @36637
   15607             :       GIM_Try, /*On fail goto*//*Label 1066*/ 36688, // Rule ID 3707 //
   15608             :         GIM_CheckFeatures, GIFBS_HasLSE,
   15609             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
   15610             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   15611             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   15612             :         // MIs[0] Rn
   15613             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   15614             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   15615             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   15616             :         // (atomic_load_umin:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_umin_16>><<P:Predicate_atomic_load_umin_16_seq_cst>>  =>  (LDUMINALH:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   15617             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDUMINALH,
   15618             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   15619             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   15620             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   15621             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   15622             :         GIR_EraseFromParent, /*InsnID*/0,
   15623             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15624             :         // GIR_Coverage, 3707,
   15625             :         GIR_Done,
   15626             :       // Label 1066: @36688
   15627             :       GIM_Try, /*On fail goto*//*Label 1067*/ 36739, // Rule ID 3708 //
   15628             :         GIM_CheckFeatures, GIFBS_HasLSE,
   15629             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   15630             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   15631             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   15632             :         // MIs[0] Rn
   15633             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   15634             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   15635             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   15636             :         // (atomic_load_umin:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_umin_8>><<P:Predicate_atomic_load_umin_8_monotonic>>  =>  (LDUMINB:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   15637             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDUMINB,
   15638             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   15639             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   15640             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   15641             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   15642             :         GIR_EraseFromParent, /*InsnID*/0,
   15643             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15644             :         // GIR_Coverage, 3708,
   15645             :         GIR_Done,
   15646             :       // Label 1067: @36739
   15647             :       GIM_Try, /*On fail goto*//*Label 1068*/ 36790, // Rule ID 3709 //
   15648             :         GIM_CheckFeatures, GIFBS_HasLSE,
   15649             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   15650             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   15651             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   15652             :         // MIs[0] Rn
   15653             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   15654             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   15655             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   15656             :         // (atomic_load_umin:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_umin_8>><<P:Predicate_atomic_load_umin_8_acquire>>  =>  (LDUMINAB:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   15657             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDUMINAB,
   15658             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   15659             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   15660             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   15661             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   15662             :         GIR_EraseFromParent, /*InsnID*/0,
   15663             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15664             :         // GIR_Coverage, 3709,
   15665             :         GIR_Done,
   15666             :       // Label 1068: @36790
   15667             :       GIM_Try, /*On fail goto*//*Label 1069*/ 36841, // Rule ID 3710 //
   15668             :         GIM_CheckFeatures, GIFBS_HasLSE,
   15669             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   15670             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   15671             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   15672             :         // MIs[0] Rn
   15673             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   15674             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   15675             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   15676             :         // (atomic_load_umin:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_umin_8>><<P:Predicate_atomic_load_umin_8_release>>  =>  (LDUMINLB:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   15677             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDUMINLB,
   15678             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   15679             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   15680             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   15681             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   15682             :         GIR_EraseFromParent, /*InsnID*/0,
   15683             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15684             :         // GIR_Coverage, 3710,
   15685             :         GIR_Done,
   15686             :       // Label 1069: @36841
   15687             :       GIM_Try, /*On fail goto*//*Label 1070*/ 36892, // Rule ID 3711 //
   15688             :         GIM_CheckFeatures, GIFBS_HasLSE,
   15689             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   15690             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   15691             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   15692             :         // MIs[0] Rn
   15693             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   15694             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   15695             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   15696             :         // (atomic_load_umin:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_umin_8>><<P:Predicate_atomic_load_umin_8_acq_rel>>  =>  (LDUMINALB:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   15697             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDUMINALB,
   15698             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   15699             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   15700             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   15701             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   15702             :         GIR_EraseFromParent, /*InsnID*/0,
   15703             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15704             :         // GIR_Coverage, 3711,
   15705             :         GIR_Done,
   15706             :       // Label 1070: @36892
   15707             :       GIM_Try, /*On fail goto*//*Label 1071*/ 36943, // Rule ID 3712 //
   15708             :         GIM_CheckFeatures, GIFBS_HasLSE,
   15709             :         GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
   15710             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   15711             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   15712             :         // MIs[0] Rn
   15713             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   15714             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   15715             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   15716             :         // (atomic_load_umin:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, GPR32:{ *:[i32] }:$Rm)<<P:Predicate_atomic_load_umin_8>><<P:Predicate_atomic_load_umin_8_seq_cst>>  =>  (LDUMINALB:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   15717             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDUMINALB,
   15718             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   15719             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   15720             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   15721             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   15722             :         GIR_EraseFromParent, /*InsnID*/0,
   15723             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15724             :         // GIR_Coverage, 3712,
   15725             :         GIR_Done,
   15726             :       // Label 1071: @36943
   15727             :       GIM_Reject,
   15728             :     // Label 1056: @36944
   15729             :     GIM_Reject,
   15730             :     // Label 1054: @36945
   15731             :     GIM_Try, /*On fail goto*//*Label 1072*/ 37191,
   15732             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   15733             :       GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/8,
   15734             :       GIM_Try, /*On fail goto*//*Label 1073*/ 37002, // Rule ID 3693 //
   15735             :         GIM_CheckFeatures, GIFBS_HasLSE,
   15736             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Monotonic,
   15737             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   15738             :         // MIs[0] Rn
   15739             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   15740             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   15741             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   15742             :         // (atomic_load_umin:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_umin_64>><<P:Predicate_atomic_load_umin_64_monotonic>>  =>  (LDUMINX:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   15743             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDUMINX,
   15744             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   15745             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   15746             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   15747             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   15748             :         GIR_EraseFromParent, /*InsnID*/0,
   15749             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15750             :         // GIR_Coverage, 3693,
   15751             :         GIR_Done,
   15752             :       // Label 1073: @37002
   15753             :       GIM_Try, /*On fail goto*//*Label 1074*/ 37049, // Rule ID 3694 //
   15754             :         GIM_CheckFeatures, GIFBS_HasLSE,
   15755             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Acquire,
   15756             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   15757             :         // MIs[0] Rn
   15758             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   15759             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   15760             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   15761             :         // (atomic_load_umin:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_umin_64>><<P:Predicate_atomic_load_umin_64_acquire>>  =>  (LDUMINAX:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   15762             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDUMINAX,
   15763             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   15764             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   15765             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   15766             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   15767             :         GIR_EraseFromParent, /*InsnID*/0,
   15768             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15769             :         // GIR_Coverage, 3694,
   15770             :         GIR_Done,
   15771             :       // Label 1074: @37049
   15772             :       GIM_Try, /*On fail goto*//*Label 1075*/ 37096, // Rule ID 3695 //
   15773             :         GIM_CheckFeatures, GIFBS_HasLSE,
   15774             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::Release,
   15775             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   15776             :         // MIs[0] Rn
   15777             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   15778             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   15779             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   15780             :         // (atomic_load_umin:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_umin_64>><<P:Predicate_atomic_load_umin_64_release>>  =>  (LDUMINLX:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   15781             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDUMINLX,
   15782             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   15783             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   15784             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   15785             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   15786             :         GIR_EraseFromParent, /*InsnID*/0,
   15787             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15788             :         // GIR_Coverage, 3695,
   15789             :         GIR_Done,
   15790             :       // Label 1075: @37096
   15791             :       GIM_Try, /*On fail goto*//*Label 1076*/ 37143, // Rule ID 3696 //
   15792             :         GIM_CheckFeatures, GIFBS_HasLSE,
   15793             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::AcquireRelease,
   15794             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   15795             :         // MIs[0] Rn
   15796             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   15797             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   15798             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   15799             :         // (atomic_load_umin:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_umin_64>><<P:Predicate_atomic_load_umin_64_acq_rel>>  =>  (LDUMINALX:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   15800             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDUMINALX,
   15801             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   15802             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   15803             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   15804             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   15805             :         GIR_EraseFromParent, /*InsnID*/0,
   15806             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15807             :         // GIR_Coverage, 3696,
   15808             :         GIR_Done,
   15809             :       // Label 1076: @37143
   15810             :       GIM_Try, /*On fail goto*//*Label 1077*/ 37190, // Rule ID 3697 //
   15811             :         GIM_CheckFeatures, GIFBS_HasLSE,
   15812             :         GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::SequentiallyConsistent,
   15813             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   15814             :         // MIs[0] Rn
   15815             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/64,
   15816             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   15817             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   15818             :         // (atomic_load_umin:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)<<P:Predicate_atomic_load_umin_64>><<P:Predicate_atomic_load_umin_64_seq_cst>>  =>  (LDUMINALX:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, GPR64sp:{ *:[i64] }:$Rn)
   15819             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDUMINALX,
   15820             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   15821             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   15822             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   15823             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   15824             :         GIR_EraseFromParent, /*InsnID*/0,
   15825             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15826             :         // GIR_Coverage, 3697,
   15827             :         GIR_Done,
   15828             :       // Label 1077: @37190
   15829             :       GIM_Reject,
   15830             :     // Label 1072: @37191
   15831             :     GIM_Reject,
   15832             :     // Label 1055: @37192
   15833             :     GIM_Reject,
   15834             :     // Label 24: @37193
   15835             :     GIM_Try, /*On fail goto*//*Label 1078*/ 37225, // Rule ID 1837 //
   15836             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/2,
   15837             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_get_fpcr,
   15838             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   15839             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   15840             :       // (intrinsic_wo_chain:{ *:[i64] } 209:{ *:[iPTR] })  =>  (MRS:{ *:[i64] } 55840:{ *:[i32] })
   15841             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MRS,
   15842             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
   15843             :       GIR_AddImm, /*InsnID*/0, /*Imm*/55840,
   15844             :       GIR_EraseFromParent, /*InsnID*/0,
   15845             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15846             :       // GIR_Coverage, 1837,
   15847             :       GIR_Done,
   15848             :     // Label 1078: @37225
   15849             :     GIM_Try, /*On fail goto*//*Label 1079*/ 45783,
   15850             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
   15851             :       GIM_Try, /*On fail goto*//*Label 1080*/ 37318, // Rule ID 3099 //
   15852             :         GIM_CheckFeatures, GIFBS_HasFuseAES,
   15853             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_crypto_aesmc,
   15854             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   15855             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   15856             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   15857             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
   15858             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
   15859             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
   15860             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_crypto_aese,
   15861             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
   15862             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v16s8,
   15863             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   15864             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   15865             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   15866             :         // (intrinsic_wo_chain:{ *:[v16i8] } 196:{ *:[iPTR] }, (intrinsic_wo_chain:{ *:[v16i8] } 194:{ *:[iPTR] }, V128:{ *:[v16i8] }:$src1, V128:{ *:[v16i8] }:$src2))  =>  (AESMCrrTied:{ *:[v16i8] } (AESErr:{ *:[v16i8] } V128:{ *:[v16i8] }:$src1, V128:{ *:[v16i8] }:$src2))
   15867             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s8,
   15868             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::AESErr,
   15869             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   15870             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src1
   15871             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/3, // src2
   15872             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   15873             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::AESMCrrTied,
   15874             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   15875             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   15876             :         GIR_EraseFromParent, /*InsnID*/0,
   15877             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15878             :         // GIR_Coverage, 3099,
   15879             :         GIR_Done,
   15880             :       // Label 1080: @37318
   15881             :       GIM_Try, /*On fail goto*//*Label 1081*/ 37406, // Rule ID 3100 //
   15882             :         GIM_CheckFeatures, GIFBS_HasFuseAES,
   15883             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_crypto_aesimc,
   15884             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   15885             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   15886             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   15887             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
   15888             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
   15889             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
   15890             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_crypto_aesd,
   15891             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
   15892             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v16s8,
   15893             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   15894             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   15895             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   15896             :         // (intrinsic_wo_chain:{ *:[v16i8] } 195:{ *:[iPTR] }, (intrinsic_wo_chain:{ *:[v16i8] } 193:{ *:[iPTR] }, V128:{ *:[v16i8] }:$src1, V128:{ *:[v16i8] }:$src2))  =>  (AESIMCrrTied:{ *:[v16i8] } (AESDrr:{ *:[v16i8] } V128:{ *:[v16i8] }:$src1, V128:{ *:[v16i8] }:$src2))
   15897             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s8,
   15898             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::AESDrr,
   15899             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   15900             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/2, // src1
   15901             :         GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/3, // src2
   15902             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   15903             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::AESIMCrrTied,
   15904             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   15905             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   15906             :         GIR_EraseFromParent, /*InsnID*/0,
   15907             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15908             :         // GIR_Coverage, 3100,
   15909             :         GIR_Done,
   15910             :       // Label 1081: @37406
   15911             :       GIM_Try, /*On fail goto*//*Label 1082*/ 37446, // Rule ID 279 //
   15912             :         GIM_CheckFeatures, GIFBS_HasFullFP16,
   15913             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtas,
   15914             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   15915             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
   15916             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   15917             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR16RegClassID,
   15918             :         // (intrinsic_wo_chain:{ *:[i32] } 224:{ *:[iPTR] }, FPR16:{ *:[f16] }:$Rn)  =>  (FCVTASUWHr:{ *:[i32] } FPR16:{ *:[f16] }:$Rn)
   15919             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTASUWHr,
   15920             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   15921             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   15922             :         GIR_EraseFromParent, /*InsnID*/0,
   15923             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15924             :         // GIR_Coverage, 279,
   15925             :         GIR_Done,
   15926             :       // Label 1082: @37446
   15927             :       GIM_Try, /*On fail goto*//*Label 1083*/ 37486, // Rule ID 280 //
   15928             :         GIM_CheckFeatures, GIFBS_HasFullFP16,
   15929             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtas,
   15930             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   15931             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
   15932             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   15933             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR16RegClassID,
   15934             :         // (intrinsic_wo_chain:{ *:[i64] } 224:{ *:[iPTR] }, FPR16:{ *:[f16] }:$Rn)  =>  (FCVTASUXHr:{ *:[i64] } FPR16:{ *:[f16] }:$Rn)
   15935             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTASUXHr,
   15936             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   15937             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   15938             :         GIR_EraseFromParent, /*InsnID*/0,
   15939             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15940             :         // GIR_Coverage, 280,
   15941             :         GIR_Done,
   15942             :       // Label 1083: @37486
   15943             :       GIM_Try, /*On fail goto*//*Label 1084*/ 37526, // Rule ID 281 //
   15944             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   15945             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtas,
   15946             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   15947             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   15948             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   15949             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   15950             :         // (intrinsic_wo_chain:{ *:[i32] } 224:{ *:[iPTR] }, FPR32:{ *:[f32] }:$Rn)  =>  (FCVTASUWSr:{ *:[i32] } FPR32:{ *:[f32] }:$Rn)
   15951             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTASUWSr,
   15952             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   15953             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   15954             :         GIR_EraseFromParent, /*InsnID*/0,
   15955             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15956             :         // GIR_Coverage, 281,
   15957             :         GIR_Done,
   15958             :       // Label 1084: @37526
   15959             :       GIM_Try, /*On fail goto*//*Label 1085*/ 37566, // Rule ID 282 //
   15960             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   15961             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtas,
   15962             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   15963             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   15964             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   15965             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   15966             :         // (intrinsic_wo_chain:{ *:[i64] } 224:{ *:[iPTR] }, FPR32:{ *:[f32] }:$Rn)  =>  (FCVTASUXSr:{ *:[i64] } FPR32:{ *:[f32] }:$Rn)
   15967             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTASUXSr,
   15968             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   15969             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   15970             :         GIR_EraseFromParent, /*InsnID*/0,
   15971             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15972             :         // GIR_Coverage, 282,
   15973             :         GIR_Done,
   15974             :       // Label 1085: @37566
   15975             :       GIM_Try, /*On fail goto*//*Label 1086*/ 37606, // Rule ID 283 //
   15976             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   15977             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtas,
   15978             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   15979             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   15980             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   15981             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   15982             :         // (intrinsic_wo_chain:{ *:[i32] } 224:{ *:[iPTR] }, FPR64:{ *:[f64] }:$Rn)  =>  (FCVTASUWDr:{ *:[i32] } FPR64:{ *:[f64] }:$Rn)
   15983             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTASUWDr,
   15984             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   15985             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   15986             :         GIR_EraseFromParent, /*InsnID*/0,
   15987             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   15988             :         // GIR_Coverage, 283,
   15989             :         GIR_Done,
   15990             :       // Label 1086: @37606
   15991             :       GIM_Try, /*On fail goto*//*Label 1087*/ 37646, // Rule ID 284 //
   15992             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   15993             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtas,
   15994             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   15995             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   15996             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   15997             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   15998             :         // (intrinsic_wo_chain:{ *:[i64] } 224:{ *:[iPTR] }, FPR64:{ *:[f64] }:$Rn)  =>  (FCVTASUXDr:{ *:[i64] } FPR64:{ *:[f64] }:$Rn)
   15999             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTASUXDr,
   16000             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16001             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16002             :         GIR_EraseFromParent, /*InsnID*/0,
   16003             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16004             :         // GIR_Coverage, 284,
   16005             :         GIR_Done,
   16006             :       // Label 1087: @37646
   16007             :       GIM_Try, /*On fail goto*//*Label 1088*/ 37686, // Rule ID 285 //
   16008             :         GIM_CheckFeatures, GIFBS_HasFullFP16,
   16009             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtau,
   16010             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   16011             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
   16012             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   16013             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR16RegClassID,
   16014             :         // (intrinsic_wo_chain:{ *:[i32] } 225:{ *:[iPTR] }, FPR16:{ *:[f16] }:$Rn)  =>  (FCVTAUUWHr:{ *:[i32] } FPR16:{ *:[f16] }:$Rn)
   16015             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTAUUWHr,
   16016             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16017             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16018             :         GIR_EraseFromParent, /*InsnID*/0,
   16019             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16020             :         // GIR_Coverage, 285,
   16021             :         GIR_Done,
   16022             :       // Label 1088: @37686
   16023             :       GIM_Try, /*On fail goto*//*Label 1089*/ 37726, // Rule ID 286 //
   16024             :         GIM_CheckFeatures, GIFBS_HasFullFP16,
   16025             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtau,
   16026             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   16027             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
   16028             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   16029             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR16RegClassID,
   16030             :         // (intrinsic_wo_chain:{ *:[i64] } 225:{ *:[iPTR] }, FPR16:{ *:[f16] }:$Rn)  =>  (FCVTAUUXHr:{ *:[i64] } FPR16:{ *:[f16] }:$Rn)
   16031             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTAUUXHr,
   16032             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16033             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16034             :         GIR_EraseFromParent, /*InsnID*/0,
   16035             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16036             :         // GIR_Coverage, 286,
   16037             :         GIR_Done,
   16038             :       // Label 1089: @37726
   16039             :       GIM_Try, /*On fail goto*//*Label 1090*/ 37766, // Rule ID 287 //
   16040             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   16041             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtau,
   16042             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   16043             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   16044             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   16045             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   16046             :         // (intrinsic_wo_chain:{ *:[i32] } 225:{ *:[iPTR] }, FPR32:{ *:[f32] }:$Rn)  =>  (FCVTAUUWSr:{ *:[i32] } FPR32:{ *:[f32] }:$Rn)
   16047             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTAUUWSr,
   16048             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16049             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16050             :         GIR_EraseFromParent, /*InsnID*/0,
   16051             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16052             :         // GIR_Coverage, 287,
   16053             :         GIR_Done,
   16054             :       // Label 1090: @37766
   16055             :       GIM_Try, /*On fail goto*//*Label 1091*/ 37806, // Rule ID 288 //
   16056             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   16057             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtau,
   16058             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   16059             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   16060             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   16061             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   16062             :         // (intrinsic_wo_chain:{ *:[i64] } 225:{ *:[iPTR] }, FPR32:{ *:[f32] }:$Rn)  =>  (FCVTAUUXSr:{ *:[i64] } FPR32:{ *:[f32] }:$Rn)
   16063             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTAUUXSr,
   16064             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16065             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16066             :         GIR_EraseFromParent, /*InsnID*/0,
   16067             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16068             :         // GIR_Coverage, 288,
   16069             :         GIR_Done,
   16070             :       // Label 1091: @37806
   16071             :       GIM_Try, /*On fail goto*//*Label 1092*/ 37846, // Rule ID 289 //
   16072             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   16073             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtau,
   16074             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   16075             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   16076             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   16077             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   16078             :         // (intrinsic_wo_chain:{ *:[i32] } 225:{ *:[iPTR] }, FPR64:{ *:[f64] }:$Rn)  =>  (FCVTAUUWDr:{ *:[i32] } FPR64:{ *:[f64] }:$Rn)
   16079             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTAUUWDr,
   16080             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16081             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16082             :         GIR_EraseFromParent, /*InsnID*/0,
   16083             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16084             :         // GIR_Coverage, 289,
   16085             :         GIR_Done,
   16086             :       // Label 1092: @37846
   16087             :       GIM_Try, /*On fail goto*//*Label 1093*/ 37886, // Rule ID 290 //
   16088             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   16089             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtau,
   16090             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   16091             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   16092             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   16093             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   16094             :         // (intrinsic_wo_chain:{ *:[i64] } 225:{ *:[iPTR] }, FPR64:{ *:[f64] }:$Rn)  =>  (FCVTAUUXDr:{ *:[i64] } FPR64:{ *:[f64] }:$Rn)
   16095             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTAUUXDr,
   16096             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16097             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16098             :         GIR_EraseFromParent, /*InsnID*/0,
   16099             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16100             :         // GIR_Coverage, 290,
   16101             :         GIR_Done,
   16102             :       // Label 1093: @37886
   16103             :       GIM_Try, /*On fail goto*//*Label 1094*/ 37926, // Rule ID 291 //
   16104             :         GIM_CheckFeatures, GIFBS_HasFullFP16,
   16105             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtms,
   16106             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   16107             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
   16108             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   16109             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR16RegClassID,
   16110             :         // (intrinsic_wo_chain:{ *:[i32] } 226:{ *:[iPTR] }, FPR16:{ *:[f16] }:$Rn)  =>  (FCVTMSUWHr:{ *:[i32] } FPR16:{ *:[f16] }:$Rn)
   16111             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTMSUWHr,
   16112             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16113             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16114             :         GIR_EraseFromParent, /*InsnID*/0,
   16115             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16116             :         // GIR_Coverage, 291,
   16117             :         GIR_Done,
   16118             :       // Label 1094: @37926
   16119             :       GIM_Try, /*On fail goto*//*Label 1095*/ 37966, // Rule ID 292 //
   16120             :         GIM_CheckFeatures, GIFBS_HasFullFP16,
   16121             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtms,
   16122             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   16123             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
   16124             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   16125             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR16RegClassID,
   16126             :         // (intrinsic_wo_chain:{ *:[i64] } 226:{ *:[iPTR] }, FPR16:{ *:[f16] }:$Rn)  =>  (FCVTMSUXHr:{ *:[i64] } FPR16:{ *:[f16] }:$Rn)
   16127             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTMSUXHr,
   16128             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16129             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16130             :         GIR_EraseFromParent, /*InsnID*/0,
   16131             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16132             :         // GIR_Coverage, 292,
   16133             :         GIR_Done,
   16134             :       // Label 1095: @37966
   16135             :       GIM_Try, /*On fail goto*//*Label 1096*/ 38006, // Rule ID 293 //
   16136             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   16137             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtms,
   16138             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   16139             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   16140             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   16141             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   16142             :         // (intrinsic_wo_chain:{ *:[i32] } 226:{ *:[iPTR] }, FPR32:{ *:[f32] }:$Rn)  =>  (FCVTMSUWSr:{ *:[i32] } FPR32:{ *:[f32] }:$Rn)
   16143             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTMSUWSr,
   16144             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16145             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16146             :         GIR_EraseFromParent, /*InsnID*/0,
   16147             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16148             :         // GIR_Coverage, 293,
   16149             :         GIR_Done,
   16150             :       // Label 1096: @38006
   16151             :       GIM_Try, /*On fail goto*//*Label 1097*/ 38046, // Rule ID 294 //
   16152             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   16153             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtms,
   16154             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   16155             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   16156             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   16157             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   16158             :         // (intrinsic_wo_chain:{ *:[i64] } 226:{ *:[iPTR] }, FPR32:{ *:[f32] }:$Rn)  =>  (FCVTMSUXSr:{ *:[i64] } FPR32:{ *:[f32] }:$Rn)
   16159             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTMSUXSr,
   16160             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16161             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16162             :         GIR_EraseFromParent, /*InsnID*/0,
   16163             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16164             :         // GIR_Coverage, 294,
   16165             :         GIR_Done,
   16166             :       // Label 1097: @38046
   16167             :       GIM_Try, /*On fail goto*//*Label 1098*/ 38086, // Rule ID 295 //
   16168             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   16169             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtms,
   16170             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   16171             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   16172             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   16173             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   16174             :         // (intrinsic_wo_chain:{ *:[i32] } 226:{ *:[iPTR] }, FPR64:{ *:[f64] }:$Rn)  =>  (FCVTMSUWDr:{ *:[i32] } FPR64:{ *:[f64] }:$Rn)
   16175             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTMSUWDr,
   16176             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16177             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16178             :         GIR_EraseFromParent, /*InsnID*/0,
   16179             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16180             :         // GIR_Coverage, 295,
   16181             :         GIR_Done,
   16182             :       // Label 1098: @38086
   16183             :       GIM_Try, /*On fail goto*//*Label 1099*/ 38126, // Rule ID 296 //
   16184             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   16185             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtms,
   16186             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   16187             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   16188             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   16189             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   16190             :         // (intrinsic_wo_chain:{ *:[i64] } 226:{ *:[iPTR] }, FPR64:{ *:[f64] }:$Rn)  =>  (FCVTMSUXDr:{ *:[i64] } FPR64:{ *:[f64] }:$Rn)
   16191             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTMSUXDr,
   16192             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16193             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16194             :         GIR_EraseFromParent, /*InsnID*/0,
   16195             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16196             :         // GIR_Coverage, 296,
   16197             :         GIR_Done,
   16198             :       // Label 1099: @38126
   16199             :       GIM_Try, /*On fail goto*//*Label 1100*/ 38166, // Rule ID 297 //
   16200             :         GIM_CheckFeatures, GIFBS_HasFullFP16,
   16201             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtmu,
   16202             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   16203             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
   16204             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   16205             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR16RegClassID,
   16206             :         // (intrinsic_wo_chain:{ *:[i32] } 227:{ *:[iPTR] }, FPR16:{ *:[f16] }:$Rn)  =>  (FCVTMUUWHr:{ *:[i32] } FPR16:{ *:[f16] }:$Rn)
   16207             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTMUUWHr,
   16208             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16209             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16210             :         GIR_EraseFromParent, /*InsnID*/0,
   16211             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16212             :         // GIR_Coverage, 297,
   16213             :         GIR_Done,
   16214             :       // Label 1100: @38166
   16215             :       GIM_Try, /*On fail goto*//*Label 1101*/ 38206, // Rule ID 298 //
   16216             :         GIM_CheckFeatures, GIFBS_HasFullFP16,
   16217             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtmu,
   16218             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   16219             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
   16220             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   16221             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR16RegClassID,
   16222             :         // (intrinsic_wo_chain:{ *:[i64] } 227:{ *:[iPTR] }, FPR16:{ *:[f16] }:$Rn)  =>  (FCVTMUUXHr:{ *:[i64] } FPR16:{ *:[f16] }:$Rn)
   16223             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTMUUXHr,
   16224             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16225             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16226             :         GIR_EraseFromParent, /*InsnID*/0,
   16227             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16228             :         // GIR_Coverage, 298,
   16229             :         GIR_Done,
   16230             :       // Label 1101: @38206
   16231             :       GIM_Try, /*On fail goto*//*Label 1102*/ 38246, // Rule ID 299 //
   16232             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   16233             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtmu,
   16234             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   16235             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   16236             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   16237             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   16238             :         // (intrinsic_wo_chain:{ *:[i32] } 227:{ *:[iPTR] }, FPR32:{ *:[f32] }:$Rn)  =>  (FCVTMUUWSr:{ *:[i32] } FPR32:{ *:[f32] }:$Rn)
   16239             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTMUUWSr,
   16240             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16241             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16242             :         GIR_EraseFromParent, /*InsnID*/0,
   16243             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16244             :         // GIR_Coverage, 299,
   16245             :         GIR_Done,
   16246             :       // Label 1102: @38246
   16247             :       GIM_Try, /*On fail goto*//*Label 1103*/ 38286, // Rule ID 300 //
   16248             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   16249             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtmu,
   16250             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   16251             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   16252             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   16253             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   16254             :         // (intrinsic_wo_chain:{ *:[i64] } 227:{ *:[iPTR] }, FPR32:{ *:[f32] }:$Rn)  =>  (FCVTMUUXSr:{ *:[i64] } FPR32:{ *:[f32] }:$Rn)
   16255             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTMUUXSr,
   16256             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16257             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16258             :         GIR_EraseFromParent, /*InsnID*/0,
   16259             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16260             :         // GIR_Coverage, 300,
   16261             :         GIR_Done,
   16262             :       // Label 1103: @38286
   16263             :       GIM_Try, /*On fail goto*//*Label 1104*/ 38326, // Rule ID 301 //
   16264             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   16265             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtmu,
   16266             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   16267             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   16268             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   16269             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   16270             :         // (intrinsic_wo_chain:{ *:[i32] } 227:{ *:[iPTR] }, FPR64:{ *:[f64] }:$Rn)  =>  (FCVTMUUWDr:{ *:[i32] } FPR64:{ *:[f64] }:$Rn)
   16271             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTMUUWDr,
   16272             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16273             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16274             :         GIR_EraseFromParent, /*InsnID*/0,
   16275             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16276             :         // GIR_Coverage, 301,
   16277             :         GIR_Done,
   16278             :       // Label 1104: @38326
   16279             :       GIM_Try, /*On fail goto*//*Label 1105*/ 38366, // Rule ID 302 //
   16280             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   16281             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtmu,
   16282             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   16283             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   16284             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   16285             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   16286             :         // (intrinsic_wo_chain:{ *:[i64] } 227:{ *:[iPTR] }, FPR64:{ *:[f64] }:$Rn)  =>  (FCVTMUUXDr:{ *:[i64] } FPR64:{ *:[f64] }:$Rn)
   16287             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTMUUXDr,
   16288             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16289             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16290             :         GIR_EraseFromParent, /*InsnID*/0,
   16291             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16292             :         // GIR_Coverage, 302,
   16293             :         GIR_Done,
   16294             :       // Label 1105: @38366
   16295             :       GIM_Try, /*On fail goto*//*Label 1106*/ 38406, // Rule ID 303 //
   16296             :         GIM_CheckFeatures, GIFBS_HasFullFP16,
   16297             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtns,
   16298             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   16299             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
   16300             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   16301             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR16RegClassID,
   16302             :         // (intrinsic_wo_chain:{ *:[i32] } 228:{ *:[iPTR] }, FPR16:{ *:[f16] }:$Rn)  =>  (FCVTNSUWHr:{ *:[i32] } FPR16:{ *:[f16] }:$Rn)
   16303             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTNSUWHr,
   16304             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16305             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16306             :         GIR_EraseFromParent, /*InsnID*/0,
   16307             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16308             :         // GIR_Coverage, 303,
   16309             :         GIR_Done,
   16310             :       // Label 1106: @38406
   16311             :       GIM_Try, /*On fail goto*//*Label 1107*/ 38446, // Rule ID 304 //
   16312             :         GIM_CheckFeatures, GIFBS_HasFullFP16,
   16313             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtns,
   16314             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   16315             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
   16316             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   16317             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR16RegClassID,
   16318             :         // (intrinsic_wo_chain:{ *:[i64] } 228:{ *:[iPTR] }, FPR16:{ *:[f16] }:$Rn)  =>  (FCVTNSUXHr:{ *:[i64] } FPR16:{ *:[f16] }:$Rn)
   16319             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTNSUXHr,
   16320             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16321             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16322             :         GIR_EraseFromParent, /*InsnID*/0,
   16323             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16324             :         // GIR_Coverage, 304,
   16325             :         GIR_Done,
   16326             :       // Label 1107: @38446
   16327             :       GIM_Try, /*On fail goto*//*Label 1108*/ 38486, // Rule ID 305 //
   16328             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   16329             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtns,
   16330             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   16331             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   16332             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   16333             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   16334             :         // (intrinsic_wo_chain:{ *:[i32] } 228:{ *:[iPTR] }, FPR32:{ *:[f32] }:$Rn)  =>  (FCVTNSUWSr:{ *:[i32] } FPR32:{ *:[f32] }:$Rn)
   16335             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTNSUWSr,
   16336             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16337             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16338             :         GIR_EraseFromParent, /*InsnID*/0,
   16339             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16340             :         // GIR_Coverage, 305,
   16341             :         GIR_Done,
   16342             :       // Label 1108: @38486
   16343             :       GIM_Try, /*On fail goto*//*Label 1109*/ 38526, // Rule ID 306 //
   16344             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   16345             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtns,
   16346             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   16347             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   16348             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   16349             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   16350             :         // (intrinsic_wo_chain:{ *:[i64] } 228:{ *:[iPTR] }, FPR32:{ *:[f32] }:$Rn)  =>  (FCVTNSUXSr:{ *:[i64] } FPR32:{ *:[f32] }:$Rn)
   16351             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTNSUXSr,
   16352             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16353             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16354             :         GIR_EraseFromParent, /*InsnID*/0,
   16355             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16356             :         // GIR_Coverage, 306,
   16357             :         GIR_Done,
   16358             :       // Label 1109: @38526
   16359             :       GIM_Try, /*On fail goto*//*Label 1110*/ 38566, // Rule ID 307 //
   16360             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   16361             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtns,
   16362             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   16363             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   16364             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   16365             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   16366             :         // (intrinsic_wo_chain:{ *:[i32] } 228:{ *:[iPTR] }, FPR64:{ *:[f64] }:$Rn)  =>  (FCVTNSUWDr:{ *:[i32] } FPR64:{ *:[f64] }:$Rn)
   16367             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTNSUWDr,
   16368             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16369             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16370             :         GIR_EraseFromParent, /*InsnID*/0,
   16371             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16372             :         // GIR_Coverage, 307,
   16373             :         GIR_Done,
   16374             :       // Label 1110: @38566
   16375             :       GIM_Try, /*On fail goto*//*Label 1111*/ 38606, // Rule ID 308 //
   16376             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   16377             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtns,
   16378             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   16379             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   16380             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   16381             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   16382             :         // (intrinsic_wo_chain:{ *:[i64] } 228:{ *:[iPTR] }, FPR64:{ *:[f64] }:$Rn)  =>  (FCVTNSUXDr:{ *:[i64] } FPR64:{ *:[f64] }:$Rn)
   16383             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTNSUXDr,
   16384             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16385             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16386             :         GIR_EraseFromParent, /*InsnID*/0,
   16387             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16388             :         // GIR_Coverage, 308,
   16389             :         GIR_Done,
   16390             :       // Label 1111: @38606
   16391             :       GIM_Try, /*On fail goto*//*Label 1112*/ 38646, // Rule ID 309 //
   16392             :         GIM_CheckFeatures, GIFBS_HasFullFP16,
   16393             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtnu,
   16394             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   16395             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
   16396             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   16397             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR16RegClassID,
   16398             :         // (intrinsic_wo_chain:{ *:[i32] } 229:{ *:[iPTR] }, FPR16:{ *:[f16] }:$Rn)  =>  (FCVTNUUWHr:{ *:[i32] } FPR16:{ *:[f16] }:$Rn)
   16399             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTNUUWHr,
   16400             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16401             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16402             :         GIR_EraseFromParent, /*InsnID*/0,
   16403             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16404             :         // GIR_Coverage, 309,
   16405             :         GIR_Done,
   16406             :       // Label 1112: @38646
   16407             :       GIM_Try, /*On fail goto*//*Label 1113*/ 38686, // Rule ID 310 //
   16408             :         GIM_CheckFeatures, GIFBS_HasFullFP16,
   16409             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtnu,
   16410             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   16411             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
   16412             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   16413             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR16RegClassID,
   16414             :         // (intrinsic_wo_chain:{ *:[i64] } 229:{ *:[iPTR] }, FPR16:{ *:[f16] }:$Rn)  =>  (FCVTNUUXHr:{ *:[i64] } FPR16:{ *:[f16] }:$Rn)
   16415             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTNUUXHr,
   16416             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16417             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16418             :         GIR_EraseFromParent, /*InsnID*/0,
   16419             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16420             :         // GIR_Coverage, 310,
   16421             :         GIR_Done,
   16422             :       // Label 1113: @38686
   16423             :       GIM_Try, /*On fail goto*//*Label 1114*/ 38726, // Rule ID 311 //
   16424             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   16425             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtnu,
   16426             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   16427             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   16428             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   16429             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   16430             :         // (intrinsic_wo_chain:{ *:[i32] } 229:{ *:[iPTR] }, FPR32:{ *:[f32] }:$Rn)  =>  (FCVTNUUWSr:{ *:[i32] } FPR32:{ *:[f32] }:$Rn)
   16431             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTNUUWSr,
   16432             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16433             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16434             :         GIR_EraseFromParent, /*InsnID*/0,
   16435             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16436             :         // GIR_Coverage, 311,
   16437             :         GIR_Done,
   16438             :       // Label 1114: @38726
   16439             :       GIM_Try, /*On fail goto*//*Label 1115*/ 38766, // Rule ID 312 //
   16440             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   16441             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtnu,
   16442             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   16443             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   16444             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   16445             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   16446             :         // (intrinsic_wo_chain:{ *:[i64] } 229:{ *:[iPTR] }, FPR32:{ *:[f32] }:$Rn)  =>  (FCVTNUUXSr:{ *:[i64] } FPR32:{ *:[f32] }:$Rn)
   16447             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTNUUXSr,
   16448             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16449             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16450             :         GIR_EraseFromParent, /*InsnID*/0,
   16451             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16452             :         // GIR_Coverage, 312,
   16453             :         GIR_Done,
   16454             :       // Label 1115: @38766
   16455             :       GIM_Try, /*On fail goto*//*Label 1116*/ 38806, // Rule ID 313 //
   16456             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   16457             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtnu,
   16458             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   16459             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   16460             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   16461             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   16462             :         // (intrinsic_wo_chain:{ *:[i32] } 229:{ *:[iPTR] }, FPR64:{ *:[f64] }:$Rn)  =>  (FCVTNUUWDr:{ *:[i32] } FPR64:{ *:[f64] }:$Rn)
   16463             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTNUUWDr,
   16464             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16465             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16466             :         GIR_EraseFromParent, /*InsnID*/0,
   16467             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16468             :         // GIR_Coverage, 313,
   16469             :         GIR_Done,
   16470             :       // Label 1116: @38806
   16471             :       GIM_Try, /*On fail goto*//*Label 1117*/ 38846, // Rule ID 314 //
   16472             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   16473             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtnu,
   16474             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   16475             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   16476             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   16477             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   16478             :         // (intrinsic_wo_chain:{ *:[i64] } 229:{ *:[iPTR] }, FPR64:{ *:[f64] }:$Rn)  =>  (FCVTNUUXDr:{ *:[i64] } FPR64:{ *:[f64] }:$Rn)
   16479             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTNUUXDr,
   16480             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16481             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16482             :         GIR_EraseFromParent, /*InsnID*/0,
   16483             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16484             :         // GIR_Coverage, 314,
   16485             :         GIR_Done,
   16486             :       // Label 1117: @38846
   16487             :       GIM_Try, /*On fail goto*//*Label 1118*/ 38886, // Rule ID 315 //
   16488             :         GIM_CheckFeatures, GIFBS_HasFullFP16,
   16489             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtps,
   16490             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   16491             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
   16492             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   16493             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR16RegClassID,
   16494             :         // (intrinsic_wo_chain:{ *:[i32] } 230:{ *:[iPTR] }, FPR16:{ *:[f16] }:$Rn)  =>  (FCVTPSUWHr:{ *:[i32] } FPR16:{ *:[f16] }:$Rn)
   16495             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTPSUWHr,
   16496             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16497             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16498             :         GIR_EraseFromParent, /*InsnID*/0,
   16499             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16500             :         // GIR_Coverage, 315,
   16501             :         GIR_Done,
   16502             :       // Label 1118: @38886
   16503             :       GIM_Try, /*On fail goto*//*Label 1119*/ 38926, // Rule ID 316 //
   16504             :         GIM_CheckFeatures, GIFBS_HasFullFP16,
   16505             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtps,
   16506             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   16507             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
   16508             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   16509             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR16RegClassID,
   16510             :         // (intrinsic_wo_chain:{ *:[i64] } 230:{ *:[iPTR] }, FPR16:{ *:[f16] }:$Rn)  =>  (FCVTPSUXHr:{ *:[i64] } FPR16:{ *:[f16] }:$Rn)
   16511             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTPSUXHr,
   16512             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16513             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16514             :         GIR_EraseFromParent, /*InsnID*/0,
   16515             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16516             :         // GIR_Coverage, 316,
   16517             :         GIR_Done,
   16518             :       // Label 1119: @38926
   16519             :       GIM_Try, /*On fail goto*//*Label 1120*/ 38966, // Rule ID 317 //
   16520             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   16521             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtps,
   16522             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   16523             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   16524             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   16525             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   16526             :         // (intrinsic_wo_chain:{ *:[i32] } 230:{ *:[iPTR] }, FPR32:{ *:[f32] }:$Rn)  =>  (FCVTPSUWSr:{ *:[i32] } FPR32:{ *:[f32] }:$Rn)
   16527             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTPSUWSr,
   16528             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16529             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16530             :         GIR_EraseFromParent, /*InsnID*/0,
   16531             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16532             :         // GIR_Coverage, 317,
   16533             :         GIR_Done,
   16534             :       // Label 1120: @38966
   16535             :       GIM_Try, /*On fail goto*//*Label 1121*/ 39006, // Rule ID 318 //
   16536             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   16537             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtps,
   16538             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   16539             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   16540             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   16541             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   16542             :         // (intrinsic_wo_chain:{ *:[i64] } 230:{ *:[iPTR] }, FPR32:{ *:[f32] }:$Rn)  =>  (FCVTPSUXSr:{ *:[i64] } FPR32:{ *:[f32] }:$Rn)
   16543             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTPSUXSr,
   16544             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16545             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16546             :         GIR_EraseFromParent, /*InsnID*/0,
   16547             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16548             :         // GIR_Coverage, 318,
   16549             :         GIR_Done,
   16550             :       // Label 1121: @39006
   16551             :       GIM_Try, /*On fail goto*//*Label 1122*/ 39046, // Rule ID 319 //
   16552             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   16553             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtps,
   16554             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   16555             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   16556             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   16557             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   16558             :         // (intrinsic_wo_chain:{ *:[i32] } 230:{ *:[iPTR] }, FPR64:{ *:[f64] }:$Rn)  =>  (FCVTPSUWDr:{ *:[i32] } FPR64:{ *:[f64] }:$Rn)
   16559             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTPSUWDr,
   16560             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16561             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16562             :         GIR_EraseFromParent, /*InsnID*/0,
   16563             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16564             :         // GIR_Coverage, 319,
   16565             :         GIR_Done,
   16566             :       // Label 1122: @39046
   16567             :       GIM_Try, /*On fail goto*//*Label 1123*/ 39086, // Rule ID 320 //
   16568             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   16569             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtps,
   16570             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   16571             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   16572             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   16573             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   16574             :         // (intrinsic_wo_chain:{ *:[i64] } 230:{ *:[iPTR] }, FPR64:{ *:[f64] }:$Rn)  =>  (FCVTPSUXDr:{ *:[i64] } FPR64:{ *:[f64] }:$Rn)
   16575             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTPSUXDr,
   16576             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16577             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16578             :         GIR_EraseFromParent, /*InsnID*/0,
   16579             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16580             :         // GIR_Coverage, 320,
   16581             :         GIR_Done,
   16582             :       // Label 1123: @39086
   16583             :       GIM_Try, /*On fail goto*//*Label 1124*/ 39126, // Rule ID 321 //
   16584             :         GIM_CheckFeatures, GIFBS_HasFullFP16,
   16585             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtpu,
   16586             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   16587             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
   16588             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   16589             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR16RegClassID,
   16590             :         // (intrinsic_wo_chain:{ *:[i32] } 231:{ *:[iPTR] }, FPR16:{ *:[f16] }:$Rn)  =>  (FCVTPUUWHr:{ *:[i32] } FPR16:{ *:[f16] }:$Rn)
   16591             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTPUUWHr,
   16592             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16593             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16594             :         GIR_EraseFromParent, /*InsnID*/0,
   16595             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16596             :         // GIR_Coverage, 321,
   16597             :         GIR_Done,
   16598             :       // Label 1124: @39126
   16599             :       GIM_Try, /*On fail goto*//*Label 1125*/ 39166, // Rule ID 322 //
   16600             :         GIM_CheckFeatures, GIFBS_HasFullFP16,
   16601             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtpu,
   16602             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   16603             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
   16604             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   16605             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR16RegClassID,
   16606             :         // (intrinsic_wo_chain:{ *:[i64] } 231:{ *:[iPTR] }, FPR16:{ *:[f16] }:$Rn)  =>  (FCVTPUUXHr:{ *:[i64] } FPR16:{ *:[f16] }:$Rn)
   16607             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTPUUXHr,
   16608             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16609             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16610             :         GIR_EraseFromParent, /*InsnID*/0,
   16611             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16612             :         // GIR_Coverage, 322,
   16613             :         GIR_Done,
   16614             :       // Label 1125: @39166
   16615             :       GIM_Try, /*On fail goto*//*Label 1126*/ 39206, // Rule ID 323 //
   16616             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   16617             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtpu,
   16618             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   16619             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   16620             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   16621             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   16622             :         // (intrinsic_wo_chain:{ *:[i32] } 231:{ *:[iPTR] }, FPR32:{ *:[f32] }:$Rn)  =>  (FCVTPUUWSr:{ *:[i32] } FPR32:{ *:[f32] }:$Rn)
   16623             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTPUUWSr,
   16624             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16625             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16626             :         GIR_EraseFromParent, /*InsnID*/0,
   16627             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16628             :         // GIR_Coverage, 323,
   16629             :         GIR_Done,
   16630             :       // Label 1126: @39206
   16631             :       GIM_Try, /*On fail goto*//*Label 1127*/ 39246, // Rule ID 324 //
   16632             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   16633             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtpu,
   16634             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   16635             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   16636             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   16637             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   16638             :         // (intrinsic_wo_chain:{ *:[i64] } 231:{ *:[iPTR] }, FPR32:{ *:[f32] }:$Rn)  =>  (FCVTPUUXSr:{ *:[i64] } FPR32:{ *:[f32] }:$Rn)
   16639             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTPUUXSr,
   16640             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16641             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16642             :         GIR_EraseFromParent, /*InsnID*/0,
   16643             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16644             :         // GIR_Coverage, 324,
   16645             :         GIR_Done,
   16646             :       // Label 1127: @39246
   16647             :       GIM_Try, /*On fail goto*//*Label 1128*/ 39286, // Rule ID 325 //
   16648             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   16649             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtpu,
   16650             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   16651             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   16652             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   16653             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   16654             :         // (intrinsic_wo_chain:{ *:[i32] } 231:{ *:[iPTR] }, FPR64:{ *:[f64] }:$Rn)  =>  (FCVTPUUWDr:{ *:[i32] } FPR64:{ *:[f64] }:$Rn)
   16655             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTPUUWDr,
   16656             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16657             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16658             :         GIR_EraseFromParent, /*InsnID*/0,
   16659             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16660             :         // GIR_Coverage, 325,
   16661             :         GIR_Done,
   16662             :       // Label 1128: @39286
   16663             :       GIM_Try, /*On fail goto*//*Label 1129*/ 39326, // Rule ID 326 //
   16664             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   16665             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtpu,
   16666             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   16667             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   16668             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   16669             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   16670             :         // (intrinsic_wo_chain:{ *:[i64] } 231:{ *:[iPTR] }, FPR64:{ *:[f64] }:$Rn)  =>  (FCVTPUUXDr:{ *:[i64] } FPR64:{ *:[f64] }:$Rn)
   16671             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTPUUXDr,
   16672             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16673             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16674             :         GIR_EraseFromParent, /*InsnID*/0,
   16675             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16676             :         // GIR_Coverage, 326,
   16677             :         GIR_Done,
   16678             :       // Label 1129: @39326
   16679             :       GIM_Try, /*On fail goto*//*Label 1130*/ 39366, // Rule ID 399 //
   16680             :         GIM_CheckFeatures, GIFBS_HasFullFP16,
   16681             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frintn,
   16682             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
   16683             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
   16684             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR16RegClassID,
   16685             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR16RegClassID,
   16686             :         // (intrinsic_wo_chain:{ *:[f16] } 251:{ *:[iPTR] }, FPR16:{ *:[f16] }:$Rn)  =>  (FRINTNHr:{ *:[f16] } FPR16:{ *:[f16] }:$Rn)
   16687             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRINTNHr,
   16688             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16689             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16690             :         GIR_EraseFromParent, /*InsnID*/0,
   16691             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16692             :         // GIR_Coverage, 399,
   16693             :         GIR_Done,
   16694             :       // Label 1130: @39366
   16695             :       GIM_Try, /*On fail goto*//*Label 1131*/ 39406, // Rule ID 400 //
   16696             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   16697             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frintn,
   16698             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   16699             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   16700             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   16701             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   16702             :         // (intrinsic_wo_chain:{ *:[f32] } 251:{ *:[iPTR] }, FPR32:{ *:[f32] }:$Rn)  =>  (FRINTNSr:{ *:[f32] } FPR32:{ *:[f32] }:$Rn)
   16703             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRINTNSr,
   16704             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16705             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16706             :         GIR_EraseFromParent, /*InsnID*/0,
   16707             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16708             :         // GIR_Coverage, 400,
   16709             :         GIR_Done,
   16710             :       // Label 1131: @39406
   16711             :       GIM_Try, /*On fail goto*//*Label 1132*/ 39446, // Rule ID 401 //
   16712             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   16713             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frintn,
   16714             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   16715             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   16716             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   16717             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   16718             :         // (intrinsic_wo_chain:{ *:[f64] } 251:{ *:[iPTR] }, FPR64:{ *:[f64] }:$Rn)  =>  (FRINTNDr:{ *:[f64] } FPR64:{ *:[f64] }:$Rn)
   16719             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRINTNDr,
   16720             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16721             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16722             :         GIR_EraseFromParent, /*InsnID*/0,
   16723             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16724             :         // GIR_Coverage, 401,
   16725             :         GIR_Done,
   16726             :       // Label 1132: @39446
   16727             :       GIM_Try, /*On fail goto*//*Label 1133*/ 39486, // Rule ID 482 //
   16728             :         GIM_CheckFeatures, GIFBS_HasNEON,
   16729             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_cls,
   16730             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   16731             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
   16732             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   16733             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   16734             :         // (intrinsic_wo_chain:{ *:[v8i8] } 219:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn)  =>  (CLSv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn)
   16735             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CLSv8i8,
   16736             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16737             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16738             :         GIR_EraseFromParent, /*InsnID*/0,
   16739             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16740             :         // GIR_Coverage, 482,
   16741             :         GIR_Done,
   16742             :       // Label 1133: @39486
   16743             :       GIM_Try, /*On fail goto*//*Label 1134*/ 39526, // Rule ID 483 //
   16744             :         GIM_CheckFeatures, GIFBS_HasNEON,
   16745             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_cls,
   16746             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   16747             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   16748             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   16749             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   16750             :         // (intrinsic_wo_chain:{ *:[v16i8] } 219:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn)  =>  (CLSv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn)
   16751             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CLSv16i8,
   16752             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16753             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16754             :         GIR_EraseFromParent, /*InsnID*/0,
   16755             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16756             :         // GIR_Coverage, 483,
   16757             :         GIR_Done,
   16758             :       // Label 1134: @39526
   16759             :       GIM_Try, /*On fail goto*//*Label 1135*/ 39566, // Rule ID 484 //
   16760             :         GIM_CheckFeatures, GIFBS_HasNEON,
   16761             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_cls,
   16762             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   16763             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   16764             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   16765             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   16766             :         // (intrinsic_wo_chain:{ *:[v4i16] } 219:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn)  =>  (CLSv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn)
   16767             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CLSv4i16,
   16768             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16769             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16770             :         GIR_EraseFromParent, /*InsnID*/0,
   16771             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16772             :         // GIR_Coverage, 484,
   16773             :         GIR_Done,
   16774             :       // Label 1135: @39566
   16775             :       GIM_Try, /*On fail goto*//*Label 1136*/ 39606, // Rule ID 485 //
   16776             :         GIM_CheckFeatures, GIFBS_HasNEON,
   16777             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_cls,
   16778             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   16779             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   16780             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   16781             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   16782             :         // (intrinsic_wo_chain:{ *:[v8i16] } 219:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn)  =>  (CLSv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn)
   16783             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CLSv8i16,
   16784             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16785             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16786             :         GIR_EraseFromParent, /*InsnID*/0,
   16787             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16788             :         // GIR_Coverage, 485,
   16789             :         GIR_Done,
   16790             :       // Label 1136: @39606
   16791             :       GIM_Try, /*On fail goto*//*Label 1137*/ 39646, // Rule ID 486 //
   16792             :         GIM_CheckFeatures, GIFBS_HasNEON,
   16793             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_cls,
   16794             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   16795             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   16796             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   16797             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   16798             :         // (intrinsic_wo_chain:{ *:[v2i32] } 219:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn)  =>  (CLSv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn)
   16799             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CLSv2i32,
   16800             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16801             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16802             :         GIR_EraseFromParent, /*InsnID*/0,
   16803             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16804             :         // GIR_Coverage, 486,
   16805             :         GIR_Done,
   16806             :       // Label 1137: @39646
   16807             :       GIM_Try, /*On fail goto*//*Label 1138*/ 39686, // Rule ID 487 //
   16808             :         GIM_CheckFeatures, GIFBS_HasNEON,
   16809             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_cls,
   16810             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   16811             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   16812             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   16813             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   16814             :         // (intrinsic_wo_chain:{ *:[v4i32] } 219:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn)  =>  (CLSv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn)
   16815             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CLSv4i32,
   16816             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16817             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16818             :         GIR_EraseFromParent, /*InsnID*/0,
   16819             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16820             :         // GIR_Coverage, 487,
   16821             :         GIR_Done,
   16822             :       // Label 1138: @39686
   16823             :       GIM_Try, /*On fail goto*//*Label 1139*/ 39726, // Rule ID 561 //
   16824             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   16825             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtas,
   16826             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   16827             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   16828             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   16829             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   16830             :         // (intrinsic_wo_chain:{ *:[v4i16] } 224:{ *:[iPTR] }, V64:{ *:[v4f16] }:$Rn)  =>  (FCVTASv4f16:{ *:[v4i16] } V64:{ *:[v4f16] }:$Rn)
   16831             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTASv4f16,
   16832             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16833             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16834             :         GIR_EraseFromParent, /*InsnID*/0,
   16835             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16836             :         // GIR_Coverage, 561,
   16837             :         GIR_Done,
   16838             :       // Label 1139: @39726
   16839             :       GIM_Try, /*On fail goto*//*Label 1140*/ 39766, // Rule ID 562 //
   16840             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   16841             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtas,
   16842             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   16843             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   16844             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   16845             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   16846             :         // (intrinsic_wo_chain:{ *:[v8i16] } 224:{ *:[iPTR] }, V128:{ *:[v8f16] }:$Rn)  =>  (FCVTASv8f16:{ *:[v8i16] } V128:{ *:[v8f16] }:$Rn)
   16847             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTASv8f16,
   16848             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16849             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16850             :         GIR_EraseFromParent, /*InsnID*/0,
   16851             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16852             :         // GIR_Coverage, 562,
   16853             :         GIR_Done,
   16854             :       // Label 1140: @39766
   16855             :       GIM_Try, /*On fail goto*//*Label 1141*/ 39806, // Rule ID 563 //
   16856             :         GIM_CheckFeatures, GIFBS_HasNEON,
   16857             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtas,
   16858             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   16859             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   16860             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   16861             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   16862             :         // (intrinsic_wo_chain:{ *:[v2i32] } 224:{ *:[iPTR] }, V64:{ *:[v2f32] }:$Rn)  =>  (FCVTASv2f32:{ *:[v2i32] } V64:{ *:[v2f32] }:$Rn)
   16863             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTASv2f32,
   16864             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16865             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16866             :         GIR_EraseFromParent, /*InsnID*/0,
   16867             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16868             :         // GIR_Coverage, 563,
   16869             :         GIR_Done,
   16870             :       // Label 1141: @39806
   16871             :       GIM_Try, /*On fail goto*//*Label 1142*/ 39846, // Rule ID 564 //
   16872             :         GIM_CheckFeatures, GIFBS_HasNEON,
   16873             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtas,
   16874             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   16875             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   16876             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   16877             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   16878             :         // (intrinsic_wo_chain:{ *:[v4i32] } 224:{ *:[iPTR] }, V128:{ *:[v4f32] }:$Rn)  =>  (FCVTASv4f32:{ *:[v4i32] } V128:{ *:[v4f32] }:$Rn)
   16879             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTASv4f32,
   16880             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16881             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16882             :         GIR_EraseFromParent, /*InsnID*/0,
   16883             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16884             :         // GIR_Coverage, 564,
   16885             :         GIR_Done,
   16886             :       // Label 1142: @39846
   16887             :       GIM_Try, /*On fail goto*//*Label 1143*/ 39886, // Rule ID 565 //
   16888             :         GIM_CheckFeatures, GIFBS_HasNEON,
   16889             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtas,
   16890             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   16891             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   16892             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   16893             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   16894             :         // (intrinsic_wo_chain:{ *:[v2i64] } 224:{ *:[iPTR] }, V128:{ *:[v2f64] }:$Rn)  =>  (FCVTASv2f64:{ *:[v2i64] } V128:{ *:[v2f64] }:$Rn)
   16895             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTASv2f64,
   16896             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16897             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16898             :         GIR_EraseFromParent, /*InsnID*/0,
   16899             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16900             :         // GIR_Coverage, 565,
   16901             :         GIR_Done,
   16902             :       // Label 1143: @39886
   16903             :       GIM_Try, /*On fail goto*//*Label 1144*/ 39926, // Rule ID 566 //
   16904             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   16905             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtau,
   16906             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   16907             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   16908             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   16909             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   16910             :         // (intrinsic_wo_chain:{ *:[v4i16] } 225:{ *:[iPTR] }, V64:{ *:[v4f16] }:$Rn)  =>  (FCVTAUv4f16:{ *:[v4i16] } V64:{ *:[v4f16] }:$Rn)
   16911             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTAUv4f16,
   16912             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16913             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16914             :         GIR_EraseFromParent, /*InsnID*/0,
   16915             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16916             :         // GIR_Coverage, 566,
   16917             :         GIR_Done,
   16918             :       // Label 1144: @39926
   16919             :       GIM_Try, /*On fail goto*//*Label 1145*/ 39966, // Rule ID 567 //
   16920             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   16921             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtau,
   16922             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   16923             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   16924             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   16925             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   16926             :         // (intrinsic_wo_chain:{ *:[v8i16] } 225:{ *:[iPTR] }, V128:{ *:[v8f16] }:$Rn)  =>  (FCVTAUv8f16:{ *:[v8i16] } V128:{ *:[v8f16] }:$Rn)
   16927             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTAUv8f16,
   16928             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16929             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16930             :         GIR_EraseFromParent, /*InsnID*/0,
   16931             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16932             :         // GIR_Coverage, 567,
   16933             :         GIR_Done,
   16934             :       // Label 1145: @39966
   16935             :       GIM_Try, /*On fail goto*//*Label 1146*/ 40006, // Rule ID 568 //
   16936             :         GIM_CheckFeatures, GIFBS_HasNEON,
   16937             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtau,
   16938             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   16939             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   16940             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   16941             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   16942             :         // (intrinsic_wo_chain:{ *:[v2i32] } 225:{ *:[iPTR] }, V64:{ *:[v2f32] }:$Rn)  =>  (FCVTAUv2f32:{ *:[v2i32] } V64:{ *:[v2f32] }:$Rn)
   16943             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTAUv2f32,
   16944             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16945             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16946             :         GIR_EraseFromParent, /*InsnID*/0,
   16947             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16948             :         // GIR_Coverage, 568,
   16949             :         GIR_Done,
   16950             :       // Label 1146: @40006
   16951             :       GIM_Try, /*On fail goto*//*Label 1147*/ 40046, // Rule ID 569 //
   16952             :         GIM_CheckFeatures, GIFBS_HasNEON,
   16953             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtau,
   16954             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   16955             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   16956             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   16957             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   16958             :         // (intrinsic_wo_chain:{ *:[v4i32] } 225:{ *:[iPTR] }, V128:{ *:[v4f32] }:$Rn)  =>  (FCVTAUv4f32:{ *:[v4i32] } V128:{ *:[v4f32] }:$Rn)
   16959             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTAUv4f32,
   16960             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16961             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16962             :         GIR_EraseFromParent, /*InsnID*/0,
   16963             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16964             :         // GIR_Coverage, 569,
   16965             :         GIR_Done,
   16966             :       // Label 1147: @40046
   16967             :       GIM_Try, /*On fail goto*//*Label 1148*/ 40086, // Rule ID 570 //
   16968             :         GIM_CheckFeatures, GIFBS_HasNEON,
   16969             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtau,
   16970             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   16971             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   16972             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   16973             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   16974             :         // (intrinsic_wo_chain:{ *:[v2i64] } 225:{ *:[iPTR] }, V128:{ *:[v2f64] }:$Rn)  =>  (FCVTAUv2f64:{ *:[v2i64] } V128:{ *:[v2f64] }:$Rn)
   16975             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTAUv2f64,
   16976             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16977             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16978             :         GIR_EraseFromParent, /*InsnID*/0,
   16979             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16980             :         // GIR_Coverage, 570,
   16981             :         GIR_Done,
   16982             :       // Label 1148: @40086
   16983             :       GIM_Try, /*On fail goto*//*Label 1149*/ 40126, // Rule ID 571 //
   16984             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   16985             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtms,
   16986             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   16987             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   16988             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   16989             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   16990             :         // (intrinsic_wo_chain:{ *:[v4i16] } 226:{ *:[iPTR] }, V64:{ *:[v4f16] }:$Rn)  =>  (FCVTMSv4f16:{ *:[v4i16] } V64:{ *:[v4f16] }:$Rn)
   16991             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTMSv4f16,
   16992             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   16993             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   16994             :         GIR_EraseFromParent, /*InsnID*/0,
   16995             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   16996             :         // GIR_Coverage, 571,
   16997             :         GIR_Done,
   16998             :       // Label 1149: @40126
   16999             :       GIM_Try, /*On fail goto*//*Label 1150*/ 40166, // Rule ID 572 //
   17000             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   17001             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtms,
   17002             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   17003             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   17004             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   17005             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   17006             :         // (intrinsic_wo_chain:{ *:[v8i16] } 226:{ *:[iPTR] }, V128:{ *:[v8f16] }:$Rn)  =>  (FCVTMSv8f16:{ *:[v8i16] } V128:{ *:[v8f16] }:$Rn)
   17007             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTMSv8f16,
   17008             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17009             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17010             :         GIR_EraseFromParent, /*InsnID*/0,
   17011             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17012             :         // GIR_Coverage, 572,
   17013             :         GIR_Done,
   17014             :       // Label 1150: @40166
   17015             :       GIM_Try, /*On fail goto*//*Label 1151*/ 40206, // Rule ID 573 //
   17016             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17017             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtms,
   17018             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   17019             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   17020             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   17021             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   17022             :         // (intrinsic_wo_chain:{ *:[v2i32] } 226:{ *:[iPTR] }, V64:{ *:[v2f32] }:$Rn)  =>  (FCVTMSv2f32:{ *:[v2i32] } V64:{ *:[v2f32] }:$Rn)
   17023             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTMSv2f32,
   17024             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17025             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17026             :         GIR_EraseFromParent, /*InsnID*/0,
   17027             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17028             :         // GIR_Coverage, 573,
   17029             :         GIR_Done,
   17030             :       // Label 1151: @40206
   17031             :       GIM_Try, /*On fail goto*//*Label 1152*/ 40246, // Rule ID 574 //
   17032             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17033             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtms,
   17034             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   17035             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   17036             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   17037             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   17038             :         // (intrinsic_wo_chain:{ *:[v4i32] } 226:{ *:[iPTR] }, V128:{ *:[v4f32] }:$Rn)  =>  (FCVTMSv4f32:{ *:[v4i32] } V128:{ *:[v4f32] }:$Rn)
   17039             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTMSv4f32,
   17040             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17041             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17042             :         GIR_EraseFromParent, /*InsnID*/0,
   17043             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17044             :         // GIR_Coverage, 574,
   17045             :         GIR_Done,
   17046             :       // Label 1152: @40246
   17047             :       GIM_Try, /*On fail goto*//*Label 1153*/ 40286, // Rule ID 575 //
   17048             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17049             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtms,
   17050             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   17051             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   17052             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   17053             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   17054             :         // (intrinsic_wo_chain:{ *:[v2i64] } 226:{ *:[iPTR] }, V128:{ *:[v2f64] }:$Rn)  =>  (FCVTMSv2f64:{ *:[v2i64] } V128:{ *:[v2f64] }:$Rn)
   17055             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTMSv2f64,
   17056             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17057             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17058             :         GIR_EraseFromParent, /*InsnID*/0,
   17059             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17060             :         // GIR_Coverage, 575,
   17061             :         GIR_Done,
   17062             :       // Label 1153: @40286
   17063             :       GIM_Try, /*On fail goto*//*Label 1154*/ 40326, // Rule ID 576 //
   17064             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   17065             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtmu,
   17066             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   17067             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   17068             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   17069             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   17070             :         // (intrinsic_wo_chain:{ *:[v4i16] } 227:{ *:[iPTR] }, V64:{ *:[v4f16] }:$Rn)  =>  (FCVTMUv4f16:{ *:[v4i16] } V64:{ *:[v4f16] }:$Rn)
   17071             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTMUv4f16,
   17072             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17073             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17074             :         GIR_EraseFromParent, /*InsnID*/0,
   17075             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17076             :         // GIR_Coverage, 576,
   17077             :         GIR_Done,
   17078             :       // Label 1154: @40326
   17079             :       GIM_Try, /*On fail goto*//*Label 1155*/ 40366, // Rule ID 577 //
   17080             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   17081             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtmu,
   17082             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   17083             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   17084             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   17085             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   17086             :         // (intrinsic_wo_chain:{ *:[v8i16] } 227:{ *:[iPTR] }, V128:{ *:[v8f16] }:$Rn)  =>  (FCVTMUv8f16:{ *:[v8i16] } V128:{ *:[v8f16] }:$Rn)
   17087             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTMUv8f16,
   17088             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17089             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17090             :         GIR_EraseFromParent, /*InsnID*/0,
   17091             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17092             :         // GIR_Coverage, 577,
   17093             :         GIR_Done,
   17094             :       // Label 1155: @40366
   17095             :       GIM_Try, /*On fail goto*//*Label 1156*/ 40406, // Rule ID 578 //
   17096             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17097             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtmu,
   17098             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   17099             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   17100             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   17101             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   17102             :         // (intrinsic_wo_chain:{ *:[v2i32] } 227:{ *:[iPTR] }, V64:{ *:[v2f32] }:$Rn)  =>  (FCVTMUv2f32:{ *:[v2i32] } V64:{ *:[v2f32] }:$Rn)
   17103             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTMUv2f32,
   17104             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17105             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17106             :         GIR_EraseFromParent, /*InsnID*/0,
   17107             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17108             :         // GIR_Coverage, 578,
   17109             :         GIR_Done,
   17110             :       // Label 1156: @40406
   17111             :       GIM_Try, /*On fail goto*//*Label 1157*/ 40446, // Rule ID 579 //
   17112             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17113             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtmu,
   17114             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   17115             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   17116             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   17117             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   17118             :         // (intrinsic_wo_chain:{ *:[v4i32] } 227:{ *:[iPTR] }, V128:{ *:[v4f32] }:$Rn)  =>  (FCVTMUv4f32:{ *:[v4i32] } V128:{ *:[v4f32] }:$Rn)
   17119             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTMUv4f32,
   17120             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17121             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17122             :         GIR_EraseFromParent, /*InsnID*/0,
   17123             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17124             :         // GIR_Coverage, 579,
   17125             :         GIR_Done,
   17126             :       // Label 1157: @40446
   17127             :       GIM_Try, /*On fail goto*//*Label 1158*/ 40486, // Rule ID 580 //
   17128             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17129             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtmu,
   17130             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   17131             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   17132             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   17133             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   17134             :         // (intrinsic_wo_chain:{ *:[v2i64] } 227:{ *:[iPTR] }, V128:{ *:[v2f64] }:$Rn)  =>  (FCVTMUv2f64:{ *:[v2i64] } V128:{ *:[v2f64] }:$Rn)
   17135             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTMUv2f64,
   17136             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17137             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17138             :         GIR_EraseFromParent, /*InsnID*/0,
   17139             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17140             :         // GIR_Coverage, 580,
   17141             :         GIR_Done,
   17142             :       // Label 1158: @40486
   17143             :       GIM_Try, /*On fail goto*//*Label 1159*/ 40526, // Rule ID 581 //
   17144             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   17145             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtns,
   17146             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   17147             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   17148             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   17149             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   17150             :         // (intrinsic_wo_chain:{ *:[v4i16] } 228:{ *:[iPTR] }, V64:{ *:[v4f16] }:$Rn)  =>  (FCVTNSv4f16:{ *:[v4i16] } V64:{ *:[v4f16] }:$Rn)
   17151             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTNSv4f16,
   17152             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17153             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17154             :         GIR_EraseFromParent, /*InsnID*/0,
   17155             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17156             :         // GIR_Coverage, 581,
   17157             :         GIR_Done,
   17158             :       // Label 1159: @40526
   17159             :       GIM_Try, /*On fail goto*//*Label 1160*/ 40566, // Rule ID 582 //
   17160             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   17161             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtns,
   17162             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   17163             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   17164             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   17165             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   17166             :         // (intrinsic_wo_chain:{ *:[v8i16] } 228:{ *:[iPTR] }, V128:{ *:[v8f16] }:$Rn)  =>  (FCVTNSv8f16:{ *:[v8i16] } V128:{ *:[v8f16] }:$Rn)
   17167             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTNSv8f16,
   17168             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17169             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17170             :         GIR_EraseFromParent, /*InsnID*/0,
   17171             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17172             :         // GIR_Coverage, 582,
   17173             :         GIR_Done,
   17174             :       // Label 1160: @40566
   17175             :       GIM_Try, /*On fail goto*//*Label 1161*/ 40606, // Rule ID 583 //
   17176             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17177             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtns,
   17178             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   17179             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   17180             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   17181             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   17182             :         // (intrinsic_wo_chain:{ *:[v2i32] } 228:{ *:[iPTR] }, V64:{ *:[v2f32] }:$Rn)  =>  (FCVTNSv2f32:{ *:[v2i32] } V64:{ *:[v2f32] }:$Rn)
   17183             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTNSv2f32,
   17184             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17185             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17186             :         GIR_EraseFromParent, /*InsnID*/0,
   17187             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17188             :         // GIR_Coverage, 583,
   17189             :         GIR_Done,
   17190             :       // Label 1161: @40606
   17191             :       GIM_Try, /*On fail goto*//*Label 1162*/ 40646, // Rule ID 584 //
   17192             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17193             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtns,
   17194             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   17195             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   17196             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   17197             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   17198             :         // (intrinsic_wo_chain:{ *:[v4i32] } 228:{ *:[iPTR] }, V128:{ *:[v4f32] }:$Rn)  =>  (FCVTNSv4f32:{ *:[v4i32] } V128:{ *:[v4f32] }:$Rn)
   17199             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTNSv4f32,
   17200             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17201             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17202             :         GIR_EraseFromParent, /*InsnID*/0,
   17203             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17204             :         // GIR_Coverage, 584,
   17205             :         GIR_Done,
   17206             :       // Label 1162: @40646
   17207             :       GIM_Try, /*On fail goto*//*Label 1163*/ 40686, // Rule ID 585 //
   17208             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17209             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtns,
   17210             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   17211             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   17212             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   17213             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   17214             :         // (intrinsic_wo_chain:{ *:[v2i64] } 228:{ *:[iPTR] }, V128:{ *:[v2f64] }:$Rn)  =>  (FCVTNSv2f64:{ *:[v2i64] } V128:{ *:[v2f64] }:$Rn)
   17215             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTNSv2f64,
   17216             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17217             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17218             :         GIR_EraseFromParent, /*InsnID*/0,
   17219             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17220             :         // GIR_Coverage, 585,
   17221             :         GIR_Done,
   17222             :       // Label 1163: @40686
   17223             :       GIM_Try, /*On fail goto*//*Label 1164*/ 40726, // Rule ID 586 //
   17224             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   17225             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtnu,
   17226             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   17227             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   17228             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   17229             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   17230             :         // (intrinsic_wo_chain:{ *:[v4i16] } 229:{ *:[iPTR] }, V64:{ *:[v4f16] }:$Rn)  =>  (FCVTNUv4f16:{ *:[v4i16] } V64:{ *:[v4f16] }:$Rn)
   17231             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTNUv4f16,
   17232             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17233             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17234             :         GIR_EraseFromParent, /*InsnID*/0,
   17235             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17236             :         // GIR_Coverage, 586,
   17237             :         GIR_Done,
   17238             :       // Label 1164: @40726
   17239             :       GIM_Try, /*On fail goto*//*Label 1165*/ 40766, // Rule ID 587 //
   17240             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   17241             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtnu,
   17242             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   17243             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   17244             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   17245             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   17246             :         // (intrinsic_wo_chain:{ *:[v8i16] } 229:{ *:[iPTR] }, V128:{ *:[v8f16] }:$Rn)  =>  (FCVTNUv8f16:{ *:[v8i16] } V128:{ *:[v8f16] }:$Rn)
   17247             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTNUv8f16,
   17248             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17249             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17250             :         GIR_EraseFromParent, /*InsnID*/0,
   17251             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17252             :         // GIR_Coverage, 587,
   17253             :         GIR_Done,
   17254             :       // Label 1165: @40766
   17255             :       GIM_Try, /*On fail goto*//*Label 1166*/ 40806, // Rule ID 588 //
   17256             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17257             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtnu,
   17258             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   17259             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   17260             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   17261             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   17262             :         // (intrinsic_wo_chain:{ *:[v2i32] } 229:{ *:[iPTR] }, V64:{ *:[v2f32] }:$Rn)  =>  (FCVTNUv2f32:{ *:[v2i32] } V64:{ *:[v2f32] }:$Rn)
   17263             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTNUv2f32,
   17264             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17265             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17266             :         GIR_EraseFromParent, /*InsnID*/0,
   17267             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17268             :         // GIR_Coverage, 588,
   17269             :         GIR_Done,
   17270             :       // Label 1166: @40806
   17271             :       GIM_Try, /*On fail goto*//*Label 1167*/ 40846, // Rule ID 589 //
   17272             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17273             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtnu,
   17274             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   17275             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   17276             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   17277             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   17278             :         // (intrinsic_wo_chain:{ *:[v4i32] } 229:{ *:[iPTR] }, V128:{ *:[v4f32] }:$Rn)  =>  (FCVTNUv4f32:{ *:[v4i32] } V128:{ *:[v4f32] }:$Rn)
   17279             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTNUv4f32,
   17280             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17281             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17282             :         GIR_EraseFromParent, /*InsnID*/0,
   17283             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17284             :         // GIR_Coverage, 589,
   17285             :         GIR_Done,
   17286             :       // Label 1167: @40846
   17287             :       GIM_Try, /*On fail goto*//*Label 1168*/ 40886, // Rule ID 590 //
   17288             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17289             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtnu,
   17290             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   17291             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   17292             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   17293             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   17294             :         // (intrinsic_wo_chain:{ *:[v2i64] } 229:{ *:[iPTR] }, V128:{ *:[v2f64] }:$Rn)  =>  (FCVTNUv2f64:{ *:[v2i64] } V128:{ *:[v2f64] }:$Rn)
   17295             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTNUv2f64,
   17296             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17297             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17298             :         GIR_EraseFromParent, /*InsnID*/0,
   17299             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17300             :         // GIR_Coverage, 590,
   17301             :         GIR_Done,
   17302             :       // Label 1168: @40886
   17303             :       GIM_Try, /*On fail goto*//*Label 1169*/ 40926, // Rule ID 591 //
   17304             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   17305             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtps,
   17306             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   17307             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   17308             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   17309             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   17310             :         // (intrinsic_wo_chain:{ *:[v4i16] } 230:{ *:[iPTR] }, V64:{ *:[v4f16] }:$Rn)  =>  (FCVTPSv4f16:{ *:[v4i16] } V64:{ *:[v4f16] }:$Rn)
   17311             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTPSv4f16,
   17312             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17313             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17314             :         GIR_EraseFromParent, /*InsnID*/0,
   17315             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17316             :         // GIR_Coverage, 591,
   17317             :         GIR_Done,
   17318             :       // Label 1169: @40926
   17319             :       GIM_Try, /*On fail goto*//*Label 1170*/ 40966, // Rule ID 592 //
   17320             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   17321             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtps,
   17322             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   17323             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   17324             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   17325             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   17326             :         // (intrinsic_wo_chain:{ *:[v8i16] } 230:{ *:[iPTR] }, V128:{ *:[v8f16] }:$Rn)  =>  (FCVTPSv8f16:{ *:[v8i16] } V128:{ *:[v8f16] }:$Rn)
   17327             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTPSv8f16,
   17328             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17329             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17330             :         GIR_EraseFromParent, /*InsnID*/0,
   17331             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17332             :         // GIR_Coverage, 592,
   17333             :         GIR_Done,
   17334             :       // Label 1170: @40966
   17335             :       GIM_Try, /*On fail goto*//*Label 1171*/ 41006, // Rule ID 593 //
   17336             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17337             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtps,
   17338             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   17339             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   17340             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   17341             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   17342             :         // (intrinsic_wo_chain:{ *:[v2i32] } 230:{ *:[iPTR] }, V64:{ *:[v2f32] }:$Rn)  =>  (FCVTPSv2f32:{ *:[v2i32] } V64:{ *:[v2f32] }:$Rn)
   17343             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTPSv2f32,
   17344             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17345             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17346             :         GIR_EraseFromParent, /*InsnID*/0,
   17347             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17348             :         // GIR_Coverage, 593,
   17349             :         GIR_Done,
   17350             :       // Label 1171: @41006
   17351             :       GIM_Try, /*On fail goto*//*Label 1172*/ 41046, // Rule ID 594 //
   17352             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17353             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtps,
   17354             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   17355             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   17356             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   17357             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   17358             :         // (intrinsic_wo_chain:{ *:[v4i32] } 230:{ *:[iPTR] }, V128:{ *:[v4f32] }:$Rn)  =>  (FCVTPSv4f32:{ *:[v4i32] } V128:{ *:[v4f32] }:$Rn)
   17359             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTPSv4f32,
   17360             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17361             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17362             :         GIR_EraseFromParent, /*InsnID*/0,
   17363             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17364             :         // GIR_Coverage, 594,
   17365             :         GIR_Done,
   17366             :       // Label 1172: @41046
   17367             :       GIM_Try, /*On fail goto*//*Label 1173*/ 41086, // Rule ID 595 //
   17368             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17369             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtps,
   17370             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   17371             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   17372             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   17373             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   17374             :         // (intrinsic_wo_chain:{ *:[v2i64] } 230:{ *:[iPTR] }, V128:{ *:[v2f64] }:$Rn)  =>  (FCVTPSv2f64:{ *:[v2i64] } V128:{ *:[v2f64] }:$Rn)
   17375             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTPSv2f64,
   17376             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17377             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17378             :         GIR_EraseFromParent, /*InsnID*/0,
   17379             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17380             :         // GIR_Coverage, 595,
   17381             :         GIR_Done,
   17382             :       // Label 1173: @41086
   17383             :       GIM_Try, /*On fail goto*//*Label 1174*/ 41126, // Rule ID 596 //
   17384             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   17385             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtpu,
   17386             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   17387             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   17388             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   17389             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   17390             :         // (intrinsic_wo_chain:{ *:[v4i16] } 231:{ *:[iPTR] }, V64:{ *:[v4f16] }:$Rn)  =>  (FCVTPUv4f16:{ *:[v4i16] } V64:{ *:[v4f16] }:$Rn)
   17391             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTPUv4f16,
   17392             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17393             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17394             :         GIR_EraseFromParent, /*InsnID*/0,
   17395             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17396             :         // GIR_Coverage, 596,
   17397             :         GIR_Done,
   17398             :       // Label 1174: @41126
   17399             :       GIM_Try, /*On fail goto*//*Label 1175*/ 41166, // Rule ID 597 //
   17400             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   17401             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtpu,
   17402             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   17403             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   17404             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   17405             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   17406             :         // (intrinsic_wo_chain:{ *:[v8i16] } 231:{ *:[iPTR] }, V128:{ *:[v8f16] }:$Rn)  =>  (FCVTPUv8f16:{ *:[v8i16] } V128:{ *:[v8f16] }:$Rn)
   17407             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTPUv8f16,
   17408             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17409             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17410             :         GIR_EraseFromParent, /*InsnID*/0,
   17411             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17412             :         // GIR_Coverage, 597,
   17413             :         GIR_Done,
   17414             :       // Label 1175: @41166
   17415             :       GIM_Try, /*On fail goto*//*Label 1176*/ 41206, // Rule ID 598 //
   17416             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17417             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtpu,
   17418             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   17419             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   17420             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   17421             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   17422             :         // (intrinsic_wo_chain:{ *:[v2i32] } 231:{ *:[iPTR] }, V64:{ *:[v2f32] }:$Rn)  =>  (FCVTPUv2f32:{ *:[v2i32] } V64:{ *:[v2f32] }:$Rn)
   17423             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTPUv2f32,
   17424             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17425             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17426             :         GIR_EraseFromParent, /*InsnID*/0,
   17427             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17428             :         // GIR_Coverage, 598,
   17429             :         GIR_Done,
   17430             :       // Label 1176: @41206
   17431             :       GIM_Try, /*On fail goto*//*Label 1177*/ 41246, // Rule ID 599 //
   17432             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17433             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtpu,
   17434             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   17435             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   17436             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   17437             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   17438             :         // (intrinsic_wo_chain:{ *:[v4i32] } 231:{ *:[iPTR] }, V128:{ *:[v4f32] }:$Rn)  =>  (FCVTPUv4f32:{ *:[v4i32] } V128:{ *:[v4f32] }:$Rn)
   17439             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTPUv4f32,
   17440             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17441             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17442             :         GIR_EraseFromParent, /*InsnID*/0,
   17443             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17444             :         // GIR_Coverage, 599,
   17445             :         GIR_Done,
   17446             :       // Label 1177: @41246
   17447             :       GIM_Try, /*On fail goto*//*Label 1178*/ 41286, // Rule ID 600 //
   17448             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17449             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtpu,
   17450             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   17451             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   17452             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   17453             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   17454             :         // (intrinsic_wo_chain:{ *:[v2i64] } 231:{ *:[iPTR] }, V128:{ *:[v2f64] }:$Rn)  =>  (FCVTPUv2f64:{ *:[v2i64] } V128:{ *:[v2f64] }:$Rn)
   17455             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTPUv2f64,
   17456             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17457             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17458             :         GIR_EraseFromParent, /*InsnID*/0,
   17459             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17460             :         // GIR_Coverage, 600,
   17461             :         GIR_Done,
   17462             :       // Label 1178: @41286
   17463             :       GIM_Try, /*On fail goto*//*Label 1179*/ 41326, // Rule ID 601 //
   17464             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17465             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtxn,
   17466             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   17467             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   17468             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   17469             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   17470             :         // (intrinsic_wo_chain:{ *:[v2f32] } 232:{ *:[iPTR] }, V128:{ *:[v2f64] }:$Rn)  =>  (FCVTXNv2f32:{ *:[v2f32] } V128:{ *:[v2f64] }:$Rn)
   17471             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTXNv2f32,
   17472             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17473             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17474             :         GIR_EraseFromParent, /*InsnID*/0,
   17475             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17476             :         // GIR_Coverage, 601,
   17477             :         GIR_Done,
   17478             :       // Label 1179: @41326
   17479             :       GIM_Try, /*On fail goto*//*Label 1180*/ 41366, // Rule ID 617 //
   17480             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   17481             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frecpe,
   17482             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   17483             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   17484             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   17485             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   17486             :         // (intrinsic_wo_chain:{ *:[v4f16] } 248:{ *:[iPTR] }, V64:{ *:[v4f16] }:$Rn)  =>  (FRECPEv4f16:{ *:[v4f16] } V64:{ *:[v4f16] }:$Rn)
   17487             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRECPEv4f16,
   17488             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17489             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17490             :         GIR_EraseFromParent, /*InsnID*/0,
   17491             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17492             :         // GIR_Coverage, 617,
   17493             :         GIR_Done,
   17494             :       // Label 1180: @41366
   17495             :       GIM_Try, /*On fail goto*//*Label 1181*/ 41406, // Rule ID 618 //
   17496             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   17497             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frecpe,
   17498             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   17499             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   17500             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   17501             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   17502             :         // (intrinsic_wo_chain:{ *:[v8f16] } 248:{ *:[iPTR] }, V128:{ *:[v8f16] }:$Rn)  =>  (FRECPEv8f16:{ *:[v8f16] } V128:{ *:[v8f16] }:$Rn)
   17503             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRECPEv8f16,
   17504             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17505             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17506             :         GIR_EraseFromParent, /*InsnID*/0,
   17507             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17508             :         // GIR_Coverage, 618,
   17509             :         GIR_Done,
   17510             :       // Label 1181: @41406
   17511             :       GIM_Try, /*On fail goto*//*Label 1182*/ 41446, // Rule ID 619 //
   17512             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17513             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frecpe,
   17514             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   17515             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   17516             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   17517             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   17518             :         // (intrinsic_wo_chain:{ *:[v2f32] } 248:{ *:[iPTR] }, V64:{ *:[v2f32] }:$Rn)  =>  (FRECPEv2f32:{ *:[v2f32] } V64:{ *:[v2f32] }:$Rn)
   17519             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRECPEv2f32,
   17520             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17521             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17522             :         GIR_EraseFromParent, /*InsnID*/0,
   17523             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17524             :         // GIR_Coverage, 619,
   17525             :         GIR_Done,
   17526             :       // Label 1182: @41446
   17527             :       GIM_Try, /*On fail goto*//*Label 1183*/ 41486, // Rule ID 620 //
   17528             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17529             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frecpe,
   17530             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   17531             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   17532             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   17533             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   17534             :         // (intrinsic_wo_chain:{ *:[v4f32] } 248:{ *:[iPTR] }, V128:{ *:[v4f32] }:$Rn)  =>  (FRECPEv4f32:{ *:[v4f32] } V128:{ *:[v4f32] }:$Rn)
   17535             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRECPEv4f32,
   17536             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17537             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17538             :         GIR_EraseFromParent, /*InsnID*/0,
   17539             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17540             :         // GIR_Coverage, 620,
   17541             :         GIR_Done,
   17542             :       // Label 1183: @41486
   17543             :       GIM_Try, /*On fail goto*//*Label 1184*/ 41526, // Rule ID 621 //
   17544             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17545             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frecpe,
   17546             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   17547             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   17548             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   17549             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   17550             :         // (intrinsic_wo_chain:{ *:[v2f64] } 248:{ *:[iPTR] }, V128:{ *:[v2f64] }:$Rn)  =>  (FRECPEv2f64:{ *:[v2f64] } V128:{ *:[v2f64] }:$Rn)
   17551             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRECPEv2f64,
   17552             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17553             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17554             :         GIR_EraseFromParent, /*InsnID*/0,
   17555             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17556             :         // GIR_Coverage, 621,
   17557             :         GIR_Done,
   17558             :       // Label 1184: @41526
   17559             :       GIM_Try, /*On fail goto*//*Label 1185*/ 41566, // Rule ID 637 //
   17560             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   17561             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frintn,
   17562             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   17563             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   17564             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   17565             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   17566             :         // (intrinsic_wo_chain:{ *:[v4f16] } 251:{ *:[iPTR] }, V64:{ *:[v4f16] }:$Rn)  =>  (FRINTNv4f16:{ *:[v4f16] } V64:{ *:[v4f16] }:$Rn)
   17567             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRINTNv4f16,
   17568             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17569             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17570             :         GIR_EraseFromParent, /*InsnID*/0,
   17571             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17572             :         // GIR_Coverage, 637,
   17573             :         GIR_Done,
   17574             :       // Label 1185: @41566
   17575             :       GIM_Try, /*On fail goto*//*Label 1186*/ 41606, // Rule ID 638 //
   17576             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   17577             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frintn,
   17578             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   17579             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   17580             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   17581             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   17582             :         // (intrinsic_wo_chain:{ *:[v8f16] } 251:{ *:[iPTR] }, V128:{ *:[v8f16] }:$Rn)  =>  (FRINTNv8f16:{ *:[v8f16] } V128:{ *:[v8f16] }:$Rn)
   17583             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRINTNv8f16,
   17584             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17585             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17586             :         GIR_EraseFromParent, /*InsnID*/0,
   17587             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17588             :         // GIR_Coverage, 638,
   17589             :         GIR_Done,
   17590             :       // Label 1186: @41606
   17591             :       GIM_Try, /*On fail goto*//*Label 1187*/ 41646, // Rule ID 639 //
   17592             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17593             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frintn,
   17594             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   17595             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   17596             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   17597             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   17598             :         // (intrinsic_wo_chain:{ *:[v2f32] } 251:{ *:[iPTR] }, V64:{ *:[v2f32] }:$Rn)  =>  (FRINTNv2f32:{ *:[v2f32] } V64:{ *:[v2f32] }:$Rn)
   17599             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRINTNv2f32,
   17600             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17601             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17602             :         GIR_EraseFromParent, /*InsnID*/0,
   17603             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17604             :         // GIR_Coverage, 639,
   17605             :         GIR_Done,
   17606             :       // Label 1187: @41646
   17607             :       GIM_Try, /*On fail goto*//*Label 1188*/ 41686, // Rule ID 640 //
   17608             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17609             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frintn,
   17610             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   17611             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   17612             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   17613             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   17614             :         // (intrinsic_wo_chain:{ *:[v4f32] } 251:{ *:[iPTR] }, V128:{ *:[v4f32] }:$Rn)  =>  (FRINTNv4f32:{ *:[v4f32] } V128:{ *:[v4f32] }:$Rn)
   17615             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRINTNv4f32,
   17616             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17617             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17618             :         GIR_EraseFromParent, /*InsnID*/0,
   17619             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17620             :         // GIR_Coverage, 640,
   17621             :         GIR_Done,
   17622             :       // Label 1188: @41686
   17623             :       GIM_Try, /*On fail goto*//*Label 1189*/ 41726, // Rule ID 641 //
   17624             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17625             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frintn,
   17626             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   17627             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   17628             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   17629             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   17630             :         // (intrinsic_wo_chain:{ *:[v2f64] } 251:{ *:[iPTR] }, V128:{ *:[v2f64] }:$Rn)  =>  (FRINTNv2f64:{ *:[v2f64] } V128:{ *:[v2f64] }:$Rn)
   17631             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRINTNv2f64,
   17632             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17633             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17634             :         GIR_EraseFromParent, /*InsnID*/0,
   17635             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17636             :         // GIR_Coverage, 641,
   17637             :         GIR_Done,
   17638             :       // Label 1189: @41726
   17639             :       GIM_Try, /*On fail goto*//*Label 1190*/ 41766, // Rule ID 657 //
   17640             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   17641             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frsqrte,
   17642             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   17643             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   17644             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   17645             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   17646             :         // (intrinsic_wo_chain:{ *:[v4f16] } 252:{ *:[iPTR] }, V64:{ *:[v4f16] }:$Rn)  =>  (FRSQRTEv4f16:{ *:[v4f16] } V64:{ *:[v4f16] }:$Rn)
   17647             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRSQRTEv4f16,
   17648             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17649             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17650             :         GIR_EraseFromParent, /*InsnID*/0,
   17651             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17652             :         // GIR_Coverage, 657,
   17653             :         GIR_Done,
   17654             :       // Label 1190: @41766
   17655             :       GIM_Try, /*On fail goto*//*Label 1191*/ 41806, // Rule ID 658 //
   17656             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   17657             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frsqrte,
   17658             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   17659             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   17660             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   17661             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   17662             :         // (intrinsic_wo_chain:{ *:[v8f16] } 252:{ *:[iPTR] }, V128:{ *:[v8f16] }:$Rn)  =>  (FRSQRTEv8f16:{ *:[v8f16] } V128:{ *:[v8f16] }:$Rn)
   17663             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRSQRTEv8f16,
   17664             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17665             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17666             :         GIR_EraseFromParent, /*InsnID*/0,
   17667             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17668             :         // GIR_Coverage, 658,
   17669             :         GIR_Done,
   17670             :       // Label 1191: @41806
   17671             :       GIM_Try, /*On fail goto*//*Label 1192*/ 41846, // Rule ID 659 //
   17672             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17673             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frsqrte,
   17674             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   17675             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   17676             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   17677             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   17678             :         // (intrinsic_wo_chain:{ *:[v2f32] } 252:{ *:[iPTR] }, V64:{ *:[v2f32] }:$Rn)  =>  (FRSQRTEv2f32:{ *:[v2f32] } V64:{ *:[v2f32] }:$Rn)
   17679             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRSQRTEv2f32,
   17680             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17681             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17682             :         GIR_EraseFromParent, /*InsnID*/0,
   17683             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17684             :         // GIR_Coverage, 659,
   17685             :         GIR_Done,
   17686             :       // Label 1192: @41846
   17687             :       GIM_Try, /*On fail goto*//*Label 1193*/ 41886, // Rule ID 660 //
   17688             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17689             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frsqrte,
   17690             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   17691             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   17692             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   17693             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   17694             :         // (intrinsic_wo_chain:{ *:[v4f32] } 252:{ *:[iPTR] }, V128:{ *:[v4f32] }:$Rn)  =>  (FRSQRTEv4f32:{ *:[v4f32] } V128:{ *:[v4f32] }:$Rn)
   17695             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRSQRTEv4f32,
   17696             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17697             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17698             :         GIR_EraseFromParent, /*InsnID*/0,
   17699             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17700             :         // GIR_Coverage, 660,
   17701             :         GIR_Done,
   17702             :       // Label 1193: @41886
   17703             :       GIM_Try, /*On fail goto*//*Label 1194*/ 41926, // Rule ID 661 //
   17704             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17705             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frsqrte,
   17706             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   17707             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   17708             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   17709             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   17710             :         // (intrinsic_wo_chain:{ *:[v2f64] } 252:{ *:[iPTR] }, V128:{ *:[v2f64] }:$Rn)  =>  (FRSQRTEv2f64:{ *:[v2f64] } V128:{ *:[v2f64] }:$Rn)
   17711             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRSQRTEv2f64,
   17712             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17713             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17714             :         GIR_EraseFromParent, /*InsnID*/0,
   17715             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17716             :         // GIR_Coverage, 661,
   17717             :         GIR_Done,
   17718             :       // Label 1194: @41926
   17719             :       GIM_Try, /*On fail goto*//*Label 1195*/ 41966, // Rule ID 676 //
   17720             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17721             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_rbit,
   17722             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   17723             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
   17724             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   17725             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   17726             :         // (intrinsic_wo_chain:{ *:[v8i8] } 270:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn)  =>  (RBITv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn)
   17727             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::RBITv8i8,
   17728             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17729             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17730             :         GIR_EraseFromParent, /*InsnID*/0,
   17731             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17732             :         // GIR_Coverage, 676,
   17733             :         GIR_Done,
   17734             :       // Label 1195: @41966
   17735             :       GIM_Try, /*On fail goto*//*Label 1196*/ 42006, // Rule ID 677 //
   17736             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17737             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_rbit,
   17738             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   17739             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   17740             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   17741             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   17742             :         // (intrinsic_wo_chain:{ *:[v16i8] } 270:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn)  =>  (RBITv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn)
   17743             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::RBITv16i8,
   17744             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17745             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17746             :         GIR_EraseFromParent, /*InsnID*/0,
   17747             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17748             :         // GIR_Coverage, 677,
   17749             :         GIR_Done,
   17750             :       // Label 1196: @42006
   17751             :       GIM_Try, /*On fail goto*//*Label 1197*/ 42046, // Rule ID 696 //
   17752             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17753             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_saddlp,
   17754             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   17755             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
   17756             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   17757             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   17758             :         // (intrinsic_wo_chain:{ *:[v4i16] } 274:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn)  =>  (SADDLPv8i8_v4i16:{ *:[v4i16] } V64:{ *:[v8i8] }:$Rn)
   17759             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADDLPv8i8_v4i16,
   17760             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17761             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17762             :         GIR_EraseFromParent, /*InsnID*/0,
   17763             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17764             :         // GIR_Coverage, 696,
   17765             :         GIR_Done,
   17766             :       // Label 1197: @42046
   17767             :       GIM_Try, /*On fail goto*//*Label 1198*/ 42086, // Rule ID 697 //
   17768             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17769             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_saddlp,
   17770             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   17771             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   17772             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   17773             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   17774             :         // (intrinsic_wo_chain:{ *:[v8i16] } 274:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn)  =>  (SADDLPv16i8_v8i16:{ *:[v8i16] } V128:{ *:[v16i8] }:$Rn)
   17775             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADDLPv16i8_v8i16,
   17776             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17777             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17778             :         GIR_EraseFromParent, /*InsnID*/0,
   17779             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17780             :         // GIR_Coverage, 697,
   17781             :         GIR_Done,
   17782             :       // Label 1198: @42086
   17783             :       GIM_Try, /*On fail goto*//*Label 1199*/ 42126, // Rule ID 698 //
   17784             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17785             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_saddlp,
   17786             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   17787             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   17788             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   17789             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   17790             :         // (intrinsic_wo_chain:{ *:[v2i32] } 274:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn)  =>  (SADDLPv4i16_v2i32:{ *:[v2i32] } V64:{ *:[v4i16] }:$Rn)
   17791             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADDLPv4i16_v2i32,
   17792             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17793             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17794             :         GIR_EraseFromParent, /*InsnID*/0,
   17795             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17796             :         // GIR_Coverage, 698,
   17797             :         GIR_Done,
   17798             :       // Label 1199: @42126
   17799             :       GIM_Try, /*On fail goto*//*Label 1200*/ 42166, // Rule ID 699 //
   17800             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17801             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_saddlp,
   17802             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   17803             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   17804             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   17805             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   17806             :         // (intrinsic_wo_chain:{ *:[v4i32] } 274:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn)  =>  (SADDLPv8i16_v4i32:{ *:[v4i32] } V128:{ *:[v8i16] }:$Rn)
   17807             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADDLPv8i16_v4i32,
   17808             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17809             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17810             :         GIR_EraseFromParent, /*InsnID*/0,
   17811             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17812             :         // GIR_Coverage, 699,
   17813             :         GIR_Done,
   17814             :       // Label 1200: @42166
   17815             :       GIM_Try, /*On fail goto*//*Label 1201*/ 42206, // Rule ID 700 //
   17816             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17817             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_saddlp,
   17818             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   17819             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   17820             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   17821             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   17822             :         // (intrinsic_wo_chain:{ *:[v1i64] } 274:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn)  =>  (SADDLPv2i32_v1i64:{ *:[v1i64] } V64:{ *:[v2i32] }:$Rn)
   17823             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADDLPv2i32_v1i64,
   17824             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17825             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17826             :         GIR_EraseFromParent, /*InsnID*/0,
   17827             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17828             :         // GIR_Coverage, 700,
   17829             :         GIR_Done,
   17830             :       // Label 1201: @42206
   17831             :       GIM_Try, /*On fail goto*//*Label 1202*/ 42246, // Rule ID 701 //
   17832             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17833             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_saddlp,
   17834             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   17835             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   17836             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   17837             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   17838             :         // (intrinsic_wo_chain:{ *:[v2i64] } 274:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn)  =>  (SADDLPv4i32_v2i64:{ *:[v2i64] } V128:{ *:[v4i32] }:$Rn)
   17839             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADDLPv4i32_v2i64,
   17840             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17841             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17842             :         GIR_EraseFromParent, /*InsnID*/0,
   17843             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17844             :         // GIR_Coverage, 701,
   17845             :         GIR_Done,
   17846             :       // Label 1202: @42246
   17847             :       GIM_Try, /*On fail goto*//*Label 1203*/ 42286, // Rule ID 707 //
   17848             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17849             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqabs,
   17850             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   17851             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
   17852             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   17853             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   17854             :         // (intrinsic_wo_chain:{ *:[v8i8] } 291:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn)  =>  (SQABSv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn)
   17855             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQABSv8i8,
   17856             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17857             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17858             :         GIR_EraseFromParent, /*InsnID*/0,
   17859             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17860             :         // GIR_Coverage, 707,
   17861             :         GIR_Done,
   17862             :       // Label 1203: @42286
   17863             :       GIM_Try, /*On fail goto*//*Label 1204*/ 42326, // Rule ID 708 //
   17864             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17865             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqabs,
   17866             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   17867             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   17868             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   17869             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   17870             :         // (intrinsic_wo_chain:{ *:[v16i8] } 291:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn)  =>  (SQABSv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn)
   17871             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQABSv16i8,
   17872             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17873             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17874             :         GIR_EraseFromParent, /*InsnID*/0,
   17875             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17876             :         // GIR_Coverage, 708,
   17877             :         GIR_Done,
   17878             :       // Label 1204: @42326
   17879             :       GIM_Try, /*On fail goto*//*Label 1205*/ 42366, // Rule ID 709 //
   17880             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17881             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqabs,
   17882             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   17883             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   17884             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   17885             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   17886             :         // (intrinsic_wo_chain:{ *:[v4i16] } 291:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn)  =>  (SQABSv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn)
   17887             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQABSv4i16,
   17888             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17889             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17890             :         GIR_EraseFromParent, /*InsnID*/0,
   17891             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17892             :         // GIR_Coverage, 709,
   17893             :         GIR_Done,
   17894             :       // Label 1205: @42366
   17895             :       GIM_Try, /*On fail goto*//*Label 1206*/ 42406, // Rule ID 710 //
   17896             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17897             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqabs,
   17898             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   17899             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   17900             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   17901             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   17902             :         // (intrinsic_wo_chain:{ *:[v8i16] } 291:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn)  =>  (SQABSv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn)
   17903             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQABSv8i16,
   17904             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17905             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17906             :         GIR_EraseFromParent, /*InsnID*/0,
   17907             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17908             :         // GIR_Coverage, 710,
   17909             :         GIR_Done,
   17910             :       // Label 1206: @42406
   17911             :       GIM_Try, /*On fail goto*//*Label 1207*/ 42446, // Rule ID 711 //
   17912             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17913             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqabs,
   17914             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   17915             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   17916             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   17917             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   17918             :         // (intrinsic_wo_chain:{ *:[v2i32] } 291:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn)  =>  (SQABSv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn)
   17919             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQABSv2i32,
   17920             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17921             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17922             :         GIR_EraseFromParent, /*InsnID*/0,
   17923             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17924             :         // GIR_Coverage, 711,
   17925             :         GIR_Done,
   17926             :       // Label 1207: @42446
   17927             :       GIM_Try, /*On fail goto*//*Label 1208*/ 42486, // Rule ID 712 //
   17928             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17929             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqabs,
   17930             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   17931             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   17932             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   17933             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   17934             :         // (intrinsic_wo_chain:{ *:[v4i32] } 291:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn)  =>  (SQABSv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn)
   17935             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQABSv4i32,
   17936             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17937             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17938             :         GIR_EraseFromParent, /*InsnID*/0,
   17939             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17940             :         // GIR_Coverage, 712,
   17941             :         GIR_Done,
   17942             :       // Label 1208: @42486
   17943             :       GIM_Try, /*On fail goto*//*Label 1209*/ 42526, // Rule ID 713 //
   17944             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17945             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqabs,
   17946             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   17947             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   17948             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   17949             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   17950             :         // (intrinsic_wo_chain:{ *:[v2i64] } 291:{ *:[iPTR] }, V128:{ *:[v2i64] }:$Rn)  =>  (SQABSv2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn)
   17951             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQABSv2i64,
   17952             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17953             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17954             :         GIR_EraseFromParent, /*InsnID*/0,
   17955             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17956             :         // GIR_Coverage, 713,
   17957             :         GIR_Done,
   17958             :       // Label 1209: @42526
   17959             :       GIM_Try, /*On fail goto*//*Label 1210*/ 42566, // Rule ID 714 //
   17960             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17961             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqneg,
   17962             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   17963             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
   17964             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   17965             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   17966             :         // (intrinsic_wo_chain:{ *:[v8i8] } 296:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn)  =>  (SQNEGv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn)
   17967             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQNEGv8i8,
   17968             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17969             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17970             :         GIR_EraseFromParent, /*InsnID*/0,
   17971             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17972             :         // GIR_Coverage, 714,
   17973             :         GIR_Done,
   17974             :       // Label 1210: @42566
   17975             :       GIM_Try, /*On fail goto*//*Label 1211*/ 42606, // Rule ID 715 //
   17976             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17977             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqneg,
   17978             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   17979             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   17980             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   17981             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   17982             :         // (intrinsic_wo_chain:{ *:[v16i8] } 296:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn)  =>  (SQNEGv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn)
   17983             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQNEGv16i8,
   17984             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   17985             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   17986             :         GIR_EraseFromParent, /*InsnID*/0,
   17987             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   17988             :         // GIR_Coverage, 715,
   17989             :         GIR_Done,
   17990             :       // Label 1211: @42606
   17991             :       GIM_Try, /*On fail goto*//*Label 1212*/ 42646, // Rule ID 716 //
   17992             :         GIM_CheckFeatures, GIFBS_HasNEON,
   17993             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqneg,
   17994             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   17995             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   17996             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   17997             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   17998             :         // (intrinsic_wo_chain:{ *:[v4i16] } 296:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn)  =>  (SQNEGv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn)
   17999             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQNEGv4i16,
   18000             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18001             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18002             :         GIR_EraseFromParent, /*InsnID*/0,
   18003             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18004             :         // GIR_Coverage, 716,
   18005             :         GIR_Done,
   18006             :       // Label 1212: @42646
   18007             :       GIM_Try, /*On fail goto*//*Label 1213*/ 42686, // Rule ID 717 //
   18008             :         GIM_CheckFeatures, GIFBS_HasNEON,
   18009             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqneg,
   18010             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   18011             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   18012             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   18013             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   18014             :         // (intrinsic_wo_chain:{ *:[v8i16] } 296:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn)  =>  (SQNEGv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn)
   18015             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQNEGv8i16,
   18016             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18017             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18018             :         GIR_EraseFromParent, /*InsnID*/0,
   18019             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18020             :         // GIR_Coverage, 717,
   18021             :         GIR_Done,
   18022             :       // Label 1213: @42686
   18023             :       GIM_Try, /*On fail goto*//*Label 1214*/ 42726, // Rule ID 718 //
   18024             :         GIM_CheckFeatures, GIFBS_HasNEON,
   18025             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqneg,
   18026             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   18027             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   18028             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   18029             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   18030             :         // (intrinsic_wo_chain:{ *:[v2i32] } 296:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn)  =>  (SQNEGv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn)
   18031             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQNEGv2i32,
   18032             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18033             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18034             :         GIR_EraseFromParent, /*InsnID*/0,
   18035             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18036             :         // GIR_Coverage, 718,
   18037             :         GIR_Done,
   18038             :       // Label 1214: @42726
   18039             :       GIM_Try, /*On fail goto*//*Label 1215*/ 42766, // Rule ID 719 //
   18040             :         GIM_CheckFeatures, GIFBS_HasNEON,
   18041             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqneg,
   18042             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   18043             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   18044             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   18045             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   18046             :         // (intrinsic_wo_chain:{ *:[v4i32] } 296:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn)  =>  (SQNEGv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn)
   18047             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQNEGv4i32,
   18048             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18049             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18050             :         GIR_EraseFromParent, /*InsnID*/0,
   18051             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18052             :         // GIR_Coverage, 719,
   18053             :         GIR_Done,
   18054             :       // Label 1215: @42766
   18055             :       GIM_Try, /*On fail goto*//*Label 1216*/ 42806, // Rule ID 720 //
   18056             :         GIM_CheckFeatures, GIFBS_HasNEON,
   18057             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqneg,
   18058             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   18059             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   18060             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   18061             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   18062             :         // (intrinsic_wo_chain:{ *:[v2i64] } 296:{ *:[iPTR] }, V128:{ *:[v2i64] }:$Rn)  =>  (SQNEGv2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn)
   18063             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQNEGv2i64,
   18064             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18065             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18066             :         GIR_EraseFromParent, /*InsnID*/0,
   18067             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18068             :         // GIR_Coverage, 720,
   18069             :         GIR_Done,
   18070             :       // Label 1216: @42806
   18071             :       GIM_Try, /*On fail goto*//*Label 1217*/ 42846, // Rule ID 721 //
   18072             :         GIM_CheckFeatures, GIFBS_HasNEON,
   18073             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqxtn,
   18074             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   18075             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   18076             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   18077             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   18078             :         // (intrinsic_wo_chain:{ *:[v8i8] } 306:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn)  =>  (SQXTNv8i8:{ *:[v8i8] } V128:{ *:[v8i16] }:$Rn)
   18079             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQXTNv8i8,
   18080             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18081             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18082             :         GIR_EraseFromParent, /*InsnID*/0,
   18083             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18084             :         // GIR_Coverage, 721,
   18085             :         GIR_Done,
   18086             :       // Label 1217: @42846
   18087             :       GIM_Try, /*On fail goto*//*Label 1218*/ 42886, // Rule ID 722 //
   18088             :         GIM_CheckFeatures, GIFBS_HasNEON,
   18089             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqxtn,
   18090             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   18091             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   18092             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   18093             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   18094             :         // (intrinsic_wo_chain:{ *:[v4i16] } 306:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn)  =>  (SQXTNv4i16:{ *:[v4i16] } V128:{ *:[v4i32] }:$Rn)
   18095             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQXTNv4i16,
   18096             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18097             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18098             :         GIR_EraseFromParent, /*InsnID*/0,
   18099             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18100             :         // GIR_Coverage, 722,
   18101             :         GIR_Done,
   18102             :       // Label 1218: @42886
   18103             :       GIM_Try, /*On fail goto*//*Label 1219*/ 42926, // Rule ID 723 //
   18104             :         GIM_CheckFeatures, GIFBS_HasNEON,
   18105             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqxtn,
   18106             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   18107             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   18108             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   18109             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   18110             :         // (intrinsic_wo_chain:{ *:[v2i32] } 306:{ *:[iPTR] }, V128:{ *:[v2i64] }:$Rn)  =>  (SQXTNv2i32:{ *:[v2i32] } V128:{ *:[v2i64] }:$Rn)
   18111             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQXTNv2i32,
   18112             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18113             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18114             :         GIR_EraseFromParent, /*InsnID*/0,
   18115             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18116             :         // GIR_Coverage, 723,
   18117             :         GIR_Done,
   18118             :       // Label 1219: @42926
   18119             :       GIM_Try, /*On fail goto*//*Label 1220*/ 42966, // Rule ID 724 //
   18120             :         GIM_CheckFeatures, GIFBS_HasNEON,
   18121             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqxtun,
   18122             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   18123             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   18124             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   18125             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   18126             :         // (intrinsic_wo_chain:{ *:[v8i8] } 307:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn)  =>  (SQXTUNv8i8:{ *:[v8i8] } V128:{ *:[v8i16] }:$Rn)
   18127             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQXTUNv8i8,
   18128             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18129             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18130             :         GIR_EraseFromParent, /*InsnID*/0,
   18131             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18132             :         // GIR_Coverage, 724,
   18133             :         GIR_Done,
   18134             :       // Label 1220: @42966
   18135             :       GIM_Try, /*On fail goto*//*Label 1221*/ 43006, // Rule ID 725 //
   18136             :         GIM_CheckFeatures, GIFBS_HasNEON,
   18137             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqxtun,
   18138             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   18139             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   18140             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   18141             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   18142             :         // (intrinsic_wo_chain:{ *:[v4i16] } 307:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn)  =>  (SQXTUNv4i16:{ *:[v4i16] } V128:{ *:[v4i32] }:$Rn)
   18143             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQXTUNv4i16,
   18144             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18145             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18146             :         GIR_EraseFromParent, /*InsnID*/0,
   18147             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18148             :         // GIR_Coverage, 725,
   18149             :         GIR_Done,
   18150             :       // Label 1221: @43006
   18151             :       GIM_Try, /*On fail goto*//*Label 1222*/ 43046, // Rule ID 726 //
   18152             :         GIM_CheckFeatures, GIFBS_HasNEON,
   18153             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqxtun,
   18154             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   18155             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   18156             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   18157             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   18158             :         // (intrinsic_wo_chain:{ *:[v2i32] } 307:{ *:[iPTR] }, V128:{ *:[v2i64] }:$Rn)  =>  (SQXTUNv2i32:{ *:[v2i32] } V128:{ *:[v2i64] }:$Rn)
   18159             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQXTUNv2i32,
   18160             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18161             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18162             :         GIR_EraseFromParent, /*InsnID*/0,
   18163             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18164             :         // GIR_Coverage, 726,
   18165             :         GIR_Done,
   18166             :       // Label 1222: @43046
   18167             :       GIM_Try, /*On fail goto*//*Label 1223*/ 43086, // Rule ID 740 //
   18168             :         GIM_CheckFeatures, GIFBS_HasNEON,
   18169             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uaddlp,
   18170             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   18171             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
   18172             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   18173             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   18174             :         // (intrinsic_wo_chain:{ *:[v4i16] } 332:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn)  =>  (UADDLPv8i8_v4i16:{ *:[v4i16] } V64:{ *:[v8i8] }:$Rn)
   18175             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADDLPv8i8_v4i16,
   18176             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18177             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18178             :         GIR_EraseFromParent, /*InsnID*/0,
   18179             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18180             :         // GIR_Coverage, 740,
   18181             :         GIR_Done,
   18182             :       // Label 1223: @43086
   18183             :       GIM_Try, /*On fail goto*//*Label 1224*/ 43126, // Rule ID 741 //
   18184             :         GIM_CheckFeatures, GIFBS_HasNEON,
   18185             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uaddlp,
   18186             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   18187             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   18188             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   18189             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   18190             :         // (intrinsic_wo_chain:{ *:[v8i16] } 332:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn)  =>  (UADDLPv16i8_v8i16:{ *:[v8i16] } V128:{ *:[v16i8] }:$Rn)
   18191             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADDLPv16i8_v8i16,
   18192             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18193             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18194             :         GIR_EraseFromParent, /*InsnID*/0,
   18195             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18196             :         // GIR_Coverage, 741,
   18197             :         GIR_Done,
   18198             :       // Label 1224: @43126
   18199             :       GIM_Try, /*On fail goto*//*Label 1225*/ 43166, // Rule ID 742 //
   18200             :         GIM_CheckFeatures, GIFBS_HasNEON,
   18201             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uaddlp,
   18202             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   18203             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   18204             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   18205             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   18206             :         // (intrinsic_wo_chain:{ *:[v2i32] } 332:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn)  =>  (UADDLPv4i16_v2i32:{ *:[v2i32] } V64:{ *:[v4i16] }:$Rn)
   18207             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADDLPv4i16_v2i32,
   18208             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18209             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18210             :         GIR_EraseFromParent, /*InsnID*/0,
   18211             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18212             :         // GIR_Coverage, 742,
   18213             :         GIR_Done,
   18214             :       // Label 1225: @43166
   18215             :       GIM_Try, /*On fail goto*//*Label 1226*/ 43206, // Rule ID 743 //
   18216             :         GIM_CheckFeatures, GIFBS_HasNEON,
   18217             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uaddlp,
   18218             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   18219             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   18220             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   18221             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   18222             :         // (intrinsic_wo_chain:{ *:[v4i32] } 332:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn)  =>  (UADDLPv8i16_v4i32:{ *:[v4i32] } V128:{ *:[v8i16] }:$Rn)
   18223             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADDLPv8i16_v4i32,
   18224             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18225             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18226             :         GIR_EraseFromParent, /*InsnID*/0,
   18227             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18228             :         // GIR_Coverage, 743,
   18229             :         GIR_Done,
   18230             :       // Label 1226: @43206
   18231             :       GIM_Try, /*On fail goto*//*Label 1227*/ 43246, // Rule ID 744 //
   18232             :         GIM_CheckFeatures, GIFBS_HasNEON,
   18233             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uaddlp,
   18234             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   18235             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   18236             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   18237             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   18238             :         // (intrinsic_wo_chain:{ *:[v1i64] } 332:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn)  =>  (UADDLPv2i32_v1i64:{ *:[v1i64] } V64:{ *:[v2i32] }:$Rn)
   18239             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADDLPv2i32_v1i64,
   18240             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18241             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18242             :         GIR_EraseFromParent, /*InsnID*/0,
   18243             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18244             :         // GIR_Coverage, 744,
   18245             :         GIR_Done,
   18246             :       // Label 1227: @43246
   18247             :       GIM_Try, /*On fail goto*//*Label 1228*/ 43286, // Rule ID 745 //
   18248             :         GIM_CheckFeatures, GIFBS_HasNEON,
   18249             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uaddlp,
   18250             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   18251             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   18252             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   18253             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   18254             :         // (intrinsic_wo_chain:{ *:[v2i64] } 332:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn)  =>  (UADDLPv4i32_v2i64:{ *:[v2i64] } V128:{ *:[v4i32] }:$Rn)
   18255             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADDLPv4i32_v2i64,
   18256             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18257             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18258             :         GIR_EraseFromParent, /*InsnID*/0,
   18259             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18260             :         // GIR_Coverage, 745,
   18261             :         GIR_Done,
   18262             :       // Label 1228: @43286
   18263             :       GIM_Try, /*On fail goto*//*Label 1229*/ 43326, // Rule ID 751 //
   18264             :         GIM_CheckFeatures, GIFBS_HasNEON,
   18265             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqxtn,
   18266             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   18267             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   18268             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   18269             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   18270             :         // (intrinsic_wo_chain:{ *:[v8i8] } 351:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn)  =>  (UQXTNv8i8:{ *:[v8i8] } V128:{ *:[v8i16] }:$Rn)
   18271             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQXTNv8i8,
   18272             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18273             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18274             :         GIR_EraseFromParent, /*InsnID*/0,
   18275             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18276             :         // GIR_Coverage, 751,
   18277             :         GIR_Done,
   18278             :       // Label 1229: @43326
   18279             :       GIM_Try, /*On fail goto*//*Label 1230*/ 43366, // Rule ID 752 //
   18280             :         GIM_CheckFeatures, GIFBS_HasNEON,
   18281             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqxtn,
   18282             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   18283             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   18284             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   18285             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   18286             :         // (intrinsic_wo_chain:{ *:[v4i16] } 351:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn)  =>  (UQXTNv4i16:{ *:[v4i16] } V128:{ *:[v4i32] }:$Rn)
   18287             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQXTNv4i16,
   18288             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18289             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18290             :         GIR_EraseFromParent, /*InsnID*/0,
   18291             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18292             :         // GIR_Coverage, 752,
   18293             :         GIR_Done,
   18294             :       // Label 1230: @43366
   18295             :       GIM_Try, /*On fail goto*//*Label 1231*/ 43406, // Rule ID 753 //
   18296             :         GIM_CheckFeatures, GIFBS_HasNEON,
   18297             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqxtn,
   18298             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   18299             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   18300             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   18301             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   18302             :         // (intrinsic_wo_chain:{ *:[v2i32] } 351:{ *:[iPTR] }, V128:{ *:[v2i64] }:$Rn)  =>  (UQXTNv2i32:{ *:[v2i32] } V128:{ *:[v2i64] }:$Rn)
   18303             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQXTNv2i32,
   18304             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18305             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18306             :         GIR_EraseFromParent, /*InsnID*/0,
   18307             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18308             :         // GIR_Coverage, 753,
   18309             :         GIR_Done,
   18310             :       // Label 1231: @43406
   18311             :       GIM_Try, /*On fail goto*//*Label 1232*/ 43446, // Rule ID 754 //
   18312             :         GIM_CheckFeatures, GIFBS_HasNEON,
   18313             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_urecpe,
   18314             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   18315             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   18316             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   18317             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   18318             :         // (intrinsic_wo_chain:{ *:[v2i32] } 352:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn)  =>  (URECPEv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn)
   18319             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::URECPEv2i32,
   18320             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18321             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18322             :         GIR_EraseFromParent, /*InsnID*/0,
   18323             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18324             :         // GIR_Coverage, 754,
   18325             :         GIR_Done,
   18326             :       // Label 1232: @43446
   18327             :       GIM_Try, /*On fail goto*//*Label 1233*/ 43486, // Rule ID 755 //
   18328             :         GIM_CheckFeatures, GIFBS_HasNEON,
   18329             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_urecpe,
   18330             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   18331             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   18332             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   18333             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   18334             :         // (intrinsic_wo_chain:{ *:[v4i32] } 352:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn)  =>  (URECPEv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn)
   18335             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::URECPEv4i32,
   18336             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18337             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18338             :         GIR_EraseFromParent, /*InsnID*/0,
   18339             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18340             :         // GIR_Coverage, 755,
   18341             :         GIR_Done,
   18342             :       // Label 1233: @43486
   18343             :       GIM_Try, /*On fail goto*//*Label 1234*/ 43526, // Rule ID 756 //
   18344             :         GIM_CheckFeatures, GIFBS_HasNEON,
   18345             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_ursqrte,
   18346             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   18347             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   18348             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   18349             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   18350             :         // (intrinsic_wo_chain:{ *:[v2i32] } 355:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn)  =>  (URSQRTEv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn)
   18351             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::URSQRTEv2i32,
   18352             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18353             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18354             :         GIR_EraseFromParent, /*InsnID*/0,
   18355             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18356             :         // GIR_Coverage, 756,
   18357             :         GIR_Done,
   18358             :       // Label 1234: @43526
   18359             :       GIM_Try, /*On fail goto*//*Label 1235*/ 43566, // Rule ID 757 //
   18360             :         GIM_CheckFeatures, GIFBS_HasNEON,
   18361             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_ursqrte,
   18362             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   18363             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   18364             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   18365             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   18366             :         // (intrinsic_wo_chain:{ *:[v4i32] } 355:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn)  =>  (URSQRTEv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn)
   18367             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::URSQRTEv4i32,
   18368             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18369             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18370             :         GIR_EraseFromParent, /*InsnID*/0,
   18371             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18372             :         // GIR_Coverage, 757,
   18373             :         GIR_Done,
   18374             :       // Label 1235: @43566
   18375             :       GIM_Try, /*On fail goto*//*Label 1236*/ 43606, // Rule ID 1239 //
   18376             :         GIM_CheckFeatures, GIFBS_HasNEON,
   18377             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_sisd_fcvtxn,
   18378             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   18379             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   18380             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   18381             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   18382             :         // (intrinsic_wo_chain:{ *:[f32] } 370:{ *:[iPTR] }, FPR64:{ *:[f64] }:$Rn)  =>  (FCVTXNv1i64:{ *:[f32] } FPR64:{ *:[f64] }:$Rn)
   18383             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTXNv1i64,
   18384             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18385             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18386             :         GIR_EraseFromParent, /*InsnID*/0,
   18387             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18388             :         // GIR_Coverage, 1239,
   18389             :         GIR_Done,
   18390             :       // Label 1236: @43606
   18391             :       GIM_Try, /*On fail goto*//*Label 1237*/ 43646, // Rule ID 1244 //
   18392             :         GIM_CheckFeatures, GIFBS_HasNEON,
   18393             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqabs,
   18394             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   18395             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   18396             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   18397             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   18398             :         // (intrinsic_wo_chain:{ *:[i64] } 291:{ *:[iPTR] }, FPR64:{ *:[i64] }:$Rn)  =>  (SQABSv1i64:{ *:[i64] } FPR64:{ *:[i64] }:$Rn)
   18399             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQABSv1i64,
   18400             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18401             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18402             :         GIR_EraseFromParent, /*InsnID*/0,
   18403             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18404             :         // GIR_Coverage, 1244,
   18405             :         GIR_Done,
   18406             :       // Label 1237: @43646
   18407             :       GIM_Try, /*On fail goto*//*Label 1238*/ 43686, // Rule ID 1245 //
   18408             :         GIM_CheckFeatures, GIFBS_HasNEON,
   18409             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqabs,
   18410             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   18411             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   18412             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   18413             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   18414             :         // (intrinsic_wo_chain:{ *:[i32] } 291:{ *:[iPTR] }, FPR32:{ *:[i32] }:$Rn)  =>  (SQABSv1i32:{ *:[i32] } FPR32:{ *:[i32] }:$Rn)
   18415             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQABSv1i32,
   18416             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18417             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18418             :         GIR_EraseFromParent, /*InsnID*/0,
   18419             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18420             :         // GIR_Coverage, 1245,
   18421             :         GIR_Done,
   18422             :       // Label 1238: @43686
   18423             :       GIM_Try, /*On fail goto*//*Label 1239*/ 43726, // Rule ID 1246 //
   18424             :         GIM_CheckFeatures, GIFBS_HasNEON,
   18425             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqneg,
   18426             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   18427             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   18428             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   18429             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   18430             :         // (intrinsic_wo_chain:{ *:[i64] } 296:{ *:[iPTR] }, FPR64:{ *:[i64] }:$Rn)  =>  (SQNEGv1i64:{ *:[i64] } FPR64:{ *:[i64] }:$Rn)
   18431             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQNEGv1i64,
   18432             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18433             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18434             :         GIR_EraseFromParent, /*InsnID*/0,
   18435             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18436             :         // GIR_Coverage, 1246,
   18437             :         GIR_Done,
   18438             :       // Label 1239: @43726
   18439             :       GIM_Try, /*On fail goto*//*Label 1240*/ 43766, // Rule ID 1247 //
   18440             :         GIM_CheckFeatures, GIFBS_HasNEON,
   18441             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqneg,
   18442             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   18443             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   18444             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   18445             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   18446             :         // (intrinsic_wo_chain:{ *:[i32] } 296:{ *:[iPTR] }, FPR32:{ *:[i32] }:$Rn)  =>  (SQNEGv1i32:{ *:[i32] } FPR32:{ *:[i32] }:$Rn)
   18447             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQNEGv1i32,
   18448             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18449             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18450             :         GIR_EraseFromParent, /*InsnID*/0,
   18451             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18452             :         // GIR_Coverage, 1247,
   18453             :         GIR_Done,
   18454             :       // Label 1240: @43766
   18455             :       GIM_Try, /*On fail goto*//*Label 1241*/ 43806, // Rule ID 1248 //
   18456             :         GIM_CheckFeatures, GIFBS_HasNEON,
   18457             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_scalar_sqxtn,
   18458             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   18459             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   18460             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   18461             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   18462             :         // (intrinsic_wo_chain:{ *:[i32] } 277:{ *:[iPTR] }, FPR64:{ *:[i64] }:$Rn)  =>  (SQXTNv1i32:{ *:[i32] } FPR64:{ *:[i64] }:$Rn)
   18463             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQXTNv1i32,
   18464             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18465             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18466             :         GIR_EraseFromParent, /*InsnID*/0,
   18467             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18468             :         // GIR_Coverage, 1248,
   18469             :         GIR_Done,
   18470             :       // Label 1241: @43806
   18471             :       GIM_Try, /*On fail goto*//*Label 1242*/ 43846, // Rule ID 1249 //
   18472             :         GIM_CheckFeatures, GIFBS_HasNEON,
   18473             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_scalar_sqxtun,
   18474             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   18475             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   18476             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   18477             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   18478             :         // (intrinsic_wo_chain:{ *:[i32] } 278:{ *:[iPTR] }, FPR64:{ *:[i64] }:$Rn)  =>  (SQXTUNv1i32:{ *:[i32] } FPR64:{ *:[i64] }:$Rn)
   18479             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQXTUNv1i32,
   18480             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18481             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18482             :         GIR_EraseFromParent, /*InsnID*/0,
   18483             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18484             :         // GIR_Coverage, 1249,
   18485             :         GIR_Done,
   18486             :       // Label 1242: @43846
   18487             :       GIM_Try, /*On fail goto*//*Label 1243*/ 43886, // Rule ID 1255 //
   18488             :         GIM_CheckFeatures, GIFBS_HasNEON,
   18489             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_scalar_uqxtn,
   18490             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   18491             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   18492             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   18493             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   18494             :         // (intrinsic_wo_chain:{ *:[i32] } 279:{ *:[iPTR] }, FPR64:{ *:[i64] }:$Rn)  =>  (UQXTNv1i32:{ *:[i32] } FPR64:{ *:[i64] }:$Rn)
   18495             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQXTNv1i32,
   18496             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18497             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18498             :         GIR_EraseFromParent, /*InsnID*/0,
   18499             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18500             :         // GIR_Coverage, 1255,
   18501             :         GIR_Done,
   18502             :       // Label 1243: @43886
   18503             :       GIM_Try, /*On fail goto*//*Label 1244*/ 43926, // Rule ID 1455 //
   18504             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   18505             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmaxnmv,
   18506             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
   18507             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   18508             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR16RegClassID,
   18509             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   18510             :         // (intrinsic_wo_chain:{ *:[f16] } 238:{ *:[iPTR] }, V64:{ *:[v4f16] }:$Rn)  =>  (FMAXNMVv4i16v:{ *:[f16] } V64:{ *:[v4f16] }:$Rn)
   18511             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMAXNMVv4i16v,
   18512             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18513             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18514             :         GIR_EraseFromParent, /*InsnID*/0,
   18515             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18516             :         // GIR_Coverage, 1455,
   18517             :         GIR_Done,
   18518             :       // Label 1244: @43926
   18519             :       GIM_Try, /*On fail goto*//*Label 1245*/ 43966, // Rule ID 1456 //
   18520             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   18521             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmaxnmv,
   18522             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
   18523             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   18524             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR16RegClassID,
   18525             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   18526             :         // (intrinsic_wo_chain:{ *:[f16] } 238:{ *:[iPTR] }, V128:{ *:[v8f16] }:$Rn)  =>  (FMAXNMVv8i16v:{ *:[f16] } V128:{ *:[v8f16] }:$Rn)
   18527             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMAXNMVv8i16v,
   18528             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18529             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18530             :         GIR_EraseFromParent, /*InsnID*/0,
   18531             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18532             :         // GIR_Coverage, 1456,
   18533             :         GIR_Done,
   18534             :       // Label 1245: @43966
   18535             :       GIM_Try, /*On fail goto*//*Label 1246*/ 44006, // Rule ID 1457 //
   18536             :         GIM_CheckFeatures, GIFBS_HasNEON,
   18537             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmaxnmv,
   18538             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   18539             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   18540             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   18541             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   18542             :         // (intrinsic_wo_chain:{ *:[f32] } 238:{ *:[iPTR] }, V128:{ *:[v4f32] }:$Rn)  =>  (FMAXNMVv4i32v:{ *:[f32] } V128:{ *:[v4f32] }:$Rn)
   18543             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMAXNMVv4i32v,
   18544             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18545             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18546             :         GIR_EraseFromParent, /*InsnID*/0,
   18547             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18548             :         // GIR_Coverage, 1457,
   18549             :         GIR_Done,
   18550             :       // Label 1246: @44006
   18551             :       GIM_Try, /*On fail goto*//*Label 1247*/ 44046, // Rule ID 1458 //
   18552             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   18553             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmaxv,
   18554             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
   18555             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   18556             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR16RegClassID,
   18557             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   18558             :         // (intrinsic_wo_chain:{ *:[f16] } 240:{ *:[iPTR] }, V64:{ *:[v4f16] }:$Rn)  =>  (FMAXVv4i16v:{ *:[f16] } V64:{ *:[v4f16] }:$Rn)
   18559             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMAXVv4i16v,
   18560             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18561             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18562             :         GIR_EraseFromParent, /*InsnID*/0,
   18563             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18564             :         // GIR_Coverage, 1458,
   18565             :         GIR_Done,
   18566             :       // Label 1247: @44046
   18567             :       GIM_Try, /*On fail goto*//*Label 1248*/ 44086, // Rule ID 1459 //
   18568             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   18569             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmaxv,
   18570             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
   18571             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   18572             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR16RegClassID,
   18573             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   18574             :         // (intrinsic_wo_chain:{ *:[f16] } 240:{ *:[iPTR] }, V128:{ *:[v8f16] }:$Rn)  =>  (FMAXVv8i16v:{ *:[f16] } V128:{ *:[v8f16] }:$Rn)
   18575             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMAXVv8i16v,
   18576             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18577             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18578             :         GIR_EraseFromParent, /*InsnID*/0,
   18579             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18580             :         // GIR_Coverage, 1459,
   18581             :         GIR_Done,
   18582             :       // Label 1248: @44086
   18583             :       GIM_Try, /*On fail goto*//*Label 1249*/ 44126, // Rule ID 1460 //
   18584             :         GIM_CheckFeatures, GIFBS_HasNEON,
   18585             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmaxv,
   18586             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   18587             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   18588             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   18589             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   18590             :         // (intrinsic_wo_chain:{ *:[f32] } 240:{ *:[iPTR] }, V128:{ *:[v4f32] }:$Rn)  =>  (FMAXVv4i32v:{ *:[f32] } V128:{ *:[v4f32] }:$Rn)
   18591             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMAXVv4i32v,
   18592             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18593             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18594             :         GIR_EraseFromParent, /*InsnID*/0,
   18595             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18596             :         // GIR_Coverage, 1460,
   18597             :         GIR_Done,
   18598             :       // Label 1249: @44126
   18599             :       GIM_Try, /*On fail goto*//*Label 1250*/ 44166, // Rule ID 1461 //
   18600             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   18601             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fminnmv,
   18602             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
   18603             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   18604             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR16RegClassID,
   18605             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   18606             :         // (intrinsic_wo_chain:{ *:[f16] } 244:{ *:[iPTR] }, V64:{ *:[v4f16] }:$Rn)  =>  (FMINNMVv4i16v:{ *:[f16] } V64:{ *:[v4f16] }:$Rn)
   18607             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMINNMVv4i16v,
   18608             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18609             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18610             :         GIR_EraseFromParent, /*InsnID*/0,
   18611             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18612             :         // GIR_Coverage, 1461,
   18613             :         GIR_Done,
   18614             :       // Label 1250: @44166
   18615             :       GIM_Try, /*On fail goto*//*Label 1251*/ 44206, // Rule ID 1462 //
   18616             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   18617             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fminnmv,
   18618             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
   18619             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   18620             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR16RegClassID,
   18621             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   18622             :         // (intrinsic_wo_chain:{ *:[f16] } 244:{ *:[iPTR] }, V128:{ *:[v8f16] }:$Rn)  =>  (FMINNMVv8i16v:{ *:[f16] } V128:{ *:[v8f16] }:$Rn)
   18623             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMINNMVv8i16v,
   18624             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18625             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18626             :         GIR_EraseFromParent, /*InsnID*/0,
   18627             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18628             :         // GIR_Coverage, 1462,
   18629             :         GIR_Done,
   18630             :       // Label 1251: @44206
   18631             :       GIM_Try, /*On fail goto*//*Label 1252*/ 44246, // Rule ID 1463 //
   18632             :         GIM_CheckFeatures, GIFBS_HasNEON,
   18633             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fminnmv,
   18634             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   18635             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   18636             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   18637             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   18638             :         // (intrinsic_wo_chain:{ *:[f32] } 244:{ *:[iPTR] }, V128:{ *:[v4f32] }:$Rn)  =>  (FMINNMVv4i32v:{ *:[f32] } V128:{ *:[v4f32] }:$Rn)
   18639             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMINNMVv4i32v,
   18640             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18641             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18642             :         GIR_EraseFromParent, /*InsnID*/0,
   18643             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18644             :         // GIR_Coverage, 1463,
   18645             :         GIR_Done,
   18646             :       // Label 1252: @44246
   18647             :       GIM_Try, /*On fail goto*//*Label 1253*/ 44286, // Rule ID 1464 //
   18648             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   18649             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fminv,
   18650             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
   18651             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   18652             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR16RegClassID,
   18653             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   18654             :         // (intrinsic_wo_chain:{ *:[f16] } 246:{ *:[iPTR] }, V64:{ *:[v4f16] }:$Rn)  =>  (FMINVv4i16v:{ *:[f16] } V64:{ *:[v4f16] }:$Rn)
   18655             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMINVv4i16v,
   18656             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18657             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18658             :         GIR_EraseFromParent, /*InsnID*/0,
   18659             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18660             :         // GIR_Coverage, 1464,
   18661             :         GIR_Done,
   18662             :       // Label 1253: @44286
   18663             :       GIM_Try, /*On fail goto*//*Label 1254*/ 44326, // Rule ID 1465 //
   18664             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   18665             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fminv,
   18666             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
   18667             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   18668             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR16RegClassID,
   18669             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   18670             :         // (intrinsic_wo_chain:{ *:[f16] } 246:{ *:[iPTR] }, V128:{ *:[v8f16] }:$Rn)  =>  (FMINVv8i16v:{ *:[f16] } V128:{ *:[v8f16] }:$Rn)
   18671             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMINVv8i16v,
   18672             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18673             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18674             :         GIR_EraseFromParent, /*InsnID*/0,
   18675             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18676             :         // GIR_Coverage, 1465,
   18677             :         GIR_Done,
   18678             :       // Label 1254: @44326
   18679             :       GIM_Try, /*On fail goto*//*Label 1255*/ 44366, // Rule ID 1466 //
   18680             :         GIM_CheckFeatures, GIFBS_HasNEON,
   18681             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fminv,
   18682             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   18683             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   18684             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   18685             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   18686             :         // (intrinsic_wo_chain:{ *:[f32] } 246:{ *:[iPTR] }, V128:{ *:[v4f32] }:$Rn)  =>  (FMINVv4i32v:{ *:[f32] } V128:{ *:[v4f32] }:$Rn)
   18687             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMINVv4i32v,
   18688             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18689             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18690             :         GIR_EraseFromParent, /*InsnID*/0,
   18691             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18692             :         // GIR_Coverage, 1466,
   18693             :         GIR_Done,
   18694             :       // Label 1255: @44366
   18695             :       GIM_Try, /*On fail goto*//*Label 1256*/ 44406, // Rule ID 1751 //
   18696             :         GIM_CheckFeatures, GIFBS_HasAES,
   18697             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_crypto_aesmc,
   18698             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   18699             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   18700             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   18701             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   18702             :         // (intrinsic_wo_chain:{ *:[v16i8] } 196:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn)  =>  (AESMCrr:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn)
   18703             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::AESMCrr,
   18704             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18705             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18706             :         GIR_EraseFromParent, /*InsnID*/0,
   18707             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18708             :         // GIR_Coverage, 1751,
   18709             :         GIR_Done,
   18710             :       // Label 1256: @44406
   18711             :       GIM_Try, /*On fail goto*//*Label 1257*/ 44446, // Rule ID 1752 //
   18712             :         GIM_CheckFeatures, GIFBS_HasAES,
   18713             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_crypto_aesimc,
   18714             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   18715             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   18716             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   18717             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   18718             :         // (intrinsic_wo_chain:{ *:[v16i8] } 195:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn)  =>  (AESIMCrr:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn)
   18719             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::AESIMCrr,
   18720             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18721             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18722             :         GIR_EraseFromParent, /*InsnID*/0,
   18723             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18724             :         // GIR_Coverage, 1752,
   18725             :         GIR_Done,
   18726             :       // Label 1257: @44446
   18727             :       GIM_Try, /*On fail goto*//*Label 1258*/ 44486, // Rule ID 1760 //
   18728             :         GIM_CheckFeatures, GIFBS_HasSHA2,
   18729             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_crypto_sha1h,
   18730             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   18731             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   18732             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   18733             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   18734             :         // (intrinsic_wo_chain:{ *:[i32] } 198:{ *:[iPTR] }, FPR32:{ *:[i32] }:$Rn)  =>  (SHA1Hrr:{ *:[i32] } FPR32:{ *:[i32] }:$Rn)
   18735             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SHA1Hrr,
   18736             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18737             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18738             :         GIR_EraseFromParent, /*InsnID*/0,
   18739             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18740             :         // GIR_Coverage, 1760,
   18741             :         GIR_Done,
   18742             :       // Label 1258: @44486
   18743             :       GIM_Try, /*On fail goto*//*Label 1259*/ 44526, // Rule ID 1803 //
   18744             :         GIM_CheckFeatures, GIFBS_HasNEON,
   18745             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqabs,
   18746             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   18747             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   18748             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   18749             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   18750             :         // (intrinsic_wo_chain:{ *:[v1i64] } 291:{ *:[iPTR] }, FPR64:{ *:[v1i64] }:$Rn)  =>  (SQABSv1i64:{ *:[v1i64] } FPR64:{ *:[v1i64] }:$Rn)
   18751             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQABSv1i64,
   18752             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18753             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18754             :         GIR_EraseFromParent, /*InsnID*/0,
   18755             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18756             :         // GIR_Coverage, 1803,
   18757             :         GIR_Done,
   18758             :       // Label 1259: @44526
   18759             :       GIM_Try, /*On fail goto*//*Label 1260*/ 44564, // Rule ID 2278 //
   18760             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frintn,
   18761             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   18762             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   18763             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   18764             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   18765             :         // (intrinsic_wo_chain:{ *:[v1f64] } 251:{ *:[iPTR] }, FPR64:{ *:[v1f64] }:$Rn)  =>  (FRINTNDr:{ *:[v1f64] } FPR64:{ *:[v1f64] }:$Rn)
   18766             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRINTNDr,
   18767             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18768             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18769             :         GIR_EraseFromParent, /*InsnID*/0,
   18770             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18771             :         // GIR_Coverage, 2278,
   18772             :         GIR_Done,
   18773             :       // Label 1260: @44564
   18774             :       GIM_Try, /*On fail goto*//*Label 1261*/ 44602, // Rule ID 2297 //
   18775             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvthf2fp,
   18776             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   18777             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   18778             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   18779             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   18780             :         // (intrinsic_wo_chain:{ *:[v4f32] } 365:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn)  =>  (FCVTLv4i16:{ *:[v4f32] } V64:{ *:[v4i16] }:$Rn)
   18781             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTLv4i16,
   18782             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18783             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18784             :         GIR_EraseFromParent, /*InsnID*/0,
   18785             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18786             :         // GIR_Coverage, 2297,
   18787             :         GIR_Done,
   18788             :       // Label 1261: @44602
   18789             :       GIM_Try, /*On fail goto*//*Label 1262*/ 44640, // Rule ID 2303 //
   18790             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfp2hf,
   18791             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   18792             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   18793             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   18794             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   18795             :         // (intrinsic_wo_chain:{ *:[v4i16] } 362:{ *:[iPTR] }, V128:{ *:[v4f32] }:$Rn)  =>  (FCVTNv4i16:{ *:[v4i16] } V128:{ *:[v4f32] }:$Rn)
   18796             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTNv4i16,
   18797             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18798             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18799             :         GIR_EraseFromParent, /*InsnID*/0,
   18800             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18801             :         // GIR_Coverage, 2303,
   18802             :         GIR_Done,
   18803             :       // Label 1262: @44640
   18804             :       GIM_Try, /*On fail goto*//*Label 1263*/ 44680, // Rule ID 2455 //
   18805             :         GIM_CheckFeatures, GIFBS_HasNEON,
   18806             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqneg,
   18807             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   18808             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   18809             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   18810             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   18811             :         // (intrinsic_wo_chain:{ *:[v1i64] } 296:{ *:[iPTR] }, FPR64:{ *:[v1i64] }:$Rn)  =>  (SQNEGv1i64:{ *:[v1i64] } FPR64:{ *:[v1i64] }:$Rn)
   18812             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQNEGv1i64,
   18813             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18814             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18815             :         GIR_EraseFromParent, /*InsnID*/0,
   18816             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18817             :         // GIR_Coverage, 2455,
   18818             :         GIR_Done,
   18819             :       // Label 1263: @44680
   18820             :       GIM_Try, /*On fail goto*//*Label 1264*/ 44718, // Rule ID 2458 //
   18821             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtas,
   18822             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   18823             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   18824             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   18825             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   18826             :         // (intrinsic_wo_chain:{ *:[v1i64] } 224:{ *:[iPTR] }, FPR64:{ *:[v1f64] }:$Rn)  =>  (FCVTASv1i64:{ *:[v1i64] } FPR64:{ *:[v1f64] }:$Rn)
   18827             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTASv1i64,
   18828             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18829             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18830             :         GIR_EraseFromParent, /*InsnID*/0,
   18831             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18832             :         // GIR_Coverage, 2458,
   18833             :         GIR_Done,
   18834             :       // Label 1264: @44718
   18835             :       GIM_Try, /*On fail goto*//*Label 1265*/ 44756, // Rule ID 2459 //
   18836             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtau,
   18837             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   18838             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   18839             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   18840             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   18841             :         // (intrinsic_wo_chain:{ *:[v1i64] } 225:{ *:[iPTR] }, FPR64:{ *:[v1f64] }:$Rn)  =>  (FCVTAUv1i64:{ *:[v1i64] } FPR64:{ *:[v1f64] }:$Rn)
   18842             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTAUv1i64,
   18843             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18844             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18845             :         GIR_EraseFromParent, /*InsnID*/0,
   18846             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18847             :         // GIR_Coverage, 2459,
   18848             :         GIR_Done,
   18849             :       // Label 1265: @44756
   18850             :       GIM_Try, /*On fail goto*//*Label 1266*/ 44794, // Rule ID 2460 //
   18851             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtms,
   18852             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   18853             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   18854             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   18855             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   18856             :         // (intrinsic_wo_chain:{ *:[v1i64] } 226:{ *:[iPTR] }, FPR64:{ *:[v1f64] }:$Rn)  =>  (FCVTMSv1i64:{ *:[v1i64] } FPR64:{ *:[v1f64] }:$Rn)
   18857             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTMSv1i64,
   18858             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18859             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18860             :         GIR_EraseFromParent, /*InsnID*/0,
   18861             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18862             :         // GIR_Coverage, 2460,
   18863             :         GIR_Done,
   18864             :       // Label 1266: @44794
   18865             :       GIM_Try, /*On fail goto*//*Label 1267*/ 44832, // Rule ID 2461 //
   18866             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtmu,
   18867             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   18868             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   18869             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   18870             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   18871             :         // (intrinsic_wo_chain:{ *:[v1i64] } 227:{ *:[iPTR] }, FPR64:{ *:[v1f64] }:$Rn)  =>  (FCVTMUv1i64:{ *:[v1i64] } FPR64:{ *:[v1f64] }:$Rn)
   18872             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTMUv1i64,
   18873             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18874             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18875             :         GIR_EraseFromParent, /*InsnID*/0,
   18876             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18877             :         // GIR_Coverage, 2461,
   18878             :         GIR_Done,
   18879             :       // Label 1267: @44832
   18880             :       GIM_Try, /*On fail goto*//*Label 1268*/ 44870, // Rule ID 2462 //
   18881             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtns,
   18882             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   18883             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   18884             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   18885             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   18886             :         // (intrinsic_wo_chain:{ *:[v1i64] } 228:{ *:[iPTR] }, FPR64:{ *:[v1f64] }:$Rn)  =>  (FCVTNSv1i64:{ *:[v1i64] } FPR64:{ *:[v1f64] }:$Rn)
   18887             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTNSv1i64,
   18888             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18889             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18890             :         GIR_EraseFromParent, /*InsnID*/0,
   18891             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18892             :         // GIR_Coverage, 2462,
   18893             :         GIR_Done,
   18894             :       // Label 1268: @44870
   18895             :       GIM_Try, /*On fail goto*//*Label 1269*/ 44908, // Rule ID 2463 //
   18896             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtnu,
   18897             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   18898             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   18899             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   18900             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   18901             :         // (intrinsic_wo_chain:{ *:[v1i64] } 229:{ *:[iPTR] }, FPR64:{ *:[v1f64] }:$Rn)  =>  (FCVTNUv1i64:{ *:[v1i64] } FPR64:{ *:[v1f64] }:$Rn)
   18902             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTNUv1i64,
   18903             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18904             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18905             :         GIR_EraseFromParent, /*InsnID*/0,
   18906             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18907             :         // GIR_Coverage, 2463,
   18908             :         GIR_Done,
   18909             :       // Label 1269: @44908
   18910             :       GIM_Try, /*On fail goto*//*Label 1270*/ 44946, // Rule ID 2464 //
   18911             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtps,
   18912             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   18913             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   18914             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   18915             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   18916             :         // (intrinsic_wo_chain:{ *:[v1i64] } 230:{ *:[iPTR] }, FPR64:{ *:[v1f64] }:$Rn)  =>  (FCVTPSv1i64:{ *:[v1i64] } FPR64:{ *:[v1f64] }:$Rn)
   18917             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTPSv1i64,
   18918             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18919             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18920             :         GIR_EraseFromParent, /*InsnID*/0,
   18921             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18922             :         // GIR_Coverage, 2464,
   18923             :         GIR_Done,
   18924             :       // Label 1270: @44946
   18925             :       GIM_Try, /*On fail goto*//*Label 1271*/ 44984, // Rule ID 2465 //
   18926             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fcvtpu,
   18927             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   18928             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   18929             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   18930             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   18931             :         // (intrinsic_wo_chain:{ *:[v1i64] } 231:{ *:[iPTR] }, FPR64:{ *:[v1f64] }:$Rn)  =>  (FCVTPUv1i64:{ *:[v1i64] } FPR64:{ *:[v1f64] }:$Rn)
   18932             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTPUv1i64,
   18933             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18934             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18935             :         GIR_EraseFromParent, /*InsnID*/0,
   18936             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18937             :         // GIR_Coverage, 2465,
   18938             :         GIR_Done,
   18939             :       // Label 1271: @44984
   18940             :       GIM_Try, /*On fail goto*//*Label 1272*/ 45022, // Rule ID 2466 //
   18941             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frecpe,
   18942             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
   18943             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
   18944             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR16RegClassID,
   18945             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR16RegClassID,
   18946             :         // (intrinsic_wo_chain:{ *:[f16] } 248:{ *:[iPTR] }, FPR16:{ *:[f16] }:$Rn)  =>  (FRECPEv1f16:{ *:[f16] } FPR16:{ *:[f16] }:$Rn)
   18947             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRECPEv1f16,
   18948             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18949             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18950             :         GIR_EraseFromParent, /*InsnID*/0,
   18951             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18952             :         // GIR_Coverage, 2466,
   18953             :         GIR_Done,
   18954             :       // Label 1272: @45022
   18955             :       GIM_Try, /*On fail goto*//*Label 1273*/ 45060, // Rule ID 2467 //
   18956             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frecpe,
   18957             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   18958             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   18959             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   18960             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   18961             :         // (intrinsic_wo_chain:{ *:[f32] } 248:{ *:[iPTR] }, FPR32:{ *:[f32] }:$Rn)  =>  (FRECPEv1i32:{ *:[f32] } FPR32:{ *:[f32] }:$Rn)
   18962             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRECPEv1i32,
   18963             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18964             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18965             :         GIR_EraseFromParent, /*InsnID*/0,
   18966             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18967             :         // GIR_Coverage, 2467,
   18968             :         GIR_Done,
   18969             :       // Label 1273: @45060
   18970             :       GIM_Try, /*On fail goto*//*Label 1274*/ 45098, // Rule ID 2468 //
   18971             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frecpe,
   18972             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   18973             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   18974             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   18975             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   18976             :         // (intrinsic_wo_chain:{ *:[f64] } 248:{ *:[iPTR] }, FPR64:{ *:[f64] }:$Rn)  =>  (FRECPEv1i64:{ *:[f64] } FPR64:{ *:[f64] }:$Rn)
   18977             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRECPEv1i64,
   18978             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18979             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18980             :         GIR_EraseFromParent, /*InsnID*/0,
   18981             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18982             :         // GIR_Coverage, 2468,
   18983             :         GIR_Done,
   18984             :       // Label 1274: @45098
   18985             :       GIM_Try, /*On fail goto*//*Label 1275*/ 45136, // Rule ID 2469 //
   18986             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frecpe,
   18987             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   18988             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   18989             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   18990             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   18991             :         // (intrinsic_wo_chain:{ *:[v1f64] } 248:{ *:[iPTR] }, FPR64:{ *:[v1f64] }:$Rn)  =>  (FRECPEv1i64:{ *:[v1f64] } FPR64:{ *:[v1f64] }:$Rn)
   18992             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRECPEv1i64,
   18993             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   18994             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   18995             :         GIR_EraseFromParent, /*InsnID*/0,
   18996             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   18997             :         // GIR_Coverage, 2469,
   18998             :         GIR_Done,
   18999             :       // Label 1275: @45136
   19000             :       GIM_Try, /*On fail goto*//*Label 1276*/ 45174, // Rule ID 2481 //
   19001             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frecpx,
   19002             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
   19003             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
   19004             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR16RegClassID,
   19005             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR16RegClassID,
   19006             :         // (intrinsic_wo_chain:{ *:[f16] } 250:{ *:[iPTR] }, FPR16:{ *:[f16] }:$Rn)  =>  (FRECPXv1f16:{ *:[f16] } FPR16:{ *:[f16] }:$Rn)
   19007             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRECPXv1f16,
   19008             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   19009             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   19010             :         GIR_EraseFromParent, /*InsnID*/0,
   19011             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19012             :         // GIR_Coverage, 2481,
   19013             :         GIR_Done,
   19014             :       // Label 1276: @45174
   19015             :       GIM_Try, /*On fail goto*//*Label 1277*/ 45212, // Rule ID 2482 //
   19016             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frecpx,
   19017             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   19018             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   19019             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   19020             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   19021             :         // (intrinsic_wo_chain:{ *:[f32] } 250:{ *:[iPTR] }, FPR32:{ *:[f32] }:$Rn)  =>  (FRECPXv1i32:{ *:[f32] } FPR32:{ *:[f32] }:$Rn)
   19022             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRECPXv1i32,
   19023             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   19024             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   19025             :         GIR_EraseFromParent, /*InsnID*/0,
   19026             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19027             :         // GIR_Coverage, 2482,
   19028             :         GIR_Done,
   19029             :       // Label 1277: @45212
   19030             :       GIM_Try, /*On fail goto*//*Label 1278*/ 45250, // Rule ID 2483 //
   19031             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frecpx,
   19032             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   19033             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   19034             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   19035             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   19036             :         // (intrinsic_wo_chain:{ *:[f64] } 250:{ *:[iPTR] }, FPR64:{ *:[f64] }:$Rn)  =>  (FRECPXv1i64:{ *:[f64] } FPR64:{ *:[f64] }:$Rn)
   19037             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRECPXv1i64,
   19038             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   19039             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   19040             :         GIR_EraseFromParent, /*InsnID*/0,
   19041             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19042             :         // GIR_Coverage, 2483,
   19043             :         GIR_Done,
   19044             :       // Label 1278: @45250
   19045             :       GIM_Try, /*On fail goto*//*Label 1279*/ 45288, // Rule ID 2484 //
   19046             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frsqrte,
   19047             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
   19048             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
   19049             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR16RegClassID,
   19050             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR16RegClassID,
   19051             :         // (intrinsic_wo_chain:{ *:[f16] } 252:{ *:[iPTR] }, FPR16:{ *:[f16] }:$Rn)  =>  (FRSQRTEv1f16:{ *:[f16] } FPR16:{ *:[f16] }:$Rn)
   19052             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRSQRTEv1f16,
   19053             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   19054             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   19055             :         GIR_EraseFromParent, /*InsnID*/0,
   19056             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19057             :         // GIR_Coverage, 2484,
   19058             :         GIR_Done,
   19059             :       // Label 1279: @45288
   19060             :       GIM_Try, /*On fail goto*//*Label 1280*/ 45326, // Rule ID 2485 //
   19061             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frsqrte,
   19062             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   19063             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   19064             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   19065             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   19066             :         // (intrinsic_wo_chain:{ *:[f32] } 252:{ *:[iPTR] }, FPR32:{ *:[f32] }:$Rn)  =>  (FRSQRTEv1i32:{ *:[f32] } FPR32:{ *:[f32] }:$Rn)
   19067             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRSQRTEv1i32,
   19068             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   19069             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   19070             :         GIR_EraseFromParent, /*InsnID*/0,
   19071             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19072             :         // GIR_Coverage, 2485,
   19073             :         GIR_Done,
   19074             :       // Label 1280: @45326
   19075             :       GIM_Try, /*On fail goto*//*Label 1281*/ 45364, // Rule ID 2486 //
   19076             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frsqrte,
   19077             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   19078             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   19079             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   19080             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   19081             :         // (intrinsic_wo_chain:{ *:[f64] } 252:{ *:[iPTR] }, FPR64:{ *:[f64] }:$Rn)  =>  (FRSQRTEv1i64:{ *:[f64] } FPR64:{ *:[f64] }:$Rn)
   19082             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRSQRTEv1i64,
   19083             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   19084             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   19085             :         GIR_EraseFromParent, /*InsnID*/0,
   19086             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19087             :         // GIR_Coverage, 2486,
   19088             :         GIR_Done,
   19089             :       // Label 1281: @45364
   19090             :       GIM_Try, /*On fail goto*//*Label 1282*/ 45402, // Rule ID 2487 //
   19091             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frsqrte,
   19092             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   19093             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   19094             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   19095             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   19096             :         // (intrinsic_wo_chain:{ *:[v1f64] } 252:{ *:[iPTR] }, FPR64:{ *:[v1f64] }:$Rn)  =>  (FRSQRTEv1i64:{ *:[v1f64] } FPR64:{ *:[v1f64] }:$Rn)
   19097             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRSQRTEv1i64,
   19098             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   19099             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   19100             :         GIR_EraseFromParent, /*InsnID*/0,
   19101             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19102             :         // GIR_Coverage, 2487,
   19103             :         GIR_Done,
   19104             :       // Label 1282: @45402
   19105             :       GIM_Try, /*On fail goto*//*Label 1283*/ 45440, // Rule ID 2614 //
   19106             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_faddv,
   19107             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   19108             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   19109             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   19110             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   19111             :         // (intrinsic_wo_chain:{ *:[f32] } 223:{ *:[iPTR] }, V64:{ *:[v2f32] }:$Rn)  =>  (FADDPv2i32p:{ *:[f32] } V64:{ *:[v2f32] }:$Rn)
   19112             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FADDPv2i32p,
   19113             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   19114             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   19115             :         GIR_EraseFromParent, /*InsnID*/0,
   19116             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19117             :         // GIR_Coverage, 2614,
   19118             :         GIR_Done,
   19119             :       // Label 1283: @45440
   19120             :       GIM_Try, /*On fail goto*//*Label 1284*/ 45478, // Rule ID 2616 //
   19121             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_faddv,
   19122             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   19123             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   19124             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   19125             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   19126             :         // (intrinsic_wo_chain:{ *:[f64] } 223:{ *:[iPTR] }, V128:{ *:[v2f64] }:$Rn)  =>  (FADDPv2i64p:{ *:[f64] } V128:{ *:[v2f64] }:$Rn)
   19127             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FADDPv2i64p,
   19128             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   19129             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   19130             :         GIR_EraseFromParent, /*InsnID*/0,
   19131             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19132             :         // GIR_Coverage, 2616,
   19133             :         GIR_Done,
   19134             :       // Label 1284: @45478
   19135             :       GIM_Try, /*On fail goto*//*Label 1285*/ 45516, // Rule ID 2617 //
   19136             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmaxnmv,
   19137             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   19138             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   19139             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   19140             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   19141             :         // (intrinsic_wo_chain:{ *:[f32] } 238:{ *:[iPTR] }, V64:{ *:[v2f32] }:$Rn)  =>  (FMAXNMPv2i32p:{ *:[f32] } V64:{ *:[v2f32] }:$Rn)
   19142             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMAXNMPv2i32p,
   19143             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   19144             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   19145             :         GIR_EraseFromParent, /*InsnID*/0,
   19146             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19147             :         // GIR_Coverage, 2617,
   19148             :         GIR_Done,
   19149             :       // Label 1285: @45516
   19150             :       GIM_Try, /*On fail goto*//*Label 1286*/ 45554, // Rule ID 2618 //
   19151             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmaxnmv,
   19152             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   19153             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   19154             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   19155             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   19156             :         // (intrinsic_wo_chain:{ *:[f64] } 238:{ *:[iPTR] }, V128:{ *:[v2f64] }:$Rn)  =>  (FMAXNMPv2i64p:{ *:[f64] } V128:{ *:[v2f64] }:$Rn)
   19157             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMAXNMPv2i64p,
   19158             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   19159             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   19160             :         GIR_EraseFromParent, /*InsnID*/0,
   19161             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19162             :         // GIR_Coverage, 2618,
   19163             :         GIR_Done,
   19164             :       // Label 1286: @45554
   19165             :       GIM_Try, /*On fail goto*//*Label 1287*/ 45592, // Rule ID 2619 //
   19166             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmaxv,
   19167             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   19168             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   19169             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   19170             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   19171             :         // (intrinsic_wo_chain:{ *:[f32] } 240:{ *:[iPTR] }, V64:{ *:[v2f32] }:$Rn)  =>  (FMAXPv2i32p:{ *:[f32] } V64:{ *:[v2f32] }:$Rn)
   19172             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMAXPv2i32p,
   19173             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   19174             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   19175             :         GIR_EraseFromParent, /*InsnID*/0,
   19176             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19177             :         // GIR_Coverage, 2619,
   19178             :         GIR_Done,
   19179             :       // Label 1287: @45592
   19180             :       GIM_Try, /*On fail goto*//*Label 1288*/ 45630, // Rule ID 2620 //
   19181             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmaxv,
   19182             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   19183             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   19184             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   19185             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   19186             :         // (intrinsic_wo_chain:{ *:[f64] } 240:{ *:[iPTR] }, V128:{ *:[v2f64] }:$Rn)  =>  (FMAXPv2i64p:{ *:[f64] } V128:{ *:[v2f64] }:$Rn)
   19187             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMAXPv2i64p,
   19188             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   19189             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   19190             :         GIR_EraseFromParent, /*InsnID*/0,
   19191             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19192             :         // GIR_Coverage, 2620,
   19193             :         GIR_Done,
   19194             :       // Label 1288: @45630
   19195             :       GIM_Try, /*On fail goto*//*Label 1289*/ 45668, // Rule ID 2621 //
   19196             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fminnmv,
   19197             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   19198             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   19199             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   19200             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   19201             :         // (intrinsic_wo_chain:{ *:[f32] } 244:{ *:[iPTR] }, V64:{ *:[v2f32] }:$Rn)  =>  (FMINNMPv2i32p:{ *:[f32] } V64:{ *:[v2f32] }:$Rn)
   19202             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMINNMPv2i32p,
   19203             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   19204             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   19205             :         GIR_EraseFromParent, /*InsnID*/0,
   19206             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19207             :         // GIR_Coverage, 2621,
   19208             :         GIR_Done,
   19209             :       // Label 1289: @45668
   19210             :       GIM_Try, /*On fail goto*//*Label 1290*/ 45706, // Rule ID 2622 //
   19211             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fminnmv,
   19212             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   19213             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   19214             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   19215             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   19216             :         // (intrinsic_wo_chain:{ *:[f64] } 244:{ *:[iPTR] }, V128:{ *:[v2f64] }:$Rn)  =>  (FMINNMPv2i64p:{ *:[f64] } V128:{ *:[v2f64] }:$Rn)
   19217             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMINNMPv2i64p,
   19218             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   19219             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   19220             :         GIR_EraseFromParent, /*InsnID*/0,
   19221             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19222             :         // GIR_Coverage, 2622,
   19223             :         GIR_Done,
   19224             :       // Label 1290: @45706
   19225             :       GIM_Try, /*On fail goto*//*Label 1291*/ 45744, // Rule ID 2623 //
   19226             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fminv,
   19227             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   19228             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   19229             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   19230             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   19231             :         // (intrinsic_wo_chain:{ *:[f32] } 246:{ *:[iPTR] }, V64:{ *:[v2f32] }:$Rn)  =>  (FMINPv2i32p:{ *:[f32] } V64:{ *:[v2f32] }:$Rn)
   19232             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMINPv2i32p,
   19233             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   19234             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   19235             :         GIR_EraseFromParent, /*InsnID*/0,
   19236             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19237             :         // GIR_Coverage, 2623,
   19238             :         GIR_Done,
   19239             :       // Label 1291: @45744
   19240             :       GIM_Try, /*On fail goto*//*Label 1292*/ 45782, // Rule ID 2624 //
   19241             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fminv,
   19242             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   19243             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   19244             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   19245             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   19246             :         // (intrinsic_wo_chain:{ *:[f64] } 246:{ *:[iPTR] }, V128:{ *:[v2f64] }:$Rn)  =>  (FMINPv2i64p:{ *:[f64] } V128:{ *:[v2f64] }:$Rn)
   19247             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMINPv2i64p,
   19248             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   19249             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   19250             :         GIR_EraseFromParent, /*InsnID*/0,
   19251             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19252             :         // GIR_Coverage, 2624,
   19253             :         GIR_Done,
   19254             :       // Label 1292: @45782
   19255             :       GIM_Reject,
   19256             :     // Label 1079: @45783
   19257             :     GIM_Try, /*On fail goto*//*Label 1293*/ 68811,
   19258             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
   19259             :       GIM_Try, /*On fail goto*//*Label 1294*/ 45883, // Rule ID 2938 //
   19260             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfxu2fp,
   19261             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
   19262             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   19263             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   19264             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR16RegClassID,
   19265             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
   19266             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_AND,
   19267             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
   19268             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
   19269             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR32RegClassID,
   19270             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 65535,
   19271             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
   19272             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_CONSTANT,
   19273             :         GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIPFP_I64_Predicate_vecshiftR16,
   19274             :         // MIs[2] Operand 1
   19275             :         // No operand predicates
   19276             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   19277             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
   19278             :         // (intrinsic_wo_chain:{ *:[f16] } 364:{ *:[iPTR] }, (and:{ *:[i32] } FPR32:{ *:[i32] }:$Rn, 65535:{ *:[i32] }), (imm:{ *:[i32] })<<P:Predicate_vecshiftR16>>:$imm)  =>  (UCVTFh:{ *:[f16] } (EXTRACT_SUBREG:{ *:[f16] } FPR32:{ *:[i32] }:$Rn, hsub:{ *:[i32] }), (imm:{ *:[i32] })<<P:Predicate_vecshiftR16>>:$imm)
   19279             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
   19280             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY,
   19281             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   19282             :         GIR_CopySubReg, /*NewInsnID*/1, /*OldInsnID*/1, /*OpIdx*/1, /*SubRegIdx*/7, // Rn
   19283             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   19284             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UCVTFh,
   19285             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   19286             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   19287             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // imm
   19288             :         GIR_EraseFromParent, /*InsnID*/0,
   19289             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19290             :         // GIR_Coverage, 2938,
   19291             :         GIR_Done,
   19292             :       // Label 1294: @45883
   19293             :       GIM_Try, /*On fail goto*//*Label 1295*/ 45967, // Rule ID 1171 //
   19294             :         GIM_CheckFeatures, GIFBS_HasNEON_HasRDM,
   19295             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqadd,
   19296             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   19297             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   19298             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   19299             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   19300             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   19301             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   19302             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
   19303             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
   19304             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sqrdmulh,
   19305             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
   19306             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s16,
   19307             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   19308             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   19309             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   19310             :         // (intrinsic_wo_chain:{ *:[v4i16] } 292:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rd, (intrinsic_wo_chain:{ *:[v4i16] } 297:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm))  =>  (SQRDMLAHv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
   19311             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRDMLAHv4i16,
   19312             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   19313             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   19314             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
   19315             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
   19316             :         GIR_EraseFromParent, /*InsnID*/0,
   19317             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19318             :         // GIR_Coverage, 1171,
   19319             :         GIR_Done,
   19320             :       // Label 1295: @45967
   19321             :       GIM_Try, /*On fail goto*//*Label 1296*/ 46051, // Rule ID 1172 //
   19322             :         GIM_CheckFeatures, GIFBS_HasNEON_HasRDM,
   19323             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqadd,
   19324             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   19325             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   19326             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   19327             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   19328             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   19329             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   19330             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
   19331             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
   19332             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sqrdmulh,
   19333             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
   19334             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s16,
   19335             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   19336             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   19337             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   19338             :         // (intrinsic_wo_chain:{ *:[v8i16] } 292:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rd, (intrinsic_wo_chain:{ *:[v8i16] } 297:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm))  =>  (SQRDMLAHv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
   19339             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRDMLAHv8i16,
   19340             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   19341             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   19342             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
   19343             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
   19344             :         GIR_EraseFromParent, /*InsnID*/0,
   19345             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19346             :         // GIR_Coverage, 1172,
   19347             :         GIR_Done,
   19348             :       // Label 1296: @46051
   19349             :       GIM_Try, /*On fail goto*//*Label 1297*/ 46135, // Rule ID 1173 //
   19350             :         GIM_CheckFeatures, GIFBS_HasNEON_HasRDM,
   19351             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqadd,
   19352             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   19353             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   19354             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   19355             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   19356             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   19357             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   19358             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
   19359             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
   19360             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sqrdmulh,
   19361             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
   19362             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s32,
   19363             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   19364             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   19365             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   19366             :         // (intrinsic_wo_chain:{ *:[v2i32] } 292:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rd, (intrinsic_wo_chain:{ *:[v2i32] } 297:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm))  =>  (SQRDMLAHv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
   19367             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRDMLAHv2i32,
   19368             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   19369             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   19370             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
   19371             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
   19372             :         GIR_EraseFromParent, /*InsnID*/0,
   19373             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19374             :         // GIR_Coverage, 1173,
   19375             :         GIR_Done,
   19376             :       // Label 1297: @46135
   19377             :       GIM_Try, /*On fail goto*//*Label 1298*/ 46219, // Rule ID 1174 //
   19378             :         GIM_CheckFeatures, GIFBS_HasNEON_HasRDM,
   19379             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqadd,
   19380             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   19381             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   19382             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   19383             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   19384             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   19385             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   19386             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
   19387             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
   19388             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sqrdmulh,
   19389             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
   19390             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s32,
   19391             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   19392             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   19393             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   19394             :         // (intrinsic_wo_chain:{ *:[v4i32] } 292:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rd, (intrinsic_wo_chain:{ *:[v4i32] } 297:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm))  =>  (SQRDMLAHv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
   19395             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRDMLAHv4i32,
   19396             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   19397             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   19398             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
   19399             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
   19400             :         GIR_EraseFromParent, /*InsnID*/0,
   19401             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19402             :         // GIR_Coverage, 1174,
   19403             :         GIR_Done,
   19404             :       // Label 1298: @46219
   19405             :       GIM_Try, /*On fail goto*//*Label 1299*/ 46303, // Rule ID 1175 //
   19406             :         GIM_CheckFeatures, GIFBS_HasNEON_HasRDM,
   19407             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqsub,
   19408             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   19409             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   19410             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   19411             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   19412             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   19413             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   19414             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
   19415             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
   19416             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sqrdmulh,
   19417             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
   19418             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s16,
   19419             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   19420             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   19421             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   19422             :         // (intrinsic_wo_chain:{ *:[v4i16] } 305:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rd, (intrinsic_wo_chain:{ *:[v4i16] } 297:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm))  =>  (SQRDMLSHv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
   19423             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRDMLSHv4i16,
   19424             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   19425             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   19426             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
   19427             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
   19428             :         GIR_EraseFromParent, /*InsnID*/0,
   19429             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19430             :         // GIR_Coverage, 1175,
   19431             :         GIR_Done,
   19432             :       // Label 1299: @46303
   19433             :       GIM_Try, /*On fail goto*//*Label 1300*/ 46387, // Rule ID 1176 //
   19434             :         GIM_CheckFeatures, GIFBS_HasNEON_HasRDM,
   19435             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqsub,
   19436             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   19437             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   19438             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   19439             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   19440             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   19441             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   19442             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
   19443             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
   19444             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sqrdmulh,
   19445             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
   19446             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s16,
   19447             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   19448             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   19449             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   19450             :         // (intrinsic_wo_chain:{ *:[v8i16] } 305:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rd, (intrinsic_wo_chain:{ *:[v8i16] } 297:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm))  =>  (SQRDMLSHv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
   19451             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRDMLSHv8i16,
   19452             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   19453             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   19454             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
   19455             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
   19456             :         GIR_EraseFromParent, /*InsnID*/0,
   19457             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19458             :         // GIR_Coverage, 1176,
   19459             :         GIR_Done,
   19460             :       // Label 1300: @46387
   19461             :       GIM_Try, /*On fail goto*//*Label 1301*/ 46471, // Rule ID 1177 //
   19462             :         GIM_CheckFeatures, GIFBS_HasNEON_HasRDM,
   19463             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqsub,
   19464             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   19465             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   19466             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   19467             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   19468             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   19469             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   19470             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
   19471             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
   19472             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sqrdmulh,
   19473             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
   19474             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s32,
   19475             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   19476             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   19477             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   19478             :         // (intrinsic_wo_chain:{ *:[v2i32] } 305:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rd, (intrinsic_wo_chain:{ *:[v2i32] } 297:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm))  =>  (SQRDMLSHv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
   19479             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRDMLSHv2i32,
   19480             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   19481             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   19482             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
   19483             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
   19484             :         GIR_EraseFromParent, /*InsnID*/0,
   19485             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19486             :         // GIR_Coverage, 1177,
   19487             :         GIR_Done,
   19488             :       // Label 1301: @46471
   19489             :       GIM_Try, /*On fail goto*//*Label 1302*/ 46555, // Rule ID 1178 //
   19490             :         GIM_CheckFeatures, GIFBS_HasNEON_HasRDM,
   19491             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqsub,
   19492             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   19493             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   19494             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   19495             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   19496             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   19497             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   19498             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
   19499             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
   19500             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sqrdmulh,
   19501             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
   19502             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s32,
   19503             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   19504             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   19505             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   19506             :         // (intrinsic_wo_chain:{ *:[v4i32] } 305:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rd, (intrinsic_wo_chain:{ *:[v4i32] } 297:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm))  =>  (SQRDMLSHv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
   19507             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRDMLSHv4i32,
   19508             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   19509             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   19510             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
   19511             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
   19512             :         GIR_EraseFromParent, /*InsnID*/0,
   19513             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19514             :         // GIR_Coverage, 1178,
   19515             :         GIR_Done,
   19516             :       // Label 1302: @46555
   19517             :       GIM_Try, /*On fail goto*//*Label 1303*/ 46639, // Rule ID 1313 //
   19518             :         GIM_CheckFeatures, GIFBS_HasNEON,
   19519             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqadd,
   19520             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   19521             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   19522             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   19523             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   19524             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   19525             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   19526             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
   19527             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
   19528             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sqdmull,
   19529             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
   19530             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s16,
   19531             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   19532             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   19533             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   19534             :         // (intrinsic_wo_chain:{ *:[v4i32] } 292:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rd, (intrinsic_wo_chain:{ *:[v4i32] } 294:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm))  =>  (SQDMLALv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
   19535             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQDMLALv4i16_v4i32,
   19536             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   19537             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   19538             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
   19539             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
   19540             :         GIR_EraseFromParent, /*InsnID*/0,
   19541             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19542             :         // GIR_Coverage, 1313,
   19543             :         GIR_Done,
   19544             :       // Label 1303: @46639
   19545             :       GIM_Try, /*On fail goto*//*Label 1304*/ 46723, // Rule ID 1315 //
   19546             :         GIM_CheckFeatures, GIFBS_HasNEON,
   19547             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqadd,
   19548             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   19549             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   19550             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
   19551             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   19552             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   19553             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   19554             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
   19555             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
   19556             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sqdmull,
   19557             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
   19558             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s32,
   19559             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   19560             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   19561             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   19562             :         // (intrinsic_wo_chain:{ *:[v2i64] } 292:{ *:[iPTR] }, V128:{ *:[v2i64] }:$Rd, (intrinsic_wo_chain:{ *:[v2i64] } 294:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm))  =>  (SQDMLALv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
   19563             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQDMLALv2i32_v2i64,
   19564             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   19565             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   19566             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
   19567             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
   19568             :         GIR_EraseFromParent, /*InsnID*/0,
   19569             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19570             :         // GIR_Coverage, 1315,
   19571             :         GIR_Done,
   19572             :       // Label 1304: @46723
   19573             :       GIM_Try, /*On fail goto*//*Label 1305*/ 46807, // Rule ID 1317 //
   19574             :         GIM_CheckFeatures, GIFBS_HasNEON,
   19575             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqsub,
   19576             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   19577             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   19578             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   19579             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   19580             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   19581             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   19582             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
   19583             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
   19584             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sqdmull,
   19585             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
   19586             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s16,
   19587             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   19588             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   19589             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   19590             :         // (intrinsic_wo_chain:{ *:[v4i32] } 305:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rd, (intrinsic_wo_chain:{ *:[v4i32] } 294:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm))  =>  (SQDMLSLv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
   19591             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQDMLSLv4i16_v4i32,
   19592             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   19593             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   19594             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
   19595             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
   19596             :         GIR_EraseFromParent, /*InsnID*/0,
   19597             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19598             :         // GIR_Coverage, 1317,
   19599             :         GIR_Done,
   19600             :       // Label 1305: @46807
   19601             :       GIM_Try, /*On fail goto*//*Label 1306*/ 46891, // Rule ID 1319 //
   19602             :         GIM_CheckFeatures, GIFBS_HasNEON,
   19603             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqsub,
   19604             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   19605             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   19606             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
   19607             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   19608             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   19609             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   19610             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
   19611             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
   19612             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sqdmull,
   19613             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
   19614             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s32,
   19615             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   19616             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   19617             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   19618             :         // (intrinsic_wo_chain:{ *:[v2i64] } 305:{ *:[iPTR] }, V128:{ *:[v2i64] }:$Rd, (intrinsic_wo_chain:{ *:[v2i64] } 294:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm))  =>  (SQDMLSLv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
   19619             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQDMLSLv2i32_v2i64,
   19620             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   19621             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   19622             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
   19623             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
   19624             :         GIR_EraseFromParent, /*InsnID*/0,
   19625             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19626             :         // GIR_Coverage, 1319,
   19627             :         GIR_Done,
   19628             :       // Label 1306: @46891
   19629             :       GIM_Try, /*On fail goto*//*Label 1307*/ 46975, // Rule ID 2442 //
   19630             :         GIM_CheckFeatures, GIFBS_HasRDM,
   19631             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqadd,
   19632             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   19633             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   19634             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   19635             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   19636             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   19637             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   19638             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
   19639             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
   19640             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sqrdmulh,
   19641             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
   19642             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
   19643             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   19644             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR32RegClassID,
   19645             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   19646             :         // (intrinsic_wo_chain:{ *:[i32] } 292:{ *:[iPTR] }, FPR32:{ *:[i32] }:$Rd, (intrinsic_wo_chain:{ *:[i32] } 297:{ *:[iPTR] }, FPR32:{ *:[i32] }:$Rn, FPR32:{ *:[i32] }:$Rm))  =>  (SQRDMLAHv1i32:{ *:[i32] } FPR32:{ *:[i32] }:$Rd, FPR32:{ *:[i32] }:$Rn, FPR32:{ *:[i32] }:$Rm)
   19647             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRDMLAHv1i32,
   19648             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   19649             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   19650             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
   19651             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
   19652             :         GIR_EraseFromParent, /*InsnID*/0,
   19653             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19654             :         // GIR_Coverage, 2442,
   19655             :         GIR_Done,
   19656             :       // Label 1307: @46975
   19657             :       GIM_Try, /*On fail goto*//*Label 1308*/ 47059, // Rule ID 2443 //
   19658             :         GIM_CheckFeatures, GIFBS_HasRDM,
   19659             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqsub,
   19660             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   19661             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   19662             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   19663             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   19664             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   19665             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   19666             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
   19667             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
   19668             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sqrdmulh,
   19669             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
   19670             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
   19671             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   19672             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR32RegClassID,
   19673             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   19674             :         // (intrinsic_wo_chain:{ *:[i32] } 305:{ *:[iPTR] }, FPR32:{ *:[i32] }:$Rd, (intrinsic_wo_chain:{ *:[i32] } 297:{ *:[iPTR] }, FPR32:{ *:[i32] }:$Rn, FPR32:{ *:[i32] }:$Rm))  =>  (SQRDMLSHv1i32:{ *:[i32] } FPR32:{ *:[i32] }:$Rd, FPR32:{ *:[i32] }:$Rn, FPR32:{ *:[i32] }:$Rm)
   19675             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRDMLSHv1i32,
   19676             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   19677             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   19678             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
   19679             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
   19680             :         GIR_EraseFromParent, /*InsnID*/0,
   19681             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19682             :         // GIR_Coverage, 2443,
   19683             :         GIR_Done,
   19684             :       // Label 1308: @47059
   19685             :       GIM_Try, /*On fail goto*//*Label 1309*/ 47141, // Rule ID 2444 //
   19686             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqadd,
   19687             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   19688             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   19689             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   19690             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   19691             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   19692             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   19693             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
   19694             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
   19695             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sqdmulls_scalar,
   19696             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
   19697             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
   19698             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   19699             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR32RegClassID,
   19700             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   19701             :         // (intrinsic_wo_chain:{ *:[i64] } 292:{ *:[iPTR] }, FPR64:{ *:[i64] }:$Rd, (intrinsic_wo_chain:{ *:[i64] } 295:{ *:[iPTR] }, FPR32:{ *:[i32] }:$Rn, FPR32:{ *:[i32] }:$Rm))  =>  (SQDMLALi32:{ *:[i64] } FPR64:{ *:[i64] }:$Rd, FPR32:{ *:[i32] }:$Rn, FPR32:{ *:[i32] }:$Rm)
   19702             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQDMLALi32,
   19703             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   19704             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   19705             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
   19706             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
   19707             :         GIR_EraseFromParent, /*InsnID*/0,
   19708             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19709             :         // GIR_Coverage, 2444,
   19710             :         GIR_Done,
   19711             :       // Label 1309: @47141
   19712             :       GIM_Try, /*On fail goto*//*Label 1310*/ 47223, // Rule ID 2445 //
   19713             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqsub,
   19714             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   19715             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   19716             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   19717             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   19718             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   19719             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   19720             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
   19721             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
   19722             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sqdmulls_scalar,
   19723             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
   19724             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
   19725             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   19726             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR32RegClassID,
   19727             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   19728             :         // (intrinsic_wo_chain:{ *:[i64] } 305:{ *:[iPTR] }, FPR64:{ *:[i64] }:$Rd, (intrinsic_wo_chain:{ *:[i64] } 295:{ *:[iPTR] }, FPR32:{ *:[i32] }:$Rn, FPR32:{ *:[i32] }:$Rm))  =>  (SQDMLSLi32:{ *:[i64] } FPR64:{ *:[i64] }:$Rd, FPR32:{ *:[i32] }:$Rn, FPR32:{ *:[i32] }:$Rm)
   19729             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQDMLSLi32,
   19730             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   19731             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   19732             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
   19733             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
   19734             :         GIR_EraseFromParent, /*InsnID*/0,
   19735             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19736             :         // GIR_Coverage, 2445,
   19737             :         GIR_Done,
   19738             :       // Label 1310: @47223
   19739             :       GIM_Try, /*On fail goto*//*Label 1311*/ 47282, // Rule ID 1575 //
   19740             :         GIM_CheckFeatures, GIFBS_HasNEON,
   19741             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqrshrn,
   19742             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   19743             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   19744             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   19745             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   19746             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   19747             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   19748             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   19749             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR32,
   19750             :         // MIs[1] Operand 1
   19751             :         // No operand predicates
   19752             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   19753             :         // (intrinsic_wo_chain:{ *:[i32] } 299:{ *:[iPTR] }, FPR64:{ *:[i64] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR32>>:$imm)  =>  (SQRSHRNs:{ *:[i32] } FPR64:{ *:[i64] }:$Rn, (imm:{ *:[i32] }):$imm)
   19754             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRSHRNs,
   19755             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   19756             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   19757             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   19758             :         GIR_EraseFromParent, /*InsnID*/0,
   19759             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19760             :         // GIR_Coverage, 1575,
   19761             :         GIR_Done,
   19762             :       // Label 1311: @47282
   19763             :       GIM_Try, /*On fail goto*//*Label 1312*/ 47341, // Rule ID 1576 //
   19764             :         GIM_CheckFeatures, GIFBS_HasNEON,
   19765             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqrshrun,
   19766             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   19767             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   19768             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   19769             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   19770             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   19771             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   19772             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   19773             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR32,
   19774             :         // MIs[1] Operand 1
   19775             :         // No operand predicates
   19776             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   19777             :         // (intrinsic_wo_chain:{ *:[i32] } 300:{ *:[iPTR] }, FPR64:{ *:[i64] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR32>>:$imm)  =>  (SQRSHRUNs:{ *:[i32] } FPR64:{ *:[i64] }:$Rn, (imm:{ *:[i32] }):$imm)
   19778             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRSHRUNs,
   19779             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   19780             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   19781             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   19782             :         GIR_EraseFromParent, /*InsnID*/0,
   19783             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19784             :         // GIR_Coverage, 1576,
   19785             :         GIR_Done,
   19786             :       // Label 1312: @47341
   19787             :       GIM_Try, /*On fail goto*//*Label 1313*/ 47400, // Rule ID 1581 //
   19788             :         GIM_CheckFeatures, GIFBS_HasNEON,
   19789             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqshrn,
   19790             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   19791             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   19792             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   19793             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   19794             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   19795             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   19796             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   19797             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR32,
   19798             :         // MIs[1] Operand 1
   19799             :         // No operand predicates
   19800             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   19801             :         // (intrinsic_wo_chain:{ *:[i32] } 303:{ *:[iPTR] }, FPR64:{ *:[i64] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR32>>:$imm)  =>  (SQSHRNs:{ *:[i32] } FPR64:{ *:[i64] }:$Rn, (imm:{ *:[i32] }):$imm)
   19802             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSHRNs,
   19803             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   19804             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   19805             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   19806             :         GIR_EraseFromParent, /*InsnID*/0,
   19807             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19808             :         // GIR_Coverage, 1581,
   19809             :         GIR_Done,
   19810             :       // Label 1313: @47400
   19811             :       GIM_Try, /*On fail goto*//*Label 1314*/ 47459, // Rule ID 1582 //
   19812             :         GIM_CheckFeatures, GIFBS_HasNEON,
   19813             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqshrun,
   19814             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   19815             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   19816             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   19817             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   19818             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   19819             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   19820             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   19821             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR32,
   19822             :         // MIs[1] Operand 1
   19823             :         // No operand predicates
   19824             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   19825             :         // (intrinsic_wo_chain:{ *:[i32] } 304:{ *:[iPTR] }, FPR64:{ *:[i64] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR32>>:$imm)  =>  (SQSHRUNs:{ *:[i32] } FPR64:{ *:[i64] }:$Rn, (imm:{ *:[i32] }):$imm)
   19826             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSHRUNs,
   19827             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   19828             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   19829             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   19830             :         GIR_EraseFromParent, /*InsnID*/0,
   19831             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19832             :         // GIR_Coverage, 1582,
   19833             :         GIR_Done,
   19834             :       // Label 1314: @47459
   19835             :       GIM_Try, /*On fail goto*//*Label 1315*/ 47518, // Rule ID 1587 //
   19836             :         GIM_CheckFeatures, GIFBS_HasNEON,
   19837             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqrshrn,
   19838             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   19839             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   19840             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   19841             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   19842             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   19843             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   19844             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   19845             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR32,
   19846             :         // MIs[1] Operand 1
   19847             :         // No operand predicates
   19848             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   19849             :         // (intrinsic_wo_chain:{ *:[i32] } 347:{ *:[iPTR] }, FPR64:{ *:[i64] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR32>>:$imm)  =>  (UQRSHRNs:{ *:[i32] } FPR64:{ *:[i64] }:$Rn, (imm:{ *:[i32] }):$imm)
   19850             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQRSHRNs,
   19851             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   19852             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   19853             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   19854             :         GIR_EraseFromParent, /*InsnID*/0,
   19855             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19856             :         // GIR_Coverage, 1587,
   19857             :         GIR_Done,
   19858             :       // Label 1315: @47518
   19859             :       GIM_Try, /*On fail goto*//*Label 1316*/ 47577, // Rule ID 1590 //
   19860             :         GIM_CheckFeatures, GIFBS_HasNEON,
   19861             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqshrn,
   19862             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   19863             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   19864             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   19865             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   19866             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   19867             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   19868             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   19869             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR32,
   19870             :         // MIs[1] Operand 1
   19871             :         // No operand predicates
   19872             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   19873             :         // (intrinsic_wo_chain:{ *:[i32] } 349:{ *:[iPTR] }, FPR64:{ *:[i64] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR32>>:$imm)  =>  (UQSHRNs:{ *:[i32] } FPR64:{ *:[i64] }:$Rn, (imm:{ *:[i32] }):$imm)
   19874             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQSHRNs,
   19875             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   19876             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   19877             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   19878             :         GIR_EraseFromParent, /*InsnID*/0,
   19879             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19880             :         // GIR_Coverage, 1590,
   19881             :         GIR_Done,
   19882             :       // Label 1316: @47577
   19883             :       GIM_Try, /*On fail goto*//*Label 1317*/ 47636, // Rule ID 1610 //
   19884             :         GIM_CheckFeatures, GIFBS_HasNEON,
   19885             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_rshrn,
   19886             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   19887             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   19888             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   19889             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   19890             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   19891             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   19892             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   19893             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR16Narrow,
   19894             :         // MIs[1] Operand 1
   19895             :         // No operand predicates
   19896             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   19897             :         // (intrinsic_wo_chain:{ *:[v8i8] } 271:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR16Narrow>>:$imm)  =>  (RSHRNv8i8_shift:{ *:[v8i8] } V128:{ *:[v8i16] }:$Rn, (imm:{ *:[i32] }):$imm)
   19898             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::RSHRNv8i8_shift,
   19899             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   19900             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   19901             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   19902             :         GIR_EraseFromParent, /*InsnID*/0,
   19903             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19904             :         // GIR_Coverage, 1610,
   19905             :         GIR_Done,
   19906             :       // Label 1317: @47636
   19907             :       GIM_Try, /*On fail goto*//*Label 1318*/ 47695, // Rule ID 1611 //
   19908             :         GIM_CheckFeatures, GIFBS_HasNEON,
   19909             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_rshrn,
   19910             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   19911             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   19912             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   19913             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   19914             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   19915             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   19916             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   19917             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR32Narrow,
   19918             :         // MIs[1] Operand 1
   19919             :         // No operand predicates
   19920             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   19921             :         // (intrinsic_wo_chain:{ *:[v4i16] } 271:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR32Narrow>>:$imm)  =>  (RSHRNv4i16_shift:{ *:[v4i16] } V128:{ *:[v4i32] }:$Rn, (imm:{ *:[i32] }):$imm)
   19922             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::RSHRNv4i16_shift,
   19923             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   19924             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   19925             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   19926             :         GIR_EraseFromParent, /*InsnID*/0,
   19927             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19928             :         // GIR_Coverage, 1611,
   19929             :         GIR_Done,
   19930             :       // Label 1318: @47695
   19931             :       GIM_Try, /*On fail goto*//*Label 1319*/ 47754, // Rule ID 1612 //
   19932             :         GIM_CheckFeatures, GIFBS_HasNEON,
   19933             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_rshrn,
   19934             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   19935             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   19936             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   19937             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   19938             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   19939             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   19940             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   19941             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR64Narrow,
   19942             :         // MIs[1] Operand 1
   19943             :         // No operand predicates
   19944             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   19945             :         // (intrinsic_wo_chain:{ *:[v2i32] } 271:{ *:[iPTR] }, V128:{ *:[v2i64] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR64Narrow>>:$imm)  =>  (RSHRNv2i32_shift:{ *:[v2i32] } V128:{ *:[v2i64] }:$Rn, (imm:{ *:[i32] }):$imm)
   19946             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::RSHRNv2i32_shift,
   19947             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   19948             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   19949             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   19950             :         GIR_EraseFromParent, /*InsnID*/0,
   19951             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19952             :         // GIR_Coverage, 1612,
   19953             :         GIR_Done,
   19954             :       // Label 1319: @47754
   19955             :       GIM_Try, /*On fail goto*//*Label 1320*/ 47813, // Rule ID 1630 //
   19956             :         GIM_CheckFeatures, GIFBS_HasNEON,
   19957             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqrshrn,
   19958             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   19959             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   19960             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   19961             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   19962             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   19963             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   19964             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   19965             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR16Narrow,
   19966             :         // MIs[1] Operand 1
   19967             :         // No operand predicates
   19968             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   19969             :         // (intrinsic_wo_chain:{ *:[v8i8] } 299:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR16Narrow>>:$imm)  =>  (SQRSHRNv8i8_shift:{ *:[v8i8] } V128:{ *:[v8i16] }:$Rn, (imm:{ *:[i32] }):$imm)
   19970             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRSHRNv8i8_shift,
   19971             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   19972             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   19973             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   19974             :         GIR_EraseFromParent, /*InsnID*/0,
   19975             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   19976             :         // GIR_Coverage, 1630,
   19977             :         GIR_Done,
   19978             :       // Label 1320: @47813
   19979             :       GIM_Try, /*On fail goto*//*Label 1321*/ 47872, // Rule ID 1631 //
   19980             :         GIM_CheckFeatures, GIFBS_HasNEON,
   19981             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqrshrn,
   19982             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   19983             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   19984             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   19985             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   19986             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   19987             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   19988             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   19989             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR32Narrow,
   19990             :         // MIs[1] Operand 1
   19991             :         // No operand predicates
   19992             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   19993             :         // (intrinsic_wo_chain:{ *:[v4i16] } 299:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR32Narrow>>:$imm)  =>  (SQRSHRNv4i16_shift:{ *:[v4i16] } V128:{ *:[v4i32] }:$Rn, (imm:{ *:[i32] }):$imm)
   19994             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRSHRNv4i16_shift,
   19995             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   19996             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   19997             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   19998             :         GIR_EraseFromParent, /*InsnID*/0,
   19999             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   20000             :         // GIR_Coverage, 1631,
   20001             :         GIR_Done,
   20002             :       // Label 1321: @47872
   20003             :       GIM_Try, /*On fail goto*//*Label 1322*/ 47931, // Rule ID 1632 //
   20004             :         GIM_CheckFeatures, GIFBS_HasNEON,
   20005             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqrshrn,
   20006             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   20007             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   20008             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   20009             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   20010             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   20011             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   20012             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   20013             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR64Narrow,
   20014             :         // MIs[1] Operand 1
   20015             :         // No operand predicates
   20016             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   20017             :         // (intrinsic_wo_chain:{ *:[v2i32] } 299:{ *:[iPTR] }, V128:{ *:[v2i64] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR64Narrow>>:$imm)  =>  (SQRSHRNv2i32_shift:{ *:[v2i32] } V128:{ *:[v2i64] }:$Rn, (imm:{ *:[i32] }):$imm)
   20018             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRSHRNv2i32_shift,
   20019             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   20020             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   20021             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   20022             :         GIR_EraseFromParent, /*InsnID*/0,
   20023             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   20024             :         // GIR_Coverage, 1632,
   20025             :         GIR_Done,
   20026             :       // Label 1322: @47931
   20027             :       GIM_Try, /*On fail goto*//*Label 1323*/ 47990, // Rule ID 1633 //
   20028             :         GIM_CheckFeatures, GIFBS_HasNEON,
   20029             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqrshrun,
   20030             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   20031             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   20032             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   20033             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   20034             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   20035             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   20036             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   20037             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR16Narrow,
   20038             :         // MIs[1] Operand 1
   20039             :         // No operand predicates
   20040             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   20041             :         // (intrinsic_wo_chain:{ *:[v8i8] } 300:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR16Narrow>>:$imm)  =>  (SQRSHRUNv8i8_shift:{ *:[v8i8] } V128:{ *:[v8i16] }:$Rn, (imm:{ *:[i32] }):$imm)
   20042             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRSHRUNv8i8_shift,
   20043             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   20044             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   20045             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   20046             :         GIR_EraseFromParent, /*InsnID*/0,
   20047             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   20048             :         // GIR_Coverage, 1633,
   20049             :         GIR_Done,
   20050             :       // Label 1323: @47990
   20051             :       GIM_Try, /*On fail goto*//*Label 1324*/ 48049, // Rule ID 1634 //
   20052             :         GIM_CheckFeatures, GIFBS_HasNEON,
   20053             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqrshrun,
   20054             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   20055             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   20056             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   20057             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   20058             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   20059             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   20060             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   20061             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR32Narrow,
   20062             :         // MIs[1] Operand 1
   20063             :         // No operand predicates
   20064             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   20065             :         // (intrinsic_wo_chain:{ *:[v4i16] } 300:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR32Narrow>>:$imm)  =>  (SQRSHRUNv4i16_shift:{ *:[v4i16] } V128:{ *:[v4i32] }:$Rn, (imm:{ *:[i32] }):$imm)
   20066             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRSHRUNv4i16_shift,
   20067             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   20068             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   20069             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   20070             :         GIR_EraseFromParent, /*InsnID*/0,
   20071             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   20072             :         // GIR_Coverage, 1634,
   20073             :         GIR_Done,
   20074             :       // Label 1324: @48049
   20075             :       GIM_Try, /*On fail goto*//*Label 1325*/ 48108, // Rule ID 1635 //
   20076             :         GIM_CheckFeatures, GIFBS_HasNEON,
   20077             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqrshrun,
   20078             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   20079             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   20080             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   20081             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   20082             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   20083             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   20084             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   20085             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR64Narrow,
   20086             :         // MIs[1] Operand 1
   20087             :         // No operand predicates
   20088             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   20089             :         // (intrinsic_wo_chain:{ *:[v2i32] } 300:{ *:[iPTR] }, V128:{ *:[v2i64] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR64Narrow>>:$imm)  =>  (SQRSHRUNv2i32_shift:{ *:[v2i32] } V128:{ *:[v2i64] }:$Rn, (imm:{ *:[i32] }):$imm)
   20090             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRSHRUNv2i32_shift,
   20091             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   20092             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   20093             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   20094             :         GIR_EraseFromParent, /*InsnID*/0,
   20095             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   20096             :         // GIR_Coverage, 1635,
   20097             :         GIR_Done,
   20098             :       // Label 1325: @48108
   20099             :       GIM_Try, /*On fail goto*//*Label 1326*/ 48167, // Rule ID 1650 //
   20100             :         GIM_CheckFeatures, GIFBS_HasNEON,
   20101             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqshrn,
   20102             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   20103             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   20104             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   20105             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   20106             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   20107             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   20108             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   20109             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR16Narrow,
   20110             :         // MIs[1] Operand 1
   20111             :         // No operand predicates
   20112             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   20113             :         // (intrinsic_wo_chain:{ *:[v8i8] } 303:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR16Narrow>>:$imm)  =>  (SQSHRNv8i8_shift:{ *:[v8i8] } V128:{ *:[v8i16] }:$Rn, (imm:{ *:[i32] }):$imm)
   20114             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSHRNv8i8_shift,
   20115             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   20116             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   20117             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   20118             :         GIR_EraseFromParent, /*InsnID*/0,
   20119             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   20120             :         // GIR_Coverage, 1650,
   20121             :         GIR_Done,
   20122             :       // Label 1326: @48167
   20123             :       GIM_Try, /*On fail goto*//*Label 1327*/ 48226, // Rule ID 1651 //
   20124             :         GIM_CheckFeatures, GIFBS_HasNEON,
   20125             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqshrn,
   20126             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   20127             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   20128             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   20129             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   20130             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   20131             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   20132             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   20133             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR32Narrow,
   20134             :         // MIs[1] Operand 1
   20135             :         // No operand predicates
   20136             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   20137             :         // (intrinsic_wo_chain:{ *:[v4i16] } 303:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR32Narrow>>:$imm)  =>  (SQSHRNv4i16_shift:{ *:[v4i16] } V128:{ *:[v4i32] }:$Rn, (imm:{ *:[i32] }):$imm)
   20138             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSHRNv4i16_shift,
   20139             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   20140             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   20141             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   20142             :         GIR_EraseFromParent, /*InsnID*/0,
   20143             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   20144             :         // GIR_Coverage, 1651,
   20145             :         GIR_Done,
   20146             :       // Label 1327: @48226
   20147             :       GIM_Try, /*On fail goto*//*Label 1328*/ 48285, // Rule ID 1652 //
   20148             :         GIM_CheckFeatures, GIFBS_HasNEON,
   20149             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqshrn,
   20150             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   20151             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   20152             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   20153             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   20154             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   20155             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   20156             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   20157             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR64Narrow,
   20158             :         // MIs[1] Operand 1
   20159             :         // No operand predicates
   20160             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   20161             :         // (intrinsic_wo_chain:{ *:[v2i32] } 303:{ *:[iPTR] }, V128:{ *:[v2i64] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR64Narrow>>:$imm)  =>  (SQSHRNv2i32_shift:{ *:[v2i32] } V128:{ *:[v2i64] }:$Rn, (imm:{ *:[i32] }):$imm)
   20162             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSHRNv2i32_shift,
   20163             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   20164             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   20165             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   20166             :         GIR_EraseFromParent, /*InsnID*/0,
   20167             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   20168             :         // GIR_Coverage, 1652,
   20169             :         GIR_Done,
   20170             :       // Label 1328: @48285
   20171             :       GIM_Try, /*On fail goto*//*Label 1329*/ 48344, // Rule ID 1653 //
   20172             :         GIM_CheckFeatures, GIFBS_HasNEON,
   20173             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqshrun,
   20174             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   20175             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   20176             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   20177             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   20178             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   20179             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   20180             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   20181             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR16Narrow,
   20182             :         // MIs[1] Operand 1
   20183             :         // No operand predicates
   20184             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   20185             :         // (intrinsic_wo_chain:{ *:[v8i8] } 304:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR16Narrow>>:$imm)  =>  (SQSHRUNv8i8_shift:{ *:[v8i8] } V128:{ *:[v8i16] }:$Rn, (imm:{ *:[i32] }):$imm)
   20186             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSHRUNv8i8_shift,
   20187             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   20188             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   20189             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   20190             :         GIR_EraseFromParent, /*InsnID*/0,
   20191             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   20192             :         // GIR_Coverage, 1653,
   20193             :         GIR_Done,
   20194             :       // Label 1329: @48344
   20195             :       GIM_Try, /*On fail goto*//*Label 1330*/ 48403, // Rule ID 1654 //
   20196             :         GIM_CheckFeatures, GIFBS_HasNEON,
   20197             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqshrun,
   20198             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   20199             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   20200             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   20201             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   20202             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   20203             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   20204             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   20205             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR32Narrow,
   20206             :         // MIs[1] Operand 1
   20207             :         // No operand predicates
   20208             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   20209             :         // (intrinsic_wo_chain:{ *:[v4i16] } 304:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR32Narrow>>:$imm)  =>  (SQSHRUNv4i16_shift:{ *:[v4i16] } V128:{ *:[v4i32] }:$Rn, (imm:{ *:[i32] }):$imm)
   20210             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSHRUNv4i16_shift,
   20211             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   20212             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   20213             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   20214             :         GIR_EraseFromParent, /*InsnID*/0,
   20215             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   20216             :         // GIR_Coverage, 1654,
   20217             :         GIR_Done,
   20218             :       // Label 1330: @48403
   20219             :       GIM_Try, /*On fail goto*//*Label 1331*/ 48462, // Rule ID 1655 //
   20220             :         GIM_CheckFeatures, GIFBS_HasNEON,
   20221             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqshrun,
   20222             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   20223             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   20224             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   20225             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   20226             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   20227             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   20228             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   20229             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR64Narrow,
   20230             :         // MIs[1] Operand 1
   20231             :         // No operand predicates
   20232             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   20233             :         // (intrinsic_wo_chain:{ *:[v2i32] } 304:{ *:[iPTR] }, V128:{ *:[v2i64] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR64Narrow>>:$imm)  =>  (SQSHRUNv2i32_shift:{ *:[v2i32] } V128:{ *:[v2i64] }:$Rn, (imm:{ *:[i32] }):$imm)
   20234             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSHRUNv2i32_shift,
   20235             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   20236             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   20237             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   20238             :         GIR_EraseFromParent, /*InsnID*/0,
   20239             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   20240             :         // GIR_Coverage, 1655,
   20241             :         GIR_Done,
   20242             :       // Label 1331: @48462
   20243             :       GIM_Try, /*On fail goto*//*Label 1332*/ 48521, // Rule ID 1702 //
   20244             :         GIM_CheckFeatures, GIFBS_HasNEON,
   20245             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqrshrn,
   20246             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   20247             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   20248             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   20249             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   20250             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   20251             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   20252             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   20253             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR16Narrow,
   20254             :         // MIs[1] Operand 1
   20255             :         // No operand predicates
   20256             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   20257             :         // (intrinsic_wo_chain:{ *:[v8i8] } 347:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR16Narrow>>:$imm)  =>  (UQRSHRNv8i8_shift:{ *:[v8i8] } V128:{ *:[v8i16] }:$Rn, (imm:{ *:[i32] }):$imm)
   20258             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQRSHRNv8i8_shift,
   20259             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   20260             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   20261             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   20262             :         GIR_EraseFromParent, /*InsnID*/0,
   20263             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   20264             :         // GIR_Coverage, 1702,
   20265             :         GIR_Done,
   20266             :       // Label 1332: @48521
   20267             :       GIM_Try, /*On fail goto*//*Label 1333*/ 48580, // Rule ID 1703 //
   20268             :         GIM_CheckFeatures, GIFBS_HasNEON,
   20269             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqrshrn,
   20270             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   20271             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   20272             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   20273             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   20274             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   20275             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   20276             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   20277             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR32Narrow,
   20278             :         // MIs[1] Operand 1
   20279             :         // No operand predicates
   20280             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   20281             :         // (intrinsic_wo_chain:{ *:[v4i16] } 347:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR32Narrow>>:$imm)  =>  (UQRSHRNv4i16_shift:{ *:[v4i16] } V128:{ *:[v4i32] }:$Rn, (imm:{ *:[i32] }):$imm)
   20282             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQRSHRNv4i16_shift,
   20283             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   20284             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   20285             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   20286             :         GIR_EraseFromParent, /*InsnID*/0,
   20287             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   20288             :         // GIR_Coverage, 1703,
   20289             :         GIR_Done,
   20290             :       // Label 1333: @48580
   20291             :       GIM_Try, /*On fail goto*//*Label 1334*/ 48639, // Rule ID 1704 //
   20292             :         GIM_CheckFeatures, GIFBS_HasNEON,
   20293             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqrshrn,
   20294             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   20295             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   20296             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   20297             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   20298             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   20299             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   20300             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   20301             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR64Narrow,
   20302             :         // MIs[1] Operand 1
   20303             :         // No operand predicates
   20304             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   20305             :         // (intrinsic_wo_chain:{ *:[v2i32] } 347:{ *:[iPTR] }, V128:{ *:[v2i64] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR64Narrow>>:$imm)  =>  (UQRSHRNv2i32_shift:{ *:[v2i32] } V128:{ *:[v2i64] }:$Rn, (imm:{ *:[i32] }):$imm)
   20306             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQRSHRNv2i32_shift,
   20307             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   20308             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   20309             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   20310             :         GIR_EraseFromParent, /*InsnID*/0,
   20311             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   20312             :         // GIR_Coverage, 1704,
   20313             :         GIR_Done,
   20314             :       // Label 1334: @48639
   20315             :       GIM_Try, /*On fail goto*//*Label 1335*/ 48698, // Rule ID 1712 //
   20316             :         GIM_CheckFeatures, GIFBS_HasNEON,
   20317             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqshrn,
   20318             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   20319             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   20320             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   20321             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   20322             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   20323             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   20324             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   20325             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR16Narrow,
   20326             :         // MIs[1] Operand 1
   20327             :         // No operand predicates
   20328             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   20329             :         // (intrinsic_wo_chain:{ *:[v8i8] } 349:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR16Narrow>>:$imm)  =>  (UQSHRNv8i8_shift:{ *:[v8i8] } V128:{ *:[v8i16] }:$Rn, (imm:{ *:[i32] }):$imm)
   20330             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQSHRNv8i8_shift,
   20331             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   20332             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   20333             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   20334             :         GIR_EraseFromParent, /*InsnID*/0,
   20335             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   20336             :         // GIR_Coverage, 1712,
   20337             :         GIR_Done,
   20338             :       // Label 1335: @48698
   20339             :       GIM_Try, /*On fail goto*//*Label 1336*/ 48757, // Rule ID 1713 //
   20340             :         GIM_CheckFeatures, GIFBS_HasNEON,
   20341             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqshrn,
   20342             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   20343             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   20344             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   20345             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   20346             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   20347             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   20348             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   20349             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR32Narrow,
   20350             :         // MIs[1] Operand 1
   20351             :         // No operand predicates
   20352             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   20353             :         // (intrinsic_wo_chain:{ *:[v4i16] } 349:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR32Narrow>>:$imm)  =>  (UQSHRNv4i16_shift:{ *:[v4i16] } V128:{ *:[v4i32] }:$Rn, (imm:{ *:[i32] }):$imm)
   20354             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQSHRNv4i16_shift,
   20355             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   20356             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   20357             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   20358             :         GIR_EraseFromParent, /*InsnID*/0,
   20359             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   20360             :         // GIR_Coverage, 1713,
   20361             :         GIR_Done,
   20362             :       // Label 1336: @48757
   20363             :       GIM_Try, /*On fail goto*//*Label 1337*/ 48816, // Rule ID 1714 //
   20364             :         GIM_CheckFeatures, GIFBS_HasNEON,
   20365             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqshrn,
   20366             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   20367             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   20368             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   20369             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   20370             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   20371             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   20372             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   20373             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR64Narrow,
   20374             :         // MIs[1] Operand 1
   20375             :         // No operand predicates
   20376             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   20377             :         // (intrinsic_wo_chain:{ *:[v2i32] } 349:{ *:[iPTR] }, V128:{ *:[v2i64] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR64Narrow>>:$imm)  =>  (UQSHRNv2i32_shift:{ *:[v2i32] } V128:{ *:[v2i64] }:$Rn, (imm:{ *:[i32] }):$imm)
   20378             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQSHRNv2i32_shift,
   20379             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   20380             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   20381             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   20382             :         GIR_EraseFromParent, /*InsnID*/0,
   20383             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   20384             :         // GIR_Coverage, 1714,
   20385             :         GIR_Done,
   20386             :       // Label 1337: @48816
   20387             :       GIM_Try, /*On fail goto*//*Label 1338*/ 48873, // Rule ID 2924 //
   20388             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfp2fxs,
   20389             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   20390             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   20391             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   20392             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   20393             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   20394             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   20395             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   20396             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR32,
   20397             :         // MIs[1] Operand 1
   20398             :         // No operand predicates
   20399             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   20400             :         // (intrinsic_wo_chain:{ *:[i32] } 360:{ *:[iPTR] }, FPR32:{ *:[f32] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR32>>:$imm)  =>  (FCVTZSs:{ *:[i32] } FPR32:{ *:[f32] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR32>>:$imm)
   20401             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTZSs,
   20402             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   20403             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   20404             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   20405             :         GIR_EraseFromParent, /*InsnID*/0,
   20406             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   20407             :         // GIR_Coverage, 2924,
   20408             :         GIR_Done,
   20409             :       // Label 1338: @48873
   20410             :       GIM_Try, /*On fail goto*//*Label 1339*/ 48930, // Rule ID 2925 //
   20411             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfp2fxu,
   20412             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   20413             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   20414             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   20415             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   20416             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   20417             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   20418             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   20419             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR32,
   20420             :         // MIs[1] Operand 1
   20421             :         // No operand predicates
   20422             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   20423             :         // (intrinsic_wo_chain:{ *:[i32] } 361:{ *:[iPTR] }, FPR32:{ *:[f32] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR32>>:$imm)  =>  (FCVTZUs:{ *:[i32] } FPR32:{ *:[f32] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR32>>:$imm)
   20424             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTZUs,
   20425             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   20426             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   20427             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   20428             :         GIR_EraseFromParent, /*InsnID*/0,
   20429             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   20430             :         // GIR_Coverage, 2925,
   20431             :         GIR_Done,
   20432             :       // Label 1339: @48930
   20433             :       GIM_Try, /*On fail goto*//*Label 1340*/ 48987, // Rule ID 2926 //
   20434             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfp2fxs,
   20435             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   20436             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   20437             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   20438             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   20439             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   20440             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   20441             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   20442             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR64,
   20443             :         // MIs[1] Operand 1
   20444             :         // No operand predicates
   20445             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   20446             :         // (intrinsic_wo_chain:{ *:[i64] } 360:{ *:[iPTR] }, FPR64:{ *:[f64] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR64>>:$imm)  =>  (FCVTZSd:{ *:[i64] } FPR64:{ *:[f64] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR64>>:$imm)
   20447             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTZSd,
   20448             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   20449             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   20450             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   20451             :         GIR_EraseFromParent, /*InsnID*/0,
   20452             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   20453             :         // GIR_Coverage, 2926,
   20454             :         GIR_Done,
   20455             :       // Label 1340: @48987
   20456             :       GIM_Try, /*On fail goto*//*Label 1341*/ 49044, // Rule ID 2927 //
   20457             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfp2fxu,
   20458             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   20459             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   20460             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   20461             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   20462             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   20463             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   20464             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   20465             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR64,
   20466             :         // MIs[1] Operand 1
   20467             :         // No operand predicates
   20468             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   20469             :         // (intrinsic_wo_chain:{ *:[i64] } 361:{ *:[iPTR] }, FPR64:{ *:[f64] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR64>>:$imm)  =>  (FCVTZUd:{ *:[i64] } FPR64:{ *:[f64] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR64>>:$imm)
   20470             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTZUd,
   20471             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   20472             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   20473             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   20474             :         GIR_EraseFromParent, /*InsnID*/0,
   20475             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   20476             :         // GIR_Coverage, 2927,
   20477             :         GIR_Done,
   20478             :       // Label 1341: @49044
   20479             :       GIM_Try, /*On fail goto*//*Label 1342*/ 49101, // Rule ID 2928 //
   20480             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfp2fxs,
   20481             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   20482             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   20483             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   20484             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   20485             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   20486             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   20487             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   20488             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR64,
   20489             :         // MIs[1] Operand 1
   20490             :         // No operand predicates
   20491             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   20492             :         // (intrinsic_wo_chain:{ *:[v1i64] } 360:{ *:[iPTR] }, FPR64:{ *:[v1f64] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR64>>:$imm)  =>  (FCVTZSd:{ *:[v1i64] } FPR64:{ *:[v1f64] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR64>>:$imm)
   20493             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTZSd,
   20494             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   20495             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   20496             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   20497             :         GIR_EraseFromParent, /*InsnID*/0,
   20498             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   20499             :         // GIR_Coverage, 2928,
   20500             :         GIR_Done,
   20501             :       // Label 1342: @49101
   20502             :       GIM_Try, /*On fail goto*//*Label 1343*/ 49158, // Rule ID 2929 //
   20503             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfp2fxu,
   20504             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   20505             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   20506             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   20507             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   20508             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   20509             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   20510             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   20511             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR64,
   20512             :         // MIs[1] Operand 1
   20513             :         // No operand predicates
   20514             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   20515             :         // (intrinsic_wo_chain:{ *:[v1i64] } 361:{ *:[iPTR] }, FPR64:{ *:[v1f64] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR64>>:$imm)  =>  (FCVTZUd:{ *:[v1i64] } FPR64:{ *:[v1f64] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR64>>:$imm)
   20516             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTZUd,
   20517             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   20518             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   20519             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   20520             :         GIR_EraseFromParent, /*InsnID*/0,
   20521             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   20522             :         // GIR_Coverage, 2929,
   20523             :         GIR_Done,
   20524             :       // Label 1343: @49158
   20525             :       GIM_Try, /*On fail goto*//*Label 1344*/ 49215, // Rule ID 2930 //
   20526             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfxu2fp,
   20527             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   20528             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   20529             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   20530             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   20531             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   20532             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   20533             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   20534             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR32,
   20535             :         // MIs[1] Operand 1
   20536             :         // No operand predicates
   20537             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   20538             :         // (intrinsic_wo_chain:{ *:[f32] } 364:{ *:[iPTR] }, FPR32:{ *:[i32] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR32>>:$imm)  =>  (UCVTFs:{ *:[f32] } FPR32:{ *:[i32] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR32>>:$imm)
   20539             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UCVTFs,
   20540             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   20541             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   20542             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   20543             :         GIR_EraseFromParent, /*InsnID*/0,
   20544             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   20545             :         // GIR_Coverage, 2930,
   20546             :         GIR_Done,
   20547             :       // Label 1344: @49215
   20548             :       GIM_Try, /*On fail goto*//*Label 1345*/ 49272, // Rule ID 2931 //
   20549             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfxu2fp,
   20550             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   20551             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   20552             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   20553             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   20554             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   20555             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   20556             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   20557             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR64,
   20558             :         // MIs[1] Operand 1
   20559             :         // No operand predicates
   20560             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   20561             :         // (intrinsic_wo_chain:{ *:[f64] } 364:{ *:[iPTR] }, FPR64:{ *:[i64] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR64>>:$imm)  =>  (UCVTFd:{ *:[f64] } FPR64:{ *:[i64] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR64>>:$imm)
   20562             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UCVTFd,
   20563             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   20564             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   20565             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   20566             :         GIR_EraseFromParent, /*InsnID*/0,
   20567             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   20568             :         // GIR_Coverage, 2931,
   20569             :         GIR_Done,
   20570             :       // Label 1345: @49272
   20571             :       GIM_Try, /*On fail goto*//*Label 1346*/ 49329, // Rule ID 2932 //
   20572             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfxs2fp,
   20573             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   20574             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   20575             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   20576             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   20577             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   20578             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   20579             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   20580             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR64,
   20581             :         // MIs[1] Operand 1
   20582             :         // No operand predicates
   20583             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   20584             :         // (intrinsic_wo_chain:{ *:[v1f64] } 363:{ *:[iPTR] }, FPR64:{ *:[v1i64] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR64>>:$imm)  =>  (SCVTFd:{ *:[v1f64] } FPR64:{ *:[v1i64] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR64>>:$imm)
   20585             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SCVTFd,
   20586             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   20587             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   20588             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   20589             :         GIR_EraseFromParent, /*InsnID*/0,
   20590             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   20591             :         // GIR_Coverage, 2932,
   20592             :         GIR_Done,
   20593             :       // Label 1346: @49329
   20594             :       GIM_Try, /*On fail goto*//*Label 1347*/ 49386, // Rule ID 2933 //
   20595             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfxs2fp,
   20596             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   20597             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   20598             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   20599             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   20600             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   20601             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   20602             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   20603             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR64,
   20604             :         // MIs[1] Operand 1
   20605             :         // No operand predicates
   20606             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   20607             :         // (intrinsic_wo_chain:{ *:[f64] } 363:{ *:[iPTR] }, FPR64:{ *:[i64] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR64>>:$imm)  =>  (SCVTFd:{ *:[f64] } FPR64:{ *:[i64] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR64>>:$imm)
   20608             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SCVTFd,
   20609             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   20610             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   20611             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   20612             :         GIR_EraseFromParent, /*InsnID*/0,
   20613             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   20614             :         // GIR_Coverage, 2933,
   20615             :         GIR_Done,
   20616             :       // Label 1347: @49386
   20617             :       GIM_Try, /*On fail goto*//*Label 1348*/ 49443, // Rule ID 2934 //
   20618             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfxu2fp,
   20619             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   20620             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   20621             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   20622             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   20623             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   20624             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   20625             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   20626             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR64,
   20627             :         // MIs[1] Operand 1
   20628             :         // No operand predicates
   20629             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   20630             :         // (intrinsic_wo_chain:{ *:[v1f64] } 364:{ *:[iPTR] }, FPR64:{ *:[v1i64] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR64>>:$imm)  =>  (UCVTFd:{ *:[v1f64] } FPR64:{ *:[v1i64] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR64>>:$imm)
   20631             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UCVTFd,
   20632             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   20633             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   20634             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   20635             :         GIR_EraseFromParent, /*InsnID*/0,
   20636             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   20637             :         // GIR_Coverage, 2934,
   20638             :         GIR_Done,
   20639             :       // Label 1348: @49443
   20640             :       GIM_Try, /*On fail goto*//*Label 1349*/ 49500, // Rule ID 2935 //
   20641             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfxs2fp,
   20642             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   20643             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   20644             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   20645             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   20646             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   20647             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   20648             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   20649             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR32,
   20650             :         // MIs[1] Operand 1
   20651             :         // No operand predicates
   20652             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   20653             :         // (intrinsic_wo_chain:{ *:[f32] } 363:{ *:[iPTR] }, FPR32:{ *:[i32] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR32>>:$imm)  =>  (SCVTFs:{ *:[f32] } FPR32:{ *:[i32] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR32>>:$imm)
   20654             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SCVTFs,
   20655             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   20656             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   20657             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   20658             :         GIR_EraseFromParent, /*InsnID*/0,
   20659             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   20660             :         // GIR_Coverage, 2935,
   20661             :         GIR_Done,
   20662             :       // Label 1349: @49500
   20663             :       GIM_Try, /*On fail goto*//*Label 1350*/ 49574, // Rule ID 2937 //
   20664             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfxs2fp,
   20665             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
   20666             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   20667             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   20668             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR16RegClassID,
   20669             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   20670             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   20671             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   20672             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR16,
   20673             :         // MIs[1] Operand 1
   20674             :         // No operand predicates
   20675             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   20676             :         // (intrinsic_wo_chain:{ *:[f16] } 363:{ *:[iPTR] }, FPR32:{ *:[i32] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR16>>:$imm)  =>  (SCVTFh:{ *:[f16] } (EXTRACT_SUBREG:{ *:[f16] } FPR32:{ *:[i32] }:$Rn, hsub:{ *:[i32] }), (imm:{ *:[i32] })<<P:Predicate_vecshiftR16>>:$imm)
   20677             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
   20678             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY,
   20679             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   20680             :         GIR_CopySubReg, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, /*SubRegIdx*/7, // Rn
   20681             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   20682             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SCVTFh,
   20683             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   20684             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   20685             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   20686             :         GIR_EraseFromParent, /*InsnID*/0,
   20687             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   20688             :         // GIR_Coverage, 2937,
   20689             :         GIR_Done,
   20690             :       // Label 1350: @49574
   20691             :       GIM_Try, /*On fail goto*//*Label 1351*/ 49648, // Rule ID 2939 //
   20692             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfxu2fp,
   20693             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
   20694             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   20695             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   20696             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR16RegClassID,
   20697             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   20698             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   20699             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   20700             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR16,
   20701             :         // MIs[1] Operand 1
   20702             :         // No operand predicates
   20703             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   20704             :         // (intrinsic_wo_chain:{ *:[f16] } 364:{ *:[iPTR] }, FPR32:{ *:[i32] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR16>>:$imm)  =>  (UCVTFh:{ *:[f16] } (EXTRACT_SUBREG:{ *:[f16] } FPR32:{ *:[i32] }:$Rn, hsub:{ *:[i32] }), (imm:{ *:[i32] })<<P:Predicate_vecshiftR16>>:$imm)
   20705             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
   20706             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY,
   20707             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   20708             :         GIR_CopySubReg, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, /*SubRegIdx*/7, // Rn
   20709             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   20710             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UCVTFh,
   20711             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   20712             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   20713             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   20714             :         GIR_EraseFromParent, /*InsnID*/0,
   20715             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   20716             :         // GIR_Coverage, 2939,
   20717             :         GIR_Done,
   20718             :       // Label 1351: @49648
   20719             :       GIM_Try, /*On fail goto*//*Label 1352*/ 49722, // Rule ID 2940 //
   20720             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfxu2fp,
   20721             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
   20722             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   20723             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   20724             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR16RegClassID,
   20725             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   20726             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   20727             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   20728             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR16,
   20729             :         // MIs[1] Operand 1
   20730             :         // No operand predicates
   20731             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   20732             :         // (intrinsic_wo_chain:{ *:[f16] } 364:{ *:[iPTR] }, FPR64:{ *:[i64] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR16>>:$imm)  =>  (UCVTFh:{ *:[f16] } (EXTRACT_SUBREG:{ *:[f16] } FPR64:{ *:[i64] }:$Rn, hsub:{ *:[i32] }), (imm:{ *:[i32] })<<P:Predicate_vecshiftR16>>:$imm)
   20733             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
   20734             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY,
   20735             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   20736             :         GIR_CopySubReg, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/2, /*SubRegIdx*/7, // Rn
   20737             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   20738             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UCVTFh,
   20739             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   20740             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   20741             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   20742             :         GIR_EraseFromParent, /*InsnID*/0,
   20743             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   20744             :         // GIR_Coverage, 2940,
   20745             :         GIR_Done,
   20746             :       // Label 1352: @49722
   20747             :       GIM_Try, /*On fail goto*//*Label 1353*/ 49778, // Rule ID 1595 //
   20748             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   20749             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfp2fxs,
   20750             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   20751             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   20752             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   20753             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   20754             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   20755             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   20756             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   20757             :         // MIs[1] Operand 1
   20758             :         // No operand predicates
   20759             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   20760             :         // (intrinsic_wo_chain:{ *:[v4i16] } 360:{ *:[iPTR] }, V64:{ *:[v4f16] }:$Rn, (imm:{ *:[i32] }):$imm)  =>  (FCVTZSv4i16_shift:{ *:[v4i16] } V64:{ *:[v4f16] }:$Rn, (imm:{ *:[i32] }):$imm)
   20761             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTZSv4i16_shift,
   20762             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   20763             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   20764             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   20765             :         GIR_EraseFromParent, /*InsnID*/0,
   20766             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   20767             :         // GIR_Coverage, 1595,
   20768             :         GIR_Done,
   20769             :       // Label 1353: @49778
   20770             :       GIM_Try, /*On fail goto*//*Label 1354*/ 49834, // Rule ID 1596 //
   20771             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   20772             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfp2fxs,
   20773             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   20774             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   20775             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   20776             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   20777             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   20778             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   20779             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   20780             :         // MIs[1] Operand 1
   20781             :         // No operand predicates
   20782             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   20783             :         // (intrinsic_wo_chain:{ *:[v8i16] } 360:{ *:[iPTR] }, V128:{ *:[v8f16] }:$Rn, (imm:{ *:[i32] }):$imm)  =>  (FCVTZSv8i16_shift:{ *:[v8i16] } V128:{ *:[v8f16] }:$Rn, (imm:{ *:[i32] }):$imm)
   20784             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTZSv8i16_shift,
   20785             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   20786             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   20787             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   20788             :         GIR_EraseFromParent, /*InsnID*/0,
   20789             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   20790             :         // GIR_Coverage, 1596,
   20791             :         GIR_Done,
   20792             :       // Label 1354: @49834
   20793             :       GIM_Try, /*On fail goto*//*Label 1355*/ 49890, // Rule ID 1597 //
   20794             :         GIM_CheckFeatures, GIFBS_HasNEON,
   20795             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfp2fxs,
   20796             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   20797             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   20798             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   20799             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   20800             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   20801             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   20802             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   20803             :         // MIs[1] Operand 1
   20804             :         // No operand predicates
   20805             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   20806             :         // (intrinsic_wo_chain:{ *:[v2i32] } 360:{ *:[iPTR] }, V64:{ *:[v2f32] }:$Rn, (imm:{ *:[i32] }):$imm)  =>  (FCVTZSv2i32_shift:{ *:[v2i32] } V64:{ *:[v2f32] }:$Rn, (imm:{ *:[i32] }):$imm)
   20807             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTZSv2i32_shift,
   20808             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   20809             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   20810             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   20811             :         GIR_EraseFromParent, /*InsnID*/0,
   20812             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   20813             :         // GIR_Coverage, 1597,
   20814             :         GIR_Done,
   20815             :       // Label 1355: @49890
   20816             :       GIM_Try, /*On fail goto*//*Label 1356*/ 49946, // Rule ID 1598 //
   20817             :         GIM_CheckFeatures, GIFBS_HasNEON,
   20818             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfp2fxs,
   20819             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   20820             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   20821             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   20822             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   20823             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   20824             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   20825             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   20826             :         // MIs[1] Operand 1
   20827             :         // No operand predicates
   20828             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   20829             :         // (intrinsic_wo_chain:{ *:[v4i32] } 360:{ *:[iPTR] }, V128:{ *:[v4f32] }:$Rn, (imm:{ *:[i32] }):$imm)  =>  (FCVTZSv4i32_shift:{ *:[v4i32] } V128:{ *:[v4f32] }:$Rn, (imm:{ *:[i32] }):$imm)
   20830             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTZSv4i32_shift,
   20831             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   20832             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   20833             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   20834             :         GIR_EraseFromParent, /*InsnID*/0,
   20835             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   20836             :         // GIR_Coverage, 1598,
   20837             :         GIR_Done,
   20838             :       // Label 1356: @49946
   20839             :       GIM_Try, /*On fail goto*//*Label 1357*/ 50002, // Rule ID 1599 //
   20840             :         GIM_CheckFeatures, GIFBS_HasNEON,
   20841             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfp2fxs,
   20842             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   20843             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   20844             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   20845             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   20846             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   20847             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   20848             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   20849             :         // MIs[1] Operand 1
   20850             :         // No operand predicates
   20851             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   20852             :         // (intrinsic_wo_chain:{ *:[v2i64] } 360:{ *:[iPTR] }, V128:{ *:[v2f64] }:$Rn, (imm:{ *:[i32] }):$imm)  =>  (FCVTZSv2i64_shift:{ *:[v2i64] } V128:{ *:[v2f64] }:$Rn, (imm:{ *:[i32] }):$imm)
   20853             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTZSv2i64_shift,
   20854             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   20855             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   20856             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   20857             :         GIR_EraseFromParent, /*InsnID*/0,
   20858             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   20859             :         // GIR_Coverage, 1599,
   20860             :         GIR_Done,
   20861             :       // Label 1357: @50002
   20862             :       GIM_Try, /*On fail goto*//*Label 1358*/ 50058, // Rule ID 1600 //
   20863             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   20864             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfp2fxu,
   20865             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   20866             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   20867             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   20868             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   20869             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   20870             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   20871             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   20872             :         // MIs[1] Operand 1
   20873             :         // No operand predicates
   20874             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   20875             :         // (intrinsic_wo_chain:{ *:[v4i16] } 361:{ *:[iPTR] }, V64:{ *:[v4f16] }:$Rn, (imm:{ *:[i32] }):$imm)  =>  (FCVTZUv4i16_shift:{ *:[v4i16] } V64:{ *:[v4f16] }:$Rn, (imm:{ *:[i32] }):$imm)
   20876             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTZUv4i16_shift,
   20877             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   20878             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   20879             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   20880             :         GIR_EraseFromParent, /*InsnID*/0,
   20881             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   20882             :         // GIR_Coverage, 1600,
   20883             :         GIR_Done,
   20884             :       // Label 1358: @50058
   20885             :       GIM_Try, /*On fail goto*//*Label 1359*/ 50114, // Rule ID 1601 //
   20886             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   20887             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfp2fxu,
   20888             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   20889             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   20890             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   20891             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   20892             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   20893             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   20894             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   20895             :         // MIs[1] Operand 1
   20896             :         // No operand predicates
   20897             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   20898             :         // (intrinsic_wo_chain:{ *:[v8i16] } 361:{ *:[iPTR] }, V128:{ *:[v8f16] }:$Rn, (imm:{ *:[i32] }):$imm)  =>  (FCVTZUv8i16_shift:{ *:[v8i16] } V128:{ *:[v8f16] }:$Rn, (imm:{ *:[i32] }):$imm)
   20899             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTZUv8i16_shift,
   20900             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   20901             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   20902             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   20903             :         GIR_EraseFromParent, /*InsnID*/0,
   20904             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   20905             :         // GIR_Coverage, 1601,
   20906             :         GIR_Done,
   20907             :       // Label 1359: @50114
   20908             :       GIM_Try, /*On fail goto*//*Label 1360*/ 50170, // Rule ID 1602 //
   20909             :         GIM_CheckFeatures, GIFBS_HasNEON,
   20910             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfp2fxu,
   20911             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   20912             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   20913             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   20914             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   20915             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   20916             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   20917             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   20918             :         // MIs[1] Operand 1
   20919             :         // No operand predicates
   20920             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   20921             :         // (intrinsic_wo_chain:{ *:[v2i32] } 361:{ *:[iPTR] }, V64:{ *:[v2f32] }:$Rn, (imm:{ *:[i32] }):$imm)  =>  (FCVTZUv2i32_shift:{ *:[v2i32] } V64:{ *:[v2f32] }:$Rn, (imm:{ *:[i32] }):$imm)
   20922             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTZUv2i32_shift,
   20923             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   20924             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   20925             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   20926             :         GIR_EraseFromParent, /*InsnID*/0,
   20927             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   20928             :         // GIR_Coverage, 1602,
   20929             :         GIR_Done,
   20930             :       // Label 1360: @50170
   20931             :       GIM_Try, /*On fail goto*//*Label 1361*/ 50226, // Rule ID 1603 //
   20932             :         GIM_CheckFeatures, GIFBS_HasNEON,
   20933             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfp2fxu,
   20934             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   20935             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   20936             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   20937             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   20938             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   20939             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   20940             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   20941             :         // MIs[1] Operand 1
   20942             :         // No operand predicates
   20943             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   20944             :         // (intrinsic_wo_chain:{ *:[v4i32] } 361:{ *:[iPTR] }, V128:{ *:[v4f32] }:$Rn, (imm:{ *:[i32] }):$imm)  =>  (FCVTZUv4i32_shift:{ *:[v4i32] } V128:{ *:[v4f32] }:$Rn, (imm:{ *:[i32] }):$imm)
   20945             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTZUv4i32_shift,
   20946             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   20947             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   20948             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   20949             :         GIR_EraseFromParent, /*InsnID*/0,
   20950             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   20951             :         // GIR_Coverage, 1603,
   20952             :         GIR_Done,
   20953             :       // Label 1361: @50226
   20954             :       GIM_Try, /*On fail goto*//*Label 1362*/ 50282, // Rule ID 1604 //
   20955             :         GIM_CheckFeatures, GIFBS_HasNEON,
   20956             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfp2fxu,
   20957             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   20958             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   20959             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   20960             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   20961             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   20962             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   20963             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   20964             :         // MIs[1] Operand 1
   20965             :         // No operand predicates
   20966             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   20967             :         // (intrinsic_wo_chain:{ *:[v2i64] } 361:{ *:[iPTR] }, V128:{ *:[v2f64] }:$Rn, (imm:{ *:[i32] }):$imm)  =>  (FCVTZUv2i64_shift:{ *:[v2i64] } V128:{ *:[v2f64] }:$Rn, (imm:{ *:[i32] }):$imm)
   20968             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FCVTZUv2i64_shift,
   20969             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   20970             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   20971             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   20972             :         GIR_EraseFromParent, /*InsnID*/0,
   20973             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   20974             :         // GIR_Coverage, 1604,
   20975             :         GIR_Done,
   20976             :       // Label 1362: @50282
   20977             :       GIM_Try, /*On fail goto*//*Label 1363*/ 50338, // Rule ID 1605 //
   20978             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   20979             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfxs2fp,
   20980             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   20981             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   20982             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   20983             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   20984             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   20985             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   20986             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   20987             :         // MIs[1] Operand 1
   20988             :         // No operand predicates
   20989             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   20990             :         // (intrinsic_wo_chain:{ *:[v4f16] } 363:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, (imm:{ *:[i32] }):$imm)  =>  (SCVTFv4i16_shift:{ *:[v4f16] } V64:{ *:[v4i16] }:$Rn, (imm:{ *:[i32] }):$imm)
   20991             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SCVTFv4i16_shift,
   20992             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   20993             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   20994             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   20995             :         GIR_EraseFromParent, /*InsnID*/0,
   20996             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   20997             :         // GIR_Coverage, 1605,
   20998             :         GIR_Done,
   20999             :       // Label 1363: @50338
   21000             :       GIM_Try, /*On fail goto*//*Label 1364*/ 50394, // Rule ID 1606 //
   21001             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   21002             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfxs2fp,
   21003             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   21004             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   21005             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   21006             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   21007             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   21008             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   21009             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   21010             :         // MIs[1] Operand 1
   21011             :         // No operand predicates
   21012             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   21013             :         // (intrinsic_wo_chain:{ *:[v8f16] } 363:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, (imm:{ *:[i32] }):$imm)  =>  (SCVTFv8i16_shift:{ *:[v8f16] } V128:{ *:[v8i16] }:$Rn, (imm:{ *:[i32] }):$imm)
   21014             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SCVTFv8i16_shift,
   21015             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   21016             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   21017             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   21018             :         GIR_EraseFromParent, /*InsnID*/0,
   21019             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21020             :         // GIR_Coverage, 1606,
   21021             :         GIR_Done,
   21022             :       // Label 1364: @50394
   21023             :       GIM_Try, /*On fail goto*//*Label 1365*/ 50450, // Rule ID 1607 //
   21024             :         GIM_CheckFeatures, GIFBS_HasNEON,
   21025             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfxs2fp,
   21026             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   21027             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   21028             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   21029             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   21030             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   21031             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   21032             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   21033             :         // MIs[1] Operand 1
   21034             :         // No operand predicates
   21035             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   21036             :         // (intrinsic_wo_chain:{ *:[v2f32] } 363:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, (imm:{ *:[i32] }):$imm)  =>  (SCVTFv2i32_shift:{ *:[v2f32] } V64:{ *:[v2i32] }:$Rn, (imm:{ *:[i32] }):$imm)
   21037             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SCVTFv2i32_shift,
   21038             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   21039             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   21040             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   21041             :         GIR_EraseFromParent, /*InsnID*/0,
   21042             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21043             :         // GIR_Coverage, 1607,
   21044             :         GIR_Done,
   21045             :       // Label 1365: @50450
   21046             :       GIM_Try, /*On fail goto*//*Label 1366*/ 50506, // Rule ID 1608 //
   21047             :         GIM_CheckFeatures, GIFBS_HasNEON,
   21048             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfxs2fp,
   21049             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   21050             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   21051             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   21052             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   21053             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   21054             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   21055             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   21056             :         // MIs[1] Operand 1
   21057             :         // No operand predicates
   21058             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   21059             :         // (intrinsic_wo_chain:{ *:[v4f32] } 363:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, (imm:{ *:[i32] }):$imm)  =>  (SCVTFv4i32_shift:{ *:[v4f32] } V128:{ *:[v4i32] }:$Rn, (imm:{ *:[i32] }):$imm)
   21060             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SCVTFv4i32_shift,
   21061             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   21062             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   21063             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   21064             :         GIR_EraseFromParent, /*InsnID*/0,
   21065             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21066             :         // GIR_Coverage, 1608,
   21067             :         GIR_Done,
   21068             :       // Label 1366: @50506
   21069             :       GIM_Try, /*On fail goto*//*Label 1367*/ 50562, // Rule ID 1609 //
   21070             :         GIM_CheckFeatures, GIFBS_HasNEON,
   21071             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfxs2fp,
   21072             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   21073             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   21074             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   21075             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   21076             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   21077             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   21078             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   21079             :         // MIs[1] Operand 1
   21080             :         // No operand predicates
   21081             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   21082             :         // (intrinsic_wo_chain:{ *:[v2f64] } 363:{ *:[iPTR] }, V128:{ *:[v2i64] }:$Rn, (imm:{ *:[i32] }):$imm)  =>  (SCVTFv2i64_shift:{ *:[v2f64] } V128:{ *:[v2i64] }:$Rn, (imm:{ *:[i32] }):$imm)
   21083             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SCVTFv2i64_shift,
   21084             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   21085             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   21086             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   21087             :         GIR_EraseFromParent, /*InsnID*/0,
   21088             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21089             :         // GIR_Coverage, 1609,
   21090             :         GIR_Done,
   21091             :       // Label 1367: @50562
   21092             :       GIM_Try, /*On fail goto*//*Label 1368*/ 50618, // Rule ID 1697 //
   21093             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   21094             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfxu2fp,
   21095             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   21096             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   21097             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   21098             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   21099             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   21100             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   21101             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   21102             :         // MIs[1] Operand 1
   21103             :         // No operand predicates
   21104             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   21105             :         // (intrinsic_wo_chain:{ *:[v4f16] } 364:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, (imm:{ *:[i32] }):$imm)  =>  (UCVTFv4i16_shift:{ *:[v4f16] } V64:{ *:[v4i16] }:$Rn, (imm:{ *:[i32] }):$imm)
   21106             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UCVTFv4i16_shift,
   21107             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   21108             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   21109             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   21110             :         GIR_EraseFromParent, /*InsnID*/0,
   21111             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21112             :         // GIR_Coverage, 1697,
   21113             :         GIR_Done,
   21114             :       // Label 1368: @50618
   21115             :       GIM_Try, /*On fail goto*//*Label 1369*/ 50674, // Rule ID 1698 //
   21116             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   21117             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfxu2fp,
   21118             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   21119             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   21120             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   21121             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   21122             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   21123             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   21124             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   21125             :         // MIs[1] Operand 1
   21126             :         // No operand predicates
   21127             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   21128             :         // (intrinsic_wo_chain:{ *:[v8f16] } 364:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, (imm:{ *:[i32] }):$imm)  =>  (UCVTFv8i16_shift:{ *:[v8f16] } V128:{ *:[v8i16] }:$Rn, (imm:{ *:[i32] }):$imm)
   21129             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UCVTFv8i16_shift,
   21130             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   21131             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   21132             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   21133             :         GIR_EraseFromParent, /*InsnID*/0,
   21134             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21135             :         // GIR_Coverage, 1698,
   21136             :         GIR_Done,
   21137             :       // Label 1369: @50674
   21138             :       GIM_Try, /*On fail goto*//*Label 1370*/ 50730, // Rule ID 1699 //
   21139             :         GIM_CheckFeatures, GIFBS_HasNEON,
   21140             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfxu2fp,
   21141             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   21142             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   21143             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   21144             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   21145             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   21146             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   21147             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   21148             :         // MIs[1] Operand 1
   21149             :         // No operand predicates
   21150             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   21151             :         // (intrinsic_wo_chain:{ *:[v2f32] } 364:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, (imm:{ *:[i32] }):$imm)  =>  (UCVTFv2i32_shift:{ *:[v2f32] } V64:{ *:[v2i32] }:$Rn, (imm:{ *:[i32] }):$imm)
   21152             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UCVTFv2i32_shift,
   21153             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   21154             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   21155             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   21156             :         GIR_EraseFromParent, /*InsnID*/0,
   21157             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21158             :         // GIR_Coverage, 1699,
   21159             :         GIR_Done,
   21160             :       // Label 1370: @50730
   21161             :       GIM_Try, /*On fail goto*//*Label 1371*/ 50786, // Rule ID 1700 //
   21162             :         GIM_CheckFeatures, GIFBS_HasNEON,
   21163             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfxu2fp,
   21164             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   21165             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   21166             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   21167             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   21168             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   21169             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   21170             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   21171             :         // MIs[1] Operand 1
   21172             :         // No operand predicates
   21173             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   21174             :         // (intrinsic_wo_chain:{ *:[v4f32] } 364:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, (imm:{ *:[i32] }):$imm)  =>  (UCVTFv4i32_shift:{ *:[v4f32] } V128:{ *:[v4i32] }:$Rn, (imm:{ *:[i32] }):$imm)
   21175             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UCVTFv4i32_shift,
   21176             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   21177             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   21178             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   21179             :         GIR_EraseFromParent, /*InsnID*/0,
   21180             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21181             :         // GIR_Coverage, 1700,
   21182             :         GIR_Done,
   21183             :       // Label 1371: @50786
   21184             :       GIM_Try, /*On fail goto*//*Label 1372*/ 50842, // Rule ID 1701 //
   21185             :         GIM_CheckFeatures, GIFBS_HasNEON,
   21186             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcvtfxu2fp,
   21187             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   21188             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   21189             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   21190             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   21191             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   21192             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   21193             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   21194             :         // MIs[1] Operand 1
   21195             :         // No operand predicates
   21196             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   21197             :         // (intrinsic_wo_chain:{ *:[v2f64] } 364:{ *:[iPTR] }, V128:{ *:[v2i64] }:$Rn, (imm:{ *:[i32] }):$imm)  =>  (UCVTFv2i64_shift:{ *:[v2f64] } V128:{ *:[v2i64] }:$Rn, (imm:{ *:[i32] }):$imm)
   21198             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UCVTFv2i64_shift,
   21199             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   21200             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   21201             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   21202             :         GIR_EraseFromParent, /*InsnID*/0,
   21203             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21204             :         // GIR_Coverage, 1701,
   21205             :         GIR_Done,
   21206             :       // Label 1372: @50842
   21207             :       GIM_Try, /*On fail goto*//*Label 1373*/ 50894, // Rule ID 71 //
   21208             :         GIM_CheckFeatures, GIFBS_HasCRC,
   21209             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_crc32b,
   21210             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   21211             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   21212             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   21213             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   21214             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   21215             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR32RegClassID,
   21216             :         // (intrinsic_wo_chain:{ *:[i32] } 185:{ *:[iPTR] }, GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)  =>  (CRC32Brr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
   21217             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CRC32Brr,
   21218             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   21219             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   21220             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   21221             :         GIR_EraseFromParent, /*InsnID*/0,
   21222             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21223             :         // GIR_Coverage, 71,
   21224             :         GIR_Done,
   21225             :       // Label 1373: @50894
   21226             :       GIM_Try, /*On fail goto*//*Label 1374*/ 50946, // Rule ID 72 //
   21227             :         GIM_CheckFeatures, GIFBS_HasCRC,
   21228             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_crc32h,
   21229             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   21230             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   21231             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   21232             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   21233             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   21234             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR32RegClassID,
   21235             :         // (intrinsic_wo_chain:{ *:[i32] } 190:{ *:[iPTR] }, GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)  =>  (CRC32Hrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
   21236             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CRC32Hrr,
   21237             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   21238             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   21239             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   21240             :         GIR_EraseFromParent, /*InsnID*/0,
   21241             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21242             :         // GIR_Coverage, 72,
   21243             :         GIR_Done,
   21244             :       // Label 1374: @50946
   21245             :       GIM_Try, /*On fail goto*//*Label 1375*/ 50998, // Rule ID 73 //
   21246             :         GIM_CheckFeatures, GIFBS_HasCRC,
   21247             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_crc32w,
   21248             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   21249             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   21250             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   21251             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   21252             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   21253             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR32RegClassID,
   21254             :         // (intrinsic_wo_chain:{ *:[i32] } 191:{ *:[iPTR] }, GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)  =>  (CRC32Wrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
   21255             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CRC32Wrr,
   21256             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   21257             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   21258             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   21259             :         GIR_EraseFromParent, /*InsnID*/0,
   21260             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21261             :         // GIR_Coverage, 73,
   21262             :         GIR_Done,
   21263             :       // Label 1375: @50998
   21264             :       GIM_Try, /*On fail goto*//*Label 1376*/ 51050, // Rule ID 74 //
   21265             :         GIM_CheckFeatures, GIFBS_HasCRC,
   21266             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_crc32x,
   21267             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   21268             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   21269             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   21270             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   21271             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   21272             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR64RegClassID,
   21273             :         // (intrinsic_wo_chain:{ *:[i32] } 192:{ *:[iPTR] }, GPR32:{ *:[i32] }:$Rn, GPR64:{ *:[i64] }:$Rm)  =>  (CRC32Xrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR64:{ *:[i64] }:$Rm)
   21274             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CRC32Xrr,
   21275             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   21276             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   21277             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   21278             :         GIR_EraseFromParent, /*InsnID*/0,
   21279             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21280             :         // GIR_Coverage, 74,
   21281             :         GIR_Done,
   21282             :       // Label 1376: @51050
   21283             :       GIM_Try, /*On fail goto*//*Label 1377*/ 51102, // Rule ID 75 //
   21284             :         GIM_CheckFeatures, GIFBS_HasCRC,
   21285             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_crc32cb,
   21286             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   21287             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   21288             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   21289             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   21290             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   21291             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR32RegClassID,
   21292             :         // (intrinsic_wo_chain:{ *:[i32] } 186:{ *:[iPTR] }, GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)  =>  (CRC32CBrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
   21293             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CRC32CBrr,
   21294             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   21295             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   21296             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   21297             :         GIR_EraseFromParent, /*InsnID*/0,
   21298             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21299             :         // GIR_Coverage, 75,
   21300             :         GIR_Done,
   21301             :       // Label 1377: @51102
   21302             :       GIM_Try, /*On fail goto*//*Label 1378*/ 51154, // Rule ID 76 //
   21303             :         GIM_CheckFeatures, GIFBS_HasCRC,
   21304             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_crc32ch,
   21305             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   21306             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   21307             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   21308             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   21309             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   21310             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR32RegClassID,
   21311             :         // (intrinsic_wo_chain:{ *:[i32] } 187:{ *:[iPTR] }, GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)  =>  (CRC32CHrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
   21312             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CRC32CHrr,
   21313             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   21314             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   21315             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   21316             :         GIR_EraseFromParent, /*InsnID*/0,
   21317             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21318             :         // GIR_Coverage, 76,
   21319             :         GIR_Done,
   21320             :       // Label 1378: @51154
   21321             :       GIM_Try, /*On fail goto*//*Label 1379*/ 51206, // Rule ID 77 //
   21322             :         GIM_CheckFeatures, GIFBS_HasCRC,
   21323             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_crc32cw,
   21324             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   21325             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   21326             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   21327             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   21328             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   21329             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR32RegClassID,
   21330             :         // (intrinsic_wo_chain:{ *:[i32] } 188:{ *:[iPTR] }, GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)  =>  (CRC32CWrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
   21331             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CRC32CWrr,
   21332             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   21333             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   21334             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   21335             :         GIR_EraseFromParent, /*InsnID*/0,
   21336             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21337             :         // GIR_Coverage, 77,
   21338             :         GIR_Done,
   21339             :       // Label 1379: @51206
   21340             :       GIM_Try, /*On fail goto*//*Label 1380*/ 51258, // Rule ID 78 //
   21341             :         GIM_CheckFeatures, GIFBS_HasCRC,
   21342             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_crc32cx,
   21343             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   21344             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   21345             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   21346             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   21347             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   21348             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR64RegClassID,
   21349             :         // (intrinsic_wo_chain:{ *:[i32] } 189:{ *:[iPTR] }, GPR32:{ *:[i32] }:$Rn, GPR64:{ *:[i64] }:$Rm)  =>  (CRC32CXrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR64:{ *:[i64] }:$Rm)
   21350             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CRC32CXrr,
   21351             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   21352             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   21353             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   21354             :         GIR_EraseFromParent, /*InsnID*/0,
   21355             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21356             :         // GIR_Coverage, 78,
   21357             :         GIR_Done,
   21358             :       // Label 1380: @51258
   21359             :       GIM_Try, /*On fail goto*//*Label 1381*/ 51310, // Rule ID 727 //
   21360             :         GIM_CheckFeatures, GIFBS_HasNEON,
   21361             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_suqadd,
   21362             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   21363             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
   21364             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
   21365             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   21366             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   21367             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   21368             :         // (intrinsic_wo_chain:{ *:[v8i8] } 322:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rd, V64:{ *:[v8i8] }:$Rn)  =>  (SUQADDv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rd, V64:{ *:[v8i8] }:$Rn)
   21369             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SUQADDv8i8,
   21370             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   21371             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   21372             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   21373             :         GIR_EraseFromParent, /*InsnID*/0,
   21374             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21375             :         // GIR_Coverage, 727,
   21376             :         GIR_Done,
   21377             :       // Label 1381: @51310
   21378             :       GIM_Try, /*On fail goto*//*Label 1382*/ 51362, // Rule ID 728 //
   21379             :         GIM_CheckFeatures, GIFBS_HasNEON,
   21380             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_suqadd,
   21381             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   21382             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   21383             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
   21384             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   21385             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   21386             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   21387             :         // (intrinsic_wo_chain:{ *:[v16i8] } 322:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rd, V128:{ *:[v16i8] }:$Rn)  =>  (SUQADDv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rd, V128:{ *:[v16i8] }:$Rn)
   21388             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SUQADDv16i8,
   21389             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   21390             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   21391             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   21392             :         GIR_EraseFromParent, /*InsnID*/0,
   21393             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21394             :         // GIR_Coverage, 728,
   21395             :         GIR_Done,
   21396             :       // Label 1382: @51362
   21397             :       GIM_Try, /*On fail goto*//*Label 1383*/ 51414, // Rule ID 729 //
   21398             :         GIM_CheckFeatures, GIFBS_HasNEON,
   21399             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_suqadd,
   21400             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   21401             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   21402             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   21403             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   21404             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   21405             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   21406             :         // (intrinsic_wo_chain:{ *:[v4i16] } 322:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rd, V64:{ *:[v4i16] }:$Rn)  =>  (SUQADDv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, V64:{ *:[v4i16] }:$Rn)
   21407             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SUQADDv4i16,
   21408             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   21409             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   21410             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   21411             :         GIR_EraseFromParent, /*InsnID*/0,
   21412             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21413             :         // GIR_Coverage, 729,
   21414             :         GIR_Done,
   21415             :       // Label 1383: @51414
   21416             :       GIM_Try, /*On fail goto*//*Label 1384*/ 51466, // Rule ID 730 //
   21417             :         GIM_CheckFeatures, GIFBS_HasNEON,
   21418             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_suqadd,
   21419             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   21420             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   21421             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   21422             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   21423             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   21424             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   21425             :         // (intrinsic_wo_chain:{ *:[v8i16] } 322:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rd, V128:{ *:[v8i16] }:$Rn)  =>  (SUQADDv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V128:{ *:[v8i16] }:$Rn)
   21426             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SUQADDv8i16,
   21427             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   21428             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   21429             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   21430             :         GIR_EraseFromParent, /*InsnID*/0,
   21431             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21432             :         // GIR_Coverage, 730,
   21433             :         GIR_Done,
   21434             :       // Label 1384: @51466
   21435             :       GIM_Try, /*On fail goto*//*Label 1385*/ 51518, // Rule ID 731 //
   21436             :         GIM_CheckFeatures, GIFBS_HasNEON,
   21437             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_suqadd,
   21438             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   21439             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   21440             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   21441             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   21442             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   21443             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   21444             :         // (intrinsic_wo_chain:{ *:[v2i32] } 322:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rd, V64:{ *:[v2i32] }:$Rn)  =>  (SUQADDv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, V64:{ *:[v2i32] }:$Rn)
   21445             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SUQADDv2i32,
   21446             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   21447             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   21448             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   21449             :         GIR_EraseFromParent, /*InsnID*/0,
   21450             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21451             :         // GIR_Coverage, 731,
   21452             :         GIR_Done,
   21453             :       // Label 1385: @51518
   21454             :       GIM_Try, /*On fail goto*//*Label 1386*/ 51570, // Rule ID 732 //
   21455             :         GIM_CheckFeatures, GIFBS_HasNEON,
   21456             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_suqadd,
   21457             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   21458             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   21459             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   21460             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   21461             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   21462             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   21463             :         // (intrinsic_wo_chain:{ *:[v4i32] } 322:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rd, V128:{ *:[v4i32] }:$Rn)  =>  (SUQADDv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v4i32] }:$Rn)
   21464             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SUQADDv4i32,
   21465             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   21466             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   21467             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   21468             :         GIR_EraseFromParent, /*InsnID*/0,
   21469             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21470             :         // GIR_Coverage, 732,
   21471             :         GIR_Done,
   21472             :       // Label 1386: @51570
   21473             :       GIM_Try, /*On fail goto*//*Label 1387*/ 51622, // Rule ID 733 //
   21474             :         GIM_CheckFeatures, GIFBS_HasNEON,
   21475             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_suqadd,
   21476             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   21477             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   21478             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
   21479             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   21480             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   21481             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   21482             :         // (intrinsic_wo_chain:{ *:[v2i64] } 322:{ *:[iPTR] }, V128:{ *:[v2i64] }:$Rd, V128:{ *:[v2i64] }:$Rn)  =>  (SUQADDv2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V128:{ *:[v2i64] }:$Rn)
   21483             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SUQADDv2i64,
   21484             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   21485             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   21486             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   21487             :         GIR_EraseFromParent, /*InsnID*/0,
   21488             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21489             :         // GIR_Coverage, 733,
   21490             :         GIR_Done,
   21491             :       // Label 1387: @51622
   21492             :       GIM_Try, /*On fail goto*//*Label 1388*/ 51674, // Rule ID 758 //
   21493             :         GIM_CheckFeatures, GIFBS_HasNEON,
   21494             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_usqadd,
   21495             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   21496             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
   21497             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
   21498             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   21499             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   21500             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   21501             :         // (intrinsic_wo_chain:{ *:[v8i8] } 358:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rd, V64:{ *:[v8i8] }:$Rn)  =>  (USQADDv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rd, V64:{ *:[v8i8] }:$Rn)
   21502             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USQADDv8i8,
   21503             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   21504             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   21505             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   21506             :         GIR_EraseFromParent, /*InsnID*/0,
   21507             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21508             :         // GIR_Coverage, 758,
   21509             :         GIR_Done,
   21510             :       // Label 1388: @51674
   21511             :       GIM_Try, /*On fail goto*//*Label 1389*/ 51726, // Rule ID 759 //
   21512             :         GIM_CheckFeatures, GIFBS_HasNEON,
   21513             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_usqadd,
   21514             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   21515             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   21516             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
   21517             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   21518             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   21519             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   21520             :         // (intrinsic_wo_chain:{ *:[v16i8] } 358:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rd, V128:{ *:[v16i8] }:$Rn)  =>  (USQADDv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rd, V128:{ *:[v16i8] }:$Rn)
   21521             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USQADDv16i8,
   21522             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   21523             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   21524             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   21525             :         GIR_EraseFromParent, /*InsnID*/0,
   21526             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21527             :         // GIR_Coverage, 759,
   21528             :         GIR_Done,
   21529             :       // Label 1389: @51726
   21530             :       GIM_Try, /*On fail goto*//*Label 1390*/ 51778, // Rule ID 760 //
   21531             :         GIM_CheckFeatures, GIFBS_HasNEON,
   21532             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_usqadd,
   21533             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   21534             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   21535             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   21536             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   21537             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   21538             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   21539             :         // (intrinsic_wo_chain:{ *:[v4i16] } 358:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rd, V64:{ *:[v4i16] }:$Rn)  =>  (USQADDv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, V64:{ *:[v4i16] }:$Rn)
   21540             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USQADDv4i16,
   21541             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   21542             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   21543             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   21544             :         GIR_EraseFromParent, /*InsnID*/0,
   21545             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21546             :         // GIR_Coverage, 760,
   21547             :         GIR_Done,
   21548             :       // Label 1390: @51778
   21549             :       GIM_Try, /*On fail goto*//*Label 1391*/ 51830, // Rule ID 761 //
   21550             :         GIM_CheckFeatures, GIFBS_HasNEON,
   21551             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_usqadd,
   21552             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   21553             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   21554             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   21555             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   21556             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   21557             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   21558             :         // (intrinsic_wo_chain:{ *:[v8i16] } 358:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rd, V128:{ *:[v8i16] }:$Rn)  =>  (USQADDv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V128:{ *:[v8i16] }:$Rn)
   21559             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USQADDv8i16,
   21560             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   21561             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   21562             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   21563             :         GIR_EraseFromParent, /*InsnID*/0,
   21564             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21565             :         // GIR_Coverage, 761,
   21566             :         GIR_Done,
   21567             :       // Label 1391: @51830
   21568             :       GIM_Try, /*On fail goto*//*Label 1392*/ 51882, // Rule ID 762 //
   21569             :         GIM_CheckFeatures, GIFBS_HasNEON,
   21570             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_usqadd,
   21571             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   21572             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   21573             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   21574             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   21575             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   21576             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   21577             :         // (intrinsic_wo_chain:{ *:[v2i32] } 358:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rd, V64:{ *:[v2i32] }:$Rn)  =>  (USQADDv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, V64:{ *:[v2i32] }:$Rn)
   21578             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USQADDv2i32,
   21579             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   21580             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   21581             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   21582             :         GIR_EraseFromParent, /*InsnID*/0,
   21583             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21584             :         // GIR_Coverage, 762,
   21585             :         GIR_Done,
   21586             :       // Label 1392: @51882
   21587             :       GIM_Try, /*On fail goto*//*Label 1393*/ 51934, // Rule ID 763 //
   21588             :         GIM_CheckFeatures, GIFBS_HasNEON,
   21589             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_usqadd,
   21590             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   21591             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   21592             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   21593             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   21594             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   21595             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   21596             :         // (intrinsic_wo_chain:{ *:[v4i32] } 358:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rd, V128:{ *:[v4i32] }:$Rn)  =>  (USQADDv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v4i32] }:$Rn)
   21597             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USQADDv4i32,
   21598             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   21599             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   21600             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   21601             :         GIR_EraseFromParent, /*InsnID*/0,
   21602             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21603             :         // GIR_Coverage, 763,
   21604             :         GIR_Done,
   21605             :       // Label 1393: @51934
   21606             :       GIM_Try, /*On fail goto*//*Label 1394*/ 51986, // Rule ID 764 //
   21607             :         GIM_CheckFeatures, GIFBS_HasNEON,
   21608             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_usqadd,
   21609             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   21610             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   21611             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
   21612             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   21613             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   21614             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   21615             :         // (intrinsic_wo_chain:{ *:[v2i64] } 358:{ *:[iPTR] }, V128:{ *:[v2i64] }:$Rd, V128:{ *:[v2i64] }:$Rn)  =>  (USQADDv2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V128:{ *:[v2i64] }:$Rn)
   21616             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USQADDv2i64,
   21617             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   21618             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   21619             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   21620             :         GIR_EraseFromParent, /*InsnID*/0,
   21621             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21622             :         // GIR_Coverage, 764,
   21623             :         GIR_Done,
   21624             :       // Label 1394: @51986
   21625             :       GIM_Try, /*On fail goto*//*Label 1395*/ 52038, // Rule ID 775 //
   21626             :         GIM_CheckFeatures, GIFBS_HasNEON,
   21627             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_addp,
   21628             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   21629             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
   21630             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
   21631             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   21632             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   21633             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   21634             :         // (intrinsic_wo_chain:{ *:[v8i8] } 218:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (ADDPv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
   21635             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ADDPv8i8,
   21636             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   21637             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   21638             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   21639             :         GIR_EraseFromParent, /*InsnID*/0,
   21640             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21641             :         // GIR_Coverage, 775,
   21642             :         GIR_Done,
   21643             :       // Label 1395: @52038
   21644             :       GIM_Try, /*On fail goto*//*Label 1396*/ 52090, // Rule ID 776 //
   21645             :         GIM_CheckFeatures, GIFBS_HasNEON,
   21646             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_addp,
   21647             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   21648             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   21649             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
   21650             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   21651             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   21652             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   21653             :         // (intrinsic_wo_chain:{ *:[v16i8] } 218:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (ADDPv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
   21654             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ADDPv16i8,
   21655             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   21656             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   21657             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   21658             :         GIR_EraseFromParent, /*InsnID*/0,
   21659             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21660             :         // GIR_Coverage, 776,
   21661             :         GIR_Done,
   21662             :       // Label 1396: @52090
   21663             :       GIM_Try, /*On fail goto*//*Label 1397*/ 52142, // Rule ID 777 //
   21664             :         GIM_CheckFeatures, GIFBS_HasNEON,
   21665             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_addp,
   21666             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   21667             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   21668             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   21669             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   21670             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   21671             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   21672             :         // (intrinsic_wo_chain:{ *:[v4i16] } 218:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)  =>  (ADDPv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
   21673             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ADDPv4i16,
   21674             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   21675             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   21676             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   21677             :         GIR_EraseFromParent, /*InsnID*/0,
   21678             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21679             :         // GIR_Coverage, 777,
   21680             :         GIR_Done,
   21681             :       // Label 1397: @52142
   21682             :       GIM_Try, /*On fail goto*//*Label 1398*/ 52194, // Rule ID 778 //
   21683             :         GIM_CheckFeatures, GIFBS_HasNEON,
   21684             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_addp,
   21685             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   21686             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   21687             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   21688             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   21689             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   21690             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   21691             :         // (intrinsic_wo_chain:{ *:[v8i16] } 218:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)  =>  (ADDPv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
   21692             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ADDPv8i16,
   21693             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   21694             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   21695             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   21696             :         GIR_EraseFromParent, /*InsnID*/0,
   21697             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21698             :         // GIR_Coverage, 778,
   21699             :         GIR_Done,
   21700             :       // Label 1398: @52194
   21701             :       GIM_Try, /*On fail goto*//*Label 1399*/ 52246, // Rule ID 779 //
   21702             :         GIM_CheckFeatures, GIFBS_HasNEON,
   21703             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_addp,
   21704             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   21705             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   21706             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   21707             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   21708             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   21709             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   21710             :         // (intrinsic_wo_chain:{ *:[v2i32] } 218:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)  =>  (ADDPv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
   21711             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ADDPv2i32,
   21712             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   21713             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   21714             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   21715             :         GIR_EraseFromParent, /*InsnID*/0,
   21716             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21717             :         // GIR_Coverage, 779,
   21718             :         GIR_Done,
   21719             :       // Label 1399: @52246
   21720             :       GIM_Try, /*On fail goto*//*Label 1400*/ 52298, // Rule ID 780 //
   21721             :         GIM_CheckFeatures, GIFBS_HasNEON,
   21722             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_addp,
   21723             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   21724             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   21725             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   21726             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   21727             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   21728             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   21729             :         // (intrinsic_wo_chain:{ *:[v4i32] } 218:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (ADDPv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
   21730             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ADDPv4i32,
   21731             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   21732             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   21733             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   21734             :         GIR_EraseFromParent, /*InsnID*/0,
   21735             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21736             :         // GIR_Coverage, 780,
   21737             :         GIR_Done,
   21738             :       // Label 1400: @52298
   21739             :       GIM_Try, /*On fail goto*//*Label 1401*/ 52350, // Rule ID 781 //
   21740             :         GIM_CheckFeatures, GIFBS_HasNEON,
   21741             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_addp,
   21742             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   21743             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   21744             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
   21745             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   21746             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   21747             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   21748             :         // (intrinsic_wo_chain:{ *:[v2i64] } 218:{ *:[iPTR] }, V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)  =>  (ADDPv2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)
   21749             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ADDPv2i64,
   21750             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   21751             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   21752             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   21753             :         GIR_EraseFromParent, /*InsnID*/0,
   21754             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21755             :         // GIR_Coverage, 781,
   21756             :         GIR_Done,
   21757             :       // Label 1401: @52350
   21758             :       GIM_Try, /*On fail goto*//*Label 1402*/ 52402, // Rule ID 824 //
   21759             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   21760             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fabd,
   21761             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   21762             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   21763             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   21764             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   21765             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   21766             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   21767             :         // (intrinsic_wo_chain:{ *:[v4f16] } 220:{ *:[iPTR] }, V64:{ *:[v4f16] }:$Rn, V64:{ *:[v4f16] }:$Rm)  =>  (FABDv4f16:{ *:[v4f16] } V64:{ *:[v4f16] }:$Rn, V64:{ *:[v4f16] }:$Rm)
   21768             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FABDv4f16,
   21769             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   21770             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   21771             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   21772             :         GIR_EraseFromParent, /*InsnID*/0,
   21773             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21774             :         // GIR_Coverage, 824,
   21775             :         GIR_Done,
   21776             :       // Label 1402: @52402
   21777             :       GIM_Try, /*On fail goto*//*Label 1403*/ 52454, // Rule ID 825 //
   21778             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   21779             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fabd,
   21780             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   21781             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   21782             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   21783             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   21784             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   21785             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   21786             :         // (intrinsic_wo_chain:{ *:[v8f16] } 220:{ *:[iPTR] }, V128:{ *:[v8f16] }:$Rn, V128:{ *:[v8f16] }:$Rm)  =>  (FABDv8f16:{ *:[v8f16] } V128:{ *:[v8f16] }:$Rn, V128:{ *:[v8f16] }:$Rm)
   21787             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FABDv8f16,
   21788             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   21789             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   21790             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   21791             :         GIR_EraseFromParent, /*InsnID*/0,
   21792             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21793             :         // GIR_Coverage, 825,
   21794             :         GIR_Done,
   21795             :       // Label 1403: @52454
   21796             :       GIM_Try, /*On fail goto*//*Label 1404*/ 52506, // Rule ID 826 //
   21797             :         GIM_CheckFeatures, GIFBS_HasNEON,
   21798             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fabd,
   21799             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   21800             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   21801             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   21802             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   21803             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   21804             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   21805             :         // (intrinsic_wo_chain:{ *:[v2f32] } 220:{ *:[iPTR] }, V64:{ *:[v2f32] }:$Rn, V64:{ *:[v2f32] }:$Rm)  =>  (FABDv2f32:{ *:[v2f32] } V64:{ *:[v2f32] }:$Rn, V64:{ *:[v2f32] }:$Rm)
   21806             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FABDv2f32,
   21807             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   21808             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   21809             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   21810             :         GIR_EraseFromParent, /*InsnID*/0,
   21811             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21812             :         // GIR_Coverage, 826,
   21813             :         GIR_Done,
   21814             :       // Label 1404: @52506
   21815             :       GIM_Try, /*On fail goto*//*Label 1405*/ 52558, // Rule ID 827 //
   21816             :         GIM_CheckFeatures, GIFBS_HasNEON,
   21817             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fabd,
   21818             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   21819             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   21820             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   21821             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   21822             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   21823             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   21824             :         // (intrinsic_wo_chain:{ *:[v4f32] } 220:{ *:[iPTR] }, V128:{ *:[v4f32] }:$Rn, V128:{ *:[v4f32] }:$Rm)  =>  (FABDv4f32:{ *:[v4f32] } V128:{ *:[v4f32] }:$Rn, V128:{ *:[v4f32] }:$Rm)
   21825             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FABDv4f32,
   21826             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   21827             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   21828             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   21829             :         GIR_EraseFromParent, /*InsnID*/0,
   21830             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21831             :         // GIR_Coverage, 827,
   21832             :         GIR_Done,
   21833             :       // Label 1405: @52558
   21834             :       GIM_Try, /*On fail goto*//*Label 1406*/ 52610, // Rule ID 828 //
   21835             :         GIM_CheckFeatures, GIFBS_HasNEON,
   21836             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fabd,
   21837             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   21838             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   21839             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
   21840             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   21841             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   21842             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   21843             :         // (intrinsic_wo_chain:{ *:[v2f64] } 220:{ *:[iPTR] }, V128:{ *:[v2f64] }:$Rn, V128:{ *:[v2f64] }:$Rm)  =>  (FABDv2f64:{ *:[v2f64] } V128:{ *:[v2f64] }:$Rn, V128:{ *:[v2f64] }:$Rm)
   21844             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FABDv2f64,
   21845             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   21846             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   21847             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   21848             :         GIR_EraseFromParent, /*InsnID*/0,
   21849             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21850             :         // GIR_Coverage, 828,
   21851             :         GIR_Done,
   21852             :       // Label 1406: @52610
   21853             :       GIM_Try, /*On fail goto*//*Label 1407*/ 52662, // Rule ID 829 //
   21854             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   21855             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_facge,
   21856             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   21857             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   21858             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   21859             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   21860             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   21861             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   21862             :         // (intrinsic_wo_chain:{ *:[v4i16] } 221:{ *:[iPTR] }, V64:{ *:[v4f16] }:$Rn, V64:{ *:[v4f16] }:$Rm)  =>  (FACGEv4f16:{ *:[v4i16] } V64:{ *:[v4f16] }:$Rn, V64:{ *:[v4f16] }:$Rm)
   21863             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FACGEv4f16,
   21864             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   21865             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   21866             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   21867             :         GIR_EraseFromParent, /*InsnID*/0,
   21868             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21869             :         // GIR_Coverage, 829,
   21870             :         GIR_Done,
   21871             :       // Label 1407: @52662
   21872             :       GIM_Try, /*On fail goto*//*Label 1408*/ 52714, // Rule ID 830 //
   21873             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   21874             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_facge,
   21875             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   21876             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   21877             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   21878             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   21879             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   21880             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   21881             :         // (intrinsic_wo_chain:{ *:[v8i16] } 221:{ *:[iPTR] }, V128:{ *:[v8f16] }:$Rn, V128:{ *:[v8f16] }:$Rm)  =>  (FACGEv8f16:{ *:[v8i16] } V128:{ *:[v8f16] }:$Rn, V128:{ *:[v8f16] }:$Rm)
   21882             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FACGEv8f16,
   21883             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   21884             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   21885             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   21886             :         GIR_EraseFromParent, /*InsnID*/0,
   21887             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21888             :         // GIR_Coverage, 830,
   21889             :         GIR_Done,
   21890             :       // Label 1408: @52714
   21891             :       GIM_Try, /*On fail goto*//*Label 1409*/ 52766, // Rule ID 831 //
   21892             :         GIM_CheckFeatures, GIFBS_HasNEON,
   21893             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_facge,
   21894             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   21895             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   21896             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   21897             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   21898             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   21899             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   21900             :         // (intrinsic_wo_chain:{ *:[v2i32] } 221:{ *:[iPTR] }, V64:{ *:[v2f32] }:$Rn, V64:{ *:[v2f32] }:$Rm)  =>  (FACGEv2f32:{ *:[v2i32] } V64:{ *:[v2f32] }:$Rn, V64:{ *:[v2f32] }:$Rm)
   21901             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FACGEv2f32,
   21902             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   21903             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   21904             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   21905             :         GIR_EraseFromParent, /*InsnID*/0,
   21906             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21907             :         // GIR_Coverage, 831,
   21908             :         GIR_Done,
   21909             :       // Label 1409: @52766
   21910             :       GIM_Try, /*On fail goto*//*Label 1410*/ 52818, // Rule ID 832 //
   21911             :         GIM_CheckFeatures, GIFBS_HasNEON,
   21912             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_facge,
   21913             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   21914             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   21915             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   21916             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   21917             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   21918             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   21919             :         // (intrinsic_wo_chain:{ *:[v4i32] } 221:{ *:[iPTR] }, V128:{ *:[v4f32] }:$Rn, V128:{ *:[v4f32] }:$Rm)  =>  (FACGEv4f32:{ *:[v4i32] } V128:{ *:[v4f32] }:$Rn, V128:{ *:[v4f32] }:$Rm)
   21920             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FACGEv4f32,
   21921             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   21922             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   21923             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   21924             :         GIR_EraseFromParent, /*InsnID*/0,
   21925             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21926             :         // GIR_Coverage, 832,
   21927             :         GIR_Done,
   21928             :       // Label 1410: @52818
   21929             :       GIM_Try, /*On fail goto*//*Label 1411*/ 52870, // Rule ID 833 //
   21930             :         GIM_CheckFeatures, GIFBS_HasNEON,
   21931             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_facge,
   21932             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   21933             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   21934             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
   21935             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   21936             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   21937             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   21938             :         // (intrinsic_wo_chain:{ *:[v2i64] } 221:{ *:[iPTR] }, V128:{ *:[v2f64] }:$Rn, V128:{ *:[v2f64] }:$Rm)  =>  (FACGEv2f64:{ *:[v2i64] } V128:{ *:[v2f64] }:$Rn, V128:{ *:[v2f64] }:$Rm)
   21939             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FACGEv2f64,
   21940             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   21941             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   21942             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   21943             :         GIR_EraseFromParent, /*InsnID*/0,
   21944             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21945             :         // GIR_Coverage, 833,
   21946             :         GIR_Done,
   21947             :       // Label 1411: @52870
   21948             :       GIM_Try, /*On fail goto*//*Label 1412*/ 52922, // Rule ID 834 //
   21949             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   21950             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_facgt,
   21951             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   21952             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   21953             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   21954             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   21955             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   21956             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   21957             :         // (intrinsic_wo_chain:{ *:[v4i16] } 222:{ *:[iPTR] }, V64:{ *:[v4f16] }:$Rn, V64:{ *:[v4f16] }:$Rm)  =>  (FACGTv4f16:{ *:[v4i16] } V64:{ *:[v4f16] }:$Rn, V64:{ *:[v4f16] }:$Rm)
   21958             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FACGTv4f16,
   21959             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   21960             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   21961             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   21962             :         GIR_EraseFromParent, /*InsnID*/0,
   21963             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21964             :         // GIR_Coverage, 834,
   21965             :         GIR_Done,
   21966             :       // Label 1412: @52922
   21967             :       GIM_Try, /*On fail goto*//*Label 1413*/ 52974, // Rule ID 835 //
   21968             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   21969             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_facgt,
   21970             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   21971             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   21972             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   21973             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   21974             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   21975             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   21976             :         // (intrinsic_wo_chain:{ *:[v8i16] } 222:{ *:[iPTR] }, V128:{ *:[v8f16] }:$Rn, V128:{ *:[v8f16] }:$Rm)  =>  (FACGTv8f16:{ *:[v8i16] } V128:{ *:[v8f16] }:$Rn, V128:{ *:[v8f16] }:$Rm)
   21977             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FACGTv8f16,
   21978             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   21979             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   21980             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   21981             :         GIR_EraseFromParent, /*InsnID*/0,
   21982             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   21983             :         // GIR_Coverage, 835,
   21984             :         GIR_Done,
   21985             :       // Label 1413: @52974
   21986             :       GIM_Try, /*On fail goto*//*Label 1414*/ 53026, // Rule ID 836 //
   21987             :         GIM_CheckFeatures, GIFBS_HasNEON,
   21988             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_facgt,
   21989             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   21990             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   21991             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   21992             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   21993             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   21994             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   21995             :         // (intrinsic_wo_chain:{ *:[v2i32] } 222:{ *:[iPTR] }, V64:{ *:[v2f32] }:$Rn, V64:{ *:[v2f32] }:$Rm)  =>  (FACGTv2f32:{ *:[v2i32] } V64:{ *:[v2f32] }:$Rn, V64:{ *:[v2f32] }:$Rm)
   21996             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FACGTv2f32,
   21997             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   21998             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   21999             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22000             :         GIR_EraseFromParent, /*InsnID*/0,
   22001             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22002             :         // GIR_Coverage, 836,
   22003             :         GIR_Done,
   22004             :       // Label 1414: @53026
   22005             :       GIM_Try, /*On fail goto*//*Label 1415*/ 53078, // Rule ID 837 //
   22006             :         GIM_CheckFeatures, GIFBS_HasNEON,
   22007             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_facgt,
   22008             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   22009             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   22010             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   22011             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   22012             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   22013             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   22014             :         // (intrinsic_wo_chain:{ *:[v4i32] } 222:{ *:[iPTR] }, V128:{ *:[v4f32] }:$Rn, V128:{ *:[v4f32] }:$Rm)  =>  (FACGTv4f32:{ *:[v4i32] } V128:{ *:[v4f32] }:$Rn, V128:{ *:[v4f32] }:$Rm)
   22015             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FACGTv4f32,
   22016             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22017             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22018             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22019             :         GIR_EraseFromParent, /*InsnID*/0,
   22020             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22021             :         // GIR_Coverage, 837,
   22022             :         GIR_Done,
   22023             :       // Label 1415: @53078
   22024             :       GIM_Try, /*On fail goto*//*Label 1416*/ 53130, // Rule ID 838 //
   22025             :         GIM_CheckFeatures, GIFBS_HasNEON,
   22026             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_facgt,
   22027             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   22028             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   22029             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
   22030             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   22031             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   22032             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   22033             :         // (intrinsic_wo_chain:{ *:[v2i64] } 222:{ *:[iPTR] }, V128:{ *:[v2f64] }:$Rn, V128:{ *:[v2f64] }:$Rm)  =>  (FACGTv2f64:{ *:[v2i64] } V128:{ *:[v2f64] }:$Rn, V128:{ *:[v2f64] }:$Rm)
   22034             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FACGTv2f64,
   22035             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22036             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22037             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22038             :         GIR_EraseFromParent, /*InsnID*/0,
   22039             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22040             :         // GIR_Coverage, 838,
   22041             :         GIR_Done,
   22042             :       // Label 1416: @53130
   22043             :       GIM_Try, /*On fail goto*//*Label 1417*/ 53182, // Rule ID 839 //
   22044             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   22045             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_addp,
   22046             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   22047             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   22048             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   22049             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   22050             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   22051             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   22052             :         // (intrinsic_wo_chain:{ *:[v4f16] } 218:{ *:[iPTR] }, V64:{ *:[v4f16] }:$Rn, V64:{ *:[v4f16] }:$Rm)  =>  (FADDPv4f16:{ *:[v4f16] } V64:{ *:[v4f16] }:$Rn, V64:{ *:[v4f16] }:$Rm)
   22053             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FADDPv4f16,
   22054             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22055             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22056             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22057             :         GIR_EraseFromParent, /*InsnID*/0,
   22058             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22059             :         // GIR_Coverage, 839,
   22060             :         GIR_Done,
   22061             :       // Label 1417: @53182
   22062             :       GIM_Try, /*On fail goto*//*Label 1418*/ 53234, // Rule ID 840 //
   22063             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   22064             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_addp,
   22065             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   22066             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   22067             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   22068             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   22069             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   22070             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   22071             :         // (intrinsic_wo_chain:{ *:[v8f16] } 218:{ *:[iPTR] }, V128:{ *:[v8f16] }:$Rn, V128:{ *:[v8f16] }:$Rm)  =>  (FADDPv8f16:{ *:[v8f16] } V128:{ *:[v8f16] }:$Rn, V128:{ *:[v8f16] }:$Rm)
   22072             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FADDPv8f16,
   22073             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22074             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22075             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22076             :         GIR_EraseFromParent, /*InsnID*/0,
   22077             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22078             :         // GIR_Coverage, 840,
   22079             :         GIR_Done,
   22080             :       // Label 1418: @53234
   22081             :       GIM_Try, /*On fail goto*//*Label 1419*/ 53286, // Rule ID 841 //
   22082             :         GIM_CheckFeatures, GIFBS_HasNEON,
   22083             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_addp,
   22084             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   22085             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   22086             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   22087             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   22088             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   22089             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   22090             :         // (intrinsic_wo_chain:{ *:[v2f32] } 218:{ *:[iPTR] }, V64:{ *:[v2f32] }:$Rn, V64:{ *:[v2f32] }:$Rm)  =>  (FADDPv2f32:{ *:[v2f32] } V64:{ *:[v2f32] }:$Rn, V64:{ *:[v2f32] }:$Rm)
   22091             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FADDPv2f32,
   22092             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22093             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22094             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22095             :         GIR_EraseFromParent, /*InsnID*/0,
   22096             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22097             :         // GIR_Coverage, 841,
   22098             :         GIR_Done,
   22099             :       // Label 1419: @53286
   22100             :       GIM_Try, /*On fail goto*//*Label 1420*/ 53338, // Rule ID 842 //
   22101             :         GIM_CheckFeatures, GIFBS_HasNEON,
   22102             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_addp,
   22103             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   22104             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   22105             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   22106             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   22107             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   22108             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   22109             :         // (intrinsic_wo_chain:{ *:[v4f32] } 218:{ *:[iPTR] }, V128:{ *:[v4f32] }:$Rn, V128:{ *:[v4f32] }:$Rm)  =>  (FADDPv4f32:{ *:[v4f32] } V128:{ *:[v4f32] }:$Rn, V128:{ *:[v4f32] }:$Rm)
   22110             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FADDPv4f32,
   22111             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22112             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22113             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22114             :         GIR_EraseFromParent, /*InsnID*/0,
   22115             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22116             :         // GIR_Coverage, 842,
   22117             :         GIR_Done,
   22118             :       // Label 1420: @53338
   22119             :       GIM_Try, /*On fail goto*//*Label 1421*/ 53390, // Rule ID 843 //
   22120             :         GIM_CheckFeatures, GIFBS_HasNEON,
   22121             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_addp,
   22122             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   22123             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   22124             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
   22125             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   22126             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   22127             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   22128             :         // (intrinsic_wo_chain:{ *:[v2f64] } 218:{ *:[iPTR] }, V128:{ *:[v2f64] }:$Rn, V128:{ *:[v2f64] }:$Rm)  =>  (FADDPv2f64:{ *:[v2f64] } V128:{ *:[v2f64] }:$Rn, V128:{ *:[v2f64] }:$Rm)
   22129             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FADDPv2f64,
   22130             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22131             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22132             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22133             :         GIR_EraseFromParent, /*InsnID*/0,
   22134             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22135             :         // GIR_Coverage, 843,
   22136             :         GIR_Done,
   22137             :       // Label 1421: @53390
   22138             :       GIM_Try, /*On fail goto*//*Label 1422*/ 53442, // Rule ID 869 //
   22139             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   22140             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmaxnmp,
   22141             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   22142             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   22143             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   22144             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   22145             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   22146             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   22147             :         // (intrinsic_wo_chain:{ *:[v4f16] } 237:{ *:[iPTR] }, V64:{ *:[v4f16] }:$Rn, V64:{ *:[v4f16] }:$Rm)  =>  (FMAXNMPv4f16:{ *:[v4f16] } V64:{ *:[v4f16] }:$Rn, V64:{ *:[v4f16] }:$Rm)
   22148             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMAXNMPv4f16,
   22149             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22150             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22151             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22152             :         GIR_EraseFromParent, /*InsnID*/0,
   22153             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22154             :         // GIR_Coverage, 869,
   22155             :         GIR_Done,
   22156             :       // Label 1422: @53442
   22157             :       GIM_Try, /*On fail goto*//*Label 1423*/ 53494, // Rule ID 870 //
   22158             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   22159             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmaxnmp,
   22160             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   22161             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   22162             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   22163             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   22164             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   22165             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   22166             :         // (intrinsic_wo_chain:{ *:[v8f16] } 237:{ *:[iPTR] }, V128:{ *:[v8f16] }:$Rn, V128:{ *:[v8f16] }:$Rm)  =>  (FMAXNMPv8f16:{ *:[v8f16] } V128:{ *:[v8f16] }:$Rn, V128:{ *:[v8f16] }:$Rm)
   22167             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMAXNMPv8f16,
   22168             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22169             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22170             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22171             :         GIR_EraseFromParent, /*InsnID*/0,
   22172             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22173             :         // GIR_Coverage, 870,
   22174             :         GIR_Done,
   22175             :       // Label 1423: @53494
   22176             :       GIM_Try, /*On fail goto*//*Label 1424*/ 53546, // Rule ID 871 //
   22177             :         GIM_CheckFeatures, GIFBS_HasNEON,
   22178             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmaxnmp,
   22179             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   22180             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   22181             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   22182             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   22183             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   22184             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   22185             :         // (intrinsic_wo_chain:{ *:[v2f32] } 237:{ *:[iPTR] }, V64:{ *:[v2f32] }:$Rn, V64:{ *:[v2f32] }:$Rm)  =>  (FMAXNMPv2f32:{ *:[v2f32] } V64:{ *:[v2f32] }:$Rn, V64:{ *:[v2f32] }:$Rm)
   22186             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMAXNMPv2f32,
   22187             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22188             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22189             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22190             :         GIR_EraseFromParent, /*InsnID*/0,
   22191             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22192             :         // GIR_Coverage, 871,
   22193             :         GIR_Done,
   22194             :       // Label 1424: @53546
   22195             :       GIM_Try, /*On fail goto*//*Label 1425*/ 53598, // Rule ID 872 //
   22196             :         GIM_CheckFeatures, GIFBS_HasNEON,
   22197             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmaxnmp,
   22198             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   22199             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   22200             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   22201             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   22202             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   22203             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   22204             :         // (intrinsic_wo_chain:{ *:[v4f32] } 237:{ *:[iPTR] }, V128:{ *:[v4f32] }:$Rn, V128:{ *:[v4f32] }:$Rm)  =>  (FMAXNMPv4f32:{ *:[v4f32] } V128:{ *:[v4f32] }:$Rn, V128:{ *:[v4f32] }:$Rm)
   22205             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMAXNMPv4f32,
   22206             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22207             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22208             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22209             :         GIR_EraseFromParent, /*InsnID*/0,
   22210             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22211             :         // GIR_Coverage, 872,
   22212             :         GIR_Done,
   22213             :       // Label 1425: @53598
   22214             :       GIM_Try, /*On fail goto*//*Label 1426*/ 53650, // Rule ID 873 //
   22215             :         GIM_CheckFeatures, GIFBS_HasNEON,
   22216             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmaxnmp,
   22217             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   22218             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   22219             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
   22220             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   22221             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   22222             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   22223             :         // (intrinsic_wo_chain:{ *:[v2f64] } 237:{ *:[iPTR] }, V128:{ *:[v2f64] }:$Rn, V128:{ *:[v2f64] }:$Rm)  =>  (FMAXNMPv2f64:{ *:[v2f64] } V128:{ *:[v2f64] }:$Rn, V128:{ *:[v2f64] }:$Rm)
   22224             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMAXNMPv2f64,
   22225             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22226             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22227             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22228             :         GIR_EraseFromParent, /*InsnID*/0,
   22229             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22230             :         // GIR_Coverage, 873,
   22231             :         GIR_Done,
   22232             :       // Label 1426: @53650
   22233             :       GIM_Try, /*On fail goto*//*Label 1427*/ 53702, // Rule ID 879 //
   22234             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   22235             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmaxp,
   22236             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   22237             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   22238             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   22239             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   22240             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   22241             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   22242             :         // (intrinsic_wo_chain:{ *:[v4f16] } 239:{ *:[iPTR] }, V64:{ *:[v4f16] }:$Rn, V64:{ *:[v4f16] }:$Rm)  =>  (FMAXPv4f16:{ *:[v4f16] } V64:{ *:[v4f16] }:$Rn, V64:{ *:[v4f16] }:$Rm)
   22243             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMAXPv4f16,
   22244             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22245             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22246             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22247             :         GIR_EraseFromParent, /*InsnID*/0,
   22248             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22249             :         // GIR_Coverage, 879,
   22250             :         GIR_Done,
   22251             :       // Label 1427: @53702
   22252             :       GIM_Try, /*On fail goto*//*Label 1428*/ 53754, // Rule ID 880 //
   22253             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   22254             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmaxp,
   22255             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   22256             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   22257             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   22258             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   22259             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   22260             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   22261             :         // (intrinsic_wo_chain:{ *:[v8f16] } 239:{ *:[iPTR] }, V128:{ *:[v8f16] }:$Rn, V128:{ *:[v8f16] }:$Rm)  =>  (FMAXPv8f16:{ *:[v8f16] } V128:{ *:[v8f16] }:$Rn, V128:{ *:[v8f16] }:$Rm)
   22262             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMAXPv8f16,
   22263             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22264             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22265             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22266             :         GIR_EraseFromParent, /*InsnID*/0,
   22267             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22268             :         // GIR_Coverage, 880,
   22269             :         GIR_Done,
   22270             :       // Label 1428: @53754
   22271             :       GIM_Try, /*On fail goto*//*Label 1429*/ 53806, // Rule ID 881 //
   22272             :         GIM_CheckFeatures, GIFBS_HasNEON,
   22273             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmaxp,
   22274             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   22275             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   22276             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   22277             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   22278             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   22279             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   22280             :         // (intrinsic_wo_chain:{ *:[v2f32] } 239:{ *:[iPTR] }, V64:{ *:[v2f32] }:$Rn, V64:{ *:[v2f32] }:$Rm)  =>  (FMAXPv2f32:{ *:[v2f32] } V64:{ *:[v2f32] }:$Rn, V64:{ *:[v2f32] }:$Rm)
   22281             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMAXPv2f32,
   22282             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22283             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22284             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22285             :         GIR_EraseFromParent, /*InsnID*/0,
   22286             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22287             :         // GIR_Coverage, 881,
   22288             :         GIR_Done,
   22289             :       // Label 1429: @53806
   22290             :       GIM_Try, /*On fail goto*//*Label 1430*/ 53858, // Rule ID 882 //
   22291             :         GIM_CheckFeatures, GIFBS_HasNEON,
   22292             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmaxp,
   22293             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   22294             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   22295             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   22296             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   22297             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   22298             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   22299             :         // (intrinsic_wo_chain:{ *:[v4f32] } 239:{ *:[iPTR] }, V128:{ *:[v4f32] }:$Rn, V128:{ *:[v4f32] }:$Rm)  =>  (FMAXPv4f32:{ *:[v4f32] } V128:{ *:[v4f32] }:$Rn, V128:{ *:[v4f32] }:$Rm)
   22300             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMAXPv4f32,
   22301             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22302             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22303             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22304             :         GIR_EraseFromParent, /*InsnID*/0,
   22305             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22306             :         // GIR_Coverage, 882,
   22307             :         GIR_Done,
   22308             :       // Label 1430: @53858
   22309             :       GIM_Try, /*On fail goto*//*Label 1431*/ 53910, // Rule ID 883 //
   22310             :         GIM_CheckFeatures, GIFBS_HasNEON,
   22311             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmaxp,
   22312             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   22313             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   22314             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
   22315             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   22316             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   22317             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   22318             :         // (intrinsic_wo_chain:{ *:[v2f64] } 239:{ *:[iPTR] }, V128:{ *:[v2f64] }:$Rn, V128:{ *:[v2f64] }:$Rm)  =>  (FMAXPv2f64:{ *:[v2f64] } V128:{ *:[v2f64] }:$Rn, V128:{ *:[v2f64] }:$Rm)
   22319             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMAXPv2f64,
   22320             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22321             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22322             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22323             :         GIR_EraseFromParent, /*InsnID*/0,
   22324             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22325             :         // GIR_Coverage, 883,
   22326             :         GIR_Done,
   22327             :       // Label 1431: @53910
   22328             :       GIM_Try, /*On fail goto*//*Label 1432*/ 53962, // Rule ID 889 //
   22329             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   22330             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fminnmp,
   22331             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   22332             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   22333             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   22334             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   22335             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   22336             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   22337             :         // (intrinsic_wo_chain:{ *:[v4f16] } 243:{ *:[iPTR] }, V64:{ *:[v4f16] }:$Rn, V64:{ *:[v4f16] }:$Rm)  =>  (FMINNMPv4f16:{ *:[v4f16] } V64:{ *:[v4f16] }:$Rn, V64:{ *:[v4f16] }:$Rm)
   22338             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMINNMPv4f16,
   22339             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22340             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22341             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22342             :         GIR_EraseFromParent, /*InsnID*/0,
   22343             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22344             :         // GIR_Coverage, 889,
   22345             :         GIR_Done,
   22346             :       // Label 1432: @53962
   22347             :       GIM_Try, /*On fail goto*//*Label 1433*/ 54014, // Rule ID 890 //
   22348             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   22349             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fminnmp,
   22350             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   22351             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   22352             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   22353             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   22354             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   22355             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   22356             :         // (intrinsic_wo_chain:{ *:[v8f16] } 243:{ *:[iPTR] }, V128:{ *:[v8f16] }:$Rn, V128:{ *:[v8f16] }:$Rm)  =>  (FMINNMPv8f16:{ *:[v8f16] } V128:{ *:[v8f16] }:$Rn, V128:{ *:[v8f16] }:$Rm)
   22357             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMINNMPv8f16,
   22358             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22359             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22360             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22361             :         GIR_EraseFromParent, /*InsnID*/0,
   22362             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22363             :         // GIR_Coverage, 890,
   22364             :         GIR_Done,
   22365             :       // Label 1433: @54014
   22366             :       GIM_Try, /*On fail goto*//*Label 1434*/ 54066, // Rule ID 891 //
   22367             :         GIM_CheckFeatures, GIFBS_HasNEON,
   22368             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fminnmp,
   22369             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   22370             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   22371             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   22372             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   22373             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   22374             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   22375             :         // (intrinsic_wo_chain:{ *:[v2f32] } 243:{ *:[iPTR] }, V64:{ *:[v2f32] }:$Rn, V64:{ *:[v2f32] }:$Rm)  =>  (FMINNMPv2f32:{ *:[v2f32] } V64:{ *:[v2f32] }:$Rn, V64:{ *:[v2f32] }:$Rm)
   22376             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMINNMPv2f32,
   22377             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22378             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22379             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22380             :         GIR_EraseFromParent, /*InsnID*/0,
   22381             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22382             :         // GIR_Coverage, 891,
   22383             :         GIR_Done,
   22384             :       // Label 1434: @54066
   22385             :       GIM_Try, /*On fail goto*//*Label 1435*/ 54118, // Rule ID 892 //
   22386             :         GIM_CheckFeatures, GIFBS_HasNEON,
   22387             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fminnmp,
   22388             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   22389             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   22390             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   22391             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   22392             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   22393             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   22394             :         // (intrinsic_wo_chain:{ *:[v4f32] } 243:{ *:[iPTR] }, V128:{ *:[v4f32] }:$Rn, V128:{ *:[v4f32] }:$Rm)  =>  (FMINNMPv4f32:{ *:[v4f32] } V128:{ *:[v4f32] }:$Rn, V128:{ *:[v4f32] }:$Rm)
   22395             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMINNMPv4f32,
   22396             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22397             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22398             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22399             :         GIR_EraseFromParent, /*InsnID*/0,
   22400             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22401             :         // GIR_Coverage, 892,
   22402             :         GIR_Done,
   22403             :       // Label 1435: @54118
   22404             :       GIM_Try, /*On fail goto*//*Label 1436*/ 54170, // Rule ID 893 //
   22405             :         GIM_CheckFeatures, GIFBS_HasNEON,
   22406             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fminnmp,
   22407             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   22408             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   22409             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
   22410             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   22411             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   22412             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   22413             :         // (intrinsic_wo_chain:{ *:[v2f64] } 243:{ *:[iPTR] }, V128:{ *:[v2f64] }:$Rn, V128:{ *:[v2f64] }:$Rm)  =>  (FMINNMPv2f64:{ *:[v2f64] } V128:{ *:[v2f64] }:$Rn, V128:{ *:[v2f64] }:$Rm)
   22414             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMINNMPv2f64,
   22415             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22416             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22417             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22418             :         GIR_EraseFromParent, /*InsnID*/0,
   22419             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22420             :         // GIR_Coverage, 893,
   22421             :         GIR_Done,
   22422             :       // Label 1436: @54170
   22423             :       GIM_Try, /*On fail goto*//*Label 1437*/ 54222, // Rule ID 899 //
   22424             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   22425             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fminp,
   22426             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   22427             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   22428             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   22429             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   22430             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   22431             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   22432             :         // (intrinsic_wo_chain:{ *:[v4f16] } 245:{ *:[iPTR] }, V64:{ *:[v4f16] }:$Rn, V64:{ *:[v4f16] }:$Rm)  =>  (FMINPv4f16:{ *:[v4f16] } V64:{ *:[v4f16] }:$Rn, V64:{ *:[v4f16] }:$Rm)
   22433             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMINPv4f16,
   22434             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22435             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22436             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22437             :         GIR_EraseFromParent, /*InsnID*/0,
   22438             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22439             :         // GIR_Coverage, 899,
   22440             :         GIR_Done,
   22441             :       // Label 1437: @54222
   22442             :       GIM_Try, /*On fail goto*//*Label 1438*/ 54274, // Rule ID 900 //
   22443             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   22444             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fminp,
   22445             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   22446             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   22447             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   22448             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   22449             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   22450             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   22451             :         // (intrinsic_wo_chain:{ *:[v8f16] } 245:{ *:[iPTR] }, V128:{ *:[v8f16] }:$Rn, V128:{ *:[v8f16] }:$Rm)  =>  (FMINPv8f16:{ *:[v8f16] } V128:{ *:[v8f16] }:$Rn, V128:{ *:[v8f16] }:$Rm)
   22452             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMINPv8f16,
   22453             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22454             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22455             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22456             :         GIR_EraseFromParent, /*InsnID*/0,
   22457             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22458             :         // GIR_Coverage, 900,
   22459             :         GIR_Done,
   22460             :       // Label 1438: @54274
   22461             :       GIM_Try, /*On fail goto*//*Label 1439*/ 54326, // Rule ID 901 //
   22462             :         GIM_CheckFeatures, GIFBS_HasNEON,
   22463             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fminp,
   22464             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   22465             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   22466             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   22467             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   22468             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   22469             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   22470             :         // (intrinsic_wo_chain:{ *:[v2f32] } 245:{ *:[iPTR] }, V64:{ *:[v2f32] }:$Rn, V64:{ *:[v2f32] }:$Rm)  =>  (FMINPv2f32:{ *:[v2f32] } V64:{ *:[v2f32] }:$Rn, V64:{ *:[v2f32] }:$Rm)
   22471             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMINPv2f32,
   22472             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22473             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22474             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22475             :         GIR_EraseFromParent, /*InsnID*/0,
   22476             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22477             :         // GIR_Coverage, 901,
   22478             :         GIR_Done,
   22479             :       // Label 1439: @54326
   22480             :       GIM_Try, /*On fail goto*//*Label 1440*/ 54378, // Rule ID 902 //
   22481             :         GIM_CheckFeatures, GIFBS_HasNEON,
   22482             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fminp,
   22483             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   22484             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   22485             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   22486             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   22487             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   22488             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   22489             :         // (intrinsic_wo_chain:{ *:[v4f32] } 245:{ *:[iPTR] }, V128:{ *:[v4f32] }:$Rn, V128:{ *:[v4f32] }:$Rm)  =>  (FMINPv4f32:{ *:[v4f32] } V128:{ *:[v4f32] }:$Rn, V128:{ *:[v4f32] }:$Rm)
   22490             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMINPv4f32,
   22491             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22492             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22493             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22494             :         GIR_EraseFromParent, /*InsnID*/0,
   22495             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22496             :         // GIR_Coverage, 902,
   22497             :         GIR_Done,
   22498             :       // Label 1440: @54378
   22499             :       GIM_Try, /*On fail goto*//*Label 1441*/ 54430, // Rule ID 903 //
   22500             :         GIM_CheckFeatures, GIFBS_HasNEON,
   22501             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fminp,
   22502             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   22503             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   22504             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
   22505             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   22506             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   22507             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   22508             :         // (intrinsic_wo_chain:{ *:[v2f64] } 245:{ *:[iPTR] }, V128:{ *:[v2f64] }:$Rn, V128:{ *:[v2f64] }:$Rm)  =>  (FMINPv2f64:{ *:[v2f64] } V128:{ *:[v2f64] }:$Rn, V128:{ *:[v2f64] }:$Rm)
   22509             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMINPv2f64,
   22510             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22511             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22512             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22513             :         GIR_EraseFromParent, /*InsnID*/0,
   22514             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22515             :         // GIR_Coverage, 903,
   22516             :         GIR_Done,
   22517             :       // Label 1441: @54430
   22518             :       GIM_Try, /*On fail goto*//*Label 1442*/ 54482, // Rule ID 919 //
   22519             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   22520             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmulx,
   22521             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   22522             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   22523             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   22524             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   22525             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   22526             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   22527             :         // (intrinsic_wo_chain:{ *:[v4f16] } 247:{ *:[iPTR] }, V64:{ *:[v4f16] }:$Rn, V64:{ *:[v4f16] }:$Rm)  =>  (FMULXv4f16:{ *:[v4f16] } V64:{ *:[v4f16] }:$Rn, V64:{ *:[v4f16] }:$Rm)
   22528             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMULXv4f16,
   22529             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22530             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22531             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22532             :         GIR_EraseFromParent, /*InsnID*/0,
   22533             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22534             :         // GIR_Coverage, 919,
   22535             :         GIR_Done,
   22536             :       // Label 1442: @54482
   22537             :       GIM_Try, /*On fail goto*//*Label 1443*/ 54534, // Rule ID 920 //
   22538             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   22539             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmulx,
   22540             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   22541             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   22542             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   22543             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   22544             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   22545             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   22546             :         // (intrinsic_wo_chain:{ *:[v8f16] } 247:{ *:[iPTR] }, V128:{ *:[v8f16] }:$Rn, V128:{ *:[v8f16] }:$Rm)  =>  (FMULXv8f16:{ *:[v8f16] } V128:{ *:[v8f16] }:$Rn, V128:{ *:[v8f16] }:$Rm)
   22547             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMULXv8f16,
   22548             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22549             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22550             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22551             :         GIR_EraseFromParent, /*InsnID*/0,
   22552             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22553             :         // GIR_Coverage, 920,
   22554             :         GIR_Done,
   22555             :       // Label 1443: @54534
   22556             :       GIM_Try, /*On fail goto*//*Label 1444*/ 54586, // Rule ID 921 //
   22557             :         GIM_CheckFeatures, GIFBS_HasNEON,
   22558             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmulx,
   22559             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   22560             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   22561             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   22562             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   22563             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   22564             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   22565             :         // (intrinsic_wo_chain:{ *:[v2f32] } 247:{ *:[iPTR] }, V64:{ *:[v2f32] }:$Rn, V64:{ *:[v2f32] }:$Rm)  =>  (FMULXv2f32:{ *:[v2f32] } V64:{ *:[v2f32] }:$Rn, V64:{ *:[v2f32] }:$Rm)
   22566             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMULXv2f32,
   22567             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22568             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22569             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22570             :         GIR_EraseFromParent, /*InsnID*/0,
   22571             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22572             :         // GIR_Coverage, 921,
   22573             :         GIR_Done,
   22574             :       // Label 1444: @54586
   22575             :       GIM_Try, /*On fail goto*//*Label 1445*/ 54638, // Rule ID 922 //
   22576             :         GIM_CheckFeatures, GIFBS_HasNEON,
   22577             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmulx,
   22578             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   22579             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   22580             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   22581             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   22582             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   22583             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   22584             :         // (intrinsic_wo_chain:{ *:[v4f32] } 247:{ *:[iPTR] }, V128:{ *:[v4f32] }:$Rn, V128:{ *:[v4f32] }:$Rm)  =>  (FMULXv4f32:{ *:[v4f32] } V128:{ *:[v4f32] }:$Rn, V128:{ *:[v4f32] }:$Rm)
   22585             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMULXv4f32,
   22586             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22587             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22588             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22589             :         GIR_EraseFromParent, /*InsnID*/0,
   22590             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22591             :         // GIR_Coverage, 922,
   22592             :         GIR_Done,
   22593             :       // Label 1445: @54638
   22594             :       GIM_Try, /*On fail goto*//*Label 1446*/ 54690, // Rule ID 923 //
   22595             :         GIM_CheckFeatures, GIFBS_HasNEON,
   22596             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmulx,
   22597             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   22598             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   22599             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
   22600             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   22601             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   22602             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   22603             :         // (intrinsic_wo_chain:{ *:[v2f64] } 247:{ *:[iPTR] }, V128:{ *:[v2f64] }:$Rn, V128:{ *:[v2f64] }:$Rm)  =>  (FMULXv2f64:{ *:[v2f64] } V128:{ *:[v2f64] }:$Rn, V128:{ *:[v2f64] }:$Rm)
   22604             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMULXv2f64,
   22605             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22606             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22607             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22608             :         GIR_EraseFromParent, /*InsnID*/0,
   22609             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22610             :         // GIR_Coverage, 923,
   22611             :         GIR_Done,
   22612             :       // Label 1446: @54690
   22613             :       GIM_Try, /*On fail goto*//*Label 1447*/ 54742, // Rule ID 929 //
   22614             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   22615             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frecps,
   22616             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   22617             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   22618             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   22619             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   22620             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   22621             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   22622             :         // (intrinsic_wo_chain:{ *:[v4f16] } 249:{ *:[iPTR] }, V64:{ *:[v4f16] }:$Rn, V64:{ *:[v4f16] }:$Rm)  =>  (FRECPSv4f16:{ *:[v4f16] } V64:{ *:[v4f16] }:$Rn, V64:{ *:[v4f16] }:$Rm)
   22623             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRECPSv4f16,
   22624             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22625             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22626             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22627             :         GIR_EraseFromParent, /*InsnID*/0,
   22628             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22629             :         // GIR_Coverage, 929,
   22630             :         GIR_Done,
   22631             :       // Label 1447: @54742
   22632             :       GIM_Try, /*On fail goto*//*Label 1448*/ 54794, // Rule ID 930 //
   22633             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   22634             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frecps,
   22635             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   22636             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   22637             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   22638             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   22639             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   22640             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   22641             :         // (intrinsic_wo_chain:{ *:[v8f16] } 249:{ *:[iPTR] }, V128:{ *:[v8f16] }:$Rn, V128:{ *:[v8f16] }:$Rm)  =>  (FRECPSv8f16:{ *:[v8f16] } V128:{ *:[v8f16] }:$Rn, V128:{ *:[v8f16] }:$Rm)
   22642             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRECPSv8f16,
   22643             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22644             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22645             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22646             :         GIR_EraseFromParent, /*InsnID*/0,
   22647             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22648             :         // GIR_Coverage, 930,
   22649             :         GIR_Done,
   22650             :       // Label 1448: @54794
   22651             :       GIM_Try, /*On fail goto*//*Label 1449*/ 54846, // Rule ID 931 //
   22652             :         GIM_CheckFeatures, GIFBS_HasNEON,
   22653             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frecps,
   22654             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   22655             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   22656             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   22657             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   22658             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   22659             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   22660             :         // (intrinsic_wo_chain:{ *:[v2f32] } 249:{ *:[iPTR] }, V64:{ *:[v2f32] }:$Rn, V64:{ *:[v2f32] }:$Rm)  =>  (FRECPSv2f32:{ *:[v2f32] } V64:{ *:[v2f32] }:$Rn, V64:{ *:[v2f32] }:$Rm)
   22661             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRECPSv2f32,
   22662             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22663             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22664             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22665             :         GIR_EraseFromParent, /*InsnID*/0,
   22666             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22667             :         // GIR_Coverage, 931,
   22668             :         GIR_Done,
   22669             :       // Label 1449: @54846
   22670             :       GIM_Try, /*On fail goto*//*Label 1450*/ 54898, // Rule ID 932 //
   22671             :         GIM_CheckFeatures, GIFBS_HasNEON,
   22672             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frecps,
   22673             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   22674             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   22675             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   22676             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   22677             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   22678             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   22679             :         // (intrinsic_wo_chain:{ *:[v4f32] } 249:{ *:[iPTR] }, V128:{ *:[v4f32] }:$Rn, V128:{ *:[v4f32] }:$Rm)  =>  (FRECPSv4f32:{ *:[v4f32] } V128:{ *:[v4f32] }:$Rn, V128:{ *:[v4f32] }:$Rm)
   22680             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRECPSv4f32,
   22681             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22682             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22683             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22684             :         GIR_EraseFromParent, /*InsnID*/0,
   22685             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22686             :         // GIR_Coverage, 932,
   22687             :         GIR_Done,
   22688             :       // Label 1450: @54898
   22689             :       GIM_Try, /*On fail goto*//*Label 1451*/ 54950, // Rule ID 933 //
   22690             :         GIM_CheckFeatures, GIFBS_HasNEON,
   22691             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frecps,
   22692             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   22693             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   22694             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
   22695             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   22696             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   22697             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   22698             :         // (intrinsic_wo_chain:{ *:[v2f64] } 249:{ *:[iPTR] }, V128:{ *:[v2f64] }:$Rn, V128:{ *:[v2f64] }:$Rm)  =>  (FRECPSv2f64:{ *:[v2f64] } V128:{ *:[v2f64] }:$Rn, V128:{ *:[v2f64] }:$Rm)
   22699             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRECPSv2f64,
   22700             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22701             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22702             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22703             :         GIR_EraseFromParent, /*InsnID*/0,
   22704             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22705             :         // GIR_Coverage, 933,
   22706             :         GIR_Done,
   22707             :       // Label 1451: @54950
   22708             :       GIM_Try, /*On fail goto*//*Label 1452*/ 55002, // Rule ID 934 //
   22709             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   22710             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frsqrts,
   22711             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   22712             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   22713             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   22714             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   22715             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   22716             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   22717             :         // (intrinsic_wo_chain:{ *:[v4f16] } 253:{ *:[iPTR] }, V64:{ *:[v4f16] }:$Rn, V64:{ *:[v4f16] }:$Rm)  =>  (FRSQRTSv4f16:{ *:[v4f16] } V64:{ *:[v4f16] }:$Rn, V64:{ *:[v4f16] }:$Rm)
   22718             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRSQRTSv4f16,
   22719             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22720             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22721             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22722             :         GIR_EraseFromParent, /*InsnID*/0,
   22723             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22724             :         // GIR_Coverage, 934,
   22725             :         GIR_Done,
   22726             :       // Label 1452: @55002
   22727             :       GIM_Try, /*On fail goto*//*Label 1453*/ 55054, // Rule ID 935 //
   22728             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   22729             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frsqrts,
   22730             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   22731             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   22732             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   22733             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   22734             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   22735             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   22736             :         // (intrinsic_wo_chain:{ *:[v8f16] } 253:{ *:[iPTR] }, V128:{ *:[v8f16] }:$Rn, V128:{ *:[v8f16] }:$Rm)  =>  (FRSQRTSv8f16:{ *:[v8f16] } V128:{ *:[v8f16] }:$Rn, V128:{ *:[v8f16] }:$Rm)
   22737             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRSQRTSv8f16,
   22738             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22739             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22740             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22741             :         GIR_EraseFromParent, /*InsnID*/0,
   22742             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22743             :         // GIR_Coverage, 935,
   22744             :         GIR_Done,
   22745             :       // Label 1453: @55054
   22746             :       GIM_Try, /*On fail goto*//*Label 1454*/ 55106, // Rule ID 936 //
   22747             :         GIM_CheckFeatures, GIFBS_HasNEON,
   22748             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frsqrts,
   22749             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   22750             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   22751             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   22752             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   22753             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   22754             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   22755             :         // (intrinsic_wo_chain:{ *:[v2f32] } 253:{ *:[iPTR] }, V64:{ *:[v2f32] }:$Rn, V64:{ *:[v2f32] }:$Rm)  =>  (FRSQRTSv2f32:{ *:[v2f32] } V64:{ *:[v2f32] }:$Rn, V64:{ *:[v2f32] }:$Rm)
   22756             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRSQRTSv2f32,
   22757             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22758             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22759             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22760             :         GIR_EraseFromParent, /*InsnID*/0,
   22761             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22762             :         // GIR_Coverage, 936,
   22763             :         GIR_Done,
   22764             :       // Label 1454: @55106
   22765             :       GIM_Try, /*On fail goto*//*Label 1455*/ 55158, // Rule ID 937 //
   22766             :         GIM_CheckFeatures, GIFBS_HasNEON,
   22767             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frsqrts,
   22768             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   22769             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   22770             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   22771             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   22772             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   22773             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   22774             :         // (intrinsic_wo_chain:{ *:[v4f32] } 253:{ *:[iPTR] }, V128:{ *:[v4f32] }:$Rn, V128:{ *:[v4f32] }:$Rm)  =>  (FRSQRTSv4f32:{ *:[v4f32] } V128:{ *:[v4f32] }:$Rn, V128:{ *:[v4f32] }:$Rm)
   22775             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRSQRTSv4f32,
   22776             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22777             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22778             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22779             :         GIR_EraseFromParent, /*InsnID*/0,
   22780             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22781             :         // GIR_Coverage, 937,
   22782             :         GIR_Done,
   22783             :       // Label 1455: @55158
   22784             :       GIM_Try, /*On fail goto*//*Label 1456*/ 55210, // Rule ID 938 //
   22785             :         GIM_CheckFeatures, GIFBS_HasNEON,
   22786             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frsqrts,
   22787             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   22788             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   22789             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
   22790             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   22791             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   22792             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   22793             :         // (intrinsic_wo_chain:{ *:[v2f64] } 253:{ *:[iPTR] }, V128:{ *:[v2f64] }:$Rn, V128:{ *:[v2f64] }:$Rm)  =>  (FRSQRTSv2f64:{ *:[v2f64] } V128:{ *:[v2f64] }:$Rn, V128:{ *:[v2f64] }:$Rm)
   22794             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRSQRTSv2f64,
   22795             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22796             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22797             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22798             :         GIR_EraseFromParent, /*InsnID*/0,
   22799             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22800             :         // GIR_Coverage, 938,
   22801             :         GIR_Done,
   22802             :       // Label 1456: @55210
   22803             :       GIM_Try, /*On fail goto*//*Label 1457*/ 55262, // Rule ID 962 //
   22804             :         GIM_CheckFeatures, GIFBS_HasNEON,
   22805             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_pmul,
   22806             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   22807             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
   22808             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
   22809             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   22810             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   22811             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   22812             :         // (intrinsic_wo_chain:{ *:[v8i8] } 266:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (PMULv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
   22813             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::PMULv8i8,
   22814             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22815             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22816             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22817             :         GIR_EraseFromParent, /*InsnID*/0,
   22818             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22819             :         // GIR_Coverage, 962,
   22820             :         GIR_Done,
   22821             :       // Label 1457: @55262
   22822             :       GIM_Try, /*On fail goto*//*Label 1458*/ 55314, // Rule ID 963 //
   22823             :         GIM_CheckFeatures, GIFBS_HasNEON,
   22824             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_pmul,
   22825             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   22826             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   22827             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
   22828             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   22829             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   22830             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   22831             :         // (intrinsic_wo_chain:{ *:[v16i8] } 266:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (PMULv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
   22832             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::PMULv16i8,
   22833             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22834             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22835             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22836             :         GIR_EraseFromParent, /*InsnID*/0,
   22837             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22838             :         // GIR_Coverage, 963,
   22839             :         GIR_Done,
   22840             :       // Label 1458: @55314
   22841             :       GIM_Try, /*On fail goto*//*Label 1459*/ 55366, // Rule ID 970 //
   22842             :         GIM_CheckFeatures, GIFBS_HasNEON,
   22843             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sabd,
   22844             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   22845             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
   22846             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
   22847             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   22848             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   22849             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   22850             :         // (intrinsic_wo_chain:{ *:[v8i8] } 273:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (SABDv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
   22851             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABDv8i8,
   22852             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22853             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22854             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22855             :         GIR_EraseFromParent, /*InsnID*/0,
   22856             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22857             :         // GIR_Coverage, 970,
   22858             :         GIR_Done,
   22859             :       // Label 1459: @55366
   22860             :       GIM_Try, /*On fail goto*//*Label 1460*/ 55418, // Rule ID 971 //
   22861             :         GIM_CheckFeatures, GIFBS_HasNEON,
   22862             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sabd,
   22863             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   22864             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   22865             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
   22866             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   22867             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   22868             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   22869             :         // (intrinsic_wo_chain:{ *:[v16i8] } 273:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (SABDv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
   22870             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABDv16i8,
   22871             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22872             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22873             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22874             :         GIR_EraseFromParent, /*InsnID*/0,
   22875             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22876             :         // GIR_Coverage, 971,
   22877             :         GIR_Done,
   22878             :       // Label 1460: @55418
   22879             :       GIM_Try, /*On fail goto*//*Label 1461*/ 55470, // Rule ID 972 //
   22880             :         GIM_CheckFeatures, GIFBS_HasNEON,
   22881             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sabd,
   22882             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   22883             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   22884             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   22885             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   22886             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   22887             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   22888             :         // (intrinsic_wo_chain:{ *:[v4i16] } 273:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)  =>  (SABDv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
   22889             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABDv4i16,
   22890             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22891             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22892             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22893             :         GIR_EraseFromParent, /*InsnID*/0,
   22894             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22895             :         // GIR_Coverage, 972,
   22896             :         GIR_Done,
   22897             :       // Label 1461: @55470
   22898             :       GIM_Try, /*On fail goto*//*Label 1462*/ 55522, // Rule ID 973 //
   22899             :         GIM_CheckFeatures, GIFBS_HasNEON,
   22900             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sabd,
   22901             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   22902             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   22903             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   22904             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   22905             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   22906             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   22907             :         // (intrinsic_wo_chain:{ *:[v8i16] } 273:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)  =>  (SABDv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
   22908             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABDv8i16,
   22909             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22910             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22911             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22912             :         GIR_EraseFromParent, /*InsnID*/0,
   22913             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22914             :         // GIR_Coverage, 973,
   22915             :         GIR_Done,
   22916             :       // Label 1462: @55522
   22917             :       GIM_Try, /*On fail goto*//*Label 1463*/ 55574, // Rule ID 974 //
   22918             :         GIM_CheckFeatures, GIFBS_HasNEON,
   22919             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sabd,
   22920             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   22921             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   22922             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   22923             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   22924             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   22925             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   22926             :         // (intrinsic_wo_chain:{ *:[v2i32] } 273:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)  =>  (SABDv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
   22927             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABDv2i32,
   22928             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22929             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22930             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22931             :         GIR_EraseFromParent, /*InsnID*/0,
   22932             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22933             :         // GIR_Coverage, 974,
   22934             :         GIR_Done,
   22935             :       // Label 1463: @55574
   22936             :       GIM_Try, /*On fail goto*//*Label 1464*/ 55626, // Rule ID 975 //
   22937             :         GIM_CheckFeatures, GIFBS_HasNEON,
   22938             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sabd,
   22939             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   22940             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   22941             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   22942             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   22943             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   22944             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   22945             :         // (intrinsic_wo_chain:{ *:[v4i32] } 273:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (SABDv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
   22946             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABDv4i32,
   22947             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22948             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22949             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22950             :         GIR_EraseFromParent, /*InsnID*/0,
   22951             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22952             :         // GIR_Coverage, 975,
   22953             :         GIR_Done,
   22954             :       // Label 1464: @55626
   22955             :       GIM_Try, /*On fail goto*//*Label 1465*/ 55678, // Rule ID 976 //
   22956             :         GIM_CheckFeatures, GIFBS_HasNEON,
   22957             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_shadd,
   22958             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   22959             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
   22960             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
   22961             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   22962             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   22963             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   22964             :         // (intrinsic_wo_chain:{ *:[v8i8] } 281:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (SHADDv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
   22965             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SHADDv8i8,
   22966             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22967             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22968             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22969             :         GIR_EraseFromParent, /*InsnID*/0,
   22970             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22971             :         // GIR_Coverage, 976,
   22972             :         GIR_Done,
   22973             :       // Label 1465: @55678
   22974             :       GIM_Try, /*On fail goto*//*Label 1466*/ 55730, // Rule ID 977 //
   22975             :         GIM_CheckFeatures, GIFBS_HasNEON,
   22976             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_shadd,
   22977             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   22978             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   22979             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
   22980             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   22981             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   22982             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   22983             :         // (intrinsic_wo_chain:{ *:[v16i8] } 281:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (SHADDv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
   22984             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SHADDv16i8,
   22985             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   22986             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   22987             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   22988             :         GIR_EraseFromParent, /*InsnID*/0,
   22989             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   22990             :         // GIR_Coverage, 977,
   22991             :         GIR_Done,
   22992             :       // Label 1466: @55730
   22993             :       GIM_Try, /*On fail goto*//*Label 1467*/ 55782, // Rule ID 978 //
   22994             :         GIM_CheckFeatures, GIFBS_HasNEON,
   22995             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_shadd,
   22996             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   22997             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   22998             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   22999             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   23000             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   23001             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   23002             :         // (intrinsic_wo_chain:{ *:[v4i16] } 281:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)  =>  (SHADDv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
   23003             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SHADDv4i16,
   23004             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23005             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23006             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23007             :         GIR_EraseFromParent, /*InsnID*/0,
   23008             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23009             :         // GIR_Coverage, 978,
   23010             :         GIR_Done,
   23011             :       // Label 1467: @55782
   23012             :       GIM_Try, /*On fail goto*//*Label 1468*/ 55834, // Rule ID 979 //
   23013             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23014             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_shadd,
   23015             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   23016             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   23017             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   23018             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   23019             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   23020             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   23021             :         // (intrinsic_wo_chain:{ *:[v8i16] } 281:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)  =>  (SHADDv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
   23022             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SHADDv8i16,
   23023             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23024             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23025             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23026             :         GIR_EraseFromParent, /*InsnID*/0,
   23027             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23028             :         // GIR_Coverage, 979,
   23029             :         GIR_Done,
   23030             :       // Label 1468: @55834
   23031             :       GIM_Try, /*On fail goto*//*Label 1469*/ 55886, // Rule ID 980 //
   23032             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23033             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_shadd,
   23034             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   23035             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   23036             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   23037             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   23038             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   23039             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   23040             :         // (intrinsic_wo_chain:{ *:[v2i32] } 281:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)  =>  (SHADDv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
   23041             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SHADDv2i32,
   23042             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23043             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23044             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23045             :         GIR_EraseFromParent, /*InsnID*/0,
   23046             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23047             :         // GIR_Coverage, 980,
   23048             :         GIR_Done,
   23049             :       // Label 1469: @55886
   23050             :       GIM_Try, /*On fail goto*//*Label 1470*/ 55938, // Rule ID 981 //
   23051             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23052             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_shadd,
   23053             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   23054             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   23055             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   23056             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   23057             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   23058             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   23059             :         // (intrinsic_wo_chain:{ *:[v4i32] } 281:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (SHADDv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
   23060             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SHADDv4i32,
   23061             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23062             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23063             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23064             :         GIR_EraseFromParent, /*InsnID*/0,
   23065             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23066             :         // GIR_Coverage, 981,
   23067             :         GIR_Done,
   23068             :       // Label 1470: @55938
   23069             :       GIM_Try, /*On fail goto*//*Label 1471*/ 55990, // Rule ID 982 //
   23070             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23071             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_shsub,
   23072             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   23073             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
   23074             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
   23075             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   23076             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   23077             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   23078             :         // (intrinsic_wo_chain:{ *:[v8i8] } 283:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (SHSUBv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
   23079             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SHSUBv8i8,
   23080             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23081             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23082             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23083             :         GIR_EraseFromParent, /*InsnID*/0,
   23084             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23085             :         // GIR_Coverage, 982,
   23086             :         GIR_Done,
   23087             :       // Label 1471: @55990
   23088             :       GIM_Try, /*On fail goto*//*Label 1472*/ 56042, // Rule ID 983 //
   23089             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23090             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_shsub,
   23091             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   23092             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   23093             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
   23094             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   23095             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   23096             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   23097             :         // (intrinsic_wo_chain:{ *:[v16i8] } 283:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (SHSUBv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
   23098             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SHSUBv16i8,
   23099             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23100             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23101             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23102             :         GIR_EraseFromParent, /*InsnID*/0,
   23103             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23104             :         // GIR_Coverage, 983,
   23105             :         GIR_Done,
   23106             :       // Label 1472: @56042
   23107             :       GIM_Try, /*On fail goto*//*Label 1473*/ 56094, // Rule ID 984 //
   23108             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23109             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_shsub,
   23110             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   23111             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   23112             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   23113             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   23114             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   23115             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   23116             :         // (intrinsic_wo_chain:{ *:[v4i16] } 283:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)  =>  (SHSUBv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
   23117             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SHSUBv4i16,
   23118             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23119             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23120             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23121             :         GIR_EraseFromParent, /*InsnID*/0,
   23122             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23123             :         // GIR_Coverage, 984,
   23124             :         GIR_Done,
   23125             :       // Label 1473: @56094
   23126             :       GIM_Try, /*On fail goto*//*Label 1474*/ 56146, // Rule ID 985 //
   23127             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23128             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_shsub,
   23129             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   23130             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   23131             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   23132             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   23133             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   23134             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   23135             :         // (intrinsic_wo_chain:{ *:[v8i16] } 283:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)  =>  (SHSUBv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
   23136             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SHSUBv8i16,
   23137             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23138             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23139             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23140             :         GIR_EraseFromParent, /*InsnID*/0,
   23141             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23142             :         // GIR_Coverage, 985,
   23143             :         GIR_Done,
   23144             :       // Label 1474: @56146
   23145             :       GIM_Try, /*On fail goto*//*Label 1475*/ 56198, // Rule ID 986 //
   23146             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23147             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_shsub,
   23148             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   23149             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   23150             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   23151             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   23152             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   23153             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   23154             :         // (intrinsic_wo_chain:{ *:[v2i32] } 283:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)  =>  (SHSUBv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
   23155             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SHSUBv2i32,
   23156             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23157             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23158             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23159             :         GIR_EraseFromParent, /*InsnID*/0,
   23160             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23161             :         // GIR_Coverage, 986,
   23162             :         GIR_Done,
   23163             :       // Label 1475: @56198
   23164             :       GIM_Try, /*On fail goto*//*Label 1476*/ 56250, // Rule ID 987 //
   23165             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23166             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_shsub,
   23167             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   23168             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   23169             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   23170             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   23171             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   23172             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   23173             :         // (intrinsic_wo_chain:{ *:[v4i32] } 283:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (SHSUBv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
   23174             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SHSUBv4i32,
   23175             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23176             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23177             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23178             :         GIR_EraseFromParent, /*InsnID*/0,
   23179             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23180             :         // GIR_Coverage, 987,
   23181             :         GIR_Done,
   23182             :       // Label 1476: @56250
   23183             :       GIM_Try, /*On fail goto*//*Label 1477*/ 56302, // Rule ID 988 //
   23184             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23185             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_smaxp,
   23186             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   23187             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
   23188             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
   23189             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   23190             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   23191             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   23192             :         // (intrinsic_wo_chain:{ *:[v8i8] } 285:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (SMAXPv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
   23193             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMAXPv8i8,
   23194             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23195             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23196             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23197             :         GIR_EraseFromParent, /*InsnID*/0,
   23198             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23199             :         // GIR_Coverage, 988,
   23200             :         GIR_Done,
   23201             :       // Label 1477: @56302
   23202             :       GIM_Try, /*On fail goto*//*Label 1478*/ 56354, // Rule ID 989 //
   23203             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23204             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_smaxp,
   23205             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   23206             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   23207             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
   23208             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   23209             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   23210             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   23211             :         // (intrinsic_wo_chain:{ *:[v16i8] } 285:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (SMAXPv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
   23212             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMAXPv16i8,
   23213             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23214             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23215             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23216             :         GIR_EraseFromParent, /*InsnID*/0,
   23217             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23218             :         // GIR_Coverage, 989,
   23219             :         GIR_Done,
   23220             :       // Label 1478: @56354
   23221             :       GIM_Try, /*On fail goto*//*Label 1479*/ 56406, // Rule ID 990 //
   23222             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23223             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_smaxp,
   23224             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   23225             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   23226             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   23227             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   23228             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   23229             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   23230             :         // (intrinsic_wo_chain:{ *:[v4i16] } 285:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)  =>  (SMAXPv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
   23231             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMAXPv4i16,
   23232             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23233             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23234             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23235             :         GIR_EraseFromParent, /*InsnID*/0,
   23236             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23237             :         // GIR_Coverage, 990,
   23238             :         GIR_Done,
   23239             :       // Label 1479: @56406
   23240             :       GIM_Try, /*On fail goto*//*Label 1480*/ 56458, // Rule ID 991 //
   23241             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23242             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_smaxp,
   23243             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   23244             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   23245             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   23246             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   23247             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   23248             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   23249             :         // (intrinsic_wo_chain:{ *:[v8i16] } 285:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)  =>  (SMAXPv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
   23250             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMAXPv8i16,
   23251             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23252             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23253             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23254             :         GIR_EraseFromParent, /*InsnID*/0,
   23255             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23256             :         // GIR_Coverage, 991,
   23257             :         GIR_Done,
   23258             :       // Label 1480: @56458
   23259             :       GIM_Try, /*On fail goto*//*Label 1481*/ 56510, // Rule ID 992 //
   23260             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23261             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_smaxp,
   23262             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   23263             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   23264             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   23265             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   23266             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   23267             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   23268             :         // (intrinsic_wo_chain:{ *:[v2i32] } 285:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)  =>  (SMAXPv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
   23269             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMAXPv2i32,
   23270             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23271             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23272             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23273             :         GIR_EraseFromParent, /*InsnID*/0,
   23274             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23275             :         // GIR_Coverage, 992,
   23276             :         GIR_Done,
   23277             :       // Label 1481: @56510
   23278             :       GIM_Try, /*On fail goto*//*Label 1482*/ 56562, // Rule ID 993 //
   23279             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23280             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_smaxp,
   23281             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   23282             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   23283             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   23284             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   23285             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   23286             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   23287             :         // (intrinsic_wo_chain:{ *:[v4i32] } 285:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (SMAXPv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
   23288             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMAXPv4i32,
   23289             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23290             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23291             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23292             :         GIR_EraseFromParent, /*InsnID*/0,
   23293             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23294             :         // GIR_Coverage, 993,
   23295             :         GIR_Done,
   23296             :       // Label 1482: @56562
   23297             :       GIM_Try, /*On fail goto*//*Label 1483*/ 56614, // Rule ID 1000 //
   23298             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23299             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sminp,
   23300             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   23301             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
   23302             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
   23303             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   23304             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   23305             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   23306             :         // (intrinsic_wo_chain:{ *:[v8i8] } 288:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (SMINPv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
   23307             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMINPv8i8,
   23308             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23309             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23310             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23311             :         GIR_EraseFromParent, /*InsnID*/0,
   23312             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23313             :         // GIR_Coverage, 1000,
   23314             :         GIR_Done,
   23315             :       // Label 1483: @56614
   23316             :       GIM_Try, /*On fail goto*//*Label 1484*/ 56666, // Rule ID 1001 //
   23317             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23318             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sminp,
   23319             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   23320             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   23321             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
   23322             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   23323             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   23324             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   23325             :         // (intrinsic_wo_chain:{ *:[v16i8] } 288:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (SMINPv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
   23326             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMINPv16i8,
   23327             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23328             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23329             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23330             :         GIR_EraseFromParent, /*InsnID*/0,
   23331             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23332             :         // GIR_Coverage, 1001,
   23333             :         GIR_Done,
   23334             :       // Label 1484: @56666
   23335             :       GIM_Try, /*On fail goto*//*Label 1485*/ 56718, // Rule ID 1002 //
   23336             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23337             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sminp,
   23338             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   23339             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   23340             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   23341             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   23342             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   23343             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   23344             :         // (intrinsic_wo_chain:{ *:[v4i16] } 288:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)  =>  (SMINPv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
   23345             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMINPv4i16,
   23346             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23347             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23348             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23349             :         GIR_EraseFromParent, /*InsnID*/0,
   23350             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23351             :         // GIR_Coverage, 1002,
   23352             :         GIR_Done,
   23353             :       // Label 1485: @56718
   23354             :       GIM_Try, /*On fail goto*//*Label 1486*/ 56770, // Rule ID 1003 //
   23355             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23356             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sminp,
   23357             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   23358             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   23359             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   23360             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   23361             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   23362             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   23363             :         // (intrinsic_wo_chain:{ *:[v8i16] } 288:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)  =>  (SMINPv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
   23364             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMINPv8i16,
   23365             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23366             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23367             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23368             :         GIR_EraseFromParent, /*InsnID*/0,
   23369             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23370             :         // GIR_Coverage, 1003,
   23371             :         GIR_Done,
   23372             :       // Label 1486: @56770
   23373             :       GIM_Try, /*On fail goto*//*Label 1487*/ 56822, // Rule ID 1004 //
   23374             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23375             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sminp,
   23376             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   23377             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   23378             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   23379             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   23380             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   23381             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   23382             :         // (intrinsic_wo_chain:{ *:[v2i32] } 288:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)  =>  (SMINPv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
   23383             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMINPv2i32,
   23384             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23385             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23386             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23387             :         GIR_EraseFromParent, /*InsnID*/0,
   23388             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23389             :         // GIR_Coverage, 1004,
   23390             :         GIR_Done,
   23391             :       // Label 1487: @56822
   23392             :       GIM_Try, /*On fail goto*//*Label 1488*/ 56874, // Rule ID 1005 //
   23393             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23394             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sminp,
   23395             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   23396             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   23397             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   23398             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   23399             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   23400             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   23401             :         // (intrinsic_wo_chain:{ *:[v4i32] } 288:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (SMINPv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
   23402             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMINPv4i32,
   23403             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23404             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23405             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23406             :         GIR_EraseFromParent, /*InsnID*/0,
   23407             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23408             :         // GIR_Coverage, 1005,
   23409             :         GIR_Done,
   23410             :       // Label 1488: @56874
   23411             :       GIM_Try, /*On fail goto*//*Label 1489*/ 56926, // Rule ID 1012 //
   23412             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23413             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqadd,
   23414             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   23415             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
   23416             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
   23417             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   23418             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   23419             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   23420             :         // (intrinsic_wo_chain:{ *:[v8i8] } 292:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (SQADDv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
   23421             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQADDv8i8,
   23422             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23423             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23424             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23425             :         GIR_EraseFromParent, /*InsnID*/0,
   23426             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23427             :         // GIR_Coverage, 1012,
   23428             :         GIR_Done,
   23429             :       // Label 1489: @56926
   23430             :       GIM_Try, /*On fail goto*//*Label 1490*/ 56978, // Rule ID 1013 //
   23431             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23432             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqadd,
   23433             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   23434             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   23435             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
   23436             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   23437             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   23438             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   23439             :         // (intrinsic_wo_chain:{ *:[v16i8] } 292:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (SQADDv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
   23440             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQADDv16i8,
   23441             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23442             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23443             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23444             :         GIR_EraseFromParent, /*InsnID*/0,
   23445             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23446             :         // GIR_Coverage, 1013,
   23447             :         GIR_Done,
   23448             :       // Label 1490: @56978
   23449             :       GIM_Try, /*On fail goto*//*Label 1491*/ 57030, // Rule ID 1014 //
   23450             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23451             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqadd,
   23452             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   23453             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   23454             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   23455             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   23456             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   23457             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   23458             :         // (intrinsic_wo_chain:{ *:[v4i16] } 292:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)  =>  (SQADDv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
   23459             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQADDv4i16,
   23460             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23461             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23462             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23463             :         GIR_EraseFromParent, /*InsnID*/0,
   23464             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23465             :         // GIR_Coverage, 1014,
   23466             :         GIR_Done,
   23467             :       // Label 1491: @57030
   23468             :       GIM_Try, /*On fail goto*//*Label 1492*/ 57082, // Rule ID 1015 //
   23469             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23470             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqadd,
   23471             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   23472             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   23473             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   23474             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   23475             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   23476             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   23477             :         // (intrinsic_wo_chain:{ *:[v8i16] } 292:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)  =>  (SQADDv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
   23478             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQADDv8i16,
   23479             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23480             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23481             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23482             :         GIR_EraseFromParent, /*InsnID*/0,
   23483             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23484             :         // GIR_Coverage, 1015,
   23485             :         GIR_Done,
   23486             :       // Label 1492: @57082
   23487             :       GIM_Try, /*On fail goto*//*Label 1493*/ 57134, // Rule ID 1016 //
   23488             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23489             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqadd,
   23490             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   23491             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   23492             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   23493             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   23494             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   23495             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   23496             :         // (intrinsic_wo_chain:{ *:[v2i32] } 292:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)  =>  (SQADDv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
   23497             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQADDv2i32,
   23498             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23499             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23500             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23501             :         GIR_EraseFromParent, /*InsnID*/0,
   23502             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23503             :         // GIR_Coverage, 1016,
   23504             :         GIR_Done,
   23505             :       // Label 1493: @57134
   23506             :       GIM_Try, /*On fail goto*//*Label 1494*/ 57186, // Rule ID 1017 //
   23507             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23508             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqadd,
   23509             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   23510             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   23511             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   23512             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   23513             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   23514             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   23515             :         // (intrinsic_wo_chain:{ *:[v4i32] } 292:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (SQADDv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
   23516             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQADDv4i32,
   23517             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23518             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23519             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23520             :         GIR_EraseFromParent, /*InsnID*/0,
   23521             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23522             :         // GIR_Coverage, 1017,
   23523             :         GIR_Done,
   23524             :       // Label 1494: @57186
   23525             :       GIM_Try, /*On fail goto*//*Label 1495*/ 57238, // Rule ID 1018 //
   23526             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23527             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqadd,
   23528             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   23529             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   23530             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
   23531             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   23532             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   23533             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   23534             :         // (intrinsic_wo_chain:{ *:[v2i64] } 292:{ *:[iPTR] }, V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)  =>  (SQADDv2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)
   23535             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQADDv2i64,
   23536             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23537             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23538             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23539             :         GIR_EraseFromParent, /*InsnID*/0,
   23540             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23541             :         // GIR_Coverage, 1018,
   23542             :         GIR_Done,
   23543             :       // Label 1495: @57238
   23544             :       GIM_Try, /*On fail goto*//*Label 1496*/ 57290, // Rule ID 1019 //
   23545             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23546             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqdmulh,
   23547             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   23548             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   23549             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   23550             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   23551             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   23552             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   23553             :         // (intrinsic_wo_chain:{ *:[v4i16] } 293:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)  =>  (SQDMULHv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
   23554             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQDMULHv4i16,
   23555             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23556             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23557             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23558             :         GIR_EraseFromParent, /*InsnID*/0,
   23559             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23560             :         // GIR_Coverage, 1019,
   23561             :         GIR_Done,
   23562             :       // Label 1496: @57290
   23563             :       GIM_Try, /*On fail goto*//*Label 1497*/ 57342, // Rule ID 1020 //
   23564             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23565             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqdmulh,
   23566             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   23567             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   23568             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   23569             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   23570             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   23571             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   23572             :         // (intrinsic_wo_chain:{ *:[v8i16] } 293:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)  =>  (SQDMULHv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
   23573             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQDMULHv8i16,
   23574             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23575             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23576             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23577             :         GIR_EraseFromParent, /*InsnID*/0,
   23578             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23579             :         // GIR_Coverage, 1020,
   23580             :         GIR_Done,
   23581             :       // Label 1497: @57342
   23582             :       GIM_Try, /*On fail goto*//*Label 1498*/ 57394, // Rule ID 1021 //
   23583             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23584             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqdmulh,
   23585             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   23586             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   23587             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   23588             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   23589             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   23590             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   23591             :         // (intrinsic_wo_chain:{ *:[v2i32] } 293:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)  =>  (SQDMULHv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
   23592             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQDMULHv2i32,
   23593             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23594             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23595             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23596             :         GIR_EraseFromParent, /*InsnID*/0,
   23597             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23598             :         // GIR_Coverage, 1021,
   23599             :         GIR_Done,
   23600             :       // Label 1498: @57394
   23601             :       GIM_Try, /*On fail goto*//*Label 1499*/ 57446, // Rule ID 1022 //
   23602             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23603             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqdmulh,
   23604             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   23605             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   23606             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   23607             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   23608             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   23609             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   23610             :         // (intrinsic_wo_chain:{ *:[v4i32] } 293:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (SQDMULHv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
   23611             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQDMULHv4i32,
   23612             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23613             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23614             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23615             :         GIR_EraseFromParent, /*InsnID*/0,
   23616             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23617             :         // GIR_Coverage, 1022,
   23618             :         GIR_Done,
   23619             :       // Label 1499: @57446
   23620             :       GIM_Try, /*On fail goto*//*Label 1500*/ 57498, // Rule ID 1023 //
   23621             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23622             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqrdmulh,
   23623             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   23624             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   23625             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   23626             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   23627             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   23628             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   23629             :         // (intrinsic_wo_chain:{ *:[v4i16] } 297:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)  =>  (SQRDMULHv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
   23630             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRDMULHv4i16,
   23631             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23632             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23633             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23634             :         GIR_EraseFromParent, /*InsnID*/0,
   23635             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23636             :         // GIR_Coverage, 1023,
   23637             :         GIR_Done,
   23638             :       // Label 1500: @57498
   23639             :       GIM_Try, /*On fail goto*//*Label 1501*/ 57550, // Rule ID 1024 //
   23640             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23641             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqrdmulh,
   23642             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   23643             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   23644             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   23645             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   23646             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   23647             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   23648             :         // (intrinsic_wo_chain:{ *:[v8i16] } 297:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)  =>  (SQRDMULHv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
   23649             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRDMULHv8i16,
   23650             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23651             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23652             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23653             :         GIR_EraseFromParent, /*InsnID*/0,
   23654             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23655             :         // GIR_Coverage, 1024,
   23656             :         GIR_Done,
   23657             :       // Label 1501: @57550
   23658             :       GIM_Try, /*On fail goto*//*Label 1502*/ 57602, // Rule ID 1025 //
   23659             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23660             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqrdmulh,
   23661             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   23662             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   23663             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   23664             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   23665             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   23666             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   23667             :         // (intrinsic_wo_chain:{ *:[v2i32] } 297:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)  =>  (SQRDMULHv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
   23668             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRDMULHv2i32,
   23669             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23670             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23671             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23672             :         GIR_EraseFromParent, /*InsnID*/0,
   23673             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23674             :         // GIR_Coverage, 1025,
   23675             :         GIR_Done,
   23676             :       // Label 1502: @57602
   23677             :       GIM_Try, /*On fail goto*//*Label 1503*/ 57654, // Rule ID 1026 //
   23678             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23679             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqrdmulh,
   23680             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   23681             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   23682             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   23683             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   23684             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   23685             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   23686             :         // (intrinsic_wo_chain:{ *:[v4i32] } 297:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (SQRDMULHv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
   23687             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRDMULHv4i32,
   23688             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23689             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23690             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23691             :         GIR_EraseFromParent, /*InsnID*/0,
   23692             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23693             :         // GIR_Coverage, 1026,
   23694             :         GIR_Done,
   23695             :       // Label 1503: @57654
   23696             :       GIM_Try, /*On fail goto*//*Label 1504*/ 57706, // Rule ID 1027 //
   23697             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23698             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqrshl,
   23699             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   23700             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
   23701             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
   23702             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   23703             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   23704             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   23705             :         // (intrinsic_wo_chain:{ *:[v8i8] } 298:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (SQRSHLv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
   23706             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRSHLv8i8,
   23707             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23708             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23709             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23710             :         GIR_EraseFromParent, /*InsnID*/0,
   23711             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23712             :         // GIR_Coverage, 1027,
   23713             :         GIR_Done,
   23714             :       // Label 1504: @57706
   23715             :       GIM_Try, /*On fail goto*//*Label 1505*/ 57758, // Rule ID 1028 //
   23716             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23717             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqrshl,
   23718             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   23719             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   23720             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
   23721             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   23722             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   23723             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   23724             :         // (intrinsic_wo_chain:{ *:[v16i8] } 298:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (SQRSHLv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
   23725             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRSHLv16i8,
   23726             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23727             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23728             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23729             :         GIR_EraseFromParent, /*InsnID*/0,
   23730             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23731             :         // GIR_Coverage, 1028,
   23732             :         GIR_Done,
   23733             :       // Label 1505: @57758
   23734             :       GIM_Try, /*On fail goto*//*Label 1506*/ 57810, // Rule ID 1029 //
   23735             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23736             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqrshl,
   23737             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   23738             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   23739             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   23740             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   23741             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   23742             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   23743             :         // (intrinsic_wo_chain:{ *:[v4i16] } 298:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)  =>  (SQRSHLv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
   23744             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRSHLv4i16,
   23745             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23746             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23747             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23748             :         GIR_EraseFromParent, /*InsnID*/0,
   23749             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23750             :         // GIR_Coverage, 1029,
   23751             :         GIR_Done,
   23752             :       // Label 1506: @57810
   23753             :       GIM_Try, /*On fail goto*//*Label 1507*/ 57862, // Rule ID 1030 //
   23754             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23755             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqrshl,
   23756             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   23757             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   23758             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   23759             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   23760             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   23761             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   23762             :         // (intrinsic_wo_chain:{ *:[v8i16] } 298:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)  =>  (SQRSHLv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
   23763             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRSHLv8i16,
   23764             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23765             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23766             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23767             :         GIR_EraseFromParent, /*InsnID*/0,
   23768             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23769             :         // GIR_Coverage, 1030,
   23770             :         GIR_Done,
   23771             :       // Label 1507: @57862
   23772             :       GIM_Try, /*On fail goto*//*Label 1508*/ 57914, // Rule ID 1031 //
   23773             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23774             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqrshl,
   23775             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   23776             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   23777             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   23778             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   23779             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   23780             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   23781             :         // (intrinsic_wo_chain:{ *:[v2i32] } 298:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)  =>  (SQRSHLv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
   23782             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRSHLv2i32,
   23783             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23784             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23785             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23786             :         GIR_EraseFromParent, /*InsnID*/0,
   23787             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23788             :         // GIR_Coverage, 1031,
   23789             :         GIR_Done,
   23790             :       // Label 1508: @57914
   23791             :       GIM_Try, /*On fail goto*//*Label 1509*/ 57966, // Rule ID 1032 //
   23792             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23793             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqrshl,
   23794             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   23795             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   23796             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   23797             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   23798             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   23799             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   23800             :         // (intrinsic_wo_chain:{ *:[v4i32] } 298:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (SQRSHLv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
   23801             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRSHLv4i32,
   23802             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23803             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23804             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23805             :         GIR_EraseFromParent, /*InsnID*/0,
   23806             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23807             :         // GIR_Coverage, 1032,
   23808             :         GIR_Done,
   23809             :       // Label 1509: @57966
   23810             :       GIM_Try, /*On fail goto*//*Label 1510*/ 58018, // Rule ID 1033 //
   23811             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23812             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqrshl,
   23813             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   23814             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   23815             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
   23816             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   23817             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   23818             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   23819             :         // (intrinsic_wo_chain:{ *:[v2i64] } 298:{ *:[iPTR] }, V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)  =>  (SQRSHLv2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)
   23820             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRSHLv2i64,
   23821             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23822             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23823             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23824             :         GIR_EraseFromParent, /*InsnID*/0,
   23825             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23826             :         // GIR_Coverage, 1033,
   23827             :         GIR_Done,
   23828             :       // Label 1510: @58018
   23829             :       GIM_Try, /*On fail goto*//*Label 1511*/ 58070, // Rule ID 1034 //
   23830             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23831             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqshl,
   23832             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   23833             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
   23834             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
   23835             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   23836             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   23837             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   23838             :         // (intrinsic_wo_chain:{ *:[v8i8] } 301:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (SQSHLv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
   23839             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSHLv8i8,
   23840             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23841             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23842             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23843             :         GIR_EraseFromParent, /*InsnID*/0,
   23844             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23845             :         // GIR_Coverage, 1034,
   23846             :         GIR_Done,
   23847             :       // Label 1511: @58070
   23848             :       GIM_Try, /*On fail goto*//*Label 1512*/ 58122, // Rule ID 1035 //
   23849             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23850             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqshl,
   23851             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   23852             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   23853             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
   23854             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   23855             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   23856             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   23857             :         // (intrinsic_wo_chain:{ *:[v16i8] } 301:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (SQSHLv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
   23858             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSHLv16i8,
   23859             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23860             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23861             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23862             :         GIR_EraseFromParent, /*InsnID*/0,
   23863             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23864             :         // GIR_Coverage, 1035,
   23865             :         GIR_Done,
   23866             :       // Label 1512: @58122
   23867             :       GIM_Try, /*On fail goto*//*Label 1513*/ 58174, // Rule ID 1036 //
   23868             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23869             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqshl,
   23870             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   23871             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   23872             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   23873             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   23874             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   23875             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   23876             :         // (intrinsic_wo_chain:{ *:[v4i16] } 301:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)  =>  (SQSHLv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
   23877             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSHLv4i16,
   23878             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23879             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23880             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23881             :         GIR_EraseFromParent, /*InsnID*/0,
   23882             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23883             :         // GIR_Coverage, 1036,
   23884             :         GIR_Done,
   23885             :       // Label 1513: @58174
   23886             :       GIM_Try, /*On fail goto*//*Label 1514*/ 58226, // Rule ID 1037 //
   23887             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23888             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqshl,
   23889             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   23890             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   23891             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   23892             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   23893             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   23894             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   23895             :         // (intrinsic_wo_chain:{ *:[v8i16] } 301:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)  =>  (SQSHLv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
   23896             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSHLv8i16,
   23897             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23898             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23899             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23900             :         GIR_EraseFromParent, /*InsnID*/0,
   23901             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23902             :         // GIR_Coverage, 1037,
   23903             :         GIR_Done,
   23904             :       // Label 1514: @58226
   23905             :       GIM_Try, /*On fail goto*//*Label 1515*/ 58278, // Rule ID 1038 //
   23906             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23907             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqshl,
   23908             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   23909             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   23910             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   23911             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   23912             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   23913             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   23914             :         // (intrinsic_wo_chain:{ *:[v2i32] } 301:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)  =>  (SQSHLv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
   23915             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSHLv2i32,
   23916             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23917             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23918             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23919             :         GIR_EraseFromParent, /*InsnID*/0,
   23920             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23921             :         // GIR_Coverage, 1038,
   23922             :         GIR_Done,
   23923             :       // Label 1515: @58278
   23924             :       GIM_Try, /*On fail goto*//*Label 1516*/ 58330, // Rule ID 1039 //
   23925             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23926             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqshl,
   23927             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   23928             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   23929             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   23930             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   23931             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   23932             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   23933             :         // (intrinsic_wo_chain:{ *:[v4i32] } 301:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (SQSHLv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
   23934             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSHLv4i32,
   23935             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23936             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23937             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23938             :         GIR_EraseFromParent, /*InsnID*/0,
   23939             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23940             :         // GIR_Coverage, 1039,
   23941             :         GIR_Done,
   23942             :       // Label 1516: @58330
   23943             :       GIM_Try, /*On fail goto*//*Label 1517*/ 58382, // Rule ID 1040 //
   23944             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23945             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqshl,
   23946             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   23947             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   23948             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
   23949             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   23950             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   23951             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   23952             :         // (intrinsic_wo_chain:{ *:[v2i64] } 301:{ *:[iPTR] }, V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)  =>  (SQSHLv2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)
   23953             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSHLv2i64,
   23954             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23955             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23956             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23957             :         GIR_EraseFromParent, /*InsnID*/0,
   23958             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23959             :         // GIR_Coverage, 1040,
   23960             :         GIR_Done,
   23961             :       // Label 1517: @58382
   23962             :       GIM_Try, /*On fail goto*//*Label 1518*/ 58434, // Rule ID 1041 //
   23963             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23964             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqsub,
   23965             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   23966             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
   23967             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
   23968             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   23969             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   23970             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   23971             :         // (intrinsic_wo_chain:{ *:[v8i8] } 305:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (SQSUBv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
   23972             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSUBv8i8,
   23973             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23974             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23975             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23976             :         GIR_EraseFromParent, /*InsnID*/0,
   23977             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23978             :         // GIR_Coverage, 1041,
   23979             :         GIR_Done,
   23980             :       // Label 1518: @58434
   23981             :       GIM_Try, /*On fail goto*//*Label 1519*/ 58486, // Rule ID 1042 //
   23982             :         GIM_CheckFeatures, GIFBS_HasNEON,
   23983             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqsub,
   23984             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   23985             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   23986             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
   23987             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   23988             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   23989             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   23990             :         // (intrinsic_wo_chain:{ *:[v16i8] } 305:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (SQSUBv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
   23991             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSUBv16i8,
   23992             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   23993             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   23994             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   23995             :         GIR_EraseFromParent, /*InsnID*/0,
   23996             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   23997             :         // GIR_Coverage, 1042,
   23998             :         GIR_Done,
   23999             :       // Label 1519: @58486
   24000             :       GIM_Try, /*On fail goto*//*Label 1520*/ 58538, // Rule ID 1043 //
   24001             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24002             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqsub,
   24003             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   24004             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   24005             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   24006             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   24007             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   24008             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   24009             :         // (intrinsic_wo_chain:{ *:[v4i16] } 305:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)  =>  (SQSUBv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
   24010             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSUBv4i16,
   24011             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24012             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24013             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24014             :         GIR_EraseFromParent, /*InsnID*/0,
   24015             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24016             :         // GIR_Coverage, 1043,
   24017             :         GIR_Done,
   24018             :       // Label 1520: @58538
   24019             :       GIM_Try, /*On fail goto*//*Label 1521*/ 58590, // Rule ID 1044 //
   24020             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24021             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqsub,
   24022             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   24023             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   24024             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   24025             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   24026             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   24027             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   24028             :         // (intrinsic_wo_chain:{ *:[v8i16] } 305:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)  =>  (SQSUBv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
   24029             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSUBv8i16,
   24030             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24031             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24032             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24033             :         GIR_EraseFromParent, /*InsnID*/0,
   24034             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24035             :         // GIR_Coverage, 1044,
   24036             :         GIR_Done,
   24037             :       // Label 1521: @58590
   24038             :       GIM_Try, /*On fail goto*//*Label 1522*/ 58642, // Rule ID 1045 //
   24039             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24040             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqsub,
   24041             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   24042             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   24043             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   24044             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   24045             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   24046             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   24047             :         // (intrinsic_wo_chain:{ *:[v2i32] } 305:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)  =>  (SQSUBv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
   24048             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSUBv2i32,
   24049             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24050             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24051             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24052             :         GIR_EraseFromParent, /*InsnID*/0,
   24053             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24054             :         // GIR_Coverage, 1045,
   24055             :         GIR_Done,
   24056             :       // Label 1522: @58642
   24057             :       GIM_Try, /*On fail goto*//*Label 1523*/ 58694, // Rule ID 1046 //
   24058             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24059             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqsub,
   24060             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   24061             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   24062             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   24063             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   24064             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   24065             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   24066             :         // (intrinsic_wo_chain:{ *:[v4i32] } 305:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (SQSUBv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
   24067             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSUBv4i32,
   24068             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24069             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24070             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24071             :         GIR_EraseFromParent, /*InsnID*/0,
   24072             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24073             :         // GIR_Coverage, 1046,
   24074             :         GIR_Done,
   24075             :       // Label 1523: @58694
   24076             :       GIM_Try, /*On fail goto*//*Label 1524*/ 58746, // Rule ID 1047 //
   24077             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24078             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqsub,
   24079             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   24080             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   24081             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
   24082             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   24083             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   24084             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   24085             :         // (intrinsic_wo_chain:{ *:[v2i64] } 305:{ *:[iPTR] }, V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)  =>  (SQSUBv2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)
   24086             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSUBv2i64,
   24087             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24088             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24089             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24090             :         GIR_EraseFromParent, /*InsnID*/0,
   24091             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24092             :         // GIR_Coverage, 1047,
   24093             :         GIR_Done,
   24094             :       // Label 1524: @58746
   24095             :       GIM_Try, /*On fail goto*//*Label 1525*/ 58798, // Rule ID 1048 //
   24096             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24097             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_srhadd,
   24098             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   24099             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
   24100             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
   24101             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   24102             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   24103             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   24104             :         // (intrinsic_wo_chain:{ *:[v8i8] } 308:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (SRHADDv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
   24105             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRHADDv8i8,
   24106             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24107             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24108             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24109             :         GIR_EraseFromParent, /*InsnID*/0,
   24110             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24111             :         // GIR_Coverage, 1048,
   24112             :         GIR_Done,
   24113             :       // Label 1525: @58798
   24114             :       GIM_Try, /*On fail goto*//*Label 1526*/ 58850, // Rule ID 1049 //
   24115             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24116             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_srhadd,
   24117             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   24118             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   24119             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
   24120             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   24121             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   24122             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   24123             :         // (intrinsic_wo_chain:{ *:[v16i8] } 308:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (SRHADDv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
   24124             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRHADDv16i8,
   24125             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24126             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24127             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24128             :         GIR_EraseFromParent, /*InsnID*/0,
   24129             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24130             :         // GIR_Coverage, 1049,
   24131             :         GIR_Done,
   24132             :       // Label 1526: @58850
   24133             :       GIM_Try, /*On fail goto*//*Label 1527*/ 58902, // Rule ID 1050 //
   24134             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24135             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_srhadd,
   24136             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   24137             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   24138             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   24139             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   24140             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   24141             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   24142             :         // (intrinsic_wo_chain:{ *:[v4i16] } 308:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)  =>  (SRHADDv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
   24143             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRHADDv4i16,
   24144             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24145             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24146             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24147             :         GIR_EraseFromParent, /*InsnID*/0,
   24148             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24149             :         // GIR_Coverage, 1050,
   24150             :         GIR_Done,
   24151             :       // Label 1527: @58902
   24152             :       GIM_Try, /*On fail goto*//*Label 1528*/ 58954, // Rule ID 1051 //
   24153             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24154             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_srhadd,
   24155             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   24156             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   24157             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   24158             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   24159             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   24160             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   24161             :         // (intrinsic_wo_chain:{ *:[v8i16] } 308:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)  =>  (SRHADDv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
   24162             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRHADDv8i16,
   24163             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24164             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24165             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24166             :         GIR_EraseFromParent, /*InsnID*/0,
   24167             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24168             :         // GIR_Coverage, 1051,
   24169             :         GIR_Done,
   24170             :       // Label 1528: @58954
   24171             :       GIM_Try, /*On fail goto*//*Label 1529*/ 59006, // Rule ID 1052 //
   24172             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24173             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_srhadd,
   24174             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   24175             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   24176             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   24177             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   24178             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   24179             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   24180             :         // (intrinsic_wo_chain:{ *:[v2i32] } 308:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)  =>  (SRHADDv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
   24181             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRHADDv2i32,
   24182             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24183             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24184             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24185             :         GIR_EraseFromParent, /*InsnID*/0,
   24186             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24187             :         // GIR_Coverage, 1052,
   24188             :         GIR_Done,
   24189             :       // Label 1529: @59006
   24190             :       GIM_Try, /*On fail goto*//*Label 1530*/ 59058, // Rule ID 1053 //
   24191             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24192             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_srhadd,
   24193             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   24194             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   24195             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   24196             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   24197             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   24198             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   24199             :         // (intrinsic_wo_chain:{ *:[v4i32] } 308:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (SRHADDv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
   24200             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRHADDv4i32,
   24201             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24202             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24203             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24204             :         GIR_EraseFromParent, /*InsnID*/0,
   24205             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24206             :         // GIR_Coverage, 1053,
   24207             :         GIR_Done,
   24208             :       // Label 1530: @59058
   24209             :       GIM_Try, /*On fail goto*//*Label 1531*/ 59110, // Rule ID 1054 //
   24210             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24211             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_srshl,
   24212             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   24213             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
   24214             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
   24215             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   24216             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   24217             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   24218             :         // (intrinsic_wo_chain:{ *:[v8i8] } 309:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (SRSHLv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
   24219             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRSHLv8i8,
   24220             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24221             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24222             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24223             :         GIR_EraseFromParent, /*InsnID*/0,
   24224             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24225             :         // GIR_Coverage, 1054,
   24226             :         GIR_Done,
   24227             :       // Label 1531: @59110
   24228             :       GIM_Try, /*On fail goto*//*Label 1532*/ 59162, // Rule ID 1055 //
   24229             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24230             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_srshl,
   24231             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   24232             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   24233             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
   24234             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   24235             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   24236             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   24237             :         // (intrinsic_wo_chain:{ *:[v16i8] } 309:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (SRSHLv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
   24238             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRSHLv16i8,
   24239             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24240             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24241             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24242             :         GIR_EraseFromParent, /*InsnID*/0,
   24243             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24244             :         // GIR_Coverage, 1055,
   24245             :         GIR_Done,
   24246             :       // Label 1532: @59162
   24247             :       GIM_Try, /*On fail goto*//*Label 1533*/ 59214, // Rule ID 1056 //
   24248             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24249             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_srshl,
   24250             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   24251             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   24252             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   24253             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   24254             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   24255             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   24256             :         // (intrinsic_wo_chain:{ *:[v4i16] } 309:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)  =>  (SRSHLv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
   24257             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRSHLv4i16,
   24258             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24259             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24260             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24261             :         GIR_EraseFromParent, /*InsnID*/0,
   24262             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24263             :         // GIR_Coverage, 1056,
   24264             :         GIR_Done,
   24265             :       // Label 1533: @59214
   24266             :       GIM_Try, /*On fail goto*//*Label 1534*/ 59266, // Rule ID 1057 //
   24267             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24268             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_srshl,
   24269             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   24270             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   24271             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   24272             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   24273             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   24274             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   24275             :         // (intrinsic_wo_chain:{ *:[v8i16] } 309:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)  =>  (SRSHLv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
   24276             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRSHLv8i16,
   24277             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24278             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24279             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24280             :         GIR_EraseFromParent, /*InsnID*/0,
   24281             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24282             :         // GIR_Coverage, 1057,
   24283             :         GIR_Done,
   24284             :       // Label 1534: @59266
   24285             :       GIM_Try, /*On fail goto*//*Label 1535*/ 59318, // Rule ID 1058 //
   24286             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24287             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_srshl,
   24288             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   24289             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   24290             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   24291             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   24292             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   24293             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   24294             :         // (intrinsic_wo_chain:{ *:[v2i32] } 309:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)  =>  (SRSHLv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
   24295             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRSHLv2i32,
   24296             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24297             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24298             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24299             :         GIR_EraseFromParent, /*InsnID*/0,
   24300             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24301             :         // GIR_Coverage, 1058,
   24302             :         GIR_Done,
   24303             :       // Label 1535: @59318
   24304             :       GIM_Try, /*On fail goto*//*Label 1536*/ 59370, // Rule ID 1059 //
   24305             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24306             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_srshl,
   24307             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   24308             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   24309             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   24310             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   24311             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   24312             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   24313             :         // (intrinsic_wo_chain:{ *:[v4i32] } 309:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (SRSHLv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
   24314             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRSHLv4i32,
   24315             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24316             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24317             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24318             :         GIR_EraseFromParent, /*InsnID*/0,
   24319             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24320             :         // GIR_Coverage, 1059,
   24321             :         GIR_Done,
   24322             :       // Label 1536: @59370
   24323             :       GIM_Try, /*On fail goto*//*Label 1537*/ 59422, // Rule ID 1060 //
   24324             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24325             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_srshl,
   24326             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   24327             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   24328             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
   24329             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   24330             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   24331             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   24332             :         // (intrinsic_wo_chain:{ *:[v2i64] } 309:{ *:[iPTR] }, V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)  =>  (SRSHLv2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)
   24333             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRSHLv2i64,
   24334             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24335             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24336             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24337             :         GIR_EraseFromParent, /*InsnID*/0,
   24338             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24339             :         // GIR_Coverage, 1060,
   24340             :         GIR_Done,
   24341             :       // Label 1537: @59422
   24342             :       GIM_Try, /*On fail goto*//*Label 1538*/ 59474, // Rule ID 1061 //
   24343             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24344             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sshl,
   24345             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   24346             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
   24347             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
   24348             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   24349             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   24350             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   24351             :         // (intrinsic_wo_chain:{ *:[v8i8] } 310:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (SSHLv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
   24352             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SSHLv8i8,
   24353             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24354             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24355             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24356             :         GIR_EraseFromParent, /*InsnID*/0,
   24357             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24358             :         // GIR_Coverage, 1061,
   24359             :         GIR_Done,
   24360             :       // Label 1538: @59474
   24361             :       GIM_Try, /*On fail goto*//*Label 1539*/ 59526, // Rule ID 1062 //
   24362             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24363             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sshl,
   24364             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   24365             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   24366             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
   24367             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   24368             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   24369             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   24370             :         // (intrinsic_wo_chain:{ *:[v16i8] } 310:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (SSHLv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
   24371             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SSHLv16i8,
   24372             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24373             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24374             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24375             :         GIR_EraseFromParent, /*InsnID*/0,
   24376             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24377             :         // GIR_Coverage, 1062,
   24378             :         GIR_Done,
   24379             :       // Label 1539: @59526
   24380             :       GIM_Try, /*On fail goto*//*Label 1540*/ 59578, // Rule ID 1063 //
   24381             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24382             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sshl,
   24383             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   24384             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   24385             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   24386             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   24387             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   24388             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   24389             :         // (intrinsic_wo_chain:{ *:[v4i16] } 310:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)  =>  (SSHLv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
   24390             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SSHLv4i16,
   24391             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24392             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24393             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24394             :         GIR_EraseFromParent, /*InsnID*/0,
   24395             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24396             :         // GIR_Coverage, 1063,
   24397             :         GIR_Done,
   24398             :       // Label 1540: @59578
   24399             :       GIM_Try, /*On fail goto*//*Label 1541*/ 59630, // Rule ID 1064 //
   24400             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24401             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sshl,
   24402             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   24403             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   24404             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   24405             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   24406             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   24407             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   24408             :         // (intrinsic_wo_chain:{ *:[v8i16] } 310:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)  =>  (SSHLv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
   24409             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SSHLv8i16,
   24410             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24411             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24412             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24413             :         GIR_EraseFromParent, /*InsnID*/0,
   24414             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24415             :         // GIR_Coverage, 1064,
   24416             :         GIR_Done,
   24417             :       // Label 1541: @59630
   24418             :       GIM_Try, /*On fail goto*//*Label 1542*/ 59682, // Rule ID 1065 //
   24419             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24420             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sshl,
   24421             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   24422             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   24423             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   24424             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   24425             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   24426             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   24427             :         // (intrinsic_wo_chain:{ *:[v2i32] } 310:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)  =>  (SSHLv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
   24428             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SSHLv2i32,
   24429             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24430             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24431             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24432             :         GIR_EraseFromParent, /*InsnID*/0,
   24433             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24434             :         // GIR_Coverage, 1065,
   24435             :         GIR_Done,
   24436             :       // Label 1542: @59682
   24437             :       GIM_Try, /*On fail goto*//*Label 1543*/ 59734, // Rule ID 1066 //
   24438             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24439             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sshl,
   24440             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   24441             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   24442             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   24443             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   24444             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   24445             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   24446             :         // (intrinsic_wo_chain:{ *:[v4i32] } 310:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (SSHLv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
   24447             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SSHLv4i32,
   24448             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24449             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24450             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24451             :         GIR_EraseFromParent, /*InsnID*/0,
   24452             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24453             :         // GIR_Coverage, 1066,
   24454             :         GIR_Done,
   24455             :       // Label 1543: @59734
   24456             :       GIM_Try, /*On fail goto*//*Label 1544*/ 59786, // Rule ID 1067 //
   24457             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24458             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sshl,
   24459             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   24460             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   24461             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
   24462             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   24463             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   24464             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   24465             :         // (intrinsic_wo_chain:{ *:[v2i64] } 310:{ *:[iPTR] }, V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)  =>  (SSHLv2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)
   24466             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SSHLv2i64,
   24467             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24468             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24469             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24470             :         GIR_EraseFromParent, /*InsnID*/0,
   24471             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24472             :         // GIR_Coverage, 1067,
   24473             :         GIR_Done,
   24474             :       // Label 1544: @59786
   24475             :       GIM_Try, /*On fail goto*//*Label 1545*/ 59838, // Rule ID 1081 //
   24476             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24477             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uabd,
   24478             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   24479             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
   24480             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
   24481             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   24482             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   24483             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   24484             :         // (intrinsic_wo_chain:{ *:[v8i8] } 331:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (UABDv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
   24485             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABDv8i8,
   24486             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24487             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24488             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24489             :         GIR_EraseFromParent, /*InsnID*/0,
   24490             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24491             :         // GIR_Coverage, 1081,
   24492             :         GIR_Done,
   24493             :       // Label 1545: @59838
   24494             :       GIM_Try, /*On fail goto*//*Label 1546*/ 59890, // Rule ID 1082 //
   24495             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24496             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uabd,
   24497             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   24498             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   24499             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
   24500             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   24501             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   24502             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   24503             :         // (intrinsic_wo_chain:{ *:[v16i8] } 331:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (UABDv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
   24504             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABDv16i8,
   24505             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24506             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24507             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24508             :         GIR_EraseFromParent, /*InsnID*/0,
   24509             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24510             :         // GIR_Coverage, 1082,
   24511             :         GIR_Done,
   24512             :       // Label 1546: @59890
   24513             :       GIM_Try, /*On fail goto*//*Label 1547*/ 59942, // Rule ID 1083 //
   24514             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24515             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uabd,
   24516             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   24517             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   24518             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   24519             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   24520             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   24521             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   24522             :         // (intrinsic_wo_chain:{ *:[v4i16] } 331:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)  =>  (UABDv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
   24523             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABDv4i16,
   24524             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24525             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24526             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24527             :         GIR_EraseFromParent, /*InsnID*/0,
   24528             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24529             :         // GIR_Coverage, 1083,
   24530             :         GIR_Done,
   24531             :       // Label 1547: @59942
   24532             :       GIM_Try, /*On fail goto*//*Label 1548*/ 59994, // Rule ID 1084 //
   24533             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24534             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uabd,
   24535             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   24536             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   24537             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   24538             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   24539             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   24540             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   24541             :         // (intrinsic_wo_chain:{ *:[v8i16] } 331:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)  =>  (UABDv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
   24542             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABDv8i16,
   24543             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24544             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24545             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24546             :         GIR_EraseFromParent, /*InsnID*/0,
   24547             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24548             :         // GIR_Coverage, 1084,
   24549             :         GIR_Done,
   24550             :       // Label 1548: @59994
   24551             :       GIM_Try, /*On fail goto*//*Label 1549*/ 60046, // Rule ID 1085 //
   24552             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24553             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uabd,
   24554             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   24555             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   24556             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   24557             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   24558             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   24559             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   24560             :         // (intrinsic_wo_chain:{ *:[v2i32] } 331:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)  =>  (UABDv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
   24561             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABDv2i32,
   24562             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24563             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24564             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24565             :         GIR_EraseFromParent, /*InsnID*/0,
   24566             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24567             :         // GIR_Coverage, 1085,
   24568             :         GIR_Done,
   24569             :       // Label 1549: @60046
   24570             :       GIM_Try, /*On fail goto*//*Label 1550*/ 60098, // Rule ID 1086 //
   24571             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24572             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uabd,
   24573             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   24574             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   24575             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   24576             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   24577             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   24578             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   24579             :         // (intrinsic_wo_chain:{ *:[v4i32] } 331:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (UABDv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
   24580             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABDv4i32,
   24581             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24582             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24583             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24584             :         GIR_EraseFromParent, /*InsnID*/0,
   24585             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24586             :         // GIR_Coverage, 1086,
   24587             :         GIR_Done,
   24588             :       // Label 1550: @60098
   24589             :       GIM_Try, /*On fail goto*//*Label 1551*/ 60150, // Rule ID 1087 //
   24590             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24591             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uhadd,
   24592             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   24593             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
   24594             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
   24595             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   24596             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   24597             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   24598             :         // (intrinsic_wo_chain:{ *:[v8i8] } 336:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (UHADDv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
   24599             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UHADDv8i8,
   24600             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24601             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24602             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24603             :         GIR_EraseFromParent, /*InsnID*/0,
   24604             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24605             :         // GIR_Coverage, 1087,
   24606             :         GIR_Done,
   24607             :       // Label 1551: @60150
   24608             :       GIM_Try, /*On fail goto*//*Label 1552*/ 60202, // Rule ID 1088 //
   24609             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24610             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uhadd,
   24611             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   24612             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   24613             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
   24614             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   24615             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   24616             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   24617             :         // (intrinsic_wo_chain:{ *:[v16i8] } 336:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (UHADDv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
   24618             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UHADDv16i8,
   24619             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24620             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24621             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24622             :         GIR_EraseFromParent, /*InsnID*/0,
   24623             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24624             :         // GIR_Coverage, 1088,
   24625             :         GIR_Done,
   24626             :       // Label 1552: @60202
   24627             :       GIM_Try, /*On fail goto*//*Label 1553*/ 60254, // Rule ID 1089 //
   24628             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24629             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uhadd,
   24630             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   24631             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   24632             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   24633             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   24634             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   24635             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   24636             :         // (intrinsic_wo_chain:{ *:[v4i16] } 336:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)  =>  (UHADDv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
   24637             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UHADDv4i16,
   24638             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24639             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24640             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24641             :         GIR_EraseFromParent, /*InsnID*/0,
   24642             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24643             :         // GIR_Coverage, 1089,
   24644             :         GIR_Done,
   24645             :       // Label 1553: @60254
   24646             :       GIM_Try, /*On fail goto*//*Label 1554*/ 60306, // Rule ID 1090 //
   24647             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24648             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uhadd,
   24649             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   24650             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   24651             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   24652             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   24653             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   24654             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   24655             :         // (intrinsic_wo_chain:{ *:[v8i16] } 336:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)  =>  (UHADDv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
   24656             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UHADDv8i16,
   24657             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24658             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24659             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24660             :         GIR_EraseFromParent, /*InsnID*/0,
   24661             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24662             :         // GIR_Coverage, 1090,
   24663             :         GIR_Done,
   24664             :       // Label 1554: @60306
   24665             :       GIM_Try, /*On fail goto*//*Label 1555*/ 60358, // Rule ID 1091 //
   24666             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24667             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uhadd,
   24668             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   24669             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   24670             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   24671             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   24672             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   24673             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   24674             :         // (intrinsic_wo_chain:{ *:[v2i32] } 336:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)  =>  (UHADDv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
   24675             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UHADDv2i32,
   24676             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24677             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24678             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24679             :         GIR_EraseFromParent, /*InsnID*/0,
   24680             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24681             :         // GIR_Coverage, 1091,
   24682             :         GIR_Done,
   24683             :       // Label 1555: @60358
   24684             :       GIM_Try, /*On fail goto*//*Label 1556*/ 60410, // Rule ID 1092 //
   24685             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24686             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uhadd,
   24687             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   24688             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   24689             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   24690             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   24691             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   24692             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   24693             :         // (intrinsic_wo_chain:{ *:[v4i32] } 336:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (UHADDv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
   24694             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UHADDv4i32,
   24695             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24696             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24697             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24698             :         GIR_EraseFromParent, /*InsnID*/0,
   24699             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24700             :         // GIR_Coverage, 1092,
   24701             :         GIR_Done,
   24702             :       // Label 1556: @60410
   24703             :       GIM_Try, /*On fail goto*//*Label 1557*/ 60462, // Rule ID 1093 //
   24704             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24705             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uhsub,
   24706             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   24707             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
   24708             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
   24709             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   24710             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   24711             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   24712             :         // (intrinsic_wo_chain:{ *:[v8i8] } 337:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (UHSUBv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
   24713             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UHSUBv8i8,
   24714             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24715             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24716             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24717             :         GIR_EraseFromParent, /*InsnID*/0,
   24718             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24719             :         // GIR_Coverage, 1093,
   24720             :         GIR_Done,
   24721             :       // Label 1557: @60462
   24722             :       GIM_Try, /*On fail goto*//*Label 1558*/ 60514, // Rule ID 1094 //
   24723             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24724             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uhsub,
   24725             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   24726             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   24727             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
   24728             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   24729             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   24730             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   24731             :         // (intrinsic_wo_chain:{ *:[v16i8] } 337:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (UHSUBv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
   24732             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UHSUBv16i8,
   24733             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24734             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24735             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24736             :         GIR_EraseFromParent, /*InsnID*/0,
   24737             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24738             :         // GIR_Coverage, 1094,
   24739             :         GIR_Done,
   24740             :       // Label 1558: @60514
   24741             :       GIM_Try, /*On fail goto*//*Label 1559*/ 60566, // Rule ID 1095 //
   24742             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24743             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uhsub,
   24744             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   24745             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   24746             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   24747             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   24748             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   24749             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   24750             :         // (intrinsic_wo_chain:{ *:[v4i16] } 337:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)  =>  (UHSUBv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
   24751             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UHSUBv4i16,
   24752             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24753             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24754             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24755             :         GIR_EraseFromParent, /*InsnID*/0,
   24756             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24757             :         // GIR_Coverage, 1095,
   24758             :         GIR_Done,
   24759             :       // Label 1559: @60566
   24760             :       GIM_Try, /*On fail goto*//*Label 1560*/ 60618, // Rule ID 1096 //
   24761             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24762             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uhsub,
   24763             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   24764             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   24765             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   24766             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   24767             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   24768             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   24769             :         // (intrinsic_wo_chain:{ *:[v8i16] } 337:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)  =>  (UHSUBv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
   24770             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UHSUBv8i16,
   24771             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24772             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24773             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24774             :         GIR_EraseFromParent, /*InsnID*/0,
   24775             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24776             :         // GIR_Coverage, 1096,
   24777             :         GIR_Done,
   24778             :       // Label 1560: @60618
   24779             :       GIM_Try, /*On fail goto*//*Label 1561*/ 60670, // Rule ID 1097 //
   24780             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24781             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uhsub,
   24782             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   24783             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   24784             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   24785             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   24786             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   24787             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   24788             :         // (intrinsic_wo_chain:{ *:[v2i32] } 337:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)  =>  (UHSUBv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
   24789             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UHSUBv2i32,
   24790             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24791             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24792             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24793             :         GIR_EraseFromParent, /*InsnID*/0,
   24794             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24795             :         // GIR_Coverage, 1097,
   24796             :         GIR_Done,
   24797             :       // Label 1561: @60670
   24798             :       GIM_Try, /*On fail goto*//*Label 1562*/ 60722, // Rule ID 1098 //
   24799             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24800             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uhsub,
   24801             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   24802             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   24803             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   24804             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   24805             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   24806             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   24807             :         // (intrinsic_wo_chain:{ *:[v4i32] } 337:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (UHSUBv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
   24808             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UHSUBv4i32,
   24809             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24810             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24811             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24812             :         GIR_EraseFromParent, /*InsnID*/0,
   24813             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24814             :         // GIR_Coverage, 1098,
   24815             :         GIR_Done,
   24816             :       // Label 1562: @60722
   24817             :       GIM_Try, /*On fail goto*//*Label 1563*/ 60774, // Rule ID 1099 //
   24818             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24819             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_umaxp,
   24820             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   24821             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
   24822             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
   24823             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   24824             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   24825             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   24826             :         // (intrinsic_wo_chain:{ *:[v8i8] } 339:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (UMAXPv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
   24827             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMAXPv8i8,
   24828             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24829             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24830             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24831             :         GIR_EraseFromParent, /*InsnID*/0,
   24832             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24833             :         // GIR_Coverage, 1099,
   24834             :         GIR_Done,
   24835             :       // Label 1563: @60774
   24836             :       GIM_Try, /*On fail goto*//*Label 1564*/ 60826, // Rule ID 1100 //
   24837             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24838             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_umaxp,
   24839             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   24840             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   24841             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
   24842             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   24843             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   24844             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   24845             :         // (intrinsic_wo_chain:{ *:[v16i8] } 339:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (UMAXPv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
   24846             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMAXPv16i8,
   24847             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24848             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24849             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24850             :         GIR_EraseFromParent, /*InsnID*/0,
   24851             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24852             :         // GIR_Coverage, 1100,
   24853             :         GIR_Done,
   24854             :       // Label 1564: @60826
   24855             :       GIM_Try, /*On fail goto*//*Label 1565*/ 60878, // Rule ID 1101 //
   24856             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24857             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_umaxp,
   24858             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   24859             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   24860             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   24861             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   24862             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   24863             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   24864             :         // (intrinsic_wo_chain:{ *:[v4i16] } 339:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)  =>  (UMAXPv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
   24865             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMAXPv4i16,
   24866             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24867             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24868             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24869             :         GIR_EraseFromParent, /*InsnID*/0,
   24870             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24871             :         // GIR_Coverage, 1101,
   24872             :         GIR_Done,
   24873             :       // Label 1565: @60878
   24874             :       GIM_Try, /*On fail goto*//*Label 1566*/ 60930, // Rule ID 1102 //
   24875             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24876             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_umaxp,
   24877             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   24878             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   24879             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   24880             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   24881             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   24882             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   24883             :         // (intrinsic_wo_chain:{ *:[v8i16] } 339:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)  =>  (UMAXPv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
   24884             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMAXPv8i16,
   24885             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24886             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24887             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24888             :         GIR_EraseFromParent, /*InsnID*/0,
   24889             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24890             :         // GIR_Coverage, 1102,
   24891             :         GIR_Done,
   24892             :       // Label 1566: @60930
   24893             :       GIM_Try, /*On fail goto*//*Label 1567*/ 60982, // Rule ID 1103 //
   24894             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24895             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_umaxp,
   24896             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   24897             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   24898             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   24899             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   24900             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   24901             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   24902             :         // (intrinsic_wo_chain:{ *:[v2i32] } 339:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)  =>  (UMAXPv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
   24903             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMAXPv2i32,
   24904             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24905             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24906             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24907             :         GIR_EraseFromParent, /*InsnID*/0,
   24908             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24909             :         // GIR_Coverage, 1103,
   24910             :         GIR_Done,
   24911             :       // Label 1567: @60982
   24912             :       GIM_Try, /*On fail goto*//*Label 1568*/ 61034, // Rule ID 1104 //
   24913             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24914             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_umaxp,
   24915             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   24916             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   24917             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   24918             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   24919             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   24920             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   24921             :         // (intrinsic_wo_chain:{ *:[v4i32] } 339:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (UMAXPv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
   24922             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMAXPv4i32,
   24923             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24924             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24925             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24926             :         GIR_EraseFromParent, /*InsnID*/0,
   24927             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24928             :         // GIR_Coverage, 1104,
   24929             :         GIR_Done,
   24930             :       // Label 1568: @61034
   24931             :       GIM_Try, /*On fail goto*//*Label 1569*/ 61086, // Rule ID 1111 //
   24932             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24933             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uminp,
   24934             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   24935             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
   24936             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
   24937             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   24938             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   24939             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   24940             :         // (intrinsic_wo_chain:{ *:[v8i8] } 342:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (UMINPv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
   24941             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMINPv8i8,
   24942             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24943             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24944             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24945             :         GIR_EraseFromParent, /*InsnID*/0,
   24946             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24947             :         // GIR_Coverage, 1111,
   24948             :         GIR_Done,
   24949             :       // Label 1569: @61086
   24950             :       GIM_Try, /*On fail goto*//*Label 1570*/ 61138, // Rule ID 1112 //
   24951             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24952             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uminp,
   24953             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   24954             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   24955             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
   24956             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   24957             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   24958             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   24959             :         // (intrinsic_wo_chain:{ *:[v16i8] } 342:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (UMINPv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
   24960             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMINPv16i8,
   24961             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24962             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24963             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24964             :         GIR_EraseFromParent, /*InsnID*/0,
   24965             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24966             :         // GIR_Coverage, 1112,
   24967             :         GIR_Done,
   24968             :       // Label 1570: @61138
   24969             :       GIM_Try, /*On fail goto*//*Label 1571*/ 61190, // Rule ID 1113 //
   24970             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24971             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uminp,
   24972             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   24973             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   24974             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   24975             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   24976             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   24977             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   24978             :         // (intrinsic_wo_chain:{ *:[v4i16] } 342:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)  =>  (UMINPv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
   24979             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMINPv4i16,
   24980             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   24981             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   24982             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   24983             :         GIR_EraseFromParent, /*InsnID*/0,
   24984             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   24985             :         // GIR_Coverage, 1113,
   24986             :         GIR_Done,
   24987             :       // Label 1571: @61190
   24988             :       GIM_Try, /*On fail goto*//*Label 1572*/ 61242, // Rule ID 1114 //
   24989             :         GIM_CheckFeatures, GIFBS_HasNEON,
   24990             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uminp,
   24991             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   24992             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   24993             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   24994             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   24995             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   24996             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   24997             :         // (intrinsic_wo_chain:{ *:[v8i16] } 342:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)  =>  (UMINPv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
   24998             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMINPv8i16,
   24999             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25000             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25001             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25002             :         GIR_EraseFromParent, /*InsnID*/0,
   25003             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25004             :         // GIR_Coverage, 1114,
   25005             :         GIR_Done,
   25006             :       // Label 1572: @61242
   25007             :       GIM_Try, /*On fail goto*//*Label 1573*/ 61294, // Rule ID 1115 //
   25008             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25009             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uminp,
   25010             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   25011             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   25012             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   25013             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   25014             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   25015             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   25016             :         // (intrinsic_wo_chain:{ *:[v2i32] } 342:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)  =>  (UMINPv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
   25017             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMINPv2i32,
   25018             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25019             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25020             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25021             :         GIR_EraseFromParent, /*InsnID*/0,
   25022             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25023             :         // GIR_Coverage, 1115,
   25024             :         GIR_Done,
   25025             :       // Label 1573: @61294
   25026             :       GIM_Try, /*On fail goto*//*Label 1574*/ 61346, // Rule ID 1116 //
   25027             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25028             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uminp,
   25029             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   25030             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   25031             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   25032             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   25033             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   25034             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   25035             :         // (intrinsic_wo_chain:{ *:[v4i32] } 342:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (UMINPv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
   25036             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMINPv4i32,
   25037             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25038             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25039             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25040             :         GIR_EraseFromParent, /*InsnID*/0,
   25041             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25042             :         // GIR_Coverage, 1116,
   25043             :         GIR_Done,
   25044             :       // Label 1574: @61346
   25045             :       GIM_Try, /*On fail goto*//*Label 1575*/ 61398, // Rule ID 1123 //
   25046             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25047             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqadd,
   25048             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   25049             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
   25050             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
   25051             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   25052             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   25053             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   25054             :         // (intrinsic_wo_chain:{ *:[v8i8] } 345:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (UQADDv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
   25055             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQADDv8i8,
   25056             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25057             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25058             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25059             :         GIR_EraseFromParent, /*InsnID*/0,
   25060             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25061             :         // GIR_Coverage, 1123,
   25062             :         GIR_Done,
   25063             :       // Label 1575: @61398
   25064             :       GIM_Try, /*On fail goto*//*Label 1576*/ 61450, // Rule ID 1124 //
   25065             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25066             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqadd,
   25067             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   25068             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   25069             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
   25070             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   25071             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   25072             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   25073             :         // (intrinsic_wo_chain:{ *:[v16i8] } 345:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (UQADDv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
   25074             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQADDv16i8,
   25075             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25076             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25077             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25078             :         GIR_EraseFromParent, /*InsnID*/0,
   25079             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25080             :         // GIR_Coverage, 1124,
   25081             :         GIR_Done,
   25082             :       // Label 1576: @61450
   25083             :       GIM_Try, /*On fail goto*//*Label 1577*/ 61502, // Rule ID 1125 //
   25084             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25085             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqadd,
   25086             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   25087             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   25088             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   25089             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   25090             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   25091             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   25092             :         // (intrinsic_wo_chain:{ *:[v4i16] } 345:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)  =>  (UQADDv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
   25093             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQADDv4i16,
   25094             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25095             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25096             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25097             :         GIR_EraseFromParent, /*InsnID*/0,
   25098             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25099             :         // GIR_Coverage, 1125,
   25100             :         GIR_Done,
   25101             :       // Label 1577: @61502
   25102             :       GIM_Try, /*On fail goto*//*Label 1578*/ 61554, // Rule ID 1126 //
   25103             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25104             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqadd,
   25105             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   25106             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   25107             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   25108             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   25109             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   25110             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   25111             :         // (intrinsic_wo_chain:{ *:[v8i16] } 345:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)  =>  (UQADDv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
   25112             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQADDv8i16,
   25113             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25114             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25115             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25116             :         GIR_EraseFromParent, /*InsnID*/0,
   25117             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25118             :         // GIR_Coverage, 1126,
   25119             :         GIR_Done,
   25120             :       // Label 1578: @61554
   25121             :       GIM_Try, /*On fail goto*//*Label 1579*/ 61606, // Rule ID 1127 //
   25122             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25123             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqadd,
   25124             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   25125             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   25126             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   25127             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   25128             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   25129             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   25130             :         // (intrinsic_wo_chain:{ *:[v2i32] } 345:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)  =>  (UQADDv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
   25131             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQADDv2i32,
   25132             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25133             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25134             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25135             :         GIR_EraseFromParent, /*InsnID*/0,
   25136             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25137             :         // GIR_Coverage, 1127,
   25138             :         GIR_Done,
   25139             :       // Label 1579: @61606
   25140             :       GIM_Try, /*On fail goto*//*Label 1580*/ 61658, // Rule ID 1128 //
   25141             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25142             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqadd,
   25143             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   25144             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   25145             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   25146             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   25147             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   25148             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   25149             :         // (intrinsic_wo_chain:{ *:[v4i32] } 345:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (UQADDv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
   25150             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQADDv4i32,
   25151             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25152             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25153             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25154             :         GIR_EraseFromParent, /*InsnID*/0,
   25155             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25156             :         // GIR_Coverage, 1128,
   25157             :         GIR_Done,
   25158             :       // Label 1580: @61658
   25159             :       GIM_Try, /*On fail goto*//*Label 1581*/ 61710, // Rule ID 1129 //
   25160             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25161             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqadd,
   25162             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   25163             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   25164             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
   25165             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   25166             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   25167             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   25168             :         // (intrinsic_wo_chain:{ *:[v2i64] } 345:{ *:[iPTR] }, V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)  =>  (UQADDv2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)
   25169             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQADDv2i64,
   25170             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25171             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25172             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25173             :         GIR_EraseFromParent, /*InsnID*/0,
   25174             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25175             :         // GIR_Coverage, 1129,
   25176             :         GIR_Done,
   25177             :       // Label 1581: @61710
   25178             :       GIM_Try, /*On fail goto*//*Label 1582*/ 61762, // Rule ID 1130 //
   25179             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25180             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqrshl,
   25181             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   25182             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
   25183             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
   25184             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   25185             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   25186             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   25187             :         // (intrinsic_wo_chain:{ *:[v8i8] } 346:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (UQRSHLv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
   25188             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQRSHLv8i8,
   25189             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25190             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25191             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25192             :         GIR_EraseFromParent, /*InsnID*/0,
   25193             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25194             :         // GIR_Coverage, 1130,
   25195             :         GIR_Done,
   25196             :       // Label 1582: @61762
   25197             :       GIM_Try, /*On fail goto*//*Label 1583*/ 61814, // Rule ID 1131 //
   25198             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25199             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqrshl,
   25200             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   25201             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   25202             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
   25203             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   25204             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   25205             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   25206             :         // (intrinsic_wo_chain:{ *:[v16i8] } 346:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (UQRSHLv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
   25207             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQRSHLv16i8,
   25208             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25209             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25210             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25211             :         GIR_EraseFromParent, /*InsnID*/0,
   25212             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25213             :         // GIR_Coverage, 1131,
   25214             :         GIR_Done,
   25215             :       // Label 1583: @61814
   25216             :       GIM_Try, /*On fail goto*//*Label 1584*/ 61866, // Rule ID 1132 //
   25217             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25218             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqrshl,
   25219             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   25220             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   25221             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   25222             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   25223             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   25224             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   25225             :         // (intrinsic_wo_chain:{ *:[v4i16] } 346:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)  =>  (UQRSHLv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
   25226             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQRSHLv4i16,
   25227             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25228             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25229             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25230             :         GIR_EraseFromParent, /*InsnID*/0,
   25231             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25232             :         // GIR_Coverage, 1132,
   25233             :         GIR_Done,
   25234             :       // Label 1584: @61866
   25235             :       GIM_Try, /*On fail goto*//*Label 1585*/ 61918, // Rule ID 1133 //
   25236             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25237             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqrshl,
   25238             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   25239             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   25240             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   25241             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   25242             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   25243             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   25244             :         // (intrinsic_wo_chain:{ *:[v8i16] } 346:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)  =>  (UQRSHLv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
   25245             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQRSHLv8i16,
   25246             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25247             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25248             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25249             :         GIR_EraseFromParent, /*InsnID*/0,
   25250             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25251             :         // GIR_Coverage, 1133,
   25252             :         GIR_Done,
   25253             :       // Label 1585: @61918
   25254             :       GIM_Try, /*On fail goto*//*Label 1586*/ 61970, // Rule ID 1134 //
   25255             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25256             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqrshl,
   25257             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   25258             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   25259             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   25260             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   25261             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   25262             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   25263             :         // (intrinsic_wo_chain:{ *:[v2i32] } 346:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)  =>  (UQRSHLv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
   25264             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQRSHLv2i32,
   25265             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25266             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25267             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25268             :         GIR_EraseFromParent, /*InsnID*/0,
   25269             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25270             :         // GIR_Coverage, 1134,
   25271             :         GIR_Done,
   25272             :       // Label 1586: @61970
   25273             :       GIM_Try, /*On fail goto*//*Label 1587*/ 62022, // Rule ID 1135 //
   25274             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25275             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqrshl,
   25276             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   25277             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   25278             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   25279             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   25280             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   25281             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   25282             :         // (intrinsic_wo_chain:{ *:[v4i32] } 346:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (UQRSHLv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
   25283             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQRSHLv4i32,
   25284             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25285             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25286             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25287             :         GIR_EraseFromParent, /*InsnID*/0,
   25288             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25289             :         // GIR_Coverage, 1135,
   25290             :         GIR_Done,
   25291             :       // Label 1587: @62022
   25292             :       GIM_Try, /*On fail goto*//*Label 1588*/ 62074, // Rule ID 1136 //
   25293             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25294             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqrshl,
   25295             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   25296             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   25297             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
   25298             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   25299             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   25300             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   25301             :         // (intrinsic_wo_chain:{ *:[v2i64] } 346:{ *:[iPTR] }, V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)  =>  (UQRSHLv2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)
   25302             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQRSHLv2i64,
   25303             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25304             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25305             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25306             :         GIR_EraseFromParent, /*InsnID*/0,
   25307             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25308             :         // GIR_Coverage, 1136,
   25309             :         GIR_Done,
   25310             :       // Label 1588: @62074
   25311             :       GIM_Try, /*On fail goto*//*Label 1589*/ 62126, // Rule ID 1137 //
   25312             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25313             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqshl,
   25314             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   25315             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
   25316             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
   25317             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   25318             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   25319             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   25320             :         // (intrinsic_wo_chain:{ *:[v8i8] } 348:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (UQSHLv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
   25321             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQSHLv8i8,
   25322             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25323             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25324             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25325             :         GIR_EraseFromParent, /*InsnID*/0,
   25326             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25327             :         // GIR_Coverage, 1137,
   25328             :         GIR_Done,
   25329             :       // Label 1589: @62126
   25330             :       GIM_Try, /*On fail goto*//*Label 1590*/ 62178, // Rule ID 1138 //
   25331             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25332             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqshl,
   25333             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   25334             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   25335             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
   25336             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   25337             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   25338             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   25339             :         // (intrinsic_wo_chain:{ *:[v16i8] } 348:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (UQSHLv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
   25340             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQSHLv16i8,
   25341             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25342             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25343             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25344             :         GIR_EraseFromParent, /*InsnID*/0,
   25345             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25346             :         // GIR_Coverage, 1138,
   25347             :         GIR_Done,
   25348             :       // Label 1590: @62178
   25349             :       GIM_Try, /*On fail goto*//*Label 1591*/ 62230, // Rule ID 1139 //
   25350             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25351             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqshl,
   25352             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   25353             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   25354             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   25355             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   25356             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   25357             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   25358             :         // (intrinsic_wo_chain:{ *:[v4i16] } 348:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)  =>  (UQSHLv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
   25359             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQSHLv4i16,
   25360             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25361             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25362             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25363             :         GIR_EraseFromParent, /*InsnID*/0,
   25364             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25365             :         // GIR_Coverage, 1139,
   25366             :         GIR_Done,
   25367             :       // Label 1591: @62230
   25368             :       GIM_Try, /*On fail goto*//*Label 1592*/ 62282, // Rule ID 1140 //
   25369             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25370             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqshl,
   25371             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   25372             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   25373             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   25374             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   25375             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   25376             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   25377             :         // (intrinsic_wo_chain:{ *:[v8i16] } 348:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)  =>  (UQSHLv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
   25378             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQSHLv8i16,
   25379             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25380             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25381             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25382             :         GIR_EraseFromParent, /*InsnID*/0,
   25383             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25384             :         // GIR_Coverage, 1140,
   25385             :         GIR_Done,
   25386             :       // Label 1592: @62282
   25387             :       GIM_Try, /*On fail goto*//*Label 1593*/ 62334, // Rule ID 1141 //
   25388             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25389             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqshl,
   25390             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   25391             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   25392             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   25393             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   25394             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   25395             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   25396             :         // (intrinsic_wo_chain:{ *:[v2i32] } 348:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)  =>  (UQSHLv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
   25397             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQSHLv2i32,
   25398             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25399             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25400             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25401             :         GIR_EraseFromParent, /*InsnID*/0,
   25402             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25403             :         // GIR_Coverage, 1141,
   25404             :         GIR_Done,
   25405             :       // Label 1593: @62334
   25406             :       GIM_Try, /*On fail goto*//*Label 1594*/ 62386, // Rule ID 1142 //
   25407             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25408             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqshl,
   25409             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   25410             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   25411             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   25412             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   25413             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   25414             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   25415             :         // (intrinsic_wo_chain:{ *:[v4i32] } 348:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (UQSHLv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
   25416             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQSHLv4i32,
   25417             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25418             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25419             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25420             :         GIR_EraseFromParent, /*InsnID*/0,
   25421             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25422             :         // GIR_Coverage, 1142,
   25423             :         GIR_Done,
   25424             :       // Label 1594: @62386
   25425             :       GIM_Try, /*On fail goto*//*Label 1595*/ 62438, // Rule ID 1143 //
   25426             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25427             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqshl,
   25428             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   25429             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   25430             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
   25431             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   25432             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   25433             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   25434             :         // (intrinsic_wo_chain:{ *:[v2i64] } 348:{ *:[iPTR] }, V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)  =>  (UQSHLv2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)
   25435             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQSHLv2i64,
   25436             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25437             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25438             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25439             :         GIR_EraseFromParent, /*InsnID*/0,
   25440             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25441             :         // GIR_Coverage, 1143,
   25442             :         GIR_Done,
   25443             :       // Label 1595: @62438
   25444             :       GIM_Try, /*On fail goto*//*Label 1596*/ 62490, // Rule ID 1144 //
   25445             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25446             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqsub,
   25447             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   25448             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
   25449             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
   25450             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   25451             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   25452             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   25453             :         // (intrinsic_wo_chain:{ *:[v8i8] } 350:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (UQSUBv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
   25454             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQSUBv8i8,
   25455             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25456             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25457             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25458             :         GIR_EraseFromParent, /*InsnID*/0,
   25459             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25460             :         // GIR_Coverage, 1144,
   25461             :         GIR_Done,
   25462             :       // Label 1596: @62490
   25463             :       GIM_Try, /*On fail goto*//*Label 1597*/ 62542, // Rule ID 1145 //
   25464             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25465             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqsub,
   25466             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   25467             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   25468             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
   25469             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   25470             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   25471             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   25472             :         // (intrinsic_wo_chain:{ *:[v16i8] } 350:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (UQSUBv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
   25473             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQSUBv16i8,
   25474             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25475             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25476             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25477             :         GIR_EraseFromParent, /*InsnID*/0,
   25478             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25479             :         // GIR_Coverage, 1145,
   25480             :         GIR_Done,
   25481             :       // Label 1597: @62542
   25482             :       GIM_Try, /*On fail goto*//*Label 1598*/ 62594, // Rule ID 1146 //
   25483             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25484             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqsub,
   25485             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   25486             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   25487             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   25488             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   25489             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   25490             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   25491             :         // (intrinsic_wo_chain:{ *:[v4i16] } 350:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)  =>  (UQSUBv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
   25492             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQSUBv4i16,
   25493             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25494             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25495             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25496             :         GIR_EraseFromParent, /*InsnID*/0,
   25497             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25498             :         // GIR_Coverage, 1146,
   25499             :         GIR_Done,
   25500             :       // Label 1598: @62594
   25501             :       GIM_Try, /*On fail goto*//*Label 1599*/ 62646, // Rule ID 1147 //
   25502             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25503             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqsub,
   25504             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   25505             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   25506             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   25507             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   25508             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   25509             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   25510             :         // (intrinsic_wo_chain:{ *:[v8i16] } 350:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)  =>  (UQSUBv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
   25511             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQSUBv8i16,
   25512             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25513             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25514             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25515             :         GIR_EraseFromParent, /*InsnID*/0,
   25516             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25517             :         // GIR_Coverage, 1147,
   25518             :         GIR_Done,
   25519             :       // Label 1599: @62646
   25520             :       GIM_Try, /*On fail goto*//*Label 1600*/ 62698, // Rule ID 1148 //
   25521             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25522             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqsub,
   25523             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   25524             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   25525             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   25526             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   25527             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   25528             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   25529             :         // (intrinsic_wo_chain:{ *:[v2i32] } 350:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)  =>  (UQSUBv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
   25530             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQSUBv2i32,
   25531             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25532             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25533             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25534             :         GIR_EraseFromParent, /*InsnID*/0,
   25535             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25536             :         // GIR_Coverage, 1148,
   25537             :         GIR_Done,
   25538             :       // Label 1600: @62698
   25539             :       GIM_Try, /*On fail goto*//*Label 1601*/ 62750, // Rule ID 1149 //
   25540             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25541             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqsub,
   25542             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   25543             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   25544             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   25545             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   25546             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   25547             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   25548             :         // (intrinsic_wo_chain:{ *:[v4i32] } 350:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (UQSUBv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
   25549             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQSUBv4i32,
   25550             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25551             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25552             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25553             :         GIR_EraseFromParent, /*InsnID*/0,
   25554             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25555             :         // GIR_Coverage, 1149,
   25556             :         GIR_Done,
   25557             :       // Label 1601: @62750
   25558             :       GIM_Try, /*On fail goto*//*Label 1602*/ 62802, // Rule ID 1150 //
   25559             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25560             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqsub,
   25561             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   25562             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   25563             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
   25564             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   25565             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   25566             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   25567             :         // (intrinsic_wo_chain:{ *:[v2i64] } 350:{ *:[iPTR] }, V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)  =>  (UQSUBv2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)
   25568             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQSUBv2i64,
   25569             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25570             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25571             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25572             :         GIR_EraseFromParent, /*InsnID*/0,
   25573             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25574             :         // GIR_Coverage, 1150,
   25575             :         GIR_Done,
   25576             :       // Label 1602: @62802
   25577             :       GIM_Try, /*On fail goto*//*Label 1603*/ 62854, // Rule ID 1151 //
   25578             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25579             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_urhadd,
   25580             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   25581             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
   25582             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
   25583             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   25584             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   25585             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   25586             :         // (intrinsic_wo_chain:{ *:[v8i8] } 353:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (URHADDv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
   25587             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::URHADDv8i8,
   25588             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25589             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25590             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25591             :         GIR_EraseFromParent, /*InsnID*/0,
   25592             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25593             :         // GIR_Coverage, 1151,
   25594             :         GIR_Done,
   25595             :       // Label 1603: @62854
   25596             :       GIM_Try, /*On fail goto*//*Label 1604*/ 62906, // Rule ID 1152 //
   25597             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25598             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_urhadd,
   25599             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   25600             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   25601             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
   25602             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   25603             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   25604             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   25605             :         // (intrinsic_wo_chain:{ *:[v16i8] } 353:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (URHADDv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
   25606             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::URHADDv16i8,
   25607             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25608             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25609             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25610             :         GIR_EraseFromParent, /*InsnID*/0,
   25611             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25612             :         // GIR_Coverage, 1152,
   25613             :         GIR_Done,
   25614             :       // Label 1604: @62906
   25615             :       GIM_Try, /*On fail goto*//*Label 1605*/ 62958, // Rule ID 1153 //
   25616             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25617             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_urhadd,
   25618             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   25619             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   25620             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   25621             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   25622             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   25623             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   25624             :         // (intrinsic_wo_chain:{ *:[v4i16] } 353:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)  =>  (URHADDv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
   25625             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::URHADDv4i16,
   25626             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25627             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25628             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25629             :         GIR_EraseFromParent, /*InsnID*/0,
   25630             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25631             :         // GIR_Coverage, 1153,
   25632             :         GIR_Done,
   25633             :       // Label 1605: @62958
   25634             :       GIM_Try, /*On fail goto*//*Label 1606*/ 63010, // Rule ID 1154 //
   25635             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25636             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_urhadd,
   25637             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   25638             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   25639             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   25640             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   25641             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   25642             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   25643             :         // (intrinsic_wo_chain:{ *:[v8i16] } 353:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)  =>  (URHADDv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
   25644             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::URHADDv8i16,
   25645             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25646             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25647             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25648             :         GIR_EraseFromParent, /*InsnID*/0,
   25649             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25650             :         // GIR_Coverage, 1154,
   25651             :         GIR_Done,
   25652             :       // Label 1606: @63010
   25653             :       GIM_Try, /*On fail goto*//*Label 1607*/ 63062, // Rule ID 1155 //
   25654             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25655             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_urhadd,
   25656             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   25657             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   25658             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   25659             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   25660             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   25661             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   25662             :         // (intrinsic_wo_chain:{ *:[v2i32] } 353:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)  =>  (URHADDv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
   25663             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::URHADDv2i32,
   25664             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25665             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25666             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25667             :         GIR_EraseFromParent, /*InsnID*/0,
   25668             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25669             :         // GIR_Coverage, 1155,
   25670             :         GIR_Done,
   25671             :       // Label 1607: @63062
   25672             :       GIM_Try, /*On fail goto*//*Label 1608*/ 63114, // Rule ID 1156 //
   25673             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25674             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_urhadd,
   25675             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   25676             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   25677             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   25678             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   25679             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   25680             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   25681             :         // (intrinsic_wo_chain:{ *:[v4i32] } 353:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (URHADDv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
   25682             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::URHADDv4i32,
   25683             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25684             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25685             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25686             :         GIR_EraseFromParent, /*InsnID*/0,
   25687             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25688             :         // GIR_Coverage, 1156,
   25689             :         GIR_Done,
   25690             :       // Label 1608: @63114
   25691             :       GIM_Try, /*On fail goto*//*Label 1609*/ 63166, // Rule ID 1157 //
   25692             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25693             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_urshl,
   25694             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   25695             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
   25696             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
   25697             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   25698             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   25699             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   25700             :         // (intrinsic_wo_chain:{ *:[v8i8] } 354:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (URSHLv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
   25701             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::URSHLv8i8,
   25702             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25703             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25704             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25705             :         GIR_EraseFromParent, /*InsnID*/0,
   25706             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25707             :         // GIR_Coverage, 1157,
   25708             :         GIR_Done,
   25709             :       // Label 1609: @63166
   25710             :       GIM_Try, /*On fail goto*//*Label 1610*/ 63218, // Rule ID 1158 //
   25711             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25712             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_urshl,
   25713             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   25714             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   25715             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
   25716             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   25717             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   25718             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   25719             :         // (intrinsic_wo_chain:{ *:[v16i8] } 354:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (URSHLv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
   25720             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::URSHLv16i8,
   25721             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25722             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25723             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25724             :         GIR_EraseFromParent, /*InsnID*/0,
   25725             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25726             :         // GIR_Coverage, 1158,
   25727             :         GIR_Done,
   25728             :       // Label 1610: @63218
   25729             :       GIM_Try, /*On fail goto*//*Label 1611*/ 63270, // Rule ID 1159 //
   25730             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25731             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_urshl,
   25732             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   25733             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   25734             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   25735             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   25736             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   25737             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   25738             :         // (intrinsic_wo_chain:{ *:[v4i16] } 354:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)  =>  (URSHLv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
   25739             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::URSHLv4i16,
   25740             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25741             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25742             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25743             :         GIR_EraseFromParent, /*InsnID*/0,
   25744             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25745             :         // GIR_Coverage, 1159,
   25746             :         GIR_Done,
   25747             :       // Label 1611: @63270
   25748             :       GIM_Try, /*On fail goto*//*Label 1612*/ 63322, // Rule ID 1160 //
   25749             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25750             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_urshl,
   25751             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   25752             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   25753             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   25754             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   25755             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   25756             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   25757             :         // (intrinsic_wo_chain:{ *:[v8i16] } 354:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)  =>  (URSHLv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
   25758             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::URSHLv8i16,
   25759             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25760             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25761             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25762             :         GIR_EraseFromParent, /*InsnID*/0,
   25763             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25764             :         // GIR_Coverage, 1160,
   25765             :         GIR_Done,
   25766             :       // Label 1612: @63322
   25767             :       GIM_Try, /*On fail goto*//*Label 1613*/ 63374, // Rule ID 1161 //
   25768             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25769             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_urshl,
   25770             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   25771             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   25772             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   25773             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   25774             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   25775             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   25776             :         // (intrinsic_wo_chain:{ *:[v2i32] } 354:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)  =>  (URSHLv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
   25777             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::URSHLv2i32,
   25778             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25779             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25780             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25781             :         GIR_EraseFromParent, /*InsnID*/0,
   25782             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25783             :         // GIR_Coverage, 1161,
   25784             :         GIR_Done,
   25785             :       // Label 1613: @63374
   25786             :       GIM_Try, /*On fail goto*//*Label 1614*/ 63426, // Rule ID 1162 //
   25787             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25788             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_urshl,
   25789             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   25790             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   25791             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   25792             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   25793             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   25794             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   25795             :         // (intrinsic_wo_chain:{ *:[v4i32] } 354:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (URSHLv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
   25796             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::URSHLv4i32,
   25797             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25798             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25799             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25800             :         GIR_EraseFromParent, /*InsnID*/0,
   25801             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25802             :         // GIR_Coverage, 1162,
   25803             :         GIR_Done,
   25804             :       // Label 1614: @63426
   25805             :       GIM_Try, /*On fail goto*//*Label 1615*/ 63478, // Rule ID 1163 //
   25806             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25807             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_urshl,
   25808             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   25809             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   25810             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
   25811             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   25812             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   25813             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   25814             :         // (intrinsic_wo_chain:{ *:[v2i64] } 354:{ *:[iPTR] }, V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)  =>  (URSHLv2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)
   25815             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::URSHLv2i64,
   25816             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25817             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25818             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25819             :         GIR_EraseFromParent, /*InsnID*/0,
   25820             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25821             :         // GIR_Coverage, 1163,
   25822             :         GIR_Done,
   25823             :       // Label 1615: @63478
   25824             :       GIM_Try, /*On fail goto*//*Label 1616*/ 63530, // Rule ID 1164 //
   25825             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25826             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_ushl,
   25827             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   25828             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
   25829             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
   25830             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   25831             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   25832             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   25833             :         // (intrinsic_wo_chain:{ *:[v8i8] } 356:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (USHLv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
   25834             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USHLv8i8,
   25835             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25836             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25837             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25838             :         GIR_EraseFromParent, /*InsnID*/0,
   25839             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25840             :         // GIR_Coverage, 1164,
   25841             :         GIR_Done,
   25842             :       // Label 1616: @63530
   25843             :       GIM_Try, /*On fail goto*//*Label 1617*/ 63582, // Rule ID 1165 //
   25844             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25845             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_ushl,
   25846             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   25847             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   25848             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
   25849             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   25850             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   25851             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   25852             :         // (intrinsic_wo_chain:{ *:[v16i8] } 356:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (USHLv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
   25853             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USHLv16i8,
   25854             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25855             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25856             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25857             :         GIR_EraseFromParent, /*InsnID*/0,
   25858             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25859             :         // GIR_Coverage, 1165,
   25860             :         GIR_Done,
   25861             :       // Label 1617: @63582
   25862             :       GIM_Try, /*On fail goto*//*Label 1618*/ 63634, // Rule ID 1166 //
   25863             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25864             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_ushl,
   25865             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   25866             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   25867             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   25868             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   25869             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   25870             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   25871             :         // (intrinsic_wo_chain:{ *:[v4i16] } 356:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)  =>  (USHLv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
   25872             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USHLv4i16,
   25873             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25874             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25875             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25876             :         GIR_EraseFromParent, /*InsnID*/0,
   25877             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25878             :         // GIR_Coverage, 1166,
   25879             :         GIR_Done,
   25880             :       // Label 1618: @63634
   25881             :       GIM_Try, /*On fail goto*//*Label 1619*/ 63686, // Rule ID 1167 //
   25882             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25883             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_ushl,
   25884             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   25885             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   25886             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   25887             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   25888             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   25889             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   25890             :         // (intrinsic_wo_chain:{ *:[v8i16] } 356:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)  =>  (USHLv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
   25891             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USHLv8i16,
   25892             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25893             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25894             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25895             :         GIR_EraseFromParent, /*InsnID*/0,
   25896             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25897             :         // GIR_Coverage, 1167,
   25898             :         GIR_Done,
   25899             :       // Label 1619: @63686
   25900             :       GIM_Try, /*On fail goto*//*Label 1620*/ 63738, // Rule ID 1168 //
   25901             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25902             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_ushl,
   25903             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   25904             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   25905             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   25906             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   25907             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   25908             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   25909             :         // (intrinsic_wo_chain:{ *:[v2i32] } 356:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)  =>  (USHLv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
   25910             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USHLv2i32,
   25911             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25912             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25913             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25914             :         GIR_EraseFromParent, /*InsnID*/0,
   25915             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25916             :         // GIR_Coverage, 1168,
   25917             :         GIR_Done,
   25918             :       // Label 1620: @63738
   25919             :       GIM_Try, /*On fail goto*//*Label 1621*/ 63790, // Rule ID 1169 //
   25920             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25921             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_ushl,
   25922             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   25923             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   25924             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   25925             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   25926             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   25927             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   25928             :         // (intrinsic_wo_chain:{ *:[v4i32] } 356:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (USHLv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
   25929             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USHLv4i32,
   25930             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25931             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25932             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25933             :         GIR_EraseFromParent, /*InsnID*/0,
   25934             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25935             :         // GIR_Coverage, 1169,
   25936             :         GIR_Done,
   25937             :       // Label 1621: @63790
   25938             :       GIM_Try, /*On fail goto*//*Label 1622*/ 63842, // Rule ID 1170 //
   25939             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25940             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_ushl,
   25941             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   25942             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   25943             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
   25944             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   25945             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   25946             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   25947             :         // (intrinsic_wo_chain:{ *:[v2i64] } 356:{ *:[iPTR] }, V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)  =>  (USHLv2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)
   25948             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USHLv2i64,
   25949             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25950             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25951             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25952             :         GIR_EraseFromParent, /*InsnID*/0,
   25953             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25954             :         // GIR_Coverage, 1170,
   25955             :         GIR_Done,
   25956             :       // Label 1622: @63842
   25957             :       GIM_Try, /*On fail goto*//*Label 1623*/ 63894, // Rule ID 1200 //
   25958             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25959             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_sisd_fabd,
   25960             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   25961             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   25962             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   25963             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   25964             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   25965             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   25966             :         // (intrinsic_wo_chain:{ *:[f64] } 369:{ *:[iPTR] }, FPR64:{ *:[f64] }:$Rn, FPR64:{ *:[f64] }:$Rm)  =>  (FABD64:{ *:[f64] } FPR64:{ *:[f64] }:$Rn, FPR64:{ *:[f64] }:$Rm)
   25967             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FABD64,
   25968             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25969             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25970             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25971             :         GIR_EraseFromParent, /*InsnID*/0,
   25972             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25973             :         // GIR_Coverage, 1200,
   25974             :         GIR_Done,
   25975             :       // Label 1623: @63894
   25976             :       GIM_Try, /*On fail goto*//*Label 1624*/ 63946, // Rule ID 1201 //
   25977             :         GIM_CheckFeatures, GIFBS_HasNEON,
   25978             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_sisd_fabd,
   25979             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   25980             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   25981             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   25982             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   25983             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   25984             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR32RegClassID,
   25985             :         // (intrinsic_wo_chain:{ *:[f32] } 369:{ *:[iPTR] }, FPR32:{ *:[f32] }:$Rn, FPR32:{ *:[f32] }:$Rm)  =>  (FABD32:{ *:[f32] } FPR32:{ *:[f32] }:$Rn, FPR32:{ *:[f32] }:$Rm)
   25986             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FABD32,
   25987             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   25988             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   25989             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   25990             :         GIR_EraseFromParent, /*InsnID*/0,
   25991             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   25992             :         // GIR_Coverage, 1201,
   25993             :         GIR_Done,
   25994             :       // Label 1624: @63946
   25995             :       GIM_Try, /*On fail goto*//*Label 1625*/ 63998, // Rule ID 1202 //
   25996             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   25997             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_sisd_fabd,
   25998             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
   25999             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
   26000             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s16,
   26001             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR16RegClassID,
   26002             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR16RegClassID,
   26003             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR16RegClassID,
   26004             :         // (intrinsic_wo_chain:{ *:[f16] } 369:{ *:[iPTR] }, FPR16:{ *:[f16] }:$Rn, FPR16:{ *:[f16] }:$Rm)  =>  (FABD16:{ *:[f16] } FPR16:{ *:[f16] }:$Rn, FPR16:{ *:[f16] }:$Rm)
   26005             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FABD16,
   26006             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26007             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26008             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26009             :         GIR_EraseFromParent, /*InsnID*/0,
   26010             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26011             :         // GIR_Coverage, 1202,
   26012             :         GIR_Done,
   26013             :       // Label 1625: @63998
   26014             :       GIM_Try, /*On fail goto*//*Label 1626*/ 64050, // Rule ID 1203 //
   26015             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26016             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_facge,
   26017             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   26018             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   26019             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   26020             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   26021             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   26022             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   26023             :         // (intrinsic_wo_chain:{ *:[i64] } 221:{ *:[iPTR] }, FPR64:{ *:[f64] }:$Rn, FPR64:{ *:[f64] }:$Rm)  =>  (FACGE64:{ *:[i64] } FPR64:{ *:[f64] }:$Rn, FPR64:{ *:[f64] }:$Rm)
   26024             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FACGE64,
   26025             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26026             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26027             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26028             :         GIR_EraseFromParent, /*InsnID*/0,
   26029             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26030             :         // GIR_Coverage, 1203,
   26031             :         GIR_Done,
   26032             :       // Label 1626: @64050
   26033             :       GIM_Try, /*On fail goto*//*Label 1627*/ 64102, // Rule ID 1204 //
   26034             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26035             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_facge,
   26036             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   26037             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   26038             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   26039             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   26040             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   26041             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR32RegClassID,
   26042             :         // (intrinsic_wo_chain:{ *:[i32] } 221:{ *:[iPTR] }, FPR32:{ *:[f32] }:$Rn, FPR32:{ *:[f32] }:$Rm)  =>  (FACGE32:{ *:[i32] } FPR32:{ *:[f32] }:$Rn, FPR32:{ *:[f32] }:$Rm)
   26043             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FACGE32,
   26044             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26045             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26046             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26047             :         GIR_EraseFromParent, /*InsnID*/0,
   26048             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26049             :         // GIR_Coverage, 1204,
   26050             :         GIR_Done,
   26051             :       // Label 1627: @64102
   26052             :       GIM_Try, /*On fail goto*//*Label 1628*/ 64154, // Rule ID 1205 //
   26053             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26054             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_facgt,
   26055             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   26056             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   26057             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   26058             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   26059             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   26060             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   26061             :         // (intrinsic_wo_chain:{ *:[i64] } 222:{ *:[iPTR] }, FPR64:{ *:[f64] }:$Rn, FPR64:{ *:[f64] }:$Rm)  =>  (FACGT64:{ *:[i64] } FPR64:{ *:[f64] }:$Rn, FPR64:{ *:[f64] }:$Rm)
   26062             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FACGT64,
   26063             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26064             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26065             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26066             :         GIR_EraseFromParent, /*InsnID*/0,
   26067             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26068             :         // GIR_Coverage, 1205,
   26069             :         GIR_Done,
   26070             :       // Label 1628: @64154
   26071             :       GIM_Try, /*On fail goto*//*Label 1629*/ 64206, // Rule ID 1206 //
   26072             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26073             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_facgt,
   26074             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   26075             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   26076             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   26077             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   26078             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   26079             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR32RegClassID,
   26080             :         // (intrinsic_wo_chain:{ *:[i32] } 222:{ *:[iPTR] }, FPR32:{ *:[f32] }:$Rn, FPR32:{ *:[f32] }:$Rm)  =>  (FACGT32:{ *:[i32] } FPR32:{ *:[f32] }:$Rn, FPR32:{ *:[f32] }:$Rm)
   26081             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FACGT32,
   26082             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26083             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26084             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26085             :         GIR_EraseFromParent, /*InsnID*/0,
   26086             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26087             :         // GIR_Coverage, 1206,
   26088             :         GIR_Done,
   26089             :       // Label 1629: @64206
   26090             :       GIM_Try, /*On fail goto*//*Label 1630*/ 64258, // Rule ID 1213 //
   26091             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26092             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmulx,
   26093             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   26094             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   26095             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   26096             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   26097             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   26098             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   26099             :         // (intrinsic_wo_chain:{ *:[f64] } 247:{ *:[iPTR] }, FPR64:{ *:[f64] }:$Rn, FPR64:{ *:[f64] }:$Rm)  =>  (FMULX64:{ *:[f64] } FPR64:{ *:[f64] }:$Rn, FPR64:{ *:[f64] }:$Rm)
   26100             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMULX64,
   26101             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26102             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26103             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26104             :         GIR_EraseFromParent, /*InsnID*/0,
   26105             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26106             :         // GIR_Coverage, 1213,
   26107             :         GIR_Done,
   26108             :       // Label 1630: @64258
   26109             :       GIM_Try, /*On fail goto*//*Label 1631*/ 64310, // Rule ID 1214 //
   26110             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26111             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmulx,
   26112             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   26113             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   26114             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   26115             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   26116             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   26117             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR32RegClassID,
   26118             :         // (intrinsic_wo_chain:{ *:[f32] } 247:{ *:[iPTR] }, FPR32:{ *:[f32] }:$Rn, FPR32:{ *:[f32] }:$Rm)  =>  (FMULX32:{ *:[f32] } FPR32:{ *:[f32] }:$Rn, FPR32:{ *:[f32] }:$Rm)
   26119             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMULX32,
   26120             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26121             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26122             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26123             :         GIR_EraseFromParent, /*InsnID*/0,
   26124             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26125             :         // GIR_Coverage, 1214,
   26126             :         GIR_Done,
   26127             :       // Label 1631: @64310
   26128             :       GIM_Try, /*On fail goto*//*Label 1632*/ 64362, // Rule ID 1215 //
   26129             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   26130             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmulx,
   26131             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
   26132             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
   26133             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s16,
   26134             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR16RegClassID,
   26135             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR16RegClassID,
   26136             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR16RegClassID,
   26137             :         // (intrinsic_wo_chain:{ *:[f16] } 247:{ *:[iPTR] }, FPR16:{ *:[f16] }:$Rn, FPR16:{ *:[f16] }:$Rm)  =>  (FMULX16:{ *:[f16] } FPR16:{ *:[f16] }:$Rn, FPR16:{ *:[f16] }:$Rm)
   26138             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMULX16,
   26139             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26140             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26141             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26142             :         GIR_EraseFromParent, /*InsnID*/0,
   26143             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26144             :         // GIR_Coverage, 1215,
   26145             :         GIR_Done,
   26146             :       // Label 1632: @64362
   26147             :       GIM_Try, /*On fail goto*//*Label 1633*/ 64414, // Rule ID 1216 //
   26148             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26149             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frecps,
   26150             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   26151             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   26152             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   26153             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   26154             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   26155             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   26156             :         // (intrinsic_wo_chain:{ *:[f64] } 249:{ *:[iPTR] }, FPR64:{ *:[f64] }:$Rn, FPR64:{ *:[f64] }:$Rm)  =>  (FRECPS64:{ *:[f64] } FPR64:{ *:[f64] }:$Rn, FPR64:{ *:[f64] }:$Rm)
   26157             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRECPS64,
   26158             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26159             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26160             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26161             :         GIR_EraseFromParent, /*InsnID*/0,
   26162             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26163             :         // GIR_Coverage, 1216,
   26164             :         GIR_Done,
   26165             :       // Label 1633: @64414
   26166             :       GIM_Try, /*On fail goto*//*Label 1634*/ 64466, // Rule ID 1217 //
   26167             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26168             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frecps,
   26169             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   26170             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   26171             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   26172             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   26173             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   26174             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR32RegClassID,
   26175             :         // (intrinsic_wo_chain:{ *:[f32] } 249:{ *:[iPTR] }, FPR32:{ *:[f32] }:$Rn, FPR32:{ *:[f32] }:$Rm)  =>  (FRECPS32:{ *:[f32] } FPR32:{ *:[f32] }:$Rn, FPR32:{ *:[f32] }:$Rm)
   26176             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRECPS32,
   26177             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26178             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26179             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26180             :         GIR_EraseFromParent, /*InsnID*/0,
   26181             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26182             :         // GIR_Coverage, 1217,
   26183             :         GIR_Done,
   26184             :       // Label 1634: @64466
   26185             :       GIM_Try, /*On fail goto*//*Label 1635*/ 64518, // Rule ID 1218 //
   26186             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   26187             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frecps,
   26188             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
   26189             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
   26190             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s16,
   26191             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR16RegClassID,
   26192             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR16RegClassID,
   26193             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR16RegClassID,
   26194             :         // (intrinsic_wo_chain:{ *:[f16] } 249:{ *:[iPTR] }, FPR16:{ *:[f16] }:$Rn, FPR16:{ *:[f16] }:$Rm)  =>  (FRECPS16:{ *:[f16] } FPR16:{ *:[f16] }:$Rn, FPR16:{ *:[f16] }:$Rm)
   26195             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRECPS16,
   26196             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26197             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26198             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26199             :         GIR_EraseFromParent, /*InsnID*/0,
   26200             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26201             :         // GIR_Coverage, 1218,
   26202             :         GIR_Done,
   26203             :       // Label 1635: @64518
   26204             :       GIM_Try, /*On fail goto*//*Label 1636*/ 64570, // Rule ID 1219 //
   26205             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26206             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frsqrts,
   26207             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   26208             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   26209             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   26210             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   26211             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   26212             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   26213             :         // (intrinsic_wo_chain:{ *:[f64] } 253:{ *:[iPTR] }, FPR64:{ *:[f64] }:$Rn, FPR64:{ *:[f64] }:$Rm)  =>  (FRSQRTS64:{ *:[f64] } FPR64:{ *:[f64] }:$Rn, FPR64:{ *:[f64] }:$Rm)
   26214             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRSQRTS64,
   26215             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26216             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26217             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26218             :         GIR_EraseFromParent, /*InsnID*/0,
   26219             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26220             :         // GIR_Coverage, 1219,
   26221             :         GIR_Done,
   26222             :       // Label 1636: @64570
   26223             :       GIM_Try, /*On fail goto*//*Label 1637*/ 64622, // Rule ID 1220 //
   26224             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26225             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frsqrts,
   26226             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   26227             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   26228             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   26229             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   26230             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   26231             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR32RegClassID,
   26232             :         // (intrinsic_wo_chain:{ *:[f32] } 253:{ *:[iPTR] }, FPR32:{ *:[f32] }:$Rn, FPR32:{ *:[f32] }:$Rm)  =>  (FRSQRTS32:{ *:[f32] } FPR32:{ *:[f32] }:$Rn, FPR32:{ *:[f32] }:$Rm)
   26233             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRSQRTS32,
   26234             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26235             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26236             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26237             :         GIR_EraseFromParent, /*InsnID*/0,
   26238             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26239             :         // GIR_Coverage, 1220,
   26240             :         GIR_Done,
   26241             :       // Label 1637: @64622
   26242             :       GIM_Try, /*On fail goto*//*Label 1638*/ 64674, // Rule ID 1221 //
   26243             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   26244             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frsqrts,
   26245             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
   26246             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
   26247             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s16,
   26248             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR16RegClassID,
   26249             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR16RegClassID,
   26250             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR16RegClassID,
   26251             :         // (intrinsic_wo_chain:{ *:[f16] } 253:{ *:[iPTR] }, FPR16:{ *:[f16] }:$Rn, FPR16:{ *:[f16] }:$Rm)  =>  (FRSQRTS16:{ *:[f16] } FPR16:{ *:[f16] }:$Rn, FPR16:{ *:[f16] }:$Rm)
   26252             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRSQRTS16,
   26253             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26254             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26255             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26256             :         GIR_EraseFromParent, /*InsnID*/0,
   26257             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26258             :         // GIR_Coverage, 1221,
   26259             :         GIR_Done,
   26260             :       // Label 1638: @64674
   26261             :       GIM_Try, /*On fail goto*//*Label 1639*/ 64726, // Rule ID 1222 //
   26262             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26263             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqadd,
   26264             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   26265             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   26266             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   26267             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   26268             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   26269             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   26270             :         // (intrinsic_wo_chain:{ *:[v1i64] } 292:{ *:[iPTR] }, FPR64:{ *:[v1i64] }:$Rn, FPR64:{ *:[v1i64] }:$Rm)  =>  (SQADDv1i64:{ *:[v1i64] } FPR64:{ *:[v1i64] }:$Rn, FPR64:{ *:[v1i64] }:$Rm)
   26271             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQADDv1i64,
   26272             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26273             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26274             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26275             :         GIR_EraseFromParent, /*InsnID*/0,
   26276             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26277             :         // GIR_Coverage, 1222,
   26278             :         GIR_Done,
   26279             :       // Label 1639: @64726
   26280             :       GIM_Try, /*On fail goto*//*Label 1640*/ 64778, // Rule ID 1223 //
   26281             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26282             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqdmulh,
   26283             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   26284             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   26285             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   26286             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   26287             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   26288             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR32RegClassID,
   26289             :         // (intrinsic_wo_chain:{ *:[i32] } 293:{ *:[iPTR] }, FPR32:{ *:[i32] }:$Rn, FPR32:{ *:[i32] }:$Rm)  =>  (SQDMULHv1i32:{ *:[i32] } FPR32:{ *:[i32] }:$Rn, FPR32:{ *:[i32] }:$Rm)
   26290             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQDMULHv1i32,
   26291             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26292             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26293             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26294             :         GIR_EraseFromParent, /*InsnID*/0,
   26295             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26296             :         // GIR_Coverage, 1223,
   26297             :         GIR_Done,
   26298             :       // Label 1640: @64778
   26299             :       GIM_Try, /*On fail goto*//*Label 1641*/ 64830, // Rule ID 1224 //
   26300             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26301             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqrdmulh,
   26302             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   26303             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   26304             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   26305             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   26306             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   26307             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR32RegClassID,
   26308             :         // (intrinsic_wo_chain:{ *:[i32] } 297:{ *:[iPTR] }, FPR32:{ *:[i32] }:$Rn, FPR32:{ *:[i32] }:$Rm)  =>  (SQRDMULHv1i32:{ *:[i32] } FPR32:{ *:[i32] }:$Rn, FPR32:{ *:[i32] }:$Rm)
   26309             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRDMULHv1i32,
   26310             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26311             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26312             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26313             :         GIR_EraseFromParent, /*InsnID*/0,
   26314             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26315             :         // GIR_Coverage, 1224,
   26316             :         GIR_Done,
   26317             :       // Label 1641: @64830
   26318             :       GIM_Try, /*On fail goto*//*Label 1642*/ 64882, // Rule ID 1225 //
   26319             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26320             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqrshl,
   26321             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   26322             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   26323             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   26324             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   26325             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   26326             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   26327             :         // (intrinsic_wo_chain:{ *:[v1i64] } 298:{ *:[iPTR] }, FPR64:{ *:[v1i64] }:$Rn, FPR64:{ *:[v1i64] }:$Rm)  =>  (SQRSHLv1i64:{ *:[v1i64] } FPR64:{ *:[v1i64] }:$Rn, FPR64:{ *:[v1i64] }:$Rm)
   26328             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRSHLv1i64,
   26329             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26330             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26331             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26332             :         GIR_EraseFromParent, /*InsnID*/0,
   26333             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26334             :         // GIR_Coverage, 1225,
   26335             :         GIR_Done,
   26336             :       // Label 1642: @64882
   26337             :       GIM_Try, /*On fail goto*//*Label 1643*/ 64934, // Rule ID 1226 //
   26338             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26339             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqshl,
   26340             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   26341             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   26342             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   26343             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   26344             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   26345             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   26346             :         // (intrinsic_wo_chain:{ *:[v1i64] } 301:{ *:[iPTR] }, FPR64:{ *:[v1i64] }:$Rn, FPR64:{ *:[v1i64] }:$Rm)  =>  (SQSHLv1i64:{ *:[v1i64] } FPR64:{ *:[v1i64] }:$Rn, FPR64:{ *:[v1i64] }:$Rm)
   26347             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSHLv1i64,
   26348             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26349             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26350             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26351             :         GIR_EraseFromParent, /*InsnID*/0,
   26352             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26353             :         // GIR_Coverage, 1226,
   26354             :         GIR_Done,
   26355             :       // Label 1643: @64934
   26356             :       GIM_Try, /*On fail goto*//*Label 1644*/ 64986, // Rule ID 1227 //
   26357             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26358             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqsub,
   26359             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   26360             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   26361             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   26362             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   26363             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   26364             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   26365             :         // (intrinsic_wo_chain:{ *:[v1i64] } 305:{ *:[iPTR] }, FPR64:{ *:[v1i64] }:$Rn, FPR64:{ *:[v1i64] }:$Rm)  =>  (SQSUBv1i64:{ *:[v1i64] } FPR64:{ *:[v1i64] }:$Rn, FPR64:{ *:[v1i64] }:$Rm)
   26366             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSUBv1i64,
   26367             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26368             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26369             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26370             :         GIR_EraseFromParent, /*InsnID*/0,
   26371             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26372             :         // GIR_Coverage, 1227,
   26373             :         GIR_Done,
   26374             :       // Label 1644: @64986
   26375             :       GIM_Try, /*On fail goto*//*Label 1645*/ 65038, // Rule ID 1228 //
   26376             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26377             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_srshl,
   26378             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   26379             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   26380             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   26381             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   26382             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   26383             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   26384             :         // (intrinsic_wo_chain:{ *:[v1i64] } 309:{ *:[iPTR] }, FPR64:{ *:[v1i64] }:$Rn, FPR64:{ *:[v1i64] }:$Rm)  =>  (SRSHLv1i64:{ *:[v1i64] } FPR64:{ *:[v1i64] }:$Rn, FPR64:{ *:[v1i64] }:$Rm)
   26385             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRSHLv1i64,
   26386             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26387             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26388             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26389             :         GIR_EraseFromParent, /*InsnID*/0,
   26390             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26391             :         // GIR_Coverage, 1228,
   26392             :         GIR_Done,
   26393             :       // Label 1645: @65038
   26394             :       GIM_Try, /*On fail goto*//*Label 1646*/ 65090, // Rule ID 1229 //
   26395             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26396             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sshl,
   26397             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   26398             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   26399             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   26400             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   26401             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   26402             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   26403             :         // (intrinsic_wo_chain:{ *:[v1i64] } 310:{ *:[iPTR] }, FPR64:{ *:[v1i64] }:$Rn, FPR64:{ *:[v1i64] }:$Rm)  =>  (SSHLv1i64:{ *:[v1i64] } FPR64:{ *:[v1i64] }:$Rn, FPR64:{ *:[v1i64] }:$Rm)
   26404             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SSHLv1i64,
   26405             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26406             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26407             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26408             :         GIR_EraseFromParent, /*InsnID*/0,
   26409             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26410             :         // GIR_Coverage, 1229,
   26411             :         GIR_Done,
   26412             :       // Label 1646: @65090
   26413             :       GIM_Try, /*On fail goto*//*Label 1647*/ 65142, // Rule ID 1231 //
   26414             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26415             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqadd,
   26416             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   26417             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   26418             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   26419             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   26420             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   26421             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   26422             :         // (intrinsic_wo_chain:{ *:[v1i64] } 345:{ *:[iPTR] }, FPR64:{ *:[v1i64] }:$Rn, FPR64:{ *:[v1i64] }:$Rm)  =>  (UQADDv1i64:{ *:[v1i64] } FPR64:{ *:[v1i64] }:$Rn, FPR64:{ *:[v1i64] }:$Rm)
   26423             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQADDv1i64,
   26424             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26425             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26426             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26427             :         GIR_EraseFromParent, /*InsnID*/0,
   26428             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26429             :         // GIR_Coverage, 1231,
   26430             :         GIR_Done,
   26431             :       // Label 1647: @65142
   26432             :       GIM_Try, /*On fail goto*//*Label 1648*/ 65194, // Rule ID 1232 //
   26433             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26434             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqrshl,
   26435             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   26436             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   26437             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   26438             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   26439             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   26440             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   26441             :         // (intrinsic_wo_chain:{ *:[v1i64] } 346:{ *:[iPTR] }, FPR64:{ *:[v1i64] }:$Rn, FPR64:{ *:[v1i64] }:$Rm)  =>  (UQRSHLv1i64:{ *:[v1i64] } FPR64:{ *:[v1i64] }:$Rn, FPR64:{ *:[v1i64] }:$Rm)
   26442             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQRSHLv1i64,
   26443             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26444             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26445             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26446             :         GIR_EraseFromParent, /*InsnID*/0,
   26447             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26448             :         // GIR_Coverage, 1232,
   26449             :         GIR_Done,
   26450             :       // Label 1648: @65194
   26451             :       GIM_Try, /*On fail goto*//*Label 1649*/ 65246, // Rule ID 1233 //
   26452             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26453             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqshl,
   26454             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   26455             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   26456             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   26457             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   26458             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   26459             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   26460             :         // (intrinsic_wo_chain:{ *:[v1i64] } 348:{ *:[iPTR] }, FPR64:{ *:[v1i64] }:$Rn, FPR64:{ *:[v1i64] }:$Rm)  =>  (UQSHLv1i64:{ *:[v1i64] } FPR64:{ *:[v1i64] }:$Rn, FPR64:{ *:[v1i64] }:$Rm)
   26461             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQSHLv1i64,
   26462             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26463             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26464             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26465             :         GIR_EraseFromParent, /*InsnID*/0,
   26466             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26467             :         // GIR_Coverage, 1233,
   26468             :         GIR_Done,
   26469             :       // Label 1649: @65246
   26470             :       GIM_Try, /*On fail goto*//*Label 1650*/ 65298, // Rule ID 1234 //
   26471             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26472             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqsub,
   26473             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   26474             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   26475             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   26476             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   26477             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   26478             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   26479             :         // (intrinsic_wo_chain:{ *:[v1i64] } 350:{ *:[iPTR] }, FPR64:{ *:[v1i64] }:$Rn, FPR64:{ *:[v1i64] }:$Rm)  =>  (UQSUBv1i64:{ *:[v1i64] } FPR64:{ *:[v1i64] }:$Rn, FPR64:{ *:[v1i64] }:$Rm)
   26480             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQSUBv1i64,
   26481             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26482             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26483             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26484             :         GIR_EraseFromParent, /*InsnID*/0,
   26485             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26486             :         // GIR_Coverage, 1234,
   26487             :         GIR_Done,
   26488             :       // Label 1650: @65298
   26489             :       GIM_Try, /*On fail goto*//*Label 1651*/ 65350, // Rule ID 1235 //
   26490             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26491             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_urshl,
   26492             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   26493             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   26494             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   26495             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   26496             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   26497             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   26498             :         // (intrinsic_wo_chain:{ *:[v1i64] } 354:{ *:[iPTR] }, FPR64:{ *:[v1i64] }:$Rn, FPR64:{ *:[v1i64] }:$Rm)  =>  (URSHLv1i64:{ *:[v1i64] } FPR64:{ *:[v1i64] }:$Rn, FPR64:{ *:[v1i64] }:$Rm)
   26499             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::URSHLv1i64,
   26500             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26501             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26502             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26503             :         GIR_EraseFromParent, /*InsnID*/0,
   26504             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26505             :         // GIR_Coverage, 1235,
   26506             :         GIR_Done,
   26507             :       // Label 1651: @65350
   26508             :       GIM_Try, /*On fail goto*//*Label 1652*/ 65402, // Rule ID 1236 //
   26509             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26510             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_ushl,
   26511             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   26512             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   26513             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   26514             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   26515             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   26516             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   26517             :         // (intrinsic_wo_chain:{ *:[v1i64] } 356:{ *:[iPTR] }, FPR64:{ *:[v1i64] }:$Rn, FPR64:{ *:[v1i64] }:$Rm)  =>  (USHLv1i64:{ *:[v1i64] } FPR64:{ *:[v1i64] }:$Rn, FPR64:{ *:[v1i64] }:$Rm)
   26518             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USHLv1i64,
   26519             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26520             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26521             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26522             :         GIR_EraseFromParent, /*InsnID*/0,
   26523             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26524             :         // GIR_Coverage, 1236,
   26525             :         GIR_Done,
   26526             :       // Label 1652: @65402
   26527             :       GIM_Try, /*On fail goto*//*Label 1653*/ 65454, // Rule ID 1237 //
   26528             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26529             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqdmulls_scalar,
   26530             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   26531             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   26532             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   26533             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   26534             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   26535             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR32RegClassID,
   26536             :         // (intrinsic_wo_chain:{ *:[i64] } 295:{ *:[iPTR] }, FPR32:{ *:[i32] }:$Rn, FPR32:{ *:[i32] }:$Rm)  =>  (SQDMULLi32:{ *:[i64] } FPR32:{ *:[i32] }:$Rn, FPR32:{ *:[i32] }:$Rm)
   26537             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQDMULLi32,
   26538             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26539             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26540             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26541             :         GIR_EraseFromParent, /*InsnID*/0,
   26542             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26543             :         // GIR_Coverage, 1237,
   26544             :         GIR_Done,
   26545             :       // Label 1653: @65454
   26546             :       GIM_Try, /*On fail goto*//*Label 1654*/ 65506, // Rule ID 1250 //
   26547             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26548             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_suqadd,
   26549             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   26550             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   26551             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   26552             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   26553             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   26554             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   26555             :         // (intrinsic_wo_chain:{ *:[i64] } 322:{ *:[iPTR] }, FPR64:{ *:[i64] }:$Rd, FPR64:{ *:[i64] }:$Rn)  =>  (SUQADDv1i64:{ *:[i64] } FPR64:{ *:[i64] }:$Rd, FPR64:{ *:[i64] }:$Rn)
   26556             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SUQADDv1i64,
   26557             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   26558             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   26559             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   26560             :         GIR_EraseFromParent, /*InsnID*/0,
   26561             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26562             :         // GIR_Coverage, 1250,
   26563             :         GIR_Done,
   26564             :       // Label 1654: @65506
   26565             :       GIM_Try, /*On fail goto*//*Label 1655*/ 65558, // Rule ID 1251 //
   26566             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26567             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_suqadd,
   26568             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   26569             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   26570             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   26571             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   26572             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   26573             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR32RegClassID,
   26574             :         // (intrinsic_wo_chain:{ *:[i32] } 322:{ *:[iPTR] }, FPR32:{ *:[i32] }:$Rd, FPR32:{ *:[i32] }:$Rn)  =>  (SUQADDv1i32:{ *:[i32] } FPR32:{ *:[i32] }:$Rd, FPR32:{ *:[i32] }:$Rn)
   26575             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SUQADDv1i32,
   26576             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   26577             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   26578             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   26579             :         GIR_EraseFromParent, /*InsnID*/0,
   26580             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26581             :         // GIR_Coverage, 1251,
   26582             :         GIR_Done,
   26583             :       // Label 1655: @65558
   26584             :       GIM_Try, /*On fail goto*//*Label 1656*/ 65610, // Rule ID 1256 //
   26585             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26586             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_usqadd,
   26587             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   26588             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   26589             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   26590             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   26591             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   26592             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   26593             :         // (intrinsic_wo_chain:{ *:[i64] } 358:{ *:[iPTR] }, FPR64:{ *:[i64] }:$Rd, FPR64:{ *:[i64] }:$Rn)  =>  (USQADDv1i64:{ *:[i64] } FPR64:{ *:[i64] }:$Rd, FPR64:{ *:[i64] }:$Rn)
   26594             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USQADDv1i64,
   26595             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   26596             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   26597             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   26598             :         GIR_EraseFromParent, /*InsnID*/0,
   26599             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26600             :         // GIR_Coverage, 1256,
   26601             :         GIR_Done,
   26602             :       // Label 1656: @65610
   26603             :       GIM_Try, /*On fail goto*//*Label 1657*/ 65662, // Rule ID 1257 //
   26604             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26605             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_usqadd,
   26606             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   26607             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   26608             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   26609             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   26610             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   26611             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR32RegClassID,
   26612             :         // (intrinsic_wo_chain:{ *:[i32] } 358:{ *:[iPTR] }, FPR32:{ *:[i32] }:$Rd, FPR32:{ *:[i32] }:$Rn)  =>  (USQADDv1i32:{ *:[i32] } FPR32:{ *:[i32] }:$Rd, FPR32:{ *:[i32] }:$Rn)
   26613             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USQADDv1i32,
   26614             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   26615             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   26616             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   26617             :         GIR_EraseFromParent, /*InsnID*/0,
   26618             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26619             :         // GIR_Coverage, 1257,
   26620             :         GIR_Done,
   26621             :       // Label 1657: @65662
   26622             :       GIM_Try, /*On fail goto*//*Label 1658*/ 65714, // Rule ID 1258 //
   26623             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26624             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_addhn,
   26625             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   26626             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   26627             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   26628             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   26629             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   26630             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   26631             :         // (intrinsic_wo_chain:{ *:[v8i8] } 217:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)  =>  (ADDHNv8i16_v8i8:{ *:[v8i8] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
   26632             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ADDHNv8i16_v8i8,
   26633             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26634             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26635             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26636             :         GIR_EraseFromParent, /*InsnID*/0,
   26637             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26638             :         // GIR_Coverage, 1258,
   26639             :         GIR_Done,
   26640             :       // Label 1658: @65714
   26641             :       GIM_Try, /*On fail goto*//*Label 1659*/ 65766, // Rule ID 1259 //
   26642             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26643             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_addhn,
   26644             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   26645             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   26646             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   26647             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   26648             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   26649             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   26650             :         // (intrinsic_wo_chain:{ *:[v4i16] } 217:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (ADDHNv4i32_v4i16:{ *:[v4i16] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
   26651             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ADDHNv4i32_v4i16,
   26652             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26653             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26654             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26655             :         GIR_EraseFromParent, /*InsnID*/0,
   26656             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26657             :         // GIR_Coverage, 1259,
   26658             :         GIR_Done,
   26659             :       // Label 1659: @65766
   26660             :       GIM_Try, /*On fail goto*//*Label 1660*/ 65818, // Rule ID 1260 //
   26661             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26662             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_addhn,
   26663             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   26664             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   26665             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
   26666             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   26667             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   26668             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   26669             :         // (intrinsic_wo_chain:{ *:[v2i32] } 217:{ *:[iPTR] }, V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)  =>  (ADDHNv2i64_v2i32:{ *:[v2i32] } V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)
   26670             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ADDHNv2i64_v2i32,
   26671             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26672             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26673             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26674             :         GIR_EraseFromParent, /*InsnID*/0,
   26675             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26676             :         // GIR_Coverage, 1260,
   26677             :         GIR_Done,
   26678             :       // Label 1660: @65818
   26679             :       GIM_Try, /*On fail goto*//*Label 1661*/ 65870, // Rule ID 1261 //
   26680             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26681             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_subhn,
   26682             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   26683             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   26684             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   26685             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   26686             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   26687             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   26688             :         // (intrinsic_wo_chain:{ *:[v8i8] } 321:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)  =>  (SUBHNv8i16_v8i8:{ *:[v8i8] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
   26689             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SUBHNv8i16_v8i8,
   26690             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26691             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26692             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26693             :         GIR_EraseFromParent, /*InsnID*/0,
   26694             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26695             :         // GIR_Coverage, 1261,
   26696             :         GIR_Done,
   26697             :       // Label 1661: @65870
   26698             :       GIM_Try, /*On fail goto*//*Label 1662*/ 65922, // Rule ID 1262 //
   26699             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26700             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_subhn,
   26701             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   26702             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   26703             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   26704             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   26705             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   26706             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   26707             :         // (intrinsic_wo_chain:{ *:[v4i16] } 321:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (SUBHNv4i32_v4i16:{ *:[v4i16] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
   26708             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SUBHNv4i32_v4i16,
   26709             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26710             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26711             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26712             :         GIR_EraseFromParent, /*InsnID*/0,
   26713             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26714             :         // GIR_Coverage, 1262,
   26715             :         GIR_Done,
   26716             :       // Label 1662: @65922
   26717             :       GIM_Try, /*On fail goto*//*Label 1663*/ 65974, // Rule ID 1263 //
   26718             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26719             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_subhn,
   26720             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   26721             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   26722             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
   26723             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   26724             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   26725             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   26726             :         // (intrinsic_wo_chain:{ *:[v2i32] } 321:{ *:[iPTR] }, V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)  =>  (SUBHNv2i64_v2i32:{ *:[v2i32] } V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)
   26727             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SUBHNv2i64_v2i32,
   26728             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26729             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26730             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26731             :         GIR_EraseFromParent, /*InsnID*/0,
   26732             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26733             :         // GIR_Coverage, 1263,
   26734             :         GIR_Done,
   26735             :       // Label 1663: @65974
   26736             :       GIM_Try, /*On fail goto*//*Label 1664*/ 66026, // Rule ID 1264 //
   26737             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26738             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_raddhn,
   26739             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   26740             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   26741             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   26742             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   26743             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   26744             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   26745             :         // (intrinsic_wo_chain:{ *:[v8i8] } 269:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)  =>  (RADDHNv8i16_v8i8:{ *:[v8i8] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
   26746             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::RADDHNv8i16_v8i8,
   26747             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26748             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26749             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26750             :         GIR_EraseFromParent, /*InsnID*/0,
   26751             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26752             :         // GIR_Coverage, 1264,
   26753             :         GIR_Done,
   26754             :       // Label 1664: @66026
   26755             :       GIM_Try, /*On fail goto*//*Label 1665*/ 66078, // Rule ID 1265 //
   26756             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26757             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_raddhn,
   26758             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   26759             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   26760             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   26761             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   26762             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   26763             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   26764             :         // (intrinsic_wo_chain:{ *:[v4i16] } 269:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (RADDHNv4i32_v4i16:{ *:[v4i16] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
   26765             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::RADDHNv4i32_v4i16,
   26766             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26767             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26768             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26769             :         GIR_EraseFromParent, /*InsnID*/0,
   26770             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26771             :         // GIR_Coverage, 1265,
   26772             :         GIR_Done,
   26773             :       // Label 1665: @66078
   26774             :       GIM_Try, /*On fail goto*//*Label 1666*/ 66130, // Rule ID 1266 //
   26775             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26776             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_raddhn,
   26777             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   26778             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   26779             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
   26780             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   26781             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   26782             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   26783             :         // (intrinsic_wo_chain:{ *:[v2i32] } 269:{ *:[iPTR] }, V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)  =>  (RADDHNv2i64_v2i32:{ *:[v2i32] } V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)
   26784             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::RADDHNv2i64_v2i32,
   26785             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26786             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26787             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26788             :         GIR_EraseFromParent, /*InsnID*/0,
   26789             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26790             :         // GIR_Coverage, 1266,
   26791             :         GIR_Done,
   26792             :       // Label 1666: @66130
   26793             :       GIM_Try, /*On fail goto*//*Label 1667*/ 66182, // Rule ID 1267 //
   26794             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26795             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_rsubhn,
   26796             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   26797             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   26798             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   26799             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   26800             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   26801             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   26802             :         // (intrinsic_wo_chain:{ *:[v8i8] } 272:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)  =>  (RSUBHNv8i16_v8i8:{ *:[v8i8] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
   26803             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::RSUBHNv8i16_v8i8,
   26804             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26805             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26806             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26807             :         GIR_EraseFromParent, /*InsnID*/0,
   26808             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26809             :         // GIR_Coverage, 1267,
   26810             :         GIR_Done,
   26811             :       // Label 1667: @66182
   26812             :       GIM_Try, /*On fail goto*//*Label 1668*/ 66234, // Rule ID 1268 //
   26813             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26814             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_rsubhn,
   26815             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   26816             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   26817             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   26818             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   26819             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   26820             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   26821             :         // (intrinsic_wo_chain:{ *:[v4i16] } 272:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (RSUBHNv4i32_v4i16:{ *:[v4i16] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
   26822             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::RSUBHNv4i32_v4i16,
   26823             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26824             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26825             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26826             :         GIR_EraseFromParent, /*InsnID*/0,
   26827             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26828             :         // GIR_Coverage, 1268,
   26829             :         GIR_Done,
   26830             :       // Label 1668: @66234
   26831             :       GIM_Try, /*On fail goto*//*Label 1669*/ 66286, // Rule ID 1269 //
   26832             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26833             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_rsubhn,
   26834             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   26835             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   26836             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
   26837             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   26838             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   26839             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   26840             :         // (intrinsic_wo_chain:{ *:[v2i32] } 272:{ *:[iPTR] }, V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)  =>  (RSUBHNv2i64_v2i32:{ *:[v2i32] } V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)
   26841             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::RSUBHNv2i64_v2i32,
   26842             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26843             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26844             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26845             :         GIR_EraseFromParent, /*InsnID*/0,
   26846             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26847             :         // GIR_Coverage, 1269,
   26848             :         GIR_Done,
   26849             :       // Label 1669: @66286
   26850             :       GIM_Try, /*On fail goto*//*Label 1670*/ 66338, // Rule ID 1270 //
   26851             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26852             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_pmull,
   26853             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   26854             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
   26855             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
   26856             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   26857             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   26858             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   26859             :         // (intrinsic_wo_chain:{ *:[v8i16] } 267:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (PMULLv8i8:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
   26860             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::PMULLv8i8,
   26861             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26862             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26863             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26864             :         GIR_EraseFromParent, /*InsnID*/0,
   26865             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26866             :         // GIR_Coverage, 1270,
   26867             :         GIR_Done,
   26868             :       // Label 1670: @66338
   26869             :       GIM_Try, /*On fail goto*//*Label 1671*/ 66390, // Rule ID 1307 //
   26870             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26871             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_smull,
   26872             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   26873             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
   26874             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
   26875             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   26876             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   26877             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   26878             :         // (intrinsic_wo_chain:{ *:[v8i16] } 290:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (SMULLv8i8_v8i16:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
   26879             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMULLv8i8_v8i16,
   26880             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26881             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26882             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26883             :         GIR_EraseFromParent, /*InsnID*/0,
   26884             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26885             :         // GIR_Coverage, 1307,
   26886             :         GIR_Done,
   26887             :       // Label 1671: @66390
   26888             :       GIM_Try, /*On fail goto*//*Label 1672*/ 66442, // Rule ID 1309 //
   26889             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26890             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_smull,
   26891             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   26892             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   26893             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   26894             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   26895             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   26896             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   26897             :         // (intrinsic_wo_chain:{ *:[v4i32] } 290:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)  =>  (SMULLv4i16_v4i32:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
   26898             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMULLv4i16_v4i32,
   26899             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26900             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26901             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26902             :         GIR_EraseFromParent, /*InsnID*/0,
   26903             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26904             :         // GIR_Coverage, 1309,
   26905             :         GIR_Done,
   26906             :       // Label 1672: @66442
   26907             :       GIM_Try, /*On fail goto*//*Label 1673*/ 66494, // Rule ID 1311 //
   26908             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26909             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_smull,
   26910             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   26911             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   26912             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   26913             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   26914             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   26915             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   26916             :         // (intrinsic_wo_chain:{ *:[v2i64] } 290:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)  =>  (SMULLv2i32_v2i64:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
   26917             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMULLv2i32_v2i64,
   26918             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26919             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26920             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26921             :         GIR_EraseFromParent, /*InsnID*/0,
   26922             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26923             :         // GIR_Coverage, 1311,
   26924             :         GIR_Done,
   26925             :       // Label 1673: @66494
   26926             :       GIM_Try, /*On fail goto*//*Label 1674*/ 66546, // Rule ID 1321 //
   26927             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26928             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqdmull,
   26929             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   26930             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   26931             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   26932             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   26933             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   26934             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   26935             :         // (intrinsic_wo_chain:{ *:[v4i32] } 294:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)  =>  (SQDMULLv4i16_v4i32:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
   26936             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQDMULLv4i16_v4i32,
   26937             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26938             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26939             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26940             :         GIR_EraseFromParent, /*InsnID*/0,
   26941             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26942             :         // GIR_Coverage, 1321,
   26943             :         GIR_Done,
   26944             :       // Label 1674: @66546
   26945             :       GIM_Try, /*On fail goto*//*Label 1675*/ 66598, // Rule ID 1323 //
   26946             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26947             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqdmull,
   26948             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   26949             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   26950             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   26951             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   26952             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   26953             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   26954             :         // (intrinsic_wo_chain:{ *:[v2i64] } 294:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)  =>  (SQDMULLv2i32_v2i64:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
   26955             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQDMULLv2i32_v2i64,
   26956             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26957             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26958             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26959             :         GIR_EraseFromParent, /*InsnID*/0,
   26960             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26961             :         // GIR_Coverage, 1323,
   26962             :         GIR_Done,
   26963             :       // Label 1675: @66598
   26964             :       GIM_Try, /*On fail goto*//*Label 1676*/ 66650, // Rule ID 1367 //
   26965             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26966             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_umull,
   26967             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   26968             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
   26969             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
   26970             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   26971             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   26972             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   26973             :         // (intrinsic_wo_chain:{ *:[v8i16] } 344:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (UMULLv8i8_v8i16:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
   26974             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMULLv8i8_v8i16,
   26975             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26976             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26977             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26978             :         GIR_EraseFromParent, /*InsnID*/0,
   26979             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26980             :         // GIR_Coverage, 1367,
   26981             :         GIR_Done,
   26982             :       // Label 1676: @66650
   26983             :       GIM_Try, /*On fail goto*//*Label 1677*/ 66702, // Rule ID 1369 //
   26984             :         GIM_CheckFeatures, GIFBS_HasNEON,
   26985             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_umull,
   26986             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   26987             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   26988             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   26989             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   26990             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   26991             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   26992             :         // (intrinsic_wo_chain:{ *:[v4i32] } 344:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)  =>  (UMULLv4i16_v4i32:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
   26993             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMULLv4i16_v4i32,
   26994             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   26995             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   26996             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   26997             :         GIR_EraseFromParent, /*InsnID*/0,
   26998             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   26999             :         // GIR_Coverage, 1369,
   27000             :         GIR_Done,
   27001             :       // Label 1677: @66702
   27002             :       GIM_Try, /*On fail goto*//*Label 1678*/ 66754, // Rule ID 1371 //
   27003             :         GIM_CheckFeatures, GIFBS_HasNEON,
   27004             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_umull,
   27005             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   27006             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   27007             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   27008             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   27009             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   27010             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   27011             :         // (intrinsic_wo_chain:{ *:[v2i64] } 344:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)  =>  (UMULLv2i32_v2i64:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
   27012             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMULLv2i32_v2i64,
   27013             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   27014             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   27015             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   27016             :         GIR_EraseFromParent, /*InsnID*/0,
   27017             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27018             :         // GIR_Coverage, 1371,
   27019             :         GIR_Done,
   27020             :       // Label 1678: @66754
   27021             :       GIM_Try, /*On fail goto*//*Label 1679*/ 66806, // Rule ID 1749 //
   27022             :         GIM_CheckFeatures, GIFBS_HasAES,
   27023             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_crypto_aese,
   27024             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   27025             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   27026             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
   27027             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   27028             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   27029             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   27030             :         // (intrinsic_wo_chain:{ *:[v16i8] } 194:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rd, V128:{ *:[v16i8] }:$Rn)  =>  (AESErr:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rd, V128:{ *:[v16i8] }:$Rn)
   27031             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::AESErr,
   27032             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   27033             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   27034             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   27035             :         GIR_EraseFromParent, /*InsnID*/0,
   27036             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27037             :         // GIR_Coverage, 1749,
   27038             :         GIR_Done,
   27039             :       // Label 1679: @66806
   27040             :       GIM_Try, /*On fail goto*//*Label 1680*/ 66858, // Rule ID 1750 //
   27041             :         GIM_CheckFeatures, GIFBS_HasAES,
   27042             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_crypto_aesd,
   27043             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   27044             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   27045             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
   27046             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   27047             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   27048             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   27049             :         // (intrinsic_wo_chain:{ *:[v16i8] } 193:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rd, V128:{ *:[v16i8] }:$Rn)  =>  (AESDrr:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rd, V128:{ *:[v16i8] }:$Rn)
   27050             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::AESDrr,
   27051             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   27052             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   27053             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   27054             :         GIR_EraseFromParent, /*InsnID*/0,
   27055             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27056             :         // GIR_Coverage, 1750,
   27057             :         GIR_Done,
   27058             :       // Label 1680: @66858
   27059             :       GIM_Try, /*On fail goto*//*Label 1681*/ 66910, // Rule ID 1761 //
   27060             :         GIM_CheckFeatures, GIFBS_HasSHA2,
   27061             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_crypto_sha1su1,
   27062             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   27063             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   27064             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   27065             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   27066             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   27067             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   27068             :         // (intrinsic_wo_chain:{ *:[v4i32] } 202:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rd, V128:{ *:[v4i32] }:$Rn)  =>  (SHA1SU1rr:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v4i32] }:$Rn)
   27069             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SHA1SU1rr,
   27070             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   27071             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   27072             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   27073             :         GIR_EraseFromParent, /*InsnID*/0,
   27074             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27075             :         // GIR_Coverage, 1761,
   27076             :         GIR_Done,
   27077             :       // Label 1681: @66910
   27078             :       GIM_Try, /*On fail goto*//*Label 1682*/ 66962, // Rule ID 1762 //
   27079             :         GIM_CheckFeatures, GIFBS_HasSHA2,
   27080             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_crypto_sha256su0,
   27081             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   27082             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   27083             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   27084             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   27085             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   27086             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   27087             :         // (intrinsic_wo_chain:{ *:[v4i32] } 205:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rd, V128:{ *:[v4i32] }:$Rn)  =>  (SHA256SU0rr:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v4i32] }:$Rn)
   27088             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SHA256SU0rr,
   27089             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   27090             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   27091             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   27092             :         GIR_EraseFromParent, /*InsnID*/0,
   27093             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27094             :         // GIR_Coverage, 1762,
   27095             :         GIR_Done,
   27096             :       // Label 1682: @66962
   27097             :       GIM_Try, /*On fail goto*//*Label 1683*/ 67014, // Rule ID 1796 //
   27098             :         GIM_CheckFeatures, GIFBS_HasNEON,
   27099             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqadd,
   27100             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   27101             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   27102             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   27103             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   27104             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   27105             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   27106             :         // (intrinsic_wo_chain:{ *:[i64] } 292:{ *:[iPTR] }, FPR64:{ *:[i64] }:$Rn, FPR64:{ *:[i64] }:$Rm)  =>  (SQADDv1i64:{ *:[i64] } FPR64:{ *:[i64] }:$Rn, FPR64:{ *:[i64] }:$Rm)
   27107             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQADDv1i64,
   27108             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   27109             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   27110             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   27111             :         GIR_EraseFromParent, /*InsnID*/0,
   27112             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27113             :         // GIR_Coverage, 1796,
   27114             :         GIR_Done,
   27115             :       // Label 1683: @67014
   27116             :       GIM_Try, /*On fail goto*//*Label 1684*/ 67066, // Rule ID 1797 //
   27117             :         GIM_CheckFeatures, GIFBS_HasNEON,
   27118             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqadd,
   27119             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   27120             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   27121             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   27122             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   27123             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   27124             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR32RegClassID,
   27125             :         // (intrinsic_wo_chain:{ *:[i32] } 292:{ *:[iPTR] }, FPR32:{ *:[i32] }:$Rn, FPR32:{ *:[i32] }:$Rm)  =>  (SQADDv1i32:{ *:[i32] } FPR32:{ *:[i32] }:$Rn, FPR32:{ *:[i32] }:$Rm)
   27126             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQADDv1i32,
   27127             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   27128             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   27129             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   27130             :         GIR_EraseFromParent, /*InsnID*/0,
   27131             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27132             :         // GIR_Coverage, 1797,
   27133             :         GIR_Done,
   27134             :       // Label 1684: @67066
   27135             :       GIM_Try, /*On fail goto*//*Label 1685*/ 67118, // Rule ID 1798 //
   27136             :         GIM_CheckFeatures, GIFBS_HasNEON,
   27137             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_sisd_fabd,
   27138             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   27139             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   27140             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   27141             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   27142             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   27143             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   27144             :         // (intrinsic_wo_chain:{ *:[v1f64] } 369:{ *:[iPTR] }, FPR64:{ *:[v1f64] }:$Rn, FPR64:{ *:[v1f64] }:$Rm)  =>  (FABD64:{ *:[v1f64] } FPR64:{ *:[v1f64] }:$Rn, FPR64:{ *:[v1f64] }:$Rm)
   27145             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FABD64,
   27146             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   27147             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   27148             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   27149             :         GIR_EraseFromParent, /*InsnID*/0,
   27150             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27151             :         // GIR_Coverage, 1798,
   27152             :         GIR_Done,
   27153             :       // Label 1685: @67118
   27154             :       GIM_Try, /*On fail goto*//*Label 1686*/ 67170, // Rule ID 1799 //
   27155             :         GIM_CheckFeatures, GIFBS_HasNEON,
   27156             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_facge,
   27157             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   27158             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   27159             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   27160             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   27161             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   27162             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   27163             :         // (intrinsic_wo_chain:{ *:[v1i64] } 221:{ *:[iPTR] }, FPR64:{ *:[v1f64] }:$Rn, FPR64:{ *:[v1f64] }:$Rm)  =>  (FACGE64:{ *:[v1i64] } FPR64:{ *:[v1f64] }:$Rn, FPR64:{ *:[v1f64] }:$Rm)
   27164             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FACGE64,
   27165             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   27166             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   27167             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   27168             :         GIR_EraseFromParent, /*InsnID*/0,
   27169             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27170             :         // GIR_Coverage, 1799,
   27171             :         GIR_Done,
   27172             :       // Label 1686: @67170
   27173             :       GIM_Try, /*On fail goto*//*Label 1687*/ 67222, // Rule ID 1804 //
   27174             :         GIM_CheckFeatures, GIFBS_HasNEON,
   27175             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_suqadd,
   27176             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   27177             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   27178             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   27179             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   27180             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   27181             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   27182             :         // (intrinsic_wo_chain:{ *:[v1i64] } 322:{ *:[iPTR] }, FPR64:{ *:[v1i64] }:$Rd, FPR64:{ *:[v1i64] }:$Rn)  =>  (SUQADDv1i64:{ *:[v1i64] } FPR64:{ *:[v1i64] }:$Rd, FPR64:{ *:[v1i64] }:$Rn)
   27183             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SUQADDv1i64,
   27184             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   27185             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   27186             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   27187             :         GIR_EraseFromParent, /*InsnID*/0,
   27188             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27189             :         // GIR_Coverage, 1804,
   27190             :         GIR_Done,
   27191             :       // Label 1687: @67222
   27192             :       GIM_Try, /*On fail goto*//*Label 1688*/ 67272, // Rule ID 1861 //
   27193             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_udiv,
   27194             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   27195             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   27196             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   27197             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   27198             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   27199             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR32RegClassID,
   27200             :         // (intrinsic_wo_chain:{ *:[i32] } 375:{ *:[iPTR] }, GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)  =>  (UDIVWr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
   27201             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UDIVWr,
   27202             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   27203             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   27204             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   27205             :         GIR_EraseFromParent, /*InsnID*/0,
   27206             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27207             :         // GIR_Coverage, 1861,
   27208             :         GIR_Done,
   27209             :       // Label 1688: @67272
   27210             :       GIM_Try, /*On fail goto*//*Label 1689*/ 67322, // Rule ID 1862 //
   27211             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_udiv,
   27212             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   27213             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   27214             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   27215             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   27216             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   27217             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR64RegClassID,
   27218             :         // (intrinsic_wo_chain:{ *:[i64] } 375:{ *:[iPTR] }, GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)  =>  (UDIVXr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
   27219             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UDIVXr,
   27220             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   27221             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   27222             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   27223             :         GIR_EraseFromParent, /*InsnID*/0,
   27224             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27225             :         // GIR_Coverage, 1862,
   27226             :         GIR_Done,
   27227             :       // Label 1689: @67322
   27228             :       GIM_Try, /*On fail goto*//*Label 1690*/ 67372, // Rule ID 1863 //
   27229             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_sdiv,
   27230             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   27231             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   27232             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   27233             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   27234             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
   27235             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR32RegClassID,
   27236             :         // (intrinsic_wo_chain:{ *:[i32] } 368:{ *:[iPTR] }, GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)  =>  (SDIVWr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
   27237             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SDIVWr,
   27238             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   27239             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   27240             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   27241             :         GIR_EraseFromParent, /*InsnID*/0,
   27242             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27243             :         // GIR_Coverage, 1863,
   27244             :         GIR_Done,
   27245             :       // Label 1690: @67372
   27246             :       GIM_Try, /*On fail goto*//*Label 1691*/ 67422, // Rule ID 1864 //
   27247             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_sdiv,
   27248             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   27249             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   27250             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   27251             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   27252             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   27253             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::GPR64RegClassID,
   27254             :         // (intrinsic_wo_chain:{ *:[i64] } 368:{ *:[iPTR] }, GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)  =>  (SDIVXr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
   27255             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SDIVXr,
   27256             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   27257             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   27258             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   27259             :         GIR_EraseFromParent, /*InsnID*/0,
   27260             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27261             :         // GIR_Coverage, 1864,
   27262             :         GIR_Done,
   27263             :       // Label 1691: @67422
   27264             :       GIM_Try, /*On fail goto*//*Label 1692*/ 67472, // Rule ID 2417 //
   27265             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fabd,
   27266             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   27267             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   27268             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   27269             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   27270             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   27271             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   27272             :         // (intrinsic_wo_chain:{ *:[v1f64] } 220:{ *:[iPTR] }, FPR64:{ *:[v1f64] }:$Rn, FPR64:{ *:[v1f64] }:$Rm)  =>  (FABD64:{ *:[v1f64] } FPR64:{ *:[v1f64] }:$Rn, FPR64:{ *:[v1f64] }:$Rm)
   27273             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FABD64,
   27274             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   27275             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   27276             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   27277             :         GIR_EraseFromParent, /*InsnID*/0,
   27278             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27279             :         // GIR_Coverage, 2417,
   27280             :         GIR_Done,
   27281             :       // Label 1692: @67472
   27282             :       GIM_Try, /*On fail goto*//*Label 1693*/ 67524, // Rule ID 2421 //
   27283             :         GIM_CheckFeatures, GIFBS_HasNEON,
   27284             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_facgt,
   27285             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   27286             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   27287             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   27288             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   27289             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   27290             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   27291             :         // (intrinsic_wo_chain:{ *:[v1i64] } 222:{ *:[iPTR] }, FPR64:{ *:[v1f64] }:$Rn, FPR64:{ *:[v1f64] }:$Rm)  =>  (FACGT64:{ *:[v1i64] } FPR64:{ *:[v1f64] }:$Rn, FPR64:{ *:[v1f64] }:$Rm)
   27292             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FACGT64,
   27293             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   27294             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   27295             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   27296             :         GIR_EraseFromParent, /*InsnID*/0,
   27297             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27298             :         // GIR_Coverage, 2421,
   27299             :         GIR_Done,
   27300             :       // Label 1693: @67524
   27301             :       GIM_Try, /*On fail goto*//*Label 1694*/ 67576, // Rule ID 2425 //
   27302             :         GIM_CheckFeatures, GIFBS_HasNEON,
   27303             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_fmulx,
   27304             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   27305             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   27306             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   27307             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   27308             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   27309             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   27310             :         // (intrinsic_wo_chain:{ *:[v1f64] } 247:{ *:[iPTR] }, FPR64:{ *:[v1f64] }:$Rn, FPR64:{ *:[v1f64] }:$Rm)  =>  (FMULX64:{ *:[v1f64] } FPR64:{ *:[v1f64] }:$Rn, FPR64:{ *:[v1f64] }:$Rm)
   27311             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMULX64,
   27312             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   27313             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   27314             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   27315             :         GIR_EraseFromParent, /*InsnID*/0,
   27316             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27317             :         // GIR_Coverage, 2425,
   27318             :         GIR_Done,
   27319             :       // Label 1694: @67576
   27320             :       GIM_Try, /*On fail goto*//*Label 1695*/ 67628, // Rule ID 2426 //
   27321             :         GIM_CheckFeatures, GIFBS_HasNEON,
   27322             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frecps,
   27323             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   27324             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   27325             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   27326             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   27327             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   27328             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   27329             :         // (intrinsic_wo_chain:{ *:[v1f64] } 249:{ *:[iPTR] }, FPR64:{ *:[v1f64] }:$Rn, FPR64:{ *:[v1f64] }:$Rm)  =>  (FRECPS64:{ *:[v1f64] } FPR64:{ *:[v1f64] }:$Rn, FPR64:{ *:[v1f64] }:$Rm)
   27330             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRECPS64,
   27331             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   27332             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   27333             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   27334             :         GIR_EraseFromParent, /*InsnID*/0,
   27335             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27336             :         // GIR_Coverage, 2426,
   27337             :         GIR_Done,
   27338             :       // Label 1695: @67628
   27339             :       GIM_Try, /*On fail goto*//*Label 1696*/ 67680, // Rule ID 2427 //
   27340             :         GIM_CheckFeatures, GIFBS_HasNEON,
   27341             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_frsqrts,
   27342             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   27343             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   27344             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   27345             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   27346             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   27347             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   27348             :         // (intrinsic_wo_chain:{ *:[v1f64] } 253:{ *:[iPTR] }, FPR64:{ *:[v1f64] }:$Rn, FPR64:{ *:[v1f64] }:$Rm)  =>  (FRSQRTS64:{ *:[v1f64] } FPR64:{ *:[v1f64] }:$Rn, FPR64:{ *:[v1f64] }:$Rm)
   27349             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FRSQRTS64,
   27350             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   27351             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   27352             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   27353             :         GIR_EraseFromParent, /*InsnID*/0,
   27354             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27355             :         // GIR_Coverage, 2427,
   27356             :         GIR_Done,
   27357             :       // Label 1696: @67680
   27358             :       GIM_Try, /*On fail goto*//*Label 1697*/ 67732, // Rule ID 2428 //
   27359             :         GIM_CheckFeatures, GIFBS_HasNEON,
   27360             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqrshl,
   27361             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   27362             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   27363             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   27364             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   27365             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   27366             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   27367             :         // (intrinsic_wo_chain:{ *:[i64] } 298:{ *:[iPTR] }, FPR64:{ *:[i64] }:$Rn, FPR64:{ *:[i64] }:$Rm)  =>  (SQRSHLv1i64:{ *:[i64] } FPR64:{ *:[i64] }:$Rn, FPR64:{ *:[i64] }:$Rm)
   27368             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRSHLv1i64,
   27369             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   27370             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   27371             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   27372             :         GIR_EraseFromParent, /*InsnID*/0,
   27373             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27374             :         // GIR_Coverage, 2428,
   27375             :         GIR_Done,
   27376             :       // Label 1697: @67732
   27377             :       GIM_Try, /*On fail goto*//*Label 1698*/ 67784, // Rule ID 2429 //
   27378             :         GIM_CheckFeatures, GIFBS_HasNEON,
   27379             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqrshl,
   27380             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   27381             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   27382             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   27383             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   27384             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   27385             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR32RegClassID,
   27386             :         // (intrinsic_wo_chain:{ *:[i32] } 298:{ *:[iPTR] }, FPR32:{ *:[i32] }:$Rn, FPR32:{ *:[i32] }:$Rm)  =>  (SQRSHLv1i32:{ *:[i32] } FPR32:{ *:[i32] }:$Rn, FPR32:{ *:[i32] }:$Rm)
   27387             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQRSHLv1i32,
   27388             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   27389             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   27390             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   27391             :         GIR_EraseFromParent, /*InsnID*/0,
   27392             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27393             :         // GIR_Coverage, 2429,
   27394             :         GIR_Done,
   27395             :       // Label 1698: @67784
   27396             :       GIM_Try, /*On fail goto*//*Label 1699*/ 67836, // Rule ID 2430 //
   27397             :         GIM_CheckFeatures, GIFBS_HasNEON,
   27398             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqshl,
   27399             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   27400             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   27401             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   27402             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   27403             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   27404             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   27405             :         // (intrinsic_wo_chain:{ *:[i64] } 301:{ *:[iPTR] }, FPR64:{ *:[i64] }:$Rn, FPR64:{ *:[i64] }:$Rm)  =>  (SQSHLv1i64:{ *:[i64] } FPR64:{ *:[i64] }:$Rn, FPR64:{ *:[i64] }:$Rm)
   27406             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSHLv1i64,
   27407             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   27408             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   27409             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   27410             :         GIR_EraseFromParent, /*InsnID*/0,
   27411             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27412             :         // GIR_Coverage, 2430,
   27413             :         GIR_Done,
   27414             :       // Label 1699: @67836
   27415             :       GIM_Try, /*On fail goto*//*Label 1700*/ 67888, // Rule ID 2431 //
   27416             :         GIM_CheckFeatures, GIFBS_HasNEON,
   27417             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqshl,
   27418             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   27419             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   27420             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   27421             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   27422             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   27423             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR32RegClassID,
   27424             :         // (intrinsic_wo_chain:{ *:[i32] } 301:{ *:[iPTR] }, FPR32:{ *:[i32] }:$Rn, FPR32:{ *:[i32] }:$Rm)  =>  (SQSHLv1i32:{ *:[i32] } FPR32:{ *:[i32] }:$Rn, FPR32:{ *:[i32] }:$Rm)
   27425             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSHLv1i32,
   27426             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   27427             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   27428             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   27429             :         GIR_EraseFromParent, /*InsnID*/0,
   27430             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27431             :         // GIR_Coverage, 2431,
   27432             :         GIR_Done,
   27433             :       // Label 1700: @67888
   27434             :       GIM_Try, /*On fail goto*//*Label 1701*/ 67940, // Rule ID 2432 //
   27435             :         GIM_CheckFeatures, GIFBS_HasNEON,
   27436             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqsub,
   27437             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   27438             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   27439             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   27440             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   27441             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   27442             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   27443             :         // (intrinsic_wo_chain:{ *:[i64] } 305:{ *:[iPTR] }, FPR64:{ *:[i64] }:$Rn, FPR64:{ *:[i64] }:$Rm)  =>  (SQSUBv1i64:{ *:[i64] } FPR64:{ *:[i64] }:$Rn, FPR64:{ *:[i64] }:$Rm)
   27444             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSUBv1i64,
   27445             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   27446             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   27447             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   27448             :         GIR_EraseFromParent, /*InsnID*/0,
   27449             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27450             :         // GIR_Coverage, 2432,
   27451             :         GIR_Done,
   27452             :       // Label 1701: @67940
   27453             :       GIM_Try, /*On fail goto*//*Label 1702*/ 67992, // Rule ID 2433 //
   27454             :         GIM_CheckFeatures, GIFBS_HasNEON,
   27455             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sqsub,
   27456             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   27457             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   27458             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   27459             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   27460             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   27461             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR32RegClassID,
   27462             :         // (intrinsic_wo_chain:{ *:[i32] } 305:{ *:[iPTR] }, FPR32:{ *:[i32] }:$Rn, FPR32:{ *:[i32] }:$Rm)  =>  (SQSUBv1i32:{ *:[i32] } FPR32:{ *:[i32] }:$Rn, FPR32:{ *:[i32] }:$Rm)
   27463             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SQSUBv1i32,
   27464             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   27465             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   27466             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   27467             :         GIR_EraseFromParent, /*InsnID*/0,
   27468             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27469             :         // GIR_Coverage, 2433,
   27470             :         GIR_Done,
   27471             :       // Label 1702: @67992
   27472             :       GIM_Try, /*On fail goto*//*Label 1703*/ 68044, // Rule ID 2434 //
   27473             :         GIM_CheckFeatures, GIFBS_HasNEON,
   27474             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqadd,
   27475             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   27476             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   27477             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   27478             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   27479             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   27480             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   27481             :         // (intrinsic_wo_chain:{ *:[i64] } 345:{ *:[iPTR] }, FPR64:{ *:[i64] }:$Rn, FPR64:{ *:[i64] }:$Rm)  =>  (UQADDv1i64:{ *:[i64] } FPR64:{ *:[i64] }:$Rn, FPR64:{ *:[i64] }:$Rm)
   27482             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQADDv1i64,
   27483             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   27484             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   27485             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   27486             :         GIR_EraseFromParent, /*InsnID*/0,
   27487             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27488             :         // GIR_Coverage, 2434,
   27489             :         GIR_Done,
   27490             :       // Label 1703: @68044
   27491             :       GIM_Try, /*On fail goto*//*Label 1704*/ 68096, // Rule ID 2435 //
   27492             :         GIM_CheckFeatures, GIFBS_HasNEON,
   27493             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqadd,
   27494             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   27495             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   27496             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   27497             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   27498             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   27499             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR32RegClassID,
   27500             :         // (intrinsic_wo_chain:{ *:[i32] } 345:{ *:[iPTR] }, FPR32:{ *:[i32] }:$Rn, FPR32:{ *:[i32] }:$Rm)  =>  (UQADDv1i32:{ *:[i32] } FPR32:{ *:[i32] }:$Rn, FPR32:{ *:[i32] }:$Rm)
   27501             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQADDv1i32,
   27502             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   27503             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   27504             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   27505             :         GIR_EraseFromParent, /*InsnID*/0,
   27506             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27507             :         // GIR_Coverage, 2435,
   27508             :         GIR_Done,
   27509             :       // Label 1704: @68096
   27510             :       GIM_Try, /*On fail goto*//*Label 1705*/ 68148, // Rule ID 2436 //
   27511             :         GIM_CheckFeatures, GIFBS_HasNEON,
   27512             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqrshl,
   27513             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   27514             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   27515             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   27516             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   27517             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   27518             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   27519             :         // (intrinsic_wo_chain:{ *:[i64] } 346:{ *:[iPTR] }, FPR64:{ *:[i64] }:$Rn, FPR64:{ *:[i64] }:$Rm)  =>  (UQRSHLv1i64:{ *:[i64] } FPR64:{ *:[i64] }:$Rn, FPR64:{ *:[i64] }:$Rm)
   27520             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQRSHLv1i64,
   27521             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   27522             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   27523             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   27524             :         GIR_EraseFromParent, /*InsnID*/0,
   27525             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27526             :         // GIR_Coverage, 2436,
   27527             :         GIR_Done,
   27528             :       // Label 1705: @68148
   27529             :       GIM_Try, /*On fail goto*//*Label 1706*/ 68200, // Rule ID 2437 //
   27530             :         GIM_CheckFeatures, GIFBS_HasNEON,
   27531             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqrshl,
   27532             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   27533             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   27534             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   27535             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   27536             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   27537             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR32RegClassID,
   27538             :         // (intrinsic_wo_chain:{ *:[i32] } 346:{ *:[iPTR] }, FPR32:{ *:[i32] }:$Rn, FPR32:{ *:[i32] }:$Rm)  =>  (UQRSHLv1i32:{ *:[i32] } FPR32:{ *:[i32] }:$Rn, FPR32:{ *:[i32] }:$Rm)
   27539             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQRSHLv1i32,
   27540             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   27541             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   27542             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   27543             :         GIR_EraseFromParent, /*InsnID*/0,
   27544             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27545             :         // GIR_Coverage, 2437,
   27546             :         GIR_Done,
   27547             :       // Label 1706: @68200
   27548             :       GIM_Try, /*On fail goto*//*Label 1707*/ 68252, // Rule ID 2438 //
   27549             :         GIM_CheckFeatures, GIFBS_HasNEON,
   27550             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqshl,
   27551             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   27552             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   27553             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   27554             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   27555             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   27556             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   27557             :         // (intrinsic_wo_chain:{ *:[i64] } 348:{ *:[iPTR] }, FPR64:{ *:[i64] }:$Rn, FPR64:{ *:[i64] }:$Rm)  =>  (UQSHLv1i64:{ *:[i64] } FPR64:{ *:[i64] }:$Rn, FPR64:{ *:[i64] }:$Rm)
   27558             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQSHLv1i64,
   27559             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   27560             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   27561             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   27562             :         GIR_EraseFromParent, /*InsnID*/0,
   27563             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27564             :         // GIR_Coverage, 2438,
   27565             :         GIR_Done,
   27566             :       // Label 1707: @68252
   27567             :       GIM_Try, /*On fail goto*//*Label 1708*/ 68304, // Rule ID 2439 //
   27568             :         GIM_CheckFeatures, GIFBS_HasNEON,
   27569             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqshl,
   27570             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   27571             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   27572             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   27573             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   27574             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   27575             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR32RegClassID,
   27576             :         // (intrinsic_wo_chain:{ *:[i32] } 348:{ *:[iPTR] }, FPR32:{ *:[i32] }:$Rn, FPR32:{ *:[i32] }:$Rm)  =>  (UQSHLv1i32:{ *:[i32] } FPR32:{ *:[i32] }:$Rn, FPR32:{ *:[i32] }:$Rm)
   27577             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQSHLv1i32,
   27578             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   27579             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   27580             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   27581             :         GIR_EraseFromParent, /*InsnID*/0,
   27582             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27583             :         // GIR_Coverage, 2439,
   27584             :         GIR_Done,
   27585             :       // Label 1708: @68304
   27586             :       GIM_Try, /*On fail goto*//*Label 1709*/ 68356, // Rule ID 2440 //
   27587             :         GIM_CheckFeatures, GIFBS_HasNEON,
   27588             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqsub,
   27589             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   27590             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   27591             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   27592             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   27593             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   27594             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   27595             :         // (intrinsic_wo_chain:{ *:[i64] } 350:{ *:[iPTR] }, FPR64:{ *:[i64] }:$Rn, FPR64:{ *:[i64] }:$Rm)  =>  (UQSUBv1i64:{ *:[i64] } FPR64:{ *:[i64] }:$Rn, FPR64:{ *:[i64] }:$Rm)
   27596             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQSUBv1i64,
   27597             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   27598             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   27599             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   27600             :         GIR_EraseFromParent, /*InsnID*/0,
   27601             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27602             :         // GIR_Coverage, 2440,
   27603             :         GIR_Done,
   27604             :       // Label 1709: @68356
   27605             :       GIM_Try, /*On fail goto*//*Label 1710*/ 68408, // Rule ID 2441 //
   27606             :         GIM_CheckFeatures, GIFBS_HasNEON,
   27607             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_uqsub,
   27608             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
   27609             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   27610             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   27611             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   27612             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   27613             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR32RegClassID,
   27614             :         // (intrinsic_wo_chain:{ *:[i32] } 350:{ *:[iPTR] }, FPR32:{ *:[i32] }:$Rn, FPR32:{ *:[i32] }:$Rm)  =>  (UQSUBv1i32:{ *:[i32] } FPR32:{ *:[i32] }:$Rn, FPR32:{ *:[i32] }:$Rm)
   27615             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UQSUBv1i32,
   27616             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   27617             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   27618             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   27619             :         GIR_EraseFromParent, /*InsnID*/0,
   27620             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27621             :         // GIR_Coverage, 2441,
   27622             :         GIR_Done,
   27623             :       // Label 1710: @68408
   27624             :       GIM_Try, /*On fail goto*//*Label 1711*/ 68460, // Rule ID 2456 //
   27625             :         GIM_CheckFeatures, GIFBS_HasNEON,
   27626             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_usqadd,
   27627             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   27628             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   27629             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   27630             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   27631             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   27632             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   27633             :         // (intrinsic_wo_chain:{ *:[v1i64] } 358:{ *:[iPTR] }, FPR64:{ *:[v1i64] }:$Rd, FPR64:{ *:[v1i64] }:$Rn)  =>  (USQADDv1i64:{ *:[v1i64] } FPR64:{ *:[v1i64] }:$Rd, FPR64:{ *:[v1i64] }:$Rn)
   27634             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USQADDv1i64,
   27635             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   27636             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   27637             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   27638             :         GIR_EraseFromParent, /*InsnID*/0,
   27639             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27640             :         // GIR_Coverage, 2456,
   27641             :         GIR_Done,
   27642             :       // Label 1711: @68460
   27643             :       GIM_Try, /*On fail goto*//*Label 1712*/ 68510, // Rule ID 2552 //
   27644             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_pmull64,
   27645             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   27646             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   27647             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   27648             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   27649             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   27650             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   27651             :         // (intrinsic_wo_chain:{ *:[v16i8] } 268:{ *:[iPTR] }, V64:{ *:[i64] }:$Rn, V64:{ *:[i64] }:$Rm)  =>  (PMULLv1i64:{ *:[v16i8] } V64:{ *:[i64] }:$Rn, V64:{ *:[i64] }:$Rm)
   27652             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::PMULLv1i64,
   27653             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   27654             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   27655             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   27656             :         GIR_EraseFromParent, /*InsnID*/0,
   27657             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27658             :         // GIR_Coverage, 2552,
   27659             :         GIR_Done,
   27660             :       // Label 1712: @68510
   27661             :       GIM_Try, /*On fail goto*//*Label 1713*/ 68560, // Rule ID 2608 //
   27662             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_tbl1,
   27663             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   27664             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   27665             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
   27666             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   27667             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   27668             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   27669             :         // (intrinsic_wo_chain:{ *:[v8i8] } 323:{ *:[iPTR] }, VecListOne128:{ *:[v16i8] }:$Rn, V64:{ *:[v8i8] }:$Ri)  =>  (TBLv8i8One:{ *:[v8i8] } VecListOne128:{ *:[v16i8] }:$Rn, V64:{ *:[v8i8] }:$Ri)
   27670             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::TBLv8i8One,
   27671             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Vd
   27672             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   27673             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Ri
   27674             :         GIR_EraseFromParent, /*InsnID*/0,
   27675             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27676             :         // GIR_Coverage, 2608,
   27677             :         GIR_Done,
   27678             :       // Label 1713: @68560
   27679             :       GIM_Try, /*On fail goto*//*Label 1714*/ 68610, // Rule ID 2609 //
   27680             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_tbl1,
   27681             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   27682             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   27683             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
   27684             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   27685             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   27686             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   27687             :         // (intrinsic_wo_chain:{ *:[v16i8] } 323:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Ri, V128:{ *:[v16i8] }:$Rn)  =>  (TBLv16i8One:{ *:[v16i8] } V128:{ *:[v16i8] }:$Ri, V128:{ *:[v16i8] }:$Rn)
   27688             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::TBLv16i8One,
   27689             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Vd
   27690             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Ri
   27691             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   27692             :         GIR_EraseFromParent, /*InsnID*/0,
   27693             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27694             :         // GIR_Coverage, 2609,
   27695             :         GIR_Done,
   27696             :       // Label 1714: @68610
   27697             :       GIM_Try, /*On fail goto*//*Label 1715*/ 68660, // Rule ID 3463 //
   27698             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sshl,
   27699             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   27700             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   27701             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   27702             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   27703             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   27704             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   27705             :         // (intrinsic_wo_chain:{ *:[i64] } 310:{ *:[iPTR] }, FPR64:{ *:[i64] }:$Rn, FPR64:{ *:[i64] }:$Rm)  =>  (SSHLv1i64:{ *:[i64] } FPR64:{ *:[i64] }:$Rn, FPR64:{ *:[i64] }:$Rm)
   27706             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SSHLv1i64,
   27707             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   27708             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   27709             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   27710             :         GIR_EraseFromParent, /*InsnID*/0,
   27711             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27712             :         // GIR_Coverage, 3463,
   27713             :         GIR_Done,
   27714             :       // Label 1715: @68660
   27715             :       GIM_Try, /*On fail goto*//*Label 1716*/ 68710, // Rule ID 3464 //
   27716             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_ushl,
   27717             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   27718             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   27719             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   27720             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   27721             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   27722             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   27723             :         // (intrinsic_wo_chain:{ *:[i64] } 356:{ *:[iPTR] }, FPR64:{ *:[i64] }:$Rn, FPR64:{ *:[i64] }:$Rm)  =>  (USHLv1i64:{ *:[i64] } FPR64:{ *:[i64] }:$Rn, FPR64:{ *:[i64] }:$Rm)
   27724             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USHLv1i64,
   27725             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   27726             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   27727             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   27728             :         GIR_EraseFromParent, /*InsnID*/0,
   27729             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27730             :         // GIR_Coverage, 3464,
   27731             :         GIR_Done,
   27732             :       // Label 1716: @68710
   27733             :       GIM_Try, /*On fail goto*//*Label 1717*/ 68760, // Rule ID 3465 //
   27734             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_srshl,
   27735             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   27736             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   27737             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   27738             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   27739             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   27740             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   27741             :         // (intrinsic_wo_chain:{ *:[i64] } 309:{ *:[iPTR] }, FPR64:{ *:[i64] }:$Rn, FPR64:{ *:[i64] }:$Rm)  =>  (SRSHLv1i64:{ *:[i64] } FPR64:{ *:[i64] }:$Rn, FPR64:{ *:[i64] }:$Rm)
   27742             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRSHLv1i64,
   27743             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   27744             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   27745             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   27746             :         GIR_EraseFromParent, /*InsnID*/0,
   27747             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27748             :         // GIR_Coverage, 3465,
   27749             :         GIR_Done,
   27750             :       // Label 1717: @68760
   27751             :       GIM_Try, /*On fail goto*//*Label 1718*/ 68810, // Rule ID 3466 //
   27752             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_urshl,
   27753             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   27754             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   27755             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   27756             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   27757             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   27758             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   27759             :         // (intrinsic_wo_chain:{ *:[i64] } 354:{ *:[iPTR] }, FPR64:{ *:[i64] }:$Rn, FPR64:{ *:[i64] }:$Rm)  =>  (URSHLv1i64:{ *:[i64] } FPR64:{ *:[i64] }:$Rn, FPR64:{ *:[i64] }:$Rm)
   27760             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::URSHLv1i64,
   27761             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   27762             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   27763             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rm
   27764             :         GIR_EraseFromParent, /*InsnID*/0,
   27765             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27766             :         // GIR_Coverage, 3466,
   27767             :         GIR_Done,
   27768             :       // Label 1718: @68810
   27769             :       GIM_Reject,
   27770             :     // Label 1293: @68811
   27771             :     GIM_Try, /*On fail goto*//*Label 1719*/ 70777,
   27772             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
   27773             :       GIM_Try, /*On fail goto*//*Label 1720*/ 68887, // Rule ID 1623 //
   27774             :         GIM_CheckFeatures, GIFBS_HasNEON,
   27775             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vsli,
   27776             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   27777             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
   27778             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
   27779             :         GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s32,
   27780             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   27781             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   27782             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   27783             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
   27784             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   27785             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftL8,
   27786             :         // MIs[1] Operand 1
   27787             :         // No operand predicates
   27788             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   27789             :         // (intrinsic_wo_chain:{ *:[v8i8] } 366:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rd, V64:{ *:[v8i8] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftL8>>:$imm)  =>  (SLIv8i8_shift:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rd, V64:{ *:[v8i8] }:$Rn, (imm:{ *:[i32] }):$imm)
   27790             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SLIv8i8_shift,
   27791             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   27792             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   27793             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   27794             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   27795             :         GIR_EraseFromParent, /*InsnID*/0,
   27796             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27797             :         // GIR_Coverage, 1623,
   27798             :         GIR_Done,
   27799             :       // Label 1720: @68887
   27800             :       GIM_Try, /*On fail goto*//*Label 1721*/ 68958, // Rule ID 1624 //
   27801             :         GIM_CheckFeatures, GIFBS_HasNEON,
   27802             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vsli,
   27803             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   27804             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   27805             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
   27806             :         GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s32,
   27807             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   27808             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   27809             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   27810             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
   27811             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   27812             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftL8,
   27813             :         // MIs[1] Operand 1
   27814             :         // No operand predicates
   27815             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   27816             :         // (intrinsic_wo_chain:{ *:[v16i8] } 366:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rd, V128:{ *:[v16i8] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftL8>>:$imm)  =>  (SLIv16i8_shift:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rd, V128:{ *:[v16i8] }:$Rn, (imm:{ *:[i32] }):$imm)
   27817             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SLIv16i8_shift,
   27818             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   27819             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   27820             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   27821             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   27822             :         GIR_EraseFromParent, /*InsnID*/0,
   27823             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27824             :         // GIR_Coverage, 1624,
   27825             :         GIR_Done,
   27826             :       // Label 1721: @68958
   27827             :       GIM_Try, /*On fail goto*//*Label 1722*/ 69029, // Rule ID 1625 //
   27828             :         GIM_CheckFeatures, GIFBS_HasNEON,
   27829             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vsli,
   27830             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   27831             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   27832             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   27833             :         GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s32,
   27834             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   27835             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   27836             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   27837             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
   27838             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   27839             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftL16,
   27840             :         // MIs[1] Operand 1
   27841             :         // No operand predicates
   27842             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   27843             :         // (intrinsic_wo_chain:{ *:[v4i16] } 366:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rd, V64:{ *:[v4i16] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftL16>>:$imm)  =>  (SLIv4i16_shift:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, V64:{ *:[v4i16] }:$Rn, (imm:{ *:[i32] }):$imm)
   27844             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SLIv4i16_shift,
   27845             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   27846             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   27847             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   27848             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   27849             :         GIR_EraseFromParent, /*InsnID*/0,
   27850             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27851             :         // GIR_Coverage, 1625,
   27852             :         GIR_Done,
   27853             :       // Label 1722: @69029
   27854             :       GIM_Try, /*On fail goto*//*Label 1723*/ 69100, // Rule ID 1626 //
   27855             :         GIM_CheckFeatures, GIFBS_HasNEON,
   27856             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vsli,
   27857             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   27858             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   27859             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   27860             :         GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s32,
   27861             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   27862             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   27863             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   27864             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
   27865             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   27866             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftL16,
   27867             :         // MIs[1] Operand 1
   27868             :         // No operand predicates
   27869             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   27870             :         // (intrinsic_wo_chain:{ *:[v8i16] } 366:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rd, V128:{ *:[v8i16] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftL16>>:$imm)  =>  (SLIv8i16_shift:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V128:{ *:[v8i16] }:$Rn, (imm:{ *:[i32] }):$imm)
   27871             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SLIv8i16_shift,
   27872             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   27873             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   27874             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   27875             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   27876             :         GIR_EraseFromParent, /*InsnID*/0,
   27877             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27878             :         // GIR_Coverage, 1626,
   27879             :         GIR_Done,
   27880             :       // Label 1723: @69100
   27881             :       GIM_Try, /*On fail goto*//*Label 1724*/ 69171, // Rule ID 1627 //
   27882             :         GIM_CheckFeatures, GIFBS_HasNEON,
   27883             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vsli,
   27884             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   27885             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   27886             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   27887             :         GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s32,
   27888             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   27889             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   27890             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   27891             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
   27892             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   27893             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftL32,
   27894             :         // MIs[1] Operand 1
   27895             :         // No operand predicates
   27896             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   27897             :         // (intrinsic_wo_chain:{ *:[v2i32] } 366:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rd, V64:{ *:[v2i32] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftL32>>:$imm)  =>  (SLIv2i32_shift:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, V64:{ *:[v2i32] }:$Rn, (imm:{ *:[i32] }):$imm)
   27898             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SLIv2i32_shift,
   27899             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   27900             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   27901             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   27902             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   27903             :         GIR_EraseFromParent, /*InsnID*/0,
   27904             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27905             :         // GIR_Coverage, 1627,
   27906             :         GIR_Done,
   27907             :       // Label 1724: @69171
   27908             :       GIM_Try, /*On fail goto*//*Label 1725*/ 69242, // Rule ID 1628 //
   27909             :         GIM_CheckFeatures, GIFBS_HasNEON,
   27910             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vsli,
   27911             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   27912             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   27913             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   27914             :         GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s32,
   27915             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   27916             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   27917             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   27918             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
   27919             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   27920             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftL32,
   27921             :         // MIs[1] Operand 1
   27922             :         // No operand predicates
   27923             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   27924             :         // (intrinsic_wo_chain:{ *:[v4i32] } 366:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rd, V128:{ *:[v4i32] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftL32>>:$imm)  =>  (SLIv4i32_shift:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v4i32] }:$Rn, (imm:{ *:[i32] }):$imm)
   27925             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SLIv4i32_shift,
   27926             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   27927             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   27928             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   27929             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   27930             :         GIR_EraseFromParent, /*InsnID*/0,
   27931             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27932             :         // GIR_Coverage, 1628,
   27933             :         GIR_Done,
   27934             :       // Label 1725: @69242
   27935             :       GIM_Try, /*On fail goto*//*Label 1726*/ 69313, // Rule ID 1629 //
   27936             :         GIM_CheckFeatures, GIFBS_HasNEON,
   27937             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vsli,
   27938             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   27939             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   27940             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
   27941             :         GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s32,
   27942             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   27943             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   27944             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   27945             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
   27946             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   27947             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftL64,
   27948             :         // MIs[1] Operand 1
   27949             :         // No operand predicates
   27950             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   27951             :         // (intrinsic_wo_chain:{ *:[v2i64] } 366:{ *:[iPTR] }, V128:{ *:[v2i64] }:$Rd, V128:{ *:[v2i64] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftL64>>:$imm)  =>  (SLIv2i64_shift:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V128:{ *:[v2i64] }:$Rn, (imm:{ *:[i32] }):$imm)
   27952             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SLIv2i64_shift,
   27953             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   27954             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   27955             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   27956             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   27957             :         GIR_EraseFromParent, /*InsnID*/0,
   27958             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27959             :         // GIR_Coverage, 1629,
   27960             :         GIR_Done,
   27961             :       // Label 1726: @69313
   27962             :       GIM_Try, /*On fail goto*//*Label 1727*/ 69384, // Rule ID 1656 //
   27963             :         GIM_CheckFeatures, GIFBS_HasNEON,
   27964             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vsri,
   27965             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   27966             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
   27967             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
   27968             :         GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s32,
   27969             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   27970             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   27971             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   27972             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
   27973             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   27974             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR8,
   27975             :         // MIs[1] Operand 1
   27976             :         // No operand predicates
   27977             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   27978             :         // (intrinsic_wo_chain:{ *:[v8i8] } 367:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rd, V64:{ *:[v8i8] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR8>>:$imm)  =>  (SRIv8i8_shift:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rd, V64:{ *:[v8i8] }:$Rn, (imm:{ *:[i32] }):$imm)
   27979             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRIv8i8_shift,
   27980             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   27981             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   27982             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   27983             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   27984             :         GIR_EraseFromParent, /*InsnID*/0,
   27985             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   27986             :         // GIR_Coverage, 1656,
   27987             :         GIR_Done,
   27988             :       // Label 1727: @69384
   27989             :       GIM_Try, /*On fail goto*//*Label 1728*/ 69455, // Rule ID 1657 //
   27990             :         GIM_CheckFeatures, GIFBS_HasNEON,
   27991             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vsri,
   27992             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   27993             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   27994             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
   27995             :         GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s32,
   27996             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   27997             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   27998             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   27999             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
   28000             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   28001             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR8,
   28002             :         // MIs[1] Operand 1
   28003             :         // No operand predicates
   28004             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   28005             :         // (intrinsic_wo_chain:{ *:[v16i8] } 367:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rd, V128:{ *:[v16i8] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR8>>:$imm)  =>  (SRIv16i8_shift:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rd, V128:{ *:[v16i8] }:$Rn, (imm:{ *:[i32] }):$imm)
   28006             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRIv16i8_shift,
   28007             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   28008             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   28009             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   28010             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   28011             :         GIR_EraseFromParent, /*InsnID*/0,
   28012             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28013             :         // GIR_Coverage, 1657,
   28014             :         GIR_Done,
   28015             :       // Label 1728: @69455
   28016             :       GIM_Try, /*On fail goto*//*Label 1729*/ 69526, // Rule ID 1658 //
   28017             :         GIM_CheckFeatures, GIFBS_HasNEON,
   28018             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vsri,
   28019             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s16,
   28020             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   28021             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   28022             :         GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s32,
   28023             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   28024             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   28025             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   28026             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
   28027             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   28028             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR16,
   28029             :         // MIs[1] Operand 1
   28030             :         // No operand predicates
   28031             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   28032             :         // (intrinsic_wo_chain:{ *:[v4i16] } 367:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rd, V64:{ *:[v4i16] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR16>>:$imm)  =>  (SRIv4i16_shift:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, V64:{ *:[v4i16] }:$Rn, (imm:{ *:[i32] }):$imm)
   28033             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRIv4i16_shift,
   28034             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   28035             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   28036             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   28037             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   28038             :         GIR_EraseFromParent, /*InsnID*/0,
   28039             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28040             :         // GIR_Coverage, 1658,
   28041             :         GIR_Done,
   28042             :       // Label 1729: @69526
   28043             :       GIM_Try, /*On fail goto*//*Label 1730*/ 69597, // Rule ID 1659 //
   28044             :         GIM_CheckFeatures, GIFBS_HasNEON,
   28045             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vsri,
   28046             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   28047             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   28048             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   28049             :         GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s32,
   28050             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   28051             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   28052             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   28053             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
   28054             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   28055             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR16,
   28056             :         // MIs[1] Operand 1
   28057             :         // No operand predicates
   28058             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   28059             :         // (intrinsic_wo_chain:{ *:[v8i16] } 367:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rd, V128:{ *:[v8i16] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR16>>:$imm)  =>  (SRIv8i16_shift:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V128:{ *:[v8i16] }:$Rn, (imm:{ *:[i32] }):$imm)
   28060             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRIv8i16_shift,
   28061             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   28062             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   28063             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   28064             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   28065             :         GIR_EraseFromParent, /*InsnID*/0,
   28066             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28067             :         // GIR_Coverage, 1659,
   28068             :         GIR_Done,
   28069             :       // Label 1730: @69597
   28070             :       GIM_Try, /*On fail goto*//*Label 1731*/ 69668, // Rule ID 1660 //
   28071             :         GIM_CheckFeatures, GIFBS_HasNEON,
   28072             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vsri,
   28073             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   28074             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   28075             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   28076             :         GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s32,
   28077             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   28078             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   28079             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   28080             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
   28081             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   28082             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR32,
   28083             :         // MIs[1] Operand 1
   28084             :         // No operand predicates
   28085             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   28086             :         // (intrinsic_wo_chain:{ *:[v2i32] } 367:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rd, V64:{ *:[v2i32] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR32>>:$imm)  =>  (SRIv2i32_shift:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, V64:{ *:[v2i32] }:$Rn, (imm:{ *:[i32] }):$imm)
   28087             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRIv2i32_shift,
   28088             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   28089             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   28090             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   28091             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   28092             :         GIR_EraseFromParent, /*InsnID*/0,
   28093             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28094             :         // GIR_Coverage, 1660,
   28095             :         GIR_Done,
   28096             :       // Label 1731: @69668
   28097             :       GIM_Try, /*On fail goto*//*Label 1732*/ 69739, // Rule ID 1661 //
   28098             :         GIM_CheckFeatures, GIFBS_HasNEON,
   28099             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vsri,
   28100             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   28101             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   28102             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   28103             :         GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s32,
   28104             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   28105             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   28106             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   28107             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
   28108             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   28109             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR32,
   28110             :         // MIs[1] Operand 1
   28111             :         // No operand predicates
   28112             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   28113             :         // (intrinsic_wo_chain:{ *:[v4i32] } 367:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rd, V128:{ *:[v4i32] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR32>>:$imm)  =>  (SRIv4i32_shift:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v4i32] }:$Rn, (imm:{ *:[i32] }):$imm)
   28114             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRIv4i32_shift,
   28115             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   28116             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   28117             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   28118             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   28119             :         GIR_EraseFromParent, /*InsnID*/0,
   28120             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28121             :         // GIR_Coverage, 1661,
   28122             :         GIR_Done,
   28123             :       // Label 1732: @69739
   28124             :       GIM_Try, /*On fail goto*//*Label 1733*/ 69810, // Rule ID 1662 //
   28125             :         GIM_CheckFeatures, GIFBS_HasNEON,
   28126             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vsri,
   28127             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   28128             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   28129             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
   28130             :         GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s32,
   28131             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   28132             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   28133             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   28134             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
   28135             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   28136             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR64,
   28137             :         // MIs[1] Operand 1
   28138             :         // No operand predicates
   28139             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   28140             :         // (intrinsic_wo_chain:{ *:[v2i64] } 367:{ *:[iPTR] }, V128:{ *:[v2i64] }:$Rd, V128:{ *:[v2i64] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR64>>:$imm)  =>  (SRIv2i64_shift:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V128:{ *:[v2i64] }:$Rn, (imm:{ *:[i32] }):$imm)
   28141             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRIv2i64_shift,
   28142             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   28143             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   28144             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   28145             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   28146             :         GIR_EraseFromParent, /*InsnID*/0,
   28147             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28148             :         // GIR_Coverage, 1662,
   28149             :         GIR_Done,
   28150             :       // Label 1733: @69810
   28151             :       GIM_Try, /*On fail goto*//*Label 1734*/ 69879, // Rule ID 2957 //
   28152             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vsli,
   28153             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   28154             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   28155             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   28156             :         GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s32,
   28157             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   28158             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   28159             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   28160             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
   28161             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   28162             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftL64,
   28163             :         // MIs[1] Operand 1
   28164             :         // No operand predicates
   28165             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   28166             :         // (intrinsic_wo_chain:{ *:[v1i64] } 366:{ *:[iPTR] }, FPR64:{ *:[v1i64] }:$Rd, FPR64:{ *:[v1i64] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftL64>>:$imm)  =>  (SLId:{ *:[v1i64] } FPR64:{ *:[v1i64] }:$Rd, FPR64:{ *:[v1i64] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftL64>>:$imm)
   28167             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SLId,
   28168             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   28169             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   28170             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   28171             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   28172             :         GIR_EraseFromParent, /*InsnID*/0,
   28173             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28174             :         // GIR_Coverage, 2957,
   28175             :         GIR_Done,
   28176             :       // Label 1734: @69879
   28177             :       GIM_Try, /*On fail goto*//*Label 1735*/ 69948, // Rule ID 2970 //
   28178             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vsri,
   28179             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
   28180             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   28181             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   28182             :         GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s32,
   28183             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   28184             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   28185             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   28186             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
   28187             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   28188             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_vecshiftR64,
   28189             :         // MIs[1] Operand 1
   28190             :         // No operand predicates
   28191             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   28192             :         // (intrinsic_wo_chain:{ *:[v1i64] } 367:{ *:[iPTR] }, FPR64:{ *:[v1i64] }:$Rd, FPR64:{ *:[v1i64] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR64>>:$imm)  =>  (SRId:{ *:[v1i64] } FPR64:{ *:[v1i64] }:$Rd, FPR64:{ *:[v1i64] }:$Rn, (imm:{ *:[i32] })<<P:Predicate_vecshiftR64>>:$imm)
   28193             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SRId,
   28194             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   28195             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   28196             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   28197             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   28198             :         GIR_EraseFromParent, /*InsnID*/0,
   28199             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28200             :         // GIR_Coverage, 2970,
   28201             :         GIR_Done,
   28202             :       // Label 1735: @69948
   28203             :       GIM_Try, /*On fail goto*//*Label 1736*/ 70012, // Rule ID 14 //
   28204             :         GIM_CheckFeatures, GIFBS_HasDotProd,
   28205             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sdot,
   28206             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   28207             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   28208             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
   28209             :         GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v8s8,
   28210             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   28211             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   28212             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   28213             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/AArch64::FPR64RegClassID,
   28214             :         // (intrinsic_wo_chain:{ *:[v2i32] } 280:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (SDOTv8i8:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
   28215             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SDOTv8i8,
   28216             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   28217             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   28218             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   28219             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // Rm
   28220             :         GIR_EraseFromParent, /*InsnID*/0,
   28221             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28222             :         // GIR_Coverage, 14,
   28223             :         GIR_Done,
   28224             :       // Label 1736: @70012
   28225             :       GIM_Try, /*On fail goto*//*Label 1737*/ 70076, // Rule ID 15 //
   28226             :         GIM_CheckFeatures, GIFBS_HasDotProd,
   28227             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_sdot,
   28228             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   28229             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   28230             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
   28231             :         GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v16s8,
   28232             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   28233             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   28234             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   28235             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/AArch64::FPR128RegClassID,
   28236             :         // (intrinsic_wo_chain:{ *:[v4i32] } 280:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rd, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (SDOTv16i8:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
   28237             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SDOTv16i8,
   28238             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   28239             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   28240             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   28241             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // Rm
   28242             :         GIR_EraseFromParent, /*InsnID*/0,
   28243             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28244             :         // GIR_Coverage, 15,
   28245             :         GIR_Done,
   28246             :       // Label 1737: @70076
   28247             :       GIM_Try, /*On fail goto*//*Label 1738*/ 70140, // Rule ID 16 //
   28248             :         GIM_CheckFeatures, GIFBS_HasDotProd,
   28249             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_udot,
   28250             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s32,
   28251             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   28252             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s8,
   28253             :         GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v8s8,
   28254             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   28255             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   28256             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   28257             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/AArch64::FPR64RegClassID,
   28258             :         // (intrinsic_wo_chain:{ *:[v2i32] } 335:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (UDOTv8i8:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
   28259             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UDOTv8i8,
   28260             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   28261             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   28262             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   28263             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // Rm
   28264             :         GIR_EraseFromParent, /*InsnID*/0,
   28265             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28266             :         // GIR_Coverage, 16,
   28267             :         GIR_Done,
   28268             :       // Label 1738: @70140
   28269             :       GIM_Try, /*On fail goto*//*Label 1739*/ 70204, // Rule ID 17 //
   28270             :         GIM_CheckFeatures, GIFBS_HasDotProd,
   28271             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_udot,
   28272             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   28273             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   28274             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
   28275             :         GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v16s8,
   28276             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   28277             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   28278             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   28279             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/AArch64::FPR128RegClassID,
   28280             :         // (intrinsic_wo_chain:{ *:[v4i32] } 335:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rd, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (UDOTv16i8:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
   28281             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UDOTv16i8,
   28282             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   28283             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   28284             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   28285             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // Rm
   28286             :         GIR_EraseFromParent, /*InsnID*/0,
   28287             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28288             :         // GIR_Coverage, 17,
   28289             :         GIR_Done,
   28290             :       // Label 1739: @70204
   28291             :       GIM_Try, /*On fail goto*//*Label 1740*/ 70268, // Rule ID 1753 //
   28292             :         GIM_CheckFeatures, GIFBS_HasSHA2,
   28293             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_crypto_sha1c,
   28294             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   28295             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   28296             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   28297             :         GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32,
   28298             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   28299             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   28300             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR32RegClassID,
   28301             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/AArch64::FPR128RegClassID,
   28302             :         // (intrinsic_wo_chain:{ *:[v4i32] } 197:{ *:[iPTR] }, FPR128:{ *:[v4i32] }:$Rd, FPR32:{ *:[i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (SHA1Crrr:{ *:[v4i32] } FPR128:{ *:[v4i32] }:$Rd, FPR32:{ *:[i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
   28303             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SHA1Crrr,
   28304             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   28305             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   28306             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   28307             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // Rm
   28308             :         GIR_EraseFromParent, /*InsnID*/0,
   28309             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28310             :         // GIR_Coverage, 1753,
   28311             :         GIR_Done,
   28312             :       // Label 1740: @70268
   28313             :       GIM_Try, /*On fail goto*//*Label 1741*/ 70332, // Rule ID 1754 //
   28314             :         GIM_CheckFeatures, GIFBS_HasSHA2,
   28315             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_crypto_sha1p,
   28316             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   28317             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   28318             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   28319             :         GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32,
   28320             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   28321             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   28322             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR32RegClassID,
   28323             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/AArch64::FPR128RegClassID,
   28324             :         // (intrinsic_wo_chain:{ *:[v4i32] } 200:{ *:[iPTR] }, FPR128:{ *:[v4i32] }:$Rd, FPR32:{ *:[i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (SHA1Prrr:{ *:[v4i32] } FPR128:{ *:[v4i32] }:$Rd, FPR32:{ *:[i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
   28325             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SHA1Prrr,
   28326             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   28327             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   28328             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   28329             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // Rm
   28330             :         GIR_EraseFromParent, /*InsnID*/0,
   28331             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28332             :         // GIR_Coverage, 1754,
   28333             :         GIR_Done,
   28334             :       // Label 1741: @70332
   28335             :       GIM_Try, /*On fail goto*//*Label 1742*/ 70396, // Rule ID 1755 //
   28336             :         GIM_CheckFeatures, GIFBS_HasSHA2,
   28337             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_crypto_sha1m,
   28338             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   28339             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   28340             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   28341             :         GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32,
   28342             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   28343             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   28344             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR32RegClassID,
   28345             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/AArch64::FPR128RegClassID,
   28346             :         // (intrinsic_wo_chain:{ *:[v4i32] } 199:{ *:[iPTR] }, FPR128:{ *:[v4i32] }:$Rd, FPR32:{ *:[i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (SHA1Mrrr:{ *:[v4i32] } FPR128:{ *:[v4i32] }:$Rd, FPR32:{ *:[i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
   28347             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SHA1Mrrr,
   28348             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   28349             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   28350             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   28351             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // Rm
   28352             :         GIR_EraseFromParent, /*InsnID*/0,
   28353             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28354             :         // GIR_Coverage, 1755,
   28355             :         GIR_Done,
   28356             :       // Label 1742: @70396
   28357             :       GIM_Try, /*On fail goto*//*Label 1743*/ 70460, // Rule ID 1756 //
   28358             :         GIM_CheckFeatures, GIFBS_HasSHA2,
   28359             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_crypto_sha1su0,
   28360             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   28361             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   28362             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   28363             :         GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32,
   28364             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   28365             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   28366             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   28367             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/AArch64::FPR128RegClassID,
   28368             :         // (intrinsic_wo_chain:{ *:[v4i32] } 201:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rd, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (SHA1SU0rrr:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
   28369             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SHA1SU0rrr,
   28370             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   28371             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   28372             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   28373             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // Rm
   28374             :         GIR_EraseFromParent, /*InsnID*/0,
   28375             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28376             :         // GIR_Coverage, 1756,
   28377             :         GIR_Done,
   28378             :       // Label 1743: @70460
   28379             :       GIM_Try, /*On fail goto*//*Label 1744*/ 70524, // Rule ID 1757 //
   28380             :         GIM_CheckFeatures, GIFBS_HasSHA2,
   28381             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_crypto_sha256h,
   28382             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   28383             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   28384             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   28385             :         GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32,
   28386             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   28387             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   28388             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   28389             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/AArch64::FPR128RegClassID,
   28390             :         // (intrinsic_wo_chain:{ *:[v4i32] } 203:{ *:[iPTR] }, FPR128:{ *:[v4i32] }:$Rd, FPR128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (SHA256Hrrr:{ *:[v4i32] } FPR128:{ *:[v4i32] }:$Rd, FPR128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
   28391             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SHA256Hrrr,
   28392             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   28393             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   28394             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   28395             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // Rm
   28396             :         GIR_EraseFromParent, /*InsnID*/0,
   28397             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28398             :         // GIR_Coverage, 1757,
   28399             :         GIR_Done,
   28400             :       // Label 1744: @70524
   28401             :       GIM_Try, /*On fail goto*//*Label 1745*/ 70588, // Rule ID 1758 //
   28402             :         GIM_CheckFeatures, GIFBS_HasSHA2,
   28403             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_crypto_sha256h2,
   28404             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   28405             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   28406             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   28407             :         GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32,
   28408             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   28409             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   28410             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   28411             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/AArch64::FPR128RegClassID,
   28412             :         // (intrinsic_wo_chain:{ *:[v4i32] } 204:{ *:[iPTR] }, FPR128:{ *:[v4i32] }:$Rd, FPR128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (SHA256H2rrr:{ *:[v4i32] } FPR128:{ *:[v4i32] }:$Rd, FPR128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
   28413             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SHA256H2rrr,
   28414             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   28415             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   28416             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   28417             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // Rm
   28418             :         GIR_EraseFromParent, /*InsnID*/0,
   28419             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28420             :         // GIR_Coverage, 1758,
   28421             :         GIR_Done,
   28422             :       // Label 1745: @70588
   28423             :       GIM_Try, /*On fail goto*//*Label 1746*/ 70652, // Rule ID 1759 //
   28424             :         GIM_CheckFeatures, GIFBS_HasSHA2,
   28425             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_crypto_sha256su1,
   28426             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   28427             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   28428             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   28429             :         GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32,
   28430             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   28431             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   28432             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   28433             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/AArch64::FPR128RegClassID,
   28434             :         // (intrinsic_wo_chain:{ *:[v4i32] } 206:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rd, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (SHA256SU1rrr:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
   28435             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SHA256SU1rrr,
   28436             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   28437             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   28438             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   28439             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // Rm
   28440             :         GIR_EraseFromParent, /*InsnID*/0,
   28441             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28442             :         // GIR_Coverage, 1759,
   28443             :         GIR_Done,
   28444             :       // Label 1746: @70652
   28445             :       GIM_Try, /*On fail goto*//*Label 1747*/ 70714, // Rule ID 2610 //
   28446             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_tbx1,
   28447             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s8,
   28448             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
   28449             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
   28450             :         GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v8s8,
   28451             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   28452             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   28453             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   28454             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/AArch64::FPR64RegClassID,
   28455             :         // (intrinsic_wo_chain:{ *:[v8i8] } 327:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rd, VecListOne128:{ *:[v16i8] }:$Rn, V64:{ *:[v8i8] }:$Ri)  =>  (TBXv8i8One:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rd, VecListOne128:{ *:[v16i8] }:$Rn, V64:{ *:[v8i8] }:$Ri)
   28456             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::TBXv8i8One,
   28457             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   28458             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   28459             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rn
   28460             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // Ri
   28461             :         GIR_EraseFromParent, /*InsnID*/0,
   28462             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28463             :         // GIR_Coverage, 2610,
   28464             :         GIR_Done,
   28465             :       // Label 1747: @70714
   28466             :       GIM_Try, /*On fail goto*//*Label 1748*/ 70776, // Rule ID 2611 //
   28467             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_tbx1,
   28468             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   28469             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   28470             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
   28471             :         GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v16s8,
   28472             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   28473             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   28474             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   28475             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/AArch64::FPR128RegClassID,
   28476             :         // (intrinsic_wo_chain:{ *:[v16i8] } 327:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rd, V128:{ *:[v16i8] }:$Ri, V128:{ *:[v16i8] }:$Rn)  =>  (TBXv16i8One:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rd, V128:{ *:[v16i8] }:$Ri, V128:{ *:[v16i8] }:$Rn)
   28477             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::TBXv16i8One,
   28478             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   28479             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
   28480             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Ri
   28481             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // Rn
   28482             :         GIR_EraseFromParent, /*InsnID*/0,
   28483             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28484             :         // GIR_Coverage, 2611,
   28485             :         GIR_Done,
   28486             :       // Label 1748: @70776
   28487             :       GIM_Reject,
   28488             :     // Label 1719: @70777
   28489             :     GIM_Try, /*On fail goto*//*Label 1749*/ 71123,
   28490             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/6,
   28491             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::aarch64_neon_vcopy_lane,
   28492             :       GIM_Try, /*On fail goto*//*Label 1750*/ 70870, // Rule ID 2688 //
   28493             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
   28494             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
   28495             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   28496             :         GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v16s8,
   28497             :         GIM_CheckType, /*MI*/0, /*Op*/5, /*Type*/GILLT_s64,
   28498             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   28499             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   28500             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   28501             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   28502             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_VectorIndexB,
   28503             :         // MIs[1] Operand 1
   28504             :         // No operand predicates
   28505             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/AArch64::FPR128RegClassID,
   28506             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/5, // MIs[2]
   28507             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_CONSTANT,
   28508             :         GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIPFP_I64_Predicate_VectorIndexB,
   28509             :         // MIs[2] Operand 1
   28510             :         // No operand predicates
   28511             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   28512             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
   28513             :         // (intrinsic_wo_chain:{ *:[v16i8] } 359:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Vd, (imm:{ *:[i64] })<<P:Predicate_VectorIndexB>>:$idx, V128:{ *:[v16i8] }:$Vs, (imm:{ *:[i64] })<<P:Predicate_VectorIndexB>>:$idx2)  =>  (INSvi8lane:{ *:[v16i8] } V128:{ *:[v16i8] }:$Vd, (imm:{ *:[i64] })<<P:Predicate_VectorIndexB>>:$idx, V128:{ *:[v16i8] }:$Vs, (imm:{ *:[i64] })<<P:Predicate_VectorIndexB>>:$idx2)
   28514             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::INSvi8lane,
   28515             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   28516             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Vd
   28517             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
   28518             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // Vs
   28519             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx2
   28520             :         GIR_EraseFromParent, /*InsnID*/0,
   28521             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28522             :         // GIR_Coverage, 2688,
   28523             :         GIR_Done,
   28524             :       // Label 1750: @70870
   28525             :       GIM_Try, /*On fail goto*//*Label 1751*/ 70954, // Rule ID 2689 //
   28526             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
   28527             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   28528             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   28529             :         GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v8s16,
   28530             :         GIM_CheckType, /*MI*/0, /*Op*/5, /*Type*/GILLT_s64,
   28531             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   28532             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   28533             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   28534             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   28535             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_VectorIndexH,
   28536             :         // MIs[1] Operand 1
   28537             :         // No operand predicates
   28538             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/AArch64::FPR128RegClassID,
   28539             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/5, // MIs[2]
   28540             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_CONSTANT,
   28541             :         GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIPFP_I64_Predicate_VectorIndexH,
   28542             :         // MIs[2] Operand 1
   28543             :         // No operand predicates
   28544             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   28545             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
   28546             :         // (intrinsic_wo_chain:{ *:[v8i16] } 359:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Vd, (imm:{ *:[i64] })<<P:Predicate_VectorIndexH>>:$idx, V128:{ *:[v8i16] }:$Vs, (imm:{ *:[i64] })<<P:Predicate_VectorIndexH>>:$idx2)  =>  (INSvi16lane:{ *:[v8i16] } V128:{ *:[v8i16] }:$Vd, (imm:{ *:[i64] })<<P:Predicate_VectorIndexH>>:$idx, V128:{ *:[v8i16] }:$Vs, (imm:{ *:[i64] })<<P:Predicate_VectorIndexH>>:$idx2)
   28547             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::INSvi16lane,
   28548             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   28549             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Vd
   28550             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
   28551             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // Vs
   28552             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx2
   28553             :         GIR_EraseFromParent, /*InsnID*/0,
   28554             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28555             :         // GIR_Coverage, 2689,
   28556             :         GIR_Done,
   28557             :       // Label 1751: @70954
   28558             :       GIM_Try, /*On fail goto*//*Label 1752*/ 71038, // Rule ID 2690 //
   28559             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
   28560             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   28561             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   28562             :         GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32,
   28563             :         GIM_CheckType, /*MI*/0, /*Op*/5, /*Type*/GILLT_s64,
   28564             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   28565             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   28566             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   28567             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   28568             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_VectorIndexS,
   28569             :         // MIs[1] Operand 1
   28570             :         // No operand predicates
   28571             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/AArch64::FPR128RegClassID,
   28572             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/5, // MIs[2]
   28573             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_CONSTANT,
   28574             :         GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIPFP_I64_Predicate_VectorIndexS,
   28575             :         // MIs[2] Operand 1
   28576             :         // No operand predicates
   28577             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   28578             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
   28579             :         // (intrinsic_wo_chain:{ *:[v4i32] } 359:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Vd, (imm:{ *:[i64] })<<P:Predicate_VectorIndexS>>:$idx, V128:{ *:[v4i32] }:$Vs, (imm:{ *:[i64] })<<P:Predicate_VectorIndexS>>:$idx2)  =>  (INSvi32lane:{ *:[v4i32] } V128:{ *:[v4i32] }:$Vd, (imm:{ *:[i64] })<<P:Predicate_VectorIndexS>>:$idx, V128:{ *:[v4i32] }:$Vs, (imm:{ *:[i64] })<<P:Predicate_VectorIndexS>>:$idx2)
   28580             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::INSvi32lane,
   28581             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   28582             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Vd
   28583             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
   28584             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // Vs
   28585             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx2
   28586             :         GIR_EraseFromParent, /*InsnID*/0,
   28587             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28588             :         // GIR_Coverage, 2690,
   28589             :         GIR_Done,
   28590             :       // Label 1752: @71038
   28591             :       GIM_Try, /*On fail goto*//*Label 1753*/ 71122, // Rule ID 2691 //
   28592             :         GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
   28593             :         GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   28594             :         GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   28595             :         GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v2s64,
   28596             :         GIM_CheckType, /*MI*/0, /*Op*/5, /*Type*/GILLT_s64,
   28597             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   28598             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   28599             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   28600             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   28601             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_VectorIndexD,
   28602             :         // MIs[1] Operand 1
   28603             :         // No operand predicates
   28604             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/AArch64::FPR128RegClassID,
   28605             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/5, // MIs[2]
   28606             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_CONSTANT,
   28607             :         GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIPFP_I64_Predicate_VectorIndexD,
   28608             :         // MIs[2] Operand 1
   28609             :         // No operand predicates
   28610             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   28611             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
   28612             :         // (intrinsic_wo_chain:{ *:[v2i64] } 359:{ *:[iPTR] }, V128:{ *:[v2i64] }:$Vd, (imm:{ *:[i64] })<<P:Predicate_VectorIndexD>>:$idx, V128:{ *:[v2i64] }:$Vs, (imm:{ *:[i64] })<<P:Predicate_VectorIndexD>>:$idx2)  =>  (INSvi64lane:{ *:[v2i64] } V128:{ *:[v2i64] }:$Vd, (imm:{ *:[i64] })<<P:Predicate_VectorIndexD>>:$idx, V128:{ *:[v2i64] }:$Vs, (imm:{ *:[i64] })<<P:Predicate_VectorIndexD>>:$idx2)
   28613             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::INSvi64lane,
   28614             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   28615             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Vd
   28616             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // idx
   28617             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // Vs
   28618             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/2, // idx2
   28619             :         GIR_EraseFromParent, /*InsnID*/0,
   28620             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28621             :         // GIR_Coverage, 2691,
   28622             :         GIR_Done,
   28623             :       // Label 1753: @71122
   28624             :       GIM_Reject,
   28625             :     // Label 1749: @71123
   28626             :     GIM_Reject,
   28627             :     // Label 25: @71124
   28628             :     GIM_Try, /*On fail goto*//*Label 1754*/ 71145, // Rule ID 3557 //
   28629             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::aarch64_clrex,
   28630             :       // (intrinsic_void 184:{ *:[iPTR] })  =>  (CLREX 15:{ *:[i64] })
   28631             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CLREX,
   28632             :       GIR_AddImm, /*InsnID*/0, /*Imm*/15,
   28633             :       GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
   28634             :       GIR_EraseFromParent, /*InsnID*/0,
   28635             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28636             :       // GIR_Coverage, 3557,
   28637             :       GIR_Done,
   28638             :     // Label 1754: @71145
   28639             :     GIM_Try, /*On fail goto*//*Label 1755*/ 71303,
   28640             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/2,
   28641             :       GIM_Try, /*On fail goto*//*Label 1756*/ 71188, // Rule ID 10 //
   28642             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::aarch64_hint,
   28643             :         GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
   28644             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
   28645             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   28646             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_imm0_127,
   28647             :         // MIs[1] Operand 1
   28648             :         // No operand predicates
   28649             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   28650             :         // (intrinsic_void 210:{ *:[iPTR] }, (imm:{ *:[i32] })<<P:Predicate_imm0_127>>:$imm)  =>  (HINT (imm:{ *:[i32] }):$imm)
   28651             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::HINT,
   28652             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   28653             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, 1, GIU_MergeMemOperands_EndOfList,
   28654             :         GIR_EraseFromParent, /*InsnID*/0,
   28655             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28656             :         // GIR_Coverage, 10,
   28657             :         GIR_Done,
   28658             :       // Label 1756: @71188
   28659             :       GIM_Try, /*On fail goto*//*Label 1757*/ 71226, // Rule ID 11 //
   28660             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::aarch64_dmb,
   28661             :         GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
   28662             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
   28663             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   28664             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_imm32_0_15,
   28665             :         // MIs[1] Operand 1
   28666             :         // No operand predicates
   28667             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   28668             :         // (intrinsic_void 207:{ *:[iPTR] }, (imm:{ *:[i32] })<<P:Predicate_imm32_0_15>>:$CRm)  =>  (DMB (imm:{ *:[i32] }):$CRm)
   28669             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::DMB,
   28670             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // CRm
   28671             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, 1, GIU_MergeMemOperands_EndOfList,
   28672             :         GIR_EraseFromParent, /*InsnID*/0,
   28673             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28674             :         // GIR_Coverage, 11,
   28675             :         GIR_Done,
   28676             :       // Label 1757: @71226
   28677             :       GIM_Try, /*On fail goto*//*Label 1758*/ 71264, // Rule ID 12 //
   28678             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::aarch64_dsb,
   28679             :         GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
   28680             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
   28681             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   28682             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_imm32_0_15,
   28683             :         // MIs[1] Operand 1
   28684             :         // No operand predicates
   28685             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   28686             :         // (intrinsic_void 208:{ *:[iPTR] }, (imm:{ *:[i32] })<<P:Predicate_imm32_0_15>>:$CRm)  =>  (DSB (imm:{ *:[i32] }):$CRm)
   28687             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::DSB,
   28688             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // CRm
   28689             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, 1, GIU_MergeMemOperands_EndOfList,
   28690             :         GIR_EraseFromParent, /*InsnID*/0,
   28691             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28692             :         // GIR_Coverage, 12,
   28693             :         GIR_Done,
   28694             :       // Label 1758: @71264
   28695             :       GIM_Try, /*On fail goto*//*Label 1759*/ 71302, // Rule ID 13 //
   28696             :         GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::aarch64_isb,
   28697             :         GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
   28698             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
   28699             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   28700             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_imm32_0_15,
   28701             :         // MIs[1] Operand 1
   28702             :         // No operand predicates
   28703             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   28704             :         // (intrinsic_void 211:{ *:[iPTR] }, (imm:{ *:[i32] })<<P:Predicate_imm32_0_15>>:$CRm)  =>  (ISB (imm:{ *:[i32] }):$CRm)
   28705             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ISB,
   28706             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // CRm
   28707             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, 1, GIU_MergeMemOperands_EndOfList,
   28708             :         GIR_EraseFromParent, /*InsnID*/0,
   28709             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28710             :         // GIR_Coverage, 13,
   28711             :         GIR_Done,
   28712             :       // Label 1759: @71302
   28713             :       GIM_Reject,
   28714             :     // Label 1755: @71303
   28715             :     GIM_Reject,
   28716             :     // Label 26: @71304
   28717             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/5, 10, /*)*//*default:*//*Label 1763*/ 71417,
   28718             :     /*GILLT_v2s64*//*Label 1760*/ 71315, 0,
   28719             :     /*GILLT_v4s32*//*Label 1761*/ 71349, 0,
   28720             :     /*GILLT_v8s16*//*Label 1762*/ 71383,
   28721             :     // Label 1760: @71315
   28722             :     GIM_Try, /*On fail goto*//*Label 1764*/ 71348, // Rule ID 2991 //
   28723             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
   28724             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   28725             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   28726             :       // (anyext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rn)  =>  (USHLLv2i32_shift:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rn, 0:{ *:[i32] })
   28727             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USHLLv2i32_shift,
   28728             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   28729             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   28730             :       GIR_AddImm, /*InsnID*/0, /*Imm*/0,
   28731             :       GIR_EraseFromParent, /*InsnID*/0,
   28732             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28733             :       // GIR_Coverage, 2991,
   28734             :       GIR_Done,
   28735             :     // Label 1764: @71348
   28736             :     GIM_Reject,
   28737             :     // Label 1761: @71349
   28738             :     GIM_Try, /*On fail goto*//*Label 1765*/ 71382, // Rule ID 2988 //
   28739             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
   28740             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   28741             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   28742             :       // (anyext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rn)  =>  (USHLLv4i16_shift:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rn, 0:{ *:[i32] })
   28743             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USHLLv4i16_shift,
   28744             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   28745             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   28746             :       GIR_AddImm, /*InsnID*/0, /*Imm*/0,
   28747             :       GIR_EraseFromParent, /*InsnID*/0,
   28748             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28749             :       // GIR_Coverage, 2988,
   28750             :       GIR_Done,
   28751             :     // Label 1765: @71382
   28752             :     GIM_Reject,
   28753             :     // Label 1762: @71383
   28754             :     GIM_Try, /*On fail goto*//*Label 1766*/ 71416, // Rule ID 2985 //
   28755             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
   28756             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   28757             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   28758             :       // (anyext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rn)  =>  (USHLLv8i8_shift:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rn, 0:{ *:[i32] })
   28759             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USHLLv8i8_shift,
   28760             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   28761             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   28762             :       GIR_AddImm, /*InsnID*/0, /*Imm*/0,
   28763             :       GIR_EraseFromParent, /*InsnID*/0,
   28764             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28765             :       // GIR_Coverage, 2985,
   28766             :       GIR_Done,
   28767             :     // Label 1766: @71416
   28768             :     GIM_Reject,
   28769             :     // Label 1763: @71417
   28770             :     GIM_Reject,
   28771             :     // Label 27: @71418
   28772             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 9, /*)*//*default:*//*Label 1771*/ 71542,
   28773             :     /*GILLT_s32*//*Label 1767*/ 71432, 0, 0,
   28774             :     /*GILLT_v2s32*//*Label 1768*/ 71470, 0,
   28775             :     /*GILLT_v4s16*//*Label 1769*/ 71494, 0,
   28776             :     /*GILLT_v8s8*//*Label 1770*/ 71518,
   28777             :     // Label 1767: @71432
   28778             :     GIM_Try, /*On fail goto*//*Label 1772*/ 71469, // Rule ID 3122 //
   28779             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
   28780             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64spRegClassID,
   28781             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
   28782             :       // (trunc:{ *:[i32] } GPR64sp:{ *:[i64] }:$src)  =>  (EXTRACT_SUBREG:{ *:[i32] } GPR64sp:{ *:[i64] }:$src, sub_32:{ *:[i32] })
   28783             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
   28784             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   28785             :       GIR_CopySubReg, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, /*SubRegIdx*/15, // src
   28786             :       GIR_EraseFromParent, /*InsnID*/0,
   28787             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GPR32sp*/7,
   28788             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, /*RC GPR64sp*/18,
   28789             :       // GIR_Coverage, 3122,
   28790             :       GIR_Done,
   28791             :     // Label 1772: @71469
   28792             :     GIM_Reject,
   28793             :     // Label 1768: @71470
   28794             :     GIM_Try, /*On fail goto*//*Label 1773*/ 71493, // Rule ID 767 //
   28795             :       GIM_CheckFeatures, GIFBS_HasNEON,
   28796             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
   28797             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   28798             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   28799             :       // (trunc:{ *:[v2i32] } V128:{ *:[v2i64] }:$Rn)  =>  (XTNv2i32:{ *:[v2i32] } V128:{ *:[v2i64] }:$Rn)
   28800             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::XTNv2i32,
   28801             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28802             :       // GIR_Coverage, 767,
   28803             :       GIR_Done,
   28804             :     // Label 1773: @71493
   28805             :     GIM_Reject,
   28806             :     // Label 1769: @71494
   28807             :     GIM_Try, /*On fail goto*//*Label 1774*/ 71517, // Rule ID 766 //
   28808             :       GIM_CheckFeatures, GIFBS_HasNEON,
   28809             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
   28810             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   28811             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   28812             :       // (trunc:{ *:[v4i16] } V128:{ *:[v4i32] }:$Rn)  =>  (XTNv4i16:{ *:[v4i16] } V128:{ *:[v4i32] }:$Rn)
   28813             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::XTNv4i16,
   28814             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28815             :       // GIR_Coverage, 766,
   28816             :       GIR_Done,
   28817             :     // Label 1774: @71517
   28818             :     GIM_Reject,
   28819             :     // Label 1770: @71518
   28820             :     GIM_Try, /*On fail goto*//*Label 1775*/ 71541, // Rule ID 765 //
   28821             :       GIM_CheckFeatures, GIFBS_HasNEON,
   28822             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
   28823             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   28824             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   28825             :       // (trunc:{ *:[v8i8] } V128:{ *:[v8i16] }:$Rn)  =>  (XTNv8i8:{ *:[v8i8] } V128:{ *:[v8i16] }:$Rn)
   28826             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::XTNv8i8,
   28827             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28828             :       // GIR_Coverage, 765,
   28829             :       GIR_Done,
   28830             :     // Label 1775: @71541
   28831             :     GIM_Reject,
   28832             :     // Label 1771: @71542
   28833             :     GIM_Reject,
   28834             :     // Label 28: @71543
   28835             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 3, /*)*//*default:*//*Label 1778*/ 71595,
   28836             :     /*GILLT_s32*//*Label 1776*/ 71551,
   28837             :     /*GILLT_s64*//*Label 1777*/ 71573,
   28838             :     // Label 1776: @71551
   28839             :     GIM_Try, /*On fail goto*//*Label 1779*/ 71572, // Rule ID 23 //
   28840             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   28841             :       // MIs[0] Operand 1
   28842             :       // No operand predicates
   28843             :       // (imm:{ *:[i32] }):$src  =>  (MOVi32imm:{ *:[i32] } (imm:{ *:[i32] }):$src)
   28844             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MOVi32imm,
   28845             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   28846             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // src
   28847             :       GIR_EraseFromParent, /*InsnID*/0,
   28848             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28849             :       // GIR_Coverage, 23,
   28850             :       GIR_Done,
   28851             :     // Label 1779: @71572
   28852             :     GIM_Reject,
   28853             :     // Label 1777: @71573
   28854             :     GIM_Try, /*On fail goto*//*Label 1780*/ 71594, // Rule ID 24 //
   28855             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   28856             :       // MIs[0] Operand 1
   28857             :       // No operand predicates
   28858             :       // (imm:{ *:[i64] }):$src  =>  (MOVi64imm:{ *:[i64] } (imm:{ *:[i64] }):$src)
   28859             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MOVi64imm,
   28860             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   28861             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // src
   28862             :       GIR_EraseFromParent, /*InsnID*/0,
   28863             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28864             :       // GIR_Coverage, 24,
   28865             :       GIR_Done,
   28866             :     // Label 1780: @71594
   28867             :     GIM_Reject,
   28868             :     // Label 1778: @71595
   28869             :     GIM_Reject,
   28870             :     // Label 29: @71596
   28871             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/0, 3, /*)*//*default:*//*Label 1784*/ 71673,
   28872             :     /*GILLT_s16*//*Label 1781*/ 71605,
   28873             :     /*GILLT_s32*//*Label 1782*/ 71629,
   28874             :     /*GILLT_s64*//*Label 1783*/ 71651,
   28875             :     // Label 1781: @71605
   28876             :     GIM_Try, /*On fail goto*//*Label 1785*/ 71628, // Rule ID 375 //
   28877             :       GIM_CheckFeatures, GIFBS_HasFullFP16,
   28878             :       GIM_CheckAPFloatImmPredicate, /*MI*/0, /*Predicate*/GIPFP_APFloat_Predicate_fpimm0,
   28879             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR16RegClassID,
   28880             :       // MIs[0] Operand 1
   28881             :       // No operand predicates
   28882             :       // (fpimm:{ *:[f16] })<<P:Predicate_fpimm0>>  =>  (FMOVH0:{ *:[f16] })
   28883             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMOVH0,
   28884             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   28885             :       GIR_EraseFromParent, /*InsnID*/0,
   28886             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28887             :       // GIR_Coverage, 375,
   28888             :       GIR_Done,
   28889             :     // Label 1785: @71628
   28890             :     GIM_Reject,
   28891             :     // Label 1782: @71629
   28892             :     GIM_Try, /*On fail goto*//*Label 1786*/ 71650, // Rule ID 376 //
   28893             :       GIM_CheckAPFloatImmPredicate, /*MI*/0, /*Predicate*/GIPFP_APFloat_Predicate_fpimm0,
   28894             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   28895             :       // MIs[0] Operand 1
   28896             :       // No operand predicates
   28897             :       // (fpimm:{ *:[f32] })<<P:Predicate_fpimm0>>  =>  (FMOVS0:{ *:[f32] })
   28898             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMOVS0,
   28899             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   28900             :       GIR_EraseFromParent, /*InsnID*/0,
   28901             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28902             :       // GIR_Coverage, 376,
   28903             :       GIR_Done,
   28904             :     // Label 1786: @71650
   28905             :     GIM_Reject,
   28906             :     // Label 1783: @71651
   28907             :     GIM_Try, /*On fail goto*//*Label 1787*/ 71672, // Rule ID 377 //
   28908             :       GIM_CheckAPFloatImmPredicate, /*MI*/0, /*Predicate*/GIPFP_APFloat_Predicate_fpimm0,
   28909             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   28910             :       // MIs[0] Operand 1
   28911             :       // No operand predicates
   28912             :       // (fpimm:{ *:[f64] })<<P:Predicate_fpimm0>>  =>  (FMOVD0:{ *:[f64] })
   28913             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMOVD0,
   28914             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   28915             :       GIR_EraseFromParent, /*InsnID*/0,
   28916             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28917             :       // GIR_Coverage, 377,
   28918             :       GIR_Done,
   28919             :     // Label 1787: @71672
   28920             :     GIM_Reject,
   28921             :     // Label 1784: @71673
   28922             :     GIM_Reject,
   28923             :     // Label 30: @71674
   28924             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/5, 10, /*)*//*default:*//*Label 1791*/ 71787,
   28925             :     /*GILLT_v2s64*//*Label 1788*/ 71685, 0,
   28926             :     /*GILLT_v4s32*//*Label 1789*/ 71719, 0,
   28927             :     /*GILLT_v8s16*//*Label 1790*/ 71753,
   28928             :     // Label 1788: @71685
   28929             :     GIM_Try, /*On fail goto*//*Label 1792*/ 71718, // Rule ID 2989 //
   28930             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
   28931             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   28932             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   28933             :       // (sext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rn)  =>  (SSHLLv2i32_shift:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rn, 0:{ *:[i32] })
   28934             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SSHLLv2i32_shift,
   28935             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   28936             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   28937             :       GIR_AddImm, /*InsnID*/0, /*Imm*/0,
   28938             :       GIR_EraseFromParent, /*InsnID*/0,
   28939             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28940             :       // GIR_Coverage, 2989,
   28941             :       GIR_Done,
   28942             :     // Label 1792: @71718
   28943             :     GIM_Reject,
   28944             :     // Label 1789: @71719
   28945             :     GIM_Try, /*On fail goto*//*Label 1793*/ 71752, // Rule ID 2986 //
   28946             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
   28947             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   28948             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   28949             :       // (sext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rn)  =>  (SSHLLv4i16_shift:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rn, 0:{ *:[i32] })
   28950             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SSHLLv4i16_shift,
   28951             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   28952             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   28953             :       GIR_AddImm, /*InsnID*/0, /*Imm*/0,
   28954             :       GIR_EraseFromParent, /*InsnID*/0,
   28955             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28956             :       // GIR_Coverage, 2986,
   28957             :       GIR_Done,
   28958             :     // Label 1793: @71752
   28959             :     GIM_Reject,
   28960             :     // Label 1790: @71753
   28961             :     GIM_Try, /*On fail goto*//*Label 1794*/ 71786, // Rule ID 2983 //
   28962             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
   28963             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   28964             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   28965             :       // (sext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rn)  =>  (SSHLLv8i8_shift:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rn, 0:{ *:[i32] })
   28966             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SSHLLv8i8_shift,
   28967             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   28968             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   28969             :       GIR_AddImm, /*InsnID*/0, /*Imm*/0,
   28970             :       GIR_EraseFromParent, /*InsnID*/0,
   28971             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   28972             :       // GIR_Coverage, 2983,
   28973             :       GIR_Done,
   28974             :     // Label 1794: @71786
   28975             :     GIM_Reject,
   28976             :     // Label 1791: @71787
   28977             :     GIM_Reject,
   28978             :     // Label 31: @71788
   28979             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/5, 10, /*)*//*default:*//*Label 1798*/ 72246,
   28980             :     /*GILLT_v2s64*//*Label 1795*/ 71799, 0,
   28981             :     /*GILLT_v4s32*//*Label 1796*/ 71948, 0,
   28982             :     /*GILLT_v8s16*//*Label 1797*/ 72097,
   28983             :     // Label 1795: @71799
   28984             :     GIM_Try, /*On fail goto*//*Label 1799*/ 71947,
   28985             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
   28986             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   28987             :       GIM_Try, /*On fail goto*//*Label 1800*/ 71865, // Rule ID 473 //
   28988             :         GIM_CheckFeatures, GIFBS_HasNEON,
   28989             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
   28990             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
   28991             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
   28992             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uabd,
   28993             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
   28994             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s32,
   28995             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   28996             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   28997             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   28998             :         // (zext:{ *:[v2i64] } (intrinsic_wo_chain:{ *:[v2i32] } 331:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm))  =>  (UABDLv2i32_v2i64:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
   28999             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABDLv2i32_v2i64,
   29000             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   29001             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
   29002             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
   29003             :         GIR_EraseFromParent, /*InsnID*/0,
   29004             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29005             :         // GIR_Coverage, 473,
   29006             :         GIR_Done,
   29007             :       // Label 1800: @71865
   29008             :       GIM_Try, /*On fail goto*//*Label 1801*/ 71921, // Rule ID 1281 //
   29009             :         GIM_CheckFeatures, GIFBS_HasNEON,
   29010             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
   29011             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
   29012             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
   29013             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sabd,
   29014             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
   29015             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s32,
   29016             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   29017             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   29018             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   29019             :         // (zext:{ *:[v2i64] } (intrinsic_wo_chain:{ *:[v2i32] } 273:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm))  =>  (SABDLv2i32_v2i64:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
   29020             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABDLv2i32_v2i64,
   29021             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   29022             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
   29023             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
   29024             :         GIR_EraseFromParent, /*InsnID*/0,
   29025             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29026             :         // GIR_Coverage, 1281,
   29027             :         GIR_Done,
   29028             :       // Label 1801: @71921
   29029             :       GIM_Try, /*On fail goto*//*Label 1802*/ 71946, // Rule ID 2990 //
   29030             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   29031             :         // (zext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rn)  =>  (USHLLv2i32_shift:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rn, 0:{ *:[i32] })
   29032             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USHLLv2i32_shift,
   29033             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   29034             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   29035             :         GIR_AddImm, /*InsnID*/0, /*Imm*/0,
   29036             :         GIR_EraseFromParent, /*InsnID*/0,
   29037             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29038             :         // GIR_Coverage, 2990,
   29039             :         GIR_Done,
   29040             :       // Label 1802: @71946
   29041             :       GIM_Reject,
   29042             :     // Label 1799: @71947
   29043             :     GIM_Reject,
   29044             :     // Label 1796: @71948
   29045             :     GIM_Try, /*On fail goto*//*Label 1803*/ 72096,
   29046             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
   29047             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   29048             :       GIM_Try, /*On fail goto*//*Label 1804*/ 72014, // Rule ID 471 //
   29049             :         GIM_CheckFeatures, GIFBS_HasNEON,
   29050             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
   29051             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
   29052             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
   29053             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uabd,
   29054             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
   29055             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s16,
   29056             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   29057             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   29058             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   29059             :         // (zext:{ *:[v4i32] } (intrinsic_wo_chain:{ *:[v4i16] } 331:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm))  =>  (UABDLv4i16_v4i32:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
   29060             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABDLv4i16_v4i32,
   29061             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   29062             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
   29063             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
   29064             :         GIR_EraseFromParent, /*InsnID*/0,
   29065             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29066             :         // GIR_Coverage, 471,
   29067             :         GIR_Done,
   29068             :       // Label 1804: @72014
   29069             :       GIM_Try, /*On fail goto*//*Label 1805*/ 72070, // Rule ID 1279 //
   29070             :         GIM_CheckFeatures, GIFBS_HasNEON,
   29071             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
   29072             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
   29073             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
   29074             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sabd,
   29075             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
   29076             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s16,
   29077             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   29078             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   29079             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   29080             :         // (zext:{ *:[v4i32] } (intrinsic_wo_chain:{ *:[v4i16] } 273:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm))  =>  (SABDLv4i16_v4i32:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
   29081             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABDLv4i16_v4i32,
   29082             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   29083             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
   29084             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
   29085             :         GIR_EraseFromParent, /*InsnID*/0,
   29086             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29087             :         // GIR_Coverage, 1279,
   29088             :         GIR_Done,
   29089             :       // Label 1805: @72070
   29090             :       GIM_Try, /*On fail goto*//*Label 1806*/ 72095, // Rule ID 2987 //
   29091             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   29092             :         // (zext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rn)  =>  (USHLLv4i16_shift:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rn, 0:{ *:[i32] })
   29093             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USHLLv4i16_shift,
   29094             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   29095             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   29096             :         GIR_AddImm, /*InsnID*/0, /*Imm*/0,
   29097             :         GIR_EraseFromParent, /*InsnID*/0,
   29098             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29099             :         // GIR_Coverage, 2987,
   29100             :         GIR_Done,
   29101             :       // Label 1806: @72095
   29102             :       GIM_Reject,
   29103             :     // Label 1803: @72096
   29104             :     GIM_Reject,
   29105             :     // Label 1797: @72097
   29106             :     GIM_Try, /*On fail goto*//*Label 1807*/ 72245,
   29107             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
   29108             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   29109             :       GIM_Try, /*On fail goto*//*Label 1808*/ 72163, // Rule ID 469 //
   29110             :         GIM_CheckFeatures, GIFBS_HasNEON,
   29111             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
   29112             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
   29113             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
   29114             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uabd,
   29115             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
   29116             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s8,
   29117             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   29118             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   29119             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   29120             :         // (zext:{ *:[v8i16] } (intrinsic_wo_chain:{ *:[v8i8] } 331:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm))  =>  (UABDLv8i8_v8i16:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
   29121             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABDLv8i8_v8i16,
   29122             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   29123             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
   29124             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
   29125             :         GIR_EraseFromParent, /*InsnID*/0,
   29126             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29127             :         // GIR_Coverage, 469,
   29128             :         GIR_Done,
   29129             :       // Label 1808: @72163
   29130             :       GIM_Try, /*On fail goto*//*Label 1809*/ 72219, // Rule ID 1277 //
   29131             :         GIM_CheckFeatures, GIFBS_HasNEON,
   29132             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
   29133             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
   29134             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
   29135             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sabd,
   29136             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
   29137             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s8,
   29138             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   29139             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   29140             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   29141             :         // (zext:{ *:[v8i16] } (intrinsic_wo_chain:{ *:[v8i8] } 273:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm))  =>  (SABDLv8i8_v8i16:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
   29142             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABDLv8i8_v8i16,
   29143             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   29144             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
   29145             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
   29146             :         GIR_EraseFromParent, /*InsnID*/0,
   29147             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29148             :         // GIR_Coverage, 1277,
   29149             :         GIR_Done,
   29150             :       // Label 1809: @72219
   29151             :       GIM_Try, /*On fail goto*//*Label 1810*/ 72244, // Rule ID 2984 //
   29152             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   29153             :         // (zext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rn)  =>  (USHLLv8i8_shift:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rn, 0:{ *:[i32] })
   29154             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USHLLv8i8_shift,
   29155             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   29156             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   29157             :         GIR_AddImm, /*InsnID*/0, /*Imm*/0,
   29158             :         GIR_EraseFromParent, /*InsnID*/0,
   29159             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29160             :         // GIR_Coverage, 2984,
   29161             :         GIR_Done,
   29162             :       // Label 1810: @72244
   29163             :       GIM_Reject,
   29164             :     // Label 1807: @72245
   29165             :     GIM_Reject,
   29166             :     // Label 1798: @72246
   29167             :     GIM_Reject,
   29168             :     // Label 32: @72247
   29169             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 3, /*)*//*default:*//*Label 1813*/ 72422,
   29170             :     /*GILLT_s32*//*Label 1811*/ 72255,
   29171             :     /*GILLT_s64*//*Label 1812*/ 72392,
   29172             :     // Label 1811: @72255
   29173             :     GIM_Try, /*On fail goto*//*Label 1814*/ 72391,
   29174             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
   29175             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   29176             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   29177             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
   29178             :       GIM_Try, /*On fail goto*//*Label 1815*/ 72312, // Rule ID 1867 //
   29179             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
   29180             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ANYEXT,
   29181             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
   29182             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
   29183             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   29184             :         // (shl:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, (anyext:{ *:[i64] } GPR32:{ *:[i32] }:$Rm))  =>  (LSLVWr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
   29185             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LSLVWr,
   29186             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   29187             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   29188             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
   29189             :         GIR_EraseFromParent, /*InsnID*/0,
   29190             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29191             :         // GIR_Coverage, 1867,
   29192             :         GIR_Done,
   29193             :       // Label 1815: @72312
   29194             :       GIM_Try, /*On fail goto*//*Label 1816*/ 72351, // Rule ID 1868 //
   29195             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
   29196             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
   29197             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
   29198             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
   29199             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   29200             :         // (shl:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rm))  =>  (LSLVWr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
   29201             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LSLVWr,
   29202             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   29203             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   29204             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
   29205             :         GIR_EraseFromParent, /*InsnID*/0,
   29206             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29207             :         // GIR_Coverage, 1868,
   29208             :         GIR_Done,
   29209             :       // Label 1816: @72351
   29210             :       GIM_Try, /*On fail goto*//*Label 1817*/ 72390, // Rule ID 1866 //
   29211             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
   29212             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
   29213             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
   29214             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
   29215             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   29216             :         // (shl:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rm))  =>  (LSLVWr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
   29217             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LSLVWr,
   29218             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   29219             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   29220             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
   29221             :         GIR_EraseFromParent, /*InsnID*/0,
   29222             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29223             :         // GIR_Coverage, 1866,
   29224             :         GIR_Done,
   29225             :       // Label 1817: @72390
   29226             :       GIM_Reject,
   29227             :     // Label 1814: @72391
   29228             :     GIM_Reject,
   29229             :     // Label 1812: @72392
   29230             :     GIM_Try, /*On fail goto*//*Label 1818*/ 72421, // Rule ID 62 //
   29231             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
   29232             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   29233             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   29234             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
   29235             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   29236             :       // (shl:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)  =>  (LSLVXr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
   29237             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::LSLVXr,
   29238             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29239             :       // GIR_Coverage, 62,
   29240             :       GIR_Done,
   29241             :     // Label 1818: @72421
   29242             :     GIM_Reject,
   29243             :     // Label 1813: @72422
   29244             :     GIM_Reject,
   29245             :     // Label 33: @72423
   29246             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 3, /*)*//*default:*//*Label 1821*/ 72673,
   29247             :     /*GILLT_s32*//*Label 1819*/ 72431,
   29248             :     /*GILLT_s64*//*Label 1820*/ 72604,
   29249             :     // Label 1819: @72431
   29250             :     GIM_Try, /*On fail goto*//*Label 1822*/ 72603,
   29251             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
   29252             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   29253             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   29254             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
   29255             :       GIM_Try, /*On fail goto*//*Label 1823*/ 72485, // Rule ID 1913 //
   29256             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
   29257             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   29258             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_imm0_31,
   29259             :         // MIs[1] Operand 1
   29260             :         // No operand predicates
   29261             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   29262             :         // (srl:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_imm0_31>>:$imm)  =>  (UBFMWri:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_imm0_31>>:$imm, 31:{ *:[i64] })
   29263             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UBFMWri,
   29264             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   29265             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   29266             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   29267             :         GIR_AddImm, /*InsnID*/0, /*Imm*/31,
   29268             :         GIR_EraseFromParent, /*InsnID*/0,
   29269             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29270             :         // GIR_Coverage, 1913,
   29271             :         GIR_Done,
   29272             :       // Label 1823: @72485
   29273             :       GIM_Try, /*On fail goto*//*Label 1824*/ 72524, // Rule ID 1871 //
   29274             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
   29275             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ANYEXT,
   29276             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
   29277             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
   29278             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   29279             :         // (srl:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, (anyext:{ *:[i64] } GPR32:{ *:[i32] }:$Rm))  =>  (LSRVWr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
   29280             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LSRVWr,
   29281             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   29282             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   29283             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
   29284             :         GIR_EraseFromParent, /*InsnID*/0,
   29285             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29286             :         // GIR_Coverage, 1871,
   29287             :         GIR_Done,
   29288             :       // Label 1824: @72524
   29289             :       GIM_Try, /*On fail goto*//*Label 1825*/ 72563, // Rule ID 1872 //
   29290             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
   29291             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
   29292             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
   29293             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
   29294             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   29295             :         // (srl:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rm))  =>  (LSRVWr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
   29296             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LSRVWr,
   29297             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   29298             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   29299             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
   29300             :         GIR_EraseFromParent, /*InsnID*/0,
   29301             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29302             :         // GIR_Coverage, 1872,
   29303             :         GIR_Done,
   29304             :       // Label 1825: @72563
   29305             :       GIM_Try, /*On fail goto*//*Label 1826*/ 72602, // Rule ID 1870 //
   29306             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
   29307             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
   29308             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
   29309             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
   29310             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   29311             :         // (srl:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rm))  =>  (LSRVWr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
   29312             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LSRVWr,
   29313             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   29314             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   29315             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
   29316             :         GIR_EraseFromParent, /*InsnID*/0,
   29317             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29318             :         // GIR_Coverage, 1870,
   29319             :         GIR_Done,
   29320             :       // Label 1826: @72602
   29321             :       GIM_Reject,
   29322             :     // Label 1822: @72603
   29323             :     GIM_Reject,
   29324             :     // Label 1820: @72604
   29325             :     GIM_Try, /*On fail goto*//*Label 1827*/ 72672,
   29326             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
   29327             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   29328             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   29329             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
   29330             :       GIM_Try, /*On fail goto*//*Label 1828*/ 72658, // Rule ID 1914 //
   29331             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
   29332             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   29333             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_imm0_63,
   29334             :         // MIs[1] Operand 1
   29335             :         // No operand predicates
   29336             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   29337             :         // (srl:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_imm0_63>>:$imm)  =>  (UBFMXri:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_imm0_63>>:$imm, 63:{ *:[i64] })
   29338             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UBFMXri,
   29339             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   29340             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   29341             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   29342             :         GIR_AddImm, /*InsnID*/0, /*Imm*/63,
   29343             :         GIR_EraseFromParent, /*InsnID*/0,
   29344             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29345             :         // GIR_Coverage, 1914,
   29346             :         GIR_Done,
   29347             :       // Label 1828: @72658
   29348             :       GIM_Try, /*On fail goto*//*Label 1829*/ 72671, // Rule ID 63 //
   29349             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   29350             :         // (srl:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)  =>  (LSRVXr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
   29351             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::LSRVXr,
   29352             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29353             :         // GIR_Coverage, 63,
   29354             :         GIR_Done,
   29355             :       // Label 1829: @72671
   29356             :       GIM_Reject,
   29357             :     // Label 1827: @72672
   29358             :     GIM_Reject,
   29359             :     // Label 1821: @72673
   29360             :     GIM_Reject,
   29361             :     // Label 34: @72674
   29362             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 3, /*)*//*default:*//*Label 1832*/ 72924,
   29363             :     /*GILLT_s32*//*Label 1830*/ 72682,
   29364             :     /*GILLT_s64*//*Label 1831*/ 72855,
   29365             :     // Label 1830: @72682
   29366             :     GIM_Try, /*On fail goto*//*Label 1833*/ 72854,
   29367             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
   29368             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   29369             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   29370             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
   29371             :       GIM_Try, /*On fail goto*//*Label 1834*/ 72736, // Rule ID 1911 //
   29372             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
   29373             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   29374             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_imm0_31,
   29375             :         // MIs[1] Operand 1
   29376             :         // No operand predicates
   29377             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   29378             :         // (sra:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_imm0_31>>:$imm)  =>  (SBFMWri:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_imm0_31>>:$imm, 31:{ *:[i64] })
   29379             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SBFMWri,
   29380             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   29381             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   29382             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   29383             :         GIR_AddImm, /*InsnID*/0, /*Imm*/31,
   29384             :         GIR_EraseFromParent, /*InsnID*/0,
   29385             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29386             :         // GIR_Coverage, 1911,
   29387             :         GIR_Done,
   29388             :       // Label 1834: @72736
   29389             :       GIM_Try, /*On fail goto*//*Label 1835*/ 72775, // Rule ID 1767 //
   29390             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
   29391             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ANYEXT,
   29392             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
   29393             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
   29394             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   29395             :         // (sra:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, (anyext:{ *:[i64] } GPR32:{ *:[i32] }:$Rm))  =>  (ASRVWr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
   29396             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ASRVWr,
   29397             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   29398             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   29399             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
   29400             :         GIR_EraseFromParent, /*InsnID*/0,
   29401             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29402             :         // GIR_Coverage, 1767,
   29403             :         GIR_Done,
   29404             :       // Label 1835: @72775
   29405             :       GIM_Try, /*On fail goto*//*Label 1836*/ 72814, // Rule ID 1768 //
   29406             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
   29407             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
   29408             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
   29409             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
   29410             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   29411             :         // (sra:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rm))  =>  (ASRVWr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
   29412             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ASRVWr,
   29413             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   29414             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   29415             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
   29416             :         GIR_EraseFromParent, /*InsnID*/0,
   29417             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29418             :         // GIR_Coverage, 1768,
   29419             :         GIR_Done,
   29420             :       // Label 1836: @72814
   29421             :       GIM_Try, /*On fail goto*//*Label 1837*/ 72853, // Rule ID 1766 //
   29422             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
   29423             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
   29424             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
   29425             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
   29426             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   29427             :         // (sra:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rm))  =>  (ASRVWr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
   29428             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ASRVWr,
   29429             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   29430             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   29431             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
   29432             :         GIR_EraseFromParent, /*InsnID*/0,
   29433             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29434             :         // GIR_Coverage, 1766,
   29435             :         GIR_Done,
   29436             :       // Label 1837: @72853
   29437             :       GIM_Reject,
   29438             :     // Label 1833: @72854
   29439             :     GIM_Reject,
   29440             :     // Label 1831: @72855
   29441             :     GIM_Try, /*On fail goto*//*Label 1838*/ 72923,
   29442             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
   29443             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   29444             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   29445             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
   29446             :       GIM_Try, /*On fail goto*//*Label 1839*/ 72909, // Rule ID 1912 //
   29447             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
   29448             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
   29449             :         GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_imm0_63,
   29450             :         // MIs[1] Operand 1
   29451             :         // No operand predicates
   29452             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   29453             :         // (sra:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_imm0_63>>:$imm)  =>  (SBFMXri:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_imm0_63>>:$imm, 63:{ *:[i64] })
   29454             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SBFMXri,
   29455             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   29456             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   29457             :         GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
   29458             :         GIR_AddImm, /*InsnID*/0, /*Imm*/63,
   29459             :         GIR_EraseFromParent, /*InsnID*/0,
   29460             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29461             :         // GIR_Coverage, 1912,
   29462             :         GIR_Done,
   29463             :       // Label 1839: @72909
   29464             :       GIM_Try, /*On fail goto*//*Label 1840*/ 72922, // Rule ID 61 //
   29465             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
   29466             :         // (sra:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)  =>  (ASRVXr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
   29467             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ASRVXr,
   29468             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29469             :         // GIR_Coverage, 61,
   29470             :         GIR_Done,
   29471             :       // Label 1840: @72922
   29472             :       GIM_Reject,
   29473             :     // Label 1838: @72923
   29474             :     GIM_Reject,
   29475             :     // Label 1832: @72924
   29476             :     GIM_Reject,
   29477             :     // Label 35: @72925
   29478             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/0, 10, /*)*//*default:*//*Label 1849*/ 73197,
   29479             :     /*GILLT_s16*//*Label 1841*/ 72941,
   29480             :     /*GILLT_s32*//*Label 1842*/ 72973,
   29481             :     /*GILLT_s64*//*Label 1843*/ 73005, 0,
   29482             :     /*GILLT_v2s32*//*Label 1844*/ 73037,
   29483             :     /*GILLT_v2s64*//*Label 1845*/ 73069,
   29484             :     /*GILLT_v4s16*//*Label 1846*/ 73101,
   29485             :     /*GILLT_v4s32*//*Label 1847*/ 73133, 0,
   29486             :     /*GILLT_v8s16*//*Label 1848*/ 73165,
   29487             :     // Label 1841: @72941
   29488             :     GIM_Try, /*On fail goto*//*Label 1850*/ 72972, // Rule ID 414 //
   29489             :       GIM_CheckFeatures, GIFBS_HasFullFP16,
   29490             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
   29491             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
   29492             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR16RegClassID,
   29493             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR16RegClassID,
   29494             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR16RegClassID,
   29495             :       // (fadd:{ *:[f16] } FPR16:{ *:[f16] }:$Rn, FPR16:{ *:[f16] }:$Rm)  =>  (FADDHrr:{ *:[f16] } FPR16:{ *:[f16] }:$Rn, FPR16:{ *:[f16] }:$Rm)
   29496             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FADDHrr,
   29497             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29498             :       // GIR_Coverage, 414,
   29499             :       GIR_Done,
   29500             :     // Label 1850: @72972
   29501             :     GIM_Reject,
   29502             :     // Label 1842: @72973
   29503             :     GIM_Try, /*On fail goto*//*Label 1851*/ 73004, // Rule ID 415 //
   29504             :       GIM_CheckFeatures, GIFBS_HasFPARMv8,
   29505             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
   29506             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   29507             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   29508             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR32RegClassID,
   29509             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   29510             :       // (fadd:{ *:[f32] } FPR32:{ *:[f32] }:$Rn, FPR32:{ *:[f32] }:$Rm)  =>  (FADDSrr:{ *:[f32] } FPR32:{ *:[f32] }:$Rn, FPR32:{ *:[f32] }:$Rm)
   29511             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FADDSrr,
   29512             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29513             :       // GIR_Coverage, 415,
   29514             :       GIR_Done,
   29515             :     // Label 1851: @73004
   29516             :     GIM_Reject,
   29517             :     // Label 1843: @73005
   29518             :     GIM_Try, /*On fail goto*//*Label 1852*/ 73036, // Rule ID 416 //
   29519             :       GIM_CheckFeatures, GIFBS_HasFPARMv8,
   29520             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
   29521             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   29522             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   29523             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   29524             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   29525             :       // (fadd:{ *:[f64] } FPR64:{ *:[f64] }:$Rn, FPR64:{ *:[f64] }:$Rm)  =>  (FADDDrr:{ *:[f64] } FPR64:{ *:[f64] }:$Rn, FPR64:{ *:[f64] }:$Rm)
   29526             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FADDDrr,
   29527             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29528             :       // GIR_Coverage, 416,
   29529             :       GIR_Done,
   29530             :     // Label 1852: @73036
   29531             :     GIM_Reject,
   29532             :     // Label 1844: @73037
   29533             :     GIM_Try, /*On fail goto*//*Label 1853*/ 73068, // Rule ID 846 //
   29534             :       GIM_CheckFeatures, GIFBS_HasNEON,
   29535             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
   29536             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   29537             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   29538             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   29539             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   29540             :       // (fadd:{ *:[v2f32] } V64:{ *:[v2f32] }:$Rn, V64:{ *:[v2f32] }:$Rm)  =>  (FADDv2f32:{ *:[v2f32] } V64:{ *:[v2f32] }:$Rn, V64:{ *:[v2f32] }:$Rm)
   29541             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FADDv2f32,
   29542             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29543             :       // GIR_Coverage, 846,
   29544             :       GIR_Done,
   29545             :     // Label 1853: @73068
   29546             :     GIM_Reject,
   29547             :     // Label 1845: @73069
   29548             :     GIM_Try, /*On fail goto*//*Label 1854*/ 73100, // Rule ID 848 //
   29549             :       GIM_CheckFeatures, GIFBS_HasNEON,
   29550             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
   29551             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   29552             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   29553             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   29554             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   29555             :       // (fadd:{ *:[v2f64] } V128:{ *:[v2f64] }:$Rn, V128:{ *:[v2f64] }:$Rm)  =>  (FADDv2f64:{ *:[v2f64] } V128:{ *:[v2f64] }:$Rn, V128:{ *:[v2f64] }:$Rm)
   29556             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FADDv2f64,
   29557             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29558             :       // GIR_Coverage, 848,
   29559             :       GIR_Done,
   29560             :     // Label 1854: @73100
   29561             :     GIM_Reject,
   29562             :     // Label 1846: @73101
   29563             :     GIM_Try, /*On fail goto*//*Label 1855*/ 73132, // Rule ID 844 //
   29564             :       GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   29565             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
   29566             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   29567             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   29568             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   29569             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   29570             :       // (fadd:{ *:[v4f16] } V64:{ *:[v4f16] }:$Rn, V64:{ *:[v4f16] }:$Rm)  =>  (FADDv4f16:{ *:[v4f16] } V64:{ *:[v4f16] }:$Rn, V64:{ *:[v4f16] }:$Rm)
   29571             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FADDv4f16,
   29572             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29573             :       // GIR_Coverage, 844,
   29574             :       GIR_Done,
   29575             :     // Label 1855: @73132
   29576             :     GIM_Reject,
   29577             :     // Label 1847: @73133
   29578             :     GIM_Try, /*On fail goto*//*Label 1856*/ 73164, // Rule ID 847 //
   29579             :       GIM_CheckFeatures, GIFBS_HasNEON,
   29580             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
   29581             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   29582             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   29583             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   29584             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   29585             :       // (fadd:{ *:[v4f32] } V128:{ *:[v4f32] }:$Rn, V128:{ *:[v4f32] }:$Rm)  =>  (FADDv4f32:{ *:[v4f32] } V128:{ *:[v4f32] }:$Rn, V128:{ *:[v4f32] }:$Rm)
   29586             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FADDv4f32,
   29587             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29588             :       // GIR_Coverage, 847,
   29589             :       GIR_Done,
   29590             :     // Label 1856: @73164
   29591             :     GIM_Reject,
   29592             :     // Label 1848: @73165
   29593             :     GIM_Try, /*On fail goto*//*Label 1857*/ 73196, // Rule ID 845 //
   29594             :       GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   29595             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
   29596             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   29597             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   29598             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   29599             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   29600             :       // (fadd:{ *:[v8f16] } V128:{ *:[v8f16] }:$Rn, V128:{ *:[v8f16] }:$Rm)  =>  (FADDv8f16:{ *:[v8f16] } V128:{ *:[v8f16] }:$Rn, V128:{ *:[v8f16] }:$Rm)
   29601             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FADDv8f16,
   29602             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29603             :       // GIR_Coverage, 845,
   29604             :       GIR_Done,
   29605             :     // Label 1857: @73196
   29606             :     GIM_Reject,
   29607             :     // Label 1849: @73197
   29608             :     GIM_Reject,
   29609             :     // Label 36: @73198
   29610             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/0, 10, /*)*//*default:*//*Label 1866*/ 73470,
   29611             :     /*GILLT_s16*//*Label 1858*/ 73214,
   29612             :     /*GILLT_s32*//*Label 1859*/ 73246,
   29613             :     /*GILLT_s64*//*Label 1860*/ 73278, 0,
   29614             :     /*GILLT_v2s32*//*Label 1861*/ 73310,
   29615             :     /*GILLT_v2s64*//*Label 1862*/ 73342,
   29616             :     /*GILLT_v4s16*//*Label 1863*/ 73374,
   29617             :     /*GILLT_v4s32*//*Label 1864*/ 73406, 0,
   29618             :     /*GILLT_v8s16*//*Label 1865*/ 73438,
   29619             :     // Label 1858: @73214
   29620             :     GIM_Try, /*On fail goto*//*Label 1867*/ 73245, // Rule ID 438 //
   29621             :       GIM_CheckFeatures, GIFBS_HasFullFP16,
   29622             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
   29623             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
   29624             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR16RegClassID,
   29625             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR16RegClassID,
   29626             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR16RegClassID,
   29627             :       // (fsub:{ *:[f16] } FPR16:{ *:[f16] }:$Rn, FPR16:{ *:[f16] }:$Rm)  =>  (FSUBHrr:{ *:[f16] } FPR16:{ *:[f16] }:$Rn, FPR16:{ *:[f16] }:$Rm)
   29628             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FSUBHrr,
   29629             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29630             :       // GIR_Coverage, 438,
   29631             :       GIR_Done,
   29632             :     // Label 1867: @73245
   29633             :     GIM_Reject,
   29634             :     // Label 1859: @73246
   29635             :     GIM_Try, /*On fail goto*//*Label 1868*/ 73277, // Rule ID 439 //
   29636             :       GIM_CheckFeatures, GIFBS_HasFPARMv8,
   29637             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
   29638             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   29639             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   29640             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR32RegClassID,
   29641             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   29642             :       // (fsub:{ *:[f32] } FPR32:{ *:[f32] }:$Rn, FPR32:{ *:[f32] }:$Rm)  =>  (FSUBSrr:{ *:[f32] } FPR32:{ *:[f32] }:$Rn, FPR32:{ *:[f32] }:$Rm)
   29643             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FSUBSrr,
   29644             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29645             :       // GIR_Coverage, 439,
   29646             :       GIR_Done,
   29647             :     // Label 1868: @73277
   29648             :     GIM_Reject,
   29649             :     // Label 1860: @73278
   29650             :     GIM_Try, /*On fail goto*//*Label 1869*/ 73309, // Rule ID 440 //
   29651             :       GIM_CheckFeatures, GIFBS_HasFPARMv8,
   29652             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
   29653             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   29654             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   29655             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   29656             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   29657             :       // (fsub:{ *:[f64] } FPR64:{ *:[f64] }:$Rn, FPR64:{ *:[f64] }:$Rm)  =>  (FSUBDrr:{ *:[f64] } FPR64:{ *:[f64] }:$Rn, FPR64:{ *:[f64] }:$Rm)
   29658             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FSUBDrr,
   29659             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29660             :       // GIR_Coverage, 440,
   29661             :       GIR_Done,
   29662             :     // Label 1869: @73309
   29663             :     GIM_Reject,
   29664             :     // Label 1861: @73310
   29665             :     GIM_Try, /*On fail goto*//*Label 1870*/ 73341, // Rule ID 941 //
   29666             :       GIM_CheckFeatures, GIFBS_HasNEON,
   29667             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
   29668             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   29669             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   29670             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   29671             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   29672             :       // (fsub:{ *:[v2f32] } V64:{ *:[v2f32] }:$Rn, V64:{ *:[v2f32] }:$Rm)  =>  (FSUBv2f32:{ *:[v2f32] } V64:{ *:[v2f32] }:$Rn, V64:{ *:[v2f32] }:$Rm)
   29673             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FSUBv2f32,
   29674             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29675             :       // GIR_Coverage, 941,
   29676             :       GIR_Done,
   29677             :     // Label 1870: @73341
   29678             :     GIM_Reject,
   29679             :     // Label 1862: @73342
   29680             :     GIM_Try, /*On fail goto*//*Label 1871*/ 73373, // Rule ID 943 //
   29681             :       GIM_CheckFeatures, GIFBS_HasNEON,
   29682             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
   29683             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   29684             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   29685             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   29686             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   29687             :       // (fsub:{ *:[v2f64] } V128:{ *:[v2f64] }:$Rn, V128:{ *:[v2f64] }:$Rm)  =>  (FSUBv2f64:{ *:[v2f64] } V128:{ *:[v2f64] }:$Rn, V128:{ *:[v2f64] }:$Rm)
   29688             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FSUBv2f64,
   29689             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29690             :       // GIR_Coverage, 943,
   29691             :       GIR_Done,
   29692             :     // Label 1871: @73373
   29693             :     GIM_Reject,
   29694             :     // Label 1863: @73374
   29695             :     GIM_Try, /*On fail goto*//*Label 1872*/ 73405, // Rule ID 939 //
   29696             :       GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   29697             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
   29698             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   29699             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   29700             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   29701             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   29702             :       // (fsub:{ *:[v4f16] } V64:{ *:[v4f16] }:$Rn, V64:{ *:[v4f16] }:$Rm)  =>  (FSUBv4f16:{ *:[v4f16] } V64:{ *:[v4f16] }:$Rn, V64:{ *:[v4f16] }:$Rm)
   29703             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FSUBv4f16,
   29704             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29705             :       // GIR_Coverage, 939,
   29706             :       GIR_Done,
   29707             :     // Label 1872: @73405
   29708             :     GIM_Reject,
   29709             :     // Label 1864: @73406
   29710             :     GIM_Try, /*On fail goto*//*Label 1873*/ 73437, // Rule ID 942 //
   29711             :       GIM_CheckFeatures, GIFBS_HasNEON,
   29712             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
   29713             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   29714             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   29715             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   29716             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   29717             :       // (fsub:{ *:[v4f32] } V128:{ *:[v4f32] }:$Rn, V128:{ *:[v4f32] }:$Rm)  =>  (FSUBv4f32:{ *:[v4f32] } V128:{ *:[v4f32] }:$Rn, V128:{ *:[v4f32] }:$Rm)
   29718             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FSUBv4f32,
   29719             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29720             :       // GIR_Coverage, 942,
   29721             :       GIR_Done,
   29722             :     // Label 1873: @73437
   29723             :     GIM_Reject,
   29724             :     // Label 1865: @73438
   29725             :     GIM_Try, /*On fail goto*//*Label 1874*/ 73469, // Rule ID 940 //
   29726             :       GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   29727             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
   29728             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   29729             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   29730             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   29731             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   29732             :       // (fsub:{ *:[v8f16] } V128:{ *:[v8f16] }:$Rn, V128:{ *:[v8f16] }:$Rm)  =>  (FSUBv8f16:{ *:[v8f16] } V128:{ *:[v8f16] }:$Rn, V128:{ *:[v8f16] }:$Rm)
   29733             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FSUBv8f16,
   29734             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29735             :       // GIR_Coverage, 940,
   29736             :       GIR_Done,
   29737             :     // Label 1874: @73469
   29738             :     GIM_Reject,
   29739             :     // Label 1866: @73470
   29740             :     GIM_Reject,
   29741             :     // Label 37: @73471
   29742             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/0, 10, /*)*//*default:*//*Label 1883*/ 73743,
   29743             :     /*GILLT_s16*//*Label 1875*/ 73487,
   29744             :     /*GILLT_s32*//*Label 1876*/ 73519,
   29745             :     /*GILLT_s64*//*Label 1877*/ 73551, 0,
   29746             :     /*GILLT_v2s32*//*Label 1878*/ 73583,
   29747             :     /*GILLT_v2s64*//*Label 1879*/ 73615,
   29748             :     /*GILLT_v4s16*//*Label 1880*/ 73647,
   29749             :     /*GILLT_v4s32*//*Label 1881*/ 73679, 0,
   29750             :     /*GILLT_v8s16*//*Label 1882*/ 73711,
   29751             :     // Label 1875: @73487
   29752             :     GIM_Try, /*On fail goto*//*Label 1884*/ 73518, // Rule ID 432 //
   29753             :       GIM_CheckFeatures, GIFBS_HasFullFP16,
   29754             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
   29755             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
   29756             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR16RegClassID,
   29757             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR16RegClassID,
   29758             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR16RegClassID,
   29759             :       // (fmul:{ *:[f16] } FPR16:{ *:[f16] }:$Rn, FPR16:{ *:[f16] }:$Rm)  =>  (FMULHrr:{ *:[f16] } FPR16:{ *:[f16] }:$Rn, FPR16:{ *:[f16] }:$Rm)
   29760             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FMULHrr,
   29761             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29762             :       // GIR_Coverage, 432,
   29763             :       GIR_Done,
   29764             :     // Label 1884: @73518
   29765             :     GIM_Reject,
   29766             :     // Label 1876: @73519
   29767             :     GIM_Try, /*On fail goto*//*Label 1885*/ 73550, // Rule ID 433 //
   29768             :       GIM_CheckFeatures, GIFBS_HasFPARMv8,
   29769             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
   29770             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   29771             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   29772             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR32RegClassID,
   29773             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   29774             :       // (fmul:{ *:[f32] } FPR32:{ *:[f32] }:$Rn, FPR32:{ *:[f32] }:$Rm)  =>  (FMULSrr:{ *:[f32] } FPR32:{ *:[f32] }:$Rn, FPR32:{ *:[f32] }:$Rm)
   29775             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FMULSrr,
   29776             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29777             :       // GIR_Coverage, 433,
   29778             :       GIR_Done,
   29779             :     // Label 1885: @73550
   29780             :     GIM_Reject,
   29781             :     // Label 1877: @73551
   29782             :     GIM_Try, /*On fail goto*//*Label 1886*/ 73582, // Rule ID 434 //
   29783             :       GIM_CheckFeatures, GIFBS_HasFPARMv8,
   29784             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
   29785             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   29786             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   29787             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   29788             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   29789             :       // (fmul:{ *:[f64] } FPR64:{ *:[f64] }:$Rn, FPR64:{ *:[f64] }:$Rm)  =>  (FMULDrr:{ *:[f64] } FPR64:{ *:[f64] }:$Rn, FPR64:{ *:[f64] }:$Rm)
   29790             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FMULDrr,
   29791             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29792             :       // GIR_Coverage, 434,
   29793             :       GIR_Done,
   29794             :     // Label 1886: @73582
   29795             :     GIM_Reject,
   29796             :     // Label 1878: @73583
   29797             :     GIM_Try, /*On fail goto*//*Label 1887*/ 73614, // Rule ID 926 //
   29798             :       GIM_CheckFeatures, GIFBS_HasNEON,
   29799             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
   29800             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   29801             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   29802             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   29803             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   29804             :       // (fmul:{ *:[v2f32] } V64:{ *:[v2f32] }:$Rn, V64:{ *:[v2f32] }:$Rm)  =>  (FMULv2f32:{ *:[v2f32] } V64:{ *:[v2f32] }:$Rn, V64:{ *:[v2f32] }:$Rm)
   29805             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FMULv2f32,
   29806             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29807             :       // GIR_Coverage, 926,
   29808             :       GIR_Done,
   29809             :     // Label 1887: @73614
   29810             :     GIM_Reject,
   29811             :     // Label 1879: @73615
   29812             :     GIM_Try, /*On fail goto*//*Label 1888*/ 73646, // Rule ID 928 //
   29813             :       GIM_CheckFeatures, GIFBS_HasNEON,
   29814             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
   29815             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   29816             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   29817             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   29818             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   29819             :       // (fmul:{ *:[v2f64] } V128:{ *:[v2f64] }:$Rn, V128:{ *:[v2f64] }:$Rm)  =>  (FMULv2f64:{ *:[v2f64] } V128:{ *:[v2f64] }:$Rn, V128:{ *:[v2f64] }:$Rm)
   29820             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FMULv2f64,
   29821             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29822             :       // GIR_Coverage, 928,
   29823             :       GIR_Done,
   29824             :     // Label 1888: @73646
   29825             :     GIM_Reject,
   29826             :     // Label 1880: @73647
   29827             :     GIM_Try, /*On fail goto*//*Label 1889*/ 73678, // Rule ID 924 //
   29828             :       GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   29829             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
   29830             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   29831             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   29832             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   29833             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   29834             :       // (fmul:{ *:[v4f16] } V64:{ *:[v4f16] }:$Rn, V64:{ *:[v4f16] }:$Rm)  =>  (FMULv4f16:{ *:[v4f16] } V64:{ *:[v4f16] }:$Rn, V64:{ *:[v4f16] }:$Rm)
   29835             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FMULv4f16,
   29836             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29837             :       // GIR_Coverage, 924,
   29838             :       GIR_Done,
   29839             :     // Label 1889: @73678
   29840             :     GIM_Reject,
   29841             :     // Label 1881: @73679
   29842             :     GIM_Try, /*On fail goto*//*Label 1890*/ 73710, // Rule ID 927 //
   29843             :       GIM_CheckFeatures, GIFBS_HasNEON,
   29844             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
   29845             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   29846             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   29847             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   29848             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   29849             :       // (fmul:{ *:[v4f32] } V128:{ *:[v4f32] }:$Rn, V128:{ *:[v4f32] }:$Rm)  =>  (FMULv4f32:{ *:[v4f32] } V128:{ *:[v4f32] }:$Rn, V128:{ *:[v4f32] }:$Rm)
   29850             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FMULv4f32,
   29851             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29852             :       // GIR_Coverage, 927,
   29853             :       GIR_Done,
   29854             :     // Label 1890: @73710
   29855             :     GIM_Reject,
   29856             :     // Label 1882: @73711
   29857             :     GIM_Try, /*On fail goto*//*Label 1891*/ 73742, // Rule ID 925 //
   29858             :       GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   29859             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
   29860             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   29861             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   29862             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   29863             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   29864             :       // (fmul:{ *:[v8f16] } V128:{ *:[v8f16] }:$Rn, V128:{ *:[v8f16] }:$Rm)  =>  (FMULv8f16:{ *:[v8f16] } V128:{ *:[v8f16] }:$Rn, V128:{ *:[v8f16] }:$Rm)
   29865             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FMULv8f16,
   29866             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29867             :       // GIR_Coverage, 925,
   29868             :       GIR_Done,
   29869             :     // Label 1891: @73742
   29870             :     GIM_Reject,
   29871             :     // Label 1883: @73743
   29872             :     GIM_Reject,
   29873             :     // Label 38: @73744
   29874             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/0, 10, /*)*//*default:*//*Label 1900*/ 75267,
   29875             :     /*GILLT_s16*//*Label 1892*/ 73760,
   29876             :     /*GILLT_s32*//*Label 1893*/ 73901,
   29877             :     /*GILLT_s64*//*Label 1894*/ 74229, 0,
   29878             :     /*GILLT_v2s32*//*Label 1895*/ 74557,
   29879             :     /*GILLT_v2s64*//*Label 1896*/ 74721,
   29880             :     /*GILLT_v4s16*//*Label 1897*/ 74885,
   29881             :     /*GILLT_v4s32*//*Label 1898*/ 74994, 0,
   29882             :     /*GILLT_v8s16*//*Label 1899*/ 75158,
   29883             :     // Label 1892: @73760
   29884             :     GIM_Try, /*On fail goto*//*Label 1901*/ 73900,
   29885             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
   29886             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
   29887             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s16,
   29888             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR16RegClassID,
   29889             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR16RegClassID,
   29890             :       GIM_Try, /*On fail goto*//*Label 1902*/ 73831, // Rule ID 444 //
   29891             :         GIM_CheckFeatures, GIFBS_HasFullFP16,
   29892             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
   29893             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FNEG,
   29894             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s16,
   29895             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR16RegClassID,
   29896             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR16RegClassID,
   29897             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   29898             :         // (fma:{ *:[f16] } FPR16:{ *:[f16] }:$Rn, (fneg:{ *:[f16] } FPR16:{ *:[f16] }:$Rm), FPR16:{ *:[f16] }:$Ra)  =>  (FMSUBHrrr:{ *:[f16] } FPR16:{ *:[f16] }:$Rn, FPR16:{ *:[f16] }:$Rm, FPR16:{ *:[f16] }:$Ra)
   29899             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMSUBHrrr,
   29900             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   29901             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   29902             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
   29903             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Ra
   29904             :         GIR_EraseFromParent, /*InsnID*/0,
   29905             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29906             :         // GIR_Coverage, 444,
   29907             :         GIR_Done,
   29908             :       // Label 1902: @73831
   29909             :       GIM_Try, /*On fail goto*//*Label 1903*/ 73880, // Rule ID 450 //
   29910             :         GIM_CheckFeatures, GIFBS_HasFullFP16,
   29911             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR16RegClassID,
   29912             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   29913             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FNEG,
   29914             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s16,
   29915             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR16RegClassID,
   29916             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   29917             :         // (fma:{ *:[f16] } FPR16:{ *:[f16] }:$Rn, FPR16:{ *:[f16] }:$Rm, (fneg:{ *:[f16] } FPR16:{ *:[f16] }:$Ra))  =>  (FNMSUBHrrr:{ *:[f16] } FPR16:{ *:[f16] }:$Rn, FPR16:{ *:[f16] }:$Rm, FPR16:{ *:[f16] }:$Ra)
   29918             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FNMSUBHrrr,
   29919             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   29920             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   29921             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   29922             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Ra
   29923             :         GIR_EraseFromParent, /*InsnID*/0,
   29924             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29925             :         // GIR_Coverage, 450,
   29926             :         GIR_Done,
   29927             :       // Label 1903: @73880
   29928             :       GIM_Try, /*On fail goto*//*Label 1904*/ 73899, // Rule ID 441 //
   29929             :         GIM_CheckFeatures, GIFBS_HasFullFP16,
   29930             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR16RegClassID,
   29931             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR16RegClassID,
   29932             :         // (fma:{ *:[f16] } FPR16:{ *:[f16] }:$Rn, FPR16:{ *:[f16] }:$Rm, FPR16:{ *:[f16] }:$Ra)  =>  (FMADDHrrr:{ *:[f16] } FPR16:{ *:[f16] }:$Rn, FPR16:{ *:[f16] }:$Rm, FPR16:{ *:[f16] }:$Ra)
   29933             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FMADDHrrr,
   29934             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29935             :         // GIR_Coverage, 441,
   29936             :         GIR_Done,
   29937             :       // Label 1904: @73899
   29938             :       GIM_Reject,
   29939             :     // Label 1901: @73900
   29940             :     GIM_Reject,
   29941             :     // Label 1893: @73901
   29942             :     GIM_Try, /*On fail goto*//*Label 1905*/ 74228,
   29943             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
   29944             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   29945             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
   29946             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   29947             :       GIM_Try, /*On fail goto*//*Label 1906*/ 73983, // Rule ID 2285 //
   29948             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
   29949             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FNEG,
   29950             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
   29951             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR32RegClassID,
   29952             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   29953             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
   29954             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_FNEG,
   29955             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
   29956             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR32RegClassID,
   29957             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   29958             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
   29959             :         // (fma:{ *:[f32] } (fneg:{ *:[f32] } FPR32:{ *:[f32] }:$Rn), FPR32:{ *:[f32] }:$Rm, (fneg:{ *:[f32] } FPR32:{ *:[f32] }:$Ra))  =>  (FNMADDSrrr:{ *:[f32] } FPR32:{ *:[f32] }:$Rn, FPR32:{ *:[f32] }:$Rm, FPR32:{ *:[f32] }:$Ra)
   29960             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FNMADDSrrr,
   29961             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   29962             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
   29963             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   29964             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Ra
   29965             :         GIR_EraseFromParent, /*InsnID*/0,
   29966             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29967             :         // GIR_Coverage, 2285,
   29968             :         GIR_Done,
   29969             :       // Label 1906: @73983
   29970             :       GIM_Try, /*On fail goto*//*Label 1907*/ 74047, // Rule ID 2287 //
   29971             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR32RegClassID,
   29972             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
   29973             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FNEG,
   29974             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
   29975             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR32RegClassID,
   29976             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
   29977             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_FNEG,
   29978             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
   29979             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR32RegClassID,
   29980             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   29981             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
   29982             :         // (fma:{ *:[f32] } FPR32:{ *:[f32] }:$Rn, (fneg:{ *:[f32] } FPR32:{ *:[f32] }:$Rm), (fneg:{ *:[f32] } FPR32:{ *:[f32] }:$Ra))  =>  (FNMADDSrrr:{ *:[f32] } FPR32:{ *:[f32] }:$Rn, FPR32:{ *:[f32] }:$Rm, FPR32:{ *:[f32] }:$Ra)
   29983             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FNMADDSrrr,
   29984             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   29985             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   29986             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
   29987             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Ra
   29988             :         GIR_EraseFromParent, /*InsnID*/0,
   29989             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   29990             :         // GIR_Coverage, 2287,
   29991             :         GIR_Done,
   29992             :       // Label 1907: @74047
   29993             :       GIM_Try, /*On fail goto*//*Label 1908*/ 74098, // Rule ID 2283 //
   29994             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
   29995             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FNEG,
   29996             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
   29997             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR32RegClassID,
   29998             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   29999             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR32RegClassID,
   30000             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   30001             :         // (fma:{ *:[f32] } (fneg:{ *:[f32] } FPR32:{ *:[f32] }:$Rn), FPR32:{ *:[f32] }:$Rm, FPR32:{ *:[f32] }:$Ra)  =>  (FMSUBSrrr:{ *:[f32] } FPR32:{ *:[f32] }:$Rn, FPR32:{ *:[f32] }:$Rm, FPR32:{ *:[f32] }:$Ra)
   30002             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMSUBSrrr,
   30003             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   30004             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
   30005             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   30006             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Ra
   30007             :         GIR_EraseFromParent, /*InsnID*/0,
   30008             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30009             :         // GIR_Coverage, 2283,
   30010             :         GIR_Done,
   30011             :       // Label 1908: @74098
   30012             :       GIM_Try, /*On fail goto*//*Label 1909*/ 74151, // Rule ID 445 //
   30013             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   30014             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR32RegClassID,
   30015             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
   30016             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FNEG,
   30017             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
   30018             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR32RegClassID,
   30019             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR32RegClassID,
   30020             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   30021             :         // (fma:{ *:[f32] } FPR32:{ *:[f32] }:$Rn, (fneg:{ *:[f32] } FPR32:{ *:[f32] }:$Rm), FPR32:{ *:[f32] }:$Ra)  =>  (FMSUBSrrr:{ *:[f32] } FPR32:{ *:[f32] }:$Rn, FPR32:{ *:[f32] }:$Rm, FPR32:{ *:[f32] }:$Ra)
   30022             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMSUBSrrr,
   30023             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   30024             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   30025             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
   30026             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Ra
   30027             :         GIR_EraseFromParent, /*InsnID*/0,
   30028             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30029             :         // GIR_Coverage, 445,
   30030             :         GIR_Done,
   30031             :       // Label 1909: @74151
   30032             :       GIM_Try, /*On fail goto*//*Label 1910*/ 74204, // Rule ID 451 //
   30033             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   30034             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR32RegClassID,
   30035             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   30036             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   30037             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FNEG,
   30038             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
   30039             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR32RegClassID,
   30040             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   30041             :         // (fma:{ *:[f32] } FPR32:{ *:[f32] }:$Rn, FPR32:{ *:[f32] }:$Rm, (fneg:{ *:[f32] } FPR32:{ *:[f32] }:$Ra))  =>  (FNMSUBSrrr:{ *:[f32] } FPR32:{ *:[f32] }:$Rn, FPR32:{ *:[f32] }:$Rm, FPR32:{ *:[f32] }:$Ra)
   30042             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FNMSUBSrrr,
   30043             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   30044             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   30045             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   30046             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Ra
   30047             :         GIR_EraseFromParent, /*InsnID*/0,
   30048             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30049             :         // GIR_Coverage, 451,
   30050             :         GIR_Done,
   30051             :       // Label 1910: @74204
   30052             :       GIM_Try, /*On fail goto*//*Label 1911*/ 74227, // Rule ID 442 //
   30053             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   30054             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR32RegClassID,
   30055             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   30056             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR32RegClassID,
   30057             :         // (fma:{ *:[f32] } FPR32:{ *:[f32] }:$Rn, FPR32:{ *:[f32] }:$Rm, FPR32:{ *:[f32] }:$Ra)  =>  (FMADDSrrr:{ *:[f32] } FPR32:{ *:[f32] }:$Rn, FPR32:{ *:[f32] }:$Rm, FPR32:{ *:[f32] }:$Ra)
   30058             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FMADDSrrr,
   30059             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30060             :         // GIR_Coverage, 442,
   30061             :         GIR_Done,
   30062             :       // Label 1911: @74227
   30063             :       GIM_Reject,
   30064             :     // Label 1905: @74228
   30065             :     GIM_Reject,
   30066             :     // Label 1894: @74229
   30067             :     GIM_Try, /*On fail goto*//*Label 1912*/ 74556,
   30068             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
   30069             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   30070             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
   30071             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   30072             :       GIM_Try, /*On fail goto*//*Label 1913*/ 74311, // Rule ID 2286 //
   30073             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
   30074             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FNEG,
   30075             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
   30076             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   30077             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   30078             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
   30079             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_FNEG,
   30080             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s64,
   30081             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   30082             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   30083             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
   30084             :         // (fma:{ *:[f64] } (fneg:{ *:[f64] } FPR64:{ *:[f64] }:$Rn), FPR64:{ *:[f64] }:$Rm, (fneg:{ *:[f64] } FPR64:{ *:[f64] }:$Ra))  =>  (FNMADDDrrr:{ *:[f64] } FPR64:{ *:[f64] }:$Rn, FPR64:{ *:[f64] }:$Rm, FPR64:{ *:[f64] }:$Ra)
   30085             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FNMADDDrrr,
   30086             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   30087             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
   30088             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   30089             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Ra
   30090             :         GIR_EraseFromParent, /*InsnID*/0,
   30091             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30092             :         // GIR_Coverage, 2286,
   30093             :         GIR_Done,
   30094             :       // Label 1913: @74311
   30095             :       GIM_Try, /*On fail goto*//*Label 1914*/ 74375, // Rule ID 2288 //
   30096             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   30097             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
   30098             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FNEG,
   30099             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
   30100             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   30101             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/3, // MIs[2]
   30102             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_FNEG,
   30103             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s64,
   30104             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   30105             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   30106             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
   30107             :         // (fma:{ *:[f64] } FPR64:{ *:[f64] }:$Rn, (fneg:{ *:[f64] } FPR64:{ *:[f64] }:$Rm), (fneg:{ *:[f64] } FPR64:{ *:[f64] }:$Ra))  =>  (FNMADDDrrr:{ *:[f64] } FPR64:{ *:[f64] }:$Rn, FPR64:{ *:[f64] }:$Rm, FPR64:{ *:[f64] }:$Ra)
   30108             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FNMADDDrrr,
   30109             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   30110             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   30111             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
   30112             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Ra
   30113             :         GIR_EraseFromParent, /*InsnID*/0,
   30114             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30115             :         // GIR_Coverage, 2288,
   30116             :         GIR_Done,
   30117             :       // Label 1914: @74375
   30118             :       GIM_Try, /*On fail goto*//*Label 1915*/ 74426, // Rule ID 2284 //
   30119             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
   30120             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FNEG,
   30121             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
   30122             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   30123             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   30124             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   30125             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   30126             :         // (fma:{ *:[f64] } (fneg:{ *:[f64] } FPR64:{ *:[f64] }:$Rn), FPR64:{ *:[f64] }:$Rm, FPR64:{ *:[f64] }:$Ra)  =>  (FMSUBDrrr:{ *:[f64] } FPR64:{ *:[f64] }:$Rn, FPR64:{ *:[f64] }:$Rm, FPR64:{ *:[f64] }:$Ra)
   30127             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMSUBDrrr,
   30128             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   30129             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
   30130             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   30131             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Ra
   30132             :         GIR_EraseFromParent, /*InsnID*/0,
   30133             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30134             :         // GIR_Coverage, 2284,
   30135             :         GIR_Done,
   30136             :       // Label 1915: @74426
   30137             :       GIM_Try, /*On fail goto*//*Label 1916*/ 74479, // Rule ID 446 //
   30138             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   30139             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   30140             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
   30141             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FNEG,
   30142             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
   30143             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   30144             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   30145             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   30146             :         // (fma:{ *:[f64] } FPR64:{ *:[f64] }:$Rn, (fneg:{ *:[f64] } FPR64:{ *:[f64] }:$Rm), FPR64:{ *:[f64] }:$Ra)  =>  (FMSUBDrrr:{ *:[f64] } FPR64:{ *:[f64] }:$Rn, FPR64:{ *:[f64] }:$Rm, FPR64:{ *:[f64] }:$Ra)
   30147             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMSUBDrrr,
   30148             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   30149             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   30150             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
   30151             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Ra
   30152             :         GIR_EraseFromParent, /*InsnID*/0,
   30153             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30154             :         // GIR_Coverage, 446,
   30155             :         GIR_Done,
   30156             :       // Label 1916: @74479
   30157             :       GIM_Try, /*On fail goto*//*Label 1917*/ 74532, // Rule ID 452 //
   30158             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   30159             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   30160             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   30161             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
   30162             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FNEG,
   30163             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
   30164             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   30165             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   30166             :         // (fma:{ *:[f64] } FPR64:{ *:[f64] }:$Rn, FPR64:{ *:[f64] }:$Rm, (fneg:{ *:[f64] } FPR64:{ *:[f64] }:$Ra))  =>  (FNMSUBDrrr:{ *:[f64] } FPR64:{ *:[f64] }:$Rn, FPR64:{ *:[f64] }:$Rm, FPR64:{ *:[f64] }:$Ra)
   30167             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FNMSUBDrrr,
   30168             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   30169             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   30170             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   30171             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Ra
   30172             :         GIR_EraseFromParent, /*InsnID*/0,
   30173             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30174             :         // GIR_Coverage, 452,
   30175             :         GIR_Done,
   30176             :       // Label 1917: @74532
   30177             :       GIM_Try, /*On fail goto*//*Label 1918*/ 74555, // Rule ID 443 //
   30178             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   30179             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   30180             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   30181             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   30182             :         // (fma:{ *:[f64] } FPR64:{ *:[f64] }:$Rn, FPR64:{ *:[f64] }:$Rm, FPR64:{ *:[f64] }:$Ra)  =>  (FMADDDrrr:{ *:[f64] } FPR64:{ *:[f64] }:$Rn, FPR64:{ *:[f64] }:$Rm, FPR64:{ *:[f64] }:$Ra)
   30183             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FMADDDrrr,
   30184             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30185             :         // GIR_Coverage, 443,
   30186             :         GIR_Done,
   30187             :       // Label 1918: @74555
   30188             :       GIM_Reject,
   30189             :     // Label 1912: @74556
   30190             :     GIM_Reject,
   30191             :     // Label 1895: @74557
   30192             :     GIM_Try, /*On fail goto*//*Label 1919*/ 74720,
   30193             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
   30194             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   30195             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s32,
   30196             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   30197             :       GIM_Try, /*On fail goto*//*Label 1920*/ 74626, // Rule ID 2376 //
   30198             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
   30199             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FNEG,
   30200             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
   30201             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   30202             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   30203             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   30204             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   30205             :         // (fma:{ *:[v2f32] } (fneg:{ *:[v2f32] } V64:{ *:[v2f32] }:$Rn), V64:{ *:[v2f32] }:$Rm, V64:{ *:[v2f32] }:$Rd)  =>  (FMLSv2f32:{ *:[v2f32] } V64:{ *:[v2f32] }:$Rd, V64:{ *:[v2f32] }:$Rn, V64:{ *:[v2f32] }:$Rm)
   30206             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMLSv2f32,
   30207             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   30208             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rd
   30209             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
   30210             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   30211             :         GIR_EraseFromParent, /*InsnID*/0,
   30212             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30213             :         // GIR_Coverage, 2376,
   30214             :         GIR_Done,
   30215             :       // Label 1920: @74626
   30216             :       GIM_Try, /*On fail goto*//*Label 1921*/ 74679, // Rule ID 916 //
   30217             :         GIM_CheckFeatures, GIFBS_HasNEON,
   30218             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   30219             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
   30220             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FNEG,
   30221             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
   30222             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   30223             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   30224             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   30225             :         // (fma:{ *:[v2f32] } V64:{ *:[v2f32] }:$Rn, (fneg:{ *:[v2f32] } V64:{ *:[v2f32] }:$Rm), V64:{ *:[v2f32] }:$Rd)  =>  (FMLSv2f32:{ *:[v2f32] } V64:{ *:[v2f32] }:$Rd, V64:{ *:[v2f32] }:$Rn, V64:{ *:[v2f32] }:$Rm)
   30226             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMLSv2f32,
   30227             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   30228             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rd
   30229             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   30230             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
   30231             :         GIR_EraseFromParent, /*InsnID*/0,
   30232             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30233             :         // GIR_Coverage, 916,
   30234             :         GIR_Done,
   30235             :       // Label 1921: @74679
   30236             :       GIM_Try, /*On fail goto*//*Label 1922*/ 74719, // Rule ID 911 //
   30237             :         GIM_CheckFeatures, GIFBS_HasNEON,
   30238             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   30239             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   30240             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   30241             :         // (fma:{ *:[v2f32] } V64:{ *:[v2f32] }:$Rm, V64:{ *:[v2f32] }:$Rn, V64:{ *:[v2f32] }:$Rd)  =>  (FMLAv2f32:{ *:[v2f32] } V64:{ *:[v2f32] }:$Rd, V64:{ *:[v2f32] }:$Rn, V64:{ *:[v2f32] }:$Rm)
   30242             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMLAv2f32,
   30243             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   30244             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rd
   30245             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   30246             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rm
   30247             :         GIR_EraseFromParent, /*InsnID*/0,
   30248             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30249             :         // GIR_Coverage, 911,
   30250             :         GIR_Done,
   30251             :       // Label 1922: @74719
   30252             :       GIM_Reject,
   30253             :     // Label 1919: @74720
   30254             :     GIM_Reject,
   30255             :     // Label 1896: @74721
   30256             :     GIM_Try, /*On fail goto*//*Label 1923*/ 74884,
   30257             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
   30258             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   30259             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
   30260             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   30261             :       GIM_Try, /*On fail goto*//*Label 1924*/ 74790, // Rule ID 2378 //
   30262             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
   30263             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FNEG,
   30264             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
   30265             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   30266             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   30267             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   30268             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   30269             :         // (fma:{ *:[v2f64] } (fneg:{ *:[v2f64] } V128:{ *:[v2f64] }:$Rn), V128:{ *:[v2f64] }:$Rm, V128:{ *:[v2f64] }:$Rd)  =>  (FMLSv2f64:{ *:[v2f64] } V128:{ *:[v2f64] }:$Rd, V128:{ *:[v2f64] }:$Rn, V128:{ *:[v2f64] }:$Rm)
   30270             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMLSv2f64,
   30271             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   30272             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rd
   30273             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
   30274             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   30275             :         GIR_EraseFromParent, /*InsnID*/0,
   30276             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30277             :         // GIR_Coverage, 2378,
   30278             :         GIR_Done,
   30279             :       // Label 1924: @74790
   30280             :       GIM_Try, /*On fail goto*//*Label 1925*/ 74843, // Rule ID 918 //
   30281             :         GIM_CheckFeatures, GIFBS_HasNEON,
   30282             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   30283             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
   30284             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FNEG,
   30285             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s64,
   30286             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   30287             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   30288             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   30289             :         // (fma:{ *:[v2f64] } V128:{ *:[v2f64] }:$Rn, (fneg:{ *:[v2f64] } V128:{ *:[v2f64] }:$Rm), V128:{ *:[v2f64] }:$Rd)  =>  (FMLSv2f64:{ *:[v2f64] } V128:{ *:[v2f64] }:$Rd, V128:{ *:[v2f64] }:$Rn, V128:{ *:[v2f64] }:$Rm)
   30290             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMLSv2f64,
   30291             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   30292             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rd
   30293             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   30294             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
   30295             :         GIR_EraseFromParent, /*InsnID*/0,
   30296             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30297             :         // GIR_Coverage, 918,
   30298             :         GIR_Done,
   30299             :       // Label 1925: @74843
   30300             :       GIM_Try, /*On fail goto*//*Label 1926*/ 74883, // Rule ID 913 //
   30301             :         GIM_CheckFeatures, GIFBS_HasNEON,
   30302             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   30303             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   30304             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   30305             :         // (fma:{ *:[v2f64] } V128:{ *:[v2f64] }:$Rm, V128:{ *:[v2f64] }:$Rn, V128:{ *:[v2f64] }:$Rd)  =>  (FMLAv2f64:{ *:[v2f64] } V128:{ *:[v2f64] }:$Rd, V128:{ *:[v2f64] }:$Rn, V128:{ *:[v2f64] }:$Rm)
   30306             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMLAv2f64,
   30307             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   30308             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rd
   30309             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   30310             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rm
   30311             :         GIR_EraseFromParent, /*InsnID*/0,
   30312             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30313             :         // GIR_Coverage, 913,
   30314             :         GIR_Done,
   30315             :       // Label 1926: @74883
   30316             :       GIM_Reject,
   30317             :     // Label 1923: @74884
   30318             :     GIM_Reject,
   30319             :     // Label 1897: @74885
   30320             :     GIM_Try, /*On fail goto*//*Label 1927*/ 74993,
   30321             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
   30322             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   30323             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s16,
   30324             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   30325             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   30326             :       GIM_Try, /*On fail goto*//*Label 1928*/ 74956, // Rule ID 914 //
   30327             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   30328             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
   30329             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FNEG,
   30330             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
   30331             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   30332             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   30333             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   30334             :         // (fma:{ *:[v4f16] } V64:{ *:[v4f16] }:$Rn, (fneg:{ *:[v4f16] } V64:{ *:[v4f16] }:$Rm), V64:{ *:[v4f16] }:$Rd)  =>  (FMLSv4f16:{ *:[v4f16] } V64:{ *:[v4f16] }:$Rd, V64:{ *:[v4f16] }:$Rn, V64:{ *:[v4f16] }:$Rm)
   30335             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMLSv4f16,
   30336             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   30337             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rd
   30338             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   30339             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
   30340             :         GIR_EraseFromParent, /*InsnID*/0,
   30341             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30342             :         // GIR_Coverage, 914,
   30343             :         GIR_Done,
   30344             :       // Label 1928: @74956
   30345             :       GIM_Try, /*On fail goto*//*Label 1929*/ 74992, // Rule ID 909 //
   30346             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   30347             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   30348             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   30349             :         // (fma:{ *:[v4f16] } V64:{ *:[v4f16] }:$Rm, V64:{ *:[v4f16] }:$Rn, V64:{ *:[v4f16] }:$Rd)  =>  (FMLAv4f16:{ *:[v4f16] } V64:{ *:[v4f16] }:$Rd, V64:{ *:[v4f16] }:$Rn, V64:{ *:[v4f16] }:$Rm)
   30350             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMLAv4f16,
   30351             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   30352             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rd
   30353             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   30354             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rm
   30355             :         GIR_EraseFromParent, /*InsnID*/0,
   30356             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30357             :         // GIR_Coverage, 909,
   30358             :         GIR_Done,
   30359             :       // Label 1929: @74992
   30360             :       GIM_Reject,
   30361             :     // Label 1927: @74993
   30362             :     GIM_Reject,
   30363             :     // Label 1898: @74994
   30364             :     GIM_Try, /*On fail goto*//*Label 1930*/ 75157,
   30365             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
   30366             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   30367             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
   30368             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   30369             :       GIM_Try, /*On fail goto*//*Label 1931*/ 75063, // Rule ID 2377 //
   30370             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
   30371             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FNEG,
   30372             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
   30373             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   30374             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   30375             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   30376             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   30377             :         // (fma:{ *:[v4f32] } (fneg:{ *:[v4f32] } V128:{ *:[v4f32] }:$Rn), V128:{ *:[v4f32] }:$Rm, V128:{ *:[v4f32] }:$Rd)  =>  (FMLSv4f32:{ *:[v4f32] } V128:{ *:[v4f32] }:$Rd, V128:{ *:[v4f32] }:$Rn, V128:{ *:[v4f32] }:$Rm)
   30378             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMLSv4f32,
   30379             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   30380             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rd
   30381             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
   30382             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
   30383             :         GIR_EraseFromParent, /*InsnID*/0,
   30384             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30385             :         // GIR_Coverage, 2377,
   30386             :         GIR_Done,
   30387             :       // Label 1931: @75063
   30388             :       GIM_Try, /*On fail goto*//*Label 1932*/ 75116, // Rule ID 917 //
   30389             :         GIM_CheckFeatures, GIFBS_HasNEON,
   30390             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   30391             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
   30392             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FNEG,
   30393             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
   30394             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   30395             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   30396             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   30397             :         // (fma:{ *:[v4f32] } V128:{ *:[v4f32] }:$Rn, (fneg:{ *:[v4f32] } V128:{ *:[v4f32] }:$Rm), V128:{ *:[v4f32] }:$Rd)  =>  (FMLSv4f32:{ *:[v4f32] } V128:{ *:[v4f32] }:$Rd, V128:{ *:[v4f32] }:$Rn, V128:{ *:[v4f32] }:$Rm)
   30398             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMLSv4f32,
   30399             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   30400             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rd
   30401             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   30402             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
   30403             :         GIR_EraseFromParent, /*InsnID*/0,
   30404             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30405             :         // GIR_Coverage, 917,
   30406             :         GIR_Done,
   30407             :       // Label 1932: @75116
   30408             :       GIM_Try, /*On fail goto*//*Label 1933*/ 75156, // Rule ID 912 //
   30409             :         GIM_CheckFeatures, GIFBS_HasNEON,
   30410             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   30411             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   30412             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   30413             :         // (fma:{ *:[v4f32] } V128:{ *:[v4f32] }:$Rm, V128:{ *:[v4f32] }:$Rn, V128:{ *:[v4f32] }:$Rd)  =>  (FMLAv4f32:{ *:[v4f32] } V128:{ *:[v4f32] }:$Rd, V128:{ *:[v4f32] }:$Rn, V128:{ *:[v4f32] }:$Rm)
   30414             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMLAv4f32,
   30415             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   30416             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rd
   30417             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   30418             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rm
   30419             :         GIR_EraseFromParent, /*InsnID*/0,
   30420             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30421             :         // GIR_Coverage, 912,
   30422             :         GIR_Done,
   30423             :       // Label 1933: @75156
   30424             :       GIM_Reject,
   30425             :     // Label 1930: @75157
   30426             :     GIM_Reject,
   30427             :     // Label 1899: @75158
   30428             :     GIM_Try, /*On fail goto*//*Label 1934*/ 75266,
   30429             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
   30430             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   30431             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
   30432             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   30433             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   30434             :       GIM_Try, /*On fail goto*//*Label 1935*/ 75229, // Rule ID 915 //
   30435             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   30436             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
   30437             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FNEG,
   30438             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
   30439             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   30440             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   30441             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   30442             :         // (fma:{ *:[v8f16] } V128:{ *:[v8f16] }:$Rn, (fneg:{ *:[v8f16] } V128:{ *:[v8f16] }:$Rm), V128:{ *:[v8f16] }:$Rd)  =>  (FMLSv8f16:{ *:[v8f16] } V128:{ *:[v8f16] }:$Rd, V128:{ *:[v8f16] }:$Rn, V128:{ *:[v8f16] }:$Rm)
   30443             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMLSv8f16,
   30444             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   30445             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rd
   30446             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   30447             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
   30448             :         GIR_EraseFromParent, /*InsnID*/0,
   30449             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30450             :         // GIR_Coverage, 915,
   30451             :         GIR_Done,
   30452             :       // Label 1935: @75229
   30453             :       GIM_Try, /*On fail goto*//*Label 1936*/ 75265, // Rule ID 910 //
   30454             :         GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   30455             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   30456             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
   30457             :         // (fma:{ *:[v8f16] } V128:{ *:[v8f16] }:$Rm, V128:{ *:[v8f16] }:$Rn, V128:{ *:[v8f16] }:$Rd)  =>  (FMLAv8f16:{ *:[v8f16] } V128:{ *:[v8f16] }:$Rd, V128:{ *:[v8f16] }:$Rn, V128:{ *:[v8f16] }:$Rm)
   30458             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FMLAv8f16,
   30459             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
   30460             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // Rd
   30461             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
   30462             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rm
   30463             :         GIR_EraseFromParent, /*InsnID*/0,
   30464             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30465             :         // GIR_Coverage, 910,
   30466             :         GIR_Done,
   30467             :       // Label 1936: @75265
   30468             :       GIM_Reject,
   30469             :     // Label 1934: @75266
   30470             :     GIM_Reject,
   30471             :     // Label 1900: @75267
   30472             :     GIM_Reject,
   30473             :     // Label 39: @75268
   30474             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/0, 10, /*)*//*default:*//*Label 1945*/ 75540,
   30475             :     /*GILLT_s16*//*Label 1937*/ 75284,
   30476             :     /*GILLT_s32*//*Label 1938*/ 75316,
   30477             :     /*GILLT_s64*//*Label 1939*/ 75348, 0,
   30478             :     /*GILLT_v2s32*//*Label 1940*/ 75380,
   30479             :     /*GILLT_v2s64*//*Label 1941*/ 75412,
   30480             :     /*GILLT_v4s16*//*Label 1942*/ 75444,
   30481             :     /*GILLT_v4s32*//*Label 1943*/ 75476, 0,
   30482             :     /*GILLT_v8s16*//*Label 1944*/ 75508,
   30483             :     // Label 1937: @75284
   30484             :     GIM_Try, /*On fail goto*//*Label 1946*/ 75315, // Rule ID 417 //
   30485             :       GIM_CheckFeatures, GIFBS_HasFullFP16,
   30486             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
   30487             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
   30488             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR16RegClassID,
   30489             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR16RegClassID,
   30490             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR16RegClassID,
   30491             :       // (fdiv:{ *:[f16] } FPR16:{ *:[f16] }:$Rn, FPR16:{ *:[f16] }:$Rm)  =>  (FDIVHrr:{ *:[f16] } FPR16:{ *:[f16] }:$Rn, FPR16:{ *:[f16] }:$Rm)
   30492             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FDIVHrr,
   30493             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30494             :       // GIR_Coverage, 417,
   30495             :       GIR_Done,
   30496             :     // Label 1946: @75315
   30497             :     GIM_Reject,
   30498             :     // Label 1938: @75316
   30499             :     GIM_Try, /*On fail goto*//*Label 1947*/ 75347, // Rule ID 418 //
   30500             :       GIM_CheckFeatures, GIFBS_HasFPARMv8,
   30501             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
   30502             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
   30503             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   30504             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR32RegClassID,
   30505             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   30506             :       // (fdiv:{ *:[f32] } FPR32:{ *:[f32] }:$Rn, FPR32:{ *:[f32] }:$Rm)  =>  (FDIVSrr:{ *:[f32] } FPR32:{ *:[f32] }:$Rn, FPR32:{ *:[f32] }:$Rm)
   30507             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FDIVSrr,
   30508             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30509             :       // GIR_Coverage, 418,
   30510             :       GIR_Done,
   30511             :     // Label 1947: @75347
   30512             :     GIM_Reject,
   30513             :     // Label 1939: @75348
   30514             :     GIM_Try, /*On fail goto*//*Label 1948*/ 75379, // Rule ID 419 //
   30515             :       GIM_CheckFeatures, GIFBS_HasFPARMv8,
   30516             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
   30517             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
   30518             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   30519             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   30520             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   30521             :       // (fdiv:{ *:[f64] } FPR64:{ *:[f64] }:$Rn, FPR64:{ *:[f64] }:$Rm)  =>  (FDIVDrr:{ *:[f64] } FPR64:{ *:[f64] }:$Rn, FPR64:{ *:[f64] }:$Rm)
   30522             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FDIVDrr,
   30523             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30524             :       // GIR_Coverage, 419,
   30525             :       GIR_Done,
   30526             :     // Label 1948: @75379
   30527             :     GIM_Reject,
   30528             :     // Label 1940: @75380
   30529             :     GIM_Try, /*On fail goto*//*Label 1949*/ 75411, // Rule ID 866 //
   30530             :       GIM_CheckFeatures, GIFBS_HasNEON,
   30531             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
   30532             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
   30533             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   30534             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   30535             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   30536             :       // (fdiv:{ *:[v2f32] } V64:{ *:[v2f32] }:$Rn, V64:{ *:[v2f32] }:$Rm)  =>  (FDIVv2f32:{ *:[v2f32] } V64:{ *:[v2f32] }:$Rn, V64:{ *:[v2f32] }:$Rm)
   30537             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FDIVv2f32,
   30538             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30539             :       // GIR_Coverage, 866,
   30540             :       GIR_Done,
   30541             :     // Label 1949: @75411
   30542             :     GIM_Reject,
   30543             :     // Label 1941: @75412
   30544             :     GIM_Try, /*On fail goto*//*Label 1950*/ 75443, // Rule ID 868 //
   30545             :       GIM_CheckFeatures, GIFBS_HasNEON,
   30546             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
   30547             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
   30548             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   30549             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   30550             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   30551             :       // (fdiv:{ *:[v2f64] } V128:{ *:[v2f64] }:$Rn, V128:{ *:[v2f64] }:$Rm)  =>  (FDIVv2f64:{ *:[v2f64] } V128:{ *:[v2f64] }:$Rn, V128:{ *:[v2f64] }:$Rm)
   30552             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FDIVv2f64,
   30553             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30554             :       // GIR_Coverage, 868,
   30555             :       GIR_Done,
   30556             :     // Label 1950: @75443
   30557             :     GIM_Reject,
   30558             :     // Label 1942: @75444
   30559             :     GIM_Try, /*On fail goto*//*Label 1951*/ 75475, // Rule ID 864 //
   30560             :       GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   30561             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
   30562             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
   30563             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   30564             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   30565             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   30566             :       // (fdiv:{ *:[v4f16] } V64:{ *:[v4f16] }:$Rn, V64:{ *:[v4f16] }:$Rm)  =>  (FDIVv4f16:{ *:[v4f16] } V64:{ *:[v4f16] }:$Rn, V64:{ *:[v4f16] }:$Rm)
   30567             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FDIVv4f16,
   30568             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30569             :       // GIR_Coverage, 864,
   30570             :       GIR_Done,
   30571             :     // Label 1951: @75475
   30572             :     GIM_Reject,
   30573             :     // Label 1943: @75476
   30574             :     GIM_Try, /*On fail goto*//*Label 1952*/ 75507, // Rule ID 867 //
   30575             :       GIM_CheckFeatures, GIFBS_HasNEON,
   30576             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
   30577             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
   30578             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   30579             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   30580             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   30581             :       // (fdiv:{ *:[v4f32] } V128:{ *:[v4f32] }:$Rn, V128:{ *:[v4f32] }:$Rm)  =>  (FDIVv4f32:{ *:[v4f32] } V128:{ *:[v4f32] }:$Rn, V128:{ *:[v4f32] }:$Rm)
   30582             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FDIVv4f32,
   30583             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30584             :       // GIR_Coverage, 867,
   30585             :       GIR_Done,
   30586             :     // Label 1952: @75507
   30587             :     GIM_Reject,
   30588             :     // Label 1944: @75508
   30589             :     GIM_Try, /*On fail goto*//*Label 1953*/ 75539, // Rule ID 865 //
   30590             :       GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   30591             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
   30592             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
   30593             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   30594             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   30595             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
   30596             :       // (fdiv:{ *:[v8f16] } V128:{ *:[v8f16] }:$Rn, V128:{ *:[v8f16] }:$Rm)  =>  (FDIVv8f16:{ *:[v8f16] } V128:{ *:[v8f16] }:$Rn, V128:{ *:[v8f16] }:$Rm)
   30597             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FDIVv8f16,
   30598             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30599             :       // GIR_Coverage, 865,
   30600             :       GIR_Done,
   30601             :     // Label 1953: @75539
   30602             :     GIM_Reject,
   30603             :     // Label 1945: @75540
   30604             :     GIM_Reject,
   30605             :     // Label 40: @75541
   30606             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/0, 10, /*)*//*default:*//*Label 1962*/ 76088,
   30607             :     /*GILLT_s16*//*Label 1954*/ 75557,
   30608             :     /*GILLT_s32*//*Label 1955*/ 75694,
   30609             :     /*GILLT_s64*//*Label 1956*/ 75831, 0,
   30610             :     /*GILLT_v2s32*//*Label 1957*/ 75968,
   30611             :     /*GILLT_v2s64*//*Label 1958*/ 75992,
   30612             :     /*GILLT_v4s16*//*Label 1959*/ 76016,
   30613             :     /*GILLT_v4s32*//*Label 1960*/ 76040, 0,
   30614             :     /*GILLT_v8s16*//*Label 1961*/ 76064,
   30615             :     // Label 1954: @75557
   30616             :     GIM_Try, /*On fail goto*//*Label 1963*/ 75693,
   30617             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
   30618             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR16RegClassID,
   30619             :       GIM_Try, /*On fail goto*//*Label 1964*/ 75628, // Rule ID 447 //
   30620             :         GIM_CheckFeatures, GIFBS_HasFullFP16,
   30621             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
   30622             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FMA,
   30623             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s16,
   30624             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s16,
   30625             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s16,
   30626             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR16RegClassID,
   30627             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR16RegClassID,
   30628             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR16RegClassID,
   30629             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   30630             :         // (fneg:{ *:[f16] } (fma:{ *:[f16] } FPR16:{ *:[f16] }:$Rn, FPR16:{ *:[f16] }:$Rm, FPR16:{ *:[f16] }:$Ra))  =>  (FNMADDHrrr:{ *:[f16] } FPR16:{ *:[f16] }:$Rn, FPR16:{ *:[f16] }:$Rm, FPR16:{ *:[f16] }:$Ra)
   30631             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FNMADDHrrr,
   30632             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   30633             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
   30634             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
   30635             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Ra
   30636             :         GIR_EraseFromParent, /*InsnID*/0,
   30637             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30638             :         // GIR_Coverage, 447,
   30639             :         GIR_Done,
   30640             :       // Label 1964: @75628
   30641             :       GIM_Try, /*On fail goto*//*Label 1965*/ 75677, // Rule ID 435 //
   30642             :         GIM_CheckFeatures, GIFBS_HasFullFP16,
   30643             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
   30644             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FMUL,
   30645             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s16,
   30646             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s16,
   30647             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR16RegClassID,
   30648             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR16RegClassID,
   30649             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   30650             :         // (fneg:{ *:[f16] } (fmul:{ *:[f16] } FPR16:{ *:[f16] }:$Rn, FPR16:{ *:[f16] }:$Rm))  =>  (FNMULHrr:{ *:[f16] } FPR16:{ *:[f16] }:$Rn, FPR16:{ *:[f16] }:$Rm)
   30651             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FNMULHrr,
   30652             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   30653             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
   30654             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
   30655             :         GIR_EraseFromParent, /*InsnID*/0,
   30656             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30657             :         // GIR_Coverage, 435,
   30658             :         GIR_Done,
   30659             :       // Label 1965: @75677
   30660             :       GIM_Try, /*On fail goto*//*Label 1966*/ 75692, // Rule ID 387 //
   30661             :         GIM_CheckFeatures, GIFBS_HasFullFP16,
   30662             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR16RegClassID,
   30663             :         // (fneg:{ *:[f16] } FPR16:{ *:[f16] }:$Rn)  =>  (FNEGHr:{ *:[f16] } FPR16:{ *:[f16] }:$Rn)
   30664             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FNEGHr,
   30665             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30666             :         // GIR_Coverage, 387,
   30667             :         GIR_Done,
   30668             :       // Label 1966: @75692
   30669             :       GIM_Reject,
   30670             :     // Label 1963: @75693
   30671             :     GIM_Reject,
   30672             :     // Label 1955: @75694
   30673             :     GIM_Try, /*On fail goto*//*Label 1967*/ 75830,
   30674             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
   30675             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   30676             :       GIM_Try, /*On fail goto*//*Label 1968*/ 75765, // Rule ID 448 //
   30677             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   30678             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
   30679             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FMA,
   30680             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
   30681             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
   30682             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s32,
   30683             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR32RegClassID,
   30684             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   30685             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR32RegClassID,
   30686             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   30687             :         // (fneg:{ *:[f32] } (fma:{ *:[f32] } FPR32:{ *:[f32] }:$Rn, FPR32:{ *:[f32] }:$Rm, FPR32:{ *:[f32] }:$Ra))  =>  (FNMADDSrrr:{ *:[f32] } FPR32:{ *:[f32] }:$Rn, FPR32:{ *:[f32] }:$Rm, FPR32:{ *:[f32] }:$Ra)
   30688             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FNMADDSrrr,
   30689             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   30690             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
   30691             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
   30692             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Ra
   30693             :         GIR_EraseFromParent, /*InsnID*/0,
   30694             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30695             :         // GIR_Coverage, 448,
   30696             :         GIR_Done,
   30697             :       // Label 1968: @75765
   30698             :       GIM_Try, /*On fail goto*//*Label 1969*/ 75814, // Rule ID 436 //
   30699             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   30700             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
   30701             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FMUL,
   30702             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
   30703             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
   30704             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR32RegClassID,
   30705             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR32RegClassID,
   30706             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   30707             :         // (fneg:{ *:[f32] } (fmul:{ *:[f32] } FPR32:{ *:[f32] }:$Rn, FPR32:{ *:[f32] }:$Rm))  =>  (FNMULSrr:{ *:[f32] } FPR32:{ *:[f32] }:$Rn, FPR32:{ *:[f32] }:$Rm)
   30708             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FNMULSrr,
   30709             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   30710             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
   30711             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
   30712             :         GIR_EraseFromParent, /*InsnID*/0,
   30713             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30714             :         // GIR_Coverage, 436,
   30715             :         GIR_Done,
   30716             :       // Label 1969: @75814
   30717             :       GIM_Try, /*On fail goto*//*Label 1970*/ 75829, // Rule ID 388 //
   30718             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   30719             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR32RegClassID,
   30720             :         // (fneg:{ *:[f32] } FPR32:{ *:[f32] }:$Rn)  =>  (FNEGSr:{ *:[f32] } FPR32:{ *:[f32] }:$Rn)
   30721             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FNEGSr,
   30722             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30723             :         // GIR_Coverage, 388,
   30724             :         GIR_Done,
   30725             :       // Label 1970: @75829
   30726             :       GIM_Reject,
   30727             :     // Label 1967: @75830
   30728             :     GIM_Reject,
   30729             :     // Label 1956: @75831
   30730             :     GIM_Try, /*On fail goto*//*Label 1971*/ 75967,
   30731             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
   30732             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   30733             :       GIM_Try, /*On fail goto*//*Label 1972*/ 75902, // Rule ID 449 //
   30734             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   30735             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
   30736             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FMA,
   30737             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
   30738             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
   30739             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_s64,
   30740             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   30741             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   30742             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
   30743             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   30744             :         // (fneg:{ *:[f64] } (fma:{ *:[f64] } FPR64:{ *:[f64] }:$Rn, FPR64:{ *:[f64] }:$Rm, FPR64:{ *:[f64] }:$Ra))  =>  (FNMADDDrrr:{ *:[f64] } FPR64:{ *:[f64] }:$Rn, FPR64:{ *:[f64] }:$Rm, FPR64:{ *:[f64] }:$Ra)
   30745             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FNMADDDrrr,
   30746             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   30747             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
   30748             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
   30749             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Ra
   30750             :         GIR_EraseFromParent, /*InsnID*/0,
   30751             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30752             :         // GIR_Coverage, 449,
   30753             :         GIR_Done,
   30754             :       // Label 1972: @75902
   30755             :       GIM_Try, /*On fail goto*//*Label 1973*/ 75951, // Rule ID 437 //
   30756             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   30757             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
   30758             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FMUL,
   30759             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
   30760             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
   30761             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   30762             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
   30763             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   30764             :         // (fneg:{ *:[f64] } (fmul:{ *:[f64] } FPR64:{ *:[f64] }:$Rn, FPR64:{ *:[f64] }:$Rm))  =>  (FNMULDrr:{ *:[f64] } FPR64:{ *:[f64] }:$Rn, FPR64:{ *:[f64] }:$Rm)
   30765             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::FNMULDrr,
   30766             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   30767             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
   30768             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
   30769             :         GIR_EraseFromParent, /*InsnID*/0,
   30770             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30771             :         // GIR_Coverage, 437,
   30772             :         GIR_Done,
   30773             :       // Label 1973: @75951
   30774             :       GIM_Try, /*On fail goto*//*Label 1974*/ 75966, // Rule ID 389 //
   30775             :         GIM_CheckFeatures, GIFBS_HasFPARMv8,
   30776             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   30777             :         // (fneg:{ *:[f64] } FPR64:{ *:[f64] }:$Rn)  =>  (FNEGDr:{ *:[f64] } FPR64:{ *:[f64] }:$Rn)
   30778             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FNEGDr,
   30779             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30780             :         // GIR_Coverage, 389,
   30781             :         GIR_Done,
   30782             :       // Label 1974: @75966
   30783             :       GIM_Reject,
   30784             :     // Label 1971: @75967
   30785             :     GIM_Reject,
   30786             :     // Label 1957: @75968
   30787             :     GIM_Try, /*On fail goto*//*Label 1975*/ 75991, // Rule ID 614 //
   30788             :       GIM_CheckFeatures, GIFBS_HasNEON,
   30789             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
   30790             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   30791             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   30792             :       // (fneg:{ *:[v2f32] } V64:{ *:[v2f32] }:$Rn)  =>  (FNEGv2f32:{ *:[v2f32] } V64:{ *:[v2f32] }:$Rn)
   30793             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FNEGv2f32,
   30794             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30795             :       // GIR_Coverage, 614,
   30796             :       GIR_Done,
   30797             :     // Label 1975: @75991
   30798             :     GIM_Reject,
   30799             :     // Label 1958: @75992
   30800             :     GIM_Try, /*On fail goto*//*Label 1976*/ 76015, // Rule ID 616 //
   30801             :       GIM_CheckFeatures, GIFBS_HasNEON,
   30802             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
   30803             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   30804             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   30805             :       // (fneg:{ *:[v2f64] } V128:{ *:[v2f64] }:$Rn)  =>  (FNEGv2f64:{ *:[v2f64] } V128:{ *:[v2f64] }:$Rn)
   30806             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FNEGv2f64,
   30807             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30808             :       // GIR_Coverage, 616,
   30809             :       GIR_Done,
   30810             :     // Label 1976: @76015
   30811             :     GIM_Reject,
   30812             :     // Label 1959: @76016
   30813             :     GIM_Try, /*On fail goto*//*Label 1977*/ 76039, // Rule ID 612 //
   30814             :       GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   30815             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
   30816             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   30817             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   30818             :       // (fneg:{ *:[v4f16] } V64:{ *:[v4f16] }:$Rn)  =>  (FNEGv4f16:{ *:[v4f16] } V64:{ *:[v4f16] }:$Rn)
   30819             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FNEGv4f16,
   30820             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30821             :       // GIR_Coverage, 612,
   30822             :       GIR_Done,
   30823             :     // Label 1977: @76039
   30824             :     GIM_Reject,
   30825             :     // Label 1960: @76040
   30826             :     GIM_Try, /*On fail goto*//*Label 1978*/ 76063, // Rule ID 615 //
   30827             :       GIM_CheckFeatures, GIFBS_HasNEON,
   30828             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
   30829             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   30830             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   30831             :       // (fneg:{ *:[v4f32] } V128:{ *:[v4f32] }:$Rn)  =>  (FNEGv4f32:{ *:[v4f32] } V128:{ *:[v4f32] }:$Rn)
   30832             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FNEGv4f32,
   30833             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30834             :       // GIR_Coverage, 615,
   30835             :       GIR_Done,
   30836             :     // Label 1978: @76063
   30837             :     GIM_Reject,
   30838             :     // Label 1961: @76064
   30839             :     GIM_Try, /*On fail goto*//*Label 1979*/ 76087, // Rule ID 613 //
   30840             :       GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   30841             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
   30842             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   30843             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   30844             :       // (fneg:{ *:[v8f16] } V128:{ *:[v8f16] }:$Rn)  =>  (FNEGv8f16:{ *:[v8f16] } V128:{ *:[v8f16] }:$Rn)
   30845             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FNEGv8f16,
   30846             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30847             :       // GIR_Coverage, 613,
   30848             :       GIR_Done,
   30849             :     // Label 1979: @76087
   30850             :     GIM_Reject,
   30851             :     // Label 1962: @76088
   30852             :     GIM_Reject,
   30853             :     // Label 41: @76089
   30854             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 8, /*)*//*default:*//*Label 1984*/ 76217,
   30855             :     /*GILLT_s32*//*Label 1980*/ 76102,
   30856             :     /*GILLT_s64*//*Label 1981*/ 76126, 0, 0,
   30857             :     /*GILLT_v2s64*//*Label 1982*/ 76173, 0,
   30858             :     /*GILLT_v4s32*//*Label 1983*/ 76195,
   30859             :     // Label 1980: @76102
   30860             :     GIM_Try, /*On fail goto*//*Label 1985*/ 76125, // Rule ID 381 //
   30861             :       GIM_CheckFeatures, GIFBS_HasFPARMv8,
   30862             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
   30863             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   30864             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR16RegClassID,
   30865             :       // (fpextend:{ *:[f32] } FPR16:{ *:[f16] }:$Rn)  =>  (FCVTSHr:{ *:[f32] } FPR16:{ *:[f16] }:$Rn)
   30866             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FCVTSHr,
   30867             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30868             :       // GIR_Coverage, 381,
   30869             :       GIR_Done,
   30870             :     // Label 1985: @76125
   30871             :     GIM_Reject,
   30872             :     // Label 1981: @76126
   30873             :     GIM_Try, /*On fail goto*//*Label 1986*/ 76149, // Rule ID 380 //
   30874             :       GIM_CheckFeatures, GIFBS_HasFPARMv8,
   30875             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
   30876             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   30877             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR16RegClassID,
   30878             :       // (fpextend:{ *:[f64] } FPR16:{ *:[f16] }:$Rn)  =>  (FCVTDHr:{ *:[f64] } FPR16:{ *:[f16] }:$Rn)
   30879             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FCVTDHr,
   30880             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30881             :       // GIR_Coverage, 380,
   30882             :       GIR_Done,
   30883             :     // Label 1986: @76149
   30884             :     GIM_Try, /*On fail goto*//*Label 1987*/ 76172, // Rule ID 382 //
   30885             :       GIM_CheckFeatures, GIFBS_HasFPARMv8,
   30886             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
   30887             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   30888             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR32RegClassID,
   30889             :       // (fpextend:{ *:[f64] } FPR32:{ *:[f32] }:$Rn)  =>  (FCVTDSr:{ *:[f64] } FPR32:{ *:[f32] }:$Rn)
   30890             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FCVTDSr,
   30891             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30892             :       // GIR_Coverage, 382,
   30893             :       GIR_Done,
   30894             :     // Label 1987: @76172
   30895             :     GIM_Reject,
   30896             :     // Label 1982: @76173
   30897             :     GIM_Try, /*On fail goto*//*Label 1988*/ 76194, // Rule ID 2299 //
   30898             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
   30899             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   30900             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   30901             :       // (fpextend:{ *:[v2f64] } V64:{ *:[v2f32] }:$Rn)  =>  (FCVTLv2i32:{ *:[v2f64] } V64:{ *:[v2f32] }:$Rn)
   30902             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FCVTLv2i32,
   30903             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30904             :       // GIR_Coverage, 2299,
   30905             :       GIR_Done,
   30906             :     // Label 1988: @76194
   30907             :     GIM_Reject,
   30908             :     // Label 1983: @76195
   30909             :     GIM_Try, /*On fail goto*//*Label 1989*/ 76216, // Rule ID 2301 //
   30910             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
   30911             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   30912             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   30913             :       // (fpextend:{ *:[v4f32] } V64:{ *:[v4f16] }:$Rn)  =>  (FCVTLv4i16:{ *:[v4f32] } V64:{ *:[v4f16] }:$Rn)
   30914             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FCVTLv4i16,
   30915             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30916             :       // GIR_Coverage, 2301,
   30917             :       GIR_Done,
   30918             :     // Label 1989: @76216
   30919             :     GIM_Reject,
   30920             :     // Label 1984: @76217
   30921             :     GIM_Reject,
   30922             :     // Label 42: @76218
   30923             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/0, 7, /*)*//*default:*//*Label 1994*/ 76346,
   30924             :     /*GILLT_s16*//*Label 1990*/ 76231,
   30925             :     /*GILLT_s32*//*Label 1991*/ 76278, 0, 0,
   30926             :     /*GILLT_v2s32*//*Label 1992*/ 76302, 0,
   30927             :     /*GILLT_v4s16*//*Label 1993*/ 76324,
   30928             :     // Label 1990: @76231
   30929             :     GIM_Try, /*On fail goto*//*Label 1995*/ 76254, // Rule ID 378 //
   30930             :       GIM_CheckFeatures, GIFBS_HasFPARMv8,
   30931             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
   30932             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR16RegClassID,
   30933             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   30934             :       // (fpround:{ *:[f16] } FPR64:{ *:[f64] }:$Rn)  =>  (FCVTHDr:{ *:[f16] } FPR64:{ *:[f64] }:$Rn)
   30935             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FCVTHDr,
   30936             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30937             :       // GIR_Coverage, 378,
   30938             :       GIR_Done,
   30939             :     // Label 1995: @76254
   30940             :     GIM_Try, /*On fail goto*//*Label 1996*/ 76277, // Rule ID 383 //
   30941             :       GIM_CheckFeatures, GIFBS_HasFPARMv8,
   30942             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
   30943             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR16RegClassID,
   30944             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR32RegClassID,
   30945             :       // (fpround:{ *:[f16] } FPR32:{ *:[f32] }:$Rn)  =>  (FCVTHSr:{ *:[f16] } FPR32:{ *:[f32] }:$Rn)
   30946             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FCVTHSr,
   30947             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30948             :       // GIR_Coverage, 383,
   30949             :       GIR_Done,
   30950             :     // Label 1996: @76277
   30951             :     GIM_Reject,
   30952             :     // Label 1991: @76278
   30953             :     GIM_Try, /*On fail goto*//*Label 1997*/ 76301, // Rule ID 379 //
   30954             :       GIM_CheckFeatures, GIFBS_HasFPARMv8,
   30955             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
   30956             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   30957             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   30958             :       // (fpround:{ *:[f32] } FPR64:{ *:[f64] }:$Rn)  =>  (FCVTSDr:{ *:[f32] } FPR64:{ *:[f64] }:$Rn)
   30959             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FCVTSDr,
   30960             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30961             :       // GIR_Coverage, 379,
   30962             :       GIR_Done,
   30963             :     // Label 1997: @76301
   30964             :     GIM_Reject,
   30965             :     // Label 1992: @76302
   30966             :     GIM_Try, /*On fail goto*//*Label 1998*/ 76323, // Rule ID 2305 //
   30967             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
   30968             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   30969             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   30970             :       // (fpround:{ *:[v2f32] } V128:{ *:[v2f64] }:$Rn)  =>  (FCVTNv2i32:{ *:[v2f32] } V128:{ *:[v2f64] }:$Rn)
   30971             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FCVTNv2i32,
   30972             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30973             :       // GIR_Coverage, 2305,
   30974             :       GIR_Done,
   30975             :     // Label 1998: @76323
   30976             :     GIM_Reject,
   30977             :     // Label 1993: @76324
   30978             :     GIM_Try, /*On fail goto*//*Label 1999*/ 76345, // Rule ID 2306 //
   30979             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
   30980             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   30981             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   30982             :       // (fpround:{ *:[v4f16] } V128:{ *:[v4f32] }:$Rn)  =>  (FCVTNv4i16:{ *:[v4f16] } V128:{ *:[v4f32] }:$Rn)
   30983             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FCVTNv4i16,
   30984             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   30985             :       // GIR_Coverage, 2306,
   30986             :       GIR_Done,
   30987             :     // Label 1999: @76345
   30988             :     GIM_Reject,
   30989             :     // Label 1994: @76346
   30990             :     GIM_Reject,
   30991             :     // Label 43: @76347
   30992             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 10, /*)*//*default:*//*Label 2007*/ 76622,
   30993             :     /*GILLT_s32*//*Label 2000*/ 76362,
   30994             :     /*GILLT_s64*//*Label 2001*/ 76432, 0,
   30995             :     /*GILLT_v2s32*//*Label 2002*/ 76502,
   30996             :     /*GILLT_v2s64*//*Label 2003*/ 76526,
   30997             :     /*GILLT_v4s16*//*Label 2004*/ 76550,
   30998             :     /*GILLT_v4s32*//*Label 2005*/ 76574, 0,
   30999             :     /*GILLT_v8s16*//*Label 2006*/ 76598,
   31000             :     // Label 2000: @76362
   31001             :     GIM_Try, /*On fail goto*//*Label 2008*/ 76385, // Rule ID 327 //
   31002             :       GIM_CheckFeatures, GIFBS_HasFullFP16,
   31003             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
   31004             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   31005             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR16RegClassID,
   31006             :       // (fp_to_sint:{ *:[i32] } FPR16:{ *:[f16] }:$Rn)  =>  (FCVTZSUWHr:{ *:[i32] } FPR16:{ *:[f16] }:$Rn)
   31007             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FCVTZSUWHr,
   31008             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31009             :       // GIR_Coverage, 327,
   31010             :       GIR_Done,
   31011             :     // Label 2008: @76385
   31012             :     GIM_Try, /*On fail goto*//*Label 2009*/ 76408, // Rule ID 329 //
   31013             :       GIM_CheckFeatures, GIFBS_HasFPARMv8,
   31014             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
   31015             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   31016             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR32RegClassID,
   31017             :       // (fp_to_sint:{ *:[i32] } FPR32:{ *:[f32] }:$Rn)  =>  (FCVTZSUWSr:{ *:[i32] } FPR32:{ *:[f32] }:$Rn)
   31018             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FCVTZSUWSr,
   31019             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31020             :       // GIR_Coverage, 329,
   31021             :       GIR_Done,
   31022             :     // Label 2009: @76408
   31023             :     GIM_Try, /*On fail goto*//*Label 2010*/ 76431, // Rule ID 331 //
   31024             :       GIM_CheckFeatures, GIFBS_HasFPARMv8,
   31025             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
   31026             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   31027             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   31028             :       // (fp_to_sint:{ *:[i32] } FPR64:{ *:[f64] }:$Rn)  =>  (FCVTZSUWDr:{ *:[i32] } FPR64:{ *:[f64] }:$Rn)
   31029             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FCVTZSUWDr,
   31030             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31031             :       // GIR_Coverage, 331,
   31032             :       GIR_Done,
   31033             :     // Label 2010: @76431
   31034             :     GIM_Reject,
   31035             :     // Label 2001: @76432
   31036             :     GIM_Try, /*On fail goto*//*Label 2011*/ 76455, // Rule ID 328 //
   31037             :       GIM_CheckFeatures, GIFBS_HasFullFP16,
   31038             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
   31039             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   31040             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR16RegClassID,
   31041             :       // (fp_to_sint:{ *:[i64] } FPR16:{ *:[f16] }:$Rn)  =>  (FCVTZSUXHr:{ *:[i64] } FPR16:{ *:[f16] }:$Rn)
   31042             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FCVTZSUXHr,
   31043             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31044             :       // GIR_Coverage, 328,
   31045             :       GIR_Done,
   31046             :     // Label 2011: @76455
   31047             :     GIM_Try, /*On fail goto*//*Label 2012*/ 76478, // Rule ID 330 //
   31048             :       GIM_CheckFeatures, GIFBS_HasFPARMv8,
   31049             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
   31050             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   31051             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR32RegClassID,
   31052             :       // (fp_to_sint:{ *:[i64] } FPR32:{ *:[f32] }:$Rn)  =>  (FCVTZSUXSr:{ *:[i64] } FPR32:{ *:[f32] }:$Rn)
   31053             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FCVTZSUXSr,
   31054             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31055             :       // GIR_Coverage, 330,
   31056             :       GIR_Done,
   31057             :     // Label 2012: @76478
   31058             :     GIM_Try, /*On fail goto*//*Label 2013*/ 76501, // Rule ID 332 //
   31059             :       GIM_CheckFeatures, GIFBS_HasFPARMv8,
   31060             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
   31061             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   31062             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   31063             :       // (fp_to_sint:{ *:[i64] } FPR64:{ *:[f64] }:$Rn)  =>  (FCVTZSUXDr:{ *:[i64] } FPR64:{ *:[f64] }:$Rn)
   31064             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FCVTZSUXDr,
   31065             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31066             :       // GIR_Coverage, 332,
   31067             :       GIR_Done,
   31068             :     // Label 2013: @76501
   31069             :     GIM_Reject,
   31070             :     // Label 2002: @76502
   31071             :     GIM_Try, /*On fail goto*//*Label 2014*/ 76525, // Rule ID 604 //
   31072             :       GIM_CheckFeatures, GIFBS_HasNEON,
   31073             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
   31074             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   31075             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   31076             :       // (fp_to_sint:{ *:[v2i32] } V64:{ *:[v2f32] }:$Rn)  =>  (FCVTZSv2f32:{ *:[v2i32] } V64:{ *:[v2f32] }:$Rn)
   31077             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FCVTZSv2f32,
   31078             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31079             :       // GIR_Coverage, 604,
   31080             :       GIR_Done,
   31081             :     // Label 2014: @76525
   31082             :     GIM_Reject,
   31083             :     // Label 2003: @76526
   31084             :     GIM_Try, /*On fail goto*//*Label 2015*/ 76549, // Rule ID 606 //
   31085             :       GIM_CheckFeatures, GIFBS_HasNEON,
   31086             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
   31087             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   31088             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   31089             :       // (fp_to_sint:{ *:[v2i64] } V128:{ *:[v2f64] }:$Rn)  =>  (FCVTZSv2f64:{ *:[v2i64] } V128:{ *:[v2f64] }:$Rn)
   31090             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FCVTZSv2f64,
   31091             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31092             :       // GIR_Coverage, 606,
   31093             :       GIR_Done,
   31094             :     // Label 2015: @76549
   31095             :     GIM_Reject,
   31096             :     // Label 2004: @76550
   31097             :     GIM_Try, /*On fail goto*//*Label 2016*/ 76573, // Rule ID 602 //
   31098             :       GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   31099             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
   31100             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   31101             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   31102             :       // (fp_to_sint:{ *:[v4i16] } V64:{ *:[v4f16] }:$Rn)  =>  (FCVTZSv4f16:{ *:[v4i16] } V64:{ *:[v4f16] }:$Rn)
   31103             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FCVTZSv4f16,
   31104             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31105             :       // GIR_Coverage, 602,
   31106             :       GIR_Done,
   31107             :     // Label 2016: @76573
   31108             :     GIM_Reject,
   31109             :     // Label 2005: @76574
   31110             :     GIM_Try, /*On fail goto*//*Label 2017*/ 76597, // Rule ID 605 //
   31111             :       GIM_CheckFeatures, GIFBS_HasNEON,
   31112             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
   31113             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   31114             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   31115             :       // (fp_to_sint:{ *:[v4i32] } V128:{ *:[v4f32] }:$Rn)  =>  (FCVTZSv4f32:{ *:[v4i32] } V128:{ *:[v4f32] }:$Rn)
   31116             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FCVTZSv4f32,
   31117             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31118             :       // GIR_Coverage, 605,
   31119             :       GIR_Done,
   31120             :     // Label 2017: @76597
   31121             :     GIM_Reject,
   31122             :     // Label 2006: @76598
   31123             :     GIM_Try, /*On fail goto*//*Label 2018*/ 76621, // Rule ID 603 //
   31124             :       GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   31125             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
   31126             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   31127             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   31128             :       // (fp_to_sint:{ *:[v8i16] } V128:{ *:[v8f16] }:$Rn)  =>  (FCVTZSv8f16:{ *:[v8i16] } V128:{ *:[v8f16] }:$Rn)
   31129             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FCVTZSv8f16,
   31130             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31131             :       // GIR_Coverage, 603,
   31132             :       GIR_Done,
   31133             :     // Label 2018: @76621
   31134             :     GIM_Reject,
   31135             :     // Label 2007: @76622
   31136             :     GIM_Reject,
   31137             :     // Label 44: @76623
   31138             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 10, /*)*//*default:*//*Label 2026*/ 76898,
   31139             :     /*GILLT_s32*//*Label 2019*/ 76638,
   31140             :     /*GILLT_s64*//*Label 2020*/ 76708, 0,
   31141             :     /*GILLT_v2s32*//*Label 2021*/ 76778,
   31142             :     /*GILLT_v2s64*//*Label 2022*/ 76802,
   31143             :     /*GILLT_v4s16*//*Label 2023*/ 76826,
   31144             :     /*GILLT_v4s32*//*Label 2024*/ 76850, 0,
   31145             :     /*GILLT_v8s16*//*Label 2025*/ 76874,
   31146             :     // Label 2019: @76638
   31147             :     GIM_Try, /*On fail goto*//*Label 2027*/ 76661, // Rule ID 333 //
   31148             :       GIM_CheckFeatures, GIFBS_HasFullFP16,
   31149             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
   31150             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   31151             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR16RegClassID,
   31152             :       // (fp_to_uint:{ *:[i32] } FPR16:{ *:[f16] }:$Rn)  =>  (FCVTZUUWHr:{ *:[i32] } FPR16:{ *:[f16] }:$Rn)
   31153             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FCVTZUUWHr,
   31154             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31155             :       // GIR_Coverage, 333,
   31156             :       GIR_Done,
   31157             :     // Label 2027: @76661
   31158             :     GIM_Try, /*On fail goto*//*Label 2028*/ 76684, // Rule ID 335 //
   31159             :       GIM_CheckFeatures, GIFBS_HasFPARMv8,
   31160             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
   31161             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   31162             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR32RegClassID,
   31163             :       // (fp_to_uint:{ *:[i32] } FPR32:{ *:[f32] }:$Rn)  =>  (FCVTZUUWSr:{ *:[i32] } FPR32:{ *:[f32] }:$Rn)
   31164             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FCVTZUUWSr,
   31165             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31166             :       // GIR_Coverage, 335,
   31167             :       GIR_Done,
   31168             :     // Label 2028: @76684
   31169             :     GIM_Try, /*On fail goto*//*Label 2029*/ 76707, // Rule ID 337 //
   31170             :       GIM_CheckFeatures, GIFBS_HasFPARMv8,
   31171             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
   31172             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   31173             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   31174             :       // (fp_to_uint:{ *:[i32] } FPR64:{ *:[f64] }:$Rn)  =>  (FCVTZUUWDr:{ *:[i32] } FPR64:{ *:[f64] }:$Rn)
   31175             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FCVTZUUWDr,
   31176             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31177             :       // GIR_Coverage, 337,
   31178             :       GIR_Done,
   31179             :     // Label 2029: @76707
   31180             :     GIM_Reject,
   31181             :     // Label 2020: @76708
   31182             :     GIM_Try, /*On fail goto*//*Label 2030*/ 76731, // Rule ID 334 //
   31183             :       GIM_CheckFeatures, GIFBS_HasFullFP16,
   31184             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
   31185             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   31186             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR16RegClassID,
   31187             :       // (fp_to_uint:{ *:[i64] } FPR16:{ *:[f16] }:$Rn)  =>  (FCVTZUUXHr:{ *:[i64] } FPR16:{ *:[f16] }:$Rn)
   31188             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FCVTZUUXHr,
   31189             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31190             :       // GIR_Coverage, 334,
   31191             :       GIR_Done,
   31192             :     // Label 2030: @76731
   31193             :     GIM_Try, /*On fail goto*//*Label 2031*/ 76754, // Rule ID 336 //
   31194             :       GIM_CheckFeatures, GIFBS_HasFPARMv8,
   31195             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
   31196             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   31197             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR32RegClassID,
   31198             :       // (fp_to_uint:{ *:[i64] } FPR32:{ *:[f32] }:$Rn)  =>  (FCVTZUUXSr:{ *:[i64] } FPR32:{ *:[f32] }:$Rn)
   31199             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FCVTZUUXSr,
   31200             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31201             :       // GIR_Coverage, 336,
   31202             :       GIR_Done,
   31203             :     // Label 2031: @76754
   31204             :     GIM_Try, /*On fail goto*//*Label 2032*/ 76777, // Rule ID 338 //
   31205             :       GIM_CheckFeatures, GIFBS_HasFPARMv8,
   31206             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
   31207             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   31208             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   31209             :       // (fp_to_uint:{ *:[i64] } FPR64:{ *:[f64] }:$Rn)  =>  (FCVTZUUXDr:{ *:[i64] } FPR64:{ *:[f64] }:$Rn)
   31210             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FCVTZUUXDr,
   31211             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31212             :       // GIR_Coverage, 338,
   31213             :       GIR_Done,
   31214             :     // Label 2032: @76777
   31215             :     GIM_Reject,
   31216             :     // Label 2021: @76778
   31217             :     GIM_Try, /*On fail goto*//*Label 2033*/ 76801, // Rule ID 609 //
   31218             :       GIM_CheckFeatures, GIFBS_HasNEON,
   31219             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
   31220             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   31221             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   31222             :       // (fp_to_uint:{ *:[v2i32] } V64:{ *:[v2f32] }:$Rn)  =>  (FCVTZUv2f32:{ *:[v2i32] } V64:{ *:[v2f32] }:$Rn)
   31223             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FCVTZUv2f32,
   31224             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31225             :       // GIR_Coverage, 609,
   31226             :       GIR_Done,
   31227             :     // Label 2033: @76801
   31228             :     GIM_Reject,
   31229             :     // Label 2022: @76802
   31230             :     GIM_Try, /*On fail goto*//*Label 2034*/ 76825, // Rule ID 611 //
   31231             :       GIM_CheckFeatures, GIFBS_HasNEON,
   31232             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
   31233             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   31234             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   31235             :       // (fp_to_uint:{ *:[v2i64] } V128:{ *:[v2f64] }:$Rn)  =>  (FCVTZUv2f64:{ *:[v2i64] } V128:{ *:[v2f64] }:$Rn)
   31236             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FCVTZUv2f64,
   31237             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31238             :       // GIR_Coverage, 611,
   31239             :       GIR_Done,
   31240             :     // Label 2034: @76825
   31241             :     GIM_Reject,
   31242             :     // Label 2023: @76826
   31243             :     GIM_Try, /*On fail goto*//*Label 2035*/ 76849, // Rule ID 607 //
   31244             :       GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   31245             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
   31246             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   31247             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   31248             :       // (fp_to_uint:{ *:[v4i16] } V64:{ *:[v4f16] }:$Rn)  =>  (FCVTZUv4f16:{ *:[v4i16] } V64:{ *:[v4f16] }:$Rn)
   31249             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FCVTZUv4f16,
   31250             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31251             :       // GIR_Coverage, 607,
   31252             :       GIR_Done,
   31253             :     // Label 2035: @76849
   31254             :     GIM_Reject,
   31255             :     // Label 2024: @76850
   31256             :     GIM_Try, /*On fail goto*//*Label 2036*/ 76873, // Rule ID 610 //
   31257             :       GIM_CheckFeatures, GIFBS_HasNEON,
   31258             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
   31259             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   31260             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   31261             :       // (fp_to_uint:{ *:[v4i32] } V128:{ *:[v4f32] }:$Rn)  =>  (FCVTZUv4f32:{ *:[v4i32] } V128:{ *:[v4f32] }:$Rn)
   31262             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FCVTZUv4f32,
   31263             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31264             :       // GIR_Coverage, 610,
   31265             :       GIR_Done,
   31266             :     // Label 2036: @76873
   31267             :     GIM_Reject,
   31268             :     // Label 2025: @76874
   31269             :     GIM_Try, /*On fail goto*//*Label 2037*/ 76897, // Rule ID 608 //
   31270             :       GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   31271             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
   31272             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   31273             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   31274             :       // (fp_to_uint:{ *:[v8i16] } V128:{ *:[v8f16] }:$Rn)  =>  (FCVTZUv8f16:{ *:[v8i16] } V128:{ *:[v8f16] }:$Rn)
   31275             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::FCVTZUv8f16,
   31276             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31277             :       // GIR_Coverage, 608,
   31278             :       GIR_Done,
   31279             :     // Label 2037: @76897
   31280             :     GIM_Reject,
   31281             :     // Label 2026: @76898
   31282             :     GIM_Reject,
   31283             :     // Label 45: @76899
   31284             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/0, 10, /*)*//*default:*//*Label 2046*/ 77176,
   31285             :     /*GILLT_s16*//*Label 2038*/ 76915,
   31286             :     /*GILLT_s32*//*Label 2039*/ 76962,
   31287             :     /*GILLT_s64*//*Label 2040*/ 77009, 0,
   31288             :     /*GILLT_v2s32*//*Label 2041*/ 77056,
   31289             :     /*GILLT_v2s64*//*Label 2042*/ 77080,
   31290             :     /*GILLT_v4s16*//*Label 2043*/ 77104,
   31291             :     /*GILLT_v4s32*//*Label 2044*/ 77128, 0,
   31292             :     /*GILLT_v8s16*//*Label 2045*/ 77152,
   31293             :     // Label 2038: @76915
   31294             :     GIM_Try, /*On fail goto*//*Label 2047*/ 76938, // Rule ID 351 //
   31295             :       GIM_CheckFeatures, GIFBS_HasFullFP16,
   31296             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
   31297             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR16RegClassID,
   31298             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
   31299             :       // (sint_to_fp:{ *:[f16] } GPR32:{ *:[i32] }:$Rn)  =>  (SCVTFUWHri:{ *:[f16] } GPR32:{ *:[i32] }:$Rn)
   31300             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SCVTFUWHri,
   31301             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31302             :       // GIR_Coverage, 351,
   31303             :       GIR_Done,
   31304             :     // Label 2047: @76938
   31305             :     GIM_Try, /*On fail goto*//*Label 2048*/ 76961, // Rule ID 354 //
   31306             :       GIM_CheckFeatures, GIFBS_HasFullFP16,
   31307             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
   31308             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR16RegClassID,
   31309             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
   31310             :       // (sint_to_fp:{ *:[f16] } GPR64:{ *:[i64] }:$Rn)  =>  (SCVTFUXHri:{ *:[f16] } GPR64:{ *:[i64] }:$Rn)
   31311             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SCVTFUXHri,
   31312             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31313             :       // GIR_Coverage, 354,
   31314             :       GIR_Done,
   31315             :     // Label 2048: @76961
   31316             :     GIM_Reject,
   31317             :     // Label 2039: @76962
   31318             :     GIM_Try, /*On fail goto*//*Label 2049*/ 76985, // Rule ID 352 //
   31319             :       GIM_CheckFeatures, GIFBS_HasFPARMv8,
   31320             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
   31321             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   31322             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
   31323             :       // (sint_to_fp:{ *:[f32] } GPR32:{ *:[i32] }:$Rn)  =>  (SCVTFUWSri:{ *:[f32] } GPR32:{ *:[i32] }:$Rn)
   31324             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SCVTFUWSri,
   31325             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31326             :       // GIR_Coverage, 352,
   31327             :       GIR_Done,
   31328             :     // Label 2049: @76985
   31329             :     GIM_Try, /*On fail goto*//*Label 2050*/ 77008, // Rule ID 355 //
   31330             :       GIM_CheckFeatures, GIFBS_HasFPARMv8,
   31331             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
   31332             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   31333             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
   31334             :       // (sint_to_fp:{ *:[f32] } GPR64:{ *:[i64] }:$Rn)  =>  (SCVTFUXSri:{ *:[f32] } GPR64:{ *:[i64] }:$Rn)
   31335             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SCVTFUXSri,
   31336             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31337             :       // GIR_Coverage, 355,
   31338             :       GIR_Done,
   31339             :     // Label 2050: @77008
   31340             :     GIM_Reject,
   31341             :     // Label 2040: @77009
   31342             :     GIM_Try, /*On fail goto*//*Label 2051*/ 77032, // Rule ID 353 //
   31343             :       GIM_CheckFeatures, GIFBS_HasFPARMv8,
   31344             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
   31345             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   31346             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
   31347             :       // (sint_to_fp:{ *:[f64] } GPR32:{ *:[i32] }:$Rn)  =>  (SCVTFUWDri:{ *:[f64] } GPR32:{ *:[i32] }:$Rn)
   31348             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SCVTFUWDri,
   31349             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31350             :       // GIR_Coverage, 353,
   31351             :       GIR_Done,
   31352             :     // Label 2051: @77032
   31353             :     GIM_Try, /*On fail goto*//*Label 2052*/ 77055, // Rule ID 356 //
   31354             :       GIM_CheckFeatures, GIFBS_HasFPARMv8,
   31355             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
   31356             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   31357             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
   31358             :       // (sint_to_fp:{ *:[f64] } GPR64:{ *:[i64] }:$Rn)  =>  (SCVTFUXDri:{ *:[f64] } GPR64:{ *:[i64] }:$Rn)
   31359             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SCVTFUXDri,
   31360             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31361             :       // GIR_Coverage, 356,
   31362             :       GIR_Done,
   31363             :     // Label 2052: @77055
   31364             :     GIM_Reject,
   31365             :     // Label 2041: @77056
   31366             :     GIM_Try, /*On fail goto*//*Label 2053*/ 77079, // Rule ID 704 //
   31367             :       GIM_CheckFeatures, GIFBS_HasNEON,
   31368             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
   31369             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   31370             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   31371             :       // (sint_to_fp:{ *:[v2f32] } V64:{ *:[v2i32] }:$Rn)  =>  (SCVTFv2f32:{ *:[v2f32] } V64:{ *:[v2i32] }:$Rn)
   31372             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SCVTFv2f32,
   31373             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31374             :       // GIR_Coverage, 704,
   31375             :       GIR_Done,
   31376             :     // Label 2053: @77079
   31377             :     GIM_Reject,
   31378             :     // Label 2042: @77080
   31379             :     GIM_Try, /*On fail goto*//*Label 2054*/ 77103, // Rule ID 706 //
   31380             :       GIM_CheckFeatures, GIFBS_HasNEON,
   31381             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
   31382             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   31383             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   31384             :       // (sint_to_fp:{ *:[v2f64] } V128:{ *:[v2i64] }:$Rn)  =>  (SCVTFv2f64:{ *:[v2f64] } V128:{ *:[v2i64] }:$Rn)
   31385             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SCVTFv2f64,
   31386             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31387             :       // GIR_Coverage, 706,
   31388             :       GIR_Done,
   31389             :     // Label 2054: @77103
   31390             :     GIM_Reject,
   31391             :     // Label 2043: @77104
   31392             :     GIM_Try, /*On fail goto*//*Label 2055*/ 77127, // Rule ID 702 //
   31393             :       GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   31394             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
   31395             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   31396             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   31397             :       // (sint_to_fp:{ *:[v4f16] } V64:{ *:[v4i16] }:$Rn)  =>  (SCVTFv4f16:{ *:[v4f16] } V64:{ *:[v4i16] }:$Rn)
   31398             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SCVTFv4f16,
   31399             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31400             :       // GIR_Coverage, 702,
   31401             :       GIR_Done,
   31402             :     // Label 2055: @77127
   31403             :     GIM_Reject,
   31404             :     // Label 2044: @77128
   31405             :     GIM_Try, /*On fail goto*//*Label 2056*/ 77151, // Rule ID 705 //
   31406             :       GIM_CheckFeatures, GIFBS_HasNEON,
   31407             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
   31408             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   31409             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   31410             :       // (sint_to_fp:{ *:[v4f32] } V128:{ *:[v4i32] }:$Rn)  =>  (SCVTFv4f32:{ *:[v4f32] } V128:{ *:[v4i32] }:$Rn)
   31411             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SCVTFv4f32,
   31412             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31413             :       // GIR_Coverage, 705,
   31414             :       GIR_Done,
   31415             :     // Label 2056: @77151
   31416             :     GIM_Reject,
   31417             :     // Label 2045: @77152
   31418             :     GIM_Try, /*On fail goto*//*Label 2057*/ 77175, // Rule ID 703 //
   31419             :       GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   31420             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
   31421             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   31422             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   31423             :       // (sint_to_fp:{ *:[v8f16] } V128:{ *:[v8i16] }:$Rn)  =>  (SCVTFv8f16:{ *:[v8f16] } V128:{ *:[v8i16] }:$Rn)
   31424             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SCVTFv8f16,
   31425             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31426             :       // GIR_Coverage, 703,
   31427             :       GIR_Done,
   31428             :     // Label 2057: @77175
   31429             :     GIM_Reject,
   31430             :     // Label 2046: @77176
   31431             :     GIM_Reject,
   31432             :     // Label 46: @77177
   31433             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/0, 10, /*)*//*default:*//*Label 2066*/ 77454,
   31434             :     /*GILLT_s16*//*Label 2058*/ 77193,
   31435             :     /*GILLT_s32*//*Label 2059*/ 77240,
   31436             :     /*GILLT_s64*//*Label 2060*/ 77287, 0,
   31437             :     /*GILLT_v2s32*//*Label 2061*/ 77334,
   31438             :     /*GILLT_v2s64*//*Label 2062*/ 77358,
   31439             :     /*GILLT_v4s16*//*Label 2063*/ 77382,
   31440             :     /*GILLT_v4s32*//*Label 2064*/ 77406, 0,
   31441             :     /*GILLT_v8s16*//*Label 2065*/ 77430,
   31442             :     // Label 2058: @77193
   31443             :     GIM_Try, /*On fail goto*//*Label 2067*/ 77216, // Rule ID 363 //
   31444             :       GIM_CheckFeatures, GIFBS_HasFullFP16,
   31445             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
   31446             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR16RegClassID,
   31447             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
   31448             :       // (uint_to_fp:{ *:[f16] } GPR32:{ *:[i32] }:$Rn)  =>  (UCVTFUWHri:{ *:[f16] } GPR32:{ *:[i32] }:$Rn)
   31449             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::UCVTFUWHri,
   31450             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31451             :       // GIR_Coverage, 363,
   31452             :       GIR_Done,
   31453             :     // Label 2067: @77216
   31454             :     GIM_Try, /*On fail goto*//*Label 2068*/ 77239, // Rule ID 366 //
   31455             :       GIM_CheckFeatures, GIFBS_HasFullFP16,
   31456             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
   31457             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR16RegClassID,
   31458             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
   31459             :       // (uint_to_fp:{ *:[f16] } GPR64:{ *:[i64] }:$Rn)  =>  (UCVTFUXHri:{ *:[f16] } GPR64:{ *:[i64] }:$Rn)
   31460             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::UCVTFUXHri,
   31461             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31462             :       // GIR_Coverage, 366,
   31463             :       GIR_Done,
   31464             :     // Label 2068: @77239
   31465             :     GIM_Reject,
   31466             :     // Label 2059: @77240
   31467             :     GIM_Try, /*On fail goto*//*Label 2069*/ 77263, // Rule ID 364 //
   31468             :       GIM_CheckFeatures, GIFBS_HasFPARMv8,
   31469             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
   31470             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   31471             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
   31472             :       // (uint_to_fp:{ *:[f32] } GPR32:{ *:[i32] }:$Rn)  =>  (UCVTFUWSri:{ *:[f32] } GPR32:{ *:[i32] }:$Rn)
   31473             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::UCVTFUWSri,
   31474             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31475             :       // GIR_Coverage, 364,
   31476             :       GIR_Done,
   31477             :     // Label 2069: @77263
   31478             :     GIM_Try, /*On fail goto*//*Label 2070*/ 77286, // Rule ID 367 //
   31479             :       GIM_CheckFeatures, GIFBS_HasFPARMv8,
   31480             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
   31481             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
   31482             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
   31483             :       // (uint_to_fp:{ *:[f32] } GPR64:{ *:[i64] }:$Rn)  =>  (UCVTFUXSri:{ *:[f32] } GPR64:{ *:[i64] }:$Rn)
   31484             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::UCVTFUXSri,
   31485             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31486             :       // GIR_Coverage, 367,
   31487             :       GIR_Done,
   31488             :     // Label 2070: @77286
   31489             :     GIM_Reject,
   31490             :     // Label 2060: @77287
   31491             :     GIM_Try, /*On fail goto*//*Label 2071*/ 77310, // Rule ID 365 //
   31492             :       GIM_CheckFeatures, GIFBS_HasFPARMv8,
   31493             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
   31494             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   31495             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
   31496             :       // (uint_to_fp:{ *:[f64] } GPR32:{ *:[i32] }:$Rn)  =>  (UCVTFUWDri:{ *:[f64] } GPR32:{ *:[i32] }:$Rn)
   31497             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::UCVTFUWDri,
   31498             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31499             :       // GIR_Coverage, 365,
   31500             :       GIR_Done,
   31501             :     // Label 2071: @77310
   31502             :     GIM_Try, /*On fail goto*//*Label 2072*/ 77333, // Rule ID 368 //
   31503             :       GIM_CheckFeatures, GIFBS_HasFPARMv8,
   31504             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
   31505             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   31506             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
   31507             :       // (uint_to_fp:{ *:[f64] } GPR64:{ *:[i64] }:$Rn)  =>  (UCVTFUXDri:{ *:[f64] } GPR64:{ *:[i64] }:$Rn)
   31508             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::UCVTFUXDri,
   31509             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31510             :       // GIR_Coverage, 368,
   31511             :       GIR_Done,
   31512             :     // Label 2072: @77333
   31513             :     GIM_Reject,
   31514             :     // Label 2061: @77334
   31515             :     GIM_Try, /*On fail goto*//*Label 2073*/ 77357, // Rule ID 748 //
   31516             :       GIM_CheckFeatures, GIFBS_HasNEON,
   31517             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
   31518             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   31519             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   31520             :       // (uint_to_fp:{ *:[v2f32] } V64:{ *:[v2i32] }:$Rn)  =>  (UCVTFv2f32:{ *:[v2f32] } V64:{ *:[v2i32] }:$Rn)
   31521             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::UCVTFv2f32,
   31522             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31523             :       // GIR_Coverage, 748,
   31524             :       GIR_Done,
   31525             :     // Label 2073: @77357
   31526             :     GIM_Reject,
   31527             :     // Label 2062: @77358
   31528             :     GIM_Try, /*On fail goto*//*Label 2074*/ 77381, // Rule ID 750 //
   31529             :       GIM_CheckFeatures, GIFBS_HasNEON,
   31530             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
   31531             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   31532             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   31533             :       // (uint_to_fp:{ *:[v2f64] } V128:{ *:[v2i64] }:$Rn)  =>  (UCVTFv2f64:{ *:[v2f64] } V128:{ *:[v2i64] }:$Rn)
   31534             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::UCVTFv2f64,
   31535             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31536             :       // GIR_Coverage, 750,
   31537             :       GIR_Done,
   31538             :     // Label 2074: @77381
   31539             :     GIM_Reject,
   31540             :     // Label 2063: @77382
   31541             :     GIM_Try, /*On fail goto*//*Label 2075*/ 77405, // Rule ID 746 //
   31542             :       GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   31543             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
   31544             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   31545             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   31546             :       // (uint_to_fp:{ *:[v4f16] } V64:{ *:[v4i16] }:$Rn)  =>  (UCVTFv4f16:{ *:[v4f16] } V64:{ *:[v4i16] }:$Rn)
   31547             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::UCVTFv4f16,
   31548             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31549             :       // GIR_Coverage, 746,
   31550             :       GIR_Done,
   31551             :     // Label 2075: @77405
   31552             :     GIM_Reject,
   31553             :     // Label 2064: @77406
   31554             :     GIM_Try, /*On fail goto*//*Label 2076*/ 77429, // Rule ID 749 //
   31555             :       GIM_CheckFeatures, GIFBS_HasNEON,
   31556             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
   31557             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   31558             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   31559             :       // (uint_to_fp:{ *:[v4f32] } V128:{ *:[v4i32] }:$Rn)  =>  (UCVTFv4f32:{ *:[v4f32] } V128:{ *:[v4i32] }:$Rn)
   31560             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::UCVTFv4f32,
   31561             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31562             :       // GIR_Coverage, 749,
   31563             :       GIR_Done,
   31564             :     // Label 2076: @77429
   31565             :     GIM_Reject,
   31566             :     // Label 2065: @77430
   31567             :     GIM_Try, /*On fail goto*//*Label 2077*/ 77453, // Rule ID 747 //
   31568             :       GIM_CheckFeatures, GIFBS_HasFullFP16_HasNEON,
   31569             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
   31570             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   31571             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   31572             :       // (uint_to_fp:{ *:[v8f16] } V128:{ *:[v8i16] }:$Rn)  =>  (UCVTFv8f16:{ *:[v8f16] } V128:{ *:[v8i16] }:$Rn)
   31573             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::UCVTFv8f16,
   31574             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31575             :       // GIR_Coverage, 747,
   31576             :       GIR_Done,
   31577             :     // Label 2077: @77453
   31578             :     GIM_Reject,
   31579             :     // Label 2066: @77454
   31580             :     GIM_Reject,
   31581             :     // Label 47: @77455
   31582             :     GIM_Try, /*On fail goto*//*Label 2078*/ 77467, // Rule ID 160 //
   31583             :       // MIs[0] addr
   31584             :       GIM_CheckIsMBB, /*MI*/0, /*Op*/0,
   31585             :       // (br (bb:{ *:[Other] }):$addr)  =>  (B (bb:{ *:[Other] }):$addr)
   31586             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::B,
   31587             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31588             :       // GIR_Coverage, 160,
   31589             :       GIR_Done,
   31590             :     // Label 2078: @77467
   31591             :     GIM_Reject,
   31592             :     // Label 48: @77468
   31593             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 3, /*)*//*default:*//*Label 2081*/ 77570,
   31594             :     /*GILLT_s32*//*Label 2079*/ 77476,
   31595             :     /*GILLT_s64*//*Label 2080*/ 77523,
   31596             :     // Label 2079: @77476
   31597             :     GIM_Try, /*On fail goto*//*Label 2082*/ 77522, // Rule ID 1901 //
   31598             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
   31599             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   31600             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
   31601             :       // (cttz:{ *:[i32] } GPR32:{ *:[i32] }:$Rn)  =>  (CLZWr:{ *:[i32] } (RBITWr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn))
   31602             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
   31603             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::RBITWr,
   31604             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   31605             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   31606             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   31607             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CLZWr,
   31608             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   31609             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   31610             :       GIR_EraseFromParent, /*InsnID*/0,
   31611             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31612             :       // GIR_Coverage, 1901,
   31613             :       GIR_Done,
   31614             :     // Label 2082: @77522
   31615             :     GIM_Reject,
   31616             :     // Label 2080: @77523
   31617             :     GIM_Try, /*On fail goto*//*Label 2083*/ 77569, // Rule ID 1902 //
   31618             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
   31619             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   31620             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
   31621             :       // (cttz:{ *:[i64] } GPR64:{ *:[i64] }:$Rn)  =>  (CLZXr:{ *:[i64] } (RBITXr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn))
   31622             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
   31623             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::RBITXr,
   31624             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
   31625             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // Rn
   31626             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
   31627             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CLZXr,
   31628             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   31629             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
   31630             :       GIR_EraseFromParent, /*InsnID*/0,
   31631             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31632             :       // GIR_Coverage, 1902,
   31633             :       GIR_Done,
   31634             :     // Label 2083: @77569
   31635             :     GIM_Reject,
   31636             :     // Label 2081: @77570
   31637             :     GIM_Reject,
   31638             :     // Label 49: @77571
   31639             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 11, /*)*//*default:*//*Label 2092*/ 78193,
   31640             :     /*GILLT_s32*//*Label 2084*/ 77587,
   31641             :     /*GILLT_s64*//*Label 2085*/ 77818, 0,
   31642             :     /*GILLT_v2s32*//*Label 2086*/ 78049, 0,
   31643             :     /*GILLT_v4s16*//*Label 2087*/ 78073,
   31644             :     /*GILLT_v4s32*//*Label 2088*/ 78097,
   31645             :     /*GILLT_v8s8*//*Label 2089*/ 78121,
   31646             :     /*GILLT_v8s16*//*Label 2090*/ 78145,
   31647             :     /*GILLT_v16s8*//*Label 2091*/ 78169,
   31648             :     // Label 2084: @77587
   31649             :     GIM_Try, /*On fail goto*//*Label 2093*/ 77817,
   31650             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
   31651             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   31652             :       GIM_Try, /*On fail goto*//*Label 2094*/ 77700, // Rule ID 1903 //
   31653             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
   31654             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_OR,
   31655             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
   31656             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
   31657             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
   31658             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SHL,
   31659             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
   31660             :         GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64,
   31661             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
   31662             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_XOR,
   31663             :         GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_s32,
   31664             :         GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/1, // MIs[4]
   31665             :         GIM_CheckOpcode, /*MI*/4, TargetOpcode::G_ASHR,
   31666             :         GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_s32,
   31667             :         GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_s64,
   31668             :         GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
   31669             :         GIM_CheckConstantInt, /*MI*/4, /*Op*/2, 31,
   31670             :         // MIs[3] Rn
   31671             :         GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/2, /*OtherMI*/4, /*OtherOpIdx*/1,
   31672             :         GIM_CheckConstantInt, /*MI*/2, /*Op*/2, 1,
   31673             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1,
   31674             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   31675             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
   31676             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
   31677             :         GIM_CheckIsSafeToFold, /*InsnID*/4,
   31678             :         // (ctlz:{ *:[i32] } (or:{ *:[i32] } (shl:{ *:[i32] } (xor:{ *:[i32] } (sra:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, 31:{ *:[i64] }), GPR32:{ *:[i32] }:$Rn), 1:{ *:[i64] }), 1:{ *:[i32] }))  =>  (CLSWr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn)
   31679             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CLSWr,
   31680             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   31681             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // Rn
   31682             :         GIR_EraseFromParent, /*InsnID*/0,
   31683             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31684             :         // GIR_Coverage, 1903,
   31685             :         GIR_Done,
   31686             :       // Label 2094: @77700
   31687             :       GIM_Try, /*On fail goto*//*Label 2095*/ 77803, // Rule ID 4043 //
   31688             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
   31689             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_OR,
   31690             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
   31691             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
   31692             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
   31693             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SHL,
   31694             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
   31695             :         GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64,
   31696             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
   31697             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_XOR,
   31698             :         GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_s32,
   31699             :         GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_s32,
   31700             :         GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
   31701             :         GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
   31702             :         GIM_CheckOpcode, /*MI*/4, TargetOpcode::G_ASHR,
   31703             :         GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_s64,
   31704             :         // MIs[4] Rn
   31705             :         GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/3, /*OtherOpIdx*/1,
   31706             :         GIM_CheckConstantInt, /*MI*/4, /*Op*/2, 31,
   31707             :         GIM_CheckConstantInt, /*MI*/2, /*Op*/2, 1,
   31708             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1,
   31709             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   31710             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
   31711             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
   31712             :         GIM_CheckIsSafeToFold, /*InsnID*/4,
   31713             :         // (ctlz:{ *:[i32] } (or:{ *:[i32] } (shl:{ *:[i32] } (xor:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, (sra:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, 31:{ *:[i64] })), 1:{ *:[i64] }), 1:{ *:[i32] }))  =>  (CLSWr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn)
   31714             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CLSWr,
   31715             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   31716             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // Rn
   31717             :         GIR_EraseFromParent, /*InsnID*/0,
   31718             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31719             :         // GIR_Coverage, 4043,
   31720             :         GIR_Done,
   31721             :       // Label 2095: @77803
   31722             :       GIM_Try, /*On fail goto*//*Label 2096*/ 77816, // Rule ID 119 //
   31723             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
   31724             :         // (ctlz:{ *:[i32] } GPR32:{ *:[i32] }:$Rn)  =>  (CLZWr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn)
   31725             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::CLZWr,
   31726             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31727             :         // GIR_Coverage, 119,
   31728             :         GIR_Done,
   31729             :       // Label 2096: @77816
   31730             :       GIM_Reject,
   31731             :     // Label 2093: @77817
   31732             :     GIM_Reject,
   31733             :     // Label 2085: @77818
   31734             :     GIM_Try, /*On fail goto*//*Label 2097*/ 78048,
   31735             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
   31736             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   31737             :       GIM_Try, /*On fail goto*//*Label 2098*/ 77931, // Rule ID 1904 //
   31738             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
   31739             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_OR,
   31740             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
   31741             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
   31742             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
   31743             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SHL,
   31744             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s64,
   31745             :         GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64,
   31746             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
   31747             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_XOR,
   31748             :         GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_s64,
   31749             :         GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/1, // MIs[4]
   31750             :         GIM_CheckOpcode, /*MI*/4, TargetOpcode::G_ASHR,
   31751             :         GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_s64,
   31752             :         GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_s64,
   31753             :         GIM_CheckRegBankForClass, /*MI*/4, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
   31754             :         GIM_CheckConstantInt, /*MI*/4, /*Op*/2, 63,
   31755             :         // MIs[3] Rn
   31756             :         GIM_CheckIsSameOperand, /*MI*/3, /*OpIdx*/2, /*OtherMI*/4, /*OtherOpIdx*/1,
   31757             :         GIM_CheckConstantInt, /*MI*/2, /*Op*/2, 1,
   31758             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1,
   31759             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   31760             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
   31761             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
   31762             :         GIM_CheckIsSafeToFold, /*InsnID*/4,
   31763             :         // (ctlz:{ *:[i64] } (or:{ *:[i64] } (shl:{ *:[i64] } (xor:{ *:[i64] } (sra:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, 63:{ *:[i64] }), GPR64:{ *:[i64] }:$Rn), 1:{ *:[i64] }), 1:{ *:[i64] }))  =>  (CLSXr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn)
   31764             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CLSXr,
   31765             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   31766             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/4, /*OpIdx*/1, // Rn
   31767             :         GIR_EraseFromParent, /*InsnID*/0,
   31768             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31769             :         // GIR_Coverage, 1904,
   31770             :         GIR_Done,
   31771             :       // Label 2098: @77931
   31772             :       GIM_Try, /*On fail goto*//*Label 2099*/ 78034, // Rule ID 4044 //
   31773             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
   31774             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_OR,
   31775             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
   31776             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
   31777             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
   31778             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SHL,
   31779             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s64,
   31780             :         GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64,
   31781             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
   31782             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_XOR,
   31783             :         GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_s64,
   31784             :         GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_s64,
   31785             :         GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
   31786             :         GIM_RecordInsn, /*DefineMI*/4, /*MI*/3, /*OpIdx*/2, // MIs[4]
   31787             :         GIM_CheckOpcode, /*MI*/4, TargetOpcode::G_ASHR,
   31788             :         GIM_CheckType, /*MI*/4, /*Op*/2, /*Type*/GILLT_s64,
   31789             :         // MIs[4] Rn
   31790             :         GIM_CheckIsSameOperand, /*MI*/4, /*OpIdx*/1, /*OtherMI*/3, /*OtherOpIdx*/1,
   31791             :         GIM_CheckConstantInt, /*MI*/4, /*Op*/2, 63,
   31792             :         GIM_CheckConstantInt, /*MI*/2, /*Op*/2, 1,
   31793             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1,
   31794             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
   31795             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
   31796             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
   31797             :         GIM_CheckIsSafeToFold, /*InsnID*/4,
   31798             :         // (ctlz:{ *:[i64] } (or:{ *:[i64] } (shl:{ *:[i64] } (xor:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, (sra:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, 63:{ *:[i64] })), 1:{ *:[i64] }), 1:{ *:[i64] }))  =>  (CLSXr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn)
   31799             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::CLSXr,
   31800             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
   31801             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // Rn
   31802             :         GIR_EraseFromParent, /*InsnID*/0,
   31803             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31804             :         // GIR_Coverage, 4044,
   31805             :         GIR_Done,
   31806             :       // Label 2099: @78034
   31807             :       GIM_Try, /*On fail goto*//*Label 2100*/ 78047, // Rule ID 120 //
   31808             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
   31809             :         // (ctlz:{ *:[i64] } GPR64:{ *:[i64] }:$Rn)  =>  (CLZXr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn)
   31810             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::CLZXr,
   31811             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31812             :         // GIR_Coverage, 120,
   31813             :         GIR_Done,
   31814             :       // Label 2100: @78047
   31815             :       GIM_Reject,
   31816             :     // Label 2097: @78048
   31817             :     GIM_Reject,
   31818             :     // Label 2086: @78049
   31819             :     GIM_Try, /*On fail goto*//*Label 2101*/ 78072, // Rule ID 492 //
   31820             :       GIM_CheckFeatures, GIFBS_HasNEON,
   31821             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
   31822             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   31823             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   31824             :       // (ctlz:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn)  =>  (CLZv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn)
   31825             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::CLZv2i32,
   31826             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31827             :       // GIR_Coverage, 492,
   31828             :       GIR_Done,
   31829             :     // Label 2101: @78072
   31830             :     GIM_Reject,
   31831             :     // Label 2087: @78073
   31832             :     GIM_Try, /*On fail goto*//*Label 2102*/ 78096, // Rule ID 490 //
   31833             :       GIM_CheckFeatures, GIFBS_HasNEON,
   31834             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
   31835             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   31836             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   31837             :       // (ctlz:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn)  =>  (CLZv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn)
   31838             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::CLZv4i16,
   31839             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31840             :       // GIR_Coverage, 490,
   31841             :       GIR_Done,
   31842             :     // Label 2102: @78096
   31843             :     GIM_Reject,
   31844             :     // Label 2088: @78097
   31845             :     GIM_Try, /*On fail goto*//*Label 2103*/ 78120, // Rule ID 493 //
   31846             :       GIM_CheckFeatures, GIFBS_HasNEON,
   31847             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
   31848             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   31849             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   31850             :       // (ctlz:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn)  =>  (CLZv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn)
   31851             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::CLZv4i32,
   31852             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31853             :       // GIR_Coverage, 493,
   31854             :       GIR_Done,
   31855             :     // Label 2103: @78120
   31856             :     GIM_Reject,
   31857             :     // Label 2089: @78121
   31858             :     GIM_Try, /*On fail goto*//*Label 2104*/ 78144, // Rule ID 488 //
   31859             :       GIM_CheckFeatures, GIFBS_HasNEON,
   31860             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
   31861             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   31862             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   31863             :       // (ctlz:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn)  =>  (CLZv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn)
   31864             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::CLZv8i8,
   31865             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31866             :       // GIR_Coverage, 488,
   31867             :       GIR_Done,
   31868             :     // Label 2104: @78144
   31869             :     GIM_Reject,
   31870             :     // Label 2090: @78145
   31871             :     GIM_Try, /*On fail goto*//*Label 2105*/ 78168, // Rule ID 491 //
   31872             :       GIM_CheckFeatures, GIFBS_HasNEON,
   31873             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
   31874             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   31875             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   31876             :       // (ctlz:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn)  =>  (CLZv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn)
   31877             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::CLZv8i16,
   31878             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31879             :       // GIR_Coverage, 491,
   31880             :       GIR_Done,
   31881             :     // Label 2105: @78168
   31882             :     GIM_Reject,
   31883             :     // Label 2091: @78169
   31884             :     GIM_Try, /*On fail goto*//*Label 2106*/ 78192, // Rule ID 489 //
   31885             :       GIM_CheckFeatures, GIFBS_HasNEON,
   31886             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
   31887             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   31888             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   31889             :       // (ctlz:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn)  =>  (CLZv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn)
   31890             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::CLZv16i8,
   31891             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31892             :       // GIR_Coverage, 489,
   31893             :       GIR_Done,
   31894             :     // Label 2106: @78192
   31895             :     GIM_Reject,
   31896             :     // Label 2092: @78193
   31897             :     GIM_Reject,
   31898             :     // Label 50: @78194
   31899             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/8, 11, /*)*//*default:*//*Label 2109*/ 78251,
   31900             :     /*GILLT_v8s8*//*Label 2107*/ 78203, 0,
   31901             :     /*GILLT_v16s8*//*Label 2108*/ 78227,
   31902             :     // Label 2107: @78203
   31903             :     GIM_Try, /*On fail goto*//*Label 2110*/ 78226, // Rule ID 529 //
   31904             :       GIM_CheckFeatures, GIFBS_HasNEON,
   31905             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
   31906             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
   31907             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
   31908             :       // (ctpop:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn)  =>  (CNTv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn)
   31909             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::CNTv8i8,
   31910             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31911             :       // GIR_Coverage, 529,
   31912             :       GIR_Done,
   31913             :     // Label 2110: @78226
   31914             :     GIM_Reject,
   31915             :     // Label 2108: @78227
   31916             :     GIM_Try, /*On fail goto*//*Label 2111*/ 78250, // Rule ID 530 //
   31917             :       GIM_CheckFeatures, GIFBS_HasNEON,
   31918             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
   31919             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
   31920             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
   31921             :       // (ctpop:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn)  =>  (CNTv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn)
   31922             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::CNTv16i8,
   31923             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31924             :       // GIR_Coverage, 530,
   31925             :       GIR_Done,
   31926             :     // Label 2111: @78250
   31927             :     GIM_Reject,
   31928             :     // Label 2109: @78251
   31929             :     GIM_Reject,
   31930             :     // Label 51: @78252
   31931             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 3, /*)*//*default:*//*Label 2114*/ 78304,
   31932             :     /*GILLT_s32*//*Label 2112*/ 78260,
   31933             :     /*GILLT_s64*//*Label 2113*/ 78282,
   31934             :     // Label 2112: @78260
   31935             :     GIM_Try, /*On fail goto*//*Label 2115*/ 78281, // Rule ID 124 //
   31936             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
   31937             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
   31938             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
   31939             :       // (bswap:{ *:[i32] } GPR32:{ *:[i32] }:$Rn)  =>  (REVWr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn)
   31940             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REVWr,
   31941             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31942             :       // GIR_Coverage, 124,
   31943             :       GIR_Done,
   31944             :     // Label 2115: @78281
   31945             :     GIM_Reject,
   31946             :     // Label 2113: @78282
   31947             :     GIM_Try, /*On fail goto*//*Label 2116*/ 78303, // Rule ID 125 //
   31948             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
   31949             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
   31950             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
   31951             :       // (bswap:{ *:[i64] } GPR64:{ *:[i64] }:$Rn)  =>  (REVXr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn)
   31952             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REVXr,
   31953             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
   31954             :       // GIR_Coverage, 125,
   31955             :       GIR_Done,
   31956             :     // Label 2116: @78303
   31957             :     GIM_Reject,
   31958             :     // Label 2114: @78304
   31959             :     GIM_Reject,
   31960             :     // Label 52: @78305
   31961             :     GIM_Reject,
   31962             :     };
   31963           0 :   return MatchTable0;
   31964             : }
   31965             : #endif // ifdef GET_GLOBALISEL_IMPL
   31966             : #ifdef GET_GLOBALISEL_PREDICATES_DECL
   31967             : PredicateBitset AvailableModuleFeatures;
   31968             : mutable PredicateBitset AvailableFunctionFeatures;
   31969             : PredicateBitset getAvailableFeatures() const {
   31970             :   return AvailableModuleFeatures | AvailableFunctionFeatures;
   31971             : }
   31972             : PredicateBitset
   31973             : computeAvailableModuleFeatures(const AArch64Subtarget *Subtarget) const;
   31974             : PredicateBitset
   31975             : computeAvailableFunctionFeatures(const AArch64Subtarget *Subtarget,
   31976             :                                  const MachineFunction *MF) const;
   31977             : #endif // ifdef GET_GLOBALISEL_PREDICATES_DECL
   31978             : #ifdef GET_GLOBALISEL_PREDICATES_INIT
   31979        1570 : AvailableModuleFeatures(computeAvailableModuleFeatures(&STI)),
   31980             : AvailableFunctionFeatures()
   31981             : #endif // ifdef GET_GLOBALISEL_PREDICATES_INIT

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