LCOV - code coverage report
Current view: top level - build-llvm/lib/Target/AArch64 - AArch64GenGlobalISel.inc (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 25 203 12.3 %
Date: 2018-10-16 05:50:02 Functions: 3 8 37.5 %
Legend: Lines: hit not hit

          Line data    Source code
       1             : /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
       2             : |*                                                                            *|
       3             : |* Global Instruction Selector for the AArch64 target                         *|
       4             : |*                                                                            *|
       5             : |* Automatically generated file, do not edit!                                 *|
       6             : |*                                                                            *|
       7             : \*===----------------------------------------------------------------------===*/
       8             : 
       9             : #ifdef GET_GLOBALISEL_PREDICATE_BITSET
      10             : const unsigned MAX_SUBTARGET_PREDICATES = 18;
      11             : using PredicateBitset = llvm::PredicateBitsetImpl<MAX_SUBTARGET_PREDICATES>;
      12             : #endif // ifdef GET_GLOBALISEL_PREDICATE_BITSET
      13             : 
      14             : #ifdef GET_GLOBALISEL_TEMPORARIES_DECL
      15             :   mutable MatcherState State;
      16             :   typedef ComplexRendererFns(AArch64InstructionSelector::*ComplexMatcherMemFn)(MachineOperand &) const;
      17             :   typedef void(AArch64InstructionSelector::*CustomRendererFn)(MachineInstrBuilder &, const MachineInstr&) const;
      18             :   const ISelInfoTy<PredicateBitset, ComplexMatcherMemFn, CustomRendererFn> ISelInfo;
      19             :   static AArch64InstructionSelector::ComplexMatcherMemFn ComplexPredicateFns[];
      20             :   static AArch64InstructionSelector::CustomRendererFn CustomRenderers[];
      21             :   bool testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const override;
      22             :   bool testImmPredicate_APInt(unsigned PredicateID, const APInt &Imm) const override;
      23             :   bool testImmPredicate_APFloat(unsigned PredicateID, const APFloat &Imm) const override;
      24             :   const int64_t *getMatchTable() const override;
      25             :   bool testMIPredicate_MI(unsigned PredicateID, const MachineInstr &MI) const override;
      26             : #endif // ifdef GET_GLOBALISEL_TEMPORARIES_DECL
      27             : 
      28             : #ifdef GET_GLOBALISEL_TEMPORARIES_INIT
      29             : , State(1),
      30        1570 : ISelInfo(TypeObjects, NumTypeObjects, FeatureBitsets, ComplexPredicateFns, CustomRenderers)
      31             : #endif // ifdef GET_GLOBALISEL_TEMPORARIES_INIT
      32             : 
      33             : #ifdef GET_GLOBALISEL_IMPL
      34             : // Bits for subtarget features that participate in instruction matching.
      35             : enum SubtargetFeatureBits : uint8_t {
      36             :   Feature_HasFPARMv8Bit = 3,
      37             :   Feature_HasNEONBit = 4,
      38             :   Feature_HasSHA2Bit = 7,
      39             :   Feature_HasAESBit = 6,
      40             :   Feature_HasDotProdBit = 0,
      41             :   Feature_HasCRCBit = 1,
      42             :   Feature_HasLSEBit = 8,
      43             :   Feature_HasRDMBit = 5,
      44             :   Feature_HasPerfMonBit = 9,
      45             :   Feature_HasFullFP16Bit = 2,
      46             :   Feature_HasFuseAESBit = 14,
      47             :   Feature_IsLEBit = 10,
      48             :   Feature_IsBEBit = 15,
      49             :   Feature_UseAlternateSExtLoadCVTF32Bit = 13,
      50             :   Feature_NotForCodeSizeBit = 12,
      51             :   Feature_UseSTRQroBit = 11,
      52             :   Feature_UseBTIBit = 17,
      53             :   Feature_NotUseBTIBit = 16,
      54             : };
      55             : 
      56           0 : PredicateBitset AArch64InstructionSelector::
      57             : computeAvailableModuleFeatures(const AArch64Subtarget *Subtarget) const {
      58           0 :   PredicateBitset Features;
      59           0 :   if (Subtarget->hasFPARMv8())
      60           0 :     Features[Feature_HasFPARMv8Bit] = 1;
      61           0 :   if (Subtarget->hasNEON())
      62           0 :     Features[Feature_HasNEONBit] = 1;
      63           0 :   if (Subtarget->hasSHA2())
      64           0 :     Features[Feature_HasSHA2Bit] = 1;
      65           0 :   if (Subtarget->hasAES())
      66           0 :     Features[Feature_HasAESBit] = 1;
      67           0 :   if (Subtarget->hasDotProd())
      68           0 :     Features[Feature_HasDotProdBit] = 1;
      69           0 :   if (Subtarget->hasCRC())
      70           0 :     Features[Feature_HasCRCBit] = 1;
      71           0 :   if (Subtarget->hasLSE())
      72           0 :     Features[Feature_HasLSEBit] = 1;
      73           0 :   if (Subtarget->hasRDM())
      74           0 :     Features[Feature_HasRDMBit] = 1;
      75           0 :   if (Subtarget->hasPerfMon())
      76           0 :     Features[Feature_HasPerfMonBit] = 1;
      77           0 :   if (Subtarget->hasFullFP16())
      78           0 :     Features[Feature_HasFullFP16Bit] = 1;
      79           0 :   if (Subtarget->hasFuseAES())
      80           0 :     Features[Feature_HasFuseAESBit] = 1;
      81           0 :   if (Subtarget->isLittleEndian())
      82           0 :     Features[Feature_IsLEBit] = 1;
      83           0 :   if (!Subtarget->isLittleEndian())
      84           0 :     Features[Feature_IsBEBit] = 1;
      85           0 :   if (Subtarget->useAlternateSExtLoadCVTF32Pattern())
      86           0 :     Features[Feature_UseAlternateSExtLoadCVTF32Bit] = 1;
      87           0 :   return Features;
      88             : }
      89             : 
      90           0 : PredicateBitset AArch64InstructionSelector::
      91             : computeAvailableFunctionFeatures(const AArch64Subtarget *Subtarget, const MachineFunction *MF) const {
      92           0 :   PredicateBitset Features;
      93           0 :   if (!MF->getFunction().optForSize())
      94           0 :     Features[Feature_NotForCodeSizeBit] = 1;
      95           0 :   if (!Subtarget->isSTRQroSlow() || MF->getFunction().optForSize())
      96           0 :     Features[Feature_UseSTRQroBit] = 1;
      97           0 :   if ( MF->getFunction().hasFnAttribute("branch-target-enforcement") )
      98           0 :     Features[Feature_UseBTIBit] = 1;
      99           0 :   if ( !MF->getFunction().hasFnAttribute("branch-target-enforcement") )
     100           0 :     Features[Feature_NotUseBTIBit] = 1;
     101           0 :   return Features;
     102             : }
     103             : 
     104             : // LLT Objects.
     105             : enum {
     106             :   GILLT_s16,
     107             :   GILLT_s32,
     108             :   GILLT_s64,
     109             :   GILLT_s128,
     110             :   GILLT_v2s32,
     111             :   GILLT_v2s64,
     112             :   GILLT_v4s16,
     113             :   GILLT_v4s32,
     114             :   GILLT_v8s8,
     115             :   GILLT_v8s16,
     116             :   GILLT_v16s8,
     117             : };
     118             : const static size_t NumTypeObjects = 11;
     119             : const static LLT TypeObjects[] = {
     120             :   LLT::scalar(16),
     121             :   LLT::scalar(32),
     122             :   LLT::scalar(64),
     123             :   LLT::scalar(128),
     124             :   LLT::vector(2, 32),
     125             :   LLT::vector(2, 64),
     126             :   LLT::vector(4, 16),
     127             :   LLT::vector(4, 32),
     128             :   LLT::vector(8, 8),
     129             :   LLT::vector(8, 16),
     130             :   LLT::vector(16, 8),
     131             : };
     132             : 
     133             : // Feature bitsets.
     134             : enum {
     135             :   GIFBS_Invalid,
     136             :   GIFBS_HasAES,
     137             :   GIFBS_HasCRC,
     138             :   GIFBS_HasDotProd,
     139             :   GIFBS_HasFPARMv8,
     140             :   GIFBS_HasFullFP16,
     141             :   GIFBS_HasFuseAES,
     142             :   GIFBS_HasLSE,
     143             :   GIFBS_HasNEON,
     144             :   GIFBS_HasRDM,
     145             :   GIFBS_HasSHA2,
     146             :   GIFBS_IsBE,
     147             :   GIFBS_IsLE,
     148             :   GIFBS_HasFullFP16_HasNEON,
     149             :   GIFBS_HasNEON_HasRDM,
     150             : };
     151             : const static PredicateBitset FeatureBitsets[] {
     152             :   {}, // GIFBS_Invalid
     153             :   {Feature_HasAESBit, },
     154             :   {Feature_HasCRCBit, },
     155             :   {Feature_HasDotProdBit, },
     156             :   {Feature_HasFPARMv8Bit, },
     157             :   {Feature_HasFullFP16Bit, },
     158             :   {Feature_HasFuseAESBit, },
     159             :   {Feature_HasLSEBit, },
     160             :   {Feature_HasNEONBit, },
     161             :   {Feature_HasRDMBit, },
     162             :   {Feature_HasSHA2Bit, },
     163             :   {Feature_IsBEBit, },
     164             :   {Feature_IsLEBit, },
     165             :   {Feature_HasFullFP16Bit, Feature_HasNEONBit, },
     166             :   {Feature_HasNEONBit, Feature_HasRDMBit, },
     167             : };
     168             : 
     169             : // ComplexPattern predicates.
     170             : enum {
     171             :   GICP_Invalid,
     172             :   GICP_gi_addsub_shifted_imm32,
     173             :   GICP_gi_addsub_shifted_imm64,
     174             :   GICP_gi_am_indexed128,
     175             :   GICP_gi_am_indexed16,
     176             :   GICP_gi_am_indexed32,
     177             :   GICP_gi_am_indexed64,
     178             :   GICP_gi_am_indexed8,
     179             :   GICP_gi_am_unscaled128,
     180             :   GICP_gi_am_unscaled16,
     181             :   GICP_gi_am_unscaled32,
     182             :   GICP_gi_am_unscaled64,
     183             :   GICP_gi_am_unscaled8,
     184             : };
     185             : // See constructor for table contents
     186             : 
     187             : // PatFrag predicates.
     188             : enum {
     189             :   GIPFP_I64_Predicate_VectorIndex1 = GIPFP_I64_Invalid + 1,
     190             :   GIPFP_I64_Predicate_VectorIndexB,
     191             :   GIPFP_I64_Predicate_VectorIndexD,
     192             :   GIPFP_I64_Predicate_VectorIndexH,
     193             :   GIPFP_I64_Predicate_VectorIndexS,
     194             :   GIPFP_I64_Predicate_addsub_imm8_opt_lsl_i16,
     195             :   GIPFP_I64_Predicate_addsub_imm8_opt_lsl_i32,
     196             :   GIPFP_I64_Predicate_addsub_imm8_opt_lsl_i64,
     197             :   GIPFP_I64_Predicate_addsub_imm8_opt_lsl_i8,
     198             :   GIPFP_I64_Predicate_cpy_imm8_opt_lsl_i16,
     199             :   GIPFP_I64_Predicate_cpy_imm8_opt_lsl_i32,
     200             :   GIPFP_I64_Predicate_cpy_imm8_opt_lsl_i64,
     201             :   GIPFP_I64_Predicate_cpy_imm8_opt_lsl_i8,
     202             :   GIPFP_I64_Predicate_i64imm_32bit,
     203             :   GIPFP_I64_Predicate_imm0_1,
     204             :   GIPFP_I64_Predicate_imm0_127,
     205             :   GIPFP_I64_Predicate_imm0_15,
     206             :   GIPFP_I64_Predicate_imm0_255,
     207             :   GIPFP_I64_Predicate_imm0_31,
     208             :   GIPFP_I64_Predicate_imm0_63,
     209             :   GIPFP_I64_Predicate_imm0_65535,
     210             :   GIPFP_I64_Predicate_imm0_7,
     211             :   GIPFP_I64_Predicate_imm32_0_15,
     212             :   GIPFP_I64_Predicate_imm32_0_31,
     213             :   GIPFP_I64_Predicate_maski16_or_more,
     214             :   GIPFP_I64_Predicate_maski8_or_more,
     215             :   GIPFP_I64_Predicate_s64imm_32bit,
     216             :   GIPFP_I64_Predicate_simm4s1,
     217             :   GIPFP_I64_Predicate_simm4s16,
     218             :   GIPFP_I64_Predicate_simm4s2,
     219             :   GIPFP_I64_Predicate_simm4s3,
     220             :   GIPFP_I64_Predicate_simm4s4,
     221             :   GIPFP_I64_Predicate_simm5_32b,
     222             :   GIPFP_I64_Predicate_simm5_64b,
     223             :   GIPFP_I64_Predicate_simm6_32b,
     224             :   GIPFP_I64_Predicate_simm6s1,
     225             :   GIPFP_I64_Predicate_simm8,
     226             :   GIPFP_I64_Predicate_simm9,
     227             :   GIPFP_I64_Predicate_sve_elm_idx_extdup_b,
     228             :   GIPFP_I64_Predicate_sve_elm_idx_extdup_d,
     229             :   GIPFP_I64_Predicate_sve_elm_idx_extdup_h,
     230             :   GIPFP_I64_Predicate_sve_elm_idx_extdup_q,
     231             :   GIPFP_I64_Predicate_sve_elm_idx_extdup_s,
     232             :   GIPFP_I64_Predicate_sve_incdec_imm,
     233             :   GIPFP_I64_Predicate_sve_pred_enum,
     234             :   GIPFP_I64_Predicate_sve_prfop,
     235             :   GIPFP_I64_Predicate_tbz_imm0_31_diag,
     236             :   GIPFP_I64_Predicate_tbz_imm0_31_nodiag,
     237             :   GIPFP_I64_Predicate_tbz_imm32_63,
     238             :   GIPFP_I64_Predicate_uimm5s2,
     239             :   GIPFP_I64_Predicate_uimm5s4,
     240             :   GIPFP_I64_Predicate_uimm5s8,
     241             :   GIPFP_I64_Predicate_uimm6,
     242             :   GIPFP_I64_Predicate_uimm6s1,
     243             :   GIPFP_I64_Predicate_uimm6s16,
     244             :   GIPFP_I64_Predicate_uimm6s2,
     245             :   GIPFP_I64_Predicate_uimm6s4,
     246             :   GIPFP_I64_Predicate_uimm6s8,
     247             :   GIPFP_I64_Predicate_vecshiftL16,
     248             :   GIPFP_I64_Predicate_vecshiftL32,
     249             :   GIPFP_I64_Predicate_vecshiftL64,
     250             :   GIPFP_I64_Predicate_vecshiftL8,
     251             :   GIPFP_I64_Predicate_vecshiftR16,
     252             :   GIPFP_I64_Predicate_vecshiftR16Narrow,
     253             :   GIPFP_I64_Predicate_vecshiftR32,
     254             :   GIPFP_I64_Predicate_vecshiftR32Narrow,
     255             :   GIPFP_I64_Predicate_vecshiftR64,
     256             :   GIPFP_I64_Predicate_vecshiftR64Narrow,
     257             :   GIPFP_I64_Predicate_vecshiftR8,
     258             : };
     259           5 : bool AArch64InstructionSelector::testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const {
     260           5 :   switch (PredicateID) {
     261           0 :   case GIPFP_I64_Predicate_VectorIndex1: {
     262           0 :      return ((uint64_t)Imm) == 1; 
     263             :     llvm_unreachable("ImmediateCode should have returned");
     264             :     return false;
     265             :   }
     266           0 :   case GIPFP_I64_Predicate_VectorIndexB: {
     267           0 :      return ((uint64_t)Imm) < 16; 
     268             :     llvm_unreachable("ImmediateCode should have returned");
     269             :     return false;
     270             :   }
     271           0 :   case GIPFP_I64_Predicate_VectorIndexD: {
     272           0 :      return ((uint64_t)Imm) < 2; 
     273             :     llvm_unreachable("ImmediateCode should have returned");
     274             :     return false;
     275             :   }
     276           0 :   case GIPFP_I64_Predicate_VectorIndexH: {
     277           0 :      return ((uint64_t)Imm) < 8; 
     278             :     llvm_unreachable("ImmediateCode should have returned");
     279             :     return false;
     280             :   }
     281           0 :   case GIPFP_I64_Predicate_VectorIndexS: {
     282           0 :      return ((uint64_t)Imm) < 4; 
     283             :     llvm_unreachable("ImmediateCode should have returned");
     284             :     return false;
     285             :   }
     286             :   case GIPFP_I64_Predicate_addsub_imm8_opt_lsl_i16: {
     287             :     
     288             :   return AArch64_AM::isSVEAddSubImm<int16_t>(Imm);
     289             : 
     290             :     llvm_unreachable("ImmediateCode should have returned");
     291             :     return false;
     292             :   }
     293             :   case GIPFP_I64_Predicate_addsub_imm8_opt_lsl_i32: {
     294             :     
     295             :   return AArch64_AM::isSVEAddSubImm<int32_t>(Imm);
     296             : 
     297             :     llvm_unreachable("ImmediateCode should have returned");
     298             :     return false;
     299             :   }
     300             :   case GIPFP_I64_Predicate_addsub_imm8_opt_lsl_i64: {
     301             :     
     302             :   return AArch64_AM::isSVEAddSubImm<int64_t>(Imm);
     303             : 
     304             :     llvm_unreachable("ImmediateCode should have returned");
     305             :     return false;
     306             :   }
     307             :   case GIPFP_I64_Predicate_addsub_imm8_opt_lsl_i8: {
     308             :     
     309             :   return AArch64_AM::isSVEAddSubImm<int8_t>(Imm);
     310             : 
     311             :     llvm_unreachable("ImmediateCode should have returned");
     312             :     return false;
     313             :   }
     314             :   case GIPFP_I64_Predicate_cpy_imm8_opt_lsl_i16: {
     315             :     
     316             :   return AArch64_AM::isSVECpyImm<int16_t>(Imm);
     317             : 
     318             :     llvm_unreachable("ImmediateCode should have returned");
     319             :     return false;
     320             :   }
     321             :   case GIPFP_I64_Predicate_cpy_imm8_opt_lsl_i32: {
     322             :     
     323           0 :   return AArch64_AM::isSVECpyImm<int32_t>(Imm);
     324             : 
     325             :     llvm_unreachable("ImmediateCode should have returned");
     326             :     return false;
     327             :   }
     328             :   case GIPFP_I64_Predicate_cpy_imm8_opt_lsl_i64: {
     329             :     
     330           0 :   return AArch64_AM::isSVECpyImm<int64_t>(Imm);
     331             : 
     332             :     llvm_unreachable("ImmediateCode should have returned");
     333             :     return false;
     334             :   }
     335             :   case GIPFP_I64_Predicate_cpy_imm8_opt_lsl_i8: {
     336             :     
     337             :   return AArch64_AM::isSVECpyImm<int8_t>(Imm);
     338             : 
     339             :     llvm_unreachable("ImmediateCode should have returned");
     340             :     return false;
     341             :   }
     342           0 :   case GIPFP_I64_Predicate_i64imm_32bit: {
     343             :     
     344           0 :   return (Imm & 0xffffffffULL) == static_cast<uint64_t>(Imm);
     345             : 
     346             :     llvm_unreachable("ImmediateCode should have returned");
     347             :     return false;
     348             :   }
     349           0 :   case GIPFP_I64_Predicate_imm0_1: {
     350             :     
     351           0 :   return ((uint64_t)Imm) < 2;
     352             : 
     353             :     llvm_unreachable("ImmediateCode should have returned");
     354             :     return false;
     355             :   }
     356           1 :   case GIPFP_I64_Predicate_imm0_127: {
     357             :     
     358           1 :   return ((uint32_t)Imm) < 128;
     359             : 
     360             :     llvm_unreachable("ImmediateCode should have returned");
     361             :     return false;
     362             :   }
     363           0 :   case GIPFP_I64_Predicate_imm0_15: {
     364             :     
     365           0 :   return ((uint64_t)Imm) < 16;
     366             : 
     367             :     llvm_unreachable("ImmediateCode should have returned");
     368             :     return false;
     369             :   }
     370           0 :   case GIPFP_I64_Predicate_imm0_255: {
     371             :     
     372           0 :   return ((uint32_t)Imm) < 256;
     373             : 
     374             :     llvm_unreachable("ImmediateCode should have returned");
     375             :     return false;
     376             :   }
     377           0 :   case GIPFP_I64_Predicate_imm0_31: {
     378             :     
     379           0 :   return ((uint64_t)Imm) < 32;
     380             : 
     381             :     llvm_unreachable("ImmediateCode should have returned");
     382             :     return false;
     383             :   }
     384           2 :   case GIPFP_I64_Predicate_imm0_63: {
     385             :     
     386           2 :   return ((uint64_t)Imm) < 64;
     387             : 
     388             :     llvm_unreachable("ImmediateCode should have returned");
     389             :     return false;
     390             :   }
     391           0 :   case GIPFP_I64_Predicate_imm0_65535: {
     392             :     
     393           0 :   return ((uint32_t)Imm) < 65536;
     394             : 
     395             :     llvm_unreachable("ImmediateCode should have returned");
     396             :     return false;
     397             :   }
     398           0 :   case GIPFP_I64_Predicate_imm0_7: {
     399             :     
     400           0 :   return ((uint64_t)Imm) < 8;
     401             : 
     402             :     llvm_unreachable("ImmediateCode should have returned");
     403             :     return false;
     404             :   }
     405           0 :   case GIPFP_I64_Predicate_imm32_0_15: {
     406             :     
     407           0 :   return ((uint32_t)Imm) < 16;
     408             : 
     409             :     llvm_unreachable("ImmediateCode should have returned");
     410             :     return false;
     411             :   }
     412           0 :   case GIPFP_I64_Predicate_imm32_0_31: {
     413             :     
     414           0 :   return ((uint64_t)Imm) < 32;
     415             : 
     416             :     llvm_unreachable("ImmediateCode should have returned");
     417             :     return false;
     418             :   }
     419           0 :   case GIPFP_I64_Predicate_maski16_or_more: {
     420           0 :      return (Imm & 0xffff) == 0xffff; 
     421             :     llvm_unreachable("ImmediateCode should have returned");
     422             :     return false;
     423             :   }
     424           0 :   case GIPFP_I64_Predicate_maski8_or_more: {
     425           0 :      return (Imm & 0xff) == 0xff; 
     426             :     llvm_unreachable("ImmediateCode should have returned");
     427             :     return false;
     428             :   }
     429           1 :   case GIPFP_I64_Predicate_s64imm_32bit: {
     430             :     
     431             :   int64_t Imm64 = static_cast<int64_t>(Imm);
     432           1 :   return Imm64 >= std::numeric_limits<int32_t>::min() &&
     433           1 :          Imm64 <= std::numeric_limits<int32_t>::max();
     434             : 
     435             :     llvm_unreachable("ImmediateCode should have returned");
     436             :     return false;
     437             :   }
     438           0 :   case GIPFP_I64_Predicate_simm4s1: {
     439           0 :      return Imm >=-8  && Imm <= 7; 
     440             :     llvm_unreachable("ImmediateCode should have returned");
     441             :     return false;
     442             :   }
     443           0 :   case GIPFP_I64_Predicate_simm4s16: {
     444           0 :      return Imm >=-128  && Imm <= 112 && (Imm % 16) == 0x0; 
     445             :     llvm_unreachable("ImmediateCode should have returned");
     446             :     return false;
     447             :   }
     448           0 :   case GIPFP_I64_Predicate_simm4s2: {
     449           0 :      return Imm >=-16  && Imm <= 14 && (Imm % 2) == 0x0; 
     450             :     llvm_unreachable("ImmediateCode should have returned");
     451             :     return false;
     452             :   }
     453           0 :   case GIPFP_I64_Predicate_simm4s3: {
     454           0 :      return Imm >=-24  && Imm <= 21 && (Imm % 3) == 0x0; 
     455             :     llvm_unreachable("ImmediateCode should have returned");
     456             :     return false;
     457             :   }
     458           0 :   case GIPFP_I64_Predicate_simm4s4: {
     459           0 :      return Imm >=-32  && Imm <= 28 && (Imm % 4) == 0x0; 
     460             :     llvm_unreachable("ImmediateCode should have returned");
     461             :     return false;
     462             :   }
     463           0 :   case GIPFP_I64_Predicate_simm5_32b: {
     464           0 :      return Imm >= -16 && Imm < 16; 
     465             :     llvm_unreachable("ImmediateCode should have returned");
     466             :     return false;
     467             :   }
     468           0 :   case GIPFP_I64_Predicate_simm5_64b: {
     469           0 :      return Imm >= -16 && Imm < 16; 
     470             :     llvm_unreachable("ImmediateCode should have returned");
     471             :     return false;
     472             :   }
     473           0 :   case GIPFP_I64_Predicate_simm6_32b: {
     474           0 :      return Imm >= -32 && Imm < 32; 
     475             :     llvm_unreachable("ImmediateCode should have returned");
     476             :     return false;
     477             :   }
     478           0 :   case GIPFP_I64_Predicate_simm6s1: {
     479           0 :      return Imm >= -32 && Imm < 32; 
     480             :     llvm_unreachable("ImmediateCode should have returned");
     481             :     return false;
     482             :   }
     483           0 :   case GIPFP_I64_Predicate_simm8: {
     484           0 :      return Imm >= -128 && Imm < 127; 
     485             :     llvm_unreachable("ImmediateCode should have returned");
     486             :     return false;
     487             :   }
     488           0 :   case GIPFP_I64_Predicate_simm9: {
     489           0 :      return Imm >= -256 && Imm < 256; 
     490             :     llvm_unreachable("ImmediateCode should have returned");
     491             :     return false;
     492             :   }
     493           0 :   case GIPFP_I64_Predicate_sve_elm_idx_extdup_b: {
     494           0 :      return ((uint64_t)Imm) < 64; 
     495             :     llvm_unreachable("ImmediateCode should have returned");
     496             :     return false;
     497             :   }
     498           0 :   case GIPFP_I64_Predicate_sve_elm_idx_extdup_d: {
     499           0 :      return ((uint64_t)Imm) < 8; 
     500             :     llvm_unreachable("ImmediateCode should have returned");
     501             :     return false;
     502             :   }
     503           0 :   case GIPFP_I64_Predicate_sve_elm_idx_extdup_h: {
     504           0 :      return ((uint64_t)Imm) < 32; 
     505             :     llvm_unreachable("ImmediateCode should have returned");
     506             :     return false;
     507             :   }
     508           0 :   case GIPFP_I64_Predicate_sve_elm_idx_extdup_q: {
     509           0 :      return ((uint64_t)Imm) < 4; 
     510             :     llvm_unreachable("ImmediateCode should have returned");
     511             :     return false;
     512             :   }
     513           0 :   case GIPFP_I64_Predicate_sve_elm_idx_extdup_s: {
     514           0 :      return ((uint64_t)Imm) < 16; 
     515             :     llvm_unreachable("ImmediateCode should have returned");
     516             :     return false;
     517             :   }
     518           0 :   case GIPFP_I64_Predicate_sve_incdec_imm: {
     519             :     
     520           0 :   return (((uint32_t)Imm) > 0) && (((uint32_t)Imm) < 17);
     521             : 
     522             :     llvm_unreachable("ImmediateCode should have returned");
     523             :     return false;
     524             :   }
     525           0 :   case GIPFP_I64_Predicate_sve_pred_enum: {
     526             :     
     527           0 :   return (((uint32_t)Imm) < 32);
     528             :   
     529             :     llvm_unreachable("ImmediateCode should have returned");
     530             :     return false;
     531             :   }
     532           0 :   case GIPFP_I64_Predicate_sve_prfop: {
     533             :     
     534           0 :     return (((uint32_t)Imm) <= 15);
     535             :   
     536             :     llvm_unreachable("ImmediateCode should have returned");
     537             :     return false;
     538             :   }
     539           0 :   case GIPFP_I64_Predicate_tbz_imm0_31_diag: {
     540             :     
     541           0 :   return (((uint32_t)Imm) < 32);
     542             : 
     543             :     llvm_unreachable("ImmediateCode should have returned");
     544             :     return false;
     545             :   }
     546           0 :   case GIPFP_I64_Predicate_tbz_imm0_31_nodiag: {
     547             :     
     548           0 :   return (((uint32_t)Imm) < 32);
     549             : 
     550             :     llvm_unreachable("ImmediateCode should have returned");
     551             :     return false;
     552             :   }
     553           0 :   case GIPFP_I64_Predicate_tbz_imm32_63: {
     554             :     
     555           0 :   return (((uint32_t)Imm) > 31) && (((uint32_t)Imm) < 64);
     556             : 
     557             :     llvm_unreachable("ImmediateCode should have returned");
     558             :     return false;
     559             :   }
     560           0 :   case GIPFP_I64_Predicate_uimm5s2: {
     561           0 :      return Imm >= 0 && Imm < (32*2) && ((Imm % 2) == 0); 
     562             :     llvm_unreachable("ImmediateCode should have returned");
     563             :     return false;
     564             :   }
     565           0 :   case GIPFP_I64_Predicate_uimm5s4: {
     566           0 :      return Imm >= 0 && Imm < (32*4) && ((Imm % 4) == 0); 
     567             :     llvm_unreachable("ImmediateCode should have returned");
     568             :     return false;
     569             :   }
     570           0 :   case GIPFP_I64_Predicate_uimm5s8: {
     571           0 :      return Imm >= 0 && Imm < (32*8) && ((Imm % 8) == 0); 
     572             :     llvm_unreachable("ImmediateCode should have returned");
     573             :     return false;
     574             :   }
     575           0 :   case GIPFP_I64_Predicate_uimm6: {
     576           0 :      return Imm >= 0 && Imm < 64; 
     577             :     llvm_unreachable("ImmediateCode should have returned");
     578             :     return false;
     579             :   }
     580           0 :   case GIPFP_I64_Predicate_uimm6s1: {
     581           0 :      return Imm >= 0 && Imm < 64; 
     582             :     llvm_unreachable("ImmediateCode should have returned");
     583             :     return false;
     584             :   }
     585           0 :   case GIPFP_I64_Predicate_uimm6s16: {
     586           0 :      return Imm >= 0 && Imm < (64*16) && ((Imm % 16) == 0); 
     587             :     llvm_unreachable("ImmediateCode should have returned");
     588             :     return false;
     589             :   }
     590           0 :   case GIPFP_I64_Predicate_uimm6s2: {
     591           0 :      return Imm >= 0 && Imm < (64*2) && ((Imm % 2) == 0); 
     592             :     llvm_unreachable("ImmediateCode should have returned");
     593             :     return false;
     594             :   }
     595           0 :   case GIPFP_I64_Predicate_uimm6s4: {
     596           0 :      return Imm >= 0 && Imm < (64*4) && ((Imm % 4) == 0); 
     597             :     llvm_unreachable("ImmediateCode should have returned");
     598             :     return false;
     599             :   }
     600           0 :   case GIPFP_I64_Predicate_uimm6s8: {
     601           0 :      return Imm >= 0 && Imm < (64*8) && ((Imm % 8) == 0); 
     602             :     llvm_unreachable("ImmediateCode should have returned");
     603             :     return false;
     604             :   }
     605           0 :   case GIPFP_I64_Predicate_vecshiftL16: {
     606             :     
     607           0 :   return (((uint32_t)Imm) < 16);
     608             : 
     609             :     llvm_unreachable("ImmediateCode should have returned");
     610             :     return false;
     611             :   }
     612           0 :   case GIPFP_I64_Predicate_vecshiftL32: {
     613             :     
     614           0 :   return (((uint32_t)Imm) < 32);
     615             : 
     616             :     llvm_unreachable("ImmediateCode should have returned");
     617             :     return false;
     618             :   }
     619           0 :   case GIPFP_I64_Predicate_vecshiftL64: {
     620             :     
     621           0 :   return (((uint32_t)Imm) < 64);
     622             : 
     623             :     llvm_unreachable("ImmediateCode should have returned");
     624             :     return false;
     625             :   }
     626           0 :   case GIPFP_I64_Predicate_vecshiftL8: {
     627             :     
     628           0 :   return (((uint32_t)Imm) < 8);
     629             : 
     630             :     llvm_unreachable("ImmediateCode should have returned");
     631             :     return false;
     632             :   }
     633           0 :   case GIPFP_I64_Predicate_vecshiftR16: {
     634             :     
     635           0 :   return (((uint32_t)Imm) > 0) && (((uint32_t)Imm) < 17);
     636             : 
     637             :     llvm_unreachable("ImmediateCode should have returned");
     638             :     return false;
     639             :   }
     640           0 :   case GIPFP_I64_Predicate_vecshiftR16Narrow: {
     641             :     
     642           0 :   return (((uint32_t)Imm) > 0) && (((uint32_t)Imm) < 9);
     643             : 
     644             :     llvm_unreachable("ImmediateCode should have returned");
     645             :     return false;
     646             :   }
     647           0 :   case GIPFP_I64_Predicate_vecshiftR32: {
     648             :     
     649           0 :   return (((uint32_t)Imm) > 0) && (((uint32_t)Imm) < 33);
     650             : 
     651             :     llvm_unreachable("ImmediateCode should have returned");
     652             :     return false;
     653             :   }
     654           0 :   case GIPFP_I64_Predicate_vecshiftR32Narrow: {
     655             :     
     656           0 :   return (((uint32_t)Imm) > 0) && (((uint32_t)Imm) < 17);
     657             : 
     658             :     llvm_unreachable("ImmediateCode should have returned");
     659             :     return false;
     660             :   }
     661           1 :   case GIPFP_I64_Predicate_vecshiftR64: {
     662             :     
     663           1 :   return (((uint32_t)Imm) > 0) && (((uint32_t)Imm) < 65);
     664             : 
     665             :     llvm_unreachable("ImmediateCode should have returned");
     666             :     return false;
     667             :   }
     668           0 :   case GIPFP_I64_Predicate_vecshiftR64Narrow: {
     669             :     
     670           0 :   return (((uint32_t)Imm) > 0) && (((uint32_t)Imm) < 33);
     671             : 
     672             :     llvm_unreachable("ImmediateCode should have returned");
     673             :     return false;
     674             :   }
     675           0 :   case GIPFP_I64_Predicate_vecshiftR8: {
     676             :     
     677           0 :   return (((uint32_t)Imm) > 0) && (((uint32_t)Imm) < 9);
     678             : 
     679             :     llvm_unreachable("ImmediateCode should have returned");
     680             :     return false;
     681             :   }
     682             :   }
     683           0 :   llvm_unreachable("Unknown predicate");
     684             :   return false;
     685             : }
     686             : // PatFrag predicates.
     687             : enum {
     688             :   GIPFP_APFloat_Predicate_fpimm0 = GIPFP_APFloat_Invalid + 1,
     689             :   GIPFP_APFloat_Predicate_fpimm16,
     690             :   GIPFP_APFloat_Predicate_fpimm32,
     691             :   GIPFP_APFloat_Predicate_fpimm64,
     692             :   GIPFP_APFloat_Predicate_simdimmtype10,
     693             : };
     694          30 : bool AArch64InstructionSelector::testImmPredicate_APFloat(unsigned PredicateID, const APFloat & Imm) const {
     695          30 :   switch (PredicateID) {
     696          30 :   case GIPFP_APFloat_Predicate_fpimm0: {
     697             :     
     698          30 :   return Imm.isExactlyValue(+0.0);
     699             : 
     700             :     llvm_unreachable("ImmediateCode should have returned");
     701             :     return false;
     702             :   }
     703           0 :   case GIPFP_APFloat_Predicate_fpimm16: {
     704             :     
     705           0 :       return AArch64_AM::getFP16Imm(Imm) != -1;
     706             :     
     707             :     llvm_unreachable("ImmediateCode should have returned");
     708             :     return false;
     709             :   }
     710           0 :   case GIPFP_APFloat_Predicate_fpimm32: {
     711             :     
     712           0 :       return AArch64_AM::getFP32Imm(Imm) != -1;
     713             :     
     714             :     llvm_unreachable("ImmediateCode should have returned");
     715             :     return false;
     716             :   }
     717           0 :   case GIPFP_APFloat_Predicate_fpimm64: {
     718             :     
     719           0 :       return AArch64_AM::getFP64Imm(Imm) != -1;
     720             :     
     721             :     llvm_unreachable("ImmediateCode should have returned");
     722             :     return false;
     723             :   }
     724           0 :   case GIPFP_APFloat_Predicate_simdimmtype10: {
     725             :     
     726           0 :       return AArch64_AM::isAdvSIMDModImmType10(
     727           0 :                  Imm.bitcastToAPInt().getZExtValue());
     728             :     
     729             :     llvm_unreachable("ImmediateCode should have returned");
     730             :     return false;
     731             :   }
     732             :   }
     733           0 :   llvm_unreachable("Unknown predicate");
     734             :   return false;
     735             : }
     736             : // PatFrag predicates.
     737             : enum {
     738             :   GIPFP_APInt_Predicate_logical_imm32 = GIPFP_APInt_Invalid + 1,
     739             :   GIPFP_APInt_Predicate_logical_imm64,
     740             : };
     741           0 : bool AArch64InstructionSelector::testImmPredicate_APInt(unsigned PredicateID, const APInt & Imm) const {
     742           0 :   switch (PredicateID) {
     743             :   case GIPFP_APInt_Predicate_logical_imm32: {
     744             :     
     745           0 :   return AArch64_AM::isLogicalImmediate(Imm.getZExtValue(), 32);
     746             : 
     747             :     llvm_unreachable("ImmediateCode should have returned");
     748             :     return false;
     749             :   }
     750             :   case GIPFP_APInt_Predicate_logical_imm64: {
     751             :     
     752           0 :   return AArch64_AM::isLogicalImmediate(Imm.getZExtValue(), 64);
     753             : 
     754             :     llvm_unreachable("ImmediateCode should have returned");
     755             :     return false;
     756             :   }
     757             :   }
     758           0 :   llvm_unreachable("Unknown predicate");
     759             :   return false;
     760             : }
     761           0 : bool AArch64InstructionSelector::testMIPredicate_MI(unsigned PredicateID, const MachineInstr & MI) const {
     762             :   const MachineFunction &MF = *MI.getParent()->getParent();
     763             :   const MachineRegisterInfo &MRI = MF.getRegInfo();
     764             :   (void)MRI;
     765           0 :   llvm_unreachable("Unknown predicate");
     766             :   return false;
     767             : }
     768             : 
     769             : AArch64InstructionSelector::ComplexMatcherMemFn
     770             : AArch64InstructionSelector::ComplexPredicateFns[] = {
     771             :   nullptr, // GICP_Invalid
     772             :   &AArch64InstructionSelector::selectArithImmed, // gi_addsub_shifted_imm32
     773             :   &AArch64InstructionSelector::selectArithImmed, // gi_addsub_shifted_imm64
     774             :   &AArch64InstructionSelector::selectAddrModeIndexed<128>, // gi_am_indexed128
     775             :   &AArch64InstructionSelector::selectAddrModeIndexed<16>, // gi_am_indexed16
     776             :   &AArch64InstructionSelector::selectAddrModeIndexed<32>, // gi_am_indexed32
     777             :   &AArch64InstructionSelector::selectAddrModeIndexed<64>, // gi_am_indexed64
     778             :   &AArch64InstructionSelector::selectAddrModeIndexed<8>, // gi_am_indexed8
     779             :   &AArch64InstructionSelector::selectAddrModeUnscaled128, // gi_am_unscaled128
     780             :   &AArch64InstructionSelector::selectAddrModeUnscaled16, // gi_am_unscaled16
     781             :   &AArch64InstructionSelector::selectAddrModeUnscaled32, // gi_am_unscaled32
     782             :   &AArch64InstructionSelector::selectAddrModeUnscaled64, // gi_am_unscaled64
     783             :   &AArch64InstructionSelector::selectAddrModeUnscaled8, // gi_am_unscaled8
     784             : };
     785             : 
     786             : // Custom renderers.
     787             : enum {
     788             :   GICR_Invalid,
     789             :   GICR_renderTruncImm, 
     790             : };
     791             : AArch64InstructionSelector::CustomRendererFn
     792             : AArch64InstructionSelector::CustomRenderers[] = {
     793             :   nullptr, // GICP_Invalid
     794             :   &AArch64InstructionSelector::renderTruncImm, // gi_trunc_imm
     795             : };
     796             : 
     797        1082 : bool AArch64InstructionSelector::selectImpl(MachineInstr &I, CodeGenCoverage &CoverageInfo) const {
     798        1082 :   MachineFunction &MF = *I.getParent()->getParent();
     799        1082 :   MachineRegisterInfo &MRI = MF.getRegInfo();
     800             :   // FIXME: This should be computed on a per-function basis rather than per-insn.
     801        1082 :   AvailableFunctionFeatures = computeAvailableFunctionFeatures(&STI, &MF);
     802        1082 :   const PredicateBitset AvailableFeatures = getAvailableFeatures();
     803             :   NewMIVector OutMIs;
     804             :   State.MIs.clear();
     805        1082 :   State.MIs.push_back(&I);
     806             : 
     807        1082 :   if (executeMatchTable(*this, OutMIs, State, ISelInfo, getMatchTable(), TII, MRI, TRI, RBI, AvailableFeatures, CoverageInfo)) {
     808         691 :     return true;
     809             :   }
     810             : 
     811             :   return false;
     812             : }
     813             : 
     814           0 : const int64_t *AArch64InstructionSelector::getMatchTable() const {
     815             :   constexpr static int64_t MatchTable0[] = {
     816             :     GIM_SwitchOpcode, /*MI*/0, /*[*/34, 135, /*)*//*default:*//*Label 52*/ 78305,
     817             :     /*TargetOpcode::G_ADD*//*Label 0*/ 106,
     818             :     /*TargetOpcode::G_SUB*//*Label 1*/ 7381,
     819             :     /*TargetOpcode::G_MUL*//*Label 2*/ 9962,
     820             :     /*TargetOpcode::G_SDIV*//*Label 3*/ 10743,
     821             :     /*TargetOpcode::G_UDIV*//*Label 4*/ 10812, 0, 0,
     822             :     /*TargetOpcode::G_AND*//*Label 5*/ 10881,
     823             :     /*TargetOpcode::G_OR*//*Label 6*/ 11423,
     824             :     /*TargetOpcode::G_XOR*//*Label 7*/ 11965, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
     825             :     /*TargetOpcode::G_BITCAST*//*Label 8*/ 12675, 0, 0,
     826             :     /*TargetOpcode::G_LOAD*//*Label 9*/ 20168,
     827             :     /*TargetOpcode::G_SEXTLOAD*//*Label 10*/ 22224,
     828             :     /*TargetOpcode::G_ZEXTLOAD*//*Label 11*/ 22695,
     829             :     /*TargetOpcode::G_STORE*//*Label 12*/ 23047, 0,
     830             :     /*TargetOpcode::G_ATOMIC_CMPXCHG*//*Label 13*/ 24946,
     831             :     /*TargetOpcode::G_ATOMICRMW_XCHG*//*Label 14*/ 26143,
     832             :     /*TargetOpcode::G_ATOMICRMW_ADD*//*Label 15*/ 27172,
     833             :     /*TargetOpcode::G_ATOMICRMW_SUB*//*Label 16*/ 28201,
     834             :     /*TargetOpcode::G_ATOMICRMW_AND*//*Label 17*/ 29610, 0,
     835             :     /*TargetOpcode::G_ATOMICRMW_OR*//*Label 18*/ 31019,
     836             :     /*TargetOpcode::G_ATOMICRMW_XOR*//*Label 19*/ 32048,
     837             :     /*TargetOpcode::G_ATOMICRMW_MAX*//*Label 20*/ 33077,
     838             :     /*TargetOpcode::G_ATOMICRMW_MIN*//*Label 21*/ 34106,
     839             :     /*TargetOpcode::G_ATOMICRMW_UMAX*//*Label 22*/ 35135,
     840             :     /*TargetOpcode::G_ATOMICRMW_UMIN*//*Label 23*/ 36164, 0, 0,
     841             :     /*TargetOpcode::G_INTRINSIC*//*Label 24*/ 37193,
     842             :     /*TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS*//*Label 25*/ 71124,
     843             :     /*TargetOpcode::G_ANYEXT*//*Label 26*/ 71304,
     844             :     /*TargetOpcode::G_TRUNC*//*Label 27*/ 71418,
     845             :     /*TargetOpcode::G_CONSTANT*//*Label 28*/ 71543,
     846             :     /*TargetOpcode::G_FCONSTANT*//*Label 29*/ 71596, 0, 0,
     847             :     /*TargetOpcode::G_SEXT*//*Label 30*/ 71674,
     848             :     /*TargetOpcode::G_ZEXT*//*Label 31*/ 71788,
     849             :     /*TargetOpcode::G_SHL*//*Label 32*/ 72247,
     850             :     /*TargetOpcode::G_LSHR*//*Label 33*/ 72423,
     851             :     /*TargetOpcode::G_ASHR*//*Label 34*/ 72674, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
     852             :     /*TargetOpcode::G_FADD*//*Label 35*/ 72925,
     853             :     /*TargetOpcode::G_FSUB*//*Label 36*/ 73198,
     854             :     /*TargetOpcode::G_FMUL*//*Label 37*/ 73471,
     855             :     /*TargetOpcode::G_FMA*//*Label 38*/ 73744,
     856             :     /*TargetOpcode::G_FDIV*//*Label 39*/ 75268, 0, 0, 0, 0, 0, 0,
     857             :     /*TargetOpcode::G_FNEG*//*Label 40*/ 75541,
     858             :     /*TargetOpcode::G_FPEXT*//*Label 41*/ 76089,
     859             :     /*TargetOpcode::G_FPTRUNC*//*Label 42*/ 76218,
     860             :     /*TargetOpcode::G_FPTOSI*//*Label 43*/ 76347,
     861             :     /*TargetOpcode::G_FPTOUI*//*Label 44*/ 76623,
     862             :     /*TargetOpcode::G_SITOFP*//*Label 45*/ 76899,
     863             :     /*TargetOpcode::G_UITOFP*//*Label 46*/ 77177, 0, 0, 0,
     864             :     /*TargetOpcode::G_BR*//*Label 47*/ 77455, 0, 0, 0,
     865             :     /*TargetOpcode::G_CTTZ*//*Label 48*/ 77468, 0,
     866             :     /*TargetOpcode::G_CTLZ*//*Label 49*/ 77571, 0,
     867             :     /*TargetOpcode::G_CTPOP*//*Label 50*/ 78194,
     868             :     /*TargetOpcode::G_BSWAP*//*Label 51*/ 78252,
     869             :     // Label 0: @106
     870             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 11, /*)*//*default:*//*Label 62*/ 7380,
     871             :     /*GILLT_s32*//*Label 53*/ 122,
     872             :     /*GILLT_s64*//*Label 54*/ 223, 0,
     873             :     /*GILLT_v2s32*//*Label 55*/ 1295,
     874             :     /*GILLT_v2s64*//*Label 56*/ 1908,
     875             :     /*GILLT_v4s16*//*Label 57*/ 3011,
     876             :     /*GILLT_v4s32*//*Label 58*/ 3624,
     877             :     /*GILLT_v8s8*//*Label 59*/ 5097,
     878             :     /*GILLT_v8s16*//*Label 60*/ 5502,
     879             :     /*GILLT_v16s8*//*Label 61*/ 6975,
     880             :     // Label 53: @122
     881             :     GIM_Try, /*On fail goto*//*Label 63*/ 222,
     882             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
     883             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
     884             :       GIM_Try, /*On fail goto*//*Label 64*/ 166, // Rule ID 3788 //
     885             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32spRegClassID,
     886             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32spRegClassID,
     887             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_addsub_shifted_imm32,
     888             :         // (add:{ *:[i32] } addsub_shifted_imm32:{ *:[i32] }:$imm, GPR32sp:{ *:[i32] }:$Rn)  =>  (ADDWri:{ *:[i32] } GPR32sp:{ *:[i32] }:$Rn, addsub_shifted_imm32:{ *:[i32] }:$imm)
     889             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ADDWri,
     890             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
     891             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
     892             :         GIR_ComplexRenderer, /*InsnID*/0, /*RendererID*/0, // imm
     893             :         GIR_EraseFromParent, /*InsnID*/0,
     894             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     895             :         // GIR_Coverage, 3788,
     896             :         GIR_Done,
     897             :       // Label 64: @166
     898             :       GIM_Try, /*On fail goto*//*Label 65*/ 200, // Rule ID 33 //
     899             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32spRegClassID,
     900             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32spRegClassID,
     901             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/2, /*Renderer*/0, GICP_gi_addsub_shifted_imm32,
     902             :         // (add:{ *:[i32] } GPR32sp:{ *:[i32] }:$Rn, addsub_shifted_imm32:{ *:[i32] }:$imm)  =>  (ADDWri:{ *:[i32] } GPR32sp:{ *:[i32] }:$Rn, addsub_shifted_imm32:{ *:[i32] }:$imm)
     903             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ADDWri,
     904             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
     905             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
     906             :         GIR_ComplexRenderer, /*InsnID*/0, /*RendererID*/0, // imm
     907             :         GIR_EraseFromParent, /*InsnID*/0,
     908             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     909             :         // GIR_Coverage, 33,
     910             :         GIR_Done,
     911             :       // Label 65: @200
     912             :       GIM_Try, /*On fail goto*//*Label 66*/ 221, // Rule ID 35 //
     913             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
     914             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
     915             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
     916             :         // (add:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)  =>  (ADDWrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
     917             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ADDWrr,
     918             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     919             :         // GIR_Coverage, 35,
     920             :         GIR_Done,
     921             :       // Label 66: @221
     922             :       GIM_Reject,
     923             :     // Label 63: @222
     924             :     GIM_Reject,
     925             :     // Label 54: @223
     926             :     GIM_Try, /*On fail goto*//*Label 67*/ 1294,
     927             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
     928             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
     929             :       GIM_Try, /*On fail goto*//*Label 68*/ 267, // Rule ID 3789 //
     930             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64spRegClassID,
     931             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64spRegClassID,
     932             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_addsub_shifted_imm64,
     933             :         // (add:{ *:[i64] } addsub_shifted_imm64:{ *:[i64] }:$imm, GPR64sp:{ *:[i64] }:$Rn)  =>  (ADDXri:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, addsub_shifted_imm64:{ *:[i64] }:$imm)
     934             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ADDXri,
     935             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
     936             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
     937             :         GIR_ComplexRenderer, /*InsnID*/0, /*RendererID*/0, // imm
     938             :         GIR_EraseFromParent, /*InsnID*/0,
     939             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     940             :         // GIR_Coverage, 3789,
     941             :         GIR_Done,
     942             :       // Label 68: @267
     943             :       GIM_Try, /*On fail goto*//*Label 69*/ 363, // Rule ID 1893 //
     944             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
     945             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
     946             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
     947             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
     948             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
     949             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
     950             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
     951             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
     952             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
     953             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
     954             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_CONSTANT,
     955             :         GIM_CheckI64ImmPredicate, /*MI*/3, /*Predicate*/GIPFP_I64_Predicate_s64imm_32bit,
     956             :         // MIs[3] Operand 1
     957             :         // No operand predicates
     958             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
     959             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
     960             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
     961             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
     962             :         // (add:{ *:[i64] } (mul:{ *:[i64] } (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (imm:{ *:[i64] })<<P:Predicate_s64imm_32bit>>:$C), GPR64:{ *:[i64] }:$Ra)  =>  (SMADDLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, (MOVi32imm:{ *:[i32] } (trunc_imm:{ *:[i32] } (imm:{ *:[i64] }):$C)), GPR64:{ *:[i64] }:$Ra)
     963             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
     964             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::MOVi32imm,
     965             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
     966             :         GIR_CustomRenderer, /*InsnID*/1, /*OldInsnID*/3, /*Renderer*/GICR_renderTruncImm, // C
     967             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
     968             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMADDLrrr,
     969             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
     970             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
     971             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
     972             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Ra
     973             :         GIR_EraseFromParent, /*InsnID*/0,
     974             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     975             :         // GIR_Coverage, 1893,
     976             :         GIR_Done,
     977             :       // Label 69: @363
     978             :       GIM_Try, /*On fail goto*//*Label 70*/ 459, // Rule ID 1894 //
     979             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
     980             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
     981             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
     982             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
     983             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
     984             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
     985             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
     986             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
     987             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
     988             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
     989             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_CONSTANT,
     990             :         GIM_CheckI64ImmPredicate, /*MI*/3, /*Predicate*/GIPFP_I64_Predicate_i64imm_32bit,
     991             :         // MIs[3] Operand 1
     992             :         // No operand predicates
     993             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
     994             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
     995             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
     996             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
     997             :         // (add:{ *:[i64] } (mul:{ *:[i64] } (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (imm:{ *:[i64] })<<P:Predicate_i64imm_32bit>>:$C), GPR64:{ *:[i64] }:$Ra)  =>  (UMADDLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, (MOVi32imm:{ *:[i32] } (trunc_imm:{ *:[i32] } (imm:{ *:[i64] }):$C)), GPR64:{ *:[i64] }:$Ra)
     998             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
     999             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::MOVi32imm,
    1000             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    1001             :         GIR_CustomRenderer, /*InsnID*/1, /*OldInsnID*/3, /*Renderer*/GICR_renderTruncImm, // C
    1002             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    1003             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMADDLrrr,
    1004             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1005             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    1006             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    1007             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Ra
    1008             :         GIR_EraseFromParent, /*InsnID*/0,
    1009             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1010             :         // GIR_Coverage, 1894,
    1011             :         GIR_Done,
    1012             :       // Label 70: @459
    1013             :       GIM_Try, /*On fail goto*//*Label 71*/ 493, // Rule ID 34 //
    1014             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64spRegClassID,
    1015             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
    1016             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/2, /*Renderer*/0, GICP_gi_addsub_shifted_imm64,
    1017             :         // (add:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, addsub_shifted_imm64:{ *:[i64] }:$imm)  =>  (ADDXri:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, addsub_shifted_imm64:{ *:[i64] }:$imm)
    1018             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ADDXri,
    1019             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1020             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    1021             :         GIR_ComplexRenderer, /*InsnID*/0, /*RendererID*/0, // imm
    1022             :         GIR_EraseFromParent, /*InsnID*/0,
    1023             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1024             :         // GIR_Coverage, 34,
    1025             :         GIR_Done,
    1026             :       // Label 71: @493
    1027             :       GIM_Try, /*On fail goto*//*Label 72*/ 589, // Rule ID 4040 //
    1028             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    1029             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    1030             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1031             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    1032             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    1033             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    1034             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    1035             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
    1036             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    1037             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    1038             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
    1039             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_CONSTANT,
    1040             :         GIM_CheckI64ImmPredicate, /*MI*/3, /*Predicate*/GIPFP_I64_Predicate_s64imm_32bit,
    1041             :         // MIs[3] Operand 1
    1042             :         // No operand predicates
    1043             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1044             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    1045             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
    1046             :         // (add:{ *:[i64] } GPR64:{ *:[i64] }:$Ra, (mul:{ *:[i64] } (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (imm:{ *:[i64] })<<P:Predicate_s64imm_32bit>>:$C))  =>  (SMADDLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, (MOVi32imm:{ *:[i32] } (trunc_imm:{ *:[i32] } (imm:{ *:[i64] }):$C)), GPR64:{ *:[i64] }:$Ra)
    1047             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
    1048             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::MOVi32imm,
    1049             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    1050             :         GIR_CustomRenderer, /*InsnID*/1, /*OldInsnID*/3, /*Renderer*/GICR_renderTruncImm, // C
    1051             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    1052             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMADDLrrr,
    1053             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1054             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    1055             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    1056             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Ra
    1057             :         GIR_EraseFromParent, /*InsnID*/0,
    1058             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1059             :         // GIR_Coverage, 4040,
    1060             :         GIR_Done,
    1061             :       // Label 72: @589
    1062             :       GIM_Try, /*On fail goto*//*Label 73*/ 685, // Rule ID 4041 //
    1063             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    1064             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    1065             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1066             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    1067             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    1068             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    1069             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    1070             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
    1071             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    1072             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    1073             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
    1074             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_CONSTANT,
    1075             :         GIM_CheckI64ImmPredicate, /*MI*/3, /*Predicate*/GIPFP_I64_Predicate_i64imm_32bit,
    1076             :         // MIs[3] Operand 1
    1077             :         // No operand predicates
    1078             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1079             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    1080             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
    1081             :         // (add:{ *:[i64] } GPR64:{ *:[i64] }:$Ra, (mul:{ *:[i64] } (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (imm:{ *:[i64] })<<P:Predicate_i64imm_32bit>>:$C))  =>  (UMADDLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, (MOVi32imm:{ *:[i32] } (trunc_imm:{ *:[i32] } (imm:{ *:[i64] }):$C)), GPR64:{ *:[i64] }:$Ra)
    1082             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
    1083             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::MOVi32imm,
    1084             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    1085             :         GIR_CustomRenderer, /*InsnID*/1, /*OldInsnID*/3, /*Renderer*/GICR_renderTruncImm, // C
    1086             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    1087             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMADDLrrr,
    1088             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1089             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    1090             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    1091             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Ra
    1092             :         GIR_EraseFromParent, /*InsnID*/0,
    1093             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1094             :         // GIR_Coverage, 4041,
    1095             :         GIR_Done,
    1096             :       // Label 73: @685
    1097             :       GIM_Try, /*On fail goto*//*Label 74*/ 770, // Rule ID 3800 //
    1098             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    1099             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1100             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    1101             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    1102             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    1103             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    1104             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
    1105             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    1106             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    1107             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
    1108             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_SEXT,
    1109             :         GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_s32,
    1110             :         GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    1111             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    1112             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1113             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    1114             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
    1115             :         // (add:{ *:[i64] } (mul:{ *:[i64] } (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rm)), GPR64:{ *:[i64] }:$Ra)  =>  (SMADDLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm, GPR64:{ *:[i64] }:$Ra)
    1116             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMADDLrrr,
    1117             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1118             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    1119             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // Rm
    1120             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Ra
    1121             :         GIR_EraseFromParent, /*InsnID*/0,
    1122             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1123             :         // GIR_Coverage, 3800,
    1124             :         GIR_Done,
    1125             :       // Label 74: @770
    1126             :       GIM_Try, /*On fail goto*//*Label 75*/ 855, // Rule ID 3801 //
    1127             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    1128             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1129             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    1130             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    1131             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    1132             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    1133             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
    1134             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    1135             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    1136             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
    1137             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_ZEXT,
    1138             :         GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_s32,
    1139             :         GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    1140             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    1141             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1142             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    1143             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
    1144             :         // (add:{ *:[i64] } (mul:{ *:[i64] } (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rm)), GPR64:{ *:[i64] }:$Ra)  =>  (UMADDLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm, GPR64:{ *:[i64] }:$Ra)
    1145             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMADDLrrr,
    1146             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1147             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    1148             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // Rm
    1149             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Ra
    1150             :         GIR_EraseFromParent, /*InsnID*/0,
    1151             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1152             :         // GIR_Coverage, 3801,
    1153             :         GIR_Done,
    1154             :       // Label 75: @855
    1155             :       GIM_Try, /*On fail goto*//*Label 76*/ 940, // Rule ID 65 //
    1156             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    1157             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    1158             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1159             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    1160             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    1161             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    1162             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    1163             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
    1164             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    1165             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    1166             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
    1167             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_SEXT,
    1168             :         GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_s32,
    1169             :         GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    1170             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1171             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    1172             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
    1173             :         // (add:{ *:[i64] } GPR64:{ *:[i64] }:$Ra, (mul:{ *:[i64] } (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rm)))  =>  (SMADDLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm, GPR64:{ *:[i64] }:$Ra)
    1174             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMADDLrrr,
    1175             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1176             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    1177             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // Rm
    1178             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Ra
    1179             :         GIR_EraseFromParent, /*InsnID*/0,
    1180             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1181             :         // GIR_Coverage, 65,
    1182             :         GIR_Done,
    1183             :       // Label 76: @940
    1184             :       GIM_Try, /*On fail goto*//*Label 77*/ 1025, // Rule ID 67 //
    1185             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    1186             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    1187             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1188             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    1189             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    1190             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    1191             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    1192             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
    1193             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    1194             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    1195             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
    1196             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_ZEXT,
    1197             :         GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_s32,
    1198             :         GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    1199             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1200             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    1201             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
    1202             :         // (add:{ *:[i64] } GPR64:{ *:[i64] }:$Ra, (mul:{ *:[i64] } (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rm)))  =>  (UMADDLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm, GPR64:{ *:[i64] }:$Ra)
    1203             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMADDLrrr,
    1204             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1205             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    1206             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // Rm
    1207             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Ra
    1208             :         GIR_EraseFromParent, /*InsnID*/0,
    1209             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1210             :         // GIR_Coverage, 67,
    1211             :         GIR_Done,
    1212             :       // Label 77: @1025
    1213             :       GIM_Try, /*On fail goto*//*Label 78*/ 1081, // Rule ID 3854 //
    1214             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1215             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    1216             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1217             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1218             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    1219             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_saddlp,
    1220             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    1221             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1222             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1223             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1224             :         // (add:{ *:[v1i64] } (intrinsic_wo_chain:{ *:[v1i64] } 273:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn), V64:{ *:[v1i64] }:$Rd)  =>  (SADALPv2i32_v1i64:{ *:[v1i64] } V64:{ *:[v1i64] }:$Rd, V64:{ *:[v2i32] }:$Rn)
    1225             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADALPv2i32_v1i64,
    1226             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1227             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1228             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1229             :         GIR_EraseFromParent, /*InsnID*/0,
    1230             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1231             :         // GIR_Coverage, 3854,
    1232             :         GIR_Done,
    1233             :       // Label 78: @1081
    1234             :       GIM_Try, /*On fail goto*//*Label 79*/ 1137, // Rule ID 3860 //
    1235             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1236             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    1237             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1238             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1239             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    1240             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uaddlp,
    1241             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    1242             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1243             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1244             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1245             :         // (add:{ *:[v1i64] } (intrinsic_wo_chain:{ *:[v1i64] } 331:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn), V64:{ *:[v1i64] }:$Rd)  =>  (UADALPv2i32_v1i64:{ *:[v1i64] } V64:{ *:[v1i64] }:$Rd, V64:{ *:[v2i32] }:$Rn)
    1246             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADALPv2i32_v1i64,
    1247             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1248             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1249             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1250             :         GIR_EraseFromParent, /*InsnID*/0,
    1251             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1252             :         // GIR_Coverage, 3860,
    1253             :         GIR_Done,
    1254             :       // Label 79: @1137
    1255             :       GIM_Try, /*On fail goto*//*Label 80*/ 1193, // Rule ID 694 //
    1256             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1257             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    1258             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1259             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1260             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1261             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    1262             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_saddlp,
    1263             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    1264             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1265             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1266             :         // (add:{ *:[v1i64] } V64:{ *:[v1i64] }:$Rd, (intrinsic_wo_chain:{ *:[v1i64] } 273:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn))  =>  (SADALPv2i32_v1i64:{ *:[v1i64] } V64:{ *:[v1i64] }:$Rd, V64:{ *:[v2i32] }:$Rn)
    1267             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADALPv2i32_v1i64,
    1268             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1269             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    1270             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1271             :         GIR_EraseFromParent, /*InsnID*/0,
    1272             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1273             :         // GIR_Coverage, 694,
    1274             :         GIR_Done,
    1275             :       // Label 80: @1193
    1276             :       GIM_Try, /*On fail goto*//*Label 81*/ 1249, // Rule ID 738 //
    1277             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1278             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    1279             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1280             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1281             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1282             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    1283             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uaddlp,
    1284             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    1285             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1286             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1287             :         // (add:{ *:[v1i64] } V64:{ *:[v1i64] }:$Rd, (intrinsic_wo_chain:{ *:[v1i64] } 331:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn))  =>  (UADALPv2i32_v1i64:{ *:[v1i64] } V64:{ *:[v1i64] }:$Rd, V64:{ *:[v2i32] }:$Rn)
    1288             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADALPv2i32_v1i64,
    1289             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1290             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    1291             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1292             :         GIR_EraseFromParent, /*InsnID*/0,
    1293             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1294             :         // GIR_Coverage, 738,
    1295             :         GIR_Done,
    1296             :       // Label 81: @1249
    1297             :       GIM_Try, /*On fail goto*//*Label 82*/ 1270, // Rule ID 36 //
    1298             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    1299             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    1300             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    1301             :         // (add:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)  =>  (ADDXrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
    1302             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ADDXrr,
    1303             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1304             :         // GIR_Coverage, 36,
    1305             :         GIR_Done,
    1306             :       // Label 82: @1270
    1307             :       GIM_Try, /*On fail goto*//*Label 83*/ 1293, // Rule ID 1193 //
    1308             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1309             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    1310             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1311             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1312             :         // (add:{ *:[v1i64] } FPR64:{ *:[v1i64] }:$Rn, FPR64:{ *:[v1i64] }:$Rm)  =>  (ADDv1i64:{ *:[v1i64] } FPR64:{ *:[v1i64] }:$Rn, FPR64:{ *:[v1i64] }:$Rm)
    1313             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ADDv1i64,
    1314             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1315             :         // GIR_Coverage, 1193,
    1316             :         GIR_Done,
    1317             :       // Label 83: @1293
    1318             :       GIM_Reject,
    1319             :     // Label 67: @1294
    1320             :     GIM_Reject,
    1321             :     // Label 55: @1295
    1322             :     GIM_Try, /*On fail goto*//*Label 84*/ 1907,
    1323             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    1324             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    1325             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    1326             :       GIM_Try, /*On fail goto*//*Label 85*/ 1373, // Rule ID 3872 //
    1327             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1328             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1329             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1330             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    1331             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    1332             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    1333             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s32,
    1334             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1335             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1336             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1337             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1338             :         // (add:{ *:[v2i32] } (intrinsic_wo_chain:{ *:[v2i32] } 272:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm), V64:{ *:[v2i32] }:$Rd)  =>  (SABAv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1339             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABAv2i32,
    1340             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1341             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1342             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1343             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    1344             :         GIR_EraseFromParent, /*InsnID*/0,
    1345             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1346             :         // GIR_Coverage, 3872,
    1347             :         GIR_Done,
    1348             :       // Label 85: @1373
    1349             :       GIM_Try, /*On fail goto*//*Label 86*/ 1437, // Rule ID 3878 //
    1350             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1351             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1352             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1353             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    1354             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    1355             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    1356             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s32,
    1357             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1358             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1359             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1360             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1361             :         // (add:{ *:[v2i32] } (intrinsic_wo_chain:{ *:[v2i32] } 330:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm), V64:{ *:[v2i32] }:$Rd)  =>  (UABAv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1362             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABAv2i32,
    1363             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1364             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1365             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1366             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    1367             :         GIR_EraseFromParent, /*InsnID*/0,
    1368             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1369             :         // GIR_Coverage, 3878,
    1370             :         GIR_Done,
    1371             :       // Label 86: @1437
    1372             :       GIM_Try, /*On fail goto*//*Label 87*/ 1489, // Rule ID 3852 //
    1373             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1374             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1375             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1376             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    1377             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_saddlp,
    1378             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    1379             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1380             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1381             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1382             :         // (add:{ *:[v2i32] } (intrinsic_wo_chain:{ *:[v2i32] } 273:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn), V64:{ *:[v2i32] }:$Rd)  =>  (SADALPv4i16_v2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, V64:{ *:[v4i16] }:$Rn)
    1383             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADALPv4i16_v2i32,
    1384             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1385             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1386             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1387             :         GIR_EraseFromParent, /*InsnID*/0,
    1388             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1389             :         // GIR_Coverage, 3852,
    1390             :         GIR_Done,
    1391             :       // Label 87: @1489
    1392             :       GIM_Try, /*On fail goto*//*Label 88*/ 1541, // Rule ID 3858 //
    1393             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1394             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1395             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1396             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    1397             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uaddlp,
    1398             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    1399             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1400             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1401             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1402             :         // (add:{ *:[v2i32] } (intrinsic_wo_chain:{ *:[v2i32] } 331:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn), V64:{ *:[v2i32] }:$Rd)  =>  (UADALPv4i16_v2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, V64:{ *:[v4i16] }:$Rn)
    1403             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADALPv4i16_v2i32,
    1404             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1405             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1406             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1407             :         GIR_EraseFromParent, /*InsnID*/0,
    1408             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1409             :         // GIR_Coverage, 3858,
    1410             :         GIR_Done,
    1411             :       // Label 88: @1541
    1412             :       GIM_Try, /*On fail goto*//*Label 89*/ 1605, // Rule ID 968 //
    1413             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1414             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1415             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1416             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1417             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    1418             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    1419             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    1420             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s32,
    1421             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1422             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1423             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1424             :         // (add:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, (intrinsic_wo_chain:{ *:[v2i32] } 272:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm))  =>  (SABAv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1425             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABAv2i32,
    1426             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1427             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    1428             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1429             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    1430             :         GIR_EraseFromParent, /*InsnID*/0,
    1431             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1432             :         // GIR_Coverage, 968,
    1433             :         GIR_Done,
    1434             :       // Label 89: @1605
    1435             :       GIM_Try, /*On fail goto*//*Label 90*/ 1669, // Rule ID 1079 //
    1436             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1437             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1438             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1439             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1440             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    1441             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    1442             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    1443             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s32,
    1444             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1445             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1446             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1447             :         // (add:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, (intrinsic_wo_chain:{ *:[v2i32] } 330:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm))  =>  (UABAv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1448             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABAv2i32,
    1449             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1450             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    1451             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1452             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    1453             :         GIR_EraseFromParent, /*InsnID*/0,
    1454             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1455             :         // GIR_Coverage, 1079,
    1456             :         GIR_Done,
    1457             :       // Label 90: @1669
    1458             :       GIM_Try, /*On fail goto*//*Label 91*/ 1721, // Rule ID 692 //
    1459             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1460             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1461             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1462             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1463             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    1464             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_saddlp,
    1465             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    1466             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1467             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1468             :         // (add:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, (intrinsic_wo_chain:{ *:[v2i32] } 273:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn))  =>  (SADALPv4i16_v2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, V64:{ *:[v4i16] }:$Rn)
    1469             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADALPv4i16_v2i32,
    1470             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1471             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    1472             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1473             :         GIR_EraseFromParent, /*InsnID*/0,
    1474             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1475             :         // GIR_Coverage, 692,
    1476             :         GIR_Done,
    1477             :       // Label 91: @1721
    1478             :       GIM_Try, /*On fail goto*//*Label 92*/ 1773, // Rule ID 736 //
    1479             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1480             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1481             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1482             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1483             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    1484             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uaddlp,
    1485             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    1486             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1487             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1488             :         // (add:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, (intrinsic_wo_chain:{ *:[v2i32] } 331:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn))  =>  (UADALPv4i16_v2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, V64:{ *:[v4i16] }:$Rn)
    1489             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADALPv4i16_v2i32,
    1490             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1491             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    1492             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1493             :         GIR_EraseFromParent, /*InsnID*/0,
    1494             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1495             :         // GIR_Coverage, 736,
    1496             :         GIR_Done,
    1497             :       // Label 92: @1773
    1498             :       GIM_Try, /*On fail goto*//*Label 93*/ 1830, // Rule ID 3866 //
    1499             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1500             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1501             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    1502             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    1503             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    1504             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1505             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1506             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1507             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1508             :         // (add:{ *:[v2i32] } (mul:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm), V64:{ *:[v2i32] }:$Rd)  =>  (MLAv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1509             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLAv2i32,
    1510             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1511             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1512             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    1513             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    1514             :         GIR_EraseFromParent, /*InsnID*/0,
    1515             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1516             :         // GIR_Coverage, 3866,
    1517             :         GIR_Done,
    1518             :       // Label 93: @1830
    1519             :       GIM_Try, /*On fail goto*//*Label 94*/ 1887, // Rule ID 948 //
    1520             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1521             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1522             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1523             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    1524             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    1525             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    1526             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1527             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1528             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1529             :         // (add:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, (mul:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm))  =>  (MLAv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1530             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLAv2i32,
    1531             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1532             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    1533             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    1534             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    1535             :         GIR_EraseFromParent, /*InsnID*/0,
    1536             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1537             :         // GIR_Coverage, 948,
    1538             :         GIR_Done,
    1539             :       // Label 94: @1887
    1540             :       GIM_Try, /*On fail goto*//*Label 95*/ 1906, // Rule ID 772 //
    1541             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1542             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1543             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1544             :         // (add:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)  =>  (ADDv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1545             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ADDv2i32,
    1546             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1547             :         // GIR_Coverage, 772,
    1548             :         GIR_Done,
    1549             :       // Label 95: @1906
    1550             :       GIM_Reject,
    1551             :     // Label 84: @1907
    1552             :     GIM_Reject,
    1553             :     // Label 56: @1908
    1554             :     GIM_Try, /*On fail goto*//*Label 96*/ 3010,
    1555             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    1556             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    1557             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    1558             :       GIM_Try, /*On fail goto*//*Label 97*/ 1999, // Rule ID 3926 //
    1559             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1560             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1561             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    1562             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    1563             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    1564             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_INTRINSIC,
    1565             :         GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
    1566             :         GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    1567             :         GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s32,
    1568             :         GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v2s32,
    1569             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1570             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1571             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1572             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1573             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    1574             :         // (add:{ *:[v2i64] } (zext:{ *:[v2i64] } (intrinsic_wo_chain:{ *:[v2i32] } 272:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)), V128:{ *:[v2i64] }:$Rd)  =>  (SABALv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1575             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABALv2i32_v2i64,
    1576             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1577             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1578             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // Rn
    1579             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // Rm
    1580             :         GIR_EraseFromParent, /*InsnID*/0,
    1581             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1582             :         // GIR_Coverage, 3926,
    1583             :         GIR_Done,
    1584             :       // Label 97: @1999
    1585             :       GIM_Try, /*On fail goto*//*Label 98*/ 2076, // Rule ID 3944 //
    1586             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1587             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1588             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    1589             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    1590             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    1591             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_INTRINSIC,
    1592             :         GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
    1593             :         GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    1594             :         GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s32,
    1595             :         GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v2s32,
    1596             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1597             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1598             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1599             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1600             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    1601             :         // (add:{ *:[v2i64] } (zext:{ *:[v2i64] } (intrinsic_wo_chain:{ *:[v2i32] } 330:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)), V128:{ *:[v2i64] }:$Rd)  =>  (UABALv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1602             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABALv2i32_v2i64,
    1603             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1604             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1605             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // Rn
    1606             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // Rm
    1607             :         GIR_EraseFromParent, /*InsnID*/0,
    1608             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1609             :         // GIR_Coverage, 3944,
    1610             :         GIR_Done,
    1611             :       // Label 98: @2076
    1612             :       GIM_Try, /*On fail goto*//*Label 99*/ 2153, // Rule ID 1275 //
    1613             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1614             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    1615             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1616             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    1617             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    1618             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    1619             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_INTRINSIC,
    1620             :         GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
    1621             :         GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    1622             :         GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s32,
    1623             :         GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v2s32,
    1624             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1625             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1626             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1627             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    1628             :         // (add:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, (zext:{ *:[v2i64] } (intrinsic_wo_chain:{ *:[v2i32] } 272:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)))  =>  (SABALv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1629             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABALv2i32_v2i64,
    1630             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1631             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    1632             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // Rn
    1633             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // Rm
    1634             :         GIR_EraseFromParent, /*InsnID*/0,
    1635             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1636             :         // GIR_Coverage, 1275,
    1637             :         GIR_Done,
    1638             :       // Label 99: @2153
    1639             :       GIM_Try, /*On fail goto*//*Label 100*/ 2230, // Rule ID 1341 //
    1640             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1641             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    1642             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1643             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    1644             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    1645             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    1646             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_INTRINSIC,
    1647             :         GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
    1648             :         GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    1649             :         GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v2s32,
    1650             :         GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v2s32,
    1651             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1652             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1653             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1654             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    1655             :         // (add:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, (zext:{ *:[v2i64] } (intrinsic_wo_chain:{ *:[v2i32] } 330:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)))  =>  (UABALv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1656             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABALv2i32_v2i64,
    1657             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1658             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    1659             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // Rn
    1660             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // Rm
    1661             :         GIR_EraseFromParent, /*InsnID*/0,
    1662             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1663             :         // GIR_Coverage, 1341,
    1664             :         GIR_Done,
    1665             :       // Label 100: @2230
    1666             :       GIM_Try, /*On fail goto*//*Label 101*/ 2294, // Rule ID 3938 //
    1667             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1668             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1669             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1670             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    1671             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_smull,
    1672             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    1673             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s32,
    1674             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1675             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1676             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1677             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1678             :         // (add:{ *:[v2i64] } (intrinsic_wo_chain:{ *:[v2i64] } 289:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm), V128:{ *:[v2i64] }:$Rd)  =>  (SMLALv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1679             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMLALv2i32_v2i64,
    1680             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1681             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1682             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1683             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    1684             :         GIR_EraseFromParent, /*InsnID*/0,
    1685             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1686             :         // GIR_Coverage, 3938,
    1687             :         GIR_Done,
    1688             :       // Label 101: @2294
    1689             :       GIM_Try, /*On fail goto*//*Label 102*/ 2358, // Rule ID 3956 //
    1690             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1691             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1692             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1693             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    1694             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_umull,
    1695             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    1696             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s32,
    1697             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1698             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1699             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1700             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1701             :         // (add:{ *:[v2i64] } (intrinsic_wo_chain:{ *:[v2i64] } 343:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm), V128:{ *:[v2i64] }:$Rd)  =>  (UMLALv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1702             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMLALv2i32_v2i64,
    1703             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1704             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1705             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1706             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    1707             :         GIR_EraseFromParent, /*InsnID*/0,
    1708             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1709             :         // GIR_Coverage, 3956,
    1710             :         GIR_Done,
    1711             :       // Label 102: @2358
    1712             :       GIM_Try, /*On fail goto*//*Label 103*/ 2410, // Rule ID 3855 //
    1713             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1714             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1715             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1716             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    1717             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_saddlp,
    1718             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
    1719             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1720             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1721             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1722             :         // (add:{ *:[v2i64] } (intrinsic_wo_chain:{ *:[v2i64] } 273:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn), V128:{ *:[v2i64] }:$Rd)  =>  (SADALPv4i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V128:{ *:[v4i32] }:$Rn)
    1723             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADALPv4i32_v2i64,
    1724             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1725             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1726             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1727             :         GIR_EraseFromParent, /*InsnID*/0,
    1728             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1729             :         // GIR_Coverage, 3855,
    1730             :         GIR_Done,
    1731             :       // Label 103: @2410
    1732             :       GIM_Try, /*On fail goto*//*Label 104*/ 2462, // Rule ID 3861 //
    1733             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1734             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1735             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1736             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    1737             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uaddlp,
    1738             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
    1739             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1740             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1741             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1742             :         // (add:{ *:[v2i64] } (intrinsic_wo_chain:{ *:[v2i64] } 331:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn), V128:{ *:[v2i64] }:$Rd)  =>  (UADALPv4i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V128:{ *:[v4i32] }:$Rn)
    1743             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADALPv4i32_v2i64,
    1744             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1745             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1746             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1747             :         GIR_EraseFromParent, /*InsnID*/0,
    1748             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1749             :         // GIR_Coverage, 3861,
    1750             :         GIR_Done,
    1751             :       // Label 104: @2462
    1752             :       GIM_Try, /*On fail goto*//*Label 105*/ 2526, // Rule ID 1299 //
    1753             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1754             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    1755             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1756             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1757             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    1758             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_smull,
    1759             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    1760             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s32,
    1761             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1762             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1763             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1764             :         // (add:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, (intrinsic_wo_chain:{ *:[v2i64] } 289:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm))  =>  (SMLALv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1765             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMLALv2i32_v2i64,
    1766             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1767             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    1768             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1769             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    1770             :         GIR_EraseFromParent, /*InsnID*/0,
    1771             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1772             :         // GIR_Coverage, 1299,
    1773             :         GIR_Done,
    1774             :       // Label 105: @2526
    1775             :       GIM_Try, /*On fail goto*//*Label 106*/ 2590, // Rule ID 1359 //
    1776             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1777             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    1778             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1779             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1780             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    1781             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_umull,
    1782             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    1783             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s32,
    1784             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1785             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1786             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1787             :         // (add:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, (intrinsic_wo_chain:{ *:[v2i64] } 343:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm))  =>  (UMLALv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1788             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMLALv2i32_v2i64,
    1789             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1790             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    1791             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1792             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    1793             :         GIR_EraseFromParent, /*InsnID*/0,
    1794             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1795             :         // GIR_Coverage, 1359,
    1796             :         GIR_Done,
    1797             :       // Label 106: @2590
    1798             :       GIM_Try, /*On fail goto*//*Label 107*/ 2642, // Rule ID 695 //
    1799             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1800             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    1801             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1802             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1803             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    1804             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_saddlp,
    1805             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
    1806             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1807             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1808             :         // (add:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, (intrinsic_wo_chain:{ *:[v2i64] } 273:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn))  =>  (SADALPv4i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V128:{ *:[v4i32] }:$Rn)
    1809             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADALPv4i32_v2i64,
    1810             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1811             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    1812             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1813             :         GIR_EraseFromParent, /*InsnID*/0,
    1814             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1815             :         // GIR_Coverage, 695,
    1816             :         GIR_Done,
    1817             :       // Label 107: @2642
    1818             :       GIM_Try, /*On fail goto*//*Label 108*/ 2694, // Rule ID 739 //
    1819             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1820             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    1821             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1822             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1823             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    1824             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uaddlp,
    1825             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
    1826             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1827             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1828             :         // (add:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, (intrinsic_wo_chain:{ *:[v2i64] } 331:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn))  =>  (UADALPv4i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V128:{ *:[v4i32] }:$Rn)
    1829             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADALPv4i32_v2i64,
    1830             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1831             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    1832             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1833             :         GIR_EraseFromParent, /*InsnID*/0,
    1834             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1835             :         // GIR_Coverage, 739,
    1836             :         GIR_Done,
    1837             :       // Label 108: @2694
    1838             :       GIM_Try, /*On fail goto*//*Label 109*/ 2752, // Rule ID 1287 //
    1839             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1840             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1841             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    1842             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    1843             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1844             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    1845             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
    1846             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s32,
    1847             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1848             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1849             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    1850             :         // (add:{ *:[v2i64] } (sext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rn), (sext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rm))  =>  (SADDLv2i32_v2i64:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1851             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADDLv2i32_v2i64,
    1852             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1853             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    1854             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rm
    1855             :         GIR_EraseFromParent, /*InsnID*/0,
    1856             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1857             :         // GIR_Coverage, 1287,
    1858             :         GIR_Done,
    1859             :       // Label 109: @2752
    1860             :       GIM_Try, /*On fail goto*//*Label 110*/ 2810, // Rule ID 1347 //
    1861             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1862             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1863             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    1864             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    1865             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1866             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    1867             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
    1868             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s32,
    1869             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1870             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1871             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    1872             :         // (add:{ *:[v2i64] } (zext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rn), (zext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rm))  =>  (UADDLv2i32_v2i64:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1873             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADDLv2i32_v2i64,
    1874             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1875             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    1876             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rm
    1877             :         GIR_EraseFromParent, /*InsnID*/0,
    1878             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1879             :         // GIR_Coverage, 1347,
    1880             :         GIR_Done,
    1881             :       // Label 110: @2810
    1882             :       GIM_Try, /*On fail goto*//*Label 111*/ 2855, // Rule ID 3932 //
    1883             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1884             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1885             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    1886             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    1887             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1888             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1889             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1890             :         // (add:{ *:[v2i64] } (sext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rm), V128:{ *:[v2i64] }:$Rn)  =>  (SADDWv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1891             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADDWv2i32_v2i64,
    1892             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1893             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    1894             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    1895             :         GIR_EraseFromParent, /*InsnID*/0,
    1896             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1897             :         // GIR_Coverage, 3932,
    1898             :         GIR_Done,
    1899             :       // Label 111: @2855
    1900             :       GIM_Try, /*On fail goto*//*Label 112*/ 2900, // Rule ID 3950 //
    1901             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1902             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1903             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    1904             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    1905             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1906             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1907             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1908             :         // (add:{ *:[v2i64] } (zext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rm), V128:{ *:[v2i64] }:$Rn)  =>  (UADDWv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1909             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADDWv2i32_v2i64,
    1910             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1911             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    1912             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    1913             :         GIR_EraseFromParent, /*InsnID*/0,
    1914             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1915             :         // GIR_Coverage, 3950,
    1916             :         GIR_Done,
    1917             :       // Label 112: @2900
    1918             :       GIM_Try, /*On fail goto*//*Label 113*/ 2945, // Rule ID 1293 //
    1919             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1920             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    1921             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1922             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    1923             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    1924             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1925             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1926             :         // (add:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, (sext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rm))  =>  (SADDWv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1927             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADDWv2i32_v2i64,
    1928             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1929             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    1930             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    1931             :         GIR_EraseFromParent, /*InsnID*/0,
    1932             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1933             :         // GIR_Coverage, 1293,
    1934             :         GIR_Done,
    1935             :       // Label 113: @2945
    1936             :       GIM_Try, /*On fail goto*//*Label 114*/ 2990, // Rule ID 1353 //
    1937             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1938             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    1939             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    1940             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    1941             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    1942             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    1943             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1944             :         // (add:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, (zext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rm))  =>  (UADDWv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    1945             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADDWv2i32_v2i64,
    1946             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    1947             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    1948             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    1949             :         GIR_EraseFromParent, /*InsnID*/0,
    1950             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1951             :         // GIR_Coverage, 1353,
    1952             :         GIR_Done,
    1953             :       // Label 114: @2990
    1954             :       GIM_Try, /*On fail goto*//*Label 115*/ 3009, // Rule ID 774 //
    1955             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1956             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    1957             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    1958             :         // (add:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)  =>  (ADDv2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)
    1959             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ADDv2i64,
    1960             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1961             :         // GIR_Coverage, 774,
    1962             :         GIR_Done,
    1963             :       // Label 115: @3009
    1964             :       GIM_Reject,
    1965             :     // Label 96: @3010
    1966             :     GIM_Reject,
    1967             :     // Label 57: @3011
    1968             :     GIM_Try, /*On fail goto*//*Label 116*/ 3623,
    1969             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    1970             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    1971             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    1972             :       GIM_Try, /*On fail goto*//*Label 117*/ 3089, // Rule ID 3870 //
    1973             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1974             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1975             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1976             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    1977             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    1978             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    1979             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s16,
    1980             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1981             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    1982             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    1983             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    1984             :         // (add:{ *:[v4i16] } (intrinsic_wo_chain:{ *:[v4i16] } 272:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm), V64:{ *:[v4i16] }:$Rd)  =>  (SABAv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    1985             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABAv4i16,
    1986             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1987             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    1988             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    1989             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    1990             :         GIR_EraseFromParent, /*InsnID*/0,
    1991             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1992             :         // GIR_Coverage, 3870,
    1993             :         GIR_Done,
    1994             :       // Label 117: @3089
    1995             :       GIM_Try, /*On fail goto*//*Label 118*/ 3153, // Rule ID 3876 //
    1996             :         GIM_CheckFeatures, GIFBS_HasNEON,
    1997             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    1998             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    1999             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2000             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    2001             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    2002             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s16,
    2003             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2004             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2005             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2006             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2007             :         // (add:{ *:[v4i16] } (intrinsic_wo_chain:{ *:[v4i16] } 330:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm), V64:{ *:[v4i16] }:$Rd)  =>  (UABAv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2008             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABAv4i16,
    2009             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2010             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2011             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2012             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2013             :         GIR_EraseFromParent, /*InsnID*/0,
    2014             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2015             :         // GIR_Coverage, 3876,
    2016             :         GIR_Done,
    2017             :       // Label 118: @3153
    2018             :       GIM_Try, /*On fail goto*//*Label 119*/ 3205, // Rule ID 3850 //
    2019             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2020             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2021             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2022             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    2023             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_saddlp,
    2024             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    2025             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2026             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2027             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2028             :         // (add:{ *:[v4i16] } (intrinsic_wo_chain:{ *:[v4i16] } 273:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn), V64:{ *:[v4i16] }:$Rd)  =>  (SADALPv8i8_v4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, V64:{ *:[v8i8] }:$Rn)
    2029             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADALPv8i8_v4i16,
    2030             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2031             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2032             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2033             :         GIR_EraseFromParent, /*InsnID*/0,
    2034             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2035             :         // GIR_Coverage, 3850,
    2036             :         GIR_Done,
    2037             :       // Label 119: @3205
    2038             :       GIM_Try, /*On fail goto*//*Label 120*/ 3257, // Rule ID 3856 //
    2039             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2040             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2041             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2042             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    2043             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uaddlp,
    2044             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    2045             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2046             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2047             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2048             :         // (add:{ *:[v4i16] } (intrinsic_wo_chain:{ *:[v4i16] } 331:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn), V64:{ *:[v4i16] }:$Rd)  =>  (UADALPv8i8_v4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, V64:{ *:[v8i8] }:$Rn)
    2049             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADALPv8i8_v4i16,
    2050             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2051             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2052             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2053             :         GIR_EraseFromParent, /*InsnID*/0,
    2054             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2055             :         // GIR_Coverage, 3856,
    2056             :         GIR_Done,
    2057             :       // Label 120: @3257
    2058             :       GIM_Try, /*On fail goto*//*Label 121*/ 3321, // Rule ID 966 //
    2059             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2060             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2061             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2062             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2063             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2064             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    2065             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    2066             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s16,
    2067             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2068             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2069             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2070             :         // (add:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, (intrinsic_wo_chain:{ *:[v4i16] } 272:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm))  =>  (SABAv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2071             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABAv4i16,
    2072             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2073             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2074             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2075             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2076             :         GIR_EraseFromParent, /*InsnID*/0,
    2077             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2078             :         // GIR_Coverage, 966,
    2079             :         GIR_Done,
    2080             :       // Label 121: @3321
    2081             :       GIM_Try, /*On fail goto*//*Label 122*/ 3385, // Rule ID 1077 //
    2082             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2083             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2084             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2085             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2086             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2087             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    2088             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    2089             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s16,
    2090             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2091             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2092             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2093             :         // (add:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, (intrinsic_wo_chain:{ *:[v4i16] } 330:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm))  =>  (UABAv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2094             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABAv4i16,
    2095             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2096             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2097             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2098             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2099             :         GIR_EraseFromParent, /*InsnID*/0,
    2100             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2101             :         // GIR_Coverage, 1077,
    2102             :         GIR_Done,
    2103             :       // Label 122: @3385
    2104             :       GIM_Try, /*On fail goto*//*Label 123*/ 3437, // Rule ID 690 //
    2105             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2106             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2107             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2108             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2109             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    2110             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_saddlp,
    2111             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    2112             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2113             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2114             :         // (add:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, (intrinsic_wo_chain:{ *:[v4i16] } 273:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn))  =>  (SADALPv8i8_v4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, V64:{ *:[v8i8] }:$Rn)
    2115             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADALPv8i8_v4i16,
    2116             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2117             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2118             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2119             :         GIR_EraseFromParent, /*InsnID*/0,
    2120             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2121             :         // GIR_Coverage, 690,
    2122             :         GIR_Done,
    2123             :       // Label 123: @3437
    2124             :       GIM_Try, /*On fail goto*//*Label 124*/ 3489, // Rule ID 734 //
    2125             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2126             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2127             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2128             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2129             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    2130             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uaddlp,
    2131             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    2132             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2133             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2134             :         // (add:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, (intrinsic_wo_chain:{ *:[v4i16] } 331:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn))  =>  (UADALPv8i8_v4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, V64:{ *:[v8i8] }:$Rn)
    2135             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADALPv8i8_v4i16,
    2136             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2137             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2138             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2139             :         GIR_EraseFromParent, /*InsnID*/0,
    2140             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2141             :         // GIR_Coverage, 734,
    2142             :         GIR_Done,
    2143             :       // Label 124: @3489
    2144             :       GIM_Try, /*On fail goto*//*Label 125*/ 3546, // Rule ID 3864 //
    2145             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2146             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2147             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    2148             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    2149             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    2150             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2151             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2152             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2153             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2154             :         // (add:{ *:[v4i16] } (mul:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm), V64:{ *:[v4i16] }:$Rd)  =>  (MLAv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2155             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLAv4i16,
    2156             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2157             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2158             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    2159             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    2160             :         GIR_EraseFromParent, /*InsnID*/0,
    2161             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2162             :         // GIR_Coverage, 3864,
    2163             :         GIR_Done,
    2164             :       // Label 125: @3546
    2165             :       GIM_Try, /*On fail goto*//*Label 126*/ 3603, // Rule ID 946 //
    2166             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2167             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2168             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2169             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    2170             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    2171             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    2172             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2173             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2174             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2175             :         // (add:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, (mul:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm))  =>  (MLAv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2176             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLAv4i16,
    2177             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2178             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2179             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    2180             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    2181             :         GIR_EraseFromParent, /*InsnID*/0,
    2182             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2183             :         // GIR_Coverage, 946,
    2184             :         GIR_Done,
    2185             :       // Label 126: @3603
    2186             :       GIM_Try, /*On fail goto*//*Label 127*/ 3622, // Rule ID 770 //
    2187             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2188             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2189             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2190             :         // (add:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)  =>  (ADDv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2191             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ADDv4i16,
    2192             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2193             :         // GIR_Coverage, 770,
    2194             :         GIR_Done,
    2195             :       // Label 127: @3622
    2196             :       GIM_Reject,
    2197             :     // Label 116: @3623
    2198             :     GIM_Reject,
    2199             :     // Label 58: @3624
    2200             :     GIM_Try, /*On fail goto*//*Label 128*/ 5096,
    2201             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    2202             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    2203             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    2204             :       GIM_Try, /*On fail goto*//*Label 129*/ 3715, // Rule ID 3924 //
    2205             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2206             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2207             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    2208             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    2209             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    2210             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_INTRINSIC,
    2211             :         GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
    2212             :         GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    2213             :         GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s16,
    2214             :         GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v4s16,
    2215             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2216             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2217             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2218             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2219             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    2220             :         // (add:{ *:[v4i32] } (zext:{ *:[v4i32] } (intrinsic_wo_chain:{ *:[v4i16] } 272:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)), V128:{ *:[v4i32] }:$Rd)  =>  (SABALv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2221             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABALv4i16_v4i32,
    2222             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2223             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2224             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // Rn
    2225             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // Rm
    2226             :         GIR_EraseFromParent, /*InsnID*/0,
    2227             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2228             :         // GIR_Coverage, 3924,
    2229             :         GIR_Done,
    2230             :       // Label 129: @3715
    2231             :       GIM_Try, /*On fail goto*//*Label 130*/ 3792, // Rule ID 3942 //
    2232             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2233             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2234             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    2235             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    2236             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    2237             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_INTRINSIC,
    2238             :         GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
    2239             :         GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    2240             :         GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s16,
    2241             :         GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v4s16,
    2242             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2243             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2244             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2245             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2246             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    2247             :         // (add:{ *:[v4i32] } (zext:{ *:[v4i32] } (intrinsic_wo_chain:{ *:[v4i16] } 330:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)), V128:{ *:[v4i32] }:$Rd)  =>  (UABALv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2248             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABALv4i16_v4i32,
    2249             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2250             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2251             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // Rn
    2252             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // Rm
    2253             :         GIR_EraseFromParent, /*InsnID*/0,
    2254             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2255             :         // GIR_Coverage, 3942,
    2256             :         GIR_Done,
    2257             :       // Label 130: @3792
    2258             :       GIM_Try, /*On fail goto*//*Label 131*/ 3869, // Rule ID 1273 //
    2259             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2260             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2261             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2262             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    2263             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    2264             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    2265             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_INTRINSIC,
    2266             :         GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
    2267             :         GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    2268             :         GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s16,
    2269             :         GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v4s16,
    2270             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2271             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2272             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2273             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    2274             :         // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, (zext:{ *:[v4i32] } (intrinsic_wo_chain:{ *:[v4i16] } 272:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)))  =>  (SABALv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2275             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABALv4i16_v4i32,
    2276             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2277             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2278             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // Rn
    2279             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // Rm
    2280             :         GIR_EraseFromParent, /*InsnID*/0,
    2281             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2282             :         // GIR_Coverage, 1273,
    2283             :         GIR_Done,
    2284             :       // Label 131: @3869
    2285             :       GIM_Try, /*On fail goto*//*Label 132*/ 3946, // Rule ID 1339 //
    2286             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2287             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2288             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2289             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    2290             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    2291             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    2292             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_INTRINSIC,
    2293             :         GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
    2294             :         GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    2295             :         GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v4s16,
    2296             :         GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v4s16,
    2297             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2298             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2299             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2300             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    2301             :         // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, (zext:{ *:[v4i32] } (intrinsic_wo_chain:{ *:[v4i16] } 330:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)))  =>  (UABALv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2302             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABALv4i16_v4i32,
    2303             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2304             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2305             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // Rn
    2306             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // Rm
    2307             :         GIR_EraseFromParent, /*InsnID*/0,
    2308             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2309             :         // GIR_Coverage, 1339,
    2310             :         GIR_Done,
    2311             :       // Label 132: @3946
    2312             :       GIM_Try, /*On fail goto*//*Label 133*/ 4010, // Rule ID 3873 //
    2313             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2314             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2315             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2316             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2317             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    2318             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
    2319             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s32,
    2320             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2321             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    2322             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2323             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2324             :         // (add:{ *:[v4i32] } (intrinsic_wo_chain:{ *:[v4i32] } 272:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm), V128:{ *:[v4i32] }:$Rd)  =>  (SABAv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
    2325             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABAv4i32,
    2326             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2327             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2328             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2329             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2330             :         GIR_EraseFromParent, /*InsnID*/0,
    2331             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2332             :         // GIR_Coverage, 3873,
    2333             :         GIR_Done,
    2334             :       // Label 133: @4010
    2335             :       GIM_Try, /*On fail goto*//*Label 134*/ 4074, // Rule ID 3879 //
    2336             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2337             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2338             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2339             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2340             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    2341             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
    2342             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s32,
    2343             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2344             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    2345             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2346             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2347             :         // (add:{ *:[v4i32] } (intrinsic_wo_chain:{ *:[v4i32] } 330:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm), V128:{ *:[v4i32] }:$Rd)  =>  (UABAv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
    2348             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABAv4i32,
    2349             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2350             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2351             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2352             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2353             :         GIR_EraseFromParent, /*InsnID*/0,
    2354             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2355             :         // GIR_Coverage, 3879,
    2356             :         GIR_Done,
    2357             :       // Label 134: @4074
    2358             :       GIM_Try, /*On fail goto*//*Label 135*/ 4138, // Rule ID 3936 //
    2359             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2360             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2361             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2362             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2363             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_smull,
    2364             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    2365             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s16,
    2366             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2367             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2368             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2369             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2370             :         // (add:{ *:[v4i32] } (intrinsic_wo_chain:{ *:[v4i32] } 289:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm), V128:{ *:[v4i32] }:$Rd)  =>  (SMLALv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2371             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMLALv4i16_v4i32,
    2372             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2373             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2374             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2375             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2376             :         GIR_EraseFromParent, /*InsnID*/0,
    2377             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2378             :         // GIR_Coverage, 3936,
    2379             :         GIR_Done,
    2380             :       // Label 135: @4138
    2381             :       GIM_Try, /*On fail goto*//*Label 136*/ 4202, // Rule ID 3954 //
    2382             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2383             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2384             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2385             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2386             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_umull,
    2387             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    2388             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s16,
    2389             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2390             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2391             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2392             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2393             :         // (add:{ *:[v4i32] } (intrinsic_wo_chain:{ *:[v4i32] } 343:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm), V128:{ *:[v4i32] }:$Rd)  =>  (UMLALv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2394             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMLALv4i16_v4i32,
    2395             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2396             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2397             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2398             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2399             :         GIR_EraseFromParent, /*InsnID*/0,
    2400             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2401             :         // GIR_Coverage, 3954,
    2402             :         GIR_Done,
    2403             :       // Label 136: @4202
    2404             :       GIM_Try, /*On fail goto*//*Label 137*/ 4254, // Rule ID 3853 //
    2405             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2406             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2407             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2408             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    2409             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_saddlp,
    2410             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
    2411             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2412             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2413             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2414             :         // (add:{ *:[v4i32] } (intrinsic_wo_chain:{ *:[v4i32] } 273:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn), V128:{ *:[v4i32] }:$Rd)  =>  (SADALPv8i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v8i16] }:$Rn)
    2415             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADALPv8i16_v4i32,
    2416             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2417             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2418             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2419             :         GIR_EraseFromParent, /*InsnID*/0,
    2420             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2421             :         // GIR_Coverage, 3853,
    2422             :         GIR_Done,
    2423             :       // Label 137: @4254
    2424             :       GIM_Try, /*On fail goto*//*Label 138*/ 4306, // Rule ID 3859 //
    2425             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2426             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2427             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2428             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    2429             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uaddlp,
    2430             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
    2431             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2432             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2433             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2434             :         // (add:{ *:[v4i32] } (intrinsic_wo_chain:{ *:[v4i32] } 331:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn), V128:{ *:[v4i32] }:$Rd)  =>  (UADALPv8i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v8i16] }:$Rn)
    2435             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADALPv8i16_v4i32,
    2436             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2437             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2438             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2439             :         GIR_EraseFromParent, /*InsnID*/0,
    2440             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2441             :         // GIR_Coverage, 3859,
    2442             :         GIR_Done,
    2443             :       // Label 138: @4306
    2444             :       GIM_Try, /*On fail goto*//*Label 139*/ 4370, // Rule ID 969 //
    2445             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2446             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2447             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2448             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2449             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2450             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    2451             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
    2452             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s32,
    2453             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2454             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    2455             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2456             :         // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, (intrinsic_wo_chain:{ *:[v4i32] } 272:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm))  =>  (SABAv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
    2457             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABAv4i32,
    2458             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2459             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2460             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2461             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2462             :         GIR_EraseFromParent, /*InsnID*/0,
    2463             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2464             :         // GIR_Coverage, 969,
    2465             :         GIR_Done,
    2466             :       // Label 139: @4370
    2467             :       GIM_Try, /*On fail goto*//*Label 140*/ 4434, // Rule ID 1080 //
    2468             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2469             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2470             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2471             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2472             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2473             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    2474             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
    2475             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s32,
    2476             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2477             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    2478             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2479             :         // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, (intrinsic_wo_chain:{ *:[v4i32] } 330:{ *:[iPTR] }, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm))  =>  (UABAv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
    2480             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABAv4i32,
    2481             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2482             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2483             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2484             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2485             :         GIR_EraseFromParent, /*InsnID*/0,
    2486             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2487             :         // GIR_Coverage, 1080,
    2488             :         GIR_Done,
    2489             :       // Label 140: @4434
    2490             :       GIM_Try, /*On fail goto*//*Label 141*/ 4498, // Rule ID 1297 //
    2491             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2492             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2493             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2494             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2495             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2496             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_smull,
    2497             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    2498             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s16,
    2499             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2500             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2501             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2502             :         // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, (intrinsic_wo_chain:{ *:[v4i32] } 289:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm))  =>  (SMLALv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2503             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMLALv4i16_v4i32,
    2504             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2505             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2506             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2507             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2508             :         GIR_EraseFromParent, /*InsnID*/0,
    2509             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2510             :         // GIR_Coverage, 1297,
    2511             :         GIR_Done,
    2512             :       // Label 141: @4498
    2513             :       GIM_Try, /*On fail goto*//*Label 142*/ 4562, // Rule ID 1357 //
    2514             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2515             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2516             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2517             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2518             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2519             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_umull,
    2520             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    2521             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s16,
    2522             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2523             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2524             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2525             :         // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, (intrinsic_wo_chain:{ *:[v4i32] } 343:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm))  =>  (UMLALv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2526             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMLALv4i16_v4i32,
    2527             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2528             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2529             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2530             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2531             :         GIR_EraseFromParent, /*InsnID*/0,
    2532             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2533             :         // GIR_Coverage, 1357,
    2534             :         GIR_Done,
    2535             :       // Label 142: @4562
    2536             :       GIM_Try, /*On fail goto*//*Label 143*/ 4614, // Rule ID 693 //
    2537             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2538             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2539             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2540             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2541             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    2542             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_saddlp,
    2543             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
    2544             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2545             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2546             :         // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, (intrinsic_wo_chain:{ *:[v4i32] } 273:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn))  =>  (SADALPv8i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v8i16] }:$Rn)
    2547             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADALPv8i16_v4i32,
    2548             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2549             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2550             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2551             :         GIR_EraseFromParent, /*InsnID*/0,
    2552             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2553             :         // GIR_Coverage, 693,
    2554             :         GIR_Done,
    2555             :       // Label 143: @4614
    2556             :       GIM_Try, /*On fail goto*//*Label 144*/ 4666, // Rule ID 737 //
    2557             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2558             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2559             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2560             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2561             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    2562             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uaddlp,
    2563             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
    2564             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2565             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2566             :         // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, (intrinsic_wo_chain:{ *:[v4i32] } 331:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn))  =>  (UADALPv8i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v8i16] }:$Rn)
    2567             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADALPv8i16_v4i32,
    2568             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2569             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2570             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2571             :         GIR_EraseFromParent, /*InsnID*/0,
    2572             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2573             :         // GIR_Coverage, 737,
    2574             :         GIR_Done,
    2575             :       // Label 144: @4666
    2576             :       GIM_Try, /*On fail goto*//*Label 145*/ 4724, // Rule ID 1285 //
    2577             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2578             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2579             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    2580             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    2581             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2582             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    2583             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
    2584             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s16,
    2585             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2586             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2587             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    2588             :         // (add:{ *:[v4i32] } (sext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rn), (sext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rm))  =>  (SADDLv4i16_v4i32:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2589             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADDLv4i16_v4i32,
    2590             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    2591             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    2592             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rm
    2593             :         GIR_EraseFromParent, /*InsnID*/0,
    2594             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2595             :         // GIR_Coverage, 1285,
    2596             :         GIR_Done,
    2597             :       // Label 145: @4724
    2598             :       GIM_Try, /*On fail goto*//*Label 146*/ 4782, // Rule ID 1345 //
    2599             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2600             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2601             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    2602             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    2603             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2604             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    2605             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
    2606             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s16,
    2607             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2608             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2609             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    2610             :         // (add:{ *:[v4i32] } (zext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rn), (zext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rm))  =>  (UADDLv4i16_v4i32:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2611             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADDLv4i16_v4i32,
    2612             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    2613             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    2614             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rm
    2615             :         GIR_EraseFromParent, /*InsnID*/0,
    2616             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2617             :         // GIR_Coverage, 1345,
    2618             :         GIR_Done,
    2619             :       // Label 146: @4782
    2620             :       GIM_Try, /*On fail goto*//*Label 147*/ 4839, // Rule ID 3867 //
    2621             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2622             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2623             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    2624             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
    2625             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
    2626             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2627             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2628             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2629             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2630             :         // (add:{ *:[v4i32] } (mul:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm), V128:{ *:[v4i32] }:$Rd)  =>  (MLAv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
    2631             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLAv4i32,
    2632             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2633             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2634             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    2635             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    2636             :         GIR_EraseFromParent, /*InsnID*/0,
    2637             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2638             :         // GIR_Coverage, 3867,
    2639             :         GIR_Done,
    2640             :       // Label 147: @4839
    2641             :       GIM_Try, /*On fail goto*//*Label 148*/ 4884, // Rule ID 3930 //
    2642             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2643             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2644             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    2645             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    2646             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2647             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2648             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2649             :         // (add:{ *:[v4i32] } (sext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rm), V128:{ *:[v4i32] }:$Rn)  =>  (SADDWv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2650             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADDWv4i16_v4i32,
    2651             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    2652             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    2653             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    2654             :         GIR_EraseFromParent, /*InsnID*/0,
    2655             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2656             :         // GIR_Coverage, 3930,
    2657             :         GIR_Done,
    2658             :       // Label 148: @4884
    2659             :       GIM_Try, /*On fail goto*//*Label 149*/ 4929, // Rule ID 3948 //
    2660             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2661             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2662             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    2663             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    2664             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2665             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2666             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2667             :         // (add:{ *:[v4i32] } (zext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rm), V128:{ *:[v4i32] }:$Rn)  =>  (UADDWv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2668             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADDWv4i16_v4i32,
    2669             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    2670             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    2671             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    2672             :         GIR_EraseFromParent, /*InsnID*/0,
    2673             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2674             :         // GIR_Coverage, 3948,
    2675             :         GIR_Done,
    2676             :       // Label 149: @4929
    2677             :       GIM_Try, /*On fail goto*//*Label 150*/ 4986, // Rule ID 949 //
    2678             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2679             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2680             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2681             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    2682             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
    2683             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
    2684             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2685             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2686             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2687             :         // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, (mul:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm))  =>  (MLAv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
    2688             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLAv4i32,
    2689             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2690             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2691             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    2692             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    2693             :         GIR_EraseFromParent, /*InsnID*/0,
    2694             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2695             :         // GIR_Coverage, 949,
    2696             :         GIR_Done,
    2697             :       // Label 150: @4986
    2698             :       GIM_Try, /*On fail goto*//*Label 151*/ 5031, // Rule ID 1291 //
    2699             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2700             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2701             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2702             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    2703             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    2704             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2705             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2706             :         // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, (sext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rm))  =>  (SADDWv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2707             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADDWv4i16_v4i32,
    2708             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    2709             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    2710             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    2711             :         GIR_EraseFromParent, /*InsnID*/0,
    2712             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2713             :         // GIR_Coverage, 1291,
    2714             :         GIR_Done,
    2715             :       // Label 151: @5031
    2716             :       GIM_Try, /*On fail goto*//*Label 152*/ 5076, // Rule ID 1351 //
    2717             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2718             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2719             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2720             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    2721             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    2722             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2723             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2724             :         // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, (zext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rm))  =>  (UADDWv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    2725             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADDWv4i16_v4i32,
    2726             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    2727             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    2728             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    2729             :         GIR_EraseFromParent, /*InsnID*/0,
    2730             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2731             :         // GIR_Coverage, 1351,
    2732             :         GIR_Done,
    2733             :       // Label 152: @5076
    2734             :       GIM_Try, /*On fail goto*//*Label 153*/ 5095, // Rule ID 773 //
    2735             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2736             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2737             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2738             :         // (add:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (ADDv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
    2739             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ADDv4i32,
    2740             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2741             :         // GIR_Coverage, 773,
    2742             :         GIR_Done,
    2743             :       // Label 153: @5095
    2744             :       GIM_Reject,
    2745             :     // Label 128: @5096
    2746             :     GIM_Reject,
    2747             :     // Label 59: @5097
    2748             :     GIM_Try, /*On fail goto*//*Label 154*/ 5501,
    2749             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    2750             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
    2751             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    2752             :       GIM_Try, /*On fail goto*//*Label 155*/ 5175, // Rule ID 3868 //
    2753             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2754             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2755             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2756             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2757             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    2758             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    2759             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s8,
    2760             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2761             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2762             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2763             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2764             :         // (add:{ *:[v8i8] } (intrinsic_wo_chain:{ *:[v8i8] } 272:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm), V64:{ *:[v8i8] }:$Rd)  =>  (SABAv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    2765             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABAv8i8,
    2766             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2767             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2768             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2769             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2770             :         GIR_EraseFromParent, /*InsnID*/0,
    2771             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2772             :         // GIR_Coverage, 3868,
    2773             :         GIR_Done,
    2774             :       // Label 155: @5175
    2775             :       GIM_Try, /*On fail goto*//*Label 156*/ 5239, // Rule ID 3874 //
    2776             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2777             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2778             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2779             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2780             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    2781             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    2782             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s8,
    2783             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2784             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2785             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2786             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2787             :         // (add:{ *:[v8i8] } (intrinsic_wo_chain:{ *:[v8i8] } 330:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm), V64:{ *:[v8i8] }:$Rd)  =>  (UABAv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    2788             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABAv8i8,
    2789             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2790             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2791             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2792             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2793             :         GIR_EraseFromParent, /*InsnID*/0,
    2794             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2795             :         // GIR_Coverage, 3874,
    2796             :         GIR_Done,
    2797             :       // Label 156: @5239
    2798             :       GIM_Try, /*On fail goto*//*Label 157*/ 5303, // Rule ID 964 //
    2799             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2800             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2801             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2802             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2803             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2804             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    2805             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    2806             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s8,
    2807             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2808             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2809             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2810             :         // (add:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rd, (intrinsic_wo_chain:{ *:[v8i8] } 272:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm))  =>  (SABAv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    2811             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABAv8i8,
    2812             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2813             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2814             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2815             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2816             :         GIR_EraseFromParent, /*InsnID*/0,
    2817             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2818             :         // GIR_Coverage, 964,
    2819             :         GIR_Done,
    2820             :       // Label 157: @5303
    2821             :       GIM_Try, /*On fail goto*//*Label 158*/ 5367, // Rule ID 1075 //
    2822             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2823             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2824             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2825             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    2826             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    2827             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    2828             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    2829             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s8,
    2830             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2831             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2832             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2833             :         // (add:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rd, (intrinsic_wo_chain:{ *:[v8i8] } 330:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm))  =>  (UABAv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    2834             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABAv8i8,
    2835             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2836             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2837             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    2838             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    2839             :         GIR_EraseFromParent, /*InsnID*/0,
    2840             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2841             :         // GIR_Coverage, 1075,
    2842             :         GIR_Done,
    2843             :       // Label 158: @5367
    2844             :       GIM_Try, /*On fail goto*//*Label 159*/ 5424, // Rule ID 3862 //
    2845             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2846             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2847             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    2848             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    2849             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    2850             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2851             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2852             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2853             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2854             :         // (add:{ *:[v8i8] } (mul:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm), V64:{ *:[v8i8] }:$Rd)  =>  (MLAv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    2855             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLAv8i8,
    2856             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2857             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2858             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    2859             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    2860             :         GIR_EraseFromParent, /*InsnID*/0,
    2861             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2862             :         // GIR_Coverage, 3862,
    2863             :         GIR_Done,
    2864             :       // Label 159: @5424
    2865             :       GIM_Try, /*On fail goto*//*Label 160*/ 5481, // Rule ID 944 //
    2866             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2867             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2868             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2869             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    2870             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    2871             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    2872             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2873             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2874             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2875             :         // (add:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rd, (mul:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm))  =>  (MLAv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    2876             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLAv8i8,
    2877             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2878             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2879             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    2880             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    2881             :         GIR_EraseFromParent, /*InsnID*/0,
    2882             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2883             :         // GIR_Coverage, 944,
    2884             :         GIR_Done,
    2885             :       // Label 160: @5481
    2886             :       GIM_Try, /*On fail goto*//*Label 161*/ 5500, // Rule ID 768 //
    2887             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2888             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    2889             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2890             :         // (add:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (ADDv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    2891             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ADDv8i8,
    2892             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2893             :         // GIR_Coverage, 768,
    2894             :         GIR_Done,
    2895             :       // Label 161: @5500
    2896             :       GIM_Reject,
    2897             :     // Label 154: @5501
    2898             :     GIM_Reject,
    2899             :     // Label 60: @5502
    2900             :     GIM_Try, /*On fail goto*//*Label 162*/ 6974,
    2901             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    2902             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    2903             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    2904             :       GIM_Try, /*On fail goto*//*Label 163*/ 5593, // Rule ID 3922 //
    2905             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2906             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2907             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    2908             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    2909             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    2910             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_INTRINSIC,
    2911             :         GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
    2912             :         GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    2913             :         GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s8,
    2914             :         GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v8s8,
    2915             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2916             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2917             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2918             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2919             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    2920             :         // (add:{ *:[v8i16] } (zext:{ *:[v8i16] } (intrinsic_wo_chain:{ *:[v8i8] } 272:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)), V128:{ *:[v8i16] }:$Rd)  =>  (SABALv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    2921             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABALv8i8_v8i16,
    2922             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2923             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2924             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // Rn
    2925             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // Rm
    2926             :         GIR_EraseFromParent, /*InsnID*/0,
    2927             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2928             :         // GIR_Coverage, 3922,
    2929             :         GIR_Done,
    2930             :       // Label 163: @5593
    2931             :       GIM_Try, /*On fail goto*//*Label 164*/ 5670, // Rule ID 3940 //
    2932             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2933             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    2934             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    2935             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    2936             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    2937             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_INTRINSIC,
    2938             :         GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
    2939             :         GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    2940             :         GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s8,
    2941             :         GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v8s8,
    2942             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2943             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2944             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    2945             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2946             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    2947             :         // (add:{ *:[v8i16] } (zext:{ *:[v8i16] } (intrinsic_wo_chain:{ *:[v8i8] } 330:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)), V128:{ *:[v8i16] }:$Rd)  =>  (UABALv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    2948             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABALv8i8_v8i16,
    2949             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2950             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    2951             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // Rn
    2952             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // Rm
    2953             :         GIR_EraseFromParent, /*InsnID*/0,
    2954             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2955             :         // GIR_Coverage, 3940,
    2956             :         GIR_Done,
    2957             :       // Label 164: @5670
    2958             :       GIM_Try, /*On fail goto*//*Label 165*/ 5747, // Rule ID 1271 //
    2959             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2960             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2961             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2962             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    2963             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    2964             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    2965             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_INTRINSIC,
    2966             :         GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
    2967             :         GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    2968             :         GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s8,
    2969             :         GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v8s8,
    2970             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2971             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2972             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    2973             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    2974             :         // (add:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, (zext:{ *:[v8i16] } (intrinsic_wo_chain:{ *:[v8i8] } 272:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)))  =>  (SABALv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    2975             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABALv8i8_v8i16,
    2976             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2977             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    2978             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // Rn
    2979             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // Rm
    2980             :         GIR_EraseFromParent, /*InsnID*/0,
    2981             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2982             :         // GIR_Coverage, 1271,
    2983             :         GIR_Done,
    2984             :       // Label 165: @5747
    2985             :       GIM_Try, /*On fail goto*//*Label 166*/ 5824, // Rule ID 1337 //
    2986             :         GIM_CheckFeatures, GIFBS_HasNEON,
    2987             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    2988             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    2989             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    2990             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    2991             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    2992             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_INTRINSIC,
    2993             :         GIM_CheckNumOperands, /*MI*/2, /*Expected*/4,
    2994             :         GIM_CheckIntrinsicID, /*MI*/2, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    2995             :         GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_v8s8,
    2996             :         GIM_CheckType, /*MI*/2, /*Op*/3, /*Type*/GILLT_v8s8,
    2997             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    2998             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    2999             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3000             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    3001             :         // (add:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, (zext:{ *:[v8i16] } (intrinsic_wo_chain:{ *:[v8i8] } 330:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)))  =>  (UABALv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    3002             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABALv8i8_v8i16,
    3003             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3004             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    3005             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/2, // Rn
    3006             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/3, // Rm
    3007             :         GIR_EraseFromParent, /*InsnID*/0,
    3008             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3009             :         // GIR_Coverage, 1337,
    3010             :         GIR_Done,
    3011             :       // Label 166: @5824
    3012             :       GIM_Try, /*On fail goto*//*Label 167*/ 5888, // Rule ID 3871 //
    3013             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3014             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    3015             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3016             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    3017             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    3018             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
    3019             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s16,
    3020             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3021             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    3022             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3023             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3024             :         // (add:{ *:[v8i16] } (intrinsic_wo_chain:{ *:[v8i16] } 272:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm), V128:{ *:[v8i16] }:$Rd)  =>  (SABAv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
    3025             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABAv8i16,
    3026             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3027             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    3028             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3029             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    3030             :         GIR_EraseFromParent, /*InsnID*/0,
    3031             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3032             :         // GIR_Coverage, 3871,
    3033             :         GIR_Done,
    3034             :       // Label 167: @5888
    3035             :       GIM_Try, /*On fail goto*//*Label 168*/ 5952, // Rule ID 3877 //
    3036             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3037             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    3038             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3039             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    3040             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    3041             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
    3042             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s16,
    3043             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3044             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    3045             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3046             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3047             :         // (add:{ *:[v8i16] } (intrinsic_wo_chain:{ *:[v8i16] } 330:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm), V128:{ *:[v8i16] }:$Rd)  =>  (UABAv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
    3048             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABAv8i16,
    3049             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3050             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    3051             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3052             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    3053             :         GIR_EraseFromParent, /*InsnID*/0,
    3054             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3055             :         // GIR_Coverage, 3877,
    3056             :         GIR_Done,
    3057             :       // Label 168: @5952
    3058             :       GIM_Try, /*On fail goto*//*Label 169*/ 6016, // Rule ID 3934 //
    3059             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3060             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    3061             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3062             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    3063             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_smull,
    3064             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    3065             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s8,
    3066             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    3067             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    3068             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3069             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3070             :         // (add:{ *:[v8i16] } (intrinsic_wo_chain:{ *:[v8i16] } 289:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm), V128:{ *:[v8i16] }:$Rd)  =>  (SMLALv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    3071             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMLALv8i8_v8i16,
    3072             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3073             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    3074             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3075             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    3076             :         GIR_EraseFromParent, /*InsnID*/0,
    3077             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3078             :         // GIR_Coverage, 3934,
    3079             :         GIR_Done,
    3080             :       // Label 169: @6016
    3081             :       GIM_Try, /*On fail goto*//*Label 170*/ 6080, // Rule ID 3952 //
    3082             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3083             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    3084             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3085             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    3086             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_umull,
    3087             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    3088             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s8,
    3089             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    3090             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    3091             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3092             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3093             :         // (add:{ *:[v8i16] } (intrinsic_wo_chain:{ *:[v8i16] } 343:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm), V128:{ *:[v8i16] }:$Rd)  =>  (UMLALv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    3094             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMLALv8i8_v8i16,
    3095             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3096             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    3097             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3098             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    3099             :         GIR_EraseFromParent, /*InsnID*/0,
    3100             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3101             :         // GIR_Coverage, 3952,
    3102             :         GIR_Done,
    3103             :       // Label 170: @6080
    3104             :       GIM_Try, /*On fail goto*//*Label 171*/ 6132, // Rule ID 3851 //
    3105             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3106             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    3107             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3108             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    3109             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_saddlp,
    3110             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
    3111             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3112             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3113             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3114             :         // (add:{ *:[v8i16] } (intrinsic_wo_chain:{ *:[v8i16] } 273:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn), V128:{ *:[v8i16] }:$Rd)  =>  (SADALPv16i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V128:{ *:[v16i8] }:$Rn)
    3115             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADALPv16i8_v8i16,
    3116             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3117             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    3118             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3119             :         GIR_EraseFromParent, /*InsnID*/0,
    3120             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3121             :         // GIR_Coverage, 3851,
    3122             :         GIR_Done,
    3123             :       // Label 171: @6132
    3124             :       GIM_Try, /*On fail goto*//*Label 172*/ 6184, // Rule ID 3857 //
    3125             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3126             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    3127             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3128             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    3129             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uaddlp,
    3130             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
    3131             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3132             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3133             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3134             :         // (add:{ *:[v8i16] } (intrinsic_wo_chain:{ *:[v8i16] } 331:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn), V128:{ *:[v8i16] }:$Rd)  =>  (UADALPv16i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V128:{ *:[v16i8] }:$Rn)
    3135             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADALPv16i8_v8i16,
    3136             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3137             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    3138             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3139             :         GIR_EraseFromParent, /*InsnID*/0,
    3140             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3141             :         // GIR_Coverage, 3857,
    3142             :         GIR_Done,
    3143             :       // Label 172: @6184
    3144             :       GIM_Try, /*On fail goto*//*Label 173*/ 6248, // Rule ID 967 //
    3145             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3146             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3147             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3148             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3149             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    3150             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    3151             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
    3152             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s16,
    3153             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3154             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    3155             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3156             :         // (add:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, (intrinsic_wo_chain:{ *:[v8i16] } 272:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm))  =>  (SABAv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
    3157             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABAv8i16,
    3158             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3159             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    3160             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3161             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    3162             :         GIR_EraseFromParent, /*InsnID*/0,
    3163             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3164             :         // GIR_Coverage, 967,
    3165             :         GIR_Done,
    3166             :       // Label 173: @6248
    3167             :       GIM_Try, /*On fail goto*//*Label 174*/ 6312, // Rule ID 1078 //
    3168             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3169             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3170             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3171             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3172             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    3173             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    3174             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
    3175             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s16,
    3176             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3177             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    3178             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3179             :         // (add:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, (intrinsic_wo_chain:{ *:[v8i16] } 330:{ *:[iPTR] }, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm))  =>  (UABAv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
    3180             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABAv8i16,
    3181             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3182             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    3183             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3184             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    3185             :         GIR_EraseFromParent, /*InsnID*/0,
    3186             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3187             :         // GIR_Coverage, 1078,
    3188             :         GIR_Done,
    3189             :       // Label 174: @6312
    3190             :       GIM_Try, /*On fail goto*//*Label 175*/ 6376, // Rule ID 1295 //
    3191             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3192             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3193             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3194             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3195             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    3196             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_smull,
    3197             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    3198             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s8,
    3199             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    3200             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    3201             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3202             :         // (add:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, (intrinsic_wo_chain:{ *:[v8i16] } 289:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm))  =>  (SMLALv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    3203             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMLALv8i8_v8i16,
    3204             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3205             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    3206             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3207             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    3208             :         GIR_EraseFromParent, /*InsnID*/0,
    3209             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3210             :         // GIR_Coverage, 1295,
    3211             :         GIR_Done,
    3212             :       // Label 175: @6376
    3213             :       GIM_Try, /*On fail goto*//*Label 176*/ 6440, // Rule ID 1355 //
    3214             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3215             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3216             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3217             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3218             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    3219             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_umull,
    3220             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    3221             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s8,
    3222             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    3223             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    3224             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3225             :         // (add:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, (intrinsic_wo_chain:{ *:[v8i16] } 343:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm))  =>  (UMLALv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    3226             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMLALv8i8_v8i16,
    3227             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3228             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    3229             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3230             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    3231             :         GIR_EraseFromParent, /*InsnID*/0,
    3232             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3233             :         // GIR_Coverage, 1355,
    3234             :         GIR_Done,
    3235             :       // Label 176: @6440
    3236             :       GIM_Try, /*On fail goto*//*Label 177*/ 6492, // Rule ID 691 //
    3237             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3238             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3239             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3240             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3241             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    3242             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_saddlp,
    3243             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
    3244             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3245             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3246             :         // (add:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, (intrinsic_wo_chain:{ *:[v8i16] } 273:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn))  =>  (SADALPv16i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V128:{ *:[v16i8] }:$Rn)
    3247             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADALPv16i8_v8i16,
    3248             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3249             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    3250             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3251             :         GIR_EraseFromParent, /*InsnID*/0,
    3252             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3253             :         // GIR_Coverage, 691,
    3254             :         GIR_Done,
    3255             :       // Label 177: @6492
    3256             :       GIM_Try, /*On fail goto*//*Label 178*/ 6544, // Rule ID 735 //
    3257             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3258             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3259             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3260             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3261             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    3262             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uaddlp,
    3263             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
    3264             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3265             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3266             :         // (add:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, (intrinsic_wo_chain:{ *:[v8i16] } 331:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn))  =>  (UADALPv16i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V128:{ *:[v16i8] }:$Rn)
    3267             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADALPv16i8_v8i16,
    3268             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3269             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    3270             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3271             :         GIR_EraseFromParent, /*InsnID*/0,
    3272             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3273             :         // GIR_Coverage, 735,
    3274             :         GIR_Done,
    3275             :       // Label 178: @6544
    3276             :       GIM_Try, /*On fail goto*//*Label 179*/ 6602, // Rule ID 1283 //
    3277             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3278             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    3279             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    3280             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    3281             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    3282             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    3283             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
    3284             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s8,
    3285             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    3286             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3287             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    3288             :         // (add:{ *:[v8i16] } (sext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rn), (sext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rm))  =>  (SADDLv8i8_v8i16:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    3289             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADDLv8i8_v8i16,
    3290             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3291             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    3292             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rm
    3293             :         GIR_EraseFromParent, /*InsnID*/0,
    3294             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3295             :         // GIR_Coverage, 1283,
    3296             :         GIR_Done,
    3297             :       // Label 179: @6602
    3298             :       GIM_Try, /*On fail goto*//*Label 180*/ 6660, // Rule ID 1343 //
    3299             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3300             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    3301             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    3302             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    3303             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    3304             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    3305             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
    3306             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s8,
    3307             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    3308             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3309             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    3310             :         // (add:{ *:[v8i16] } (zext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rn), (zext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rm))  =>  (UADDLv8i8_v8i16:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    3311             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADDLv8i8_v8i16,
    3312             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3313             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    3314             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rm
    3315             :         GIR_EraseFromParent, /*InsnID*/0,
    3316             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3317             :         // GIR_Coverage, 1343,
    3318             :         GIR_Done,
    3319             :       // Label 180: @6660
    3320             :       GIM_Try, /*On fail goto*//*Label 181*/ 6717, // Rule ID 3865 //
    3321             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3322             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    3323             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3324             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
    3325             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
    3326             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3327             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3328             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3329             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3330             :         // (add:{ *:[v8i16] } (mul:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm), V128:{ *:[v8i16] }:$Rd)  =>  (MLAv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
    3331             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLAv8i16,
    3332             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3333             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    3334             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    3335             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    3336             :         GIR_EraseFromParent, /*InsnID*/0,
    3337             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3338             :         // GIR_Coverage, 3865,
    3339             :         GIR_Done,
    3340             :       // Label 181: @6717
    3341             :       GIM_Try, /*On fail goto*//*Label 182*/ 6762, // Rule ID 3928 //
    3342             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3343             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    3344             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    3345             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    3346             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    3347             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3348             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3349             :         // (add:{ *:[v8i16] } (sext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rm), V128:{ *:[v8i16] }:$Rn)  =>  (SADDWv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    3350             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADDWv8i8_v8i16,
    3351             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3352             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    3353             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    3354             :         GIR_EraseFromParent, /*InsnID*/0,
    3355             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3356             :         // GIR_Coverage, 3928,
    3357             :         GIR_Done,
    3358             :       // Label 182: @6762
    3359             :       GIM_Try, /*On fail goto*//*Label 183*/ 6807, // Rule ID 3946 //
    3360             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3361             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    3362             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    3363             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    3364             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    3365             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3366             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3367             :         // (add:{ *:[v8i16] } (zext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rm), V128:{ *:[v8i16] }:$Rn)  =>  (UADDWv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    3368             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADDWv8i8_v8i16,
    3369             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3370             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    3371             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    3372             :         GIR_EraseFromParent, /*InsnID*/0,
    3373             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3374             :         // GIR_Coverage, 3946,
    3375             :         GIR_Done,
    3376             :       // Label 183: @6807
    3377             :       GIM_Try, /*On fail goto*//*Label 184*/ 6864, // Rule ID 947 //
    3378             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3379             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3380             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3381             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3382             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
    3383             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
    3384             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3385             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3386             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3387             :         // (add:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, (mul:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm))  =>  (MLAv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
    3388             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLAv8i16,
    3389             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3390             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    3391             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    3392             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    3393             :         GIR_EraseFromParent, /*InsnID*/0,
    3394             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3395             :         // GIR_Coverage, 947,
    3396             :         GIR_Done,
    3397             :       // Label 184: @6864
    3398             :       GIM_Try, /*On fail goto*//*Label 185*/ 6909, // Rule ID 1289 //
    3399             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3400             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3401             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3402             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    3403             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    3404             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    3405             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3406             :         // (add:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, (sext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rm))  =>  (SADDWv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    3407             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SADDWv8i8_v8i16,
    3408             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3409             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    3410             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    3411             :         GIR_EraseFromParent, /*InsnID*/0,
    3412             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3413             :         // GIR_Coverage, 1289,
    3414             :         GIR_Done,
    3415             :       // Label 185: @6909
    3416             :       GIM_Try, /*On fail goto*//*Label 186*/ 6954, // Rule ID 1349 //
    3417             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3418             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3419             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3420             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    3421             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    3422             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    3423             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3424             :         // (add:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, (zext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rm))  =>  (UADDWv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    3425             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UADDWv8i8_v8i16,
    3426             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3427             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    3428             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    3429             :         GIR_EraseFromParent, /*InsnID*/0,
    3430             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3431             :         // GIR_Coverage, 1349,
    3432             :         GIR_Done,
    3433             :       // Label 186: @6954
    3434             :       GIM_Try, /*On fail goto*//*Label 187*/ 6973, // Rule ID 771 //
    3435             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3436             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3437             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3438             :         // (add:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)  =>  (ADDv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
    3439             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ADDv8i16,
    3440             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3441             :         // GIR_Coverage, 771,
    3442             :         GIR_Done,
    3443             :       // Label 187: @6973
    3444             :       GIM_Reject,
    3445             :     // Label 162: @6974
    3446             :     GIM_Reject,
    3447             :     // Label 61: @6975
    3448             :     GIM_Try, /*On fail goto*//*Label 188*/ 7379,
    3449             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    3450             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    3451             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    3452             :       GIM_Try, /*On fail goto*//*Label 189*/ 7053, // Rule ID 3869 //
    3453             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3454             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    3455             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3456             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    3457             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    3458             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
    3459             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v16s8,
    3460             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3461             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    3462             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3463             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3464             :         // (add:{ *:[v16i8] } (intrinsic_wo_chain:{ *:[v16i8] } 272:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm), V128:{ *:[v16i8] }:$Rd)  =>  (SABAv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rd, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
    3465             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABAv16i8,
    3466             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3467             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    3468             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3469             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    3470             :         GIR_EraseFromParent, /*InsnID*/0,
    3471             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3472             :         // GIR_Coverage, 3869,
    3473             :         GIR_Done,
    3474             :       // Label 189: @7053
    3475             :       GIM_Try, /*On fail goto*//*Label 190*/ 7117, // Rule ID 3875 //
    3476             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3477             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    3478             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3479             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    3480             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    3481             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
    3482             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v16s8,
    3483             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3484             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    3485             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3486             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3487             :         // (add:{ *:[v16i8] } (intrinsic_wo_chain:{ *:[v16i8] } 330:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm), V128:{ *:[v16i8] }:$Rd)  =>  (UABAv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rd, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
    3488             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABAv16i8,
    3489             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3490             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    3491             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3492             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    3493             :         GIR_EraseFromParent, /*InsnID*/0,
    3494             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3495             :         // GIR_Coverage, 3875,
    3496             :         GIR_Done,
    3497             :       // Label 190: @7117
    3498             :       GIM_Try, /*On fail goto*//*Label 191*/ 7181, // Rule ID 965 //
    3499             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3500             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3501             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3502             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3503             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    3504             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_sabd,
    3505             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
    3506             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v16s8,
    3507             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3508             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    3509             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3510             :         // (add:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rd, (intrinsic_wo_chain:{ *:[v16i8] } 272:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm))  =>  (SABAv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rd, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
    3511             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SABAv16i8,
    3512             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3513             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    3514             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3515             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    3516             :         GIR_EraseFromParent, /*InsnID*/0,
    3517             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3518             :         // GIR_Coverage, 965,
    3519             :         GIR_Done,
    3520             :       // Label 191: @7181
    3521             :       GIM_Try, /*On fail goto*//*Label 192*/ 7245, // Rule ID 1076 //
    3522             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3523             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3524             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3525             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    3526             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    3527             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_uabd,
    3528             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
    3529             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v16s8,
    3530             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3531             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR128RegClassID,
    3532             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3533             :         // (add:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rd, (intrinsic_wo_chain:{ *:[v16i8] } 330:{ *:[iPTR] }, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm))  =>  (UABAv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rd, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
    3534             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UABAv16i8,
    3535             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3536             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    3537             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    3538             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    3539             :         GIR_EraseFromParent, /*InsnID*/0,
    3540             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3541             :         // GIR_Coverage, 1076,
    3542             :         GIR_Done,
    3543             :       // Label 192: @7245
    3544             :       GIM_Try, /*On fail goto*//*Label 193*/ 7302, // Rule ID 3863 //
    3545             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3546             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    3547             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3548             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
    3549             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
    3550             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3551             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3552             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3553             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3554             :         // (add:{ *:[v16i8] } (mul:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm), V128:{ *:[v16i8] }:$Rd)  =>  (MLAv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rd, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
    3555             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLAv16i8,
    3556             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3557             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rd
    3558             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    3559             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    3560             :         GIR_EraseFromParent, /*InsnID*/0,
    3561             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3562             :         // GIR_Coverage, 3863,
    3563             :         GIR_Done,
    3564             :       // Label 193: @7302
    3565             :       GIM_Try, /*On fail goto*//*Label 194*/ 7359, // Rule ID 945 //
    3566             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3567             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3568             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3569             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3570             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
    3571             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
    3572             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3573             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3574             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3575             :         // (add:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rd, (mul:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm))  =>  (MLAv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rd, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
    3576             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLAv16i8,
    3577             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3578             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    3579             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    3580             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    3581             :         GIR_EraseFromParent, /*InsnID*/0,
    3582             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3583             :         // GIR_Coverage, 945,
    3584             :         GIR_Done,
    3585             :       // Label 194: @7359
    3586             :       GIM_Try, /*On fail goto*//*Label 195*/ 7378, // Rule ID 769 //
    3587             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3588             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    3589             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    3590             :         // (add:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (ADDv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
    3591             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ADDv16i8,
    3592             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3593             :         // GIR_Coverage, 769,
    3594             :         GIR_Done,
    3595             :       // Label 195: @7378
    3596             :       GIM_Reject,
    3597             :     // Label 188: @7379
    3598             :     GIM_Reject,
    3599             :     // Label 62: @7380
    3600             :     GIM_Reject,
    3601             :     // Label 1: @7381
    3602             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 11, /*)*//*default:*//*Label 205*/ 9961,
    3603             :     /*GILLT_s32*//*Label 196*/ 7397,
    3604             :     /*GILLT_s64*//*Label 197*/ 7517, 0,
    3605             :     /*GILLT_v2s32*//*Label 198*/ 8388,
    3606             :     /*GILLT_v2s64*//*Label 199*/ 8476,
    3607             :     /*GILLT_v4s16*//*Label 200*/ 8845,
    3608             :     /*GILLT_v4s32*//*Label 201*/ 8933,
    3609             :     /*GILLT_v8s8*//*Label 202*/ 9359,
    3610             :     /*GILLT_v8s16*//*Label 203*/ 9447,
    3611             :     /*GILLT_v16s8*//*Label 204*/ 9873,
    3612             :     // Label 196: @7397
    3613             :     GIM_Try, /*On fail goto*//*Label 206*/ 7516,
    3614             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    3615             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    3616             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    3617             :       GIM_Try, /*On fail goto*//*Label 207*/ 7465, // Rule ID 1879 //
    3618             :         GIM_CheckConstantInt, /*MI*/0, /*Op*/1, 0,
    3619             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3620             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3621             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    3622             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    3623             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    3624             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    3625             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3626             :         // (sub:{ *:[i32] } 0:{ *:[i32] }, (mul:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm))  =>  (MSUBWrrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm, WZR:{ *:[i32] })
    3627             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MSUBWrrr,
    3628             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3629             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    3630             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    3631             :         GIR_AddRegister, /*InsnID*/0, AArch64::WZR,
    3632             :         GIR_EraseFromParent, /*InsnID*/0,
    3633             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3634             :         // GIR_Coverage, 1879,
    3635             :         GIR_Done,
    3636             :       // Label 207: @7465
    3637             :       GIM_Try, /*On fail goto*//*Label 208*/ 7495, // Rule ID 1845 //
    3638             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32spRegClassID,
    3639             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/2, /*Renderer*/0, GICP_gi_addsub_shifted_imm32,
    3640             :         // (sub:{ *:[i32] } GPR32sp:{ *:[i32] }:$Rn, addsub_shifted_imm32:{ *:[i32] }:$imm)  =>  (SUBSWri:{ *:[i32] }:{ *:[i32] } GPR32sp:{ *:[i32] }:$Rn, addsub_shifted_imm32:{ *:[i32] }:$imm)
    3641             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SUBSWri,
    3642             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3643             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    3644             :         GIR_ComplexRenderer, /*InsnID*/0, /*RendererID*/0, // imm
    3645             :         GIR_EraseFromParent, /*InsnID*/0,
    3646             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3647             :         // GIR_Coverage, 1845,
    3648             :         GIR_Done,
    3649             :       // Label 208: @7495
    3650             :       GIM_Try, /*On fail goto*//*Label 209*/ 7515, // Rule ID 1847 //
    3651             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    3652             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    3653             :         // (sub:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)  =>  (SUBSWrr:{ *:[i32] }:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
    3654             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SUBSWrr,
    3655             :         GIR_AddImplicitDef, /*InsnID*/0, AArch64::NZCV,
    3656             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3657             :         // GIR_Coverage, 1847,
    3658             :         GIR_Done,
    3659             :       // Label 209: @7515
    3660             :       GIM_Reject,
    3661             :     // Label 206: @7516
    3662             :     GIM_Reject,
    3663             :     // Label 197: @7517
    3664             :     GIM_Try, /*On fail goto*//*Label 210*/ 8387,
    3665             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    3666             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    3667             :       GIM_Try, /*On fail goto*//*Label 211*/ 7622, // Rule ID 1890 //
    3668             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    3669             :         GIM_CheckConstantInt, /*MI*/0, /*Op*/1, 0,
    3670             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3671             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3672             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    3673             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    3674             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    3675             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
    3676             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    3677             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    3678             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
    3679             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_CONSTANT,
    3680             :         GIM_CheckI64ImmPredicate, /*MI*/3, /*Predicate*/GIPFP_I64_Predicate_s64imm_32bit,
    3681             :         // MIs[3] Operand 1
    3682             :         // No operand predicates
    3683             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3684             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    3685             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
    3686             :         // (sub:{ *:[i64] } 0:{ *:[i64] }, (mul:{ *:[i64] } (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (imm:{ *:[i64] })<<P:Predicate_s64imm_32bit>>:$C))  =>  (SMSUBLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, (MOVi32imm:{ *:[i32] } (trunc_imm:{ *:[i32] } (imm:{ *:[i64] }):$C)), XZR:{ *:[i64] })
    3687             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
    3688             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::MOVi32imm,
    3689             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    3690             :         GIR_CustomRenderer, /*InsnID*/1, /*OldInsnID*/3, /*Renderer*/GICR_renderTruncImm, // C
    3691             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    3692             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMSUBLrrr,
    3693             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3694             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    3695             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    3696             :         GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
    3697             :         GIR_EraseFromParent, /*InsnID*/0,
    3698             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3699             :         // GIR_Coverage, 1890,
    3700             :         GIR_Done,
    3701             :       // Label 211: @7622
    3702             :       GIM_Try, /*On fail goto*//*Label 212*/ 7717, // Rule ID 1891 //
    3703             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    3704             :         GIM_CheckConstantInt, /*MI*/0, /*Op*/1, 0,
    3705             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3706             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3707             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    3708             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    3709             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    3710             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
    3711             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    3712             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    3713             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
    3714             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_CONSTANT,
    3715             :         GIM_CheckI64ImmPredicate, /*MI*/3, /*Predicate*/GIPFP_I64_Predicate_i64imm_32bit,
    3716             :         // MIs[3] Operand 1
    3717             :         // No operand predicates
    3718             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3719             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    3720             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
    3721             :         // (sub:{ *:[i64] } 0:{ *:[i64] }, (mul:{ *:[i64] } (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (imm:{ *:[i64] })<<P:Predicate_i64imm_32bit>>:$C))  =>  (UMSUBLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, (MOVi32imm:{ *:[i32] } (trunc_imm:{ *:[i32] } (imm:{ *:[i64] }):$C)), XZR:{ *:[i64] })
    3722             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
    3723             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::MOVi32imm,
    3724             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    3725             :         GIR_CustomRenderer, /*InsnID*/1, /*OldInsnID*/3, /*Renderer*/GICR_renderTruncImm, // C
    3726             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    3727             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMSUBLrrr,
    3728             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3729             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    3730             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    3731             :         GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
    3732             :         GIR_EraseFromParent, /*InsnID*/0,
    3733             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3734             :         // GIR_Coverage, 1891,
    3735             :         GIR_Done,
    3736             :       // Label 212: @7717
    3737             :       GIM_Try, /*On fail goto*//*Label 213*/ 7801, // Rule ID 1885 //
    3738             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    3739             :         GIM_CheckConstantInt, /*MI*/0, /*Op*/1, 0,
    3740             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3741             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3742             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    3743             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    3744             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    3745             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
    3746             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    3747             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    3748             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
    3749             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_SEXT,
    3750             :         GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_s32,
    3751             :         GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    3752             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3753             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    3754             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
    3755             :         // (sub:{ *:[i64] } 0:{ *:[i64] }, (mul:{ *:[i64] } (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rm)))  =>  (SMSUBLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm, XZR:{ *:[i64] })
    3756             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMSUBLrrr,
    3757             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3758             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    3759             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // Rm
    3760             :         GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
    3761             :         GIR_EraseFromParent, /*InsnID*/0,
    3762             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3763             :         // GIR_Coverage, 1885,
    3764             :         GIR_Done,
    3765             :       // Label 213: @7801
    3766             :       GIM_Try, /*On fail goto*//*Label 214*/ 7885, // Rule ID 1886 //
    3767             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    3768             :         GIM_CheckConstantInt, /*MI*/0, /*Op*/1, 0,
    3769             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3770             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3771             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    3772             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    3773             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    3774             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
    3775             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    3776             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    3777             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
    3778             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_ZEXT,
    3779             :         GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_s32,
    3780             :         GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    3781             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3782             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    3783             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
    3784             :         // (sub:{ *:[i64] } 0:{ *:[i64] }, (mul:{ *:[i64] } (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rm)))  =>  (UMSUBLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm, XZR:{ *:[i64] })
    3785             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMSUBLrrr,
    3786             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3787             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    3788             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // Rm
    3789             :         GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
    3790             :         GIR_EraseFromParent, /*InsnID*/0,
    3791             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3792             :         // GIR_Coverage, 1886,
    3793             :         GIR_Done,
    3794             :       // Label 214: @7885
    3795             :       GIM_Try, /*On fail goto*//*Label 215*/ 7981, // Rule ID 1896 //
    3796             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    3797             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    3798             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3799             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3800             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    3801             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    3802             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    3803             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
    3804             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    3805             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    3806             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
    3807             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_CONSTANT,
    3808             :         GIM_CheckI64ImmPredicate, /*MI*/3, /*Predicate*/GIPFP_I64_Predicate_s64imm_32bit,
    3809             :         // MIs[3] Operand 1
    3810             :         // No operand predicates
    3811             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3812             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    3813             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
    3814             :         // (sub:{ *:[i64] } GPR64:{ *:[i64] }:$Ra, (mul:{ *:[i64] } (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (imm:{ *:[i64] })<<P:Predicate_s64imm_32bit>>:$C))  =>  (SMSUBLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, (MOVi32imm:{ *:[i32] } (trunc_imm:{ *:[i32] } (imm:{ *:[i64] }):$C)), GPR64:{ *:[i64] }:$Ra)
    3815             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
    3816             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::MOVi32imm,
    3817             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    3818             :         GIR_CustomRenderer, /*InsnID*/1, /*OldInsnID*/3, /*Renderer*/GICR_renderTruncImm, // C
    3819             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    3820             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMSUBLrrr,
    3821             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3822             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    3823             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    3824             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Ra
    3825             :         GIR_EraseFromParent, /*InsnID*/0,
    3826             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3827             :         // GIR_Coverage, 1896,
    3828             :         GIR_Done,
    3829             :       // Label 215: @7981
    3830             :       GIM_Try, /*On fail goto*//*Label 216*/ 8077, // Rule ID 1897 //
    3831             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    3832             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    3833             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3834             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3835             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    3836             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    3837             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    3838             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
    3839             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    3840             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    3841             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
    3842             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_CONSTANT,
    3843             :         GIM_CheckI64ImmPredicate, /*MI*/3, /*Predicate*/GIPFP_I64_Predicate_i64imm_32bit,
    3844             :         // MIs[3] Operand 1
    3845             :         // No operand predicates
    3846             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3847             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    3848             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
    3849             :         // (sub:{ *:[i64] } GPR64:{ *:[i64] }:$Ra, (mul:{ *:[i64] } (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (imm:{ *:[i64] })<<P:Predicate_i64imm_32bit>>:$C))  =>  (UMSUBLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, (MOVi32imm:{ *:[i32] } (trunc_imm:{ *:[i32] } (imm:{ *:[i64] }):$C)), GPR64:{ *:[i64] }:$Ra)
    3850             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
    3851             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::MOVi32imm,
    3852             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    3853             :         GIR_CustomRenderer, /*InsnID*/1, /*OldInsnID*/3, /*Renderer*/GICR_renderTruncImm, // C
    3854             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    3855             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMSUBLrrr,
    3856             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3857             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    3858             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    3859             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Ra
    3860             :         GIR_EraseFromParent, /*InsnID*/0,
    3861             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3862             :         // GIR_Coverage, 1897,
    3863             :         GIR_Done,
    3864             :       // Label 216: @8077
    3865             :       GIM_Try, /*On fail goto*//*Label 217*/ 8162, // Rule ID 66 //
    3866             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    3867             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    3868             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3869             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3870             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    3871             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    3872             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    3873             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
    3874             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    3875             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    3876             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
    3877             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_SEXT,
    3878             :         GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_s32,
    3879             :         GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    3880             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3881             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    3882             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
    3883             :         // (sub:{ *:[i64] } GPR64:{ *:[i64] }:$Ra, (mul:{ *:[i64] } (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rm)))  =>  (SMSUBLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm, GPR64:{ *:[i64] }:$Ra)
    3884             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMSUBLrrr,
    3885             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3886             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    3887             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // Rm
    3888             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Ra
    3889             :         GIR_EraseFromParent, /*InsnID*/0,
    3890             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3891             :         // GIR_Coverage, 66,
    3892             :         GIR_Done,
    3893             :       // Label 217: @8162
    3894             :       GIM_Try, /*On fail goto*//*Label 218*/ 8247, // Rule ID 68 //
    3895             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    3896             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    3897             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3898             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3899             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    3900             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    3901             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
    3902             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
    3903             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    3904             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    3905             :         GIM_RecordInsn, /*DefineMI*/3, /*MI*/1, /*OpIdx*/2, // MIs[3]
    3906             :         GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_ZEXT,
    3907             :         GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_s32,
    3908             :         GIM_CheckRegBankForClass, /*MI*/3, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    3909             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3910             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    3911             :         GIM_CheckIsSafeToFold, /*InsnID*/3,
    3912             :         // (sub:{ *:[i64] } GPR64:{ *:[i64] }:$Ra, (mul:{ *:[i64] } (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rm)))  =>  (UMSUBLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm, GPR64:{ *:[i64] }:$Ra)
    3913             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMSUBLrrr,
    3914             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3915             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rn
    3916             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/1, // Rm
    3917             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Ra
    3918             :         GIR_EraseFromParent, /*InsnID*/0,
    3919             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3920             :         // GIR_Coverage, 68,
    3921             :         GIR_Done,
    3922             :       // Label 218: @8247
    3923             :       GIM_Try, /*On fail goto*//*Label 219*/ 8305, // Rule ID 1880 //
    3924             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    3925             :         GIM_CheckConstantInt, /*MI*/0, /*Op*/1, 0,
    3926             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3927             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3928             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    3929             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    3930             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    3931             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    3932             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3933             :         // (sub:{ *:[i64] } 0:{ *:[i64] }, (mul:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm))  =>  (MSUBXrrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm, XZR:{ *:[i64] })
    3934             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MSUBXrrr,
    3935             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3936             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    3937             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    3938             :         GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
    3939             :         GIR_EraseFromParent, /*InsnID*/0,
    3940             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3941             :         // GIR_Coverage, 1880,
    3942             :         GIR_Done,
    3943             :       // Label 219: @8305
    3944             :       GIM_Try, /*On fail goto*//*Label 220*/ 8339, // Rule ID 1846 //
    3945             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    3946             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64spRegClassID,
    3947             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/2, /*Renderer*/0, GICP_gi_addsub_shifted_imm64,
    3948             :         // (sub:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, addsub_shifted_imm64:{ *:[i64] }:$imm)  =>  (SUBSXri:{ *:[i64] }:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, addsub_shifted_imm64:{ *:[i64] }:$imm)
    3949             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SUBSXri,
    3950             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    3951             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    3952             :         GIR_ComplexRenderer, /*InsnID*/0, /*RendererID*/0, // imm
    3953             :         GIR_EraseFromParent, /*InsnID*/0,
    3954             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3955             :         // GIR_Coverage, 1846,
    3956             :         GIR_Done,
    3957             :       // Label 220: @8339
    3958             :       GIM_Try, /*On fail goto*//*Label 221*/ 8362, // Rule ID 1230 //
    3959             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3960             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    3961             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    3962             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    3963             :         // (sub:{ *:[v1i64] } FPR64:{ *:[v1i64] }:$Rn, FPR64:{ *:[v1i64] }:$Rm)  =>  (SUBv1i64:{ *:[v1i64] } FPR64:{ *:[v1i64] }:$Rn, FPR64:{ *:[v1i64] }:$Rm)
    3964             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SUBv1i64,
    3965             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3966             :         // GIR_Coverage, 1230,
    3967             :         GIR_Done,
    3968             :       // Label 221: @8362
    3969             :       GIM_Try, /*On fail goto*//*Label 222*/ 8386, // Rule ID 1848 //
    3970             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    3971             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    3972             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    3973             :         // (sub:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)  =>  (SUBSXrr:{ *:[i64] }:{ *:[i32] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
    3974             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SUBSXrr,
    3975             :         GIR_AddImplicitDef, /*InsnID*/0, AArch64::NZCV,
    3976             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3977             :         // GIR_Coverage, 1848,
    3978             :         GIR_Done,
    3979             :       // Label 222: @8386
    3980             :       GIM_Reject,
    3981             :     // Label 210: @8387
    3982             :     GIM_Reject,
    3983             :     // Label 198: @8388
    3984             :     GIM_Try, /*On fail goto*//*Label 223*/ 8475,
    3985             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    3986             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    3987             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    3988             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    3989             :       GIM_Try, /*On fail goto*//*Label 224*/ 8459, // Rule ID 954 //
    3990             :         GIM_CheckFeatures, GIFBS_HasNEON,
    3991             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    3992             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3993             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    3994             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    3995             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    3996             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    3997             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    3998             :         // (sub:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, (mul:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm))  =>  (MLSv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    3999             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLSv2i32,
    4000             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4001             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    4002             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4003             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    4004             :         GIR_EraseFromParent, /*InsnID*/0,
    4005             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4006             :         // GIR_Coverage, 954,
    4007             :         GIR_Done,
    4008             :       // Label 224: @8459
    4009             :       GIM_Try, /*On fail goto*//*Label 225*/ 8474, // Rule ID 1072 //
    4010             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4011             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4012             :         // (sub:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)  =>  (SUBv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    4013             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SUBv2i32,
    4014             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4015             :         // GIR_Coverage, 1072,
    4016             :         GIR_Done,
    4017             :       // Label 225: @8474
    4018             :       GIM_Reject,
    4019             :     // Label 223: @8475
    4020             :     GIM_Reject,
    4021             :     // Label 199: @8476
    4022             :     GIM_Try, /*On fail goto*//*Label 226*/ 8844,
    4023             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    4024             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    4025             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    4026             :       GIM_Try, /*On fail goto*//*Label 227*/ 8554, // Rule ID 1305 //
    4027             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4028             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4029             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4030             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    4031             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    4032             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_smull,
    4033             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    4034             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s32,
    4035             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4036             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    4037             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4038             :         // (sub:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, (intrinsic_wo_chain:{ *:[v2i64] } 289:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm))  =>  (SMLSLv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    4039             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMLSLv2i32_v2i64,
    4040             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4041             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    4042             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    4043             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    4044             :         GIR_EraseFromParent, /*InsnID*/0,
    4045             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4046             :         // GIR_Coverage, 1305,
    4047             :         GIR_Done,
    4048             :       // Label 227: @8554
    4049             :       GIM_Try, /*On fail goto*//*Label 228*/ 8618, // Rule ID 1365 //
    4050             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4051             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4052             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4053             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    4054             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    4055             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_umull,
    4056             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v2s32,
    4057             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v2s32,
    4058             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4059             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    4060             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4061             :         // (sub:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, (intrinsic_wo_chain:{ *:[v2i64] } 343:{ *:[iPTR] }, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm))  =>  (UMLSLv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rd, V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    4062             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMLSLv2i32_v2i64,
    4063             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4064             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    4065             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    4066             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    4067             :         GIR_EraseFromParent, /*InsnID*/0,
    4068             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4069             :         // GIR_Coverage, 1365,
    4070             :         GIR_Done,
    4071             :       // Label 228: @8618
    4072             :       GIM_Try, /*On fail goto*//*Label 229*/ 8676, // Rule ID 1329 //
    4073             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4074             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    4075             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    4076             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    4077             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4078             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    4079             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
    4080             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s32,
    4081             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4082             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4083             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    4084             :         // (sub:{ *:[v2i64] } (sext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rn), (sext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rm))  =>  (SSUBLv2i32_v2i64:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    4085             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SSUBLv2i32_v2i64,
    4086             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4087             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4088             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rm
    4089             :         GIR_EraseFromParent, /*InsnID*/0,
    4090             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4091             :         // GIR_Coverage, 1329,
    4092             :         GIR_Done,
    4093             :       // Label 229: @8676
    4094             :       GIM_Try, /*On fail goto*//*Label 230*/ 8734, // Rule ID 1377 //
    4095             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4096             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    4097             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    4098             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    4099             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4100             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    4101             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
    4102             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v2s32,
    4103             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4104             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4105             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    4106             :         // (sub:{ *:[v2i64] } (zext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rn), (zext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rm))  =>  (USUBLv2i32_v2i64:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    4107             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USUBLv2i32_v2i64,
    4108             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4109             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4110             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rm
    4111             :         GIR_EraseFromParent, /*InsnID*/0,
    4112             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4113             :         // GIR_Coverage, 1377,
    4114             :         GIR_Done,
    4115             :       // Label 230: @8734
    4116             :       GIM_Try, /*On fail goto*//*Label 231*/ 8779, // Rule ID 1335 //
    4117             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4118             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4119             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4120             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    4121             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    4122             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4123             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4124             :         // (sub:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, (sext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rm))  =>  (SSUBWv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    4125             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SSUBWv2i32_v2i64,
    4126             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4127             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    4128             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    4129             :         GIR_EraseFromParent, /*InsnID*/0,
    4130             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4131             :         // GIR_Coverage, 1335,
    4132             :         GIR_Done,
    4133             :       // Label 231: @8779
    4134             :       GIM_Try, /*On fail goto*//*Label 232*/ 8824, // Rule ID 1383 //
    4135             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4136             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4137             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4138             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    4139             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v2s32,
    4140             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4141             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4142             :         // (sub:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, (zext:{ *:[v2i64] } V64:{ *:[v2i32] }:$Rm))  =>  (USUBWv2i32_v2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    4143             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USUBWv2i32_v2i64,
    4144             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4145             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    4146             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    4147             :         GIR_EraseFromParent, /*InsnID*/0,
    4148             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4149             :         // GIR_Coverage, 1383,
    4150             :         GIR_Done,
    4151             :       // Label 232: @8824
    4152             :       GIM_Try, /*On fail goto*//*Label 233*/ 8843, // Rule ID 1074 //
    4153             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4154             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4155             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    4156             :         // (sub:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)  =>  (SUBv2i64:{ *:[v2i64] } V128:{ *:[v2i64] }:$Rn, V128:{ *:[v2i64] }:$Rm)
    4157             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SUBv2i64,
    4158             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4159             :         // GIR_Coverage, 1074,
    4160             :         GIR_Done,
    4161             :       // Label 233: @8843
    4162             :       GIM_Reject,
    4163             :     // Label 226: @8844
    4164             :     GIM_Reject,
    4165             :     // Label 200: @8845
    4166             :     GIM_Try, /*On fail goto*//*Label 234*/ 8932,
    4167             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    4168             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    4169             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    4170             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4171             :       GIM_Try, /*On fail goto*//*Label 235*/ 8916, // Rule ID 952 //
    4172             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4173             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4174             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    4175             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    4176             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    4177             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4178             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4179             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4180             :         // (sub:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, (mul:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm))  =>  (MLSv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    4181             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLSv4i16,
    4182             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4183             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    4184             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4185             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    4186             :         GIR_EraseFromParent, /*InsnID*/0,
    4187             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4188             :         // GIR_Coverage, 952,
    4189             :         GIR_Done,
    4190             :       // Label 235: @8916
    4191             :       GIM_Try, /*On fail goto*//*Label 236*/ 8931, // Rule ID 1070 //
    4192             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4193             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4194             :         // (sub:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)  =>  (SUBv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    4195             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SUBv4i16,
    4196             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4197             :         // GIR_Coverage, 1070,
    4198             :         GIR_Done,
    4199             :       // Label 236: @8931
    4200             :       GIM_Reject,
    4201             :     // Label 234: @8932
    4202             :     GIM_Reject,
    4203             :     // Label 201: @8933
    4204             :     GIM_Try, /*On fail goto*//*Label 237*/ 9358,
    4205             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    4206             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    4207             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    4208             :       GIM_Try, /*On fail goto*//*Label 238*/ 9011, // Rule ID 1303 //
    4209             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4210             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4211             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4212             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    4213             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    4214             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_smull,
    4215             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    4216             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s16,
    4217             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4218             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    4219             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4220             :         // (sub:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, (intrinsic_wo_chain:{ *:[v4i32] } 289:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm))  =>  (SMLSLv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    4221             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMLSLv4i16_v4i32,
    4222             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4223             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    4224             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    4225             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    4226             :         GIR_EraseFromParent, /*InsnID*/0,
    4227             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4228             :         // GIR_Coverage, 1303,
    4229             :         GIR_Done,
    4230             :       // Label 238: @9011
    4231             :       GIM_Try, /*On fail goto*//*Label 239*/ 9075, // Rule ID 1363 //
    4232             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4233             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4234             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4235             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    4236             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    4237             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_umull,
    4238             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s16,
    4239             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v4s16,
    4240             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4241             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    4242             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4243             :         // (sub:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, (intrinsic_wo_chain:{ *:[v4i32] } 343:{ *:[iPTR] }, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm))  =>  (UMLSLv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    4244             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMLSLv4i16_v4i32,
    4245             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4246             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    4247             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    4248             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    4249             :         GIR_EraseFromParent, /*InsnID*/0,
    4250             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4251             :         // GIR_Coverage, 1363,
    4252             :         GIR_Done,
    4253             :       // Label 239: @9075
    4254             :       GIM_Try, /*On fail goto*//*Label 240*/ 9133, // Rule ID 1327 //
    4255             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4256             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    4257             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    4258             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    4259             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4260             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    4261             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
    4262             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s16,
    4263             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4264             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4265             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    4266             :         // (sub:{ *:[v4i32] } (sext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rn), (sext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rm))  =>  (SSUBLv4i16_v4i32:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    4267             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SSUBLv4i16_v4i32,
    4268             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4269             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4270             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rm
    4271             :         GIR_EraseFromParent, /*InsnID*/0,
    4272             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4273             :         // GIR_Coverage, 1327,
    4274             :         GIR_Done,
    4275             :       // Label 240: @9133
    4276             :       GIM_Try, /*On fail goto*//*Label 241*/ 9191, // Rule ID 1375 //
    4277             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4278             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    4279             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    4280             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    4281             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4282             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    4283             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
    4284             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v4s16,
    4285             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4286             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4287             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    4288             :         // (sub:{ *:[v4i32] } (zext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rn), (zext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rm))  =>  (USUBLv4i16_v4i32:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    4289             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USUBLv4i16_v4i32,
    4290             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4291             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4292             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rm
    4293             :         GIR_EraseFromParent, /*InsnID*/0,
    4294             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4295             :         // GIR_Coverage, 1375,
    4296             :         GIR_Done,
    4297             :       // Label 241: @9191
    4298             :       GIM_Try, /*On fail goto*//*Label 242*/ 9248, // Rule ID 955 //
    4299             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4300             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4301             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4302             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    4303             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
    4304             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
    4305             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4306             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    4307             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4308             :         // (sub:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, (mul:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm))  =>  (MLSv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rd, V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
    4309             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLSv4i32,
    4310             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4311             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    4312             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4313             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    4314             :         GIR_EraseFromParent, /*InsnID*/0,
    4315             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4316             :         // GIR_Coverage, 955,
    4317             :         GIR_Done,
    4318             :       // Label 242: @9248
    4319             :       GIM_Try, /*On fail goto*//*Label 243*/ 9293, // Rule ID 1333 //
    4320             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4321             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4322             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4323             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    4324             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    4325             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4326             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4327             :         // (sub:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, (sext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rm))  =>  (SSUBWv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    4328             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SSUBWv4i16_v4i32,
    4329             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4330             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    4331             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    4332             :         GIR_EraseFromParent, /*InsnID*/0,
    4333             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4334             :         // GIR_Coverage, 1333,
    4335             :         GIR_Done,
    4336             :       // Label 243: @9293
    4337             :       GIM_Try, /*On fail goto*//*Label 244*/ 9338, // Rule ID 1381 //
    4338             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4339             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4340             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4341             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    4342             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s16,
    4343             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4344             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4345             :         // (sub:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, (zext:{ *:[v4i32] } V64:{ *:[v4i16] }:$Rm))  =>  (USUBWv4i16_v4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    4346             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USUBWv4i16_v4i32,
    4347             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4348             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    4349             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    4350             :         GIR_EraseFromParent, /*InsnID*/0,
    4351             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4352             :         // GIR_Coverage, 1381,
    4353             :         GIR_Done,
    4354             :       // Label 244: @9338
    4355             :       GIM_Try, /*On fail goto*//*Label 245*/ 9357, // Rule ID 1073 //
    4356             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4357             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4358             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    4359             :         // (sub:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (SUBv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
    4360             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SUBv4i32,
    4361             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4362             :         // GIR_Coverage, 1073,
    4363             :         GIR_Done,
    4364             :       // Label 245: @9357
    4365             :       GIM_Reject,
    4366             :     // Label 237: @9358
    4367             :     GIM_Reject,
    4368             :     // Label 202: @9359
    4369             :     GIM_Try, /*On fail goto*//*Label 246*/ 9446,
    4370             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    4371             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
    4372             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    4373             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4374             :       GIM_Try, /*On fail goto*//*Label 247*/ 9430, // Rule ID 950 //
    4375             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4376             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4377             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    4378             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    4379             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    4380             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4381             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4382             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4383             :         // (sub:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rd, (mul:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm))  =>  (MLSv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    4384             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLSv8i8,
    4385             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4386             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    4387             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4388             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    4389             :         GIR_EraseFromParent, /*InsnID*/0,
    4390             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4391             :         // GIR_Coverage, 950,
    4392             :         GIR_Done,
    4393             :       // Label 247: @9430
    4394             :       GIM_Try, /*On fail goto*//*Label 248*/ 9445, // Rule ID 1068 //
    4395             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4396             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4397             :         // (sub:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (SUBv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    4398             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SUBv8i8,
    4399             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4400             :         // GIR_Coverage, 1068,
    4401             :         GIR_Done,
    4402             :       // Label 248: @9445
    4403             :       GIM_Reject,
    4404             :     // Label 246: @9446
    4405             :     GIM_Reject,
    4406             :     // Label 203: @9447
    4407             :     GIM_Try, /*On fail goto*//*Label 249*/ 9872,
    4408             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    4409             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    4410             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    4411             :       GIM_Try, /*On fail goto*//*Label 250*/ 9525, // Rule ID 1301 //
    4412             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4413             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4414             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4415             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    4416             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    4417             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_smull,
    4418             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    4419             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s8,
    4420             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4421             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    4422             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4423             :         // (sub:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, (intrinsic_wo_chain:{ *:[v8i16] } 289:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm))  =>  (SMLSLv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    4424             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMLSLv8i8_v8i16,
    4425             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4426             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    4427             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    4428             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    4429             :         GIR_EraseFromParent, /*InsnID*/0,
    4430             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4431             :         // GIR_Coverage, 1301,
    4432             :         GIR_Done,
    4433             :       // Label 250: @9525
    4434             :       GIM_Try, /*On fail goto*//*Label 251*/ 9589, // Rule ID 1361 //
    4435             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4436             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4437             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4438             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_INTRINSIC,
    4439             :         GIM_CheckNumOperands, /*MI*/1, /*Expected*/4,
    4440             :         GIM_CheckIntrinsicID, /*MI*/1, /*Op*/1, Intrinsic::aarch64_neon_umull,
    4441             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s8,
    4442             :         GIM_CheckType, /*MI*/1, /*Op*/3, /*Type*/GILLT_v8s8,
    4443             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4444             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/3, /*RC*/AArch64::FPR64RegClassID,
    4445             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4446             :         // (sub:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, (intrinsic_wo_chain:{ *:[v8i16] } 343:{ *:[iPTR] }, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm))  =>  (UMLSLv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    4447             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMLSLv8i8_v8i16,
    4448             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4449             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    4450             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    4451             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/3, // Rm
    4452             :         GIR_EraseFromParent, /*InsnID*/0,
    4453             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4454             :         // GIR_Coverage, 1361,
    4455             :         GIR_Done,
    4456             :       // Label 251: @9589
    4457             :       GIM_Try, /*On fail goto*//*Label 252*/ 9647, // Rule ID 1325 //
    4458             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4459             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    4460             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    4461             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    4462             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4463             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    4464             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
    4465             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s8,
    4466             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4467             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4468             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    4469             :         // (sub:{ *:[v8i16] } (sext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rn), (sext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rm))  =>  (SSUBLv8i8_v8i16:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    4470             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SSUBLv8i8_v8i16,
    4471             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4472             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4473             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rm
    4474             :         GIR_EraseFromParent, /*InsnID*/0,
    4475             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4476             :         // GIR_Coverage, 1325,
    4477             :         GIR_Done,
    4478             :       // Label 252: @9647
    4479             :       GIM_Try, /*On fail goto*//*Label 253*/ 9705, // Rule ID 1373 //
    4480             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4481             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    4482             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    4483             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    4484             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4485             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    4486             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
    4487             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_v8s8,
    4488             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4489             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4490             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    4491             :         // (sub:{ *:[v8i16] } (zext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rn), (zext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rm))  =>  (USUBLv8i8_v8i16:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    4492             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USUBLv8i8_v8i16,
    4493             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4494             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4495             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rm
    4496             :         GIR_EraseFromParent, /*InsnID*/0,
    4497             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4498             :         // GIR_Coverage, 1373,
    4499             :         GIR_Done,
    4500             :       // Label 253: @9705
    4501             :       GIM_Try, /*On fail goto*//*Label 254*/ 9762, // Rule ID 953 //
    4502             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4503             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4504             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4505             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    4506             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
    4507             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
    4508             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4509             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    4510             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4511             :         // (sub:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, (mul:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm))  =>  (MLSv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rd, V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
    4512             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLSv8i16,
    4513             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4514             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    4515             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4516             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    4517             :         GIR_EraseFromParent, /*InsnID*/0,
    4518             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4519             :         // GIR_Coverage, 953,
    4520             :         GIR_Done,
    4521             :       // Label 254: @9762
    4522             :       GIM_Try, /*On fail goto*//*Label 255*/ 9807, // Rule ID 1331 //
    4523             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4524             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4525             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4526             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    4527             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    4528             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4529             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4530             :         // (sub:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, (sext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rm))  =>  (SSUBWv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    4531             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SSUBWv8i8_v8i16,
    4532             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4533             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    4534             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    4535             :         GIR_EraseFromParent, /*InsnID*/0,
    4536             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4537             :         // GIR_Coverage, 1331,
    4538             :         GIR_Done,
    4539             :       // Label 255: @9807
    4540             :       GIM_Try, /*On fail goto*//*Label 256*/ 9852, // Rule ID 1379 //
    4541             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4542             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4543             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4544             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    4545             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s8,
    4546             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4547             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4548             :         // (sub:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, (zext:{ *:[v8i16] } V64:{ *:[v8i8] }:$Rm))  =>  (USUBWv8i8_v8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    4549             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::USUBWv8i8_v8i16,
    4550             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4551             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    4552             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    4553             :         GIR_EraseFromParent, /*InsnID*/0,
    4554             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4555             :         // GIR_Coverage, 1379,
    4556             :         GIR_Done,
    4557             :       // Label 256: @9852
    4558             :       GIM_Try, /*On fail goto*//*Label 257*/ 9871, // Rule ID 1071 //
    4559             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4560             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4561             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    4562             :         // (sub:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)  =>  (SUBv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
    4563             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SUBv8i16,
    4564             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4565             :         // GIR_Coverage, 1071,
    4566             :         GIR_Done,
    4567             :       // Label 257: @9871
    4568             :       GIM_Reject,
    4569             :     // Label 249: @9872
    4570             :     GIM_Reject,
    4571             :     // Label 204: @9873
    4572             :     GIM_Try, /*On fail goto*//*Label 258*/ 9960,
    4573             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    4574             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    4575             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    4576             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4577             :       GIM_Try, /*On fail goto*//*Label 259*/ 9944, // Rule ID 951 //
    4578             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4579             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4580             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    4581             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s8,
    4582             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v16s8,
    4583             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4584             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    4585             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4586             :         // (sub:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rd, (mul:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm))  =>  (MLSv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rd, V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
    4587             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MLSv16i8,
    4588             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4589             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rd
    4590             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4591             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    4592             :         GIR_EraseFromParent, /*InsnID*/0,
    4593             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4594             :         // GIR_Coverage, 951,
    4595             :         GIR_Done,
    4596             :       // Label 259: @9944
    4597             :       GIM_Try, /*On fail goto*//*Label 260*/ 9959, // Rule ID 1069 //
    4598             :         GIM_CheckFeatures, GIFBS_HasNEON,
    4599             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    4600             :         // (sub:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (SUBv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
    4601             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SUBv16i8,
    4602             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4603             :         // GIR_Coverage, 1069,
    4604             :         GIR_Done,
    4605             :       // Label 260: @9959
    4606             :       GIM_Reject,
    4607             :     // Label 258: @9960
    4608             :     GIM_Reject,
    4609             :     // Label 205: @9961
    4610             :     GIM_Reject,
    4611             :     // Label 2: @9962
    4612             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 11, /*)*//*default:*//*Label 269*/ 10742,
    4613             :     /*GILLT_s32*//*Label 261*/ 9978,
    4614             :     /*GILLT_s64*//*Label 262*/ 10135, 0,
    4615             :     /*GILLT_v2s32*//*Label 263*/ 10550, 0,
    4616             :     /*GILLT_v4s16*//*Label 264*/ 10582,
    4617             :     /*GILLT_v4s32*//*Label 265*/ 10614,
    4618             :     /*GILLT_v8s8*//*Label 266*/ 10646,
    4619             :     /*GILLT_v8s16*//*Label 267*/ 10678,
    4620             :     /*GILLT_v16s8*//*Label 268*/ 10710,
    4621             :     // Label 261: @9978
    4622             :     GIM_Try, /*On fail goto*//*Label 270*/ 10134,
    4623             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    4624             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    4625             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    4626             :       GIM_Try, /*On fail goto*//*Label 271*/ 10046, // Rule ID 1881 //
    4627             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    4628             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB,
    4629             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    4630             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    4631             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 0,
    4632             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    4633             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    4634             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4635             :         // (mul:{ *:[i32] } (sub:{ *:[i32] } 0:{ *:[i32] }, GPR32:{ *:[i32] }:$Rn), GPR32:{ *:[i32] }:$Rm)  =>  (MSUBWrrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm, WZR:{ *:[i32] })
    4636             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MSUBWrrr,
    4637             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4638             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    4639             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
    4640             :         GIR_AddRegister, /*InsnID*/0, AArch64::WZR,
    4641             :         GIR_EraseFromParent, /*InsnID*/0,
    4642             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4643             :         // GIR_Coverage, 1881,
    4644             :         GIR_Done,
    4645             :       // Label 271: @10046
    4646             :       GIM_Try, /*On fail goto*//*Label 272*/ 10100, // Rule ID 4038 //
    4647             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    4648             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4649             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB,
    4650             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    4651             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    4652             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 0,
    4653             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    4654             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4655             :         // (mul:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, (sub:{ *:[i32] } 0:{ *:[i32] }, GPR32:{ *:[i32] }:$Rn))  =>  (MSUBWrrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm, WZR:{ *:[i32] })
    4656             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MSUBWrrr,
    4657             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4658             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    4659             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rm
    4660             :         GIR_AddRegister, /*InsnID*/0, AArch64::WZR,
    4661             :         GIR_EraseFromParent, /*InsnID*/0,
    4662             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4663             :         // GIR_Coverage, 4038,
    4664             :         GIR_Done,
    4665             :       // Label 272: @10100
    4666             :       GIM_Try, /*On fail goto*//*Label 273*/ 10133, // Rule ID 1877 //
    4667             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    4668             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    4669             :         // (mul:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)  =>  (MADDWrrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm, WZR:{ *:[i32] })
    4670             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MADDWrrr,
    4671             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4672             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    4673             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
    4674             :         GIR_AddRegister, /*InsnID*/0, AArch64::WZR,
    4675             :         GIR_EraseFromParent, /*InsnID*/0,
    4676             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4677             :         // GIR_Coverage, 1877,
    4678             :         GIR_Done,
    4679             :       // Label 273: @10133
    4680             :       GIM_Reject,
    4681             :     // Label 270: @10134
    4682             :     GIM_Reject,
    4683             :     // Label 262: @10135
    4684             :     GIM_Try, /*On fail goto*//*Label 274*/ 10549,
    4685             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    4686             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    4687             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    4688             :       GIM_Try, /*On fail goto*//*Label 275*/ 10203, // Rule ID 1882 //
    4689             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    4690             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB,
    4691             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    4692             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    4693             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 0,
    4694             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    4695             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    4696             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4697             :         // (mul:{ *:[i64] } (sub:{ *:[i64] } 0:{ *:[i64] }, GPR64:{ *:[i64] }:$Rn), GPR64:{ *:[i64] }:$Rm)  =>  (MSUBXrrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm, XZR:{ *:[i64] })
    4698             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MSUBXrrr,
    4699             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4700             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    4701             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
    4702             :         GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
    4703             :         GIR_EraseFromParent, /*InsnID*/0,
    4704             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4705             :         // GIR_Coverage, 1882,
    4706             :         GIR_Done,
    4707             :       // Label 275: @10203
    4708             :       GIM_Try, /*On fail goto*//*Label 276*/ 10257, // Rule ID 4039 //
    4709             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    4710             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4711             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB,
    4712             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    4713             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    4714             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 0,
    4715             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    4716             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4717             :         // (mul:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, (sub:{ *:[i64] } 0:{ *:[i64] }, GPR64:{ *:[i64] }:$Rn))  =>  (MSUBXrrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm, XZR:{ *:[i64] })
    4718             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MSUBXrrr,
    4719             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4720             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rn
    4721             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rm
    4722             :         GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
    4723             :         GIR_EraseFromParent, /*InsnID*/0,
    4724             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4725             :         // GIR_Coverage, 4039,
    4726             :         GIR_Done,
    4727             :       // Label 276: @10257
    4728             :       GIM_Try, /*On fail goto*//*Label 277*/ 10327, // Rule ID 1887 //
    4729             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    4730             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    4731             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    4732             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    4733             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    4734             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_CONSTANT,
    4735             :         GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIPFP_I64_Predicate_s64imm_32bit,
    4736             :         // MIs[2] Operand 1
    4737             :         // No operand predicates
    4738             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4739             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    4740             :         // (mul:{ *:[i64] } (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (imm:{ *:[i64] })<<P:Predicate_s64imm_32bit>>:$C)  =>  (SMADDLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, (MOVi32imm:{ *:[i32] } (trunc_imm:{ *:[i32] } (imm:{ *:[i64] }):$C)), XZR:{ *:[i64] })
    4741             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
    4742             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::MOVi32imm,
    4743             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    4744             :         GIR_CustomRenderer, /*InsnID*/1, /*OldInsnID*/2, /*Renderer*/GICR_renderTruncImm, // C
    4745             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    4746             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMADDLrrr,
    4747             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4748             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4749             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    4750             :         GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
    4751             :         GIR_EraseFromParent, /*InsnID*/0,
    4752             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4753             :         // GIR_Coverage, 1887,
    4754             :         GIR_Done,
    4755             :       // Label 277: @10327
    4756             :       GIM_Try, /*On fail goto*//*Label 278*/ 10397, // Rule ID 1888 //
    4757             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    4758             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    4759             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    4760             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    4761             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    4762             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_CONSTANT,
    4763             :         GIM_CheckI64ImmPredicate, /*MI*/2, /*Predicate*/GIPFP_I64_Predicate_i64imm_32bit,
    4764             :         // MIs[2] Operand 1
    4765             :         // No operand predicates
    4766             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4767             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    4768             :         // (mul:{ *:[i64] } (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (imm:{ *:[i64] })<<P:Predicate_i64imm_32bit>>:$C)  =>  (UMADDLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, (MOVi32imm:{ *:[i32] } (trunc_imm:{ *:[i32] } (imm:{ *:[i64] }):$C)), XZR:{ *:[i64] })
    4769             :         GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
    4770             :         GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::MOVi32imm,
    4771             :         GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    4772             :         GIR_CustomRenderer, /*InsnID*/1, /*OldInsnID*/2, /*Renderer*/GICR_renderTruncImm, // C
    4773             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    4774             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMADDLrrr,
    4775             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4776             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4777             :         GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    4778             :         GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
    4779             :         GIR_EraseFromParent, /*InsnID*/0,
    4780             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4781             :         // GIR_Coverage, 1888,
    4782             :         GIR_Done,
    4783             :       // Label 278: @10397
    4784             :       GIM_Try, /*On fail goto*//*Label 279*/ 10456, // Rule ID 1883 //
    4785             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    4786             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SEXT,
    4787             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    4788             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    4789             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    4790             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_SEXT,
    4791             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    4792             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    4793             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4794             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    4795             :         // (mul:{ *:[i64] } (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (sext:{ *:[i64] } GPR32:{ *:[i32] }:$Rm))  =>  (SMADDLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm, XZR:{ *:[i64] })
    4796             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SMADDLrrr,
    4797             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4798             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4799             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rm
    4800             :         GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
    4801             :         GIR_EraseFromParent, /*InsnID*/0,
    4802             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4803             :         // GIR_Coverage, 1883,
    4804             :         GIR_Done,
    4805             :       // Label 279: @10456
    4806             :       GIM_Try, /*On fail goto*//*Label 280*/ 10515, // Rule ID 1884 //
    4807             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    4808             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ZEXT,
    4809             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    4810             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    4811             :         GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    4812             :         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ZEXT,
    4813             :         GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    4814             :         GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    4815             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    4816             :         GIM_CheckIsSafeToFold, /*InsnID*/2,
    4817             :         // (mul:{ *:[i64] } (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rn), (zext:{ *:[i64] } GPR32:{ *:[i32] }:$Rm))  =>  (UMADDLrrr:{ *:[i64] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm, XZR:{ *:[i64] })
    4818             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMADDLrrr,
    4819             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4820             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    4821             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // Rm
    4822             :         GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
    4823             :         GIR_EraseFromParent, /*InsnID*/0,
    4824             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4825             :         // GIR_Coverage, 1884,
    4826             :         GIR_Done,
    4827             :       // Label 280: @10515
    4828             :       GIM_Try, /*On fail goto*//*Label 281*/ 10548, // Rule ID 1878 //
    4829             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    4830             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    4831             :         // (mul:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)  =>  (MADDXrrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm, XZR:{ *:[i64] })
    4832             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::MADDXrrr,
    4833             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    4834             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    4835             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
    4836             :         GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
    4837             :         GIR_EraseFromParent, /*InsnID*/0,
    4838             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4839             :         // GIR_Coverage, 1878,
    4840             :         GIR_Done,
    4841             :       // Label 281: @10548
    4842             :       GIM_Reject,
    4843             :     // Label 274: @10549
    4844             :     GIM_Reject,
    4845             :     // Label 263: @10550
    4846             :     GIM_Try, /*On fail goto*//*Label 282*/ 10581, // Rule ID 960 //
    4847             :       GIM_CheckFeatures, GIFBS_HasNEON,
    4848             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    4849             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    4850             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    4851             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4852             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4853             :       // (mul:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)  =>  (MULv2i32:{ *:[v2i32] } V64:{ *:[v2i32] }:$Rn, V64:{ *:[v2i32] }:$Rm)
    4854             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::MULv2i32,
    4855             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4856             :       // GIR_Coverage, 960,
    4857             :       GIR_Done,
    4858             :     // Label 282: @10581
    4859             :     GIM_Reject,
    4860             :     // Label 264: @10582
    4861             :     GIM_Try, /*On fail goto*//*Label 283*/ 10613, // Rule ID 958 //
    4862             :       GIM_CheckFeatures, GIFBS_HasNEON,
    4863             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    4864             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    4865             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    4866             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4867             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4868             :       // (mul:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)  =>  (MULv4i16:{ *:[v4i16] } V64:{ *:[v4i16] }:$Rn, V64:{ *:[v4i16] }:$Rm)
    4869             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::MULv4i16,
    4870             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4871             :       // GIR_Coverage, 958,
    4872             :       GIR_Done,
    4873             :     // Label 283: @10613
    4874             :     GIM_Reject,
    4875             :     // Label 265: @10614
    4876             :     GIM_Try, /*On fail goto*//*Label 284*/ 10645, // Rule ID 961 //
    4877             :       GIM_CheckFeatures, GIFBS_HasNEON,
    4878             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    4879             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    4880             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    4881             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4882             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    4883             :       // (mul:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)  =>  (MULv4i32:{ *:[v4i32] } V128:{ *:[v4i32] }:$Rn, V128:{ *:[v4i32] }:$Rm)
    4884             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::MULv4i32,
    4885             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4886             :       // GIR_Coverage, 961,
    4887             :       GIR_Done,
    4888             :     // Label 284: @10645
    4889             :     GIM_Reject,
    4890             :     // Label 266: @10646
    4891             :     GIM_Try, /*On fail goto*//*Label 285*/ 10677, // Rule ID 956 //
    4892             :       GIM_CheckFeatures, GIFBS_HasNEON,
    4893             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    4894             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
    4895             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    4896             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    4897             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    4898             :       // (mul:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (MULv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    4899             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::MULv8i8,
    4900             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4901             :       // GIR_Coverage, 956,
    4902             :       GIR_Done,
    4903             :     // Label 285: @10677
    4904             :     GIM_Reject,
    4905             :     // Label 267: @10678
    4906             :     GIM_Try, /*On fail goto*//*Label 286*/ 10709, // Rule ID 959 //
    4907             :       GIM_CheckFeatures, GIFBS_HasNEON,
    4908             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    4909             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    4910             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    4911             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4912             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    4913             :       // (mul:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)  =>  (MULv8i16:{ *:[v8i16] } V128:{ *:[v8i16] }:$Rn, V128:{ *:[v8i16] }:$Rm)
    4914             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::MULv8i16,
    4915             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4916             :       // GIR_Coverage, 959,
    4917             :       GIR_Done,
    4918             :     // Label 286: @10709
    4919             :     GIM_Reject,
    4920             :     // Label 268: @10710
    4921             :     GIM_Try, /*On fail goto*//*Label 287*/ 10741, // Rule ID 957 //
    4922             :       GIM_CheckFeatures, GIFBS_HasNEON,
    4923             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    4924             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    4925             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    4926             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    4927             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    4928             :       // (mul:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (MULv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
    4929             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::MULv16i8,
    4930             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4931             :       // GIR_Coverage, 957,
    4932             :       GIR_Done,
    4933             :     // Label 287: @10741
    4934             :     GIM_Reject,
    4935             :     // Label 269: @10742
    4936             :     GIM_Reject,
    4937             :     // Label 3: @10743
    4938             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 3, /*)*//*default:*//*Label 290*/ 10811,
    4939             :     /*GILLT_s32*//*Label 288*/ 10751,
    4940             :     /*GILLT_s64*//*Label 289*/ 10781,
    4941             :     // Label 288: @10751
    4942             :     GIM_Try, /*On fail goto*//*Label 291*/ 10780, // Rule ID 59 //
    4943             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    4944             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    4945             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    4946             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    4947             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    4948             :       // (sdiv:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)  =>  (SDIVWr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
    4949             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SDIVWr,
    4950             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4951             :       // GIR_Coverage, 59,
    4952             :       GIR_Done,
    4953             :     // Label 291: @10780
    4954             :     GIM_Reject,
    4955             :     // Label 289: @10781
    4956             :     GIM_Try, /*On fail goto*//*Label 292*/ 10810, // Rule ID 60 //
    4957             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    4958             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    4959             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    4960             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    4961             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    4962             :       // (sdiv:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)  =>  (SDIVXr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
    4963             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::SDIVXr,
    4964             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4965             :       // GIR_Coverage, 60,
    4966             :       GIR_Done,
    4967             :     // Label 292: @10810
    4968             :     GIM_Reject,
    4969             :     // Label 290: @10811
    4970             :     GIM_Reject,
    4971             :     // Label 4: @10812
    4972             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 3, /*)*//*default:*//*Label 295*/ 10880,
    4973             :     /*GILLT_s32*//*Label 293*/ 10820,
    4974             :     /*GILLT_s64*//*Label 294*/ 10850,
    4975             :     // Label 293: @10820
    4976             :     GIM_Try, /*On fail goto*//*Label 296*/ 10849, // Rule ID 57 //
    4977             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    4978             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    4979             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    4980             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    4981             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    4982             :       // (udiv:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)  =>  (UDIVWr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
    4983             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::UDIVWr,
    4984             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4985             :       // GIR_Coverage, 57,
    4986             :       GIR_Done,
    4987             :     // Label 296: @10849
    4988             :     GIM_Reject,
    4989             :     // Label 294: @10850
    4990             :     GIM_Try, /*On fail goto*//*Label 297*/ 10879, // Rule ID 58 //
    4991             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    4992             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    4993             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    4994             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    4995             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    4996             :       // (udiv:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)  =>  (UDIVXr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
    4997             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::UDIVXr,
    4998             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4999             :       // GIR_Coverage, 58,
    5000             :       GIR_Done,
    5001             :     // Label 297: @10879
    5002             :     GIM_Reject,
    5003             :     // Label 295: @10880
    5004             :     GIM_Reject,
    5005             :     // Label 5: @10881
    5006             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 11, /*)*//*default:*//*Label 307*/ 11422,
    5007             :     /*GILLT_s32*//*Label 298*/ 10897,
    5008             :     /*GILLT_s64*//*Label 299*/ 11032, 0,
    5009             :     /*GILLT_v2s32*//*Label 300*/ 11198,
    5010             :     /*GILLT_v2s64*//*Label 301*/ 11230,
    5011             :     /*GILLT_v4s16*//*Label 302*/ 11262,
    5012             :     /*GILLT_v4s32*//*Label 303*/ 11294,
    5013             :     /*GILLT_v8s8*//*Label 304*/ 11326,
    5014             :     /*GILLT_v8s16*//*Label 305*/ 11358,
    5015             :     /*GILLT_v16s8*//*Label 306*/ 11390,
    5016             :     // Label 298: @10897
    5017             :     GIM_Try, /*On fail goto*//*Label 308*/ 11031,
    5018             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    5019             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    5020             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    5021             :       GIM_Try, /*On fail goto*//*Label 309*/ 10962, // Rule ID 3810 //
    5022             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    5023             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5024             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    5025             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    5026             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5027             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5028             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    5029             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    5030             :         // (and:{ *:[i32] } (xor:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, -1:{ *:[i32] }), GPR32:{ *:[i32] }:$Rn)  =>  (BICWrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
    5031             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::BICWrr,
    5032             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5033             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5034             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    5035             :         GIR_EraseFromParent, /*InsnID*/0,
    5036             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5037             :         // GIR_Coverage, 3810,
    5038             :         GIR_Done,
    5039             :       // Label 309: @10962
    5040             :       GIM_Try, /*On fail goto*//*Label 310*/ 11013, // Rule ID 99 //
    5041             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5042             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    5043             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5044             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    5045             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    5046             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5047             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5048             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    5049             :         // (and:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, (xor:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, -1:{ *:[i32] }))  =>  (BICWrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
    5050             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::BICWrr,
    5051             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5052             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    5053             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    5054             :         GIR_EraseFromParent, /*InsnID*/0,
    5055             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5056             :         // GIR_Coverage, 99,
    5057             :         GIR_Done,
    5058             :       // Label 310: @11013
    5059             :       GIM_Try, /*On fail goto*//*Label 311*/ 11030, // Rule ID 95 //
    5060             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5061             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    5062             :         // (and:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)  =>  (ANDWrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
    5063             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ANDWrr,
    5064             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5065             :         // GIR_Coverage, 95,
    5066             :         GIR_Done,
    5067             :       // Label 311: @11030
    5068             :       GIM_Reject,
    5069             :     // Label 308: @11031
    5070             :     GIM_Reject,
    5071             :     // Label 299: @11032
    5072             :     GIM_Try, /*On fail goto*//*Label 312*/ 11197,
    5073             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    5074             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    5075             :       GIM_Try, /*On fail goto*//*Label 313*/ 11097, // Rule ID 3811 //
    5076             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5077             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    5078             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5079             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    5080             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    5081             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5082             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5083             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    5084             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    5085             :         // (and:{ *:[i64] } (xor:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, -1:{ *:[i64] }), GPR64:{ *:[i64] }:$Rn)  =>  (BICXrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
    5086             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::BICXrr,
    5087             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5088             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5089             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    5090             :         GIR_EraseFromParent, /*InsnID*/0,
    5091             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5092             :         // GIR_Coverage, 3811,
    5093             :         GIR_Done,
    5094             :       // Label 313: @11097
    5095             :       GIM_Try, /*On fail goto*//*Label 314*/ 11152, // Rule ID 100 //
    5096             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5097             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5098             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    5099             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5100             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    5101             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    5102             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5103             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5104             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    5105             :         // (and:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, (xor:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, -1:{ *:[i64] }))  =>  (BICXrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
    5106             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::BICXrr,
    5107             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5108             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    5109             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    5110             :         GIR_EraseFromParent, /*InsnID*/0,
    5111             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5112             :         // GIR_Coverage, 100,
    5113             :         GIR_Done,
    5114             :       // Label 314: @11152
    5115             :       GIM_Try, /*On fail goto*//*Label 315*/ 11173, // Rule ID 96 //
    5116             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5117             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5118             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    5119             :         // (and:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)  =>  (ANDXrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
    5120             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ANDXrr,
    5121             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5122             :         // GIR_Coverage, 96,
    5123             :         GIR_Done,
    5124             :       // Label 315: @11173
    5125             :       GIM_Try, /*On fail goto*//*Label 316*/ 11196, // Rule ID 1773 //
    5126             :         GIM_CheckFeatures, GIFBS_HasNEON,
    5127             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5128             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5129             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5130             :         // (and:{ *:[v1i64] } V64:{ *:[v1i64] }:$LHS, V64:{ *:[v1i64] }:$RHS)  =>  (ANDv8i8:{ *:[v1i64] } V64:{ *:[v1i64] }:$LHS, V64:{ *:[v1i64] }:$RHS)
    5131             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ANDv8i8,
    5132             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5133             :         // GIR_Coverage, 1773,
    5134             :         GIR_Done,
    5135             :       // Label 316: @11196
    5136             :       GIM_Reject,
    5137             :     // Label 312: @11197
    5138             :     GIM_Reject,
    5139             :     // Label 300: @11198
    5140             :     GIM_Try, /*On fail goto*//*Label 317*/ 11229, // Rule ID 1772 //
    5141             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5142             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    5143             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    5144             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5145             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5146             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5147             :       // (and:{ *:[v2i32] } V64:{ *:[v2i32] }:$LHS, V64:{ *:[v2i32] }:$RHS)  =>  (ANDv8i8:{ *:[v2i32] } V64:{ *:[v2i32] }:$LHS, V64:{ *:[v2i32] }:$RHS)
    5148             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ANDv8i8,
    5149             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5150             :       // GIR_Coverage, 1772,
    5151             :       GIR_Done,
    5152             :     // Label 317: @11229
    5153             :     GIM_Reject,
    5154             :     // Label 301: @11230
    5155             :     GIM_Try, /*On fail goto*//*Label 318*/ 11261, // Rule ID 1776 //
    5156             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5157             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    5158             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    5159             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5160             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    5161             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5162             :       // (and:{ *:[v2i64] } V128:{ *:[v2i64] }:$LHS, V128:{ *:[v2i64] }:$RHS)  =>  (ANDv16i8:{ *:[v2i64] } V128:{ *:[v2i64] }:$LHS, V128:{ *:[v2i64] }:$RHS)
    5163             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ANDv16i8,
    5164             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5165             :       // GIR_Coverage, 1776,
    5166             :       GIR_Done,
    5167             :     // Label 318: @11261
    5168             :     GIM_Reject,
    5169             :     // Label 302: @11262
    5170             :     GIM_Try, /*On fail goto*//*Label 319*/ 11293, // Rule ID 1771 //
    5171             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5172             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    5173             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    5174             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5175             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5176             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5177             :       // (and:{ *:[v4i16] } V64:{ *:[v4i16] }:$LHS, V64:{ *:[v4i16] }:$RHS)  =>  (ANDv8i8:{ *:[v4i16] } V64:{ *:[v4i16] }:$LHS, V64:{ *:[v4i16] }:$RHS)
    5178             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ANDv8i8,
    5179             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5180             :       // GIR_Coverage, 1771,
    5181             :       GIR_Done,
    5182             :     // Label 319: @11293
    5183             :     GIM_Reject,
    5184             :     // Label 303: @11294
    5185             :     GIM_Try, /*On fail goto*//*Label 320*/ 11325, // Rule ID 1775 //
    5186             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5187             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    5188             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    5189             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5190             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    5191             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5192             :       // (and:{ *:[v4i32] } V128:{ *:[v4i32] }:$LHS, V128:{ *:[v4i32] }:$RHS)  =>  (ANDv16i8:{ *:[v4i32] } V128:{ *:[v4i32] }:$LHS, V128:{ *:[v4i32] }:$RHS)
    5193             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ANDv16i8,
    5194             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5195             :       // GIR_Coverage, 1775,
    5196             :       GIR_Done,
    5197             :     // Label 320: @11325
    5198             :     GIM_Reject,
    5199             :     // Label 304: @11326
    5200             :     GIM_Try, /*On fail goto*//*Label 321*/ 11357, // Rule ID 1179 //
    5201             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5202             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    5203             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
    5204             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5205             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5206             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5207             :       // (and:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (ANDv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    5208             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ANDv8i8,
    5209             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5210             :       // GIR_Coverage, 1179,
    5211             :       GIR_Done,
    5212             :     // Label 321: @11357
    5213             :     GIM_Reject,
    5214             :     // Label 305: @11358
    5215             :     GIM_Try, /*On fail goto*//*Label 322*/ 11389, // Rule ID 1774 //
    5216             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5217             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    5218             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    5219             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5220             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    5221             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5222             :       // (and:{ *:[v8i16] } V128:{ *:[v8i16] }:$LHS, V128:{ *:[v8i16] }:$RHS)  =>  (ANDv16i8:{ *:[v8i16] } V128:{ *:[v8i16] }:$LHS, V128:{ *:[v8i16] }:$RHS)
    5223             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ANDv16i8,
    5224             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5225             :       // GIR_Coverage, 1774,
    5226             :       GIR_Done,
    5227             :     // Label 322: @11389
    5228             :     GIM_Reject,
    5229             :     // Label 306: @11390
    5230             :     GIM_Try, /*On fail goto*//*Label 323*/ 11421, // Rule ID 1180 //
    5231             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5232             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    5233             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    5234             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5235             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    5236             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5237             :       // (and:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (ANDv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
    5238             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ANDv16i8,
    5239             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5240             :       // GIR_Coverage, 1180,
    5241             :       GIR_Done,
    5242             :     // Label 323: @11421
    5243             :     GIM_Reject,
    5244             :     // Label 307: @11422
    5245             :     GIM_Reject,
    5246             :     // Label 6: @11423
    5247             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 11, /*)*//*default:*//*Label 333*/ 11964,
    5248             :     /*GILLT_s32*//*Label 324*/ 11439,
    5249             :     /*GILLT_s64*//*Label 325*/ 11574, 0,
    5250             :     /*GILLT_v2s32*//*Label 326*/ 11740,
    5251             :     /*GILLT_v2s64*//*Label 327*/ 11772,
    5252             :     /*GILLT_v4s16*//*Label 328*/ 11804,
    5253             :     /*GILLT_v4s32*//*Label 329*/ 11836,
    5254             :     /*GILLT_v8s8*//*Label 330*/ 11868,
    5255             :     /*GILLT_v8s16*//*Label 331*/ 11900,
    5256             :     /*GILLT_v16s8*//*Label 332*/ 11932,
    5257             :     // Label 324: @11439
    5258             :     GIM_Try, /*On fail goto*//*Label 334*/ 11573,
    5259             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    5260             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    5261             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    5262             :       GIM_Try, /*On fail goto*//*Label 335*/ 11504, // Rule ID 3830 //
    5263             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    5264             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5265             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    5266             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    5267             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5268             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5269             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    5270             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    5271             :         // (or:{ *:[i32] } (xor:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, -1:{ *:[i32] }), GPR32:{ *:[i32] }:$Rn)  =>  (ORNWrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
    5272             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ORNWrr,
    5273             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5274             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5275             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    5276             :         GIR_EraseFromParent, /*InsnID*/0,
    5277             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5278             :         // GIR_Coverage, 3830,
    5279             :         GIR_Done,
    5280             :       // Label 335: @11504
    5281             :       GIM_Try, /*On fail goto*//*Label 336*/ 11555, // Rule ID 111 //
    5282             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5283             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    5284             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5285             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    5286             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    5287             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5288             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5289             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    5290             :         // (or:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, (xor:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, -1:{ *:[i32] }))  =>  (ORNWrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
    5291             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ORNWrr,
    5292             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5293             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    5294             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    5295             :         GIR_EraseFromParent, /*InsnID*/0,
    5296             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5297             :         // GIR_Coverage, 111,
    5298             :         GIR_Done,
    5299             :       // Label 336: @11555
    5300             :       GIM_Try, /*On fail goto*//*Label 337*/ 11572, // Rule ID 115 //
    5301             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5302             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    5303             :         // (or:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)  =>  (ORRWrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
    5304             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ORRWrr,
    5305             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5306             :         // GIR_Coverage, 115,
    5307             :         GIR_Done,
    5308             :       // Label 337: @11572
    5309             :       GIM_Reject,
    5310             :     // Label 334: @11573
    5311             :     GIM_Reject,
    5312             :     // Label 325: @11574
    5313             :     GIM_Try, /*On fail goto*//*Label 338*/ 11739,
    5314             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    5315             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    5316             :       GIM_Try, /*On fail goto*//*Label 339*/ 11639, // Rule ID 3831 //
    5317             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5318             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    5319             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5320             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    5321             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    5322             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5323             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5324             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    5325             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    5326             :         // (or:{ *:[i64] } (xor:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, -1:{ *:[i64] }), GPR64:{ *:[i64] }:$Rn)  =>  (ORNXrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
    5327             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ORNXrr,
    5328             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5329             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rn
    5330             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    5331             :         GIR_EraseFromParent, /*InsnID*/0,
    5332             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5333             :         // GIR_Coverage, 3831,
    5334             :         GIR_Done,
    5335             :       // Label 339: @11639
    5336             :       GIM_Try, /*On fail goto*//*Label 340*/ 11694, // Rule ID 112 //
    5337             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5338             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5339             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    5340             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5341             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    5342             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    5343             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5344             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5345             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    5346             :         // (or:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, (xor:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, -1:{ *:[i64] }))  =>  (ORNXrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
    5347             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ORNXrr,
    5348             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5349             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rn
    5350             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rm
    5351             :         GIR_EraseFromParent, /*InsnID*/0,
    5352             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5353             :         // GIR_Coverage, 112,
    5354             :         GIR_Done,
    5355             :       // Label 340: @11694
    5356             :       GIM_Try, /*On fail goto*//*Label 341*/ 11715, // Rule ID 116 //
    5357             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5358             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5359             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    5360             :         // (or:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)  =>  (ORRXrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
    5361             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ORRXrr,
    5362             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5363             :         // GIR_Coverage, 116,
    5364             :         GIR_Done,
    5365             :       // Label 341: @11715
    5366             :       GIM_Try, /*On fail goto*//*Label 342*/ 11738, // Rule ID 2405 //
    5367             :         GIM_CheckFeatures, GIFBS_HasNEON,
    5368             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5369             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5370             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5371             :         // (or:{ *:[v1i64] } V64:{ *:[v1i64] }:$LHS, V64:{ *:[v1i64] }:$RHS)  =>  (ORRv8i8:{ *:[v1i64] } V64:{ *:[v1i64] }:$LHS, V64:{ *:[v1i64] }:$RHS)
    5372             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ORRv8i8,
    5373             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5374             :         // GIR_Coverage, 2405,
    5375             :         GIR_Done,
    5376             :       // Label 342: @11738
    5377             :       GIM_Reject,
    5378             :     // Label 338: @11739
    5379             :     GIM_Reject,
    5380             :     // Label 326: @11740
    5381             :     GIM_Try, /*On fail goto*//*Label 343*/ 11771, // Rule ID 2404 //
    5382             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5383             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    5384             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    5385             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5386             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5387             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5388             :       // (or:{ *:[v2i32] } V64:{ *:[v2i32] }:$LHS, V64:{ *:[v2i32] }:$RHS)  =>  (ORRv8i8:{ *:[v2i32] } V64:{ *:[v2i32] }:$LHS, V64:{ *:[v2i32] }:$RHS)
    5389             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ORRv8i8,
    5390             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5391             :       // GIR_Coverage, 2404,
    5392             :       GIR_Done,
    5393             :     // Label 343: @11771
    5394             :     GIM_Reject,
    5395             :     // Label 327: @11772
    5396             :     GIM_Try, /*On fail goto*//*Label 344*/ 11803, // Rule ID 2408 //
    5397             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5398             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    5399             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    5400             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5401             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    5402             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5403             :       // (or:{ *:[v2i64] } V128:{ *:[v2i64] }:$LHS, V128:{ *:[v2i64] }:$RHS)  =>  (ORRv16i8:{ *:[v2i64] } V128:{ *:[v2i64] }:$LHS, V128:{ *:[v2i64] }:$RHS)
    5404             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ORRv16i8,
    5405             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5406             :       // GIR_Coverage, 2408,
    5407             :       GIR_Done,
    5408             :     // Label 344: @11803
    5409             :     GIM_Reject,
    5410             :     // Label 328: @11804
    5411             :     GIM_Try, /*On fail goto*//*Label 345*/ 11835, // Rule ID 2403 //
    5412             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5413             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    5414             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    5415             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5416             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5417             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5418             :       // (or:{ *:[v4i16] } V64:{ *:[v4i16] }:$LHS, V64:{ *:[v4i16] }:$RHS)  =>  (ORRv8i8:{ *:[v4i16] } V64:{ *:[v4i16] }:$LHS, V64:{ *:[v4i16] }:$RHS)
    5419             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ORRv8i8,
    5420             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5421             :       // GIR_Coverage, 2403,
    5422             :       GIR_Done,
    5423             :     // Label 345: @11835
    5424             :     GIM_Reject,
    5425             :     // Label 329: @11836
    5426             :     GIM_Try, /*On fail goto*//*Label 346*/ 11867, // Rule ID 2407 //
    5427             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5428             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    5429             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    5430             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5431             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    5432             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5433             :       // (or:{ *:[v4i32] } V128:{ *:[v4i32] }:$LHS, V128:{ *:[v4i32] }:$RHS)  =>  (ORRv16i8:{ *:[v4i32] } V128:{ *:[v4i32] }:$LHS, V128:{ *:[v4i32] }:$RHS)
    5434             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ORRv16i8,
    5435             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5436             :       // GIR_Coverage, 2407,
    5437             :       GIR_Done,
    5438             :     // Label 346: @11867
    5439             :     GIM_Reject,
    5440             :     // Label 330: @11868
    5441             :     GIM_Try, /*On fail goto*//*Label 347*/ 11899, // Rule ID 1191 //
    5442             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5443             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    5444             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
    5445             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5446             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5447             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5448             :       // (or:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (ORRv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    5449             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ORRv8i8,
    5450             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5451             :       // GIR_Coverage, 1191,
    5452             :       GIR_Done,
    5453             :     // Label 347: @11899
    5454             :     GIM_Reject,
    5455             :     // Label 331: @11900
    5456             :     GIM_Try, /*On fail goto*//*Label 348*/ 11931, // Rule ID 2406 //
    5457             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5458             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    5459             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    5460             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5461             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    5462             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5463             :       // (or:{ *:[v8i16] } V128:{ *:[v8i16] }:$LHS, V128:{ *:[v8i16] }:$RHS)  =>  (ORRv16i8:{ *:[v8i16] } V128:{ *:[v8i16] }:$LHS, V128:{ *:[v8i16] }:$RHS)
    5464             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ORRv16i8,
    5465             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5466             :       // GIR_Coverage, 2406,
    5467             :       GIR_Done,
    5468             :     // Label 348: @11931
    5469             :     GIM_Reject,
    5470             :     // Label 332: @11932
    5471             :     GIM_Try, /*On fail goto*//*Label 349*/ 11963, // Rule ID 1192 //
    5472             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5473             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    5474             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    5475             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5476             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    5477             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5478             :       // (or:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (ORRv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
    5479             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::ORRv16i8,
    5480             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5481             :       // GIR_Coverage, 1192,
    5482             :       GIR_Done,
    5483             :     // Label 349: @11963
    5484             :     GIM_Reject,
    5485             :     // Label 333: @11964
    5486             :     GIM_Reject,
    5487             :     // Label 7: @11965
    5488             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 11, /*)*//*default:*//*Label 359*/ 12674,
    5489             :     /*GILLT_s32*//*Label 350*/ 11981,
    5490             :     /*GILLT_s64*//*Label 351*/ 12196, 0,
    5491             :     /*GILLT_v2s32*//*Label 352*/ 12450,
    5492             :     /*GILLT_v2s64*//*Label 353*/ 12482,
    5493             :     /*GILLT_v4s16*//*Label 354*/ 12514,
    5494             :     /*GILLT_v4s32*//*Label 355*/ 12546,
    5495             :     /*GILLT_v8s8*//*Label 356*/ 12578,
    5496             :     /*GILLT_v8s16*//*Label 357*/ 12610,
    5497             :     /*GILLT_v16s8*//*Label 358*/ 12642,
    5498             :     // Label 350: @11981
    5499             :     GIM_Try, /*On fail goto*//*Label 360*/ 12195,
    5500             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    5501             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    5502             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    5503             :       GIM_Try, /*On fail goto*//*Label 361*/ 12046, // Rule ID 3814 //
    5504             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    5505             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5506             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    5507             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    5508             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5509             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5510             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    5511             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    5512             :         // (xor:{ *:[i32] } (xor:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, -1:{ *:[i32] }), GPR32:{ *:[i32] }:$Rm)  =>  (EONWrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
    5513             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EONWrr,
    5514             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5515             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    5516             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
    5517             :         GIR_EraseFromParent, /*InsnID*/0,
    5518             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5519             :         // GIR_Coverage, 3814,
    5520             :         GIR_Done,
    5521             :       // Label 361: @12046
    5522             :       GIM_Try, /*On fail goto*//*Label 362*/ 12097, // Rule ID 103 //
    5523             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    5524             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5525             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    5526             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    5527             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5528             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    5529             :         GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
    5530             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    5531             :         // (xor:{ *:[i32] } (xor:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm), -1:{ *:[i32] })  =>  (EONWrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
    5532             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EONWrr,
    5533             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5534             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    5535             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    5536             :         GIR_EraseFromParent, /*InsnID*/0,
    5537             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5538             :         // GIR_Coverage, 103,
    5539             :         GIR_Done,
    5540             :       // Label 362: @12097
    5541             :       GIM_Try, /*On fail goto*//*Label 363*/ 12148, // Rule ID 3815 //
    5542             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5543             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    5544             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5545             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    5546             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    5547             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5548             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5549             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    5550             :         // (xor:{ *:[i32] } GPR32:{ *:[i32] }:$Rm, (xor:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, -1:{ *:[i32] }))  =>  (EONWrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
    5551             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EONWrr,
    5552             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5553             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    5554             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rm
    5555             :         GIR_EraseFromParent, /*InsnID*/0,
    5556             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5557             :         // GIR_Coverage, 3815,
    5558             :         GIR_Done,
    5559             :       // Label 363: @12148
    5560             :       GIM_Try, /*On fail goto*//*Label 364*/ 12177, // Rule ID 1899 //
    5561             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5562             :         GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
    5563             :         // (xor:{ *:[i32] } GPR32:{ *:[i32] }:$Wm, -1:{ *:[i32] })  =>  (ORNWrr:{ *:[i32] } WZR:{ *:[i32] }, GPR32:{ *:[i32] }:$Wm)
    5564             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ORNWrr,
    5565             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5566             :         GIR_AddRegister, /*InsnID*/0, AArch64::WZR,
    5567             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Wm
    5568             :         GIR_EraseFromParent, /*InsnID*/0,
    5569             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5570             :         // GIR_Coverage, 1899,
    5571             :         GIR_Done,
    5572             :       // Label 364: @12177
    5573             :       GIM_Try, /*On fail goto*//*Label 365*/ 12194, // Rule ID 107 //
    5574             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5575             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR32RegClassID,
    5576             :         // (xor:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)  =>  (EORWrr:{ *:[i32] } GPR32:{ *:[i32] }:$Rn, GPR32:{ *:[i32] }:$Rm)
    5577             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::EORWrr,
    5578             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5579             :         // GIR_Coverage, 107,
    5580             :         GIR_Done,
    5581             :       // Label 365: @12194
    5582             :       GIM_Reject,
    5583             :     // Label 360: @12195
    5584             :     GIM_Reject,
    5585             :     // Label 351: @12196
    5586             :     GIM_Try, /*On fail goto*//*Label 366*/ 12449,
    5587             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    5588             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    5589             :       GIM_Try, /*On fail goto*//*Label 367*/ 12261, // Rule ID 3816 //
    5590             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5591             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    5592             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5593             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    5594             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    5595             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5596             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5597             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    5598             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    5599             :         // (xor:{ *:[i64] } (xor:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, -1:{ *:[i64] }), GPR64:{ *:[i64] }:$Rm)  =>  (EONXrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
    5600             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EONXrr,
    5601             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5602             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    5603             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // Rm
    5604             :         GIR_EraseFromParent, /*InsnID*/0,
    5605             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5606             :         // GIR_Coverage, 3816,
    5607             :         GIR_Done,
    5608             :       // Label 367: @12261
    5609             :       GIM_Try, /*On fail goto*//*Label 368*/ 12316, // Rule ID 104 //
    5610             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5611             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    5612             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5613             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    5614             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    5615             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5616             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    5617             :         GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
    5618             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    5619             :         // (xor:{ *:[i64] } (xor:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm), -1:{ *:[i64] })  =>  (EONXrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
    5620             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EONXrr,
    5621             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5622             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    5623             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // Rm
    5624             :         GIR_EraseFromParent, /*InsnID*/0,
    5625             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5626             :         // GIR_Coverage, 104,
    5627             :         GIR_Done,
    5628             :       // Label 368: @12316
    5629             :       GIM_Try, /*On fail goto*//*Label 369*/ 12371, // Rule ID 3817 //
    5630             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5631             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5632             :         GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    5633             :         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5634             :         GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    5635             :         GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    5636             :         GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5637             :         GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5638             :         GIM_CheckIsSafeToFold, /*InsnID*/1,
    5639             :         // (xor:{ *:[i64] } GPR64:{ *:[i64] }:$Rm, (xor:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, -1:{ *:[i64] }))  =>  (EONXrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
    5640             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EONXrr,
    5641             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5642             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // Rn
    5643             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Rm
    5644             :         GIR_EraseFromParent, /*InsnID*/0,
    5645             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5646             :         // GIR_Coverage, 3817,
    5647             :         GIR_Done,
    5648             :       // Label 369: @12371
    5649             :       GIM_Try, /*On fail goto*//*Label 370*/ 12404, // Rule ID 1900 //
    5650             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5651             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5652             :         GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
    5653             :         // (xor:{ *:[i64] } GPR64:{ *:[i64] }:$Xm, -1:{ *:[i64] })  =>  (ORNXrr:{ *:[i64] } XZR:{ *:[i64] }, GPR64:{ *:[i64] }:$Xm)
    5654             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::ORNXrr,
    5655             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5656             :         GIR_AddRegister, /*InsnID*/0, AArch64::XZR,
    5657             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // Xm
    5658             :         GIR_EraseFromParent, /*InsnID*/0,
    5659             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5660             :         // GIR_Coverage, 1900,
    5661             :         GIR_Done,
    5662             :       // Label 370: @12404
    5663             :       GIM_Try, /*On fail goto*//*Label 371*/ 12425, // Rule ID 108 //
    5664             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5665             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5666             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::GPR64RegClassID,
    5667             :         // (xor:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)  =>  (EORXrr:{ *:[i64] } GPR64:{ *:[i64] }:$Rn, GPR64:{ *:[i64] }:$Rm)
    5668             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::EORXrr,
    5669             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5670             :         // GIR_Coverage, 108,
    5671             :         GIR_Done,
    5672             :       // Label 371: @12425
    5673             :       GIM_Try, /*On fail goto*//*Label 372*/ 12448, // Rule ID 2393 //
    5674             :         GIM_CheckFeatures, GIFBS_HasNEON,
    5675             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5676             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5677             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5678             :         // (xor:{ *:[v1i64] } V64:{ *:[v1i64] }:$LHS, V64:{ *:[v1i64] }:$RHS)  =>  (EORv8i8:{ *:[v1i64] } V64:{ *:[v1i64] }:$LHS, V64:{ *:[v1i64] }:$RHS)
    5679             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::EORv8i8,
    5680             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5681             :         // GIR_Coverage, 2393,
    5682             :         GIR_Done,
    5683             :       // Label 372: @12448
    5684             :       GIM_Reject,
    5685             :     // Label 366: @12449
    5686             :     GIM_Reject,
    5687             :     // Label 352: @12450
    5688             :     GIM_Try, /*On fail goto*//*Label 373*/ 12481, // Rule ID 2392 //
    5689             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5690             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    5691             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s32,
    5692             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5693             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5694             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5695             :       // (xor:{ *:[v2i32] } V64:{ *:[v2i32] }:$LHS, V64:{ *:[v2i32] }:$RHS)  =>  (EORv8i8:{ *:[v2i32] } V64:{ *:[v2i32] }:$LHS, V64:{ *:[v2i32] }:$RHS)
    5696             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::EORv8i8,
    5697             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5698             :       // GIR_Coverage, 2392,
    5699             :       GIR_Done,
    5700             :     // Label 373: @12481
    5701             :     GIM_Reject,
    5702             :     // Label 353: @12482
    5703             :     GIM_Try, /*On fail goto*//*Label 374*/ 12513, // Rule ID 2396 //
    5704             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5705             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    5706             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    5707             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5708             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    5709             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5710             :       // (xor:{ *:[v2i64] } V128:{ *:[v2i64] }:$LHS, V128:{ *:[v2i64] }:$RHS)  =>  (EORv16i8:{ *:[v2i64] } V128:{ *:[v2i64] }:$LHS, V128:{ *:[v2i64] }:$RHS)
    5711             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::EORv16i8,
    5712             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5713             :       // GIR_Coverage, 2396,
    5714             :       GIR_Done,
    5715             :     // Label 374: @12513
    5716             :     GIM_Reject,
    5717             :     // Label 354: @12514
    5718             :     GIM_Try, /*On fail goto*//*Label 375*/ 12545, // Rule ID 2391 //
    5719             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5720             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    5721             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s16,
    5722             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5723             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5724             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5725             :       // (xor:{ *:[v4i16] } V64:{ *:[v4i16] }:$LHS, V64:{ *:[v4i16] }:$RHS)  =>  (EORv8i8:{ *:[v4i16] } V64:{ *:[v4i16] }:$LHS, V64:{ *:[v4i16] }:$RHS)
    5726             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::EORv8i8,
    5727             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5728             :       // GIR_Coverage, 2391,
    5729             :       GIR_Done,
    5730             :     // Label 375: @12545
    5731             :     GIM_Reject,
    5732             :     // Label 355: @12546
    5733             :     GIM_Try, /*On fail goto*//*Label 376*/ 12577, // Rule ID 2395 //
    5734             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5735             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    5736             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    5737             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5738             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    5739             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5740             :       // (xor:{ *:[v4i32] } V128:{ *:[v4i32] }:$LHS, V128:{ *:[v4i32] }:$RHS)  =>  (EORv16i8:{ *:[v4i32] } V128:{ *:[v4i32] }:$LHS, V128:{ *:[v4i32] }:$RHS)
    5741             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::EORv16i8,
    5742             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5743             :       // GIR_Coverage, 2395,
    5744             :       GIR_Done,
    5745             :     // Label 376: @12577
    5746             :     GIM_Reject,
    5747             :     // Label 356: @12578
    5748             :     GIM_Try, /*On fail goto*//*Label 377*/ 12609, // Rule ID 1187 //
    5749             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5750             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    5751             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s8,
    5752             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5753             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5754             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR64RegClassID,
    5755             :       // (xor:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)  =>  (EORv8i8:{ *:[v8i8] } V64:{ *:[v8i8] }:$Rn, V64:{ *:[v8i8] }:$Rm)
    5756             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::EORv8i8,
    5757             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5758             :       // GIR_Coverage, 1187,
    5759             :       GIR_Done,
    5760             :     // Label 377: @12609
    5761             :     GIM_Reject,
    5762             :     // Label 357: @12610
    5763             :     GIM_Try, /*On fail goto*//*Label 378*/ 12641, // Rule ID 2394 //
    5764             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5765             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    5766             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    5767             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5768             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    5769             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5770             :       // (xor:{ *:[v8i16] } V128:{ *:[v8i16] }:$LHS, V128:{ *:[v8i16] }:$RHS)  =>  (EORv16i8:{ *:[v8i16] } V128:{ *:[v8i16] }:$LHS, V128:{ *:[v8i16] }:$RHS)
    5771             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::EORv16i8,
    5772             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5773             :       // GIR_Coverage, 2394,
    5774             :       GIR_Done,
    5775             :     // Label 378: @12641
    5776             :     GIM_Reject,
    5777             :     // Label 358: @12642
    5778             :     GIM_Try, /*On fail goto*//*Label 379*/ 12673, // Rule ID 1188 //
    5779             :       GIM_CheckFeatures, GIFBS_HasNEON,
    5780             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    5781             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    5782             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    5783             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    5784             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::FPR128RegClassID,
    5785             :       // (xor:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)  =>  (EORv16i8:{ *:[v16i8] } V128:{ *:[v16i8] }:$Rn, V128:{ *:[v16i8] }:$Rm)
    5786             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::EORv16i8,
    5787             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5788             :       // GIR_Coverage, 1188,
    5789             :       GIR_Done,
    5790             :     // Label 379: @12673
    5791             :     GIM_Reject,
    5792             :     // Label 359: @12674
    5793             :     GIM_Reject,
    5794             :     // Label 8: @12675
    5795             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 11, /*)*//*default:*//*Label 390*/ 20167,
    5796             :     /*GILLT_s32*//*Label 380*/ 12691,
    5797             :     /*GILLT_s64*//*Label 381*/ 12737,
    5798             :     /*GILLT_s128*//*Label 382*/ 14313,
    5799             :     /*GILLT_v2s32*//*Label 383*/ 14985,
    5800             :     /*GILLT_v2s64*//*Label 384*/ 15880,
    5801             :     /*GILLT_v4s16*//*Label 385*/ 16661,
    5802             :     /*GILLT_v4s32*//*Label 386*/ 17556,
    5803             :     /*GILLT_v8s8*//*Label 387*/ 18401,
    5804             :     /*GILLT_v8s16*//*Label 388*/ 18874,
    5805             :     /*GILLT_v16s8*//*Label 389*/ 19719,
    5806             :     // Label 380: @12691
    5807             :     GIM_Try, /*On fail goto*//*Label 391*/ 12736,
    5808             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    5809             :       GIM_Try, /*On fail goto*//*Label 392*/ 12716, // Rule ID 3222 //
    5810             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
    5811             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR32RegClassID,
    5812             :         // (bitconvert:{ *:[f32] } GPR32:{ *:[i32] }:$Xn)  =>  (COPY_TO_REGCLASS:{ *:[f32] } GPR32:{ *:[i32] }:$Xn, FPR32:{ *:[i32] })
    5813             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    5814             :         GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR32*/5,
    5815             :         // GIR_Coverage, 3222,
    5816             :         GIR_Done,
    5817             :       // Label 392: @12716
    5818             :       GIM_Try, /*On fail goto*//*Label 393*/ 12735, // Rule ID 3223 //
    5819             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    5820             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR32RegClassID,
    5821             :         // (bitconvert:{ *:[i32] } FPR32:{ *:[f32] }:$Xn)  =>  (COPY_TO_REGCLASS:{ *:[i32] } FPR32:{ *:[f32] }:$Xn, GPR32:{ *:[i32] })
    5822             :         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    5823             :         GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GPR32*/6,
    5824             :         // GIR_Coverage, 3223,
    5825             :         GIR_Done,
    5826             :       // Label 393: @12735
    5827             :       GIM_Reject,
    5828             :     // Label 391: @12736
    5829             :     GIM_Reject,
    5830             :     // Label 381: @12737
    5831             :     GIM_Try, /*On fail goto*//*Label 394*/ 12762, // Rule ID 3200 //
    5832             :       GIM_CheckFeatures, GIFBS_IsLE,
    5833             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    5834             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5835             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5836             :       // (bitconvert:{ *:[i64] } V64:{ *:[v8i8] }:$Vn)  =>  (COPY_TO_REGCLASS:{ *:[i64] } V64:{ *:[v8i8] }:$Vn, GPR64:{ *:[i32] })
    5837             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    5838             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GPR64*/17,
    5839             :       // GIR_Coverage, 3200,
    5840             :       GIR_Done,
    5841             :     // Label 394: @12762
    5842             :     GIM_Try, /*On fail goto*//*Label 395*/ 12787, // Rule ID 3201 //
    5843             :       GIM_CheckFeatures, GIFBS_IsLE,
    5844             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    5845             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5846             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5847             :       // (bitconvert:{ *:[i64] } V64:{ *:[v4i16] }:$Vn)  =>  (COPY_TO_REGCLASS:{ *:[i64] } V64:{ *:[v4i16] }:$Vn, GPR64:{ *:[i32] })
    5848             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    5849             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GPR64*/17,
    5850             :       // GIR_Coverage, 3201,
    5851             :       GIR_Done,
    5852             :     // Label 395: @12787
    5853             :     GIM_Try, /*On fail goto*//*Label 396*/ 12812, // Rule ID 3202 //
    5854             :       GIM_CheckFeatures, GIFBS_IsLE,
    5855             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    5856             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5857             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5858             :       // (bitconvert:{ *:[i64] } V64:{ *:[v2i32] }:$Vn)  =>  (COPY_TO_REGCLASS:{ *:[i64] } V64:{ *:[v2i32] }:$Vn, GPR64:{ *:[i32] })
    5859             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    5860             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GPR64*/17,
    5861             :       // GIR_Coverage, 3202,
    5862             :       GIR_Done,
    5863             :     // Label 396: @12812
    5864             :     GIM_Try, /*On fail goto*//*Label 397*/ 12837, // Rule ID 3203 //
    5865             :       GIM_CheckFeatures, GIFBS_IsLE,
    5866             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    5867             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5868             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5869             :       // (bitconvert:{ *:[i64] } V64:{ *:[v4f16] }:$Vn)  =>  (COPY_TO_REGCLASS:{ *:[i64] } V64:{ *:[v4f16] }:$Vn, GPR64:{ *:[i32] })
    5870             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    5871             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GPR64*/17,
    5872             :       // GIR_Coverage, 3203,
    5873             :       GIR_Done,
    5874             :     // Label 397: @12837
    5875             :     GIM_Try, /*On fail goto*//*Label 398*/ 12862, // Rule ID 3204 //
    5876             :       GIM_CheckFeatures, GIFBS_IsLE,
    5877             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    5878             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5879             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5880             :       // (bitconvert:{ *:[i64] } V64:{ *:[v2f32] }:$Vn)  =>  (COPY_TO_REGCLASS:{ *:[i64] } V64:{ *:[v2f32] }:$Vn, GPR64:{ *:[i32] })
    5881             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    5882             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GPR64*/17,
    5883             :       // GIR_Coverage, 3204,
    5884             :       GIR_Done,
    5885             :     // Label 398: @12862
    5886             :     GIM_Try, /*On fail goto*//*Label 399*/ 12887, // Rule ID 3205 //
    5887             :       GIM_CheckFeatures, GIFBS_IsLE,
    5888             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    5889             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    5890             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5891             :       // (bitconvert:{ *:[i64] } V64:{ *:[v1f64] }:$Vn)  =>  (COPY_TO_REGCLASS:{ *:[i64] } V64:{ *:[v1f64] }:$Vn, GPR64:{ *:[i32] })
    5892             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    5893             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GPR64*/17,
    5894             :       // GIR_Coverage, 3205,
    5895             :       GIR_Done,
    5896             :     // Label 399: @12887
    5897             :     GIM_Try, /*On fail goto*//*Label 400*/ 12935, // Rule ID 3211 //
    5898             :       GIM_CheckFeatures, GIFBS_IsBE,
    5899             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    5900             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5901             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5902             :       // (bitconvert:{ *:[i64] } V64:{ *:[v8i8] }:$Vn)  =>  (REV64v8i8:{ *:[i64] } (COPY_TO_REGCLASS:{ *:[i64] } V64:{ *:[v8i8] }:$Vn, GPR64:{ *:[i32] }))
    5903             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
    5904             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY,
    5905             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    5906             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // Vn
    5907             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    5908             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::REV64v8i8,
    5909             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5910             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    5911             :       GIR_EraseFromParent, /*InsnID*/0,
    5912             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5913             :       // GIR_Coverage, 3211,
    5914             :       GIR_Done,
    5915             :     // Label 400: @12935
    5916             :     GIM_Try, /*On fail goto*//*Label 401*/ 12983, // Rule ID 3212 //
    5917             :       GIM_CheckFeatures, GIFBS_IsBE,
    5918             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    5919             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5920             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5921             :       // (bitconvert:{ *:[i64] } V64:{ *:[v4i16] }:$Vn)  =>  (REV64v4i16:{ *:[i64] } (COPY_TO_REGCLASS:{ *:[i64] } V64:{ *:[v4i16] }:$Vn, GPR64:{ *:[i32] }))
    5922             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
    5923             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY,
    5924             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    5925             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // Vn
    5926             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    5927             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    5928             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5929             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    5930             :       GIR_EraseFromParent, /*InsnID*/0,
    5931             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5932             :       // GIR_Coverage, 3212,
    5933             :       GIR_Done,
    5934             :     // Label 401: @12983
    5935             :     GIM_Try, /*On fail goto*//*Label 402*/ 13031, // Rule ID 3213 //
    5936             :       GIM_CheckFeatures, GIFBS_IsBE,
    5937             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    5938             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5939             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5940             :       // (bitconvert:{ *:[i64] } V64:{ *:[v2i32] }:$Vn)  =>  (REV64v2i32:{ *:[i64] } (COPY_TO_REGCLASS:{ *:[i64] } V64:{ *:[v2i32] }:$Vn, GPR64:{ *:[i32] }))
    5941             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
    5942             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY,
    5943             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    5944             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // Vn
    5945             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    5946             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    5947             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5948             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    5949             :       GIR_EraseFromParent, /*InsnID*/0,
    5950             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5951             :       // GIR_Coverage, 3213,
    5952             :       GIR_Done,
    5953             :     // Label 402: @13031
    5954             :     GIM_Try, /*On fail goto*//*Label 403*/ 13079, // Rule ID 3214 //
    5955             :       GIM_CheckFeatures, GIFBS_IsBE,
    5956             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    5957             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5958             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5959             :       // (bitconvert:{ *:[i64] } V64:{ *:[v4f16] }:$Vn)  =>  (REV64v4i16:{ *:[i64] } (COPY_TO_REGCLASS:{ *:[i64] } V64:{ *:[v4f16] }:$Vn, GPR64:{ *:[i32] }))
    5960             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
    5961             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY,
    5962             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    5963             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // Vn
    5964             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    5965             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    5966             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5967             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    5968             :       GIR_EraseFromParent, /*InsnID*/0,
    5969             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5970             :       // GIR_Coverage, 3214,
    5971             :       GIR_Done,
    5972             :     // Label 403: @13079
    5973             :     GIM_Try, /*On fail goto*//*Label 404*/ 13127, // Rule ID 3215 //
    5974             :       GIM_CheckFeatures, GIFBS_IsBE,
    5975             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    5976             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5977             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    5978             :       // (bitconvert:{ *:[i64] } V64:{ *:[v2f32] }:$Vn)  =>  (REV64v2i32:{ *:[i64] } (COPY_TO_REGCLASS:{ *:[i64] } V64:{ *:[v2f32] }:$Vn, GPR64:{ *:[i32] }))
    5979             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
    5980             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY,
    5981             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    5982             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // Vn
    5983             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    5984             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    5985             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    5986             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    5987             :       GIR_EraseFromParent, /*InsnID*/0,
    5988             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5989             :       // GIR_Coverage, 3215,
    5990             :       GIR_Done,
    5991             :     // Label 404: @13127
    5992             :     GIM_Try, /*On fail goto*//*Label 405*/ 13150, // Rule ID 3216 //
    5993             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    5994             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    5995             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    5996             :       // (bitconvert:{ *:[v1i64] } GPR64:{ *:[i64] }:$Xn)  =>  (COPY_TO_REGCLASS:{ *:[v1i64] } GPR64:{ *:[i64] }:$Xn, FPR64:{ *:[i32] })
    5997             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    5998             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    5999             :       // GIR_Coverage, 3216,
    6000             :       GIR_Done,
    6001             :     // Label 405: @13150
    6002             :     GIM_Try, /*On fail goto*//*Label 406*/ 13173, // Rule ID 3217 //
    6003             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6004             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6005             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    6006             :       // (bitconvert:{ *:[v1f64] } GPR64:{ *:[i64] }:$Xn)  =>  (COPY_TO_REGCLASS:{ *:[v1f64] } GPR64:{ *:[i64] }:$Xn, FPR64:{ *:[i32] })
    6007             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6008             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6009             :       // GIR_Coverage, 3217,
    6010             :       GIR_Done,
    6011             :     // Label 406: @13173
    6012             :     GIM_Try, /*On fail goto*//*Label 407*/ 13196, // Rule ID 3218 //
    6013             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6014             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    6015             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6016             :       // (bitconvert:{ *:[i64] } V64:{ *:[v1i64] }:$Vn)  =>  (COPY_TO_REGCLASS:{ *:[i64] } V64:{ *:[v1i64] }:$Vn, GPR64:{ *:[i32] })
    6017             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6018             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GPR64*/17,
    6019             :       // GIR_Coverage, 3218,
    6020             :       GIR_Done,
    6021             :     // Label 407: @13196
    6022             :     GIM_Try, /*On fail goto*//*Label 408*/ 13219, // Rule ID 3224 //
    6023             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6024             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6025             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    6026             :       // (bitconvert:{ *:[f64] } GPR64:{ *:[i64] }:$Xn)  =>  (COPY_TO_REGCLASS:{ *:[f64] } GPR64:{ *:[i64] }:$Xn, FPR64:{ *:[i32] })
    6027             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6028             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6029             :       // GIR_Coverage, 3224,
    6030             :       GIR_Done,
    6031             :     // Label 408: @13219
    6032             :     GIM_Try, /*On fail goto*//*Label 409*/ 13242, // Rule ID 3225 //
    6033             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6034             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    6035             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6036             :       // (bitconvert:{ *:[i64] } FPR64:{ *:[f64] }:$Xn)  =>  (COPY_TO_REGCLASS:{ *:[i64] } FPR64:{ *:[f64] }:$Xn, GPR64:{ *:[i32] })
    6037             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6038             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GPR64*/17,
    6039             :       // GIR_Coverage, 3225,
    6040             :       GIR_Done,
    6041             :     // Label 409: @13242
    6042             :     GIM_Try, /*On fail goto*//*Label 410*/ 13265, // Rule ID 3226 //
    6043             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6044             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    6045             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6046             :       // (bitconvert:{ *:[i64] } V64:{ *:[v1f64] }:$Vn)  =>  (COPY_TO_REGCLASS:{ *:[i64] } V64:{ *:[v1f64] }:$Vn, GPR64:{ *:[i32] })
    6047             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6048             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GPR64*/17,
    6049             :       // GIR_Coverage, 3226,
    6050             :       GIR_Done,
    6051             :     // Label 410: @13265
    6052             :     GIM_Try, /*On fail goto*//*Label 411*/ 13299, // Rule ID 3227 //
    6053             :       GIM_CheckFeatures, GIFBS_IsLE,
    6054             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    6055             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6056             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6057             :       // (bitconvert:{ *:[v1i64] } FPR64:{ *:[v2i32] }:$src)  =>  FPR64:{ *:[v1i64] }:$src
    6058             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6059             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6060             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6061             :       GIR_EraseFromParent, /*InsnID*/0,
    6062             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6063             :       // GIR_Coverage, 3227,
    6064             :       GIR_Done,
    6065             :     // Label 411: @13299
    6066             :     GIM_Try, /*On fail goto*//*Label 412*/ 13333, // Rule ID 3228 //
    6067             :       GIM_CheckFeatures, GIFBS_IsLE,
    6068             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6069             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6070             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6071             :       // (bitconvert:{ *:[v1i64] } FPR64:{ *:[v4i16] }:$src)  =>  FPR64:{ *:[v1i64] }:$src
    6072             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6073             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6074             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6075             :       GIR_EraseFromParent, /*InsnID*/0,
    6076             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6077             :       // GIR_Coverage, 3228,
    6078             :       GIR_Done,
    6079             :     // Label 412: @13333
    6080             :     GIM_Try, /*On fail goto*//*Label 413*/ 13367, // Rule ID 3229 //
    6081             :       GIM_CheckFeatures, GIFBS_IsLE,
    6082             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    6083             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6084             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6085             :       // (bitconvert:{ *:[v1i64] } FPR64:{ *:[v8i8] }:$src)  =>  FPR64:{ *:[v1i64] }:$src
    6086             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6087             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6088             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6089             :       GIR_EraseFromParent, /*InsnID*/0,
    6090             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6091             :       // GIR_Coverage, 3229,
    6092             :       GIR_Done,
    6093             :     // Label 413: @13367
    6094             :     GIM_Try, /*On fail goto*//*Label 414*/ 13401, // Rule ID 3230 //
    6095             :       GIM_CheckFeatures, GIFBS_IsLE,
    6096             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6097             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6098             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6099             :       // (bitconvert:{ *:[v1i64] } FPR64:{ *:[v4f16] }:$src)  =>  FPR64:{ *:[v1i64] }:$src
    6100             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6101             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6102             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6103             :       GIR_EraseFromParent, /*InsnID*/0,
    6104             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6105             :       // GIR_Coverage, 3230,
    6106             :       GIR_Done,
    6107             :     // Label 414: @13401
    6108             :     GIM_Try, /*On fail goto*//*Label 415*/ 13435, // Rule ID 3231 //
    6109             :       GIM_CheckFeatures, GIFBS_IsLE,
    6110             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    6111             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6112             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6113             :       // (bitconvert:{ *:[v1i64] } FPR64:{ *:[v2f32] }:$src)  =>  FPR64:{ *:[v1i64] }:$src
    6114             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6115             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6116             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6117             :       GIR_EraseFromParent, /*InsnID*/0,
    6118             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6119             :       // GIR_Coverage, 3231,
    6120             :       GIR_Done,
    6121             :     // Label 415: @13435
    6122             :     GIM_Try, /*On fail goto*//*Label 416*/ 13458, // Rule ID 3232 //
    6123             :       GIM_CheckFeatures, GIFBS_IsBE,
    6124             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    6125             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6126             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6127             :       // (bitconvert:{ *:[v1i64] } FPR64:{ *:[v2i32] }:$src)  =>  (REV64v2i32:{ *:[v1i64] } FPR64:{ *:[v2i32] }:$src)
    6128             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    6129             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6130             :       // GIR_Coverage, 3232,
    6131             :       GIR_Done,
    6132             :     // Label 416: @13458
    6133             :     GIM_Try, /*On fail goto*//*Label 417*/ 13481, // Rule ID 3233 //
    6134             :       GIM_CheckFeatures, GIFBS_IsBE,
    6135             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6136             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6137             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6138             :       // (bitconvert:{ *:[v1i64] } FPR64:{ *:[v4i16] }:$src)  =>  (REV64v4i16:{ *:[v1i64] } FPR64:{ *:[v4i16] }:$src)
    6139             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    6140             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6141             :       // GIR_Coverage, 3233,
    6142             :       GIR_Done,
    6143             :     // Label 417: @13481
    6144             :     GIM_Try, /*On fail goto*//*Label 418*/ 13504, // Rule ID 3234 //
    6145             :       GIM_CheckFeatures, GIFBS_IsBE,
    6146             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    6147             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6148             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6149             :       // (bitconvert:{ *:[v1i64] } FPR64:{ *:[v8i8] }:$src)  =>  (REV64v8i8:{ *:[v1i64] } FPR64:{ *:[v8i8] }:$src)
    6150             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v8i8,
    6151             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6152             :       // GIR_Coverage, 3234,
    6153             :       GIR_Done,
    6154             :     // Label 418: @13504
    6155             :     GIM_Try, /*On fail goto*//*Label 419*/ 13527, // Rule ID 3235 //
    6156             :       GIM_CheckFeatures, GIFBS_IsBE,
    6157             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6158             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6159             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6160             :       // (bitconvert:{ *:[v1i64] } FPR64:{ *:[v4f16] }:$src)  =>  (REV64v4i16:{ *:[v1i64] } FPR64:{ *:[v4f16] }:$src)
    6161             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    6162             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6163             :       // GIR_Coverage, 3235,
    6164             :       GIR_Done,
    6165             :     // Label 419: @13527
    6166             :     GIM_Try, /*On fail goto*//*Label 420*/ 13550, // Rule ID 3236 //
    6167             :       GIM_CheckFeatures, GIFBS_IsBE,
    6168             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    6169             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6170             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6171             :       // (bitconvert:{ *:[v1i64] } FPR64:{ *:[v2f32] }:$src)  =>  (REV64v2i32:{ *:[v1i64] } FPR64:{ *:[v2f32] }:$src)
    6172             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    6173             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6174             :       // GIR_Coverage, 3236,
    6175             :       GIR_Done,
    6176             :     // Label 420: @13550
    6177             :     GIM_Try, /*On fail goto*//*Label 421*/ 13582, // Rule ID 3237 //
    6178             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6179             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6180             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6181             :       // (bitconvert:{ *:[v1i64] } FPR64:{ *:[v1f64] }:$src)  =>  FPR64:{ *:[v1i64] }:$src
    6182             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6183             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6184             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6185             :       GIR_EraseFromParent, /*InsnID*/0,
    6186             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6187             :       // GIR_Coverage, 3237,
    6188             :       GIR_Done,
    6189             :     // Label 421: @13582
    6190             :     GIM_Try, /*On fail goto*//*Label 422*/ 13614, // Rule ID 3238 //
    6191             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6192             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6193             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6194             :       // (bitconvert:{ *:[v1i64] } FPR64:{ *:[f64] }:$src)  =>  FPR64:{ *:[v1i64] }:$src
    6195             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6196             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6197             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6198             :       GIR_EraseFromParent, /*InsnID*/0,
    6199             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6200             :       // GIR_Coverage, 3238,
    6201             :       GIR_Done,
    6202             :     // Label 422: @13614
    6203             :     GIM_Try, /*On fail goto*//*Label 423*/ 13648, // Rule ID 3292 //
    6204             :       GIM_CheckFeatures, GIFBS_IsLE,
    6205             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    6206             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6207             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6208             :       // (bitconvert:{ *:[f64] } FPR64:{ *:[v2i32] }:$src)  =>  FPR64:{ *:[f64] }:$src
    6209             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6210             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6211             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6212             :       GIR_EraseFromParent, /*InsnID*/0,
    6213             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6214             :       // GIR_Coverage, 3292,
    6215             :       GIR_Done,
    6216             :     // Label 423: @13648
    6217             :     GIM_Try, /*On fail goto*//*Label 424*/ 13682, // Rule ID 3293 //
    6218             :       GIM_CheckFeatures, GIFBS_IsLE,
    6219             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6220             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6221             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6222             :       // (bitconvert:{ *:[f64] } FPR64:{ *:[v4i16] }:$src)  =>  FPR64:{ *:[f64] }:$src
    6223             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6224             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6225             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6226             :       GIR_EraseFromParent, /*InsnID*/0,
    6227             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6228             :       // GIR_Coverage, 3293,
    6229             :       GIR_Done,
    6230             :     // Label 424: @13682
    6231             :     GIM_Try, /*On fail goto*//*Label 425*/ 13716, // Rule ID 3294 //
    6232             :       GIM_CheckFeatures, GIFBS_IsLE,
    6233             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    6234             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6235             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6236             :       // (bitconvert:{ *:[f64] } FPR64:{ *:[v2f32] }:$src)  =>  FPR64:{ *:[f64] }:$src
    6237             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6238             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6239             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6240             :       GIR_EraseFromParent, /*InsnID*/0,
    6241             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6242             :       // GIR_Coverage, 3294,
    6243             :       GIR_Done,
    6244             :     // Label 425: @13716
    6245             :     GIM_Try, /*On fail goto*//*Label 426*/ 13750, // Rule ID 3295 //
    6246             :       GIM_CheckFeatures, GIFBS_IsLE,
    6247             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    6248             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6249             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6250             :       // (bitconvert:{ *:[f64] } FPR64:{ *:[v8i8] }:$src)  =>  FPR64:{ *:[f64] }:$src
    6251             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6252             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6253             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6254             :       GIR_EraseFromParent, /*InsnID*/0,
    6255             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6256             :       // GIR_Coverage, 3295,
    6257             :       GIR_Done,
    6258             :     // Label 426: @13750
    6259             :     GIM_Try, /*On fail goto*//*Label 427*/ 13784, // Rule ID 3296 //
    6260             :       GIM_CheckFeatures, GIFBS_IsLE,
    6261             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6262             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6263             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6264             :       // (bitconvert:{ *:[f64] } FPR64:{ *:[v4f16] }:$src)  =>  FPR64:{ *:[f64] }:$src
    6265             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6266             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6267             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6268             :       GIR_EraseFromParent, /*InsnID*/0,
    6269             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6270             :       // GIR_Coverage, 3296,
    6271             :       GIR_Done,
    6272             :     // Label 427: @13784
    6273             :     GIM_Try, /*On fail goto*//*Label 428*/ 13807, // Rule ID 3297 //
    6274             :       GIM_CheckFeatures, GIFBS_IsBE,
    6275             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    6276             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6277             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6278             :       // (bitconvert:{ *:[f64] } FPR64:{ *:[v2i32] }:$src)  =>  (REV64v2i32:{ *:[f64] } FPR64:{ *:[v2i32] }:$src)
    6279             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    6280             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6281             :       // GIR_Coverage, 3297,
    6282             :       GIR_Done,
    6283             :     // Label 428: @13807
    6284             :     GIM_Try, /*On fail goto*//*Label 429*/ 13830, // Rule ID 3298 //
    6285             :       GIM_CheckFeatures, GIFBS_IsBE,
    6286             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6287             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6288             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6289             :       // (bitconvert:{ *:[f64] } FPR64:{ *:[v4i16] }:$src)  =>  (REV64v4i16:{ *:[f64] } FPR64:{ *:[v4i16] }:$src)
    6290             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    6291             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6292             :       // GIR_Coverage, 3298,
    6293             :       GIR_Done,
    6294             :     // Label 429: @13830
    6295             :     GIM_Try, /*On fail goto*//*Label 430*/ 13853, // Rule ID 3299 //
    6296             :       GIM_CheckFeatures, GIFBS_IsBE,
    6297             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    6298             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6299             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6300             :       // (bitconvert:{ *:[f64] } FPR64:{ *:[v2f32] }:$src)  =>  (REV64v2i32:{ *:[f64] } FPR64:{ *:[v2f32] }:$src)
    6301             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    6302             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6303             :       // GIR_Coverage, 3299,
    6304             :       GIR_Done,
    6305             :     // Label 430: @13853
    6306             :     GIM_Try, /*On fail goto*//*Label 431*/ 13876, // Rule ID 3300 //
    6307             :       GIM_CheckFeatures, GIFBS_IsBE,
    6308             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    6309             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6310             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6311             :       // (bitconvert:{ *:[f64] } FPR64:{ *:[v8i8] }:$src)  =>  (REV64v8i8:{ *:[f64] } FPR64:{ *:[v8i8] }:$src)
    6312             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v8i8,
    6313             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6314             :       // GIR_Coverage, 3300,
    6315             :       GIR_Done,
    6316             :     // Label 431: @13876
    6317             :     GIM_Try, /*On fail goto*//*Label 432*/ 13899, // Rule ID 3301 //
    6318             :       GIM_CheckFeatures, GIFBS_IsBE,
    6319             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6320             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6321             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6322             :       // (bitconvert:{ *:[f64] } FPR64:{ *:[v4f16] }:$src)  =>  (REV64v4i16:{ *:[f64] } FPR64:{ *:[v4f16] }:$src)
    6323             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    6324             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6325             :       // GIR_Coverage, 3301,
    6326             :       GIR_Done,
    6327             :     // Label 432: @13899
    6328             :     GIM_Try, /*On fail goto*//*Label 433*/ 13931, // Rule ID 3302 //
    6329             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6330             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6331             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6332             :       // (bitconvert:{ *:[f64] } FPR64:{ *:[v1i64] }:$src)  =>  FPR64:{ *:[f64] }:$src
    6333             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6334             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6335             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6336             :       GIR_EraseFromParent, /*InsnID*/0,
    6337             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6338             :       // GIR_Coverage, 3302,
    6339             :       GIR_Done,
    6340             :     // Label 433: @13931
    6341             :     GIM_Try, /*On fail goto*//*Label 434*/ 13963, // Rule ID 3303 //
    6342             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6343             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6344             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6345             :       // (bitconvert:{ *:[f64] } FPR64:{ *:[v1f64] }:$src)  =>  FPR64:{ *:[f64] }:$src
    6346             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6347             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6348             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6349             :       GIR_EraseFromParent, /*InsnID*/0,
    6350             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6351             :       // GIR_Coverage, 3303,
    6352             :       GIR_Done,
    6353             :     // Label 434: @13963
    6354             :     GIM_Try, /*On fail goto*//*Label 435*/ 13997, // Rule ID 3304 //
    6355             :       GIM_CheckFeatures, GIFBS_IsLE,
    6356             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    6357             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6358             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6359             :       // (bitconvert:{ *:[v1f64] } FPR64:{ *:[v2i32] }:$src)  =>  FPR64:{ *:[v1f64] }:$src
    6360             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6361             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6362             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6363             :       GIR_EraseFromParent, /*InsnID*/0,
    6364             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6365             :       // GIR_Coverage, 3304,
    6366             :       GIR_Done,
    6367             :     // Label 435: @13997
    6368             :     GIM_Try, /*On fail goto*//*Label 436*/ 14031, // Rule ID 3305 //
    6369             :       GIM_CheckFeatures, GIFBS_IsLE,
    6370             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6371             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6372             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6373             :       // (bitconvert:{ *:[v1f64] } FPR64:{ *:[v4i16] }:$src)  =>  FPR64:{ *:[v1f64] }:$src
    6374             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6375             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6376             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6377             :       GIR_EraseFromParent, /*InsnID*/0,
    6378             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6379             :       // GIR_Coverage, 3305,
    6380             :       GIR_Done,
    6381             :     // Label 436: @14031
    6382             :     GIM_Try, /*On fail goto*//*Label 437*/ 14065, // Rule ID 3306 //
    6383             :       GIM_CheckFeatures, GIFBS_IsLE,
    6384             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    6385             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6386             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6387             :       // (bitconvert:{ *:[v1f64] } FPR64:{ *:[v8i8] }:$src)  =>  FPR64:{ *:[v1f64] }:$src
    6388             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6389             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6390             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6391             :       GIR_EraseFromParent, /*InsnID*/0,
    6392             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6393             :       // GIR_Coverage, 3306,
    6394             :       GIR_Done,
    6395             :     // Label 437: @14065
    6396             :     GIM_Try, /*On fail goto*//*Label 438*/ 14099, // Rule ID 3307 //
    6397             :       GIM_CheckFeatures, GIFBS_IsLE,
    6398             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    6399             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6400             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6401             :       // (bitconvert:{ *:[v1f64] } FPR64:{ *:[v2f32] }:$src)  =>  FPR64:{ *:[v1f64] }:$src
    6402             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6403             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6404             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6405             :       GIR_EraseFromParent, /*InsnID*/0,
    6406             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6407             :       // GIR_Coverage, 3307,
    6408             :       GIR_Done,
    6409             :     // Label 438: @14099
    6410             :     GIM_Try, /*On fail goto*//*Label 439*/ 14133, // Rule ID 3308 //
    6411             :       GIM_CheckFeatures, GIFBS_IsLE,
    6412             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6413             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6414             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6415             :       // (bitconvert:{ *:[v1f64] } FPR64:{ *:[v4f16] }:$src)  =>  FPR64:{ *:[v1f64] }:$src
    6416             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6417             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6418             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6419             :       GIR_EraseFromParent, /*InsnID*/0,
    6420             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6421             :       // GIR_Coverage, 3308,
    6422             :       GIR_Done,
    6423             :     // Label 439: @14133
    6424             :     GIM_Try, /*On fail goto*//*Label 440*/ 14156, // Rule ID 3309 //
    6425             :       GIM_CheckFeatures, GIFBS_IsBE,
    6426             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    6427             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6428             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6429             :       // (bitconvert:{ *:[v1f64] } FPR64:{ *:[v2i32] }:$src)  =>  (REV64v2i32:{ *:[v1f64] } FPR64:{ *:[v2i32] }:$src)
    6430             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    6431             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6432             :       // GIR_Coverage, 3309,
    6433             :       GIR_Done,
    6434             :     // Label 440: @14156
    6435             :     GIM_Try, /*On fail goto*//*Label 441*/ 14179, // Rule ID 3310 //
    6436             :       GIM_CheckFeatures, GIFBS_IsBE,
    6437             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6438             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6439             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6440             :       // (bitconvert:{ *:[v1f64] } FPR64:{ *:[v4i16] }:$src)  =>  (REV64v4i16:{ *:[v1f64] } FPR64:{ *:[v4i16] }:$src)
    6441             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    6442             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6443             :       // GIR_Coverage, 3310,
    6444             :       GIR_Done,
    6445             :     // Label 441: @14179
    6446             :     GIM_Try, /*On fail goto*//*Label 442*/ 14202, // Rule ID 3311 //
    6447             :       GIM_CheckFeatures, GIFBS_IsBE,
    6448             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    6449             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6450             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6451             :       // (bitconvert:{ *:[v1f64] } FPR64:{ *:[v8i8] }:$src)  =>  (REV64v8i8:{ *:[v1f64] } FPR64:{ *:[v8i8] }:$src)
    6452             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v8i8,
    6453             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6454             :       // GIR_Coverage, 3311,
    6455             :       GIR_Done,
    6456             :     // Label 442: @14202
    6457             :     GIM_Try, /*On fail goto*//*Label 443*/ 14225, // Rule ID 3312 //
    6458             :       GIM_CheckFeatures, GIFBS_IsBE,
    6459             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    6460             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6461             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6462             :       // (bitconvert:{ *:[v1f64] } FPR64:{ *:[v2f32] }:$src)  =>  (REV64v2i32:{ *:[v1f64] } FPR64:{ *:[v2f32] }:$src)
    6463             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    6464             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6465             :       // GIR_Coverage, 3312,
    6466             :       GIR_Done,
    6467             :     // Label 443: @14225
    6468             :     GIM_Try, /*On fail goto*//*Label 444*/ 14248, // Rule ID 3313 //
    6469             :       GIM_CheckFeatures, GIFBS_IsBE,
    6470             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6471             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6472             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6473             :       // (bitconvert:{ *:[v1f64] } FPR64:{ *:[v4f16] }:$src)  =>  (REV64v4i16:{ *:[v1f64] } FPR64:{ *:[v4f16] }:$src)
    6474             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    6475             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6476             :       // GIR_Coverage, 3313,
    6477             :       GIR_Done,
    6478             :     // Label 444: @14248
    6479             :     GIM_Try, /*On fail goto*//*Label 445*/ 14280, // Rule ID 3314 //
    6480             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6481             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6482             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6483             :       // (bitconvert:{ *:[v1f64] } FPR64:{ *:[v1i64] }:$src)  =>  FPR64:{ *:[v1f64] }:$src
    6484             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6485             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6486             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6487             :       GIR_EraseFromParent, /*InsnID*/0,
    6488             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6489             :       // GIR_Coverage, 3314,
    6490             :       GIR_Done,
    6491             :     // Label 445: @14280
    6492             :     GIM_Try, /*On fail goto*//*Label 446*/ 14312, // Rule ID 3315 //
    6493             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6494             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6495             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6496             :       // (bitconvert:{ *:[v1f64] } FPR64:{ *:[f64] }:$src)  =>  FPR64:{ *:[v1f64] }:$src
    6497             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6498             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6499             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6500             :       GIR_EraseFromParent, /*InsnID*/0,
    6501             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6502             :       // GIR_Coverage, 3315,
    6503             :       GIR_Done,
    6504             :     // Label 446: @14312
    6505             :     GIM_Reject,
    6506             :     // Label 382: @14313
    6507             :     GIM_Try, /*On fail goto*//*Label 447*/ 14347, // Rule ID 3329 //
    6508             :       GIM_CheckFeatures, GIFBS_IsLE,
    6509             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    6510             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6511             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    6512             :       // (bitconvert:{ *:[f128] } FPR128:{ *:[v2i64] }:$src)  =>  FPR128:{ *:[f128] }:$src
    6513             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6514             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6515             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6516             :       GIR_EraseFromParent, /*InsnID*/0,
    6517             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    6518             :       // GIR_Coverage, 3329,
    6519             :       GIR_Done,
    6520             :     // Label 447: @14347
    6521             :     GIM_Try, /*On fail goto*//*Label 448*/ 14381, // Rule ID 3330 //
    6522             :       GIM_CheckFeatures, GIFBS_IsLE,
    6523             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    6524             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6525             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    6526             :       // (bitconvert:{ *:[f128] } FPR128:{ *:[v4i32] }:$src)  =>  FPR128:{ *:[f128] }:$src
    6527             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6528             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6529             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6530             :       GIR_EraseFromParent, /*InsnID*/0,
    6531             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    6532             :       // GIR_Coverage, 3330,
    6533             :       GIR_Done,
    6534             :     // Label 448: @14381
    6535             :     GIM_Try, /*On fail goto*//*Label 449*/ 14415, // Rule ID 3331 //
    6536             :       GIM_CheckFeatures, GIFBS_IsLE,
    6537             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    6538             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6539             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    6540             :       // (bitconvert:{ *:[f128] } FPR128:{ *:[v8i16] }:$src)  =>  FPR128:{ *:[f128] }:$src
    6541             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6542             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6543             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6544             :       GIR_EraseFromParent, /*InsnID*/0,
    6545             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    6546             :       // GIR_Coverage, 3331,
    6547             :       GIR_Done,
    6548             :     // Label 449: @14415
    6549             :     GIM_Try, /*On fail goto*//*Label 450*/ 14449, // Rule ID 3332 //
    6550             :       GIM_CheckFeatures, GIFBS_IsLE,
    6551             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    6552             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6553             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    6554             :       // (bitconvert:{ *:[f128] } FPR128:{ *:[v2f64] }:$src)  =>  FPR128:{ *:[f128] }:$src
    6555             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6556             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6557             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6558             :       GIR_EraseFromParent, /*InsnID*/0,
    6559             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    6560             :       // GIR_Coverage, 3332,
    6561             :       GIR_Done,
    6562             :     // Label 450: @14449
    6563             :     GIM_Try, /*On fail goto*//*Label 451*/ 14483, // Rule ID 3333 //
    6564             :       GIM_CheckFeatures, GIFBS_IsLE,
    6565             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    6566             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6567             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    6568             :       // (bitconvert:{ *:[f128] } FPR128:{ *:[v4f32] }:$src)  =>  FPR128:{ *:[f128] }:$src
    6569             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6570             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6571             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6572             :       GIR_EraseFromParent, /*InsnID*/0,
    6573             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    6574             :       // GIR_Coverage, 3333,
    6575             :       GIR_Done,
    6576             :     // Label 451: @14483
    6577             :     GIM_Try, /*On fail goto*//*Label 452*/ 14517, // Rule ID 3334 //
    6578             :       GIM_CheckFeatures, GIFBS_IsLE,
    6579             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    6580             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6581             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    6582             :       // (bitconvert:{ *:[f128] } FPR128:{ *:[v8f16] }:$src)  =>  FPR128:{ *:[f128] }:$src
    6583             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6584             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6585             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6586             :       GIR_EraseFromParent, /*InsnID*/0,
    6587             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    6588             :       // GIR_Coverage, 3334,
    6589             :       GIR_Done,
    6590             :     // Label 452: @14517
    6591             :     GIM_Try, /*On fail goto*//*Label 453*/ 14551, // Rule ID 3335 //
    6592             :       GIM_CheckFeatures, GIFBS_IsLE,
    6593             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    6594             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6595             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    6596             :       // (bitconvert:{ *:[f128] } FPR128:{ *:[v16i8] }:$src)  =>  FPR128:{ *:[f128] }:$src
    6597             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6598             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6599             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6600             :       GIR_EraseFromParent, /*InsnID*/0,
    6601             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    6602             :       // GIR_Coverage, 3335,
    6603             :       GIR_Done,
    6604             :     // Label 453: @14551
    6605             :     GIM_Try, /*On fail goto*//*Label 454*/ 14590, // Rule ID 3336 //
    6606             :       GIM_CheckFeatures, GIFBS_IsBE,
    6607             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    6608             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6609             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    6610             :       // (bitconvert:{ *:[f128] } FPR128:{ *:[v2i64] }:$src)  =>  (EXTv16i8:{ *:[f128] } FPR128:{ *:[v2i64] }:$src, FPR128:{ *:[v2i64] }:$src, 8:{ *:[i32] })
    6611             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EXTv16i8,
    6612             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6613             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6614             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6615             :       GIR_AddImm, /*InsnID*/0, /*Imm*/8,
    6616             :       GIR_EraseFromParent, /*InsnID*/0,
    6617             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6618             :       // GIR_Coverage, 3336,
    6619             :       GIR_Done,
    6620             :     // Label 454: @14590
    6621             :     GIM_Try, /*On fail goto*//*Label 455*/ 14661, // Rule ID 3337 //
    6622             :       GIM_CheckFeatures, GIFBS_IsBE,
    6623             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    6624             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6625             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    6626             :       // (bitconvert:{ *:[f128] } FPR128:{ *:[v4i32] }:$src)  =>  (EXTv16i8:{ *:[f128] } (REV64v4i32:{ *:[f128] } FPR128:{ *:[v4i32] }:$src), (REV64v4i32:{ *:[f128] } FPR128:{ *:[v4i32] }:$src), 8:{ *:[i32] })
    6627             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s128,
    6628             :       GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s128,
    6629             :       GIR_BuildMI, /*InsnID*/2, /*Opcode*/AArch64::REV64v4i32,
    6630             :       GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
    6631             :       GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
    6632             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
    6633             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::REV64v4i32,
    6634             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    6635             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
    6636             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    6637             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EXTv16i8,
    6638             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6639             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    6640             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/1, /*TempRegFlags*/0,
    6641             :       GIR_AddImm, /*InsnID*/0, /*Imm*/8,
    6642             :       GIR_EraseFromParent, /*InsnID*/0,
    6643             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6644             :       // GIR_Coverage, 3337,
    6645             :       GIR_Done,
    6646             :     // Label 455: @14661
    6647             :     GIM_Try, /*On fail goto*//*Label 456*/ 14732, // Rule ID 3338 //
    6648             :       GIM_CheckFeatures, GIFBS_IsBE,
    6649             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    6650             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6651             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    6652             :       // (bitconvert:{ *:[f128] } FPR128:{ *:[v8i16] }:$src)  =>  (EXTv16i8:{ *:[f128] } (REV64v8i16:{ *:[f128] } FPR128:{ *:[v8i16] }:$src), (REV64v8i16:{ *:[f128] } FPR128:{ *:[v8i16] }:$src), 8:{ *:[i32] })
    6653             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s128,
    6654             :       GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s128,
    6655             :       GIR_BuildMI, /*InsnID*/2, /*Opcode*/AArch64::REV64v8i16,
    6656             :       GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
    6657             :       GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
    6658             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
    6659             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::REV64v8i16,
    6660             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    6661             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
    6662             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    6663             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EXTv16i8,
    6664             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6665             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    6666             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/1, /*TempRegFlags*/0,
    6667             :       GIR_AddImm, /*InsnID*/0, /*Imm*/8,
    6668             :       GIR_EraseFromParent, /*InsnID*/0,
    6669             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6670             :       // GIR_Coverage, 3338,
    6671             :       GIR_Done,
    6672             :     // Label 456: @14732
    6673             :     GIM_Try, /*On fail goto*//*Label 457*/ 14803, // Rule ID 3339 //
    6674             :       GIM_CheckFeatures, GIFBS_IsBE,
    6675             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    6676             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6677             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    6678             :       // (bitconvert:{ *:[f128] } FPR128:{ *:[v8f16] }:$src)  =>  (EXTv16i8:{ *:[f128] } (REV64v8i16:{ *:[f128] } FPR128:{ *:[v8f16] }:$src), (REV64v8i16:{ *:[f128] } FPR128:{ *:[v8f16] }:$src), 8:{ *:[i32] })
    6679             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s128,
    6680             :       GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s128,
    6681             :       GIR_BuildMI, /*InsnID*/2, /*Opcode*/AArch64::REV64v8i16,
    6682             :       GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
    6683             :       GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
    6684             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
    6685             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::REV64v8i16,
    6686             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    6687             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
    6688             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    6689             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EXTv16i8,
    6690             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6691             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    6692             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/1, /*TempRegFlags*/0,
    6693             :       GIR_AddImm, /*InsnID*/0, /*Imm*/8,
    6694             :       GIR_EraseFromParent, /*InsnID*/0,
    6695             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6696             :       // GIR_Coverage, 3339,
    6697             :       GIR_Done,
    6698             :     // Label 457: @14803
    6699             :     GIM_Try, /*On fail goto*//*Label 458*/ 14842, // Rule ID 3340 //
    6700             :       GIM_CheckFeatures, GIFBS_IsBE,
    6701             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    6702             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6703             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    6704             :       // (bitconvert:{ *:[f128] } FPR128:{ *:[v2f64] }:$src)  =>  (EXTv16i8:{ *:[f128] } FPR128:{ *:[v2f64] }:$src, FPR128:{ *:[v2f64] }:$src, 8:{ *:[i32] })
    6705             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EXTv16i8,
    6706             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6707             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6708             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6709             :       GIR_AddImm, /*InsnID*/0, /*Imm*/8,
    6710             :       GIR_EraseFromParent, /*InsnID*/0,
    6711             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6712             :       // GIR_Coverage, 3340,
    6713             :       GIR_Done,
    6714             :     // Label 458: @14842
    6715             :     GIM_Try, /*On fail goto*//*Label 459*/ 14913, // Rule ID 3341 //
    6716             :       GIM_CheckFeatures, GIFBS_IsBE,
    6717             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    6718             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6719             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    6720             :       // (bitconvert:{ *:[f128] } FPR128:{ *:[v4f32] }:$src)  =>  (EXTv16i8:{ *:[f128] } (REV64v4i32:{ *:[f128] } FPR128:{ *:[v4f32] }:$src), (REV64v4i32:{ *:[f128] } FPR128:{ *:[v4f32] }:$src), 8:{ *:[i32] })
    6721             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s128,
    6722             :       GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s128,
    6723             :       GIR_BuildMI, /*InsnID*/2, /*Opcode*/AArch64::REV64v4i32,
    6724             :       GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
    6725             :       GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
    6726             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
    6727             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::REV64v4i32,
    6728             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    6729             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
    6730             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    6731             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EXTv16i8,
    6732             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6733             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    6734             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/1, /*TempRegFlags*/0,
    6735             :       GIR_AddImm, /*InsnID*/0, /*Imm*/8,
    6736             :       GIR_EraseFromParent, /*InsnID*/0,
    6737             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6738             :       // GIR_Coverage, 3341,
    6739             :       GIR_Done,
    6740             :     // Label 459: @14913
    6741             :     GIM_Try, /*On fail goto*//*Label 460*/ 14984, // Rule ID 3342 //
    6742             :       GIM_CheckFeatures, GIFBS_IsBE,
    6743             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    6744             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    6745             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    6746             :       // (bitconvert:{ *:[f128] } FPR128:{ *:[v16i8] }:$src)  =>  (EXTv16i8:{ *:[f128] } (REV64v16i8:{ *:[f128] } FPR128:{ *:[v16i8] }:$src), (REV64v16i8:{ *:[f128] } FPR128:{ *:[v16i8] }:$src), 8:{ *:[i32] })
    6747             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s128,
    6748             :       GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s128,
    6749             :       GIR_BuildMI, /*InsnID*/2, /*Opcode*/AArch64::REV64v16i8,
    6750             :       GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
    6751             :       GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
    6752             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
    6753             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::REV64v16i8,
    6754             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    6755             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
    6756             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    6757             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EXTv16i8,
    6758             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6759             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    6760             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/1, /*TempRegFlags*/0,
    6761             :       GIR_AddImm, /*InsnID*/0, /*Imm*/8,
    6762             :       GIR_EraseFromParent, /*InsnID*/0,
    6763             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6764             :       // GIR_Coverage, 3342,
    6765             :       GIR_Done,
    6766             :     // Label 460: @14984
    6767             :     GIM_Reject,
    6768             :     // Label 383: @14985
    6769             :     GIM_Try, /*On fail goto*//*Label 461*/ 15010, // Rule ID 3197 //
    6770             :       GIM_CheckFeatures, GIFBS_IsLE,
    6771             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6772             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6773             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    6774             :       // (bitconvert:{ *:[v2i32] } GPR64:{ *:[i64] }:$Xn)  =>  (COPY_TO_REGCLASS:{ *:[v2i32] } GPR64:{ *:[i64] }:$Xn, FPR64:{ *:[i32] })
    6775             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6776             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6777             :       // GIR_Coverage, 3197,
    6778             :       GIR_Done,
    6779             :     // Label 461: @15010
    6780             :     GIM_Try, /*On fail goto*//*Label 462*/ 15035, // Rule ID 3199 //
    6781             :       GIM_CheckFeatures, GIFBS_IsLE,
    6782             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6783             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6784             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    6785             :       // (bitconvert:{ *:[v2f32] } GPR64:{ *:[i64] }:$Xn)  =>  (COPY_TO_REGCLASS:{ *:[v2f32] } GPR64:{ *:[i64] }:$Xn, FPR64:{ *:[i32] })
    6786             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6787             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6788             :       // GIR_Coverage, 3199,
    6789             :       GIR_Done,
    6790             :     // Label 462: @15035
    6791             :     GIM_Try, /*On fail goto*//*Label 463*/ 15083, // Rule ID 3208 //
    6792             :       GIM_CheckFeatures, GIFBS_IsBE,
    6793             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6794             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6795             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    6796             :       // (bitconvert:{ *:[v2i32] } GPR64:{ *:[i64] }:$Xn)  =>  (REV64v2i32:{ *:[v2i32] } (COPY_TO_REGCLASS:{ *:[i64] } GPR64:{ *:[i64] }:$Xn, FPR64:{ *:[i32] }))
    6797             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
    6798             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY,
    6799             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    6800             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // Xn
    6801             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    6802             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    6803             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6804             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    6805             :       GIR_EraseFromParent, /*InsnID*/0,
    6806             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6807             :       // GIR_Coverage, 3208,
    6808             :       GIR_Done,
    6809             :     // Label 463: @15083
    6810             :     GIM_Try, /*On fail goto*//*Label 464*/ 15131, // Rule ID 3210 //
    6811             :       GIM_CheckFeatures, GIFBS_IsBE,
    6812             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6813             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6814             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    6815             :       // (bitconvert:{ *:[v2f32] } GPR64:{ *:[i64] }:$Xn)  =>  (REV64v2i32:{ *:[v2f32] } (COPY_TO_REGCLASS:{ *:[i64] } GPR64:{ *:[i64] }:$Xn, FPR64:{ *:[i32] }))
    6816             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
    6817             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY,
    6818             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    6819             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // Xn
    6820             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    6821             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    6822             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    6823             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    6824             :       GIR_EraseFromParent, /*InsnID*/0,
    6825             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6826             :       // GIR_Coverage, 3210,
    6827             :       GIR_Done,
    6828             :     // Label 464: @15131
    6829             :     GIM_Try, /*On fail goto*//*Label 465*/ 15165, // Rule ID 3239 //
    6830             :       GIM_CheckFeatures, GIFBS_IsLE,
    6831             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6832             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6833             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6834             :       // (bitconvert:{ *:[v2i32] } FPR64:{ *:[v1i64] }:$src)  =>  FPR64:{ *:[v2i32] }:$src
    6835             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6836             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6837             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6838             :       GIR_EraseFromParent, /*InsnID*/0,
    6839             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6840             :       // GIR_Coverage, 3239,
    6841             :       GIR_Done,
    6842             :     // Label 465: @15165
    6843             :     GIM_Try, /*On fail goto*//*Label 466*/ 15199, // Rule ID 3240 //
    6844             :       GIM_CheckFeatures, GIFBS_IsLE,
    6845             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6846             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6847             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6848             :       // (bitconvert:{ *:[v2i32] } FPR64:{ *:[v4i16] }:$src)  =>  FPR64:{ *:[v2i32] }:$src
    6849             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6850             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6851             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6852             :       GIR_EraseFromParent, /*InsnID*/0,
    6853             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6854             :       // GIR_Coverage, 3240,
    6855             :       GIR_Done,
    6856             :     // Label 466: @15199
    6857             :     GIM_Try, /*On fail goto*//*Label 467*/ 15233, // Rule ID 3241 //
    6858             :       GIM_CheckFeatures, GIFBS_IsLE,
    6859             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    6860             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6861             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6862             :       // (bitconvert:{ *:[v2i32] } FPR64:{ *:[v8i8] }:$src)  =>  FPR64:{ *:[v2i32] }:$src
    6863             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6864             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6865             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6866             :       GIR_EraseFromParent, /*InsnID*/0,
    6867             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6868             :       // GIR_Coverage, 3241,
    6869             :       GIR_Done,
    6870             :     // Label 467: @15233
    6871             :     GIM_Try, /*On fail goto*//*Label 468*/ 15267, // Rule ID 3242 //
    6872             :       GIM_CheckFeatures, GIFBS_IsLE,
    6873             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6874             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6875             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6876             :       // (bitconvert:{ *:[v2i32] } FPR64:{ *:[f64] }:$src)  =>  FPR64:{ *:[v2i32] }:$src
    6877             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6878             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6879             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6880             :       GIR_EraseFromParent, /*InsnID*/0,
    6881             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6882             :       // GIR_Coverage, 3242,
    6883             :       GIR_Done,
    6884             :     // Label 468: @15267
    6885             :     GIM_Try, /*On fail goto*//*Label 469*/ 15301, // Rule ID 3243 //
    6886             :       GIM_CheckFeatures, GIFBS_IsLE,
    6887             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6888             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6889             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6890             :       // (bitconvert:{ *:[v2i32] } FPR64:{ *:[v1f64] }:$src)  =>  FPR64:{ *:[v2i32] }:$src
    6891             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6892             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6893             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6894             :       GIR_EraseFromParent, /*InsnID*/0,
    6895             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6896             :       // GIR_Coverage, 3243,
    6897             :       GIR_Done,
    6898             :     // Label 469: @15301
    6899             :     GIM_Try, /*On fail goto*//*Label 470*/ 15335, // Rule ID 3244 //
    6900             :       GIM_CheckFeatures, GIFBS_IsLE,
    6901             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6902             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6903             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6904             :       // (bitconvert:{ *:[v2i32] } FPR64:{ *:[v4f16] }:$src)  =>  FPR64:{ *:[v2i32] }:$src
    6905             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6906             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6907             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6908             :       GIR_EraseFromParent, /*InsnID*/0,
    6909             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6910             :       // GIR_Coverage, 3244,
    6911             :       GIR_Done,
    6912             :     // Label 470: @15335
    6913             :     GIM_Try, /*On fail goto*//*Label 471*/ 15358, // Rule ID 3245 //
    6914             :       GIM_CheckFeatures, GIFBS_IsBE,
    6915             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6916             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6917             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6918             :       // (bitconvert:{ *:[v2i32] } FPR64:{ *:[v1i64] }:$src)  =>  (REV64v2i32:{ *:[v2i32] } FPR64:{ *:[v1i64] }:$src)
    6919             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    6920             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6921             :       // GIR_Coverage, 3245,
    6922             :       GIR_Done,
    6923             :     // Label 471: @15358
    6924             :     GIM_Try, /*On fail goto*//*Label 472*/ 15381, // Rule ID 3246 //
    6925             :       GIM_CheckFeatures, GIFBS_IsBE,
    6926             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6927             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6928             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6929             :       // (bitconvert:{ *:[v2i32] } FPR64:{ *:[v4i16] }:$src)  =>  (REV32v4i16:{ *:[v2i32] } FPR64:{ *:[v4i16] }:$src)
    6930             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v4i16,
    6931             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6932             :       // GIR_Coverage, 3246,
    6933             :       GIR_Done,
    6934             :     // Label 472: @15381
    6935             :     GIM_Try, /*On fail goto*//*Label 473*/ 15404, // Rule ID 3247 //
    6936             :       GIM_CheckFeatures, GIFBS_IsBE,
    6937             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    6938             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6939             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6940             :       // (bitconvert:{ *:[v2i32] } FPR64:{ *:[v8i8] }:$src)  =>  (REV32v8i8:{ *:[v2i32] } FPR64:{ *:[v8i8] }:$src)
    6941             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v8i8,
    6942             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6943             :       // GIR_Coverage, 3247,
    6944             :       GIR_Done,
    6945             :     // Label 473: @15404
    6946             :     GIM_Try, /*On fail goto*//*Label 474*/ 15427, // Rule ID 3248 //
    6947             :       GIM_CheckFeatures, GIFBS_IsBE,
    6948             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6949             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6950             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6951             :       // (bitconvert:{ *:[v2i32] } FPR64:{ *:[f64] }:$src)  =>  (REV64v2i32:{ *:[v2i32] } FPR64:{ *:[f64] }:$src)
    6952             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    6953             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6954             :       // GIR_Coverage, 3248,
    6955             :       GIR_Done,
    6956             :     // Label 474: @15427
    6957             :     GIM_Try, /*On fail goto*//*Label 475*/ 15450, // Rule ID 3249 //
    6958             :       GIM_CheckFeatures, GIFBS_IsBE,
    6959             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6960             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6961             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6962             :       // (bitconvert:{ *:[v2i32] } FPR64:{ *:[v1f64] }:$src)  =>  (REV64v2i32:{ *:[v2i32] } FPR64:{ *:[v1f64] }:$src)
    6963             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    6964             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6965             :       // GIR_Coverage, 3249,
    6966             :       GIR_Done,
    6967             :     // Label 475: @15450
    6968             :     GIM_Try, /*On fail goto*//*Label 476*/ 15473, // Rule ID 3250 //
    6969             :       GIM_CheckFeatures, GIFBS_IsBE,
    6970             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    6971             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6972             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6973             :       // (bitconvert:{ *:[v2i32] } FPR64:{ *:[v4f16] }:$src)  =>  (REV32v4i16:{ *:[v2i32] } FPR64:{ *:[v4f16] }:$src)
    6974             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v4i16,
    6975             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6976             :       // GIR_Coverage, 3250,
    6977             :       GIR_Done,
    6978             :     // Label 476: @15473
    6979             :     GIM_Try, /*On fail goto*//*Label 477*/ 15505, // Rule ID 3251 //
    6980             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    6981             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6982             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6983             :       // (bitconvert:{ *:[v2i32] } FPR64:{ *:[v2f32] }:$src)  =>  FPR64:{ *:[v2i32] }:$src
    6984             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6985             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6986             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    6987             :       GIR_EraseFromParent, /*InsnID*/0,
    6988             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    6989             :       // GIR_Coverage, 3251,
    6990             :       GIR_Done,
    6991             :     // Label 477: @15505
    6992             :     GIM_Try, /*On fail goto*//*Label 478*/ 15539, // Rule ID 3316 //
    6993             :       GIM_CheckFeatures, GIFBS_IsLE,
    6994             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6995             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    6996             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    6997             :       // (bitconvert:{ *:[v2f32] } FPR64:{ *:[v1i64] }:$src)  =>  FPR64:{ *:[v2f32] }:$src
    6998             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    6999             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7000             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7001             :       GIR_EraseFromParent, /*InsnID*/0,
    7002             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7003             :       // GIR_Coverage, 3316,
    7004             :       GIR_Done,
    7005             :     // Label 478: @15539
    7006             :     GIM_Try, /*On fail goto*//*Label 479*/ 15573, // Rule ID 3317 //
    7007             :       GIM_CheckFeatures, GIFBS_IsLE,
    7008             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    7009             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7010             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7011             :       // (bitconvert:{ *:[v2f32] } FPR64:{ *:[v4i16] }:$src)  =>  FPR64:{ *:[v2f32] }:$src
    7012             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7013             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7014             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7015             :       GIR_EraseFromParent, /*InsnID*/0,
    7016             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7017             :       // GIR_Coverage, 3317,
    7018             :       GIR_Done,
    7019             :     // Label 479: @15573
    7020             :     GIM_Try, /*On fail goto*//*Label 480*/ 15607, // Rule ID 3318 //
    7021             :       GIM_CheckFeatures, GIFBS_IsLE,
    7022             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    7023             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7024             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7025             :       // (bitconvert:{ *:[v2f32] } FPR64:{ *:[v8i8] }:$src)  =>  FPR64:{ *:[v2f32] }:$src
    7026             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7027             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7028             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7029             :       GIR_EraseFromParent, /*InsnID*/0,
    7030             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7031             :       // GIR_Coverage, 3318,
    7032             :       GIR_Done,
    7033             :     // Label 480: @15607
    7034             :     GIM_Try, /*On fail goto*//*Label 481*/ 15641, // Rule ID 3319 //
    7035             :       GIM_CheckFeatures, GIFBS_IsLE,
    7036             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7037             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7038             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7039             :       // (bitconvert:{ *:[v2f32] } FPR64:{ *:[v1f64] }:$src)  =>  FPR64:{ *:[v2f32] }:$src
    7040             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7041             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7042             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7043             :       GIR_EraseFromParent, /*InsnID*/0,
    7044             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7045             :       // GIR_Coverage, 3319,
    7046             :       GIR_Done,
    7047             :     // Label 481: @15641
    7048             :     GIM_Try, /*On fail goto*//*Label 482*/ 15675, // Rule ID 3320 //
    7049             :       GIM_CheckFeatures, GIFBS_IsLE,
    7050             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7051             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7052             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7053             :       // (bitconvert:{ *:[v2f32] } FPR64:{ *:[f64] }:$src)  =>  FPR64:{ *:[v2f32] }:$src
    7054             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7055             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7056             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7057             :       GIR_EraseFromParent, /*InsnID*/0,
    7058             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7059             :       // GIR_Coverage, 3320,
    7060             :       GIR_Done,
    7061             :     // Label 482: @15675
    7062             :     GIM_Try, /*On fail goto*//*Label 483*/ 15709, // Rule ID 3321 //
    7063             :       GIM_CheckFeatures, GIFBS_IsLE,
    7064             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    7065             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7066             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7067             :       // (bitconvert:{ *:[v2f32] } FPR64:{ *:[v4f16] }:$src)  =>  FPR64:{ *:[v2f32] }:$src
    7068             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7069             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7070             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7071             :       GIR_EraseFromParent, /*InsnID*/0,
    7072             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7073             :       // GIR_Coverage, 3321,
    7074             :       GIR_Done,
    7075             :     // Label 483: @15709
    7076             :     GIM_Try, /*On fail goto*//*Label 484*/ 15732, // Rule ID 3322 //
    7077             :       GIM_CheckFeatures, GIFBS_IsBE,
    7078             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7079             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7080             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7081             :       // (bitconvert:{ *:[v2f32] } FPR64:{ *:[v1i64] }:$src)  =>  (REV64v2i32:{ *:[v2f32] } FPR64:{ *:[v1i64] }:$src)
    7082             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    7083             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7084             :       // GIR_Coverage, 3322,
    7085             :       GIR_Done,
    7086             :     // Label 484: @15732
    7087             :     GIM_Try, /*On fail goto*//*Label 485*/ 15755, // Rule ID 3323 //
    7088             :       GIM_CheckFeatures, GIFBS_IsBE,
    7089             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    7090             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7091             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7092             :       // (bitconvert:{ *:[v2f32] } FPR64:{ *:[v4i16] }:$src)  =>  (REV32v4i16:{ *:[v2f32] } FPR64:{ *:[v4i16] }:$src)
    7093             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v4i16,
    7094             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7095             :       // GIR_Coverage, 3323,
    7096             :       GIR_Done,
    7097             :     // Label 485: @15755
    7098             :     GIM_Try, /*On fail goto*//*Label 486*/ 15778, // Rule ID 3324 //
    7099             :       GIM_CheckFeatures, GIFBS_IsBE,
    7100             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    7101             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7102             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7103             :       // (bitconvert:{ *:[v2f32] } FPR64:{ *:[v8i8] }:$src)  =>  (REV32v8i8:{ *:[v2f32] } FPR64:{ *:[v8i8] }:$src)
    7104             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v8i8,
    7105             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7106             :       // GIR_Coverage, 3324,
    7107             :       GIR_Done,
    7108             :     // Label 486: @15778
    7109             :     GIM_Try, /*On fail goto*//*Label 487*/ 15801, // Rule ID 3325 //
    7110             :       GIM_CheckFeatures, GIFBS_IsBE,
    7111             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7112             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7113             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7114             :       // (bitconvert:{ *:[v2f32] } FPR64:{ *:[v1f64] }:$src)  =>  (REV64v2i32:{ *:[v2f32] } FPR64:{ *:[v1f64] }:$src)
    7115             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    7116             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7117             :       // GIR_Coverage, 3325,
    7118             :       GIR_Done,
    7119             :     // Label 487: @15801
    7120             :     GIM_Try, /*On fail goto*//*Label 488*/ 15824, // Rule ID 3326 //
    7121             :       GIM_CheckFeatures, GIFBS_IsBE,
    7122             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7123             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7124             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7125             :       // (bitconvert:{ *:[v2f32] } FPR64:{ *:[f64] }:$src)  =>  (REV64v2i32:{ *:[v2f32] } FPR64:{ *:[f64] }:$src)
    7126             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v2i32,
    7127             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7128             :       // GIR_Coverage, 3326,
    7129             :       GIR_Done,
    7130             :     // Label 488: @15824
    7131             :     GIM_Try, /*On fail goto*//*Label 489*/ 15847, // Rule ID 3327 //
    7132             :       GIM_CheckFeatures, GIFBS_IsBE,
    7133             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    7134             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7135             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7136             :       // (bitconvert:{ *:[v2f32] } FPR64:{ *:[v4f16] }:$src)  =>  (REV32v4i16:{ *:[v2f32] } FPR64:{ *:[v4f16] }:$src)
    7137             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v4i16,
    7138             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7139             :       // GIR_Coverage, 3327,
    7140             :       GIR_Done,
    7141             :     // Label 489: @15847
    7142             :     GIM_Try, /*On fail goto*//*Label 490*/ 15879, // Rule ID 3328 //
    7143             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    7144             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7145             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7146             :       // (bitconvert:{ *:[v2f32] } FPR64:{ *:[v2i32] }:$src)  =>  FPR64:{ *:[v2f32] }:$src
    7147             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7148             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7149             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7150             :       GIR_EraseFromParent, /*InsnID*/0,
    7151             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7152             :       // GIR_Coverage, 3328,
    7153             :       GIR_Done,
    7154             :     // Label 490: @15879
    7155             :     GIM_Reject,
    7156             :     // Label 384: @15880
    7157             :     GIM_Try, /*On fail goto*//*Label 491*/ 15914, // Rule ID 3343 //
    7158             :       GIM_CheckFeatures, GIFBS_IsLE,
    7159             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
    7160             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7161             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7162             :       // (bitconvert:{ *:[v2f64] } FPR128:{ *:[f128] }:$src)  =>  FPR128:{ *:[v2f64] }:$src
    7163             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7164             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7165             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7166             :       GIR_EraseFromParent, /*InsnID*/0,
    7167             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    7168             :       // GIR_Coverage, 3343,
    7169             :       GIR_Done,
    7170             :     // Label 491: @15914
    7171             :     GIM_Try, /*On fail goto*//*Label 492*/ 15948, // Rule ID 3344 //
    7172             :       GIM_CheckFeatures, GIFBS_IsLE,
    7173             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    7174             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7175             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7176             :       // (bitconvert:{ *:[v2f64] } FPR128:{ *:[v4i32] }:$src)  =>  FPR128:{ *:[v2f64] }:$src
    7177             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7178             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7179             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7180             :       GIR_EraseFromParent, /*InsnID*/0,
    7181             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    7182             :       // GIR_Coverage, 3344,
    7183             :       GIR_Done,
    7184             :     // Label 492: @15948
    7185             :     GIM_Try, /*On fail goto*//*Label 493*/ 15982, // Rule ID 3345 //
    7186             :       GIM_CheckFeatures, GIFBS_IsLE,
    7187             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    7188             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7189             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7190             :       // (bitconvert:{ *:[v2f64] } FPR128:{ *:[v8i16] }:$src)  =>  FPR128:{ *:[v2f64] }:$src
    7191             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7192             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7193             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7194             :       GIR_EraseFromParent, /*InsnID*/0,
    7195             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    7196             :       // GIR_Coverage, 3345,
    7197             :       GIR_Done,
    7198             :     // Label 493: @15982
    7199             :     GIM_Try, /*On fail goto*//*Label 494*/ 16016, // Rule ID 3346 //
    7200             :       GIM_CheckFeatures, GIFBS_IsLE,
    7201             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    7202             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7203             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7204             :       // (bitconvert:{ *:[v2f64] } FPR128:{ *:[v8f16] }:$src)  =>  FPR128:{ *:[v2f64] }:$src
    7205             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7206             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7207             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7208             :       GIR_EraseFromParent, /*InsnID*/0,
    7209             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    7210             :       // GIR_Coverage, 3346,
    7211             :       GIR_Done,
    7212             :     // Label 494: @16016
    7213             :     GIM_Try, /*On fail goto*//*Label 495*/ 16050, // Rule ID 3347 //
    7214             :       GIM_CheckFeatures, GIFBS_IsLE,
    7215             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    7216             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7217             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7218             :       // (bitconvert:{ *:[v2f64] } FPR128:{ *:[v16i8] }:$src)  =>  FPR128:{ *:[v2f64] }:$src
    7219             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7220             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7221             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7222             :       GIR_EraseFromParent, /*InsnID*/0,
    7223             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    7224             :       // GIR_Coverage, 3347,
    7225             :       GIR_Done,
    7226             :     // Label 495: @16050
    7227             :     GIM_Try, /*On fail goto*//*Label 496*/ 16084, // Rule ID 3348 //
    7228             :       GIM_CheckFeatures, GIFBS_IsLE,
    7229             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    7230             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7231             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7232             :       // (bitconvert:{ *:[v2f64] } FPR128:{ *:[v4f32] }:$src)  =>  FPR128:{ *:[v2f64] }:$src
    7233             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7234             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7235             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7236             :       GIR_EraseFromParent, /*InsnID*/0,
    7237             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    7238             :       // GIR_Coverage, 3348,
    7239             :       GIR_Done,
    7240             :     // Label 496: @16084
    7241             :     GIM_Try, /*On fail goto*//*Label 497*/ 16123, // Rule ID 3349 //
    7242             :       GIM_CheckFeatures, GIFBS_IsBE,
    7243             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
    7244             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7245             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7246             :       // (bitconvert:{ *:[v2f64] } FPR128:{ *:[f128] }:$src)  =>  (EXTv16i8:{ *:[v2f64] } FPR128:{ *:[f128] }:$src, FPR128:{ *:[f128] }:$src, 8:{ *:[i32] })
    7247             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EXTv16i8,
    7248             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7249             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7250             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7251             :       GIR_AddImm, /*InsnID*/0, /*Imm*/8,
    7252             :       GIR_EraseFromParent, /*InsnID*/0,
    7253             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7254             :       // GIR_Coverage, 3349,
    7255             :       GIR_Done,
    7256             :     // Label 497: @16123
    7257             :     GIM_Try, /*On fail goto*//*Label 498*/ 16146, // Rule ID 3350 //
    7258             :       GIM_CheckFeatures, GIFBS_IsBE,
    7259             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    7260             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7261             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7262             :       // (bitconvert:{ *:[v2f64] } FPR128:{ *:[v4i32] }:$src)  =>  (REV64v4i32:{ *:[v2f64] } FPR128:{ *:[v4i32] }:$src)
    7263             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i32,
    7264             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7265             :       // GIR_Coverage, 3350,
    7266             :       GIR_Done,
    7267             :     // Label 498: @16146
    7268             :     GIM_Try, /*On fail goto*//*Label 499*/ 16169, // Rule ID 3351 //
    7269             :       GIM_CheckFeatures, GIFBS_IsBE,
    7270             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    7271             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7272             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7273             :       // (bitconvert:{ *:[v2f64] } FPR128:{ *:[v8i16] }:$src)  =>  (REV64v8i16:{ *:[v2f64] } FPR128:{ *:[v8i16] }:$src)
    7274             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v8i16,
    7275             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7276             :       // GIR_Coverage, 3351,
    7277             :       GIR_Done,
    7278             :     // Label 499: @16169
    7279             :     GIM_Try, /*On fail goto*//*Label 500*/ 16192, // Rule ID 3352 //
    7280             :       GIM_CheckFeatures, GIFBS_IsBE,
    7281             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    7282             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7283             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7284             :       // (bitconvert:{ *:[v2f64] } FPR128:{ *:[v8f16] }:$src)  =>  (REV64v8i16:{ *:[v2f64] } FPR128:{ *:[v8f16] }:$src)
    7285             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v8i16,
    7286             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7287             :       // GIR_Coverage, 3352,
    7288             :       GIR_Done,
    7289             :     // Label 500: @16192
    7290             :     GIM_Try, /*On fail goto*//*Label 501*/ 16215, // Rule ID 3353 //
    7291             :       GIM_CheckFeatures, GIFBS_IsBE,
    7292             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    7293             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7294             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7295             :       // (bitconvert:{ *:[v2f64] } FPR128:{ *:[v16i8] }:$src)  =>  (REV64v16i8:{ *:[v2f64] } FPR128:{ *:[v16i8] }:$src)
    7296             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v16i8,
    7297             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7298             :       // GIR_Coverage, 3353,
    7299             :       GIR_Done,
    7300             :     // Label 501: @16215
    7301             :     GIM_Try, /*On fail goto*//*Label 502*/ 16238, // Rule ID 3354 //
    7302             :       GIM_CheckFeatures, GIFBS_IsBE,
    7303             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    7304             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7305             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7306             :       // (bitconvert:{ *:[v2f64] } FPR128:{ *:[v4f32] }:$src)  =>  (REV64v4i32:{ *:[v2f64] } FPR128:{ *:[v4f32] }:$src)
    7307             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i32,
    7308             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7309             :       // GIR_Coverage, 3354,
    7310             :       GIR_Done,
    7311             :     // Label 502: @16238
    7312             :     GIM_Try, /*On fail goto*//*Label 503*/ 16270, // Rule ID 3355 //
    7313             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    7314             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7315             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7316             :       // (bitconvert:{ *:[v2f64] } FPR128:{ *:[v2i64] }:$src)  =>  FPR128:{ *:[v2f64] }:$src
    7317             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7318             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7319             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7320             :       GIR_EraseFromParent, /*InsnID*/0,
    7321             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    7322             :       // GIR_Coverage, 3355,
    7323             :       GIR_Done,
    7324             :     // Label 503: @16270
    7325             :     GIM_Try, /*On fail goto*//*Label 504*/ 16304, // Rule ID 3369 //
    7326             :       GIM_CheckFeatures, GIFBS_IsLE,
    7327             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
    7328             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7329             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7330             :       // (bitconvert:{ *:[v2i64] } FPR128:{ *:[f128] }:$src)  =>  FPR128:{ *:[v2i64] }:$src
    7331             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7332             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7333             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7334             :       GIR_EraseFromParent, /*InsnID*/0,
    7335             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    7336             :       // GIR_Coverage, 3369,
    7337             :       GIR_Done,
    7338             :     // Label 504: @16304
    7339             :     GIM_Try, /*On fail goto*//*Label 505*/ 16338, // Rule ID 3370 //
    7340             :       GIM_CheckFeatures, GIFBS_IsLE,
    7341             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    7342             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7343             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7344             :       // (bitconvert:{ *:[v2i64] } FPR128:{ *:[v4i32] }:$src)  =>  FPR128:{ *:[v2i64] }:$src
    7345             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7346             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7347             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7348             :       GIR_EraseFromParent, /*InsnID*/0,
    7349             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    7350             :       // GIR_Coverage, 3370,
    7351             :       GIR_Done,
    7352             :     // Label 505: @16338
    7353             :     GIM_Try, /*On fail goto*//*Label 506*/ 16372, // Rule ID 3371 //
    7354             :       GIM_CheckFeatures, GIFBS_IsLE,
    7355             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    7356             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7357             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7358             :       // (bitconvert:{ *:[v2i64] } FPR128:{ *:[v8i16] }:$src)  =>  FPR128:{ *:[v2i64] }:$src
    7359             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7360             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7361             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7362             :       GIR_EraseFromParent, /*InsnID*/0,
    7363             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    7364             :       // GIR_Coverage, 3371,
    7365             :       GIR_Done,
    7366             :     // Label 506: @16372
    7367             :     GIM_Try, /*On fail goto*//*Label 507*/ 16406, // Rule ID 3372 //
    7368             :       GIM_CheckFeatures, GIFBS_IsLE,
    7369             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    7370             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7371             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7372             :       // (bitconvert:{ *:[v2i64] } FPR128:{ *:[v16i8] }:$src)  =>  FPR128:{ *:[v2i64] }:$src
    7373             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7374             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7375             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7376             :       GIR_EraseFromParent, /*InsnID*/0,
    7377             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    7378             :       // GIR_Coverage, 3372,
    7379             :       GIR_Done,
    7380             :     // Label 507: @16406
    7381             :     GIM_Try, /*On fail goto*//*Label 508*/ 16440, // Rule ID 3373 //
    7382             :       GIM_CheckFeatures, GIFBS_IsLE,
    7383             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    7384             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7385             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7386             :       // (bitconvert:{ *:[v2i64] } FPR128:{ *:[v4f32] }:$src)  =>  FPR128:{ *:[v2i64] }:$src
    7387             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7388             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7389             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7390             :       GIR_EraseFromParent, /*InsnID*/0,
    7391             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    7392             :       // GIR_Coverage, 3373,
    7393             :       GIR_Done,
    7394             :     // Label 508: @16440
    7395             :     GIM_Try, /*On fail goto*//*Label 509*/ 16474, // Rule ID 3374 //
    7396             :       GIM_CheckFeatures, GIFBS_IsLE,
    7397             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    7398             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7399             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7400             :       // (bitconvert:{ *:[v2i64] } FPR128:{ *:[v8f16] }:$src)  =>  FPR128:{ *:[v2i64] }:$src
    7401             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7402             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7403             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7404             :       GIR_EraseFromParent, /*InsnID*/0,
    7405             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    7406             :       // GIR_Coverage, 3374,
    7407             :       GIR_Done,
    7408             :     // Label 509: @16474
    7409             :     GIM_Try, /*On fail goto*//*Label 510*/ 16513, // Rule ID 3375 //
    7410             :       GIM_CheckFeatures, GIFBS_IsBE,
    7411             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
    7412             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7413             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7414             :       // (bitconvert:{ *:[v2i64] } FPR128:{ *:[f128] }:$src)  =>  (EXTv16i8:{ *:[v2i64] } FPR128:{ *:[f128] }:$src, FPR128:{ *:[f128] }:$src, 8:{ *:[i32] })
    7415             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EXTv16i8,
    7416             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7417             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7418             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7419             :       GIR_AddImm, /*InsnID*/0, /*Imm*/8,
    7420             :       GIR_EraseFromParent, /*InsnID*/0,
    7421             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7422             :       // GIR_Coverage, 3375,
    7423             :       GIR_Done,
    7424             :     // Label 510: @16513
    7425             :     GIM_Try, /*On fail goto*//*Label 511*/ 16536, // Rule ID 3376 //
    7426             :       GIM_CheckFeatures, GIFBS_IsBE,
    7427             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    7428             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7429             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7430             :       // (bitconvert:{ *:[v2i64] } FPR128:{ *:[v4i32] }:$src)  =>  (REV64v4i32:{ *:[v2i64] } FPR128:{ *:[v4i32] }:$src)
    7431             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i32,
    7432             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7433             :       // GIR_Coverage, 3376,
    7434             :       GIR_Done,
    7435             :     // Label 511: @16536
    7436             :     GIM_Try, /*On fail goto*//*Label 512*/ 16559, // Rule ID 3377 //
    7437             :       GIM_CheckFeatures, GIFBS_IsBE,
    7438             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    7439             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7440             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7441             :       // (bitconvert:{ *:[v2i64] } FPR128:{ *:[v8i16] }:$src)  =>  (REV64v8i16:{ *:[v2i64] } FPR128:{ *:[v8i16] }:$src)
    7442             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v8i16,
    7443             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7444             :       // GIR_Coverage, 3377,
    7445             :       GIR_Done,
    7446             :     // Label 512: @16559
    7447             :     GIM_Try, /*On fail goto*//*Label 513*/ 16582, // Rule ID 3378 //
    7448             :       GIM_CheckFeatures, GIFBS_IsBE,
    7449             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    7450             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7451             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7452             :       // (bitconvert:{ *:[v2i64] } FPR128:{ *:[v16i8] }:$src)  =>  (REV64v16i8:{ *:[v2i64] } FPR128:{ *:[v16i8] }:$src)
    7453             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v16i8,
    7454             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7455             :       // GIR_Coverage, 3378,
    7456             :       GIR_Done,
    7457             :     // Label 513: @16582
    7458             :     GIM_Try, /*On fail goto*//*Label 514*/ 16605, // Rule ID 3379 //
    7459             :       GIM_CheckFeatures, GIFBS_IsBE,
    7460             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    7461             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7462             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7463             :       // (bitconvert:{ *:[v2i64] } FPR128:{ *:[v4f32] }:$src)  =>  (REV64v4i32:{ *:[v2i64] } FPR128:{ *:[v4f32] }:$src)
    7464             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i32,
    7465             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7466             :       // GIR_Coverage, 3379,
    7467             :       GIR_Done,
    7468             :     // Label 514: @16605
    7469             :     GIM_Try, /*On fail goto*//*Label 515*/ 16628, // Rule ID 3380 //
    7470             :       GIM_CheckFeatures, GIFBS_IsBE,
    7471             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    7472             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7473             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7474             :       // (bitconvert:{ *:[v2i64] } FPR128:{ *:[v8f16] }:$src)  =>  (REV64v8i16:{ *:[v2i64] } FPR128:{ *:[v8f16] }:$src)
    7475             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v8i16,
    7476             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7477             :       // GIR_Coverage, 3380,
    7478             :       GIR_Done,
    7479             :     // Label 515: @16628
    7480             :     GIM_Try, /*On fail goto*//*Label 516*/ 16660, // Rule ID 3381 //
    7481             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    7482             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7483             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7484             :       // (bitconvert:{ *:[v2i64] } FPR128:{ *:[v2f64] }:$src)  =>  FPR128:{ *:[v2i64] }:$src
    7485             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7486             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7487             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7488             :       GIR_EraseFromParent, /*InsnID*/0,
    7489             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    7490             :       // GIR_Coverage, 3381,
    7491             :       GIR_Done,
    7492             :     // Label 516: @16660
    7493             :     GIM_Reject,
    7494             :     // Label 385: @16661
    7495             :     GIM_Try, /*On fail goto*//*Label 517*/ 16686, // Rule ID 3196 //
    7496             :       GIM_CheckFeatures, GIFBS_IsLE,
    7497             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7498             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7499             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    7500             :       // (bitconvert:{ *:[v4i16] } GPR64:{ *:[i64] }:$Xn)  =>  (COPY_TO_REGCLASS:{ *:[v4i16] } GPR64:{ *:[i64] }:$Xn, FPR64:{ *:[i32] })
    7501             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7502             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7503             :       // GIR_Coverage, 3196,
    7504             :       GIR_Done,
    7505             :     // Label 517: @16686
    7506             :     GIM_Try, /*On fail goto*//*Label 518*/ 16711, // Rule ID 3198 //
    7507             :       GIM_CheckFeatures, GIFBS_IsLE,
    7508             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7509             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7510             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    7511             :       // (bitconvert:{ *:[v4f16] } GPR64:{ *:[i64] }:$Xn)  =>  (COPY_TO_REGCLASS:{ *:[v4f16] } GPR64:{ *:[i64] }:$Xn, FPR64:{ *:[i32] })
    7512             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7513             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7514             :       // GIR_Coverage, 3198,
    7515             :       GIR_Done,
    7516             :     // Label 518: @16711
    7517             :     GIM_Try, /*On fail goto*//*Label 519*/ 16759, // Rule ID 3207 //
    7518             :       GIM_CheckFeatures, GIFBS_IsBE,
    7519             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7520             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7521             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    7522             :       // (bitconvert:{ *:[v4i16] } GPR64:{ *:[i64] }:$Xn)  =>  (REV64v4i16:{ *:[v4i16] } (COPY_TO_REGCLASS:{ *:[i64] } GPR64:{ *:[i64] }:$Xn, FPR64:{ *:[i32] }))
    7523             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
    7524             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY,
    7525             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    7526             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // Xn
    7527             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    7528             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    7529             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7530             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    7531             :       GIR_EraseFromParent, /*InsnID*/0,
    7532             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7533             :       // GIR_Coverage, 3207,
    7534             :       GIR_Done,
    7535             :     // Label 519: @16759
    7536             :     GIM_Try, /*On fail goto*//*Label 520*/ 16807, // Rule ID 3209 //
    7537             :       GIM_CheckFeatures, GIFBS_IsBE,
    7538             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7539             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7540             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    7541             :       // (bitconvert:{ *:[v4f16] } GPR64:{ *:[i64] }:$Xn)  =>  (REV64v4i16:{ *:[v4f16] } (COPY_TO_REGCLASS:{ *:[i64] } GPR64:{ *:[i64] }:$Xn, FPR64:{ *:[i32] }))
    7542             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
    7543             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY,
    7544             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    7545             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // Xn
    7546             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    7547             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    7548             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7549             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    7550             :       GIR_EraseFromParent, /*InsnID*/0,
    7551             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7552             :       // GIR_Coverage, 3209,
    7553             :       GIR_Done,
    7554             :     // Label 520: @16807
    7555             :     GIM_Try, /*On fail goto*//*Label 521*/ 16841, // Rule ID 3252 //
    7556             :       GIM_CheckFeatures, GIFBS_IsLE,
    7557             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7558             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7559             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7560             :       // (bitconvert:{ *:[v4i16] } FPR64:{ *:[v1i64] }:$src)  =>  FPR64:{ *:[v4i16] }:$src
    7561             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7562             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7563             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7564             :       GIR_EraseFromParent, /*InsnID*/0,
    7565             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7566             :       // GIR_Coverage, 3252,
    7567             :       GIR_Done,
    7568             :     // Label 521: @16841
    7569             :     GIM_Try, /*On fail goto*//*Label 522*/ 16875, // Rule ID 3253 //
    7570             :       GIM_CheckFeatures, GIFBS_IsLE,
    7571             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    7572             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7573             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7574             :       // (bitconvert:{ *:[v4i16] } FPR64:{ *:[v2i32] }:$src)  =>  FPR64:{ *:[v4i16] }:$src
    7575             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7576             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7577             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7578             :       GIR_EraseFromParent, /*InsnID*/0,
    7579             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7580             :       // GIR_Coverage, 3253,
    7581             :       GIR_Done,
    7582             :     // Label 522: @16875
    7583             :     GIM_Try, /*On fail goto*//*Label 523*/ 16909, // Rule ID 3254 //
    7584             :       GIM_CheckFeatures, GIFBS_IsLE,
    7585             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    7586             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7587             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7588             :       // (bitconvert:{ *:[v4i16] } FPR64:{ *:[v8i8] }:$src)  =>  FPR64:{ *:[v4i16] }:$src
    7589             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7590             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7591             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7592             :       GIR_EraseFromParent, /*InsnID*/0,
    7593             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7594             :       // GIR_Coverage, 3254,
    7595             :       GIR_Done,
    7596             :     // Label 523: @16909
    7597             :     GIM_Try, /*On fail goto*//*Label 524*/ 16943, // Rule ID 3255 //
    7598             :       GIM_CheckFeatures, GIFBS_IsLE,
    7599             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7600             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7601             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7602             :       // (bitconvert:{ *:[v4i16] } FPR64:{ *:[f64] }:$src)  =>  FPR64:{ *:[v4i16] }:$src
    7603             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7604             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7605             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7606             :       GIR_EraseFromParent, /*InsnID*/0,
    7607             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7608             :       // GIR_Coverage, 3255,
    7609             :       GIR_Done,
    7610             :     // Label 524: @16943
    7611             :     GIM_Try, /*On fail goto*//*Label 525*/ 16977, // Rule ID 3256 //
    7612             :       GIM_CheckFeatures, GIFBS_IsLE,
    7613             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    7614             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7615             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7616             :       // (bitconvert:{ *:[v4i16] } FPR64:{ *:[v2f32] }:$src)  =>  FPR64:{ *:[v4i16] }:$src
    7617             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7618             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7619             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7620             :       GIR_EraseFromParent, /*InsnID*/0,
    7621             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7622             :       // GIR_Coverage, 3256,
    7623             :       GIR_Done,
    7624             :     // Label 525: @16977
    7625             :     GIM_Try, /*On fail goto*//*Label 526*/ 17011, // Rule ID 3257 //
    7626             :       GIM_CheckFeatures, GIFBS_IsLE,
    7627             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7628             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7629             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7630             :       // (bitconvert:{ *:[v4i16] } FPR64:{ *:[v1f64] }:$src)  =>  FPR64:{ *:[v4i16] }:$src
    7631             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7632             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7633             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7634             :       GIR_EraseFromParent, /*InsnID*/0,
    7635             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7636             :       // GIR_Coverage, 3257,
    7637             :       GIR_Done,
    7638             :     // Label 526: @17011
    7639             :     GIM_Try, /*On fail goto*//*Label 527*/ 17034, // Rule ID 3258 //
    7640             :       GIM_CheckFeatures, GIFBS_IsBE,
    7641             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7642             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7643             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7644             :       // (bitconvert:{ *:[v4i16] } FPR64:{ *:[v1i64] }:$src)  =>  (REV64v4i16:{ *:[v4i16] } FPR64:{ *:[v1i64] }:$src)
    7645             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    7646             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7647             :       // GIR_Coverage, 3258,
    7648             :       GIR_Done,
    7649             :     // Label 527: @17034
    7650             :     GIM_Try, /*On fail goto*//*Label 528*/ 17057, // Rule ID 3259 //
    7651             :       GIM_CheckFeatures, GIFBS_IsBE,
    7652             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    7653             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7654             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7655             :       // (bitconvert:{ *:[v4i16] } FPR64:{ *:[v2i32] }:$src)  =>  (REV32v4i16:{ *:[v4i16] } FPR64:{ *:[v2i32] }:$src)
    7656             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v4i16,
    7657             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7658             :       // GIR_Coverage, 3259,
    7659             :       GIR_Done,
    7660             :     // Label 528: @17057
    7661             :     GIM_Try, /*On fail goto*//*Label 529*/ 17080, // Rule ID 3260 //
    7662             :       GIM_CheckFeatures, GIFBS_IsBE,
    7663             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    7664             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7665             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7666             :       // (bitconvert:{ *:[v4i16] } FPR64:{ *:[v8i8] }:$src)  =>  (REV16v8i8:{ *:[v4i16] } FPR64:{ *:[v8i8] }:$src)
    7667             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV16v8i8,
    7668             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7669             :       // GIR_Coverage, 3260,
    7670             :       GIR_Done,
    7671             :     // Label 529: @17080
    7672             :     GIM_Try, /*On fail goto*//*Label 530*/ 17103, // Rule ID 3261 //
    7673             :       GIM_CheckFeatures, GIFBS_IsBE,
    7674             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7675             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7676             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7677             :       // (bitconvert:{ *:[v4i16] } FPR64:{ *:[f64] }:$src)  =>  (REV64v4i16:{ *:[v4i16] } FPR64:{ *:[f64] }:$src)
    7678             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    7679             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7680             :       // GIR_Coverage, 3261,
    7681             :       GIR_Done,
    7682             :     // Label 530: @17103
    7683             :     GIM_Try, /*On fail goto*//*Label 531*/ 17126, // Rule ID 3262 //
    7684             :       GIM_CheckFeatures, GIFBS_IsBE,
    7685             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    7686             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7687             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7688             :       // (bitconvert:{ *:[v4i16] } FPR64:{ *:[v2f32] }:$src)  =>  (REV32v4i16:{ *:[v4i16] } FPR64:{ *:[v2f32] }:$src)
    7689             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v4i16,
    7690             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7691             :       // GIR_Coverage, 3262,
    7692             :       GIR_Done,
    7693             :     // Label 531: @17126
    7694             :     GIM_Try, /*On fail goto*//*Label 532*/ 17149, // Rule ID 3263 //
    7695             :       GIM_CheckFeatures, GIFBS_IsBE,
    7696             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7697             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7698             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7699             :       // (bitconvert:{ *:[v4i16] } FPR64:{ *:[v1f64] }:$src)  =>  (REV64v4i16:{ *:[v4i16] } FPR64:{ *:[v1f64] }:$src)
    7700             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    7701             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7702             :       // GIR_Coverage, 3263,
    7703             :       GIR_Done,
    7704             :     // Label 532: @17149
    7705             :     GIM_Try, /*On fail goto*//*Label 533*/ 17181, // Rule ID 3264 //
    7706             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    7707             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7708             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7709             :       // (bitconvert:{ *:[v4i16] } FPR64:{ *:[v4f16] }:$src)  =>  FPR64:{ *:[v4i16] }:$src
    7710             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7711             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7712             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7713             :       GIR_EraseFromParent, /*InsnID*/0,
    7714             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7715             :       // GIR_Coverage, 3264,
    7716             :       GIR_Done,
    7717             :     // Label 533: @17181
    7718             :     GIM_Try, /*On fail goto*//*Label 534*/ 17215, // Rule ID 3265 //
    7719             :       GIM_CheckFeatures, GIFBS_IsLE,
    7720             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7721             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7722             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7723             :       // (bitconvert:{ *:[v4f16] } FPR64:{ *:[v1i64] }:$src)  =>  FPR64:{ *:[v4f16] }:$src
    7724             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7725             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7726             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7727             :       GIR_EraseFromParent, /*InsnID*/0,
    7728             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7729             :       // GIR_Coverage, 3265,
    7730             :       GIR_Done,
    7731             :     // Label 534: @17215
    7732             :     GIM_Try, /*On fail goto*//*Label 535*/ 17249, // Rule ID 3266 //
    7733             :       GIM_CheckFeatures, GIFBS_IsLE,
    7734             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    7735             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7736             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7737             :       // (bitconvert:{ *:[v4f16] } FPR64:{ *:[v2i32] }:$src)  =>  FPR64:{ *:[v4f16] }:$src
    7738             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7739             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7740             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7741             :       GIR_EraseFromParent, /*InsnID*/0,
    7742             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7743             :       // GIR_Coverage, 3266,
    7744             :       GIR_Done,
    7745             :     // Label 535: @17249
    7746             :     GIM_Try, /*On fail goto*//*Label 536*/ 17283, // Rule ID 3267 //
    7747             :       GIM_CheckFeatures, GIFBS_IsLE,
    7748             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    7749             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7750             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7751             :       // (bitconvert:{ *:[v4f16] } FPR64:{ *:[v8i8] }:$src)  =>  FPR64:{ *:[v4f16] }:$src
    7752             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7753             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7754             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7755             :       GIR_EraseFromParent, /*InsnID*/0,
    7756             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7757             :       // GIR_Coverage, 3267,
    7758             :       GIR_Done,
    7759             :     // Label 536: @17283
    7760             :     GIM_Try, /*On fail goto*//*Label 537*/ 17317, // Rule ID 3268 //
    7761             :       GIM_CheckFeatures, GIFBS_IsLE,
    7762             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7763             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7764             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7765             :       // (bitconvert:{ *:[v4f16] } FPR64:{ *:[f64] }:$src)  =>  FPR64:{ *:[v4f16] }:$src
    7766             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7767             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7768             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7769             :       GIR_EraseFromParent, /*InsnID*/0,
    7770             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7771             :       // GIR_Coverage, 3268,
    7772             :       GIR_Done,
    7773             :     // Label 537: @17317
    7774             :     GIM_Try, /*On fail goto*//*Label 538*/ 17351, // Rule ID 3269 //
    7775             :       GIM_CheckFeatures, GIFBS_IsLE,
    7776             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    7777             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7778             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7779             :       // (bitconvert:{ *:[v4f16] } FPR64:{ *:[v2f32] }:$src)  =>  FPR64:{ *:[v4f16] }:$src
    7780             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7781             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7782             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7783             :       GIR_EraseFromParent, /*InsnID*/0,
    7784             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7785             :       // GIR_Coverage, 3269,
    7786             :       GIR_Done,
    7787             :     // Label 538: @17351
    7788             :     GIM_Try, /*On fail goto*//*Label 539*/ 17385, // Rule ID 3270 //
    7789             :       GIM_CheckFeatures, GIFBS_IsLE,
    7790             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7791             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7792             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7793             :       // (bitconvert:{ *:[v4f16] } FPR64:{ *:[v1f64] }:$src)  =>  FPR64:{ *:[v4f16] }:$src
    7794             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7795             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7796             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7797             :       GIR_EraseFromParent, /*InsnID*/0,
    7798             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7799             :       // GIR_Coverage, 3270,
    7800             :       GIR_Done,
    7801             :     // Label 539: @17385
    7802             :     GIM_Try, /*On fail goto*//*Label 540*/ 17408, // Rule ID 3271 //
    7803             :       GIM_CheckFeatures, GIFBS_IsBE,
    7804             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7805             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7806             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7807             :       // (bitconvert:{ *:[v4f16] } FPR64:{ *:[v1i64] }:$src)  =>  (REV64v4i16:{ *:[v4f16] } FPR64:{ *:[v1i64] }:$src)
    7808             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    7809             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7810             :       // GIR_Coverage, 3271,
    7811             :       GIR_Done,
    7812             :     // Label 540: @17408
    7813             :     GIM_Try, /*On fail goto*//*Label 541*/ 17431, // Rule ID 3272 //
    7814             :       GIM_CheckFeatures, GIFBS_IsBE,
    7815             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    7816             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7817             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7818             :       // (bitconvert:{ *:[v4f16] } FPR64:{ *:[v2i32] }:$src)  =>  (REV32v4i16:{ *:[v4f16] } FPR64:{ *:[v2i32] }:$src)
    7819             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v4i16,
    7820             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7821             :       // GIR_Coverage, 3272,
    7822             :       GIR_Done,
    7823             :     // Label 541: @17431
    7824             :     GIM_Try, /*On fail goto*//*Label 542*/ 17454, // Rule ID 3273 //
    7825             :       GIM_CheckFeatures, GIFBS_IsBE,
    7826             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s8,
    7827             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7828             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7829             :       // (bitconvert:{ *:[v4f16] } FPR64:{ *:[v8i8] }:$src)  =>  (REV16v8i8:{ *:[v4f16] } FPR64:{ *:[v8i8] }:$src)
    7830             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV16v8i8,
    7831             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7832             :       // GIR_Coverage, 3273,
    7833             :       GIR_Done,
    7834             :     // Label 542: @17454
    7835             :     GIM_Try, /*On fail goto*//*Label 543*/ 17477, // Rule ID 3274 //
    7836             :       GIM_CheckFeatures, GIFBS_IsBE,
    7837             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7838             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7839             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7840             :       // (bitconvert:{ *:[v4f16] } FPR64:{ *:[f64] }:$src)  =>  (REV64v4i16:{ *:[v4f16] } FPR64:{ *:[f64] }:$src)
    7841             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    7842             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7843             :       // GIR_Coverage, 3274,
    7844             :       GIR_Done,
    7845             :     // Label 543: @17477
    7846             :     GIM_Try, /*On fail goto*//*Label 544*/ 17500, // Rule ID 3275 //
    7847             :       GIM_CheckFeatures, GIFBS_IsBE,
    7848             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    7849             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7850             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7851             :       // (bitconvert:{ *:[v4f16] } FPR64:{ *:[v2f32] }:$src)  =>  (REV32v4i16:{ *:[v4f16] } FPR64:{ *:[v2f32] }:$src)
    7852             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v4i16,
    7853             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7854             :       // GIR_Coverage, 3275,
    7855             :       GIR_Done,
    7856             :     // Label 544: @17500
    7857             :     GIM_Try, /*On fail goto*//*Label 545*/ 17523, // Rule ID 3276 //
    7858             :       GIM_CheckFeatures, GIFBS_IsBE,
    7859             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7860             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7861             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7862             :       // (bitconvert:{ *:[v4f16] } FPR64:{ *:[v1f64] }:$src)  =>  (REV64v4i16:{ *:[v4f16] } FPR64:{ *:[v1f64] }:$src)
    7863             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i16,
    7864             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7865             :       // GIR_Coverage, 3276,
    7866             :       GIR_Done,
    7867             :     // Label 545: @17523
    7868             :     GIM_Try, /*On fail goto*//*Label 546*/ 17555, // Rule ID 3277 //
    7869             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    7870             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    7871             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    7872             :       // (bitconvert:{ *:[v4f16] } FPR64:{ *:[v4i16] }:$src)  =>  FPR64:{ *:[v4f16] }:$src
    7873             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7874             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7875             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7876             :       GIR_EraseFromParent, /*InsnID*/0,
    7877             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    7878             :       // GIR_Coverage, 3277,
    7879             :       GIR_Done,
    7880             :     // Label 546: @17555
    7881             :     GIM_Reject,
    7882             :     // Label 386: @17556
    7883             :     GIM_Try, /*On fail goto*//*Label 547*/ 17590, // Rule ID 3356 //
    7884             :       GIM_CheckFeatures, GIFBS_IsLE,
    7885             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
    7886             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7887             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7888             :       // (bitconvert:{ *:[v4f32] } FPR128:{ *:[f128] }:$src)  =>  FPR128:{ *:[v4f32] }:$src
    7889             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7890             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7891             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7892             :       GIR_EraseFromParent, /*InsnID*/0,
    7893             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    7894             :       // GIR_Coverage, 3356,
    7895             :       GIR_Done,
    7896             :     // Label 547: @17590
    7897             :     GIM_Try, /*On fail goto*//*Label 548*/ 17624, // Rule ID 3357 //
    7898             :       GIM_CheckFeatures, GIFBS_IsLE,
    7899             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    7900             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7901             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7902             :       // (bitconvert:{ *:[v4f32] } FPR128:{ *:[v8i16] }:$src)  =>  FPR128:{ *:[v4f32] }:$src
    7903             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7904             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7905             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7906             :       GIR_EraseFromParent, /*InsnID*/0,
    7907             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    7908             :       // GIR_Coverage, 3357,
    7909             :       GIR_Done,
    7910             :     // Label 548: @17624
    7911             :     GIM_Try, /*On fail goto*//*Label 549*/ 17658, // Rule ID 3358 //
    7912             :       GIM_CheckFeatures, GIFBS_IsLE,
    7913             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    7914             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7915             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7916             :       // (bitconvert:{ *:[v4f32] } FPR128:{ *:[v8f16] }:$src)  =>  FPR128:{ *:[v4f32] }:$src
    7917             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7918             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7919             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7920             :       GIR_EraseFromParent, /*InsnID*/0,
    7921             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    7922             :       // GIR_Coverage, 3358,
    7923             :       GIR_Done,
    7924             :     // Label 549: @17658
    7925             :     GIM_Try, /*On fail goto*//*Label 550*/ 17692, // Rule ID 3359 //
    7926             :       GIM_CheckFeatures, GIFBS_IsLE,
    7927             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    7928             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7929             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7930             :       // (bitconvert:{ *:[v4f32] } FPR128:{ *:[v16i8] }:$src)  =>  FPR128:{ *:[v4f32] }:$src
    7931             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7932             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7933             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7934             :       GIR_EraseFromParent, /*InsnID*/0,
    7935             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    7936             :       // GIR_Coverage, 3359,
    7937             :       GIR_Done,
    7938             :     // Label 550: @17692
    7939             :     GIM_Try, /*On fail goto*//*Label 551*/ 17726, // Rule ID 3360 //
    7940             :       GIM_CheckFeatures, GIFBS_IsLE,
    7941             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    7942             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7943             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7944             :       // (bitconvert:{ *:[v4f32] } FPR128:{ *:[v2i64] }:$src)  =>  FPR128:{ *:[v4f32] }:$src
    7945             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7946             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7947             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7948             :       GIR_EraseFromParent, /*InsnID*/0,
    7949             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    7950             :       // GIR_Coverage, 3360,
    7951             :       GIR_Done,
    7952             :     // Label 551: @17726
    7953             :     GIM_Try, /*On fail goto*//*Label 552*/ 17760, // Rule ID 3361 //
    7954             :       GIM_CheckFeatures, GIFBS_IsLE,
    7955             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    7956             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7957             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7958             :       // (bitconvert:{ *:[v4f32] } FPR128:{ *:[v2f64] }:$src)  =>  FPR128:{ *:[v4f32] }:$src
    7959             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    7960             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    7961             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    7962             :       GIR_EraseFromParent, /*InsnID*/0,
    7963             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    7964             :       // GIR_Coverage, 3361,
    7965             :       GIR_Done,
    7966             :     // Label 552: @17760
    7967             :     GIM_Try, /*On fail goto*//*Label 553*/ 17831, // Rule ID 3362 //
    7968             :       GIM_CheckFeatures, GIFBS_IsBE,
    7969             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
    7970             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7971             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7972             :       // (bitconvert:{ *:[v4f32] } FPR128:{ *:[f128] }:$src)  =>  (EXTv16i8:{ *:[v4f32] } (REV64v4i32:{ *:[f128] } FPR128:{ *:[f128] }:$src), (REV64v4i32:{ *:[f128] } FPR128:{ *:[f128] }:$src), 8:{ *:[i32] })
    7973             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s128,
    7974             :       GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s128,
    7975             :       GIR_BuildMI, /*InsnID*/2, /*Opcode*/AArch64::REV64v4i32,
    7976             :       GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
    7977             :       GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
    7978             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
    7979             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::REV64v4i32,
    7980             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    7981             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
    7982             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    7983             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EXTv16i8,
    7984             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    7985             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    7986             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/1, /*TempRegFlags*/0,
    7987             :       GIR_AddImm, /*InsnID*/0, /*Imm*/8,
    7988             :       GIR_EraseFromParent, /*InsnID*/0,
    7989             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7990             :       // GIR_Coverage, 3362,
    7991             :       GIR_Done,
    7992             :     // Label 553: @17831
    7993             :     GIM_Try, /*On fail goto*//*Label 554*/ 17854, // Rule ID 3363 //
    7994             :       GIM_CheckFeatures, GIFBS_IsBE,
    7995             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    7996             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    7997             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    7998             :       // (bitconvert:{ *:[v4f32] } FPR128:{ *:[v8i16] }:$src)  =>  (REV32v8i16:{ *:[v4f32] } FPR128:{ *:[v8i16] }:$src)
    7999             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v8i16,
    8000             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8001             :       // GIR_Coverage, 3363,
    8002             :       GIR_Done,
    8003             :     // Label 554: @17854
    8004             :     GIM_Try, /*On fail goto*//*Label 555*/ 17877, // Rule ID 3364 //
    8005             :       GIM_CheckFeatures, GIFBS_IsBE,
    8006             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    8007             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8008             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8009             :       // (bitconvert:{ *:[v4f32] } FPR128:{ *:[v8f16] }:$src)  =>  (REV32v8i16:{ *:[v4f32] } FPR128:{ *:[v8f16] }:$src)
    8010             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v8i16,
    8011             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8012             :       // GIR_Coverage, 3364,
    8013             :       GIR_Done,
    8014             :     // Label 555: @17877
    8015             :     GIM_Try, /*On fail goto*//*Label 556*/ 17900, // Rule ID 3365 //
    8016             :       GIM_CheckFeatures, GIFBS_IsBE,
    8017             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    8018             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8019             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8020             :       // (bitconvert:{ *:[v4f32] } FPR128:{ *:[v16i8] }:$src)  =>  (REV32v16i8:{ *:[v4f32] } FPR128:{ *:[v16i8] }:$src)
    8021             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v16i8,
    8022             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8023             :       // GIR_Coverage, 3365,
    8024             :       GIR_Done,
    8025             :     // Label 556: @17900
    8026             :     GIM_Try, /*On fail goto*//*Label 557*/ 17923, // Rule ID 3366 //
    8027             :       GIM_CheckFeatures, GIFBS_IsBE,
    8028             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8029             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8030             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8031             :       // (bitconvert:{ *:[v4f32] } FPR128:{ *:[v2i64] }:$src)  =>  (REV64v4i32:{ *:[v4f32] } FPR128:{ *:[v2i64] }:$src)
    8032             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i32,
    8033             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8034             :       // GIR_Coverage, 3366,
    8035             :       GIR_Done,
    8036             :     // Label 557: @17923
    8037             :     GIM_Try, /*On fail goto*//*Label 558*/ 17946, // Rule ID 3367 //
    8038             :       GIM_CheckFeatures, GIFBS_IsBE,
    8039             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8040             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8041             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8042             :       // (bitconvert:{ *:[v4f32] } FPR128:{ *:[v2f64] }:$src)  =>  (REV64v4i32:{ *:[v4f32] } FPR128:{ *:[v2f64] }:$src)
    8043             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i32,
    8044             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8045             :       // GIR_Coverage, 3367,
    8046             :       GIR_Done,
    8047             :     // Label 558: @17946
    8048             :     GIM_Try, /*On fail goto*//*Label 559*/ 17978, // Rule ID 3368 //
    8049             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8050             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8051             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8052             :       // (bitconvert:{ *:[v4f32] } FPR128:{ *:[v4i32] }:$src)  =>  FPR128:{ *:[v4f32] }:$src
    8053             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8054             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8055             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8056             :       GIR_EraseFromParent, /*InsnID*/0,
    8057             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8058             :       // GIR_Coverage, 3368,
    8059             :       GIR_Done,
    8060             :     // Label 559: @17978
    8061             :     GIM_Try, /*On fail goto*//*Label 560*/ 18012, // Rule ID 3382 //
    8062             :       GIM_CheckFeatures, GIFBS_IsLE,
    8063             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
    8064             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8065             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8066             :       // (bitconvert:{ *:[v4i32] } FPR128:{ *:[f128] }:$src)  =>  FPR128:{ *:[v4i32] }:$src
    8067             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8068             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8069             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8070             :       GIR_EraseFromParent, /*InsnID*/0,
    8071             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8072             :       // GIR_Coverage, 3382,
    8073             :       GIR_Done,
    8074             :     // Label 560: @18012
    8075             :     GIM_Try, /*On fail goto*//*Label 561*/ 18046, // Rule ID 3383 //
    8076             :       GIM_CheckFeatures, GIFBS_IsLE,
    8077             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8078             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8079             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8080             :       // (bitconvert:{ *:[v4i32] } FPR128:{ *:[v2i64] }:$src)  =>  FPR128:{ *:[v4i32] }:$src
    8081             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8082             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8083             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8084             :       GIR_EraseFromParent, /*InsnID*/0,
    8085             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8086             :       // GIR_Coverage, 3383,
    8087             :       GIR_Done,
    8088             :     // Label 561: @18046
    8089             :     GIM_Try, /*On fail goto*//*Label 562*/ 18080, // Rule ID 3384 //
    8090             :       GIM_CheckFeatures, GIFBS_IsLE,
    8091             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    8092             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8093             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8094             :       // (bitconvert:{ *:[v4i32] } FPR128:{ *:[v8i16] }:$src)  =>  FPR128:{ *:[v4i32] }:$src
    8095             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8096             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8097             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8098             :       GIR_EraseFromParent, /*InsnID*/0,
    8099             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8100             :       // GIR_Coverage, 3384,
    8101             :       GIR_Done,
    8102             :     // Label 562: @18080
    8103             :     GIM_Try, /*On fail goto*//*Label 563*/ 18114, // Rule ID 3385 //
    8104             :       GIM_CheckFeatures, GIFBS_IsLE,
    8105             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    8106             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8107             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8108             :       // (bitconvert:{ *:[v4i32] } FPR128:{ *:[v16i8] }:$src)  =>  FPR128:{ *:[v4i32] }:$src
    8109             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8110             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8111             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8112             :       GIR_EraseFromParent, /*InsnID*/0,
    8113             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8114             :       // GIR_Coverage, 3385,
    8115             :       GIR_Done,
    8116             :     // Label 563: @18114
    8117             :     GIM_Try, /*On fail goto*//*Label 564*/ 18148, // Rule ID 3386 //
    8118             :       GIM_CheckFeatures, GIFBS_IsLE,
    8119             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8120             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8121             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8122             :       // (bitconvert:{ *:[v4i32] } FPR128:{ *:[v2f64] }:$src)  =>  FPR128:{ *:[v4i32] }:$src
    8123             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8124             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8125             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8126             :       GIR_EraseFromParent, /*InsnID*/0,
    8127             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8128             :       // GIR_Coverage, 3386,
    8129             :       GIR_Done,
    8130             :     // Label 564: @18148
    8131             :     GIM_Try, /*On fail goto*//*Label 565*/ 18182, // Rule ID 3387 //
    8132             :       GIM_CheckFeatures, GIFBS_IsLE,
    8133             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    8134             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8135             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8136             :       // (bitconvert:{ *:[v4i32] } FPR128:{ *:[v8f16] }:$src)  =>  FPR128:{ *:[v4i32] }:$src
    8137             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8138             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8139             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8140             :       GIR_EraseFromParent, /*InsnID*/0,
    8141             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8142             :       // GIR_Coverage, 3387,
    8143             :       GIR_Done,
    8144             :     // Label 565: @18182
    8145             :     GIM_Try, /*On fail goto*//*Label 566*/ 18253, // Rule ID 3388 //
    8146             :       GIM_CheckFeatures, GIFBS_IsBE,
    8147             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
    8148             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8149             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8150             :       // (bitconvert:{ *:[v4i32] } FPR128:{ *:[f128] }:$src)  =>  (EXTv16i8:{ *:[v4i32] } (REV64v4i32:{ *:[f128] } FPR128:{ *:[f128] }:$src), (REV64v4i32:{ *:[f128] } FPR128:{ *:[f128] }:$src), 8:{ *:[i32] })
    8151             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s128,
    8152             :       GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s128,
    8153             :       GIR_BuildMI, /*InsnID*/2, /*Opcode*/AArch64::REV64v4i32,
    8154             :       GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
    8155             :       GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
    8156             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
    8157             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::REV64v4i32,
    8158             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    8159             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
    8160             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    8161             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EXTv16i8,
    8162             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8163             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    8164             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/1, /*TempRegFlags*/0,
    8165             :       GIR_AddImm, /*InsnID*/0, /*Imm*/8,
    8166             :       GIR_EraseFromParent, /*InsnID*/0,
    8167             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8168             :       // GIR_Coverage, 3388,
    8169             :       GIR_Done,
    8170             :     // Label 566: @18253
    8171             :     GIM_Try, /*On fail goto*//*Label 567*/ 18276, // Rule ID 3389 //
    8172             :       GIM_CheckFeatures, GIFBS_IsBE,
    8173             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8174             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8175             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8176             :       // (bitconvert:{ *:[v4i32] } FPR128:{ *:[v2i64] }:$src)  =>  (REV64v4i32:{ *:[v4i32] } FPR128:{ *:[v2i64] }:$src)
    8177             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i32,
    8178             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8179             :       // GIR_Coverage, 3389,
    8180             :       GIR_Done,
    8181             :     // Label 567: @18276
    8182             :     GIM_Try, /*On fail goto*//*Label 568*/ 18299, // Rule ID 3390 //
    8183             :       GIM_CheckFeatures, GIFBS_IsBE,
    8184             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    8185             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8186             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8187             :       // (bitconvert:{ *:[v4i32] } FPR128:{ *:[v8i16] }:$src)  =>  (REV32v8i16:{ *:[v4i32] } FPR128:{ *:[v8i16] }:$src)
    8188             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v8i16,
    8189             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8190             :       // GIR_Coverage, 3390,
    8191             :       GIR_Done,
    8192             :     // Label 568: @18299
    8193             :     GIM_Try, /*On fail goto*//*Label 569*/ 18322, // Rule ID 3391 //
    8194             :       GIM_CheckFeatures, GIFBS_IsBE,
    8195             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    8196             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8197             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8198             :       // (bitconvert:{ *:[v4i32] } FPR128:{ *:[v16i8] }:$src)  =>  (REV32v16i8:{ *:[v4i32] } FPR128:{ *:[v16i8] }:$src)
    8199             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v16i8,
    8200             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8201             :       // GIR_Coverage, 3391,
    8202             :       GIR_Done,
    8203             :     // Label 569: @18322
    8204             :     GIM_Try, /*On fail goto*//*Label 570*/ 18345, // Rule ID 3392 //
    8205             :       GIM_CheckFeatures, GIFBS_IsBE,
    8206             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8207             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8208             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8209             :       // (bitconvert:{ *:[v4i32] } FPR128:{ *:[v2f64] }:$src)  =>  (REV64v4i32:{ *:[v4i32] } FPR128:{ *:[v2f64] }:$src)
    8210             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v4i32,
    8211             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8212             :       // GIR_Coverage, 3392,
    8213             :       GIR_Done,
    8214             :     // Label 570: @18345
    8215             :     GIM_Try, /*On fail goto*//*Label 571*/ 18368, // Rule ID 3393 //
    8216             :       GIM_CheckFeatures, GIFBS_IsBE,
    8217             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    8218             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8219             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8220             :       // (bitconvert:{ *:[v4i32] } FPR128:{ *:[v8f16] }:$src)  =>  (REV32v8i16:{ *:[v4i32] } FPR128:{ *:[v8f16] }:$src)
    8221             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v8i16,
    8222             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8223             :       // GIR_Coverage, 3393,
    8224             :       GIR_Done,
    8225             :     // Label 571: @18368
    8226             :     GIM_Try, /*On fail goto*//*Label 572*/ 18400, // Rule ID 3394 //
    8227             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8228             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8229             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8230             :       // (bitconvert:{ *:[v4i32] } FPR128:{ *:[v4f32] }:$src)  =>  FPR128:{ *:[v4i32] }:$src
    8231             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8232             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8233             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8234             :       GIR_EraseFromParent, /*InsnID*/0,
    8235             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8236             :       // GIR_Coverage, 3394,
    8237             :       GIR_Done,
    8238             :     // Label 572: @18400
    8239             :     GIM_Reject,
    8240             :     // Label 387: @18401
    8241             :     GIM_Try, /*On fail goto*//*Label 573*/ 18426, // Rule ID 3195 //
    8242             :       GIM_CheckFeatures, GIFBS_IsLE,
    8243             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    8244             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8245             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    8246             :       // (bitconvert:{ *:[v8i8] } GPR64:{ *:[i64] }:$Xn)  =>  (COPY_TO_REGCLASS:{ *:[v8i8] } GPR64:{ *:[i64] }:$Xn, FPR64:{ *:[i32] })
    8247             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8248             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    8249             :       // GIR_Coverage, 3195,
    8250             :       GIR_Done,
    8251             :     // Label 573: @18426
    8252             :     GIM_Try, /*On fail goto*//*Label 574*/ 18474, // Rule ID 3206 //
    8253             :       GIM_CheckFeatures, GIFBS_IsBE,
    8254             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    8255             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8256             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::GPR64RegClassID,
    8257             :       // (bitconvert:{ *:[v8i8] } GPR64:{ *:[i64] }:$Xn)  =>  (REV64v8i8:{ *:[v8i8] } (COPY_TO_REGCLASS:{ *:[i64] } GPR64:{ *:[i64] }:$Xn, FPR64:{ *:[i32] }))
    8258             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
    8259             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY,
    8260             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    8261             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // Xn
    8262             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    8263             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::REV64v8i8,
    8264             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8265             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    8266             :       GIR_EraseFromParent, /*InsnID*/0,
    8267             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8268             :       // GIR_Coverage, 3206,
    8269             :       GIR_Done,
    8270             :     // Label 574: @18474
    8271             :     GIM_Try, /*On fail goto*//*Label 575*/ 18508, // Rule ID 3278 //
    8272             :       GIM_CheckFeatures, GIFBS_IsLE,
    8273             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    8274             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8275             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    8276             :       // (bitconvert:{ *:[v8i8] } FPR64:{ *:[v1i64] }:$src)  =>  FPR64:{ *:[v8i8] }:$src
    8277             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8278             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8279             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8280             :       GIR_EraseFromParent, /*InsnID*/0,
    8281             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    8282             :       // GIR_Coverage, 3278,
    8283             :       GIR_Done,
    8284             :     // Label 575: @18508
    8285             :     GIM_Try, /*On fail goto*//*Label 576*/ 18542, // Rule ID 3279 //
    8286             :       GIM_CheckFeatures, GIFBS_IsLE,
    8287             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    8288             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8289             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    8290             :       // (bitconvert:{ *:[v8i8] } FPR64:{ *:[v2i32] }:$src)  =>  FPR64:{ *:[v8i8] }:$src
    8291             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8292             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8293             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8294             :       GIR_EraseFromParent, /*InsnID*/0,
    8295             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    8296             :       // GIR_Coverage, 3279,
    8297             :       GIR_Done,
    8298             :     // Label 576: @18542
    8299             :     GIM_Try, /*On fail goto*//*Label 577*/ 18576, // Rule ID 3280 //
    8300             :       GIM_CheckFeatures, GIFBS_IsLE,
    8301             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    8302             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8303             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    8304             :       // (bitconvert:{ *:[v8i8] } FPR64:{ *:[v4i16] }:$src)  =>  FPR64:{ *:[v8i8] }:$src
    8305             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8306             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8307             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8308             :       GIR_EraseFromParent, /*InsnID*/0,
    8309             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    8310             :       // GIR_Coverage, 3280,
    8311             :       GIR_Done,
    8312             :     // Label 577: @18576
    8313             :     GIM_Try, /*On fail goto*//*Label 578*/ 18610, // Rule ID 3281 //
    8314             :       GIM_CheckFeatures, GIFBS_IsLE,
    8315             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    8316             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8317             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    8318             :       // (bitconvert:{ *:[v8i8] } FPR64:{ *:[f64] }:$src)  =>  FPR64:{ *:[v8i8] }:$src
    8319             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8320             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8321             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8322             :       GIR_EraseFromParent, /*InsnID*/0,
    8323             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    8324             :       // GIR_Coverage, 3281,
    8325             :       GIR_Done,
    8326             :     // Label 578: @18610
    8327             :     GIM_Try, /*On fail goto*//*Label 579*/ 18644, // Rule ID 3282 //
    8328             :       GIM_CheckFeatures, GIFBS_IsLE,
    8329             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    8330             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8331             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    8332             :       // (bitconvert:{ *:[v8i8] } FPR64:{ *:[v2f32] }:$src)  =>  FPR64:{ *:[v8i8] }:$src
    8333             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8334             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8335             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8336             :       GIR_EraseFromParent, /*InsnID*/0,
    8337             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    8338             :       // GIR_Coverage, 3282,
    8339             :       GIR_Done,
    8340             :     // Label 579: @18644
    8341             :     GIM_Try, /*On fail goto*//*Label 580*/ 18678, // Rule ID 3283 //
    8342             :       GIM_CheckFeatures, GIFBS_IsLE,
    8343             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    8344             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8345             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    8346             :       // (bitconvert:{ *:[v8i8] } FPR64:{ *:[v1f64] }:$src)  =>  FPR64:{ *:[v8i8] }:$src
    8347             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8348             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8349             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8350             :       GIR_EraseFromParent, /*InsnID*/0,
    8351             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    8352             :       // GIR_Coverage, 3283,
    8353             :       GIR_Done,
    8354             :     // Label 580: @18678
    8355             :     GIM_Try, /*On fail goto*//*Label 581*/ 18712, // Rule ID 3284 //
    8356             :       GIM_CheckFeatures, GIFBS_IsLE,
    8357             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    8358             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8359             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    8360             :       // (bitconvert:{ *:[v8i8] } FPR64:{ *:[v4f16] }:$src)  =>  FPR64:{ *:[v8i8] }:$src
    8361             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8362             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8363             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8364             :       GIR_EraseFromParent, /*InsnID*/0,
    8365             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR64*/16,
    8366             :       // GIR_Coverage, 3284,
    8367             :       GIR_Done,
    8368             :     // Label 581: @18712
    8369             :     GIM_Try, /*On fail goto*//*Label 582*/ 18735, // Rule ID 3285 //
    8370             :       GIM_CheckFeatures, GIFBS_IsBE,
    8371             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    8372             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8373             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    8374             :       // (bitconvert:{ *:[v8i8] } FPR64:{ *:[v1i64] }:$src)  =>  (REV64v8i8:{ *:[v8i8] } FPR64:{ *:[v1i64] }:$src)
    8375             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v8i8,
    8376             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8377             :       // GIR_Coverage, 3285,
    8378             :       GIR_Done,
    8379             :     // Label 582: @18735
    8380             :     GIM_Try, /*On fail goto*//*Label 583*/ 18758, // Rule ID 3286 //
    8381             :       GIM_CheckFeatures, GIFBS_IsBE,
    8382             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    8383             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8384             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    8385             :       // (bitconvert:{ *:[v8i8] } FPR64:{ *:[v2i32] }:$src)  =>  (REV32v8i8:{ *:[v8i8] } FPR64:{ *:[v2i32] }:$src)
    8386             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v8i8,
    8387             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8388             :       // GIR_Coverage, 3286,
    8389             :       GIR_Done,
    8390             :     // Label 583: @18758
    8391             :     GIM_Try, /*On fail goto*//*Label 584*/ 18781, // Rule ID 3287 //
    8392             :       GIM_CheckFeatures, GIFBS_IsBE,
    8393             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    8394             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8395             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    8396             :       // (bitconvert:{ *:[v8i8] } FPR64:{ *:[v4i16] }:$src)  =>  (REV16v8i8:{ *:[v8i8] } FPR64:{ *:[v4i16] }:$src)
    8397             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV16v8i8,
    8398             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8399             :       // GIR_Coverage, 3287,
    8400             :       GIR_Done,
    8401             :     // Label 584: @18781
    8402             :     GIM_Try, /*On fail goto*//*Label 585*/ 18804, // Rule ID 3288 //
    8403             :       GIM_CheckFeatures, GIFBS_IsBE,
    8404             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    8405             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8406             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    8407             :       // (bitconvert:{ *:[v8i8] } FPR64:{ *:[f64] }:$src)  =>  (REV64v8i8:{ *:[v8i8] } FPR64:{ *:[f64] }:$src)
    8408             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v8i8,
    8409             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8410             :       // GIR_Coverage, 3288,
    8411             :       GIR_Done,
    8412             :     // Label 585: @18804
    8413             :     GIM_Try, /*On fail goto*//*Label 586*/ 18827, // Rule ID 3289 //
    8414             :       GIM_CheckFeatures, GIFBS_IsBE,
    8415             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s32,
    8416             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8417             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    8418             :       // (bitconvert:{ *:[v8i8] } FPR64:{ *:[v2f32] }:$src)  =>  (REV32v8i8:{ *:[v8i8] } FPR64:{ *:[v2f32] }:$src)
    8419             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v8i8,
    8420             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8421             :       // GIR_Coverage, 3289,
    8422             :       GIR_Done,
    8423             :     // Label 586: @18827
    8424             :     GIM_Try, /*On fail goto*//*Label 587*/ 18850, // Rule ID 3290 //
    8425             :       GIM_CheckFeatures, GIFBS_IsBE,
    8426             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    8427             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8428             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    8429             :       // (bitconvert:{ *:[v8i8] } FPR64:{ *:[v1f64] }:$src)  =>  (REV64v8i8:{ *:[v8i8] } FPR64:{ *:[v1f64] }:$src)
    8430             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v8i8,
    8431             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8432             :       // GIR_Coverage, 3290,
    8433             :       GIR_Done,
    8434             :     // Label 587: @18850
    8435             :     GIM_Try, /*On fail goto*//*Label 588*/ 18873, // Rule ID 3291 //
    8436             :       GIM_CheckFeatures, GIFBS_IsBE,
    8437             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s16,
    8438             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    8439             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR64RegClassID,
    8440             :       // (bitconvert:{ *:[v8i8] } FPR64:{ *:[v4f16] }:$src)  =>  (REV16v8i8:{ *:[v8i8] } FPR64:{ *:[v4f16] }:$src)
    8441             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV16v8i8,
    8442             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8443             :       // GIR_Coverage, 3291,
    8444             :       GIR_Done,
    8445             :     // Label 588: @18873
    8446             :     GIM_Reject,
    8447             :     // Label 388: @18874
    8448             :     GIM_Try, /*On fail goto*//*Label 589*/ 18908, // Rule ID 3395 //
    8449             :       GIM_CheckFeatures, GIFBS_IsLE,
    8450             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
    8451             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8452             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8453             :       // (bitconvert:{ *:[v8i16] } FPR128:{ *:[f128] }:$src)  =>  FPR128:{ *:[v8i16] }:$src
    8454             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8455             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8456             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8457             :       GIR_EraseFromParent, /*InsnID*/0,
    8458             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8459             :       // GIR_Coverage, 3395,
    8460             :       GIR_Done,
    8461             :     // Label 589: @18908
    8462             :     GIM_Try, /*On fail goto*//*Label 590*/ 18942, // Rule ID 3396 //
    8463             :       GIM_CheckFeatures, GIFBS_IsLE,
    8464             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8465             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8466             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8467             :       // (bitconvert:{ *:[v8i16] } FPR128:{ *:[v2i64] }:$src)  =>  FPR128:{ *:[v8i16] }:$src
    8468             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8469             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8470             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8471             :       GIR_EraseFromParent, /*InsnID*/0,
    8472             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8473             :       // GIR_Coverage, 3396,
    8474             :       GIR_Done,
    8475             :     // Label 590: @18942
    8476             :     GIM_Try, /*On fail goto*//*Label 591*/ 18976, // Rule ID 3397 //
    8477             :       GIM_CheckFeatures, GIFBS_IsLE,
    8478             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8479             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8480             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8481             :       // (bitconvert:{ *:[v8i16] } FPR128:{ *:[v4i32] }:$src)  =>  FPR128:{ *:[v8i16] }:$src
    8482             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8483             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8484             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8485             :       GIR_EraseFromParent, /*InsnID*/0,
    8486             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8487             :       // GIR_Coverage, 3397,
    8488             :       GIR_Done,
    8489             :     // Label 591: @18976
    8490             :     GIM_Try, /*On fail goto*//*Label 592*/ 19010, // Rule ID 3398 //
    8491             :       GIM_CheckFeatures, GIFBS_IsLE,
    8492             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    8493             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8494             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8495             :       // (bitconvert:{ *:[v8i16] } FPR128:{ *:[v16i8] }:$src)  =>  FPR128:{ *:[v8i16] }:$src
    8496             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8497             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8498             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8499             :       GIR_EraseFromParent, /*InsnID*/0,
    8500             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8501             :       // GIR_Coverage, 3398,
    8502             :       GIR_Done,
    8503             :     // Label 592: @19010
    8504             :     GIM_Try, /*On fail goto*//*Label 593*/ 19044, // Rule ID 3399 //
    8505             :       GIM_CheckFeatures, GIFBS_IsLE,
    8506             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8507             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8508             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8509             :       // (bitconvert:{ *:[v8i16] } FPR128:{ *:[v2f64] }:$src)  =>  FPR128:{ *:[v8i16] }:$src
    8510             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8511             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8512             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8513             :       GIR_EraseFromParent, /*InsnID*/0,
    8514             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8515             :       // GIR_Coverage, 3399,
    8516             :       GIR_Done,
    8517             :     // Label 593: @19044
    8518             :     GIM_Try, /*On fail goto*//*Label 594*/ 19078, // Rule ID 3400 //
    8519             :       GIM_CheckFeatures, GIFBS_IsLE,
    8520             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8521             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8522             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8523             :       // (bitconvert:{ *:[v8i16] } FPR128:{ *:[v4f32] }:$src)  =>  FPR128:{ *:[v8i16] }:$src
    8524             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8525             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8526             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8527             :       GIR_EraseFromParent, /*InsnID*/0,
    8528             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8529             :       // GIR_Coverage, 3400,
    8530             :       GIR_Done,
    8531             :     // Label 594: @19078
    8532             :     GIM_Try, /*On fail goto*//*Label 595*/ 19149, // Rule ID 3401 //
    8533             :       GIM_CheckFeatures, GIFBS_IsBE,
    8534             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
    8535             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8536             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8537             :       // (bitconvert:{ *:[v8i16] } FPR128:{ *:[f128] }:$src)  =>  (EXTv16i8:{ *:[v8i16] } (REV64v8i16:{ *:[f128] } FPR128:{ *:[f128] }:$src), (REV64v8i16:{ *:[f128] } FPR128:{ *:[f128] }:$src), 8:{ *:[i32] })
    8538             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s128,
    8539             :       GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s128,
    8540             :       GIR_BuildMI, /*InsnID*/2, /*Opcode*/AArch64::REV64v8i16,
    8541             :       GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
    8542             :       GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
    8543             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
    8544             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::REV64v8i16,
    8545             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    8546             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
    8547             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    8548             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EXTv16i8,
    8549             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8550             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    8551             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/1, /*TempRegFlags*/0,
    8552             :       GIR_AddImm, /*InsnID*/0, /*Imm*/8,
    8553             :       GIR_EraseFromParent, /*InsnID*/0,
    8554             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8555             :       // GIR_Coverage, 3401,
    8556             :       GIR_Done,
    8557             :     // Label 595: @19149
    8558             :     GIM_Try, /*On fail goto*//*Label 596*/ 19172, // Rule ID 3402 //
    8559             :       GIM_CheckFeatures, GIFBS_IsBE,
    8560             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8561             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8562             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8563             :       // (bitconvert:{ *:[v8i16] } FPR128:{ *:[v2i64] }:$src)  =>  (REV64v8i16:{ *:[v8i16] } FPR128:{ *:[v2i64] }:$src)
    8564             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v8i16,
    8565             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8566             :       // GIR_Coverage, 3402,
    8567             :       GIR_Done,
    8568             :     // Label 596: @19172
    8569             :     GIM_Try, /*On fail goto*//*Label 597*/ 19195, // Rule ID 3403 //
    8570             :       GIM_CheckFeatures, GIFBS_IsBE,
    8571             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8572             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8573             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8574             :       // (bitconvert:{ *:[v8i16] } FPR128:{ *:[v4i32] }:$src)  =>  (REV32v8i16:{ *:[v8i16] } FPR128:{ *:[v4i32] }:$src)
    8575             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v8i16,
    8576             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8577             :       // GIR_Coverage, 3403,
    8578             :       GIR_Done,
    8579             :     // Label 597: @19195
    8580             :     GIM_Try, /*On fail goto*//*Label 598*/ 19218, // Rule ID 3404 //
    8581             :       GIM_CheckFeatures, GIFBS_IsBE,
    8582             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    8583             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8584             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8585             :       // (bitconvert:{ *:[v8i16] } FPR128:{ *:[v16i8] }:$src)  =>  (REV16v16i8:{ *:[v8i16] } FPR128:{ *:[v16i8] }:$src)
    8586             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV16v16i8,
    8587             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8588             :       // GIR_Coverage, 3404,
    8589             :       GIR_Done,
    8590             :     // Label 598: @19218
    8591             :     GIM_Try, /*On fail goto*//*Label 599*/ 19241, // Rule ID 3405 //
    8592             :       GIM_CheckFeatures, GIFBS_IsBE,
    8593             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8594             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8595             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8596             :       // (bitconvert:{ *:[v8i16] } FPR128:{ *:[v2f64] }:$src)  =>  (REV64v8i16:{ *:[v8i16] } FPR128:{ *:[v2f64] }:$src)
    8597             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v8i16,
    8598             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8599             :       // GIR_Coverage, 3405,
    8600             :       GIR_Done,
    8601             :     // Label 599: @19241
    8602             :     GIM_Try, /*On fail goto*//*Label 600*/ 19264, // Rule ID 3406 //
    8603             :       GIM_CheckFeatures, GIFBS_IsBE,
    8604             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8605             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8606             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8607             :       // (bitconvert:{ *:[v8i16] } FPR128:{ *:[v4f32] }:$src)  =>  (REV32v8i16:{ *:[v8i16] } FPR128:{ *:[v4f32] }:$src)
    8608             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v8i16,
    8609             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8610             :       // GIR_Coverage, 3406,
    8611             :       GIR_Done,
    8612             :     // Label 600: @19264
    8613             :     GIM_Try, /*On fail goto*//*Label 601*/ 19296, // Rule ID 3407 //
    8614             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    8615             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8616             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8617             :       // (bitconvert:{ *:[v8i16] } FPR128:{ *:[v8f16] }:$src)  =>  FPR128:{ *:[v8i16] }:$src
    8618             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8619             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8620             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8621             :       GIR_EraseFromParent, /*InsnID*/0,
    8622             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8623             :       // GIR_Coverage, 3407,
    8624             :       GIR_Done,
    8625             :     // Label 601: @19296
    8626             :     GIM_Try, /*On fail goto*//*Label 602*/ 19330, // Rule ID 3408 //
    8627             :       GIM_CheckFeatures, GIFBS_IsLE,
    8628             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
    8629             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8630             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8631             :       // (bitconvert:{ *:[v8f16] } FPR128:{ *:[f128] }:$src)  =>  FPR128:{ *:[v8f16] }:$src
    8632             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8633             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8634             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8635             :       GIR_EraseFromParent, /*InsnID*/0,
    8636             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8637             :       // GIR_Coverage, 3408,
    8638             :       GIR_Done,
    8639             :     // Label 602: @19330
    8640             :     GIM_Try, /*On fail goto*//*Label 603*/ 19364, // Rule ID 3409 //
    8641             :       GIM_CheckFeatures, GIFBS_IsLE,
    8642             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8643             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8644             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8645             :       // (bitconvert:{ *:[v8f16] } FPR128:{ *:[v2i64] }:$src)  =>  FPR128:{ *:[v8f16] }:$src
    8646             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8647             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8648             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8649             :       GIR_EraseFromParent, /*InsnID*/0,
    8650             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8651             :       // GIR_Coverage, 3409,
    8652             :       GIR_Done,
    8653             :     // Label 603: @19364
    8654             :     GIM_Try, /*On fail goto*//*Label 604*/ 19398, // Rule ID 3410 //
    8655             :       GIM_CheckFeatures, GIFBS_IsLE,
    8656             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8657             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8658             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8659             :       // (bitconvert:{ *:[v8f16] } FPR128:{ *:[v4i32] }:$src)  =>  FPR128:{ *:[v8f16] }:$src
    8660             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8661             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8662             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8663             :       GIR_EraseFromParent, /*InsnID*/0,
    8664             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8665             :       // GIR_Coverage, 3410,
    8666             :       GIR_Done,
    8667             :     // Label 604: @19398
    8668             :     GIM_Try, /*On fail goto*//*Label 605*/ 19432, // Rule ID 3411 //
    8669             :       GIM_CheckFeatures, GIFBS_IsLE,
    8670             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    8671             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8672             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8673             :       // (bitconvert:{ *:[v8f16] } FPR128:{ *:[v16i8] }:$src)  =>  FPR128:{ *:[v8f16] }:$src
    8674             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8675             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8676             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8677             :       GIR_EraseFromParent, /*InsnID*/0,
    8678             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8679             :       // GIR_Coverage, 3411,
    8680             :       GIR_Done,
    8681             :     // Label 605: @19432
    8682             :     GIM_Try, /*On fail goto*//*Label 606*/ 19466, // Rule ID 3412 //
    8683             :       GIM_CheckFeatures, GIFBS_IsLE,
    8684             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8685             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8686             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8687             :       // (bitconvert:{ *:[v8f16] } FPR128:{ *:[v2f64] }:$src)  =>  FPR128:{ *:[v8f16] }:$src
    8688             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8689             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8690             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8691             :       GIR_EraseFromParent, /*InsnID*/0,
    8692             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8693             :       // GIR_Coverage, 3412,
    8694             :       GIR_Done,
    8695             :     // Label 606: @19466
    8696             :     GIM_Try, /*On fail goto*//*Label 607*/ 19500, // Rule ID 3413 //
    8697             :       GIM_CheckFeatures, GIFBS_IsLE,
    8698             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8699             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8700             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8701             :       // (bitconvert:{ *:[v8f16] } FPR128:{ *:[v4f32] }:$src)  =>  FPR128:{ *:[v8f16] }:$src
    8702             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8703             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8704             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8705             :       GIR_EraseFromParent, /*InsnID*/0,
    8706             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8707             :       // GIR_Coverage, 3413,
    8708             :       GIR_Done,
    8709             :     // Label 607: @19500
    8710             :     GIM_Try, /*On fail goto*//*Label 608*/ 19571, // Rule ID 3414 //
    8711             :       GIM_CheckFeatures, GIFBS_IsBE,
    8712             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
    8713             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8714             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8715             :       // (bitconvert:{ *:[v8f16] } FPR128:{ *:[f128] }:$src)  =>  (EXTv16i8:{ *:[v8f16] } (REV64v8i16:{ *:[f128] } FPR128:{ *:[f128] }:$src), (REV64v8i16:{ *:[f128] } FPR128:{ *:[f128] }:$src), 8:{ *:[i32] })
    8716             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s128,
    8717             :       GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s128,
    8718             :       GIR_BuildMI, /*InsnID*/2, /*Opcode*/AArch64::REV64v8i16,
    8719             :       GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
    8720             :       GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
    8721             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
    8722             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::REV64v8i16,
    8723             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    8724             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
    8725             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    8726             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EXTv16i8,
    8727             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8728             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    8729             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/1, /*TempRegFlags*/0,
    8730             :       GIR_AddImm, /*InsnID*/0, /*Imm*/8,
    8731             :       GIR_EraseFromParent, /*InsnID*/0,
    8732             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8733             :       // GIR_Coverage, 3414,
    8734             :       GIR_Done,
    8735             :     // Label 608: @19571
    8736             :     GIM_Try, /*On fail goto*//*Label 609*/ 19594, // Rule ID 3415 //
    8737             :       GIM_CheckFeatures, GIFBS_IsBE,
    8738             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8739             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8740             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8741             :       // (bitconvert:{ *:[v8f16] } FPR128:{ *:[v2i64] }:$src)  =>  (REV64v8i16:{ *:[v8f16] } FPR128:{ *:[v2i64] }:$src)
    8742             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v8i16,
    8743             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8744             :       // GIR_Coverage, 3415,
    8745             :       GIR_Done,
    8746             :     // Label 609: @19594
    8747             :     GIM_Try, /*On fail goto*//*Label 610*/ 19617, // Rule ID 3416 //
    8748             :       GIM_CheckFeatures, GIFBS_IsBE,
    8749             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8750             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8751             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8752             :       // (bitconvert:{ *:[v8f16] } FPR128:{ *:[v4i32] }:$src)  =>  (REV32v8i16:{ *:[v8f16] } FPR128:{ *:[v4i32] }:$src)
    8753             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v8i16,
    8754             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8755             :       // GIR_Coverage, 3416,
    8756             :       GIR_Done,
    8757             :     // Label 610: @19617
    8758             :     GIM_Try, /*On fail goto*//*Label 611*/ 19640, // Rule ID 3417 //
    8759             :       GIM_CheckFeatures, GIFBS_IsBE,
    8760             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    8761             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8762             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8763             :       // (bitconvert:{ *:[v8f16] } FPR128:{ *:[v16i8] }:$src)  =>  (REV16v16i8:{ *:[v8f16] } FPR128:{ *:[v16i8] }:$src)
    8764             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV16v16i8,
    8765             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8766             :       // GIR_Coverage, 3417,
    8767             :       GIR_Done,
    8768             :     // Label 611: @19640
    8769             :     GIM_Try, /*On fail goto*//*Label 612*/ 19663, // Rule ID 3418 //
    8770             :       GIM_CheckFeatures, GIFBS_IsBE,
    8771             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8772             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8773             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8774             :       // (bitconvert:{ *:[v8f16] } FPR128:{ *:[v2f64] }:$src)  =>  (REV64v8i16:{ *:[v8f16] } FPR128:{ *:[v2f64] }:$src)
    8775             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v8i16,
    8776             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8777             :       // GIR_Coverage, 3418,
    8778             :       GIR_Done,
    8779             :     // Label 612: @19663
    8780             :     GIM_Try, /*On fail goto*//*Label 613*/ 19686, // Rule ID 3419 //
    8781             :       GIM_CheckFeatures, GIFBS_IsBE,
    8782             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8783             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8784             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8785             :       // (bitconvert:{ *:[v8f16] } FPR128:{ *:[v4f32] }:$src)  =>  (REV32v8i16:{ *:[v8f16] } FPR128:{ *:[v4f32] }:$src)
    8786             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v8i16,
    8787             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8788             :       // GIR_Coverage, 3419,
    8789             :       GIR_Done,
    8790             :     // Label 613: @19686
    8791             :     GIM_Try, /*On fail goto*//*Label 614*/ 19718, // Rule ID 3420 //
    8792             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    8793             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8794             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8795             :       // (bitconvert:{ *:[v8f16] } FPR128:{ *:[v8i16] }:$src)  =>  FPR128:{ *:[v8f16] }:$src
    8796             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8797             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8798             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8799             :       GIR_EraseFromParent, /*InsnID*/0,
    8800             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8801             :       // GIR_Coverage, 3420,
    8802             :       GIR_Done,
    8803             :     // Label 614: @19718
    8804             :     GIM_Reject,
    8805             :     // Label 389: @19719
    8806             :     GIM_Try, /*On fail goto*//*Label 615*/ 19753, // Rule ID 3421 //
    8807             :       GIM_CheckFeatures, GIFBS_IsLE,
    8808             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
    8809             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8810             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8811             :       // (bitconvert:{ *:[v16i8] } FPR128:{ *:[f128] }:$src)  =>  FPR128:{ *:[v16i8] }:$src
    8812             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8813             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8814             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8815             :       GIR_EraseFromParent, /*InsnID*/0,
    8816             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8817             :       // GIR_Coverage, 3421,
    8818             :       GIR_Done,
    8819             :     // Label 615: @19753
    8820             :     GIM_Try, /*On fail goto*//*Label 616*/ 19787, // Rule ID 3422 //
    8821             :       GIM_CheckFeatures, GIFBS_IsLE,
    8822             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8823             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8824             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8825             :       // (bitconvert:{ *:[v16i8] } FPR128:{ *:[v2i64] }:$src)  =>  FPR128:{ *:[v16i8] }:$src
    8826             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8827             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8828             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8829             :       GIR_EraseFromParent, /*InsnID*/0,
    8830             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8831             :       // GIR_Coverage, 3422,
    8832             :       GIR_Done,
    8833             :     // Label 616: @19787
    8834             :     GIM_Try, /*On fail goto*//*Label 617*/ 19821, // Rule ID 3423 //
    8835             :       GIM_CheckFeatures, GIFBS_IsLE,
    8836             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8837             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8838             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8839             :       // (bitconvert:{ *:[v16i8] } FPR128:{ *:[v4i32] }:$src)  =>  FPR128:{ *:[v16i8] }:$src
    8840             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8841             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8842             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8843             :       GIR_EraseFromParent, /*InsnID*/0,
    8844             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8845             :       // GIR_Coverage, 3423,
    8846             :       GIR_Done,
    8847             :     // Label 617: @19821
    8848             :     GIM_Try, /*On fail goto*//*Label 618*/ 19855, // Rule ID 3424 //
    8849             :       GIM_CheckFeatures, GIFBS_IsLE,
    8850             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    8851             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8852             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8853             :       // (bitconvert:{ *:[v16i8] } FPR128:{ *:[v8i16] }:$src)  =>  FPR128:{ *:[v16i8] }:$src
    8854             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8855             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8856             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8857             :       GIR_EraseFromParent, /*InsnID*/0,
    8858             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8859             :       // GIR_Coverage, 3424,
    8860             :       GIR_Done,
    8861             :     // Label 618: @19855
    8862             :     GIM_Try, /*On fail goto*//*Label 619*/ 19889, // Rule ID 3425 //
    8863             :       GIM_CheckFeatures, GIFBS_IsLE,
    8864             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8865             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8866             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8867             :       // (bitconvert:{ *:[v16i8] } FPR128:{ *:[v2f64] }:$src)  =>  FPR128:{ *:[v16i8] }:$src
    8868             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8869             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8870             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8871             :       GIR_EraseFromParent, /*InsnID*/0,
    8872             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8873             :       // GIR_Coverage, 3425,
    8874             :       GIR_Done,
    8875             :     // Label 619: @19889
    8876             :     GIM_Try, /*On fail goto*//*Label 620*/ 19923, // Rule ID 3426 //
    8877             :       GIM_CheckFeatures, GIFBS_IsLE,
    8878             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8879             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8880             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8881             :       // (bitconvert:{ *:[v16i8] } FPR128:{ *:[v4f32] }:$src)  =>  FPR128:{ *:[v16i8] }:$src
    8882             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8883             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8884             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8885             :       GIR_EraseFromParent, /*InsnID*/0,
    8886             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8887             :       // GIR_Coverage, 3426,
    8888             :       GIR_Done,
    8889             :     // Label 620: @19923
    8890             :     GIM_Try, /*On fail goto*//*Label 621*/ 19957, // Rule ID 3427 //
    8891             :       GIM_CheckFeatures, GIFBS_IsLE,
    8892             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    8893             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8894             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8895             :       // (bitconvert:{ *:[v16i8] } FPR128:{ *:[v8f16] }:$src)  =>  FPR128:{ *:[v16i8] }:$src
    8896             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
    8897             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8898             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    8899             :       GIR_EraseFromParent, /*InsnID*/0,
    8900             :       GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC FPR128*/34,
    8901             :       // GIR_Coverage, 3427,
    8902             :       GIR_Done,
    8903             :     // Label 621: @19957
    8904             :     GIM_Try, /*On fail goto*//*Label 622*/ 20028, // Rule ID 3428 //
    8905             :       GIM_CheckFeatures, GIFBS_IsBE,
    8906             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s128,
    8907             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8908             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8909             :       // (bitconvert:{ *:[v16i8] } FPR128:{ *:[f128] }:$src)  =>  (EXTv16i8:{ *:[v16i8] } (REV64v16i8:{ *:[f128] } FPR128:{ *:[f128] }:$src), (REV64v16i8:{ *:[f128] } FPR128:{ *:[f128] }:$src), 8:{ *:[i32] })
    8910             :       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s128,
    8911             :       GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_s128,
    8912             :       GIR_BuildMI, /*InsnID*/2, /*Opcode*/AArch64::REV64v16i8,
    8913             :       GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
    8914             :       GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src
    8915             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
    8916             :       GIR_BuildMI, /*InsnID*/1, /*Opcode*/AArch64::REV64v16i8,
    8917             :       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
    8918             :       GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
    8919             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
    8920             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::EXTv16i8,
    8921             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rd
    8922             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
    8923             :       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/1, /*TempRegFlags*/0,
    8924             :       GIR_AddImm, /*InsnID*/0, /*Imm*/8,
    8925             :       GIR_EraseFromParent, /*InsnID*/0,
    8926             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8927             :       // GIR_Coverage, 3428,
    8928             :       GIR_Done,
    8929             :     // Label 622: @20028
    8930             :     GIM_Try, /*On fail goto*//*Label 623*/ 20051, // Rule ID 3429 //
    8931             :       GIM_CheckFeatures, GIFBS_IsBE,
    8932             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8933             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8934             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8935             :       // (bitconvert:{ *:[v16i8] } FPR128:{ *:[v2i64] }:$src)  =>  (REV64v16i8:{ *:[v16i8] } FPR128:{ *:[v2i64] }:$src)
    8936             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v16i8,
    8937             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8938             :       // GIR_Coverage, 3429,
    8939             :       GIR_Done,
    8940             :     // Label 623: @20051
    8941             :     GIM_Try, /*On fail goto*//*Label 624*/ 20074, // Rule ID 3430 //
    8942             :       GIM_CheckFeatures, GIFBS_IsBE,
    8943             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8944             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8945             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8946             :       // (bitconvert:{ *:[v16i8] } FPR128:{ *:[v4i32] }:$src)  =>  (REV32v16i8:{ *:[v16i8] } FPR128:{ *:[v4i32] }:$src)
    8947             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v16i8,
    8948             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8949             :       // GIR_Coverage, 3430,
    8950             :       GIR_Done,
    8951             :     // Label 624: @20074
    8952             :     GIM_Try, /*On fail goto*//*Label 625*/ 20097, // Rule ID 3431 //
    8953             :       GIM_CheckFeatures, GIFBS_IsBE,
    8954             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    8955             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8956             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8957             :       // (bitconvert:{ *:[v16i8] } FPR128:{ *:[v8i16] }:$src)  =>  (REV16v16i8:{ *:[v16i8] } FPR128:{ *:[v8i16] }:$src)
    8958             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV16v16i8,
    8959             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8960             :       // GIR_Coverage, 3431,
    8961             :       GIR_Done,
    8962             :     // Label 625: @20097
    8963             :     GIM_Try, /*On fail goto*//*Label 626*/ 20120, // Rule ID 3432 //
    8964             :       GIM_CheckFeatures, GIFBS_IsBE,
    8965             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8966             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8967             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8968             :       // (bitconvert:{ *:[v16i8] } FPR128:{ *:[v2f64] }:$src)  =>  (REV64v16i8:{ *:[v16i8] } FPR128:{ *:[v2f64] }:$src)
    8969             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV64v16i8,
    8970             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8971             :       // GIR_Coverage, 3432,
    8972             :       GIR_Done,
    8973             :     // Label 626: @20120
    8974             :     GIM_Try, /*On fail goto*//*Label 627*/ 20143, // Rule ID 3433 //
    8975             :       GIM_CheckFeatures, GIFBS_IsBE,
    8976             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8977             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8978             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8979             :       // (bitconvert:{ *:[v16i8] } FPR128:{ *:[v4f32] }:$src)  =>  (REV32v16i8:{ *:[v16i8] } FPR128:{ *:[v4f32] }:$src)
    8980             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV32v16i8,
    8981             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8982             :       // GIR_Coverage, 3433,
    8983             :       GIR_Done,
    8984             :     // Label 627: @20143
    8985             :     GIM_Try, /*On fail goto*//*Label 628*/ 20166, // Rule ID 3434 //
    8986             :       GIM_CheckFeatures, GIFBS_IsBE,
    8987             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    8988             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR128RegClassID,
    8989             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::FPR128RegClassID,
    8990             :       // (bitconvert:{ *:[v16i8] } FPR128:{ *:[v8f16] }:$src)  =>  (REV16v16i8:{ *:[v16i8] } FPR128:{ *:[v8f16] }:$src)
    8991             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/AArch64::REV16v16i8,
    8992             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8993             :       // GIR_Coverage, 3434,
    8994             :       GIR_Done,
    8995             :     // Label 628: @20166
    8996             :     GIM_Reject,
    8997             :     // Label 390: @20167
    8998             :     GIM_Reject,
    8999             :     // Label 9: @20168
    9000             :     GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/0, 11, /*)*//*default:*//*Label 640*/ 22223,
    9001             :     /*GILLT_s16*//*Label 629*/ 20185,
    9002             :     /*GILLT_s32*//*Label 630*/ 20266,
    9003             :     /*GILLT_s64*//*Label 631*/ 20751,
    9004             :     /*GILLT_s128*//*Label 632*/ 21095,
    9005             :     /*GILLT_v2s32*//*Label 633*/ 21207,
    9006             :     /*GILLT_v2s64*//*Label 634*/ 21371,
    9007             :     /*GILLT_v4s16*//*Label 635*/ 21535,
    9008             :     /*GILLT_v4s32*//*Label 636*/ 21699,
    9009             :     /*GILLT_v8s8*//*Label 637*/ 21863,
    9010             :     /*GILLT_v8s16*//*Label 638*/ 21961,
    9011             :     /*GILLT_v16s8*//*Label 639*/ 22125,
    9012             :     // Label 629: @20185
    9013             :     GIM_Try, /*On fail goto*//*Label 641*/ 20265,
    9014             :       GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    9015             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9016             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR16RegClassID,
    9017             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9018             :       GIM_Try, /*On fail goto*//*Label 642*/ 20233, // Rule ID 195 //
    9019             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed16,
    9020             :         // (ld:{ *:[f16] } (am_indexed16:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s2:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDRHui:{ *:[f16] } GPR64sp:{ *:[i64] }:$Rn, uimm12s2:{ *:[i64] }:$offset)
    9021             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRHui,
    9022             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9023             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9024             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9025             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9026             :         GIR_EraseFromParent, /*InsnID*/0,
    9027             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9028             :         // GIR_Coverage, 195,
    9029             :         GIR_Done,
    9030             :       // Label 642: @20233
    9031             :       GIM_Try, /*On fail goto*//*Label 643*/ 20264, // Rule ID 216 //
    9032             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled16,
    9033             :         // (ld:{ *:[f16] } (am_unscaled16:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDURHi:{ *:[f16] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] }):$offset)
    9034             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURHi,
    9035             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9036             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9037             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9038             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9039             :         GIR_EraseFromParent, /*InsnID*/0,
    9040             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9041             :         // GIR_Coverage, 216,
    9042             :         GIR_Done,
    9043             :       // Label 643: @20264
    9044             :       GIM_Reject,
    9045             :     // Label 641: @20265
    9046             :     GIM_Reject,
    9047             :     // Label 630: @20266
    9048             :     GIM_Try, /*On fail goto*//*Label 644*/ 20312, // Rule ID 193 //
    9049             :       GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    9050             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9051             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    9052             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9053             :       GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed32,
    9054             :       // (ld:{ *:[i32] } (am_indexed32:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s4:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDRWui:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, uimm12s4:{ *:[i64] }:$offset)
    9055             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRWui,
    9056             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9057             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9058             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9059             :       GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9060             :       GIR_EraseFromParent, /*InsnID*/0,
    9061             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9062             :       // GIR_Coverage, 193,
    9063             :       GIR_Done,
    9064             :     // Label 644: @20312
    9065             :     GIM_Try, /*On fail goto*//*Label 645*/ 20358, // Rule ID 196 //
    9066             :       GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    9067             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9068             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
    9069             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9070             :       GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed32,
    9071             :       // (ld:{ *:[f32] } (am_indexed32:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s4:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDRSui:{ *:[f32] } GPR64sp:{ *:[i64] }:$Rn, uimm12s4:{ *:[i64] }:$offset)
    9072             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRSui,
    9073             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9074             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9075             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9076             :       GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9077             :       GIR_EraseFromParent, /*InsnID*/0,
    9078             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9079             :       // GIR_Coverage, 196,
    9080             :       GIR_Done,
    9081             :     // Label 645: @20358
    9082             :     GIM_Try, /*On fail goto*//*Label 646*/ 20404, // Rule ID 214 //
    9083             :       GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    9084             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9085             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    9086             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9087             :       GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled32,
    9088             :       // (ld:{ *:[i32] } (am_unscaled32:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDURWi:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] }):$offset)
    9089             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURWi,
    9090             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9091             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9092             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9093             :       GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9094             :       GIR_EraseFromParent, /*InsnID*/0,
    9095             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9096             :       // GIR_Coverage, 214,
    9097             :       GIR_Done,
    9098             :     // Label 646: @20404
    9099             :     GIM_Try, /*On fail goto*//*Label 647*/ 20450, // Rule ID 217 //
    9100             :       GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    9101             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9102             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR32RegClassID,
    9103             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9104             :       GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled32,
    9105             :       // (ld:{ *:[f32] } (am_unscaled32:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDURSi:{ *:[f32] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] }):$offset)
    9106             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURSi,
    9107             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9108             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9109             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9110             :       GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9111             :       GIR_EraseFromParent, /*InsnID*/0,
    9112             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9113             :       // GIR_Coverage, 217,
    9114             :       GIR_Done,
    9115             :     // Label 647: @20450
    9116             :     GIM_Try, /*On fail goto*//*Label 648*/ 20500, // Rule ID 2052 //
    9117             :       GIM_CheckMemorySizeLessThanLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    9118             :       GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
    9119             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9120             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    9121             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9122             :       GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed16,
    9123             :       // (ld:{ *:[i32] } (am_indexed16:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s2:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi16>>  =>  (LDRHHui:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, uimm12s2:{ *:[i64] }:$offset)
    9124             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRHHui,
    9125             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9126             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9127             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9128             :       GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9129             :       GIR_EraseFromParent, /*InsnID*/0,
    9130             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9131             :       // GIR_Coverage, 2052,
    9132             :       GIR_Done,
    9133             :     // Label 648: @20500
    9134             :     GIM_Try, /*On fail goto*//*Label 649*/ 20550, // Rule ID 2053 //
    9135             :       GIM_CheckMemorySizeLessThanLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    9136             :       GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
    9137             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9138             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    9139             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9140             :       GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed8,
    9141             :       // (ld:{ *:[i32] } (am_indexed8:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s1:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi8>>  =>  (LDRBBui:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, uimm12s1:{ *:[i64] }:$offset)
    9142             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRBBui,
    9143             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9144             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9145             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9146             :       GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9147             :       GIR_EraseFromParent, /*InsnID*/0,
    9148             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9149             :       // GIR_Coverage, 2053,
    9150             :       GIR_Done,
    9151             :     // Label 649: @20550
    9152             :     GIM_Try, /*On fail goto*//*Label 650*/ 20600, // Rule ID 2054 //
    9153             :       GIM_CheckMemorySizeLessThanLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    9154             :       GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
    9155             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9156             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    9157             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9158             :       GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed8,
    9159             :       // (ld:{ *:[i32] } (am_indexed8:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s1:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi1>>  =>  (LDRBBui:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, uimm12s1:{ *:[i64] }:$offset)
    9160             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRBBui,
    9161             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9162             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9163             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9164             :       GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9165             :       GIR_EraseFromParent, /*InsnID*/0,
    9166             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9167             :       // GIR_Coverage, 2054,
    9168             :       GIR_Done,
    9169             :     // Label 650: @20600
    9170             :     GIM_Try, /*On fail goto*//*Label 651*/ 20650, // Rule ID 2075 //
    9171             :       GIM_CheckMemorySizeLessThanLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    9172             :       GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/2,
    9173             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9174             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    9175             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9176             :       GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled16,
    9177             :       // (ld:{ *:[i32] } (am_unscaled16:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi16>>  =>  (LDURHHi:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset)
    9178             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURHHi,
    9179             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9180             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9181             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9182             :       GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9183             :       GIR_EraseFromParent, /*InsnID*/0,
    9184             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9185             :       // GIR_Coverage, 2075,
    9186             :       GIR_Done,
    9187             :     // Label 651: @20650
    9188             :     GIM_Try, /*On fail goto*//*Label 652*/ 20700, // Rule ID 2076 //
    9189             :       GIM_CheckMemorySizeLessThanLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    9190             :       GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
    9191             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9192             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    9193             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9194             :       GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled8,
    9195             :       // (ld:{ *:[i32] } (am_unscaled8:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi8>>  =>  (LDURBBi:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset)
    9196             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURBBi,
    9197             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9198             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9199             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9200             :       GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9201             :       GIR_EraseFromParent, /*InsnID*/0,
    9202             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9203             :       // GIR_Coverage, 2076,
    9204             :       GIR_Done,
    9205             :     // Label 652: @20700
    9206             :     GIM_Try, /*On fail goto*//*Label 653*/ 20750, // Rule ID 2077 //
    9207             :       GIM_CheckMemorySizeLessThanLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    9208             :       GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/1,
    9209             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9210             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR32RegClassID,
    9211             :       GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9212             :       GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled8,
    9213             :       // (ld:{ *:[i32] } (am_unscaled8:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_extload>><<P:Predicate_extloadi1>>  =>  (LDURBBi:{ *:[i32] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset)
    9214             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURBBi,
    9215             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9216             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9217             :       GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9218             :       GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9219             :       GIR_EraseFromParent, /*InsnID*/0,
    9220             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9221             :       // GIR_Coverage, 2077,
    9222             :       GIR_Done,
    9223             :     // Label 653: @20750
    9224             :     GIM_Reject,
    9225             :     // Label 631: @20751
    9226             :     GIM_Try, /*On fail goto*//*Label 654*/ 21094,
    9227             :       GIM_CheckMemorySizeEqualToLLT, /*MI*/0, /*MMO*/0, /*OpIdx*/0,
    9228             :       GIM_CheckAtomicOrdering, /*MI*/0, /*Order*/(int64_t)AtomicOrdering::NotAtomic,
    9229             :       GIM_Try, /*On fail goto*//*Label 655*/ 20799, // Rule ID 192 //
    9230             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    9231             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9232             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed64,
    9233             :         // (ld:{ *:[i64] } (am_indexed64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDRXui:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset)
    9234             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRXui,
    9235             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9236             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9237             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9238             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9239             :         GIR_EraseFromParent, /*InsnID*/0,
    9240             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9241             :         // GIR_Coverage, 192,
    9242             :         GIR_Done,
    9243             :       // Label 655: @20799
    9244             :       GIM_Try, /*On fail goto*//*Label 656*/ 20838, // Rule ID 197 //
    9245             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    9246             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9247             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed64,
    9248             :         // (ld:{ *:[f64] } (am_indexed64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDRDui:{ *:[f64] } GPR64sp:{ *:[i64] }:$Rn, uimm12s8:{ *:[i64] }:$offset)
    9249             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDRDui,
    9250             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9251             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9252             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9253             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9254             :         GIR_EraseFromParent, /*InsnID*/0,
    9255             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9256             :         // GIR_Coverage, 197,
    9257             :         GIR_Done,
    9258             :       // Label 656: @20838
    9259             :       GIM_Try, /*On fail goto*//*Label 657*/ 20877, // Rule ID 213 //
    9260             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::GPR64RegClassID,
    9261             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9262             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled64,
    9263             :         // (ld:{ *:[i64] } (am_unscaled64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDURXi:{ *:[i64] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] }):$offset)
    9264             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURXi,
    9265             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9266             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9267             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9268             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9269             :         GIR_EraseFromParent, /*InsnID*/0,
    9270             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9271             :         // GIR_Coverage, 213,
    9272             :         GIR_Done,
    9273             :       // Label 657: @20877
    9274             :       GIM_Try, /*On fail goto*//*Label 658*/ 20916, // Rule ID 218 //
    9275             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    9276             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9277             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_unscaled64,
    9278             :         // (ld:{ *:[f64] } (am_unscaled64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] })<<P:Predicate_simm9>>:$offset))<<P:Predicate_unindexedload>><<P:Predicate_load>>  =>  (LDURDi:{ *:[f64] } GPR64sp:{ *:[i64] }:$Rn, (imm:{ *:[i64] }):$offset)
    9279             :         GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::LDURDi,
    9280             :         GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Rt
    9281             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/0, // Rn
    9282             :         GIR_ComplexSubOperandRenderer, /*InsnID*/0, /*RendererID*/0, /*SubOperand*/1, // offset
    9283             :         GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
    9284             :         GIR_EraseFromParent, /*InsnID*/0,
    9285             :         GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9286             :         // GIR_Coverage, 218,
    9287             :         GIR_Done,
    9288             :       // Label 658: @20916
    9289             :       GIM_Try, /*On fail goto*//*Label 659*/ 20955, // Rule ID 2038 //
    9290             :         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::FPR64RegClassID,
    9291             :         GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/0,
    9292             :         GIM_CheckComplexPattern, /*MI*/0, /*Op*/1, /*Renderer*/0, GICP_gi_am_indexed64,
    9293             :         // (ld:{ *:[v1f64] } (am_indexed64:{ *:[iPTR] } GPR64sp:{ *:[i64] }:$Rn, uimm12s8